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Date: Fri, 8 Jan 2021 14:51:22 -0800
From: Stefano Stabellini <stefano.stabellini@xilinx.com>
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To: Luca Fancellu <luca.fancellu@arm.com>
CC: <fusa-sig@lists.xenproject.org>, <nd@arm.com>
Subject: Re: [RFC PATCH 00/11] docs: Use doxygen to support html
 documentation
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Hi Luca,

Thank you for sending this series, it is pretty good! Please go ahead
and send it to xen-devel, we can follow the regular review cycle there.

Just a couple of suggestions before you do that.

I would avoid adding #ifdef DOXYGEN to workaround the lack of support
for anonymous structs and unions. If there is really no way to make
Doxygen understand anonymous structs and unions, then it is better to
replace them all in the Xen code base, basically taking the "#ifdef
DOXYGEN" code path and removing the other.

I would also remove the various "`incontents" comments you see through
the code because they are used to generated the old docs. As we are
adding support for Doxygen they are not needed anymore.


Finally, from a release perspective, there is still time until Jan 15 to
send out new series for Xen 4.15 and until Jan 29 to get them accepted.
So technically this series could still make 4.15 if you send it out
before Jan 15. However, in practice it is unlikely to meet the Jan 29
target because it touches many common headers so it is likely to spur
discussions.

Cheers,

Stefano


On Thu, 3 Dec 2020, Luca Fancellu wrote:
> The following series of patches based on master (3ae469af8e680df31eecd0a2ac6a83b58ad7ce53)
> is an example of how we can use doxygen to improve the actual (work-in-progress) html
> documentation generated by sphinx.
> 
> To test it follow these steps from the root folder:
> 1) ./configure
> 2) build xen for your favorite arch
> 3) make -C docs sphinx-html
> 
> The last step will generate the html documentation under docs/sphinx/html, the file
> index.html is the home page of the documentation.
> 
> Luca Fancellu (11):
>   docs: add doxygen support for html documentation
>   docs/doxygen: Fix doxygen warnings
>   docs/doxygen: Add doxygen tags to xen.h
>   docs/doxygen: Add doxygen tags to arch-arm.h
>   docs/doxygen: Add doxygen tags to grant_table.h
>   docs/doxygen: Add doxygen tags to sched.h
>   docs/doxygen: Add doxygen tags to elfnote.h
>   docs/doxygen: Add doxygen tags to event_channel.h
>   docs/doxygen: Add doxygen tags to features.h
>   docs/doxygen: Add doxygen tags to xs_wire.h
>   docs: document hypercalls on sphinx generated html
> 
>  .gitignore                                    |    3 +
>  docs/Makefile                                 |   23 +-
>  docs/conf.py                                  |   48 +-
>  docs/hypercall-interfaces/ARM.rst             |   43 +
>  .../hypercall-interfaces/ARM/dom0_console.rst |   10 +
>  docs/hypercall-interfaces/ARM/elf_notes.rst   |   10 +
>  .../ARM/event_channels.rst                    |    8 +
>  .../hypercall-interfaces/ARM/grant_tables.rst |    8 +
>  .../ARM/guest_scheduler_operations.rst        |    7 +
>  .../ARM/hypercall_calling_convention.rst      |    7 +
>  .../ARM/list_of_hypercalls.rst                |    7 +
>  .../ARM/start_of_day_memory_layout.rst        |    9 +
>  .../start_of_day_shared_data_structure.rst    |   12 +
>  .../ARM/supported_hypercalls.rst              |    7 +
>  .../ARM/xen_elfnote_features.rst              |    9 +
>  .../ARM/xenstore_wire_protocol.rst            |    9 +
>  docs/hypercall-interfaces/index.rst           |    9 +
>  docs/hypercall-interfaces/x86_32.rst          |    4 +
>  docs/hypercall-interfaces/x86_64.rst          |    4 +
>  docs/index.rst                                |    8 +
>  docs/xen-doxygen/customdoxygen.css            |   36 +
>  docs/xen-doxygen/doxy-include.sh              |   35 +
>  docs/xen-doxygen/footer.html                  |   21 +
>  docs/xen-doxygen/header.html                  |   56 +
>  docs/xen-doxygen/mainpage.md                  |    5 +
>  docs/xen-doxygen/xen_project_logo_165x67.png  |  Bin 0 -> 18223 bytes
>  docs/xen.doxyfile.in                          | 2319 +++++++++++++++++
>  xen/include/public/arch-arm.h                 |   23 +-
>  xen/include/public/domctl.h                   |   21 +
>  xen/include/public/elfnote.h                  |   68 +-
>  xen/include/public/event_channel.h            |   34 +-
>  xen/include/public/features.h                 |   48 +-
>  xen/include/public/grant_table.h              |   92 +-
>  xen/include/public/io/xs_wire.h               |   17 +
>  xen/include/public/kexec.h                    |   10 +
>  xen/include/public/memory.h                   |   15 +
>  xen/include/public/platform.h                 |   60 +-
>  xen/include/public/sched.h                    |   18 +-
>  xen/include/public/sysctl.h                   |    5 +
>  xen/include/public/vcpu.h                     |   10 +
>  xen/include/public/xen.h                      |  199 +-
>  xen/include/xen/config.h                      |   22 +
>  xen/include/xen/errno.h                       |    6 +
>  xen/include/xen/sched.h                       |    5 +
>  44 files changed, 3231 insertions(+), 139 deletions(-)
>  create mode 100644 docs/hypercall-interfaces/ARM.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/dom0_console.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/elf_notes.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/event_channels.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/grant_tables.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/guest_scheduler_operations.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/hypercall_calling_convention.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/list_of_hypercalls.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/start_of_day_memory_layout.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/start_of_day_shared_data_structure.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/supported_hypercalls.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/xen_elfnote_features.rst
>  create mode 100644 docs/hypercall-interfaces/ARM/xenstore_wire_protocol.rst
>  create mode 100644 docs/hypercall-interfaces/index.rst
>  create mode 100644 docs/hypercall-interfaces/x86_32.rst
>  create mode 100644 docs/hypercall-interfaces/x86_64.rst
>  create mode 100644 docs/xen-doxygen/customdoxygen.css
>  create mode 100755 docs/xen-doxygen/doxy-include.sh
>  create mode 100644 docs/xen-doxygen/footer.html
>  create mode 100644 docs/xen-doxygen/header.html
>  create mode 100644 docs/xen-doxygen/mainpage.md
>  create mode 100644 docs/xen-doxygen/xen_project_logo_165x67.png
>  create mode 100644 docs/xen.doxyfile.in
> 
> -- 
> 2.17.1
> 
> 


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Date: Mon, 11 Jan 2021 13:08:35 -0800
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Hi all,

Happy New Year everyone! I hope you all had a good break.

The agenda for tomorrow's Xen FuSa meeting is:

- progress on the Doxygen patch series for Xen
- Xen with ARMClang updates
- cppcheck and other MISRAC Checkers

Feel free to suggest additional topics.

Cheers,

Stefano


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Date: Tue, 12 Jan 2021 10:09:48 -0800
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On Mon, 11 Jan 2021, Stefano Stabellini wrote:
> Hi all,
> 
> Happy New Year everyone! I hope you all had a good break.
> 
> The agenda for tomorrow's Xen FuSa meeting is:
> 
> - progress on the Doxygen patch series for Xen
> - Xen with ARMClang updates
> - cppcheck and other MISRAC Checkers
> 
> Feel free to suggest additional topics.


These are the minutes from today's call, thank you all for attending!


# Xen with ARMClang updates

ACTION(Artem): send out the latest version of the patches


# Doxygen

Check with David if anonymous union can be supported by MISRA.
But even if they can be supported, Doxygen doesn't support them, and
other safety standard don't support them.

ACTION(Luca): send out updated series


# MISRAC Checkers & Rules

We need to evaluate the rules that are applicable first; then select the
tools that can check for them. It is OK if the tool doesn't cover them
all.  We should be very transparent about what is checked and what is
not checked.

We should also cover any additional specific rules for Xen development.
We might be able to tailor out some MISRA rules because the issues are
already covered by Xen specific rules.

We might not be able to check for all the rules with a single tool.
We'll probably end up with a combination of gcc, cppcheck, and others.

ACTION(Francesco): share the initial spreadsheet of MISRA rules on
cryptpad.fr for others to start identifying a subset that is relevant

Identify first a set of 10-20 rules that are interesting. Specify for
each of them the checking tool and whether they need upstream changes.

Another checker we could use is the paid version of Coverity. Maybe
somebody in the community can use their Coverity to check upstream Xen.

ACTION(Bertrand): check if Arm has access to Coverity, as potential
                  additional tool to use for checking


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From: Artem Mygaiev <Artem_Mygaiev@epam.com>
To: "fusa-sig@lists.xenproject.org" <fusa-sig@lists.xenproject.org>
Subject: FW: IRQ latency measurements in hypervisor
Thread-Topic: IRQ latency measurements in hypervisor
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Hi all

We have just published a preliminary research on Xen RT performance at xen-=
devel ML, I guess it would be useful for SIG group to review.

Best regards,
 -- Artem

-----Original Message-----
From: Xen-devel <xen-devel-bounces@lists.xenproject.org> On Behalf Of Volod=
ymyr Babchuk
Sent: =D3=D2=C5=C4=C1, 13 =D1=CE=D7=C1=D2=D1 2021 =C7. 01:48
To: xen-devel@lists.xenproject.org
Cc: Julien Grall <jgrall@amazon.com>; Stefano Stabellini <stefano.stabellin=
i@xilinx.com>; Dario Faggioli <dario.faggioli@suse.com>
Subject: [!SPOOF] IRQ latency measurements in hypervisor


Hello community,

Recently I was experimenting with context switching latencies in Xen. I wan=
t to share my findings and discuss some issues I have found.

My target was to ensure that no more 30us passes between interrupt generati=
on and handling in a guest VM. Main goal was to determine if Xen is ready f=
or soft RT and to identify main issues that prevent this.

TLDR: I was able to achieve mean 15us latency with tuned RTDS scheduler, di=
sabled serial console and some hacks to the Xen toolstack. This was done on=
 a setup with 1 PCPU.

Test setup.

ARMv8 platform. Namely Renesas Rcar H3 SoC on Salvator board.

To accurately determine latency, I employed one of timer counter units
(TMUs) available on the SoC. This is 32-bit timer with auto-reload, that ca=
n generate interrupt on underflow. I fed it with 33.275MHz clock, which gav=
e me resolution of about 30ns. I programmed the timer to generate interrupt=
 every 10ms. My ISR then read the current timer value and determined how mu=
ch time passed since last underrun. This gave me time interval between IRQ =
generation and ISR invocation.
Those values were collected and every 10 seconds statistics was calculated.=
 There is an example of output from my Linux driver:

[   83.873162] rt_eval_tmu e6fc0000.tmu: Mean: 44 (1320 ns) stddev: 8 (240 =
ns)
[   94.136632] rt_eval_tmu e6fc0000.tmu: Mean: 44 (1320 ns) stddev: 8 (240 =
ns)
[  104.400098] rt_eval_tmu e6fc0000.tmu: Mean: 50 (1500 ns) stddev: 129 (38=
70 ns) [  114.663828] rt_eval_tmu e6fc0000.tmu: Mean: 44 (1320 ns) stddev: =
8 (240 ns) [  124.927296] rt_eval_tmu e6fc0000.tmu: Mean: 56 (1680 ns) stdd=
ev: 183 (5490 ns)

This is the baremetal Linux. And there is Dom0:

[  237.431003] rt_eval_tmu e6fc0000.tmu: Mean: 306 (9180 ns) stddev: 25 (75=
0 ns) [  247.694506] rt_eval_tmu e6fc0000.tmu: Mean: 302 (9060 ns) stddev: =
17 (510 ns)

Driver outputs both the raw timer value (eg. 4) and the same value scaled t=
o nanoseconds (eg. 1320 ns). As you can see baremetal setup is much faster.=
 But experiments showed that Linux does not provide consistent values, even=
 when running in baremetal mode. You can see sporadic spikes in "std dev" v=
alues.

So my next step was to use proper RT OS to do the measurements. I chose Zep=
hyr. My PR that adds Xen support to Zephyr can be found at [1]. Support for=
 RCAR Gen3 is not upstreamed, but is present on my GitHub([2]). At [3] you =
can find the source code for application that does the latency measurements=
. It behaves exactly as my linux driver, but provides a bit more informatio=
n:

 *** Booting Zephyr OS build zephyr-v2.4.0-2750-g0f2c858a39fc  *** RT Eval =
app

Counter freq is 33280000 Hz. Period is 30 ns Set alarm in 0 sec (332800 tic=
ks)
Mean: 600 (18000 ns) stddev: 3737 (112110 ns) above thr: 0% [265 (7950 ns) =
- 66955 (2008650 ns)] global [265 (7950 ns) 66955 (2008650 ns)]
Mean: 388 (11640 ns) stddev: 2059 (61770 ns) above thr: 0% [266 (7980 ns) -=
 58830 (1764900 ns)] global [265 (7950 ns) 66955 (2008650 ns)]
Mean: 358 (10740 ns) stddev: 1796 (53880 ns) above thr: 0% [265 (7950 ns) -=
 57780 (1733400 ns)] global [265 (7950 ns) 66955 (2008650 ns)] ...

So there you can see: mean time, standard deviation, % of interrupts that w=
as processed above 30us threshold, minimum and maximum latency values for t=
he current 10s run, global minimum and maximum.

Zephyr running as baremetal showed very stable results (this is an older bu=
ild, so no extended statistics there):

## Starting application at 0x480803C0 ...
 *** Booting Zephyr OS build zephyr-v2.4.0-1137-g5803ee1e8183  *** RT Eval =
app

Counter freq is 33280000 Hz. Period is 30 ns
Mean: 31 (930 ns) stddev: 0 (0 ns)
Mean: 31 (930 ns) stddev: 0 (0 ns)
Mean: 31 (930 ns) stddev: 0 (0 ns)
Mean: 31 (930 ns) stddev: 0 (0 ns)
Mean: 31 (930 ns) stddev: 0 (0 ns)
Mean: 31 (930 ns) stddev: 0 (0 ns)
...

As Zephyr provided stable readouts with no jitter, I used it to do all subs=
equent measurements.


IMPORTANT! All subsequent tests was conducted with only 1 CPU core enabled.=
 My goal was to ensure that system can timely react to an external interrup=
t even under load.


Test results and latency sources

As you can see, baremetal OS provides latency of ~0.9us without any deviati=
ons. The same code running as DomU on idle system shows mean latency of 12u=
s and deviation of about 10us. Range of latencies in a 10s batch can vary f=
rom 8us to 25us. This fits into required 30us threshold, so no big issue th=
ere.

But this worsens under certain conditions.

1. Serial console. RCAR serial driver (scif) works in synchronous
   mode, so any heavy serial console output leads to higher
   latency. Tests shows mean latency of 1000us and deviation of 1332
   us. 54% of interrupts are handled outside of 30us period. Real
   values may be even higher, because in some cases timer would do
   full cycle and instead of say 11ms ISR would read 11 % 10 =3D 1ms
   latency. I tried to enable asynchronous mode for the serial
   console. This made things better, but it lead to gaps in output, so
   I just turned the serial console off completely.

2. RTDS scheduler. With console disabled, things like "hexdump -v
   /dev/zero" didn't affected the latency so badly, but anyways,
   sometimes I got ~600us spikes. This is not a surprise, because of
   default RTDS configuration. I changed period for DomU from default
   10ms to 100us and things got better: with Dom0 burning CPU I am
   rarely getting max latency of about ~30us with mean latency of ~9us
   and deviation of ~0.5us. On other hand, when I tried to set period
   to 30us, max latency rose up to ~60us.

3. Huge latency spike during domain creation. I conducted some
   additional tests, including use of PV drivers, but this didn't
   affected the latency in my "real time" domain. But attempt to
   create another domain with relatively large memory size of 2GB led
   to huge spike in latency. Debugging led to this call path:

   XENMEM_populate_physmap -> populate_physmap() ->
   alloc_domheap_pages() -> alloc_heap_pages()-> huge
   "for ( i =3D 0; i < (1 << order); i++ )" loop.

   This loops handles struct page* for every one of 262144 pages that
   was allocated by calling populate_physmap(). This function is not
   preemptible and it takes about a second to complete on my
   setup. Needless to say that it completely screws any responsiveness
   of the hypervisor.

I managed to overcome the issue #3 by commenting out all calls to
populate_one_size() except the populate_one_size(PFN_4K_SHIFT) in xg_dom_ar=
m.c. This lengthened domain construction, but my "RT" domain didn't experie=
nced so big latency issues. Apparently all other hypercalls which are used =
during domain creation are either fast or preemptible. No doubts that my ha=
ck lead to page tables inflation and overall performance drop.

Conclusions.

I wanted to:

1. Share my approach to IRQ latency measurements.

2. Share results of said measurements.

3. Ask for other potential scenarios, which can affect IRQ latency so I
   can test them on my setup.

4. Discuss the issue with alloc_domheap_pages(). I brooded over ways
   to make it preemptible. But it is a) located deep in call chain and
   b) used not only by hypercalls. So I can't see an easy way to make
   it preemptible. The best solution would be of course to make the
   whole hypervisor preemptible. I even heard about some work long
   time ago...

5. Show that under certain conditions Xen can be used in a soft RT
   system. Of course, additional tests are needed, but with some minor
   tweaks it can provide ~15us IRQ latency on a typical workload.

[1] https://urldefense.com/v3/__https://github.com/zephyrproject-rtos/zephy=
r/pull/30164__;!!GF_29dbcQIUBPA!lvgIcOe8f-s-fHEdC5E6wcUUKkn4ACfQymgjidLrIbx=
4BkoJBYOZjAntdCuh_O81uQ$ [github[.]com] [2] https://urldefense.com/v3/__htt=
ps://github.com/lorc/zephyr/tree/renesas_salvator_x__;!!GF_29dbcQIUBPA!lvgI=
cOe8f-s-fHEdC5E6wcUUKkn4ACfQymgjidLrIbx4BkoJBYOZjAntdCvKECE47w$ [github[.]c=
om] [3] https://urldefense.com/v3/__https://github.com/lorc/zephyr/blob/rt_=
eval/samples/rt_eval/src/main.c__;!!GF_29dbcQIUBPA!lvgIcOe8f-s-fHEdC5E6wcUU=
Kkn4ACfQymgjidLrIbx4BkoJBYOZjAntdCtFdmBz2g$ [github[.]com]


--
Volodymyr Babchuk at EPAM


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Date: Tue, 26 Jan 2021 08:05:01 -0800 (PST)
From: Stefano Stabellini <sstabellini@kernel.org>
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Subject: FuSa meeting starting now
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Hi all,

Apologies as I forgot to send the agenda in advance. We are starting the
regular FuSa meeting now.

Cheers,

Stefano



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Date: Tue, 26 Jan 2021 09:52:19 -0800
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Hi all,

These are the meeting minutes from today's Xen FuSa meeting.


# Documentation

- Doxygen patch series
Committed to https://gitlab.com/xen-project/fusa/xen-integration/-/tree/integration/fusa
Series to be sent to xen-devel mid-February

- Next steps: high level requirements
ACTION(Stefano,Bertrand): write example high-level requirements for hypercalls

- Next steps: boot configuration options
ACTION(Bertrand,Luca): find a way to include existing documents for Xen
                       command line options into Doxygen workflow


# MisraC

Francesco published the document with the list of MISRAC rules here:
https://cryptpad.fr/file/#/2/file/526SY2VBsv9MLN3jG5aAPOJa/

We discussed it during the meeting and Kate let us know that Zephyr came
up with a short list of MISRAC rules already:
https://docs.zephyrproject.org/latest/guides/coding_guidelines/index.html

I imported the list into our gitlab Xen docs repository here:
https://gitlab.com/xen-project/fusa/fusa-docs/-/blob/master/misrac/rules.rst

Given the similarities between Zephyr and Xen, I expect the list to be
vastly applicable to Xen, but of course there can be little differences
here and there. Let's go through the document and let's make any
modifications that make sense (just send out merge requests).

Cheers,

Stefano


