From xen-users-bounces@lists.xensource.com Thu Dec 01 10:38:01 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 01 Dec 2011 10:38:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RW41A-0005Ul-Dv; Thu, 01 Dec 2011 10:37:28 +0000 Received: from mail174.messagelabs.com ([85.158.138.51]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RVout-0002OP-TJ for xen-users@lists.xensource.com; Wed, 30 Nov 2011 18:30:00 +0000 X-Env-Sender: rpurinton@unifiedtechnologies.com X-Msg-Ref: server-8.tower-174.messagelabs.com!1322677757!3733183!1 X-Originating-IP: [65.126.239.122] X-SpamReason: No, hits=0.8 required=7.0 tests=EXTRA_MPART_TYPE, HTML_MESSAGE X-StarScan-Version: 6.4.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 11780 invoked from network); 30 Nov 2011 18:29:18 -0000 Received: from mailsentry1.itpartnersllc.com (HELO mailsentry1.itpartnersllc.com) (65.126.239.122) by server-8.tower-174.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 30 Nov 2011 18:29:18 -0000 Received: from mb002.v019.myunifiedcloud.net (64-151-62-23.static.everestkc.net [64.151.62.23]) by mailsentry1.itpartnersllc.com with ESMTP id pAUISTDO008602-pAUISTDT008602 (version=TLSv1 cipher=AES128-SHA bits=128 verify=CAFAIL); Wed, 30 Nov 2011 13:29:15 -0500 Received: from mb001.v019.myunifiedcloud.net ([172.18.106.40]) by mb002 ([172.18.106.41]) with mapi; Wed, 30 Nov 2011 18:28:50 +0000 From: Russ Purinton To: akhilesh kumar , "Xen-users@lists.xensource.com" Date: Wed, 30 Nov 2011 18:28:21 +0000 Thread-Topic: [Xen-users] GPU pass through support for GTX 480/590 Thread-Index: AcyviQ3U2moDHdFcTyWpnKV/fuWRMQABJevg Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 X-FEAS-SYSTEM-WL: 64.151.62.23 X-Mailman-Approved-At: Thu, 01 Dec 2011 10:37:24 +0000 Subject: Re: [Xen-users] GPU pass through support for GTX 480/590 X-BeenThere: xen-users@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============1841065679264679203==" Sender: xen-users-bounces@lists.xensource.com Errors-To: xen-users-bounces@lists.xensource.com --===============1841065679264679203== Content-Language: en-US Content-Type: multipart/related; boundary="_004_DCD0554F601CF946A51CAE28BBABDC4C2F7AE2D20Emb001_"; type="multipart/alternative" --_004_DCD0554F601CF946A51CAE28BBABDC4C2F7AE2D20Emb001_ Content-Type: multipart/alternative; boundary="_000_DCD0554F601CF946A51CAE28BBABDC4C2F7AE2D20Emb001_" --_000_DCD0554F601CF946A51CAE28BBABDC4C2F7AE2D20Emb001_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I have 2 gtx 590 in SLI mode (4 GPU Quad SLI) Can't get any drivers to compile/run under xenserver. Loaded Gnome GUI on Dom0 and can run it at 720p resolution, but not higher,= and the 720p looks ugly on my 1600p monitor Can't get resolution to run h= igher [cid:image001.png@01CCAF63.EE02DD50] From: xen-users-bounces@lists.xensource.com [mailto:xen-users-bounces@lists= .xensource.com] On Behalf Of akhilesh kumar Sent: Wednesday, November 30, 2011 12:52 PM To: Xen-users@lists.xensource.com Subject: [Xen-users] GPU pass through support for GTX 480/590 Hi All, My graphics is slow on HVM guest so To make it fast I want to use GPU pass = through but in xen source i did not find support for that (device ID for graphics c= ard GTX 480/590) I have bellow configuration 1->Intel VT support board 2->xen 4.0 3->GTX 480/590 I have the following query 1->with open source xen 4.0, Can I use GPU pass-through for GTX 480/590 or= I need to apply some patces 2->Will GPU pass through really make graphics fast on HVM Thanks, Akhilesh --_000_DCD0554F601CF946A51CAE28BBABDC4C2F7AE2D20Emb001_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

I have 2 = gtx 590 in SLI mode (4 GPU Quad SLI)

Can’t get any drivers to compile/run under xenserver.=

Loaded Gnome GUI on Dom0 and c= an run it at 720p resolution, but not higher, and the 720p looks ugly on my= 1600p monitor  Can’t get resolution to run higher

 

3D"Description:

 

From: xen-users-bounces@lists.xensource.com [mailto:xen-users-b= ounces@lists.xensource.com] On Behalf Of akhilesh kumar
Sent:<= /b> Wednesday, November 30, 2011 12:52 PM
To: Xen-users@lists.xen= source.com
Subject: [Xen-users] GPU pass through support for GTX = 480/590

 

Hi All,

 

My graphics is slow o= n HVM guest so To make it fast I want to use GPU pass through

but in xen source i did not find support f= or that (device ID for graphics card GTX 480/590)

=

I have bellow configuration 

=

1->Intel VT support board 

=

2->xen 4.0

3->GTX 480/590 

 

I have th= e following query 

=  

1->with open source xen = 4.0, Can  I use GPU pass-through for GTX 480/590 or I need to app= ly some patces 

2->Wi= ll GPU pass through really make graphics fast on HVM 

 

Thanks,

Akhilesh = ;

 

=

   

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--===============1841065679264679203==-- From xen-devel-bounces@lists.xensource.com Fri Dec 02 19:24:15 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 02 Dec 2011 19:24:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RWYhr-0002t0-9c; Fri, 02 Dec 2011 19:23:35 +0000 Received: from mail27.messagelabs.com ([193.109.254.147]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RWYhp-0002sv-3q for xen-devel@lists.xensource.com; Fri, 02 Dec 2011 19:23:33 +0000 X-Env-Sender: quartex73@gmail.com X-Msg-Ref: server-5.tower-27.messagelabs.com!1322853731!45227328!1 X-Originating-IP: [209.85.213.171] X-SpamReason: No, hits=1.0 required=7.0 tests=BODY_RANDOM_LONG, ML_RADAR_SPEW_LINKS_14,RCVD_BY_IP,UPPERCASE_50_75,spamassassin: X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 7471 invoked from network); 2 Dec 2011 19:22:12 -0000 Received: from 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[Xen-devel] xen 4.0.1 w/2.6.32.47 hangs at boot X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com ### lspci 00:00.0 Host bridge: Intel Corporation Core Processor DMI (rev 11) Subsystem: Intel Corporation Device 0000 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ SERR- TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: Intel Corporation Device 0000 Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit- Address: fee0100c Data: 4139 Masking: 00000002 Pending: 00000000 Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag+ RBE+ FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #5, Speed 5GT/s, Width x8, ASPM unknown, Latency L0 <512ns, L1 <4us ClockPM- Surprise+ LLActRep+ BwNot+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #21, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd Off, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+ DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [e0] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr+ BadTLP+ BadDLLP+ Rollover+ Timeout+ NonFatalErr+ AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [150 v1] Access Control Services ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans- ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans- Kernel driver in use: pcieport 00:08.0 System peripheral: Intel Corporation Core Processor System Management Registers (rev 11) Subsystem: Device 0086:00ec Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- 00:08.1 System peripheral: Intel Corporation Core Processor Semaphore and Scratchpad Registers (rev 11) Subsystem: Device 0086:00ec Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- 00:08.2 System peripheral: Intel Corporation Core Processor System Control and Status Registers (rev 11) Subsystem: Device 0086:00ec Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- 00:08.3 System peripheral: Intel Corporation Core Processor Miscellaneous Registers (rev 11) Subsystem: Device 0086:00ec Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise+ Slot #0, PowerLimit 25.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0100c Data: 4141 Capabilities: [90] Subsystem: Intel Corporation Device 34ec Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport 00:1c.4 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 5 (rev 05) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0100c Data: 4149 Capabilities: [90] Subsystem: Intel Corporation Device 34ec Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport 00:1c.6 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 7 (rev 05) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #7, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0100c Data: 4151 Capabilities: [90] Subsystem: Intel Corporation Device 34ec Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport 00:1c.7 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 8 (rev 05) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE+ FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #8, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise+ Slot #7, PowerLimit 10.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0100c Data: 4159 Capabilities: [90] Subsystem: Intel Corporation Device 34ec Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport 00:1d.0 USB Controller: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller (rev 05) (prog-if 20 [EHCI]) Subsystem: Intel Corporation Device 34ec Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- SERR- TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn+ Capabilities: [50] Subsystem: Intel Corporation Device 34ec 00:1f.0 ISA bridge: Intel Corporation 3400 Series Chipset LPC Interface Controller (rev 05) Subsystem: Intel Corporation Device 34ec Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- SERR- 00:1f.2 IDE interface: Intel Corporation 5 Series/3400 Series Chipset 4 port SATA IDE Controller (rev 05) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Intel Corporation Device 34ec Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- Envelope-to: archives@lists.xen.org Delivery-date: Mon, 05 Dec 2011 18:11:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXd0Y-0006AR-Ur; Mon, 05 Dec 2011 18:11:18 +0000 Received: from mail182.messagelabs.com ([85.158.139.83]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXd0U-000660-Px for xen-devel@lists.xensource.com; Mon, 05 Dec 2011 18:11:15 +0000 X-Env-Sender: Ian.Jackson@eu.citrix.com X-Msg-Ref: server-13.tower-182.messagelabs.com!1323108629!5440616!2 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiA5MjAyNg==\n X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 14036 invoked from network); 5 Dec 2011 18:10:29 -0000 Received: from smtp.ctxuk.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-13.tower-182.messagelabs.com with RC4-SHA encrypted SMTP; 5 Dec 2011 18:10:29 -0000 X-IronPort-AV: E=Sophos;i="4.71,300,1320624000"; d="scan'208";a="9297531" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 05 Dec 2011 18:10:29 +0000 Received: from norwich.cam.xci-test.com (10.80.248.129) by smtprelay.citrix.com (10.30.203.162) with Microsoft SMTP Server id 8.3.213.0; Mon, 5 Dec 2011 18:10:29 +0000 Received: from mariner.cam.xci-test.com ([10.80.2.22] helo=mariner.uk.xensource.com ident=Debian-exim) by norwich.cam.xci-test.com with esmtp (Exim 4.72) (envelope-from ) id 1RXczl-0003kR-2X; Mon, 05 Dec 2011 18:10:29 +0000 Received: from iwj by mariner.uk.xensource.com with local (Exim 4.72) (envelope-from ) id 1RXczl-0006Wb-1c; Mon, 05 Dec 2011 18:10:29 +0000 From: Ian Jackson To: Date: Mon, 5 Dec 2011 18:10:18 +0000 Message-ID: <1323108621-22654-13-git-send-email-ian.jackson@eu.citrix.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323108621-22654-1-git-send-email-ian.jackson@eu.citrix.com> References: <1323108621-22654-1-git-send-email-ian.jackson@eu.citrix.com> MIME-Version: 1.0 Cc: Ian Jackson Subject: [Xen-devel] [PATCH 12/15] libxl: Use GC_INIT and GC_FREE everywhere X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com Replace libxl__gc gc = LIBXL_INIT_GC(ctx); ... libxl__free_all(&gc); with GC_INIT(ctx); ... GC_FREE; throughout with a couple of perl runes. We must then adjust uses of the resulting gc for pointerness, which is mostly just replacing all occurrences of "&gc" with "gc". Also a couple of unusual uses of LIBXL_INIT_GC needed to be fixed up by hand. Here are those runes: perl -i -pe 's/\Q libxl__gc gc = LIBXL_INIT_GC(ctx);/ GC_INIT(ctx);/' tools/libxl/*.c perl -i -pe 's/\Q libxl__free_all(&gc);/ GC_FREE;/' tools/libxl/*.c Signed-off-by: Ian Jackson --- tools/libxl/libxl.c | 590 ++++++++++++++++++++-------------------- tools/libxl/libxl_bootloader.c | 14 +- tools/libxl/libxl_create.c | 12 +- tools/libxl/libxl_dom.c | 16 +- tools/libxl/libxl_pci.c | 34 ++-- tools/libxl/libxl_qmp.c | 32 +- tools/libxl/libxl_utils.c | 36 ++-- 7 files changed, 367 insertions(+), 367 deletions(-) diff --git a/tools/libxl/libxl.c b/tools/libxl/libxl.c index 7488538..3a8cfe3 100644 --- a/tools/libxl/libxl.c +++ b/tools/libxl/libxl.c @@ -232,19 +232,19 @@ int libxl__domain_rename(libxl__gc *gc, uint32_t domid, int libxl_domain_rename(libxl_ctx *ctx, uint32_t domid, const char *old_name, const char *new_name) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__domain_rename(&gc, domid, old_name, new_name, XBT_NULL); - libxl__free_all(&gc); + rc = libxl__domain_rename(gc, domid, old_name, new_name, XBT_NULL); + GC_FREE; return rc; } int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 0; - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, "Called domain_resume on " "non-cooperative hvm domain %u", domid); rc = ERROR_NI; @@ -264,7 +264,7 @@ int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) rc = ERROR_FAIL; } out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -277,7 +277,7 @@ out: int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, libxl_domain_create_info *info, const char *name_suffix, libxl_uuid new_uuid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); struct xs_permissions roperm[2]; xs_transaction_t t; char *preserved_name; @@ -287,27 +287,27 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, int rc; - preserved_name = libxl__sprintf(&gc, "%s%s", info->name, name_suffix); + preserved_name = libxl__sprintf(gc, "%s%s", info->name, name_suffix); if (!preserved_name) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } - uuid_string = libxl__uuid2string(&gc, new_uuid); + uuid_string = libxl__uuid2string(gc, new_uuid); if (!uuid_string) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - vm_path = libxl__sprintf(&gc, "/vm/%s", uuid_string); + vm_path = libxl__sprintf(gc, "/vm/%s", uuid_string); if (!vm_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -323,20 +323,20 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, xs_mkdir(ctx->xsh, t, vm_path); xs_set_permissions(ctx->xsh, t, vm_path, roperm, ARRAY_SIZE(roperm)); - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); - rc = libxl__domain_rename(&gc, domid, info->name, preserved_name, t); + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); + rc = libxl__domain_rename(gc, domid, info->name, preserved_name, t); if (rc) { - libxl__free_all(&gc); + GC_FREE; return rc; } - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); if (!xs_transaction_end(ctx->xsh, t, 0)) if (errno == EAGAIN) goto retry_transaction; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -478,16 +478,16 @@ libxl_vminfo * libxl_list_vm(libxl_ctx *ctx, int *nb_vm) int libxl_domain_suspend(libxl_ctx *ctx, libxl_domain_suspend_info *info, uint32_t domid, int fd) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - libxl_domain_type type = libxl__domain_type(&gc, domid); + GC_INIT(ctx); + libxl_domain_type type = libxl__domain_type(gc, domid); int live = info != NULL && info->flags & XL_SUSPEND_LIVE; int debug = info != NULL && info->flags & XL_SUSPEND_DEBUG; int rc = 0; - rc = libxl__domain_suspend_common(&gc, domid, fd, type, live, debug); + rc = libxl__domain_suspend_common(gc, domid, fd, type, live, debug); if (!rc && type == LIBXL_DOMAIN_TYPE_HVM) - rc = libxl__domain_save_device_model(&gc, domid, fd); - libxl__free_all(&gc); + rc = libxl__domain_save_device_model(gc, domid, fd); + GC_FREE; return rc; } @@ -517,17 +517,17 @@ int libxl_domain_core_dump(libxl_ctx *ctx, uint32_t domid, int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *path; char *state; int ret, rc = 0; - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { - path = libxl__sprintf(&gc, "/local/domain/0/device-model/%d/state", domid); - state = libxl__xs_read(&gc, XBT_NULL, path); + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { + path = libxl__sprintf(gc, "/local/domain/0/device-model/%d/state", domid); + state = libxl__xs_read(gc, XBT_NULL, path); if (state != NULL && !strcmp(state, "paused")) { - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/0/device-model/%d/command", domid), "continue"); - libxl__wait_for_device_model(&gc, domid, "running", + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/0/device-model/%d/command", domid), "continue"); + libxl__wait_for_device_model(gc, domid, "running", NULL, NULL, NULL); } } @@ -536,7 +536,7 @@ int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "unpausing domain %d", domid); rc = ERROR_FAIL; } - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -550,42 +550,42 @@ static char *req_table[] = { int libxl_domain_shutdown(libxl_ctx *ctx, uint32_t domid, int req) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *shutdown_path; char *dom_path; if (req > ARRAY_SIZE(req_table)) { - libxl__free_all(&gc); + GC_FREE; return ERROR_INVAL; } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { unsigned long pvdriver = 0; int ret; ret = xc_get_hvm_param(ctx->xch, domid, HVM_PARAM_CALLBACK_IRQ, &pvdriver); if (ret<0) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting HVM callback IRQ"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } if (!pvdriver) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "HVM domain without PV drivers:" " graceful shutdown not possible, use destroy"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } } - shutdown_path = libxl__sprintf(&gc, "%s/control/shutdown", dom_path); + shutdown_path = libxl__sprintf(gc, "%s/control/shutdown", dom_path); xs_write(ctx->xsh, XBT_NULL, shutdown_path, req_table[req], strlen(req_table[req])); - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -607,7 +607,7 @@ int libxl_wait_for_domain_death(libxl_ctx *ctx, uint32_t domid, libxl_waiter *wa int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_device_disk *disks, int num_disks, libxl_waiter *waiter) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int i, rc = -1; uint32_t domid = libxl_get_stubdom_id(ctx, guest_domid); @@ -616,7 +616,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic for (i = 0; i < num_disks; i++) { if (asprintf(&(waiter[i].path), "%s/device/vbd/%d/eject", - libxl__xs_get_dompath(&gc, domid), + libxl__xs_get_dompath(gc, domid), libxl__device_disk_dev_number(disks[i].vdev, NULL, NULL)) < 0) goto out; @@ -626,7 +626,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic } rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -680,22 +680,22 @@ int libxl_event_get_domain_death_info(libxl_ctx *ctx, uint32_t domid, libxl_even int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event *event, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *path; char *backend; char *value; char backend_type[BACKEND_STRING_SIZE+1]; - value = libxl__xs_read(&gc, XBT_NULL, event->path); + value = libxl__xs_read(gc, XBT_NULL, event->path); if (!value || strcmp(value, "eject")) { - libxl__free_all(&gc); + GC_FREE; return 0; } path = strdup(event->path); path[strlen(path) - 6] = '\0'; - backend = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend", path)); + backend = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend", path)); sscanf(backend, "/local/domain/%d/backend/%" TOSTRING(BACKEND_STRING_SIZE) "[a-z]/%*d/%*d", @@ -711,19 +711,19 @@ int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event disk->pdev_path = strdup(""); disk->format = LIBXL_DISK_FORMAT_EMPTY; /* this value is returned to the user: do not free right away */ - disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "%s/dev", backend), NULL); + disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "%s/dev", backend), NULL); disk->removable = 1; disk->readwrite = 0; disk->is_cdrom = 1; free(path); - libxl__free_all(&gc); + GC_FREE; return 1; } int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_dominfo dominfo; char *dom_path; char *vm_path; @@ -740,40 +740,40 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) return rc; } - switch (libxl__domain_type(&gc, domid)) { + switch (libxl__domain_type(gc, domid)) { case LIBXL_DOMAIN_TYPE_HVM: dm_present = 1; break; case LIBXL_DOMAIN_TYPE_PV: - pid = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/%d/image/device-model-pid", domid)); + pid = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/%d/image/device-model-pid", domid)); dm_present = (pid != NULL); break; default: abort(); } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { rc = ERROR_FAIL; goto out; } - if (libxl__device_pci_destroy_all(&gc, domid) < 0) + if (libxl__device_pci_destroy_all(gc, domid) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "pci shutdown failed for domid %d", domid); rc = xc_domain_pause(ctx->xch, domid); if (rc < 0) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "xc_domain_pause failed for %d", domid); } if (dm_present) { - if (libxl__destroy_device_model(&gc, domid) < 0) + if (libxl__destroy_device_model(gc, domid) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl__destroy_device_model failed for %d", domid); - libxl__qmp_cleanup(&gc, domid); + libxl__qmp_cleanup(gc, domid); } - if (libxl__devices_destroy(&gc, domid, force) < 0) + if (libxl__devices_destroy(gc, domid, force) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl_devices_dispose failed for %d", domid); - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); if (vm_path) if (!xs_rm(ctx->xsh, XBT_NULL, vm_path)) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", vm_path); @@ -781,9 +781,9 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) if (!xs_rm(ctx->xsh, XBT_NULL, dom_path)) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", dom_path); - xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(&gc, domid)); + xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(gc, domid)); - libxl__userdata_destroyall(&gc, domid); + libxl__userdata_destroyall(gc, domid); rc = xc_domain_destroy(ctx->xch, domid); if (rc < 0) { @@ -793,16 +793,16 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) } rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_console_type type) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *p = libxl__sprintf(&gc, "%s/xenconsole", libxl_private_bindir_path()); - char *domid_s = libxl__sprintf(&gc, "%d", domid); - char *cons_num_s = libxl__sprintf(&gc, "%d", cons_num); + GC_INIT(ctx); + char *p = libxl__sprintf(gc, "%s/xenconsole", libxl_private_bindir_path()); + char *domid_s = libxl__sprintf(gc, "%d", domid); + char *cons_num_s = libxl__sprintf(gc, "%d", cons_num); char *cons_type_s; switch (type) { @@ -819,20 +819,20 @@ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_conso execl(p, p, domid_s, "--num", cons_num_s, "--type", cons_type_s, (void *)NULL); out: - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); uint32_t stubdomid = libxl_get_stubdom_id(ctx, domid_vm); int rc; if (stubdomid) rc = libxl_console_exec(ctx, stubdomid, STUBDOM_CONSOLE_SERIAL, LIBXL_CONSOLE_TYPE_PV); else { - switch (libxl__domain_type(&gc, domid_vm)) { + switch (libxl__domain_type(gc, domid_vm)) { case LIBXL_DOMAIN_TYPE_HVM: rc = libxl_console_exec(ctx, domid_vm, 0, LIBXL_CONSOLE_TYPE_SERIAL); break; @@ -843,13 +843,13 @@ int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) abort(); } } - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *vnc_port; const char *vnc_listen = NULL, *vnc_pass = NULL; int port = 0, autopass_fd = -1; @@ -860,19 +860,19 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) NULL, }; - vnc_port = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_port = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-port", domid)); if ( vnc_port ) port = atoi(vnc_port) - 5900; - vnc_listen = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_listen = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-listen", domid)); if ( autopass ) - vnc_pass = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_pass = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-pass", domid)); if ( NULL == vnc_listen ) @@ -881,7 +881,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) if ( (vnc_bin = getenv("VNCVIEWER")) ) args[0] = vnc_bin; - args[1] = libxl__sprintf(&gc, "%s:%d", vnc_listen, port); + args[1] = libxl__sprintf(gc, "%s:%d", vnc_listen, port); if ( vnc_pass ) { char tmpname[] = "/tmp/vncautopass.XXXXXX"; @@ -916,7 +916,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) abort(); x_fail: - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -970,17 +970,17 @@ static int libxl__device_from_disk(libxl__gc *gc, uint32_t domid, int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; char *dev; libxl__device device; int major, minor, rc; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; front = flexarray_make(16, 1); @@ -1001,7 +1001,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis goto out_free; } - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Invalid or unsupported" " virtual disk identifier %s", disk->vdev); @@ -1014,7 +1014,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis do_backend_phy: libxl__device_physdisk_major_minor(dev, &major, &minor); flexarray_append(back, "physical-device"); - flexarray_append(back, libxl__sprintf(&gc, "%x:%x", major, minor)); + flexarray_append(back, libxl__sprintf(gc, "%x:%x", major, minor)); flexarray_append(back, "params"); flexarray_append(back, dev); @@ -1022,13 +1022,13 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis assert(device.backend_kind == LIBXL__DEVICE_KIND_VBD); break; case LIBXL_DISK_BACKEND_TAP: - dev = libxl__blktap_devpath(&gc, disk->pdev_path, disk->format); + dev = libxl__blktap_devpath(gc, disk->pdev_path, disk->format); if (!dev) { rc = ERROR_FAIL; goto out_free; } flexarray_append(back, "tapdisk-params"); - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", + flexarray_append(back, libxl__sprintf(gc, "%s:%s", libxl__device_disk_string_of_format(disk->format), disk->pdev_path)); @@ -1036,7 +1036,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis goto do_backend_phy; case LIBXL_DISK_BACKEND_QDISK: flexarray_append(back, "params"); - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", + flexarray_append(back, libxl__sprintf(gc, "%s:%s", libxl__device_disk_string_of_format(disk->format), disk->pdev_path)); assert(device.backend_kind == LIBXL__DEVICE_KIND_QDISK); break; @@ -1047,15 +1047,15 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis } flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "removable"); - flexarray_append(back, libxl__sprintf(&gc, "%d", (disk->removable) ? 1 : 0)); + flexarray_append(back, libxl__sprintf(gc, "%d", (disk->removable) ? 1 : 0)); flexarray_append(back, "bootable"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "dev"); flexarray_append(back, disk->vdev); flexarray_append(back, "type"); @@ -1066,17 +1066,17 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis flexarray_append(back, disk->is_cdrom ? "cdrom" : "disk"); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", disk->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", disk->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); flexarray_append(front, "virtual-device"); - flexarray_append(front, libxl__sprintf(&gc, "%d", device.devid)); + flexarray_append(front, libxl__sprintf(gc, "%d", device.devid)); flexarray_append(front, "device-type"); flexarray_append(front, disk->is_cdrom ? "cdrom" : "disk"); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; @@ -1084,39 +1084,39 @@ out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_disk_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_disk_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1168,27 +1168,27 @@ static void libxl__device_disk_from_xs_be(libxl__gc *gc, int libxl_devid_to_device_disk(libxl_ctx *ctx, uint32_t domid, int devid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *path; int rc = ERROR_FAIL; libxl_device_disk_init(ctx, disk); - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); if (!dompath) { goto out; } - path = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vbd/%d/backend", + path = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vbd/%d/backend", dompath, devid)); if (!path) goto out; - libxl__device_disk_from_xs_be(&gc, path, disk); + libxl__device_disk_from_xs_be(gc, path, disk); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1228,22 +1228,22 @@ static int libxl__append_disk_list_of_type(libxl__gc *gc, libxl_device_disk *libxl_device_disk_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_disk *disks = NULL; int rc; *num = 0; - rc = libxl__append_disk_list_of_type(&gc, domid, "vbd", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "vbd", &disks, num); if (rc) goto out_err; - rc = libxl__append_disk_list_of_type(&gc, domid, "tap", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "tap", &disks, num); if (rc) goto out_err; - rc = libxl__append_disk_list_of_type(&gc, domid, "qdisk", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "qdisk", &disks, num); if (rc) goto out_err; - libxl__free_all(&gc); + GC_FREE; return disks; out_err: @@ -1259,35 +1259,35 @@ out_err: int libxl_device_disk_getinfo(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk, libxl_diskinfo *diskinfo) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *diskpath; char *val; - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); diskinfo->devid = libxl__device_disk_dev_number(disk->vdev, NULL, NULL); /* tap devices entries in xenstore are written as vbd devices. */ - diskpath = libxl__sprintf(&gc, "%s/device/vbd/%d", dompath, diskinfo->devid); + diskpath = libxl__sprintf(gc, "%s/device/vbd/%d", dompath, diskinfo->devid); diskinfo->backend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/backend", diskpath), NULL); + libxl__sprintf(gc, "%s/backend", diskpath), NULL); if (!diskinfo->backend) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", diskpath)); diskinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", diskpath)); diskinfo->state = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", diskpath)); diskinfo->evtch = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/ring-ref", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/ring-ref", diskpath)); diskinfo->rref = val ? strtoul(val, NULL, 10) : -1; diskinfo->frontend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/frontend", diskinfo->backend), NULL); - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", diskinfo->backend)); + libxl__sprintf(gc, "%s/frontend", diskinfo->backend), NULL); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", diskinfo->backend)); diskinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -1331,12 +1331,12 @@ out: char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dev = NULL; char *ret = NULL; int rc; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; switch (disk->backend) { @@ -1355,7 +1355,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) dev = disk->pdev_path; break; case LIBXL_DISK_FORMAT_VHD: - dev = libxl__blktap_devpath(&gc, disk->pdev_path, + dev = libxl__blktap_devpath(gc, disk->pdev_path, disk->format); break; case LIBXL_DISK_FORMAT_QCOW: @@ -1386,7 +1386,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) out: if (dev != NULL) ret = strdup(dev); - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -1448,7 +1448,7 @@ static int libxl__device_from_nic(libxl__gc *gc, uint32_t domid, int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1467,59 +1467,59 @@ int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) } if (nic->devid == -1) { - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) { + if (!(dompath = libxl__xs_get_dompath(gc, domid))) { rc = ERROR_FAIL; goto out_free; } - if (!(l = libxl__xs_directory(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vif", dompath), &nb))) { + if (!(l = libxl__xs_directory(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vif", dompath), &nb))) { nic->devid = 0; } else { nic->devid = strtoul(l[nb - 1], NULL, 10) + 1; } } - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if ( rc != 0 ) goto out_free; flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); if (nic->script) { flexarray_append(back, "script"); flexarray_append(back, nic->script[0]=='/' ? nic->script - : libxl__sprintf(&gc, "%s/%s", + : libxl__sprintf(gc, "%s/%s", libxl_xen_script_dir_path(), nic->script)); } flexarray_append(back, "mac"); - flexarray_append(back,libxl__sprintf(&gc, + flexarray_append(back,libxl__sprintf(gc, LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); if (nic->ip) { flexarray_append(back, "ip"); - flexarray_append(back, libxl__strdup(&gc, nic->ip)); + flexarray_append(back, libxl__strdup(gc, nic->ip)); } flexarray_append(back, "bridge"); - flexarray_append(back, libxl__strdup(&gc, nic->bridge)); + flexarray_append(back, libxl__strdup(gc, nic->bridge)); flexarray_append(back, "handle"); - flexarray_append(back, libxl__sprintf(&gc, "%d", nic->devid)); + flexarray_append(back, libxl__sprintf(gc, "%d", nic->devid)); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", nic->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); flexarray_append(front, "handle"); - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->devid)); + flexarray_append(front, libxl__sprintf(gc, "%d", nic->devid)); flexarray_append(front, "mac"); - flexarray_append(front, libxl__sprintf(&gc, + flexarray_append(front, libxl__sprintf(gc, LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); /* FIXME: wait for plug */ rc = 0; @@ -1527,39 +1527,39 @@ out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_nic_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_nic_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1607,26 +1607,26 @@ static void libxl__device_nic_from_xs_be(libxl__gc *gc, int libxl_devid_to_device_nic(libxl_ctx *ctx, uint32_t domid, int devid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *path; int rc = ERROR_FAIL; memset(nic, 0, sizeof (libxl_device_nic)); - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); if (!dompath) goto out; - path = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vif/%d/backend", + path = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vif/%d/backend", dompath, devid)); if (!path) goto out; - libxl__device_nic_from_xs_be(&gc, path, nic); + libxl__device_nic_from_xs_be(gc, path, nic); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1665,16 +1665,16 @@ static int libxl__append_nic_list_of_type(libxl__gc *gc, libxl_device_nic *libxl_device_nic_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_nic *nics = NULL; int rc; *num = 0; - rc = libxl__append_nic_list_of_type(&gc, domid, "vif", &nics, num); + rc = libxl__append_nic_list_of_type(gc, domid, "vif", &nics, num); if (rc) goto out_err; - libxl__free_all(&gc); + GC_FREE; return nics; out_err: @@ -1690,36 +1690,36 @@ out_err: int libxl_device_nic_getinfo(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic, libxl_nicinfo *nicinfo) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *nicpath; char *val; - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); nicinfo->devid = nic->devid; - nicpath = libxl__sprintf(&gc, "%s/device/vif/%d", dompath, nicinfo->devid); + nicpath = libxl__sprintf(gc, "%s/device/vif/%d", dompath, nicinfo->devid); nicinfo->backend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/backend", nicpath), NULL); + libxl__sprintf(gc, "%s/backend", nicpath), NULL); if (!nicinfo->backend) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", nicpath)); nicinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", nicpath)); nicinfo->state = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", nicpath)); nicinfo->evtch = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/tx-ring-ref", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/tx-ring-ref", nicpath)); nicinfo->rref_tx = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/rx-ring-ref", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/rx-ring-ref", nicpath)); nicinfo->rref_rx = val ? strtoul(val, NULL, 10) : -1; nicinfo->frontend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/frontend", nicinfo->backend), NULL); - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", nicinfo->backend)); + libxl__sprintf(gc, "%s/frontend", nicinfo->backend), NULL); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", nicinfo->backend)); nicinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -1825,7 +1825,7 @@ static int libxl__device_from_vkb(libxl__gc *gc, uint32_t domid, int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1842,64 +1842,64 @@ int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) goto out_free; } - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out_free; flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "domain"); - flexarray_append(back, libxl__domid_to_name(&gc, domid)); + flexarray_append(back, libxl__domid_to_name(gc, domid)); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", vkb->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", vkb->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vkb_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vkb_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1935,7 +1935,7 @@ static int libxl__device_from_vfb(libxl__gc *gc, uint32_t domid, int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1952,20 +1952,20 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) goto out_free; } - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out_free; - flexarray_append_pair(back, "frontend-id", libxl__sprintf(&gc, "%d", domid)); + flexarray_append_pair(back, "frontend-id", libxl__sprintf(gc, "%d", domid)); flexarray_append_pair(back, "online", "1"); - flexarray_append_pair(back, "state", libxl__sprintf(&gc, "%d", 1)); - flexarray_append_pair(back, "domain", libxl__domid_to_name(&gc, domid)); - flexarray_append_pair(back, "vnc", libxl__sprintf(&gc, "%d", vfb->vnc)); + flexarray_append_pair(back, "state", libxl__sprintf(gc, "%d", 1)); + flexarray_append_pair(back, "domain", libxl__domid_to_name(gc, domid)); + flexarray_append_pair(back, "vnc", libxl__sprintf(gc, "%d", vfb->vnc)); flexarray_append_pair(back, "vnclisten", vfb->vnclisten); flexarray_append_pair(back, "vncpasswd", vfb->vncpasswd); - flexarray_append_pair(back, "vncdisplay", libxl__sprintf(&gc, "%d", vfb->vncdisplay)); - flexarray_append_pair(back, "vncunused", libxl__sprintf(&gc, "%d", vfb->vncunused)); - flexarray_append_pair(back, "sdl", libxl__sprintf(&gc, "%d", vfb->sdl)); - flexarray_append_pair(back, "opengl", libxl__sprintf(&gc, "%d", vfb->opengl)); + flexarray_append_pair(back, "vncdisplay", libxl__sprintf(gc, "%d", vfb->vncdisplay)); + flexarray_append_pair(back, "vncunused", libxl__sprintf(gc, "%d", vfb->vncunused)); + flexarray_append_pair(back, "sdl", libxl__sprintf(gc, "%d", vfb->sdl)); + flexarray_append_pair(back, "opengl", libxl__sprintf(gc, "%d", vfb->opengl)); if (vfb->xauthority) { flexarray_append_pair(back, "xauthority", vfb->xauthority); } @@ -1973,50 +1973,50 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) flexarray_append_pair(back, "display", vfb->display); } - flexarray_append_pair(front, "backend-id", libxl__sprintf(&gc, "%d", vfb->backend_domid)); - flexarray_append_pair(front, "state", libxl__sprintf(&gc, "%d", 1)); + flexarray_append_pair(front, "backend-id", libxl__sprintf(gc, "%d", vfb->backend_domid)); + flexarray_append_pair(front, "state", libxl__sprintf(gc, "%d", 1)); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; out_free: flexarray_free(front); flexarray_free(back); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vfb_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vfb_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2024,13 +2024,13 @@ out: int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *mem, *endptr; uint32_t memorykb; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); int rc = 1; - mem = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/memory/target", dompath)); + mem = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!mem) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot get memory info from %s/memory/target\n", dompath); goto out; @@ -2055,7 +2055,7 @@ int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2163,12 +2163,12 @@ retry: int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, int32_t target_memkb, int relative, int enforce) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 1, abort = 0; uint32_t memorykb = 0, videoram = 0; uint32_t current_target_memkb = 0, new_target_memkb = 0; char *memmax, *endptr, *videoram_s = NULL, *target = NULL; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); xc_domaininfo_t info; libxl_dominfo ptr; char *uuid; @@ -2177,11 +2177,11 @@ int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, retry_transaction: t = xs_transaction_start(ctx->xsh); - target = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + target = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!target && !domid) { xs_transaction_end(ctx->xsh, t, 1); - rc = libxl__fill_dom0_memory_info(&gc, ¤t_target_memkb); + rc = libxl__fill_dom0_memory_info(gc, ¤t_target_memkb); if (rc < 0) { abort = 1; goto out; @@ -2203,7 +2203,7 @@ retry_transaction: goto out; } } - memmax = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + memmax = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/static-max", dompath)); if (!memmax) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, @@ -2243,7 +2243,7 @@ retry_transaction: abort = 1; goto out; } - videoram_s = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + videoram_s = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/videoram", dompath)); videoram = videoram_s ? atoi(videoram_s) : 0; @@ -2272,7 +2272,7 @@ retry_transaction: goto out; } - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/memory/target", + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/memory/target", dompath), "%"PRIu32, new_target_memkb); rc = xc_domain_getinfolist(ctx->xch, domid, 1, &info); if (rc != 1 || info.domain != domid) { @@ -2280,8 +2280,8 @@ retry_transaction: goto out; } xcinfo2xlinfo(&info, &ptr); - uuid = libxl__uuid2string(&gc, ptr.uuid); - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "/vm/%s/memory", uuid), + uuid = libxl__uuid2string(gc, ptr.uuid); + libxl__xs_write(gc, t, libxl__sprintf(gc, "/vm/%s/memory", uuid), "%"PRIu32, new_target_memkb / 1024); out: @@ -2289,22 +2289,22 @@ out: if (errno == EAGAIN) goto retry_transaction; - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 1; char *target = NULL, *endptr = NULL; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); uint32_t target_memkb; - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!target && !domid) { - rc = libxl__fill_dom0_memory_info(&gc, &target_memkb); + rc = libxl__fill_dom0_memory_info(gc, &target_memkb); if (rc < 0) goto out; } else if (!target) { @@ -2325,14 +2325,14 @@ int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, libxl_device_model_info *dm_info, uint32_t *need_memkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = ERROR_INVAL; *need_memkb = b_info->target_memkb; switch (b_info->type) { @@ -2351,7 +2351,7 @@ int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, *need_memkb += (2 * 1024) - (*need_memkb % (2 * 1024)); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2361,12 +2361,12 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) int rc = 0; libxl_physinfo info; uint32_t freemem_slack; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); rc = libxl_get_physinfo(ctx, &info); if (rc < 0) goto out; - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); + rc = libxl__get_free_memory_slack(gc, &freemem_slack); if (rc < 0) goto out; @@ -2376,7 +2376,7 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) *memkb = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2386,9 +2386,9 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t int rc = 0; libxl_physinfo info; uint32_t freemem_slack; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); + rc = libxl__get_free_memory_slack(gc, &freemem_slack); if (rc < 0) goto out; while (wait_secs > 0) { @@ -2405,7 +2405,7 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t rc = ERROR_NOMEM; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2631,7 +2631,7 @@ int libxl_set_vcpuaffinity(libxl_ctx *ctx, uint32_t domid, uint32_t vcpuid, int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_dominfo info; char *dompath; xs_transaction_t t; @@ -2641,14 +2641,14 @@ int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting domain info list"); goto out; } - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) + if (!(dompath = libxl__xs_get_dompath(gc, domid))) goto out; retry_transaction: t = xs_transaction_start(ctx->xsh); for (i = 0; i <= info.vcpu_max_id; i++) - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "%s/cpu/%u/availability", dompath, i), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "%s/cpu/%u/availability", dompath, i), "%s", libxl_cpumap_test(cpumap, i) ? "online" : "offline"); if (!xs_transaction_end(ctx->xsh, t, 0)) { if (errno == EAGAIN) @@ -2656,7 +2656,7 @@ retry_transaction: } else rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2776,12 +2776,12 @@ int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, char *trigger_name, uint3 int libxl_send_sysrq(libxl_ctx *ctx, uint32_t domid, char sysrq) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *dompath = libxl__xs_get_dompath(&gc, domid); + GC_INIT(ctx); + char *dompath = libxl__xs_get_dompath(gc, domid); - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/control/sysrq", dompath), "%c", sysrq); + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "%s/control/sysrq", dompath), "%c", sysrq); - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -2868,15 +2868,15 @@ void libxl_xen_console_read_finish(libxl_ctx *ctx, uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *dompath = libxl__xs_get_dompath(&gc, domid); + GC_INIT(ctx); + char *dompath = libxl__xs_get_dompath(gc, domid); char *vm_path, *start_time; uint32_t ret; vm_path = libxl__xs_read( - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dompath)); + gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dompath)); start_time = libxl__xs_read( - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/start_time", vm_path)); + gc, XBT_NULL, libxl__sprintf(gc, "%s/start_time", vm_path)); if (start_time == NULL) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, -1, "Can't get start time of domain '%d'", domid); @@ -2884,7 +2884,7 @@ uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) }else{ ret = strtoul(start_time, NULL, 10); } - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -3037,15 +3037,15 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, libxl_cpumap cpumap, libxl_uuid *uuid, uint32_t *poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; int i; xs_transaction_t t; char *uuid_string; - uuid_string = libxl__uuid2string(&gc, *uuid); + uuid_string = libxl__uuid2string(gc, *uuid); if (!uuid_string) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3053,7 +3053,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, if (rc) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Could not create cpupool"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -3064,7 +3064,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Error moving cpu to cpupool"); libxl_cpupool_destroy(ctx, *poolid); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } } @@ -3072,16 +3072,16 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, for (;;) { t = xs_transaction_start(ctx->xsh); - xs_mkdir(ctx->xsh, t, libxl__sprintf(&gc, "/local/pool/%d", *poolid)); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/uuid", *poolid), + xs_mkdir(ctx->xsh, t, libxl__sprintf(gc, "/local/pool/%d", *poolid)); + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/uuid", *poolid), "%s", uuid_string); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/name", *poolid), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/name", *poolid), "%s", name); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) { - libxl__free_all(&gc); + GC_FREE; return 0; } } @@ -3089,7 +3089,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc, i; xc_cpupoolinfo_t *info; xs_transaction_t t; @@ -3097,7 +3097,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) info = xc_cpupool_getinfo(ctx->xch, poolid); if (info == NULL) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3131,7 +3131,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) for (;;) { t = xs_transaction_start(ctx->xsh); - xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "/local/pool/%d", poolid)); + xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "/local/pool/%d", poolid)); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) break; @@ -3143,21 +3143,21 @@ out1: libxl_cpumap_dispose(&cpumap); out: xc_cpupool_infofree(ctx->xch, info); - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); xs_transaction_t t; xc_cpupoolinfo_t *info; int rc; info = xc_cpupool_getinfo(ctx->xch, poolid); if (info == NULL) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3170,8 +3170,8 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) for (;;) { t = xs_transaction_start(ctx->xsh); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/name", poolid), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/name", poolid), "%s", name); if (xs_transaction_end(ctx->xsh, t, 0)) @@ -3186,7 +3186,7 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) out: xc_cpupool_infofree(ctx->xch, info); - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -3293,16 +3293,16 @@ out: int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; char *dom_path; char *vm_path; char *poolname; xs_transaction_t t; - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -3310,26 +3310,26 @@ int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) if (rc) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Error moving domain to cpupool"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } for (;;) { t = xs_transaction_start(ctx->xsh); - poolname = libxl__cpupoolid_to_name(&gc, poolid); - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); + poolname = libxl__cpupoolid_to_name(gc, poolid); + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); if (!vm_path) break; - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/pool_name", vm_path), + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/pool_name", vm_path), "%s", poolname); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) break; } - libxl__free_all(&gc); + GC_FREE; return 0; } diff --git a/tools/libxl/libxl_bootloader.c b/tools/libxl/libxl_bootloader.c index b8399a1..ce83b8e 100644 --- a/tools/libxl/libxl_bootloader.c +++ b/tools/libxl/libxl_bootloader.c @@ -328,7 +328,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, libxl_device_disk *disk, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int ret, rc = 0; char *fifo = NULL; char *diskpath = NULL; @@ -388,7 +388,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - args = make_bootloader_args(&gc, info, domid, fifo, diskpath); + args = make_bootloader_args(gc, info, domid, fifo, diskpath); if (args == NULL) { rc = ERROR_NOMEM; goto out_close; @@ -411,8 +411,8 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - dom_console_xs_path = libxl__sprintf(&gc, "%s/console/tty", libxl__xs_get_dompath(&gc, domid)); - libxl__xs_write(&gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); + dom_console_xs_path = libxl__sprintf(gc, "%s/console/tty", libxl__xs_get_dompath(gc, domid)); + libxl__xs_write(gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); pid = fork_exec_bootloader(&bootloader_fd, info->u.pv.bootloader, args); if (pid < 0) { @@ -435,7 +435,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, fcntl(fifo_fd, F_SETFL, O_NDELAY); - blout = bootloader_interact(&gc, xenconsoled_fd, bootloader_fd, fifo_fd); + blout = bootloader_interact(gc, xenconsoled_fd, bootloader_fd, fifo_fd); if (blout == NULL) { goto out_close; } @@ -445,7 +445,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - parse_bootloader_result(&gc, info, blout); + parse_bootloader_result(gc, info, blout); rc = 0; out_close: @@ -472,7 +472,7 @@ out_close: free(args); out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c index ccb56c7..69f10fe 100644 --- a/tools/libxl/libxl_create.c +++ b/tools/libxl/libxl_create.c @@ -670,20 +670,20 @@ error_out: int libxl_domain_create_new(libxl_ctx *ctx, libxl_domain_config *d_config, libxl_console_ready cb, void *priv, uint32_t *domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = do_domain_create(&gc, d_config, cb, priv, domid, -1); - libxl__free_all(&gc); + rc = do_domain_create(gc, d_config, cb, priv, domid, -1); + GC_FREE; return rc; } int libxl_domain_create_restore(libxl_ctx *ctx, libxl_domain_config *d_config, libxl_console_ready cb, void *priv, uint32_t *domid, int restore_fd) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = do_domain_create(&gc, d_config, cb, priv, domid, restore_fd); - libxl__free_all(&gc); + rc = do_domain_create(gc, d_config, cb, priv, domid, restore_fd); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index 96098de..b1ff967 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -730,7 +730,7 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, const char *userdata_userid, const uint8_t *data, int datalen) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *filename; const char *newfilename; int e, rc; @@ -738,18 +738,18 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, FILE *f = NULL; size_t rs; - filename = userdata_path(&gc, domid, userdata_userid, "d"); + filename = userdata_path(gc, domid, userdata_userid, "d"); if (!filename) { rc = ERROR_NOMEM; goto out; } if (!datalen) { - rc = userdata_delete(&gc, filename); + rc = userdata_delete(gc, filename); goto out; } - newfilename = userdata_path(&gc, domid, userdata_userid, "n"); + newfilename = userdata_path(gc, domid, userdata_userid, "n"); if (!newfilename) { rc = ERROR_NOMEM; goto out; @@ -791,7 +791,7 @@ err: LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot write %s for %s", newfilename, filename); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -799,13 +799,13 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, const char *userdata_userid, uint8_t **data_r, int *datalen_r) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *filename; int e, rc; int datalen = 0; void *data = 0; - filename = userdata_path(&gc, domid, userdata_userid, "d"); + filename = userdata_path(gc, domid, userdata_userid, "d"); if (!filename) { rc = ERROR_NOMEM; goto out; @@ -827,7 +827,7 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, if (datalen_r) *datalen_r = datalen; rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_pci.c b/tools/libxl/libxl_pci.c index 63c3050..120c239 100644 --- a/tools/libxl/libxl_pci.c +++ b/tools/libxl/libxl_pci.c @@ -483,7 +483,7 @@ static int is_assigned(libxl_device_pci *assigned, int num_assigned, libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_pci *pcidevs = NULL, *new, *assigned; struct dirent *de; DIR *dir; @@ -491,7 +491,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) *num = 0; - rc = get_all_assigned_devices(&gc, &assigned, &num_assigned); + rc = get_all_assigned_devices(gc, &assigned, &num_assigned); if ( rc ) goto out; @@ -528,7 +528,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) out_closedir: closedir(dir); out: - libxl__free_all(&gc); + GC_FREE; return pcidevs; } @@ -782,10 +782,10 @@ static int libxl__device_pci_reset(libxl__gc *gc, unsigned int domain, unsigned int libxl_device_pci_add(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_add(&gc, domid, pcidev, 0); - libxl__free_all(&gc); + rc = libxl__device_pci_add(gc, domid, pcidev, 0); + GC_FREE; return rc; } @@ -1057,24 +1057,24 @@ out: int libxl_device_pci_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 0); + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 0); - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_pci_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 1); + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 1); - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1115,15 +1115,15 @@ static void libxl__device_pci_from_xs_be(libxl__gc *gc, libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *be_path, *num_devs; int n, i; libxl_device_pci *pcidevs = NULL; *num = 0; - be_path = libxl__sprintf(&gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(&gc, 0), domid); - num_devs = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/num_devs", be_path)); + be_path = libxl__sprintf(gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(gc, 0), domid); + num_devs = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/num_devs", be_path)); if (!num_devs) goto out; @@ -1131,11 +1131,11 @@ libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num pcidevs = calloc(n, sizeof(libxl_device_pci)); for (i = 0; i < n; i++) - libxl__device_pci_from_xs_be(&gc, be_path, pcidevs + i, i); + libxl__device_pci_from_xs_be(gc, be_path, pcidevs + i, i); *num = n; out: - libxl__free_all(&gc); + GC_FREE; return pcidevs; } diff --git a/tools/libxl/libxl_qmp.c b/tools/libxl/libxl_qmp.c index c7696d7..60af98c 100644 --- a/tools/libxl/libxl_qmp.c +++ b/tools/libxl/libxl_qmp.c @@ -94,7 +94,7 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, const char *chardev, int port) { - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); char *path = NULL; int ret = 0; @@ -102,12 +102,12 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, return 0; } - path = libxl__xs_get_dompath(&gc, qmp->domid); - path = libxl__sprintf(&gc, "%s/serial/%d/tty", path, port); + path = libxl__xs_get_dompath(gc, qmp->domid); + path = libxl__sprintf(gc, "%s/serial/%d/tty", path, port); - ret = libxl__xs_write(&gc, XBT_NULL, path, "%s", chardev + 4); + ret = libxl__xs_write(gc, XBT_NULL, path, "%s", chardev + 4); - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -521,7 +521,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, { int id = 0; int ret = 0; - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); qmp_request_context context = { .rc = 0 }; id = qmp_send(qmp, cmd, args, callback, opaque, &context); @@ -531,7 +531,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, qmp->wait_for_id = id; while (qmp->wait_for_id == id) { - if ((ret = qmp_next(&gc, qmp)) < 0) { + if ((ret = qmp_next(gc, qmp)) < 0) { break; } } @@ -540,7 +540,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, ret = context.rc; } - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -559,15 +559,15 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) int ret = 0; libxl__qmp_handler *qmp = NULL; char *qmp_socket; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); qmp = qmp_init_handler(ctx, domid); - qmp_socket = libxl__sprintf(&gc, "%s/qmp-libxl-%d", + qmp_socket = libxl__sprintf(gc, "%s/qmp-libxl-%d", libxl_run_dir_path(), domid); if ((ret = qmp_open(qmp, qmp_socket, QMP_SOCKET_CONNECT_TIMEOUT)) < 0) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "Connection error"); - libxl__free_all(&gc); + GC_FREE; qmp_free_handler(qmp); return NULL; } @@ -576,12 +576,12 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) /* Wait for the response to qmp_capabilities */ while (!qmp->connected) { - if ((ret = qmp_next(&gc, qmp)) < 0) { + if ((ret = qmp_next(gc, qmp)) < 0) { break; } } - libxl__free_all(&gc); + GC_FREE; if (!qmp->connected) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Failed to connect to QMP"); libxl__qmp_close(qmp); @@ -626,9 +626,9 @@ static int pci_add_callback(libxl__qmp_handler *qmp, { libxl_device_pci *pcidev = opaque; const libxl__json_object *bus = NULL; - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); int i, j, rc = -1; - char *asked_id = libxl__sprintf(&gc, PCI_PT_QDEV_ID, + char *asked_id = libxl__sprintf(gc, PCI_PT_QDEV_ID, pcidev->bus, pcidev->dev, pcidev->func); for (i = 0; (bus = libxl__json_array_get(response, i)); i++) { @@ -665,7 +665,7 @@ static int pci_add_callback(libxl__qmp_handler *qmp, out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_utils.c b/tools/libxl/libxl_utils.c index f1f2a6d..d36c737 100644 --- a/tools/libxl/libxl_utils.c +++ b/tools/libxl/libxl_utils.c @@ -186,29 +186,29 @@ char *libxl_schedid_to_name(libxl_ctx *ctx, int schedid) int libxl_get_stubdom_id(libxl_ctx *ctx, int guest_domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char * stubdom_id_s; int ret; - stubdom_id_s = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/image/device-model-domid", - libxl__xs_get_dompath(&gc, guest_domid))); + stubdom_id_s = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/image/device-model-domid", + libxl__xs_get_dompath(gc, guest_domid))); if (stubdom_id_s) ret = atoi(stubdom_id_s); else ret = 0; - libxl__free_all(&gc); + GC_FREE; return ret; } int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *target, *endptr; uint32_t value; int ret = 0; - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/target", libxl__xs_get_dompath(&gc, domid))); + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/target", libxl__xs_get_dompath(gc, domid))); if (!target) goto out; value = strtol(target, &endptr, 10); @@ -218,7 +218,7 @@ int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) *target_domid = value; ret = 1; out: - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -240,27 +240,27 @@ static int logrename(libxl__gc *gc, const char *old, const char *new) int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); struct stat stat_buf; char *logfile, *logfile_new; int i, rc; - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); if (stat(logfile, &stat_buf) == 0) { /* file exists, rotate */ - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.10", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.10", name); unlink(logfile); for (i = 9; i > 0; i--) { - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i); - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i + 1); - rc = logrename(&gc, logfile, logfile_new); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i); + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i + 1); + rc = logrename(gc, logfile, logfile_new); if (rc) goto out; } - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.1", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.1", name); - rc = logrename(&gc, logfile, logfile_new); + rc = logrename(gc, logfile, logfile_new); if (rc) goto out; } else { @@ -272,7 +272,7 @@ int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) *full_name = strdup(logfile); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } -- 1.7.2.5 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Mon Dec 05 23:02:00 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 05 Dec 2011 23:02:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXhXN-0004At-44; Mon, 05 Dec 2011 23:01:29 +0000 Received: from mail174.messagelabs.com ([85.158.138.51]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXhXK-0004Am-VB for xen-devel@lists.xensource.com; Mon, 05 Dec 2011 23:01:27 +0000 X-Env-Sender: darnok@68k.org X-Msg-Ref: server-12.tower-174.messagelabs.com!1323126034!4319077!1 X-Originating-IP: [206.212.254.10] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 12981 invoked from network); 5 Dec 2011 23:00:36 -0000 Received: from andromeda.dapyr.net (HELO andromeda.dapyr.net) (206.212.254.10) by server-12.tower-174.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 5 Dec 2011 23:00:36 -0000 Received: from andromeda.dapyr.net (darnok@localhost [127.0.0.1]) by andromeda.dapyr.net (8.13.4/8.13.4/Debian-3sarge3) with ESMTP id pB5N0Ku8015829 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 5 Dec 2011 18:00:20 -0500 Received: (from darnok@localhost) by andromeda.dapyr.net (8.13.4/8.13.4/Submit) id pB5N0K88015827; Mon, 5 Dec 2011 18:00:20 -0500 Date: Mon, 5 Dec 2011 19:00:20 -0400 From: Konrad Rzeszutek Wilk To: Anthony PERARD Message-ID: <20111205230019.GA9560@andromeda.dapyr.net> References: <1322156679-9441-1-git-send-email-anthony.perard@citrix.com> <1322156679-9441-9-git-send-email-anthony.perard@citrix.com> Mime-Version: 1.0 Content-Disposition: inline In-Reply-To: <1322156679-9441-9-git-send-email-anthony.perard@citrix.com> User-Agent: Mutt/1.5.9i Cc: Guy Zana , Xen Devel , Allen Kay , QEMU-devel , Stefano Stabellini Subject: Re: [Xen-devel] [PATCH V5 08/10] Introduce Xen PCI Passthrough, PCI config space helpers (2/3) X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com On Thu, Nov 24, 2011 at 05:44:37PM +0000, Anthony PERARD wrote: > From: Allen Kay > > A more complete history can be found here: > git://xenbits.xensource.com/qemu-xen-unstable.git > > Signed-off-by: Allen Kay > Signed-off-by: Guy Zana > Signed-off-by: Anthony PERARD > --- > hw/xen_pci_passthrough.c | 15 + > hw/xen_pci_passthrough_config_init.c | 2131 ++++++++++++++++++++++++++++++++++ > 2 files changed, 2146 insertions(+), 0 deletions(-) > > diff --git a/hw/xen_pci_passthrough.c b/hw/xen_pci_passthrough.c > index 998470b..c816ed5 100644 > --- a/hw/xen_pci_passthrough.c > +++ b/hw/xen_pci_passthrough.c > @@ -360,6 +360,11 @@ out: > PT_ERR(d, "pci_write_block failed. return value: %d.\n", rc); > } > } > + > + if (s->pm_state != NULL && s->pm_state->flags & PT_FLAG_TRANSITING) { > + qemu_mod_timer(s->pm_state->pm_timer, > + qemu_get_clock_ms(rt_clock) + s->pm_state->pm_delay); > + } Is this in the right place? There is code before in this function that does: if (s->pm_state != NULL && s->pm_state->flags & PT_FLAG_TRANSITING) return; so we would never get here, I think? > } > > /* ioport/iomem space*/ > @@ -706,6 +711,13 @@ static int pt_initfn(PCIDevice *pcidev) > /* Handle real device's MMIO/PIO BARs */ > pt_register_regions(s); > > + /* reinitialize each config register to be emulated */ > + if (pt_config_init(s)) { > + PT_ERR(pcidev, "PCI Config space initialisation failed.\n"); > + host_pci_device_put(s->real_device); > + return -1; > + } > + > /* Bind interrupt */ > if (!s->dev.config[PCI_INTERRUPT_PIN]) { > PT_LOG(pcidev, "no pin interrupt\n"); > @@ -798,6 +810,9 @@ static int pt_unregister_device(PCIDevice *pcidev) > } > } > > + /* delete all emulated config registers */ > + pt_config_delete(s); > + > /* unregister real device's MMIO/PIO BARs */ > pt_unregister_regions(s); > > diff --git a/hw/xen_pci_passthrough_config_init.c b/hw/xen_pci_passthrough_config_init.c > index 1e9de64..ae64544 100644 > --- a/hw/xen_pci_passthrough_config_init.c > +++ b/hw/xen_pci_passthrough_config_init.c > @@ -1,11 +1,2142 @@ > +/* > + * Copyright (c) 2007, Neocleus Corporation. > + * Copyright (c) 2007, Intel Corporation. > + * > + * This work is licensed under the terms of the GNU GPL, version 2. See > + * the COPYING file in the top-level directory. > + * > + * Alex Novik > + * Allen Kay > + * Guy Zana > + * > + * This file implements direct PCI assignment to a HVM guest > + */ > + > +#include "qemu-timer.h" > +#include "xen_backend.h" > #include "xen_pci_passthrough.h" > > +#define PT_MERGE_VALUE(value, data, val_mask) \ > + (((value) & (val_mask)) | ((data) & ~(val_mask))) > + > +#define PT_INVALID_REG 0xFFFFFFFF /* invalid register value */ > + > +/* prototype */ > + > +static int pt_ptr_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, > + uint32_t real_offset, uint32_t *data); > +static int pt_init_pci_config(XenPCIPassthroughState *s); > + > + > +/* helper */ > + > +/* A return value of 1 means the capability should NOT be exposed to guest. */ > +static int pt_hide_dev_cap(const HostPCIDevice *d, uint8_t grp_id) > +{ > + switch (grp_id) { > + case PCI_CAP_ID_EXP: > + /* The PCI Express Capability Structure of the VF of Intel 82599 10GbE > + * Controller looks trivial, e.g., the PCI Express Capabilities > + * Register is 0. We should not try to expose it to guest. > + * > + * The datasheet is available at > + * http://download.intel.com/design/network/datashts/82599_datasheet.pdf > + * > + * See 'Table 9.7. VF PCIe Configuration Space' of the datasheet, the > + * PCI Express Capability Structure of the VF of Intel 82599 10GbE > + * Controller looks trivial, e.g., the PCI Express Capabilities > + * Register is 0, so the Capability Version is 0 and > + * pt_pcie_size_init() would fail. > + */ > + if (d->vendor_id == PCI_VENDOR_ID_INTEL && > + d->device_id == PCI_DEVICE_ID_INTEL_82599_VF) { > + return 1; > + } > + break; > + } > + return 0; > +} > + > +/* find emulate register group entry */ > XenPTRegGroup *pt_find_reg_grp(XenPCIPassthroughState *s, uint32_t address) > { > + XenPTRegGroup *entry = NULL; > + > + /* find register group entry */ > + QLIST_FOREACH(entry, &s->reg_grp_tbl, entries) { > + /* check address */ > + if ((entry->base_offset <= address) > + && ((entry->base_offset + entry->size) > address)) { > + return entry; > + } > + } > + > + /* group entry not found */ > return NULL; > } > > +/* find emulate register entry */ > XenPTReg *pt_find_reg(XenPTRegGroup *reg_grp, uint32_t address) > { > + XenPTReg *reg_entry = NULL; > + XenPTRegInfo *reg = NULL; > + uint32_t real_offset = 0; > + > + /* find register entry */ > + QLIST_FOREACH(reg_entry, ®_grp->reg_tbl_list, entries) { > + reg = reg_entry->reg; > + real_offset = reg_grp->base_offset + reg->offset; > + /* check address */ > + if ((real_offset <= address) > + && ((real_offset + reg->size) > address)) { > + return reg_entry; > + } > + } > + > return NULL; > } > + > +/* parse BAR */ > +static PTBarFlag pt_bar_reg_parse(XenPCIPassthroughState *s, XenPTRegInfo *reg) > +{ > + PCIDevice *d = &s->dev; > + XenPTRegion *region = NULL; > + PCIIORegion *r; > + int index = 0; > + > + /* check 64bit BAR */ > + index = pt_bar_offset_to_index(reg->offset); > + if ((0 < index) && (index < PCI_ROM_SLOT)) { > + int flags = s->real_device->io_regions[index - 1].flags; Can you put a comment explaining why you need to shift it? I presume its b/c the ROM slot is its own variable, but it would useful to have that explicitly stated. > + > + if ((flags & IORESOURCE_MEM) && (flags & IORESOURCE_MEM_64)) { You could collapse these two I think? (flags & (IORESOURCE_MEM | IORESOURCE_MEM_64)) > + region = &s->bases[index - 1]; > + if (region->bar_flag != PT_BAR_FLAG_UPPER) { > + return PT_BAR_FLAG_UPPER; > + } > + } > + } > + > + /* check unused BAR */ > + r = &d->io_regions[index]; > + if (r->size == 0) { > + return PT_BAR_FLAG_UNUSED; > + } > + > + /* for ExpROM BAR */ > + if (index == PCI_ROM_SLOT) { > + return PT_BAR_FLAG_MEM; > + } > + > + /* check BAR I/O indicator */ > + if (s->real_device->io_regions[index].flags & IORESOURCE_IO) { > + return PT_BAR_FLAG_IO; > + } else { > + return PT_BAR_FLAG_MEM; > + } > +} > + > + > +/**************** > + * general register functions > + */ > + > +/* register initialization function */ > + > +static int pt_common_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + *data = reg->init_val; > + return 0; > +} > + > +/* Read register functions */ > + > +static int pt_byte_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint8_t *value, uint8_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint8_t valid_emu_mask = 0; > + > + /* emulate byte register */ > + valid_emu_mask = reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > +static int pt_word_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint16_t valid_emu_mask = 0; > + > + /* emulate word register */ > + valid_emu_mask = reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > +static int pt_long_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t *value, uint32_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint32_t valid_emu_mask = 0; > + > + /* emulate long register */ > + valid_emu_mask = reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > + > +/* Write register functions */ > + > +static int pt_byte_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint8_t *value, uint8_t dev_value, > + uint8_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint8_t writable_mask = 0; > + uint8_t throughable_mask = 0; > + > + /* modify emulate register */ > + writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + return 0; > +} > +static int pt_word_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t dev_value, > + uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint16_t writable_mask = 0; > + uint16_t throughable_mask = 0; > + > + /* modify emulate register */ > + writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + return 0; > +} > +static int pt_long_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t *value, uint32_t dev_value, > + uint32_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint32_t writable_mask = 0; > + uint32_t throughable_mask = 0; > + > + /* modify emulate register */ > + writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~reg->emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + return 0; > +} > + > +/* common restore register fonctions */ > +static int pt_byte_reg_restore(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t real_offset, uint8_t dev_value, > + uint8_t *value) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + PCIDevice *d = &s->dev; > + > + /* use I/O device register's value as restore value */ > + *value = pci_get_byte(d->config + real_offset); > + > + /* create value for restoring to I/O device register */ > + *value = PT_MERGE_VALUE(*value, dev_value, reg->emu_mask); > + > + return 0; > +} > +static int pt_word_reg_restore(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t real_offset, uint16_t dev_value, > + uint16_t *value) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + PCIDevice *d = &s->dev; > + > + /* use I/O device register's value as restore value */ > + *value = pci_get_word(d->config + real_offset); > + > + /* create value for restoring to I/O device register */ > + *value = PT_MERGE_VALUE(*value, dev_value, reg->emu_mask); > + > + return 0; > +} > + > + > +/* XenPTRegInfo declaration > + * - only for emulated register (either a part or whole bit). > + * - for passthrough register that need special behavior (like interacting with > + * other component), set emu_mask to all 0 and specify r/w func properly. > + * - do NOT use ALL F for init_val, otherwise the tbl will not be registered. > + */ > + > +/******************** > + * Header Type0 > + */ > + > +static int pt_vendor_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + *data = s->real_device->vendor_id; > + return 0; > +} > +static int pt_device_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + *data = s->real_device->device_id; > + return 0; > +} > +static int pt_status_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + XenPTRegGroup *reg_grp_entry = NULL; > + XenPTReg *reg_entry = NULL; > + uint32_t reg_field = 0; > + > + /* find Header register group */ > + reg_grp_entry = pt_find_reg_grp(s, PCI_CAPABILITY_LIST); > + if (reg_grp_entry) { > + /* find Capabilities Pointer register */ > + reg_entry = pt_find_reg(reg_grp_entry, PCI_CAPABILITY_LIST); > + if (reg_entry) { > + /* check Capabilities Pointer register */ > + if (reg_entry->data) { > + reg_field |= PCI_STATUS_CAP_LIST; > + } else { > + reg_field &= ~PCI_STATUS_CAP_LIST; > + } > + } else { > + xen_shutdown_fatal_error("Internal error: Couldn't find XenPTReg*" > + " for Capabilities Pointer register." > + " (%s)\n", __func__); > + return -1; > + } > + } else { > + xen_shutdown_fatal_error("Internal error: Couldn't find XenPTRegGroup" > + " for Header. (%s)\n", __func__); > + return -1; > + } > + > + *data = reg_field; > + return 0; > +} > +static int pt_header_type_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + /* read PCI_HEADER_TYPE */ > + *data = reg->init_val | 0x80; > + return 0; > +} > + > +/* initialize Interrupt Pin register */ > +static int pt_irqpin_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + *data = pci_read_intx(s); > + return 0; > +} > + > +/* Command register */ > +static int pt_cmd_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint16_t valid_emu_mask = 0; > + uint16_t emu_mask = reg->emu_mask; > + > + if (s->is_virtfn) { > + emu_mask |= PCI_COMMAND_MEMORY; > + } > + > + /* emulate word register */ > + valid_emu_mask = emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > +static int pt_cmd_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t dev_value, So the *value here is the return value right? How about *response ? > + uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint16_t writable_mask = 0; > + uint16_t throughable_mask = 0; > + uint16_t wr_value = *value; > + uint16_t emu_mask = reg->emu_mask; > + > + if (s->is_virtfn) { > + emu_mask |= PCI_COMMAND_MEMORY; > + } > + > + /* modify emulate register */ > + writable_mask = ~reg->ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~emu_mask & valid_mask; What does 'throughable' mean? Is there a better term for it? Say filtered? emulated? cleaned? > + > + if (*value & PCI_COMMAND_INTX_DISABLE) { > + throughable_mask |= PCI_COMMAND_INTX_DISABLE; > + } else { > + if (s->machine_irq) { > + throughable_mask |= PCI_COMMAND_INTX_DISABLE; > + } > + } > + > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + /* mapping BAR */ > + pt_bar_mapping(s, wr_value & PCI_COMMAND_IO, > + wr_value & PCI_COMMAND_MEMORY); Ah, here we kick of the real memory mapping with the hypervisor. You might want to expand the comment to say that. > + > + return 0; > +} > +static int pt_cmd_reg_restore(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t real_offset, uint16_t dev_value, > + uint16_t *value) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + PCIDevice *d = &s->dev; > + uint16_t restorable_mask = 0; > + > + /* use I/O device register's value as restore value */ > + *value = pci_get_word(d->config + real_offset); > + > + /* create value for restoring to I/O device register s/to/the/ > + * but do not include Fast Back-to-Back Enable bit. > + */ > + restorable_mask = reg->emu_mask & ~PCI_COMMAND_FAST_BACK; > + *value = PT_MERGE_VALUE(*value, dev_value, restorable_mask); > + > + if (!s->machine_irq) { > + *value |= PCI_COMMAND_INTX_DISABLE; > + } else { > + *value &= ~PCI_COMMAND_INTX_DISABLE; > + } > + > + return 0; > +} > + > +/* BAR */ > +#define PT_BAR_MEM_RO_MASK 0x0000000F /* BAR ReadOnly mask(Memory) */ > +#define PT_BAR_MEM_EMU_MASK 0xFFFFFFF0 /* BAR emul mask(Memory) */ > +#define PT_BAR_IO_RO_MASK 0x00000003 /* BAR ReadOnly mask(I/O) */ > +#define PT_BAR_IO_EMU_MASK 0xFFFFFFFC /* BAR emul mask(I/O) */ > + > +static inline uint32_t base_address_with_flags(HostPCIIORegion *hr) > +{ > + if ((hr->flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { > + return hr->base_addr | (hr->flags & ~PCI_BASE_ADDRESS_IO_MASK); > + } else { > + return hr->base_addr | (hr->flags & ~PCI_BASE_ADDRESS_MEM_MASK); > + } > +} > + > +static int pt_bar_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, > + uint32_t real_offset, uint32_t *data) > +{ > + uint32_t reg_field = 0; > + int index; > + > + /* get BAR index */ > + index = pt_bar_offset_to_index(reg->offset); > + if (index < 0) { Should we check for index > PCI_ROM_BASE as well? > + PT_ERR(&s->dev, "Internal error: Invalid BAR index [%d].\n", index); > + return -1; > + } > + > + /* set initial guest physical base address to -1 */ > + s->bases[index].e_physbase = -1; > + > + /* set BAR flag */ > + s->bases[index].bar_flag = pt_bar_reg_parse(s, reg); > + if (s->bases[index].bar_flag == PT_BAR_FLAG_UNUSED) { > + reg_field = PT_INVALID_REG; > + } > + > + *data = reg_field; > + return 0; > +} > +static int pt_bar_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t *value, uint32_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint32_t valid_emu_mask = 0; > + uint32_t bar_emu_mask = 0; > + int index; > + > + /* get BAR index */ > + index = pt_bar_offset_to_index(reg->offset); > + if (index < 0) { Should we check for index > PCI_ROM_BASE? > + PT_ERR(&s->dev, "Internal error: Invalid BAR index [%d].\n", index); > + return -1; > + } > + > + /* use fixed-up value from kernel sysfs */ > + *value = base_address_with_flags(&s->real_device->io_regions[index]); > + > + /* set emulate mask depend on BAR flag */ > + switch (s->bases[index].bar_flag) { > + case PT_BAR_FLAG_MEM: > + bar_emu_mask = PT_BAR_MEM_EMU_MASK; > + break; > + case PT_BAR_FLAG_IO: > + bar_emu_mask = PT_BAR_IO_EMU_MASK; > + break; > + case PT_BAR_FLAG_UPPER: > + bar_emu_mask = PT_BAR_ALLF; > + break; > + default: > + break; > + } > + > + /* emulate BAR */ > + valid_emu_mask = bar_emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > +static int pt_bar_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t *value, uint32_t dev_value, > + uint32_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + XenPTRegGroup *reg_grp_entry = NULL; > + XenPTReg *reg_entry = NULL; > + XenPTRegion *base = NULL; > + PCIDevice *d = &s->dev; > + PCIIORegion *r; > + uint32_t writable_mask = 0; > + uint32_t throughable_mask = 0; > + uint32_t bar_emu_mask = 0; > + uint32_t bar_ro_mask = 0; > + uint32_t new_addr, last_addr; > + uint32_t prev_offset; > + uint32_t r_size = 0; > + int index = 0; > + > + /* get BAR index */ > + index = pt_bar_offset_to_index(reg->offset); > + if (index < 0) { > + PT_ERR(d, "Internal error: Invalid BAR index [%d].\n", index); > + return -1; > + } > + > + r = &d->io_regions[index]; > + base = &s->bases[index]; > + r_size = pt_get_emul_size(base->bar_flag, r->size); > + > + /* set emulate mask and read-only mask depend on BAR flag */ ^^values ^^ the > + switch (s->bases[index].bar_flag) { > + case PT_BAR_FLAG_MEM: > + bar_emu_mask = PT_BAR_MEM_EMU_MASK; > + bar_ro_mask = PT_BAR_MEM_RO_MASK | (r_size - 1); > + break; > + case PT_BAR_FLAG_IO: > + bar_emu_mask = PT_BAR_IO_EMU_MASK; > + bar_ro_mask = PT_BAR_IO_RO_MASK | (r_size - 1); > + break; > + case PT_BAR_FLAG_UPPER: > + bar_emu_mask = PT_BAR_ALLF; > + bar_ro_mask = 0; /* all upper 32bit are R/W */ > + break; > + default: > + break; > + } > + > + /* modify emulate register */ > + writable_mask = bar_emu_mask & ~bar_ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* check whether we need to update the virtual region address or not */ > + switch (s->bases[index].bar_flag) { > + case PT_BAR_FLAG_MEM: > + /* nothing to do */ > + break; > + case PT_BAR_FLAG_IO: > + new_addr = cfg_entry->data; > + last_addr = new_addr + r_size - 1; > + /* check invalid address */ > + if (last_addr <= new_addr || !new_addr || last_addr >= UINT16_MAX) { > + /* check 64K range */ > + if ((last_addr >= UINT16_MAX) && > + (cfg_entry->data != (PT_BAR_ALLF & ~bar_ro_mask))) { You seem to be using 'PT_BAR_ALLF & ~bar_ro_mask' this function and never actually use the bar_ro_mask by itself. Perhaps you can (before this switch statement) do: bar_ro_mask = PT_BAR_ALLF & ~bar_ro_mask; > + PT_WARN(d, "Guest attempt to set Base Address " > + "over the 64KB. (offset: 0x%02x," > + " addr: 0x%08x, size: 0x%08x)\n", > + reg->offset, new_addr, r_size); > + } > + /* just remove mapping */ > + r->addr = PCI_BAR_UNMAPPED; > + goto exit; > + } > + break; > + case PT_BAR_FLAG_UPPER: > + if (cfg_entry->data) { > + if (cfg_entry->data != (PT_BAR_ALLF & ~bar_ro_mask)) { > + PT_WARN(d, "Guest attempt to set high MMIO Base Address. " > + "Ignore mapping. " > + "(offset: 0x%02x, high address: 0x%08x)\n", > + reg->offset, cfg_entry->data); > + } > + /* clear lower address */ > + d->io_regions[index-1].addr = -1; > + } else { > + /* find lower 32bit BAR */ > + prev_offset = (reg->offset - 4); > + reg_grp_entry = pt_find_reg_grp(s, prev_offset); > + if (reg_grp_entry) { > + reg_entry = pt_find_reg(reg_grp_entry, prev_offset); > + if (reg_entry) { > + /* restore lower address */ > + d->io_regions[index-1].addr = reg_entry->data; > + } else { > + return -1; > + } > + } else { > + return -1; > + } > + } > + > + /* never mapping the 'empty' upper region, > + * because we'll do it enough for the lower region. umm, not sure what you mean here. Do you mean to say: "Do not map the 'empty' upper region b/c we do not need to. As we only need the lower region."? > + */ > + r->addr = -1; > + goto exit; > + default: > + break; > + } > + > + /* update the corresponding virtual region address */ > + /* > + * When guest code tries to get block size of mmio, it will write all "1"s > + * into pci bar register. In this case, cfg_entry->data == writable_mask. > + * Especially for devices with large mmio, the value of writable_mask > + * is likely to be a guest physical address that has been mapped to ram > + * rather than mmio. Remapping this value to mmio should be prevented. > + */ > + > + if (cfg_entry->data != writable_mask) { > + r->addr = cfg_entry->data; > + } > + > +exit: > + /* create value for writing to I/O device register */ > + throughable_mask = ~bar_emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + /* After BAR reg update, we need to remap BAR */ > + reg_grp_entry = pt_find_reg_grp(s, PCI_COMMAND); > + if (reg_grp_entry) { > + reg_entry = pt_find_reg(reg_grp_entry, PCI_COMMAND); > + if (reg_entry) { > + pt_bar_mapping_one(s, index, reg_entry->data & PCI_COMMAND_IO, > + reg_entry->data & PCI_COMMAND_MEMORY); > + } > + } > + > + return 0; > +} > +static int pt_bar_reg_restore(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t real_offset, uint32_t dev_value, > + uint32_t *value) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint32_t bar_emu_mask = 0; > + int index = 0; > + > + /* get BAR index */ > + index = pt_bar_offset_to_index(reg->offset); > + if (index < 0) { > + PT_ERR(&s->dev, "Internal error: Invalid BAR index [%d].\n", index); > + return -1; > + } > + > + /* use value from kernel sysfs */ > + if (s->bases[index].bar_flag == PT_BAR_FLAG_UPPER) { > + *value = s->real_device->io_regions[index - 1].base_addr >> 32; > + } else { > + *value = base_address_with_flags(&s->real_device->io_regions[index]); > + } > + > + /* set emulate mask depend on BAR flag */ > + switch (s->bases[index].bar_flag) { > + case PT_BAR_FLAG_MEM: > + bar_emu_mask = PT_BAR_MEM_EMU_MASK; > + break; > + case PT_BAR_FLAG_IO: > + bar_emu_mask = PT_BAR_IO_EMU_MASK; > + break; > + case PT_BAR_FLAG_UPPER: > + bar_emu_mask = PT_BAR_ALLF; > + break; > + default: > + break; > + } > + > + /* create value for restoring to I/O device register */ > + *value = PT_MERGE_VALUE(*value, dev_value, bar_emu_mask); > + > + return 0; > +} > + > +/* write Exp ROM BAR */ > +static int pt_exp_rom_bar_reg_write(XenPCIPassthroughState *s, > + XenPTReg *cfg_entry, uint32_t *value, > + uint32_t dev_value, uint32_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + XenPTRegGroup *reg_grp_entry = NULL; > + XenPTReg *reg_entry = NULL; > + XenPTRegion *base = NULL; > + PCIDevice *d = (PCIDevice *)&s->dev; > + PCIIORegion *r; > + uint32_t writable_mask = 0; > + uint32_t throughable_mask = 0; > + pcibus_t r_size = 0; > + uint32_t bar_emu_mask = 0; > + uint32_t bar_ro_mask = 0; > + > + r = &d->io_regions[PCI_ROM_SLOT]; > + r_size = r->size; > + base = &s->bases[PCI_ROM_SLOT]; > + /* align memory type resource size */ > + pt_get_emul_size(base->bar_flag, r_size); > + > + /* set emulate mask and read-only mask */ > + bar_emu_mask = reg->emu_mask; > + bar_ro_mask = (reg->ro_mask | (r_size - 1)) & ~PCI_ROM_ADDRESS_ENABLE; > + > + /* modify emulate register */ > + writable_mask = ~bar_ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* update the corresponding virtual region address */ > + /* > + * When guest code tries to get block size of mmio, it will write all "1"s > + * into pci bar register. In this case, cfg_entry->data == writable_mask. > + * Especially for devices with large mmio, the value of writable_mask > + * is likely to be a guest physical address that has been mapped to ram > + * rather than mmio. Remapping this value to mmio should be prevented. > + */ > + > + if (cfg_entry->data != writable_mask) { > + r->addr = cfg_entry->data; > + } > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~bar_emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + /* After BAR reg update, we need to remap BAR*/ > + reg_grp_entry = pt_find_reg_grp(s, PCI_COMMAND); > + if (reg_grp_entry) { > + reg_entry = pt_find_reg(reg_grp_entry, PCI_COMMAND); > + if (reg_entry) { > + pt_bar_mapping_one(s, PCI_ROM_SLOT, > + reg_entry->data & PCI_COMMAND_IO, > + reg_entry->data & PCI_COMMAND_MEMORY); > + } > + } > + > + return 0; > +} > +/* restore ROM BAR */ > +static int pt_exp_rom_bar_reg_restore(XenPCIPassthroughState *s, > + XenPTReg *cfg_entry, > + uint32_t real_offset, > + uint32_t dev_value, uint32_t *value) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint32_t v; > + > + if (host_pci_get_long(s->real_device, PCI_ROM_ADDRESS, &v)) { > + return -1; > + } > + /* use value from kernel sysfs */ > + *value = PT_MERGE_VALUE(v, dev_value, reg->emu_mask); > + return 0; > +} > + > +/* Header Type0 reg static infomation table */ > +static XenPTRegInfo pt_emu_reg_header0_tbl[] = { > + /* Vendor ID reg */ > + { > + .offset = PCI_VENDOR_ID, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xFFFF, > + .emu_mask = 0xFFFF, > + .init = pt_vendor_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = NULL, > + }, > + /* Device ID reg */ > + { > + .offset = PCI_DEVICE_ID, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xFFFF, > + .emu_mask = 0xFFFF, > + .init = pt_device_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = NULL, > + }, > + /* Command reg */ > + { > + .offset = PCI_COMMAND, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xF880, > + .emu_mask = 0x0740, > + .init = pt_common_reg_init, > + .u.w.read = pt_cmd_reg_read, > + .u.w.write = pt_cmd_reg_write, > + .u.w.restore = pt_cmd_reg_restore, > + }, > + /* Capabilities Pointer reg */ > + { > + .offset = PCI_CAPABILITY_LIST, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_ptr_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* Status reg */ > + /* use emulated Cap Ptr value to initialize, > + * so need to be declared after Cap Ptr reg > + */ > + { > + .offset = PCI_STATUS, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0x06FF, > + .emu_mask = 0x0010, > + .init = pt_status_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = NULL, > + }, > + /* Cache Line Size reg */ > + { > + .offset = PCI_CACHE_LINE_SIZE, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0x00, > + .emu_mask = 0xFF, > + .init = pt_common_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = pt_byte_reg_restore, > + }, > + /* Latency Timer reg */ > + { > + .offset = PCI_LATENCY_TIMER, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0x00, > + .emu_mask = 0xFF, > + .init = pt_common_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = pt_byte_reg_restore, > + }, > + /* Header Type reg */ > + { > + .offset = PCI_HEADER_TYPE, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0x00, > + .init = pt_header_type_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* Interrupt Line reg */ > + { > + .offset = PCI_INTERRUPT_LINE, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0x00, > + .emu_mask = 0xFF, > + .init = pt_common_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* Interrupt Pin reg */ > + { > + .offset = PCI_INTERRUPT_PIN, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_irqpin_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* BAR 0 reg */ > + /* mask of BAR need to be decided later, depends on IO/MEM type */ > + { > + .offset = PCI_BASE_ADDRESS_0, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* BAR 1 reg */ > + { > + .offset = PCI_BASE_ADDRESS_1, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* BAR 2 reg */ > + { > + .offset = PCI_BASE_ADDRESS_2, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* BAR 3 reg */ > + { > + .offset = PCI_BASE_ADDRESS_3, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* BAR 4 reg */ > + { > + .offset = PCI_BASE_ADDRESS_4, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* BAR 5 reg */ > + { > + .offset = PCI_BASE_ADDRESS_5, > + .size = 4, > + .init_val = 0x00000000, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_bar_reg_read, > + .u.dw.write = pt_bar_reg_write, > + .u.dw.restore = pt_bar_reg_restore, > + }, > + /* Expansion ROM BAR reg */ > + { > + .offset = PCI_ROM_ADDRESS, > + .size = 4, > + .init_val = 0x00000000, > + .ro_mask = 0x000007FE, > + .emu_mask = 0xFFFFF800, > + .init = pt_bar_reg_init, > + .u.dw.read = pt_long_reg_read, > + .u.dw.write = pt_exp_rom_bar_reg_write, > + .u.dw.restore = pt_exp_rom_bar_reg_restore, > + }, > + { > + .size = 0, > + }, > +}; > + > + > +/********************************* > + * Vital Product Data Capability > + */ > + > +/* Vital Product Data Capability Structure reg static infomation table */ > +static XenPTRegInfo pt_emu_reg_vpd_tbl[] = { > + { > + .offset = PCI_CAP_LIST_NEXT, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_ptr_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + { > + .size = 0, > + }, > +}; > + > + > +/************************************** > + * Vendor Specific Capability > + */ > + > +/* Vendor Specific Capability Structure reg static infomation table */ > +static XenPTRegInfo pt_emu_reg_vendor_tbl[] = { > + { > + .offset = PCI_CAP_LIST_NEXT, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_ptr_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + { > + .size = 0, > + }, > +}; > + > + > +/***************************** > + * PCI Express Capability > + */ > + > +/* initialize Link Control register */ > +static int pt_linkctrl_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + uint8_t cap_ver = 0; > + uint8_t dev_type = 0; > + > + cap_ver = pci_get_byte(s->dev.config + real_offset - reg->offset > + + PCI_EXP_FLAGS) > + & PCI_EXP_FLAGS_VERS; Hmm. Weird tabbing? Or maybe it is my mailer? > + dev_type = (pci_get_byte(s->dev.config + real_offset - reg->offset > + + PCI_EXP_FLAGS) > + & PCI_EXP_FLAGS_TYPE) >> 4; Here it looks better.. but still not sure about the "+ PCI_EXP_FLAGS"? > + > + /* no need to initialize in case of Root Complex Integrated Endpoint > + * with cap_ver 1.x > + */ > + if ((dev_type == PCI_EXP_TYPE_RC_END) && (cap_ver == 1)) { > + *data = PT_INVALID_REG; > + } > + > + *data = reg->init_val; > + return 0; > +} > +/* initialize Device Control 2 register */ > +static int pt_devctrl2_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + uint8_t cap_ver = 0; > + > + cap_ver = pci_get_byte(s->dev.config + real_offset - reg->offset > + + PCI_EXP_FLAGS) > + & PCI_EXP_FLAGS_VERS; Tab-mayhem! > + > + /* no need to initialize in case of cap_ver 1.x */ > + if (cap_ver == 1) { > + *data = PT_INVALID_REG; > + } > + > + *data = reg->init_val; > + return 0; > +} > +/* initialize Link Control 2 register */ > +static int pt_linkctrl2_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + uint32_t reg_field = 0; > + uint8_t cap_ver = 0; > + > + cap_ver = pci_get_byte(s->dev.config + real_offset - reg->offset > + + PCI_EXP_FLAGS) > + & PCI_EXP_FLAGS_VERS; .. strikes again! > + > + /* no need to initialize in case of cap_ver 1.x */ > + if (cap_ver == 1) { > + reg_field = PT_INVALID_REG; > + } else { > + /* set Supported Link Speed */ > + uint8_t lnkcap = pci_get_byte(s->dev.config + real_offset - reg->offset > + + PCI_EXP_LNKCAP); > + reg_field |= PCI_EXP_LNKCAP_SLS & lnkcap; > + } > + > + *data = reg_field; > + return 0; > +} > + > +/* PCI Express Capability Structure reg static infomation table */ > +static XenPTRegInfo pt_emu_reg_pcie_tbl[] = { > + /* Next Pointer reg */ > + { > + .offset = PCI_CAP_LIST_NEXT, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_ptr_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* Device Capabilities reg */ > + { > + .offset = PCI_EXP_DEVCAP, > + .size = 4, > + .init_val = 0x00000000, > + .ro_mask = 0x1FFCFFFF, > + .emu_mask = 0x10000000, > + .init = pt_common_reg_init, > + .u.dw.read = pt_long_reg_read, > + .u.dw.write = pt_long_reg_write, > + .u.dw.restore = NULL, > + }, > + /* Device Control reg */ > + { > + .offset = PCI_EXP_DEVCTL, > + .size = 2, > + .init_val = 0x2810, > + .ro_mask = 0x8400, > + .emu_mask = 0xFFFF, > + .init = pt_common_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = pt_word_reg_restore, > + }, > + /* Link Control reg */ > + { > + .offset = PCI_EXP_LNKCTL, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xFC34, > + .emu_mask = 0xFFFF, > + .init = pt_linkctrl_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = pt_word_reg_restore, > + }, > + /* Device Control 2 reg */ > + { > + .offset = 0x28, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xFFE0, > + .emu_mask = 0xFFFF, > + .init = pt_devctrl2_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = pt_word_reg_restore, > + }, > + /* Link Control 2 reg */ > + { > + .offset = 0x30, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xE040, > + .emu_mask = 0xFFFF, > + .init = pt_linkctrl2_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = pt_word_reg_restore, > + }, > + { > + .size = 0, > + }, > +}; > + > + > +/********************************* > + * Power Management Capability > + */ > + > +/* initialize Power Management Capabilities register */ > +static int pt_pmc_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + PCIDevice *d = &s->dev; > + > + if (s->power_mgmt) { > + /* set Power Management Capabilities register */ > + s->pm_state->pmc_field = pci_get_word(d->config + real_offset); > + } > + > + *data = reg->init_val; > + return 0; > +} > +/* initialize PCI Power Management Control/Status register */ > +static int pt_pmcsr_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + PCIDevice *d = &s->dev; > + uint16_t cap_ver = 0; > + uint16_t v = 0; > + > + if (!s->power_mgmt) { > + *data = reg->init_val; > + return 0; > + } > + > + /* check PCI Power Management support version */ > + cap_ver = s->pm_state->pmc_field & PCI_PM_CAP_VER_MASK; > + > + if (cap_ver > 2) { > + /* set No Soft Reset */ > + s->pm_state->no_soft_reset = > + pci_get_byte(d->config + real_offset) & PCI_PM_CTRL_NO_SOFT_RESET; > + } > + > + host_pci_get_word(s->real_device, real_offset, &v); > + /* wake up real physical device */ > + switch (v & PCI_PM_CTRL_STATE_MASK) { > + case 0: > + break; > + case 1: > + PT_LOG(d, "Power state transition D1 -> D0active\n"); > + host_pci_set_word(s->real_device, real_offset, 0); > + break; > + case 2: > + PT_LOG(d, "Power state transition D2 -> D0active\n"); > + host_pci_set_word(s->real_device, real_offset, 0); > + usleep(200); > + break; > + case 3: > + PT_LOG(d, "Power state transition D3hot -> D0active\n"); > + host_pci_set_word(s->real_device, real_offset, 0); > + usleep(10 * 1000); > + if (pt_init_pci_config(s)) { > + return -1; > + } > + break; > + } > + > + *data = reg->init_val; > + return 0; > +} > +/* read Power Management Control/Status register */ > +static int pt_pmcsr_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + uint16_t valid_emu_mask = reg->emu_mask; > + > + if (!s->power_mgmt) { > + valid_emu_mask |= PCI_PM_CTRL_STATE_MASK | PCI_PM_CTRL_NO_SOFT_RESET; > + } > + > + valid_emu_mask = valid_emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); > + > + return 0; > +} > +/* reset Interrupt and I/O resource */ > +static void pt_reset_interrupt_and_io_mapping(XenPCIPassthroughState *s) > +{ > + PCIDevice *d = &s->dev; > + PCIIORegion *r; > + int i = 0; > + uint8_t e_device = 0; > + uint8_t e_intx = 0; > + > + /* unbind INTx */ > + e_device = PCI_SLOT(s->dev.devfn); > + e_intx = pci_intx(s); > + > + if (s->machine_irq) { > + if (xc_domain_unbind_pt_irq(xen_xc, xen_domid, s->machine_irq, > + PT_IRQ_TYPE_PCI, 0, e_device, e_intx, 0)) { > + PT_ERR(d, "Unbinding of interrupt failed!\n"); > + } > + } > + > + /* clear all virtual region address */ > + for (i = 0; i < PCI_NUM_REGIONS; i++) { > + r = &d->io_regions[i]; > + r->addr = -1; > + } > + > + /* unmapping BAR */ > + pt_bar_mapping(s, 0, 0); > +} > +/* check power state transition */ > +static int check_power_state(XenPCIPassthroughState *s) > +{ > + XenPTPM *pm_state = s->pm_state; > + PCIDevice *d = &s->dev; > + uint16_t read_val = 0; > + uint16_t cur_state = 0; > + > + /* get current power state */ > + if (host_pci_get_word(s->real_device, pm_state->pm_base + PCI_PM_CTRL, > + &read_val)) { > + return -1; > + } > + cur_state = read_val & PCI_PM_CTRL_STATE_MASK; > + > + if (pm_state->req_state != cur_state) { > + PT_ERR(d, "Failed to change power state. " > + "(requested state: %d, current state: %d)\n", > + pm_state->req_state, cur_state); > + return -1; > + } > + return 0; > +} > +/* write Power Management Control/Status register */ > +static void pt_from_d3hot_to_d0_with_reset(void *opaque) > +{ > + XenPCIPassthroughState *s = opaque; > + XenPTPM *pm_state = s->pm_state; > + int ret = 0; > + > + /* check power state */ > + ret = check_power_state(s); > + > + if (ret < 0) { > + goto out; > + } > + > + pt_init_pci_config(s); > + > +out: > + /* power state transition flags off */ > + pm_state->flags &= ~PT_FLAG_TRANSITING; > + > + qemu_free_timer(pm_state->pm_timer); > + pm_state->pm_timer = NULL; > +} > +static void pt_default_power_transition(void *opaque) > +{ > + XenPCIPassthroughState *ptdev = opaque; > + XenPTPM *pm_state = ptdev->pm_state; > + > + /* check power state */ > + check_power_state(ptdev); > + > + /* power state transition flags off */ > + pm_state->flags &= ~PT_FLAG_TRANSITING; > + > + qemu_free_timer(pm_state->pm_timer); > + pm_state->pm_timer = NULL; > +} > +static int pt_pmcsr_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint16_t *value, uint16_t dev_value, > + uint16_t valid_mask) > +{ > + XenPTRegInfo *reg = cfg_entry->reg; > + PCIDevice *d = &s->dev; > + uint16_t emu_mask = reg->emu_mask; > + uint16_t writable_mask = 0; > + uint16_t throughable_mask = 0; > + XenPTPM *pm_state = s->pm_state; > + > + if (!s->power_mgmt) { > + emu_mask |= PCI_PM_CTRL_STATE_MASK | PCI_PM_CTRL_NO_SOFT_RESET; > + } > + > + /* modify emulate register */ > + writable_mask = emu_mask & ~reg->ro_mask & valid_mask; > + cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask); > + > + /* create value for writing to I/O device register */ > + throughable_mask = ~emu_mask & valid_mask; > + *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask); > + > + if (!s->power_mgmt) { > + return 0; > + } > + > + /* set I/O device power state */ > + pm_state->cur_state = dev_value & PCI_PM_CTRL_STATE_MASK; > + > + /* set Guest requested PowerState */ > + pm_state->req_state = *value & PCI_PM_CTRL_STATE_MASK; > + > + /* check power state transition or not */ > + if (pm_state->cur_state == pm_state->req_state) { > + /* not power state transition */ .. No power state transition. > + return 0; > + } > + > + /* check enable power state transition */ > + if ((pm_state->req_state != 0) && > + (pm_state->cur_state > pm_state->req_state)) { > + PT_ERR(d, "Invalid power transition. " > + "(requested state: %d, current state: %d)\n", > + pm_state->req_state, pm_state->cur_state); > + > + return 0; > + } > + > + /* check if this device supports the requested power state */ > + if (((pm_state->req_state == 1) && !(pm_state->pmc_field & PCI_PM_CAP_D1)) > + || ((pm_state->req_state == 2) && > + !(pm_state->pmc_field & PCI_PM_CAP_D2))) { > + PT_ERR(d, "Invalid power transition. " > + "(requested state: %d, current state: %d)\n", > + pm_state->req_state, pm_state->cur_state); > + > + return 0; > + } > + > + /* in case of transition related to D3hot, it's necessary to wait 10 ms. > + * But because writing to register will be performed later on actually, 'performed later on,' > + * don't start QEMUTimer right now, just alloc and init QEMUTimer here. You might want to say where it will be started. > + */ > + if ((pm_state->cur_state == 3) || (pm_state->req_state == 3)) { > + if (pm_state->req_state == 0) { > + /* alloc and init QEMUTimer */ > + if (!pm_state->no_soft_reset) { > + pm_state->pm_timer = qemu_new_timer_ms(rt_clock, > + pt_from_d3hot_to_d0_with_reset, s); > + > + /* reset Interrupt and I/O resource mapping */ > + pt_reset_interrupt_and_io_mapping(s); > + } else { > + pm_state->pm_timer = qemu_new_timer_ms(rt_clock, > + pt_default_power_transition, s); > + } > + } else { > + /* alloc and init QEMUTimer */ > + pm_state->pm_timer = qemu_new_timer_ms(rt_clock, > + pt_default_power_transition, s); > + } > + > + /* set power state transition delay */ > + pm_state->pm_delay = 10; > + > + /* power state transition flags on */ > + pm_state->flags |= PT_FLAG_TRANSITING; > + } > + /* in case of transition related to D0, D1 and D2, > + * no need to use QEMUTimer. > + * So, we perfom writing to register here and then read it back. > + */ > + else { > + /* write power state to I/O device register */ > + host_pci_set_word(s->real_device, pm_state->pm_base + PCI_PM_CTRL, > + *value); > + > + /* in case of transition related to D2, > + * it's necessary to wait 200 usec. > + * But because QEMUTimer do not support microsec unit right now, > + * so we do wait ourself here. '.. QEMUTimer does not support microsec resolution, we will wait here.' > + */ > + if ((pm_state->cur_state == 2) || (pm_state->req_state == 2)) { > + usleep(200); > + } > + > + /* check power state */ > + check_power_state(s); > + > + /* recreate value for writing to I/O device register */ > + if (host_pci_get_word(s->real_device, pm_state->pm_base + PCI_PM_CTRL, > + value)) { > + return -1; > + } > + } > + > + return 0; > +} > + > +/* restore Power Management Control/Status register */ > +static int pt_pmcsr_reg_restore(XenPCIPassthroughState *s, XenPTReg *cfg_entry, > + uint32_t real_offset, uint16_t dev_value, > + uint16_t *value) > +{ > + /* create value for restoring to I/O device register > + * No need to restore, just clear PME Enable and PME Status bit > + * Note: register type of PME Status bit is RW1C, so clear by writing 1b > + */ > + *value = (dev_value & ~PCI_PM_CTRL_PME_ENABLE) | PCI_PM_CTRL_PME_STATUS; > + > + return 0; > +} > + > + > +/* Power Management Capability reg static infomation table */ > +static XenPTRegInfo pt_emu_reg_pm_tbl[] = { > + /* Next Pointer reg */ > + { > + .offset = PCI_CAP_LIST_NEXT, > + .size = 1, > + .init_val = 0x00, > + .ro_mask = 0xFF, > + .emu_mask = 0xFF, > + .init = pt_ptr_reg_init, > + .u.b.read = pt_byte_reg_read, > + .u.b.write = pt_byte_reg_write, > + .u.b.restore = NULL, > + }, > + /* Power Management Capabilities reg */ > + { > + .offset = PCI_CAP_FLAGS, > + .size = 2, > + .init_val = 0x0000, > + .ro_mask = 0xFFFF, > + .emu_mask = 0xF9C8, > + .init = pt_pmc_reg_init, > + .u.w.read = pt_word_reg_read, > + .u.w.write = pt_word_reg_write, > + .u.w.restore = NULL, > + }, > + /* PCI Power Management Control/Status reg */ > + { > + .offset = PCI_PM_CTRL, > + .size = 2, > + .init_val = 0x0008, > + .ro_mask = 0xE1FC, > + .emu_mask = 0x8100, > + .init = pt_pmcsr_reg_init, > + .u.w.read = pt_pmcsr_reg_read, > + .u.w.write = pt_pmcsr_reg_write, > + .u.w.restore = pt_pmcsr_reg_restore, > + }, > + { > + .size = 0, > + }, > +}; > + > + > +/**************************** > + * Capabilities > + */ > + > +/* AER register operations */ > + > +static void aer_save_one_register(XenPCIPassthroughState *s, int offset) > +{ > + PCIDevice *d = &s->dev; > + uint32_t aer_base = s->pm_state->aer_base; > + uint32_t val = 0; > + > + if (host_pci_get_long(s->real_device, aer_base + offset, &val)) { > + return; > + } > + pci_set_long(d->config + aer_base + offset, val); > +} > +static void pt_aer_reg_save(XenPCIPassthroughState *s) > +{ > + /* after reset, following register values should be restored. > + * So, save them. > + */ > + aer_save_one_register(s, PCI_ERR_UNCOR_MASK); > + aer_save_one_register(s, PCI_ERR_UNCOR_SEVER); > + aer_save_one_register(s, PCI_ERR_COR_MASK); > + aer_save_one_register(s, PCI_ERR_CAP); > +} > +static void aer_restore_one_register(XenPCIPassthroughState *s, int offset) > +{ > + PCIDevice *d = &s->dev; > + uint32_t aer_base = s->pm_state->aer_base; > + uint32_t config = 0; > + > + config = pci_get_long(d->config + aer_base + offset); > + host_pci_set_long(s->real_device, aer_base + offset, config); > +} > +static void pt_aer_reg_restore(XenPCIPassthroughState *s) > +{ > + /* the following registers should be reconfigured to correct values the -> The > + * after reset. restore them. reset. -> reset, hence > + * other registers should not be reconfigured after reset 'Other' > + * if there is no reason So what are the other registers? Every other register _but_ the ones that are enumerated here? If so, please state that explicitly. > + */ > + aer_restore_one_register(s, PCI_ERR_UNCOR_MASK); > + aer_restore_one_register(s, PCI_ERR_UNCOR_SEVER); > + aer_restore_one_register(s, PCI_ERR_COR_MASK); > + aer_restore_one_register(s, PCI_ERR_CAP); > +} > + > +/* capability structure register group size functions */ > + > +static int pt_reg_grp_size_init(XenPCIPassthroughState *s, > + const XenPTRegGroupInfo *grp_reg, > + uint32_t base_offset, uint8_t *size) > +{ > + *size = grp_reg->grp_size; > + return 0; > +} > +/* get Power Management Capability Structure register group size */ > +static int pt_pm_size_init(XenPCIPassthroughState *s, > + const XenPTRegGroupInfo *grp_reg, > + uint32_t base_offset, uint8_t *size) > +{ > + *size = grp_reg->grp_size; > + > + if (!s->power_mgmt) { > + return 0; > + } > + > + s->pm_state = g_new0(XenPTPM, 1); > + > + /* set Power Management Capability base offset */ > + s->pm_state->pm_base = base_offset; > + > + /* find AER register and set AER Capability base offset */ > + s->pm_state->aer_base = host_pci_find_ext_cap_offset(s->real_device, > + PCI_EXT_CAP_ID_ERR); > + > + /* save AER register */ > + if (s->pm_state->aer_base) { > + pt_aer_reg_save(s); > + } > + > + return 0; > +} > +/* get Vendor Specific Capability Structure register group size */ > +static int pt_vendor_size_init(XenPCIPassthroughState *s, > + const XenPTRegGroupInfo *grp_reg, > + uint32_t base_offset, uint8_t *size) > +{ > + *size = pci_get_byte(s->dev.config + base_offset + 0x02); > + return 0; > +} > +/* get PCI Express Capability Structure register group size */ > +static int pt_pcie_size_init(XenPCIPassthroughState *s, > + const XenPTRegGroupInfo *grp_reg, > + uint32_t base_offset, uint8_t *size) > +{ > + PCIDevice *d = &s->dev; > + uint16_t exp_flag = 0; > + uint16_t type = 0; > + uint16_t version = 0; > + uint8_t pcie_size = 0; > + > + exp_flag = pci_get_word(d->config + base_offset + PCI_EXP_FLAGS); > + type = (exp_flag & PCI_EXP_FLAGS_TYPE) >> 4; > + version = exp_flag & PCI_EXP_FLAGS_VERS; > + > + /* calculate size depend on capability version and device/port type */ > + /* in case of PCI Express Base Specification Rev 1.x */ > + if (version == 1) { > + /* The PCI Express Capabilities, Device Capabilities, and Device > + * Status/Control registers are required for all PCI Express devices. > + * The Link Capabilities and Link Status/Control are required for all > + * Endpoints that are not Root Complex Integrated Endpoints. Endpoints > + * are not required to implement registers other than those listed > + * above and terminate the capability structure. > + */ > + switch (type) { > + case PCI_EXP_TYPE_ENDPOINT: > + case PCI_EXP_TYPE_LEG_END: > + pcie_size = 0x14; > + break; > + case PCI_EXP_TYPE_RC_END: > + /* has no link */ > + pcie_size = 0x0C; > + break; > + /* only EndPoint passthrough is supported */ > + case PCI_EXP_TYPE_ROOT_PORT: > + case PCI_EXP_TYPE_UPSTREAM: > + case PCI_EXP_TYPE_DOWNSTREAM: > + case PCI_EXP_TYPE_PCI_BRIDGE: > + case PCI_EXP_TYPE_PCIE_BRIDGE: > + case PCI_EXP_TYPE_RC_EC: > + default: > + PT_ERR(d, "Internal error: Unsupported device/port type (%d).\n", > + type); > + return -1; > + } > + } > + /* in case of PCI Express Base Specification Rev 2.0 */ > + else if (version == 2) { > + switch (type) { > + case PCI_EXP_TYPE_ENDPOINT: > + case PCI_EXP_TYPE_LEG_END: > + case PCI_EXP_TYPE_RC_END: > + /* For Functions that do not implement the registers, > + * these spaces must be hardwired to 0b. So this comment applies to the functions below the 'break' right? Should you move it? But that doesn't make sense - we end up hitting return -1 so it bails out and does not return 0b. Hmmm.. So what is this comment referring to? > + */ > + pcie_size = 0x3C; > + break; > + /* only EndPoint passthrough is supported */ > + case PCI_EXP_TYPE_ROOT_PORT: > + case PCI_EXP_TYPE_UPSTREAM: > + case PCI_EXP_TYPE_DOWNSTREAM: > + case PCI_EXP_TYPE_PCI_BRIDGE: > + case PCI_EXP_TYPE_PCIE_BRIDGE: > + case PCI_EXP_TYPE_RC_EC: > + default: > + PT_ERR(d, "Internal error: Unsupported device/port type (%d).\n", > + type); > + return -1; > + } > + } else { > + PT_ERR(d, "Internal error: Unsupported capability version (%d).\n", > + version); > + return -1; > + } > + > + *size = pcie_size; > + return 0; > +} > + > +static const XenPTRegGroupInfo pt_emu_reg_grp_tbl[] = { > + /* Header Type0 reg group */ > + { > + .grp_id = 0xFF, > + .grp_type = GRP_TYPE_EMU, > + .grp_size = 0x40, > + .size_init = pt_reg_grp_size_init, > + .emu_reg_tbl = pt_emu_reg_header0_tbl, > + }, > + /* PCI PowerManagement Capability reg group */ > + { > + .grp_id = PCI_CAP_ID_PM, > + .grp_type = GRP_TYPE_EMU, > + .grp_size = PCI_PM_SIZEOF, > + .size_init = pt_pm_size_init, > + .emu_reg_tbl = pt_emu_reg_pm_tbl, > + }, > + /* AGP Capability Structure reg group */ > + { > + .grp_id = PCI_CAP_ID_AGP, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x30, > + .size_init = pt_reg_grp_size_init, > + }, > + /* Vital Product Data Capability Structure reg group */ > + { > + .grp_id = PCI_CAP_ID_VPD, > + .grp_type = GRP_TYPE_EMU, > + .grp_size = 0x08, > + .size_init = pt_reg_grp_size_init, > + .emu_reg_tbl = pt_emu_reg_vpd_tbl, > + }, > + /* Slot Identification reg group */ > + { > + .grp_id = PCI_CAP_ID_SLOTID, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x04, > + .size_init = pt_reg_grp_size_init, > + }, > + /* PCI-X Capabilities List Item reg group */ > + { > + .grp_id = PCI_CAP_ID_PCIX, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x18, > + .size_init = pt_reg_grp_size_init, > + }, > + /* Vendor Specific Capability Structure reg group */ > + { > + .grp_id = PCI_CAP_ID_VNDR, > + .grp_type = GRP_TYPE_EMU, > + .grp_size = 0xFF, > + .size_init = pt_vendor_size_init, > + .emu_reg_tbl = pt_emu_reg_vendor_tbl, > + }, > + /* SHPC Capability List Item reg group */ > + { > + .grp_id = PCI_CAP_ID_SHPC, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x08, > + .size_init = pt_reg_grp_size_init, > + }, > + /* Subsystem ID and Subsystem Vendor ID Capability List Item reg group */ > + { > + .grp_id = PCI_CAP_ID_SSVID, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x08, > + .size_init = pt_reg_grp_size_init, > + }, > + /* AGP 8x Capability Structure reg group */ > + { > + .grp_id = PCI_CAP_ID_AGP3, > + .grp_type = GRP_TYPE_HARDWIRED, > + .grp_size = 0x30, > + .size_init = pt_reg_grp_size_init, > + }, > + /* PCI Express Capability Structure reg group */ > + { > + .grp_id = PCI_CAP_ID_EXP, > + .grp_type = GRP_TYPE_EMU, > + .grp_size = 0xFF, > + .size_init = pt_pcie_size_init, > + .emu_reg_tbl = pt_emu_reg_pcie_tbl, > + }, > + { > + .grp_size = 0, > + }, > +}; > + > +/* initialize Capabilities Pointer or Next Pointer register */ > +static int pt_ptr_reg_init(XenPCIPassthroughState *s, > + XenPTRegInfo *reg, uint32_t real_offset, > + uint32_t *data) > +{ > + /* uint32_t reg_field = (uint32_t)s->dev.config[real_offset]; */ > + uint32_t reg_field = pci_get_byte(s->dev.config + real_offset); There is no check whether real_offset > than the size of what is in dev.config. Perhaps that should be done? > + int i; > + > + /* find capability offset */ > + while (reg_field) { > + for (i = 0; pt_emu_reg_grp_tbl[i].grp_size != 0; i++) { > + if (pt_hide_dev_cap(s->real_device, > + pt_emu_reg_grp_tbl[i].grp_id)) { > + continue; > + } > + if (pt_emu_reg_grp_tbl[i].grp_id == s->dev.config[reg_field]) { > + if (pt_emu_reg_grp_tbl[i].grp_type == GRP_TYPE_EMU) { > + goto out; > + } > + /* ignore the 0 hardwired capability, find next one */ > + break; > + } > + } > + /* next capability */ > + /* reg_field = (uint32_t)s->dev.config[reg_field + 1]; */ > + reg_field = pci_get_byte(s->dev.config + reg_field + 1); > + } > + > +out: > + *data = reg_field; > + return 0; > +} > + > + > +/************* > + * Main > + */ > + > +/* restore a part of I/O device register */ > +static int pt_config_restore(XenPCIPassthroughState *s) > +{ > + XenPTRegGroup *reg_grp_entry = NULL; > + XenPTReg *reg_entry = NULL; > + XenPTRegInfo *reg = NULL; > + uint32_t real_offset = 0; > + uint32_t read_val = 0; > + uint32_t val = 0; > + int rc = 0; > + > + /* find emulate register group entry */ > + QLIST_FOREACH(reg_grp_entry, &s->reg_grp_tbl, entries) { > + /* find emulate register entry */ > + QLIST_FOREACH(reg_entry, ®_grp_entry->reg_tbl_list, entries) { > + reg = reg_entry->reg; > + > + /* check whether restoring is needed */ > + if (!reg->u.b.restore) { > + continue; > + } > + > + real_offset = reg_grp_entry->base_offset + reg->offset; > + > + /* read I/O device register value */ > + rc = host_pci_get_block(s->real_device, real_offset, > + (uint8_t *)&read_val, reg->size); > + > + if (rc < 0) { > + PT_ERR(&s->dev, "pci_read_block failed. " > + "return value: %d.\n", rc); > + memset(&read_val, 0xff, reg->size); > + } > + > + val = 0; > + > + /* restore based on register size */ > + switch (reg->size) { > + case 1: > + /* byte register */ > + rc = reg->u.b.restore(s, reg_entry, real_offset, > + (uint8_t)read_val, (uint8_t *)&val); > + break; > + case 2: > + /* word register */ > + rc = reg->u.w.restore(s, reg_entry, real_offset, > + (uint16_t)read_val, (uint16_t *)&val); > + break; > + case 4: > + /* double word register */ > + rc = reg->u.dw.restore(s, reg_entry, real_offset, > + (uint32_t)read_val, (uint32_t *)&val); > + break; > + } > + > + /* restoring error */ > + if (rc < 0) { > + xen_shutdown_fatal_error("Internal error: Invalid restoring." > + " (%s, rc: %d)\n", __func__, rc); > + return -1; > + } > + > + PT_LOG_CONFIG(&s->dev, real_offset, val, reg->size); > + > + rc = host_pci_set_block(s->real_device, real_offset, > + (uint8_t *)&val, reg->size); > + > + if (rc < 0) { > + PT_ERR(&s->dev, "pci_write_block failed. " > + "return value: %d.\n", rc); > + return -1; > + } > + } > + } > + > + /* if AER supported, restore it */ > + if (s->pm_state->aer_base) { > + pt_aer_reg_restore(s); > + } > + return 0; > +} > +/* reinitialize all emulate registers */ > +static int pt_config_reinit(XenPCIPassthroughState *s) > +{ > + XenPTRegGroup *reg_grp_entry = NULL; > + XenPTReg *reg_entry = NULL; > + XenPTRegInfo *reg = NULL; > + int rc = 0; > + > + /* find emulate register group entry */ > + QLIST_FOREACH(reg_grp_entry, &s->reg_grp_tbl, entries) { > + /* find emulate register entry */ > + QLIST_FOREACH(reg_entry, ®_grp_entry->reg_tbl_list, entries) { > + reg = reg_entry->reg; > + if (reg->init) { > + /* initialize emulate register */ > + rc = reg->init(s, reg_entry->reg, > + reg_grp_entry->base_offset + reg->offset, > + ®_entry->data); > + if (rc < 0) { > + return rc; > + } > + } > + } > + } > + return 0; > +} > + > +static int pt_init_pci_config(XenPCIPassthroughState *s) > +{ > + PCIDevice *d = &s->dev; > + int rc = 0; > + > + PT_LOG(d, "Reinitialize PCI configuration registers due to power state" > + " transition with internal reset.\n"); > + > + /* restore a part of I/O device register */ > + rc = pt_config_restore(s); > + if (rc < 0) { > + return rc; > + } > + > + /* reinitialize all emulate register */ > + rc = pt_config_reinit(s); > + if (rc < 0) { > + return rc; > + } > + > + /* rebind machine_irq to device */ > + if (s->machine_irq != 0) { > + uint8_t e_device = PCI_SLOT(s->dev.devfn); > + uint8_t e_intx = pci_intx(s); > + > + rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, s->machine_irq, 0, > + e_device, e_intx); > + if (rc < 0) { > + PT_ERR(d, "Rebinding of interrupt failed! rc=%d\n", rc); > + } > + } > + > + return rc; > +} > + > +static uint8_t find_cap_offset(XenPCIPassthroughState *s, uint8_t cap) > +{ > + uint8_t id; > + int max_cap = 48; You need to use #define for that. Also you might want just make it an unsigned. > + uint8_t pos = PCI_CAPABILITY_LIST; > + uint8_t status = 0; > + > + if (host_pci_get_byte(s->real_device, PCI_STATUS, &status)) { > + return 0; > + } > + if ((status & PCI_STATUS_CAP_LIST) == 0) { > + return 0; > + } > + > + while (max_cap--) { > + if (host_pci_get_byte(s->real_device, pos, &pos)) { > + break; > + } > + if (pos < 0x40) { Can you explain why? (I presume it is b/c the capabilities entries do not exist before 0x40 offset?) > + break; > + } > + > + pos &= ~3; > + if (host_pci_get_byte(s->real_device, pos + PCI_CAP_LIST_ID, &id)) { > + break; > + } > + > + if (id == 0xff) { > + break; > + } > + if (id == cap) { > + return pos; > + } > + > + pos += PCI_CAP_LIST_NEXT; > + } > + return 0; > +} > + > +static int pt_config_reg_init(XenPCIPassthroughState *s, > + XenPTRegGroup *reg_grp, XenPTRegInfo *reg) > +{ > + XenPTReg *reg_entry; > + uint32_t data = 0; > + int rc = 0; > + > + reg_entry = g_new0(XenPTReg, 1); > + reg_entry->reg = reg; > + > + if (reg->init) { > + /* initialize emulate register */ > + rc = reg->init(s, reg_entry->reg, > + reg_grp->base_offset + reg->offset, &data); > + if (rc < 0) { > + free(reg_entry); > + return rc; > + } > + if (data == PT_INVALID_REG) { > + /* free unused BAR register entry */ > + free(reg_entry); > + return 0; > + } > + /* set register value */ > + reg_entry->data = data; > + } > + /* list add register entry */ > + QLIST_INSERT_HEAD(®_grp->reg_tbl_list, reg_entry, entries); > + > + return 0; > +} > + > +int pt_config_init(XenPCIPassthroughState *s) > +{ > + XenPTRegGroup *reg_grp_entry = NULL; > + uint32_t reg_grp_offset = 0; > + XenPTRegInfo *reg_tbl = NULL; > + int i, j, rc; > + > + QLIST_INIT(&s->reg_grp_tbl); > + > + for (i = 0; pt_emu_reg_grp_tbl[i].grp_size != 0; i++) { > + if (pt_emu_reg_grp_tbl[i].grp_id != 0xFF) { > + if (pt_hide_dev_cap(s->real_device, > + pt_emu_reg_grp_tbl[i].grp_id)) { > + continue; > + } > + > + reg_grp_offset = find_cap_offset(s, pt_emu_reg_grp_tbl[i].grp_id); > + > + if (!reg_grp_offset) { > + continue; > + } > + } > + > + reg_grp_entry = g_new0(XenPTRegGroup, 1); > + QLIST_INIT(®_grp_entry->reg_tbl_list); > + QLIST_INSERT_HEAD(&s->reg_grp_tbl, reg_grp_entry, entries); > + > + reg_grp_entry->base_offset = reg_grp_offset; > + reg_grp_entry->reg_grp = pt_emu_reg_grp_tbl + i; > + if (pt_emu_reg_grp_tbl[i].size_init) { > + /* get register group size */ > + rc = pt_emu_reg_grp_tbl[i].size_init(s, reg_grp_entry->reg_grp, > + reg_grp_offset, > + ®_grp_entry->size); > + if (rc < 0) { > + pt_config_delete(s); > + return rc; > + } > + } > + > + if (pt_emu_reg_grp_tbl[i].grp_type == GRP_TYPE_EMU) { > + if (pt_emu_reg_grp_tbl[i].emu_reg_tbl) { > + reg_tbl = pt_emu_reg_grp_tbl[i].emu_reg_tbl; > + /* initialize capability register */ > + for (j = 0; reg_tbl->size != 0; j++, reg_tbl++) { > + /* initialize capability register */ > + rc = pt_config_reg_init(s, reg_grp_entry, reg_tbl); > + if (rc < 0) { > + pt_config_delete(s); > + return rc; > + } > + } > + } > + } > + reg_grp_offset = 0; Can you move this to the top of the loop? > + } > + > + return 0; > +} > + > +/* delete all emulate register */ > +void pt_config_delete(XenPCIPassthroughState *s) > +{ > + struct XenPTRegGroup *reg_group, *next_grp; > + struct XenPTReg *reg, *next_reg; > + > + /* free Power Management info table */ > + if (s->pm_state) { > + if (s->pm_state->pm_timer) { > + qemu_del_timer(s->pm_state->pm_timer); > + qemu_free_timer(s->pm_state->pm_timer); > + s->pm_state->pm_timer = NULL; > + } > + > + g_free(s->pm_state); > + } > + > + /* free all register group entry */ > + QLIST_FOREACH_SAFE(reg_group, &s->reg_grp_tbl, entries, next_grp) { > + /* free all register entry */ > + QLIST_FOREACH_SAFE(reg, ®_group->reg_tbl_list, entries, next_reg) { > + QLIST_REMOVE(reg, entries); > + g_free(reg); > + } > + > + QLIST_REMOVE(reg_group, entries); > + g_free(reg_group); > + } > +} > -- > Anthony PERARD > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com > http://lists.xensource.com/xen-devel _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Tue Dec 06 18:20:36 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 06 Dec 2011 18:20:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXzd0-0007w7-Bx; Tue, 06 Dec 2011 18:20:30 +0000 Received: from mail27.messagelabs.com ([193.109.254.147]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RXzcy-0007uy-E2 for xen-devel@lists.xensource.com; Tue, 06 Dec 2011 18:20:29 +0000 X-Env-Sender: Stefano.Stabellini@eu.citrix.com X-Msg-Ref: server-4.tower-27.messagelabs.com!1323195545!51363948!3 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAyMzAwOTc=\n X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 4073 invoked from network); 6 Dec 2011 18:19:13 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-4.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 6 Dec 2011 18:19:13 -0000 X-IronPort-AV: E=Sophos;i="4.71,307,1320642000"; d="scan'208";a="173120747" Received: from ftlpmailmx01.citrite.net ([10.13.107.65]) by FTLPIPO02.CITRIX.COM with ESMTP/TLS/RC4-MD5; 06 Dec 2011 13:19:45 -0500 Received: from smtp01.ad.xensource.com (10.219.128.104) by smtprelay.citrix.com (10.13.107.65) with Microsoft SMTP Server id 8.3.213.0; Tue, 6 Dec 2011 13:19:44 -0500 Received: from localhost.localdomain (kaball.uk.xensource.com [10.80.2.59]) by smtp01.ad.xensource.com (8.13.1/8.13.1) with ESMTP id pB6IJEjK019549; Tue, 6 Dec 2011 10:19:28 -0800 From: To: xen-devel@lists.xensource.com Date: Tue, 6 Dec 2011 18:19:54 +0000 Message-ID: <1323195609-17277-10-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: MIME-Version: 1.0 Cc: Ian Campbell , Tim.Deegan@citrix.com, Stefano Stabellini Subject: [Xen-devel] [PATCH RFC 10/25] arm: header files X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com From: Stefano Stabellini A simple implementation of everything under asm-arm and arch-arm.h; some of these files are shamelessly taken from Linux. Signed-off-by: Stefano Stabellini Signed-off-by: Ian Campbell Signed-off-by: Tim Deegan --- xen/include/asm-arm/atomic.h | 212 +++++++++++++++++++++++++++++ xen/include/asm-arm/bitops.h | 195 +++++++++++++++++++++++++++ xen/include/asm-arm/bug.h | 15 ++ xen/include/asm-arm/byteorder.h | 16 +++ xen/include/asm-arm/cache.h | 20 +++ xen/include/asm-arm/config.h | 124 +++++++++++++++++ xen/include/asm-arm/cpregs.h | 207 ++++++++++++++++++++++++++++ xen/include/asm-arm/current.h | 60 ++++++++ xen/include/asm-arm/debugger.h | 15 ++ xen/include/asm-arm/delay.h | 15 ++ xen/include/asm-arm/desc.h | 12 ++ xen/include/asm-arm/div64.h | 241 +++++++++++++++++++++++++++++++++ xen/include/asm-arm/elf.h | 33 +++++ xen/include/asm-arm/event.h | 41 ++++++ xen/include/asm-arm/flushtlb.h | 31 +++++ xen/include/asm-arm/grant_table.h | 35 +++++ xen/include/asm-arm/hardirq.h | 28 ++++ xen/include/asm-arm/hypercall.h | 24 ++++ xen/include/asm-arm/init.h | 12 ++ xen/include/asm-arm/io.h | 12 ++ xen/include/asm-arm/iocap.h | 20 +++ xen/include/asm-arm/multicall.h | 23 +++ xen/include/asm-arm/nmi.h | 15 ++ xen/include/asm-arm/numa.h | 21 +++ xen/include/asm-arm/paging.h | 13 ++ xen/include/asm-arm/percpu.h | 28 ++++ xen/include/asm-arm/processor.h | 269 +++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/regs.h | 43 ++++++ xen/include/asm-arm/setup.h | 16 +++ xen/include/asm-arm/smp.h | 25 ++++ xen/include/asm-arm/softirq.h | 15 ++ xen/include/asm-arm/spinlock.h | 144 ++++++++++++++++++++ xen/include/asm-arm/string.h | 38 +++++ xen/include/asm-arm/system.h | 202 ++++++++++++++++++++++++++++ xen/include/asm-arm/trace.h | 12 ++ xen/include/asm-arm/types.h | 57 ++++++++ xen/include/asm-arm/xenoprof.h | 12 ++ xen/include/public/arch-arm.h | 125 +++++++++++++++++ xen/include/public/xen.h | 2 + 39 files changed, 2428 insertions(+), 0 deletions(-) create mode 100644 xen/include/asm-arm/atomic.h create mode 100644 xen/include/asm-arm/bitops.h create mode 100644 xen/include/asm-arm/bug.h create mode 100644 xen/include/asm-arm/byteorder.h create mode 100644 xen/include/asm-arm/cache.h create mode 100644 xen/include/asm-arm/config.h create mode 100644 xen/include/asm-arm/cpregs.h create mode 100644 xen/include/asm-arm/current.h create mode 100644 xen/include/asm-arm/debugger.h create mode 100644 xen/include/asm-arm/delay.h create mode 100644 xen/include/asm-arm/desc.h create mode 100644 xen/include/asm-arm/div64.h create mode 100644 xen/include/asm-arm/elf.h create mode 100644 xen/include/asm-arm/event.h create mode 100644 xen/include/asm-arm/flushtlb.h create mode 100644 xen/include/asm-arm/grant_table.h create mode 100644 xen/include/asm-arm/hardirq.h create mode 100644 xen/include/asm-arm/hypercall.h create mode 100644 xen/include/asm-arm/init.h create mode 100644 xen/include/asm-arm/io.h create mode 100644 xen/include/asm-arm/iocap.h create mode 100644 xen/include/asm-arm/multicall.h create mode 100644 xen/include/asm-arm/nmi.h create mode 100644 xen/include/asm-arm/numa.h create mode 100644 xen/include/asm-arm/paging.h create mode 100644 xen/include/asm-arm/percpu.h create mode 100644 xen/include/asm-arm/processor.h create mode 100644 xen/include/asm-arm/regs.h create mode 100644 xen/include/asm-arm/setup.h create mode 100644 xen/include/asm-arm/smp.h create mode 100644 xen/include/asm-arm/softirq.h create mode 100644 xen/include/asm-arm/spinlock.h create mode 100644 xen/include/asm-arm/string.h create mode 100644 xen/include/asm-arm/system.h create mode 100644 xen/include/asm-arm/trace.h create mode 100644 xen/include/asm-arm/types.h create mode 100644 xen/include/asm-arm/xenoprof.h create mode 100644 xen/include/public/arch-arm.h diff --git a/xen/include/asm-arm/atomic.h b/xen/include/asm-arm/atomic.h new file mode 100644 index 0000000..2b9ce0e --- /dev/null +++ b/xen/include/asm-arm/atomic.h @@ -0,0 +1,212 @@ +/* + * arch/arm/include/asm/atomic.h + * + * Copyright (C) 1996 Russell King. + * Copyright (C) 2002 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ARCH_ARM_ATOMIC__ +#define __ARCH_ARM_ATOMIC__ + +#include +#include + +#define build_atomic_read(name, size, type, reg) \ +static inline type name(const volatile type *addr) \ +{ \ + type ret; \ + asm volatile("ldr" size " %0,%1" \ + : reg (ret) \ + : "m" (*(volatile type *)addr)); \ + return ret; \ +} + +#define build_atomic_write(name, size, type, reg) \ +static inline void name(volatile type *addr, type val) \ +{ \ + asm volatile("str" size " %1,%0" \ + : "=m" (*(volatile type *)addr) \ + : reg (val)); \ +} + +build_atomic_read(atomic_read8, "b", uint8_t, "=q") +build_atomic_read(atomic_read16, "h", uint16_t, "=r") +build_atomic_read(atomic_read32, "", uint32_t, "=r") +//build_atomic_read(atomic_read64, "d", uint64_t, "=r") +build_atomic_read(atomic_read_int, "", int, "=r") + +build_atomic_write(atomic_write8, "b", uint8_t, "q") +build_atomic_write(atomic_write16, "h", uint16_t, "r") +build_atomic_write(atomic_write32, "", uint32_t, "r") +//build_atomic_write(atomic_write64, "d", uint64_t, "r") +build_atomic_write(atomic_write_int, "", int, "r") + +/* + * NB. I've pushed the volatile qualifier into the operations. This allows + * fast accessors such as _atomic_read() and _atomic_set() which don't give + * the compiler a fit. + */ +typedef struct { int counter; } atomic_t; + +#define ATOMIC_INIT(i) { (i) } + +/* + * On ARM, ordinary assignment (str instruction) doesn't clear the local + * strex/ldrex monitor on some implementations. The reason we can use it for + * atomic_set() is the clrex or dummy strex done on every exception return. + */ +#define _atomic_read(v) ((v).counter) +#define atomic_read(v) (*(volatile int *)&(v)->counter) + +#define _atomic_set(v,i) (((v).counter) = (i)) +#define atomic_set(v,i) (((v)->counter) = (i)) + +/* + * ARMv6 UP and SMP safe atomic ops. We use load exclusive and + * store exclusive to ensure that these are atomic. We may loop + * to ensure that the update happens. + */ +static inline void atomic_add(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + __asm__ __volatile__("@ atomic_add\n" +"1: ldrex %0, [%3]\n" +" add %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); +} + +static inline int atomic_add_return(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + smp_mb(); + + __asm__ __volatile__("@ atomic_add_return\n" +"1: ldrex %0, [%3]\n" +" add %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); + + smp_mb(); + + return result; +} + +static inline void atomic_sub(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + __asm__ __volatile__("@ atomic_sub\n" +"1: ldrex %0, [%3]\n" +" sub %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); +} + +static inline int atomic_sub_return(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + smp_mb(); + + __asm__ __volatile__("@ atomic_sub_return\n" +"1: ldrex %0, [%3]\n" +" sub %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); + + smp_mb(); + + return result; +} + +static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) +{ + unsigned long oldval, res; + + smp_mb(); + + do { + __asm__ __volatile__("@ atomic_cmpxchg\n" + "ldrex %1, [%3]\n" + "mov %0, #0\n" + "teq %1, %4\n" + "strexeq %0, %5, [%3]\n" + : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter) + : "r" (&ptr->counter), "Ir" (old), "r" (new) + : "cc"); + } while (res); + + smp_mb(); + + return oldval; +} + +static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) +{ + unsigned long tmp, tmp2; + + __asm__ __volatile__("@ atomic_clear_mask\n" +"1: ldrex %0, [%3]\n" +" bic %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (tmp), "=&r" (tmp2), "+Qo" (*addr) + : "r" (addr), "Ir" (mask) + : "cc"); +} + +#define atomic_inc(v) atomic_add(1, v) +#define atomic_dec(v) atomic_sub(1, v) + +#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) +#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) +#define atomic_inc_return(v) (atomic_add_return(1, v)) +#define atomic_dec_return(v) (atomic_sub_return(1, v)) +#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) + +#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0) + +static inline atomic_t atomic_compareandswap( + atomic_t old, atomic_t new, atomic_t *v) +{ + atomic_t rc; + rc.counter = __cmpxchg(&v->counter, old.counter, new.counter, sizeof(int)); + return rc; +} + +#endif /* __ARCH_ARM_ATOMIC__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/bitops.h b/xen/include/asm-arm/bitops.h new file mode 100644 index 0000000..3d6b30b --- /dev/null +++ b/xen/include/asm-arm/bitops.h @@ -0,0 +1,195 @@ +/* + * Copyright 1995, Russell King. + * Various bits and pieces copyrights include: + * Linus Torvalds (test_bit). + * Big endian support: Copyright 2001, Nicolas Pitre + * reworked by rmk. + */ + +#ifndef _ARM_BITOPS_H +#define _ARM_BITOPS_H + +extern void _set_bit(int nr, volatile void * p); +extern void _clear_bit(int nr, volatile void * p); +extern void _change_bit(int nr, volatile void * p); +extern int _test_and_set_bit(int nr, volatile void * p); +extern int _test_and_clear_bit(int nr, volatile void * p); +extern int _test_and_change_bit(int nr, volatile void * p); + +#define set_bit(n,p) _set_bit(n,p) +#define clear_bit(n,p) _clear_bit(n,p) +#define change_bit(n,p) _change_bit(n,p) +#define test_and_set_bit(n,p) _test_and_set_bit(n,p) +#define test_and_clear_bit(n,p) _test_and_clear_bit(n,p) +#define test_and_change_bit(n,p) _test_and_change_bit(n,p) + +#define BIT(nr) (1UL << (nr)) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) +#define BITS_PER_BYTE 8 + +#define ADDR (*(volatile long *) addr) +#define CONST_ADDR (*(const volatile long *) addr) + +/** + * __test_and_set_bit - Set a bit and return its old value + * @nr: Bit to set + * @addr: Address to count from + * + * This operation is non-atomic and can be reordered. + * If two examples of this operation race, one can appear to succeed + * but actually fail. You must protect multiple accesses with a lock. + */ +static inline int __test_and_set_bit(int nr, volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old | mask; + return (old & mask) != 0; +} + +/** + * __test_and_clear_bit - Clear a bit and return its old value + * @nr: Bit to clear + * @addr: Address to count from + * + * This operation is non-atomic and can be reordered. + * If two examples of this operation race, one can appear to succeed + * but actually fail. You must protect multiple accesses with a lock. + */ +static inline int __test_and_clear_bit(int nr, volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old & ~mask; + return (old & mask) != 0; +} + +/* WARNING: non atomic and it can be reordered! */ +static inline int __test_and_change_bit(int nr, + volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old ^ mask; + return (old & mask) != 0; +} + +/** + * test_bit - Determine whether a bit is set + * @nr: bit number to test + * @addr: Address to start counting from + */ +static inline int test_bit(int nr, const volatile void *addr) +{ + const volatile unsigned long *p = (const volatile unsigned long *)addr; + return 1UL & (p[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); +} + + +extern unsigned int _find_first_bit( + const unsigned long *addr, unsigned int size); +extern unsigned int _find_next_bit( + const unsigned long *addr, unsigned int size, unsigned int offset); +extern unsigned int _find_first_zero_bit( + const unsigned long *addr, unsigned int size); +extern unsigned int _find_next_zero_bit( + const unsigned long *addr, unsigned int size, unsigned int offset); + +/* + * These are the little endian, atomic definitions. + */ +#define find_first_zero_bit(p,sz) _find_first_zero_bit(p,sz) +#define find_next_zero_bit(p,sz,off) _find_next_zero_bit(p,sz,off) +#define find_first_bit(p,sz) _find_first_bit(p,sz) +#define find_next_bit(p,sz,off) _find_next_bit(p,sz,off) + +static inline int constant_fls(int x) +{ + int r = 32; + + if (!x) + return 0; + if (!(x & 0xffff0000u)) { + x <<= 16; + r -= 16; + } + if (!(x & 0xff000000u)) { + x <<= 8; + r -= 8; + } + if (!(x & 0xf0000000u)) { + x <<= 4; + r -= 4; + } + if (!(x & 0xc0000000u)) { + x <<= 2; + r -= 2; + } + if (!(x & 0x80000000u)) { + x <<= 1; + r -= 1; + } + return r; +} + +/* + * On ARMv5 and above those functions can be implemented around + * the clz instruction for much better code efficiency. + */ + +static inline int fls(int x) +{ + int ret; + + if (__builtin_constant_p(x)) + return constant_fls(x); + + asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); + ret = 32 - ret; + return ret; +} + +#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) + +/** + * find_first_set_bit - find the first set bit in @word + * @word: the word to search + * + * Returns the bit-number of the first set bit (first bit being 0). + * The input must *not* be zero. + */ +static inline unsigned int find_first_set_bit(unsigned long word) +{ + return ffs(word) - 1; +} + +/** + * hweightN - returns the hamming weight of a N-bit word + * @x: the word to weigh + * + * The Hamming Weight of a number is the total number of bits set in it. + */ +#define hweight64(x) generic_hweight64(x) +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + +#endif /* _ARM_BITOPS_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/bug.h b/xen/include/asm-arm/bug.h new file mode 100644 index 0000000..bc2532c --- /dev/null +++ b/xen/include/asm-arm/bug.h @@ -0,0 +1,15 @@ +#ifndef __ARM_BUG_H__ +#define __ARM_BUG_H__ + +#define BUG() __bug(__FILE__, __LINE__) +#define WARN() __warn(__FILE__, __LINE__) + +#endif /* __X86_BUG_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/byteorder.h b/xen/include/asm-arm/byteorder.h new file mode 100644 index 0000000..f6ad883 --- /dev/null +++ b/xen/include/asm-arm/byteorder.h @@ -0,0 +1,16 @@ +#ifndef __ASM_ARM_BYTEORDER_H__ +#define __ASM_ARM_BYTEORDER_H__ + +#define __BYTEORDER_HAS_U64__ + +#include + +#endif /* __ASM_ARM_BYTEORDER_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/cache.h b/xen/include/asm-arm/cache.h new file mode 100644 index 0000000..41b6291 --- /dev/null +++ b/xen/include/asm-arm/cache.h @@ -0,0 +1,20 @@ +#ifndef __ARCH_ARM_CACHE_H +#define __ARCH_ARM_CACHE_H + +#include + +/* L1 cache line size */ +#define L1_CACHE_SHIFT (CONFIG_ARM_L1_CACHE_SHIFT) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/config.h b/xen/include/asm-arm/config.h new file mode 100644 index 0000000..671ac52 --- /dev/null +++ b/xen/include/asm-arm/config.h @@ -0,0 +1,124 @@ +/****************************************************************************** + * config.h + * + * A Linux-style configuration list. + */ + +#ifndef __ARM_CONFIG_H__ +#define __ARM_CONFIG_H__ + +#define CONFIG_PAGING_LEVELS 3 + +#define CONFIG_ARM 1 + +#define CONFIG_ARM_L1_CACHE_SHIFT 7 /* XXX */ + +#define CONFIG_SMP 1 + +#define CONFIG_DOMAIN_PAGE 1 + +#define OPT_CONSOLE_STR "com1" + +#ifdef MAX_PHYS_CPUS +#define NR_CPUS MAX_PHYS_CPUS +#else +#define NR_CPUS 128 +#endif + +#define MAX_VIRT_CPUS 128 /* XXX */ +#define MAX_HVM_VCPUS MAX_VIRT_CPUS + +#define asmlinkage /* Nothing needed */ + +/* Linkage for ARM */ +#define __ALIGN .align 2 +#define __ALIGN_STR ".align 2" +#ifdef __ASSEMBLY__ +#define ALIGN __ALIGN +#define ALIGN_STR __ALIGN_STR +#define ENTRY(name) \ + .globl name; \ + ALIGN; \ + name: +#define END(name) \ + .size name, .-name +#define ENDPROC(name) \ + .type name, %function; \ + END(name) +#endif + +#define CONFIG_KERNEL_NO_RELOC 1 + +/* + * Memory layout: + * 0 - 2M Unmapped + * 2M - 4M Xen text, data, bss + * 4M - 6M Fixmap: special-purpose 4K mapping slots + * + * 32M - 128M Frametable: 24 bytes per page for 16GB of RAM + * + * 1G - 2G Xenheap: always-mapped memory + * 2G - 4G Domheap: on-demand-mapped + */ + +#define XEN_VIRT_START 0x00200000 +#define FIXMAP_ADDR(n) (0x00400000 + (n) * PAGE_SIZE) +#define FRAMETABLE_VIRT_START 0x02000000 +#define XENHEAP_VIRT_START 0x40000000 +#define DOMHEAP_VIRT_START 0x80000000 + +#define HYPERVISOR_VIRT_START mk_unsigned_long(XEN_VIRT_START) + +#define DOMHEAP_ENTRIES 1024 /* 1024 2MB mapping slots */ + +/* Fixmap slots */ +#define FIXMAP_CONSOLE 0 /* The primary UART */ +#define FIXMAP_PT 1 /* Temporary mappings of pagetable pages */ +#define FIXMAP_MISC 2 /* Ephemeral mappings of hardware */ +#define FIXMAP_GICD 3 /* Interrupt controller: distributor registers */ +#define FIXMAP_GICC1 4 /* Interrupt controller: CPU registers (first page) */ +#define FIXMAP_GICC2 5 /* Interrupt controller: CPU registers (second page) */ +#define FIXMAP_GICH 6 /* Interrupt controller: virtual interface control registers */ + +#define PAGE_SHIFT 12 + +#ifndef __ASSEMBLY__ +#define PAGE_SIZE (1L << PAGE_SHIFT) +#else +#define PAGE_SIZE (1 << PAGE_SHIFT) +#endif +#define PAGE_MASK (~(PAGE_SIZE-1)) +#define PAGE_FLAG_MASK (~0) + +#define STACK_ORDER 3 +#define STACK_SIZE (PAGE_SIZE << STACK_ORDER) + +#ifndef __ASSEMBLY__ +extern unsigned long xen_phys_start; +extern unsigned long xenheap_phys_end; +extern unsigned long frametable_virt_end; +#endif + +#define supervisor_mode_kernel (0) + +#define watchdog_disable() ((void)0) +#define watchdog_enable() ((void)0) + +/* Board-specific: base address of PL011 UART */ +#define EARLY_UART_ADDRESS 0x1c090000 +/* Board-specific: base address of GIC + its regs */ +#define GIC_BASE_ADDRESS 0x2c000000 +#define GIC_DR_OFFSET 0x1000 +#define GIC_CR_OFFSET 0x2000 +#define GIC_HR_OFFSET 0x4000 /* Guess work http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/064219.html */ +#define GIC_VR_OFFSET 0x6000 /* Virtual Machine CPU interface) */ + +#endif /* __ARM_CONFIG_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h new file mode 100644 index 0000000..3a4028d --- /dev/null +++ b/xen/include/asm-arm/cpregs.h @@ -0,0 +1,207 @@ +#ifndef __ASM_ARM_CPREGS_H +#define __ASM_ARM_CPREGS_H + +#include + +/* Co-processor registers */ + +/* Layout as used in assembly, with src/dest registers mixed in */ +#define __CP32(r, coproc, opc1, crn, crm, opc2) coproc, opc1, r, crn, crm, opc2 +#define __CP64(r1, r2, coproc, opc, crm) coproc, opc, r1, r2, crm +#define CP32(r, name...) __CP32(r, name) +#define CP64(r, name...) __CP64(r, name) + +/* Stringified for inline assembly */ +#define LOAD_CP32(r, name...) "mrc " __stringify(CP32(%r, name)) ";" +#define STORE_CP32(r, name...) "mcr " __stringify(CP32(%r, name)) ";" +#define LOAD_CP64(r, name...) "mrrc " __stringify(CP64(%r, %H##r, name)) ";" +#define STORE_CP64(r, name...) "mcrr " __stringify(CP64(%r, %H##r, name)) ";" + +/* C wrappers */ +#define READ_CP32(name...) ({ \ + register uint32_t _r; \ + asm volatile(LOAD_CP32(0, name) : "=r" (_r)); \ + _r; }) + +#define WRITE_CP32(v, name...) do { \ + register uint32_t _r = (v); \ + asm volatile(STORE_CP32(0, name) : : "r" (_r)); \ +} while (0) + +#define READ_CP64(name...) ({ \ + register uint64_t _r; \ + asm volatile(LOAD_CP64(0, name) : "=r" (_r)); \ + _r; }) + +#define WRITE_CP64(v, name...) do { \ + register uint64_t _r = (v); \ + asm volatile(STORE_CP64(0, name) : : "r" (_r)); \ +} while (0) + +#define __HSR_CPREG_c0 0 +#define __HSR_CPREG_c1 1 +#define __HSR_CPREG_c2 2 +#define __HSR_CPREG_c3 3 +#define __HSR_CPREG_c4 4 +#define __HSR_CPREG_c5 5 +#define __HSR_CPREG_c6 6 +#define __HSR_CPREG_c7 7 +#define __HSR_CPREG_c8 8 +#define __HSR_CPREG_c9 9 +#define __HSR_CPREG_c10 10 +#define __HSR_CPREG_c11 11 +#define __HSR_CPREG_c12 12 +#define __HSR_CPREG_c13 13 +#define __HSR_CPREG_c14 14 +#define __HSR_CPREG_c15 15 + +#define __HSR_CPREG_0 0 +#define __HSR_CPREG_1 1 +#define __HSR_CPREG_2 2 +#define __HSR_CPREG_3 3 +#define __HSR_CPREG_4 4 +#define __HSR_CPREG_5 5 +#define __HSR_CPREG_6 6 +#define __HSR_CPREG_7 7 + +#define _HSR_CPREG32(cp,op1,crn,crm,op2) \ + ((__HSR_CPREG_##crn) << HSR_CP32_CRN_SHIFT) | \ + ((__HSR_CPREG_##crm) << HSR_CP32_CRM_SHIFT) | \ + ((__HSR_CPREG_##op1) << HSR_CP32_OP1_SHIFT) | \ + ((__HSR_CPREG_##op2) << HSR_CP32_OP2_SHIFT) + +#define _HSR_CPREG64(cp,op1,crm) \ + ((__HSR_CPREG_##crm) << HSR_CP64_CRM_SHIFT) | \ + ((__HSR_CPREG_##op1) << HSR_CP64_OP1_SHIFT) + +/* Encode a register as per HSR ISS pattern */ +#define HSR_CPREG32(X) _HSR_CPREG32(X) +#define HSR_CPREG64(X) _HSR_CPREG64(X) + +/* + * Order registers by Coprocessor-> CRn-> Opcode 1-> CRm-> Opcode 2 + * + * This matches the ordering used in the ARM as well as the groupings + * which the CP registers are allocated in. + * + * This is slightly different to the form of the instruction + * arguments, which are cp,opc1,crn,crm,opc2. + */ + +/* Coprocessor 15 */ + +/* CP15 CR0: CPUID and Cache Type Registers */ +#define ID_PFR0 p15,0,c0,c1,0 /* Processor Feature Register 0 */ +#define ID_PFR1 p15,0,c0,c1,1 /* Processor Feature Register 1 */ +#define CCSIDR p15,1,c0,c0,0 /* Cache Size ID Registers */ +#define CLIDR p15,1,c0,c0,1 /* Cache Level ID Register */ +#define CSSELR p15,2,c0,c0,0 /* Cache Size Selection Register */ + +/* CP15 CR1: System Control Registers */ +#define SCTLR p15,0,c1,c0,0 /* System Control Register */ +#define SCR p15,0,c1,c1,0 /* Secure Configuration Register */ +#define NSACR p15,0,c1,c1,2 /* Non-Secure Access Control Register */ +#define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */ +#define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */ + +/* CP15 CR2: Translation Table Base and Control Registers */ +#define TTBR0 p15,0,c2,c0,0 /* Translation Table Base Reg. 0 */ +#define TTBR1 p15,0,c2,c0,1 /* Translation Table Base Reg. 1 */ +#define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */ +#define HTTBR p15,4,c2 /* Hyp. Translation Table Base Register */ +#define HTCR p15,4,c2,c0,2 /* Hyp. Translation Control Register */ +#define VTCR p15,4,c2,c1,2 /* Virtualization Translation Control Register */ +#define VTTBR p15,6,c2 /* Virtualization Translation Table Base Register */ + +/* CP15 CR3: Domain Access Control Register */ + +/* CP15 CR4: */ + +/* CP15 CR5: Fault Status Registers */ +#define DFSR p15,0,c5,c0,0 /* Data Fault Status Register */ +#define IFSR p15,0,c5,c0,1 /* Instruction Fault Status Register */ +#define HSR p15,4,c5,c2,0 /* Hyp. Syndrome Register */ + +/* CP15 CR6: Fault Address Registers */ +#define DFAR p15,0,c6,c0,0 /* Data Fault Address Register */ +#define IFAR p15,0,c6,c0,2 /* Instruction Fault Address Register */ +#define HDFAR p15,4,c6,c0,0 /* Hyp. Data Fault Address Register */ +#define HIFAR p15,4,c6,c0,2 /* Hyp. Instruction Fault Address Register */ +#define HPFAR p15,4,c6,c0,4 /* Hyp. IPA Fault Address Register */ + +/* CP15 CR7: Cache and address translation operations */ +#define PAR p15,0,c7 /* Physical Address Register */ +#define ICIALLUIS p15,0,c7,c1,0 /* Invalidate all instruction caches to PoU inner shareable */ +#define BPIALLIS p15,0,c7,c1,6 /* Invalidate entire branch predictor array inner shareable */ +#define ICIALLU p15,0,c7,c5,0 /* Invalidate all instruction caches to PoU */ +#define BPIALL p15,0,c7,c5,6 /* Invalidate entire branch predictor array */ +#define ATS1CPR p15,0,c7,c8,0 /* Address Translation Stage 1. Non-Secure Kernel Read */ +#define ATS1CPW p15,0,c7,c8,1 /* Address Translation Stage 1. Non-Secure Kernel Write */ +#define ATS1CUR p15,0,c7,c8,2 /* Address Translation Stage 1. Non-Secure User Read */ +#define ATS1CUW p15,0,c7,c8,3 /* Address Translation Stage 1. Non-Secure User Write */ +#define ATS12NSOPR p15,0,c7,c8,4 /* Address Translation Stage 1+2 Non-Secure Kernel Read */ +#define ATS12NSOPW p15,0,c7,c8,5 /* Address Translation Stage 1+2 Non-Secure Kernel Write */ +#define ATS12NSOUR p15,0,c7,c8,6 /* Address Translation Stage 1+2 Non-Secure User Read */ +#define ATS12NSOUW p15,0,c7,c8,7 /* Address Translation Stage 1+2 Non-Secure User Write */ +#define DCCMVAC p15,0,c7,c10,1 /* Clean data or unified cache line by MVA to PoC */ +#define DCCISW p15,0,c7,c14,2 /* Clean and invalidate data cache line by set/way */ +#define ATS1HR p15,4,c7,c8,0 /* Address Translation Stage 1 Hyp. Read */ +#define ATS1HW p15,4,c7,c8,1 /* Address Translation Stage 1 Hyp. Write */ + +/* CP15 CR8: TLB maintenance operations */ +#define TLBIALLIS p15,0,c8,c3,0 /* Invalidate entire TLB innrer shareable */ +#define TLBIMVAIS p15,0,c8,c3,1 /* Invalidate unified TLB entry by MVA inner shareable */ +#define TLBIASIDIS p15,0,c8,c3,2 /* Invalidate unified TLB by ASID match inner shareable */ +#define TLBIMVAAIS p15,0,c8,c3,3 /* Invalidate unified TLB entry by MVA all ASID inner shareable */ +#define DTLBIALL p15,0,c8,c6,0 /* Invalidate data TLB */ +#define DTLBIMVA p15,0,c8,c6,1 /* Invalidate data TLB entry by MVA */ +#define DTLBIASID p15,0,c8,c6,2 /* Invalidate data TLB by ASID match */ +#define TLBILLHIS p15,4,c8,c3,0 /* Invalidate Entire Hyp. Unified TLB inner shareable */ +#define TLBIMVAHIS p15,4,c8,c3,1 /* Invalidate Unified Hyp. TLB by MVA inner shareable */ +#define TLBIALLNSNHIS p15,4,c8,c7,4 /* Invalidate Entire Non-Secure Non-Hyp. Unified TLB inner shareable */ +#define TLBIALLH p15,4,c8,c7,0 /* Invalidate Entire Hyp. Unified TLB */ +#define TLBIMVAH p15,4,c8,c7,1 /* Invalidate Unified Hyp. TLB by MVA */ +#define TLBIALLNSNH p15,4,c8,c7,4 /* Invalidate Entire Non-Secure Non-Hyp. Unified TLB */ + +/* CP15 CR9: */ + +/* CP15 CR10: */ +#define MAIR0 p15,0,c10,c2,0 /* Memory Attribute Indirection Register 0 */ +#define MAIR1 p15,0,c10,c2,1 /* Memory Attribute Indirection Register 1 */ +#define HMAIR0 p15,4,c10,c2,0 /* Hyp. Memory Attribute Indirection Register 0 */ +#define HMAIR1 p15,4,c10,c2,1 /* Hyp. Memory Attribute Indirection Register 1 */ + +/* CP15 CR11: DMA Operations for TCM Access */ + +/* CP15 CR12: */ +#define HVBAR p15,4,c12,c0,0 /* Hyp. Vector Base Address Register */ + +/* CP15 CR13: */ +#define FCSEIDR p15,0,c13,c0,0 /* FCSE Process ID Register */ +#define CONTEXTIDR p15,0,c13,c0,1 /* Context ID Register */ + +/* CP15 CR14: */ +#define CNTPCT p15,0,c14 /* Time counter value */ +#define CNTFRQ p15,0,c14,c0,0 /* Time counter frequency */ +#define CNTKCTL p15,0,c14,c1,0 /* Time counter kernel control */ +#define CNTP_TVAL p15,0,c14,c2,0 /* Physical Timer value */ +#define CNTP_CTL p15,0,c14,c2,1 /* Physical Timer control register */ +#define CNTVCT p15,1,c14 /* Time counter value + offset */ +#define CNTP_CVAL p15,2,c14 /* Physical Timer comparator */ +#define CNTVOFF p15,4,c14 /* Time counter offset */ +#define CNTHCTL p15,4,c14,c1,0 /* Time counter hyp. control */ +#define CNTHP_TVAL p15,4,c14,c2,0 /* Hyp. Timer value */ +#define CNTHP_CTL p15,4,c14,c2,1 /* Hyp. Timer control register */ +#define CNTHP_CVAL p15,6,c14 /* Hyp. Timer comparator */ + +/* CP15 CR15: Implementation Defined Registers */ + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/current.h b/xen/include/asm-arm/current.h new file mode 100644 index 0000000..826efa5 --- /dev/null +++ b/xen/include/asm-arm/current.h @@ -0,0 +1,60 @@ +#ifndef __ARM_CURRENT_H__ +#define __ARM_CURRENT_H__ + +#include +#include +#include + +#ifndef __ASSEMBLY__ + +struct vcpu; + +struct cpu_info { + struct cpu_user_regs guest_cpu_user_regs; + unsigned long elr; + unsigned int processor_id; + struct vcpu *current_vcpu; + unsigned long per_cpu_offset; +}; + +static inline struct cpu_info *get_cpu_info(void) +{ + register unsigned long sp asm ("sp"); + return (struct cpu_info *)((sp & ~(STACK_SIZE - 1)) + STACK_SIZE - sizeof(struct cpu_info)); +} + +#define get_current() (get_cpu_info()->current_vcpu) +#define set_current(vcpu) (get_cpu_info()->current_vcpu = (vcpu)) +#define current (get_current()) + +#define get_processor_id() (get_cpu_info()->processor_id) +#define set_processor_id(id) do { \ + struct cpu_info *ci__ = get_cpu_info(); \ + ci__->per_cpu_offset = __per_cpu_offset[ci__->processor_id = (id)]; \ +} while (0) + +#define guest_cpu_user_regs() (&get_cpu_info()->guest_cpu_user_regs) + +#define reset_stack_and_jump(__fn) \ + __asm__ __volatile__ ( \ + "mov sp,%0; b "STR(__fn) \ + : : "r" (guest_cpu_user_regs()) : "memory" ) +#endif + + +/* + * Which VCPU's state is currently running on each CPU? + * This is not necesasrily the same as 'current' as a CPU may be + * executing a lazy state switch. + */ +DECLARE_PER_CPU(struct vcpu *, curr_vcpu); + +#endif /* __ARM_CURRENT_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/debugger.h b/xen/include/asm-arm/debugger.h new file mode 100644 index 0000000..84b2eec --- /dev/null +++ b/xen/include/asm-arm/debugger.h @@ -0,0 +1,15 @@ +#ifndef __ARM_DEBUGGER_H__ +#define __ARM_DEBUGGER_H__ + +#define debugger_trap_fatal(v, r) (0) +#define debugger_trap_immediate() (0) + +#endif /* __ARM_DEBUGGER_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/delay.h b/xen/include/asm-arm/delay.h new file mode 100644 index 0000000..6250774 --- /dev/null +++ b/xen/include/asm-arm/delay.h @@ -0,0 +1,15 @@ +#ifndef _ARM_DELAY_H +#define _ARM_DELAY_H + +extern void __udelay(unsigned long usecs); +#define udelay(n) __udelay(n) + +#endif /* defined(_ARM_DELAY_H) */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/desc.h b/xen/include/asm-arm/desc.h new file mode 100644 index 0000000..3989e8a --- /dev/null +++ b/xen/include/asm-arm/desc.h @@ -0,0 +1,12 @@ +#ifndef __ARCH_DESC_H +#define __ARCH_DESC_H + +#endif /* __ARCH_DESC_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/div64.h b/xen/include/asm-arm/div64.h new file mode 100644 index 0000000..5f23b65 --- /dev/null +++ b/xen/include/asm-arm/div64.h @@ -0,0 +1,241 @@ +/* Taken from Linux arch/arm */ +#ifndef __ASM_ARM_DIV64 +#define __ASM_ARM_DIV64 + +#include +#include + +/* + * The semantics of do_div() are: + * + * uint32_t do_div(uint64_t *n, uint32_t base) + * { + * uint32_t remainder = *n % base; + * *n = *n / base; + * return remainder; + * } + * + * In other words, a 64-bit dividend with a 32-bit divisor producing + * a 64-bit result and a 32-bit remainder. To accomplish this optimally + * we call a special __do_div64 helper with completely non standard + * calling convention for arguments and results (beware). + */ + +#ifdef __ARMEB__ +#define __xh "r0" +#define __xl "r1" +#else +#define __xl "r0" +#define __xh "r1" +#endif + +#define __do_div_asm(n, base) \ +({ \ + register unsigned int __base asm("r4") = base; \ + register unsigned long long __n asm("r0") = n; \ + register unsigned long long __res asm("r2"); \ + register unsigned int __rem asm(__xh); \ + asm( __asmeq("%0", __xh) \ + __asmeq("%1", "r2") \ + __asmeq("%2", "r0") \ + __asmeq("%3", "r4") \ + "bl __do_div64" \ + : "=r" (__rem), "=r" (__res) \ + : "r" (__n), "r" (__base) \ + : "ip", "lr", "cc"); \ + n = __res; \ + __rem; \ +}) + +#if __GNUC__ < 4 + +/* + * gcc versions earlier than 4.0 are simply too problematic for the + * optimized implementation below. First there is gcc PR 15089 that + * tend to trig on more complex constructs, spurious .global __udivsi3 + * are inserted even if none of those symbols are referenced in the + * generated code, and those gcc versions are not able to do constant + * propagation on long long values anyway. + */ +#define do_div(n, base) __do_div_asm(n, base) + +#elif __GNUC__ >= 4 + +#include + +/* + * If the divisor happens to be constant, we determine the appropriate + * inverse at compile time to turn the division into a few inline + * multiplications instead which is much faster. And yet only if compiling + * for ARMv4 or higher (we need umull/umlal) and if the gcc version is + * sufficiently recent to perform proper long long constant propagation. + * (It is unfortunate that gcc doesn't perform all this internally.) + */ +#define do_div(n, base) \ +({ \ + unsigned int __r, __b = (base); \ + if (!__builtin_constant_p(__b) || __b == 0) { \ + /* non-constant divisor (or zero): slow path */ \ + __r = __do_div_asm(n, __b); \ + } else if ((__b & (__b - 1)) == 0) { \ + /* Trivial: __b is constant and a power of 2 */ \ + /* gcc does the right thing with this code. */ \ + __r = n; \ + __r &= (__b - 1); \ + n /= __b; \ + } else { \ + /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ + /* We rely on the fact that most of this code gets */ \ + /* optimized away at compile time due to constant */ \ + /* propagation and only a couple inline assembly */ \ + /* instructions should remain. Better avoid any */ \ + /* code construct that might prevent that. */ \ + unsigned long long __res, __x, __t, __m, __n = n; \ + unsigned int __c, __p, __z = 0; \ + /* preserve low part of n for reminder computation */ \ + __r = __n; \ + /* determine number of bits to represent __b */ \ + __p = 1 << __div64_fls(__b); \ + /* compute __m = ((__p << 64) + __b - 1) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ + /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ + __x = ~0ULL / __b * __b - 1; \ + __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ + __res >>= 32; \ + __res += (__m & 0xffffffff) * (__x >> 32); \ + __t = __res; \ + __res += (__x & 0xffffffff) * (__m >> 32); \ + __t = (__res < __t) ? (1ULL << 32) : 0; \ + __res = (__res >> 32) + __t; \ + __res += (__m >> 32) * (__x >> 32); \ + __res /= __p; \ + /* Now sanitize and optimize what we've got. */ \ + if (~0ULL % (__b / (__b & -__b)) == 0) { \ + /* those cases can be simplified with: */ \ + __n /= (__b & -__b); \ + __m = ~0ULL / (__b / (__b & -__b)); \ + __p = 1; \ + __c = 1; \ + } else if (__res != __x / __b) { \ + /* We can't get away without a correction */ \ + /* to compensate for bit truncation errors. */ \ + /* To avoid it we'd need an additional bit */ \ + /* to represent __m which would overflow it. */ \ + /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ + __c = 1; \ + /* Compute __m = (__p << 64) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += ((~0ULL % __b + 1) * __p) / __b; \ + } else { \ + /* Reduce __m/__p, and try to clear bit 31 */ \ + /* of __m when possible otherwise that'll */ \ + /* need extra overflow handling later. */ \ + unsigned int __bits = -(__m & -__m); \ + __bits |= __m >> 32; \ + __bits = (~__bits) << 1; \ + /* If __bits == 0 then setting bit 31 is */ \ + /* unavoidable. Simply apply the maximum */ \ + /* possible reduction in that case. */ \ + /* Otherwise the MSB of __bits indicates the */ \ + /* best reduction we should apply. */ \ + if (!__bits) { \ + __p /= (__m & -__m); \ + __m /= (__m & -__m); \ + } else { \ + __p >>= __div64_fls(__bits); \ + __m >>= __div64_fls(__bits); \ + } \ + /* No correction needed. */ \ + __c = 0; \ + } \ + /* Now we have a combination of 2 conditions: */ \ + /* 1) whether or not we need a correction (__c), and */ \ + /* 2) whether or not there might be an overflow in */ \ + /* the cross product (__m & ((1<<63) | (1<<31))) */ \ + /* Select the best insn combination to perform the */ \ + /* actual __m * __n / (__p << 64) operation. */ \ + if (!__c) { \ + asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + __res = __m; \ + asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "+&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ + "cmn %Q0, %Q1\n\t" \ + "adcs %R0, %R0, %R1\n\t" \ + "adc %Q0, %3, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n), "r" (__z) \ + : "cc" ); \ + } \ + if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ + "umlal %R0, %Q0, %Q1, %R2\n\t" \ + "mov %R0, #0\n\t" \ + "umlal %Q0, %R0, %R1, %R2" \ + : "+&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ + "umlal %R0, %1, %Q2, %R3\n\t" \ + "mov %R0, #0\n\t" \ + "adds %Q0, %1, %Q0\n\t" \ + "adc %R0, %R0, #0\n\t" \ + "umlal %Q0, %R0, %R2, %R3" \ + : "+&r" (__res), "+&r" (__z) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } \ + __res /= __p; \ + /* The reminder can be computed with 32-bit regs */ \ + /* only, and gcc is good at that. */ \ + { \ + unsigned int __res0 = __res; \ + unsigned int __b0 = __b; \ + __r -= __res0 * __b0; \ + } \ + /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ + n = __res; \ + } \ + __r; \ +}) + +/* our own fls implementation to make sure constant propagation is fine */ +#define __div64_fls(bits) \ +({ \ + unsigned int __left = (bits), __nr = 0; \ + if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ + if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ + if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ + if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ + if (__left & 0x00000002) __nr += 1; \ + __nr; \ +}) + +#endif + +static inline uint64_t div64(uint64_t n, uint32_t base) +{ + do_div(n, base); + return n; +} + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/elf.h b/xen/include/asm-arm/elf.h new file mode 100644 index 0000000..12d487c --- /dev/null +++ b/xen/include/asm-arm/elf.h @@ -0,0 +1,33 @@ +#ifndef __ARM_ELF_H__ +#define __ARM_ELF_H__ + +typedef struct { + unsigned long r0; + unsigned long r1; + unsigned long r2; + unsigned long r3; + unsigned long r4; + unsigned long r5; + unsigned long r6; + unsigned long r7; + unsigned long r8; + unsigned long r9; + unsigned long r10; + unsigned long r11; + unsigned long r12; + unsigned long sp; + unsigned long lr; + unsigned long pc; +} ELF_Gregset; + +#endif /* __ARM_ELF_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/event.h b/xen/include/asm-arm/event.h new file mode 100644 index 0000000..6b2fb7c --- /dev/null +++ b/xen/include/asm-arm/event.h @@ -0,0 +1,41 @@ +#ifndef __ASM_EVENT_H__ +#define __ASM_EVENT_H__ + +void vcpu_kick(struct vcpu *v); +void vcpu_mark_events_pending(struct vcpu *v); + +static inline int local_events_need_delivery(void) +{ + /* TODO + * return (vcpu_info(v, evtchn_upcall_pending) && + !vcpu_info(v, evtchn_upcall_mask)); */ + return 0; +} + +int local_event_delivery_is_enabled(void); + +static inline void local_event_delivery_disable(void) +{ + /* TODO current->vcpu_info->evtchn_upcall_mask = 1; */ +} + +static inline void local_event_delivery_enable(void) +{ + /* TODO current->vcpu_info->evtchn_upcall_mask = 0; */ +} + +/* No arch specific virq definition now. Default to global. */ +static inline int arch_virq_is_global(int virq) +{ + return 1; +} + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h new file mode 100644 index 0000000..c8486fc --- /dev/null +++ b/xen/include/asm-arm/flushtlb.h @@ -0,0 +1,31 @@ +#ifndef __FLUSHTLB_H__ +#define __FLUSHTLB_H__ + +#include + +/* + * Filter the given set of CPUs, removing those that definitely flushed their + * TLB since @page_timestamp. + */ +/* XXX lazy implementation just doesn't clear anything.... */ +#define tlbflush_filter(mask, page_timestamp) \ +do { \ +} while ( 0 ) + +#define tlbflush_current_time() (0) + +/* Flush local TLBs */ +void flush_tlb_local(void); + +/* Flush specified CPUs' TLBs */ +void flush_tlb_mask(const cpumask_t *mask); + +#endif /* __FLUSHTLB_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/grant_table.h b/xen/include/asm-arm/grant_table.h new file mode 100644 index 0000000..8f6ffd8 --- /dev/null +++ b/xen/include/asm-arm/grant_table.h @@ -0,0 +1,35 @@ +#ifndef __ASM_GRANT_TABLE_H__ +#define __ASM_GRANT_TABLE_H__ + +#include + +#define INVALID_GFN (-1UL) +#define INITIAL_NR_GRANT_FRAMES 1 + +void gnttab_clear_flag(unsigned long nr, uint16_t *addr); +int create_grant_host_mapping(unsigned long gpaddr, + unsigned long mfn, unsigned int flags, unsigned int + cache_flags); +#define gnttab_host_mapping_get_page_type(op, d, rd) (0) +int replace_grant_host_mapping(unsigned long gpaddr, unsigned long mfn, + unsigned long new_gpaddr, unsigned int flags); +void gnttab_mark_dirty(struct domain *d, unsigned long l); +#define gnttab_create_status_page(d, t, i) (0) +#define gnttab_create_shared_page(d, t, i) (0) +#define gnttab_shared_gmfn(d, t, i) (0) +#define gnttab_status_gmfn(d, t, i) (0) +#define gnttab_release_host_mappings(domain) 1 +static inline int replace_grant_supported(void) +{ + return 1; +} + +#endif /* __ASM_GRANT_TABLE_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/hardirq.h b/xen/include/asm-arm/hardirq.h new file mode 100644 index 0000000..9c031a8 --- /dev/null +++ b/xen/include/asm-arm/hardirq.h @@ -0,0 +1,28 @@ +#ifndef __ASM_HARDIRQ_H +#define __ASM_HARDIRQ_H + +#include +#include +#include + +typedef struct { + unsigned long __softirq_pending; + unsigned int __local_irq_count; +} __cacheline_aligned irq_cpustat_t; + +#include /* Standard mappings for irq_cpustat_t above */ + +#define in_irq() (local_irq_count(smp_processor_id()) != 0) + +#define irq_enter() (local_irq_count(smp_processor_id())++) +#define irq_exit() (local_irq_count(smp_processor_id())--) + +#endif /* __ASM_HARDIRQ_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/hypercall.h b/xen/include/asm-arm/hypercall.h new file mode 100644 index 0000000..90a87ef --- /dev/null +++ b/xen/include/asm-arm/hypercall.h @@ -0,0 +1,24 @@ +#ifndef __ASM_ARM_HYPERCALL_H__ +#define __ASM_ARM_HYPERCALL_H__ + +#include /* for arch_do_domctl */ + +struct vcpu; +extern long +arch_do_vcpu_op( + int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg); + +extern long +arch_do_sysctl( + struct xen_sysctl *op, + XEN_GUEST_HANDLE(xen_sysctl_t) u_sysctl); + +#endif /* __ASM_ARM_HYPERCALL_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/init.h b/xen/include/asm-arm/init.h new file mode 100644 index 0000000..5f44929 --- /dev/null +++ b/xen/include/asm-arm/init.h @@ -0,0 +1,12 @@ +#ifndef _XEN_ASM_INIT_H +#define _XEN_ASM_INIT_H + +#endif /* _XEN_ASM_INIT_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/io.h b/xen/include/asm-arm/io.h new file mode 100644 index 0000000..1babbab --- /dev/null +++ b/xen/include/asm-arm/io.h @@ -0,0 +1,12 @@ +#ifndef _ASM_IO_H +#define _ASM_IO_H + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/iocap.h b/xen/include/asm-arm/iocap.h new file mode 100644 index 0000000..f647f30 --- /dev/null +++ b/xen/include/asm-arm/iocap.h @@ -0,0 +1,20 @@ +#ifndef __X86_IOCAP_H__ +#define __X86_IOCAP_H__ + +#define cache_flush_permitted(d) \ + (!rangeset_is_empty((d)->iomem_caps)) + +#define multipage_allocation_permitted(d, order) \ + (((order) <= 9) || /* allow 2MB superpages */ \ + !rangeset_is_empty((d)->iomem_caps)) + +#endif + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/multicall.h b/xen/include/asm-arm/multicall.h new file mode 100644 index 0000000..c800940 --- /dev/null +++ b/xen/include/asm-arm/multicall.h @@ -0,0 +1,23 @@ +#ifndef __ASM_ARM_MULTICALL_H__ +#define __ASM_ARM_MULTICALL_H__ + +#define do_multicall_call(_call) \ + do { \ + __asm__ __volatile__ ( \ + ".word 0xe7f000f0@; do_multicall_call\n" \ + " mov r0,#0; @ do_multicall_call\n" \ + " str r0, [r0];\n" \ + : \ + : \ + : ); \ + } while ( 0 ) + +#endif /* __ASM_ARM_MULTICALL_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/nmi.h b/xen/include/asm-arm/nmi.h new file mode 100644 index 0000000..e0f19f9 --- /dev/null +++ b/xen/include/asm-arm/nmi.h @@ -0,0 +1,15 @@ +#ifndef ASM_NMI_H +#define ASM_NMI_H + +#define register_guest_nmi_callback(a) (-ENOSYS) +#define unregister_guest_nmi_callback() (-ENOSYS) + +#endif /* ASM_NMI_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/numa.h b/xen/include/asm-arm/numa.h new file mode 100644 index 0000000..cffee5c --- /dev/null +++ b/xen/include/asm-arm/numa.h @@ -0,0 +1,21 @@ +#ifndef __ARCH_ARM_NUMA_H +#define __ARCH_ARM_NUMA_H + +/* Fake one node for now... */ +#define cpu_to_node(cpu) 0 +#define node_to_cpumask(node) (cpu_online_map) + +static inline __attribute__((pure)) int phys_to_nid(paddr_t addr) +{ + return 0; +} + +#endif /* __ARCH_ARM_NUMA_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/paging.h b/xen/include/asm-arm/paging.h new file mode 100644 index 0000000..4dc340f --- /dev/null +++ b/xen/include/asm-arm/paging.h @@ -0,0 +1,13 @@ +#ifndef _XEN_PAGING_H +#define _XEN_PAGING_H + +#endif /* XEN_PAGING_H */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/percpu.h b/xen/include/asm-arm/percpu.h new file mode 100644 index 0000000..9d369eb --- /dev/null +++ b/xen/include/asm-arm/percpu.h @@ -0,0 +1,28 @@ +#ifndef __ARM_PERCPU_H__ +#define __ARM_PERCPU_H__ + +#ifndef __ASSEMBLY__ +extern char __per_cpu_start[], __per_cpu_data_end[]; +extern unsigned long __per_cpu_offset[NR_CPUS]; +void percpu_init_areas(void); +#endif + +/* Separate out the type, so (int[3], foo) works. */ +#define __DEFINE_PER_CPU(type, name, suffix) \ + __attribute__((__section__(".bss.percpu" #suffix))) \ + __typeof__(type) per_cpu_##name + +#define per_cpu(var, cpu) ((&per_cpu__##var)[cpu?0:0]) +#define __get_cpu_var(var) per_cpu__##var + +#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name + +#endif /* __ARM_PERCPU_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h new file mode 100644 index 0000000..1f85d31 --- /dev/null +++ b/xen/include/asm-arm/processor.h @@ -0,0 +1,269 @@ +#ifndef __ASM_ARM_PROCESSOR_H +#define __ASM_ARM_PROCESSOR_H + +#include + +/* PSR bits (CPSR, SPSR)*/ + +/* 0-4: Mode */ +#define PSR_MODE_MASK 0x1f +#define PSR_MODE_USR 0x10 +#define PSR_MODE_FIQ 0x11 +#define PSR_MODE_IRQ 0x12 +#define PSR_MODE_SVC 0x13 +#define PSR_MODE_MON 0x16 +#define PSR_MODE_ABT 0x17 +#define PSR_MODE_HYP 0x1a +#define PSR_MODE_UND 0x1b +#define PSR_MODE_SYS 0x1f + +#define PSR_THUMB (1<<5) /* Thumb Mode enable */ +#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ +#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ +#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ +#define PSR_BIG_ENDIAN (1<<9) /* Big Endian Mode */ +#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ + +/* TTBCR Translation Table Base Control Register */ +#define TTBCR_N_MASK 0x07 +#define TTBCR_N_16KB 0x00 +#define TTBCR_N_8KB 0x01 +#define TTBCR_N_4KB 0x02 +#define TTBCR_N_2KB 0x03 +#define TTBCR_N_1KB 0x04 + +/* SCTLR System Control Register. */ +/* HSCTLR is a subset of this. */ +#define SCTLR_TE (1<<30) +#define SCTLR_AFE (1<<29) +#define SCTLR_TRE (1<<28) +#define SCTLR_NMFI (1<<27) +#define SCTLR_EE (1<<25) +#define SCTLR_VE (1<<24) +#define SCTLR_U (1<<22) +#define SCTLR_FI (1<<21) +#define SCTLR_WXN (1<<19) +#define SCTLR_HA (1<<17) +#define SCTLR_RR (1<<14) +#define SCTLR_V (1<<13) +#define SCTLR_I (1<<12) +#define SCTLR_Z (1<<11) +#define SCTLR_SW (1<<10) +#define SCTLR_B (1<<7) +#define SCTLR_C (1<<2) +#define SCTLR_A (1<<1) +#define SCTLR_M (1<<0) + +#define SCTLR_BASE 0x00c50078 +#define HSCTLR_BASE 0x30c51878 + +/* HCR Hyp Configuration Register */ +#define HCR_TGE (1<<27) +#define HCR_TVM (1<<26) +#define HCR_TTLB (1<<25) +#define HCR_TPU (1<<24) +#define HCR_TPC (1<<23) +#define HCR_TSW (1<<22) +#define HCR_TAC (1<<21) +#define HCR_TIDCP (1<<20) +#define HCR_TSC (1<<19) +#define HCR_TID3 (1<<18) +#define HCR_TID2 (1<<17) +#define HCR_TID1 (1<<16) +#define HCR_TID0 (1<<15) +#define HCR_TWE (1<<14) +#define HCR_TWI (1<<13) +#define HCR_DC (1<<12) +#define HCR_BSU_MASK (3<<10) +#define HCR_FB (1<<9) +#define HCR_VA (1<<8) +#define HCR_VI (1<<7) +#define HCR_VF (1<<6) +#define HCR_AMO (1<<5) +#define HCR_IMO (1<<4) +#define HCR_FMO (1<<3) +#define HCR_PTW (1<<2) +#define HCR_SWIO (1<<1) +#define HCR_VM (1<<0) + +#define HSR_EC_WFI_WFE 0x01 +#define HSR_EC_CP15_32 0x03 +#define HSR_EC_CP15_64 0x04 +#define HSR_EC_CP14_32 0x05 +#define HSR_EC_CP14_DBG 0x06 +#define HSR_EC_CP 0x07 +#define HSR_EC_CP10 0x08 +#define HSR_EC_JAZELLE 0x09 +#define HSR_EC_BXJ 0x0a +#define HSR_EC_CP14_64 0x0c +#define HSR_EC_SVC 0x11 +#define HSR_EC_HVC 0x12 +#define HSR_EC_INSTR_ABORT_GUEST 0x20 +#define HSR_EC_INSTR_ABORT_HYP 0x21 +#define HSR_EC_DATA_ABORT_GUEST 0x24 +#define HSR_EC_DATA_ABORT_HYP 0x25 + +#ifndef __ASSEMBLY__ +union hsr { + uint32_t bits; + struct { + unsigned long iss:25; /* Instruction Specific Syndrome */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + }; + + struct hsr_cp32 { + unsigned long read:1; /* Direction */ + unsigned long crm:4; /* CRm */ + unsigned long reg:4; /* Rt */ + unsigned long sbzp:1; + unsigned long crn:4; /* CRn */ + unsigned long op1:3; /* Op1 */ + unsigned long op2:3; /* Op2 */ + unsigned long cc:4; /* Condition Code */ + unsigned long ccvalid:1;/* CC Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } cp32; /* HSR_EC_CP15_32, CP14_32, CP10 */ + + struct hsr_cp64 { + unsigned long read:1; /* Direction */ + unsigned long crm:4; /* CRm */ + unsigned long reg1:4; /* Rt1 */ + unsigned long sbzp1:1; + unsigned long reg2:4; /* Rt2 */ + unsigned long sbzp2:2; + unsigned long op1:4; /* Op1 */ + unsigned long cc:4; /* Condition Code */ + unsigned long ccvalid:1;/* CC Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } cp64; /* HSR_EC_CP15_64, HSR_EC_CP14_64 */ + + struct hsr_dabt { + unsigned long dfsc:6; /* Data Fault Status Code */ + unsigned long write:1; /* Write / not Read */ + unsigned long s1ptw:1; /* */ + unsigned long cache:1; /* Cache Maintenance */ + unsigned long eat:1; /* External Abort Type */ + unsigned long sbzp0:6; + unsigned long reg:4; /* Register */ + unsigned long sbzp1:1; + unsigned long sign:1; /* Sign extend */ + unsigned long size:2; /* Access Size */ + unsigned long valid:1; /* Syndrome Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } dabt; /* HSR_EC_DATA_ABORT_* */ +}; +#endif + +/* HSR.EC == HSR_CP{15,14,10}_32 */ +#define HSR_CP32_OP2_MASK (0x000e0000) +#define HSR_CP32_OP2_SHIFT (17) +#define HSR_CP32_OP1_MASK (0x0001c000) +#define HSR_CP32_OP1_SHIFT (14) +#define HSR_CP32_CRN_MASK (0x00003c00) +#define HSR_CP32_CRN_SHIFT (10) +#define HSR_CP32_CRM_MASK (0x0000001e) +#define HSR_CP32_CRM_SHIFT (1) +#define HSR_CP32_REGS_MASK (HSR_CP32_OP1_MASK|HSR_CP32_OP2_MASK|\ + HSR_CP32_CRN_MASK|HSR_CP32_CRM_MASK) + +/* HSR.EC == HSR_CP{15,14}_64 */ +#define HSR_CP64_OP1_MASK (0x000f0000) +#define HSR_CP64_OP1_SHIFT (16) +#define HSR_CP64_CRM_MASK (0x0000001e) +#define HSR_CP64_CRM_SHIFT (1) +#define HSR_CP64_REGS_MASK (HSR_CP64_OP1_MASK|HSR_CP64_CRM_MASK) + +/* Physical Address Register */ +#define PAR_F (1<<0) + +/* .... If F == 1 */ +#define PAR_FSC_SHIFT (1) +#define PAR_FSC_MASK (0x3f< +#include +#include + +#define psr_mode(psr,m) (((psr) & PSR_MODE_MASK) == m) + +#define usr_mode(r) psr_mode((r)->cpsr,PSR_MODE_USR) +#define fiq_mode(r) psr_mode((r)->cpsr,PSR_MODE_FIQ) +#define irq_mode(r) psr_mode((r)->cpsr,PSR_MODE_IRQ) +#define svc_mode(r) psr_mode((r)->cpsr,PSR_MODE_SVC) +#define mon_mode(r) psr_mode((r)->cpsr,PSR_MODE_MON) +#define abt_mode(r) psr_mode((r)->cpsr,PSR_MODE_ABT) +#define hyp_mode(r) psr_mode((r)->cpsr,PSR_MODE_HYP) +#define und_mode(r) psr_mode((r)->cpsr,PSR_MODE_UND) +#define sys_mode(r) psr_mode((r)->cpsr,PSR_MODE_SYS) + +#define guest_mode(r) \ +({ \ + unsigned long diff = (char *)guest_cpu_user_regs() - (char *)(r); \ + /* Frame pointer must point into current CPU stack. */ \ + ASSERT(diff < STACK_SIZE); \ + /* If not a guest frame, it must be a hypervisor frame. */ \ + ASSERT((diff == 0) || hyp_mode(r)); \ + /* Return TRUE if it's a guest frame. */ \ + (diff == 0); \ +}) + +#define return_reg(v) ((v)->arch.user_regs.r0) + +#define CTXT_SWITCH_STACK_BYTES (sizeof(struct cpu_user_regs)) + +#endif /* __ARM_REGS_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/setup.h b/xen/include/asm-arm/setup.h new file mode 100644 index 0000000..c27d438 --- /dev/null +++ b/xen/include/asm-arm/setup.h @@ -0,0 +1,16 @@ +#ifndef __ARM_SETUP_H_ +#define __ARM_SETUP_H_ + +#include + +void arch_get_xen_caps(xen_capabilities_info_t *info); + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/smp.h b/xen/include/asm-arm/smp.h new file mode 100644 index 0000000..9cdd87f --- /dev/null +++ b/xen/include/asm-arm/smp.h @@ -0,0 +1,25 @@ +#ifndef __ASM_SMP_H +#define __ASM_SMP_H + +#ifndef __ASSEMBLY__ +#include +#include +#include +#endif + +DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_mask); +DECLARE_PER_CPU(cpumask_var_t, cpu_core_mask); + +#define cpu_is_offline(cpu) unlikely(!cpu_online(cpu)) + +#define raw_smp_processor_id() (get_processor_id()) + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/softirq.h b/xen/include/asm-arm/softirq.h new file mode 100644 index 0000000..536af38 --- /dev/null +++ b/xen/include/asm-arm/softirq.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SOFTIRQ_H__ +#define __ASM_SOFTIRQ_H__ + +#define VGIC_SOFTIRQ (NR_COMMON_SOFTIRQS + 0) +#define NR_ARCH_SOFTIRQS 1 + +#endif /* __ASM_SOFTIRQ_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/spinlock.h b/xen/include/asm-arm/spinlock.h new file mode 100644 index 0000000..b1825c9 --- /dev/null +++ b/xen/include/asm-arm/spinlock.h @@ -0,0 +1,144 @@ +#ifndef __ASM_SPINLOCK_H +#define __ASM_SPINLOCK_H + +#include +#include + +static inline void dsb_sev(void) +{ + __asm__ __volatile__ ( + "dsb\n" + "sev\n" + ); +} + +typedef struct { + volatile unsigned int lock; +} raw_spinlock_t; + +#define _RAW_SPIN_LOCK_UNLOCKED { 0 } + +#define _raw_spin_is_locked(x) ((x)->lock != 0) + +static always_inline void _raw_spin_unlock(raw_spinlock_t *lock) +{ + ASSERT(_raw_spin_is_locked(lock)); + + smp_mb(); + + __asm__ __volatile__( +" str %1, [%0]\n" + : + : "r" (&lock->lock), "r" (0) + : "cc"); + + dsb_sev(); +} + +static always_inline int _raw_spin_trylock(raw_spinlock_t *lock) +{ + unsigned long tmp; + + __asm__ __volatile__( +" ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&lock->lock), "r" (1) + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } +} + +typedef struct { + volatile unsigned int lock; +} raw_rwlock_t; + +#define _RAW_RW_LOCK_UNLOCKED { 0 } + +static always_inline int _raw_read_trylock(raw_rwlock_t *rw) +{ + unsigned long tmp, tmp2 = 1; + + __asm__ __volatile__( +"1: ldrex %0, [%2]\n" +" adds %0, %0, #1\n" +" strexpl %1, %0, [%2]\n" + : "=&r" (tmp), "+r" (tmp2) + : "r" (&rw->lock) + : "cc"); + + smp_mb(); + return tmp2 == 0; +} + +static always_inline int _raw_write_trylock(raw_rwlock_t *rw) +{ + unsigned long tmp; + + __asm__ __volatile__( +"1: ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&rw->lock), "r" (0x80000000) + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } +} + +static inline void _raw_read_unlock(raw_rwlock_t *rw) +{ + unsigned long tmp, tmp2; + + smp_mb(); + + __asm__ __volatile__( +"1: ldrex %0, [%2]\n" +" sub %0, %0, #1\n" +" strex %1, %0, [%2]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (tmp), "=&r" (tmp2) + : "r" (&rw->lock) + : "cc"); + + if (tmp == 0) + dsb_sev(); +} + +static inline void _raw_write_unlock(raw_rwlock_t *rw) +{ + smp_mb(); + + __asm__ __volatile__( + "str %1, [%0]\n" + : + : "r" (&rw->lock), "r" (0) + : "cc"); + + dsb_sev(); +} + +#define _raw_rw_is_locked(x) ((x)->lock != 0) +#define _raw_rw_is_write_locked(x) ((x)->lock == 0x80000000) + +#endif /* __ASM_SPINLOCK_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/string.h b/xen/include/asm-arm/string.h new file mode 100644 index 0000000..f2d643d --- /dev/null +++ b/xen/include/asm-arm/string.h @@ -0,0 +1,38 @@ +#ifndef __ARM_STRING_H__ +#define __ARM_STRING_H__ + +#include + +#define __HAVE_ARCH_MEMCPY +extern void * memcpy(void *, const void *, __kernel_size_t); + +/* Some versions of gcc don't have this builtin. It's non-critical anyway. */ +#define __HAVE_ARCH_MEMMOVE +extern void *memmove(void *dest, const void *src, size_t n); + +#define __HAVE_ARCH_MEMSET +extern void * memset(void *, int, __kernel_size_t); + +extern void __memzero(void *ptr, __kernel_size_t n); + +#define memset(p,v,n) \ + ({ \ + void *__p = (p); size_t __n = n; \ + if ((__n) != 0) { \ + if (__builtin_constant_p((v)) && (v) == 0) \ + __memzero((__p),(__n)); \ + else \ + memset((__p),(v),(__n)); \ + } \ + (__p); \ + }) + +#endif /* __ARM_STRING_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h new file mode 100644 index 0000000..731d89f --- /dev/null +++ b/xen/include/asm-arm/system.h @@ -0,0 +1,202 @@ +/* Portions taken from Linux arch arm */ +#ifndef __ASM_SYSTEM_H +#define __ASM_SYSTEM_H + +#include +#include + +#define nop() \ + asm volatile ( "nop" ) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + +#define isb() __asm__ __volatile__ ("isb" : : : "memory") +#define dsb() __asm__ __volatile__ ("dsb" : : : "memory") +#define dmb() __asm__ __volatile__ ("dmb" : : : "memory") + +#define mb() dsb() +#define rmb() dsb() +#define wmb() mb() + +#define smp_mb() dmb() +#define smp_rmb() dmb() +#define smp_wmb() dmb() + +/* + * This is used to ensure the compiler did actually allocate the register we + * asked it for some inline assembly sequences. Apparently we can't trust + * the compiler from one version to another so a bit of paranoia won't hurt. + * This string is meant to be concatenated with the inline asm string and + * will cause compilation to stop on mismatch. + * (for details, see gcc PR 15089) + */ +#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" + +extern void __bad_xchg(volatile void *, int); + +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) +{ + unsigned long ret; + unsigned int tmp; + + smp_mb(); + + switch (size) { + case 1: + asm volatile("@ __xchg1\n" + "1: ldrexb %0, [%3]\n" + " strexb %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + case 4: + asm volatile("@ __xchg4\n" + "1: ldrex %0, [%3]\n" + " strex %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + default: + __bad_xchg(ptr, size), ret = 0; + break; + } + smp_mb(); + + return ret; +} + +/* + * Atomic compare and exchange. Compare OLD with MEM, if identical, + * store NEW in MEM. Return the initial value in MEM. Success is + * indicated by comparing RETURN with OLD. + */ + +extern void __bad_cmpxchg(volatile void *ptr, int size); + +static always_inline unsigned long __cmpxchg( + volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + unsigned long /*long*/ oldval, res; + + switch (size) { + case 1: + do { + asm volatile("@ __cmpxchg1\n" + " ldrexb %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexbeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; + case 2: + do { + asm volatile("@ __cmpxchg2\n" + " ldrexh %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexheq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; + case 4: + do { + asm volatile("@ __cmpxchg4\n" + " ldrex %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; +#if 0 + case 8: + do { + asm volatile("@ __cmpxchg8\n" + " ldrexd %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexdeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; +#endif + default: + __bad_cmpxchg(ptr, size); + oldval = 0; + } + + return oldval; +} +#define cmpxchg(ptr,o,n) \ + ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o), \ + (unsigned long)(n),sizeof(*(ptr)))) + +#define local_irq_disable() asm volatile ( "cpsid i @ local_irq_disable\n" : : : "cc" ) +#define local_irq_enable() asm volatile ( "cpsie i @ local_irq_enable\n" : : : "cc" ) + +#define local_save_flags(x) \ +({ \ + BUILD_BUG_ON(sizeof(x) != sizeof(long)); \ + asm volatile ( "mrs %0, cpsr @ local_save_flags\n" \ + : "=r" (x) :: "memory", "cc" ); \ +}) +#define local_irq_save(x) \ +({ \ + local_save_flags(x); \ + local_irq_disable(); \ +}) +#define local_irq_restore(x) \ +({ \ + BUILD_BUG_ON(sizeof(x) != sizeof(long)); \ + asm volatile ( \ + "msr cpsr_c, %0 @ local_irq_restore\n" \ + : \ + : "r" (flags) \ + : "memory", "cc"); \ +}) + +static inline int local_irq_is_enabled(void) +{ + unsigned long flags; + local_save_flags(flags); + return !(flags & PSR_IRQ_MASK); +} + +#define local_fiq_enable() __asm__("cpsie f @ __stf\n" : : : "memory", "cc") +#define local_fiq_disable() __asm__("cpsid f @ __clf\n" : : : "memory", "cc") + +#define local_abort_enable() __asm__("cpsie a @ __sta\n" : : : "memory", "cc") +#define local_abort_disable() __asm__("cpsid a @ __sta\n" : : : "memory", "cc") + +static inline int local_fiq_is_enabled(void) +{ + unsigned long flags; + local_save_flags(flags); + return !!(flags & PSR_FIQ_MASK); +} + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/trace.h b/xen/include/asm-arm/trace.h new file mode 100644 index 0000000..db84541 --- /dev/null +++ b/xen/include/asm-arm/trace.h @@ -0,0 +1,12 @@ +#ifndef __ASM_TRACE_H__ +#define __ASM_TRACE_H__ + +#endif /* __ASM_TRACE_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/types.h b/xen/include/asm-arm/types.h new file mode 100644 index 0000000..48864f9 --- /dev/null +++ b/xen/include/asm-arm/types.h @@ -0,0 +1,57 @@ +#ifndef __ARM_TYPES_H__ +#define __ARM_TYPES_H__ + +#ifndef __ASSEMBLY__ + +#include + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; +typedef u64 paddr_t; +#define INVALID_PADDR (~0ULL) +#define PRIpaddr "016llx" + +typedef unsigned long size_t; + +typedef char bool_t; +#define test_and_set_bool(b) xchg(&(b), 1) +#define test_and_clear_bool(b) xchg(&(b), 0) + +#endif /* __ASSEMBLY__ */ + +#define BITS_PER_LONG 32 +#define BYTES_PER_LONG 4 +#define LONG_BYTEORDER 2 + +#endif /* __ARM_TYPES_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/xenoprof.h b/xen/include/asm-arm/xenoprof.h new file mode 100644 index 0000000..131ac13 --- /dev/null +++ b/xen/include/asm-arm/xenoprof.h @@ -0,0 +1,12 @@ +#ifndef __ASM_XENOPROF_H__ +#define __ASM_XENOPROF_H__ + +#endif /* __ASM_XENOPROF_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h new file mode 100644 index 0000000..4d1daa9 --- /dev/null +++ b/xen/include/public/arch-arm.h @@ -0,0 +1,125 @@ +/****************************************************************************** + * arch-arm.h + * + * Guest OS interface to ARM Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright 2011 (C) Citrix Systems + */ + +#ifndef __XEN_PUBLIC_ARCH_ARM_H__ +#define __XEN_PUBLIC_ARCH_ARM_H__ + +#ifndef __ASSEMBLY__ +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef struct { type *p; } __guest_handle_ ## name + +#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ + ___DEFINE_XEN_GUEST_HANDLE(name, type); \ + ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) +#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) +#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name +#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) +#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0) +#ifdef __XEN_TOOLS__ +#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) +#endif +#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) + +struct cpu_user_regs +{ + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + union { + uint32_t r11; + uint32_t fp; + }; + uint32_t r12; + + uint32_t sp; /* r13 - SP: Valid for Hyp. frames only, o/w banked (see below) */ + uint32_t lr; /* r14 - LR: Valid for Hyp. Same physical register as lr_usr. */ + + uint32_t pc; /* Return IP */ + uint32_t cpsr; /* Return mode */ + uint32_t pad0; /* Doubleword-align the kernel half of the frame */ + + /* Outer guest frame only from here on... */ + + uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq; + + uint32_t sp_usr, sp_svc, sp_abt, sp_und, sp_irq, sp_fiq; + uint32_t lr_usr, lr_svc, lr_abt, lr_und, lr_irq, lr_fiq; + + uint32_t spsr_svc, spsr_abt, spsr_und, spsr_irq, spsr_fiq; +}; +typedef struct cpu_user_regs cpu_user_regs_t; +DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t); + +typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn PRIx64 + +/* Maximum number of virtual CPUs in legacy multi-processor guests. */ +/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ +#define XEN_LEGACY_MAX_VCPUS 1 + +typedef uint32_t xen_ulong_t; + +struct vcpu_guest_context { + struct cpu_user_regs user_regs; /* User-level CPU registers */ + union { + uint32_t reg[16]; + struct { + uint32_t __pad[12]; + uint32_t sp; /* r13 */ + uint32_t lr; /* r14 */ + uint32_t pc; /* r15 */ + }; + }; +}; +typedef struct vcpu_guest_context vcpu_guest_context_t; +DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); + +struct arch_vcpu_info { }; +typedef struct arch_vcpu_info arch_vcpu_info_t; + +struct arch_shared_info { }; +typedef struct arch_shared_info arch_shared_info_t; +#endif + +#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index fde9fa5..7196400 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -33,6 +33,8 @@ #include "arch-x86/xen.h" #elif defined(__ia64__) #include "arch-ia64.h" +#elif defined(__arm__) +#include "arch-arm.h" #else #error "Unsupported architecture" #endif -- 1.7.2.5 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Wed Dec 07 16:29:19 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 07 Dec 2011 16:29:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RYKMd-0000M5-DJ; Wed, 07 Dec 2011 16:28:59 +0000 Received: from mail21.messagelabs.com ([85.158.143.35]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RYKMb-0000LG-Kk for xen-devel@lists.xensource.com; Wed, 07 Dec 2011 16:28:58 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-15.tower-21.messagelabs.com!1323275290!7310616!1 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiA5MjA3NQ==\n X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6068 invoked from network); 7 Dec 2011 16:28:10 -0000 Received: from smtp.ctxuk.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-15.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 7 Dec 2011 16:28:10 -0000 X-IronPort-AV: E=Sophos;i="4.71,314,1320624000"; d="scan'208";a="9347120" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 07 Dec 2011 16:28:00 +0000 Received: from [10.80.2.42] (10.80.2.42) by LONPMAILMX01.citrite.net (10.30.203.162) with Microsoft SMTP Server id 8.3.213.0; Wed, 7 Dec 2011 16:28:00 +0000 From: Ian Campbell To: Ian Jackson Date: Wed, 7 Dec 2011 16:28:00 +0000 In-Reply-To: <1323108621-22654-13-git-send-email-ian.jackson@eu.citrix.com> References: <1323108621-22654-1-git-send-email-ian.jackson@eu.citrix.com> <1323108621-22654-13-git-send-email-ian.jackson@eu.citrix.com> Organization: Citrix Systems, Inc. X-Mailer: Evolution 3.0.3- Message-ID: <1323275280.2969.3.camel@zakaz.uk.xensource.com> MIME-Version: 1.0 Cc: "xen-devel@lists.xensource.com" Subject: Re: [Xen-devel] [PATCH 12/15] libxl: Use GC_INIT and GC_FREE everywhere X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com On Mon, 2011-12-05 at 18:10 +0000, Ian Jackson wrote: > Replace > libxl__gc gc = LIBXL_INIT_GC(ctx); > ... > libxl__free_all(&gc); > with > GC_INIT(ctx); > ... > GC_FREE; I suppose this really relates to the earlier patch which adds these macros but wouldn't "GC_FREE();" be nicer? > throughout with a couple of perl runes. > > We must then adjust uses of the resulting gc for pointerness, which is > mostly just replacing all occurrences of "&gc" with "gc". BTW I really like this aspect of the change since one big annoyance when making an exiting internal function into an external one (or vice versa) is the need to frob all the uses of gc... Ian. > Also a > couple of unusual uses of LIBXL_INIT_GC needed to be fixed up by hand. > > Here are those runes: > perl -i -pe 's/\Q libxl__gc gc = LIBXL_INIT_GC(ctx);/ GC_INIT(ctx);/' tools/libxl/*.c > perl -i -pe 's/\Q libxl__free_all(&gc);/ GC_FREE;/' tools/libxl/*.c > > Signed-off-by: Ian Jackson > --- > tools/libxl/libxl.c | 590 ++++++++++++++++++++-------------------- > tools/libxl/libxl_bootloader.c | 14 +- > tools/libxl/libxl_create.c | 12 +- > tools/libxl/libxl_dom.c | 16 +- > tools/libxl/libxl_pci.c | 34 ++-- > tools/libxl/libxl_qmp.c | 32 +- > tools/libxl/libxl_utils.c | 36 ++-- > 7 files changed, 367 insertions(+), 367 deletions(-) > > diff --git a/tools/libxl/libxl.c b/tools/libxl/libxl.c > index 7488538..3a8cfe3 100644 > --- a/tools/libxl/libxl.c > +++ b/tools/libxl/libxl.c > @@ -232,19 +232,19 @@ int libxl__domain_rename(libxl__gc *gc, uint32_t domid, > int libxl_domain_rename(libxl_ctx *ctx, uint32_t domid, > const char *old_name, const char *new_name) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > - rc = libxl__domain_rename(&gc, domid, old_name, new_name, XBT_NULL); > - libxl__free_all(&gc); > + rc = libxl__domain_rename(gc, domid, old_name, new_name, XBT_NULL); > + GC_FREE; > return rc; > } > > int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc = 0; > > - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { > + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { > LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, "Called domain_resume on " > "non-cooperative hvm domain %u", domid); > rc = ERROR_NI; > @@ -264,7 +264,7 @@ int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) > rc = ERROR_FAIL; > } > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -277,7 +277,7 @@ out: > int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, > libxl_domain_create_info *info, const char *name_suffix, libxl_uuid new_uuid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > struct xs_permissions roperm[2]; > xs_transaction_t t; > char *preserved_name; > @@ -287,27 +287,27 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, > > int rc; > > - preserved_name = libxl__sprintf(&gc, "%s%s", info->name, name_suffix); > + preserved_name = libxl__sprintf(gc, "%s%s", info->name, name_suffix); > if (!preserved_name) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_NOMEM; > } > > - uuid_string = libxl__uuid2string(&gc, new_uuid); > + uuid_string = libxl__uuid2string(gc, new_uuid); > if (!uuid_string) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_NOMEM; > } > > - dom_path = libxl__xs_get_dompath(&gc, domid); > + dom_path = libxl__xs_get_dompath(gc, domid); > if (!dom_path) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > - vm_path = libxl__sprintf(&gc, "/vm/%s", uuid_string); > + vm_path = libxl__sprintf(gc, "/vm/%s", uuid_string); > if (!vm_path) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > @@ -323,20 +323,20 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, > xs_mkdir(ctx->xsh, t, vm_path); > xs_set_permissions(ctx->xsh, t, vm_path, roperm, ARRAY_SIZE(roperm)); > > - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); > - rc = libxl__domain_rename(&gc, domid, info->name, preserved_name, t); > + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); > + rc = libxl__domain_rename(gc, domid, info->name, preserved_name, t); > if (rc) { > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); > + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); > > if (!xs_transaction_end(ctx->xsh, t, 0)) > if (errno == EAGAIN) > goto retry_transaction; > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > @@ -478,16 +478,16 @@ libxl_vminfo * libxl_list_vm(libxl_ctx *ctx, int *nb_vm) > int libxl_domain_suspend(libxl_ctx *ctx, libxl_domain_suspend_info *info, > uint32_t domid, int fd) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > - libxl_domain_type type = libxl__domain_type(&gc, domid); > + GC_INIT(ctx); > + libxl_domain_type type = libxl__domain_type(gc, domid); > int live = info != NULL && info->flags & XL_SUSPEND_LIVE; > int debug = info != NULL && info->flags & XL_SUSPEND_DEBUG; > int rc = 0; > > - rc = libxl__domain_suspend_common(&gc, domid, fd, type, live, debug); > + rc = libxl__domain_suspend_common(gc, domid, fd, type, live, debug); > if (!rc && type == LIBXL_DOMAIN_TYPE_HVM) > - rc = libxl__domain_save_device_model(&gc, domid, fd); > - libxl__free_all(&gc); > + rc = libxl__domain_save_device_model(gc, domid, fd); > + GC_FREE; > return rc; > } > > @@ -517,17 +517,17 @@ int libxl_domain_core_dump(libxl_ctx *ctx, uint32_t domid, > > int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *path; > char *state; > int ret, rc = 0; > > - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { > - path = libxl__sprintf(&gc, "/local/domain/0/device-model/%d/state", domid); > - state = libxl__xs_read(&gc, XBT_NULL, path); > + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { > + path = libxl__sprintf(gc, "/local/domain/0/device-model/%d/state", domid); > + state = libxl__xs_read(gc, XBT_NULL, path); > if (state != NULL && !strcmp(state, "paused")) { > - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/0/device-model/%d/command", domid), "continue"); > - libxl__wait_for_device_model(&gc, domid, "running", > + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/0/device-model/%d/command", domid), "continue"); > + libxl__wait_for_device_model(gc, domid, "running", > NULL, NULL, NULL); > } > } > @@ -536,7 +536,7 @@ int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "unpausing domain %d", domid); > rc = ERROR_FAIL; > } > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -550,42 +550,42 @@ static char *req_table[] = { > > int libxl_domain_shutdown(libxl_ctx *ctx, uint32_t domid, int req) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *shutdown_path; > char *dom_path; > > if (req > ARRAY_SIZE(req_table)) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_INVAL; > } > > - dom_path = libxl__xs_get_dompath(&gc, domid); > + dom_path = libxl__xs_get_dompath(gc, domid); > if (!dom_path) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { > + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { > unsigned long pvdriver = 0; > int ret; > ret = xc_get_hvm_param(ctx->xch, domid, HVM_PARAM_CALLBACK_IRQ, &pvdriver); > if (ret<0) { > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting HVM callback IRQ"); > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > if (!pvdriver) { > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "HVM domain without PV drivers:" > " graceful shutdown not possible, use destroy"); > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > } > > - shutdown_path = libxl__sprintf(&gc, "%s/control/shutdown", dom_path); > + shutdown_path = libxl__sprintf(gc, "%s/control/shutdown", dom_path); > xs_write(ctx->xsh, XBT_NULL, shutdown_path, req_table[req], strlen(req_table[req])); > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > @@ -607,7 +607,7 @@ int libxl_wait_for_domain_death(libxl_ctx *ctx, uint32_t domid, libxl_waiter *wa > > int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_device_disk *disks, int num_disks, libxl_waiter *waiter) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int i, rc = -1; > uint32_t domid = libxl_get_stubdom_id(ctx, guest_domid); > > @@ -616,7 +616,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic > > for (i = 0; i < num_disks; i++) { > if (asprintf(&(waiter[i].path), "%s/device/vbd/%d/eject", > - libxl__xs_get_dompath(&gc, domid), > + libxl__xs_get_dompath(gc, domid), > libxl__device_disk_dev_number(disks[i].vdev, > NULL, NULL)) < 0) > goto out; > @@ -626,7 +626,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic > } > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -680,22 +680,22 @@ int libxl_event_get_domain_death_info(libxl_ctx *ctx, uint32_t domid, libxl_even > > int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event *event, libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *path; > char *backend; > char *value; > char backend_type[BACKEND_STRING_SIZE+1]; > > - value = libxl__xs_read(&gc, XBT_NULL, event->path); > + value = libxl__xs_read(gc, XBT_NULL, event->path); > > if (!value || strcmp(value, "eject")) { > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > path = strdup(event->path); > path[strlen(path) - 6] = '\0'; > - backend = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend", path)); > + backend = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend", path)); > > sscanf(backend, > "/local/domain/%d/backend/%" TOSTRING(BACKEND_STRING_SIZE) "[a-z]/%*d/%*d", > @@ -711,19 +711,19 @@ int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event > disk->pdev_path = strdup(""); > disk->format = LIBXL_DISK_FORMAT_EMPTY; > /* this value is returned to the user: do not free right away */ > - disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "%s/dev", backend), NULL); > + disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "%s/dev", backend), NULL); > disk->removable = 1; > disk->readwrite = 0; > disk->is_cdrom = 1; > > free(path); > - libxl__free_all(&gc); > + GC_FREE; > return 1; > } > > int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl_dominfo dominfo; > char *dom_path; > char *vm_path; > @@ -740,40 +740,40 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) > return rc; > } > > - switch (libxl__domain_type(&gc, domid)) { > + switch (libxl__domain_type(gc, domid)) { > case LIBXL_DOMAIN_TYPE_HVM: > dm_present = 1; > break; > case LIBXL_DOMAIN_TYPE_PV: > - pid = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/%d/image/device-model-pid", domid)); > + pid = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/%d/image/device-model-pid", domid)); > dm_present = (pid != NULL); > break; > default: > abort(); > } > > - dom_path = libxl__xs_get_dompath(&gc, domid); > + dom_path = libxl__xs_get_dompath(gc, domid); > if (!dom_path) { > rc = ERROR_FAIL; > goto out; > } > > - if (libxl__device_pci_destroy_all(&gc, domid) < 0) > + if (libxl__device_pci_destroy_all(gc, domid) < 0) > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "pci shutdown failed for domid %d", domid); > rc = xc_domain_pause(ctx->xch, domid); > if (rc < 0) { > LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "xc_domain_pause failed for %d", domid); > } > if (dm_present) { > - if (libxl__destroy_device_model(&gc, domid) < 0) > + if (libxl__destroy_device_model(gc, domid) < 0) > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl__destroy_device_model failed for %d", domid); > > - libxl__qmp_cleanup(&gc, domid); > + libxl__qmp_cleanup(gc, domid); > } > - if (libxl__devices_destroy(&gc, domid, force) < 0) > + if (libxl__devices_destroy(gc, domid, force) < 0) > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl_devices_dispose failed for %d", domid); > > - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); > + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); > if (vm_path) > if (!xs_rm(ctx->xsh, XBT_NULL, vm_path)) > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", vm_path); > @@ -781,9 +781,9 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) > if (!xs_rm(ctx->xsh, XBT_NULL, dom_path)) > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", dom_path); > > - xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(&gc, domid)); > + xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(gc, domid)); > > - libxl__userdata_destroyall(&gc, domid); > + libxl__userdata_destroyall(gc, domid); > > rc = xc_domain_destroy(ctx->xch, domid); > if (rc < 0) { > @@ -793,16 +793,16 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) > } > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_console_type type) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > - char *p = libxl__sprintf(&gc, "%s/xenconsole", libxl_private_bindir_path()); > - char *domid_s = libxl__sprintf(&gc, "%d", domid); > - char *cons_num_s = libxl__sprintf(&gc, "%d", cons_num); > + GC_INIT(ctx); > + char *p = libxl__sprintf(gc, "%s/xenconsole", libxl_private_bindir_path()); > + char *domid_s = libxl__sprintf(gc, "%d", domid); > + char *cons_num_s = libxl__sprintf(gc, "%d", cons_num); > char *cons_type_s; > > switch (type) { > @@ -819,20 +819,20 @@ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_conso > execl(p, p, domid_s, "--num", cons_num_s, "--type", cons_type_s, (void *)NULL); > > out: > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > uint32_t stubdomid = libxl_get_stubdom_id(ctx, domid_vm); > int rc; > if (stubdomid) > rc = libxl_console_exec(ctx, stubdomid, > STUBDOM_CONSOLE_SERIAL, LIBXL_CONSOLE_TYPE_PV); > else { > - switch (libxl__domain_type(&gc, domid_vm)) { > + switch (libxl__domain_type(gc, domid_vm)) { > case LIBXL_DOMAIN_TYPE_HVM: > rc = libxl_console_exec(ctx, domid_vm, 0, LIBXL_CONSOLE_TYPE_SERIAL); > break; > @@ -843,13 +843,13 @@ int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) > abort(); > } > } > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > const char *vnc_port; > const char *vnc_listen = NULL, *vnc_pass = NULL; > int port = 0, autopass_fd = -1; > @@ -860,19 +860,19 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) > NULL, > }; > > - vnc_port = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, > + vnc_port = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, > "/local/domain/%d/console/vnc-port", domid)); > if ( vnc_port ) > port = atoi(vnc_port) - 5900; > > - vnc_listen = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, > + vnc_listen = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, > "/local/domain/%d/console/vnc-listen", domid)); > > if ( autopass ) > - vnc_pass = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, > + vnc_pass = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, > "/local/domain/%d/console/vnc-pass", domid)); > > if ( NULL == vnc_listen ) > @@ -881,7 +881,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) > if ( (vnc_bin = getenv("VNCVIEWER")) ) > args[0] = vnc_bin; > > - args[1] = libxl__sprintf(&gc, "%s:%d", vnc_listen, port); > + args[1] = libxl__sprintf(gc, "%s:%d", vnc_listen, port); > > if ( vnc_pass ) { > char tmpname[] = "/tmp/vncautopass.XXXXXX"; > @@ -916,7 +916,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) > abort(); > > x_fail: > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > @@ -970,17 +970,17 @@ static int libxl__device_from_disk(libxl__gc *gc, uint32_t domid, > > int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > flexarray_t *front; > flexarray_t *back; > char *dev; > libxl__device device; > int major, minor, rc; > > - rc = libxl__device_disk_set_backend(&gc, disk); > + rc = libxl__device_disk_set_backend(gc, disk); > if (rc) goto out; > > - rc = libxl__device_disk_set_backend(&gc, disk); > + rc = libxl__device_disk_set_backend(gc, disk); > if (rc) goto out; > > front = flexarray_make(16, 1); > @@ -1001,7 +1001,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > goto out_free; > } > > - rc = libxl__device_from_disk(&gc, domid, disk, &device); > + rc = libxl__device_from_disk(gc, domid, disk, &device); > if (rc != 0) { > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Invalid or unsupported" > " virtual disk identifier %s", disk->vdev); > @@ -1014,7 +1014,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > do_backend_phy: > libxl__device_physdisk_major_minor(dev, &major, &minor); > flexarray_append(back, "physical-device"); > - flexarray_append(back, libxl__sprintf(&gc, "%x:%x", major, minor)); > + flexarray_append(back, libxl__sprintf(gc, "%x:%x", major, minor)); > > flexarray_append(back, "params"); > flexarray_append(back, dev); > @@ -1022,13 +1022,13 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > assert(device.backend_kind == LIBXL__DEVICE_KIND_VBD); > break; > case LIBXL_DISK_BACKEND_TAP: > - dev = libxl__blktap_devpath(&gc, disk->pdev_path, disk->format); > + dev = libxl__blktap_devpath(gc, disk->pdev_path, disk->format); > if (!dev) { > rc = ERROR_FAIL; > goto out_free; > } > flexarray_append(back, "tapdisk-params"); > - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", > + flexarray_append(back, libxl__sprintf(gc, "%s:%s", > libxl__device_disk_string_of_format(disk->format), > disk->pdev_path)); > > @@ -1036,7 +1036,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > goto do_backend_phy; > case LIBXL_DISK_BACKEND_QDISK: > flexarray_append(back, "params"); > - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", > + flexarray_append(back, libxl__sprintf(gc, "%s:%s", > libxl__device_disk_string_of_format(disk->format), disk->pdev_path)); > assert(device.backend_kind == LIBXL__DEVICE_KIND_QDISK); > break; > @@ -1047,15 +1047,15 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > } > > flexarray_append(back, "frontend-id"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); > + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); > flexarray_append(back, "online"); > flexarray_append(back, "1"); > flexarray_append(back, "removable"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", (disk->removable) ? 1 : 0)); > + flexarray_append(back, libxl__sprintf(gc, "%d", (disk->removable) ? 1 : 0)); > flexarray_append(back, "bootable"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); > flexarray_append(back, "state"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); > flexarray_append(back, "dev"); > flexarray_append(back, disk->vdev); > flexarray_append(back, "type"); > @@ -1066,17 +1066,17 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis > flexarray_append(back, disk->is_cdrom ? "cdrom" : "disk"); > > flexarray_append(front, "backend-id"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", disk->backend_domid)); > + flexarray_append(front, libxl__sprintf(gc, "%d", disk->backend_domid)); > flexarray_append(front, "state"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); > flexarray_append(front, "virtual-device"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", device.devid)); > + flexarray_append(front, libxl__sprintf(gc, "%d", device.devid)); > flexarray_append(front, "device-type"); > flexarray_append(front, disk->is_cdrom ? "cdrom" : "disk"); > > - libxl__device_generic_add(&gc, &device, > - libxl__xs_kvs_of_flexarray(&gc, back, back->count), > - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); > + libxl__device_generic_add(gc, &device, > + libxl__xs_kvs_of_flexarray(gc, back, back->count), > + libxl__xs_kvs_of_flexarray(gc, front, front->count)); > > rc = 0; > > @@ -1084,39 +1084,39 @@ out_free: > flexarray_free(back); > flexarray_free(front); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_disk_remove(libxl_ctx *ctx, uint32_t domid, > libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_disk(&gc, domid, disk, &device); > + rc = libxl__device_from_disk(gc, domid, disk, &device); > if (rc != 0) goto out; > > - rc = libxl__device_remove(&gc, &device, 1); > + rc = libxl__device_remove(gc, &device, 1); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_disk_destroy(libxl_ctx *ctx, uint32_t domid, > libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_disk(&gc, domid, disk, &device); > + rc = libxl__device_from_disk(gc, domid, disk, &device); > if (rc != 0) goto out; > > - rc = libxl__device_destroy(&gc, &device); > + rc = libxl__device_destroy(gc, &device); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1168,27 +1168,27 @@ static void libxl__device_disk_from_xs_be(libxl__gc *gc, > int libxl_devid_to_device_disk(libxl_ctx *ctx, uint32_t domid, > int devid, libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *dompath, *path; > int rc = ERROR_FAIL; > > libxl_device_disk_init(ctx, disk); > > - dompath = libxl__xs_get_dompath(&gc, domid); > + dompath = libxl__xs_get_dompath(gc, domid); > if (!dompath) { > goto out; > } > - path = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, "%s/device/vbd/%d/backend", > + path = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, "%s/device/vbd/%d/backend", > dompath, devid)); > if (!path) > goto out; > > - libxl__device_disk_from_xs_be(&gc, path, disk); > + libxl__device_disk_from_xs_be(gc, path, disk); > > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1228,22 +1228,22 @@ static int libxl__append_disk_list_of_type(libxl__gc *gc, > > libxl_device_disk *libxl_device_disk_list(libxl_ctx *ctx, uint32_t domid, int *num) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl_device_disk *disks = NULL; > int rc; > > *num = 0; > > - rc = libxl__append_disk_list_of_type(&gc, domid, "vbd", &disks, num); > + rc = libxl__append_disk_list_of_type(gc, domid, "vbd", &disks, num); > if (rc) goto out_err; > > - rc = libxl__append_disk_list_of_type(&gc, domid, "tap", &disks, num); > + rc = libxl__append_disk_list_of_type(gc, domid, "tap", &disks, num); > if (rc) goto out_err; > > - rc = libxl__append_disk_list_of_type(&gc, domid, "qdisk", &disks, num); > + rc = libxl__append_disk_list_of_type(gc, domid, "qdisk", &disks, num); > if (rc) goto out_err; > > - libxl__free_all(&gc); > + GC_FREE; > return disks; > > out_err: > @@ -1259,35 +1259,35 @@ out_err: > int libxl_device_disk_getinfo(libxl_ctx *ctx, uint32_t domid, > libxl_device_disk *disk, libxl_diskinfo *diskinfo) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *dompath, *diskpath; > char *val; > > - dompath = libxl__xs_get_dompath(&gc, domid); > + dompath = libxl__xs_get_dompath(gc, domid); > diskinfo->devid = libxl__device_disk_dev_number(disk->vdev, NULL, NULL); > > /* tap devices entries in xenstore are written as vbd devices. */ > - diskpath = libxl__sprintf(&gc, "%s/device/vbd/%d", dompath, diskinfo->devid); > + diskpath = libxl__sprintf(gc, "%s/device/vbd/%d", dompath, diskinfo->devid); > diskinfo->backend = xs_read(ctx->xsh, XBT_NULL, > - libxl__sprintf(&gc, "%s/backend", diskpath), NULL); > + libxl__sprintf(gc, "%s/backend", diskpath), NULL); > if (!diskinfo->backend) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", diskpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", diskpath)); > diskinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", diskpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", diskpath)); > diskinfo->state = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", diskpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", diskpath)); > diskinfo->evtch = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/ring-ref", diskpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/ring-ref", diskpath)); > diskinfo->rref = val ? strtoul(val, NULL, 10) : -1; > diskinfo->frontend = xs_read(ctx->xsh, XBT_NULL, > - libxl__sprintf(&gc, "%s/frontend", diskinfo->backend), NULL); > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", diskinfo->backend)); > + libxl__sprintf(gc, "%s/frontend", diskinfo->backend), NULL); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", diskinfo->backend)); > diskinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > @@ -1331,12 +1331,12 @@ out: > > char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *dev = NULL; > char *ret = NULL; > int rc; > > - rc = libxl__device_disk_set_backend(&gc, disk); > + rc = libxl__device_disk_set_backend(gc, disk); > if (rc) goto out; > > switch (disk->backend) { > @@ -1355,7 +1355,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) > dev = disk->pdev_path; > break; > case LIBXL_DISK_FORMAT_VHD: > - dev = libxl__blktap_devpath(&gc, disk->pdev_path, > + dev = libxl__blktap_devpath(gc, disk->pdev_path, > disk->format); > break; > case LIBXL_DISK_FORMAT_QCOW: > @@ -1386,7 +1386,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) > out: > if (dev != NULL) > ret = strdup(dev); > - libxl__free_all(&gc); > + GC_FREE; > return ret; > } > > @@ -1448,7 +1448,7 @@ static int libxl__device_from_nic(libxl__gc *gc, uint32_t domid, > > int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > flexarray_t *front; > flexarray_t *back; > libxl__device device; > @@ -1467,59 +1467,59 @@ int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) > } > > if (nic->devid == -1) { > - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) { > + if (!(dompath = libxl__xs_get_dompath(gc, domid))) { > rc = ERROR_FAIL; > goto out_free; > } > - if (!(l = libxl__xs_directory(&gc, XBT_NULL, > - libxl__sprintf(&gc, "%s/device/vif", dompath), &nb))) { > + if (!(l = libxl__xs_directory(gc, XBT_NULL, > + libxl__sprintf(gc, "%s/device/vif", dompath), &nb))) { > nic->devid = 0; > } else { > nic->devid = strtoul(l[nb - 1], NULL, 10) + 1; > } > } > > - rc = libxl__device_from_nic(&gc, domid, nic, &device); > + rc = libxl__device_from_nic(gc, domid, nic, &device); > if ( rc != 0 ) goto out_free; > > flexarray_append(back, "frontend-id"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); > + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); > flexarray_append(back, "online"); > flexarray_append(back, "1"); > flexarray_append(back, "state"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); > if (nic->script) { > flexarray_append(back, "script"); > flexarray_append(back, nic->script[0]=='/' ? nic->script > - : libxl__sprintf(&gc, "%s/%s", > + : libxl__sprintf(gc, "%s/%s", > libxl_xen_script_dir_path(), > nic->script)); > } > flexarray_append(back, "mac"); > - flexarray_append(back,libxl__sprintf(&gc, > + flexarray_append(back,libxl__sprintf(gc, > LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); > if (nic->ip) { > flexarray_append(back, "ip"); > - flexarray_append(back, libxl__strdup(&gc, nic->ip)); > + flexarray_append(back, libxl__strdup(gc, nic->ip)); > } > > flexarray_append(back, "bridge"); > - flexarray_append(back, libxl__strdup(&gc, nic->bridge)); > + flexarray_append(back, libxl__strdup(gc, nic->bridge)); > flexarray_append(back, "handle"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", nic->devid)); > + flexarray_append(back, libxl__sprintf(gc, "%d", nic->devid)); > > flexarray_append(front, "backend-id"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->backend_domid)); > + flexarray_append(front, libxl__sprintf(gc, "%d", nic->backend_domid)); > flexarray_append(front, "state"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); > flexarray_append(front, "handle"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->devid)); > + flexarray_append(front, libxl__sprintf(gc, "%d", nic->devid)); > flexarray_append(front, "mac"); > - flexarray_append(front, libxl__sprintf(&gc, > + flexarray_append(front, libxl__sprintf(gc, > LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); > - libxl__device_generic_add(&gc, &device, > - libxl__xs_kvs_of_flexarray(&gc, back, back->count), > - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); > + libxl__device_generic_add(gc, &device, > + libxl__xs_kvs_of_flexarray(gc, back, back->count), > + libxl__xs_kvs_of_flexarray(gc, front, front->count)); > > /* FIXME: wait for plug */ > rc = 0; > @@ -1527,39 +1527,39 @@ out_free: > flexarray_free(back); > flexarray_free(front); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_nic_remove(libxl_ctx *ctx, uint32_t domid, > libxl_device_nic *nic) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_nic(&gc, domid, nic, &device); > + rc = libxl__device_from_nic(gc, domid, nic, &device); > if (rc != 0) goto out; > > - rc = libxl__device_remove(&gc, &device, 1); > + rc = libxl__device_remove(gc, &device, 1); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_nic_destroy(libxl_ctx *ctx, uint32_t domid, > libxl_device_nic *nic) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_nic(&gc, domid, nic, &device); > + rc = libxl__device_from_nic(gc, domid, nic, &device); > if (rc != 0) goto out; > > - rc = libxl__device_destroy(&gc, &device); > + rc = libxl__device_destroy(gc, &device); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1607,26 +1607,26 @@ static void libxl__device_nic_from_xs_be(libxl__gc *gc, > int libxl_devid_to_device_nic(libxl_ctx *ctx, uint32_t domid, > int devid, libxl_device_nic *nic) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *dompath, *path; > int rc = ERROR_FAIL; > > memset(nic, 0, sizeof (libxl_device_nic)); > - dompath = libxl__xs_get_dompath(&gc, domid); > + dompath = libxl__xs_get_dompath(gc, domid); > if (!dompath) > goto out; > > - path = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, "%s/device/vif/%d/backend", > + path = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, "%s/device/vif/%d/backend", > dompath, devid)); > if (!path) > goto out; > > - libxl__device_nic_from_xs_be(&gc, path, nic); > + libxl__device_nic_from_xs_be(gc, path, nic); > > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1665,16 +1665,16 @@ static int libxl__append_nic_list_of_type(libxl__gc *gc, > > libxl_device_nic *libxl_device_nic_list(libxl_ctx *ctx, uint32_t domid, int *num) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl_device_nic *nics = NULL; > int rc; > > *num = 0; > > - rc = libxl__append_nic_list_of_type(&gc, domid, "vif", &nics, num); > + rc = libxl__append_nic_list_of_type(gc, domid, "vif", &nics, num); > if (rc) goto out_err; > > - libxl__free_all(&gc); > + GC_FREE; > return nics; > > out_err: > @@ -1690,36 +1690,36 @@ out_err: > int libxl_device_nic_getinfo(libxl_ctx *ctx, uint32_t domid, > libxl_device_nic *nic, libxl_nicinfo *nicinfo) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *dompath, *nicpath; > char *val; > > - dompath = libxl__xs_get_dompath(&gc, domid); > + dompath = libxl__xs_get_dompath(gc, domid); > nicinfo->devid = nic->devid; > > - nicpath = libxl__sprintf(&gc, "%s/device/vif/%d", dompath, nicinfo->devid); > + nicpath = libxl__sprintf(gc, "%s/device/vif/%d", dompath, nicinfo->devid); > nicinfo->backend = xs_read(ctx->xsh, XBT_NULL, > - libxl__sprintf(&gc, "%s/backend", nicpath), NULL); > + libxl__sprintf(gc, "%s/backend", nicpath), NULL); > if (!nicinfo->backend) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", nicpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", nicpath)); > nicinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", nicpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", nicpath)); > nicinfo->state = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", nicpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", nicpath)); > nicinfo->evtch = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/tx-ring-ref", nicpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/tx-ring-ref", nicpath)); > nicinfo->rref_tx = val ? strtoul(val, NULL, 10) : -1; > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/rx-ring-ref", nicpath)); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/rx-ring-ref", nicpath)); > nicinfo->rref_rx = val ? strtoul(val, NULL, 10) : -1; > nicinfo->frontend = xs_read(ctx->xsh, XBT_NULL, > - libxl__sprintf(&gc, "%s/frontend", nicinfo->backend), NULL); > - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", nicinfo->backend)); > + libxl__sprintf(gc, "%s/frontend", nicinfo->backend), NULL); > + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", nicinfo->backend)); > nicinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > @@ -1825,7 +1825,7 @@ static int libxl__device_from_vkb(libxl__gc *gc, uint32_t domid, > > int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > flexarray_t *front; > flexarray_t *back; > libxl__device device; > @@ -1842,64 +1842,64 @@ int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) > goto out_free; > } > > - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); > + rc = libxl__device_from_vkb(gc, domid, vkb, &device); > if (rc != 0) goto out_free; > > flexarray_append(back, "frontend-id"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); > + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); > flexarray_append(back, "online"); > flexarray_append(back, "1"); > flexarray_append(back, "state"); > - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); > flexarray_append(back, "domain"); > - flexarray_append(back, libxl__domid_to_name(&gc, domid)); > + flexarray_append(back, libxl__domid_to_name(gc, domid)); > > flexarray_append(front, "backend-id"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", vkb->backend_domid)); > + flexarray_append(front, libxl__sprintf(gc, "%d", vkb->backend_domid)); > flexarray_append(front, "state"); > - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); > + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); > > - libxl__device_generic_add(&gc, &device, > - libxl__xs_kvs_of_flexarray(&gc, back, back->count), > - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); > + libxl__device_generic_add(gc, &device, > + libxl__xs_kvs_of_flexarray(gc, back, back->count), > + libxl__xs_kvs_of_flexarray(gc, front, front->count)); > rc = 0; > out_free: > flexarray_free(back); > flexarray_free(front); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_vkb_remove(libxl_ctx *ctx, uint32_t domid, > libxl_device_vkb *vkb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); > + rc = libxl__device_from_vkb(gc, domid, vkb, &device); > if (rc != 0) goto out; > > - rc = libxl__device_remove(&gc, &device, 1); > + rc = libxl__device_remove(gc, &device, 1); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_vkb_destroy(libxl_ctx *ctx, uint32_t domid, > libxl_device_vkb *vkb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); > + rc = libxl__device_from_vkb(gc, domid, vkb, &device); > if (rc != 0) goto out; > > - rc = libxl__device_destroy(&gc, &device); > + rc = libxl__device_destroy(gc, &device); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1935,7 +1935,7 @@ static int libxl__device_from_vfb(libxl__gc *gc, uint32_t domid, > > int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > flexarray_t *front; > flexarray_t *back; > libxl__device device; > @@ -1952,20 +1952,20 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) > goto out_free; > } > > - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); > + rc = libxl__device_from_vfb(gc, domid, vfb, &device); > if (rc != 0) goto out_free; > > - flexarray_append_pair(back, "frontend-id", libxl__sprintf(&gc, "%d", domid)); > + flexarray_append_pair(back, "frontend-id", libxl__sprintf(gc, "%d", domid)); > flexarray_append_pair(back, "online", "1"); > - flexarray_append_pair(back, "state", libxl__sprintf(&gc, "%d", 1)); > - flexarray_append_pair(back, "domain", libxl__domid_to_name(&gc, domid)); > - flexarray_append_pair(back, "vnc", libxl__sprintf(&gc, "%d", vfb->vnc)); > + flexarray_append_pair(back, "state", libxl__sprintf(gc, "%d", 1)); > + flexarray_append_pair(back, "domain", libxl__domid_to_name(gc, domid)); > + flexarray_append_pair(back, "vnc", libxl__sprintf(gc, "%d", vfb->vnc)); > flexarray_append_pair(back, "vnclisten", vfb->vnclisten); > flexarray_append_pair(back, "vncpasswd", vfb->vncpasswd); > - flexarray_append_pair(back, "vncdisplay", libxl__sprintf(&gc, "%d", vfb->vncdisplay)); > - flexarray_append_pair(back, "vncunused", libxl__sprintf(&gc, "%d", vfb->vncunused)); > - flexarray_append_pair(back, "sdl", libxl__sprintf(&gc, "%d", vfb->sdl)); > - flexarray_append_pair(back, "opengl", libxl__sprintf(&gc, "%d", vfb->opengl)); > + flexarray_append_pair(back, "vncdisplay", libxl__sprintf(gc, "%d", vfb->vncdisplay)); > + flexarray_append_pair(back, "vncunused", libxl__sprintf(gc, "%d", vfb->vncunused)); > + flexarray_append_pair(back, "sdl", libxl__sprintf(gc, "%d", vfb->sdl)); > + flexarray_append_pair(back, "opengl", libxl__sprintf(gc, "%d", vfb->opengl)); > if (vfb->xauthority) { > flexarray_append_pair(back, "xauthority", vfb->xauthority); > } > @@ -1973,50 +1973,50 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) > flexarray_append_pair(back, "display", vfb->display); > } > > - flexarray_append_pair(front, "backend-id", libxl__sprintf(&gc, "%d", vfb->backend_domid)); > - flexarray_append_pair(front, "state", libxl__sprintf(&gc, "%d", 1)); > + flexarray_append_pair(front, "backend-id", libxl__sprintf(gc, "%d", vfb->backend_domid)); > + flexarray_append_pair(front, "state", libxl__sprintf(gc, "%d", 1)); > > - libxl__device_generic_add(&gc, &device, > - libxl__xs_kvs_of_flexarray(&gc, back, back->count), > - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); > + libxl__device_generic_add(gc, &device, > + libxl__xs_kvs_of_flexarray(gc, back, back->count), > + libxl__xs_kvs_of_flexarray(gc, front, front->count)); > rc = 0; > out_free: > flexarray_free(front); > flexarray_free(back); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_vfb_remove(libxl_ctx *ctx, uint32_t domid, > libxl_device_vfb *vfb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); > + rc = libxl__device_from_vfb(gc, domid, vfb, &device); > if (rc != 0) goto out; > > - rc = libxl__device_remove(&gc, &device, 1); > + rc = libxl__device_remove(gc, &device, 1); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_vfb_destroy(libxl_ctx *ctx, uint32_t domid, > libxl_device_vfb *vfb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl__device device; > int rc; > > - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); > + rc = libxl__device_from_vfb(gc, domid, vfb, &device); > if (rc != 0) goto out; > > - rc = libxl__device_destroy(&gc, &device); > + rc = libxl__device_destroy(gc, &device); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -2024,13 +2024,13 @@ out: > > int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *mem, *endptr; > uint32_t memorykb; > - char *dompath = libxl__xs_get_dompath(&gc, domid); > + char *dompath = libxl__xs_get_dompath(gc, domid); > int rc = 1; > > - mem = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/memory/target", dompath)); > + mem = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/memory/target", dompath)); > if (!mem) { > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot get memory info from %s/memory/target\n", dompath); > goto out; > @@ -2055,7 +2055,7 @@ int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) > > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -2163,12 +2163,12 @@ retry: > int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, > int32_t target_memkb, int relative, int enforce) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc = 1, abort = 0; > uint32_t memorykb = 0, videoram = 0; > uint32_t current_target_memkb = 0, new_target_memkb = 0; > char *memmax, *endptr, *videoram_s = NULL, *target = NULL; > - char *dompath = libxl__xs_get_dompath(&gc, domid); > + char *dompath = libxl__xs_get_dompath(gc, domid); > xc_domaininfo_t info; > libxl_dominfo ptr; > char *uuid; > @@ -2177,11 +2177,11 @@ int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, > retry_transaction: > t = xs_transaction_start(ctx->xsh); > > - target = libxl__xs_read(&gc, t, libxl__sprintf(&gc, > + target = libxl__xs_read(gc, t, libxl__sprintf(gc, > "%s/memory/target", dompath)); > if (!target && !domid) { > xs_transaction_end(ctx->xsh, t, 1); > - rc = libxl__fill_dom0_memory_info(&gc, ¤t_target_memkb); > + rc = libxl__fill_dom0_memory_info(gc, ¤t_target_memkb); > if (rc < 0) { > abort = 1; > goto out; > @@ -2203,7 +2203,7 @@ retry_transaction: > goto out; > } > } > - memmax = libxl__xs_read(&gc, t, libxl__sprintf(&gc, > + memmax = libxl__xs_read(gc, t, libxl__sprintf(gc, > "%s/memory/static-max", dompath)); > if (!memmax) { > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, > @@ -2243,7 +2243,7 @@ retry_transaction: > abort = 1; > goto out; > } > - videoram_s = libxl__xs_read(&gc, t, libxl__sprintf(&gc, > + videoram_s = libxl__xs_read(gc, t, libxl__sprintf(gc, > "%s/memory/videoram", dompath)); > videoram = videoram_s ? atoi(videoram_s) : 0; > > @@ -2272,7 +2272,7 @@ retry_transaction: > goto out; > } > > - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/memory/target", > + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/memory/target", > dompath), "%"PRIu32, new_target_memkb); > rc = xc_domain_getinfolist(ctx->xch, domid, 1, &info); > if (rc != 1 || info.domain != domid) { > @@ -2280,8 +2280,8 @@ retry_transaction: > goto out; > } > xcinfo2xlinfo(&info, &ptr); > - uuid = libxl__uuid2string(&gc, ptr.uuid); > - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "/vm/%s/memory", uuid), > + uuid = libxl__uuid2string(gc, ptr.uuid); > + libxl__xs_write(gc, t, libxl__sprintf(gc, "/vm/%s/memory", uuid), > "%"PRIu32, new_target_memkb / 1024); > > out: > @@ -2289,22 +2289,22 @@ out: > if (errno == EAGAIN) > goto retry_transaction; > > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc = 1; > char *target = NULL, *endptr = NULL; > - char *dompath = libxl__xs_get_dompath(&gc, domid); > + char *dompath = libxl__xs_get_dompath(gc, domid); > uint32_t target_memkb; > > - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, > + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, > "%s/memory/target", dompath)); > if (!target && !domid) { > - rc = libxl__fill_dom0_memory_info(&gc, &target_memkb); > + rc = libxl__fill_dom0_memory_info(gc, &target_memkb); > if (rc < 0) > goto out; > } else if (!target) { > @@ -2325,14 +2325,14 @@ int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target > rc = 0; > > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, > libxl_device_model_info *dm_info, uint32_t *need_memkb) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc = ERROR_INVAL; > *need_memkb = b_info->target_memkb; > switch (b_info->type) { > @@ -2351,7 +2351,7 @@ int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, > *need_memkb += (2 * 1024) - (*need_memkb % (2 * 1024)); > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > > } > @@ -2361,12 +2361,12 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) > int rc = 0; > libxl_physinfo info; > uint32_t freemem_slack; > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > > rc = libxl_get_physinfo(ctx, &info); > if (rc < 0) > goto out; > - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); > + rc = libxl__get_free_memory_slack(gc, &freemem_slack); > if (rc < 0) > goto out; > > @@ -2376,7 +2376,7 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) > *memkb = 0; > > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -2386,9 +2386,9 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t > int rc = 0; > libxl_physinfo info; > uint32_t freemem_slack; > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > > - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); > + rc = libxl__get_free_memory_slack(gc, &freemem_slack); > if (rc < 0) > goto out; > while (wait_secs > 0) { > @@ -2405,7 +2405,7 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t > rc = ERROR_NOMEM; > > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -2631,7 +2631,7 @@ int libxl_set_vcpuaffinity(libxl_ctx *ctx, uint32_t domid, uint32_t vcpuid, > > int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl_dominfo info; > char *dompath; > xs_transaction_t t; > @@ -2641,14 +2641,14 @@ int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting domain info list"); > goto out; > } > - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) > + if (!(dompath = libxl__xs_get_dompath(gc, domid))) > goto out; > > retry_transaction: > t = xs_transaction_start(ctx->xsh); > for (i = 0; i <= info.vcpu_max_id; i++) > - libxl__xs_write(&gc, t, > - libxl__sprintf(&gc, "%s/cpu/%u/availability", dompath, i), > + libxl__xs_write(gc, t, > + libxl__sprintf(gc, "%s/cpu/%u/availability", dompath, i), > "%s", libxl_cpumap_test(cpumap, i) ? "online" : "offline"); > if (!xs_transaction_end(ctx->xsh, t, 0)) { > if (errno == EAGAIN) > @@ -2656,7 +2656,7 @@ retry_transaction: > } else > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -2776,12 +2776,12 @@ int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, char *trigger_name, uint3 > > int libxl_send_sysrq(libxl_ctx *ctx, uint32_t domid, char sysrq) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > - char *dompath = libxl__xs_get_dompath(&gc, domid); > + GC_INIT(ctx); > + char *dompath = libxl__xs_get_dompath(gc, domid); > > - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/control/sysrq", dompath), "%c", sysrq); > + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "%s/control/sysrq", dompath), "%c", sysrq); > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > @@ -2868,15 +2868,15 @@ void libxl_xen_console_read_finish(libxl_ctx *ctx, > > uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > - char *dompath = libxl__xs_get_dompath(&gc, domid); > + GC_INIT(ctx); > + char *dompath = libxl__xs_get_dompath(gc, domid); > char *vm_path, *start_time; > uint32_t ret; > > vm_path = libxl__xs_read( > - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dompath)); > + gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dompath)); > start_time = libxl__xs_read( > - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/start_time", vm_path)); > + gc, XBT_NULL, libxl__sprintf(gc, "%s/start_time", vm_path)); > if (start_time == NULL) { > LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, -1, > "Can't get start time of domain '%d'", domid); > @@ -2884,7 +2884,7 @@ uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) > }else{ > ret = strtoul(start_time, NULL, 10); > } > - libxl__free_all(&gc); > + GC_FREE; > return ret; > } > > @@ -3037,15 +3037,15 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, > libxl_cpumap cpumap, libxl_uuid *uuid, > uint32_t *poolid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > int i; > xs_transaction_t t; > char *uuid_string; > > - uuid_string = libxl__uuid2string(&gc, *uuid); > + uuid_string = libxl__uuid2string(gc, *uuid); > if (!uuid_string) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_NOMEM; > } > > @@ -3053,7 +3053,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, > if (rc) { > LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, > "Could not create cpupool"); > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > @@ -3064,7 +3064,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, > LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, > "Error moving cpu to cpupool"); > libxl_cpupool_destroy(ctx, *poolid); > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > } > @@ -3072,16 +3072,16 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, > for (;;) { > t = xs_transaction_start(ctx->xsh); > > - xs_mkdir(ctx->xsh, t, libxl__sprintf(&gc, "/local/pool/%d", *poolid)); > - libxl__xs_write(&gc, t, > - libxl__sprintf(&gc, "/local/pool/%d/uuid", *poolid), > + xs_mkdir(ctx->xsh, t, libxl__sprintf(gc, "/local/pool/%d", *poolid)); > + libxl__xs_write(gc, t, > + libxl__sprintf(gc, "/local/pool/%d/uuid", *poolid), > "%s", uuid_string); > - libxl__xs_write(&gc, t, > - libxl__sprintf(&gc, "/local/pool/%d/name", *poolid), > + libxl__xs_write(gc, t, > + libxl__sprintf(gc, "/local/pool/%d/name", *poolid), > "%s", name); > > if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) { > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > } > @@ -3089,7 +3089,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, > > int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc, i; > xc_cpupoolinfo_t *info; > xs_transaction_t t; > @@ -3097,7 +3097,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) > > info = xc_cpupool_getinfo(ctx->xch, poolid); > if (info == NULL) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_NOMEM; > } > > @@ -3131,7 +3131,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) > for (;;) { > t = xs_transaction_start(ctx->xsh); > > - xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "/local/pool/%d", poolid)); > + xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "/local/pool/%d", poolid)); > > if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) > break; > @@ -3143,21 +3143,21 @@ out1: > libxl_cpumap_dispose(&cpumap); > out: > xc_cpupool_infofree(ctx->xch, info); > - libxl__free_all(&gc); > + GC_FREE; > > return rc; > } > > int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > xs_transaction_t t; > xc_cpupoolinfo_t *info; > int rc; > > info = xc_cpupool_getinfo(ctx->xch, poolid); > if (info == NULL) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_NOMEM; > } > > @@ -3170,8 +3170,8 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) > for (;;) { > t = xs_transaction_start(ctx->xsh); > > - libxl__xs_write(&gc, t, > - libxl__sprintf(&gc, "/local/pool/%d/name", poolid), > + libxl__xs_write(gc, t, > + libxl__sprintf(gc, "/local/pool/%d/name", poolid), > "%s", name); > > if (xs_transaction_end(ctx->xsh, t, 0)) > @@ -3186,7 +3186,7 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) > > out: > xc_cpupool_infofree(ctx->xch, info); > - libxl__free_all(&gc); > + GC_FREE; > > return rc; > } > @@ -3293,16 +3293,16 @@ out: > > int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > char *dom_path; > char *vm_path; > char *poolname; > xs_transaction_t t; > > - dom_path = libxl__xs_get_dompath(&gc, domid); > + dom_path = libxl__xs_get_dompath(gc, domid); > if (!dom_path) { > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > @@ -3310,26 +3310,26 @@ int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) > if (rc) { > LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, > "Error moving domain to cpupool"); > - libxl__free_all(&gc); > + GC_FREE; > return ERROR_FAIL; > } > > for (;;) { > t = xs_transaction_start(ctx->xsh); > > - poolname = libxl__cpupoolid_to_name(&gc, poolid); > - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); > + poolname = libxl__cpupoolid_to_name(gc, poolid); > + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); > if (!vm_path) > break; > > - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/pool_name", vm_path), > + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/pool_name", vm_path), > "%s", poolname); > > if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) > break; > } > > - libxl__free_all(&gc); > + GC_FREE; > return 0; > } > > diff --git a/tools/libxl/libxl_bootloader.c b/tools/libxl/libxl_bootloader.c > index b8399a1..ce83b8e 100644 > --- a/tools/libxl/libxl_bootloader.c > +++ b/tools/libxl/libxl_bootloader.c > @@ -328,7 +328,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, > libxl_device_disk *disk, > uint32_t domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int ret, rc = 0; > char *fifo = NULL; > char *diskpath = NULL; > @@ -388,7 +388,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, > goto out_close; > } > > - args = make_bootloader_args(&gc, info, domid, fifo, diskpath); > + args = make_bootloader_args(gc, info, domid, fifo, diskpath); > if (args == NULL) { > rc = ERROR_NOMEM; > goto out_close; > @@ -411,8 +411,8 @@ int libxl_run_bootloader(libxl_ctx *ctx, > goto out_close; > } > > - dom_console_xs_path = libxl__sprintf(&gc, "%s/console/tty", libxl__xs_get_dompath(&gc, domid)); > - libxl__xs_write(&gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); > + dom_console_xs_path = libxl__sprintf(gc, "%s/console/tty", libxl__xs_get_dompath(gc, domid)); > + libxl__xs_write(gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); > > pid = fork_exec_bootloader(&bootloader_fd, info->u.pv.bootloader, args); > if (pid < 0) { > @@ -435,7 +435,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, > > fcntl(fifo_fd, F_SETFL, O_NDELAY); > > - blout = bootloader_interact(&gc, xenconsoled_fd, bootloader_fd, fifo_fd); > + blout = bootloader_interact(gc, xenconsoled_fd, bootloader_fd, fifo_fd); > if (blout == NULL) { > goto out_close; > } > @@ -445,7 +445,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, > goto out_close; > } > > - parse_bootloader_result(&gc, info, blout); > + parse_bootloader_result(gc, info, blout); > > rc = 0; > out_close: > @@ -472,7 +472,7 @@ out_close: > free(args); > > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c > index ccb56c7..69f10fe 100644 > --- a/tools/libxl/libxl_create.c > +++ b/tools/libxl/libxl_create.c > @@ -670,20 +670,20 @@ error_out: > int libxl_domain_create_new(libxl_ctx *ctx, libxl_domain_config *d_config, > libxl_console_ready cb, void *priv, uint32_t *domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > - rc = do_domain_create(&gc, d_config, cb, priv, domid, -1); > - libxl__free_all(&gc); > + rc = do_domain_create(gc, d_config, cb, priv, domid, -1); > + GC_FREE; > return rc; > } > > int libxl_domain_create_restore(libxl_ctx *ctx, libxl_domain_config *d_config, > libxl_console_ready cb, void *priv, uint32_t *domid, int restore_fd) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > - rc = do_domain_create(&gc, d_config, cb, priv, domid, restore_fd); > - libxl__free_all(&gc); > + rc = do_domain_create(gc, d_config, cb, priv, domid, restore_fd); > + GC_FREE; > return rc; > } > > diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c > index 96098de..b1ff967 100644 > --- a/tools/libxl/libxl_dom.c > +++ b/tools/libxl/libxl_dom.c > @@ -730,7 +730,7 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, > const char *userdata_userid, > const uint8_t *data, int datalen) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > const char *filename; > const char *newfilename; > int e, rc; > @@ -738,18 +738,18 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, > FILE *f = NULL; > size_t rs; > > - filename = userdata_path(&gc, domid, userdata_userid, "d"); > + filename = userdata_path(gc, domid, userdata_userid, "d"); > if (!filename) { > rc = ERROR_NOMEM; > goto out; > } > > if (!datalen) { > - rc = userdata_delete(&gc, filename); > + rc = userdata_delete(gc, filename); > goto out; > } > > - newfilename = userdata_path(&gc, domid, userdata_userid, "n"); > + newfilename = userdata_path(gc, domid, userdata_userid, "n"); > if (!newfilename) { > rc = ERROR_NOMEM; > goto out; > @@ -791,7 +791,7 @@ err: > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot write %s for %s", > newfilename, filename); > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -799,13 +799,13 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, > const char *userdata_userid, > uint8_t **data_r, int *datalen_r) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > const char *filename; > int e, rc; > int datalen = 0; > void *data = 0; > > - filename = userdata_path(&gc, domid, userdata_userid, "d"); > + filename = userdata_path(gc, domid, userdata_userid, "d"); > if (!filename) { > rc = ERROR_NOMEM; > goto out; > @@ -827,7 +827,7 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, > if (datalen_r) *datalen_r = datalen; > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > diff --git a/tools/libxl/libxl_pci.c b/tools/libxl/libxl_pci.c > index 63c3050..120c239 100644 > --- a/tools/libxl/libxl_pci.c > +++ b/tools/libxl/libxl_pci.c > @@ -483,7 +483,7 @@ static int is_assigned(libxl_device_pci *assigned, int num_assigned, > > libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > libxl_device_pci *pcidevs = NULL, *new, *assigned; > struct dirent *de; > DIR *dir; > @@ -491,7 +491,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) > > *num = 0; > > - rc = get_all_assigned_devices(&gc, &assigned, &num_assigned); > + rc = get_all_assigned_devices(gc, &assigned, &num_assigned); > if ( rc ) > goto out; > > @@ -528,7 +528,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) > out_closedir: > closedir(dir); > out: > - libxl__free_all(&gc); > + GC_FREE; > return pcidevs; > } > > @@ -782,10 +782,10 @@ static int libxl__device_pci_reset(libxl__gc *gc, unsigned int domain, unsigned > > int libxl_device_pci_add(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > - rc = libxl__device_pci_add(&gc, domid, pcidev, 0); > - libxl__free_all(&gc); > + rc = libxl__device_pci_add(gc, domid, pcidev, 0); > + GC_FREE; > return rc; > } > > @@ -1057,24 +1057,24 @@ out: > > int libxl_device_pci_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > > - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 0); > + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 0); > > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > int libxl_device_pci_destroy(libxl_ctx *ctx, uint32_t domid, > libxl_device_pci *pcidev) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > int rc; > > - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 1); > + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 1); > > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > @@ -1115,15 +1115,15 @@ static void libxl__device_pci_from_xs_be(libxl__gc *gc, > > libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *be_path, *num_devs; > int n, i; > libxl_device_pci *pcidevs = NULL; > > *num = 0; > > - be_path = libxl__sprintf(&gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(&gc, 0), domid); > - num_devs = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/num_devs", be_path)); > + be_path = libxl__sprintf(gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(gc, 0), domid); > + num_devs = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/num_devs", be_path)); > if (!num_devs) > goto out; > > @@ -1131,11 +1131,11 @@ libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num > pcidevs = calloc(n, sizeof(libxl_device_pci)); > > for (i = 0; i < n; i++) > - libxl__device_pci_from_xs_be(&gc, be_path, pcidevs + i, i); > + libxl__device_pci_from_xs_be(gc, be_path, pcidevs + i, i); > > *num = n; > out: > - libxl__free_all(&gc); > + GC_FREE; > return pcidevs; > } > > diff --git a/tools/libxl/libxl_qmp.c b/tools/libxl/libxl_qmp.c > index c7696d7..60af98c 100644 > --- a/tools/libxl/libxl_qmp.c > +++ b/tools/libxl/libxl_qmp.c > @@ -94,7 +94,7 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, > const char *chardev, > int port) > { > - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); > + GC_INIT(qmp->ctx); > char *path = NULL; > int ret = 0; > > @@ -102,12 +102,12 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, > return 0; > } > > - path = libxl__xs_get_dompath(&gc, qmp->domid); > - path = libxl__sprintf(&gc, "%s/serial/%d/tty", path, port); > + path = libxl__xs_get_dompath(gc, qmp->domid); > + path = libxl__sprintf(gc, "%s/serial/%d/tty", path, port); > > - ret = libxl__xs_write(&gc, XBT_NULL, path, "%s", chardev + 4); > + ret = libxl__xs_write(gc, XBT_NULL, path, "%s", chardev + 4); > > - libxl__free_all(&gc); > + GC_FREE; > return ret; > } > > @@ -521,7 +521,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, > { > int id = 0; > int ret = 0; > - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); > + GC_INIT(qmp->ctx); > qmp_request_context context = { .rc = 0 }; > > id = qmp_send(qmp, cmd, args, callback, opaque, &context); > @@ -531,7 +531,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, > qmp->wait_for_id = id; > > while (qmp->wait_for_id == id) { > - if ((ret = qmp_next(&gc, qmp)) < 0) { > + if ((ret = qmp_next(gc, qmp)) < 0) { > break; > } > } > @@ -540,7 +540,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, > ret = context.rc; > } > > - libxl__free_all(&gc); > + GC_FREE; > > return ret; > } > @@ -559,15 +559,15 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) > int ret = 0; > libxl__qmp_handler *qmp = NULL; > char *qmp_socket; > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > > qmp = qmp_init_handler(ctx, domid); > > - qmp_socket = libxl__sprintf(&gc, "%s/qmp-libxl-%d", > + qmp_socket = libxl__sprintf(gc, "%s/qmp-libxl-%d", > libxl_run_dir_path(), domid); > if ((ret = qmp_open(qmp, qmp_socket, QMP_SOCKET_CONNECT_TIMEOUT)) < 0) { > LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "Connection error"); > - libxl__free_all(&gc); > + GC_FREE; > qmp_free_handler(qmp); > return NULL; > } > @@ -576,12 +576,12 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) > > /* Wait for the response to qmp_capabilities */ > while (!qmp->connected) { > - if ((ret = qmp_next(&gc, qmp)) < 0) { > + if ((ret = qmp_next(gc, qmp)) < 0) { > break; > } > } > > - libxl__free_all(&gc); > + GC_FREE; > if (!qmp->connected) { > LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Failed to connect to QMP"); > libxl__qmp_close(qmp); > @@ -626,9 +626,9 @@ static int pci_add_callback(libxl__qmp_handler *qmp, > { > libxl_device_pci *pcidev = opaque; > const libxl__json_object *bus = NULL; > - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); > + GC_INIT(qmp->ctx); > int i, j, rc = -1; > - char *asked_id = libxl__sprintf(&gc, PCI_PT_QDEV_ID, > + char *asked_id = libxl__sprintf(gc, PCI_PT_QDEV_ID, > pcidev->bus, pcidev->dev, pcidev->func); > > for (i = 0; (bus = libxl__json_array_get(response, i)); i++) { > @@ -665,7 +665,7 @@ static int pci_add_callback(libxl__qmp_handler *qmp, > > > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > diff --git a/tools/libxl/libxl_utils.c b/tools/libxl/libxl_utils.c > index f1f2a6d..d36c737 100644 > --- a/tools/libxl/libxl_utils.c > +++ b/tools/libxl/libxl_utils.c > @@ -186,29 +186,29 @@ char *libxl_schedid_to_name(libxl_ctx *ctx, int schedid) > > int libxl_get_stubdom_id(libxl_ctx *ctx, int guest_domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char * stubdom_id_s; > int ret; > > - stubdom_id_s = libxl__xs_read(&gc, XBT_NULL, > - libxl__sprintf(&gc, "%s/image/device-model-domid", > - libxl__xs_get_dompath(&gc, guest_domid))); > + stubdom_id_s = libxl__xs_read(gc, XBT_NULL, > + libxl__sprintf(gc, "%s/image/device-model-domid", > + libxl__xs_get_dompath(gc, guest_domid))); > if (stubdom_id_s) > ret = atoi(stubdom_id_s); > else > ret = 0; > - libxl__free_all(&gc); > + GC_FREE; > return ret; > } > > int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > char *target, *endptr; > uint32_t value; > int ret = 0; > > - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/target", libxl__xs_get_dompath(&gc, domid))); > + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/target", libxl__xs_get_dompath(gc, domid))); > if (!target) > goto out; > value = strtol(target, &endptr, 10); > @@ -218,7 +218,7 @@ int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) > *target_domid = value; > ret = 1; > out: > - libxl__free_all(&gc); > + GC_FREE; > return ret; > } > > @@ -240,27 +240,27 @@ static int logrename(libxl__gc *gc, const char *old, const char *new) > > int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) > { > - libxl__gc gc = LIBXL_INIT_GC(ctx); > + GC_INIT(ctx); > struct stat stat_buf; > char *logfile, *logfile_new; > int i, rc; > > - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); > + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); > if (stat(logfile, &stat_buf) == 0) { > /* file exists, rotate */ > - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.10", name); > + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.10", name); > unlink(logfile); > for (i = 9; i > 0; i--) { > - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i); > - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i + 1); > - rc = logrename(&gc, logfile, logfile_new); > + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i); > + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i + 1); > + rc = logrename(gc, logfile, logfile_new); > if (rc) > goto out; > } > - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); > - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.1", name); > + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); > + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.1", name); > > - rc = logrename(&gc, logfile, logfile_new); > + rc = logrename(gc, logfile, logfile_new); > if (rc) > goto out; > } else { > @@ -272,7 +272,7 @@ int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) > *full_name = strdup(logfile); > rc = 0; > out: > - libxl__free_all(&gc); > + GC_FREE; > return rc; > } > > -- > 1.7.2.5 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com > http://lists.xensource.com/xen-devel _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Fri Dec 09 13:14:30 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 09 Dec 2011 13:14:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ0HE-0002Mh-5W; Fri, 09 Dec 2011 13:14:12 +0000 Received: from mail174.messagelabs.com ([85.158.138.51]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ0HC-0002I6-Gv for xen-devel@lists.xensource.com; Fri, 09 Dec 2011 13:14:11 +0000 X-Env-Sender: Stefano.Stabellini@eu.citrix.com X-Msg-Ref: server-11.tower-174.messagelabs.com!1323436384!4910711!6 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAyMTkxNzY=\n X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 30724 invoked from network); 9 Dec 2011 13:13:19 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-11.tower-174.messagelabs.com with RC4-SHA encrypted SMTP; 9 Dec 2011 13:13:19 -0000 X-IronPort-AV: E=Sophos;i="4.71,325,1320642000"; d="scan'208";a="173546260" Received: from ftlpmailmx01.citrite.net ([10.13.107.65]) by FTLPIPO02.CITRIX.COM with ESMTP/TLS/RC4-MD5; 09 Dec 2011 08:13:18 -0500 Received: from smtp01.ad.xensource.com (10.219.128.104) by smtprelay.citrix.com (10.13.107.65) with Microsoft SMTP Server id 8.3.213.0; Fri, 9 Dec 2011 08:13:17 -0500 Received: from localhost.localdomain (kaball.uk.xensource.com [10.80.2.59]) by smtp01.ad.xensource.com (8.13.1/8.13.1) with ESMTP id pB9DCpDt008248; Fri, 9 Dec 2011 05:13:05 -0800 From: To: xen-devel@lists.xensource.com Date: Fri, 9 Dec 2011 13:13:12 +0000 Message-ID: <1323436408-16335-9-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: MIME-Version: 1.0 Cc: keir.xen@gmail.com, Stefano Stabellini , Ian Campbell , JBeulich@suse.com, Tim.Deegan@citrix.com Subject: [Xen-devel] [PATCH v2 09/25] arm: header files X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com From: Stefano Stabellini A simple implementation of everything under asm-arm and arch-arm.h; some of these files are shamelessly taken from Linux. Changes in v2: - remove div64. Signed-off-by: Stefano Stabellini Signed-off-by: Ian Campbell Signed-off-by: Tim Deegan --- xen/include/asm-arm/atomic.h | 212 +++++++++++++++++++++++++++++ xen/include/asm-arm/bitops.h | 195 +++++++++++++++++++++++++++ xen/include/asm-arm/bug.h | 15 ++ xen/include/asm-arm/byteorder.h | 16 +++ xen/include/asm-arm/cache.h | 20 +++ xen/include/asm-arm/config.h | 122 +++++++++++++++++ xen/include/asm-arm/cpregs.h | 207 ++++++++++++++++++++++++++++ xen/include/asm-arm/current.h | 60 ++++++++ xen/include/asm-arm/debugger.h | 15 ++ xen/include/asm-arm/delay.h | 15 ++ xen/include/asm-arm/desc.h | 12 ++ xen/include/asm-arm/div64.h | 235 ++++++++++++++++++++++++++++++++ xen/include/asm-arm/elf.h | 33 +++++ xen/include/asm-arm/event.h | 41 ++++++ xen/include/asm-arm/flushtlb.h | 31 +++++ xen/include/asm-arm/grant_table.h | 35 +++++ xen/include/asm-arm/hardirq.h | 28 ++++ xen/include/asm-arm/hypercall.h | 24 ++++ xen/include/asm-arm/init.h | 12 ++ xen/include/asm-arm/io.h | 12 ++ xen/include/asm-arm/iocap.h | 20 +++ xen/include/asm-arm/multicall.h | 23 +++ xen/include/asm-arm/nmi.h | 15 ++ xen/include/asm-arm/numa.h | 21 +++ xen/include/asm-arm/paging.h | 13 ++ xen/include/asm-arm/percpu.h | 28 ++++ xen/include/asm-arm/processor.h | 269 +++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/regs.h | 43 ++++++ xen/include/asm-arm/setup.h | 16 +++ xen/include/asm-arm/smp.h | 25 ++++ xen/include/asm-arm/softirq.h | 15 ++ xen/include/asm-arm/spinlock.h | 144 ++++++++++++++++++++ xen/include/asm-arm/string.h | 38 +++++ xen/include/asm-arm/system.h | 202 ++++++++++++++++++++++++++++ xen/include/asm-arm/trace.h | 12 ++ xen/include/asm-arm/types.h | 57 ++++++++ xen/include/asm-arm/xenoprof.h | 12 ++ xen/include/public/arch-arm.h | 125 +++++++++++++++++ xen/include/public/xen.h | 2 + 39 files changed, 2420 insertions(+), 0 deletions(-) create mode 100644 xen/include/asm-arm/atomic.h create mode 100644 xen/include/asm-arm/bitops.h create mode 100644 xen/include/asm-arm/bug.h create mode 100644 xen/include/asm-arm/byteorder.h create mode 100644 xen/include/asm-arm/cache.h create mode 100644 xen/include/asm-arm/config.h create mode 100644 xen/include/asm-arm/cpregs.h create mode 100644 xen/include/asm-arm/current.h create mode 100644 xen/include/asm-arm/debugger.h create mode 100644 xen/include/asm-arm/delay.h create mode 100644 xen/include/asm-arm/desc.h create mode 100644 xen/include/asm-arm/div64.h create mode 100644 xen/include/asm-arm/elf.h create mode 100644 xen/include/asm-arm/event.h create mode 100644 xen/include/asm-arm/flushtlb.h create mode 100644 xen/include/asm-arm/grant_table.h create mode 100644 xen/include/asm-arm/hardirq.h create mode 100644 xen/include/asm-arm/hypercall.h create mode 100644 xen/include/asm-arm/init.h create mode 100644 xen/include/asm-arm/io.h create mode 100644 xen/include/asm-arm/iocap.h create mode 100644 xen/include/asm-arm/multicall.h create mode 100644 xen/include/asm-arm/nmi.h create mode 100644 xen/include/asm-arm/numa.h create mode 100644 xen/include/asm-arm/paging.h create mode 100644 xen/include/asm-arm/percpu.h create mode 100644 xen/include/asm-arm/processor.h create mode 100644 xen/include/asm-arm/regs.h create mode 100644 xen/include/asm-arm/setup.h create mode 100644 xen/include/asm-arm/smp.h create mode 100644 xen/include/asm-arm/softirq.h create mode 100644 xen/include/asm-arm/spinlock.h create mode 100644 xen/include/asm-arm/string.h create mode 100644 xen/include/asm-arm/system.h create mode 100644 xen/include/asm-arm/trace.h create mode 100644 xen/include/asm-arm/types.h create mode 100644 xen/include/asm-arm/xenoprof.h create mode 100644 xen/include/public/arch-arm.h diff --git a/xen/include/asm-arm/atomic.h b/xen/include/asm-arm/atomic.h new file mode 100644 index 0000000..2b9ce0e --- /dev/null +++ b/xen/include/asm-arm/atomic.h @@ -0,0 +1,212 @@ +/* + * arch/arm/include/asm/atomic.h + * + * Copyright (C) 1996 Russell King. + * Copyright (C) 2002 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ARCH_ARM_ATOMIC__ +#define __ARCH_ARM_ATOMIC__ + +#include +#include + +#define build_atomic_read(name, size, type, reg) \ +static inline type name(const volatile type *addr) \ +{ \ + type ret; \ + asm volatile("ldr" size " %0,%1" \ + : reg (ret) \ + : "m" (*(volatile type *)addr)); \ + return ret; \ +} + +#define build_atomic_write(name, size, type, reg) \ +static inline void name(volatile type *addr, type val) \ +{ \ + asm volatile("str" size " %1,%0" \ + : "=m" (*(volatile type *)addr) \ + : reg (val)); \ +} + +build_atomic_read(atomic_read8, "b", uint8_t, "=q") +build_atomic_read(atomic_read16, "h", uint16_t, "=r") +build_atomic_read(atomic_read32, "", uint32_t, "=r") +//build_atomic_read(atomic_read64, "d", uint64_t, "=r") +build_atomic_read(atomic_read_int, "", int, "=r") + +build_atomic_write(atomic_write8, "b", uint8_t, "q") +build_atomic_write(atomic_write16, "h", uint16_t, "r") +build_atomic_write(atomic_write32, "", uint32_t, "r") +//build_atomic_write(atomic_write64, "d", uint64_t, "r") +build_atomic_write(atomic_write_int, "", int, "r") + +/* + * NB. I've pushed the volatile qualifier into the operations. This allows + * fast accessors such as _atomic_read() and _atomic_set() which don't give + * the compiler a fit. + */ +typedef struct { int counter; } atomic_t; + +#define ATOMIC_INIT(i) { (i) } + +/* + * On ARM, ordinary assignment (str instruction) doesn't clear the local + * strex/ldrex monitor on some implementations. The reason we can use it for + * atomic_set() is the clrex or dummy strex done on every exception return. + */ +#define _atomic_read(v) ((v).counter) +#define atomic_read(v) (*(volatile int *)&(v)->counter) + +#define _atomic_set(v,i) (((v).counter) = (i)) +#define atomic_set(v,i) (((v)->counter) = (i)) + +/* + * ARMv6 UP and SMP safe atomic ops. We use load exclusive and + * store exclusive to ensure that these are atomic. We may loop + * to ensure that the update happens. + */ +static inline void atomic_add(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + __asm__ __volatile__("@ atomic_add\n" +"1: ldrex %0, [%3]\n" +" add %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); +} + +static inline int atomic_add_return(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + smp_mb(); + + __asm__ __volatile__("@ atomic_add_return\n" +"1: ldrex %0, [%3]\n" +" add %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); + + smp_mb(); + + return result; +} + +static inline void atomic_sub(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + __asm__ __volatile__("@ atomic_sub\n" +"1: ldrex %0, [%3]\n" +" sub %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); +} + +static inline int atomic_sub_return(int i, atomic_t *v) +{ + unsigned long tmp; + int result; + + smp_mb(); + + __asm__ __volatile__("@ atomic_sub_return\n" +"1: ldrex %0, [%3]\n" +" sub %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) + : "r" (&v->counter), "Ir" (i) + : "cc"); + + smp_mb(); + + return result; +} + +static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) +{ + unsigned long oldval, res; + + smp_mb(); + + do { + __asm__ __volatile__("@ atomic_cmpxchg\n" + "ldrex %1, [%3]\n" + "mov %0, #0\n" + "teq %1, %4\n" + "strexeq %0, %5, [%3]\n" + : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter) + : "r" (&ptr->counter), "Ir" (old), "r" (new) + : "cc"); + } while (res); + + smp_mb(); + + return oldval; +} + +static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) +{ + unsigned long tmp, tmp2; + + __asm__ __volatile__("@ atomic_clear_mask\n" +"1: ldrex %0, [%3]\n" +" bic %0, %0, %4\n" +" strex %1, %0, [%3]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (tmp), "=&r" (tmp2), "+Qo" (*addr) + : "r" (addr), "Ir" (mask) + : "cc"); +} + +#define atomic_inc(v) atomic_add(1, v) +#define atomic_dec(v) atomic_sub(1, v) + +#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) +#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) +#define atomic_inc_return(v) (atomic_add_return(1, v)) +#define atomic_dec_return(v) (atomic_sub_return(1, v)) +#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) + +#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0) + +static inline atomic_t atomic_compareandswap( + atomic_t old, atomic_t new, atomic_t *v) +{ + atomic_t rc; + rc.counter = __cmpxchg(&v->counter, old.counter, new.counter, sizeof(int)); + return rc; +} + +#endif /* __ARCH_ARM_ATOMIC__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/bitops.h b/xen/include/asm-arm/bitops.h new file mode 100644 index 0000000..3d6b30b --- /dev/null +++ b/xen/include/asm-arm/bitops.h @@ -0,0 +1,195 @@ +/* + * Copyright 1995, Russell King. + * Various bits and pieces copyrights include: + * Linus Torvalds (test_bit). + * Big endian support: Copyright 2001, Nicolas Pitre + * reworked by rmk. + */ + +#ifndef _ARM_BITOPS_H +#define _ARM_BITOPS_H + +extern void _set_bit(int nr, volatile void * p); +extern void _clear_bit(int nr, volatile void * p); +extern void _change_bit(int nr, volatile void * p); +extern int _test_and_set_bit(int nr, volatile void * p); +extern int _test_and_clear_bit(int nr, volatile void * p); +extern int _test_and_change_bit(int nr, volatile void * p); + +#define set_bit(n,p) _set_bit(n,p) +#define clear_bit(n,p) _clear_bit(n,p) +#define change_bit(n,p) _change_bit(n,p) +#define test_and_set_bit(n,p) _test_and_set_bit(n,p) +#define test_and_clear_bit(n,p) _test_and_clear_bit(n,p) +#define test_and_change_bit(n,p) _test_and_change_bit(n,p) + +#define BIT(nr) (1UL << (nr)) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) +#define BITS_PER_BYTE 8 + +#define ADDR (*(volatile long *) addr) +#define CONST_ADDR (*(const volatile long *) addr) + +/** + * __test_and_set_bit - Set a bit and return its old value + * @nr: Bit to set + * @addr: Address to count from + * + * This operation is non-atomic and can be reordered. + * If two examples of this operation race, one can appear to succeed + * but actually fail. You must protect multiple accesses with a lock. + */ +static inline int __test_and_set_bit(int nr, volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old | mask; + return (old & mask) != 0; +} + +/** + * __test_and_clear_bit - Clear a bit and return its old value + * @nr: Bit to clear + * @addr: Address to count from + * + * This operation is non-atomic and can be reordered. + * If two examples of this operation race, one can appear to succeed + * but actually fail. You must protect multiple accesses with a lock. + */ +static inline int __test_and_clear_bit(int nr, volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old & ~mask; + return (old & mask) != 0; +} + +/* WARNING: non atomic and it can be reordered! */ +static inline int __test_and_change_bit(int nr, + volatile void *addr) +{ + unsigned long mask = BIT_MASK(nr); + volatile unsigned long *p = + ((volatile unsigned long *)addr) + BIT_WORD(nr); + unsigned long old = *p; + + *p = old ^ mask; + return (old & mask) != 0; +} + +/** + * test_bit - Determine whether a bit is set + * @nr: bit number to test + * @addr: Address to start counting from + */ +static inline int test_bit(int nr, const volatile void *addr) +{ + const volatile unsigned long *p = (const volatile unsigned long *)addr; + return 1UL & (p[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); +} + + +extern unsigned int _find_first_bit( + const unsigned long *addr, unsigned int size); +extern unsigned int _find_next_bit( + const unsigned long *addr, unsigned int size, unsigned int offset); +extern unsigned int _find_first_zero_bit( + const unsigned long *addr, unsigned int size); +extern unsigned int _find_next_zero_bit( + const unsigned long *addr, unsigned int size, unsigned int offset); + +/* + * These are the little endian, atomic definitions. + */ +#define find_first_zero_bit(p,sz) _find_first_zero_bit(p,sz) +#define find_next_zero_bit(p,sz,off) _find_next_zero_bit(p,sz,off) +#define find_first_bit(p,sz) _find_first_bit(p,sz) +#define find_next_bit(p,sz,off) _find_next_bit(p,sz,off) + +static inline int constant_fls(int x) +{ + int r = 32; + + if (!x) + return 0; + if (!(x & 0xffff0000u)) { + x <<= 16; + r -= 16; + } + if (!(x & 0xff000000u)) { + x <<= 8; + r -= 8; + } + if (!(x & 0xf0000000u)) { + x <<= 4; + r -= 4; + } + if (!(x & 0xc0000000u)) { + x <<= 2; + r -= 2; + } + if (!(x & 0x80000000u)) { + x <<= 1; + r -= 1; + } + return r; +} + +/* + * On ARMv5 and above those functions can be implemented around + * the clz instruction for much better code efficiency. + */ + +static inline int fls(int x) +{ + int ret; + + if (__builtin_constant_p(x)) + return constant_fls(x); + + asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); + ret = 32 - ret; + return ret; +} + +#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) + +/** + * find_first_set_bit - find the first set bit in @word + * @word: the word to search + * + * Returns the bit-number of the first set bit (first bit being 0). + * The input must *not* be zero. + */ +static inline unsigned int find_first_set_bit(unsigned long word) +{ + return ffs(word) - 1; +} + +/** + * hweightN - returns the hamming weight of a N-bit word + * @x: the word to weigh + * + * The Hamming Weight of a number is the total number of bits set in it. + */ +#define hweight64(x) generic_hweight64(x) +#define hweight32(x) generic_hweight32(x) +#define hweight16(x) generic_hweight16(x) +#define hweight8(x) generic_hweight8(x) + +#endif /* _ARM_BITOPS_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/bug.h b/xen/include/asm-arm/bug.h new file mode 100644 index 0000000..bc2532c --- /dev/null +++ b/xen/include/asm-arm/bug.h @@ -0,0 +1,15 @@ +#ifndef __ARM_BUG_H__ +#define __ARM_BUG_H__ + +#define BUG() __bug(__FILE__, __LINE__) +#define WARN() __warn(__FILE__, __LINE__) + +#endif /* __X86_BUG_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/byteorder.h b/xen/include/asm-arm/byteorder.h new file mode 100644 index 0000000..f6ad883 --- /dev/null +++ b/xen/include/asm-arm/byteorder.h @@ -0,0 +1,16 @@ +#ifndef __ASM_ARM_BYTEORDER_H__ +#define __ASM_ARM_BYTEORDER_H__ + +#define __BYTEORDER_HAS_U64__ + +#include + +#endif /* __ASM_ARM_BYTEORDER_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/cache.h b/xen/include/asm-arm/cache.h new file mode 100644 index 0000000..41b6291 --- /dev/null +++ b/xen/include/asm-arm/cache.h @@ -0,0 +1,20 @@ +#ifndef __ARCH_ARM_CACHE_H +#define __ARCH_ARM_CACHE_H + +#include + +/* L1 cache line size */ +#define L1_CACHE_SHIFT (CONFIG_ARM_L1_CACHE_SHIFT) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/config.h b/xen/include/asm-arm/config.h new file mode 100644 index 0000000..12285dd --- /dev/null +++ b/xen/include/asm-arm/config.h @@ -0,0 +1,122 @@ +/****************************************************************************** + * config.h + * + * A Linux-style configuration list. + */ + +#ifndef __ARM_CONFIG_H__ +#define __ARM_CONFIG_H__ + +#define CONFIG_PAGING_LEVELS 3 + +#define CONFIG_ARM 1 + +#define CONFIG_ARM_L1_CACHE_SHIFT 7 /* XXX */ + +#define CONFIG_SMP 1 + +#define CONFIG_DOMAIN_PAGE 1 + +#define OPT_CONSOLE_STR "com1" + +#ifdef MAX_PHYS_CPUS +#define NR_CPUS MAX_PHYS_CPUS +#else +#define NR_CPUS 128 +#endif + +#define MAX_VIRT_CPUS 128 /* XXX */ +#define MAX_HVM_VCPUS MAX_VIRT_CPUS + +#define asmlinkage /* Nothing needed */ + +/* Linkage for ARM */ +#define __ALIGN .align 2 +#define __ALIGN_STR ".align 2" +#ifdef __ASSEMBLY__ +#define ALIGN __ALIGN +#define ALIGN_STR __ALIGN_STR +#define ENTRY(name) \ + .globl name; \ + ALIGN; \ + name: +#define END(name) \ + .size name, .-name +#define ENDPROC(name) \ + .type name, %function; \ + END(name) +#endif + +/* + * Memory layout: + * 0 - 2M Unmapped + * 2M - 4M Xen text, data, bss + * 4M - 6M Fixmap: special-purpose 4K mapping slots + * + * 32M - 128M Frametable: 24 bytes per page for 16GB of RAM + * + * 1G - 2G Xenheap: always-mapped memory + * 2G - 4G Domheap: on-demand-mapped + */ + +#define XEN_VIRT_START 0x00200000 +#define FIXMAP_ADDR(n) (0x00400000 + (n) * PAGE_SIZE) +#define FRAMETABLE_VIRT_START 0x02000000 +#define XENHEAP_VIRT_START 0x40000000 +#define DOMHEAP_VIRT_START 0x80000000 + +#define HYPERVISOR_VIRT_START mk_unsigned_long(XEN_VIRT_START) + +#define DOMHEAP_ENTRIES 1024 /* 1024 2MB mapping slots */ + +/* Fixmap slots */ +#define FIXMAP_CONSOLE 0 /* The primary UART */ +#define FIXMAP_PT 1 /* Temporary mappings of pagetable pages */ +#define FIXMAP_MISC 2 /* Ephemeral mappings of hardware */ +#define FIXMAP_GICD 3 /* Interrupt controller: distributor registers */ +#define FIXMAP_GICC1 4 /* Interrupt controller: CPU registers (first page) */ +#define FIXMAP_GICC2 5 /* Interrupt controller: CPU registers (second page) */ +#define FIXMAP_GICH 6 /* Interrupt controller: virtual interface control registers */ + +#define PAGE_SHIFT 12 + +#ifndef __ASSEMBLY__ +#define PAGE_SIZE (1L << PAGE_SHIFT) +#else +#define PAGE_SIZE (1 << PAGE_SHIFT) +#endif +#define PAGE_MASK (~(PAGE_SIZE-1)) +#define PAGE_FLAG_MASK (~0) + +#define STACK_ORDER 3 +#define STACK_SIZE (PAGE_SIZE << STACK_ORDER) + +#ifndef __ASSEMBLY__ +extern unsigned long xen_phys_start; +extern unsigned long xenheap_phys_end; +extern unsigned long frametable_virt_end; +#endif + +#define supervisor_mode_kernel (0) + +#define watchdog_disable() ((void)0) +#define watchdog_enable() ((void)0) + +/* Board-specific: base address of PL011 UART */ +#define EARLY_UART_ADDRESS 0x1c090000 +/* Board-specific: base address of GIC + its regs */ +#define GIC_BASE_ADDRESS 0x2c000000 +#define GIC_DR_OFFSET 0x1000 +#define GIC_CR_OFFSET 0x2000 +#define GIC_HR_OFFSET 0x4000 /* Guess work http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/064219.html */ +#define GIC_VR_OFFSET 0x6000 /* Virtual Machine CPU interface) */ + +#endif /* __ARM_CONFIG_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h new file mode 100644 index 0000000..3a4028d --- /dev/null +++ b/xen/include/asm-arm/cpregs.h @@ -0,0 +1,207 @@ +#ifndef __ASM_ARM_CPREGS_H +#define __ASM_ARM_CPREGS_H + +#include + +/* Co-processor registers */ + +/* Layout as used in assembly, with src/dest registers mixed in */ +#define __CP32(r, coproc, opc1, crn, crm, opc2) coproc, opc1, r, crn, crm, opc2 +#define __CP64(r1, r2, coproc, opc, crm) coproc, opc, r1, r2, crm +#define CP32(r, name...) __CP32(r, name) +#define CP64(r, name...) __CP64(r, name) + +/* Stringified for inline assembly */ +#define LOAD_CP32(r, name...) "mrc " __stringify(CP32(%r, name)) ";" +#define STORE_CP32(r, name...) "mcr " __stringify(CP32(%r, name)) ";" +#define LOAD_CP64(r, name...) "mrrc " __stringify(CP64(%r, %H##r, name)) ";" +#define STORE_CP64(r, name...) "mcrr " __stringify(CP64(%r, %H##r, name)) ";" + +/* C wrappers */ +#define READ_CP32(name...) ({ \ + register uint32_t _r; \ + asm volatile(LOAD_CP32(0, name) : "=r" (_r)); \ + _r; }) + +#define WRITE_CP32(v, name...) do { \ + register uint32_t _r = (v); \ + asm volatile(STORE_CP32(0, name) : : "r" (_r)); \ +} while (0) + +#define READ_CP64(name...) ({ \ + register uint64_t _r; \ + asm volatile(LOAD_CP64(0, name) : "=r" (_r)); \ + _r; }) + +#define WRITE_CP64(v, name...) do { \ + register uint64_t _r = (v); \ + asm volatile(STORE_CP64(0, name) : : "r" (_r)); \ +} while (0) + +#define __HSR_CPREG_c0 0 +#define __HSR_CPREG_c1 1 +#define __HSR_CPREG_c2 2 +#define __HSR_CPREG_c3 3 +#define __HSR_CPREG_c4 4 +#define __HSR_CPREG_c5 5 +#define __HSR_CPREG_c6 6 +#define __HSR_CPREG_c7 7 +#define __HSR_CPREG_c8 8 +#define __HSR_CPREG_c9 9 +#define __HSR_CPREG_c10 10 +#define __HSR_CPREG_c11 11 +#define __HSR_CPREG_c12 12 +#define __HSR_CPREG_c13 13 +#define __HSR_CPREG_c14 14 +#define __HSR_CPREG_c15 15 + +#define __HSR_CPREG_0 0 +#define __HSR_CPREG_1 1 +#define __HSR_CPREG_2 2 +#define __HSR_CPREG_3 3 +#define __HSR_CPREG_4 4 +#define __HSR_CPREG_5 5 +#define __HSR_CPREG_6 6 +#define __HSR_CPREG_7 7 + +#define _HSR_CPREG32(cp,op1,crn,crm,op2) \ + ((__HSR_CPREG_##crn) << HSR_CP32_CRN_SHIFT) | \ + ((__HSR_CPREG_##crm) << HSR_CP32_CRM_SHIFT) | \ + ((__HSR_CPREG_##op1) << HSR_CP32_OP1_SHIFT) | \ + ((__HSR_CPREG_##op2) << HSR_CP32_OP2_SHIFT) + +#define _HSR_CPREG64(cp,op1,crm) \ + ((__HSR_CPREG_##crm) << HSR_CP64_CRM_SHIFT) | \ + ((__HSR_CPREG_##op1) << HSR_CP64_OP1_SHIFT) + +/* Encode a register as per HSR ISS pattern */ +#define HSR_CPREG32(X) _HSR_CPREG32(X) +#define HSR_CPREG64(X) _HSR_CPREG64(X) + +/* + * Order registers by Coprocessor-> CRn-> Opcode 1-> CRm-> Opcode 2 + * + * This matches the ordering used in the ARM as well as the groupings + * which the CP registers are allocated in. + * + * This is slightly different to the form of the instruction + * arguments, which are cp,opc1,crn,crm,opc2. + */ + +/* Coprocessor 15 */ + +/* CP15 CR0: CPUID and Cache Type Registers */ +#define ID_PFR0 p15,0,c0,c1,0 /* Processor Feature Register 0 */ +#define ID_PFR1 p15,0,c0,c1,1 /* Processor Feature Register 1 */ +#define CCSIDR p15,1,c0,c0,0 /* Cache Size ID Registers */ +#define CLIDR p15,1,c0,c0,1 /* Cache Level ID Register */ +#define CSSELR p15,2,c0,c0,0 /* Cache Size Selection Register */ + +/* CP15 CR1: System Control Registers */ +#define SCTLR p15,0,c1,c0,0 /* System Control Register */ +#define SCR p15,0,c1,c1,0 /* Secure Configuration Register */ +#define NSACR p15,0,c1,c1,2 /* Non-Secure Access Control Register */ +#define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */ +#define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */ + +/* CP15 CR2: Translation Table Base and Control Registers */ +#define TTBR0 p15,0,c2,c0,0 /* Translation Table Base Reg. 0 */ +#define TTBR1 p15,0,c2,c0,1 /* Translation Table Base Reg. 1 */ +#define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */ +#define HTTBR p15,4,c2 /* Hyp. Translation Table Base Register */ +#define HTCR p15,4,c2,c0,2 /* Hyp. Translation Control Register */ +#define VTCR p15,4,c2,c1,2 /* Virtualization Translation Control Register */ +#define VTTBR p15,6,c2 /* Virtualization Translation Table Base Register */ + +/* CP15 CR3: Domain Access Control Register */ + +/* CP15 CR4: */ + +/* CP15 CR5: Fault Status Registers */ +#define DFSR p15,0,c5,c0,0 /* Data Fault Status Register */ +#define IFSR p15,0,c5,c0,1 /* Instruction Fault Status Register */ +#define HSR p15,4,c5,c2,0 /* Hyp. Syndrome Register */ + +/* CP15 CR6: Fault Address Registers */ +#define DFAR p15,0,c6,c0,0 /* Data Fault Address Register */ +#define IFAR p15,0,c6,c0,2 /* Instruction Fault Address Register */ +#define HDFAR p15,4,c6,c0,0 /* Hyp. Data Fault Address Register */ +#define HIFAR p15,4,c6,c0,2 /* Hyp. Instruction Fault Address Register */ +#define HPFAR p15,4,c6,c0,4 /* Hyp. IPA Fault Address Register */ + +/* CP15 CR7: Cache and address translation operations */ +#define PAR p15,0,c7 /* Physical Address Register */ +#define ICIALLUIS p15,0,c7,c1,0 /* Invalidate all instruction caches to PoU inner shareable */ +#define BPIALLIS p15,0,c7,c1,6 /* Invalidate entire branch predictor array inner shareable */ +#define ICIALLU p15,0,c7,c5,0 /* Invalidate all instruction caches to PoU */ +#define BPIALL p15,0,c7,c5,6 /* Invalidate entire branch predictor array */ +#define ATS1CPR p15,0,c7,c8,0 /* Address Translation Stage 1. Non-Secure Kernel Read */ +#define ATS1CPW p15,0,c7,c8,1 /* Address Translation Stage 1. Non-Secure Kernel Write */ +#define ATS1CUR p15,0,c7,c8,2 /* Address Translation Stage 1. Non-Secure User Read */ +#define ATS1CUW p15,0,c7,c8,3 /* Address Translation Stage 1. Non-Secure User Write */ +#define ATS12NSOPR p15,0,c7,c8,4 /* Address Translation Stage 1+2 Non-Secure Kernel Read */ +#define ATS12NSOPW p15,0,c7,c8,5 /* Address Translation Stage 1+2 Non-Secure Kernel Write */ +#define ATS12NSOUR p15,0,c7,c8,6 /* Address Translation Stage 1+2 Non-Secure User Read */ +#define ATS12NSOUW p15,0,c7,c8,7 /* Address Translation Stage 1+2 Non-Secure User Write */ +#define DCCMVAC p15,0,c7,c10,1 /* Clean data or unified cache line by MVA to PoC */ +#define DCCISW p15,0,c7,c14,2 /* Clean and invalidate data cache line by set/way */ +#define ATS1HR p15,4,c7,c8,0 /* Address Translation Stage 1 Hyp. Read */ +#define ATS1HW p15,4,c7,c8,1 /* Address Translation Stage 1 Hyp. Write */ + +/* CP15 CR8: TLB maintenance operations */ +#define TLBIALLIS p15,0,c8,c3,0 /* Invalidate entire TLB innrer shareable */ +#define TLBIMVAIS p15,0,c8,c3,1 /* Invalidate unified TLB entry by MVA inner shareable */ +#define TLBIASIDIS p15,0,c8,c3,2 /* Invalidate unified TLB by ASID match inner shareable */ +#define TLBIMVAAIS p15,0,c8,c3,3 /* Invalidate unified TLB entry by MVA all ASID inner shareable */ +#define DTLBIALL p15,0,c8,c6,0 /* Invalidate data TLB */ +#define DTLBIMVA p15,0,c8,c6,1 /* Invalidate data TLB entry by MVA */ +#define DTLBIASID p15,0,c8,c6,2 /* Invalidate data TLB by ASID match */ +#define TLBILLHIS p15,4,c8,c3,0 /* Invalidate Entire Hyp. Unified TLB inner shareable */ +#define TLBIMVAHIS p15,4,c8,c3,1 /* Invalidate Unified Hyp. TLB by MVA inner shareable */ +#define TLBIALLNSNHIS p15,4,c8,c7,4 /* Invalidate Entire Non-Secure Non-Hyp. Unified TLB inner shareable */ +#define TLBIALLH p15,4,c8,c7,0 /* Invalidate Entire Hyp. Unified TLB */ +#define TLBIMVAH p15,4,c8,c7,1 /* Invalidate Unified Hyp. TLB by MVA */ +#define TLBIALLNSNH p15,4,c8,c7,4 /* Invalidate Entire Non-Secure Non-Hyp. Unified TLB */ + +/* CP15 CR9: */ + +/* CP15 CR10: */ +#define MAIR0 p15,0,c10,c2,0 /* Memory Attribute Indirection Register 0 */ +#define MAIR1 p15,0,c10,c2,1 /* Memory Attribute Indirection Register 1 */ +#define HMAIR0 p15,4,c10,c2,0 /* Hyp. Memory Attribute Indirection Register 0 */ +#define HMAIR1 p15,4,c10,c2,1 /* Hyp. Memory Attribute Indirection Register 1 */ + +/* CP15 CR11: DMA Operations for TCM Access */ + +/* CP15 CR12: */ +#define HVBAR p15,4,c12,c0,0 /* Hyp. Vector Base Address Register */ + +/* CP15 CR13: */ +#define FCSEIDR p15,0,c13,c0,0 /* FCSE Process ID Register */ +#define CONTEXTIDR p15,0,c13,c0,1 /* Context ID Register */ + +/* CP15 CR14: */ +#define CNTPCT p15,0,c14 /* Time counter value */ +#define CNTFRQ p15,0,c14,c0,0 /* Time counter frequency */ +#define CNTKCTL p15,0,c14,c1,0 /* Time counter kernel control */ +#define CNTP_TVAL p15,0,c14,c2,0 /* Physical Timer value */ +#define CNTP_CTL p15,0,c14,c2,1 /* Physical Timer control register */ +#define CNTVCT p15,1,c14 /* Time counter value + offset */ +#define CNTP_CVAL p15,2,c14 /* Physical Timer comparator */ +#define CNTVOFF p15,4,c14 /* Time counter offset */ +#define CNTHCTL p15,4,c14,c1,0 /* Time counter hyp. control */ +#define CNTHP_TVAL p15,4,c14,c2,0 /* Hyp. Timer value */ +#define CNTHP_CTL p15,4,c14,c2,1 /* Hyp. Timer control register */ +#define CNTHP_CVAL p15,6,c14 /* Hyp. Timer comparator */ + +/* CP15 CR15: Implementation Defined Registers */ + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/current.h b/xen/include/asm-arm/current.h new file mode 100644 index 0000000..826efa5 --- /dev/null +++ b/xen/include/asm-arm/current.h @@ -0,0 +1,60 @@ +#ifndef __ARM_CURRENT_H__ +#define __ARM_CURRENT_H__ + +#include +#include +#include + +#ifndef __ASSEMBLY__ + +struct vcpu; + +struct cpu_info { + struct cpu_user_regs guest_cpu_user_regs; + unsigned long elr; + unsigned int processor_id; + struct vcpu *current_vcpu; + unsigned long per_cpu_offset; +}; + +static inline struct cpu_info *get_cpu_info(void) +{ + register unsigned long sp asm ("sp"); + return (struct cpu_info *)((sp & ~(STACK_SIZE - 1)) + STACK_SIZE - sizeof(struct cpu_info)); +} + +#define get_current() (get_cpu_info()->current_vcpu) +#define set_current(vcpu) (get_cpu_info()->current_vcpu = (vcpu)) +#define current (get_current()) + +#define get_processor_id() (get_cpu_info()->processor_id) +#define set_processor_id(id) do { \ + struct cpu_info *ci__ = get_cpu_info(); \ + ci__->per_cpu_offset = __per_cpu_offset[ci__->processor_id = (id)]; \ +} while (0) + +#define guest_cpu_user_regs() (&get_cpu_info()->guest_cpu_user_regs) + +#define reset_stack_and_jump(__fn) \ + __asm__ __volatile__ ( \ + "mov sp,%0; b "STR(__fn) \ + : : "r" (guest_cpu_user_regs()) : "memory" ) +#endif + + +/* + * Which VCPU's state is currently running on each CPU? + * This is not necesasrily the same as 'current' as a CPU may be + * executing a lazy state switch. + */ +DECLARE_PER_CPU(struct vcpu *, curr_vcpu); + +#endif /* __ARM_CURRENT_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/debugger.h b/xen/include/asm-arm/debugger.h new file mode 100644 index 0000000..84b2eec --- /dev/null +++ b/xen/include/asm-arm/debugger.h @@ -0,0 +1,15 @@ +#ifndef __ARM_DEBUGGER_H__ +#define __ARM_DEBUGGER_H__ + +#define debugger_trap_fatal(v, r) (0) +#define debugger_trap_immediate() (0) + +#endif /* __ARM_DEBUGGER_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/delay.h b/xen/include/asm-arm/delay.h new file mode 100644 index 0000000..6250774 --- /dev/null +++ b/xen/include/asm-arm/delay.h @@ -0,0 +1,15 @@ +#ifndef _ARM_DELAY_H +#define _ARM_DELAY_H + +extern void __udelay(unsigned long usecs); +#define udelay(n) __udelay(n) + +#endif /* defined(_ARM_DELAY_H) */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/desc.h b/xen/include/asm-arm/desc.h new file mode 100644 index 0000000..3989e8a --- /dev/null +++ b/xen/include/asm-arm/desc.h @@ -0,0 +1,12 @@ +#ifndef __ARCH_DESC_H +#define __ARCH_DESC_H + +#endif /* __ARCH_DESC_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/div64.h b/xen/include/asm-arm/div64.h new file mode 100644 index 0000000..7b00808 --- /dev/null +++ b/xen/include/asm-arm/div64.h @@ -0,0 +1,235 @@ +/* Taken from Linux arch/arm */ +#ifndef __ASM_ARM_DIV64 +#define __ASM_ARM_DIV64 + +#include +#include + +/* + * The semantics of do_div() are: + * + * uint32_t do_div(uint64_t *n, uint32_t base) + * { + * uint32_t remainder = *n % base; + * *n = *n / base; + * return remainder; + * } + * + * In other words, a 64-bit dividend with a 32-bit divisor producing + * a 64-bit result and a 32-bit remainder. To accomplish this optimally + * we call a special __do_div64 helper with completely non standard + * calling convention for arguments and results (beware). + */ + +#ifdef __ARMEB__ +#define __xh "r0" +#define __xl "r1" +#else +#define __xl "r0" +#define __xh "r1" +#endif + +#define __do_div_asm(n, base) \ +({ \ + register unsigned int __base asm("r4") = base; \ + register unsigned long long __n asm("r0") = n; \ + register unsigned long long __res asm("r2"); \ + register unsigned int __rem asm(__xh); \ + asm( __asmeq("%0", __xh) \ + __asmeq("%1", "r2") \ + __asmeq("%2", "r0") \ + __asmeq("%3", "r4") \ + "bl __do_div64" \ + : "=r" (__rem), "=r" (__res) \ + : "r" (__n), "r" (__base) \ + : "ip", "lr", "cc"); \ + n = __res; \ + __rem; \ +}) + +#if __GNUC__ < 4 + +/* + * gcc versions earlier than 4.0 are simply too problematic for the + * optimized implementation below. First there is gcc PR 15089 that + * tend to trig on more complex constructs, spurious .global __udivsi3 + * are inserted even if none of those symbols are referenced in the + * generated code, and those gcc versions are not able to do constant + * propagation on long long values anyway. + */ +#define do_div(n, base) __do_div_asm(n, base) + +#elif __GNUC__ >= 4 + +#include + +/* + * If the divisor happens to be constant, we determine the appropriate + * inverse at compile time to turn the division into a few inline + * multiplications instead which is much faster. And yet only if compiling + * for ARMv4 or higher (we need umull/umlal) and if the gcc version is + * sufficiently recent to perform proper long long constant propagation. + * (It is unfortunate that gcc doesn't perform all this internally.) + */ +#define do_div(n, base) \ +({ \ + unsigned int __r, __b = (base); \ + if (!__builtin_constant_p(__b) || __b == 0) { \ + /* non-constant divisor (or zero): slow path */ \ + __r = __do_div_asm(n, __b); \ + } else if ((__b & (__b - 1)) == 0) { \ + /* Trivial: __b is constant and a power of 2 */ \ + /* gcc does the right thing with this code. */ \ + __r = n; \ + __r &= (__b - 1); \ + n /= __b; \ + } else { \ + /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ + /* We rely on the fact that most of this code gets */ \ + /* optimized away at compile time due to constant */ \ + /* propagation and only a couple inline assembly */ \ + /* instructions should remain. Better avoid any */ \ + /* code construct that might prevent that. */ \ + unsigned long long __res, __x, __t, __m, __n = n; \ + unsigned int __c, __p, __z = 0; \ + /* preserve low part of n for reminder computation */ \ + __r = __n; \ + /* determine number of bits to represent __b */ \ + __p = 1 << __div64_fls(__b); \ + /* compute __m = ((__p << 64) + __b - 1) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ + /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ + __x = ~0ULL / __b * __b - 1; \ + __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ + __res >>= 32; \ + __res += (__m & 0xffffffff) * (__x >> 32); \ + __t = __res; \ + __res += (__x & 0xffffffff) * (__m >> 32); \ + __t = (__res < __t) ? (1ULL << 32) : 0; \ + __res = (__res >> 32) + __t; \ + __res += (__m >> 32) * (__x >> 32); \ + __res /= __p; \ + /* Now sanitize and optimize what we've got. */ \ + if (~0ULL % (__b / (__b & -__b)) == 0) { \ + /* those cases can be simplified with: */ \ + __n /= (__b & -__b); \ + __m = ~0ULL / (__b / (__b & -__b)); \ + __p = 1; \ + __c = 1; \ + } else if (__res != __x / __b) { \ + /* We can't get away without a correction */ \ + /* to compensate for bit truncation errors. */ \ + /* To avoid it we'd need an additional bit */ \ + /* to represent __m which would overflow it. */ \ + /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ + __c = 1; \ + /* Compute __m = (__p << 64) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += ((~0ULL % __b + 1) * __p) / __b; \ + } else { \ + /* Reduce __m/__p, and try to clear bit 31 */ \ + /* of __m when possible otherwise that'll */ \ + /* need extra overflow handling later. */ \ + unsigned int __bits = -(__m & -__m); \ + __bits |= __m >> 32; \ + __bits = (~__bits) << 1; \ + /* If __bits == 0 then setting bit 31 is */ \ + /* unavoidable. Simply apply the maximum */ \ + /* possible reduction in that case. */ \ + /* Otherwise the MSB of __bits indicates the */ \ + /* best reduction we should apply. */ \ + if (!__bits) { \ + __p /= (__m & -__m); \ + __m /= (__m & -__m); \ + } else { \ + __p >>= __div64_fls(__bits); \ + __m >>= __div64_fls(__bits); \ + } \ + /* No correction needed. */ \ + __c = 0; \ + } \ + /* Now we have a combination of 2 conditions: */ \ + /* 1) whether or not we need a correction (__c), and */ \ + /* 2) whether or not there might be an overflow in */ \ + /* the cross product (__m & ((1<<63) | (1<<31))) */ \ + /* Select the best insn combination to perform the */ \ + /* actual __m * __n / (__p << 64) operation. */ \ + if (!__c) { \ + asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + __res = __m; \ + asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "+&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ + "cmn %Q0, %Q1\n\t" \ + "adcs %R0, %R0, %R1\n\t" \ + "adc %Q0, %3, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n), "r" (__z) \ + : "cc" ); \ + } \ + if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ + "umlal %R0, %Q0, %Q1, %R2\n\t" \ + "mov %R0, #0\n\t" \ + "umlal %Q0, %R0, %R1, %R2" \ + : "+&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ + "umlal %R0, %1, %Q2, %R3\n\t" \ + "mov %R0, #0\n\t" \ + "adds %Q0, %1, %Q0\n\t" \ + "adc %R0, %R0, #0\n\t" \ + "umlal %Q0, %R0, %R2, %R3" \ + : "+&r" (__res), "+&r" (__z) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } \ + __res /= __p; \ + /* The reminder can be computed with 32-bit regs */ \ + /* only, and gcc is good at that. */ \ + { \ + unsigned int __res0 = __res; \ + unsigned int __b0 = __b; \ + __r -= __res0 * __b0; \ + } \ + /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ + n = __res; \ + } \ + __r; \ +}) + +/* our own fls implementation to make sure constant propagation is fine */ +#define __div64_fls(bits) \ +({ \ + unsigned int __left = (bits), __nr = 0; \ + if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ + if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ + if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ + if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ + if (__left & 0x00000002) __nr += 1; \ + __nr; \ +}) + +#endif + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/elf.h b/xen/include/asm-arm/elf.h new file mode 100644 index 0000000..12d487c --- /dev/null +++ b/xen/include/asm-arm/elf.h @@ -0,0 +1,33 @@ +#ifndef __ARM_ELF_H__ +#define __ARM_ELF_H__ + +typedef struct { + unsigned long r0; + unsigned long r1; + unsigned long r2; + unsigned long r3; + unsigned long r4; + unsigned long r5; + unsigned long r6; + unsigned long r7; + unsigned long r8; + unsigned long r9; + unsigned long r10; + unsigned long r11; + unsigned long r12; + unsigned long sp; + unsigned long lr; + unsigned long pc; +} ELF_Gregset; + +#endif /* __ARM_ELF_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/event.h b/xen/include/asm-arm/event.h new file mode 100644 index 0000000..6b2fb7c --- /dev/null +++ b/xen/include/asm-arm/event.h @@ -0,0 +1,41 @@ +#ifndef __ASM_EVENT_H__ +#define __ASM_EVENT_H__ + +void vcpu_kick(struct vcpu *v); +void vcpu_mark_events_pending(struct vcpu *v); + +static inline int local_events_need_delivery(void) +{ + /* TODO + * return (vcpu_info(v, evtchn_upcall_pending) && + !vcpu_info(v, evtchn_upcall_mask)); */ + return 0; +} + +int local_event_delivery_is_enabled(void); + +static inline void local_event_delivery_disable(void) +{ + /* TODO current->vcpu_info->evtchn_upcall_mask = 1; */ +} + +static inline void local_event_delivery_enable(void) +{ + /* TODO current->vcpu_info->evtchn_upcall_mask = 0; */ +} + +/* No arch specific virq definition now. Default to global. */ +static inline int arch_virq_is_global(int virq) +{ + return 1; +} + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h new file mode 100644 index 0000000..c8486fc --- /dev/null +++ b/xen/include/asm-arm/flushtlb.h @@ -0,0 +1,31 @@ +#ifndef __FLUSHTLB_H__ +#define __FLUSHTLB_H__ + +#include + +/* + * Filter the given set of CPUs, removing those that definitely flushed their + * TLB since @page_timestamp. + */ +/* XXX lazy implementation just doesn't clear anything.... */ +#define tlbflush_filter(mask, page_timestamp) \ +do { \ +} while ( 0 ) + +#define tlbflush_current_time() (0) + +/* Flush local TLBs */ +void flush_tlb_local(void); + +/* Flush specified CPUs' TLBs */ +void flush_tlb_mask(const cpumask_t *mask); + +#endif /* __FLUSHTLB_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/grant_table.h b/xen/include/asm-arm/grant_table.h new file mode 100644 index 0000000..8f6ffd8 --- /dev/null +++ b/xen/include/asm-arm/grant_table.h @@ -0,0 +1,35 @@ +#ifndef __ASM_GRANT_TABLE_H__ +#define __ASM_GRANT_TABLE_H__ + +#include + +#define INVALID_GFN (-1UL) +#define INITIAL_NR_GRANT_FRAMES 1 + +void gnttab_clear_flag(unsigned long nr, uint16_t *addr); +int create_grant_host_mapping(unsigned long gpaddr, + unsigned long mfn, unsigned int flags, unsigned int + cache_flags); +#define gnttab_host_mapping_get_page_type(op, d, rd) (0) +int replace_grant_host_mapping(unsigned long gpaddr, unsigned long mfn, + unsigned long new_gpaddr, unsigned int flags); +void gnttab_mark_dirty(struct domain *d, unsigned long l); +#define gnttab_create_status_page(d, t, i) (0) +#define gnttab_create_shared_page(d, t, i) (0) +#define gnttab_shared_gmfn(d, t, i) (0) +#define gnttab_status_gmfn(d, t, i) (0) +#define gnttab_release_host_mappings(domain) 1 +static inline int replace_grant_supported(void) +{ + return 1; +} + +#endif /* __ASM_GRANT_TABLE_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/hardirq.h b/xen/include/asm-arm/hardirq.h new file mode 100644 index 0000000..9c031a8 --- /dev/null +++ b/xen/include/asm-arm/hardirq.h @@ -0,0 +1,28 @@ +#ifndef __ASM_HARDIRQ_H +#define __ASM_HARDIRQ_H + +#include +#include +#include + +typedef struct { + unsigned long __softirq_pending; + unsigned int __local_irq_count; +} __cacheline_aligned irq_cpustat_t; + +#include /* Standard mappings for irq_cpustat_t above */ + +#define in_irq() (local_irq_count(smp_processor_id()) != 0) + +#define irq_enter() (local_irq_count(smp_processor_id())++) +#define irq_exit() (local_irq_count(smp_processor_id())--) + +#endif /* __ASM_HARDIRQ_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/hypercall.h b/xen/include/asm-arm/hypercall.h new file mode 100644 index 0000000..90a87ef --- /dev/null +++ b/xen/include/asm-arm/hypercall.h @@ -0,0 +1,24 @@ +#ifndef __ASM_ARM_HYPERCALL_H__ +#define __ASM_ARM_HYPERCALL_H__ + +#include /* for arch_do_domctl */ + +struct vcpu; +extern long +arch_do_vcpu_op( + int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg); + +extern long +arch_do_sysctl( + struct xen_sysctl *op, + XEN_GUEST_HANDLE(xen_sysctl_t) u_sysctl); + +#endif /* __ASM_ARM_HYPERCALL_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/init.h b/xen/include/asm-arm/init.h new file mode 100644 index 0000000..5f44929 --- /dev/null +++ b/xen/include/asm-arm/init.h @@ -0,0 +1,12 @@ +#ifndef _XEN_ASM_INIT_H +#define _XEN_ASM_INIT_H + +#endif /* _XEN_ASM_INIT_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/io.h b/xen/include/asm-arm/io.h new file mode 100644 index 0000000..1babbab --- /dev/null +++ b/xen/include/asm-arm/io.h @@ -0,0 +1,12 @@ +#ifndef _ASM_IO_H +#define _ASM_IO_H + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/iocap.h b/xen/include/asm-arm/iocap.h new file mode 100644 index 0000000..f647f30 --- /dev/null +++ b/xen/include/asm-arm/iocap.h @@ -0,0 +1,20 @@ +#ifndef __X86_IOCAP_H__ +#define __X86_IOCAP_H__ + +#define cache_flush_permitted(d) \ + (!rangeset_is_empty((d)->iomem_caps)) + +#define multipage_allocation_permitted(d, order) \ + (((order) <= 9) || /* allow 2MB superpages */ \ + !rangeset_is_empty((d)->iomem_caps)) + +#endif + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/multicall.h b/xen/include/asm-arm/multicall.h new file mode 100644 index 0000000..c800940 --- /dev/null +++ b/xen/include/asm-arm/multicall.h @@ -0,0 +1,23 @@ +#ifndef __ASM_ARM_MULTICALL_H__ +#define __ASM_ARM_MULTICALL_H__ + +#define do_multicall_call(_call) \ + do { \ + __asm__ __volatile__ ( \ + ".word 0xe7f000f0@; do_multicall_call\n" \ + " mov r0,#0; @ do_multicall_call\n" \ + " str r0, [r0];\n" \ + : \ + : \ + : ); \ + } while ( 0 ) + +#endif /* __ASM_ARM_MULTICALL_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/nmi.h b/xen/include/asm-arm/nmi.h new file mode 100644 index 0000000..e0f19f9 --- /dev/null +++ b/xen/include/asm-arm/nmi.h @@ -0,0 +1,15 @@ +#ifndef ASM_NMI_H +#define ASM_NMI_H + +#define register_guest_nmi_callback(a) (-ENOSYS) +#define unregister_guest_nmi_callback() (-ENOSYS) + +#endif /* ASM_NMI_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/numa.h b/xen/include/asm-arm/numa.h new file mode 100644 index 0000000..cffee5c --- /dev/null +++ b/xen/include/asm-arm/numa.h @@ -0,0 +1,21 @@ +#ifndef __ARCH_ARM_NUMA_H +#define __ARCH_ARM_NUMA_H + +/* Fake one node for now... */ +#define cpu_to_node(cpu) 0 +#define node_to_cpumask(node) (cpu_online_map) + +static inline __attribute__((pure)) int phys_to_nid(paddr_t addr) +{ + return 0; +} + +#endif /* __ARCH_ARM_NUMA_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/paging.h b/xen/include/asm-arm/paging.h new file mode 100644 index 0000000..4dc340f --- /dev/null +++ b/xen/include/asm-arm/paging.h @@ -0,0 +1,13 @@ +#ifndef _XEN_PAGING_H +#define _XEN_PAGING_H + +#endif /* XEN_PAGING_H */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/percpu.h b/xen/include/asm-arm/percpu.h new file mode 100644 index 0000000..9d369eb --- /dev/null +++ b/xen/include/asm-arm/percpu.h @@ -0,0 +1,28 @@ +#ifndef __ARM_PERCPU_H__ +#define __ARM_PERCPU_H__ + +#ifndef __ASSEMBLY__ +extern char __per_cpu_start[], __per_cpu_data_end[]; +extern unsigned long __per_cpu_offset[NR_CPUS]; +void percpu_init_areas(void); +#endif + +/* Separate out the type, so (int[3], foo) works. */ +#define __DEFINE_PER_CPU(type, name, suffix) \ + __attribute__((__section__(".bss.percpu" #suffix))) \ + __typeof__(type) per_cpu_##name + +#define per_cpu(var, cpu) ((&per_cpu__##var)[cpu?0:0]) +#define __get_cpu_var(var) per_cpu__##var + +#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name + +#endif /* __ARM_PERCPU_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h new file mode 100644 index 0000000..1f85d31 --- /dev/null +++ b/xen/include/asm-arm/processor.h @@ -0,0 +1,269 @@ +#ifndef __ASM_ARM_PROCESSOR_H +#define __ASM_ARM_PROCESSOR_H + +#include + +/* PSR bits (CPSR, SPSR)*/ + +/* 0-4: Mode */ +#define PSR_MODE_MASK 0x1f +#define PSR_MODE_USR 0x10 +#define PSR_MODE_FIQ 0x11 +#define PSR_MODE_IRQ 0x12 +#define PSR_MODE_SVC 0x13 +#define PSR_MODE_MON 0x16 +#define PSR_MODE_ABT 0x17 +#define PSR_MODE_HYP 0x1a +#define PSR_MODE_UND 0x1b +#define PSR_MODE_SYS 0x1f + +#define PSR_THUMB (1<<5) /* Thumb Mode enable */ +#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ +#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ +#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ +#define PSR_BIG_ENDIAN (1<<9) /* Big Endian Mode */ +#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ + +/* TTBCR Translation Table Base Control Register */ +#define TTBCR_N_MASK 0x07 +#define TTBCR_N_16KB 0x00 +#define TTBCR_N_8KB 0x01 +#define TTBCR_N_4KB 0x02 +#define TTBCR_N_2KB 0x03 +#define TTBCR_N_1KB 0x04 + +/* SCTLR System Control Register. */ +/* HSCTLR is a subset of this. */ +#define SCTLR_TE (1<<30) +#define SCTLR_AFE (1<<29) +#define SCTLR_TRE (1<<28) +#define SCTLR_NMFI (1<<27) +#define SCTLR_EE (1<<25) +#define SCTLR_VE (1<<24) +#define SCTLR_U (1<<22) +#define SCTLR_FI (1<<21) +#define SCTLR_WXN (1<<19) +#define SCTLR_HA (1<<17) +#define SCTLR_RR (1<<14) +#define SCTLR_V (1<<13) +#define SCTLR_I (1<<12) +#define SCTLR_Z (1<<11) +#define SCTLR_SW (1<<10) +#define SCTLR_B (1<<7) +#define SCTLR_C (1<<2) +#define SCTLR_A (1<<1) +#define SCTLR_M (1<<0) + +#define SCTLR_BASE 0x00c50078 +#define HSCTLR_BASE 0x30c51878 + +/* HCR Hyp Configuration Register */ +#define HCR_TGE (1<<27) +#define HCR_TVM (1<<26) +#define HCR_TTLB (1<<25) +#define HCR_TPU (1<<24) +#define HCR_TPC (1<<23) +#define HCR_TSW (1<<22) +#define HCR_TAC (1<<21) +#define HCR_TIDCP (1<<20) +#define HCR_TSC (1<<19) +#define HCR_TID3 (1<<18) +#define HCR_TID2 (1<<17) +#define HCR_TID1 (1<<16) +#define HCR_TID0 (1<<15) +#define HCR_TWE (1<<14) +#define HCR_TWI (1<<13) +#define HCR_DC (1<<12) +#define HCR_BSU_MASK (3<<10) +#define HCR_FB (1<<9) +#define HCR_VA (1<<8) +#define HCR_VI (1<<7) +#define HCR_VF (1<<6) +#define HCR_AMO (1<<5) +#define HCR_IMO (1<<4) +#define HCR_FMO (1<<3) +#define HCR_PTW (1<<2) +#define HCR_SWIO (1<<1) +#define HCR_VM (1<<0) + +#define HSR_EC_WFI_WFE 0x01 +#define HSR_EC_CP15_32 0x03 +#define HSR_EC_CP15_64 0x04 +#define HSR_EC_CP14_32 0x05 +#define HSR_EC_CP14_DBG 0x06 +#define HSR_EC_CP 0x07 +#define HSR_EC_CP10 0x08 +#define HSR_EC_JAZELLE 0x09 +#define HSR_EC_BXJ 0x0a +#define HSR_EC_CP14_64 0x0c +#define HSR_EC_SVC 0x11 +#define HSR_EC_HVC 0x12 +#define HSR_EC_INSTR_ABORT_GUEST 0x20 +#define HSR_EC_INSTR_ABORT_HYP 0x21 +#define HSR_EC_DATA_ABORT_GUEST 0x24 +#define HSR_EC_DATA_ABORT_HYP 0x25 + +#ifndef __ASSEMBLY__ +union hsr { + uint32_t bits; + struct { + unsigned long iss:25; /* Instruction Specific Syndrome */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + }; + + struct hsr_cp32 { + unsigned long read:1; /* Direction */ + unsigned long crm:4; /* CRm */ + unsigned long reg:4; /* Rt */ + unsigned long sbzp:1; + unsigned long crn:4; /* CRn */ + unsigned long op1:3; /* Op1 */ + unsigned long op2:3; /* Op2 */ + unsigned long cc:4; /* Condition Code */ + unsigned long ccvalid:1;/* CC Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } cp32; /* HSR_EC_CP15_32, CP14_32, CP10 */ + + struct hsr_cp64 { + unsigned long read:1; /* Direction */ + unsigned long crm:4; /* CRm */ + unsigned long reg1:4; /* Rt1 */ + unsigned long sbzp1:1; + unsigned long reg2:4; /* Rt2 */ + unsigned long sbzp2:2; + unsigned long op1:4; /* Op1 */ + unsigned long cc:4; /* Condition Code */ + unsigned long ccvalid:1;/* CC Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } cp64; /* HSR_EC_CP15_64, HSR_EC_CP14_64 */ + + struct hsr_dabt { + unsigned long dfsc:6; /* Data Fault Status Code */ + unsigned long write:1; /* Write / not Read */ + unsigned long s1ptw:1; /* */ + unsigned long cache:1; /* Cache Maintenance */ + unsigned long eat:1; /* External Abort Type */ + unsigned long sbzp0:6; + unsigned long reg:4; /* Register */ + unsigned long sbzp1:1; + unsigned long sign:1; /* Sign extend */ + unsigned long size:2; /* Access Size */ + unsigned long valid:1; /* Syndrome Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } dabt; /* HSR_EC_DATA_ABORT_* */ +}; +#endif + +/* HSR.EC == HSR_CP{15,14,10}_32 */ +#define HSR_CP32_OP2_MASK (0x000e0000) +#define HSR_CP32_OP2_SHIFT (17) +#define HSR_CP32_OP1_MASK (0x0001c000) +#define HSR_CP32_OP1_SHIFT (14) +#define HSR_CP32_CRN_MASK (0x00003c00) +#define HSR_CP32_CRN_SHIFT (10) +#define HSR_CP32_CRM_MASK (0x0000001e) +#define HSR_CP32_CRM_SHIFT (1) +#define HSR_CP32_REGS_MASK (HSR_CP32_OP1_MASK|HSR_CP32_OP2_MASK|\ + HSR_CP32_CRN_MASK|HSR_CP32_CRM_MASK) + +/* HSR.EC == HSR_CP{15,14}_64 */ +#define HSR_CP64_OP1_MASK (0x000f0000) +#define HSR_CP64_OP1_SHIFT (16) +#define HSR_CP64_CRM_MASK (0x0000001e) +#define HSR_CP64_CRM_SHIFT (1) +#define HSR_CP64_REGS_MASK (HSR_CP64_OP1_MASK|HSR_CP64_CRM_MASK) + +/* Physical Address Register */ +#define PAR_F (1<<0) + +/* .... If F == 1 */ +#define PAR_FSC_SHIFT (1) +#define PAR_FSC_MASK (0x3f< +#include +#include + +#define psr_mode(psr,m) (((psr) & PSR_MODE_MASK) == m) + +#define usr_mode(r) psr_mode((r)->cpsr,PSR_MODE_USR) +#define fiq_mode(r) psr_mode((r)->cpsr,PSR_MODE_FIQ) +#define irq_mode(r) psr_mode((r)->cpsr,PSR_MODE_IRQ) +#define svc_mode(r) psr_mode((r)->cpsr,PSR_MODE_SVC) +#define mon_mode(r) psr_mode((r)->cpsr,PSR_MODE_MON) +#define abt_mode(r) psr_mode((r)->cpsr,PSR_MODE_ABT) +#define hyp_mode(r) psr_mode((r)->cpsr,PSR_MODE_HYP) +#define und_mode(r) psr_mode((r)->cpsr,PSR_MODE_UND) +#define sys_mode(r) psr_mode((r)->cpsr,PSR_MODE_SYS) + +#define guest_mode(r) \ +({ \ + unsigned long diff = (char *)guest_cpu_user_regs() - (char *)(r); \ + /* Frame pointer must point into current CPU stack. */ \ + ASSERT(diff < STACK_SIZE); \ + /* If not a guest frame, it must be a hypervisor frame. */ \ + ASSERT((diff == 0) || hyp_mode(r)); \ + /* Return TRUE if it's a guest frame. */ \ + (diff == 0); \ +}) + +#define return_reg(v) ((v)->arch.user_regs.r0) + +#define CTXT_SWITCH_STACK_BYTES (sizeof(struct cpu_user_regs)) + +#endif /* __ARM_REGS_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/setup.h b/xen/include/asm-arm/setup.h new file mode 100644 index 0000000..c27d438 --- /dev/null +++ b/xen/include/asm-arm/setup.h @@ -0,0 +1,16 @@ +#ifndef __ARM_SETUP_H_ +#define __ARM_SETUP_H_ + +#include + +void arch_get_xen_caps(xen_capabilities_info_t *info); + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/smp.h b/xen/include/asm-arm/smp.h new file mode 100644 index 0000000..9cdd87f --- /dev/null +++ b/xen/include/asm-arm/smp.h @@ -0,0 +1,25 @@ +#ifndef __ASM_SMP_H +#define __ASM_SMP_H + +#ifndef __ASSEMBLY__ +#include +#include +#include +#endif + +DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_mask); +DECLARE_PER_CPU(cpumask_var_t, cpu_core_mask); + +#define cpu_is_offline(cpu) unlikely(!cpu_online(cpu)) + +#define raw_smp_processor_id() (get_processor_id()) + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/softirq.h b/xen/include/asm-arm/softirq.h new file mode 100644 index 0000000..536af38 --- /dev/null +++ b/xen/include/asm-arm/softirq.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SOFTIRQ_H__ +#define __ASM_SOFTIRQ_H__ + +#define VGIC_SOFTIRQ (NR_COMMON_SOFTIRQS + 0) +#define NR_ARCH_SOFTIRQS 1 + +#endif /* __ASM_SOFTIRQ_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/spinlock.h b/xen/include/asm-arm/spinlock.h new file mode 100644 index 0000000..b1825c9 --- /dev/null +++ b/xen/include/asm-arm/spinlock.h @@ -0,0 +1,144 @@ +#ifndef __ASM_SPINLOCK_H +#define __ASM_SPINLOCK_H + +#include +#include + +static inline void dsb_sev(void) +{ + __asm__ __volatile__ ( + "dsb\n" + "sev\n" + ); +} + +typedef struct { + volatile unsigned int lock; +} raw_spinlock_t; + +#define _RAW_SPIN_LOCK_UNLOCKED { 0 } + +#define _raw_spin_is_locked(x) ((x)->lock != 0) + +static always_inline void _raw_spin_unlock(raw_spinlock_t *lock) +{ + ASSERT(_raw_spin_is_locked(lock)); + + smp_mb(); + + __asm__ __volatile__( +" str %1, [%0]\n" + : + : "r" (&lock->lock), "r" (0) + : "cc"); + + dsb_sev(); +} + +static always_inline int _raw_spin_trylock(raw_spinlock_t *lock) +{ + unsigned long tmp; + + __asm__ __volatile__( +" ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&lock->lock), "r" (1) + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } +} + +typedef struct { + volatile unsigned int lock; +} raw_rwlock_t; + +#define _RAW_RW_LOCK_UNLOCKED { 0 } + +static always_inline int _raw_read_trylock(raw_rwlock_t *rw) +{ + unsigned long tmp, tmp2 = 1; + + __asm__ __volatile__( +"1: ldrex %0, [%2]\n" +" adds %0, %0, #1\n" +" strexpl %1, %0, [%2]\n" + : "=&r" (tmp), "+r" (tmp2) + : "r" (&rw->lock) + : "cc"); + + smp_mb(); + return tmp2 == 0; +} + +static always_inline int _raw_write_trylock(raw_rwlock_t *rw) +{ + unsigned long tmp; + + __asm__ __volatile__( +"1: ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&rw->lock), "r" (0x80000000) + : "cc"); + + if (tmp == 0) { + smp_mb(); + return 1; + } else { + return 0; + } +} + +static inline void _raw_read_unlock(raw_rwlock_t *rw) +{ + unsigned long tmp, tmp2; + + smp_mb(); + + __asm__ __volatile__( +"1: ldrex %0, [%2]\n" +" sub %0, %0, #1\n" +" strex %1, %0, [%2]\n" +" teq %1, #0\n" +" bne 1b" + : "=&r" (tmp), "=&r" (tmp2) + : "r" (&rw->lock) + : "cc"); + + if (tmp == 0) + dsb_sev(); +} + +static inline void _raw_write_unlock(raw_rwlock_t *rw) +{ + smp_mb(); + + __asm__ __volatile__( + "str %1, [%0]\n" + : + : "r" (&rw->lock), "r" (0) + : "cc"); + + dsb_sev(); +} + +#define _raw_rw_is_locked(x) ((x)->lock != 0) +#define _raw_rw_is_write_locked(x) ((x)->lock == 0x80000000) + +#endif /* __ASM_SPINLOCK_H */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/string.h b/xen/include/asm-arm/string.h new file mode 100644 index 0000000..f2d643d --- /dev/null +++ b/xen/include/asm-arm/string.h @@ -0,0 +1,38 @@ +#ifndef __ARM_STRING_H__ +#define __ARM_STRING_H__ + +#include + +#define __HAVE_ARCH_MEMCPY +extern void * memcpy(void *, const void *, __kernel_size_t); + +/* Some versions of gcc don't have this builtin. It's non-critical anyway. */ +#define __HAVE_ARCH_MEMMOVE +extern void *memmove(void *dest, const void *src, size_t n); + +#define __HAVE_ARCH_MEMSET +extern void * memset(void *, int, __kernel_size_t); + +extern void __memzero(void *ptr, __kernel_size_t n); + +#define memset(p,v,n) \ + ({ \ + void *__p = (p); size_t __n = n; \ + if ((__n) != 0) { \ + if (__builtin_constant_p((v)) && (v) == 0) \ + __memzero((__p),(__n)); \ + else \ + memset((__p),(v),(__n)); \ + } \ + (__p); \ + }) + +#endif /* __ARM_STRING_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h new file mode 100644 index 0000000..731d89f --- /dev/null +++ b/xen/include/asm-arm/system.h @@ -0,0 +1,202 @@ +/* Portions taken from Linux arch arm */ +#ifndef __ASM_SYSTEM_H +#define __ASM_SYSTEM_H + +#include +#include + +#define nop() \ + asm volatile ( "nop" ) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + +#define isb() __asm__ __volatile__ ("isb" : : : "memory") +#define dsb() __asm__ __volatile__ ("dsb" : : : "memory") +#define dmb() __asm__ __volatile__ ("dmb" : : : "memory") + +#define mb() dsb() +#define rmb() dsb() +#define wmb() mb() + +#define smp_mb() dmb() +#define smp_rmb() dmb() +#define smp_wmb() dmb() + +/* + * This is used to ensure the compiler did actually allocate the register we + * asked it for some inline assembly sequences. Apparently we can't trust + * the compiler from one version to another so a bit of paranoia won't hurt. + * This string is meant to be concatenated with the inline asm string and + * will cause compilation to stop on mismatch. + * (for details, see gcc PR 15089) + */ +#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" + +extern void __bad_xchg(volatile void *, int); + +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) +{ + unsigned long ret; + unsigned int tmp; + + smp_mb(); + + switch (size) { + case 1: + asm volatile("@ __xchg1\n" + "1: ldrexb %0, [%3]\n" + " strexb %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + case 4: + asm volatile("@ __xchg4\n" + "1: ldrex %0, [%3]\n" + " strex %1, %2, [%3]\n" + " teq %1, #0\n" + " bne 1b" + : "=&r" (ret), "=&r" (tmp) + : "r" (x), "r" (ptr) + : "memory", "cc"); + break; + default: + __bad_xchg(ptr, size), ret = 0; + break; + } + smp_mb(); + + return ret; +} + +/* + * Atomic compare and exchange. Compare OLD with MEM, if identical, + * store NEW in MEM. Return the initial value in MEM. Success is + * indicated by comparing RETURN with OLD. + */ + +extern void __bad_cmpxchg(volatile void *ptr, int size); + +static always_inline unsigned long __cmpxchg( + volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + unsigned long /*long*/ oldval, res; + + switch (size) { + case 1: + do { + asm volatile("@ __cmpxchg1\n" + " ldrexb %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexbeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; + case 2: + do { + asm volatile("@ __cmpxchg2\n" + " ldrexh %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexheq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; + case 4: + do { + asm volatile("@ __cmpxchg4\n" + " ldrex %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; +#if 0 + case 8: + do { + asm volatile("@ __cmpxchg8\n" + " ldrexd %1, [%2]\n" + " mov %0, #0\n" + " teq %1, %3\n" + " strexdeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (ptr), "Ir" (old), "r" (new) + : "memory", "cc"); + } while (res); + break; +#endif + default: + __bad_cmpxchg(ptr, size); + oldval = 0; + } + + return oldval; +} +#define cmpxchg(ptr,o,n) \ + ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o), \ + (unsigned long)(n),sizeof(*(ptr)))) + +#define local_irq_disable() asm volatile ( "cpsid i @ local_irq_disable\n" : : : "cc" ) +#define local_irq_enable() asm volatile ( "cpsie i @ local_irq_enable\n" : : : "cc" ) + +#define local_save_flags(x) \ +({ \ + BUILD_BUG_ON(sizeof(x) != sizeof(long)); \ + asm volatile ( "mrs %0, cpsr @ local_save_flags\n" \ + : "=r" (x) :: "memory", "cc" ); \ +}) +#define local_irq_save(x) \ +({ \ + local_save_flags(x); \ + local_irq_disable(); \ +}) +#define local_irq_restore(x) \ +({ \ + BUILD_BUG_ON(sizeof(x) != sizeof(long)); \ + asm volatile ( \ + "msr cpsr_c, %0 @ local_irq_restore\n" \ + : \ + : "r" (flags) \ + : "memory", "cc"); \ +}) + +static inline int local_irq_is_enabled(void) +{ + unsigned long flags; + local_save_flags(flags); + return !(flags & PSR_IRQ_MASK); +} + +#define local_fiq_enable() __asm__("cpsie f @ __stf\n" : : : "memory", "cc") +#define local_fiq_disable() __asm__("cpsid f @ __clf\n" : : : "memory", "cc") + +#define local_abort_enable() __asm__("cpsie a @ __sta\n" : : : "memory", "cc") +#define local_abort_disable() __asm__("cpsid a @ __sta\n" : : : "memory", "cc") + +static inline int local_fiq_is_enabled(void) +{ + unsigned long flags; + local_save_flags(flags); + return !!(flags & PSR_FIQ_MASK); +} + +#endif +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/trace.h b/xen/include/asm-arm/trace.h new file mode 100644 index 0000000..db84541 --- /dev/null +++ b/xen/include/asm-arm/trace.h @@ -0,0 +1,12 @@ +#ifndef __ASM_TRACE_H__ +#define __ASM_TRACE_H__ + +#endif /* __ASM_TRACE_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/types.h b/xen/include/asm-arm/types.h new file mode 100644 index 0000000..48864f9 --- /dev/null +++ b/xen/include/asm-arm/types.h @@ -0,0 +1,57 @@ +#ifndef __ARM_TYPES_H__ +#define __ARM_TYPES_H__ + +#ifndef __ASSEMBLY__ + +#include + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; +typedef u64 paddr_t; +#define INVALID_PADDR (~0ULL) +#define PRIpaddr "016llx" + +typedef unsigned long size_t; + +typedef char bool_t; +#define test_and_set_bool(b) xchg(&(b), 1) +#define test_and_clear_bool(b) xchg(&(b), 0) + +#endif /* __ASSEMBLY__ */ + +#define BITS_PER_LONG 32 +#define BYTES_PER_LONG 4 +#define LONG_BYTEORDER 2 + +#endif /* __ARM_TYPES_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/xenoprof.h b/xen/include/asm-arm/xenoprof.h new file mode 100644 index 0000000..131ac13 --- /dev/null +++ b/xen/include/asm-arm/xenoprof.h @@ -0,0 +1,12 @@ +#ifndef __ASM_XENOPROF_H__ +#define __ASM_XENOPROF_H__ + +#endif /* __ASM_XENOPROF_H__ */ +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h new file mode 100644 index 0000000..4d1daa9 --- /dev/null +++ b/xen/include/public/arch-arm.h @@ -0,0 +1,125 @@ +/****************************************************************************** + * arch-arm.h + * + * Guest OS interface to ARM Xen. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Copyright 2011 (C) Citrix Systems + */ + +#ifndef __XEN_PUBLIC_ARCH_ARM_H__ +#define __XEN_PUBLIC_ARCH_ARM_H__ + +#ifndef __ASSEMBLY__ +#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ + typedef struct { type *p; } __guest_handle_ ## name + +#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ + ___DEFINE_XEN_GUEST_HANDLE(name, type); \ + ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) +#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) +#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name +#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) +#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0) +#ifdef __XEN_TOOLS__ +#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) +#endif +#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) + +struct cpu_user_regs +{ + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + union { + uint32_t r11; + uint32_t fp; + }; + uint32_t r12; + + uint32_t sp; /* r13 - SP: Valid for Hyp. frames only, o/w banked (see below) */ + uint32_t lr; /* r14 - LR: Valid for Hyp. Same physical register as lr_usr. */ + + uint32_t pc; /* Return IP */ + uint32_t cpsr; /* Return mode */ + uint32_t pad0; /* Doubleword-align the kernel half of the frame */ + + /* Outer guest frame only from here on... */ + + uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq; + + uint32_t sp_usr, sp_svc, sp_abt, sp_und, sp_irq, sp_fiq; + uint32_t lr_usr, lr_svc, lr_abt, lr_und, lr_irq, lr_fiq; + + uint32_t spsr_svc, spsr_abt, spsr_und, spsr_irq, spsr_fiq; +}; +typedef struct cpu_user_regs cpu_user_regs_t; +DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t); + +typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn PRIx64 + +/* Maximum number of virtual CPUs in legacy multi-processor guests. */ +/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ +#define XEN_LEGACY_MAX_VCPUS 1 + +typedef uint32_t xen_ulong_t; + +struct vcpu_guest_context { + struct cpu_user_regs user_regs; /* User-level CPU registers */ + union { + uint32_t reg[16]; + struct { + uint32_t __pad[12]; + uint32_t sp; /* r13 */ + uint32_t lr; /* r14 */ + uint32_t pc; /* r15 */ + }; + }; +}; +typedef struct vcpu_guest_context vcpu_guest_context_t; +DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); + +struct arch_vcpu_info { }; +typedef struct arch_vcpu_info arch_vcpu_info_t; + +struct arch_shared_info { }; +typedef struct arch_shared_info arch_shared_info_t; +#endif + +#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index fde9fa5..7196400 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -33,6 +33,8 @@ #include "arch-x86/xen.h" #elif defined(__ia64__) #include "arch-ia64.h" +#elif defined(__arm__) +#include "arch-arm.h" #else #error "Unsupported architecture" #endif -- 1.7.2.5 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Fri Dec 09 18:55:51 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 09 Dec 2011 18:55:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ5bg-0001GJ-MY; Fri, 09 Dec 2011 18:55:40 +0000 Received: from mail182.messagelabs.com ([85.158.139.83]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ5bf-0001BN-13 for xen-devel@lists.xensource.com; Fri, 09 Dec 2011 18:55:39 +0000 X-Env-Sender: Ian.Jackson@eu.citrix.com X-Msg-Ref: server-2.tower-182.messagelabs.com!1323456879!6616386!14 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiA4NDI2MQ==\n X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 21474 invoked from network); 9 Dec 2011 18:54:48 -0000 Received: from smtp.eu.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-2.tower-182.messagelabs.com with RC4-SHA encrypted SMTP; 9 Dec 2011 18:54:48 -0000 X-IronPort-AV: E=Sophos;i="4.71,327,1320624000"; d="scan'208";a="9392205" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 09 Dec 2011 18:54:48 +0000 Received: from norwich.cam.xci-test.com (10.80.248.129) by smtprelay.citrix.com (10.30.203.162) with Microsoft SMTP Server id 8.3.213.0; Fri, 9 Dec 2011 18:54:48 +0000 Received: from mariner.cam.xci-test.com ([10.80.2.22] helo=mariner.uk.xensource.com ident=Debian-exim) by norwich.cam.xci-test.com with esmtp (Exim 4.72) (envelope-from ) id 1RZ5aq-0002eL-Ag; Fri, 09 Dec 2011 18:54:48 +0000 Received: from iwj by mariner.uk.xensource.com with local (Exim 4.72) (envelope-from ) id 1RZ5aq-00040l-9p; Fri, 09 Dec 2011 18:54:48 +0000 From: Ian Jackson To: xen-devel@lists.xensource.com Date: Fri, 9 Dec 2011 18:54:32 +0000 Message-ID: <1323456877-15315-14-git-send-email-ian.jackson@eu.citrix.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323456877-15315-1-git-send-email-ian.jackson@eu.citrix.com> References: <1323456877-15315-1-git-send-email-ian.jackson@eu.citrix.com> MIME-Version: 1.0 Cc: Ian Jackson Subject: [Xen-devel] [PATCH 13/18] libxl: Use GC_INIT and GC_FREE everywhere X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com Replace libxl__gc gc = LIBXL_INIT_GC(ctx); ... libxl__free_all(&gc); with GC_INIT(ctx); ... GC_FREE; throughout with a couple of perl runes. We must then adjust uses of the resulting gc for pointerness, which is mostly just replacing all occurrences of "&gc" with "gc". Also a couple of unusual uses of LIBXL_INIT_GC needed to be fixed up by hand. Here are those runes: perl -i -pe 's/\Q libxl__gc gc = LIBXL_INIT_GC(ctx);/ GC_INIT(ctx);/' tools/libxl/*.c perl -i -pe 's/\Q libxl__free_all(&gc);/ GC_FREE;/' tools/libxl/*.c Signed-off-by: Ian Jackson Acked-by: Ian Campbell --- tools/libxl/libxl.c | 590 ++++++++++++++++++++-------------------- tools/libxl/libxl_bootloader.c | 14 +- tools/libxl/libxl_create.c | 12 +- tools/libxl/libxl_dom.c | 16 +- tools/libxl/libxl_pci.c | 34 ++-- tools/libxl/libxl_qmp.c | 32 +- tools/libxl/libxl_utils.c | 36 ++-- 7 files changed, 367 insertions(+), 367 deletions(-) diff --git a/tools/libxl/libxl.c b/tools/libxl/libxl.c index 5a29c29..79ea701 100644 --- a/tools/libxl/libxl.c +++ b/tools/libxl/libxl.c @@ -233,19 +233,19 @@ int libxl__domain_rename(libxl__gc *gc, uint32_t domid, int libxl_domain_rename(libxl_ctx *ctx, uint32_t domid, const char *old_name, const char *new_name) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__domain_rename(&gc, domid, old_name, new_name, XBT_NULL); - libxl__free_all(&gc); + rc = libxl__domain_rename(gc, domid, old_name, new_name, XBT_NULL); + GC_FREE; return rc; } int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 0; - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { LIBXL__LOG(ctx, LIBXL__LOG_DEBUG, "Called domain_resume on " "non-cooperative hvm domain %u", domid); rc = ERROR_NI; @@ -265,7 +265,7 @@ int libxl_domain_resume(libxl_ctx *ctx, uint32_t domid) rc = ERROR_FAIL; } out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -278,7 +278,7 @@ out: int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, libxl_domain_create_info *info, const char *name_suffix, libxl_uuid new_uuid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); struct xs_permissions roperm[2]; xs_transaction_t t; char *preserved_name; @@ -288,27 +288,27 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, int rc; - preserved_name = libxl__sprintf(&gc, "%s%s", info->name, name_suffix); + preserved_name = libxl__sprintf(gc, "%s%s", info->name, name_suffix); if (!preserved_name) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } - uuid_string = libxl__uuid2string(&gc, new_uuid); + uuid_string = libxl__uuid2string(gc, new_uuid); if (!uuid_string) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - vm_path = libxl__sprintf(&gc, "/vm/%s", uuid_string); + vm_path = libxl__sprintf(gc, "/vm/%s", uuid_string); if (!vm_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -324,20 +324,20 @@ int libxl_domain_preserve(libxl_ctx *ctx, uint32_t domid, xs_mkdir(ctx->xsh, t, vm_path); xs_set_permissions(ctx->xsh, t, vm_path, roperm, ARRAY_SIZE(roperm)); - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); - rc = libxl__domain_rename(&gc, domid, info->name, preserved_name, t); + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/vm", dom_path), vm_path, strlen(vm_path)); + rc = libxl__domain_rename(gc, domid, info->name, preserved_name, t); if (rc) { - libxl__free_all(&gc); + GC_FREE; return rc; } - xs_write(ctx->xsh, t, libxl__sprintf(&gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); + xs_write(ctx->xsh, t, libxl__sprintf(gc, "%s/uuid", vm_path), uuid_string, strlen(uuid_string)); if (!xs_transaction_end(ctx->xsh, t, 0)) if (errno == EAGAIN) goto retry_transaction; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -479,16 +479,16 @@ libxl_vminfo * libxl_list_vm(libxl_ctx *ctx, int *nb_vm) int libxl_domain_suspend(libxl_ctx *ctx, libxl_domain_suspend_info *info, uint32_t domid, int fd) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - libxl_domain_type type = libxl__domain_type(&gc, domid); + GC_INIT(ctx); + libxl_domain_type type = libxl__domain_type(gc, domid); int live = info != NULL && info->flags & XL_SUSPEND_LIVE; int debug = info != NULL && info->flags & XL_SUSPEND_DEBUG; int rc = 0; - rc = libxl__domain_suspend_common(&gc, domid, fd, type, live, debug); + rc = libxl__domain_suspend_common(gc, domid, fd, type, live, debug); if (!rc && type == LIBXL_DOMAIN_TYPE_HVM) - rc = libxl__domain_save_device_model(&gc, domid, fd); - libxl__free_all(&gc); + rc = libxl__domain_save_device_model(gc, domid, fd); + GC_FREE; return rc; } @@ -518,17 +518,17 @@ int libxl_domain_core_dump(libxl_ctx *ctx, uint32_t domid, int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *path; char *state; int ret, rc = 0; - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { - path = libxl__sprintf(&gc, "/local/domain/0/device-model/%d/state", domid); - state = libxl__xs_read(&gc, XBT_NULL, path); + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { + path = libxl__sprintf(gc, "/local/domain/0/device-model/%d/state", domid); + state = libxl__xs_read(gc, XBT_NULL, path); if (state != NULL && !strcmp(state, "paused")) { - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/0/device-model/%d/command", domid), "continue"); - libxl__wait_for_device_model(&gc, domid, "running", + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/0/device-model/%d/command", domid), "continue"); + libxl__wait_for_device_model(gc, domid, "running", NULL, NULL, NULL); } } @@ -537,7 +537,7 @@ int libxl_domain_unpause(libxl_ctx *ctx, uint32_t domid) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "unpausing domain %d", domid); rc = ERROR_FAIL; } - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -551,42 +551,42 @@ static char *req_table[] = { int libxl_domain_shutdown(libxl_ctx *ctx, uint32_t domid, int req) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *shutdown_path; char *dom_path; if (req > ARRAY_SIZE(req_table)) { - libxl__free_all(&gc); + GC_FREE; return ERROR_INVAL; } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - if (LIBXL__DOMAIN_IS_TYPE(&gc, domid, HVM)) { + if (LIBXL__DOMAIN_IS_TYPE(gc, domid, HVM)) { unsigned long pvdriver = 0; int ret; ret = xc_get_hvm_param(ctx->xch, domid, HVM_PARAM_CALLBACK_IRQ, &pvdriver); if (ret<0) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting HVM callback IRQ"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } if (!pvdriver) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "HVM domain without PV drivers:" " graceful shutdown not possible, use destroy"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } } - shutdown_path = libxl__sprintf(&gc, "%s/control/shutdown", dom_path); + shutdown_path = libxl__sprintf(gc, "%s/control/shutdown", dom_path); xs_write(ctx->xsh, XBT_NULL, shutdown_path, req_table[req], strlen(req_table[req])); - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -608,7 +608,7 @@ int libxl_wait_for_domain_death(libxl_ctx *ctx, uint32_t domid, libxl_waiter *wa int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_device_disk *disks, int num_disks, libxl_waiter *waiter) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int i, rc = -1; uint32_t domid = libxl_get_stubdom_id(ctx, guest_domid); @@ -617,7 +617,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic for (i = 0; i < num_disks; i++) { if (asprintf(&(waiter[i].path), "%s/device/vbd/%d/eject", - libxl__xs_get_dompath(&gc, domid), + libxl__xs_get_dompath(gc, domid), libxl__device_disk_dev_number(disks[i].vdev, NULL, NULL)) < 0) goto out; @@ -627,7 +627,7 @@ int libxl_wait_for_disk_ejects(libxl_ctx *ctx, uint32_t guest_domid, libxl_devic } rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -681,22 +681,22 @@ int libxl_event_get_domain_death_info(libxl_ctx *ctx, uint32_t domid, libxl_even int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event *event, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *path; char *backend; char *value; char backend_type[BACKEND_STRING_SIZE+1]; - value = libxl__xs_read(&gc, XBT_NULL, event->path); + value = libxl__xs_read(gc, XBT_NULL, event->path); if (!value || strcmp(value, "eject")) { - libxl__free_all(&gc); + GC_FREE; return 0; } path = strdup(event->path); path[strlen(path) - 6] = '\0'; - backend = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend", path)); + backend = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend", path)); sscanf(backend, "/local/domain/%d/backend/%" TOSTRING(BACKEND_STRING_SIZE) "[a-z]/%*d/%*d", @@ -712,19 +712,19 @@ int libxl_event_get_disk_eject_info(libxl_ctx *ctx, uint32_t domid, libxl_event disk->pdev_path = strdup(""); disk->format = LIBXL_DISK_FORMAT_EMPTY; /* this value is returned to the user: do not free right away */ - disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "%s/dev", backend), NULL); + disk->vdev = xs_read(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "%s/dev", backend), NULL); disk->removable = 1; disk->readwrite = 0; disk->is_cdrom = 1; free(path); - libxl__free_all(&gc); + GC_FREE; return 1; } int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_dominfo dominfo; char *dom_path; char *vm_path; @@ -741,40 +741,40 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) return rc; } - switch (libxl__domain_type(&gc, domid)) { + switch (libxl__domain_type(gc, domid)) { case LIBXL_DOMAIN_TYPE_HVM: dm_present = 1; break; case LIBXL_DOMAIN_TYPE_PV: - pid = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "/local/domain/%d/image/device-model-pid", domid)); + pid = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "/local/domain/%d/image/device-model-pid", domid)); dm_present = (pid != NULL); break; default: abort(); } - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { rc = ERROR_FAIL; goto out; } - if (libxl__device_pci_destroy_all(&gc, domid) < 0) + if (libxl__device_pci_destroy_all(gc, domid) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "pci shutdown failed for domid %d", domid); rc = xc_domain_pause(ctx->xch, domid); if (rc < 0) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "xc_domain_pause failed for %d", domid); } if (dm_present) { - if (libxl__destroy_device_model(&gc, domid) < 0) + if (libxl__destroy_device_model(gc, domid) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl__destroy_device_model failed for %d", domid); - libxl__qmp_cleanup(&gc, domid); + libxl__qmp_cleanup(gc, domid); } - if (libxl__devices_destroy(&gc, domid, force) < 0) + if (libxl__devices_destroy(gc, domid, force) < 0) LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "libxl_devices_dispose failed for %d", domid); - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); if (vm_path) if (!xs_rm(ctx->xsh, XBT_NULL, vm_path)) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", vm_path); @@ -782,9 +782,9 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) if (!xs_rm(ctx->xsh, XBT_NULL, dom_path)) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "xs_rm failed for %s", dom_path); - xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(&gc, domid)); + xs_rm(ctx->xsh, XBT_NULL, libxl__xs_libxl_path(gc, domid)); - libxl__userdata_destroyall(&gc, domid); + libxl__userdata_destroyall(gc, domid); rc = xc_domain_destroy(ctx->xch, domid); if (rc < 0) { @@ -794,16 +794,16 @@ int libxl_domain_destroy(libxl_ctx *ctx, uint32_t domid, int force) } rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_console_type type) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *p = libxl__sprintf(&gc, "%s/xenconsole", libxl_private_bindir_path()); - char *domid_s = libxl__sprintf(&gc, "%d", domid); - char *cons_num_s = libxl__sprintf(&gc, "%d", cons_num); + GC_INIT(ctx); + char *p = libxl__sprintf(gc, "%s/xenconsole", libxl_private_bindir_path()); + char *domid_s = libxl__sprintf(gc, "%d", domid); + char *cons_num_s = libxl__sprintf(gc, "%d", cons_num); char *cons_type_s; switch (type) { @@ -820,20 +820,20 @@ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_conso execl(p, p, domid_s, "--num", cons_num_s, "--type", cons_type_s, (void *)NULL); out: - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); uint32_t stubdomid = libxl_get_stubdom_id(ctx, domid_vm); int rc; if (stubdomid) rc = libxl_console_exec(ctx, stubdomid, STUBDOM_CONSOLE_SERIAL, LIBXL_CONSOLE_TYPE_PV); else { - switch (libxl__domain_type(&gc, domid_vm)) { + switch (libxl__domain_type(gc, domid_vm)) { case LIBXL_DOMAIN_TYPE_HVM: rc = libxl_console_exec(ctx, domid_vm, 0, LIBXL_CONSOLE_TYPE_SERIAL); break; @@ -844,13 +844,13 @@ int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm) abort(); } } - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *vnc_port; const char *vnc_listen = NULL, *vnc_pass = NULL; int port = 0, autopass_fd = -1; @@ -861,19 +861,19 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) NULL, }; - vnc_port = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_port = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-port", domid)); if ( vnc_port ) port = atoi(vnc_port) - 5900; - vnc_listen = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_listen = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-listen", domid)); if ( autopass ) - vnc_pass = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, + vnc_pass = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "/local/domain/%d/console/vnc-pass", domid)); if ( NULL == vnc_listen ) @@ -882,7 +882,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) if ( (vnc_bin = getenv("VNCVIEWER")) ) args[0] = vnc_bin; - args[1] = libxl__sprintf(&gc, "%s:%d", vnc_listen, port); + args[1] = libxl__sprintf(gc, "%s:%d", vnc_listen, port); if ( vnc_pass ) { char tmpname[] = "/tmp/vncautopass.XXXXXX"; @@ -917,7 +917,7 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass) abort(); x_fail: - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -971,17 +971,17 @@ static int libxl__device_from_disk(libxl__gc *gc, uint32_t domid, int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; char *dev; libxl__device device; int major, minor, rc; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; front = flexarray_make(16, 1); @@ -1002,7 +1002,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis goto out_free; } - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Invalid or unsupported" " virtual disk identifier %s", disk->vdev); @@ -1015,7 +1015,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis do_backend_phy: libxl__device_physdisk_major_minor(dev, &major, &minor); flexarray_append(back, "physical-device"); - flexarray_append(back, libxl__sprintf(&gc, "%x:%x", major, minor)); + flexarray_append(back, libxl__sprintf(gc, "%x:%x", major, minor)); flexarray_append(back, "params"); flexarray_append(back, dev); @@ -1023,13 +1023,13 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis assert(device.backend_kind == LIBXL__DEVICE_KIND_VBD); break; case LIBXL_DISK_BACKEND_TAP: - dev = libxl__blktap_devpath(&gc, disk->pdev_path, disk->format); + dev = libxl__blktap_devpath(gc, disk->pdev_path, disk->format); if (!dev) { rc = ERROR_FAIL; goto out_free; } flexarray_append(back, "tapdisk-params"); - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", + flexarray_append(back, libxl__sprintf(gc, "%s:%s", libxl__device_disk_string_of_format(disk->format), disk->pdev_path)); @@ -1037,7 +1037,7 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis goto do_backend_phy; case LIBXL_DISK_BACKEND_QDISK: flexarray_append(back, "params"); - flexarray_append(back, libxl__sprintf(&gc, "%s:%s", + flexarray_append(back, libxl__sprintf(gc, "%s:%s", libxl__device_disk_string_of_format(disk->format), disk->pdev_path)); assert(device.backend_kind == LIBXL__DEVICE_KIND_QDISK); break; @@ -1048,15 +1048,15 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis } flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "removable"); - flexarray_append(back, libxl__sprintf(&gc, "%d", (disk->removable) ? 1 : 0)); + flexarray_append(back, libxl__sprintf(gc, "%d", (disk->removable) ? 1 : 0)); flexarray_append(back, "bootable"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "dev"); flexarray_append(back, disk->vdev); flexarray_append(back, "type"); @@ -1067,17 +1067,17 @@ int libxl_device_disk_add(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *dis flexarray_append(back, disk->is_cdrom ? "cdrom" : "disk"); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", disk->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", disk->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); flexarray_append(front, "virtual-device"); - flexarray_append(front, libxl__sprintf(&gc, "%d", device.devid)); + flexarray_append(front, libxl__sprintf(gc, "%d", device.devid)); flexarray_append(front, "device-type"); flexarray_append(front, disk->is_cdrom ? "cdrom" : "disk"); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; @@ -1085,39 +1085,39 @@ out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_disk_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_disk_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_disk(&gc, domid, disk, &device); + rc = libxl__device_from_disk(gc, domid, disk, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1169,27 +1169,27 @@ static void libxl__device_disk_from_xs_be(libxl__gc *gc, int libxl_devid_to_device_disk(libxl_ctx *ctx, uint32_t domid, int devid, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *path; int rc = ERROR_FAIL; libxl_device_disk_init(ctx, disk); - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); if (!dompath) { goto out; } - path = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vbd/%d/backend", + path = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vbd/%d/backend", dompath, devid)); if (!path) goto out; - libxl__device_disk_from_xs_be(&gc, path, disk); + libxl__device_disk_from_xs_be(gc, path, disk); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1229,22 +1229,22 @@ static int libxl__append_disk_list_of_type(libxl__gc *gc, libxl_device_disk *libxl_device_disk_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_disk *disks = NULL; int rc; *num = 0; - rc = libxl__append_disk_list_of_type(&gc, domid, "vbd", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "vbd", &disks, num); if (rc) goto out_err; - rc = libxl__append_disk_list_of_type(&gc, domid, "tap", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "tap", &disks, num); if (rc) goto out_err; - rc = libxl__append_disk_list_of_type(&gc, domid, "qdisk", &disks, num); + rc = libxl__append_disk_list_of_type(gc, domid, "qdisk", &disks, num); if (rc) goto out_err; - libxl__free_all(&gc); + GC_FREE; return disks; out_err: @@ -1260,35 +1260,35 @@ out_err: int libxl_device_disk_getinfo(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk, libxl_diskinfo *diskinfo) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *diskpath; char *val; - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); diskinfo->devid = libxl__device_disk_dev_number(disk->vdev, NULL, NULL); /* tap devices entries in xenstore are written as vbd devices. */ - diskpath = libxl__sprintf(&gc, "%s/device/vbd/%d", dompath, diskinfo->devid); + diskpath = libxl__sprintf(gc, "%s/device/vbd/%d", dompath, diskinfo->devid); diskinfo->backend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/backend", diskpath), NULL); + libxl__sprintf(gc, "%s/backend", diskpath), NULL); if (!diskinfo->backend) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", diskpath)); diskinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", diskpath)); diskinfo->state = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", diskpath)); diskinfo->evtch = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/ring-ref", diskpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/ring-ref", diskpath)); diskinfo->rref = val ? strtoul(val, NULL, 10) : -1; diskinfo->frontend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/frontend", diskinfo->backend), NULL); - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", diskinfo->backend)); + libxl__sprintf(gc, "%s/frontend", diskinfo->backend), NULL); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", diskinfo->backend)); diskinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -1332,12 +1332,12 @@ out: char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dev = NULL; char *ret = NULL; int rc; - rc = libxl__device_disk_set_backend(&gc, disk); + rc = libxl__device_disk_set_backend(gc, disk); if (rc) goto out; switch (disk->backend) { @@ -1356,7 +1356,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) dev = disk->pdev_path; break; case LIBXL_DISK_FORMAT_VHD: - dev = libxl__blktap_devpath(&gc, disk->pdev_path, + dev = libxl__blktap_devpath(gc, disk->pdev_path, disk->format); break; case LIBXL_DISK_FORMAT_QCOW: @@ -1387,7 +1387,7 @@ char * libxl_device_disk_local_attach(libxl_ctx *ctx, libxl_device_disk *disk) out: if (dev != NULL) ret = strdup(dev); - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -1449,7 +1449,7 @@ static int libxl__device_from_nic(libxl__gc *gc, uint32_t domid, int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1468,59 +1468,59 @@ int libxl_device_nic_add(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) } if (nic->devid == -1) { - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) { + if (!(dompath = libxl__xs_get_dompath(gc, domid))) { rc = ERROR_FAIL; goto out_free; } - if (!(l = libxl__xs_directory(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vif", dompath), &nb))) { + if (!(l = libxl__xs_directory(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vif", dompath), &nb))) { nic->devid = 0; } else { nic->devid = strtoul(l[nb - 1], NULL, 10) + 1; } } - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if ( rc != 0 ) goto out_free; flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); if (nic->script) { flexarray_append(back, "script"); flexarray_append(back, nic->script[0]=='/' ? nic->script - : libxl__sprintf(&gc, "%s/%s", + : libxl__sprintf(gc, "%s/%s", libxl_xen_script_dir_path(), nic->script)); } flexarray_append(back, "mac"); - flexarray_append(back,libxl__sprintf(&gc, + flexarray_append(back,libxl__sprintf(gc, LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); if (nic->ip) { flexarray_append(back, "ip"); - flexarray_append(back, libxl__strdup(&gc, nic->ip)); + flexarray_append(back, libxl__strdup(gc, nic->ip)); } flexarray_append(back, "bridge"); - flexarray_append(back, libxl__strdup(&gc, nic->bridge)); + flexarray_append(back, libxl__strdup(gc, nic->bridge)); flexarray_append(back, "handle"); - flexarray_append(back, libxl__sprintf(&gc, "%d", nic->devid)); + flexarray_append(back, libxl__sprintf(gc, "%d", nic->devid)); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", nic->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); flexarray_append(front, "handle"); - flexarray_append(front, libxl__sprintf(&gc, "%d", nic->devid)); + flexarray_append(front, libxl__sprintf(gc, "%d", nic->devid)); flexarray_append(front, "mac"); - flexarray_append(front, libxl__sprintf(&gc, + flexarray_append(front, libxl__sprintf(gc, LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nic->mac))); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); /* FIXME: wait for plug */ rc = 0; @@ -1528,39 +1528,39 @@ out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_nic_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_nic_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_nic(&gc, domid, nic, &device); + rc = libxl__device_from_nic(gc, domid, nic, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1608,26 +1608,26 @@ static void libxl__device_nic_from_xs_be(libxl__gc *gc, int libxl_devid_to_device_nic(libxl_ctx *ctx, uint32_t domid, int devid, libxl_device_nic *nic) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *path; int rc = ERROR_FAIL; memset(nic, 0, sizeof (libxl_device_nic)); - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); if (!dompath) goto out; - path = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/device/vif/%d/backend", + path = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/device/vif/%d/backend", dompath, devid)); if (!path) goto out; - libxl__device_nic_from_xs_be(&gc, path, nic); + libxl__device_nic_from_xs_be(gc, path, nic); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1666,16 +1666,16 @@ static int libxl__append_nic_list_of_type(libxl__gc *gc, libxl_device_nic *libxl_device_nic_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_nic *nics = NULL; int rc; *num = 0; - rc = libxl__append_nic_list_of_type(&gc, domid, "vif", &nics, num); + rc = libxl__append_nic_list_of_type(gc, domid, "vif", &nics, num); if (rc) goto out_err; - libxl__free_all(&gc); + GC_FREE; return nics; out_err: @@ -1691,36 +1691,36 @@ out_err: int libxl_device_nic_getinfo(libxl_ctx *ctx, uint32_t domid, libxl_device_nic *nic, libxl_nicinfo *nicinfo) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *dompath, *nicpath; char *val; - dompath = libxl__xs_get_dompath(&gc, domid); + dompath = libxl__xs_get_dompath(gc, domid); nicinfo->devid = nic->devid; - nicpath = libxl__sprintf(&gc, "%s/device/vif/%d", dompath, nicinfo->devid); + nicpath = libxl__sprintf(gc, "%s/device/vif/%d", dompath, nicinfo->devid); nicinfo->backend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/backend", nicpath), NULL); + libxl__sprintf(gc, "%s/backend", nicpath), NULL); if (!nicinfo->backend) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/backend-id", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/backend-id", nicpath)); nicinfo->backend_id = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/state", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/state", nicpath)); nicinfo->state = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/event-channel", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/event-channel", nicpath)); nicinfo->evtch = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/tx-ring-ref", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/tx-ring-ref", nicpath)); nicinfo->rref_tx = val ? strtoul(val, NULL, 10) : -1; - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/rx-ring-ref", nicpath)); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/rx-ring-ref", nicpath)); nicinfo->rref_rx = val ? strtoul(val, NULL, 10) : -1; nicinfo->frontend = xs_read(ctx->xsh, XBT_NULL, - libxl__sprintf(&gc, "%s/frontend", nicinfo->backend), NULL); - val = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/frontend-id", nicinfo->backend)); + libxl__sprintf(gc, "%s/frontend", nicinfo->backend), NULL); + val = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/frontend-id", nicinfo->backend)); nicinfo->frontend_id = val ? strtoul(val, NULL, 10) : -1; - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -1826,7 +1826,7 @@ static int libxl__device_from_vkb(libxl__gc *gc, uint32_t domid, int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1843,64 +1843,64 @@ int libxl_device_vkb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) goto out_free; } - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out_free; flexarray_append(back, "frontend-id"); - flexarray_append(back, libxl__sprintf(&gc, "%d", domid)); + flexarray_append(back, libxl__sprintf(gc, "%d", domid)); flexarray_append(back, "online"); flexarray_append(back, "1"); flexarray_append(back, "state"); - flexarray_append(back, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(back, libxl__sprintf(gc, "%d", 1)); flexarray_append(back, "domain"); - flexarray_append(back, libxl__domid_to_name(&gc, domid)); + flexarray_append(back, libxl__domid_to_name(gc, domid)); flexarray_append(front, "backend-id"); - flexarray_append(front, libxl__sprintf(&gc, "%d", vkb->backend_domid)); + flexarray_append(front, libxl__sprintf(gc, "%d", vkb->backend_domid)); flexarray_append(front, "state"); - flexarray_append(front, libxl__sprintf(&gc, "%d", 1)); + flexarray_append(front, libxl__sprintf(gc, "%d", 1)); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; out_free: flexarray_free(back); flexarray_free(front); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vkb_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vkb_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_vkb *vkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vkb(&gc, domid, vkb, &device); + rc = libxl__device_from_vkb(gc, domid, vkb, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1936,7 +1936,7 @@ static int libxl__device_from_vfb(libxl__gc *gc, uint32_t domid, int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); flexarray_t *front; flexarray_t *back; libxl__device device; @@ -1953,20 +1953,20 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) goto out_free; } - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out_free; - flexarray_append_pair(back, "frontend-id", libxl__sprintf(&gc, "%d", domid)); + flexarray_append_pair(back, "frontend-id", libxl__sprintf(gc, "%d", domid)); flexarray_append_pair(back, "online", "1"); - flexarray_append_pair(back, "state", libxl__sprintf(&gc, "%d", 1)); - flexarray_append_pair(back, "domain", libxl__domid_to_name(&gc, domid)); - flexarray_append_pair(back, "vnc", libxl__sprintf(&gc, "%d", vfb->vnc)); + flexarray_append_pair(back, "state", libxl__sprintf(gc, "%d", 1)); + flexarray_append_pair(back, "domain", libxl__domid_to_name(gc, domid)); + flexarray_append_pair(back, "vnc", libxl__sprintf(gc, "%d", vfb->vnc)); flexarray_append_pair(back, "vnclisten", vfb->vnclisten); flexarray_append_pair(back, "vncpasswd", vfb->vncpasswd); - flexarray_append_pair(back, "vncdisplay", libxl__sprintf(&gc, "%d", vfb->vncdisplay)); - flexarray_append_pair(back, "vncunused", libxl__sprintf(&gc, "%d", vfb->vncunused)); - flexarray_append_pair(back, "sdl", libxl__sprintf(&gc, "%d", vfb->sdl)); - flexarray_append_pair(back, "opengl", libxl__sprintf(&gc, "%d", vfb->opengl)); + flexarray_append_pair(back, "vncdisplay", libxl__sprintf(gc, "%d", vfb->vncdisplay)); + flexarray_append_pair(back, "vncunused", libxl__sprintf(gc, "%d", vfb->vncunused)); + flexarray_append_pair(back, "sdl", libxl__sprintf(gc, "%d", vfb->sdl)); + flexarray_append_pair(back, "opengl", libxl__sprintf(gc, "%d", vfb->opengl)); if (vfb->xauthority) { flexarray_append_pair(back, "xauthority", vfb->xauthority); } @@ -1974,50 +1974,50 @@ int libxl_device_vfb_add(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) flexarray_append_pair(back, "display", vfb->display); } - flexarray_append_pair(front, "backend-id", libxl__sprintf(&gc, "%d", vfb->backend_domid)); - flexarray_append_pair(front, "state", libxl__sprintf(&gc, "%d", 1)); + flexarray_append_pair(front, "backend-id", libxl__sprintf(gc, "%d", vfb->backend_domid)); + flexarray_append_pair(front, "state", libxl__sprintf(gc, "%d", 1)); - libxl__device_generic_add(&gc, &device, - libxl__xs_kvs_of_flexarray(&gc, back, back->count), - libxl__xs_kvs_of_flexarray(&gc, front, front->count)); + libxl__device_generic_add(gc, &device, + libxl__xs_kvs_of_flexarray(gc, back, back->count), + libxl__xs_kvs_of_flexarray(gc, front, front->count)); rc = 0; out_free: flexarray_free(front); flexarray_free(back); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vfb_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out; - rc = libxl__device_remove(&gc, &device, 1); + rc = libxl__device_remove(gc, &device, 1); out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_vfb_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_vfb *vfb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl__device device; int rc; - rc = libxl__device_from_vfb(&gc, domid, vfb, &device); + rc = libxl__device_from_vfb(gc, domid, vfb, &device); if (rc != 0) goto out; - rc = libxl__device_destroy(&gc, &device); + rc = libxl__device_destroy(gc, &device); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2025,13 +2025,13 @@ out: int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *mem, *endptr; uint32_t memorykb; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); int rc = 1; - mem = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/memory/target", dompath)); + mem = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!mem) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot get memory info from %s/memory/target\n", dompath); goto out; @@ -2056,7 +2056,7 @@ int libxl_domain_setmaxmem(libxl_ctx *ctx, uint32_t domid, uint32_t max_memkb) rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2164,12 +2164,12 @@ retry: int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, int32_t target_memkb, int relative, int enforce) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 1, abort = 0; uint32_t memorykb = 0, videoram = 0; uint32_t current_target_memkb = 0, new_target_memkb = 0; char *memmax, *endptr, *videoram_s = NULL, *target = NULL; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); xc_domaininfo_t info; libxl_dominfo ptr; char *uuid; @@ -2178,11 +2178,11 @@ int libxl_set_memory_target(libxl_ctx *ctx, uint32_t domid, retry_transaction: t = xs_transaction_start(ctx->xsh); - target = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + target = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!target && !domid) { xs_transaction_end(ctx->xsh, t, 1); - rc = libxl__fill_dom0_memory_info(&gc, ¤t_target_memkb); + rc = libxl__fill_dom0_memory_info(gc, ¤t_target_memkb); if (rc < 0) { abort = 1; goto out; @@ -2204,7 +2204,7 @@ retry_transaction: goto out; } } - memmax = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + memmax = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/static-max", dompath)); if (!memmax) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, @@ -2244,7 +2244,7 @@ retry_transaction: abort = 1; goto out; } - videoram_s = libxl__xs_read(&gc, t, libxl__sprintf(&gc, + videoram_s = libxl__xs_read(gc, t, libxl__sprintf(gc, "%s/memory/videoram", dompath)); videoram = videoram_s ? atoi(videoram_s) : 0; @@ -2273,7 +2273,7 @@ retry_transaction: goto out; } - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/memory/target", + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/memory/target", dompath), "%"PRIu32, new_target_memkb); rc = xc_domain_getinfolist(ctx->xch, domid, 1, &info); if (rc != 1 || info.domain != domid) { @@ -2281,8 +2281,8 @@ retry_transaction: goto out; } xcinfo2xlinfo(&info, &ptr); - uuid = libxl__uuid2string(&gc, ptr.uuid); - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "/vm/%s/memory", uuid), + uuid = libxl__uuid2string(gc, ptr.uuid); + libxl__xs_write(gc, t, libxl__sprintf(gc, "/vm/%s/memory", uuid), "%"PRIu32, new_target_memkb / 1024); out: @@ -2290,22 +2290,22 @@ out: if (errno == EAGAIN) goto retry_transaction; - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = 1; char *target = NULL, *endptr = NULL; - char *dompath = libxl__xs_get_dompath(&gc, domid); + char *dompath = libxl__xs_get_dompath(gc, domid); uint32_t target_memkb; - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/memory/target", dompath)); if (!target && !domid) { - rc = libxl__fill_dom0_memory_info(&gc, &target_memkb); + rc = libxl__fill_dom0_memory_info(gc, &target_memkb); if (rc < 0) goto out; } else if (!target) { @@ -2326,14 +2326,14 @@ int libxl_get_memory_target(libxl_ctx *ctx, uint32_t domid, uint32_t *out_target rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, libxl_device_model_info *dm_info, uint32_t *need_memkb) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc = ERROR_INVAL; *need_memkb = b_info->target_memkb; switch (b_info->type) { @@ -2352,7 +2352,7 @@ int libxl_domain_need_memory(libxl_ctx *ctx, libxl_domain_build_info *b_info, *need_memkb += (2 * 1024) - (*need_memkb % (2 * 1024)); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2362,12 +2362,12 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) int rc = 0; libxl_physinfo info; uint32_t freemem_slack; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); rc = libxl_get_physinfo(ctx, &info); if (rc < 0) goto out; - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); + rc = libxl__get_free_memory_slack(gc, &freemem_slack); if (rc < 0) goto out; @@ -2377,7 +2377,7 @@ int libxl_get_free_memory(libxl_ctx *ctx, uint32_t *memkb) *memkb = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2387,9 +2387,9 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t int rc = 0; libxl_physinfo info; uint32_t freemem_slack; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); - rc = libxl__get_free_memory_slack(&gc, &freemem_slack); + rc = libxl__get_free_memory_slack(gc, &freemem_slack); if (rc < 0) goto out; while (wait_secs > 0) { @@ -2406,7 +2406,7 @@ int libxl_wait_for_free_memory(libxl_ctx *ctx, uint32_t domid, uint32_t rc = ERROR_NOMEM; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2632,7 +2632,7 @@ int libxl_set_vcpuaffinity(libxl_ctx *ctx, uint32_t domid, uint32_t vcpuid, int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_dominfo info; char *dompath; xs_transaction_t t; @@ -2642,14 +2642,14 @@ int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid, libxl_cpumap *cpumap) LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "getting domain info list"); goto out; } - if (!(dompath = libxl__xs_get_dompath(&gc, domid))) + if (!(dompath = libxl__xs_get_dompath(gc, domid))) goto out; retry_transaction: t = xs_transaction_start(ctx->xsh); for (i = 0; i <= info.vcpu_max_id; i++) - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "%s/cpu/%u/availability", dompath, i), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "%s/cpu/%u/availability", dompath, i), "%s", libxl_cpumap_test(cpumap, i) ? "online" : "offline"); if (!xs_transaction_end(ctx->xsh, t, 0)) { if (errno == EAGAIN) @@ -2657,7 +2657,7 @@ retry_transaction: } else rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -2777,12 +2777,12 @@ int libxl_send_trigger(libxl_ctx *ctx, uint32_t domid, char *trigger_name, uint3 int libxl_send_sysrq(libxl_ctx *ctx, uint32_t domid, char sysrq) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *dompath = libxl__xs_get_dompath(&gc, domid); + GC_INIT(ctx); + char *dompath = libxl__xs_get_dompath(gc, domid); - libxl__xs_write(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/control/sysrq", dompath), "%c", sysrq); + libxl__xs_write(gc, XBT_NULL, libxl__sprintf(gc, "%s/control/sysrq", dompath), "%c", sysrq); - libxl__free_all(&gc); + GC_FREE; return 0; } @@ -2869,15 +2869,15 @@ void libxl_xen_console_read_finish(libxl_ctx *ctx, uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); - char *dompath = libxl__xs_get_dompath(&gc, domid); + GC_INIT(ctx); + char *dompath = libxl__xs_get_dompath(gc, domid); char *vm_path, *start_time; uint32_t ret; vm_path = libxl__xs_read( - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dompath)); + gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dompath)); start_time = libxl__xs_read( - &gc, XBT_NULL, libxl__sprintf(&gc, "%s/start_time", vm_path)); + gc, XBT_NULL, libxl__sprintf(gc, "%s/start_time", vm_path)); if (start_time == NULL) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, -1, "Can't get start time of domain '%d'", domid); @@ -2885,7 +2885,7 @@ uint32_t libxl_vm_get_start_time(libxl_ctx *ctx, uint32_t domid) }else{ ret = strtoul(start_time, NULL, 10); } - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -3038,15 +3038,15 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, libxl_cpumap cpumap, libxl_uuid *uuid, uint32_t *poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; int i; xs_transaction_t t; char *uuid_string; - uuid_string = libxl__uuid2string(&gc, *uuid); + uuid_string = libxl__uuid2string(gc, *uuid); if (!uuid_string) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3054,7 +3054,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, if (rc) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Could not create cpupool"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -3065,7 +3065,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Error moving cpu to cpupool"); libxl_cpupool_destroy(ctx, *poolid); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } } @@ -3073,16 +3073,16 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, for (;;) { t = xs_transaction_start(ctx->xsh); - xs_mkdir(ctx->xsh, t, libxl__sprintf(&gc, "/local/pool/%d", *poolid)); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/uuid", *poolid), + xs_mkdir(ctx->xsh, t, libxl__sprintf(gc, "/local/pool/%d", *poolid)); + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/uuid", *poolid), "%s", uuid_string); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/name", *poolid), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/name", *poolid), "%s", name); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) { - libxl__free_all(&gc); + GC_FREE; return 0; } } @@ -3090,7 +3090,7 @@ int libxl_create_cpupool(libxl_ctx *ctx, const char *name, int schedid, int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc, i; xc_cpupoolinfo_t *info; xs_transaction_t t; @@ -3098,7 +3098,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) info = xc_cpupool_getinfo(ctx->xch, poolid); if (info == NULL) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3132,7 +3132,7 @@ int libxl_cpupool_destroy(libxl_ctx *ctx, uint32_t poolid) for (;;) { t = xs_transaction_start(ctx->xsh); - xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(&gc, "/local/pool/%d", poolid)); + xs_rm(ctx->xsh, XBT_NULL, libxl__sprintf(gc, "/local/pool/%d", poolid)); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) break; @@ -3144,21 +3144,21 @@ out1: libxl_cpumap_dispose(&cpumap); out: xc_cpupool_infofree(ctx->xch, info); - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); xs_transaction_t t; xc_cpupoolinfo_t *info; int rc; info = xc_cpupool_getinfo(ctx->xch, poolid); if (info == NULL) { - libxl__free_all(&gc); + GC_FREE; return ERROR_NOMEM; } @@ -3171,8 +3171,8 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) for (;;) { t = xs_transaction_start(ctx->xsh); - libxl__xs_write(&gc, t, - libxl__sprintf(&gc, "/local/pool/%d/name", poolid), + libxl__xs_write(gc, t, + libxl__sprintf(gc, "/local/pool/%d/name", poolid), "%s", name); if (xs_transaction_end(ctx->xsh, t, 0)) @@ -3187,7 +3187,7 @@ int libxl_cpupool_rename(libxl_ctx *ctx, const char *name, uint32_t poolid) out: xc_cpupool_infofree(ctx->xch, info); - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -3294,16 +3294,16 @@ out: int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; char *dom_path; char *vm_path; char *poolname; xs_transaction_t t; - dom_path = libxl__xs_get_dompath(&gc, domid); + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } @@ -3311,26 +3311,26 @@ int libxl_cpupool_movedomain(libxl_ctx *ctx, uint32_t poolid, uint32_t domid) if (rc) { LIBXL__LOG_ERRNOVAL(ctx, LIBXL__LOG_ERROR, rc, "Error moving domain to cpupool"); - libxl__free_all(&gc); + GC_FREE; return ERROR_FAIL; } for (;;) { t = xs_transaction_start(ctx->xsh); - poolname = libxl__cpupoolid_to_name(&gc, poolid); - vm_path = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/vm", dom_path)); + poolname = libxl__cpupoolid_to_name(gc, poolid); + vm_path = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/vm", dom_path)); if (!vm_path) break; - libxl__xs_write(&gc, t, libxl__sprintf(&gc, "%s/pool_name", vm_path), + libxl__xs_write(gc, t, libxl__sprintf(gc, "%s/pool_name", vm_path), "%s", poolname); if (xs_transaction_end(ctx->xsh, t, 0) || (errno != EAGAIN)) break; } - libxl__free_all(&gc); + GC_FREE; return 0; } diff --git a/tools/libxl/libxl_bootloader.c b/tools/libxl/libxl_bootloader.c index b8399a1..ce83b8e 100644 --- a/tools/libxl/libxl_bootloader.c +++ b/tools/libxl/libxl_bootloader.c @@ -328,7 +328,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, libxl_device_disk *disk, uint32_t domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int ret, rc = 0; char *fifo = NULL; char *diskpath = NULL; @@ -388,7 +388,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - args = make_bootloader_args(&gc, info, domid, fifo, diskpath); + args = make_bootloader_args(gc, info, domid, fifo, diskpath); if (args == NULL) { rc = ERROR_NOMEM; goto out_close; @@ -411,8 +411,8 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - dom_console_xs_path = libxl__sprintf(&gc, "%s/console/tty", libxl__xs_get_dompath(&gc, domid)); - libxl__xs_write(&gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); + dom_console_xs_path = libxl__sprintf(gc, "%s/console/tty", libxl__xs_get_dompath(gc, domid)); + libxl__xs_write(gc, XBT_NULL, dom_console_xs_path, "%s", dom_console_slave_tty_path); pid = fork_exec_bootloader(&bootloader_fd, info->u.pv.bootloader, args); if (pid < 0) { @@ -435,7 +435,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, fcntl(fifo_fd, F_SETFL, O_NDELAY); - blout = bootloader_interact(&gc, xenconsoled_fd, bootloader_fd, fifo_fd); + blout = bootloader_interact(gc, xenconsoled_fd, bootloader_fd, fifo_fd); if (blout == NULL) { goto out_close; } @@ -445,7 +445,7 @@ int libxl_run_bootloader(libxl_ctx *ctx, goto out_close; } - parse_bootloader_result(&gc, info, blout); + parse_bootloader_result(gc, info, blout); rc = 0; out_close: @@ -472,7 +472,7 @@ out_close: free(args); out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c index ccb56c7..69f10fe 100644 --- a/tools/libxl/libxl_create.c +++ b/tools/libxl/libxl_create.c @@ -670,20 +670,20 @@ error_out: int libxl_domain_create_new(libxl_ctx *ctx, libxl_domain_config *d_config, libxl_console_ready cb, void *priv, uint32_t *domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = do_domain_create(&gc, d_config, cb, priv, domid, -1); - libxl__free_all(&gc); + rc = do_domain_create(gc, d_config, cb, priv, domid, -1); + GC_FREE; return rc; } int libxl_domain_create_restore(libxl_ctx *ctx, libxl_domain_config *d_config, libxl_console_ready cb, void *priv, uint32_t *domid, int restore_fd) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = do_domain_create(&gc, d_config, cb, priv, domid, restore_fd); - libxl__free_all(&gc); + rc = do_domain_create(gc, d_config, cb, priv, domid, restore_fd); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index 96098de..b1ff967 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -730,7 +730,7 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, const char *userdata_userid, const uint8_t *data, int datalen) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *filename; const char *newfilename; int e, rc; @@ -738,18 +738,18 @@ int libxl_userdata_store(libxl_ctx *ctx, uint32_t domid, FILE *f = NULL; size_t rs; - filename = userdata_path(&gc, domid, userdata_userid, "d"); + filename = userdata_path(gc, domid, userdata_userid, "d"); if (!filename) { rc = ERROR_NOMEM; goto out; } if (!datalen) { - rc = userdata_delete(&gc, filename); + rc = userdata_delete(gc, filename); goto out; } - newfilename = userdata_path(&gc, domid, userdata_userid, "n"); + newfilename = userdata_path(gc, domid, userdata_userid, "n"); if (!newfilename) { rc = ERROR_NOMEM; goto out; @@ -791,7 +791,7 @@ err: LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "cannot write %s for %s", newfilename, filename); out: - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -799,13 +799,13 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, const char *userdata_userid, uint8_t **data_r, int *datalen_r) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); const char *filename; int e, rc; int datalen = 0; void *data = 0; - filename = userdata_path(&gc, domid, userdata_userid, "d"); + filename = userdata_path(gc, domid, userdata_userid, "d"); if (!filename) { rc = ERROR_NOMEM; goto out; @@ -827,7 +827,7 @@ int libxl_userdata_retrieve(libxl_ctx *ctx, uint32_t domid, if (datalen_r) *datalen_r = datalen; rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_pci.c b/tools/libxl/libxl_pci.c index 63c3050..120c239 100644 --- a/tools/libxl/libxl_pci.c +++ b/tools/libxl/libxl_pci.c @@ -483,7 +483,7 @@ static int is_assigned(libxl_device_pci *assigned, int num_assigned, libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); libxl_device_pci *pcidevs = NULL, *new, *assigned; struct dirent *de; DIR *dir; @@ -491,7 +491,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) *num = 0; - rc = get_all_assigned_devices(&gc, &assigned, &num_assigned); + rc = get_all_assigned_devices(gc, &assigned, &num_assigned); if ( rc ) goto out; @@ -528,7 +528,7 @@ libxl_device_pci *libxl_device_pci_list_assignable(libxl_ctx *ctx, int *num) out_closedir: closedir(dir); out: - libxl__free_all(&gc); + GC_FREE; return pcidevs; } @@ -782,10 +782,10 @@ static int libxl__device_pci_reset(libxl__gc *gc, unsigned int domain, unsigned int libxl_device_pci_add(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_add(&gc, domid, pcidev, 0); - libxl__free_all(&gc); + rc = libxl__device_pci_add(gc, domid, pcidev, 0); + GC_FREE; return rc; } @@ -1057,24 +1057,24 @@ out: int libxl_device_pci_remove(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 0); + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 0); - libxl__free_all(&gc); + GC_FREE; return rc; } int libxl_device_pci_destroy(libxl_ctx *ctx, uint32_t domid, libxl_device_pci *pcidev) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); int rc; - rc = libxl__device_pci_remove_common(&gc, domid, pcidev, 1); + rc = libxl__device_pci_remove_common(gc, domid, pcidev, 1); - libxl__free_all(&gc); + GC_FREE; return rc; } @@ -1115,15 +1115,15 @@ static void libxl__device_pci_from_xs_be(libxl__gc *gc, libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *be_path, *num_devs; int n, i; libxl_device_pci *pcidevs = NULL; *num = 0; - be_path = libxl__sprintf(&gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(&gc, 0), domid); - num_devs = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/num_devs", be_path)); + be_path = libxl__sprintf(gc, "%s/backend/pci/%d/0", libxl__xs_get_dompath(gc, 0), domid); + num_devs = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/num_devs", be_path)); if (!num_devs) goto out; @@ -1131,11 +1131,11 @@ libxl_device_pci *libxl_device_pci_list(libxl_ctx *ctx, uint32_t domid, int *num pcidevs = calloc(n, sizeof(libxl_device_pci)); for (i = 0; i < n; i++) - libxl__device_pci_from_xs_be(&gc, be_path, pcidevs + i, i); + libxl__device_pci_from_xs_be(gc, be_path, pcidevs + i, i); *num = n; out: - libxl__free_all(&gc); + GC_FREE; return pcidevs; } diff --git a/tools/libxl/libxl_qmp.c b/tools/libxl/libxl_qmp.c index c7696d7..60af98c 100644 --- a/tools/libxl/libxl_qmp.c +++ b/tools/libxl/libxl_qmp.c @@ -94,7 +94,7 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, const char *chardev, int port) { - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); char *path = NULL; int ret = 0; @@ -102,12 +102,12 @@ static int store_serial_port_info(libxl__qmp_handler *qmp, return 0; } - path = libxl__xs_get_dompath(&gc, qmp->domid); - path = libxl__sprintf(&gc, "%s/serial/%d/tty", path, port); + path = libxl__xs_get_dompath(gc, qmp->domid); + path = libxl__sprintf(gc, "%s/serial/%d/tty", path, port); - ret = libxl__xs_write(&gc, XBT_NULL, path, "%s", chardev + 4); + ret = libxl__xs_write(gc, XBT_NULL, path, "%s", chardev + 4); - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -521,7 +521,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, { int id = 0; int ret = 0; - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); qmp_request_context context = { .rc = 0 }; id = qmp_send(qmp, cmd, args, callback, opaque, &context); @@ -531,7 +531,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, qmp->wait_for_id = id; while (qmp->wait_for_id == id) { - if ((ret = qmp_next(&gc, qmp)) < 0) { + if ((ret = qmp_next(gc, qmp)) < 0) { break; } } @@ -540,7 +540,7 @@ static int qmp_synchronous_send(libxl__qmp_handler *qmp, const char *cmd, ret = context.rc; } - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -559,15 +559,15 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) int ret = 0; libxl__qmp_handler *qmp = NULL; char *qmp_socket; - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); qmp = qmp_init_handler(ctx, domid); - qmp_socket = libxl__sprintf(&gc, "%s/qmp-libxl-%d", + qmp_socket = libxl__sprintf(gc, "%s/qmp-libxl-%d", libxl_run_dir_path(), domid); if ((ret = qmp_open(qmp, qmp_socket, QMP_SOCKET_CONNECT_TIMEOUT)) < 0) { LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "Connection error"); - libxl__free_all(&gc); + GC_FREE; qmp_free_handler(qmp); return NULL; } @@ -576,12 +576,12 @@ libxl__qmp_handler *libxl__qmp_initialize(libxl_ctx *ctx, uint32_t domid) /* Wait for the response to qmp_capabilities */ while (!qmp->connected) { - if ((ret = qmp_next(&gc, qmp)) < 0) { + if ((ret = qmp_next(gc, qmp)) < 0) { break; } } - libxl__free_all(&gc); + GC_FREE; if (!qmp->connected) { LIBXL__LOG(ctx, LIBXL__LOG_ERROR, "Failed to connect to QMP"); libxl__qmp_close(qmp); @@ -626,9 +626,9 @@ static int pci_add_callback(libxl__qmp_handler *qmp, { libxl_device_pci *pcidev = opaque; const libxl__json_object *bus = NULL; - libxl__gc gc = LIBXL_INIT_GC(qmp->ctx); + GC_INIT(qmp->ctx); int i, j, rc = -1; - char *asked_id = libxl__sprintf(&gc, PCI_PT_QDEV_ID, + char *asked_id = libxl__sprintf(gc, PCI_PT_QDEV_ID, pcidev->bus, pcidev->dev, pcidev->func); for (i = 0; (bus = libxl__json_array_get(response, i)); i++) { @@ -665,7 +665,7 @@ static int pci_add_callback(libxl__qmp_handler *qmp, out: - libxl__free_all(&gc); + GC_FREE; return rc; } diff --git a/tools/libxl/libxl_utils.c b/tools/libxl/libxl_utils.c index f1f2a6d..d36c737 100644 --- a/tools/libxl/libxl_utils.c +++ b/tools/libxl/libxl_utils.c @@ -186,29 +186,29 @@ char *libxl_schedid_to_name(libxl_ctx *ctx, int schedid) int libxl_get_stubdom_id(libxl_ctx *ctx, int guest_domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char * stubdom_id_s; int ret; - stubdom_id_s = libxl__xs_read(&gc, XBT_NULL, - libxl__sprintf(&gc, "%s/image/device-model-domid", - libxl__xs_get_dompath(&gc, guest_domid))); + stubdom_id_s = libxl__xs_read(gc, XBT_NULL, + libxl__sprintf(gc, "%s/image/device-model-domid", + libxl__xs_get_dompath(gc, guest_domid))); if (stubdom_id_s) ret = atoi(stubdom_id_s); else ret = 0; - libxl__free_all(&gc); + GC_FREE; return ret; } int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); char *target, *endptr; uint32_t value; int ret = 0; - target = libxl__xs_read(&gc, XBT_NULL, libxl__sprintf(&gc, "%s/target", libxl__xs_get_dompath(&gc, domid))); + target = libxl__xs_read(gc, XBT_NULL, libxl__sprintf(gc, "%s/target", libxl__xs_get_dompath(gc, domid))); if (!target) goto out; value = strtol(target, &endptr, 10); @@ -218,7 +218,7 @@ int libxl_is_stubdom(libxl_ctx *ctx, uint32_t domid, uint32_t *target_domid) *target_domid = value; ret = 1; out: - libxl__free_all(&gc); + GC_FREE; return ret; } @@ -240,27 +240,27 @@ static int logrename(libxl__gc *gc, const char *old, const char *new) int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) { - libxl__gc gc = LIBXL_INIT_GC(ctx); + GC_INIT(ctx); struct stat stat_buf; char *logfile, *logfile_new; int i, rc; - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); if (stat(logfile, &stat_buf) == 0) { /* file exists, rotate */ - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.10", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.10", name); unlink(logfile); for (i = 9; i > 0; i--) { - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i); - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.%d", name, i + 1); - rc = logrename(&gc, logfile, logfile_new); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i); + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.%d", name, i + 1); + rc = logrename(gc, logfile, logfile_new); if (rc) goto out; } - logfile = libxl__sprintf(&gc, "/var/log/xen/%s.log", name); - logfile_new = libxl__sprintf(&gc, "/var/log/xen/%s.log.1", name); + logfile = libxl__sprintf(gc, "/var/log/xen/%s.log", name); + logfile_new = libxl__sprintf(gc, "/var/log/xen/%s.log.1", name); - rc = logrename(&gc, logfile, logfile_new); + rc = logrename(gc, logfile, logfile_new); if (rc) goto out; } else { @@ -272,7 +272,7 @@ int libxl_create_logfile(libxl_ctx *ctx, char *name, char **full_name) *full_name = strdup(logfile); rc = 0; out: - libxl__free_all(&gc); + GC_FREE; return rc; } -- 1.7.2.5 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel From xen-devel-bounces@lists.xensource.com Fri Dec 09 20:21:23 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 09 Dec 2011 20:21:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ6w3-0005bO-NW; Fri, 09 Dec 2011 20:20:47 +0000 Received: from mail27.messagelabs.com ([193.109.254.147]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZ6w0-0005bJ-Lm for xen-devel@lists.xensource.com; Fri, 09 Dec 2011 20:20:45 +0000 X-Env-Sender: Neal.Taylor@ca.com X-Msg-Ref: server-9.tower-27.messagelabs.com!1323461956!56089715!1 X-Originating-IP: [74.125.149.211] X-SpamReason: No, hits=0.9 required=7.0 tests=BODY_RANDOM_LONG, HTML_50_60,HTML_ATTR_UNIQUE,HTML_MESSAGE X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 32395 invoked from network); 9 Dec 2011 20:19:19 -0000 Received: from na3sys009aog114.obsmtp.com (HELO na3sys009aog114.obsmtp.com) (74.125.149.211) by server-9.tower-27.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 9 Dec 2011 20:19:19 -0000 Received: from USILMS191.ca.com ([141.202.246.45]) (using TLSv1) by na3sys009aob114.postini.com ([74.125.148.12]) with SMTP ID DSNKTuJtZV14JjFrCEb478Zzi6zSOjnnErqF@postini.com; Fri, 09 Dec 2011 12:19:51 PST Received: from USILMS174.ca.com (141.202.6.24) by USILMS191.ca.com (141.202.246.45) with Microsoft SMTP Server (TLS) id 14.1.289.1; Fri, 9 Dec 2011 15:19:48 -0500 Received: from USILMS110A.ca.com ([169.254.1.109]) by usilms174.ca.com ([141.202.6.24]) with mapi id 14.01.0289.001; Fri, 9 Dec 2011 15:19:48 -0500 From: "Taylor, Neal E" To: xen-devel Thread-Topic: Buffers not reachable by PCI Thread-Index: Acy2r+Ulg1PsfbmtTl6QVj0jZAx7mw== Date: Fri, 9 Dec 2011 20:19:47 +0000 Message-ID: <3E243B26F475504B9BB0BCC9728B0DA629E16E01@USILMS110A.ca.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [138.42.46.108] Content-Type: multipart/mixed; boundary="_005_3E243B26F475504B9BB0BCC9728B0DA629E16E01USILMS110Acacom_" MIME-Version: 1.0 Cc: Konrad Rzeszutek Wilk , "Kalev, Leonid" , "Dave, Tushar N" Subject: [Xen-devel] Buffers not reachable by PCI X-BeenThere: xen-devel@lists.xensource.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com --_005_3E243B26F475504B9BB0BCC9728B0DA629E16E01USILMS110Acacom_ Content-Type: multipart/alternative; boundary="_000_3E243B26F475504B9BB0BCC9728B0DA629E16E01USILMS110Acacom_" --_000_3E243B26F475504B9BB0BCC9728B0DA629E16E01USILMS110Acacom_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable We're running 64-bit Xex 4.1.1 and 32-bit Linux 3.0.4 Dom0 (Linux 3.1 shows= the same symptom.) Several PCI drivers are unable to use DMA. Most fallback to using PIO but i= n two instances the network drivers (e1000 and pcinet32) abort. The same ke= rnel running on the same hardware without Xen works fine. Digging through the code, in swiotlb-xen.c I find "DMA_BIT_MASK(32)" (0x000= 00000ffffffff) compared to "xen_virt_to_bus(xen_io_tlb_end - 1)" which reso= lves to 0x1,20fd,feff. Since the address is larger than the mask, DMA is de= clared as unsupportable. In talking with others I hear Linux handles this situation with bounce buff= ers. Is there a config setting I've missed to enable that for Xen? (Config = file attached) Relevant slice of source callback list: xen_swiotlb_dma_supported (drivers/xen/swiotlb-xen.c: line 591) dma_supported (arch/x86/kernel/pci-dma.c: line 199) dma_set_mask (arch/x86/kernel/pci-dma.c: line 59) e1000_probe (drivers/net/e1000/e1000_main.c: line 986) Relevant patches: https://lkml.org/lkml/2011/9/1/100, "[PATCH v2] xen: x86_32: do not enable = iterrupts when returning from exception in interrupt context" http://xen.1045712.n5.nabble.com/PATCH-mm-sync-vmalloc-address-space-page-t= ables-in-alloc-vm-area-td4757995.html "[PATCH] mm: sync vmalloc address spa= ce page tables in alloc_vm_area()" (this patch was reverted for 3.1 but thi= s is 3.0.4) and an additional 2048 NR_IRQS to support (as I understand it) all the virtual = devices we might support with 50 guests. Not so relevant patches in md, nbd and loop. lspci: 00:00.0 Host bridge: Intel Corporation E7520 Memory Controller Hub (rev 09) 00:02.0 PCI bridge: Intel Corporation E7525/E7520/E7320 PCI Express Port A = (rev 09) 00:04.0 PCI bridge: Intel Corporation E7525/E7520 PCI Express Port B (rev 0= 9) 00:05.0 PCI bridge: Intel Corporation E7520 PCI Express Port B1 (rev 09) 00:06.0 PCI bridge: Intel Corporation E7520 PCI Express Port C (rev 09) 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI = Controller #1 (rev 02) 00:1d.1 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI = Controller #2 (rev 02) 00:1d.2 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI = Controller #3 (rev 02) 00:1d.7 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB2 EHCI= Controller (rev 02) 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface= Bridge (rev 02) 00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE Contro= ller (rev 02) 01:00.0 PCI bridge: Intel Corporation 80332 [Dobson] I/O processor (A-Segme= nt Bridge) (rev 06) 01:00.2 PCI bridge: Intel Corporation 80332 [Dobson] I/O processor (B-Segme= nt Bridge) (rev 06) 02:05.0 SCSI storage controller: LSI Logic / Symbios Logic 53c1030 PCI-X Fu= sion-MPT Dual Ultra320 SCSI (rev 08) 05:00.0 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Bridge A (= rev 09) 05:00.2 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Bridge B (= rev 09) 06:07.0 Ethernet controller: Intel Corporation 82541GI Gigabit Ethernet Con= troller (rev 05) 07:08.0 Ethernet controller: Intel Corporation 82541GI Gigabit Ethernet Con= troller (rev 05) 09:05.0 Class ff00: Dell Remote Access Card 4 Daughter Card 09:05.1 Class ff00: Dell Remote Access Card 4 Daughter Card Virtual UART 09:05.2 Class ff00: Dell Remote Access Card 4 Daughter Card SMIC interface 09:06.0 IDE interface: Silicon Image, Inc. PCI0680 Ultra ATA-133 Host Contr= oller (rev 02) 09:0d.0 VGA compatible controller: ATI Technologies Inc Radeon RV100 QY [Ra= deon 7000/VE] 1 00:00.0 Host bridge: Intel Corporation E7520 Memory Controller Hub = (rev 09) 2 00:02.0 PCI bridge: Intel Corporation E7525/E7520/E7320 PCI Express= Port A (rev 09) 3 00:04.0 PCI bridge: Intel Corporation E7525/E7520 PCI Express Port = B (rev 09) 4 00:05.0 PCI bridge: Intel Corporation E7520 PCI Express Port B1 (re= v 09) 5 00:06.0 PCI bridge: Intel Corporation E7520 PCI Express Port C (rev= 09) 6 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) U= SB UHCI Controller #1 (rev 02) 7 00:1d.1 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) U= SB UHCI Controller #2 (rev 02) 8 00:1d.2 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) U= SB UHCI Controller #3 (rev 02) 9 00:1d.7 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) U= SB2 EHCI Controller (rev 02) 10 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) 11 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC I= nterface Bridge (rev 02) 12 00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) ID= E Controller (rev 02) 13 01:00.0 PCI bridge: Intel Corporation 80332 [Dobson] I/O processor = (A-Segment Bridge) (rev 06) 14 01:00.2 PCI bridge: Intel Corporation 80332 [Dobson] I/O processor = (B-Segment Bridge) (rev 06) 15 02:05.0 SCSI storage controller: LSI Logic / Symbios Logic 53c1030 = PCI-X Fusion-MPT Dual Ultra320 SCSI (rev 08) 16 05:00.0 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Br= idge A (rev 09) 17 05:00.2 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Br= idge B (rev 09) 18 06:07.0 Ethernet controller: Intel Corporation 82541GI Gigabit Ethe= rnet Controller (rev 05) 19 07:08.0 Ethernet controller: Intel Corporation 82541GI Gigabit Ethe= rnet Controller (rev 05) 20 09:05.0 Class ff00: Dell Remote Access Card 4 Daughter Card 21 09:05.1 Class ff00: Dell Remote Access Card 4 Daughter Card Virtual= UART 22 09:05.2 Class ff00: Dell Remote Access Card 4 Daughter Card SMIC in= terface 23 09:06.0 IDE interface: Silicon Image, Inc. PCI0680 Ultra ATA-133 Ho= st Controller (rev 02) 24 09:0d.0 VGA compatible controller: ATI Technologies Inc Radeon RV10= 0 QY [Radeon 7000/VE] 06:07.0 Ethernet controller: Intel Corporation 82541GI Gigabit Ethernet Con= troller (rev 05) Subsystem: Dell PRO/1000 MT Network Connection Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr-= Stepping- SERR+ FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAbort- = SERR-

We’re running 64-bit Xex 4.1.1 and 32-bit Linu= x 3.0.4 Dom0 (Linux 3.1 shows the same symptom.)

 

Several PCI drivers are unable to use DMA. Most fall= back to using PIO but in two instances the network drivers (e1000 and pcine= t32) abort. The same kernel running on the same hardware without Xen works = fine.

 

Digging through the code, in swiotlb-xen.c I find &#= 8220;DMA_BIT_MASK(32)” (0x00000000ffffffff) compared to “xen_vi= rt_to_bus(xen_io_tlb_end - 1)” which resolves to 0x1,20fd,feff. Since= the address is larger than the mask, DMA is declared as unsupportable.

 

In talking with others I hear Linux handles this sit= uation with bounce buffers. Is there a config setting I’ve missed to = enable that for Xen? (Config file attached)

 

 

Relevant slice of source callback list:

= xen_swiotlb_dma_supported (drivers/xen/swiotlb-xen.c: line 591)<= /span>

= dma_supported          &n= bsp;  (arch/x86/kernel/pci-dma.c: line 199)

= dma_set_mask           &n= bsp;  (arch/x86/kernel/pci-dma.c: line 59)

= e1000_probe          &nbs= p;    (drivers/net/e1000/e1000_main.c: line 986)<= /span>

=  

=  

Relevant patches:

ht= tps://lkml.org/lkml/2011/9/1/100, "[PATCH v2] xen: x86_32: do not = enable iterrupts when returning from exception in interrupt context"

http://xen.1045712.n5.nabble.com/PATCH-mm-sync-vmalloc-address-space-page-= tables-in-alloc-vm-area-td4757995.html "[PATCH] mm: sync vmalloc address space page tables in alloc_vm_area(= )" (this patch was reverted for 3.1 but this is 3.0.4) and

an additional 2048 NR_IRQS to support (as I under= stand it) all the virtual devices we might support with 50 guests.

 

Not so relevant patches in md, nbd and loop.

 

lspci:

00:00.0 Host bridge: Intel Corporation E7520 Memory = Controller Hub (rev 09)

00:02.0 PCI bridge: Intel Corporation E7525/E7520/E7= 320 PCI Express Port A (rev 09)

00:04.0 PCI bridge: Intel Corporation E7525/E7520 PC= I Express Port B (rev 09)

00:05.0 PCI bridge: Intel Corporation E7520 PCI Expr= ess Port B1 (rev 09)

00:06.0 PCI bridge: Intel Corporation E7520 PCI Expr= ess Port C (rev 09)

00:1d.0 USB Controller: Intel Corporation 82801EB/ER= (ICH5/ICH5R) USB UHCI Controller #1 (rev 02)

00:1d.1 USB Controller: Intel Corporation 82801EB/ER= (ICH5/ICH5R) USB UHCI Controller #2 (rev 02)

00:1d.2 USB Controller: Intel Corporation 82801EB/ER= (ICH5/ICH5R) USB UHCI Controller #3 (rev 02)

00:1d.7 USB Controller: Intel Corporation 82801EB/ER= (ICH5/ICH5R) USB2 EHCI Controller (rev 02)

00:1e.0 PCI bridge: Intel Corporation 82801 PCI Brid= ge (rev c2)

00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (IC= H5/ICH5R) LPC Interface Bridge (rev 02)

00:1f.1 IDE interface: Intel Corporation 82801EB/ER = (ICH5/ICH5R) IDE Controller (rev 02)

01:00.0 PCI bridge: Intel Corporation 80332 [Dobson]= I/O processor (A-Segment Bridge) (rev 06)

01:00.2 PCI bridge: Intel Corporation 80332 [Dobson]= I/O processor (B-Segment Bridge) (rev 06)

02:05.0 SCSI storage controller: LSI Logic / Symbios= Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI (rev 08)

05:00.0 PCI bridge: Intel Corporation 6700PXH PCI Ex= press-to-PCI Bridge A (rev 09)

05:00.2 PCI bridge: Intel Corporation 6700PXH PCI Ex= press-to-PCI Bridge B (rev 09)

06:07.0 Ethernet controller: Intel Corporation 82541= GI Gigabit Ethernet Controller (rev 05)

07:08.0 Ethernet controller: Intel Corporation 82541= GI Gigabit Ethernet Controller (rev 05)

09:05.0 Class ff00: Dell Remote Access Card 4 Daught= er Card

09:05.1 Class ff00: Dell Remote Access Card 4 Daught= er Card Virtual UART

09:05.2 Class ff00: Dell Remote Access Card 4 Daught= er Card SMIC interface

09:06.0 IDE interface: Silicon Image, Inc. PCI0680 U= ltra ATA-133 Host Controller (rev 02)

09:0d.0 VGA compatible controller: ATI Technologies = Inc Radeon RV100 QY [Radeon 7000/VE]

 

     1  00:00.0 Host bridge= : Intel Corporation E7520 Memory Controller Hub (rev 09)

     2  00:02.0 PCI bridge:= Intel Corporation E7525/E7520/E7320 PCI Express Port A (rev 09)=

     3  00:04.0 PCI bridge:= Intel Corporation E7525/E7520 PCI Express Port B (rev 09)

     4  00:05.0 PCI bridge:= Intel Corporation E7520 PCI Express Port B1 (rev 09)

     5  00:06.0 PCI bridge:= Intel Corporation E7520 PCI Express Port C (rev 09)

     6  00:1d.0 USB Control= ler: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 (rev = 02)

     7  00:1d.1 USB Control= ler: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2 (rev = 02)

     8  00:1d.2 USB Control= ler: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3 (rev = 02)

     9  00:1d.7 USB Control= ler: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller (rev 02= )

    10  00:1e.0 PCI bridge: Inte= l Corporation 82801 PCI Bridge (rev c2)

    11  00:1f.0 ISA bridge: Inte= l Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge (rev 02)

    12  00:1f.1 IDE interface: I= ntel Corporation 82801EB/ER (ICH5/ICH5R) IDE Controller (rev 02)=

    13  01:00.0 PCI bridge: Inte= l Corporation 80332 [Dobson] I/O processor (A-Segment Bridge) (rev 06)=

    14  01:00.2 PCI bridge: Inte= l Corporation 80332 [Dobson] I/O processor (B-Segment Bridge) (rev 06)=

    15  02:05.0 SCSI storage con= troller: LSI Logic / Symbios Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 S= CSI (rev 08)

    16  05:00.0 PCI bridge: Inte= l Corporation 6700PXH PCI Express-to-PCI Bridge A (rev 09)

    17  05:00.2 PCI bridge: Inte= l Corporation 6700PXH PCI Express-to-PCI Bridge B (rev 09)

    18  06:07.0 Ethernet control= ler: Intel Corporation 82541GI Gigabit Ethernet Controller (rev 05)

    19  07:08.0 Ethernet control= ler: Intel Corporation 82541GI Gigabit Ethernet Controller (rev 05)

    20  09:05.0 Class ff00: Dell= Remote Access Card 4 Daughter Card

    21  09:05.1 Class ff00: Dell= Remote Access Card 4 Daughter Card Virtual UART

    22  09:05.2 Class ff00: Dell= Remote Access Card 4 Daughter Card SMIC interface

    23  09:06.0 IDE interface: S= ilicon Image, Inc. PCI0680 Ultra ATA-133 Host Controller (rev 02)

    24  09:0d.0 VGA compatible c= ontroller: ATI Technologies Inc Radeon RV100 QY [Radeon 7000/VE]=

 

06:07.0 Ethernet controller: Intel Corporation 82541= GI Gigabit Ethernet Controller (rev 05)

        Subsystem= : Dell PRO/1000 MT Network Connection

        Control: = I/O+ Mem+ BusMaster- SpecCycle- MemWINV+ VGASnoop- ParErr- Step= ping- SERR+ FastB2B-

        Status: C= ap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAbort- <TA= bort- <MAbort- >SERR- <PERR-

        Interrupt= : pin A routed to IRQ 64

        Region 0:= Memory at dfae0000 (32-bit, non-prefetchable) [size=3D128K]

        Region 2:= I/O ports at dcc0 [size=3D64]

        Capabilit= ies: [dc] Power Management version 2

        &nbs= p;       Flags: PMEClk- DSI+ D1- D2- AuxC= urrent=3D0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

        &nbs= p;       Status: D0 PME-Enable- DSel=3D0 DSca= le=3D1 PME-

        Capabilit= ies: [e4] PCI-X non-bridge device

        &nbs= p;       Command: DPERE- ERO+ RBC=3D512 O= ST=3D1

        &nbs= p;       Status: Dev=3D00:00.0 64bit- 133MHz-= SCD- USC- DC=3Dsimple DMMRBC=3D2048 DMOST=3D1 DMCRS=3D8 RSCEM- 266MHz- 533= MHz-

 

log file attached.

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mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --_005_3E243B26F475504B9BB0BCC9728B0DA629E16E01USILMS110Acacom_-- From xen-changelog-bounces@lists.xensource.com Sat Dec 10 10:24:53 2011 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 10 Dec 2011 10:24:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZK6v-0004Pq-3t; Sat, 10 Dec 2011 10:24:53 +0000 Received: from mail216.messagelabs.com ([85.158.143.99]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1RZK6t-0004Iu-CF for xen-changelog@lists.xensource.com; Sat, 10 Dec 2011 10:24:52 +0000 X-Env-Sender: xen@xenbits.xen.org X-Msg-Ref: server-4.tower-216.messagelabs.com!1323512636!6899531!1 X-Originating-IP: [50.57.168.107] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Version: 6.4.2; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15055 invoked from network); 10 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Content-Transfer-Encoding: 7bit Sender: xen-changelog-bounces@lists.xensource.com Errors-To: xen-changelog-bounces@lists.xensource.com # HG changeset patch # User Tim Deegan # Date 1322760252 0 # Node ID f30a33c5b5bd1e2b0bdffa3a649490157e451a4e # Parent f25a004a6de8efc15d95408f3e92081393360acb # Parent 3e5683b6b37f9010772dac4a92166b1666485ddd merge --- diff -r f25a004a6de8 -r f30a33c5b5bd Config.mk --- a/Config.mk Thu Dec 01 17:21:24 2011 +0000 +++ b/Config.mk Thu Dec 01 17:24:12 2011 +0000 @@ -232,7 +232,7 @@ OCAML_TOOLS ?= y CONFIG_MINITERM ?= n CONFIG_LOMOUNT ?= n -CONFIG_SYSTEM_LIBAIO ?= n +CONFIG_SYSTEM_LIBAIO ?= y ifeq ($(OCAML_TOOLS),y) OCAML_TOOLS := $(shell ocamlopt -v > /dev/null 2>&1 && echo "y" || echo "n") diff -r f25a004a6de8 -r f30a33c5b5bd docs/gen-html-index --- a/docs/gen-html-index Thu Dec 01 17:21:24 2011 +0000 +++ b/docs/gen-html-index Thu Dec 01 17:24:12 2011 +0000 @@ -10,7 +10,6 @@ use Getopt::Long; use IO::File; use File::Basename; -use List::MoreUtils qw/ uniq /; Getopt::Long::Configure('bundling'); @@ -99,6 +98,12 @@ } } +sub uniq (@) { + my %h; + foreach (@_) { $h{$_} = 1; } + return keys %h; +} + for (@docs) { s,^\Q$outdir\E/,, } @docs = grep { -e "$outdir/$_" && (make_linktext($_) ne "NO-INDEX") } @docs; diff -r f25a004a6de8 -r f30a33c5b5bd docs/man/xl.pod.1 --- a/docs/man/xl.pod.1 Thu Dec 01 17:21:24 2011 +0000 +++ b/docs/man/xl.pod.1 Thu Dec 01 17:24:12 2011 +0000 @@ -32,19 +32,51 @@ =head1 NOTES +=over 4 + +=item start the script B at boot time + Most B operations rely upon B and B: make sure you start the script B at boot time to initialize all the daemons needed by B. +=item setup a B bridge in dom0 + In the most common network configuration, you need to setup a bridge in dom0 named B in order to have a working network in the guest domains. Please refer to the documentation of your Linux distribution to know how to setup the bridge. +=item B + +If you specify the amount of memory dom0 has, passing B to +Xen, it is highly reccomended to disable B. Edit +B and set it to 0. + +=item run xl as B + Most B commands require root privileges to run due to the communications channels used to talk to the hypervisor. Running as non root will return an error. +=back + +=head1 GLOBAL OPTIONS + +Some global options are always available: + +=over 4 + +=item B<-v> + +Verbose. + +=item B<-N> + +Dry run: do not actually execute the command. + +=back + =head1 DOMAIN SUBCOMMANDS The following subcommands manipulate domains directly. As stated @@ -52,13 +84,19 @@ =over 4 -=item B [I] I +=item B I I