From xen-devel-bounces@lists.xen.org Fri Jun 01 11:09:14 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 Jun 2012 11:09:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SaPjB-0004su-Oa; Fri, 01 Jun 2012 11:09:09 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Sa6fg-0004wT-6X for xen-devel@lists.xen.org; Thu, 31 May 2012 14:48:16 +0000 Received: from [85.158.143.35:10043] by server-2.bemta-4.messagelabs.com id DF/DE-11595-FA487CF4; Thu, 31 May 2012 14:48:15 +0000 X-Env-Sender: jean.guyader@citrix.com X-Msg-Ref: server-14.tower-21.messagelabs.com!1338475692!18273743!4 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiAxMDA0OTE=\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 3471 invoked from network); 31 May 2012 14:48:14 -0000 Received: from smtp.eu.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-14.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 31 May 2012 14:48:14 -0000 X-IronPort-AV: E=Sophos;i="4.75,692,1330905600"; d="scan'208";a="12765940" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 31 May 2012 14:48:13 +0000 Received: from norwich.cam.xci-test.com (10.80.248.129) by smtprelay.citrix.com (10.30.203.162) with Microsoft SMTP Server id 8.3.213.0; Thu, 31 May 2012 15:48:13 +0100 Received: from spongy.cam.xci-test.com ([10.80.248.53]) by norwich.cam.xci-test.com with esmtp (Exim 4.72) (envelope-from ) id 1Sa6fd-0003WP-2b; Thu, 31 May 2012 14:48:13 +0000 Received: from jeangu by spongy.cam.xci-test.com with local (Exim 4.69) (envelope-from ) id 1Sa6jt-0006to-2S; Thu, 31 May 2012 15:52:37 +0100 From: Jean Guyader To: Date: Thu, 31 May 2012 15:52:35 +0100 Message-ID: <1338475955-26472-6-git-send-email-jean.guyader@citrix.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1338475955-26472-1-git-send-email-jean.guyader@citrix.com> References: <1338475955-26472-1-git-send-email-jean.guyader@citrix.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------true" X-Mailman-Approved-At: Fri, 01 Jun 2012 11:09:05 +0000 Cc: Jean Guyader Subject: [Xen-devel] [PATCH 5/5] xen: Add V4V implementation X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --------------true Content-Type: text/plain; charset="UTF-8"; format=fixed Content-Transfer-Encoding: 8bit Setup of v4v domains a domain gets created and cleanup when a domain die. Wire up the v4v hypercall. Include v4v internal and public headers. Signed-off-by: Jean Guyader --- xen/arch/x86/hvm/hvm.c | 9 +- xen/arch/x86/x86_32/entry.S | 2 + xen/arch/x86/x86_64/compat/entry.S | 2 + xen/arch/x86/x86_64/entry.S | 2 + xen/common/Makefile | 1 + xen/common/domain.c | 11 +- xen/common/v4v.c | 1779 ++++++++++++++++++++++++++++++++++++ xen/include/public/v4v.h | 544 +++++++++++ xen/include/public/xen.h | 2 +- xen/include/xen/sched.h | 5 + xen/include/xen/v4v.h | 109 +++ 11 files changed, 2461 insertions(+), 5 deletions(-) create mode 100644 xen/common/v4v.c create mode 100644 xen/include/public/v4v.h create mode 100644 xen/include/xen/v4v.h --------------true Content-Type: text/x-patch; name="0005-xen-Add-V4V-implementation.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0005-xen-Add-V4V-implementation.patch" diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index e0d495d..6f2d70e 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3124,7 +3124,8 @@ static hvm_hypercall_t *hvm_hypercall32_table[NR_hypercalls] = { HYPERCALL(set_timer_op), HYPERCALL(hvm_op), HYPERCALL(sysctl), - HYPERCALL(tmem_op) + HYPERCALL(tmem_op), + HYPERCALL(v4v_op) }; #else /* defined(__x86_64__) */ @@ -3209,7 +3210,8 @@ static hvm_hypercall_t *hvm_hypercall64_table[NR_hypercalls] = { HYPERCALL(set_timer_op), HYPERCALL(hvm_op), HYPERCALL(sysctl), - HYPERCALL(tmem_op) + HYPERCALL(tmem_op), + HYPERCALL(v4v_op) }; #define COMPAT_CALL(x) \ @@ -3226,7 +3228,8 @@ static hvm_hypercall_t *hvm_hypercall32_table[NR_hypercalls] = { COMPAT_CALL(set_timer_op), HYPERCALL(hvm_op), HYPERCALL(sysctl), - HYPERCALL(tmem_op) + HYPERCALL(tmem_op), + HYPERCALL(v4v_op) }; #endif /* defined(__x86_64__) */ diff --git a/xen/arch/x86/x86_32/entry.S b/xen/arch/x86/x86_32/entry.S index 2982679..b3e0da4 100644 --- a/xen/arch/x86/x86_32/entry.S +++ b/xen/arch/x86/x86_32/entry.S @@ -700,6 +700,7 @@ ENTRY(hypercall_table) .long do_domctl .long do_kexec_op .long do_tmem_op + .long do_v4v_op .rept __HYPERVISOR_arch_0-((.-hypercall_table)/4) .long do_ni_hypercall .endr @@ -748,6 +749,7 @@ ENTRY(hypercall_args_table) .byte 1 /* do_domctl */ .byte 2 /* do_kexec_op */ .byte 1 /* do_tmem_op */ + .byte 6 /* do_v4v_op */ .rept __HYPERVISOR_arch_0-(.-hypercall_args_table) .byte 0 /* do_ni_hypercall */ .endr diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index f49ff2d..28615f9 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -414,6 +414,7 @@ ENTRY(compat_hypercall_table) .quad do_domctl .quad compat_kexec_op .quad do_tmem_op + .quad do_v4v_op .rept __HYPERVISOR_arch_0-((.-compat_hypercall_table)/8) .quad compat_ni_hypercall .endr @@ -462,6 +463,7 @@ ENTRY(compat_hypercall_args_table) .byte 1 /* do_domctl */ .byte 2 /* compat_kexec_op */ .byte 1 /* do_tmem_op */ + .byte 6 /* do_v4v_op */ .rept __HYPERVISOR_arch_0-(.-compat_hypercall_args_table) .byte 0 /* compat_ni_hypercall */ .endr diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 3836260..918fa59 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -699,6 +699,7 @@ ENTRY(hypercall_table) .quad do_domctl .quad do_kexec_op .quad do_tmem_op + .quad do_v4v_op .rept __HYPERVISOR_arch_0-((.-hypercall_table)/8) .quad do_ni_hypercall .endr @@ -747,6 +748,7 @@ ENTRY(hypercall_args_table) .byte 1 /* do_domctl */ .byte 2 /* do_kexec */ .byte 1 /* do_tmem_op */ + .byte 6 /* do_v4v_op */ .rept __HYPERVISOR_arch_0-(.-hypercall_args_table) .byte 0 /* do_ni_hypercall */ .endr diff --git a/xen/common/Makefile b/xen/common/Makefile index 9eba8bc..fe3c72c 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -45,6 +45,7 @@ obj-y += tmem_xen.o obj-y += radix-tree.o obj-y += rbtree.o obj-y += lzo.o +obj-y += v4v.o obj-bin-$(CONFIG_X86) += $(foreach n,decompress bunzip2 unxz unlzma unlzo,$(n).init.o) diff --git a/xen/common/domain.c b/xen/common/domain.c index 8840202..9539d88 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -195,7 +195,8 @@ struct domain *domain_create( { struct domain *d, **pd; enum { INIT_xsm = 1u<<0, INIT_watchdog = 1u<<1, INIT_rangeset = 1u<<2, - INIT_evtchn = 1u<<3, INIT_gnttab = 1u<<4, INIT_arch = 1u<<5 }; + INIT_evtchn = 1u<<3, INIT_gnttab = 1u<<4, INIT_arch = 1u<<5, + INIT_v4v = 1u<<6 }; int init_status = 0; int poolid = CPUPOOLID_NONE; @@ -219,6 +220,7 @@ struct domain *domain_create( spin_lock_init(&d->hypercall_deadlock_mutex); INIT_PAGE_LIST_HEAD(&d->page_list); INIT_PAGE_LIST_HEAD(&d->xenpage_list); + rwlock_init(&d->v4v_lock); spin_lock_init(&d->node_affinity_lock); d->node_affinity = NODE_MASK_ALL; @@ -274,6 +276,10 @@ struct domain *domain_create( goto fail; init_status |= INIT_gnttab; + if ( v4v_init(d) != 0 ) + goto fail; + init_status |= INIT_v4v; + poolid = 0; d->mem_event = xzalloc(struct mem_event_per_domain); @@ -313,6 +319,8 @@ struct domain *domain_create( xfree(d->mem_event); if ( init_status & INIT_arch ) arch_domain_destroy(d); + if ( init_status & INIT_v4v ) + v4v_destroy(d); if ( init_status & INIT_gnttab ) grant_table_destroy(d); if ( init_status & INIT_evtchn ) @@ -466,6 +474,7 @@ int domain_kill(struct domain *d) domain_pause(d); d->is_dying = DOMDYING_dying; spin_barrier(&d->domain_lock); + v4v_destroy(d); evtchn_destroy(d); gnttab_release_mappings(d); tmem_destroy(d->tmem); diff --git a/xen/common/v4v.c b/xen/common/v4v.c new file mode 100644 index 0000000..ed846ba --- /dev/null +++ b/xen/common/v4v.c @@ -0,0 +1,1779 @@ +/****************************************************************************** + * V4V + * + * Version 2 of v2v (Virtual-to-Virtual) + * + * Copyright (c) 2010, Citrix Systems + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef V4V_DEBUG +#define MY_FILE "v4v.c" +#define v4v_dprintk(format, args...) \ + do { \ + printk("%s:%d " format, \ + MY_FILE, __LINE__, ## args ); \ + } while ( 1 == 0 ) +#else +#define v4v_dprintk(format, ... ) (void)0 +#endif + + + +DEFINE_XEN_GUEST_HANDLE (uint8_t); +static struct v4v_ring_info *v4v_ring_find_info (struct domain *d, + struct v4v_ring_id *id); + +static struct v4v_ring_info *v4v_ring_find_info_by_addr (struct domain *d, + struct v4v_addr *a, + domid_t p); + +/* + * locks + */ + +/* + * locking is organized as follows: + * + * the global lock v4v_lock: L1 protects the v4v elements + * of all struct domain *d in the system, it does not + * protect any of the elements of d->v4v, just their + * addresses. By extension since the destruction of + * a domain with a non-NULL d->v4v will need to free + * the d->v4v pointer, holding this lock gauruntees + * that no domains pointers in which v4v is interested + * become invalid whilst this lock is held. + */ + +static DEFINE_RWLOCK (v4v_lock); /* L1 */ + +/* + * the lock d->v4v->lock: L2: Read on protects the hash table and + * the elements in the hash_table d->v4v->ring_hash, and + * the node and id fields in struct v4v_ring_info in the + * hash table. Write on L2 protects all of the elements of + * struct v4v_ring_info. To take L2 you must already have R(L1) + * W(L1) implies W(L2) and L3 + * + * the lock v4v_ring_info *ringinfo; ringinfo->lock: L3: + * protects len,tx_ptr the guest ring, the + * guest ring_data and the pending list. To take L3 you must + * already have R(L2). W(L2) implies L3 + */ + + +/* + * Debugs + */ + +#ifdef V4V_DEBUG +static void +v4v_hexdump (void *_p, int len) +{ + uint8_t *buf = (uint8_t *) _p; + int i, j; + + for (i = 0; i < len; i += 16) + { + printk (KERN_ERR "%p:", &buf[i]); + for (j = 0; j < 16; ++j) + { + int k = i + j; + if (k < len) + printk (" %02x", buf[k]); + else + printk (" "); + } + printk (" "); + + for (j = 0; j < 16; ++j) + { + int k = i + j; + if (k < len) + printk ("%c", ((buf[k] > 32) && (buf[k] < 127)) ? buf[k] : '.'); + else + printk (" "); + } + printk ("\n"); + } +} +#endif + + +/* + * Event channel + */ + +static void +v4v_signal_domain (struct domain *d) +{ + v4v_dprintk("send guest VIRQ_V4V domid:%d\n", d->domain_id); + send_guest_vcpu_virq (d->vcpu[0], VIRQ_V4V); +} + +static void +v4v_signal_domid (domid_t id) +{ + struct domain *d = get_domain_by_id (id); + if (!d) + return; + v4v_signal_domain (d); + put_domain (d); +} + + +/* + * ring buffer + */ + +/* called must have L3 */ +static void +v4v_ring_unmap (struct v4v_ring_info *ring_info) +{ + int i; + for (i = 0; i < ring_info->npage; ++i) + { + if (!ring_info->mfn_mapping[i]) + continue; + v4v_dprintk(""); + v4v_dprintk("unmapping page %p from %p\n", + (void*) mfn_x (ring_info->mfns[i]), + ring_info->mfn_mapping[i]); + + unmap_domain_page (ring_info->mfn_mapping[i]); + ring_info->mfn_mapping[i] = NULL; + } +} + +/* called must have L3 */ +static uint8_t * +v4v_ring_map_page (struct v4v_ring_info *ring_info, int i) +{ + if (i >= ring_info->npage) + return NULL; + if (ring_info->mfn_mapping[i]) + return ring_info->mfn_mapping[i]; + ring_info->mfn_mapping[i] = map_domain_page (mfn_x (ring_info->mfns[i])); + + v4v_dprintk("mapping page %p to %p\n", + (void *) mfn_x (ring_info->mfns[i]), + ring_info->mfn_mapping[i]); + return ring_info->mfn_mapping[i]; +} + +/* called must have L3 */ +static int +v4v_memcpy_from_guest_ring (void *_dst, struct v4v_ring_info *ring_info, + uint32_t offset, uint32_t len) +{ + int page = offset >> PAGE_SHIFT; + uint8_t *src; + uint8_t *dst = _dst; + + offset &= PAGE_SIZE - 1; + + while ((offset + len) > PAGE_SIZE) + { + src = v4v_ring_map_page (ring_info, page); + + if (!src) + { + return -EFAULT; + } + + v4v_dprintk("memcpy(%p,%p+%d,%d)\n", + dst, src, offset, + (int) (PAGE_SIZE - offset)); + memcpy (dst, src + offset, PAGE_SIZE - offset); + + page++; + len -= PAGE_SIZE - offset; + dst += PAGE_SIZE - offset; + offset = 0; + } + + src = v4v_ring_map_page (ring_info, page); + if (!src) + { + return -EFAULT; + } + + v4v_dprintk("memcpy(%p,%p+%d,%d)\n", dst, src, offset, len); + memcpy (dst, src + offset, len); + + return 0; +} + + +/* called must have L3 */ +static int +v4v_update_tx_ptr (struct v4v_ring_info *ring_info, uint32_t tx_ptr) +{ + uint8_t *dst = v4v_ring_map_page (ring_info, 0); + volatile uint32_t *p = (uint32_t *)(dst + offsetof (v4v_ring_t, tx_ptr)); + + if (!dst) + return -EFAULT; + *p = tx_ptr; + return 0; +} + +/* called must have L3 */ +static int +v4v_memcpy_to_guest_ring (struct v4v_ring_info *ring_info, uint32_t offset, + void *_src, uint32_t len) +{ + int page = offset >> PAGE_SHIFT; + uint8_t *dst; + uint8_t *src = _src; + + offset &= PAGE_SIZE - 1; + + while ((offset + len) > PAGE_SIZE) + { + dst = v4v_ring_map_page (ring_info, page); + + if (!dst) + { + v4v_dprintk("!dst\n"); + return -EFAULT; + } + +#ifdef V4V_DEBUG + v4v_dprintk("memcpy(%p+%d,%p,%d)\n", + dst, offset, src, + (int) (PAGE_SIZE - offset)); + v4v_hexdump (src, PAGE_SIZE - offset); + v4v_hexdump (dst + offset, PAGE_SIZE - offset); +#endif + memcpy (dst + offset, src, PAGE_SIZE - offset); + + page++; + len -= (PAGE_SIZE - offset); + src += (PAGE_SIZE - offset); + offset = 0; + } + + dst = v4v_ring_map_page (ring_info, page); + + if (!dst) + { + v4v_dprintk("attempted to map page %d of %d\n", page, ring_info->npage); + return -EFAULT; + } + +#ifdef V4V_DEBUG + v4v_dprintk("memcpy(%p+%d,%p,%d)\n", + dst, offset, src, len); + v4v_hexdump (src, len); + v4v_hexdump (dst + offset, len); +#endif + memcpy (dst + offset, src, len); + + return 0; +} + +/*called must have L3*/ +static int +v4v_memcpy_to_guest_ring_from_guest(struct v4v_ring_info *ring_info, + uint32_t offset, + XEN_GUEST_HANDLE (uint8_t) src_hnd, + uint32_t len) +{ + int page = offset >> PAGE_SHIFT; + uint8_t *dst; + + offset &= PAGE_SIZE - 1; + + while ( (offset + len) > PAGE_SIZE ) + { + dst = v4v_ring_map_page (ring_info, page); + + if ( !dst ) + { + v4v_dprintk("!dst\n"); + return -EFAULT; + } + + v4v_dprintk("copy_from_guest(%p+%d,%p,%d)\n", + dst, offset, (void *) src_hnd.p, + (int) (PAGE_SIZE - offset)); + if ( copy_from_guest ((dst + offset), src_hnd, PAGE_SIZE - offset) ) + { + v4v_dprintk("copy_from_guest failed\n"); + return -EFAULT; + } + + page++; + len -= PAGE_SIZE - offset; + guest_handle_add_offset (src_hnd, PAGE_SIZE - offset); + offset = 0; + } + + dst = v4v_ring_map_page (ring_info, page); + if (!dst) + { + v4v_dprintk("v4v_ring_map failed\n"); + return -EFAULT; + } + + v4v_dprintk("copy_from_guest(%p+%d,%p,%d)\n", + dst, offset, (void *) src_hnd.p, len); + if ( copy_from_guest ((dst + offset), src_hnd, len) ) + { + v4v_dprintk("copy_from_guest failed\n"); + return -EFAULT; + } + + return 0; +} + +static int +v4v_ringbuf_get_rx_ptr (struct domain *d, struct v4v_ring_info *ring_info, + uint32_t * rx_ptr) +{ + v4v_ring_t *ringp; + + if ( ring_info->npage == 0 ) + return -1; + + ringp = map_domain_page (mfn_x (ring_info->mfns[0])); + + v4v_dprintk("v4v_ringbuf_payload_space: mapped %p to %p\n", + (void *) mfn_x (ring_info->mfns[0]), ringp); + if ( !ringp ) + return -1; + + *rx_ptr = *(volatile uint32_t *) &ringp->rx_ptr; + + unmap_domain_page (mfn_x (ring_info->mfns[0])); + return 0; +} + +uint32_t +v4v_ringbuf_payload_space (struct domain * d, struct v4v_ring_info * ring_info) +{ + v4v_ring_t ring; + int32_t ret; + + ring.tx_ptr = ring_info->tx_ptr; + ring.len = ring_info->len; + + if ( v4v_ringbuf_get_rx_ptr (d, ring_info, &ring.rx_ptr) ) + return 0; + + v4v_dprintk("v4v_ringbuf_payload_space:tx_ptr=%d rx_ptr=%d\n", + (int) ring.tx_ptr, (int) ring.rx_ptr); + if ( ring.rx_ptr == ring.tx_ptr ) + return ring.len - sizeof (struct v4v_ring_message_header); + + ret = ring.rx_ptr - ring.tx_ptr; + if ( ret < 0 ) + ret += ring.len; + + ret -= sizeof (struct v4v_ring_message_header); + ret -= V4V_ROUNDUP (1); + + return (ret < 0) ? 0 : ret; +} + +/*caller must have L3*/ +static size_t +v4v_ringbuf_insert (struct domain *d, + struct v4v_ring_info *ring_info, + struct v4v_ring_id *src_id, uint32_t proto, + XEN_GUEST_HANDLE (void) buf_hnd_void, uint32_t len) +{ + XEN_GUEST_HANDLE (uint8_t) buf_hnd = + guest_handle_cast (buf_hnd_void, uint8_t); + v4v_ring_t ring; + struct v4v_ring_message_header mh = { 0 }; + int32_t sp; + int32_t happy_ret = len; + int32_t ret = 0; + + if ( (V4V_ROUNDUP (len) + sizeof (struct v4v_ring_message_header)) >= + ring_info->len ) + { + v4v_dprintk("EMSGSIZE\n"); + return -EMSGSIZE; + } + + do + { + if ( (ret = v4v_memcpy_from_guest_ring (&ring, ring_info, + 0, sizeof (ring))) ) + break; + + ring.tx_ptr = ring_info->tx_ptr; + ring.len = ring_info->len; + + v4v_dprintk("ring.tx_ptr=%d ring.rx_ptr=%d ring.len=%d ring_info->tx_ptr=%d\n", + ring.tx_ptr, ring.rx_ptr, ring.len, ring_info->tx_ptr); + + if ( ring.rx_ptr == ring.tx_ptr ) + sp = ring_info->len; + else + { + sp = ring.rx_ptr - ring.tx_ptr; + if (sp < 0) + sp += ring.len; + } + + if ( (V4V_ROUNDUP (len) + sizeof (struct v4v_ring_message_header)) >= sp ) + { + v4v_dprintk("EAGAIN\n"); + ret = -EAGAIN; + break; + } + + mh.len = len + sizeof (struct v4v_ring_message_header); + mh.source = src_id->addr; + mh.pad = 0; + mh.protocol = proto; + + if ( (ret = v4v_memcpy_to_guest_ring (ring_info, + ring.tx_ptr + sizeof (v4v_ring_t), + &mh, sizeof (mh))) ) + break; + + ring.tx_ptr += sizeof (mh); + if ( ring.tx_ptr == ring_info->len ) + ring.tx_ptr = 0; + + sp = ring.len - ring.tx_ptr; + + if ( len > sp ) + { + if ((ret = v4v_memcpy_to_guest_ring_from_guest (ring_info, + ring.tx_ptr + sizeof (v4v_ring_t), + buf_hnd, sp))) + break; + + ring.tx_ptr = 0; + len -= sp; + guest_handle_add_offset (buf_hnd, sp); + } + + if ( (ret = v4v_memcpy_to_guest_ring_from_guest (ring_info, + ring.tx_ptr + sizeof (v4v_ring_t), + buf_hnd, len)) ) + break; + + ring.tx_ptr += V4V_ROUNDUP (len); + + if ( ring.tx_ptr == ring_info->len ) + ring.tx_ptr = 0; + + mb (); + ring_info->tx_ptr = ring.tx_ptr; + + if ( (ret = v4v_update_tx_ptr(ring_info, ring.tx_ptr)) ) + break; + + } + while ( 0 ); + + v4v_ring_unmap (ring_info); + + return ret ? ret : happy_ret; + +} + +static ssize_t +v4v_iov_count (XEN_GUEST_HANDLE (v4v_iov_t) iovs, int niov) +{ + v4v_iov_t iov; + size_t ret = 0; + + while ( niov-- ) + { + if ( copy_from_guest (&iov, iovs, 1) ) + return -EFAULT; + + ret += iov.iov_len; + guest_handle_add_offset (iovs, 1); + } + + return ret; +} + +/*caller must have L3*/ +static ssize_t +v4v_ringbuf_insertv (struct domain *d, + struct v4v_ring_info *ring_info, + struct v4v_ring_id *src_id, uint32_t proto, + XEN_GUEST_HANDLE (v4v_iov_t) iovs, uint32_t niov, + uint32_t len) +{ + v4v_ring_t ring; + struct v4v_ring_message_header mh = { 0 }; + int32_t sp; + int32_t happy_ret; + int32_t ret = 0; + + happy_ret = len; + + if ( (V4V_ROUNDUP (len) + sizeof (struct v4v_ring_message_header) ) >= + ring_info->len) + return -EMSGSIZE; + + do + { + if ( (ret = v4v_memcpy_from_guest_ring (&ring, ring_info, 0, + sizeof (ring))) ) + break; + + ring.tx_ptr = ring_info->tx_ptr; + ring.len = ring_info->len; + + v4v_dprintk("ring.tx_ptr=%d ring.rx_ptr=%d ring.len=%d ring_info->tx_ptr=%d\n", + ring.tx_ptr, ring.rx_ptr, ring.len, ring_info->tx_ptr); + + if ( ring.rx_ptr == ring.tx_ptr ) + sp = ring_info->len; + else + { + sp = ring.rx_ptr - ring.tx_ptr; + if (sp < 0) + sp += ring.len; + } + + if ( (V4V_ROUNDUP (len) + sizeof (struct v4v_ring_message_header) ) >= sp) + { + v4v_dprintk("EAGAIN\n"); + ret = -EAGAIN; + break; + } + + mh.len = len + sizeof (struct v4v_ring_message_header); + mh.source = src_id->addr; + mh.pad = 0; + mh.protocol = proto; + + if ( (ret = v4v_memcpy_to_guest_ring (ring_info, + ring.tx_ptr + sizeof (v4v_ring_t), + &mh, sizeof (mh))) ) + break; + + ring.tx_ptr += sizeof (mh); + if ( ring.tx_ptr == ring_info->len ) + ring.tx_ptr = 0; + + while ( niov-- ) + { + XEN_GUEST_HANDLE (uint8_t) buf_hnd; + v4v_iov_t iov; + + if ( copy_from_guest (&iov, iovs, 1) ) + { + ret = -EFAULT; + break; + } + + buf_hnd.p = (uint8_t *) iov.iov_base; //FIXME + len = iov.iov_len; + + if ( unlikely (!guest_handle_okay (buf_hnd, len)) ) + { + ret = -EFAULT; + break; + } + + sp = ring.len - ring.tx_ptr; + + if ( len > sp ) + { + if ( (ret = v4v_memcpy_to_guest_ring_from_guest (ring_info, + ring.tx_ptr + + sizeof (v4v_ring_t), + buf_hnd, sp)) ) + break; + + ring.tx_ptr = 0; + len -= sp; + guest_handle_add_offset (buf_hnd, sp); + } + + if ( (ret = v4v_memcpy_to_guest_ring_from_guest (ring_info, + ring.tx_ptr + + sizeof (v4v_ring_t), + buf_hnd, len)) ) + break; + + ring.tx_ptr += len; + + if (ring.tx_ptr == ring_info->len) + ring.tx_ptr = 0; + + guest_handle_add_offset (iovs, 1); + } + if ( ret ) + break; + + ring.tx_ptr = V4V_ROUNDUP (ring.tx_ptr); + + if ( ring.tx_ptr >= ring_info->len ) + ring.tx_ptr -= ring_info->len; + + mb (); + ring_info->tx_ptr = ring.tx_ptr; + if ( (ret = v4v_update_tx_ptr(ring_info, ring.tx_ptr)) ) + break; + } + while ( 0 ); + + v4v_ring_unmap (ring_info); + + return ret ? ret : happy_ret; +} + + + +/* pending */ +static void +v4v_pending_remove_ent (struct v4v_pending_ent *ent) +{ + hlist_del (&ent->node); + xfree (ent); +} + +/*caller must have L3 */ +static void +v4v_pending_remove_all (struct v4v_ring_info *info) +{ + struct hlist_node *node, *next; + struct v4v_pending_ent *pending_ent; + + hlist_for_each_entry_safe (pending_ent, node, next, &info->pending, + node) v4v_pending_remove_ent (pending_ent); +} + +/*Caller must hold L1 */ +static void +v4v_pending_notify (struct domain *caller_d, struct hlist_head *to_notify) +{ + struct hlist_node *node, *next; + struct v4v_pending_ent *pending_ent; + + hlist_for_each_entry_safe (pending_ent, node, next, to_notify, node) + { + hlist_del (&pending_ent->node); + v4v_signal_domid (pending_ent->id); + xfree (pending_ent); + } + +} + +/*caller must have R(L2) */ +static void +v4v_pending_find (struct v4v_ring_info *ring_info, uint32_t payload_space, + struct hlist_head *to_notify) +{ + struct hlist_node *node, *next; + struct v4v_pending_ent *ent; + + spin_lock (&ring_info->lock); + hlist_for_each_entry_safe (ent, node, next, &ring_info->pending, node) + { + if (payload_space >= ent->len) + { + hlist_del (&ent->node); + hlist_add_head (&ent->node, to_notify); + } + } + spin_unlock (&ring_info->lock); +} + +/*caller must have L3 */ +static int +v4v_pending_queue (struct v4v_ring_info *ring_info, domid_t src_id, int len) +{ + struct v4v_pending_ent *ent = xmalloc (struct v4v_pending_ent); + + if ( !ent ) + { + v4v_dprintk("ENOMEM\n"); + return -ENOMEM; + } + + ent->len = len; + ent->id = src_id; + + hlist_add_head (&ent->node, &ring_info->pending); + + return 0; +} + +/* L3 */ +static int +v4v_pending_requeue (struct v4v_ring_info *ring_info, domid_t src_id, int len) +{ + struct hlist_node *node; + struct v4v_pending_ent *ent; + + hlist_for_each_entry (ent, node, &ring_info->pending, node) + { + if ( ent->id == src_id ) + { + if ( ent->len < len ) + ent->len = len; + return 0; + } + } + + return v4v_pending_queue (ring_info, src_id, len); +} + + +/* L3 */ +static void +v4v_pending_cancel (struct v4v_ring_info *ring_info, domid_t src_id) +{ + struct hlist_node *node, *next; + struct v4v_pending_ent *ent; + + hlist_for_each_entry_safe (ent, node, next, &ring_info->pending, node) + { + if ( ent->id == src_id) + { + hlist_del (&ent->node); + xfree (ent); + } + } +} + +/* + * ring data + */ + +/*Caller should hold R(L1)*/ +static int +v4v_fill_ring_data (struct domain *src_d, + XEN_GUEST_HANDLE (v4v_ring_data_ent_t) data_ent_hnd) +{ + v4v_ring_data_ent_t ent; + struct domain *dst_d; + struct v4v_ring_info *ring_info; + + if ( copy_from_guest (&ent, data_ent_hnd, 1) ) + { + v4v_dprintk("EFAULT\n"); + return -EFAULT; + } + + v4v_dprintk("v4v_fill_ring_data: ent.ring.domain=%d,ent.ring.port=%u\n", + (int) ent.ring.domain, (int) ent.ring.port); + + ent.flags = 0; + + dst_d = get_domain_by_id (ent.ring.domain); + + if ( dst_d && dst_d->v4v ) + { + read_lock (&dst_d->v4v->lock); + ring_info = v4v_ring_find_info_by_addr (dst_d, &ent.ring, + src_d->domain_id); + + if ( ring_info ) + { + uint32_t space_avail; + + ent.flags |= V4V_RING_DATA_F_EXISTS; + ent.max_message_size = + ring_info->len - sizeof (struct v4v_ring_message_header) - + V4V_ROUNDUP (1); + spin_lock (&ring_info->lock); + + space_avail = v4v_ringbuf_payload_space (dst_d, ring_info); + + if ( space_avail >= ent.space_required ) + { + v4v_pending_cancel (ring_info, src_d->domain_id); + ent.flags |= V4V_RING_DATA_F_SUFFICIENT; + } + else + { + v4v_pending_requeue (ring_info, src_d->domain_id, + ent.space_required); + ent.flags |= V4V_RING_DATA_F_PENDING; + } + + spin_unlock (&ring_info->lock); + + if ( space_avail == ent.max_message_size ) + ent.flags |= V4V_RING_DATA_F_EMPTY; + + } + read_unlock (&dst_d->v4v->lock); + } + + if ( dst_d ) + put_domain (dst_d); + + if ( copy_field_to_guest (data_ent_hnd, &ent, flags) ) + { + v4v_dprintk("EFAULT\n"); + return -EFAULT; + } + return 0; +} + +/*Called should hold no more than R(L1) */ +static int +v4v_fill_ring_datas (struct domain *d, int nent, + XEN_GUEST_HANDLE (v4v_ring_data_ent_t) data_ent_hnd) +{ + int ret = 0; + + read_lock (&v4v_lock); + while ( !ret && nent-- ) + { + ret = v4v_fill_ring_data (d, data_ent_hnd); + guest_handle_add_offset (data_ent_hnd, 1); + } + read_unlock (&v4v_lock); + return ret; +} + +/* + * ring + */ +static int +v4v_find_ring_mfns (struct domain *d, struct v4v_ring_info *ring_info, + XEN_GUEST_HANDLE (v4v_pfn_list_t) pfn_list_hnd) +{ + XEN_GUEST_HANDLE (v4v_pfn_t) pfn_hnd; + v4v_pfn_list_t pfn_list; + int i,j; + mfn_t *mfns; + uint8_t **mfn_mapping; + unsigned long mfn; + struct page_info *page; + int ret = 0; + + if ( copy_from_guest (&pfn_list, pfn_list_hnd, 1) ) + { + v4v_dprintk("EFAULT\n"); + return -EFAULT; + } + + if (pfn_list.magic != V4V_PFN_LIST_MAGIC) + { + v4v_dprintk("EINVAL\n"); + return -EINVAL; + } + + if ((pfn_list.npage << PAGE_SHIFT) < ring_info->len) + { + v4v_dprintk("EINVAL\n"); + return -EINVAL; + } + + { + XEN_GUEST_HANDLE (uint8_t) slop_hnd = + guest_handle_cast (pfn_list_hnd, uint8_t); + guest_handle_add_offset (slop_hnd, sizeof (v4v_pfn_list_t)); + pfn_hnd = guest_handle_cast (slop_hnd, v4v_pfn_t); + } + + mfns = xmalloc_array (mfn_t, pfn_list.npage); + if ( !mfns ) + { + v4v_dprintk("ENOMEM\n"); + return -ENOMEM; + } + + mfn_mapping = xmalloc_array (uint8_t *, pfn_list.npage); + if ( !mfn_mapping ) + { + xfree (mfns); + return -ENOMEM; + } + + for (i = 0; i < pfn_list.npage; ++i) + { + unsigned long pfn; + p2m_type_t p2mt; + + if ( copy_from_guest_offset (&pfn, pfn_hnd, i, 1) ) + { + ret = -EFAULT; + v4v_dprintk("EFAULT\n"); + break; + } + + mfn = mfn_x(get_gfn(d, pfn, &p2mt)); + if ( !mfn_valid(mfn) ) + { + printk(KERN_ERR "v4v domain %d passed invalid mfn %"PRI_mfn" ring %p seq %d\n", + d->domain_id, mfn, ring_info, i); + ret = -EINVAL; + break; + } + page = mfn_to_page(mfn); + if ( !get_page_and_type(page, d, PGT_writable_page) ) + { + printk(KERN_ERR "v4v domain %d passed wrong type mfn %"PRI_mfn" ring %p seq %d\n", + d->domain_id, mfn, ring_info, i); + ret = -EINVAL; + break; + } + mfns[i] = _mfn(mfn); + v4v_dprintk("v4v_find_ring_mfns: %d: %lx -> %lx\n", + i, (unsigned long) pfn, (unsigned long) mfn_x (mfns[i])); + mfn_mapping[i] = NULL; + put_gfn(d, pfn); + } + + if ( !ret ) + { + ring_info->npage = pfn_list.npage; + ring_info->mfns = mfns; + ring_info->mfn_mapping = mfn_mapping; + } + else + { + j = i; + for ( i = 0; i < j; ++i ) + if ( mfn_x(mfns[i]) != 0 ) + put_page_and_type(mfn_to_page(mfn_x(mfns[i]))); + xfree (mfn_mapping); + xfree (mfns); + v4v_dprintk(""); + } + return ret; +} + + +/* caller must hold R(L2) */ +static struct v4v_ring_info * +v4v_ring_find_info (struct domain *d, struct v4v_ring_id *id) +{ + uint16_t hash; + struct hlist_node *node; + struct v4v_ring_info *ring_info; + + hash = v4v_hash_fn (id); + + v4v_dprintk("ring_find_info: d->v4v=%p, d->v4v->ring_hash[%d]=%p id=%p\n", + d->v4v, (int) hash, d->v4v->ring_hash[hash].first, id); + v4v_dprintk("ring_find_info: id.addr.port=%d id.addr.domain=%d id.addr.partner=%d\n", + id->addr.port, id->addr.domain, id->partner); + + hlist_for_each_entry (ring_info, node, &d->v4v->ring_hash[hash], node) + { + if ( !memcmp (id, &ring_info->id, sizeof (*id)) ) + { + v4v_dprintk("ring_find_info: ring_info=%p\n", ring_info); + return ring_info; + } + } + v4v_dprintk("ring_find_info: no ring_info found\n"); + return NULL; +} + +/* caller must hold R(L2) */ +static struct v4v_ring_info * +v4v_ring_find_info_by_addr (struct domain *d, struct v4v_addr *a, domid_t p) +{ + struct v4v_ring_id id; + struct v4v_ring_info *ret; + + if ( !a ) + return NULL; + + id.addr.port = a->port; + id.addr.domain = d->domain_id; + id.partner = p; + + ret = v4v_ring_find_info (d, &id); + if ( ret ) + return ret; + + id.partner = V4V_DOMID_NONE; + + return v4v_ring_find_info (d, &id); +} + +/*caller must hold W(L2) */ +static void v4v_ring_remove_mfns (struct v4v_ring_info *ring_info) +{ + int i; + + if ( ring_info->mfns ) + { + for ( i=0; i < ring_info->npage; ++i ) + if (mfn_x(ring_info->mfns[i]) != 0) + put_page_and_type(mfn_to_page(mfn_x(ring_info->mfns[i]))); + xfree (ring_info->mfns); + } + ring_info->mfns = NULL; +} + +/*caller must hold W(L2) */ +static void +v4v_ring_remove_info (struct v4v_ring_info *ring_info) +{ + v4v_pending_remove_all (ring_info); + + hlist_del (&ring_info->node); + v4v_ring_remove_mfns(ring_info); + xfree (ring_info); +} + +/* Call from guest to unpublish a ring */ +static long +v4v_ring_remove (struct domain *d, XEN_GUEST_HANDLE (v4v_ring_t) ring_hnd) +{ + struct v4v_ring ring; + struct v4v_ring_info *ring_info; + int ret = 0; + + read_lock (&v4v_lock); + + do + { + if ( !d->v4v ) + { + v4v_dprintk("EINVAL\n"); + ret = -EINVAL; + break; + } + + if ( copy_from_guest (&ring, ring_hnd, 1) ) + { + v4v_dprintk("EFAULT\n"); + ret = -EFAULT; + break; + } + + if ( ring.magic != V4V_RING_MAGIC ) + { + v4v_dprintk("ring.magic(%lx) != V4V_RING_MAGIC(%lx), EINVAL\n", + ring.magic, V4V_RING_MAGIC); + ret = -EINVAL; + break; + } + + ring.id.addr.domain = d->domain_id; + + write_lock (&d->v4v->lock); + ring_info = v4v_ring_find_info (d, &ring.id); + + if ( ring_info ) + v4v_ring_remove_info (ring_info); + + write_unlock (&d->v4v->lock); + + if ( !ring_info ) + { + v4v_dprintk( "ENOENT\n" ); + ret = -ENOENT; + break; + } + + } + while ( 0 ); + + read_unlock (&v4v_lock); + return ret; +} + +/* call from guest to publish a ring */ +static long +v4v_ring_add (struct domain *d, XEN_GUEST_HANDLE (v4v_ring_t) ring_hnd, + XEN_GUEST_HANDLE (v4v_pfn_list_t) pfn_list_hnd) +{ + struct v4v_ring ring; + struct v4v_ring_info *ring_info; + int need_to_insert = 0; + int ret = 0; + + if ( (long) ring_hnd.p & (PAGE_SIZE - 1) ) + { + v4v_dprintk("EINVAL\n"); + return -EINVAL; + } + + read_lock (&v4v_lock); + do + { + if ( !d->v4v ) + { + v4v_dprintk(" !d->v4v, EINVAL\n"); + ret = -EINVAL; + break; + } + + if ( copy_from_guest (&ring, ring_hnd, 1) ) + { + v4v_dprintk(" copy_from_guest failed, EFAULT\n"); + ret = -EFAULT; + break; + } + + if ( ring.magic != V4V_RING_MAGIC ) + { + v4v_dprintk("ring.magic(%lx) != V4V_RING_MAGIC(%lx), EINVAL\n", + ring.magic, V4V_RING_MAGIC); + ret = -EINVAL; + break; + } + + if ( (ring.len < + (sizeof (struct v4v_ring_message_header) + V4V_ROUNDUP (1) + + V4V_ROUNDUP (1))) || (V4V_ROUNDUP (ring.len) != ring.len) ) + { + v4v_dprintk("EINVAL\n"); + ret = -EINVAL; + break; + } + + ring.id.addr.domain = d->domain_id; + if ( copy_field_to_guest (ring_hnd, &ring, id) ) + { + v4v_dprintk("EFAULT\n"); + ret = -EFAULT; + break; + } + + /* + * no need for a lock yet, because only we know about this + * set the tx pointer if it looks bogus (we don't reset it + * because this might be a re-register after S4) + */ + if ( (ring.tx_ptr >= ring.len) + || (V4V_ROUNDUP (ring.tx_ptr) != ring.tx_ptr) ) + { + ring.tx_ptr = ring.rx_ptr; + } + copy_field_to_guest (ring_hnd, &ring, tx_ptr); + + read_lock (&d->v4v->lock); + ring_info = v4v_ring_find_info (d, &ring.id); + + if ( !ring_info ) + { + read_unlock (&d->v4v->lock); + ring_info = xmalloc (struct v4v_ring_info); + if ( !ring_info ) + { + v4v_dprintk("ENOMEM\n"); + ret = -ENOMEM; + break; + } + need_to_insert++; + spin_lock_init (&ring_info->lock); + INIT_HLIST_HEAD (&ring_info->pending); + ring_info->mfns = NULL; + + } + else + { + /* + * Ring info already existed. If mfn list was already + * populated remove the MFN's from list and then add + * the new list. + */ + printk(KERN_INFO "v4v: dom%d re-registering existing ring, clearing MFN list\n", + current->domain->domain_id); + v4v_ring_remove_mfns(ring_info); + } + + spin_lock (&ring_info->lock); + ring_info->id = ring.id; + ring_info->len = ring.len; + ring_info->tx_ptr = ring.tx_ptr; + ring_info->ring = ring_hnd; + if ( ring_info->mfns ) + xfree (ring_info->mfns); + ret = v4v_find_ring_mfns (d, ring_info, pfn_list_hnd); + spin_unlock (&ring_info->lock); + if ( ret ) + break; + + if ( !need_to_insert ) + { + read_unlock (&d->v4v->lock); + } + else + { + uint16_t hash = v4v_hash_fn (&ring.id); + write_lock (&d->v4v->lock); + hlist_add_head (&ring_info->node, &d->v4v->ring_hash[hash]); + write_unlock (&d->v4v->lock); + } + } + while ( 0 ); + + read_unlock (&v4v_lock); + return ret; +} + + +/* + * io + */ + +/*Caller must hold v4v_lock and hash_lock*/ +static void +v4v_notify_ring (struct domain *d, struct v4v_ring_info *ring_info, + struct hlist_head *to_notify) +{ + uint32_t space; + + spin_lock (&ring_info->lock); + space = v4v_ringbuf_payload_space (d, ring_info); + spin_unlock (&ring_info->lock); + + v4v_pending_find (ring_info, space, to_notify); +} + +/*notify hypercall*/ +static long +v4v_notify (struct domain *d, + XEN_GUEST_HANDLE (v4v_ring_data_t) ring_data_hnd) +{ + v4v_ring_data_t ring_data; + HLIST_HEAD (to_notify); + int i; + int ret = 0; + + read_lock (&v4v_lock); + + if ( !d->v4v ) + { + read_unlock (&v4v_lock); + v4v_dprintk("!d->v4v, ENODEV\n"); + return -ENODEV; + } + + read_lock (&d->v4v->lock); + for ( i = 0; i < V4V_HTABLE_SIZE; ++i ) + { + struct hlist_node *node, *next; + struct v4v_ring_info *ring_info; + + hlist_for_each_entry_safe (ring_info, node, + next, &d->v4v->ring_hash[i], + node) + { + v4v_notify_ring (d, ring_info, &to_notify); + } + } + read_unlock (&d->v4v->lock); + + if ( !hlist_empty (&to_notify) ) + { + v4v_pending_notify (d, &to_notify); + } + + do + { + if ( !guest_handle_is_null (ring_data_hnd) ) + { + /* Quick sanity check on ring_data_hnd */ + if ( copy_field_from_guest (&ring_data, ring_data_hnd, magic) ) + { + v4v_dprintk("copy_field_from_guest failed\n"); + ret = -EFAULT; + break; + } + + if ( ring_data.magic != V4V_RING_DATA_MAGIC ) + { + v4v_dprintk("ring.magic(%lx) != V4V_RING_MAGIC(%lx), EINVAL\n", + ring_data.magic, V4V_RING_MAGIC); + ret = -EINVAL; + break; + } + + if (copy_from_guest (&ring_data, ring_data_hnd, 1)) + { + v4v_dprintk("copy_from_guest failed\n"); + ret = -EFAULT; + break; + } + + { + XEN_GUEST_HANDLE (v4v_ring_data_ent_t) ring_data_ent_hnd; + XEN_GUEST_HANDLE (uint8_t) slop_hnd = + guest_handle_cast (ring_data_hnd, uint8_t); + guest_handle_add_offset (slop_hnd, sizeof (v4v_ring_data_t)); + ring_data_ent_hnd = + guest_handle_cast (slop_hnd, v4v_ring_data_ent_t); + ret = v4v_fill_ring_datas (d, ring_data.nent, ring_data_ent_hnd); + } + } + } + while ( 0 ); + + read_unlock (&v4v_lock); + + return ret; +} + + + +/*Hypercall to do the send*/ +static size_t +v4v_send (struct domain *src_d, v4v_addr_t * src_addr, + v4v_addr_t * dst_addr, uint32_t proto, + XEN_GUEST_HANDLE (void) buf, size_t len) +{ + struct domain *dst_d; + struct v4v_ring_id src_id; + struct v4v_ring_info *ring_info; + int ret = 0; + + if ( !dst_addr ) + { + v4v_dprintk("!dst_addr\n"); + return -EINVAL; + } + + read_lock (&v4v_lock); + if ( !src_d->v4v ) + { + read_unlock (&v4v_lock); + v4v_dprintk("!src_d->v4v\n"); + return -EINVAL; + } + + src_id.addr.port = src_addr->port; + src_id.addr.domain = src_d->domain_id; + src_id.partner = dst_addr->domain; + + dst_d = get_domain_by_id (dst_addr->domain); + if ( !dst_d ) + { + read_unlock (&v4v_lock); + v4v_dprintk("!dst_d, ECONNREFUSED\n"); + return -ECONNREFUSED; + } + + do + { + if ( !dst_d->v4v ) + { + ret = -ECONNREFUSED; + v4v_dprintk("!dst_d->v4v, ECONNREFUSED\n"); + break; + } + + read_lock (&dst_d->v4v->lock); + ring_info = + v4v_ring_find_info_by_addr (dst_d, dst_addr, src_addr->domain); + + if ( !ring_info ) + { + ret = -ECONNREFUSED; + v4v_dprintk("!ring_info\n"); + } + else + { + spin_lock (&ring_info->lock); + ret = + v4v_ringbuf_insert (dst_d, ring_info, &src_id, proto, buf, len); + if ( ret == -EAGAIN ) + { + v4v_dprintk("ret == EAGAIN\n"); + /* Schedule a wake up on the event channel when space is there */ + if (v4v_pending_requeue (ring_info, src_d->domain_id, len)) + { + v4v_dprintk("v4v_pending_requeue failed, ENOMEM\n"); + ret = -ENOMEM; + } + } + spin_unlock (&ring_info->lock); + + if (ret >= 0) + { + v4v_signal_domain (dst_d); + } + } + read_unlock (&dst_d->v4v->lock); + } + while ( 0 ); + + put_domain (dst_d); + read_unlock (&v4v_lock); + return ret; +} + +/*Hypercall to do the send*/ +static size_t +v4v_sendv (struct domain *src_d, v4v_addr_t * src_addr, + v4v_addr_t * dst_addr, uint32_t proto, + XEN_GUEST_HANDLE (v4v_iov_t) iovs, size_t niov) +{ + struct domain *dst_d; + struct v4v_ring_id src_id; + struct v4v_ring_info *ring_info; + int ret = 0; + + if ( !dst_addr ) + { + v4v_dprintk("!dst_addr, EINVAL\n"); + return -EINVAL; + } + + read_lock (&v4v_lock); + if (!src_d->v4v) + { + read_unlock (&v4v_lock); + v4v_dprintk("!src_d->v4v, EINVAL\n"); + return -EINVAL; + } + + src_id.addr.port = src_addr->port; + src_id.addr.domain = src_d->domain_id; + src_id.partner = dst_addr->domain; + + dst_d = get_domain_by_id (dst_addr->domain); + if (!dst_d) + { + read_unlock (&v4v_lock); + v4v_dprintk("!dst_d, ECONNREFUSED\n"); + return -ECONNREFUSED; + } + + do + { + if ( !dst_d->v4v ) + { + v4v_dprintk("dst_d->v4v, ECONNREFUSED\n"); + ret = -ECONNREFUSED; + break; + } + + read_lock (&dst_d->v4v->lock); + ring_info = + v4v_ring_find_info_by_addr (dst_d, dst_addr, src_addr->domain); + + if ( !ring_info ) + { + ret = -ECONNREFUSED; + v4v_dprintk(" !ring_info, ECONNREFUSED\n"); + } + else + { + uint32_t len = v4v_iov_count (iovs, niov); + + if ( len < 0 ) + { + ret = len; + break; + } + + spin_lock (&ring_info->lock); + ret = + v4v_ringbuf_insertv (dst_d, ring_info, &src_id, proto, iovs, + niov, len); + if ( ret == -EAGAIN ) + { + v4v_dprintk("v4v_ringbuf_insertv failed, EAGAIN\n"); + /* Schedule a wake up on the event channel when space is there */ + if (v4v_pending_requeue (ring_info, src_d->domain_id, len)) + { + v4v_dprintk("v4v_pending_requeue failed, ENOMEM\n"); + ret = -ENOMEM; + } + } + spin_unlock (&ring_info->lock); + + if ( ret >= 0 ) + { + v4v_signal_domain (dst_d); + } + + } + read_unlock (&dst_d->v4v->lock); + + } + while ( 0 ); + + put_domain (dst_d); + read_unlock (&v4v_lock); + return ret; +} + +/* + * hypercall glue + */ +long +do_v4v_op (int cmd, XEN_GUEST_HANDLE (void) arg1, + XEN_GUEST_HANDLE (void) arg2, + XEN_GUEST_HANDLE (void) arg3, uint32_t arg4, uint32_t arg5) +{ + struct domain *d = current->domain; + long rc = -EFAULT; + + v4v_dprintk("->do_v4v_op(%d,%p,%p,%p,%d,%d)\n", cmd, + (void *) arg1.p, (void *) arg2.p, (void *) arg3.p, + (int) arg4, (int) arg5); + + domain_lock (d); + switch (cmd) + { + case V4VOP_register_ring: + { + XEN_GUEST_HANDLE (v4v_ring_t) ring_hnd = + guest_handle_cast (arg1, v4v_ring_t); + XEN_GUEST_HANDLE (v4v_pfn_list_t) pfn_list_hnd = + guest_handle_cast (arg2, v4v_pfn_list_t); + if ( unlikely (!guest_handle_okay (ring_hnd, 1)) ) + goto out; + if ( unlikely (!guest_handle_okay (pfn_list_hnd, 1)) ) //FIXME + goto out; + rc = v4v_ring_add (d, ring_hnd, pfn_list_hnd); + break; + } + case V4VOP_unregister_ring: + { + XEN_GUEST_HANDLE (v4v_ring_t) ring_hnd = + guest_handle_cast (arg1, v4v_ring_t); + if ( unlikely (!guest_handle_okay (ring_hnd, 1)) ) + goto out; + rc = v4v_ring_remove (d, ring_hnd); + break; + } + case V4VOP_send: + { + v4v_addr_t src, dst; + uint32_t len = arg4; + uint32_t protocol = arg5; + XEN_GUEST_HANDLE (v4v_addr_t) src_hnd = + guest_handle_cast (arg1, v4v_addr_t); + XEN_GUEST_HANDLE (v4v_addr_t) dst_hnd = + guest_handle_cast (arg2, v4v_addr_t); + + if ( unlikely (!guest_handle_okay (src_hnd, 1)) ) + goto out; + if ( copy_from_guest (&src, src_hnd, 1) ) + goto out; + + if ( unlikely (!guest_handle_okay (dst_hnd, 1)) ) + goto out; + if ( copy_from_guest (&dst, dst_hnd, 1) ) + goto out; + + rc = v4v_send (d, &src, &dst, protocol, arg3, len); + break; + } + case V4VOP_sendv: + { + v4v_addr_t src, dst; + uint32_t niov = arg4; + uint32_t protocol = arg5; + XEN_GUEST_HANDLE (v4v_addr_t) src_hnd = + guest_handle_cast (arg1, v4v_addr_t); + XEN_GUEST_HANDLE (v4v_addr_t) dst_hnd = + guest_handle_cast (arg2, v4v_addr_t); + XEN_GUEST_HANDLE (v4v_iov_t) iovs = + guest_handle_cast (arg3, v4v_iov_t); + + if ( unlikely (!guest_handle_okay (src_hnd, 1)) ) + goto out; + if ( copy_from_guest (&src, src_hnd, 1) ) + goto out; + + if ( unlikely (!guest_handle_okay (dst_hnd, 1)) ) + goto out; + if ( copy_from_guest (&dst, dst_hnd, 1) ) + goto out; + + if ( unlikely (!guest_handle_okay (iovs, niov)) ) + goto out; + + rc = v4v_sendv (d, &src, &dst, protocol, iovs, niov); + break; + } + case V4VOP_notify: + { + XEN_GUEST_HANDLE (v4v_ring_data_t) ring_data_hnd = + guest_handle_cast (arg1, v4v_ring_data_t); + rc = v4v_notify (d, ring_data_hnd); + break; + } + default: + rc = -ENOSYS; + break; + } +out: + domain_unlock (d); + v4v_dprintk("<-do_v4v_op()=%d\n", (int) rc); + return rc; +} + +/* + * init + */ + +void +v4v_destroy (struct domain *d) +{ + int i; + + BUG_ON (!d->is_dying); + write_lock (&v4v_lock); + + v4v_dprintk("d->v=%p\n", d->v4v); + + if ( d->v4v ) + { + for ( i = 0; i < V4V_HTABLE_SIZE; ++i ) + { + struct hlist_node *node, *next; + struct v4v_ring_info *ring_info; + + hlist_for_each_entry_safe (ring_info, node, + next, &d->v4v->ring_hash[i], + node) + { + v4v_ring_remove_info (ring_info); + } + } + } + + d->v4v = NULL; + write_unlock (&v4v_lock); +} + +int +v4v_init (struct domain *d) +{ + struct v4v_domain *v4v; + int i; + + v4v = xmalloc (struct v4v_domain); + if ( !v4v ) + return -ENOMEM; + + rwlock_init (&v4v->lock); + + for ( i = 0; i < V4V_HTABLE_SIZE; ++i ) + { + INIT_HLIST_HEAD (&v4v->ring_hash[i]); + } + + write_lock (&v4v_lock); + d->v4v = v4v; + write_unlock (&v4v_lock); + + return 0; +} + + +/* + * debug + */ + +static void +dump_domain_ring (struct domain *d, struct v4v_ring_info *ring_info) +{ + uint32_t rx_ptr; + + printk (KERN_ERR " ring: domid=%d port=0x%08x partner=%d npage=%d\n", + (int) d->domain_id, (int) ring_info->id.addr.port, + (int) ring_info->id.partner, (int) ring_info->npage); + + if ( v4v_ringbuf_get_rx_ptr (d, ring_info, &rx_ptr) ) + { + printk (KERN_ERR " Failed to read rx_ptr\n"); + return; + } + + printk (KERN_ERR " tx_ptr=%d rx_ptr=%d len=%d\n", + (int) ring_info->tx_ptr, (int) rx_ptr, (int) ring_info->len); +} + +static void +dump_domain_rings (struct domain *d) +{ + int i; + + printk (KERN_ERR " domain %d:\n", (int) d->domain_id); + + read_lock (&d->v4v->lock); + + for ( i = 0; i < V4V_HTABLE_SIZE; ++i ) + { + struct hlist_node *node; + struct v4v_ring_info *ring_info; + + hlist_for_each_entry (ring_info, node, &d->v4v->ring_hash[i], node) + dump_domain_ring (d, ring_info); + } + read_unlock (&d->v4v->lock); + + printk (KERN_ERR "\n"); + v4v_signal_domain (d); +} + +static void +dump_rings (unsigned char key) +{ + struct domain *d; + + printk (KERN_ERR "\n\nV4V ring dump:\n"); + read_lock (&v4v_lock); + + rcu_read_lock (&domlist_read_lock); + + for_each_domain (d) dump_domain_rings (d); + + rcu_read_unlock (&domlist_read_lock); + + read_unlock (&v4v_lock); +} + +struct keyhandler v4v_info_keyhandler = { + .diagnostic = 1, + .u.fn = dump_rings, + .desc = "dump v4v ring states and intterupt" +}; + +static int __init +setup_dump_rings (void) +{ + register_keyhandler ('4', &v4v_info_keyhandler); + return 0; +} + +__initcall (setup_dump_rings); + + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/v4v.h b/xen/include/public/v4v.h new file mode 100644 index 0000000..8cb02a8 --- /dev/null +++ b/xen/include/public/v4v.h @@ -0,0 +1,544 @@ +/****************************************************************************** + * V4V + * + * Version 2 of v2v (Virtual-to-Virtual) + * + * Copyright (c) 2010, Citrix Systems + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __XEN_PUBLIC_V4V_H__ +#define __XEN_PUBLIC_V4V_H__ + +#include "xen.h" + +/* + * Compiler specific hacks + */ +#if !defined(__GNUC__) +# define V4V_PACKED +# define V4V_UNSUED +# define V4V_INLINE __inline +#else /* __GNUC__ */ +# define V4V_PACKED __attribute__ ((packed)) +# define V4V_UNUSED __attribute__ ((unused)) +# ifdef __XEN__ +# define V4V_INLINE +# define V4V_VOLATILE +# else +# define V4V_VOLATILE volatile +# ifndef __STRICT_ANSI__ +# define V4V_INLINE inline +# else +# define V4V_INLINE +# endif +# endif +#endif /* __GNUC__ */ + +#if !defined(__GNUC__) +# pragma pack(push, 1) +# pragma warning(push) +# pragma warning(disable: 4200) +#endif + +/* + * Structure definitions + */ + +#define V4V_PROTO_DGRAM 0x3c2c1db8 +#define V4V_PROTO_STREAM 0x70f6a8e5 + +#ifdef __i386__ +# define V4V_RING_MAGIC 0xdf6977f231abd910ULL +# define V4V_PFN_LIST_MAGIC 0x91dd6159045b302dULL +#else +# define V4V_RING_MAGIC 0xdf6977f231abd910 +# define V4V_PFN_LIST_MAGIC 0x91dd6159045b302d +#endif +#define V4V_DOMID_INVALID (0x7FFFU) +#define V4V_DOMID_NONE V4V_DOMID_INVALID +#define V4V_DOMID_ANY V4V_DOMID_INVALID +#define V4V_PORT_NONE 0 + +typedef struct v4v_iov +{ + uint64_t iov_base; + uint64_t iov_len; +} V4V_PACKED v4v_iov_t; +DEFINE_XEN_GUEST_HANDLE (v4v_iov_t); + +typedef struct v4v_addr +{ + uint32_t port; + domid_t domain; +} V4V_PACKED v4v_addr_t; + +DEFINE_XEN_GUEST_HANDLE (v4v_addr_t); + +typedef struct v4v_ring_id +{ + struct v4v_addr addr; + domid_t partner; +} V4V_PACKED v4v_ring_id_t; + + +typedef uint64_t v4v_pfn_t; +DEFINE_XEN_GUEST_HANDLE (v4v_pfn_t); + +typedef struct v4v_pfn_list_t +{ + uint64_t magic; + uint32_t npage; + uint32_t pad; + uint64_t reserved[3]; + v4v_pfn_t pages[0]; +} V4V_PACKED v4v_pfn_list_t; + +DEFINE_XEN_GUEST_HANDLE (v4v_pfn_list_t); + + +typedef struct v4v_ring +{ + /* v4v magic number */ + uint64_t magic; + /* + * id + * + * xen only looks at this during register/unregister + * and will fill in id.addr.domain + */ + struct v4v_ring_id id; + /* length of ring[], must be a multiple of 8 */ + uint32_t len; + /* rx pointer, modified by domain */ + V4V_VOLATILE uint32_t rx_ptr; + /* tx pointer, modified by xen */ + V4V_VOLATILE uint32_t tx_ptr; + /* padding */ + uint64_t reserved[4]; + /* ring */ + V4V_VOLATILE uint8_t ring[0]; +} V4V_PACKED v4v_ring_t; +DEFINE_XEN_GUEST_HANDLE (v4v_ring_t); + +#ifdef __i386__ +#define V4V_RING_DATA_MAGIC 0x4ce4d30fbc82e92aULL +#else +#define V4V_RING_DATA_MAGIC 0x4ce4d30fbc82e92a +#endif + +#define V4V_RING_DATA_F_EMPTY 1U << 0 /* Ring is empty */ +#define V4V_RING_DATA_F_EXISTS 1U << 1 /* Ring exists */ +#define V4V_RING_DATA_F_PENDING 1U << 2 /* Pending interrupt exists - do not + rely on this field - for + profiling only */ +#define V4V_RING_DATA_F_SUFFICIENT 1U << 3 /* Sufficient space to queue + space_required bytes exists */ + +typedef struct v4v_ring_data_ent +{ + struct v4v_addr ring; + uint16_t flags; + uint32_t space_required; + uint32_t max_message_size; +} V4V_PACKED v4v_ring_data_ent_t; +DEFINE_XEN_GUEST_HANDLE (v4v_ring_data_ent_t); + +typedef struct v4v_ring_data +{ + uint64_t magic; + uint32_t nent; + uint32_t pad; + uint64_t reserved[4]; + struct v4v_ring_data_ent data[0]; +} V4V_PACKED v4v_ring_data_t; +DEFINE_XEN_GUEST_HANDLE (v4v_ring_data_t); + + +#define V4V_ROUNDUP(a) (((a) +0xf ) & ~0xf) +/* Messages on the ring are padded to 128 bits + * Len here refers to the exact length of the data not including the + * 128 bit header. The message uses + * ((len +0xf) & ~0xf) + sizeof(v4v_ring_message_header) bytes + */ + +struct v4v_stream_header +{ + uint32_t flags; + uint32_t conid; +} V4V_PACKED; + +struct v4v_ring_message_header +{ + uint32_t len; + struct v4v_addr source; + uint16_t pad; + uint32_t protocol; + uint8_t data[0]; +} V4V_PACKED; + + +/* + * HYPERCALLS + */ + +#define V4VOP_register_ring 1 +/* + * Registers a ring with Xen, if a ring with the same v4v_ring_id exists, + * this ring takes its place, registration will not change tx_ptr + * unless it is invalid + * + * do_v4v_op(V4VOP_unregister_ring, + * XEN_GUEST_HANDLE(v4v_ring_t), + * XEN_GUEST_HANDLE(v4v_pfn_list_t), + * NULL, 0, 0) + */ + + +#define V4VOP_unregister_ring 2 +/* + * Unregister a ring. + * + * v4v_hypercall(V4VOP_send, XEN_GUEST_HANDLE(v4v_ring_t), NULL, NULL, 0, 0) + */ + +#define V4VOP_send 3 +/* + * Sends len bytes of buf to dst, giving src as the source address (xen will + * ignore src->domain and put your domain in the actually message), xen + * first looks for a ring with id.addr==dst and id.partner==sending_domain + * if that fails it looks for id.addr==dst and id.partner==DOMID_ANY. + * protocol is the 32 bit protocol number used from the message + * most likely V4V_PROTO_DGRAM or STREAM. If insufficient space exists + * it will return -EAGAIN and xen will twing the V4V_INTERRUPT when + * sufficient space becomes available + * + * v4v_hypercall(V4VOP_send, + * XEN_GUEST_HANDLE(v4v_addr_t) src, + * XEN_GUEST_HANDLE(v4v_addr_t) dst, + * XEN_GUEST_HANDLE(void) buf, + * uint32_t len, + * uint32_t protocol) + */ + + +#define V4VOP_notify 4 +/* Asks xen for information about other rings in the system + * + * v4v_ring_data_t contains an array of v4v_ring_data_ent_t + * + * ent->ring is the v4v_addr_t of the ring you want information on + * the same matching rules are used as for V4VOP_send. + * + * ent->space_required if this field is not null xen will check + * that there is space in the destination ring for this many bytes + * of payload. If there is it will set the V4V_RING_DATA_F_SUFFICIENT + * and CANCEL any pending interrupt for that ent->ring, if insufficient + * space is available it will schedule an interrupt and the flag will + * not be set. + * + * The flags are set by xen when notify replies + * V4V_RING_DATA_F_EMPTY ring is empty + * V4V_RING_DATA_F_PENDING interrupt is pending - don't rely on this + * V4V_RING_DATA_F_SUFFICIENT sufficient space for space_required is there + * V4V_RING_DATA_F_EXISTS ring exists + * + * v4v_hypercall(V4VOP_notify, + * XEN_GUEST_HANDLE(v4v_ring_data_t) buf, + * NULL, NULL, 0, 0) + */ + + +#define V4VOP_sendv 5 +/* + * Identical to V4VOP_send except rather than buf and len it takes + * an array of v4v_iov_t and a length of the array. + * + * v4v_hypercall(V4VOP_sendv, + * XEN_GUEST_HANDLE(v4v_addr_t) src, + * XEN_GUEST_HANDLE(v4v_addr_t) dst, + * XEN_GUEST_HANDLE(v4v_iov_t), + * UINT32_t niov, + * uint32_t protocol) + */ + +#if !defined(__GNUC__) +# pragma warning(pop) +# pragma pack(pop) +#endif + +#if !defined(__GNUC__) +static __inline void +mb (void) +{ + _mm_mfence (); + _ReadWriteBarrier (); +} +#else +#ifndef mb +# define mb() __asm__ __volatile__ ("" ::: "memory"); +#endif +#endif + +#if !defined(V4V_EXCLUDE_UTILS) + +/*************** Utility functions **************/ + +static V4V_INLINE uint32_t +v4v_ring_bytes_to_read (volatile struct v4v_ring *r) +{ + int32_t ret; + ret = r->tx_ptr - r->rx_ptr; + if (ret >= 0) + return ret; + return (uint32_t) (r->len + ret); +} + + +/* + * Copy at most t bytes of the next message in the ring, into the buffer + * at _buf, setting from and protocol if they are not NULL, returns + * the actual length of the message, or -1 if there is nothing to read + */ +V4V_UNUSED static V4V_INLINE ssize_t +v4v_copy_out (struct v4v_ring *r, struct v4v_addr *from, uint32_t * protocol, + void *_buf, size_t t, int consume) +{ + volatile struct v4v_ring_message_header *mh; + /* unnecessary cast from void * required by MSVC compiler */ + uint8_t *buf = (uint8_t *) _buf; + uint32_t btr = v4v_ring_bytes_to_read (r); + uint32_t rxp = r->rx_ptr; + uint32_t bte; + uint32_t len; + ssize_t ret; + + + if (btr < sizeof (*mh)) + return -1; + + /* + * Becuase the message_header is 128 bits long and the ring is 128 bit + * aligned, we're gaurunteed never to wrap + */ + mh = (volatile struct v4v_ring_message_header *) &r->ring[r->rx_ptr]; + + len = mh->len; + if (btr < len) + return -1; + +#if defined(__GNUC__) + if (from) + *from = mh->source; +#else + /* MSVC can't do the above */ + if (from) + memcpy((void *) from, (void *) &(mh->source), sizeof(struct v4v_addr)); +#endif + + if (protocol) + *protocol = mh->protocol; + + rxp += sizeof (*mh); + if (rxp == r->len) + rxp = 0; + len -= sizeof (*mh); + ret = len; + + bte = r->len - rxp; + + if (bte < len) + { + if (t < bte) + { + if (buf) + { + memcpy (buf, (void *) &r->ring[rxp], t); + buf += t; + } + + rxp = 0; + len -= bte; + t = 0; + } + else + { + if (buf) + { + memcpy (buf, (void *) &r->ring[rxp], bte); + buf += bte; + } + rxp = 0; + len -= bte; + t -= bte; + } + } + + if (buf && t) + memcpy (buf, (void *) &r->ring[rxp], (t < len) ? t : len); + + + rxp += V4V_ROUNDUP (len); + if (rxp == r->len) + rxp = 0; + + mb (); + + if (consume) + r->rx_ptr = rxp; + + return ret; +} + +static V4V_INLINE void +v4v_memcpy_skip (void *_dst, const void *_src, size_t len, size_t *skip) +{ + const uint8_t *src = (const uint8_t *) _src; + uint8_t *dst = (uint8_t *) _dst; + + if (!*skip) + { + memcpy (dst, src, len); + return; + } + + if (*skip >= len) + { + *skip -= len; + return; + } + + src += *skip; + dst += *skip; + len -= *skip; + *skip = 0; + + memcpy (dst, src, len); +} + +/* + * Copy at most t bytes of the next message in the ring, into the buffer + * at _buf, skipping skip bytes, setting from and protocol if they are not + * NULL, returns the actual length of the message, or -1 if there is + * nothing to read + */ +static ssize_t +v4v_copy_out_offset (struct v4v_ring *r, struct v4v_addr *from, + uint32_t * protocol, void *_buf, size_t t, int consume, + size_t skip) V4V_UNUSED; + +V4V_INLINE static ssize_t +v4v_copy_out_offset (struct v4v_ring *r, struct v4v_addr *from, + uint32_t * protocol, void *_buf, size_t t, int consume, + size_t skip) +{ + volatile struct v4v_ring_message_header *mh; + /* unnecessary cast from void * required by MSVC compiler */ + uint8_t *buf = (uint8_t *) _buf; + uint32_t btr = v4v_ring_bytes_to_read (r); + uint32_t rxp = r->rx_ptr; + uint32_t bte; + uint32_t len; + ssize_t ret; + + buf -= skip; + + if (btr < sizeof (*mh)) + return -1; + + /* + * Becuase the message_header is 128 bits long and the ring is 128 bit + * aligned, we're gaurunteed never to wrap + */ + mh = (volatile struct v4v_ring_message_header *) &r->ring[r->rx_ptr]; + + len = mh->len; + if (btr < len) + return -1; + +#if defined(__GNUC__) + if (from) + *from = mh->source; +#else + /* MSVC can't do the above */ + if (from) + memcpy((void *) from, (void *) &(mh->source), sizeof(struct v4v_addr)); +#endif + + if (protocol) + *protocol = mh->protocol; + + rxp += sizeof (*mh); + if (rxp == r->len) + rxp = 0; + len -= sizeof (*mh); + ret = len; + + bte = r->len - rxp; + + if (bte < len) + { + if (t < bte) + { + if (buf) + { + v4v_memcpy_skip (buf, (void *) &r->ring[rxp], t, &skip); + buf += t; + } + + rxp = 0; + len -= bte; + t = 0; + } + else + { + if (buf) + { + v4v_memcpy_skip (buf, (void *) &r->ring[rxp], bte, + &skip); + buf += bte; + } + rxp = 0; + len -= bte; + t -= bte; + } + } + + if (buf && t) + v4v_memcpy_skip (buf, (void *) &r->ring[rxp], (t < len) ? t : len, + &skip); + + + rxp += V4V_ROUNDUP (len); + if (rxp == r->len) + rxp = 0; + + mb (); + + if (consume) + r->rx_ptr = rxp; + + return ret; +} + +#endif /* V4V_EXCLUDE_UTILS */ + +#endif /* __XEN_PUBLIC_V4V_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index 033cbba..dce0338 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -99,7 +99,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); #define __HYPERVISOR_domctl 36 #define __HYPERVISOR_kexec_op 37 #define __HYPERVISOR_tmem_op 38 -#define __HYPERVISOR_xc_reserved_op 39 /* reserved for XenClient */ +#define __HYPERVISOR_v4v_op 39 /* Architecture-specific hypercall definitions. */ #define __HYPERVISOR_arch_0 48 diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 53804c8..457e3f2 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -23,6 +23,7 @@ #include #include #include +#include #ifdef CONFIG_COMPAT #include @@ -350,6 +351,10 @@ struct domain nodemask_t node_affinity; unsigned int last_alloc_node; spinlock_t node_affinity_lock; + + /* v4v */ + rwlock_t v4v_lock; + struct v4v_domain *v4v; }; struct domain_setup_info diff --git a/xen/include/xen/v4v.h b/xen/include/xen/v4v.h new file mode 100644 index 0000000..4325a03 --- /dev/null +++ b/xen/include/xen/v4v.h @@ -0,0 +1,109 @@ +/****************************************************************************** + * V4V + * + * Version 2 of v2v (Virtual-to-Virtual) + * + * Copyright (c) 2010, Citrix Systems + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __V4V_PRIVATE_H__ +#define __V4V_PRIVATE_H__ + +#include +#include +#include +#include +#include +#include +#include + + +#define V4V_HTABLE_SIZE 32 + + +static inline uint16_t +v4v_hash_fn (struct v4v_ring_id *id) +{ + uint16_t ret; + ret = (uint16_t) (id->addr.port >> 16); + ret ^= (uint16_t) id->addr.port; + ret ^= id->addr.domain; + ret ^= id->partner; + + ret &= (V4V_HTABLE_SIZE-1); + + return ret; +} + +struct v4v_pending_ent +{ + struct hlist_node node; + domid_t id; + uint32_t len; +}; + + +struct v4v_ring_info +{ + /* next node in the hash, protected by L2 */ + struct hlist_node node; + /* this ring's id, protected by L2 */ + struct v4v_ring_id id; + /* L3 */ + spinlock_t lock; + /* cached length of the ring (from ring->len), protected by L3 */ + uint32_t len; + uint32_t npage; + /* cached tx pointer location, protected by L3 */ + uint32_t tx_ptr; + /* guest ring, protected by L3 */ + XEN_GUEST_HANDLE(v4v_ring_t) ring; + /* mapped ring pages protected by L3*/ + uint8_t **mfn_mapping; + /* list of mfns of guest ring */ + mfn_t *mfns; + /* list of struct v4v_pending_ent for this ring, L3 */ + struct hlist_head pending; +}; + +/* + * The value of the v4v element in a struct domain is + * protected by the global lock L1 + */ +struct v4v_domain +{ + /* L2 */ + rwlock_t lock; + /* protected by L2 */ + struct hlist_head ring_hash[V4V_HTABLE_SIZE]; +}; + +void v4v_destroy(struct domain *d); +int v4v_init(struct domain *d); +long do_v4v_op (int cmd, + XEN_GUEST_HANDLE (void) arg1, + XEN_GUEST_HANDLE (void) arg2, + XEN_GUEST_HANDLE (void) arg3, + uint32_t arg4, + uint32_t arg5); + +#endif /* __V4V_PRIVATE_H__ */ + +/* + * Local variables: + * mode: C + * c-set-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --------------true Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --------------true-- From xen-users-bounces@lists.xen.org Sun Jun 03 15:31:47 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 Jun 2012 15:31:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SbCkX-0007iG-Vc; Sun, 03 Jun 2012 15:29:49 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SbCkW-0007iB-7K for xen-users@lists.xen.org; Sun, 03 Jun 2012 15:29:48 +0000 Received: from [85.158.143.99:33535] by server-1.bemta-4.messagelabs.com id 2E/2B-27869-BE28BCF4; Sun, 03 Jun 2012 15:29:47 +0000 X-Env-Sender: werner@xxlwade.de X-Msg-Ref: server-4.tower-216.messagelabs.com!1338737376!25862281!1 X-Originating-IP: [88.198.0.151] X-SpamReason: No, hits=3.4 required=7.0 tests=HELO_DYNAMIC_IPADDR X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 25990 invoked from network); 3 Jun 2012 15:29:36 -0000 Received: from static.88-198-0-151.clients.your-server.de (HELO static-ip-217-172-170-8.inaddr.intergenia.de) (88.198.0.151) by server-4.tower-216.messagelabs.com with SMTP; 3 Jun 2012 15:29:36 -0000 Received: from [192.168.1.2] (localhost [127.0.0.1]) by static-ip-217-172-170-8.inaddr.intergenia.de (Postfix) with ESMTPA id 930AE16273 for ; Sun, 3 Jun 2012 17:29:34 +0200 (CEST) Message-ID: <4FCB82DE.4080506@xxlwade.de> Date: Sun, 03 Jun 2012 17:29:34 +0200 From: Werner Fehn User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:12.0) Gecko/20120430 Thunderbird/12.0.1 MIME-Version: 1.0 To: xen-users@lists.xen.org Subject: [Xen-users] need to load uhci_hcd with acpi=off X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org Dear all, I have running a DOM-0 on debian squeeze with the most recent kernel: Linux 2.6.32-5-xen-amd64 #1 SMP On 30% of all reboots the system hangs and only a reset helps. acpi=off as an additional kernel parameter solves this problem, but the usb keyboard of the installed ip-kvm is not found then. with acpi=off Ican find a lot stuff like: [ 7.098747] uhci_hcd 0000:00:1d.2: UHCI Host Controller [ 7.098759] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 1 [ 7.098784] uhci_hcd 0000:00:1d.2: request interrupt 14 failed [ 7.098821] uhci_hcd 0000:00:1d.2: USB bus 1 deregistered [ 7.098833] uhci_hcd 0000:00:1d.2: init 0000:00:1d.2 fail, -38 [ 7.098871] uhci_hcd: probe of 0000:00:1d.2 failed with error -38 looks like a dead look. without acpi=off the system hangs sometimes. with the parameter i have no access via my ip-kvm (it is a remote machine in a farm). With acpi=off I can reproduce the *hci_hcd error on a system in my home, but on this machine reboot runs fine also without acpi=off. Seems I need acpi=off, but I need to load *hci_hcd to get access to the usb-ip-kvm-keyboard. What I tried: - thousands of BIOS IRQ/PnP parameters => no luck - noacpi => kernel panic - irq=biosirq => no change Any more idea to get the IRQ with acpi=off parameter set? Best Regards Werner complete dmesg: [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Linux version 2.6.32-5-xen-amd64 (Debian 2.6.32-44) (dannf@debian.org) (gcc version 4.3.5 (Debian 4.3.5-4) ) #1 SMP Sat May 5 04:18:09 UTC 2012 [ 0.000000] Command line: placeholder root=UUID=8622e268-8845-4cd5-82b3-e7fd0568c602 ro quiet acpi=off [ 0.000000] KERNEL supported cpus: [ 0.000000] Intel GenuineIntel [ 0.000000] AMD AuthenticAMD [ 0.000000] Centaur CentaurHauls [ 0.000000] xen_release_chunk: looking at area pfn bf7e0-bf7ec: 12 pages freed [ 0.000000] xen_release_chunk: looking at area pfn c0000-fec00: 257024 pages freed [ 0.000000] xen_release_chunk: looking at area pfn fec01-fee00: 511 pages freed [ 0.000000] xen_release_chunk: looking at area pfn fee01-ffc00: 3583 pages freed [ 0.000000] released 261130 pages of unused memory [ 0.000000] BIOS-provided physical RAM map: [ 0.000000] Xen: 0000000000000000 - 000000000009ec00 (usable) [ 0.000000] Xen: 000000000009ec00 - 0000000000100000 (reserved) [ 0.000000] Xen: 0000000000100000 - 00000000bf780000 (usable) [ 0.000000] Xen: 00000000bf780000 - 00000000bf78e000 (ACPI data) [ 0.000000] Xen: 00000000bf78e000 - 00000000bf7d0000 (ACPI NVS) [ 0.000000] Xen: 00000000bf7d0000 - 00000000bf7e0000 (reserved) [ 0.000000] Xen: 00000000bf7ec000 - 00000000c0000000 (reserved) [ 0.000000] Xen: 00000000fec00000 - 00000000fec01000 (reserved) [ 0.000000] Xen: 00000000fee00000 - 00000000fee01000 (reserved) [ 0.000000] Xen: 00000000ffc00000 - 0000000100000000 (reserved) [ 0.000000] Xen: 0000000100000000 - 00000005e6891000 (usable) [ 0.000000] DMI present. [ 0.000000] AMI BIOS detected: BIOS may corrupt low RAM, working around it. [ 0.000000] e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved) [ 0.000000] last_pfn = 0x5e6891 max_arch_pfn = 0x400000000 [ 0.000000] x86 PAT enabled: cpu 0, old 0x50100070406, new 0x7010600070106 [ 0.000000] last_pfn = 0xbf780 max_arch_pfn = 0x400000000 [ 0.000000] initial memory mapped : 0 - 20000000 [ 0.000000] init_memory_mapping: 0000000000000000-00000000bf780000 [ 0.000000] 0000000000 - 00bf780000 page 4k [ 0.000000] kernel direct mapping tables up to bf780000 @ 100000-700000 [ 0.000000] init_memory_mapping: 0000000100000000-00000005e6891000 [ 0.000000] 0100000000 - 05e6891000 page 4k [ 0.000000] kernel direct mapping tables up to 5e6891000 @ 6384000-92d2000 [ 0.000000] RAMDISK: 01708000 - 03416a00 [ 0.000000] No NUMA configuration found [ 0.000000] Faking a node at 0000000000000000-00000005e6891000 [ 0.000000] Bootmem setup node 0 0000000000000000-00000005e6891000 [ 0.000000] NODE_DATA [0000000000010000 - 0000000000017fff] [ 0.000000] bootmap [00000000006c6000 - 0000000000782d17] pages bd [ 0.000000] (9 early reservations) ==> bootmem [0000000000 - 05e6891000] [ 0.000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000] [ 0.000000] #1 [000634d000 - 0006384000] XEN PAGETABLES ==> [000634d000 - 0006384000] [ 0.000000] #2 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000] [ 0.000000] #3 [0001000000 - 00016e7b44] TEXT DATA BSS ==> [0001000000 - 00016e7b44] [ 0.000000] #4 [0001708000 - 0003416a00] RAMDISK ==> [0001708000 - 0003416a00] [ 0.000000] #5 [0003417000 - 000634d000] XEN START INFO ==> [0003417000 - 000634d000] [ 0.000000] #6 [00016e8000 - 00016e812b] BRK ==> [00016e8000 - 00016e812b] [ 0.000000] #7 [0000100000 - 00006c6000] PGTABLE ==> [0000100000 - 00006c6000] [ 0.000000] #8 [0006384000 - 0008acd000] PGTABLE ==> [0006384000 - 0008acd000] [ 0.000000] found SMP MP-table at [ffff8800000ff780] ff780 [ 0.000000] Zone PFN ranges: [ 0.000000] DMA 0x00000010 -> 0x00001000 [ 0.000000] DMA32 0x00001000 -> 0x00100000 [ 0.000000] Normal 0x00100000 -> 0x005e6891 [ 0.000000] Movable zone start PFN for each node [ 0.000000] early_node_map[3] active PFN ranges [ 0.000000] 0: 0x00000010 -> 0x0000009e [ 0.000000] 0: 0x00000100 -> 0x000bf780 [ 0.000000] 0: 0x00100000 -> 0x005e6891 [ 0.000000] On node 0 totalpages: 5922719 [ 0.000000] DMA zone: 56 pages used for memmap [ 0.000000] DMA zone: 1481 pages reserved [ 0.000000] DMA zone: 2445 pages, LIFO batch:0 [ 0.000000] DMA32 zone: 14280 pages used for memmap [ 0.000000] DMA32 zone: 765880 pages, LIFO batch:31 [ 0.000000] Normal zone: 70254 pages used for memmap [ 0.000000] Normal zone: 5068323 pages, LIFO batch:31 [ 0.000000] SFI: Simple Firmware Interface v0.7 http://simplefirmware.org [ 0.000000] Intel MultiProcessor Specification v1.4 [ 0.000000] MPTABLE: OEM ID: INTEL [ 0.000000] MPTABLE: Product ID: TYLERSBURG [ 0.000000] MPTABLE: APIC at: 0xFEE00000 [ 0.000000] I/O APIC #6 Version 32 at 0xFEC00000. [ 0.000000] Processors: 12 [ 0.000000] SMP: Allowing 12 CPUs, 0 hotplug CPUs [ 0.000000] nr_irqs_gsi: 16 [ 0.000000] PM: Registered nosave memory: 000000000009e000 - 000000000009f000 [ 0.000000] PM: Registered nosave memory: 000000000009f000 - 0000000000100000 [ 0.000000] PM: Registered nosave memory: 00000000bf780000 - 00000000bf78e000 [ 0.000000] PM: Registered nosave memory: 00000000bf78e000 - 00000000bf7d0000 [ 0.000000] PM: Registered nosave memory: 00000000bf7d0000 - 00000000bf7e0000 [ 0.000000] PM: Registered nosave memory: 00000000bf7e0000 - 00000000bf7ec000 [ 0.000000] PM: Registered nosave memory: 00000000bf7ec000 - 00000000c0000000 [ 0.000000] PM: Registered nosave memory: 00000000c0000000 - 00000000fec00000 [ 0.000000] PM: Registered nosave memory: 00000000fec00000 - 00000000fec01000 [ 0.000000] PM: Registered nosave memory: 00000000fec01000 - 00000000fee00000 [ 0.000000] PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000 [ 0.000000] PM: Registered nosave memory: 00000000fee01000 - 00000000ffc00000 [ 0.000000] PM: Registered nosave memory: 00000000ffc00000 - 0000000100000000 [ 0.000000] Allocating PCI resources starting at c0000000 (gap: c0000000:3ec00000) [ 0.000000] Booting paravirtualized kernel on Xen [ 0.000000] Xen version: 4.0.1 (preserve-AD) (dom0) [ 0.000000] NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:12 nr_node_ids:1 [ 0.000000] PERCPU: Embedded 30 pages/cpu @ffff88001c85d000 s90328 r8192 d24360 u122880 [ 0.000000] pcpu-alloc: s90328 r8192 d24360 u122880 alloc=30*4096 [ 0.000000] pcpu-alloc: [0] 00 [0] 01 [0] 02 [0] 03 [0] 04 [0] 05 [0] 06 [0] 07 [ 0.000000] pcpu-alloc: [0] 08 [0] 09 [0] 10 [0] 11 [ 5.202895] trying to map vcpu_info 0 at ffff88001c868020, mfn 612a06, offset 32 [ 5.202898] cpu 0 using vcpu_info at ffff88001c868020 [ 5.202899] trying to map vcpu_info 1 at ffff88001c886020, mfn 612a24, offset 32 [ 5.202901] cpu 1 using vcpu_info at ffff88001c886020 [ 5.202903] trying to map vcpu_info 2 at ffff88001c8a4020, mfn 612a42, offset 32 [ 5.202905] cpu 2 using vcpu_info at ffff88001c8a4020 [ 5.202906] trying to map vcpu_info 3 at ffff88001c8c2020, mfn 612a60, offset 32 [ 5.202908] cpu 3 using vcpu_info at ffff88001c8c2020 [ 5.202909] trying to map vcpu_info 4 at ffff88001c8e0020, mfn 612a7e, offset 32 [ 5.202911] cpu 4 using vcpu_info at ffff88001c8e0020 [ 5.202912] trying to map vcpu_info 5 at ffff88001c8fe020, mfn 612a9c, offset 32 [ 5.202914] cpu 5 using vcpu_info at ffff88001c8fe020 [ 5.202916] trying to map vcpu_info 6 at ffff88001c91c020, mfn 612aba, offset 32 [ 5.202918] cpu 6 using vcpu_info at ffff88001c91c020 [ 5.202919] trying to map vcpu_info 7 at ffff88001c93a020, mfn 612ad8, offset 32 [ 5.202921] cpu 7 using vcpu_info at ffff88001c93a020 [ 5.202922] trying to map vcpu_info 8 at ffff88001c958020, mfn 612af6, offset 32 [ 5.202924] cpu 8 using vcpu_info at ffff88001c958020 [ 5.202926] trying to map vcpu_info 9 at ffff88001c976020, mfn 612b14, offset 32 [ 5.202928] cpu 9 using vcpu_info at ffff88001c976020 [ 5.202929] trying to map vcpu_info 10 at ffff88001c994020, mfn 612b32, offset 32 [ 5.202931] cpu 10 using vcpu_info at ffff88001c994020 [ 5.202932] trying to map vcpu_info 11 at ffff88001c9b2020, mfn 612b50, offset 32 [ 5.202934] cpu 11 using vcpu_info at ffff88001c9b2020 [ 5.202935] Xen: using vcpu_info placement [ 5.202939] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 5836648 [ 5.202941] Policy zone: Normal [ 5.202943] Kernel command line: placeholder root=UUID=8622e268-8845-4cd5-82b3-e7fd0568c602 ro quiet acpi=off [ 5.202967] PID hash table entries: 4096 (order: 3, 32768 bytes) [ 5.203182] Initializing CPU#0 [ 5.209000] DMA: Placing 64MB software IO TLB between ffff88001c9ce000 - ffff8800209ce000 [ 5.209003] DMA: software IO TLB at phys 0x1c9ce000 - 0x209ce000 [ 5.209004] xen_swiotlb_fixup: buf=ffff88001c9ce000 size=67108864 [ 5.222223] xen_swiotlb_fixup: buf=ffff880020a2e000 size=32768 [ 5.301463] Memory: 23166540k/24748612k available (3152k kernel code, 1057736k absent, 524336k reserved, 2064k data, 604k init) [ 5.301488] SLUB: Genslabs=14, HWalign=64, Order=0-3, MinObjects=0, CPUs=12, Nodes=1 [ 5.301511] Hierarchical RCU implementation. [ 5.301518] NR_IRQS:4352 nr_irqs:624 [ 5.301567] xen: --> irq=0 [ 5.301571] xen: --> irq=1 [ 5.301573] xen: --> irq=4 [ 5.301575] xen: --> irq=6 [ 5.301578] xen: --> irq=7 [ 5.301580] xen: --> irq=8 [ 5.301582] xen: --> irq=9 [ 5.301584] xen: --> irq=12 [ 5.301587] xen: --> irq=13 [ 5.307201] Console: colour VGA+ 80x25 [ 5.307217] console [tty0] enabled [ 5.307235] Xen: using vcpuop timer interface [ 5.307237] installing Xen timer for CPU 0 [ 5.307242] alloc irq_desc for 623 on node -1 [ 5.307244] alloc kstat_irqs on node -1 [ 5.307257] Detected 3341.682 MHz processor. [ 5.307263] Calibrating delay loop (skipped), value calculated using timer frequency.. 6683.36 BogoMIPS (lpj=13366728) [ 5.307275] Security Framework initialized [ 5.307278] SELinux: Disabled at boot. [ 5.310847] Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes) [ 5.317197] Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes) [ 5.319518] Mount-cache hash table entries: 256 [ 5.319622] Initializing cgroup subsys ns [ 5.319624] Initializing cgroup subsys cpuacct [ 5.319628] Initializing cgroup subsys devices [ 5.319630] Initializing cgroup subsys freezer [ 5.319631] Initializing cgroup subsys net_cls [ 5.319658] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.319660] CPU: L2 cache: 256K [ 5.319661] CPU: L3 cache: 12288K [ 5.319664] CPU 0/0x0 -> Node 0 [ 5.319666] CPU: Unsupported number of siblings 32 [ 5.319669] mce: CPU supports 9 MCE banks [ 5.319687] Performance Events: unsupported p6 CPU model 44 no PMU driver, software events only. [ 5.319697] SMP alternatives: switching to UP code [ 5.337471] alloc irq_desc for 622 on node -1 [ 5.337473] alloc kstat_irqs on node -1 [ 5.337479] alloc irq_desc for 621 on node -1 [ 5.337481] alloc kstat_irqs on node -1 [ 5.337484] alloc irq_desc for 620 on node -1 [ 5.337485] alloc kstat_irqs on node -1 [ 5.337488] alloc irq_desc for 619 on node -1 [ 5.337489] alloc kstat_irqs on node -1 [ 5.337625] installing Xen timer for CPU 1 [ 5.337627] alloc irq_desc for 618 on node -1 [ 5.337628] alloc kstat_irqs on node -1 [ 5.337651] SMP alternatives: switching to SMP code [ 5.354623] alloc irq_desc for 617 on node -1 [ 5.354624] alloc kstat_irqs on node -1 [ 5.354635] alloc irq_desc for 616 on node -1 [ 5.354636] alloc kstat_irqs on node -1 [ 5.354639] alloc irq_desc for 615 on node -1 [ 5.354641] alloc kstat_irqs on node -1 [ 5.354644] alloc irq_desc for 614 on node -1 [ 5.354645] alloc kstat_irqs on node -1 [ 5.354655] Initializing CPU#1 [ 5.354682] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.354684] CPU: L2 cache: 256K [ 5.354684] CPU: L3 cache: 12288K [ 5.354687] CPU 1/0x0 -> Node 0 [ 5.354688] CPU: Unsupported number of siblings 32 [ 5.354761] installing Xen timer for CPU 2 [ 5.354763] alloc irq_desc for 613 on node -1 [ 5.354765] alloc kstat_irqs on node -1 [ 5.354781] alloc irq_desc for 612 on node -1 [ 5.354782] alloc kstat_irqs on node -1 [ 5.354786] alloc irq_desc for 611 on node -1 [ 5.354787] alloc kstat_irqs on node -1 [ 5.354790] alloc irq_desc for 610 on node -1 [ 5.354791] alloc kstat_irqs on node -1 [ 5.354794] alloc irq_desc for 609 on node -1 [ 5.354796] alloc kstat_irqs on node -1 [ 5.354804] Initializing CPU#2 [ 5.354829] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.354831] CPU: L2 cache: 256K [ 5.354832] CPU: L3 cache: 12288K [ 5.354834] CPU 2/0x0 -> Node 0 [ 5.354835] CPU: Unsupported number of siblings 32 [ 5.354899] installing Xen timer for CPU 3 [ 5.354901] alloc irq_desc for 608 on node -1 [ 5.354903] alloc kstat_irqs on node -1 [ 5.354918] alloc irq_desc for 607 on node -1 [ 5.354919] alloc kstat_irqs on node -1 [ 5.354923] alloc irq_desc for 606 on node -1 [ 5.354924] alloc kstat_irqs on node -1 [ 5.354927] alloc irq_desc for 605 on node -1 [ 5.354928] alloc kstat_irqs on node -1 [ 5.354933] alloc irq_desc for 604 on node -1 [ 5.354934] alloc kstat_irqs on node -1 [ 5.354942] Initializing CPU#3 [ 5.354967] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.354969] CPU: L2 cache: 256K [ 5.354970] CPU: L3 cache: 12288K [ 5.354972] CPU 3/0x0 -> Node 0 [ 5.354973] CPU: Unsupported number of siblings 32 [ 5.355036] installing Xen timer for CPU 4 [ 5.355038] alloc irq_desc for 603 on node -1 [ 5.355040] alloc kstat_irqs on node -1 [ 5.355054] alloc irq_desc for 602 on node -1 [ 5.355056] alloc kstat_irqs on node -1 [ 5.355059] alloc irq_desc for 601 on node -1 [ 5.355060] alloc kstat_irqs on node -1 [ 5.355064] alloc irq_desc for 600 on node -1 [ 5.355065] alloc kstat_irqs on node -1 [ 5.355068] alloc irq_desc for 599 on node -1 [ 5.355070] alloc kstat_irqs on node -1 [ 5.355077] Initializing CPU#4 [ 5.355102] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355103] CPU: L2 cache: 256K [ 5.355104] CPU: L3 cache: 12288K [ 5.355107] CPU 4/0x0 -> Node 0 [ 5.355108] CPU: Unsupported number of siblings 32 [ 5.355170] installing Xen timer for CPU 5 [ 5.355173] alloc irq_desc for 598 on node -1 [ 5.355174] alloc kstat_irqs on node -1 [ 5.355189] alloc irq_desc for 597 on node -1 [ 5.355190] alloc kstat_irqs on node -1 [ 5.355194] alloc irq_desc for 596 on node -1 [ 5.355195] alloc kstat_irqs on node -1 [ 5.355198] alloc irq_desc for 595 on node -1 [ 5.355200] alloc kstat_irqs on node -1 [ 5.355203] alloc irq_desc for 594 on node -1 [ 5.355204] alloc kstat_irqs on node -1 [ 5.355212] Initializing CPU#5 [ 5.355236] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355238] CPU: L2 cache: 256K [ 5.355239] CPU: L3 cache: 12288K [ 5.355241] CPU 5/0x0 -> Node 0 [ 5.355242] CPU: Unsupported number of siblings 32 [ 5.355308] installing Xen timer for CPU 6 [ 5.355311] alloc irq_desc for 593 on node -1 [ 5.355312] alloc kstat_irqs on node -1 [ 5.355329] alloc irq_desc for 592 on node -1 [ 5.355330] alloc kstat_irqs on node -1 [ 5.355334] alloc irq_desc for 591 on node -1 [ 5.355335] alloc kstat_irqs on node -1 [ 5.355339] alloc irq_desc for 590 on node -1 [ 5.355340] alloc kstat_irqs on node -1 [ 5.355343] alloc irq_desc for 589 on node -1 [ 5.355344] alloc kstat_irqs on node -1 [ 5.355352] Initializing CPU#6 [ 5.355381] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355384] CPU: L2 cache: 256K [ 5.355385] CPU: L3 cache: 12288K [ 5.355388] CPU 6/0x0 -> Node 0 [ 5.355390] CPU: Unsupported number of siblings 32 [ 5.355465] installing Xen timer for CPU 7 [ 5.355468] alloc irq_desc for 588 on node -1 [ 5.355469] alloc kstat_irqs on node -1 [ 5.355484] alloc irq_desc for 587 on node -1 [ 5.355486] alloc kstat_irqs on node -1 [ 5.355489] alloc irq_desc for 586 on node -1 [ 5.355491] alloc kstat_irqs on node -1 [ 5.355494] alloc irq_desc for 585 on node -1 [ 5.355495] alloc kstat_irqs on node -1 [ 5.355499] alloc irq_desc for 584 on node -1 [ 5.355500] alloc kstat_irqs on node -1 [ 5.355507] Initializing CPU#7 [ 5.355529] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355530] CPU: L2 cache: 256K [ 5.355531] CPU: L3 cache: 12288K [ 5.355534] CPU 7/0x0 -> Node 0 [ 5.355535] CPU: Unsupported number of siblings 32 [ 5.355600] installing Xen timer for CPU 8 [ 5.355602] alloc irq_desc for 583 on node -1 [ 5.355604] alloc kstat_irqs on node -1 [ 5.355619] alloc irq_desc for 582 on node -1 [ 5.355620] alloc kstat_irqs on node -1 [ 5.355624] alloc irq_desc for 581 on node -1 [ 5.355625] alloc kstat_irqs on node -1 [ 5.355630] alloc irq_desc for 580 on node -1 [ 5.355631] alloc kstat_irqs on node -1 [ 5.355634] alloc irq_desc for 579 on node -1 [ 5.355636] alloc kstat_irqs on node -1 [ 5.355643] Initializing CPU#8 [ 5.355665] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355666] CPU: L2 cache: 256K [ 5.355667] CPU: L3 cache: 12288K [ 5.355669] CPU 8/0x0 -> Node 0 [ 5.355671] CPU: Unsupported number of siblings 32 [ 5.355733] installing Xen timer for CPU 9 [ 5.355735] alloc irq_desc for 578 on node -1 [ 5.355737] alloc kstat_irqs on node -1 [ 5.355751] alloc irq_desc for 577 on node -1 [ 5.355752] alloc kstat_irqs on node -1 [ 5.355756] alloc irq_desc for 576 on node -1 [ 5.355757] alloc kstat_irqs on node -1 [ 5.355760] alloc irq_desc for 575 on node -1 [ 5.355761] alloc kstat_irqs on node -1 [ 5.355765] alloc irq_desc for 574 on node -1 [ 5.355766] alloc kstat_irqs on node -1 [ 5.355773] Initializing CPU#9 [ 5.355795] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355796] CPU: L2 cache: 256K [ 5.355797] CPU: L3 cache: 12288K [ 5.355799] CPU 9/0x0 -> Node 0 [ 5.355801] CPU: Unsupported number of siblings 32 [ 5.355862] installing Xen timer for CPU 10 [ 5.355865] alloc irq_desc for 573 on node -1 [ 5.355866] alloc kstat_irqs on node -1 [ 5.355880] alloc irq_desc for 572 on node -1 [ 5.355882] alloc kstat_irqs on node -1 [ 5.355885] alloc irq_desc for 571 on node -1 [ 5.355887] alloc kstat_irqs on node -1 [ 5.355890] alloc irq_desc for 570 on node -1 [ 5.355891] alloc kstat_irqs on node -1 [ 5.355896] alloc irq_desc for 569 on node -1 [ 5.355897] alloc kstat_irqs on node -1 [ 5.355904] Initializing CPU#10 [ 5.355926] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.355928] CPU: L2 cache: 256K [ 5.355928] CPU: L3 cache: 12288K [ 5.355931] CPU 10/0x0 -> Node 0 [ 5.355932] CPU: Unsupported number of siblings 32 [ 5.355995] installing Xen timer for CPU 11 [ 5.355997] alloc irq_desc for 568 on node -1 [ 5.355999] alloc kstat_irqs on node -1 [ 5.356013] alloc irq_desc for 567 on node -1 [ 5.356014] alloc kstat_irqs on node -1 [ 5.356018] alloc irq_desc for 566 on node -1 [ 5.356019] alloc kstat_irqs on node -1 [ 5.356022] alloc irq_desc for 565 on node -1 [ 5.356024] alloc kstat_irqs on node -1 [ 5.356027] alloc irq_desc for 564 on node -1 [ 5.356028] alloc kstat_irqs on node -1 [ 5.356035] Initializing CPU#11 [ 5.356057] CPU: L1 I cache: 32K, L1 D cache: 32K [ 5.356059] CPU: L2 cache: 256K [ 5.356059] CPU: L3 cache: 12288K [ 5.356062] CPU 11/0x0 -> Node 0 [ 5.356063] CPU: Unsupported number of siblings 32 [ 5.356090] Brought up 12 CPUs [ 5.356124] CPU0 attaching sched-domain: [ 5.356127] domain 0: span 0-11 level CPU [ 5.356129] groups: group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 [ 5.356144] CPU1 attaching sched-domain: [ 5.356145] domain 0: span 0-11 level CPU [ 5.356147] groups: group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 [ 5.356161] CPU2 attaching sched-domain: [ 5.356163] domain 0: span 0-11 level CPU [ 5.356165] groups: group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 [ 5.356179] CPU3 attaching sched-domain: [ 5.356180] domain 0: span 0-11 level CPU [ 5.356182] groups: group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 [ 5.356196] CPU4 attaching sched-domain: [ 5.356198] domain 0: span 0-11 level CPU [ 5.356200] groups: group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 [ 5.356214] CPU5 attaching sched-domain: [ 5.356215] domain 0: span 0-11 level CPU [ 5.356217] groups: group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 [ 5.356231] CPU6 attaching sched-domain: [ 5.356232] domain 0: span 0-11 level CPU [ 5.356234] groups: group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 [ 5.356248] CPU7 attaching sched-domain: [ 5.356250] domain 0: span 0-11 level CPU [ 5.356252] groups: group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 [ 5.356266] CPU8 attaching sched-domain: [ 5.356267] domain 0: span 0-11 level CPU [ 5.356269] groups: group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 [ 5.356283] CPU9 attaching sched-domain: [ 5.356285] domain 0: span 0-11 level CPU [ 5.356286] groups: group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 [ 5.356301] CPU10 attaching sched-domain: [ 5.356302] domain 0: span 0-11 level CPU [ 5.356304] groups: group ffff88001c998d00 cpus 10 group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 [ 5.356318] CPU11 attaching sched-domain: [ 5.356319] domain 0: span 0-11 level CPU [ 5.356321] groups: group ffff88001c9b6d00 cpus 11 group ffff88001c86cd00 cpus 0 group ffff88001c88ad00 cpus 1 group ffff88001c8a8d00 cpus 2 group ffff88001c8c6d00 cpus 3 group ffff88001c8e4d00 cpus 4 group ffff88001c902d00 cpus 5 group ffff88001c920d00 cpus 6 group ffff88001c93ed00 cpus 7 group ffff88001c95cd00 cpus 8 group ffff88001c97ad00 cpus 9 group ffff88001c998d00 cpus 10 [ 5.356702] devtmpfs: initialized [ 5.359462] Grant table initialized [ 5.359464] regulator: core version 0.5 [ 5.359505] NET: Registered protocol family 16 [ 5.359544] alloc irq_desc for 563 on node -1 [ 5.359545] alloc kstat_irqs on node -1 [ 5.359642] sync cpu 0 get result 1 max_id b [ 5.359648] sync cpu 1 get result 1 max_id b [ 5.359653] sync cpu 2 get result 1 max_id b [ 5.359659] sync cpu 3 get result 1 max_id b [ 5.359665] sync cpu 4 get result 1 max_id b [ 5.359671] sync cpu 5 get result 1 max_id b [ 5.359678] sync cpu 6 get result 1 max_id b [ 5.359684] sync cpu 7 get result 1 max_id b [ 5.359689] sync cpu 8 get result 1 max_id b [ 5.359695] sync cpu 9 get result 1 max_id b [ 5.359701] sync cpu a get result 1 max_id b [ 5.359707] sync cpu b get result 1 max_id b [ 5.359709] alloc irq_desc for 562 on node -1 [ 5.359711] alloc kstat_irqs on node -1 [ 5.359762] PCI: Using configuration type 1 for base access [ 5.360880] bio: create slab at 0 [ 5.361122] ACPI: Interpreter disabled. [ 5.361141] xen_balloon: Initialising balloon driver with page order 0. [ 5.361174] vgaarb: loaded [ 5.361221] PCI: Probing PCI hardware [ 5.361223] PCI: Probing PCI hardware (bus 00) [ 5.361335] pci 0000:00:00.0: PME# supported from D0 D3hot D3cold [ 5.361339] pci 0000:00:00.0: PME# disabled [ 5.361460] pci 0000:00:01.0: PME# supported from D0 D3hot D3cold [ 5.361464] pci 0000:00:01.0: PME# disabled [ 5.361587] pci 0000:00:03.0: PME# supported from D0 D3hot D3cold [ 5.361591] pci 0000:00:03.0: PME# disabled [ 5.361718] pci 0000:00:07.0: PME# supported from D0 D3hot D3cold [ 5.361722] pci 0000:00:07.0: PME# disabled [ 5.362123] pci 0000:00:1a.0: reg 20 io port: [0xbc00-0xbc1f] [ 5.362235] pci 0000:00:1a.1: reg 20 io port: [0xb880-0xb89f] [ 5.362348] pci 0000:00:1a.2: reg 20 io port: [0xb800-0xb81f] [ 5.362466] pci 0000:00:1a.7: reg 10 32bit mmio: [0xf9ffe000-0xf9ffe3ff] [ 5.362570] pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold [ 5.362575] pci 0000:00:1a.7: PME# disabled [ 5.362692] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold [ 5.362696] pci 0000:00:1c.0: PME# disabled [ 5.362814] pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold [ 5.362818] pci 0000:00:1c.4: PME# disabled [ 5.362894] pci 0000:00:1d.0: reg 20 io port: [0xb480-0xb49f] [ 5.363002] pci 0000:00:1d.1: reg 20 io port: [0xb400-0xb41f] [ 5.363111] pci 0000:00:1d.2: reg 20 io port: [0xb080-0xb09f] [ 5.363224] pci 0000:00:1d.7: reg 10 32bit mmio: [0xf9ffc000-0xf9ffc3ff] [ 5.363324] pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold [ 5.363329] pci 0000:00:1d.7: PME# disabled [ 5.363526] pci 0000:00:1f.0: Force enabled HPET at 0xfed00000 [ 5.363543] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 00ff) [ 5.363546] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 0a00 (mask 0017) [ 5.363550] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 3 PIO at 4700 (mask 00ff) [ 5.363657] pci 0000:00:1f.2: reg 10 io port: [0xb000-0xb007] [ 5.363664] pci 0000:00:1f.2: reg 14 io port: [0xac00-0xac03] [ 5.363671] pci 0000:00:1f.2: reg 18 io port: [0xa880-0xa887] [ 5.363679] pci 0000:00:1f.2: reg 1c io port: [0xa800-0xa803] [ 5.363686] pci 0000:00:1f.2: reg 20 io port: [0xa480-0xa49f] [ 5.363693] pci 0000:00:1f.2: reg 24 32bit mmio: [0xf9ffa000-0xf9ffa7ff] [ 5.363762] pci 0000:00:1f.2: PME# supported from D3hot [ 5.363767] pci 0000:00:1f.2: PME# disabled [ 5.363807] pci 0000:00:1f.3: reg 10 64bit mmio: [0xf9ff9c00-0xf9ff9cff] [ 5.363826] pci 0000:00:1f.3: reg 20 io port: [0x400-0x41f] [ 5.363946] pci 0000:02:00.0: reg 10 32bit mmio: [0xfa000000-0xfaffffff] [ 5.363959] pci 0000:02:00.0: reg 14 64bit mmio pref: [0xd0000000-0xdfffffff] [ 5.363971] pci 0000:02:00.0: reg 1c 64bit mmio pref: [0xce000000-0xcfffffff] [ 5.363978] pci 0000:02:00.0: reg 24 io port: [0xcc00-0xcc7f] [ 5.363985] pci 0000:02:00.0: reg 30 32bit mmio pref: [0xfbc80000-0xfbcfffff] [ 5.364089] pci 0000:02:00.1: reg 10 32bit mmio: [0xfbc7c000-0xfbc7ffff] [ 5.371581] pci 0000:00:03.0: bridge io port: [0xc000-0xcfff] [ 5.371586] pci 0000:00:03.0: bridge 32bit mmio: [0xfa000000-0xfbcfffff] [ 5.371592] pci 0000:00:03.0: bridge 64bit mmio pref: [0xce000000-0xdfffffff] [ 5.371763] pci 0000:06:00.0: reg 10 io port: [0xe800-0xe8ff] [ 5.371788] pci 0000:06:00.0: reg 18 64bit mmio: [0xfbeff000-0xfbefffff] [ 5.371806] pci 0000:06:00.0: reg 20 64bit mmio pref: [0xf8ff0000-0xf8ffffff] [ 5.371816] pci 0000:06:00.0: reg 30 32bit mmio pref: [0x000000-0x01ffff] [ 5.371905] pci 0000:06:00.0: supports D1 D2 [ 5.371906] pci 0000:06:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 5.371912] pci 0000:06:00.0: PME# disabled [ 5.379587] pci 0000:00:1c.4: bridge io port: [0xe000-0xefff] [ 5.379592] pci 0000:00:1c.4: bridge 32bit mmio: [0xfbe00000-0xfbefffff] [ 5.379600] pci 0000:00:1c.4: bridge 64bit mmio pref: [0xf8f00000-0xf8ffffff] [ 5.379663] pci 0000:00:1e.0: transparent bridge [ 5.380048] vgaarb: device added: PCI:0000:02:00.0,decodes=io+mem,owns=io+mem,locks=none [ 5.380182] PCI: Discovered primary peer bus 05 [IRQ] [ 5.380196] pci 0000:00:1f.0: PIIX/ICH IRQ router [8086:3a16] [ 5.380438] Switching to clocksource xen [ 5.381744] pnp: PnP ACPI: disabled [ 5.382245] pci 0000:00:01.0: PCI bridge, secondary bus 0000:01 [ 5.382246] pci 0000:00:01.0: IO window: disabled [ 5.382251] pci 0000:00:01.0: MEM window: disabled [ 5.382255] pci 0000:00:01.0: PREFETCH window: disabled [ 5.382262] pci 0000:00:03.0: PCI bridge, secondary bus 0000:02 [ 5.382265] pci 0000:00:03.0: IO window: 0xc000-0xcfff [ 5.382270] pci 0000:00:03.0: MEM window: 0xfa000000-0xfbcfffff [ 5.382274] pci 0000:00:03.0: PREFETCH window: 0x000000ce000000-0x000000dfffffff [ 5.382281] pci 0000:00:07.0: PCI bridge, secondary bus 0000:03 [ 5.382282] pci 0000:00:07.0: IO window: disabled [ 5.382287] pci 0000:00:07.0: MEM window: disabled [ 5.382291] pci 0000:00:07.0: PREFETCH window: disabled [ 5.382297] pci 0000:00:1c.0: PCI bridge, secondary bus 0000:04 [ 5.382300] pci 0000:00:1c.0: IO window: 0x1000-0x1fff [ 5.382306] pci 0000:00:1c.0: MEM window: 0xc0000000-0xc01fffff [ 5.382310] pci 0000:00:1c.0: PREFETCH window: 0x000000c0200000-0x000000c03fffff [ 5.382318] pci 0000:00:1c.4: PCI bridge, secondary bus 0000:06 [ 5.382321] pci 0000:00:1c.4: IO window: 0xe000-0xefff [ 5.382327] pci 0000:00:1c.4: MEM window: 0xfbe00000-0xfbefffff [ 5.382331] pci 0000:00:1c.4: PREFETCH window: 0x000000f8f00000-0x000000f8ffffff [ 5.382338] pci 0000:00:1e.0: PCI bridge, secondary bus 0000:07 [ 5.382340] pci 0000:00:1e.0: IO window: disabled [ 5.382345] pci 0000:00:1e.0: MEM window: disabled [ 5.382349] pci 0000:00:1e.0: PREFETCH window: disabled [ 5.382366] pci 0000:00:01.0: setting latency timer to 64 [ 5.382378] pci 0000:00:03.0: setting latency timer to 64 [ 5.382390] pci 0000:00:07.0: setting latency timer to 64 [ 5.382399] pci 0000:00:1c.0: enabling device (0104 -> 0107) [ 5.382407] PCI: setting IRQ 5 as level-triggered [ 5.382410] pci 0000:00:1c.0: found PCI INT A -> IRQ 5 [ 5.382435] pci 0000:00:1c.0: sharing IRQ 5 with 0000:00:1c.4 [ 5.382455] pci 0000:00:1c.0: sharing IRQ 5 with 0000:02:00.1 [ 5.382462] pci 0000:00:1c.0: setting latency timer to 64 [ 5.382476] pci 0000:00:1c.4: found PCI INT A -> IRQ 5 [ 5.382500] pci 0000:00:1c.4: sharing IRQ 5 with 0000:00:1c.0 [ 5.382522] pci 0000:00:1c.4: sharing IRQ 5 with 0000:02:00.1 [ 5.382529] pci 0000:00:1c.4: setting latency timer to 64 [ 5.382537] pci 0000:00:1e.0: setting latency timer to 64 [ 5.382541] pci_bus 0000:00: resource 0 io: [0x00-0xffff] [ 5.382543] pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffffffffffff] [ 5.382545] pci_bus 0000:02: resource 0 io: [0xc000-0xcfff] [ 5.382546] pci_bus 0000:02: resource 1 mem: [0xfa000000-0xfbcfffff] [ 5.382548] pci_bus 0000:02: resource 2 pref mem [0xce000000-0xdfffffff] [ 5.382550] pci_bus 0000:04: resource 0 io: [0x1000-0x1fff] [ 5.382552] pci_bus 0000:04: resource 1 mem: [0xc0000000-0xc01fffff] [ 5.382553] pci_bus 0000:04: resource 2 pref mem [0xc0200000-0xc03fffff] [ 5.382555] pci_bus 0000:06: resource 0 io: [0xe000-0xefff] [ 5.382557] pci_bus 0000:06: resource 1 mem: [0xfbe00000-0xfbefffff] [ 5.382558] pci_bus 0000:06: resource 2 pref mem [0xf8f00000-0xf8ffffff] [ 5.382560] pci_bus 0000:07: resource 3 io: [0x00-0xffff] [ 5.382562] pci_bus 0000:07: resource 4 mem: [0x000000-0xffffffffffffffff] [ 5.382564] pci_bus 0000:05: resource 0 io: [0x00-0xffff] [ 5.382565] pci_bus 0000:05: resource 1 mem: [0x000000-0xffffffffffffffff] [ 5.382582] NET: Registered protocol family 2 [ 5.383095] IP route cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 5.384472] TCP established hash table entries: 524288 (order: 11, 8388608 bytes) [ 5.385620] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) [ 5.385749] TCP: Hash tables configured (established 524288 bind 65536) [ 5.385752] TCP reno registered [ 5.385828] NET: Registered protocol family 1 [ 5.385857] PCI: setting IRQ 10 as level-triggered [ 5.385860] pci 0000:00:1a.0: found PCI INT A -> IRQ 10 [ 5.385906] pci 0000:00:1a.0: sharing IRQ 10 with 0000:02:00.0 [ 5.385912] pci 0000:00:1a.0: sharing IRQ 10 with 0000:06:00.0 [ 5.385940] PCI: setting IRQ 15 as level-triggered [ 5.385943] pci 0000:00:1a.1: found PCI INT B -> IRQ 15 [ 5.386015] PCI: setting IRQ 11 as level-triggered [ 5.386018] pci 0000:00:1a.2: found PCI INT D -> IRQ 11 [ 5.386048] pci 0000:00:1a.2: sharing IRQ 11 with 0000:00:1d.1 [ 5.386059] pci 0000:00:1a.2: sharing IRQ 11 with 0000:00:1f.2 [ 5.386099] PCI: setting IRQ 14 as level-triggered [ 5.386102] pci 0000:00:1a.7: found PCI INT C -> IRQ 14 [ 5.386133] pci 0000:00:1a.7: sharing IRQ 14 with 0000:00:1d.2 [ 5.386144] pci 0000:00:1a.7: sharing IRQ 14 with 0000:00:1f.3 [ 5.414581] PCI: setting IRQ 3 as level-triggered [ 5.414587] pci 0000:00:1d.0: found PCI INT A -> IRQ 3 [ 5.414631] pci 0000:00:1d.0: sharing IRQ 3 with 0000:00:1d.7 [ 5.414672] pci 0000:00:1d.1: found PCI INT B -> IRQ 11 [ 5.414692] pci 0000:00:1d.1: sharing IRQ 11 with 0000:00:1a.2 [ 5.414712] pci 0000:00:1d.1: sharing IRQ 11 with 0000:00:1f.2 [ 5.414747] pci 0000:00:1d.2: found PCI INT C -> IRQ 14 [ 5.414769] pci 0000:00:1d.2: sharing IRQ 14 with 0000:00:1a.7 [ 5.414789] pci 0000:00:1d.2: sharing IRQ 14 with 0000:00:1f.3 [ 5.414828] pci 0000:00:1d.7: found PCI INT A -> IRQ 3 [ 5.414855] pci 0000:00:1d.7: sharing IRQ 3 with 0000:00:1d.0 [ 7.012713] pci 0000:00:1d.7: EHCI: BIOS handoff failed (BIOS bug?) 01010001 [ 7.012852] pci 0000:02:00.0: Boot video device [ 7.012895] Unpacking initramfs... [ 7.028884] Freeing initrd memory: 29754k freed [ 7.032797] PCI-DMA: Using software bounce buffering for IO (SWIOTLB) [ 7.032801] DMA: Placing 64MB software IO TLB between ffff88001c9ce000 - ffff8800209ce000 [ 7.032803] DMA: software IO TLB at phys 0x1c9ce000 - 0x209ce000 [ 7.032879] platform rtc_cmos: registered platform RTC device (no PNP device found) [ 7.033534] audit: initializing netlink socket (disabled) [ 7.033542] type=2000 audit(1338671115.003:1): initialized [ 7.036697] HugeTLB registered 2 MB page size, pre-allocated 0 pages [ 7.037841] VFS: Disk quotas dquot_6.5.2 [ 7.037876] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 7.037933] msgmni has been set to 32768 [ 7.038334] alg: No test for stdrng (krng) [ 7.038373] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 7.038375] io scheduler noop registered [ 7.038376] io scheduler anticipatory registered [ 7.038378] io scheduler deadline registered [ 7.038414] io scheduler cfq registered (default) [ 7.038549] alloc irq_desc for 561 on node -1 [ 7.038551] alloc kstat_irqs on node -1 [ 7.038586] pcieport 0000:00:01.0: setting latency timer to 64 [ 7.038728] alloc irq_desc for 560 on node -1 [ 7.038730] alloc kstat_irqs on node -1 [ 7.038750] pcieport 0000:00:03.0: setting latency timer to 64 [ 7.038887] alloc irq_desc for 559 on node -1 [ 7.038888] alloc kstat_irqs on node -1 [ 7.038909] pcieport 0000:00:07.0: setting latency timer to 64 [ 7.039035] alloc irq_desc for 558 on node -1 [ 7.039037] alloc kstat_irqs on node -1 [ 7.039060] pcieport 0000:00:1c.0: setting latency timer to 64 [ 7.039197] alloc irq_desc for 557 on node -1 [ 7.039198] alloc kstat_irqs on node -1 [ 7.039221] pcieport 0000:00:1c.4: setting latency timer to 64 [ 7.044790] registering netback [ 7.044866] alloc irq_desc for 556 on node -1 [ 7.044868] alloc kstat_irqs on node -1 [ 7.045652] alloc irq_desc for 555 on node -1 [ 7.045653] alloc kstat_irqs on node -1 [ 7.045810] Linux agpgart interface v0.103 [ 7.045838] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 7.046030] input: Macintosh mouse button emulation as /devices/virtual/input/input0 [ 7.046062] PNP: No PS/2 controller found. Probing ports directly. [ 7.048150] serio: i8042 KBD port at 0x60,0x64 irq 1 [ 7.048155] serio: i8042 AUX port at 0x60,0x64 irq 12 [ 7.048211] mice: PS/2 mouse device common for all mice [ 7.048258] rtc_cmos rtc_cmos: rtc core: registered rtc_cmos as rtc0 [ 7.048284] rtc0: alarms up to one day, 114 bytes nvram [ 7.048290] cpuidle: using governor ladder [ 7.048292] cpuidle: using governor menu [ 7.048295] No iBFT detected. [ 7.048480] TCP cubic registered [ 7.048554] NET: Registered protocol family 10 [ 7.049045] Mobile IPv6 [ 7.049047] NET: Registered protocol family 17 [ 7.049097] PM: Resume from disk failed. [ 7.049104] registered taskstats version 1 [ 7.049703] rtc_cmos rtc_cmos: setting system clock to 2012-06-02 21:05:14 UTC (1338671114) [ 7.049735] Initalizing network drop monitor service [ 7.049789] Freeing unused kernel memory: 604k freed [ 7.049868] Write protecting the kernel read-only data: 4336k [ 7.070238] udev[168]: starting version 164 [ 7.086267] usbcore: registered new interface driver usbfs [ 7.086282] usbcore: registered new interface driver hub [ 7.086319] usbcore: registered new device driver usb [ 7.087969] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded [ 7.087994] r8169 0000:06:00.0: found PCI INT A -> IRQ 10 [ 7.088012] r8169 0000:06:00.0: sharing IRQ 10 with 0000:00:1a.0 [ 7.088040] r8169 0000:06:00.0: sharing IRQ 10 with 0000:02:00.0 [ 7.088093] r8169 0000:06:00.0: setting latency timer to 64 [ 7.088146] alloc irq_desc for 554 on node -1 [ 7.088148] alloc kstat_irqs on node -1 [ 7.088497] r8169 0000:06:00.0: eth0: RTL8168c/8111c at 0xffffc90003024000, 6c:62:6d:a0:72:05, XID 1c4000c0 IRQ 554 [ 7.089153] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 7.089171] ehci_hcd 0000:00:1a.7: found PCI INT C -> IRQ 14 [ 7.089204] ehci_hcd 0000:00:1a.7: sharing IRQ 14 with 0000:00:1d.2 [ 7.089215] ehci_hcd 0000:00:1a.7: sharing IRQ 14 with 0000:00:1f.3 [ 7.089241] ehci_hcd 0000:00:1a.7: setting latency timer to 64 [ 7.089244] ehci_hcd 0000:00:1a.7: EHCI Host Controller [ 7.089258] ehci_hcd 0000:00:1a.7: new USB bus registered, assigned bus number 1 [ 7.089302] ehci_hcd 0000:00:1a.7: debug port 1 [ 7.090716] uhci_hcd: USB Universal Host Controller Interface driver [ 7.093188] ehci_hcd 0000:00:1a.7: cache line size of 32 is not supported [ 7.093201] ehci_hcd 0000:00:1a.7: request interrupt 14 failed [ 7.093240] ehci_hcd 0000:00:1a.7: USB bus 1 deregistered [ 7.093258] ehci_hcd 0000:00:1a.7: init 0000:00:1a.7 fail, -38 [ 7.093298] ehci_hcd: probe of 0000:00:1a.7 failed with error -38 [ 7.093328] uhci_hcd 0000:00:1a.0: found PCI INT A -> IRQ 10 [ 7.093384] uhci_hcd 0000:00:1a.0: sharing IRQ 10 with 0000:02:00.0 [ 7.093400] uhci_hcd 0000:00:1a.0: setting latency timer to 64 [ 7.093404] uhci_hcd 0000:00:1a.0: UHCI Host Controller [ 7.093421] uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 1 [ 7.093451] uhci_hcd 0000:00:1a.0: request interrupt 10 failed [ 7.093494] uhci_hcd 0000:00:1a.0: USB bus 1 deregistered [ 7.093513] uhci_hcd 0000:00:1a.0: init 0000:00:1a.0 fail, -38 [ 7.093557] uhci_hcd: probe of 0000:00:1a.0 failed with error -38 [ 7.093580] ehci_hcd 0000:00:1d.7: found PCI INT A -> IRQ 3 [ 7.093608] ehci_hcd 0000:00:1d.7: sharing IRQ 3 with 0000:00:1d.0 [ 7.093649] ehci_hcd 0000:00:1d.7: setting latency timer to 64 [ 7.093652] ehci_hcd 0000:00:1d.7: EHCI Host Controller [ 7.093664] ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 1 [ 7.093702] ehci_hcd 0000:00:1d.7: debug port 1 [ 7.097582] ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported [ 7.097585] ehci_hcd 0000:00:1d.7: request interrupt 3 failed [ 7.097623] ehci_hcd 0000:00:1d.7: USB bus 1 deregistered [ 7.097639] ehci_hcd 0000:00:1d.7: init 0000:00:1d.7 fail, -38 [ 7.097678] ehci_hcd: probe of 0000:00:1d.7 failed with error -38 [ 7.097721] uhci_hcd 0000:00:1a.1: found PCI INT B -> IRQ 15 [ 7.097789] uhci_hcd 0000:00:1a.1: setting latency timer to 64 [ 7.097793] uhci_hcd 0000:00:1a.1: UHCI Host Controller [ 7.097808] uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 1 [ 7.097837] uhci_hcd 0000:00:1a.1: request interrupt 15 failed [ 7.097879] uhci_hcd 0000:00:1a.1: USB bus 1 deregistered [ 7.097897] uhci_hcd 0000:00:1a.1: init 0000:00:1a.1 fail, -38 [ 7.097942] uhci_hcd: probe of 0000:00:1a.1 failed with error -38 [ 7.097958] uhci_hcd 0000:00:1a.2: found PCI INT D -> IRQ 11 [ 7.097995] uhci_hcd 0000:00:1a.2: sharing IRQ 11 with 0000:00:1d.1 [ 7.098009] uhci_hcd 0000:00:1a.2: sharing IRQ 11 with 0000:00:1f.2 [ 7.098013] SCSI subsystem initialized [ 7.098028] uhci_hcd 0000:00:1a.2: setting latency timer to 64 [ 7.098032] uhci_hcd 0000:00:1a.2: UHCI Host Controller [ 7.098047] uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 1 [ 7.098077] uhci_hcd 0000:00:1a.2: request interrupt 11 failed [ 7.098120] uhci_hcd 0000:00:1a.2: USB bus 1 deregistered [ 7.098136] uhci_hcd 0000:00:1a.2: init 0000:00:1a.2 fail, -38 [ 7.098180] uhci_hcd: probe of 0000:00:1a.2 failed with error -38 [ 7.098198] uhci_hcd 0000:00:1d.0: found PCI INT A -> IRQ 3 [ 7.098241] uhci_hcd 0000:00:1d.0: sharing IRQ 3 with 0000:00:1d.7 [ 7.098267] uhci_hcd 0000:00:1d.0: setting latency timer to 64 [ 7.098271] uhci_hcd 0000:00:1d.0: UHCI Host Controller [ 7.098285] uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 1 [ 7.098315] uhci_hcd 0000:00:1d.0: request interrupt 3 failed [ 7.098356] uhci_hcd 0000:00:1d.0: USB bus 1 deregistered [ 7.098373] uhci_hcd 0000:00:1d.0: init 0000:00:1d.0 fail, -38 [ 7.098423] uhci_hcd: probe of 0000:00:1d.0 failed with error -38 [ 7.098440] uhci_hcd 0000:00:1d.1: found PCI INT B -> IRQ 11 [ 7.098466] uhci_hcd 0000:00:1d.1: sharing IRQ 11 with 0000:00:1a.2 [ 7.098493] uhci_hcd 0000:00:1d.1: sharing IRQ 11 with 0000:00:1f.2 [ 7.098512] uhci_hcd 0000:00:1d.1: setting latency timer to 64 [ 7.098516] uhci_hcd 0000:00:1d.1: UHCI Host Controller [ 7.098531] uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 1 [ 7.098560] uhci_hcd 0000:00:1d.1: request interrupt 11 failed [ 7.098602] uhci_hcd 0000:00:1d.1: USB bus 1 deregistered [ 7.098618] uhci_hcd 0000:00:1d.1: init 0000:00:1d.1 fail, -38 [ 7.098672] uhci_hcd: probe of 0000:00:1d.1 failed with error -38 [ 7.098687] uhci_hcd 0000:00:1d.2: found PCI INT C -> IRQ 14 [ 7.098710] uhci_hcd 0000:00:1d.2: sharing IRQ 14 with 0000:00:1a.7 [ 7.098730] uhci_hcd 0000:00:1d.2: sharing IRQ 14 with 0000:00:1f.3 [ 7.098744] uhci_hcd 0000:00:1d.2: setting latency timer to 64 [ 7.098747] uhci_hcd 0000:00:1d.2: UHCI Host Controller [ 7.098759] uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 1 [ 7.098784] uhci_hcd 0000:00:1d.2: request interrupt 14 failed [ 7.098821] uhci_hcd 0000:00:1d.2: USB bus 1 deregistered [ 7.098833] uhci_hcd 0000:00:1d.2: init 0000:00:1d.2 fail, -38 [ 7.098871] uhci_hcd: probe of 0000:00:1d.2 failed with error -38 [ 7.099958] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input1 [ 7.106033] libata version 3.00 loaded. [ 7.107791] ahci 0000:00:1f.2: version 3.0 [ 7.107806] ahci 0000:00:1f.2: found PCI INT B -> IRQ 11 [ 7.107826] ahci 0000:00:1f.2: sharing IRQ 11 with 0000:00:1a.2 [ 7.107837] ahci 0000:00:1f.2: sharing IRQ 11 with 0000:00:1d.1 [ 7.107895] alloc irq_desc for 553 on node -1 [ 7.107897] alloc kstat_irqs on node -1 [ 7.107934] ahci: SSS flag set, parallel bus scan disabled [ 7.107968] ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode [ 7.107971] ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc ems sxs [ 7.107976] ahci 0000:00:1f.2: setting latency timer to 64 [ 7.144788] scsi0 : ahci [ 7.144855] scsi1 : ahci [ 7.144917] scsi2 : ahci [ 7.144970] scsi3 : ahci [ 7.145031] scsi4 : ahci [ 7.145090] scsi5 : ahci [ 7.145117] ata1: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa100 irq 553 [ 7.145119] ata2: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa180 irq 553 [ 7.145122] ata3: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa200 irq 553 [ 7.145124] ata4: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa280 irq 553 [ 7.145126] ata5: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa300 irq 553 [ 7.145128] ata6: SATA max UDMA/133 abar m2048@0xf9ffa000 port 0xf9ffa380 irq 553 [ 7.460723] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 7.489450] ata1.00: ATA-8: ST31500341AS, CC1H, max UDMA/133 [ 7.489455] ata1.00: 2930277168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 7.531403] ata1.00: configured for UDMA/133 [ 7.548813] scsi 0:0:0:0: Direct-Access ATA ST31500341AS CC1H PQ: 0 ANSI: 5 [ 8.272724] ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 8.301405] ata2.00: ATA-8: ST31500341AS, CC1H, max UDMA/133 [ 8.301410] ata2.00: 2930277168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 8.343349] ata2.00: configured for UDMA/133 [ 8.356815] scsi 1:0:0:0: Direct-Access ATA ST31500341AS CC1H PQ: 0 ANSI: 5 [ 9.080722] ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 9.112504] ata3.00: ATA-8: ST31500341AS, CC1H, max UDMA/133 [ 9.112509] ata3.00: 2930277168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 9.154542] ata3.00: configured for UDMA/133 [ 9.168803] scsi 2:0:0:0: Direct-Access ATA ST31500341AS CC1H PQ: 0 ANSI: 5 [ 9.892720] ata4: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 9.921522] ata4.00: ATA-8: ST31500341AS, CC1H, max UDMA/133 [ 9.921526] ata4.00: 2930277168 sectors, multi 0: LBA48 NCQ (depth 31/32) [ 9.963596] ata4.00: configured for UDMA/133 [ 9.976797] scsi 3:0:0:0: Direct-Access ATA ST31500341AS CC1H PQ: 0 ANSI: 5 [ 10.296721] ata5: SATA link down (SStatus 0 SControl 300) [ 10.636718] ata6: SATA link down (SStatus 0 SControl 300) [ 10.656678] sd 0:0:0:0: [sda] 2930277168 512-byte logical blocks: (1.50 TB/1.36 TiB) [ 10.656739] sd 1:0:0:0: [sdb] 2930277168 512-byte logical blocks: (1.50 TB/1.36 TiB) [ 10.656742] sd 0:0:0:0: [sda] Write Protect is off [ 10.656743] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 [ 10.656776] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 10.656801] sd 1:0:0:0: [sdb] Write Protect is off [ 10.656803] sd 1:0:0:0: [sdb] Mode Sense: 00 3a 00 00 [ 10.656823] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 10.656921] sda: [ 10.656964] sdb: [ 10.657032] sd 2:0:0:0: [sdc] 2930277168 512-byte logical blocks: (1.50 TB/1.36 TiB) [ 10.657079] sd 2:0:0:0: [sdc] Write Protect is off [ 10.657081] sd 2:0:0:0: [sdc] Mode Sense: 00 3a 00 00 [ 10.657101] sd 2:0:0:0: [sdc] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 10.657204] sdc: [ 10.657358] sd 3:0:0:0: [sdd] 2930277168 512-byte logical blocks: (1.50 TB/1.36 TiB) [ 10.657411] sd 3:0:0:0: [sdd] Write Protect is off [ 10.657413] sd 3:0:0:0: [sdd] Mode Sense: 00 3a 00 00 [ 10.657432] sd 3:0:0:0: [sdd] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 10.657534] sdd: sda1 sda2 sda3 sda4 [ 10.672225] sd 0:0:0:0: [sda] Attached SCSI disk [ 10.674742] sdd1 sdd2 sdd3 sdd4 [ 10.675145] sd 3:0:0:0: [sdd] Attached SCSI disk [ 10.680425] sdb1 sdb2 sdb3 sdb4 [ 10.680814] sd 1:0:0:0: [sdb] Attached SCSI disk [ 10.681216] sdc1 sdc2 sdc3 sdc4 [ 10.681606] sd 2:0:0:0: [sdc] Attached SCSI disk [ 10.951914] md: raid0 personality registered for level 0 [ 10.954707] md: raid1 personality registered for level 1 [ 10.956749] async_tx: api initialized (async) [ 10.957166] xor: automatically using best checksumming function: generic_sse [ 10.974529] generic_sse: 3767.000 MB/sec [ 10.974531] xor: using function: generic_sse (3767.000 MB/sec) [ 11.042533] raid6: int64x1 3356 MB/s [ 11.110540] raid6: int64x2 4270 MB/s [ 11.178539] raid6: int64x4 2984 MB/s [ 11.246548] raid6: int64x8 2948 MB/s [ 11.314528] raid6: sse2x1 7702 MB/s [ 11.382535] raid6: sse2x2 8938 MB/s [ 11.450532] raid6: sse2x4 10054 MB/s [ 11.450534] raid6: using algorithm sse2x4 (10054 MB/s) [ 11.453150] md: raid6 personality registered for level 6 [ 11.453152] md: raid5 personality registered for level 5 [ 11.453153] md: raid4 personality registered for level 4 [ 11.457829] md: raid10 personality registered for level 10 [ 11.460193] 3ware Storage Controller device driver for Linux v1.26.02.002. [ 11.462762] 3ware 9000 Storage Controller device driver for Linux v2.26.02.013. [ 11.465865] Adaptec aacraid driver 1.1-7[28000]-ms [ 11.526546] mdadm: sending ioctl 1261 to a partition! [ 11.526548] mdadm: sending ioctl 1261 to a partition! [ 11.526852] mdadm: sending ioctl 1261 to a partition! [ 11.526856] mdadm: sending ioctl 1261 to a partition! [ 11.527149] mdadm: sending ioctl 1261 to a partition! [ 11.527151] mdadm: sending ioctl 1261 to a partition! [ 11.527537] mdadm: sending ioctl 1261 to a partition! [ 11.527541] mdadm: sending ioctl 1261 to a partition! [ 11.528129] mdadm: sending ioctl 1261 to a partition! [ 11.528133] mdadm: sending ioctl 1261 to a partition! [ 11.535445] md: md0 stopped. [ 11.537450] md: bind [ 11.537671] md: bind [ 11.539210] md: bind [ 11.540397] md: bind [ 11.541627] raid1: raid set md0 active with 4 out of 4 mirrors [ 11.541643] md0: detected capacity change from 0 to 2152923136 [ 11.542611] md0: [ 11.547251] md: md1 stopped. [ 11.548846] md: bind [ 11.549072] md: bind [ 11.551287] md: bind [ 11.552226] md: bind [ 11.553468] raid1: raid set md1 active with 4 out of 4 mirrors [ 11.553483] md1: detected capacity change from 0 to 271319040 [ 11.554467] md1: [ 11.561426] md: md2 stopped. [ 11.571044] unknown partition table [ 11.580029] md: bind [ 11.580454] md: bind [ 11.580723] md: bind [ 11.583198] md: bind [ 11.584396] raid5: device sda3 operational as raid disk 0 [ 11.584398] raid5: device sdd3 operational as raid disk 3 [ 11.584399] raid5: device sdc3 operational as raid disk 2 [ 11.584401] raid5: device sdb3 operational as raid disk 1 [ 11.584857] raid5: allocated 4282kB for md2 [ 11.584884] 0: w=1 pa=0 pr=4 m=2 a=2 r=4 op1=0 op2=0 [ 11.584887] 3: w=2 pa=0 pr=4 m=2 a=2 r=4 op1=0 op2=0 [ 11.584888] 2: w=3 pa=0 pr=4 m=2 a=2 r=4 op1=0 op2=0 [ 11.584890] 1: w=4 pa=0 pr=4 m=2 a=2 r=4 op1=0 op2=0 [ 11.584892] raid5: raid level 6 set md2 active with 4 out of 4 devices, algorithm 2 [ 11.584893] RAID5 conf printout: [ 11.584894] --- rd:4 wd:4 [ 11.584896] disk 0, o:1, dev:sda3 [ 11.584897] disk 1, o:1, dev:sdb3 [ 11.584899] disk 2, o:1, dev:sdc3 [ 11.584900] disk 3, o:1, dev:sdd3 [ 11.584921] md2: detected capacity change from 0 to 4309909504 [ 11.585918] md2: unknown partition table [ 11.593292] md: md3 stopped. [ 11.610190] md: bind [ 11.617251] md: bind [ 11.622250] md: bind [ 11.623085] md: bind [ 11.624231] raid5: device sda4 operational as raid disk 0 [ 11.624234] raid5: device sdd4 operational as raid disk 3 [ 11.624235] raid5: device sdc4 operational as raid disk 2 [ 11.624237] raid5: device sdb4 operational as raid disk 1 [ 11.624500] raid5: allocated 4282kB for md3 [ 11.624529] 0: w=1 pa=0 pr=4 m=1 a=2 r=4 op1=0 op2=0 [ 11.624531] 3: w=2 pa=0 pr=4 m=1 a=2 r=4 op1=0 op2=0 [ 11.624533] 2: w=3 pa=0 pr=4 m=1 a=2 r=4 op1=0 op2=0 [ 11.624535] 1: w=4 pa=0 pr=4 m=1 a=2 r=4 op1=0 op2=0 [ 11.624536] raid5: raid level 5 set md3 active with 4 out of 4 devices, algorithm 2 [ 11.624538] RAID5 conf printout: [ 11.624539] --- rd:4 wd:4 [ 11.624540] disk 0, o:1, dev:sda4 [ 11.624542] disk 1, o:1, dev:sdb4 [ 11.624543] disk 2, o:1, dev:sdc4 [ 11.624544] disk 3, o:1, dev:sdd4 [ 11.624561] md3: detected capacity change from 0 to 4487149780992 [ 11.625561] md3: unknown partition table [ 11.630945] device-mapper: uevent: version 1.0.3 [ 11.631026] device-mapper: ioctl: 4.15.0-ioctl (2009-04-01) initialised: dm-devel@redhat.com [ 11.737748] PM: Starting manual resume from disk [ 11.737750] PM: Resume from partition 8:1 [ 11.737752] PM: Checking hibernation image. [ 11.738408] PM: Error -22 checking image file [ 11.738411] PM: Resume from disk failed. [ 11.747092] EXT3-fs: INFO: recovery required on readonly filesystem. [ 11.747096] EXT3-fs: write access will be enabled during recovery. [ 12.001862] kjournald starting. Commit interval 5 seconds [ 12.001870] EXT3-fs: recovery complete. [ 12.005811] EXT3-fs: mounted filesystem with ordered data mode. [ 12.850243] udev[455]: starting version 164 [ 13.003403] input: PC Speaker as /devices/platform/pcspkr/input/input2 [ 13.007911] i801_smbus 0000:00:1f.3: found PCI INT C -> IRQ 14 [ 13.007935] i801_smbus 0000:00:1f.3: sharing IRQ 14 with 0000:00:1a.7 [ 13.007947] i801_smbus 0000:00:1f.3: sharing IRQ 14 with 0000:00:1d.2 [ 13.372002] Error: Driver 'pcspkr' is already registered, aborting... [ 13.432617] HDA Intel 0000:02:00.1: found PCI INT B -> IRQ 5 [ 13.432668] hda_intel: Disable MSI for Nvidia chipset [ 13.432719] hda-intel: unable to grab IRQ 5, disabling device [ 13.432783] HDA Intel: probe of 0000:02:00.1 failed with error -16 [ 13.763984] Adding 2102456k swap on /dev/md0. Priority:-1 extents:1 across:2102456k [ 13.766656] EXT3-fs warning: maximal mount count reached, running e2fsck is recommended [ 13.780065] EXT3 FS on md2, internal journal [ 13.854472] loop: module loaded [ 14.332498] kjournald starting. Commit interval 5 seconds [ 14.332518] EXT3-fs warning: maximal mount count reached, running e2fsck is recommended [ 14.332924] EXT3 FS on md1, internal journal [ 14.332929] EXT3-fs: recovery complete. [ 14.333462] EXT3-fs: mounted filesystem with ordered data mode. [ 14.440947] kjournald starting. Commit interval 5 seconds [ 14.440953] EXT3-fs warning: maximal mount count reached, running e2fsck is recommended [ 14.487241] EXT3 FS on md3, internal journal [ 14.487246] EXT3-fs: recovery complete. [ 14.487250] EXT3-fs: mounted filesystem with ordered data mode. [ 14.840198] r8169 0000:06:00.0: eth0: link down [ 14.840206] r8169 0000:06:00.0: eth0: link down [ 14.841221] ADDRCONF(NETDEV_UP): eth0: link is not ready [ 15.343001] fuse init (API version 7.13) [ 15.537238] Event-channel device installed. [ 15.837972] alloc irq_desc for 552 on node -1 [ 15.837974] alloc kstat_irqs on node -1 [ 15.838004] alloc irq_desc for 551 on node -1 [ 15.838006] alloc kstat_irqs on node -1 [ 15.838156] XENBUS: Unable to read cpu state [ 15.838277] XENBUS: Unable to read cpu state [ 15.838423] XENBUS: Unable to read cpu state [ 15.838532] XENBUS: Unable to read cpu state [ 15.838640] XENBUS: Unable to read cpu state [ 15.838748] XENBUS: Unable to read cpu state [ 15.838854] XENBUS: Unable to read cpu state [ 15.838960] XENBUS: Unable to read cpu state [ 15.839065] XENBUS: Unable to read cpu state [ 15.839171] XENBUS: Unable to read cpu state [ 15.839276] XENBUS: Unable to read cpu state [ 15.839384] XENBUS: Unable to read cpu state [ 16.797692] Bridge firewalling registered [ 17.488275] r8169 0000:06:00.0: eth0: link up [ 17.489372] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 28.396708] eth0: no IPv6 routers present [ 50.109845] alloc irq_desc for 550 on node -1 [ 50.109848] alloc kstat_irqs on node -1 [ 50.297549] alloc irq_desc for 549 on node -1 [ 50.297552] alloc kstat_irqs on node -1 [ 50.379961] ip_tables: (C) 2000-2006 Netfilter Core Team [ 50.457516] nf_conntrack version 0.5.0 (16384 buckets, 65536 max) [ 50.457685] CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use [ 50.457687] nf_conntrack.acct=1 kernel parameter, acct=1 nf_conntrack module option or [ 50.457688] sysctl net.netfilter.nf_conntrack_acct=1 to enable it. [ 50.488368] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 50.499377] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 50.501009] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 50.501012] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 51.972953] blkback: ring-ref 8, event-channel 63, protocol 1 (x86_64-abi) [ 51.972985] alloc irq_desc for 548 on node -1 [ 51.972988] alloc kstat_irqs on node -1 [ 51.981918] blkback: ring-ref 768, event-channel 64, protocol 1 (x86_64-abi) [ 51.981934] alloc irq_desc for 547 on node -1 [ 51.981936] alloc kstat_irqs on node -1 [ 51.999287] blkback: ring-ref 771, event-channel 66, protocol 1 (x86_64-abi) [ 51.999302] alloc irq_desc for 546 on node -1 [ 51.999304] alloc kstat_irqs on node -1 [ 52.007159] alloc irq_desc for 545 on node -1 [ 52.007162] alloc kstat_irqs on node -1 [ 58.633380] alloc irq_desc for 544 on node -1 [ 58.633383] alloc kstat_irqs on node -1 [ 58.837769] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.837773] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.839540] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.839543] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.839545] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.841606] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.841610] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.841612] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.843266] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.843269] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.843272] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.843274] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 58.892320] alloc irq_desc for 543 on node -1 [ 58.892322] alloc kstat_irqs on node -1 [ 59.486087] blkback: ring-ref 8, event-channel 63, protocol 1 (x86_64-abi) [ 59.486116] alloc irq_desc for 542 on node -1 [ 59.486118] alloc kstat_irqs on node -1 [ 59.496936] blkback: ring-ref 9, event-channel 64, protocol 1 (x86_64-abi) [ 59.496949] alloc irq_desc for 541 on node -1 [ 59.496950] alloc kstat_irqs on node -1 [ 59.507401] blkback: ring-ref 10, event-channel 65, protocol 1 (x86_64-abi) [ 59.507413] alloc irq_desc for 540 on node -1 [ 59.507415] alloc kstat_irqs on node -1 [ 59.614676] alloc irq_desc for 539 on node -1 [ 59.614678] alloc kstat_irqs on node -1 [ 60.332661] vif1.0: no IPv6 routers present [ 68.884954] vif2.0: no IPv6 routers present [ 70.590651] alloc irq_desc for 538 on node -1 [ 70.590654] alloc kstat_irqs on node -1 [ 70.771436] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.771441] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.771443] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.771445] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.773897] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.773900] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.773903] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.773905] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.773907] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.776415] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.776419] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.776423] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.776425] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.776428] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778274] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778279] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778283] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778286] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778289] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.778292] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 70.839351] alloc irq_desc for 537 on node -1 [ 70.839354] alloc kstat_irqs on node -1 [ 71.467841] alloc irq_desc for 536 on node -1 [ 71.467844] alloc kstat_irqs on node -1 [ 71.468493] blkback: ring-ref 770, event-channel 64, protocol 1 (x86_64-abi) [ 71.468505] alloc irq_desc for 535 on node -1 [ 71.468507] alloc kstat_irqs on node -1 [ 71.483003] blkback: ring-ref 771, event-channel 65, protocol 1 (x86_64-abi) [ 71.483018] alloc irq_desc for 534 on node -1 [ 71.483020] alloc kstat_irqs on node -1 [ 71.491437] blkback: ring-ref 772, event-channel 66, protocol 1 (x86_64-abi) [ 71.491450] alloc irq_desc for 533 on node -1 [ 71.491452] alloc kstat_irqs on node -1 [ 77.077466] alloc irq_desc for 532 on node -1 [ 77.077469] alloc kstat_irqs on node -1 [ 77.394365] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.394368] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.394370] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.394373] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.394375] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.394377] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396069] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396072] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396075] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396077] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396079] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396081] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.396083] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398424] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398427] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398430] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398432] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398435] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398438] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.398441] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400189] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400193] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400195] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400197] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400199] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400201] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400203] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.400205] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 77.443743] alloc irq_desc for 531 on node -1 [ 77.443745] alloc kstat_irqs on node -1 [ 78.076700] blkback: ring-ref 8, event-channel 63, protocol 1 (x86_64-abi) [ 78.076735] alloc irq_desc for 530 on node -1 [ 78.076736] alloc kstat_irqs on node -1 [ 78.088947] blkback: ring-ref 770, event-channel 65, protocol 1 (x86_64-abi) [ 78.088962] alloc irq_desc for 529 on node -1 [ 78.088963] alloc kstat_irqs on node -1 [ 78.153935] alloc irq_desc for 528 on node -1 [ 78.153937] alloc kstat_irqs on node -1 [ 78.154545] blkback: ring-ref 771, event-channel 66, protocol 1 (x86_64-abi) [ 78.154559] alloc irq_desc for 527 on node -1 [ 78.154561] alloc kstat_irqs on node -1 [ 78.160284] blkback: ring-ref 772, event-channel 67, protocol 1 (x86_64-abi) [ 78.160299] alloc irq_desc for 526 on node -1 [ 78.160300] alloc kstat_irqs on node -1 [ 81.741939] vif3.0: no IPv6 routers present [ 83.257645] alloc irq_desc for 525 on node -1 [ 83.257647] alloc kstat_irqs on node -1 [ 83.450601] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450606] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450608] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450610] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450612] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450614] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450616] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.450619] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452519] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452522] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452524] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452528] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452530] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452532] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452534] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452536] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.452538] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455134] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455138] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455141] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455144] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455147] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455149] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455152] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455155] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.455157] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457355] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457359] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457361] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457363] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457366] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457368] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457370] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457373] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457375] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.457377] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 83.493883] alloc irq_desc for 524 on node -1 [ 83.493886] alloc kstat_irqs on node -1 [ 84.988630] blkback: ring-ref 8, event-channel 63, protocol 1 (x86_64-abi) [ 84.988671] alloc irq_desc for 523 on node -1 [ 84.988673] alloc kstat_irqs on node -1 [ 84.999610] blkback: ring-ref 768, event-channel 64, protocol 1 (x86_64-abi) [ 84.999635] alloc irq_desc for 522 on node -1 [ 84.999636] alloc kstat_irqs on node -1 [ 85.019939] blkback: ring-ref 771, event-channel 66, protocol 1 (x86_64-abi) [ 85.019955] alloc irq_desc for 521 on node -1 [ 85.019957] alloc kstat_irqs on node -1 [ 85.032714] alloc irq_desc for 520 on node -1 [ 85.032717] alloc kstat_irqs on node -1 [ 87.492584] vif4.0: no IPv6 routers present [ 89.980170] alloc irq_desc for 519 on node -1 [ 89.980173] alloc kstat_irqs on node -1 [ 90.140856] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140861] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140864] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140867] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140870] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140872] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140875] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140878] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140881] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.140884] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142965] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142968] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142970] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142972] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142974] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142977] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142979] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142981] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142983] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142985] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.142987] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145194] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145197] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145200] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145202] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145204] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145206] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145208] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145210] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145213] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145215] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.145217] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147500] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147504] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147507] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147510] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147513] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147516] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147518] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147523] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147525] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147528] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147531] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.147534] physdev match: using --physdev-out in the OUTPUT, FORWARD and POSTROUTING chains for non-bridged traffic is not supported anymore. [ 90.197690] alloc irq_desc for 518 on node -1 [ 90.197692] alloc kstat_irqs on node -1 [ 90.698961] alloc irq_desc for 517 on node -1 [ 90.698964] alloc kstat_irqs on node -1 [ 90.699858] blkback: ring-ref 770, event-channel 64, protocol 1 (x86_64-abi) [ 90.699876] alloc irq_desc for 516 on node -1 [ 90.699878] alloc kstat_irqs on node -1 [ 90.711588] blkback: ring-ref 771, event-channel 65, protocol 1 (x86_64-abi) [ 90.711607] alloc irq_desc for 515 on node -1 [ 90.711608] alloc kstat_irqs on node -1 [ 94.272586] vif5.0: no IPv6 routers present [ 100.332601] vif6.0: no IPv6 routers present [ 6714.397700] md: data-check of RAID array md1 [ 6714.397702] md: minimum _guaranteed_ speed: 1000 KB/sec/disk. [ 6714.397704] md: using maximum available idle IO bandwidth (but not more than 200000 KB/sec) for data-check. [ 6714.397708] md: using 128k window, over a total of 264960 blocks. [ 6714.560070] md: delaying data-check of md2 until md1 has finished (they share one or more physical units) [ 6714.578031] md: delaying data-check of md3 until md2 has finished (they share one or more physical units) [ 6714.578038] md: delaying data-check of md2 until md1 has finished (they share one or more physical units) [ 6721.351752] md: md1: data-check done. [ 6721.365392] md: data-check of RAID array md2 [ 6721.365394] md: minimum _guaranteed_ speed: 1000 KB/sec/disk. [ 6721.365396] md: using maximum available idle IO bandwidth (but not more than 200000 KB/sec) for data-check. [ 6721.365399] md: using 128k window, over a total of 2104448 blocks. [ 6721.365412] md: delaying data-check of md3 until md2 has finished (they share one or more physical units) [ 6750.942813] md: md2: data-check done. [ 6750.946200] md: data-check of RAID array md3 [ 6750.946202] md: minimum _guaranteed_ speed: 1000 KB/sec/disk. [ 6750.946204] md: using maximum available idle IO bandwidth (but not more than 200000 KB/sec) for data-check. [ 6750.946207] md: using 128k window, over a total of 1460660736 blocks. [56197.064117] md: md3: data-check done. _______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users From xen-devel-bounces@lists.xen.org Thu Jun 07 09:36:01 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 Jun 2012 09:36:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ScZ8C-00075u-OO; Thu, 07 Jun 2012 09:35:52 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ScNcW-00077K-J8 for xen-devel@lists.xen.org; Wed, 06 Jun 2012 21:18:26 +0000 Received: from [85.158.139.83:5292] by server-12.bemta-5.messagelabs.com id 93/56-18374-F19CFCF4; Wed, 06 Jun 2012 21:18:23 +0000 X-Env-Sender: mukesh.rathor@oracle.com X-Msg-Ref: server-9.tower-182.messagelabs.com!1339017489!31462131!1 X-Originating-IP: [141.146.126.227] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTQxLjE0Ni4xMjYuMjI3ID0+IDU3NTE3MA==\n, ML_RADAR_SPEW_LINKS_8,spamassassin: ,async_handler: YXN5bmNfZGVsYXk6IDcwNDY4ODQgKHRpbWVvdXQp\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6651 invoked from network); 6 Jun 2012 21:18:11 -0000 Received: from acsinet15.oracle.com (HELO acsinet15.oracle.com) (141.146.126.227) by server-9.tower-182.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 6 Jun 2012 21:18:11 -0000 Received: from ucsinet22.oracle.com (ucsinet22.oracle.com [156.151.31.94]) by acsinet15.oracle.com (Sentrion-MTA-4.2.2/Sentrion-MTA-4.2.2) with ESMTP id q56LHugt006974 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 6 Jun 2012 21:17:57 GMT Received: from acsmt358.oracle.com (acsmt358.oracle.com [141.146.40.158]) by ucsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id q56LHsKJ023387 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 6 Jun 2012 21:17:55 GMT Received: from abhmt120.oracle.com (abhmt120.oracle.com [141.146.116.72]) by acsmt358.oracle.com (8.12.11.20060308/8.12.11) with ESMTP id q56LHrn5005232; Wed, 6 Jun 2012 16:17:53 -0500 Received: from mantra.us.oracle.com (/130.35.68.95) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 06 Jun 2012 14:17:53 -0700 Date: Wed, 6 Jun 2012 14:17:51 -0700 From: Mukesh Rathor To: Ian Campbell Message-ID: <20120606141751.37305f89@mantra.us.oracle.com> In-Reply-To: <1338974024.32319.29.camel@zakaz.uk.xensource.com> References: <64CC3033-765F-450F-A262-B19676ECA99A@cs.wisc.edu> <1338974024.32319.29.camel@zakaz.uk.xensource.com> Organization: Oracle Corporation X-Mailer: Claws Mail 3.7.6 (GTK+ 2.18.9; x86_64-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="MP_/61SL/dFgoelVIa2N/5RWWnn" X-Source-IP: ucsinet22.oracle.com [156.151.31.94] X-Mailman-Approved-At: Thu, 07 Jun 2012 09:35:51 +0000 Cc: James Paton , "xen-devel@lists.xen.org" Subject: Re: [Xen-devel] Debugging Dom0 kernel over serial X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --MP_/61SL/dFgoelVIa2N/5RWWnn Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Disposition: inline On Wed, 6 Jun 2012 10:13:44 +0100 Ian Campbell wrote: > On Wed, 2012-06-06 at 00:24 +0100, James Paton wrote: > > Hi, > > > > Apologies if this is not the appropriate list, but I thought I > > would have better luck here than on xen-users. > > > > I'm a CS graduate student hacking on the xen-blkback driver and > > would like to be able to debug it using gdb over serial. I have > > spent a great deal of time on this with no success (more details > > can be found at http://bit.ly/KMEF6o (Stack Overflow)). > > > > It eventually occurred to me that it might not even be possible to > > do what I'm trying to do if Xen intercepts interrupts from the > > serial port and tries to direct them to dom0 through some > > unexpected channel. Then, after I've done `echo g > > > /proc/sysrq_trigger`, the kernel debugger might not see the > > > interrupt. Can anyone confirm or disconfirm this? > > It's not something I've ever tried but I expect that if you avoid > console=com1 (or com*) on your hypervisor command line then the com > port should be available for dom0 just like on native. > > Alternatively you could perhaps separate the two by using com1 for Xen > and com2/ttyS1 for dom0/kdb etc. > > I've no idea if kdb would be expected to work over hvc*. I suspect > you'd be treading fresh ground with that one... > > I'd also start by taking virtual box out of the equation on the host > side. Start by using a MacOS terminal emulator and checking that you > can see the dom0 console messages and login via a getty running on > ttyS0 before trying to hook up gdb. > > > What is the usual procedure for debugging the Dom0 kernel? > > Printk ;-) > > Ian. I wrote up a debugger for xen, also (mis)named kdb. It halts the system, lets you poke memory, data structs, set breakpoints, etc. To use it, you must have prior experience of a kernel debugger. I am attaching patch build for changeset 25287 in unstable tree, if you wanna try it. Start with kdb/README. Mukesh --MP_/61SL/dFgoelVIa2N/5RWWnn Content-Type: text/x-patch Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=kdb.patch diff -r 54c8c9eaee92 xen/Makefile --- a/xen/Makefile Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/Makefile Wed Jun 06 14:17:11 2012 -0700 @@ -61,6 +61,7 @@ _clean: delete-unfresh-files $(MAKE) -f $(BASEDIR)/Rules.mk -C xsm clean $(MAKE) -f $(BASEDIR)/Rules.mk -C crypto clean $(MAKE) -f $(BASEDIR)/Rules.mk -C arch/$(TARGET_ARCH) clean + $(MAKE) -f $(BASEDIR)/Rules.mk -C kdb clean rm -f include/asm *.o $(TARGET) $(TARGET).gz $(TARGET)-syms *~ core rm -f include/asm-*/asm-offsets.h [ -d tools/figlet ] && rm -f .banner* @@ -129,7 +130,7 @@ include/asm-$(TARGET_ARCH)/asm-offsets.h echo ""; \ echo "#endif") <$< >$@ -SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers +SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers kdb define all_sources ( find include/asm-$(TARGET_ARCH) -name '*.h' -print; \ find include -name 'asm-*' -prune -o -name '*.h' -print; \ diff -r 54c8c9eaee92 xen/Rules.mk --- a/xen/Rules.mk Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/Rules.mk Wed Jun 06 14:17:11 2012 -0700 @@ -10,6 +10,7 @@ lock_profile ?= n crash_debug ?= n frame_pointer ?= n lto ?= n +kdb ?= n include $(XEN_ROOT)/Config.mk @@ -40,6 +41,7 @@ ALL_OBJS-y += $(BASEDIR)/d ALL_OBJS-y += $(BASEDIR)/xsm/built_in.o ALL_OBJS-y += $(BASEDIR)/arch/$(TARGET_ARCH)/built_in.o ALL_OBJS-$(x86) += $(BASEDIR)/crypto/built_in.o +ALL_OBJS-$(kdb) += $(BASEDIR)/kdb/built_in.o CFLAGS-y += -g -D__XEN__ -include $(BASEDIR)/include/xen/config.h CFLAGS-$(XSM_ENABLE) += -DXSM_ENABLE @@ -53,6 +55,7 @@ CFLAGS-$(lock_profile) += -DLOCK_PROFIL CFLAGS-$(HAS_ACPI) += -DHAS_ACPI CFLAGS-$(HAS_PASSTHROUGH) += -DHAS_PASSTHROUGH CFLAGS-$(frame_pointer) += -fno-omit-frame-pointer -DCONFIG_FRAME_POINTER +CFLAGS-$(kdb) += -DXEN_KDB_CONFIG ifneq ($(max_phys_cpus),) CFLAGS-y += -DMAX_PHYS_CPUS=$(max_phys_cpus) diff -r 54c8c9eaee92 xen/arch/x86/hvm/svm/entry.S --- a/xen/arch/x86/hvm/svm/entry.S Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/svm/entry.S Wed Jun 06 14:17:11 2012 -0700 @@ -59,12 +59,23 @@ ENTRY(svm_asm_do_resume) get_current(bx) CLGI +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) testl $~0,(r(dx),r(ax),1) jnz .Lsvm_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0, VCPU_nsvm_hap_enabled(r(bx)) UNLIKELY_START(nz, nsvm_hap) mov VCPU_nhvm_p2m(r(bx)),r(ax) diff -r 54c8c9eaee92 xen/arch/x86/hvm/svm/svm.c --- a/xen/arch/x86/hvm/svm/svm.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/svm/svm.c Wed Jun 06 14:17:11 2012 -0700 @@ -2170,6 +2170,10 @@ void svm_vmexit_handler(struct cpu_user_ break; case VMEXIT_EXCEPTION_DB: +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( !v->domain->debugger_attached ) goto exit_and_crash; domain_pause_for_debugger(); @@ -2182,6 +2186,10 @@ void svm_vmexit_handler(struct cpu_user_ if ( (inst_len = __get_instruction_length(v, INSTR_INT3)) == 0 ) break; __update_guest_eip(regs, inst_len); +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_int3, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; diff -r 54c8c9eaee92 xen/arch/x86/hvm/svm/vmcb.c --- a/xen/arch/x86/hvm/svm/vmcb.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/svm/vmcb.c Wed Jun 06 14:17:11 2012 -0700 @@ -315,6 +315,36 @@ void setup_vmcb_dump(void) register_keyhandler('v', &vmcb_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +/* did == 0 : display for all HVM domains. domid 0 is never HVM. + * * vid == -1 : display for all HVM VCPUs + * */ +void kdb_dump_vmcb(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + + rcu_read_lock(&domlist_read_lock); + for_each_domain (dp) { + if (!is_hvm_or_hyb_domain(dp) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + kdbp(" VMCB [domid: %d vcpu:%d]:\n", dp->domain_id, vp->vcpu_id); + svm_vmcb_dump("kdb", vp->arch.hvm_svm.vmcb); + kdbp("\n"); + } + kdbp("\n"); + } + rcu_read_unlock(&domlist_read_lock); +} +#endif + /* * Local variables: * mode: C diff -r 54c8c9eaee92 xen/arch/x86/hvm/vmx/entry.S --- a/xen/arch/x86/hvm/vmx/entry.S Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/vmx/entry.S Wed Jun 06 14:17:11 2012 -0700 @@ -124,12 +124,23 @@ vmx_asm_do_vmentry: get_current(bx) cli +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) cmpl $0,(r(dx),r(ax),1) jnz .Lvmx_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0xff,VCPU_vmx_emulate(r(bx)) jnz .Lvmx_goto_emulator testb $0xff,VCPU_vmx_realmode(r(bx)) diff -r 54c8c9eaee92 xen/arch/x86/hvm/vmx/vmcs.c --- a/xen/arch/x86/hvm/vmx/vmcs.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Wed Jun 06 14:17:11 2012 -0700 @@ -1117,6 +1117,13 @@ void vmx_do_resume(struct vcpu *v) hvm_asid_flush_vcpu(v); } +#if defined(XEN_KDB_CONFIG) + if (kdb_dr7) + __vmwrite(GUEST_DR7, kdb_dr7); + else + __vmwrite(GUEST_DR7, 0); +#endif + debug_state = v->domain->debugger_attached || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_INT3] || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]; @@ -1326,6 +1333,220 @@ void setup_vmcs_dump(void) register_keyhandler('v', &vmcs_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +#define GUEST_EFER 0x2806 /* see page 23-20 */ +#define GUEST_EFER_HIGH 0x2807 /* see page 23-20 */ + +/* it's a shame we can't use vmcs_dump_vcpu(), but it does vmx_vmcs_enter which + * will IPI other CPUs. also, print a subset relevant to software debugging */ +static void noinline kdb_print_vmcs(struct vcpu *vp) +{ + struct cpu_user_regs *regs = &vp->arch.user_regs; + unsigned long long x; + + kdbp("*** Guest State ***\n"); + kdbp("CR0: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR0), + (unsigned long long)vmr(CR0_READ_SHADOW), + (unsigned long long)vmr(CR0_GUEST_HOST_MASK)); + kdbp("CR4: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR4), + (unsigned long long)vmr(CR4_READ_SHADOW), + (unsigned long long)vmr(CR4_GUEST_HOST_MASK)); + kdbp("CR3: actual=0x%016llx, target_count=%d\n", + (unsigned long long)vmr(GUEST_CR3), + (int)vmr(CR3_TARGET_COUNT)); + kdbp(" target0=%016llx, target1=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE0), + (unsigned long long)vmr(CR3_TARGET_VALUE1)); + kdbp(" target2=%016llx, target3=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE2), + (unsigned long long)vmr(CR3_TARGET_VALUE3)); + kdbp("RSP = 0x%016llx (0x%016llx) RIP = 0x%016llx (0x%016llx)\n", + (unsigned long long)vmr(GUEST_RSP), + (unsigned long long)regs->esp, + (unsigned long long)vmr(GUEST_RIP), + (unsigned long long)regs->eip); + kdbp("RFLAGS=0x%016llx (0x%016llx) DR7 = 0x%016llx\n", + (unsigned long long)vmr(GUEST_RFLAGS), + (unsigned long long)regs->eflags, + (unsigned long long)vmr(GUEST_DR7)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(GUEST_SYSENTER_ESP), + (int)vmr(GUEST_SYSENTER_CS), + (unsigned long long)vmr(GUEST_SYSENTER_EIP)); + vmx_dump_sel("CS", GUEST_CS_SELECTOR); + vmx_dump_sel("DS", GUEST_DS_SELECTOR); + vmx_dump_sel("SS", GUEST_SS_SELECTOR); + vmx_dump_sel("ES", GUEST_ES_SELECTOR); + vmx_dump_sel("FS", GUEST_FS_SELECTOR); + vmx_dump_sel("GS", GUEST_GS_SELECTOR); + vmx_dump_sel2("GDTR", GUEST_GDTR_LIMIT); + vmx_dump_sel("LDTR", GUEST_LDTR_SELECTOR); + vmx_dump_sel2("IDTR", GUEST_IDTR_LIMIT); + vmx_dump_sel("TR", GUEST_TR_SELECTOR); + kdbp("Guest EFER = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_EFER_HIGH), (uint32_t)vmr(GUEST_EFER)); + kdbp("Guest PAT = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_PAT_HIGH), (uint32_t)vmr(GUEST_PAT)); + x = (unsigned long long)vmr(TSC_OFFSET_HIGH) << 32; + x |= (uint32_t)vmr(TSC_OFFSET); + kdbp("TSC Offset = %016llx\n", x); + x = (unsigned long long)vmr(GUEST_IA32_DEBUGCTL_HIGH) << 32; + x |= (uint32_t)vmr(GUEST_IA32_DEBUGCTL); + kdbp("DebugCtl=%016llx DebugExceptions=%016llx\n", x, + (unsigned long long)vmr(GUEST_PENDING_DBG_EXCEPTIONS)); + kdbp("Interruptibility=%04x ActivityState=%04x\n", + (int)vmr(GUEST_INTERRUPTIBILITY_INFO), + (int)vmr(GUEST_ACTIVITY_STATE)); + + kdbp("MSRs: entry_load:$%d exit_load:$%d exit_store:$%d\n", + vmr(VM_ENTRY_MSR_LOAD_COUNT), vmr(VM_EXIT_MSR_LOAD_COUNT), + vmr(VM_EXIT_MSR_STORE_COUNT)); + + kdbp("\n*** Host State ***\n"); + kdbp("RSP = 0x%016llx RIP = 0x%016llx\n", + (unsigned long long)vmr(HOST_RSP), + (unsigned long long)vmr(HOST_RIP)); + kdbp("CS=%04x DS=%04x ES=%04x FS=%04x GS=%04x SS=%04x TR=%04x\n", + (uint16_t)vmr(HOST_CS_SELECTOR), + (uint16_t)vmr(HOST_DS_SELECTOR), + (uint16_t)vmr(HOST_ES_SELECTOR), + (uint16_t)vmr(HOST_FS_SELECTOR), + (uint16_t)vmr(HOST_GS_SELECTOR), + (uint16_t)vmr(HOST_SS_SELECTOR), + (uint16_t)vmr(HOST_TR_SELECTOR)); + kdbp("FSBase=%016llx GSBase=%016llx TRBase=%016llx\n", + (unsigned long long)vmr(HOST_FS_BASE), + (unsigned long long)vmr(HOST_GS_BASE), + (unsigned long long)vmr(HOST_TR_BASE)); + kdbp("GDTBase=%016llx IDTBase=%016llx\n", + (unsigned long long)vmr(HOST_GDTR_BASE), + (unsigned long long)vmr(HOST_IDTR_BASE)); + kdbp("CR0=%016llx CR3=%016llx CR4=%016llx\n", + (unsigned long long)vmr(HOST_CR0), + (unsigned long long)vmr(HOST_CR3), + (unsigned long long)vmr(HOST_CR4)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(HOST_SYSENTER_ESP), + (int)vmr(HOST_SYSENTER_CS), + (unsigned long long)vmr(HOST_SYSENTER_EIP)); + kdbp("Host PAT = 0x%08x%08x\n", + (uint32_t)vmr(HOST_PAT_HIGH), (uint32_t)vmr(HOST_PAT)); + + kdbp("\n*** Control State ***\n"); + kdbp("PinBased=%08x CPUBased=%08x SecondaryExec=%08x\n", + (uint32_t)vmr(PIN_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(CPU_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(SECONDARY_VM_EXEC_CONTROL)); + kdbp("EntryControls=%08x ExitControls=%08x\n", + (uint32_t)vmr(VM_ENTRY_CONTROLS), + (uint32_t)vmr(VM_EXIT_CONTROLS)); + kdbp("ExceptionBitmap=%08x\n", + (uint32_t)vmr(EXCEPTION_BITMAP)); + kdbp("PAGE_FAULT_ERROR_CODE MASK:0x%lx MATCH:0x%lx\n", + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MASK), + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MATCH)); + kdbp("VMEntry: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_ENTRY_INTR_INFO), + (uint32_t)vmr(VM_ENTRY_EXCEPTION_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp("VMExit: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_EXIT_INTR_INFO), + (uint32_t)vmr(VM_EXIT_INTR_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp(" reason=%08x qualification=%08x\n", + (uint32_t)vmr(VM_EXIT_REASON), + (uint32_t)vmr(EXIT_QUALIFICATION)); + kdbp("IDTVectoring: info=%08x errcode=%08x\n", + (uint32_t)vmr(IDT_VECTORING_INFO), + (uint32_t)vmr(IDT_VECTORING_ERROR_CODE)); + kdbp("TPR Threshold = 0x%02x\n", + (uint32_t)vmr(TPR_THRESHOLD)); + kdbp("EPT pointer = 0x%08x%08x\n", + (uint32_t)vmr(EPT_POINTER_HIGH), (uint32_t)vmr(EPT_POINTER)); + kdbp("Virtual processor ID = 0x%04x\n", + (uint32_t)vmr(VIRTUAL_PROCESSOR_ID)); + kdbp("=================================================================\n"); +} + +/* Flush VMCS on this cpu if it needs to: + * - Upon leaving kdb, the HVM cpu will resume in vmx_vmexit_handler() and + * do __vmreads. So, the VMCS pointer can't be left cleared. + * - Doing __vmpclear will set the vmx state to 'clear', so to resume a + * vmlaunch must be done and not vmresume. This means, we must clear + * arch_vmx->launched. + */ +void kdb_curr_cpu_flush_vmcs(void) +{ + struct domain *dp; + struct vcpu *vp; + int ccpu = smp_processor_id(); + struct vmcs_struct *cvp = this_cpu(current_vmcs); + + if (this_cpu(current_vmcs) == NULL) + return; /* no HVM active on this CPU */ + + kdbp("KDB:[%d] curvmcs:%lx/%lx\n", ccpu, cvp, virt_to_maddr(cvp)); + + /* looks like we got one. unfortunately, current_vmcs points to vmcs + * and not VCPU, so we gotta search the entire list... */ + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + for_each_vcpu (dp, vp) { + if ( vp->arch.hvm_vmx.vmcs == cvp ) { + __vmpclear(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + __vmptrld(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + vp->arch.hvm_vmx.launched = 0; + this_cpu(current_vmcs) = NULL; + kdbp("KDB:[%d] %d:%d current_vmcs:%lx flushed\n", + ccpu, dp->domain_id, vp->vcpu_id, cvp, virt_to_maddr(cvp)); + } + } + } +} + +/* + * domid == 0 : display for all HVM domains (dom0 is never an HVM domain) + * vcpu id == -1 : display all vcpuids + * PreCondition: all HVM cpus (including current cpu) have flushed VMCS + */ +void kdb_dump_vmcs(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + struct vmcs_struct *vmcsp; + u64 addr = -1; + + ASSERT(!local_irq_is_enabled()); /* kdb should always run disabled */ + __vmptrst(&addr); + + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + vmcsp = vp->arch.hvm_vmx.vmcs; + kdbp("VMCS %lx/%lx [domid:%d (%p) vcpu:%d (%p)]:\n", vmcsp, + virt_to_maddr(vmcsp), dp->domain_id, dp, vp->vcpu_id, vp); + __vmptrld(virt_to_maddr(vmcsp)); + kdb_print_vmcs(vp); + __vmpclear(virt_to_maddr(vmcsp)); + vp->arch.hvm_vmx.launched = 0; + } + kdbp("\n"); + } + /* restore orig vmcs pointer for __vmreads in vmx_vmexit_handler() */ + if (addr && addr != (u64)-1) + __vmptrld(addr); +} +#endif /* * Local variables: diff -r 54c8c9eaee92 xen/arch/x86/hvm/vmx/vmx.c --- a/xen/arch/x86/hvm/vmx/vmx.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/hvm/vmx/vmx.c Wed Jun 06 14:17:11 2012 -0700 @@ -2197,11 +2197,14 @@ static void vmx_failed_vmentry(unsigned printk("reason not known yet!"); break; } - +#if defined(XEN_KDB_CONFIG) + kdbp("\n************* VMCS Area **************\n"); + kdb_dump_vmcs(curr->domain->domain_id, (curr)->vcpu_id); +#else printk("************* VMCS Area **************\n"); vmcs_dump_vcpu(curr); printk("**************************************\n"); - +#endif domain_crash(curr->domain); } @@ -2429,6 +2432,12 @@ void vmx_vmexit_handler(struct cpu_user_ write_debugreg(6, exit_qualification | 0xffff0ff0); if ( !v->domain->debugger_attached || cpu_has_monitor_trap_flag ) goto exit_and_crash; + +#if defined(XEN_KDB_CONFIG) + /* TRAP_debug: IP points correctly to next instr */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif domain_pause_for_debugger(); break; case TRAP_int3: @@ -2437,6 +2446,13 @@ void vmx_vmexit_handler(struct cpu_user_ if ( v->domain->debugger_attached ) { update_guest_eip(); /* Safe: INT3 */ +#if defined(XEN_KDB_CONFIG) + /* vmcs.IP points to bp, kdb expects bp+1. Hence after the above + * update_guest_eip which updates to bp+1. works for gdbsx too + */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; @@ -2716,6 +2732,10 @@ void vmx_vmexit_handler(struct cpu_user_ case EXIT_REASON_MONITOR_TRAP_FLAG: v->arch.hvm_vmx.exec_control &= ~CPU_BASED_MONITOR_TRAP_FLAG; vmx_update_cpu_exec_control(v); +#if defined(XEN_KDB_CONFIG) + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( v->arch.hvm_vcpu.single_step ) { hvm_memory_event_single_step(regs->eip); if ( v->domain->debugger_attached ) diff -r 54c8c9eaee92 xen/arch/x86/irq.c --- a/xen/arch/x86/irq.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/irq.c Wed Jun 06 14:17:11 2012 -0700 @@ -2296,3 +2296,29 @@ bool_t hvm_domain_use_pirq(const struct return is_hvm_domain(d) && pirq && pirq->arch.hvm.emuirq != IRQ_UNBOUND; } + +#ifdef XEN_KDB_CONFIG +void kdb_prnt_guest_mapped_irqs(void) +{ + int irq, j; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + kdbp("irq vec aff type domid:mapped-pirq pairs (all in decimal)\n"); + for (irq=0; irq < nr_irqs; irq++) { + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + irq_guest_action_t *actp = (irq_guest_action_t *)dp->action; + + if (!dp->handler ||dp->handler==&no_irq_type || !(dp->status&IRQ_GUEST)) + continue; + + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %3d %3s %-13s ", irq, archp->vector, affstr, + dp->handler->typename); + for (j=0; j < actp->nr_guests; j++) + kdbp("%03d:%04d ", actp->guest[j]->domain_id, + domain_irq_to_pirq(actp->guest[j], irq)); + kdbp("\n"); + } +} +#endif diff -r 54c8c9eaee92 xen/arch/x86/setup.c --- a/xen/arch/x86/setup.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/setup.c Wed Jun 06 14:17:11 2012 -0700 @@ -47,6 +47,13 @@ #include #include +#ifdef XEN_KDB_CONFIG +#include + +int opt_earlykdb=0; +boolean_param("earlykdb", opt_earlykdb); +#endif + /* opt_nosmp: If true, secondary processors are ignored. */ static bool_t __initdata opt_nosmp; boolean_param("nosmp", opt_nosmp); @@ -1242,6 +1249,11 @@ void __init __start_xen(unsigned long mb trap_init(); +#ifdef XEN_KDB_CONFIG + kdb_init(); + if (opt_earlykdb) + kdb_trap_immed(KDB_TRAP_NONFATAL); +#endif rcu_init(); early_time_init(); diff -r 54c8c9eaee92 xen/arch/x86/smp.c --- a/xen/arch/x86/smp.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/smp.c Wed Jun 06 14:17:11 2012 -0700 @@ -273,7 +273,7 @@ void smp_send_event_check_mask(const cpu * Structure and data for smp_call_function()/on_selected_cpus(). */ -static void __smp_call_function_interrupt(void); +static void __smp_call_function_interrupt(struct cpu_user_regs *regs); static DEFINE_SPINLOCK(call_lock); static struct call_data_struct { void (*func) (void *info); @@ -321,7 +321,7 @@ void on_selected_cpus( if ( cpumask_test_cpu(smp_processor_id(), &call_data.selected) ) { local_irq_disable(); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(NULL); local_irq_enable(); } @@ -390,7 +390,7 @@ void event_check_interrupt(struct cpu_us this_cpu(irq_count)++; } -static void __smp_call_function_interrupt(void) +static void __smp_call_function_interrupt(struct cpu_user_regs *regs) { void (*func)(void *info) = call_data.func; void *info = call_data.info; @@ -411,6 +411,11 @@ static void __smp_call_function_interrup { mb(); cpumask_clear_cpu(cpu, &call_data.selected); +#ifdef XEN_KDB_CONFIG + if (info && !strcmp(info, "XENKDB")) { /* called from kdb */ + (*(void (*)(struct cpu_user_regs *, void *))func)(regs, info); + } else +#endif (*func)(info); } @@ -421,5 +426,5 @@ void call_function_interrupt(struct cpu_ { ack_APIC_irq(); perfc_incr(ipis); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(regs); } diff -r 54c8c9eaee92 xen/arch/x86/time.c --- a/xen/arch/x86/time.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/time.c Wed Jun 06 14:17:11 2012 -0700 @@ -2007,6 +2007,46 @@ static int __init setup_dump_softtsc(voi } __initcall(setup_dump_softtsc); +#ifdef XEN_KDB_CONFIG +void kdb_time_resume(int update_domains) +{ + s_time_t now; + int ccpu = smp_processor_id(); + struct cpu_time *t = &this_cpu(cpu_time); + + if (!plt_src.read_counter) /* not initialized for earlykdb */ + return; + + if (update_domains) { + plt_stamp = plt_src.read_counter(); + platform_timer_stamp = plt_stamp64; + platform_time_calibration(); + do_settime(get_cmos_time(), 0, read_platform_stime()); + } + if (local_irq_is_enabled()) + kdbp("kdb BUG: enabled in time_resume(). ccpu:%d\n", ccpu); + + rdtscll(t->local_tsc_stamp); + now = read_platform_stime(); + t->stime_master_stamp = now; + t->stime_local_stamp = now; + + update_vcpu_system_time(current); + + if (update_domains) + set_timer(&calibration_timer, NOW() + EPOCH); +} + +void kdb_dump_time_pcpu(void) +{ + int cpu; + for_each_online_cpu(cpu) { + kdbp("[%d]: cpu_time: %016lx\n", cpu, &per_cpu(cpu_time, cpu)); + kdbp("[%d]: cpu_calibration: %016lx\n", cpu, + &per_cpu(cpu_calibration, cpu)); + } +} +#endif /* * Local variables: * mode: C diff -r 54c8c9eaee92 xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/traps.c Wed Jun 06 14:17:11 2012 -0700 @@ -225,7 +225,7 @@ static void show_trace(struct cpu_user_r #else -static void show_trace(struct cpu_user_regs *regs) +void show_trace(struct cpu_user_regs *regs) { unsigned long *frame, next, addr, low, high; @@ -3325,6 +3325,10 @@ void do_nmi(struct cpu_user_regs *regs) if ( nmi_callback(regs, cpu) ) return; +#ifdef XEN_KDB_CONFIG + if (kdb_enabled && kdb_handle_trap_entry(TRAP_nmi, regs)) + return; +#endif if ( nmi_watchdog ) nmi_watchdog_tick(regs); diff -r 54c8c9eaee92 xen/arch/x86/x86_64/compat/entry.S --- a/xen/arch/x86/x86_64/compat/entry.S Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/x86_64/compat/entry.S Wed Jun 06 14:17:11 2012 -0700 @@ -95,6 +95,10 @@ compat_skip_clobber: /* %rbx: struct vcpu */ ENTRY(compat_test_all_events) cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG + testl $1, kdb_session_begun(%rip) + jnz compat_restore_all_guest +#endif /*compat_test_softirqs:*/ movl VCPU_processor(%rbx),%eax shlq $IRQSTAT_shift,%rax diff -r 54c8c9eaee92 xen/arch/x86/x86_64/entry.S --- a/xen/arch/x86/x86_64/entry.S Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/arch/x86/x86_64/entry.S Wed Jun 06 14:17:11 2012 -0700 @@ -184,6 +184,10 @@ skip_clobber: /* %rbx: struct vcpu */ test_all_events: cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG /* 64bit dom0 will resume here */ + testl $1, kdb_session_begun(%rip) + jnz restore_all_guest +#endif /*test_softirqs:*/ movl VCPU_processor(%rbx),%eax shl $IRQSTAT_shift,%rax @@ -545,6 +549,13 @@ ENTRY(debug) ENTRY(int3) pushq $0 +#ifdef XEN_KDB_CONFIG + pushq %rax + GET_CPUINFO_FIELD(CPUINFO_processor_id, %rax) + movq (%rax), %rax + lock bts %rax, kdb_cpu_traps(%rip) + popq %rax +#endif movl $TRAP_int3,4(%rsp) jmp handle_exception diff -r 54c8c9eaee92 xen/common/domain.c --- a/xen/common/domain.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/common/domain.c Wed Jun 06 14:17:11 2012 -0700 @@ -530,6 +530,14 @@ void domain_shutdown(struct domain *d, u { struct vcpu *v; +#ifdef XEN_KDB_CONFIG + if (reason == SHUTDOWN_crash) { + if ( IS_PRIV(d) ) + kdb_trap_immed(KDB_TRAP_FATAL); + else + kdb_trap_immed(KDB_TRAP_NONFATAL); + } +#endif spin_lock(&d->shutdown_lock); if ( d->shutdown_code == -1 ) @@ -624,7 +632,9 @@ void domain_pause_for_debugger(void) for_each_vcpu ( d, v ) vcpu_sleep_nosync(v); - send_global_virq(VIRQ_DEBUGGER); + /* send VIRQ_DEBUGGER to guest only if gdbsx_vcpu_event is not active */ + if (current->arch.gdbsx_vcpu_event == 0) + send_global_virq(VIRQ_DEBUGGER); } /* Complete domain destroy after RCU readers are not holding old references. */ diff -r 54c8c9eaee92 xen/common/sched_credit.c --- a/xen/common/sched_credit.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/common/sched_credit.c Wed Jun 06 14:17:11 2012 -0700 @@ -1475,6 +1475,33 @@ csched_dump_vcpu(struct csched_vcpu *svc printk("\n"); } +#ifdef XEN_KDB_CONFIG +static void kdb_csched_dump(int cpu) +{ + struct csched_pcpu *pcpup = CSCHED_PCPU(cpu); + struct vcpu *scurrvp = (CSCHED_VCPU(current))->vcpu; + struct list_head *tmp, *runq = RUNQ(cpu); + + kdbp(" csched_pcpu: %p\n", pcpup); + kdbp(" curr csched:%p {vcpu:%p id:%d domid:%d}\n", (current)->sched_priv, + scurrvp, scurrvp->vcpu_id, scurrvp->domain->domain_id); + kdbp(" runq:\n"); + + /* next is top of struct, so screw stupid, ugly hard to follow macros */ + if (offsetof(struct csched_vcpu, runq_elem.next) != 0) { + kdbp("next is not first in struct csched_vcpu. please fixme\n"); + return; /* otherwise for loop will crash */ + } + for (tmp = runq->next; tmp != runq; tmp = tmp->next) { + + struct csched_vcpu *csp = (struct csched_vcpu *)tmp; + struct vcpu *vp = csp->vcpu; + kdbp(" csp:%p pri:%02d vcpu: {p:%p id:%d domid:%d}\n", csp, + csp->pri, vp, vp->vcpu_id, vp->domain->domain_id); + }; +} +#endif + static void csched_dump_pcpu(const struct scheduler *ops, int cpu) { @@ -1484,6 +1511,10 @@ csched_dump_pcpu(const struct scheduler int loop; #define cpustr keyhandler_scratch +#ifdef XEN_KDB_CONFIG + kdb_csched_dump(cpu); + return; +#endif spc = CSCHED_PCPU(cpu); runq = &spc->runq; diff -r 54c8c9eaee92 xen/common/schedule.c --- a/xen/common/schedule.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/common/schedule.c Wed Jun 06 14:17:11 2012 -0700 @@ -1454,6 +1454,25 @@ void wait(void) schedule(); } +#ifdef XEN_KDB_CONFIG +void kdb_print_sched_info(void) +{ + int cpu; + + kdbp("Scheduler: name:%s opt_name:%s id:%d\n", ops.name, ops.opt_name, + ops.sched_id); + kdbp("per cpu schedule_data:\n"); + for_each_online_cpu(cpu) { + struct schedule_data *p = &per_cpu(schedule_data, cpu); + kdbp(" cpu:%d &(per cpu)schedule_data:%p\n", cpu, p); + kdbp(" curr:%p sched_priv:%p\n", p->curr, p->sched_priv); + kdbp("\n"); + ops.dump_cpu_state(&ops, cpu); + kdbp("\n"); + } +} +#endif + #ifdef CONFIG_COMPAT #include "compat/schedule.c" #endif diff -r 54c8c9eaee92 xen/common/symbols.c --- a/xen/common/symbols.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/common/symbols.c Wed Jun 06 14:17:11 2012 -0700 @@ -168,3 +168,21 @@ void __print_symbol(const char *fmt, uns spin_unlock_irqrestore(&lock, flags); } + +#ifdef XEN_KDB_CONFIG +/* + * * Given a symbol, return its address + * */ +unsigned long address_lookup(char *symp) +{ + int i, off = 0; + char namebuf[KSYM_NAME_LEN+1]; + + for (i=0; i < symbols_num_syms; i++) { + off = symbols_expand_symbol(off, namebuf); + if (strcmp(namebuf, symp) == 0) /* found it */ + return symbols_address(i); + } + return 0; +} +#endif diff -r 54c8c9eaee92 xen/common/timer.c --- a/xen/common/timer.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/common/timer.c Wed Jun 06 14:17:11 2012 -0700 @@ -643,6 +643,48 @@ void __init timer_init(void) register_keyhandler('a', &dump_timerq_keyhandler); } +#ifdef XEN_KDB_CONFIG +#include +void kdb_dump_timer_queues(void) +{ + struct timer *t; + struct timers *ts; + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1]; + int cpu, j; + u64 tsc; + + for_each_online_cpu( cpu ) + { + ts = &per_cpu(timers, cpu); + kdbp("CPU[%02d]:", cpu); + + if (cpu == smp_processor_id()) { + s_time_t now = NOW(); + rdtscll(tsc); + kdbp("NOW:0x%08x%08x TSC:0x%016lx\n", (u32)(now>>32),(u32)now, tsc); + } else + kdbp("\n"); + + /* timers in the heap */ + for ( j = 1; j <= GET_HEAP_SIZE(ts->heap); j++ ) { + t = ts->heap[j]; + kdbp(" %d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + /* timers on the link list */ + for ( t = ts->list, j = 0; t != NULL; t = t->list_next, j++ ) { + kdbp(" L%d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + } +} +#endif + /* * Local variables: * mode: C diff -r 54c8c9eaee92 xen/drivers/char/console.c --- a/xen/drivers/char/console.c Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/drivers/char/console.c Wed Jun 06 14:17:11 2012 -0700 @@ -295,6 +295,21 @@ static void serial_rx(char c, struct cpu { static int switch_code_count = 0; +#ifdef XEN_KDB_CONFIG + /* if ctrl-\ pressed and kdb handles it, return */ + if (kdb_enabled && c == 0x1c) { + if (!kdb_session_begun) { + if (kdb_keyboard(regs)) + return; + } else { + kdbp("Sorry... kdb session already active.. please try again..\n"); + return; + } + } + if (kdb_session_begun) /* kdb should already be polling */ + return; /* swallow chars so they don't buffer in dom0 */ +#endif + if ( switch_code && (c == switch_code) ) { /* We eat CTRL- in groups of 3 to switch console input. */ @@ -710,6 +725,18 @@ void console_end_sync(void) atomic_dec(&print_everything); } +#ifdef XEN_KDB_CONFIG +void console_putc(char c) +{ + serial_putc(sercon_handle, c); +} + +int console_getc(void) +{ + return serial_getc(sercon_handle); +} +#endif + /* * printk rate limiting, lifted from Linux. * diff -r 54c8c9eaee92 xen/include/asm-x86/debugger.h --- a/xen/include/asm-x86/debugger.h Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/include/asm-x86/debugger.h Wed Jun 06 14:17:11 2012 -0700 @@ -39,7 +39,11 @@ #define DEBUGGER_trap_fatal(_v, _r) \ if ( debugger_trap_fatal(_v, _r) ) return; -#if defined(CRASH_DEBUG) +#if defined(XEN_KDB_CONFIG) +#define debugger_trap_immediate() kdb_trap_immed(KDB_TRAP_NONFATAL) +#define debugger_trap_fatal(_v, _r) kdb_trap_fatal(_v, _r) + +#elif defined(CRASH_DEBUG) #include @@ -70,6 +74,10 @@ static inline int debugger_trap_entry( { struct vcpu *v = current; +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(vector, regs)) + return 1; +#endif if ( guest_kernel_mode(v, regs) && v->domain->debugger_attached && ((vector == TRAP_int3) || (vector == TRAP_debug)) ) { diff -r 54c8c9eaee92 xen/include/xen/lib.h --- a/xen/include/xen/lib.h Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/include/xen/lib.h Wed Jun 06 14:17:11 2012 -0700 @@ -116,4 +116,7 @@ extern void add_taint(unsigned); struct cpu_user_regs; void dump_execstate(struct cpu_user_regs *); +#ifdef XEN_KDB_CONFIG +#include "../../kdb/include/kdb_extern.h" +#endif #endif /* __LIB_H__ */ diff -r 54c8c9eaee92 xen/include/xen/sched.h --- a/xen/include/xen/sched.h Fri Apr 27 11:09:26 2012 +0200 +++ b/xen/include/xen/sched.h Wed Jun 06 14:17:11 2012 -0700 @@ -576,11 +576,14 @@ extern void (*dead_idle) (void); unsigned long hypercall_create_continuation( unsigned int op, const char *format, ...); void hypercall_cancel_continuation(void); - +#ifdef XEN_KDB_CONFIG +#define hypercall_preempt_check() (0) +#else #define hypercall_preempt_check() (unlikely( \ softirq_pending(smp_processor_id()) | \ local_events_need_delivery() \ )) +#endif extern struct domain *domain_list; diff -r 54c8c9eaee92 xen/kdb/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/Makefile Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,5 @@ + +obj-y += kdbmain.o kdb_cmds.o kdb_io.o + +subdir-y += x86 guest + diff -r 54c8c9eaee92 xen/kdb/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/README Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,243 @@ + +Welcome to kdb for xen, a hypervisor built in debugger. + +FEATURES: + - set breakpoints in hypervisor + - examine virt/machine memory, registers, domains, vcpus, etc... + - single step, single step till jump/call, step over call to next + instruction after the call. + - examine memory of a PV/HVM guest. + - set breakpoints, single step, etc... for a PV guest. + - breaking into the debugger will freeze the system, all CPUs will pause, + no interrupts are acknowledged in the debugger. (Hence, the wall clock + will drift) + - single step will step only that cpu. + - earlykdb: break into kdb very early during boot. Put "earlykdb" on the + xen command line in grub.conf. + - generic tracing functions (see below) for quick tracing to debug timing + related problems. To use: + o set KDBTRCMAX to max num of recs in circular trc buffer in kdbmain.c + o call kdb_trc() from anywhere in xen + o turn tracing on by setting kdb_trcon in kdbmain.c or trcon command. + o trcp in kdb will give hints to dump trace recs. Use dd to see buffer + o trcz will zero out the entire buffer if needed. + +NOTE: + - since almost all numbers are in hex, 0x is not prefixed. Instead, decimal + numbers are preceded by $, as in $17 (sorry, one gets used to it). Note, + vcpu num, cpu num, domid are always displayed in decimal, without $. + - watchdog must be disabled to use kdb + +ISSUES: + - Currently, debug hypervisor is not supported. Make sure NDEBUG is defined + or compile with debug=n + - "timer went backwards" messages on dom0, but kdb/hyp should be fine. + I usually do "echo 2 > /proc/sys/kernel/printk" when using kdb. + - 32bit hypervisor may hang. Tested on 64bit hypervisor only. + + +TO BUILD: + - do >make kdb=y + +HOW TO USE: + 1. A serial line is needed to use the debugger. Set up a serial line + from the source machine to target victim. Make sure the serial line + is working properly by displaying login prompt and loging in etc.... + + 2. Add following to grub.conf: + kernel /xen.kdb console=com1,vga com1=57600,8n1 dom0_mem=542M + + (57600 or whatever used in step 1 above) + + 3. Boot the hypervisor built with the debugger. + + 4. ctrl-\ (ctrl and backslash) will break into the debugger. If the system is + badly hung, pressing NMI would also break into it. However, once kdb is + entered via NMI, normal execution can't continue. + + 5. type 'h' for list of commands. + + 6. Command line editing is limited to backspace. ctrl-c to start a new cmd. + + + +GUEST debug: + - type sym in the debugger + - for REL4, grep kallsyms_names, kallsyms_addresses, and kallsyms_num_syms + in the guest System.map* file. Run sym again with domid and the three + values on the command line. + - Now basic symbols can be used for guest debug. Note, if the binary is not + built with symbols, only function names are available, but not global vars. + + Eg: sym 0 c0696084 c068a590 c0696080 c06b43e8 c06b4740 + will set symbols for dom 0. Then : + + [4]xkdb> bp some_function 0 + + wills set bp at some_function in dom 0 + + [3]xkdb> dw c068a590 32 0 : display 32 bytes of dom0 memory + + +Tips: + - In "[0]xkdb>" : 0 is the cpu number in decimal + - In + 00000000c042645c: 0:do_timer+17 push %ebp + 0:do_timer : 0 is the domid in hex + offset +17 is in hex. + + absense of 0: would indicate it's a hypervisor function + + - commands starting with kdb (kdb*) are for kdb debug only. + + +Finally, + - think hex. + - bug/problem: enter kdbdbg, reproduce, and send me the output. + If the output is not enough, I may ask to run kdbdbg twice, then collect + output. + + +Thanks, +Mukesh Rathor +Oracle Corporatin, +Redwood Shores, CA 94065 + +-------------------------------------------------------------------------------- +COMMAND DESCRIPTION: + +info: Print basic info like version, compile flags, etc.. + +cur: print current domain id and vcpu id + +f: display current stack. If a vcpu ptr is given, then print stack for that + VCPU by using its IP and SP. + +fg: display stack for a guest given domid, SP and IP. + +dw: display words of memory. 'num' of bytes is optional, but if displaying guest + memory, then is required. + +dd: same as above, but display doublewords. + +dwm: same as above but the address is machine address instead of virtual. + +ddm: same as above, but display doublewords. + +dr: display registers. if 'sp' is specified then print few extra registers. + +drg: display guest context saved on stack bottom. + +dis: disassemble instructions. If disassembling for guest, then 'num' must + be specified. 'num' is number of instrs to display. + +dism: toggle disassembly mode between Intel and ATT/GAS. + +mw: modify word in memory given virtual address. 'domid' may be specified if + modifying guest memory. value is assumed in hex even without 0x. + +md: same as above but modify doubleword. + +mr: modify register. value is assumd hex. + +bc: clear given or all breakpoints + +bp: display breakpoints or set a breakpoint. Domid may be specified to set a bp + in guest. kdb functions may not be specified if debugging kdb. + Example: + xkdb> bp acpi_processor_idle : will set bp in xen + xkdb> bp default_idle 0 : will set bp in domid 0 + xkdb> bp idle_cpu 9 : will set bp in domid 9 + + Conditions may be specified for a bp: lhs == rhs or lhs != rhs + where : lhs is register like 'r6', 'rax', etc... or memory location + rhs is hex value with or without leading 0x. + Thus, + xkdb> bp acpi_processor_idle rdi == c000 + xkdb> bp 0xffffffff80062ebc 0 rsi == ffff880021edbc98 : will break into + kdb at 0xffffffff80062ebc in dom0 when rsi is ffff880021edbc98 + +btp: break point trace. Upon bp, print some info and continue without stopping. + Ex: btp idle_cpu 7 rax rbx 0x20ef5a5 r9 + + will print: rax, rbx, *(long *)0x20ef5a5, r9 upon hitting idle_cpu() and + continue. + +wp: set a watchpoint at a virtual address which can belong to hypervisor or + any guest. Do not specify wp in kdb path if debugging kdb. + +wc: clear given or all watchpoints. + +ni: single step, stepping over function calls. + +ss: single step. Be carefull when in interrupt handlers or context switches. + +ssb: single step to branch. Use with care. + +go: leave kdb and continue. + +cpu: go back to orig cpu when entering kdb. If 'cpu number' given, then switch + to that cpu. If 'all' then show status of all cpus. + +nmi: Only available in hung/crash state. Send NMI to a cpu that may be hung. + +sym: Initialize a symbol table for debugging a guest. Look into the System.map + file of guest for certain symbol values and provide them here. + +vcpuh: Given vcpu ptr, display hvm_vcpu struct. + +vcpu: Display current vcpu struct. If 'vcpu-ptr' given, display that vcpu. + +dom: display current domain. If 'domid' then display that domid. If 'all', then + display all domains. + +sched: show schedular info and run queues. + +mmu: print basic mmu info + +p2m: convert a gpfn to mfn given a domid. value in hex even without 0x. + +m2p: convert mfn to pfn. value in hex even without 0x. + +dpage: display struct page given a mfn or struct page ptr. Since, no info is + kept on page type, we display all possible page types. + +dtrq: display timer queues. + +didt: dump IDT table. + +dgt: dump GDT table. + +dirq: display IRQ bindings. + +dvmc: display all or given dom/vcpu VMCS or VMCB. + +trcon: turn tracing on. Trace hooks must be added in xen and kdb function + called directly from there. + +trcoff: turn tracing off. + +trcz: zero trace buffer. + +trcp: give hints to print the circular trace buffer, like current active ptr. + +usr1: allows to add any arbitraty command quickly. + +-------------------------------------------------------------------------------- +/* + * Copyright (C) 2008 Oracle. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ diff -r 54c8c9eaee92 xen/kdb/guest/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/Makefile Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_guest.o + diff -r 54c8c9eaee92 xen/kdb/guest/kdb_guest.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/kdb_guest.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,342 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +/* information for symbols for a guest (includeing dom 0 ) is saved here */ +struct gst_syminfo { /* guest symbols info */ + int domid; /* which domain */ + int bitness; /* 32 or 64 */ + void *addrtblp; /* ptr to (32/64)addresses tbl */ + u8 *toktbl; /* ptr to kallsyms_token_table */ + u16 *tokidxtbl; /* ptr to kallsyms_token_index */ + u8 *kallsyms_names; /* ptr to kallsyms_names */ + long kallsyms_num_syms; /* ptr to kallsyms_num_syms */ + kdbva_t stext; /* value of _stext in guest */ + kdbva_t etext; /* value of _etext in guest */ + kdbva_t sinittext; /* value of _sinittext in guest */ + kdbva_t einittext; /* value of _einittext in guest */ +}; + +#define MAX_CACHE 16 /* cache upto 16 guests */ +struct gst_syminfo gst_syminfoa[MAX_CACHE]; /* guest symbol info array */ + +static struct gst_syminfo * +kdb_get_syminfo_slot(void) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].addrtblp == NULL) + return (&gst_syminfoa[i]); + + return NULL; +} + +static struct gst_syminfo * +kdb_domid2syminfop(domid_t domid) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].domid == domid) + return (&gst_syminfoa[i]); + + return NULL; +} + +/* check if an address looks like text address in guest */ +int +kdb_is_addr_guest_text(kdbva_t addr, int domid) +{ + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + if (!gp || !gp->stext || !gp->etext) + return 0; + KDBGP1("guestaddr: addr:%lx domid:%d\n", addr, domid); + + return ( (addr >= gp->stext && addr <= gp->etext) || + (addr >= gp->sinittext && addr <= gp->einittext) ); +} + +/* + * returns: value of kallsyms_addresses[idx]; + */ +static kdbva_t +kdb_rd_guest_addrtbl(struct gst_syminfo *gp, int idx) +{ + kdbva_t addr, retaddr=0; + int num = gp->bitness/8; /* whether 4 byte or 8 byte ptrs */ + domid_t id = gp->domid; + + addr = (kdbva_t)(((char *)gp->addrtblp) + idx * num); + KDBGP1("rdguestaddrtbl:addr:%lx idx:%d\n", addr, idx); + + if (kdb_read_mem(addr, (kdbbyt_t *)&retaddr,num,id) != num) { + kdbp("Can't read addrtbl domid:%d at:%lx\n", id, addr); + return 0; + } + KDBGP1("rdguestaddrtbl:exit:retaddr:%lx\n", retaddr); + return retaddr; +} + +/* Based on el5 kallsyms.c file. */ +static unsigned int +kdb_expand_el5_sym(struct gst_syminfo *gp, unsigned int off, char *result) +{ + int len, skipped_first = 0; + u8 u8idx, *tptr, *datap; + domid_t domid = gp->domid; + + *result = '\0'; + + /* get the compressed symbol length from the first symbol byte */ + datap = gp->kallsyms_names + off; + len = 0; + if ((kdb_read_mem((kdbva_t)datap, (kdbbyt_t *)&len, 1, domid)) != 1) { + KDBGP("failed to read guest memory\n"); + return 0; + } + datap++; + + /* update the offset to return the offset for the next symbol on + * the compressed stream */ + off += len + 1; + + /* for every byte on the compressed symbol data, copy the table + * entry for that byte */ + while(len) { + u16 u16idx, *u16p; + if (kdb_read_mem((kdbva_t)datap,(kdbbyt_t *)&u8idx,1,domid)!=1){ + kdbp("memory (u8idx) read error:%p\n",gp->tokidxtbl); + return 0; + } + u16p = u8idx + gp->tokidxtbl; + if (kdb_read_mem((kdbva_t)u16p,(kdbbyt_t *)&u16idx,2,domid)!=2){ + kdbp("tokidxtbl read error:%p\n", u16p); + return 0; + } + tptr = gp->toktbl + u16idx; + datap++; + len--; + + while ((kdb_read_mem((kdbva_t)tptr, (kdbbyt_t *)&u8idx, 1, domid)==1) && + u8idx) { + + if(skipped_first) { + *result = u8idx; + result++; + } else + skipped_first = 1; + tptr++; + } + } + *result = '\0'; + return off; /* return to offset to the next symbol */ +} + +#define EL4_NMLEN 127 +/* so much pain, so not sure of it's worth .. :).. */ +static kdbva_t +kdb_expand_el4_sym(struct gst_syminfo *gp, int low, char *result, char *symp) +{ + int i, j; + u8 *nmp = gp->kallsyms_names; /* guest address space */ + kdbbyt_t byte, prefix; + domid_t id = gp->domid; + kdbva_t addr; + + KDBGP1("Eel4sym:nmp:%p maxidx:$%d sym:%s\n", nmp, low, symp); + for (i=0; i <= low; i++) { + /* unsigned prefix = *name++; */ + if (kdb_read_mem((kdbva_t)nmp, &prefix, 1, id) != 1) { + kdbp("failed to read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:i:%d prefix:%x\n", i, prefix); + nmp++; + /* strncpy(namebuf + prefix, name, KSYM_NAME_LEN - prefix); */ + addr = (long)result + prefix; + for (j=0; j < EL4_NMLEN-prefix; j++) { + if (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) != 1) { + kdbp("failed read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:j:%d byte:%x\n", j, byte); + *(kdbbyt_t *)addr = byte; + addr++; nmp++; + if (byte == '\0') + break; + } + KDBGP2("el4sym:i:%d res:%s\n", i, result); + if (symp && strcmp(result, symp) == 0) + return(kdb_rd_guest_addrtbl(gp, i)); + + /* kallsyms.c: name += strlen(name) + 1; */ + if (j == EL4_NMLEN-prefix && byte != '\0') + while (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) && byte != '\0') + nmp++; + } + KDBGP1("Xel4sym: na-ga-da\n"); + return 0; +} + +static unsigned int +kdb_get_el5_symoffset(struct gst_syminfo *gp, long pos) +{ + int i; + u8 data, *namep; + domid_t domid = gp->domid; + + namep = gp->kallsyms_names; + for (i=0; i < pos; i++) { + if (kdb_read_mem((kdbva_t)namep, &data, 1, domid) != 1) { + kdbp("Can't read id:$%d mem:%p\n", domid, namep); + return 0; + } + namep = namep + data + 1; + } + return namep - gp->kallsyms_names; +} + +/* + * for a given guest domid (domid >= 0 && < KDB_HYPDOMID), convert addr to + * symbol. offset is set to addr - symbolstart + */ +char * +kdb_guest_addr2sym(unsigned long addr, domid_t domid, ulong *offsp) +{ + static char namebuf[KSYM_NAME_LEN+1]; + unsigned long low, high, mid; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + *offsp = 0; + if(!gp || gp->kallsyms_num_syms == 0) + return " ??? "; + + namebuf[0] = namebuf[KSYM_NAME_LEN] = '\0'; + if (1) { + /* do a binary search on the sorted kallsyms_addresses array */ + low = 0; + high = gp->kallsyms_num_syms; + + while (high-low > 1) { + mid = (low + high) / 2; + if (kdb_rd_guest_addrtbl(gp, mid) <= addr) + low = mid; + else + high = mid; + } + /* Grab name */ + if (gp->toktbl) { + int symoff = kdb_get_el5_symoffset(gp,low); + kdb_expand_el5_sym(gp, symoff, namebuf); + } else + kdb_expand_el4_sym(gp, low, namebuf, NULL); + *offsp = addr - kdb_rd_guest_addrtbl(gp, low); + return namebuf; + } + return " ???? "; +} + + +/* + * save guest (dom0 and others) symbols info : domid and following addresses: + * &kallsyms_names &kallsyms_addresses &kallsyms_num_syms \ + * &kallsyms_token_table &kallsyms_token_index + */ +void +kdb_sav_dom_syminfo(domid_t domid, long namesp, long addrap, long nump, + long toktblp, long tokidxp) +{ + int bytes; + long val = 0; /* must be set to zero for 32 on 64 cases */ + struct gst_syminfo *gp = kdb_get_syminfo_slot(); + + if (gp == NULL) { + kdbp("kdb:kdb_sav_dom_syminfo():Table full.. symbols not saved\n"); + return; + } + memset(gp, 0, sizeof(*gp)); + + gp->domid = domid; + gp->bitness = kdb_guest_bitness(domid); + gp->addrtblp = (void *)addrap; + gp->kallsyms_names = (u8 *)namesp; + gp->toktbl = (u8 *)toktblp; + gp->tokidxtbl = (u16 *)tokidxp; + + KDBGP("domid:%x bitness:$%d numsyms:$%ld arrayp:%p\n", domid, + gp->bitness, gp->kallsyms_num_syms, gp->addrtblp); + + bytes = gp->bitness/8; + if (kdb_read_mem(nump, (kdbbyt_t *)&val, bytes, domid) != bytes) { + + kdbp("Unable to read number of symbols from:%lx\n", nump); + memset(gp, 0, sizeof(*gp)); + return; + } else + kdbp("Number of symbols:$%ld\n", val); + + gp->kallsyms_num_syms = val; + + bytes = (gp->bitness/8) * gp->kallsyms_num_syms; + gp->stext = kdb_guest_sym2addr("_stext", domid); + gp->etext = kdb_guest_sym2addr("_etext", domid); + if (!gp->stext || !gp->etext) + kdbp("Warn: Can't find stext/etext\n"); + + if (gp->toktbl && gp->tokidxtbl) { + gp->sinittext = kdb_guest_sym2addr("_sinittext", domid); + gp->einittext = kdb_guest_sym2addr("_einittext", domid); + if (!gp->sinittext || !gp->einittext) { + kdbp("Warn: Can't find sinittext/einittext\n"); + } + } + KDBGP1("stxt:%lx etxt:%lx sitxt:%lx eitxt:%lx\n", gp->stext, gp->etext, + gp->sinittext, gp->einittext); + kdbp("Succesfully saved symbol info\n"); +} + +/* + * given a symbol string for a guest/domid, return its address + */ +kdbva_t +kdb_guest_sym2addr(char *symp, domid_t domid) +{ + char namebuf[KSYM_NAME_LEN+1]; + int i, off=0; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + KDBGP("sym2a: sym:%s domid:%x numsyms:%ld\n", symp, domid, + gp ? gp->kallsyms_num_syms: -1); + + if (!gp) + return 0; + + if (gp->toktbl == 0 || gp->tokidxtbl == 0) + return(kdb_expand_el4_sym(gp, gp->kallsyms_num_syms, namebuf, symp)); + + for (i=0; i < gp->kallsyms_num_syms; i++) { + off = kdb_expand_el5_sym(gp, off, namebuf); + KDBGP1("i:%d namebuf:%s\n", i, namebuf); + if (strcmp(namebuf, symp) == 0) { + return(kdb_rd_guest_addrtbl(gp, i)); + } + } + KDBGP("sym2a:exit:na-ga-da\n"); + return 0; +} diff -r 54c8c9eaee92 xen/kdb/include/kdb_extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdb_extern.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDB_EXTERN_H +#define _KDB_EXTERN_H + +#define KDB_TRAP_FATAL 1 /* trap is fatal. can't resume from kdb */ +#define KDB_TRAP_NONFATAL 2 /* can resume from kdb */ +#define KDB_TRAP_KDBSTACK 3 /* to debug kdb itself. dump kdb stack */ + +/* following can be called from anywhere in xen to debug */ +extern void kdb_trap_immed(int); +extern void kdbtrc(unsigned int, unsigned int, uint64_t, uint64_t, uint64_t); +extern void kdbp(const char *fmt, ...); + +typedef unsigned long kdbva_t; +typedef unsigned char kdbbyt_t; +typedef unsigned long kdbma_t; + +extern unsigned long kdb_dr7; + + +extern volatile int kdb_session_begun; +extern volatile int kdb_enabled; +extern void kdb_init(void); +extern int kdb_keyboard(struct cpu_user_regs *); +extern void kdb_ssni_reenter(struct cpu_user_regs *); +extern int kdb_handle_trap_entry(int, struct cpu_user_regs *); +extern int kdb_trap_fatal(int, struct cpu_user_regs *); /* fatal with regs */ +extern void kdb_dump_vmcs(uint16_t did, int vid); +void kdb_dump_vmcb(uint16_t did, int vid); +extern void kdb_dump_time_pcpu(void); + + +#define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 */ +#define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */ +static inline void __vmptrst(u64 *addr) +{ + asm volatile ( VMPTRST_OPCODE + MODRM_EAX_07 + : + : "a" (addr) + : "memory"); +} + +extern void mukchk(unsigned long); +#define is_hvm_or_hyb_domain is_hvm_domain +#define is_hvm_or_hyb_vcpu is_hvm_vcpu + + +#endif /* _KDB_EXTERN_H */ diff -r 54c8c9eaee92 xen/kdb/include/kdbdefs.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbdefs.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBDEFS_H +#define _KDBDEFS_H + +/* reason we are entering kdbmain (bp == breakpoint) */ +typedef enum { + KDB_REASON_KEYBOARD=1, /* Keyboard entry - always 1 */ + KDB_REASON_BPEXCP, /* #BP excp: sw bp (INT3) */ + KDB_REASON_DBEXCP, /* #DB excp: TF flag or HW bp */ + KDB_REASON_PAUSE_IPI, /* received pause IPI from another CPU */ +} kdb_reason_t; + + +/* cpu state: past, present, and future */ +typedef enum { + KDB_CPU_INVAL=0, /* invalid value. not in or leaving kdb */ + KDB_CPU_QUIT, /* main cpu does GO. all others do QUIT */ + KDB_CPU_PAUSE, /* cpu is paused */ + KDB_CPU_DISABLE, /* disable interrupts */ + KDB_CPU_SHOWPC, /* all cpus must display their pc */ + KDB_CPU_DO_VMEXIT, /* all cpus must do vmcs vmexit. intel only */ + KDB_CPU_MAIN_KDB, /* cpu in kdb main command loop */ + KDB_CPU_GO, /* user entered go for this cpu */ + KDB_CPU_SS, /* single step for this cpu */ + KDB_CPU_NI, /* go to next instr after the call instr */ + KDB_CPU_INSTALL_BP, /* delayed install of sw bp(s) by this cpu */ +} kdb_cpu_cmd_t; + +/* ============= kdb commands ============================================= */ + +typedef kdb_cpu_cmd_t (*kdb_func_t)(int, const char **, struct cpu_user_regs *); +typedef kdb_cpu_cmd_t (*kdb_usgf_t)(void); + +typedef enum { + KDB_REPEAT_NONE = 0, /* Do not repeat this command */ + KDB_REPEAT_NO_ARGS, /* Repeat the command without arguments */ + KDB_REPEAT_WITH_ARGS, /* Repeat the command including its arguments */ +} kdb_repeat_t; + +typedef struct _kdbtab { + char *kdb_cmd_name; /* Command name */ + kdb_func_t kdb_cmd_func; /* ptr to function to execute command */ + kdb_usgf_t kdb_cmd_usgf; /* usage function ptr */ + int kdb_cmd_crash_avail; /* available in sys fatal/crash state */ + kdb_repeat_t kdb_cmd_repeat; /* Does command auto repeat on enter? */ +} kdbtab_t; + + +/* ============= types and stuff ========================================= */ +#define BFD_INVAL (~0UL) /* invalid bfd_vma */ + +#if defined(__x86_64__) + #define KDBIP rip + #define KDBSP rsp +#else + #define KDBIP eip + #define KDBSP esp +#endif + +/* ============= macros ================================================== */ +extern volatile int kdbdbg; +#define KDBGP(...) {(kdbdbg) ? kdbp(__VA_ARGS__):0;} +#define KDBGP1(...) {(kdbdbg>1) ? kdbp(__VA_ARGS__):0;} +#define KDBGP2(...) {(kdbdbg>2) ? kdbp(__VA_ARGS__):0;} +#define KDBGP3(...) {0;}; + +#define KDBMIN(x,y) (((x)<(y))?(x):(y)) + +#endif /* !_KDBDEFS_H */ diff -r 54c8c9eaee92 xen/kdb/include/kdbinc.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbinc.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBINC_H +#define _KDBINC_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#ifdef _XEN_LATEST +#include +#endif + +#include + +#include "kdb_extern.h" +#include "kdbdefs.h" +#include "kdbproto.h" + +#endif /* !_KDBINC_H */ diff -r 54c8c9eaee92 xen/kdb/include/kdbproto.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbproto.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBPROTO_H +#define _KDBPROTO_H + +/* hypervisor interfaces use by kdb or kdb interfaces in xen files */ +extern void console_putc(char); +extern int console_getc(void); +extern void show_trace(struct cpu_user_regs *); +extern void kdb_dump_timer_queues(void); +extern void kdb_time_resume(int); +extern void kdb_print_sched_info(void); +extern void kdb_curr_cpu_flush_vmcs(void); +extern unsigned long address_lookup(char *); +extern void kdb_prnt_guest_mapped_irqs(void); + +/* kdb globals */ +extern kdbtab_t *kdb_cmd_tbl; +extern char kdb_prompt[32]; +extern volatile int kdb_sys_crash; +extern volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +extern volatile int kdb_trcon; + +/* kdb interfaces */ +extern void __init kdb_io_init(void); +extern void kdb_init_cmdtab(void); +extern void kdb_do_cmds(struct cpu_user_regs *); +extern int kdb_check_sw_bkpts(struct cpu_user_regs *); +extern int kdb_check_watchpoints(struct cpu_user_regs *); +extern void kdb_do_watchpoints(kdbva_t, int, int); +extern void kdb_install_watchpoints(void); +extern void kdb_clear_wps(int); +extern kdbma_t kdb_rd_dbgreg(int); + + + +extern char *kdb_get_cmdline(char *); +extern void kdb_clear_prev_cmd(void); +extern void kdb_toggle_dis_syntax(void); +extern int kdb_check_call_instr(domid_t, kdbva_t); +extern void kdb_display_pc(struct cpu_user_regs *); +extern kdbva_t kdb_print_instr(kdbva_t, long, domid_t); +extern int kdb_read_mmem(kdbva_t, kdbbyt_t *, int); +extern int kdb_read_mem(kdbva_t, kdbbyt_t *, int, domid_t); +extern int kdb_write_mem(kdbva_t, kdbbyt_t *, int, domid_t); + +extern void kdb_install_all_swbp(void); +extern void kdb_uninstall_all_swbp(void); +extern int kdb_swbp_exists(void); +extern void kdb_flush_swbp_table(void); +extern int kdb_is_addr_guest_text(kdbva_t, int); +extern kdbva_t kdb_guest_sym2addr(char *, domid_t); +extern char *kdb_guest_addr2sym(unsigned long, domid_t, ulong *); +extern void kdb_prnt_addr2sym(domid_t, kdbva_t, char *); +extern void kdb_sav_dom_syminfo(domid_t, long, long, long, long, long); +extern int kdb_guest_bitness(domid_t); +extern void kdb_nmi_pause_cpus(cpumask_t); + +extern void kdb_trczero(void); +void kdb_trcp(void); + + + +#endif /* !_KDBPROTO_H */ diff -r 54c8c9eaee92 xen/kdb/kdb_cmds.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_cmds.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,3774 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +#if defined(__x86_64__) + #define KDBF64 "%lx" + #define KDBFL "%016lx" /* print long all digits */ +#else + #define KDBF64 "%llx" + #define KDBFL "%08lx" +#endif + +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + #define KDB_LKDEF(l) ((l).raw.lock) + #define KDB_PGLLE(t) ((t).tail) /* page list last element ^%$#@ */ +#else + #define KDB_LKDEF(l) ((l).lock) + #define KDB_PGLLE(t) ((t).prev) /* page list last element ^%$#@ */ +#endif + +#define KDB_CMD_HISTORY_COUNT 32 +#define CMD_BUFLEN 200 /* kdb_printf: max printline == 256 */ + +#define KDBMAXSBP 16 /* max number of software breakpoints */ +#define KDB_MAXARGC 16 /* max args in a kdb command */ +#define KDB_MAXBTP 8 /* max display args in btp */ + +/* condition is: 'r6 == 0x123f' or '0xffffffff82800000 != deadbeef' */ +struct kdb_bpcond { + kdbbyt_t bp_cond_status; /* 0 == off, 1 == register, 2 == memory */ + kdbbyt_t bp_cond_type; /* 0 == bad, 1 == equal, 2 == not equal */ + ulong bp_cond_lhs; /* lhs of condition: reg offset or mem loc */ + ulong bp_cond_rhs; /* right hand side of condition */ +}; + +/* software breakpoint structure */ +struct kdb_sbrkpt { + kdbva_t bp_addr; /* address the bp is set at */ + domid_t bp_domid; /* which domain the bp belongs to */ + kdbbyt_t bp_originst; /* save orig instr/s here */ + kdbbyt_t bp_deleted; /* delete pending on this bp */ + kdbbyt_t bp_ni; /* set for KDB_CPU_NI */ + kdbbyt_t bp_just_added; /* added in the current kdb session */ + kdbbyt_t bp_type; /* 0 = normal, 1 == cond, 2 == btp */ + union { + struct kdb_bpcond bp_cond; + ulong *bp_btp; + } u; +}; + +/* don't use kmalloc in kdb which hijacks all cpus */ +static ulong kdb_btp_argsa[KDBMAXSBP][KDB_MAXBTP]; +static ulong *kdb_btp_ap[KDBMAXSBP]; + +static struct kdb_reg_nmofs { + char *reg_nm; + int reg_offs; +} kdb_reg_nm_offs[] = { + { "rax", offsetof(struct cpu_user_regs, rax) }, + { "rbx", offsetof(struct cpu_user_regs, rbx) }, + { "rcx", offsetof(struct cpu_user_regs, rcx) }, + { "rdx", offsetof(struct cpu_user_regs, rdx) }, + { "rsi", offsetof(struct cpu_user_regs, rsi) }, + { "rdi", offsetof(struct cpu_user_regs, rdi) }, + { "rbp", offsetof(struct cpu_user_regs, rbp) }, + { "rsp", offsetof(struct cpu_user_regs, rsp) }, + { "r8", offsetof(struct cpu_user_regs, r8) }, + { "r9", offsetof(struct cpu_user_regs, r9) }, + { "r10", offsetof(struct cpu_user_regs, r10) }, + { "r11", offsetof(struct cpu_user_regs, r11) }, + { "r12", offsetof(struct cpu_user_regs, r12) }, + { "r13", offsetof(struct cpu_user_regs, r13) }, + { "r14", offsetof(struct cpu_user_regs, r14) }, + { "r15", offsetof(struct cpu_user_regs, r15) }, + { "rflags", offsetof(struct cpu_user_regs, rflags) } }; + +static const int KDBBPSZ=1; /* size of KDB_BPINST is 1 byte*/ +static kdbbyt_t kdb_bpinst = 0xcc; /* breakpoint instr: INT3 */ +static struct kdb_sbrkpt kdb_sbpa[KDBMAXSBP]; /* soft brkpt array/table */ +static kdbtab_t *tbp; + +static int kdb_set_bp(domid_t, kdbva_t, int, ulong *, char*, char*, char*); +static void kdb_print_uregs(struct cpu_user_regs *); + + +/* ===================== cmdline functions ================================ */ + +/* lp points to a string of only alpha numeric chars terminated by '\n'. + * Parse the string into argv pointers, and RETURN argc + * Eg: if lp --> "dr sp\n" : argv[0]=="dr\0" argv[1]=="sp\0" argc==2 + */ +static int +kdb_parse_cmdline(char *lp, const char **argv) +{ + int i=0; + + for (; *lp == ' '; lp++); /* note: isspace() skips '\n' also */ + while ( *lp != '\n' ) { + if (i == KDB_MAXARGC) { + printk("kdb: max args exceeded\n"); + break; + } + argv[i++] = lp; + for (; *lp != ' ' && *lp != '\n'; lp++); + if (*lp != '\n') + *lp++ = '\0'; + for (; *lp == ' '; lp++); + } + *lp = '\0'; + return i; +} + +void +kdb_clear_prev_cmd() /* so previous command is not repeated */ +{ + tbp = NULL; +} + +void +kdb_do_cmds(struct cpu_user_regs *regs) +{ + char *cmdlinep; + const char *argv[KDB_MAXARGC]; + int argc = 0, curcpu = smp_processor_id(); + kdb_cpu_cmd_t result = KDB_CPU_MAIN_KDB; + + snprintf(kdb_prompt, sizeof(kdb_prompt), "[%d]xkdb> ", curcpu); + + while (result == KDB_CPU_MAIN_KDB) { + cmdlinep = kdb_get_cmdline(kdb_prompt); + if (*cmdlinep == '\n') { + if (tbp==NULL || tbp->kdb_cmd_func==NULL) + continue; + else + argc = -1; /* repeat prev command */ + } else { + argc = kdb_parse_cmdline(cmdlinep, argv); + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_func; tbp++) { + if (strcmp(argv[0], tbp->kdb_cmd_name)==0) + break; + } + } + if (kdb_sys_crash && tbp->kdb_cmd_func && !tbp->kdb_cmd_crash_avail) { + kdbp("cmd not available in fatal/crashed state....\n"); + continue; + } + if (tbp->kdb_cmd_func) { + result = (*tbp->kdb_cmd_func)(argc, argv, regs); + if (tbp->kdb_cmd_repeat == KDB_REPEAT_NONE) + tbp = NULL; + } else + kdbp("kdb: Unknown cmd: %s\n", cmdlinep); + } + kdb_cpu_cmd[curcpu] = result; + return; +} + +/* ===================== Util functions ==================================== */ + +int +kdb_vcpu_valid(struct vcpu *in_vp) +{ + struct domain *dp; + struct vcpu *vp; + + for(dp=domain_list; in_vp && dp; dp=dp->next_in_list) + for_each_vcpu(dp, vp) + if (in_vp == vp) + return 1; + return 0; /* not found */ +} + +/* + * Given a symbol, find it's address + */ +static kdbva_t +kdb_sym2addr(const char *p, domid_t domid) +{ + kdbva_t addr; + + KDBGP1("sym2addr: p:%s domid:%d\n", p, domid); + if (domid == DOMID_IDLE) + addr = address_lookup((char *)p); + else + addr = (kdbva_t)kdb_guest_sym2addr((char *)p, domid); + KDBGP1("sym2addr: exit: addr returned:0x%lx\n", addr); + return addr; +} + +/* + * convert ascii to int decimal (base 10). + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2deci(const char *strp, int *intp) +{ + const char *endp; + + KDBGP2("str2deci: str:%s\n", strp); + if (!isdigit(*strp)) + return 0; + *intp = (int)simple_strtoul(strp, &endp, 10); + if (endp != strp+strlen(strp)) + return 0; + KDBGP2("str2deci: intval:$%d\n", *intp); + return 1; +} +/* + * convert ascii to long. NOTE: base is 16 + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2ulong(const char *strp, ulong *longp) +{ + ulong val; + const char *endp; + + KDBGP2("str2long: str:%s\n", strp); + if (!isxdigit(*strp)) + return 0; + val = (long)simple_strtoul(strp, &endp, 16); /* handles leading 0x */ + if (endp != strp+strlen(strp)) + return 0; + if (longp) + *longp = val; + KDBGP2("str2long: val:0x%lx\n", val); + return 1; +} +/* + * convert a symbol or ascii address to hex address + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2addr(const char *strp, kdbva_t *addrp, domid_t id) +{ + kdbva_t addr; + const char *endp; + + /* assume it's an address */ + KDBGP2("str2addr: str:%s id:%d\n", strp, id); + addr = (kdbva_t)simple_strtoul(strp, &endp, 16); /*handles leading 0x */ + if (endp != strp+strlen(strp)) + if ( !(addr=kdb_sym2addr(strp, id)) ) + return 0; + *addrp = addr; + KDBGP2("str2addr: addr:0x%lx\n", addr); + return 1; +} + +/* Given domid, return ptr to struct domain + * IF domid == DOMID_IDLE return ptr to idle_domain + * IF domid == valid domain, return ptr to domain struct + * else domid is bad and return NULL + */ +static struct domain * +kdb_domid2ptr(domid_t domid) +{ + struct domain *dp; + + /* get_domain_by_id() ret NULL for both DOMID_IDLE and bad domids */ + if (domid == DOMID_IDLE) + dp = idle_vcpu[smp_processor_id()]->domain; + else + dp = get_domain_by_id(domid); /* NULL now means bad domid */ + return dp; +} + +/* + * Returns: 0: failed. invalid domid or string, *idp not changed. + */ +static int +kdb_str2domid(const char *domstr, domid_t *idp, int perr) +{ + int id; + if (!kdb_str2deci(domstr, &id) || !kdb_domid2ptr((domid_t)id)) { + if (perr) + kdbp("Invalid domid:%s\n", domstr); + return 0; + } + *idp = (domid_t)id; + return 1; +} + +static struct domain * +kdb_strdomid2ptr(const char *domstr, int perror) +{ + domid_t domid; + if (kdb_str2domid(domstr, &domid, perror)) { + return(kdb_domid2ptr(domid)); + } + return NULL; +} + +/* return a guest bitness: 32 or 64 */ +int +kdb_guest_bitness(domid_t domid) +{ + const int HYPSZ = sizeof(long) * 8; + struct domain *dp = kdb_domid2ptr(domid); + int retval; + + if (is_idle_domain(dp)) + retval = HYPSZ; + else if (is_hvm_or_hyb_domain(dp)) + retval = (hvm_long_mode_enabled(dp->vcpu[0])) ? HYPSZ : 32; + else + retval = is_pv_32bit_domain(dp) ? 32 : HYPSZ; + KDBGP1("gbitness: domid:%d dp:%p bitness:%d\n", domid, dp, retval); + return retval; +} + +/* kdb_print_spin_lock(&xyz_lock, "xyz_lock:", "\n"); */ +static void +kdb_print_spin_lock(char *strp, spinlock_t *lkp, char *nlp) +{ + kdbp("%s %04hx %d %d%s", strp, KDB_LKDEF(*lkp), lkp->recurse_cpu, + lkp->recurse_cnt, nlp); +} + +/* check if register string is valid. if yes, return offset to the register + * in cpu_user_regs, else return -1 */ +static int +kdb_valid_reg(const char *nmp) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (strcmp(kdb_reg_nm_offs[i].reg_nm, nmp) == 0) + return kdb_reg_nm_offs[i].reg_offs; + return -1; +} + +/* given offset of register, return register name string. if offset is invalid + * return NULL */ +static char *kdb_regoffs_to_name(int offs) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (kdb_reg_nm_offs[i].reg_offs == offs) + return kdb_reg_nm_offs[i].reg_nm; + return NULL; +} + +/* ===================== util struct funcs ================================= */ +static void +kdb_prnt_timer(struct timer *tp) +{ +#if XEN_SUBVERSION == 0 + kdbp(" expires:%016lx expires_end:%016lx cpu:%d status:%x\n", tp->expires, + tp->expires_end, tp->cpu, tp->status); +#else + kdbp(" expires:%016lx cpu:%d status:%x\n", tp->expires, tp->cpu,tp->status); +#endif + kdbp(" function data:%p ptr:%p ", tp->data, tp->function); + kdb_prnt_addr2sym(DOMID_IDLE, (kdbva_t)tp->function, "\n"); +} + +static void +kdb_prnt_periodic_time(struct periodic_time *ptp) +{ + kdbp(" next:%p prev:%p\n", ptp->list.next, ptp->list.prev); + kdbp(" on_list:%d one_shot:%d dont_freeze:%d irq_issued:%d src:%x irq:%x\n", + ptp->on_list, ptp->one_shot, ptp->do_not_freeze, ptp->irq_issued, + ptp->source, ptp->irq); + kdbp(" vcpu:%p pending_intr_nr:%08x period:%016lx\n", ptp->vcpu, + ptp->pending_intr_nr, ptp->period); + kdbp(" scheduled:%016lx last_plt_gtime:%016lx\n", ptp->scheduled, + ptp->last_plt_gtime); + kdbp(" \n timer info:\n"); + kdb_prnt_timer(&ptp->timer); + kdbp("\n"); +} + +/* ===================== cmd functions ==================================== */ + +/* + * FUNCTION: Disassemble instructions + */ +static kdb_cpu_cmd_t +kdb_usgf_dis(void) +{ + kdbp("dis [addr|sym][num][domid] : Disassemble instrs\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dis(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int num = 8; /* display 8 instr by default */ + static kdbva_t addr = BFD_INVAL; + static domid_t domid; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dis(); + + if (argc != -1) /* not a command repeat */ + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + if (argc >= 4 && !kdb_str2domid(argv[3], &domid, 1)) { + return KDB_CPU_MAIN_KDB; + } + if (argc >= 3 && !kdb_str2deci(argv[2], &num)) { + kdbp("kdb:Invalid num\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc > 1 && !kdb_str2addr(argv[1], &addr, domid)) { + kdbp("kdb:Invalid addr/sym\n"); + kdbp("(num has to be specified if providing domid)\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc == 1) /* not command repeat */ + addr = regs->KDBIP; /* PC is the default */ + else if (addr == BFD_INVAL) { + kdbp("kdb:Invalid addr/sym\n"); + return KDB_CPU_MAIN_KDB; + } + addr = kdb_print_instr(addr, num, domid); + return KDB_CPU_MAIN_KDB; +} + +/* FUNCTION: kdb_cmdf_dism() Toggle disassembly syntax from Intel to ATT/GAS */ +static kdb_cpu_cmd_t +kdb_usgf_dism(void) +{ + kdbp("dism: toggle disassembly mode between ATT/GAS and INTEL\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dism(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dism(); + + kdb_toggle_dis_syntax(); + return KDB_CPU_MAIN_KDB; +} + +static void +_kdb_show_guest_stack(domid_t domid, kdbva_t ipaddr, kdbva_t spaddr) +{ + kdbva_t val; + int num=0, max=0, rd = kdb_guest_bitness(domid)/8; + + kdb_print_instr(ipaddr, 1, domid); + KDBGP("_guest_stack:sp:%lx domid:%d rd:$%d\n", spaddr, domid, rd); + val = 0; /* must zero, in case guest is 32bit */ + while((kdb_read_mem(spaddr,(kdbbyt_t *)&val,rd,domid)==rd) && num < 16){ + KDBGP1("gstk:addr:%lx val:%lx\n", spaddr, val); + if (kdb_is_addr_guest_text(val, domid)) { + kdb_print_instr(val, 1, domid); + num++; + } + if (max++ > 10000) /* don't walk down the stack forever */ + break; /* 10k is chosen randomly */ + spaddr += rd; + } +} + +/* Read guest memory and display address that looks like text. */ +static void +kdb_show_guest_stack(struct cpu_user_regs *regs, struct vcpu *vcpup) +{ + kdbva_t ipaddr=regs->KDBIP, spaddr = regs->KDBSP; + domid_t domid = vcpup->domain->domain_id; + + ASSERT(domid != DOMID_IDLE); + _kdb_show_guest_stack(domid, ipaddr, spaddr); +} + +/* display stack. if vcpu ptr given, then display stack for that. Otherwise, + * use current regs */ +static kdb_cpu_cmd_t +kdb_usgf_f(void) +{ + kdbp("f [vcpu-ptr]: dump current/vcpu stack\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_f(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_f(); + + if (argc > 1 ) { + struct vcpu *vp; + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp)) { + kdbp("kdb: Bad VCPU ptr:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdb_show_guest_stack(&vp->arch.user_regs, vp); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs)) + kdb_show_guest_stack(regs, current); + else + show_trace(regs); + return KDB_CPU_MAIN_KDB; +} + +/* given an spaddr and domid for guest, dump stack */ +static kdb_cpu_cmd_t +kdb_usgf_fg(void) +{ + kdbp("fg domid RIP ESP: dump guest stack given domid, RIP, and ESP\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_fg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid; + kdbva_t ipaddr, spaddr; + + if (argc != 4) + return kdb_usgf_fg(); + + if (kdb_str2domid(argv[1], &domid, 1)==0) { + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[2], &ipaddr)==0) { + kdbp("Bad ipaddr:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[3], &spaddr)==0) { + kdbp("Bad spaddr:%s\n", argv[3]); + return KDB_CPU_MAIN_KDB; + } + _kdb_show_guest_stack(domid, ipaddr, spaddr); + return KDB_CPU_MAIN_KDB; +} + +/* Display kdb stack. for debugging kdb itself */ +static kdb_cpu_cmd_t +kdb_usgf_kdbf(void) +{ + kdbp("kdbf: display kdb stack. for debugging kdb only\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbf(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbf(); + + kdb_trap_immed(KDB_TRAP_KDBSTACK); + return KDB_CPU_MAIN_KDB; +} + +/* worker function to display memory. Request could be for any guest, domid. + * Also address could be machine or virtual */ +static void +_kdb_display_mem(kdbva_t *addrp, int *lenp, int wordsz, int domid, int is_maddr) +{ + #define DDBUFSZ 4096 + + kdbbyt_t buf[DDBUFSZ], *bp; + int numrd, bytes; + int len = *lenp; + kdbva_t addr = *addrp; + + /* round len down to wordsz boundry because on intel endian, printing + * characters is not prudent, (long and ints can't be interpreted + * easily) */ + len &= ~(wordsz-1); + len = KDBMIN(DDBUFSZ, len); + len = len ? len : wordsz; + + KDBGP("dmem:addr:%lx buf:%p len:$%d domid:%d sz:$%d maddr:%d\n", addr, + buf, len, domid, wordsz, is_maddr); + if (is_maddr) + numrd=kdb_read_mmem((kdbma_t)addr, buf, len); + else + numrd=kdb_read_mem(addr, buf, len, domid); + if (numrd != len) + kdbp("Memory read error. Bytes read:$%d\n", numrd); + + for (bp = buf; numrd > 0;) { + kdbp("%016lx: ", addr); + + /* display 16 bytes per line */ + for (bytes=0; bytes < 16 && numrd > 0; bytes += wordsz) { + if (numrd >= wordsz) { + if (wordsz == 8) + kdbp(" %016lx", *(long *)bp); + else + kdbp(" %08x", *(int *)bp); + bp += wordsz; + numrd -= wordsz; + addr += wordsz; + } + } + kdbp("\n"); + continue; + } + *lenp = len; + *addrp = addr; +} + +/* display machine mem, ie, the given address is machine address */ +static kdb_cpu_cmd_t +kdb_display_mmem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbma_t maddr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&maddr, &len, wordsz, id, 1); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + + if (!kdb_str2ulong(argv[1], &maddr)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + _kdb_display_mem(&maddr, &len, wordsz, 0, 1); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly machine Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dwm(void) +{ + kdbp("dwm: maddr|sym [num] : dump memory word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dwm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 4, kdb_usgf_dwm); +} + +/* + * FUNCTION: Dispaly machine Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_ddm(void) +{ + kdbp("ddm: maddr|sym [num] : dump double word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ddm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 8, kdb_usgf_ddm); +} + +/* + * FUNCTION: Dispaly Memory : word or doubleword + * wordsz : bytes in word. 4 or 8 + * + * We display upto BUFSZ bytes. User can just press enter for more. + * addr is always in hex with or without leading 0x + */ +static kdb_cpu_cmd_t +kdb_display_mem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbva_t addr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&addr, &len, wordsz, id, 0); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + id = DOMID_IDLE; /* not a command repeat, reset dom id */ + if (argc >= 4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + _kdb_display_mem(&addr, &len, wordsz, id, 0); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dw(void) +{ + kdbp("dw vaddr|sym [num][domid] : dump mem word. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 4, kdb_usgf_dw); +} + +/* + * FUNCTION: Dispaly Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_dd(void) +{ + kdbp("dd vaddr|sym [num][domid] : dump dword. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dd(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 8, kdb_usgf_dd); +} + +/* + * FUNCTION: Modify Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_mw(void) +{ + kdbp("mw vaddr|sym val [domid] : modify memory word in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_mw(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val, 4, id) != 4) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_md(void) +{ + kdbp("md vaddr|sym val [domid] : modify memory dword in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_md(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_md(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) { + return KDB_CPU_MAIN_KDB; + } + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val,sizeof(val),id) != sizeof(val)) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +struct Xgt_desc_struct { + unsigned short size; + unsigned long address __attribute__((packed)); +}; + +void +kdb_show_special_regs(struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + unsigned short tr; /* Task Register segment selector */ + __u64 efer; + + kdbp("\nSpecial Registers:\n"); + __asm__ __volatile__ ("sidt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("IDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("GDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + + kdbp("cr0: %016lx cr2: %016lx\n", read_cr0(), read_cr2()); + kdbp("cr3: %016lx cr4: %016lx\n", read_cr3(), read_cr4()); + __asm__ __volatile__ ("str (%0) \n":: "a"(&tr) : "memory"); + kdbp("TR: %x\n", tr); + + rdmsrl(MSR_EFER, efer); /* IA32_EFER */ + kdbp("efer:"KDBF64" LMA(IA-32e mode):%d SCE(syscall/sysret):%d\n", + efer, ((efer&EFER_LMA) != 0), ((efer&EFER_SCE) != 0)); + + kdbp("DR0: %016lx DR1:%016lx DR2:%016lx\n", kdb_rd_dbgreg(0), + kdb_rd_dbgreg(1), kdb_rd_dbgreg(2)); + kdbp("DR3: %016lx DR6:%016lx DR7:%016lx\n", kdb_rd_dbgreg(3), + kdb_rd_dbgreg(6), kdb_rd_dbgreg(7)); +} + +/* + * FUNCTION: Dispaly Registers. If "sp" argument, then display additional regs + */ +static kdb_cpu_cmd_t +kdb_usgf_dr(void) +{ + kdbp("dr [sp]: display registers. sp to display special regs also\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dr(); + + KDBGP1("regs:%p .rsp:%lx .rip:%lx\n", regs, regs->rsp, regs->rip); + show_registers(regs); + if (argc > 1 && !strcmp(argv[1], "sp")) + kdb_show_special_regs(regs); + return KDB_CPU_MAIN_KDB; +} + +/* show registers on stack bottom where guest context is. same as dr if + * not running in guest mode */ +static kdb_cpu_cmd_t +kdb_usgf_drg(void) +{ + kdbp("drg: display active guest registers at stack bottom\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_drg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_drg(); + + kdbp("\tNote: ds/es/fs/gs etc.. are not saved from the cpu\n"); + kdb_print_uregs(guest_cpu_user_regs()); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Register + */ +static kdb_cpu_cmd_t +kdb_usgf_mr(void) +{ + kdbp("mr reg val : Modify Register. val assumed in hex\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int regoffs; + ulong val; + + if (argc != 3 || !kdb_str2ulong(argv[2], &val)) { + return kdb_usgf_mr(); + } + argp = argv[1]; + +#if defined(__x86_64__) + if ((regoffs=kdb_valid_reg(argp)) != -1) + *((uint64_t *)((char *)regs+regoffs)) = val; +#else + if (!strcmp(argp, "eax")) + regs->eax = val; + else if (!strcmp(argp, "ebx")) + regs->ebx = val; + else if (!strcmp(argp, "ecx")) + regs->ecx = val; + else if (!strcmp(argp, "edx")) + regs->edx = val; + else if (!strcmp(argp, "esi")) + regs->esi = val; + else if (!strcmp(argp, "edi")) + regs->edi = val; + else if (!strcmp(argp, "ebp")) + regs->ebp = val; + else if (!strcmp(argp, "esp")) + regs->esp = val; + else if (!strcmp(argp, "eflags") || !strcmp(argp, "rflags")) + regs->eflags = val; +#endif + else + kdbp("Error. Bad register : %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Single Step + */ +static kdb_cpu_cmd_t +kdb_usgf_ss(void) +{ + kdbp("ss: single step\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ss(int argc, const char **argv, struct cpu_user_regs *regs) +{ + #define KDB_HALT_INSTR 0xf4 + + kdbbyt_t byte; + struct domain *dp = current->domain; + domid_t id = guest_mode(regs) ? dp->domain_id : DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ss(); + + KDBGP("enter kdb_cmdf_ss \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (kdb_read_mem(regs->KDBIP, &byte, 1, id) == 1) { + if (byte == KDB_HALT_INSTR) { + kdbp("kdb: jumping over halt instruction\n"); + regs->KDBIP++; + } + } else { + kdbp("kdb: Failed to read byte at: %lx\n", regs->KDBIP); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) { + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + current->arch.hvm_vcpu.single_step = 1; + } else + regs->eflags |= X86_EFLAGS_TF; + + return KDB_CPU_SS; +} + +/* + * FUNCTION: Next Instruction, step over the call instr to the next instr + */ +static kdb_cpu_cmd_t +kdb_usgf_ni(void) +{ + kdbp("ni: single step, stepping over function calls\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ni(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int sz, i; + domid_t id=guest_mode(regs) ? current->domain->domain_id:DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ni(); + + KDBGP("enter kdb_cmdf_ni \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if ((sz=kdb_check_call_instr(id, regs->KDBIP)) == 0) /* !call instr */ + return kdb_cmdf_ss(argc, argv, regs); /* just do ss */ + + if ((i=kdb_set_bp(id, regs->KDBIP+sz, 1,0,0,0,0)) >= KDBMAXSBP) /* failed */ + return KDB_CPU_MAIN_KDB; + + kdb_sbpa[i].bp_ni = 1; + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + else + regs->eflags &= ~X86_EFLAGS_TF; + + return KDB_CPU_NI; +} + +static void +kdb_btf_enable(void) +{ + u64 debugctl; + rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); + wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 0x2); +} + +/* + * FUNCTION: Single Step to branch. Doesn't seem to work very well. + */ +static kdb_cpu_cmd_t +kdb_usgf_ssb(void) +{ + kdbp("ssb: singe step to branch\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ssb(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ssb(); + + KDBGP("MUK: enter kdb_cmdf_ssb\n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (is_hvm_or_hyb_vcpu(current)) + current->domain->debugger_attached = 1; /* vmx/svm_do_resume()*/ + + regs->eflags |= X86_EFLAGS_TF; + kdb_btf_enable(); + return KDB_CPU_SS; +} + +/* + * FUNCTION: Continue Execution. TF must be cleared here as this could run on + * any cpu. Hence not OK to do it from kdb_end_session. + */ +static kdb_cpu_cmd_t +kdb_usgf_go(void) +{ + kdbp("go: leave kdb and continue execution\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_go(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_go(); + + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_GO; +} + +/* All cpus must display their current context */ +static kdb_cpu_cmd_t +kdb_cpu_status_all(int ccpu, struct cpu_user_regs *regs) +{ + int cpu; + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) /* hung cpu */ + continue; + kdb_cpu_cmd[cpu] = KDB_CPU_SHOWPC; + while (kdb_cpu_cmd[cpu]==KDB_CPU_SHOWPC); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* + * display/switch CPU. + * Argument: + * none: just go back to initial cpu + * cpunum: switch to given vpu + * "all": show one line status of all cpus + */ +extern volatile int kdb_init_cpu; +static kdb_cpu_cmd_t +kdb_usgf_cpu(void) +{ + kdbp("cpu [all|num]: none will switch back to initial cpu\n"); + kdbp(" cpunum to switch to the vcpu. all to show status\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + int ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cpu(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + return kdb_cpu_status_all(ccpu, regs); + + cpu = (int)simple_strtoul(argv[1], NULL, 0); /* handles 0x */ + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && + cpu_online(cpu) && kdb_cpu_cmd[cpu] == KDB_CPU_PAUSE) + { + kdbp("Switching to cpu:%d\n", cpu); + kdb_cpu_cmd[cpu] = KDB_CPU_MAIN_KDB; + + /* clear any single step on the current cpu */ + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_PAUSE; + } else { + if (cpu != ccpu) + kdbp("Unable to switch to cpu:%d\n", cpu); + else { + kdb_display_pc(regs); + } + return KDB_CPU_MAIN_KDB; + } + } + /* no arg means back to initial cpu */ + if (!kdb_sys_crash && ccpu != kdb_init_cpu) { + if (kdb_cpu_cmd[kdb_init_cpu] == KDB_CPU_PAUSE) { + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_MAIN_KDB; + return KDB_CPU_PAUSE; + } else + kdbp("Unable to switch to: %d\n", kdb_init_cpu); + } + return KDB_CPU_MAIN_KDB; +} + +/* send NMI to all or given CPU. Must be crashed/fatal state */ +static kdb_cpu_cmd_t +kdb_usgf_nmi(void) +{ + kdbp("nmi cpu#|all: send nmi cpu/s. must reboot when done with kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_nmi(int argc, const char **argv, struct cpu_user_regs *regs) +{ + cpumask_t cpumask; + int ccpu = smp_processor_id(); + + if (argc <= 1 || (argc > 1 && *argv[1] == '?')) + return kdb_usgf_nmi(); + + if (!kdb_sys_crash) { + kdbp("kdb: nmi cmd available in crashed state only\n"); + return KDB_CPU_MAIN_KDB; + } + if (!strcmp(argv[1], "all")) + cpumask = cpu_online_map; + else { + int cpu = (int)simple_strtoul(argv[1], NULL, 0); + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && cpu_online(cpu)) + cpumask = *cpumask_of(cpu); + else { + kdbp("KDB nmi: invalid cpu %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + } + kdb_nmi_pause_cpus(cpumask); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_percpu(void) +{ + kdbp("percpu: display per cpu pointers\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_percpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_percpu(); + kdb_dump_time_pcpu(); + return KDB_CPU_MAIN_KDB; +} + +/* ========================= Breakpoints ==================================== */ + +static void +kdb_prnt_bp_cond(int bpnum) +{ + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { + kdbp(" ( %s %c%c %lx )\n", + kdb_regoffs_to_name(bpcp->bp_cond_lhs), + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } else { + kdbp(" ( %lx %c%c %lx )\n", bpcp->bp_cond_lhs, + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } +} + +static void +kdb_prnt_bp_extra(int bpnum) +{ + if (kdb_sbpa[bpnum].bp_type == 2) { + ulong i, arg, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdbp(" will trace "); + for (i=0; i < KDB_MAXBTP && btp[i]; i++) + if ((arg=btp[i]) < sizeof (struct cpu_user_regs)) { + kdbp(" %s ", kdb_regoffs_to_name(arg)); + } else { + kdbp(" %lx ", arg); + } + kdbp("\n"); + + } else if (kdb_sbpa[bpnum].bp_type == 1) + kdb_prnt_bp_cond(bpnum); +} + +/* + * List software breakpoints + */ +static kdb_cpu_cmd_t +kdb_display_sbkpts(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) { + struct domain *dp = kdb_domid2ptr(kdb_sbpa[i].bp_domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + continue; + } + kdbp("[%d]: domid:%d 0x%lx ", i, + kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr,"\n"); + kdb_prnt_bp_extra(i); + } + return KDB_CPU_MAIN_KDB; +} + +/* + * Check if any breakpoints that we need to install (delayed install) + * Returns: 1 if yes, 0 if none. + */ +int +kdb_swbp_exists(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} +/* + * Check if any breakpoints were deleted this kdb session + * Returns: 0 if none, 1 if yes + */ +static int +kdb_swbp_deleted(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} + +/* + * Flush deleted sw breakpoints + */ +void +kdb_flush_swbp_table(void) +{ + int i; + KDBGP("ccpu:%d flush_swbp_table: deleted:%x\n", smp_processor_id(), + kdb_swbp_deleted()); + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) { + KDBGP("flush:[%x] addr:0x%lx\n",i,kdb_sbpa[i].bp_addr); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } +} + +/* + * Delete/Clear a sw breakpoint + */ +static kdb_cpu_cmd_t +kdb_usgf_bc(void) +{ + kdbp("bc $num|all : clear given or all breakpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, bpnum = -1, delall = 0; + const char *argp; + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_bc(); + + if (!kdb_swbp_exists()) { + kdbp("No breakpoints are set\n"); + return KDB_CPU_MAIN_KDB; + } + argp = argv[1]; + + if (!strcmp(argp, "all")) + delall = 1; + else if (!kdb_str2deci(argp, &bpnum) || bpnum < 0 || bpnum > KDBMAXSBP) { + kdbp("Invalid bpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + for (i=0; i < KDBMAXSBP; i++) { + if (delall && kdb_sbpa[i].bp_addr) { + kdbp("Deleted breakpoint [%x] addr:0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + continue; + } + if (bpnum != -1 && bpnum == i) { + kdbp("Deleted breakpoint [%x] at 0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + break; + } + } + if (i >= KDBMAXSBP && !delall) + kdbp("Unable to delete breakpoint: %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Install a breakpoint in the given array entry + * Returns: 0 : failed to install + * 1 : installed successfully + */ +static int +kdb_install_swbp(int idx) /* which entry in the bp array */ +{ + kdbva_t addr = kdb_sbpa[idx].bp_addr; + domid_t domid = kdb_sbpa[idx].bp_domid; + kdbbyt_t *p = &kdb_sbpa[idx].bp_originst; + struct domain *dp = kdb_domid2ptr(domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[idx], 0, sizeof(kdb_sbpa[idx])); + kdbp("Removed bp %d addr:%p domid:%d\n", idx, addr, domid); + return 0; + } + + if (kdb_read_mem(addr, p, KDBBPSZ, domid) != KDBBPSZ){ + kdbp("Failed(R) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + if (kdb_write_mem(addr, &kdb_bpinst, KDBBPSZ, domid) != KDBBPSZ) { + kdbp("Failed(W) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + KDBGP("install_swbp: installed bp:%x at:0x%lx ccpu:%x domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, smp_processor_id(), domid); + return 1; +} + +/* + * Install all the software breakpoints + */ +void +kdb_install_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_deleted && kdb_sbpa[i].bp_addr) + kdb_install_swbp(i); +} + +static void +kdb_uninstall_a_swbp(int i) +{ + kdbva_t addr = kdb_sbpa[i].bp_addr; + kdbbyt_t originst = kdb_sbpa[i].bp_originst; + domid_t id = kdb_sbpa[i].bp_domid; + + kdb_sbpa[i].bp_just_added = 0; + if (!addr) + return; + if (kdb_write_mem(addr, &originst, KDBBPSZ, id) != KDBBPSZ) { + kdbp("Failed to uninstall breakpoint %x at:0x%lx domid:%d\n", + i, kdb_sbpa[i].bp_addr, id); + } +} + +/* + * Uninstall all the software breakpoints at beginning of kdb session + */ +void +kdb_uninstall_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + kdb_uninstall_a_swbp(i); + KDBGP("ccpu:%d uninstalled all bps\n", smp_processor_id()); +} + +/* RETURNS: rc == 2: condition was not met, rc == 3: condition was met */ +static int +kdb_check_bp_condition(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong res = 0, lhsval=0; + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { /* register condition */ + uint64_t *rp = (uint64_t *)((char *)regs + bpcp->bp_cond_lhs); + lhsval = *rp; + } else if (bpcp->bp_cond_status == 2) { /* memaddr condition */ + ulong addr = bpcp->bp_cond_lhs; + int num = sizeof(lhsval); + + if (kdb_read_mem(addr, (kdbbyt_t *)&lhsval, num, domid) != num) { + kdbp("kdb: unable to read %d bytes at %lx\n", num, addr); + return 3; + } + } + if (bpcp->bp_cond_type == 1) /* lhs == rhs */ + res = (lhsval == bpcp->bp_cond_rhs); + else /* lhs != rhs */ + res = (lhsval != bpcp->bp_cond_rhs); + + if (!res) + kdbp("KDB: [%d]Ignoring bp:%d condition not met. val:%lx\n", + smp_processor_id(), bpnum, lhsval); + + KDBGP1("bpnum:%d domid:%d cond: %d %d %lx %lx res:%d\n", bpnum, domid, + bpcp->bp_cond_status, bpcp->bp_cond_type, bpcp->bp_cond_lhs, + bpcp->bp_cond_rhs, res); + + return (res ? 3 : 2); +} + +static void +kdb_prnt_btp_info(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong i, arg, val, num, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdb_prnt_addr2sym(domid, regs->KDBIP, "\n"); + num = kdb_guest_bitness(domid)/8; + for (i=0; i < KDB_MAXBTP && (arg=btp[i]); i++) { + if (arg < sizeof (struct cpu_user_regs)) { + uint64_t *rp = (uint64_t *)((char *)regs + arg); + kdbp(" %s: %016lx ", kdb_regoffs_to_name(arg), *rp); + } else { + if (kdb_read_mem(arg, (kdbbyt_t *)&val, num, domid) != num) + kdbp("kdb: unable to read %d bytes at %lx\n", num, arg); + if (num == 8) + kdbp(" %016lx:%016lx ", arg, val); + else + kdbp(" %08lx:%08lx ", arg, val); + } + } + kdbp("\n"); + KDBGP1("bpnum:%d domid:%d btp:%p num:%d\n", bpnum, domid, btp, num); +} + +/* + * Check if the BP trap belongs to us. + * Return: 0 : not one of ours. IP not changed. (leave kdb) + * 1 : one of ours but deleted. IP decremented. (leave kdb) + * 2 : one of ours but condition not met, or btp. IP decremented.(leave) + * 3 : one of ours and active. IP decremented. (stay in kdb) + */ +int +kdb_check_sw_bkpts(struct cpu_user_regs *regs) +{ + int i, rc=0; + domid_t curid; + + curid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + for(i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_domid == curid && + kdb_sbpa[i].bp_addr == (regs->KDBIP- KDBBPSZ)) { + + regs->KDBIP -= KDBBPSZ; + rc = 3; + + if (kdb_sbpa[i].bp_ni) { + kdb_uninstall_a_swbp(i); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } else if (kdb_sbpa[i].bp_deleted) { + rc = 1; + } else if (kdb_sbpa[i].bp_type == 1) { + rc = kdb_check_bp_condition(i, regs, curid); + } else if (kdb_sbpa[i].bp_type == 2) { + kdb_prnt_btp_info(i, regs, curid); + rc = 2; + } + KDBGP1("ccpu:%d rc:%d curid:%d domid:%d addr:%lx\n", + smp_processor_id(), rc, curid, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + break; + } + } + return (rc); +} + +/* Eg: r6 == 0x123EDF or 0xFFFF2034 != 0xDEADBEEF + * regoffs: -1 means lhs is not reg. else offset of reg in cpu_user_regs + * addr: memory location if lhs is not register, eg, 0xFFFF2034 + * condp : points to != or == + * rhsval : right hand side value + */ +static void +kdb_set_bp_cond(int bpnum, int regoffs, ulong addr, char *condp, ulong rhsval) +{ + if (bpnum >= KDBMAXSBP) { + kdbp("BUG: %s got invalid bpnum\n", __FUNCTION__); + return; + } + if (regoffs != -1) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 1; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = regoffs; + } else if (addr != 0) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 2; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = addr; + } else { + kdbp("error: invalid call to kdb_set_bp_cond\n"); + return; + } + kdb_sbpa[bpnum].u.bp_cond.bp_cond_rhs = rhsval; + + if (*condp == '!') + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 2; + else + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 1; +} + +/* install breakpt at given addr. + * ni: bp for next instr + * btpa: ptr to args for btp for printing when bp is hit + * lhsp/condp/rhsp: point to strings of condition + * + * RETURNS: the index in array where installed. KDBMAXSBP if error + */ +static int +kdb_set_bp(domid_t domid, kdbva_t addr, int ni, ulong *btpa, char *lhsp, + char *condp, char *rhsp) +{ + int i, pre_existing = 0, regoffs = -1; + ulong memloc=0, rhsval=0, tmpul; + + if (btpa && (lhsp || rhsp || condp)) { + kdbp("internal error. btpa and (lhsp || rhsp || condp) set\n"); + return KDBMAXSBP; + } + if (lhsp && ((regoffs=kdb_valid_reg(lhsp)) == -1) && + kdb_str2ulong(lhsp, &memloc) && + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0) { + + kdbp("error: invalid argument: %s\n", lhsp); + return KDBMAXSBP; + } + if (rhsp && ! kdb_str2ulong(rhsp, &rhsval)) { + kdbp("error: invalid argument: %s\n", rhsp); + return KDBMAXSBP; + } + + /* see if bp already set */ + for (i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_addr==addr && kdb_sbpa[i].bp_domid==domid) { + + if (kdb_sbpa[i].bp_deleted) { + /* just re-set this bp again */ + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + pre_existing = 1; + } else { + kdbp("Breakpoint already set \n"); + return KDBMAXSBP; + } + } + } + /* see if any room left for another breakpoint */ + for (i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_addr) + break; + if (i >= KDBMAXSBP) { + kdbp("ERROR: Breakpoint table full....\n"); + return i; + } + kdb_sbpa[i].bp_addr = addr; + kdb_sbpa[i].bp_domid = domid; + if (btpa) { + kdb_sbpa[i].bp_type = 2; + kdb_sbpa[i].u.bp_btp = btpa; + } else if (regoffs != -1 || memloc) { + kdb_sbpa[i].bp_type = 1; + kdb_set_bp_cond(i, regoffs, memloc, condp, rhsval); + } else + kdb_sbpa[i].bp_type = 0; + + if (kdb_install_swbp(i)) { /* make sure it can be done */ + if (ni) + return i; + + kdb_uninstall_a_swbp(i); /* dont' show user INT3 */ + if (!pre_existing) /* make sure no is cpu sitting on it */ + kdb_sbpa[i].bp_just_added = 1; + + kdbp("bp %d set for domid:%d at: 0x%lx ", i, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(domid, addr, "\n"); + kdb_prnt_bp_extra(i); + } else { + kdbp("ERROR:Can't install bp: 0x%lx domid:%d\n", addr, domid); + if (pre_existing) /* in case a cpu is sitting on this bp in traps */ + kdb_sbpa[i].bp_deleted = 1; + else + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + return KDBMAXSBP; + } + /* make sure swbp reporting is enabled in the vmcb/vmcs */ + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + struct domain *dp = kdb_domid2ptr(domid); + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + KDBGP("debugger_attached set. domid:%d\n", domid); + } + return i; +} + +/* + * Set/List Software Breakpoint/s + */ +static kdb_cpu_cmd_t +kdb_usgf_bp(void) +{ + kdbp("bp [addr|sym][domid][condition]: display or set a breakpoint\n"); + kdbp(" where cond is like: r6 == 0x123F or rax != DEADBEEF or \n"); + kdbp(" ffff82c48038fe58 == 321E or 0xffff82c48038fe58 != 0\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9"); + kdbp(" r10 r11 r12 r13 r14 r15 rflags\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + int idx = -1; + domid_t domid = DOMID_IDLE; + char *domidstrp, *lhsp=NULL, *condp=NULL, *rhsp=NULL; + + if ((argc > 1 && *argv[1] == '?') || argc == 4 || argc > 6) + return kdb_usgf_bp(); + + if (argc < 2 || kdb_sys_crash) /* list all set breakpoints */ + return kdb_display_sbkpts(); + + /* valid argc either: 2 3 5 or 6 + * 'bp idle_loop r6 == 0xc000' OR 'bp idle_loop 3 r9 != 0xdeadbeef' */ + idx = (argc == 5) ? 2 : ((argc == 6) ? 3 : idx); + if (argc >= 5 ) { + lhsp = (char *)argv[idx]; + condp = (char *)argv[idx+1]; + rhsp = (char *)argv[idx+2]; + + if (!kdb_str2ulong(rhsp, NULL) || *(condp+1) != '=' || + (*condp != '=' && *condp != '!')) { + + return kdb_usgf_bp(); + } + } + domidstrp = (argc == 3 || argc == 6 ) ? (char *)argv[2] : NULL; + if (domidstrp && !kdb_str2domid(domidstrp, &domid, 1)) { + return kdb_usgf_bp(); + } + if (argc > 3 && is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domain not supported yet for conditional bp\n"); + return KDB_CPU_MAIN_KDB; + } + + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + /* make sure xen addr is in xen text, otherwise bp set in 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + kdb_set_bp(domid, addr, 0, NULL, lhsp, condp, rhsp); /* 0 is ni flag */ + return KDB_CPU_MAIN_KDB; +} + + +/* trace breakpoint, meaning, upon bp trace/print some info and continue */ + +static kdb_cpu_cmd_t +kdb_usgf_btp(void) +{ + kdbp("btp addr|sym [domid] reg|domid-mem-addr... : breakpoint trace\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9 "); + kdbp("r10 r11 r12 r13 r14 r15 rflags\n"); + kdbp(" Eg. btp idle_cpu 7 rax rbx 0x20ef5a5 r9\n"); + kdbp(" will print rax, rbx, *(long *)0x20ef5a5, r9 and continue\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_btp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, btpidx, numrd, argsidx, regoffs = -1; + kdbva_t addr, memloc=0; + domid_t domid = DOMID_IDLE; + ulong *btpa, tmpul; + + if ((argc > 1 && *argv[1] == '?') || argc < 3) + return kdb_usgf_btp(); + + argsidx = 2; /* assume 3rd arg is not domid */ + if (argc > 3 && kdb_str2domid(argv[2], &domid, 0)) { + + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domains are not currently supprted\n"); + return KDB_CPU_MAIN_KDB; + } else + argsidx = 3; /* 3rd arg is a domid */ + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + /* make sure xen addr is in xen text, otherwise will trace 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + + numrd = kdb_guest_bitness(domid)/8; + if (kdb_read_mem(addr, (kdbbyt_t *)&tmpul, numrd, domid) != numrd) { + kdbp("Unable to read mem from %s (%lx)\n", argv[1], addr); + return KDB_CPU_MAIN_KDB; + } + + for (btpidx=0; btpidx < KDBMAXSBP && kdb_btp_ap[btpidx]; btpidx++); + if (btpidx >= KDBMAXSBP) { + kdbp("error: table full. delete few breakpoints\n"); + return KDB_CPU_MAIN_KDB; + } + btpa = kdb_btp_argsa[btpidx]; + memset(btpa, 0, sizeof(kdb_btp_argsa[0])); + + for (i=0; argv[argsidx]; i++, argsidx++) { + + if (((regoffs=kdb_valid_reg(argv[argsidx])) == -1) && + kdb_str2ulong(argv[argsidx], &memloc) && + (memloc < sizeof (struct cpu_user_regs) || + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0)){ + + kdbp("error: invalid argument: %s\n", argv[argsidx]); + return KDB_CPU_MAIN_KDB; + } + if (i >= KDB_MAXBTP) { + kdbp("error: cannot specify more than %d args\n", KDB_MAXBTP); + return KDB_CPU_MAIN_KDB; + } + btpa[i] = (regoffs == -1) ? memloc : regoffs; + } + + i = kdb_set_bp(domid, addr, 0, btpa, 0, 0, 0); /* 0 is ni flag */ + if (i < KDBMAXSBP) + kdb_btp_ap[btpidx] = kdb_btp_argsa[btpidx]; + + return KDB_CPU_MAIN_KDB; +} + +/* + * Set/List watchpoints, ie, hardware breakpoint/s, in hypervisor + * Usage: wp [sym|addr] [w|i] w == write only data watchpoint + * i == IO watchpoint (read/write) + * + * Eg: wp : list all watchpoints set + * wp addr : set a read/write wp at given addr + * wp addr w : set a write only wp at given addr + * wp addr i : set an IO wp at given addr (16bits port #) + * + * TBD: allow to be set on particular cpu + */ +static kdb_cpu_cmd_t +kdb_usgf_wp(void) +{ + kdbp("wp [addr|sym][w|i]: display or set watchpoint. writeonly or IO\n"); + kdbp("\tnote: watchpoint is triggered after the instruction executes\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + domid_t domid = DOMID_IDLE; + int rw = 3, len = 4; /* for now just default to 4 bytes len */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_wp(); + + if (argc <= 1 || kdb_sys_crash) { /* list all set watchpoints */ + kdb_do_watchpoints(0, 0, 0); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (argc > 2) { + if (!strcmp(argv[2], "w")) + rw = 1; + else if (!strcmp(argv[2], "i")) + rw = 2; + else { + return kdb_usgf_wp(); + } + } + kdb_do_watchpoints(addr, rw, len); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_wc(void) +{ + kdbp("wc $num|all : clear given or all watchpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int wpnum; /* wp num to delete. -1 for all */ + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_wc(); + + argp = argv[1]; + + if (!strcmp(argp, "all")) + wpnum = -1; + else if (!kdb_str2deci(argp, &wpnum)) { + kdbp("Invalid wpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + kdb_clear_wps(wpnum); + return KDB_CPU_MAIN_KDB; +} + +/* display struct hvm_vcpu{} in struct vcpu.arch{} */ +static kdb_cpu_cmd_t +kdb_usgf_vcpuh(void) +{ + kdbp("vcpuh vcpu-ptr : display hvm_vcpu struct\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpuh(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *vp; + struct hvm_vcpu *hvp; + struct hvm_io_op *ioop; + struct vlapic *vlp; + + if (argc < 2 || *argv[1] == '?') + return kdb_usgf_vcpuh(); + + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp) || + !is_hvm_or_hyb_vcpu(vp)) { + + kdbp("kdb: Bad VCPU: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + hvp = &vp->arch.hvm_vcpu; + vlp = &hvp->vlapic; + kdbp("vcpu:%lx id:%d domid:%d\n", vp, vp->vcpu_id, vp->domain->domain_id); + + ioop = NULL; /* compiler warning */ + kdbp("&hvm_vcpu:%lx guest_efer:"KDBFL"\n", hvp, hvp->guest_efer); + kdbp(" guest_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->guest_cr[0], + hvp->guest_cr[1],hvp->guest_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->guest_cr[3], + hvp->guest_cr[4]); + kdbp(" hw_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->hw_cr[0], + hvp->hw_cr[1], hvp->hw_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->hw_cr[3], hvp->hw_cr[4]); + + kdbp(" VLAPIC: base msr:"KDBF64" dis:%x tmrdiv:%x\n", + vlp->hw.apic_base_msr, vlp->hw.disabled, vlp->hw.timer_divisor); + kdbp(" regs:%p regs_page:%p\n", vlp->regs, vlp->regs_page); + kdbp(" periodic time:\n"); + kdb_prnt_periodic_time(&vlp->pt); + + kdbp(" xen_port:%x flag_dr_dirty:%x dbg_st_latch:%x\n", hvp->xen_port, + hvp->flag_dr_dirty, hvp->debug_state_latch); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + + struct arch_vmx_struct *vxp = &hvp->u.vmx; + kdbp(" &vmx: %p vmcs:%lx active_cpu:%x launched:%x\n", vxp, vxp->vmcs, + vxp->active_cpu, vxp->launched); +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" exec_ctrl:%x vpid:$%d\n", vxp->exec_control, vxp->vpid); +#endif + kdbp(" host_cr0: "KDBFL" vmx: {realm:%x emulate:%x}\n", + vxp->host_cr0, vxp->vmx_realmode, vxp->vmx_emulate); + +#ifdef __x86_64__ + kdbp(" &msr_state:%p\n", &vxp->msr_state); +#endif + } else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + struct arch_svm_struct *svp = &hvp->u.svm; +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" &svm: vmcb:%lx pa:"KDBF64" asid:"KDBF64"\n", svp, svp->vmcb, + svp->vmcb_pa, svp->asid_generation); +#endif + kdbp(" msrpm:%p lnch_core:%x vmcb_sync:%x\n", svp->msrpm, + svp->launch_core, svp->vmcb_in_sync); + } + kdbp(" cachemode:%x io: {state: %x data: "KDBFL"}\n", hvp->cache_mode, + hvp->hvm_io.io_state, hvp->hvm_io.io_data); + kdbp(" mmio: {gva: "KDBFL" gpfn: "KDBFL"}\n", hvp->hvm_io.mmio_gva, + hvp->hvm_io.mmio_gpfn); + + return KDB_CPU_MAIN_KDB; +} + +/* also look into arch_get_info_guest() to get context */ +static void +kdb_print_uregs(struct cpu_user_regs *regs) +{ +#ifdef __x86_64__ + kdbp(" rflags: %016lx rip: %016lx\n", regs->rflags, regs->rip); + kdbp(" rax: %016lx rbx: %016lx rcx: %016lx\n", + regs->rax, regs->rbx, regs->rcx); + kdbp(" rdx: %016lx rsi: %016lx rdi: %016lx\n", + regs->rdx, regs->rsi, regs->rdi); + kdbp(" rbp: %016lx rsp: %016lx r8: %016lx\n", + regs->rbp, regs->rsp, regs->r8); + kdbp(" r9: %016lx r10: %016lx r11: %016lx\n", + regs->r9, regs->r10, regs->r11); + kdbp(" r12: %016lx r13: %016lx r14: %016lx\n", + regs->r12, regs->r13, regs->r14); + kdbp(" r15: %016lx\n", regs->r15); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%08lx entryvec:%08lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#else + kdbp(" eflags: %016lx eip: 016lx\n", regs->eflags, regs->eip); + kdbp(" eax: %08x ebx: %08x ecx: %08x edx: %08x\n", + regs->eax, regs->ebx, regs->ecx, regs->edx); + kdbp(" esi: %08x edi: %08x ebp: %08x esp: %08x\n", + regs->esi, regs->edi, regs->ebp, regs->esp); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%04lx entryvec:%04lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#endif +} + +#if XEN_SUBVERSION < 3 /* xen 3.1.x or xen 3.2.x */ +#ifdef CONFIG_COMPAT + #undef vcpu_info + #define vcpu_info(v, field) \ + (*(!has_32bit_shinfo((v)->domain) ? \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->native.field : \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->compat.field)) + + #undef __shared_info + #define __shared_info(d, s, field) \ + (*(!has_32bit_shinfo(d) ? \ + (typeof(&(s)->compat.field))&(s)->native.field : \ + (typeof(&(s)->compat.field))&(s)->compat.field)) +#endif +#endif + +static void kdb_display_pv_vcpu(struct vcpu *vp) +{ + int i; + struct pv_vcpu *gp = &vp->arch.pv_vcpu; + + kdbp(" GDT_VIRT_START(vcpu): %lx\n", GDT_VIRT_START(vp)); + kdbp(" GDT: entries:0x%lx frames:\n", gp->gdt_ents); + for (i=0; i < 16; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->gdt_frames[i], + gp->gdt_frames[i+1], gp->gdt_frames[i+2],gp->gdt_frames[i+3]); + + kdbp(" trap_ctxt:%lx kernel_ss:%lx kernel_sp:%lx\n", gp->trap_ctxt, + gp->kernel_ss, gp->kernel_sp); + kdbp(" ctrlregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->ctrlreg[i], + gp->ctrlreg[i+1], gp->ctrlreg[i+2], gp->ctrlreg[i+3]); +#ifdef __x86_64__ + kdbp(" callback: event: %016lx failsafe: %016lx\n", + gp->event_callback_eip, gp->failsafe_callback_eip); + kdbp(" base: fs:0x%lx gskern:0x%lx gsuser:0x%lx\n", + gp->fs_base, gp->gs_base_kernel, gp->gs_base_user); +#else + kdbp(" callback: event: %08lx:%08lx failsafe: %08lx:%08lx\n", + gp->event_callback_cs, gp->event_callback_eip, + gp->failsafe_callback_cs, gp->failsafe_callback_eip); +#endif + kdbp(" vcpu_info_mfn: %lx iopl: %x\n", gp->vcpu_info_mfn, gp->iopl); + kdbp("\n"); +} + +/* Display one VCPU info */ +static void +kdb_display_vcpu(struct vcpu *vp) +{ + int i; + struct arch_vcpu *avp = &vp->arch; + struct paging_vcpu *pvp = &vp->arch.paging; + int domid = vp->domain->domain_id; + + kdbp("\nVCPU: vcpu-id:%d vcpu-ptr:%p ", vp->vcpu_id, vp); + kdbp(" processor:%d domid:%d domp:%p\n", vp->processor, domid,vp->domain); + + if (domid == DOMID_IDLE) { + kdbp(" IDLE vcpu.\n"); + return; + } + kdbp(" pause: flags:0x%016lx count:%x\n", vp->pause_flags, + vp->pause_count.counter); + kdbp(" vcpu: initdone:%d running:%d\n", + vp->is_initialised, vp->is_running); + kdbp(" mcepend:%d nmipend:%d shut: def:%d paused:%d\n", + vp->mce_pending, vp->nmi_pending, vp->defer_shutdown, + vp->paused_for_shutdown); + kdbp(" &vcpu_info:%p : evtchn_upc_pend:%x _mask:%x\n", + vp->vcpu_info, vcpu_info(vp, evtchn_upcall_pending), + vcpu_info(vp, evtchn_upcall_mask)); + kdbp(" evt_pend_sel:%lx poll_evtchn:%x ", + *(unsigned long *)&vcpu_info(vp, evtchn_pending_sel), vp->poll_evtchn); + kdb_print_spin_lock("virq_lock:", &vp->virq_lock, "\n"); + for (i=0; i < NR_VIRQS; i++) + if (vp->virq_to_evtchn[i] != 0) + kdbp(" virq:$%d port:$%d\n", i, vp->virq_to_evtchn[i]); + + kdbp(" next:%p periodic: period:0x%lx last_event:0x%lx\n", + vp->next_in_list, vp->periodic_period, vp->periodic_last_event); + kdbp(" cpu_affinity:0x%lx vcpu_dirty_cpumask:%p sched_priv:0x%p\n", + vp->cpu_affinity, vp->vcpu_dirty_cpumask, vp->sched_priv); + kdbp(" &runstate: %p state: %x (eg. RUNSTATE_running) guestptr:%p\n", + &vp->runstate, vp->runstate.state, runstate_guest(vp)); + kdbp("\n"); + kdbp(" arch info: (%p)\n", &vp->arch); + kdbp(" guest_context: VGCF_ flags:%lx", + vp->arch.vgc_flags); /* VGCF_in_kernel */ + if (is_hvm_or_hyb_vcpu(vp)) + kdbp(" (HVM guest: IP, SP, EFLAGS may be stale)"); + kdbp("\n"); + kdb_print_uregs(&vp->arch.user_regs); + kdbp(" debugregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", avp->debugreg[i], + avp->debugreg[i+1], avp->debugreg[i+2], avp->debugreg[i+3]); + kdb_display_pv_vcpu(vp); + + kdbp(" TF_flags: %016lx guest_table: %016lx cr3:%016lx\n", + vp->arch.flags, vp->arch.guest_table.pfn, avp->cr3); + kdbp(" paging: \n"); + kdbp(" vtlb:%p\n", &pvp->vtlb); + kdbp(" &pg_mode:%p gstlevels:%d &shadow:%p shlevels:%d\n", + pvp->mode, pvp->mode->guest_levels, &pvp->mode->shadow, + pvp->mode->shadow.shadow_levels); + kdbp(" shadow_vcpu:\n"); + kdbp(" guest_vtable:%p last em_mfn:"KDBFL"\n", + pvp->shadow.guest_vtable, pvp->shadow.last_emulated_mfn); +#if CONFIG_PAGING_LEVELS >= 3 + kdbp(" l3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.l3table[3].l3, pvp->shadow.l3table[2].l3, + pvp->shadow.l3table[1].l3, pvp->shadow.l3table[0].l3); + kdbp(" gl3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.gl3e[3].l3, pvp->shadow.gl3e[2].l3, + pvp->shadow.gl3e[1].l3, pvp->shadow.gl3e[0].l3); +#endif + kdbp(" gdbsx_vcpu_event:%x\n", vp->arch.gdbsx_vcpu_event); +} + +/* + * FUNCTION: Dispaly (current) VCPU/s + */ +static kdb_cpu_cmd_t +kdb_usgf_vcpu(void) +{ + kdbp("vcpu [vcpu-ptr] : display current/vcpu-ptr vcpu info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *v = current; + + if (argc > 2 || (argc > 1 && *argv[1] == '?')) + kdb_usgf_vcpu(); + else if (argc <= 1) + kdb_display_vcpu(v); + else if (kdb_str2ulong(argv[1], (ulong *)&v) && kdb_vcpu_valid(v)) + kdb_display_vcpu(v); + else + kdbp("Invalid usage/argument:%s v:%lx\n", argv[1], (long)v); + return KDB_CPU_MAIN_KDB; +} + +/* from paging_dump_domain_info() */ +static void kdb_pr_dom_pg_modes(struct domain *d) +{ + if (paging_mode_enabled(d)) { + kdbp(" paging mode enabled"); + if ( paging_mode_shadow(d) ) + kdbp(" shadow(PG_SH_enable)"); + if ( paging_mode_hap(d) ) + kdbp(" hap(PG_HAP_enable) "); + if ( paging_mode_refcounts(d) ) + kdbp(" refcounts(PG_refcounts) "); + if ( paging_mode_log_dirty(d) ) + kdbp(" log_dirty(PG_log_dirty) "); + if ( paging_mode_translate(d) ) + kdbp(" translate(PG_translate) "); + if ( paging_mode_external(d) ) + kdbp(" external(PG_external) "); + } else + kdbp(" disabled"); + kdbp("\n"); +} + +/* print event channels info for a given domain + * NOTE: very confusing, port and event channel refer to the same thing. evtchn + * is arry of pointers to a bucket of pointers to 128 struct evtchn{}. while + * 64bit xen can handle 4096 max channels, a 32bit guest is limited to 1024 */ +static void noinline kdb_print_dom_eventinfo(struct domain *dp) +{ + uint chn; + + kdbp("\n"); + kdbp(" Evt: MAX_EVTCHNS:$%d ptr:%p pollmsk:%08lx ", + MAX_EVTCHNS(dp), dp->evtchn, dp->poll_mask[0]); + kdb_print_spin_lock("lk:", &dp->event_lock, "\n"); + kdbp(" &evtchn_pending:%p &evtchn_mask:%p\n", + shared_info(dp, evtchn_pending), shared_info(dp, evtchn_mask)); + + kdbp(" Channels info: (everything is in decimal):\n"); + for (chn=0; chn < MAX_EVTCHNS(dp); chn++ ) { + struct evtchn *bktp = dp->evtchn[chn/EVTCHNS_PER_BUCKET]; + struct evtchn *chnp = &bktp[chn & (EVTCHNS_PER_BUCKET-1)]; + char pbit = test_bit(chn, &shared_info(dp, evtchn_pending)) ? 'Y' : 'N'; + char mbit = test_bit(chn, &shared_info(dp, evtchn_mask)) ? 'Y' : 'N'; + + if (bktp==NULL || chnp->state==ECS_FREE) + continue; + + kdbp(" chn:%4u st:%d _xen=%d _vcpu_id:%2d ", chn, chnp->state, + chnp->xen_consumer, chnp->notify_vcpu_id); + if (chnp->state == ECS_UNBOUND) + kdbp(" rem-domid:%d", chnp->u.unbound.remote_domid); + else if (chnp->state == ECS_INTERDOMAIN) + kdbp(" rem-port:%d rem-dom:%d", chnp->u.interdomain.remote_port, + chnp->u.interdomain.remote_dom->domain_id); + else if (chnp->state == ECS_PIRQ) + kdbp(" pirq:%d", chnp->u.pirq); + else if (chnp->state == ECS_VIRQ) + kdbp(" virq:%d", chnp->u.virq); + + kdbp(" pend:%c mask:%c\n", pbit, mbit); + } +#if 0 + kdbp("pirq to evtchn mapping (pirq:evtchn) (all decimal):\n"); + for (i=0; i < dp->nr_pirqs; i ++) + if (dp->pirq_to_evtchn[i]) + kdbp("(%d:%d) ", i, dp->pirq_to_evtchn[i]); + kdbp("\n"); +#endif +} + +static void kdb_prnt_hvm_dom_info(struct domain *dp) +{ + struct hvm_domain *hvp = &dp->arch.hvm_domain; + + kdbp(" HVM info: Hap is%s enabled\n", + dp->arch.hvm_domain.hap_enabled ? "" : " not"); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + struct vmx_domain *vdp = &dp->arch.hvm_domain.vmx; + kdbp(" EPT: ept_mt:%x ept_wl:%x asr:%013lx\n", + vdp->ept_control.ept_mt, vdp->ept_control.ept_wl, + vdp->ept_control.asr); + } + if (hvp == NULL) + return; + + if (hvp->irq.callback_via_type == HVMIRQ_callback_vector) + kdbp(" HVMIRQ_callback_vector: %x\n", hvp->irq.callback_via.vector); + + if (!is_hvm_domain(dp)) + return; + + kdbp(" HVM PARAMS (all in hex):\n"); + kdbp("\tioreq.page:%lx ioreq.va:%lx\n", hvp->ioreq.page, hvp->ioreq.va); + kdbp("\tbuf_ioreq.page:%lx ioreq.va:%lx\n", hvp->buf_ioreq.page, + hvp->buf_ioreq.va); + kdbp("\tHVM_PARAM_CALLBACK_IRQ: %x\n", hvp->params[HVM_PARAM_CALLBACK_IRQ]); + kdbp("\tHVM_PARAM_STORE_PFN: %x\n", hvp->params[HVM_PARAM_STORE_PFN]); + kdbp("\tHVM_PARAM_STORE_EVTCHN: %x\n", hvp->params[HVM_PARAM_STORE_EVTCHN]); + kdbp("\tHVM_PARAM_PAE_ENABLED: %x\n", hvp->params[HVM_PARAM_PAE_ENABLED]); + kdbp("\tHVM_PARAM_IOREQ_PFN: %x\n", hvp->params[HVM_PARAM_IOREQ_PFN]); + kdbp("\tHVM_PARAM_BUFIOREQ_PFN: %x\n", hvp->params[HVM_PARAM_BUFIOREQ_PFN]); + kdbp("\tHVM_PARAM_VIRIDIAN: %x\n", hvp->params[HVM_PARAM_VIRIDIAN]); + kdbp("\tHVM_PARAM_TIMER_MODE: %x\n", hvp->params[HVM_PARAM_TIMER_MODE]); + kdbp("\tHVM_PARAM_HPET_ENABLED: %x\n", hvp->params[HVM_PARAM_HPET_ENABLED]); + kdbp("\tHVM_PARAM_IDENT_PT: %x\n", hvp->params[HVM_PARAM_IDENT_PT]); + kdbp("\tHVM_PARAM_DM_DOMAIN: %x\n", hvp->params[HVM_PARAM_DM_DOMAIN]); + kdbp("\tHVM_PARAM_ACPI_S_STATE: %x\n", hvp->params[HVM_PARAM_ACPI_S_STATE]); + kdbp("\tHVM_PARAM_VM86_TSS: %x\n", hvp->params[HVM_PARAM_VM86_TSS]); + kdbp("\tHVM_PARAM_VPT_ALIGN: %x\n", hvp->params[HVM_PARAM_VPT_ALIGN]); + kdbp("\tHVM_PARAM_CONSOLE_PFN: %x\n", hvp->params[HVM_PARAM_CONSOLE_PFN]); + kdbp("\tHVM_PARAM_CONSOLE_EVTCHN: %x\n", + hvp->params[HVM_PARAM_CONSOLE_EVTCHN]); + kdbp("\tHVM_PARAM_ACPI_IOPORTS_LOCATION: %x\n", + hvp->params[HVM_PARAM_ACPI_IOPORTS_LOCATION]); + kdbp("\tHVM_PARAM_MEMORY_EVENT_SINGLE_STEP: %x\n", + hvp->params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]); +} +static void kdb_print_rangesets(struct domain *dp) +{ + int locked = spin_is_locked(&dp->rangesets_lock); + + if (locked) + spin_unlock(&dp->rangesets_lock); + rangeset_domain_printk(dp); + if (locked) + spin_lock(&dp->rangesets_lock); +} + +static void kdb_pr_vtsc_info(struct arch_domain *ap) +{ + kdbp(" VTSC info: tsc_mode:%x vtsc:%x vtsc_last:%016lx\n", + ap->tsc_mode, ap->vtsc, ap->vtsc_last); + kdbp(" vtsc_offset:%016lx tsc_khz:%08lx incarnation:%x\n", + ap->vtsc_offset, ap->vtsc_offset, ap->incarnation); + kdbp(" vtsc_kerncount:%016lx _usercount:%016lx\n", + ap->vtsc_kerncount, ap->vtsc_usercount); +} + +/* display one domain info */ +static void +kdb_display_dom(struct domain *dp) +{ + struct vcpu *vp; + int printed = 0; + struct grant_table *gp = dp->grant_table; + struct arch_domain *ap = &dp->arch; + + kdbp("\nDOMAIN : domid:0x%04x ptr:0x%p\n", dp->domain_id, dp); + if (dp->domain_id == DOMID_IDLE) { + kdbp(" IDLE domain.\n"); + return; + } + if (dp->is_dying) { + kdbp(" domain is DYING.\n"); + return; + } +#if 0 + kdb_print_spin_lock(" pgalk:", &dp->page_alloc_lock, "\n"); + kdbp(" pglist: 0x%p 0x%p\n", dp->page_list.next,KDB_PGLLE(dp->page_list)); + kdbp(" xpglist: 0x%p 0x%p\n", dp->xenpage_list.next, + KDB_PGLLE(dp->xenpage_list)); + kdbp(" next:0x%p hashnext:0x%p\n", + dp->next_in_list, dp->next_in_hashbucket); +#endif + kdbp(" PAGES: tot:0x%08x max:0x%08x xenheap:0x%08x\n", + dp->tot_pages, dp->max_pages, dp->xenheap_pages); + + kdb_print_rangesets(dp); + kdb_print_dom_eventinfo(dp); + kdbp("\n"); + kdbp(" Grant table: gp:0x%p\n", gp); + if (gp) { + kdbp(" nr_frames:0x%08x shpp:0x%p active:0x%p\n", + gp->nr_grant_frames, gp->shared_raw, gp->active); + kdbp(" maptrk:0x%p maphd:0x%08x maplmt:0x%08x\n", + gp->maptrack, gp->maptrack_head, gp->maptrack_limit); + kdbp(" mapcnt:"); + kdb_print_spin_lock("mapcnt: lk:", &gp->lock, "\n"); + } + kdbp(" hvm:%d priv:%d need_iommu:%d dbg:%d dying:%d paused:%d\n", + dp->is_hvm, dp->is_privileged, dp->need_iommu, + dp->debugger_attached, dp->is_dying, dp->is_paused_by_controller); + kdb_print_spin_lock(" shutdown: lk:", &dp->shutdown_lock, "\n"); + kdbp(" shutn:%d shut:%d code:%d \n", dp->is_shutting_down, + dp->is_shut_down, dp->shutdown_code); + kdbp(" pausecnt:0x%08x vm_assist:0x"KDBFL" refcnt:0x%08x\n", + dp->pause_count.counter, dp->vm_assist, dp->refcnt.counter); + kdbp(" &domain_dirty_cpumask:%p\n", &dp->domain_dirty_cpumask); + + kdbp(" shared == vcpu_info[]: %p\n", dp->shared_info); + kdbp(" arch_shared: maxpfn: %lx pfn-mfn-frame-ll mfn: %lx\n", + arch_get_max_pfn(dp), arch_get_pfn_to_mfn_frame_list_list(dp)); + kdbp("\n"); + kdbp(" arch_domain at : %p\n", ap); + +#ifdef CONFIG_X86_64 + kdbp(" pt_pages:0x%p ", ap->mm_perdomain_pt_pages); + kdbp(" l2:0x%p l3:0x%p\n", ap->mm_perdomain_l2, ap->mm_perdomain_l3); +#else + kdbp(" pt:0x%p ", ap->mm_perdomain_pt); +#endif +#ifdef CONFIG_X86_32 + kdbp(" &mapchache:0x%xp\n", &ap->mapcache); +#endif + kdbp(" ioport:0x%p &hvm_dom:0x%p\n", ap->ioport_caps, &ap->hvm_domain); + if (is_hvm_or_hyb_domain(dp)) + kdb_prnt_hvm_dom_info(dp); + + kdbp(" &pging_dom:%p mode: %lx", &ap->paging, ap->paging.mode); + kdb_pr_dom_pg_modes(dp); + kdbp(" p2m ptr:%p pages:{%p, %p}\n", ap->p2m, ap->p2m->pages.next, + KDB_PGLLE(ap->p2m->pages)); + kdbp(" max_mapped_pfn:"KDBFL, ap->p2m->max_mapped_pfn); +#if XEN_SUBVERSION > 0 && XEN_VERSION == 4 /* xen 4.1 and above */ + kdbp(" phys_table:%p\n", ap->p2m->phys_table.pfn); +#else + kdbp(" phys_table.pfn:"KDBFL"\n", ap->phys_table.pfn); +#endif + kdbp(" physaddr_bitsz:%d 32bit_pv:%d has_32bit_shinfo:%d\n", + ap->physaddr_bitsize, ap->is_32bit_pv, ap->has_32bit_shinfo); + kdb_pr_vtsc_info(ap); + kdbp(" sched:0x%p &handle:0x%p\n", dp->sched_priv, &dp->handle); + kdbp(" vcpu ptrs:\n "); + for_each_vcpu(dp, vp) { + kdbp(" %d:%p", vp->vcpu_id, vp); + if (++printed % 4 == 0) kdbp("\n "); + } + kdbp("\n"); +} + +/* + * FUNCTION: Dispaly (current) domain/s + */ +static kdb_cpu_cmd_t +kdb_usgf_dom(void) +{ + kdbp("dom [all|domid]: Display current/all/given domain/s\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dom(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int id; + struct domain *dp = current->domain; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dom(); + + if (argc > 1) { + for(dp=domain_list; dp; dp=dp->next_in_list) + if (kdb_str2deci(argv[1], &id) && dp->domain_id==id) + kdb_display_dom(dp); + else if (!strcmp(argv[1], "all")) + kdb_display_dom(dp); + } else { + kdbp("Displaying current domain :\n"); + kdb_display_dom(dp); + } + return KDB_CPU_MAIN_KDB; +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dirq(void) +{ + kdbp("dirq : dump irq bindings\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dirq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long irq, sz, offs, addr; + char buf[KSYM_NAME_LEN+1]; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dirq(); + +#if XEN_VERSION < 4 && XEN_SUBVERSION < 5 /* xen 3.4.x or below */ + kdbp("idx/irq#/status: all are in decimal\n"); + kdbp("idx irq# status action(handler name devid)\n"); + for (irq=0; irq < NR_VECTORS; irq++) { + irq_desc_t *dp = &irq_desc[irq]; + if (!dp->action) + continue; + addr = (unsigned long)dp->action->handler; + kdbp("[%3ld]:irq:%3d st:%3d f:%s devnm:%s devid:0x%p\n", + i, vector_to_irq(irq), dp->status, (dp->status & IRQ_GUEST) ? + "GUEST IRQ" : symbols_lookup(addr, &sz, &offs, buf), + dp->action->name, dp->action->dev_id); + } +#else + kdbp("irq_desc[]:%p nr_irqs: $%d nr_irqs_gsi: $%d\n", irq_desc, nr_irqs, + nr_irqs_gsi); + kdbp("irq/vec#/status: in decimal. affinity in hex, not bitmap\n"); + kdbp("irq-- vec sta function----------- name---- type--------- "); + kdbp("aff devid------------\n"); + for (irq=0; irq < nr_irqs; irq++) { + void *devidp; + const char *symp, *nmp; + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + + if (!dp->handler || dp->handler==&no_irq_type || dp->status & IRQ_GUEST) + continue; + + addr = dp->action ? (unsigned long)dp->action->handler : 0; + symp = addr ? symbols_lookup(addr, &sz, &offs, buf) : "n/a "; + nmp = addr ? dp->action->name : "n/a "; + devidp = addr ? dp->action->dev_id : NULL; + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %03d %03d %-19s %-8s %-13s %3s 0x%p\n", irq, archp->vector, + dp->status, symp, nmp, dp->handler->typename, affstr, devidp); + } + kdb_prnt_guest_mapped_irqs(); +#endif + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_prnt_vec_irq_table(int cpu) +{ + int i,j, *tbl = per_cpu(vector_irq, cpu); + + kdbp("CPU %d : ", cpu); + for (i=0, j=0; i < NR_VECTORS; i++) + if (tbl[i] != -1) { + kdbp("(%3d:%3d) ", i, tbl[i]); + if (!(++j % 5)) + kdbp("\n "); + } + kdbp("\n"); +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dvit(void) +{ + kdbp("dvit [cpu|all]: dump (per cpu)vector irq table\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvit(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu, ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvit(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + cpu = -1; + else if (!kdb_str2deci(argv[1], &cpu)) { + kdbp("Invalid cpu:%d\n", cpu); + return kdb_usgf_dvit(); + } + } else + cpu = ccpu; + + kdbp("Per CPU vector irq table pairs (vector:irq) (all decimals):\n"); + if (cpu != -1) + kdb_prnt_vec_irq_table(cpu); + else + for_each_online_cpu(cpu) + kdb_prnt_vec_irq_table(cpu); + + return KDB_CPU_MAIN_KDB; +} + +/* do vmexit on all cpu's so intel VMCS can be dumped */ +static kdb_cpu_cmd_t +kdb_all_cpu_flush_vmcs(void) +{ + int cpu, ccpu = smp_processor_id(); + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdb_curr_cpu_flush_vmcs(); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE){ /* hung cpu */ + kdbp("Skipping (hung?) cpu %d\n", cpu); + continue; + } + kdb_cpu_cmd[cpu] = KDB_CPU_DO_VMEXIT; + while (kdb_cpu_cmd[cpu]==KDB_CPU_DO_VMEXIT); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* Display VMCS or VMCB */ +static kdb_cpu_cmd_t +kdb_usgf_dvmc(void) +{ + kdbp("dvmc [domid][vcpuid] : Dump vmcs/vmcb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvmc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid = 0; /* unsigned type don't like -1 */ + int vcpuid = -1; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvmc(); + + if (argc > 1) { + if (!kdb_str2domid(argv[1], &domid, 1)) + return KDB_CPU_MAIN_KDB; + } + if (argc > 2 && !kdb_str2deci(argv[2], &vcpuid)) { + kdbp("Bad vcpuid: 0x%x\n", vcpuid); + return KDB_CPU_MAIN_KDB; + } + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + kdb_all_cpu_flush_vmcs(); + kdb_dump_vmcs(domid, (int)vcpuid); + } else { + kdb_dump_vmcb(domid, (int)vcpuid); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_mmio(void) +{ + kdbp("mmio: dump mmio related info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmio(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmio(); + + kdbp("r/o mmio ranges:\n"); + rangeset_printk(mmio_ro_ranges); + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Dump timer/timers queues */ +static kdb_cpu_cmd_t +kdb_usgf_dtrq(void) +{ + kdbp("dtrq: dump timer queues on all cpus\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dtrq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dtrq(); + + kdb_dump_timer_queues(); + return KDB_CPU_MAIN_KDB; +} + +struct idte { + uint16_t offs0_15; + uint16_t selector; + uint16_t meta; + uint16_t offs16_31; + uint32_t offs32_63; + uint32_t resvd; +}; + +#ifdef __x86_64__ +static void +kdb_print_idte(int num, struct idte *idtp) +{ + uint16_t mta = idtp->meta; + char dpl = ((mta & 0x6000) >> 13); + char present = ((mta &0x8000) >> 15); + int tval = ((mta &0x300) >> 8); + char *type = (tval == 1) ? "Task" : ((tval== 2) ? "Intr" : "Trap"); + domid_t domid = idtp->selector==__HYPERVISOR_CS64 ? DOMID_IDLE : + current->domain->domain_id; + uint64_t addr = idtp->offs0_15 | ((uint64_t)idtp->offs16_31 << 16) | + ((uint64_t)idtp->offs32_63 << 32); + + kdbp("[%03d]: %s %x %x %04x:%016lx ", num, type, dpl, present, + idtp->selector, addr); + kdb_prnt_addr2sym(domid, addr, "\n"); +} + +/* Dump 64bit idt table currently on this cpu. Intel Vol 3 section 5.14.1 */ +static kdb_cpu_cmd_t +kdb_usgf_didt(void) +{ + kdbp("didt : dump IDT table on the current cpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i; + struct idte *idtp = (struct idte *)idt_tables[smp_processor_id()]; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_didt(); + + kdbp("IDT at:%p\n", idtp); + kdbp("idt# Type DPL P addr (all hex except idt#)\n", idtp); + for (i=0; i < 256; i++, idtp++) + kdb_print_idte(i, idtp); + return KDB_CPU_MAIN_KDB; +} +#else +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbp("kdb: Please implement me in 32bit hypervisor\n"); + return KDB_CPU_MAIN_KDB; +} +#endif + +struct gdte { /* same for TSS and LDT */ + ulong limit0:16; + ulong base0:24; /* linear address base, not pa */ + ulong acctype:4; /* Type: access rights */ + ulong S:1; /* S: 0 = system, 1 = code/data */ + ulong DPL:2; /* DPL */ + ulong P:1; /* P: Segment Present */ + ulong limit1:4; + ulong AVL:1; /* AVL: avail for use by system software */ + ulong L:1; /* L: 64bit code segment */ + ulong DB:1; /* D/B */ + ulong G:1; /* G: granularity */ + ulong base1:8; /* linear address base, not pa */ +}; + +union gdte_u { + struct gdte gdte; + u64 gval; +}; + +struct call_gdte { + unsigned short offs0:16; + unsigned short sel:16; + unsigned short misc0:16; + unsigned short offs1:16; +}; + +struct idt_gdte { + unsigned long offs0:16; + unsigned long sel:16; + unsigned long ist:3; + unsigned long unused0:13; + unsigned long offs1:16; +}; +union sgdte_u { + struct call_gdte cgdte; + struct idt_gdte igdte; + u64 sgval; +}; + +/* return binary form of a hex in string : max 4 chars 0000 to 1111 */ +static char *kdb_ret_acctype(uint acctype) +{ + static char buf[16]; + char *p = buf; + int i; + + if (acctype > 0xf) { + buf[0] = buf[1] = buf[2] = buf[3] = '?'; + buf[5] = '\n'; + return buf; + } + for (i=0; i < 4; i++, p++, acctype=acctype>>1) + *p = (acctype & 0x1) ? '1' : '0'; + + return buf; +} + +/* Display GDT table. IA-32e mode is assumded. */ +/* first display non system descriptors then display system descriptors */ +static kdb_cpu_cmd_t +kdb_usgf_dgdt(void) +{ + kdbp("dgdt [gdt-ptr decimal-byte-size] dump GDT table on current cpu or for" + "given vcpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dgdt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + union gdte_u u1; + ulong start_addr, end_addr, taddr=0; + domid_t domid = DOMID_IDLE; + int idx; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dgdt(); + + if (argc > 1) { + if (argc != 3) + return kdb_usgf_dgdt(); + + if (kdb_str2ulong(argv[1], (ulong *)&start_addr) && + kdb_str2deci(argv[2], (int *)&taddr)) { + end_addr = start_addr + taddr; + } else { + kdbp("dgdt: Bad arg:%s or %s\n", argv[1], argv[2]); + return kdb_usgf_dgdt(); + } + } else { + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + start_addr = (ulong)desc.address; + end_addr = (ulong)desc.address + desc.size; + } + kdbp("GDT: Will skip null desc at 0, start:%lx end:%lx\n", start_addr, + end_addr); + kdbp("[idx] sel --- val -------- Accs DPL P AVL L DB G " + "--Base Addr ---- Limit\n"); + kdbp(" Type\n"); + + /* skip first 8 null bytes */ + /* the cpu multiplies the index by 8 and adds to GDT.base */ + for (taddr = start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (!kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1),domid) || !u1.gval) + continue; + + if (u1.gval == 0xffffffffffffffff || u1.gval == 0x5555555555555555) + continue; /* what an effin x86 mess */ + + idx = (taddr - start_addr) / 8; + if (u1.gdte.S == 0) { /* System Desc are 16 bytes in 64bit mode */ + taddr += sizeof(ulong); + continue; + } + kdbp("[%04x] %04x %016lx %4s %x %d %d %d %d %d %016lx %05x\n", + idx, (idx<<3), u1.gval, kdb_ret_acctype(u1.gdte.acctype), + u1.gdte.DPL, + u1.gdte.P, u1.gdte.AVL, u1.gdte.L, u1.gdte.DB, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | (u64)((u64)u1.gdte.base1<<24)), + u1.gdte.limit0 | (u1.gdte.limit1<<16)); + } + + kdbp("\nSystem descriptors (S=0) : (skipping 0th entry)\n"); + for (taddr=start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + uint acctype; + u64 upper, addr64=0; + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1), domid)==0 || + u1.gval == 0 || u1.gdte.S == 1) { + continue; + } + idx = (taddr - start_addr) / 8; + taddr += sizeof(ulong); + if (kdb_read_mem(taddr, (kdbbyt_t *)&upper, 8, domid) == 0) { + kdbp("Could not read upper 8 bytes of system desc\n"); + upper = 0; + } + acctype = u1.gdte.acctype; + if (acctype != 2 && acctype != 9 && acctype != 11 && acctype !=12 && + acctype != 14 && acctype != 15) + continue; + + kdbp("[%04x] %04x val:%016lx DPL:%x P:%d type:%x ", + idx, (idx<<3), u1.gval, u1.gdte.DPL, u1.gdte.P, acctype); + + upper = (u64)((u64)(upper & 0xFFFFFFFF) << 32); + + /* Vol 3A: table: 3-2 page: 3-19 */ + if (acctype == 2) { + kdbp("LDT gate (0010)\n"); + } + else if (acctype == 9) { + kdbp("TSS avail gate(1001)\n"); + } + else if (acctype == 11) { + kdbp("TSS busy gate(1011)\n"); + } + else if (acctype == 12) { + kdbp("CALL gate (1100)\n"); + } + else if (acctype == 14) { + kdbp("IDT gate (1110)\n"); + } + else if (acctype == 15) { + kdbp("Trap gate (1111)\n"); + } + + if (acctype == 2 || acctype == 9 || acctype == 11) { + kdbp(" AVL:%d G:%d Base Addr:%016lx Limit:%x\n", + u1.gdte.AVL, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | ((u64)u1.gdte.base1<<24)| upper), + (u32)u1.gdte.limit0 | (u32)((u32)u1.gdte.limit1<<16)); + + } else if (acctype == 12) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.cgdte.offs0 | + (u64)((u64)u2.cgdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx\n", u2.cgdte.sel, addr64); + } else if (acctype == 14 || acctype == 15) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.igdte.offs0 | + (u64)((u64)u2.igdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx ist:%03x\n", u2.igdte.sel, addr64, + u2.igdte.ist); + } else + kdbp(" Error: Unrecongized type:%lx\n", acctype); + } + return KDB_CPU_MAIN_KDB; +} + +/* Display scheduler basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_sched(void) +{ + kdbp("sched: show schedular info and run queues\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sched(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_sched(); + + kdb_print_sched_info(); + return KDB_CPU_MAIN_KDB; +} + +/* Display MMU basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_mmu(void) +{ + kdbp("mmu: print basic MMU info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmu(); + + kdbp("MMU Info:\n"); + kdbp("total pages: %lx\n", total_pages); + kdbp("max page/mfn: %lx\n", max_page); + kdbp("frame_table: %p\n", frame_table); + kdbp("DIRECTMAP_VIRT_START: %lx\n", DIRECTMAP_VIRT_START); + kdbp("HYPERVISOR_VIRT_START: %lx\n", HYPERVISOR_VIRT_START); + kdbp("HYPERVISOR_VIRT_END: %lx\n", HYPERVISOR_VIRT_END); + kdbp("RO_MPT_VIRT_START: %lx\n", RO_MPT_VIRT_START); + kdbp("PERDOMAIN_VIRT_START: %lx\n", PERDOMAIN_VIRT_START); + kdbp("CONFIG_PAGING_LEVELS:%d\n", CONFIG_PAGING_LEVELS); + kdbp("__HYPERVISOR_COMPAT_VIRT_START: %lx\n", + (ulong)__HYPERVISOR_COMPAT_VIRT_START); + kdbp("&MPT[0] == %016lx\n", &machine_to_phys_mapping[0]); + + kdbp("\nFIRST_RESERVED_GDT_PAGE: %x\n", FIRST_RESERVED_GDT_PAGE); + kdbp("FIRST_RESERVED_GDT_ENTRY: %lx\n", (ulong)FIRST_RESERVED_GDT_ENTRY); + kdbp("LAST_RESERVED_GDT_ENTRY: %lx\n", (ulong)LAST_RESERVED_GDT_ENTRY); + kdbp(" Per cpu non-compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(gdt_table, cpu)); + } + kdbp(" Per cpu compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(compat_gdt_table, cpu)); + } + kdbp("\n"); + kdbp(" Per cpu tss:\n"); + for_each_online_cpu(cpu) { + struct tss_struct *tssp = &per_cpu(init_tss, cpu); + kdbp("\tcpu:%d tss:%p (rsp0:%016lx)\n", cpu, tssp, tssp->rsp0); + } +#ifdef USER_MAPPINGS_ARE_GLOBAL + kdbp("USER_MAPPINGS_ARE_GLOBAL is defined\n"); +#else + kdbp("USER_MAPPINGS_ARE_GLOBAL is NOT defined\n"); +#endif + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* for HVM/HYB guests, go thru EPT. For PV guest we need to go to the btree. + * btree: pfn_to_mfn_frame_list_list is root that points (has mfns of) upto 16 + * pages (call 'em l2 nodes) that contain mfns of guest p2m table pages + * NOTE: num of entries in a p2m page is same as num of entries in l2 node */ +static noinline ulong +kdb_gpfn2mfn(struct domain *dp, ulong gpfn, p2m_type_t *typep) +{ + int idx; + + if ( !paging_mode_translate(dp) ) { + mfn_t *mfn_va, mfn = arch_get_pfn_to_mfn_frame_list_list(dp); + int g_longsz = kdb_guest_bitness(dp->domain_id)/8; + int entries_per_pg = PAGE_SIZE/g_longsz; + const int shift = get_count_order(entries_per_pg); + + if ( !mfn_valid(mfn) ) { + kdbp("Invalid frame_list_list mfn:%lx for non-xlate guest\n", mfn); + return INVALID_MFN; + } + + mfn_va = map_domain_page(mfn); + idx = gpfn >> 2*shift; /* index in root page/node */ + if (idx > 15) { + kdbp("gpfn:%lx idx:%x not in frame list limit of z16\n", gpfn, idx); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn = (g_longsz == 4) ? ((int *)mfn_va)[idx] : mfn_va[idx]; + if (mfn==0) { + kdbp("No mfn for idx:%d for gpfn:%lx in root pg\n", idx, gpfn); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn_va = map_domain_page(mfn); + KDBGP1("p2m: idx:%x fll:%lx mfn of 2nd lvl page:%lx\n", idx, + arch_get_pfn_to_mfn_frame_list_list(dp), mfn); + + idx = (gpfn>>shift) & ((1< 0 + return get_gfn(dp, gpfn, typep); +#else + return get_gfn(dp, gpfn, typep); +#endif + + return INVALID_MFN; +} + +/* given a pfn, find it's mfn */ +static kdb_cpu_cmd_t +kdb_usgf_p2m(void) +{ + kdbp("p2m domid 0xgpfn : gpfn to mfn\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_p2m(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + ulong gpfn; + p2m_type_t p2mtype; + + if (argc < 3 || + (dp=kdb_strdomid2ptr(argv[1], 1)) == NULL || + !kdb_str2ulong(argv[2], &gpfn)) { + + return kdb_usgf_p2m(); + } + if ( paging_mode_translate(dp) ) + kdbp("p2m[%lx] == %lx type:%d\n", gpfn, + kdb_gpfn2mfn(dp, gpfn, &p2mtype), p2mtype); + else + kdbp("p2m[%lx] == %lx type:N/A(PV)\n", gpfn, + kdb_gpfn2mfn(dp, gpfn, &p2mtype)); + return KDB_CPU_MAIN_KDB; +} + +/* given an mfn, lookup pfn in the MPT */ +static kdb_cpu_cmd_t +kdb_usgf_m2p(void) +{ + kdbp("m2p 0xmfn: mfn to pfn\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_m2p(int argc, const char **argv, struct cpu_user_regs *regs) +{ + mfn_t mfn; + if (argc > 1 && kdb_str2ulong(argv[1], &mfn)) + if (mfn_valid(mfn)) + kdbp("mpt[%x] == %lx\n", mfn, machine_to_phys_mapping[mfn]); + else + kdbp("Invalid mfn:%lx\n", mfn); + else + kdb_usgf_m2p(); + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_pr_pg_pgt_flds(unsigned long type_info) +{ + switch (type_info & PGT_type_mask) { + case (PGT_l1_page_table): + kdbp(" page is PGT_l1_page_table\n"); + break; + case PGT_l2_page_table: + kdbp(" page is PGT_l2_page_table\n"); + break; + case PGT_l3_page_table: + kdbp(" page is PGT_l3_page_table\n"); + break; + case PGT_l4_page_table: + kdbp(" page is PGT_l4_page_table\n"); + break; + case PGT_seg_desc_page: + kdbp(" page is seg desc page\n"); + break; + case PGT_writable_page: + kdbp(" page is writable page\n"); + break; + case PGT_shared_page: + kdbp(" page is shared page\n"); + break; + } + if (type_info & PGT_pinned) + kdbp(" page is pinned\n"); + if (type_info & PGT_validated) + kdbp(" page is validated\n"); + if (type_info & PGT_pae_xen_l2) + kdbp(" page is PGT_pae_xen_l2\n"); + if (type_info & PGT_partial) + kdbp(" page is PGT_partial\n"); + if (type_info & PGT_locked) + kdbp(" page is PGT_locked\n"); +} + +static void +kdb_pr_pg_pgc_flds(unsigned long count_info) +{ + if (count_info & PGC_allocated) + kdbp(" PGC_allocated"); + if (count_info & PGC_xen_heap) + kdbp(" PGC_xen_heap"); + if (count_info & PGC_page_table) + kdbp(" PGC_page_table"); + if (count_info & PGC_broken) + kdbp(" PGC_broken"); +#if XEN_VERSION < 4 /* xen 3.x.x */ + if (count_info & PGC_offlining) + kdbp(" PGC_offlining"); + if (count_info & PGC_offlined) + kdbp(" PGC_offlined"); +#else + if (count_info & PGC_state_inuse) + kdbp(" PGC_inuse"); + if (count_info & PGC_state_offlining) + kdbp(" PGC_state_offlining"); + if (count_info & PGC_state_offlined) + kdbp(" PGC_state_offlined"); + if (count_info & PGC_state_free) + kdbp(" PGC_state_free"); +#endif + kdbp("\n"); +} + +/* print struct page_info{} given ptr to it or an mfn + * NOTE: that given an mfn there seems no way of knowing how it's used, so + * here we just print all info and let user decide what's applicable */ +static kdb_cpu_cmd_t +kdb_usgf_dpage(void) +{ + kdbp("dpage mfn|page-ptr : Display struct page\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dpage(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long val; + struct page_info *pgp; + struct domain *dp; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dpage(); + + if ((kdb_str2ulong(argv[1], &val) == 0) || + (val < (ulong)frame_table && !mfn_valid(val))) { + + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdbp("Page Info:\n"); + if (val <= (ulong)frame_table) { /* arg is mfn */ + pgp = mfn_to_page(val); + kdbp(" mfn: %lx page_info:%p\n", val, pgp); + } else { + pgp = (struct page_info *)val; /* arg is struct page{} */ + if (pgp < frame_table || pgp >= frame_table+max_page) { + kdbp("Invalid page ptr. below/beyond max_page\n"); + return KDB_CPU_MAIN_KDB; + } + kdbp(" mfn: %lx page_info:%p\n", page_to_mfn(pgp), pgp); + } + kdbp(" count_info: %016lx (refcnt: %x)\n", pgp->count_info, + pgp->count_info & PGC_count_mask); +#if XEN_VERSION > 3 || XEN_SUBVERSION > 3 /* xen 3.4.x or later */ + kdb_pr_pg_pgc_flds(pgp->count_info); + + kdbp("In use info:\n"); + kdbp(" type_info:%016lx\n", pgp->u.inuse.type_info); + kdb_pr_pg_pgt_flds(pgp->u.inuse.type_info); + dp = page_get_owner(pgp); + kdbp(" domid:%d (pickled:%lx)\n", dp ? dp->domain_id : -1, + pgp->v.inuse._domain); + + kdbp("Shadow Info:\n"); + kdbp(" type:%x pinned:%x count:%x\n", pgp->u.sh.type, pgp->u.sh.pinned, + pgp->u.sh.count); + kdbp(" back:%lx shadow_flags:%x next_shadow:%lx\n", pgp->v.sh.back, + pgp->shadow_flags, pgp->next_shadow); + + kdbp("Free Info\n"); + kdbp(" need_tlbflush:%d order:%d tlbflush_timestamp:%x\n", + pgp->u.free.need_tlbflush, pgp->v.free.order, + pgp->tlbflush_timestamp); +#else + if (pgp->count_info & PGC_allocated) /* page allocated */ + kdbp(" PGC_allocated"); + if (pgp->count_info & PGC_page_table) /* page table page */ + kdbp(" PGC_page_table"); + kdbp("\n"); + kdbp(" page is %s xen heap page\n", is_xen_heap_page(pgp) ? "a":"NOT"); + kdbp(" cacheattr:%x\n", (pgp->count_info>>PGC_cacheattr_base) & 7); + if (pgp->count_info & PGC_count_mask) { /* page in use */ + dp = pgp->u.inuse._domain; /* pickled domain */ + kdbp(" page is in use\n"); + kdbp(" domid: %d (pickled dom:%x)\n", + dp ? (unpickle_domptr(dp))->domain_id : -1, dp); + kdbp(" type_info: %lx\n", pgp->u.inuse.type_info); + kdb_prt_pg_type(pgp->u.inuse.type_info); + } else { /* page is free */ + kdbp(" page is free\n"); + kdbp(" order: %x\n", pgp->u.free.order); + kdbp(" cpumask: %lx\n", pgp->u.free.cpumask.bits); + } + kdbp(" tlbflush/shadow_flags: %lx\n", pgp->shadow_flags); +#endif + return KDB_CPU_MAIN_KDB; +} + +/* display asked msr value */ +static kdb_cpu_cmd_t +kdb_usgf_dmsr(void) +{ + kdbp("dmsr address : Display msr value\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dmsr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long addr, val; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dmsr(); + + if ((kdb_str2ulong(argv[1], &addr) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + rdmsrl(addr, val); + kdbp("msr: %lx val:%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_cpuid(void) +{ + kdbp("cpuid eax : Display cpuid value returned in rax\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpuid(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long rax=0, rbx=0, rcx=0, rdx=0; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_cpuid(); + + if ((kdb_str2ulong(argv[1], &rax) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } +#if 0 + __asm__ __volatile__ ( + /* "pushl %%rax \n" */ + + "movl %0, %%rax \n" + "cpuid \n" + : "=&a" (rax), "=b" (rbx), "=c" (rcx), "=d" (rdx) + : "0" (rax) + : "rax", "rbx", "rcx", "rdx", "memory"); +#endif + cpuid(rax, &rax, &rbx, &rcx, &rdx); + kdbp("rax: %016lx rbx:%016lx rcx:%016lx rdx:%016lx\n", rax, rbx, + rcx, rdx); + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_wept(void) +{ + kdbp("wept domid gfn: walk ept table for given domid and gfn\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wept(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + ulong gfn; + + if ((argc > 1 && *argv[1] == '?') || argc != 3) + return kdb_usgf_wept(); + if ((dp=kdb_strdomid2ptr(argv[1], 1)) && kdb_str2ulong(argv[2], &gfn)) + ept_walk_table(dp, gfn); + else + kdb_usgf_wept(); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Save symbols info for a guest, dom0 or other... + */ +static kdb_cpu_cmd_t +kdb_usgf_sym(void) +{ + kdbp("sym domid &kallsyms_names &kallsyms_addresses &kallsyms_num_syms\n"); + kdbp("\t [&kallsyms_token_table] [&kallsyms_token_index]\n"); + kdbp("\ttoken _table and _index MUST be specified for el5\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sym(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong namesp, addrap, nump, toktblp, tokidxp; + domid_t domid; + + if (argc < 5) { + return kdb_usgf_sym(); + } + toktblp = tokidxp = 0; /* optional parameters */ + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &namesp) && + kdb_str2ulong(argv[3], &addrap) && + kdb_str2ulong(argv[4], &nump) && + (argc==5 || (argc==7 && kdb_str2ulong(argv[5], &toktblp) && + kdb_str2ulong(argv[6], &tokidxp)))) { + + kdb_sav_dom_syminfo(domid, namesp, addrap,nump,toktblp,tokidxp); + } else + kdb_usgf_sym(); + return KDB_CPU_MAIN_KDB; +} + + +/* mods is the dumb ass &modules. modules is struct {nxt, prev}, and not ptr */ +static void +kdb_dump_linux_modules(domid_t domid, ulong mods, uint nxtoffs, uint nmoffs, + uint coreoffs) +{ + const int bufsz = 56; + char buf[bufsz]; + uint64_t addr, addrval, *nxtptr, *modptr; + uint i, num = 8; + + if (kdb_guest_bitness(domid) == 32) + num = 4; + + /* first read modules{}.next ptr */ + if (kdb_read_mem(mods, (kdbbyt_t *)&nxtptr, num, domid) != num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + + KDBGP("mods:%p nxtptr:%p nmoffs:%x coreoffs:%x\n", (void *)mods, nxtptr, + nmoffs, coreoffs); + + while ((uint64_t)nxtptr != mods) { + + modptr = (uint64_t *) ((ulong)nxtptr - nxtoffs); + + addr = (ulong)modptr + coreoffs; + if (kdb_read_mem(addr, (kdbbyt_t *)&addrval, num, domid) != num) { + kdbp("ERROR: Could not read mod addr at :%p\n", (void *)addr); + return; + } + + KDBGP("modptr:%p addr:%p\n", modptr, (void *)addr); + addr = (ulong)modptr + nmoffs; + i=0; + do { + if (kdb_read_mem(addr, (kdbbyt_t *)&buf[i], 1, domid) != 1) { + kdbp("ERROR:Could not read name ch at addr:%p\n", (void *)addr); + return; + } + addr++; + } while (buf[i] && i++ < bufsz); + buf[bufsz-1] = '\0'; + + kdbp("%016lx %016lx %s\n", modptr, addrval, buf); + + if (kdb_read_mem((ulong)nxtptr, (kdbbyt_t *)&nxtptr, num, domid)!=num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + KDBGP("nxtptr:%p addr:%p\n", nxtptr, (void *)addr); + } +} + +/* Display modules loaded in linux guest */ +static kdb_cpu_cmd_t +kdb_usgf_mod(void) +{ + kdbp("mod domid &modules next-offs name-offs module_core-offs\n"); + kdbp("\twhere next-offs: &((struct module *)0)->list.next\n"); + kdbp("\tname-offs: &((struct module *)0)->name etc..\n"); + kdbp("\tDisplays all loaded modules in the linux guest\n"); + kdbp("\tEg: mod 0 ffffffff80302780 8 0x18 0x178\n"); + + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_cmdf_mod(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong mods, nxtoffs, nmoffs, coreoffs; + domid_t domid; + + if (argc < 6) { + return kdb_usgf_mod(); + } + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &mods) && + kdb_str2ulong(argv[3], &nxtoffs) && + kdb_str2ulong(argv[4], &nmoffs) && + kdb_str2ulong(argv[5], &coreoffs)) { + + kdbp("modptr address name\n"); + kdb_dump_linux_modules(domid, mods, nxtoffs, nmoffs, coreoffs); + } else + kdb_usgf_mod(); + return KDB_CPU_MAIN_KDB; +} + +/* toggle kdb debug trace level */ +static kdb_cpu_cmd_t +kdb_usgf_kdbdbg(void) +{ + kdbp("kdbdbg : trace info to debug kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbdbg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbdbg(); + + kdbdbg = (kdbdbg==3) ? 0 : (kdbdbg+1); + kdbp("kdbdbg set to:%d\n", kdbdbg); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_reboot(void) +{ + kdbp("reboot: reboot system\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_reboot(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_reboot(); + + machine_restart(500); + return KDB_CPU_MAIN_KDB; /* not reached */ +} + + +static kdb_cpu_cmd_t +kdb_usgf_trcon(void) +{ + kdbp("trcon: turn user added kdb tracing on\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcon(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcon(); + + kdb_trcon = 1; + kdbp("kdb tracing is now on\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcoff(void) +{ + kdbp("trcoff: turn user added kdb tracing off\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcoff(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcoff(); + + kdb_trcon = 0; + kdbp("kdb tracing is now off\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcz(void) +{ + kdbp("trcz : zero entire trace buffer\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcz(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcz(); + + kdb_trczero(); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcp(void) +{ + kdbp("trcp : give hints to dump trace buffer via dw/dd command\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcp(); + + kdb_trcp(); + return KDB_CPU_MAIN_KDB; +} + +/* print some basic info, constants, etc.. */ +static kdb_cpu_cmd_t +kdb_usgf_info(void) +{ + kdbp("info : display basic info, constants, etc..\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_info(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + struct cpuinfo_x86 *bcdp; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_info(); + + kdbp("Version: %d.%d.%s (%s@%s) %s\n", xen_major_version(), + xen_minor_version(), xen_extra_version(), xen_compile_by(), + xen_compile_domain(), xen_compile_date()); + kdbp("__XEN_LATEST_INTERFACE_VERSION__ : 0x%x\n", + __XEN_LATEST_INTERFACE_VERSION__); + kdbp("__XEN_INTERFACE_VERSION__: 0x%x\n", __XEN_INTERFACE_VERSION__); + + bcdp = &boot_cpu_data; + kdbp("CPU: (all decimal)"); + if (bcdp->x86_vendor == X86_VENDOR_AMD) + kdbp(" AMD"); + else + kdbp(" INTEL"); + kdbp(" family:%d model:%d\n", bcdp->x86, bcdp->x86_model); + kdbp(" vendor_id:%16s model_id:%64s\n", bcdp->x86_vendor_id, + bcdp->x86_model_id); + kdbp(" cpuidlvl:%d cache:sz:%d align:%d\n", bcdp->cpuid_level, + bcdp->x86_cache_size, bcdp->x86_cache_alignment); + kdbp(" power:%d cores: max:%d booted:%d siblings:%d apicid:%d\n", + bcdp->x86_power, bcdp->x86_max_cores, bcdp->booted_cores, + bcdp->x86_num_siblings, bcdp->apicid); + kdbp(" "); + if (cpu_has_apic) + kdbp("_apic"); + if (cpu_has_sep) + kdbp("|_sep"); + if (cpu_has_xmm3) + kdbp("|_xmm3"); + if (cpu_has_ht) + kdbp("|_ht"); + if (cpu_has_nx) + kdbp("|_nx"); + if (cpu_has_clflush) + kdbp("|_clflush"); + if (cpu_has_page1gb) + kdbp("|_page1gb"); + if (cpu_has_ffxsr) + kdbp("|_ffxsr"); + if (cpu_has_x2apic) + kdbp("|_x2apic"); + kdbp("\n\n"); + kdbp("CC:"); +#if defined(CONFIG_X86_64) + kdbp(" CONFIG_X86_64"); +#endif +#if defined(CONFIG_COMPAT) + kdbp(" CONFIG_COMPAT"); +#endif +#if defined(CONFIG_PAGING_ASSISTANCE) + kdbp(" CONFIG_PAGING_ASSISTANCE"); +#endif + kdbp("\n"); + kdbp("cpu has following features:\n"); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_TSC_RELIABLE) ? + "X86_FEATURE_TSC_RELIABLE" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_CONSTANT_TSC)? "X86_FEATURE_CONSTANT_TSC":""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) ? "X86_FEATURE_NONSTOP_TSC" :""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_RDTSCP) ? "X86_FEATURE_RDTSCP" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_FXSR) ? "X86_FEATURE_FXSR" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_CPUID_FAULTING) ? + "X86_FEATURE_CPUID_FAULTING" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_PAGE1GB) ? "X86_FEATURE_PAGE1GB" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_MWAIT) ? "X86_FEATURE_MWAIT" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_X2APIC) ? "X86_FEATURE_X2APIC":""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_XSAVE) ? "X86_FEATURE_XSAVE":""); + kdbp("\n"); + + kdbp("MAX_VIRT_CPUS:$%d MAX_HVM_VCPUS:$%d\n", MAX_VIRT_CPUS,MAX_HVM_VCPUS); + kdbp("NR_EVENT_CHANNELS: $%d\n", NR_EVENT_CHANNELS); + kdbp("NR_EVTCHN_BUCKETS: $%d\n", NR_EVTCHN_BUCKETS); + + kdbp("\nDomains and their vcpus:\n"); + for_each_domain(dp) { + struct vcpu *vp; + int printed=0; + kdbp(" Domain: {id:%d 0x%x ptr:%p%s} VCPUs:\n", + dp->domain_id, dp->domain_id, dp, dp->is_dying ? " DYING":""); + for(vp=dp->vcpu[0]; vp; vp = vp->next_in_list) { + kdbp(" {id:%d p:%p runstate:%d}", vp->vcpu_id, vp, + vp->runstate.state); + if (++printed % 2 == 0) kdbp("\n"); + } + kdbp("\n"); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_cur(void) +{ + kdbp("cur : display current domid and vcpu\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Checking for guest_mode() not feasible here. if dom0->hcall->bp in xen, + * then g_m() will show xen, but vcpu is still dom0. hence just look at + * current only */ +static kdb_cpu_cmd_t +kdb_cmdf_cur(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t id = current->domain->domain_id; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cur(); + + kdbp("domid: %d{%p} %s vcpu:%d {%p} ", id, current->domain, + (id==DOMID_IDLE) ? "(IDLE)" : "", current->vcpu_id, current); + + /* if (id != DOMID_IDLE) { */ + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + u64 addr = -1; + __vmptrst(&addr); + kdbp(" VMCS:"KDBFL, addr); + } + /* } */ + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* stub to quickly and easily add a new command */ +static kdb_cpu_cmd_t +kdb_usgf_usr1(void) +{ + kdbp("usr1: add any arbitrary cmd using this in kdb_cmds.c\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_usr1(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_h(void) +{ + kdbp("h: display all commands. See kdb/README for more info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_h(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbtab_t *tbp; + + kdbp(" - ccpu is current cpu \n"); + kdbp(" - following are always in decimal:\n"); + kdbp(" vcpu num, cpu num, domid\n"); + kdbp(" - otherwise, almost all numbers are in hex (0x not needed)\n"); + kdbp(" - output: $17 means decimal 17\n"); + kdbp(" - domid 7fff($32767) refers to hypervisor\n"); + kdbp(" - if no domid before function name, then it's hypervisor\n"); + kdbp(" - earlykdb in xen grub line to break into kdb during boot\n"); + kdbp(" - command ? will show the command usage\n"); + kdbp("\n"); + + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_usgf; tbp++) + (*tbp->kdb_cmd_usgf)(); + return KDB_CPU_MAIN_KDB; +} + +/* ===================== cmd table initialization ========================== */ +void __init +kdb_init_cmdtab(void) +{ + static kdbtab_t _kdb_cmd_table[] = { + + {"info", kdb_cmdf_info, kdb_usgf_info, 1, KDB_REPEAT_NONE}, + {"cur", kdb_cmdf_cur, kdb_usgf_cur, 1, KDB_REPEAT_NONE}, + + {"f", kdb_cmdf_f, kdb_usgf_f, 1, KDB_REPEAT_NONE}, + {"fg", kdb_cmdf_fg, kdb_usgf_fg, 1, KDB_REPEAT_NONE}, + + {"dw", kdb_cmdf_dw, kdb_usgf_dw, 1, KDB_REPEAT_NO_ARGS}, + {"dd", kdb_cmdf_dd, kdb_usgf_dd, 1, KDB_REPEAT_NO_ARGS}, + {"dwm", kdb_cmdf_dwm, kdb_usgf_dwm, 1, KDB_REPEAT_NO_ARGS}, + {"ddm", kdb_cmdf_ddm, kdb_usgf_ddm, 1, KDB_REPEAT_NO_ARGS}, + {"dr", kdb_cmdf_dr, kdb_usgf_dr, 1, KDB_REPEAT_NONE}, + {"drg", kdb_cmdf_drg, kdb_usgf_drg, 1, KDB_REPEAT_NONE}, + + {"dis", kdb_cmdf_dis, kdb_usgf_dis, 1, KDB_REPEAT_NO_ARGS}, + {"dism",kdb_cmdf_dism, kdb_usgf_dism, 1, KDB_REPEAT_NO_ARGS}, + + {"mw", kdb_cmdf_mw, kdb_usgf_mw, 1, KDB_REPEAT_NONE}, + {"md", kdb_cmdf_md, kdb_usgf_md, 1, KDB_REPEAT_NONE}, + {"mr", kdb_cmdf_mr, kdb_usgf_mr, 1, KDB_REPEAT_NONE}, + + {"bc", kdb_cmdf_bc, kdb_usgf_bc, 0, KDB_REPEAT_NONE}, + {"bp", kdb_cmdf_bp, kdb_usgf_bp, 1, KDB_REPEAT_NONE}, + {"btp", kdb_cmdf_btp, kdb_usgf_btp, 1, KDB_REPEAT_NONE}, + + {"wp", kdb_cmdf_wp, kdb_usgf_wp, 1, KDB_REPEAT_NONE}, + {"wc", kdb_cmdf_wc, kdb_usgf_wc, 0, KDB_REPEAT_NONE}, + + {"ni", kdb_cmdf_ni, kdb_usgf_ni, 0, KDB_REPEAT_NO_ARGS}, + {"ss", kdb_cmdf_ss, kdb_usgf_ss, 1, KDB_REPEAT_NO_ARGS}, + {"ssb",kdb_cmdf_ssb,kdb_usgf_ssb,0, KDB_REPEAT_NO_ARGS}, + {"go", kdb_cmdf_go, kdb_usgf_go, 0, KDB_REPEAT_NONE}, + + {"cpu",kdb_cmdf_cpu, kdb_usgf_cpu, 1, KDB_REPEAT_NONE}, + {"nmi",kdb_cmdf_nmi, kdb_usgf_nmi, 1, KDB_REPEAT_NONE}, + {"percpu",kdb_cmdf_percpu, kdb_usgf_percpu, 1, KDB_REPEAT_NONE}, + + {"sym", kdb_cmdf_sym, kdb_usgf_sym, 1, KDB_REPEAT_NONE}, + {"mod", kdb_cmdf_mod, kdb_usgf_mod, 1, KDB_REPEAT_NONE}, + + {"vcpuh",kdb_cmdf_vcpuh, kdb_usgf_vcpuh, 1, KDB_REPEAT_NONE}, + {"vcpu", kdb_cmdf_vcpu, kdb_usgf_vcpu, 1, KDB_REPEAT_NONE}, + {"dom", kdb_cmdf_dom, kdb_usgf_dom, 1, KDB_REPEAT_NONE}, + + {"sched", kdb_cmdf_sched, kdb_usgf_sched, 1, KDB_REPEAT_NONE}, + {"mmu", kdb_cmdf_mmu, kdb_usgf_mmu, 1, KDB_REPEAT_NONE}, + {"p2m", kdb_cmdf_p2m, kdb_usgf_p2m, 1, KDB_REPEAT_NONE}, + {"m2p", kdb_cmdf_m2p, kdb_usgf_m2p, 1, KDB_REPEAT_NONE}, + {"dpage", kdb_cmdf_dpage, kdb_usgf_dpage, 1, KDB_REPEAT_NONE}, + {"dmsr", kdb_cmdf_dmsr, kdb_usgf_dmsr, 1, KDB_REPEAT_NONE}, + {"cpuid", kdb_cmdf_cpuid, kdb_usgf_cpuid, 1, KDB_REPEAT_NONE}, + {"wept", kdb_cmdf_wept, kdb_usgf_wept, 1, KDB_REPEAT_NONE}, + + {"dtrq", kdb_cmdf_dtrq, kdb_usgf_dtrq, 1, KDB_REPEAT_NONE}, + {"didt", kdb_cmdf_didt, kdb_usgf_didt, 1, KDB_REPEAT_NONE}, + {"dgdt", kdb_cmdf_dgdt, kdb_usgf_dgdt, 1, KDB_REPEAT_NONE}, + {"dirq", kdb_cmdf_dirq, kdb_usgf_dirq, 1, KDB_REPEAT_NONE}, + {"dvit", kdb_cmdf_dvit, kdb_usgf_dvit, 1, KDB_REPEAT_NONE}, + {"dvmc", kdb_cmdf_dvmc, kdb_usgf_dvmc, 1, KDB_REPEAT_NONE}, + {"mmio", kdb_cmdf_mmio, kdb_usgf_mmio, 1, KDB_REPEAT_NONE}, + + /* tracing related commands */ + {"trcon", kdb_cmdf_trcon, kdb_usgf_trcon, 0, KDB_REPEAT_NONE}, + {"trcoff",kdb_cmdf_trcoff, kdb_usgf_trcoff, 0, KDB_REPEAT_NONE}, + {"trcz", kdb_cmdf_trcz, kdb_usgf_trcz, 0, KDB_REPEAT_NONE}, + {"trcp", kdb_cmdf_trcp, kdb_usgf_trcp, 1, KDB_REPEAT_NONE}, + + {"usr1", kdb_cmdf_usr1, kdb_usgf_usr1, 1, KDB_REPEAT_NONE}, + {"kdbf", kdb_cmdf_kdbf, kdb_usgf_kdbf, 1, KDB_REPEAT_NONE}, + {"kdbdbg",kdb_cmdf_kdbdbg, kdb_usgf_kdbdbg, 1, KDB_REPEAT_NONE}, + {"reboot",kdb_cmdf_reboot, kdb_usgf_reboot, 1, KDB_REPEAT_NONE}, + {"h", kdb_cmdf_h, kdb_usgf_h, 1, KDB_REPEAT_NONE}, + + {"", NULL, NULL, 0, 0}, + }; + kdb_cmd_tbl = _kdb_cmd_table; + return; +} diff -r 54c8c9eaee92 xen/kdb/kdb_io.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_io.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ +#include "include/kdbinc.h" + +#define K_BACKSPACE 0x8 /* ctrl-H */ +#define K_BACKSPACE1 0x7f /* ctrl-? */ +#define K_UNDERSCORE 0x5f +#define K_CMD_BUFSZ 160 +#define K_CMD_MAXI (K_CMD_BUFSZ - 1) /* max index in buffer */ + +#if 0 /* make a history array some day */ +#define K_UP_ARROW /* sequence : 1b 5b 41 ie, '\e[A' */ +#define K_DN_ARROW /* sequence : 1b 5b 42 ie, '\e[B' */ +#define K_NUM_HIST 32 +static int cursor; +static char cmds_a[NUM_HIST][K_CMD_BUFSZ]; +#endif + +static char cmds_a[K_CMD_BUFSZ]; + + +static int +kdb_key_valid(int key) +{ + /* note: isspace() is more than ' ', hence we don't use it here */ + if (isalnum(key) || key == ' ' || key == K_BACKSPACE || key == '\n' || + key == '?' || key == K_UNDERSCORE || key == '=' || key == '!') + return 1; + return 0; +} + +/* display kdb prompt and read command from the console + * RETURNS: a '\n' terminated command buffer */ +char * +kdb_get_cmdline(char *prompt) +{ + #define K_BELL 0x7 + #define K_CTRL_C 0x3 + + int key, i=0; + + kdbp(prompt); + memset(cmds_a, 0, K_CMD_BUFSZ); + cmds_a[K_CMD_BUFSZ-1] = '\n'; + + do { + key = console_getc(); + if (key == '\r') + key = '\n'; + if (key == K_BACKSPACE1) + key = K_BACKSPACE; + + if (key == K_CTRL_C || (i==K_CMD_MAXI && key != '\n')) { + console_putc('\n'); + if (i >= K_CMD_MAXI) { + kdbp("KDB: cmd buffer overflow\n"); + console_putc(K_BELL); + } + memset(cmds_a, 0, K_CMD_BUFSZ); + i = 0; + kdbp(prompt); + continue; + } + if (!kdb_key_valid(key)) { + console_putc(K_BELL); + continue; + } + if (key == K_BACKSPACE) { + if (i==0) { + console_putc(K_BELL); + continue; + } else + cmds_a[--i] = '\0'; + console_putc(K_BACKSPACE); + console_putc(' '); /* erase character */ + } else + cmds_a[i++] = key; + + console_putc(key); + + } while (key != '\n'); + + return cmds_a; +} + +/* + * printk takes a lock, an NMI could come in after that, and another cpu may + * spin. also, the console lock is forced unlock, so panic is been seen on + * 8 way. hence, no printk() calls. + */ +static volatile int kdbp_gate = 0; +void +kdbp(const char *fmt, ...) +{ + static char buf[1024]; + va_list args; + char *p; + int i=0; + + while ((__cmpxchg(&kdbp_gate, 0,1, sizeof(kdbp_gate)) != 0) && i++<1000) + mdelay(10); + + va_start(args, fmt); + (void)vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + + for (p=buf; *p != '\0'; p++) + console_putc(*p); + kdbp_gate = 0; +} + + +/* + * copy/read machine memory. + * RETURNS: number of bytes copied + */ +int +kdb_read_mmem(kdbma_t maddr, kdbbyt_t *dbuf, int len) +{ + ulong remain, orig=len; + + while (len > 0) { + ulong pagecnt = min_t(long, PAGE_SIZE-(maddr&~PAGE_MASK), len); + char *va = map_domain_page(maddr >> PAGE_SHIFT); + + va = va + (maddr & (PAGE_SIZE-1)); /* add page offset */ + remain = __copy_from_user(dbuf, (void *)va, pagecnt); + KDBGP1("maddr:%x va:%p len:%x pagecnt:%x rem:%x\n", + maddr, va, len, pagecnt, remain); + unmap_domain_page(va); + len = len - (pagecnt - remain); + if (remain != 0) + break; + maddr += pagecnt; + dbuf += pagecnt; + } + return orig - len; +} + + +/* + * copy/read guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes copied + */ +int +kdb_read_mem(kdbva_t saddr, kdbbyt_t *dbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(saddr, dbuf, len, domid, 0, 0)); +} + +/* + * write guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes written + */ +int +kdb_write_mem(kdbva_t daddr, kdbbyt_t *sbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(daddr, sbuf, len, domid, 1, 0)); +} diff -r 54c8c9eaee92 xen/kdb/kdbmain.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdbmain.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,757 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +static int kdbmain(kdb_reason_t, struct cpu_user_regs *); +static int kdbmain_fatal(struct cpu_user_regs *, int); +static const char *kdb_gettrapname(int); + +/* ======================== GLOBAL VARIABLES =============================== */ +/* All global variables used by KDB must be defined here only. Module specific + * static variables must be declared in respective modules. + */ +kdbtab_t *kdb_cmd_tbl; +char kdb_prompt[32]; + +volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +cpumask_t kdb_cpu_traps; /* bit per cpu to tell which cpus hit int3 */ + +#ifndef NDEBUG + #error KDB is not supported on debug xen. Turn debug off +#endif + +volatile int kdb_init_cpu = -1; /* initial kdb cpu */ +volatile int kdb_session_begun = 0; /* active kdb session? */ +volatile int kdb_enabled = 1; /* kdb enabled currently? */ +volatile int kdb_sys_crash = 0; /* are we in crashed state? */ +volatile int kdbdbg = 0; /* to debug kdb itself */ + +static volatile int kdb_trap_immed_reason = 0; /* reason for immed trap */ + +static cpumask_t kdb_fatal_cpumask; /* which cpus in fatal path */ + +/* return index of first bit set in val. if val is 0, retval is undefined */ +static inline unsigned int kdb_firstbit(unsigned long val) +{ + __asm__ ( "bsf %1,%0" : "=r" (val) : "r" (val), "0" (BITS_PER_LONG) ); + return (unsigned int)val; +} + +void noinline mukchk(unsigned long ul) +{ +} + +static void +kdb_dbg_prnt_ctrps(char *label, int ccpu) +{ + int i; + if (!kdbdbg) + return; + + if (label || *label) + kdbp("%s ", label); + if (ccpu != -1) + kdbp("ccpu:%d ", ccpu); + kdbp("cputrps:"); + for (i=sizeof(kdb_cpu_traps)/sizeof(kdb_cpu_traps.bits[0]) - 1; i >=0; i--) + kdbp(" %lx", kdb_cpu_traps.bits[i]); + kdbp("\n"); +} + +/* + * Hold this cpu. Don't disable until all CPUs in kdb to avoid IPI deadlock + */ +static void +kdb_hold_this_cpu(int ccpu, struct cpu_user_regs *regs) +{ + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + do { + for(; kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE; cpu_relax()); + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DISABLE) { + local_irq_disable(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DO_VMEXIT) { + kdb_curr_cpu_flush_vmcs(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_SHOWPC) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + } while (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE); /* No goto, eh! */ + KDBGP1("un hold: ccpu:%d cmd:%d\n", ccpu, kdb_cpu_cmd[ccpu]); +} + +/* + * Pause this cpu while one CPU does main kdb processing. If that CPU does + * a "cpu switch" to this cpu, this cpu will become the main kdb cpu. If the + * user next does single step of some sort, this function will be exited, + * and this cpu will come back into kdb via kdb_handle_trap_entry function. + */ +static void +kdb_pause_this_cpu(struct cpu_user_regs *regs, void *unused) +{ + kdbmain(KDB_REASON_PAUSE_IPI, regs); +} + +/* pause other cpus via an IPI. Note, disabled CPUs can't receive IPIs until + * enabled */ +static void +kdb_smp_pause_cpus(void) +{ + int cpu, wait_count = 0; + int ccpu = smp_processor_id(); /* current cpu */ + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) { + kdbp("KDB: won't pause cpu:%d, cmd[cpu]=%d\n",cpu,kdb_cpu_cmd[cpu]); + cpumask_clear_cpu(cpu, &cpumask); + } + KDBGP("ccpu:%d will pause cpus. mask:0x%lx\n", ccpu, cpumask.bits[0]); +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + on_selected_cpus(&cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0); +#else + on_selected_cpus(cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0, 0); +#endif + mdelay(300); /* wait a bit for other CPUs to stop */ + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + bummer = 1; + if (!bummer) + break; + kdbp("ccpu:%d trying to stop other cpus...\n", ccpu); + mdelay(100); /* wait 100 ms */ + }; + for_each_cpu(cpu, &cpumask) /* now check who is with us */ + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + kdbp("Bummer cpu %d not paused. ccpu:%d\n", cpu,ccpu); + else { + kdb_cpu_cmd[cpu] = KDB_CPU_DISABLE; /* tell it to disable ints */ + while (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE); + } +} + +/* + * Do once per kdb session: A kdb session lasts from + * keybord/HWBP/SWBP till KDB_CPU_INSTALL_BP is done. Within a session, + * user may do several cpu switches, single step, next instr, etc.. + * + * DO: 1. pause other cpus if they are not already. they would already be + * if we are in single step mode + * 2. watchdog_disable() + * 3. uninstall all sw breakpoints so that user doesn't see them + */ +static void +kdb_begin_session(void) +{ + if (!kdb_session_begun) { + kdb_session_begun = 1; + kdb_smp_pause_cpus(); + local_irq_disable(); + watchdog_disable(); + kdb_uninstall_all_swbp(); + } +} + +int noinline mukid(void) +{ + return smp_processor_id(); +} + +static void +kdb_smp_unpause_cpus(int ccpu) +{ + int cpu; + + int wait_count = 0; + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + + KDBGP("kdb_smp_unpause_other_cpus(). ccpu:%d\n", ccpu); + for_each_cpu(cpu, &cpumask) + kdb_cpu_cmd[cpu] = KDB_CPU_QUIT; + + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + bummer = 1; + if (!bummer) + break; + mdelay(90); /* wait 90 ms, 50 too short on large systems */ + }; + /* now make sure they are all in there */ + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + kdbp("KDB: cpu %d still paused (cmd==%d). ccpu:%d\n", + cpu, kdb_cpu_cmd[cpu], ccpu); +} + +/* + * End of KDB session. + * This is called at the very end. In case of multiple cpus hitting BPs + * and sitting on a trap handlers, the last cpu to exit will call this. + * - isnstall all sw breakpoints, and purge deleted ones from table. + * - clear TF here also in case go is entered on a different cpu after switch + */ +static void +kdb_end_session(int ccpu, struct cpu_user_regs *regs) +{ + ASSERT(!cpumask_empty(&kdb_cpu_traps)); + ASSERT(kdb_session_begun); + kdb_install_all_swbp(); + kdb_flush_swbp_table(); + kdb_install_watchpoints(); + + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + kdb_time_resume(1); + kdb_session_begun = 0; /* before unpause for kdb_install_watchpoints */ + kdb_smp_unpause_cpus(ccpu); + watchdog_enable(); + KDBGP("end_session:ccpu:%d\n", ccpu); +} +volatile int mukwpprnt; +unsigned long mukaddr1 = 0xffffffff81243ae7, mukaddr2 = 0xffffffff8100986e; +/* + * check if we entered kdb because of DB trap. If yes, then check if + * we caused it or someone else. + * RETURNS: 0 : not one of ours. hypervisor must handle it. + * 1 : #DB for delayed sw bp install. + * 2 : this cpu must stay in kdb. + */ +static noinline int +kdb_check_dbtrap(kdb_reason_t *reasp, int ss_mode, struct cpu_user_regs *regs) +{ + int rc = 2; + int ccpu = smp_processor_id(); + + /* DB excp caused by hw breakpoint or the TF flag. The TF flag is set + * by us for ss mode or to install breakpoints. In ss mode, none of the + * breakpoints are installed. Check to make sure we intended BP INSTALL + * so we don't do it on a spurious DB trap. + * check for kdb_cpu_traps here also, because each cpu sitting on a trap + * must execute the instruction without the BP before passing control + * to next cpu in kdb_cpu_traps. + */ + if (*reasp == KDB_REASON_DBEXCP && !ss_mode) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP) { + if (!cpumask_empty(&kdb_cpu_traps)) { + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d trapcpu:%d\n", ccpu, a_trap_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + *reasp = KDB_REASON_PAUSE_IPI; + regs->eflags &= ~X86_EFLAGS_TF; /* hvm: exit handler ss = 0 */ + kdb_init_cpu = -1; + } else { + kdb_end_session(ccpu, regs); + rc = 1; + } + } else if (! kdb_check_watchpoints(regs)) { + rc = 0; /* hyp must handle it */ + } else { + if (regs->rip==mukaddr1 || regs->rip==mukaddr2) + { + if (mukwpprnt) + kdbp("MUK: ignoring wp:%lx\n", regs->rip); + kdb_end_session(ccpu, regs); + rc = 1; + } + } + } + return rc; +} + +/* + * Misc processing on kdb entry like displaying PC, adjust IP for sw bp.... + */ +static void +kdb_main_entry_misc(kdb_reason_t reason, struct cpu_user_regs *regs, + int ccpu, int ss_mode, int enabled) +{ + if (reason == KDB_REASON_KEYBOARD) + kdbp("\nEnter kdb (cpu:%d reason:%d vcpu=%d domid:%d" + " eflg:0x%lx irqs:%d)\n", ccpu, reason, current->vcpu_id, + current->domain->domain_id, regs->eflags, enabled); + else if (ss_mode) + KDBGP1("KDBG: KDB single step mode. ccpu:%d\n", ccpu); + + if (reason == KDB_REASON_BPEXCP && !ss_mode) + kdbp("Breakpoint on cpu %d at 0x%lx\n", ccpu, regs->KDBIP); + + /* display the current PC and instruction at it */ + if (reason != KDB_REASON_PAUSE_IPI) + kdb_display_pc(regs); + console_start_sync(); +} + +/* + * The MAIN kdb function. All cpus go thru this. IRQ is enabled on entry because + * a cpu could hit a bp set in disabled code. + * IPI: Even the main cpu must enable in case another CPU is trying to IPI us. + * That way, it would IPI us, then get out and be ready for our pause IPI. + * IRQs: The reason irqs enable/disable is scattered is because on a typical + * system IPIs are constantly going on amongs CPUs in a set of any size. + * As a result, to avoid deadlock, cpus have to loop enabled, until a + * quorum is established and the session has begun. + * Step: Intel Vol3B 18.3.1.4 : An external interrupt may be serviced upon + * single step. Since, the likely ext timer_interrupt and + * apic_timer_interrupt dont' mess with time data structs, we are prob OK + * leaving enabled. + * Time: Very messy. Most platform timers are readonly, so we can't stop time + * in the debugger. We take the only resort, let the TSC and plt run as + * normal, upon leaving, "attempt" to bring everybody to current time. + * kdbcputraps: bit per cpu. each cpu sets it bit in entry.S. The bit is + * reliable because upon traps, Ints are disabled. the bit is set + * before Ints are enabled. + * + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +static int +kdbmain(kdb_reason_t reason, struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); /* current cpu */ + int rc = 1, cmd = kdb_cpu_cmd[ccpu]; + int ss_mode = (cmd == KDB_CPU_SS || cmd == KDB_CPU_NI); + int delayed_install = (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP); + int enabled = local_irq_is_enabled(); + + KDBGP("kdbmain:ccpu:%d rsn:%d eflgs:0x%lx cmd:%d initc:%d irqs:%d " + "regs:%lx IP:%lx ", ccpu, reason, regs->eflags, cmd, + kdb_init_cpu, enabled, regs, regs->KDBIP); + kdb_dbg_prnt_ctrps("", -1); + + if (!ss_mode && !delayed_install) /* initial kdb enter */ + local_irq_enable(); /* so we can receive IPI */ + + if (!ss_mode && ccpu != kdb_init_cpu && reason != KDB_REASON_PAUSE_IPI){ + int sz = sizeof(kdb_init_cpu); + while (__cmpxchg(&kdb_init_cpu, -1, ccpu, sz) != -1) + for(; kdb_init_cpu != -1; cpu_relax()); + } + if (kdb_session_begun) + local_irq_disable(); /* kdb always runs disabled */ + + if (reason == KDB_REASON_BPEXCP) { /* INT 3 */ + cpumask_clear_cpu(ccpu, &kdb_cpu_traps); /* remove ourself */ + rc = kdb_check_sw_bkpts(regs); + if (rc == 0) { /* not one of ours. leave kdb */ + kdb_init_cpu = -1; + goto out; + } else if (rc == 1) { /* one of ours but deleted */ + if (cpumask_empty(&kdb_cpu_traps)) { + kdb_end_session(ccpu,regs); + kdb_init_cpu = -1; + goto out; + } else { + /* release another trap cpu, and put ourself in a pause mode */ + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d cmd:%d rsn:%d atrpcpu:%d initcpu:%d\n", ccpu, + kdb_cpu_cmd[ccpu], reason, a_trap_cpu, kdb_init_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + reason = KDB_REASON_PAUSE_IPI; + kdb_init_cpu = -1; + } + } else if (rc == 2) { /* one of ours but condition not met */ + kdb_begin_session(); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + + /* following will take care of KDB_CPU_INSTALL_BP, and also release + * kdb_init_cpu. it should not be done twice */ + if ((rc=kdb_check_dbtrap(&reason, ss_mode, regs)) == 0 || rc == 1) { + kdb_init_cpu = -1; /* leaving kdb */ + goto out; /* rc properly set to 0 or 1 */ + } + if (reason != KDB_REASON_PAUSE_IPI) { + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + } else + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB && !ss_mode) + kdb_begin_session(); + + kdb_main_entry_misc(reason, regs, ccpu, ss_mode, enabled); + /* note, one or more cpu switches may occur in between */ + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + if (ccpu != kdb_init_cpu) { + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_GO; + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + continue; /* for the pause guy */ + } + if (!cpumask_empty(&kdb_cpu_traps)) { + /* execute current instruction without 0xcc */ + kdb_dbg_prnt_ctrps("nempty:", ccpu); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + if (kdb_cpu_cmd[ccpu] != KDB_CPU_PAUSE && + kdb_cpu_cmd[ccpu] != KDB_CPU_MAIN_KDB) + break; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + ASSERT(cpumask_empty(&kdb_cpu_traps)); + if (kdb_swbp_exists()) { + if (reason == KDB_REASON_BPEXCP) { + /* do delayed install */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + kdb_end_session(ccpu, regs); + kdb_init_cpu = -1; + } +out: + if (kdb_cpu_cmd[ccpu] == KDB_CPU_QUIT) { + KDBGP("ccpu:%d _quit IP: %lx\n", ccpu, regs->KDBIP); + if (! kdb_session_begun) + kdb_install_watchpoints(); + kdb_time_resume(0); + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + } + + /* for ss and delayed install, TF is set. not much in EXT INT handlers*/ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_NI) + kdb_time_resume(1); + if (enabled) + local_irq_enable(); + + KDBGP("kdbmain:X:ccpu:%d rc:%d cmd:%d eflg:0x%lx initc:%d sesn:%d " + "cs:%x irqs:%d ", ccpu, rc, kdb_cpu_cmd[ccpu], regs->eflags, + kdb_init_cpu, kdb_session_begun, regs->cs, local_irq_is_enabled()); + kdb_dbg_prnt_ctrps("", -1); + return (rc ? 1 : 0); +} + +/* + * kdb entry function when coming in via a keyboard + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +int +kdb_keyboard(struct cpu_user_regs *regs) +{ + return kdbmain(KDB_REASON_KEYBOARD, regs); +} + +#if 0 +/* + * this function called when kdb session active and user presses ctrl\ again. + * the assumption is that the user typed ni/ss cmd, and it never got back into + * kdb, or the user is impatient. Either case, we just fake it that the SS did + * finish. Since, all other kdb cpus must be holding disabled, the interrupt + * would be on the CPU that did the ss/ni cmd + */ +void +kdb_ssni_reenter(struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); + int ccmd = kdb_cpu_cmd[ccpu]; + + if(ccmd == KDB_CPU_SS || ccmd == KDB_CPU_INSTALL_BP) + kdbmain(KDB_REASON_DBEXCP, regs); + else + kdbmain(KDB_REASON_KEYBOARD, regs); +} +#endif + +/* + * All traps are routed thru here. We care about BP (#3) trap (INT 3) and + * the DB trap(#1) only. + * returns: 0 kdb has nothing do with this trap + * 1 kdb handled this trap + */ +int +kdb_handle_trap_entry(int vector, struct cpu_user_regs *regs) +{ + int rc = 0; + int ccpu = smp_processor_id(); + + if (vector == TRAP_int3) { + rc = kdbmain(KDB_REASON_BPEXCP, regs); + + } else if (vector == TRAP_debug) { + KDBGP("ccpu:%d trapdbg reas:%d\n", ccpu, kdb_trap_immed_reason); + + if (kdb_trap_immed_reason == KDB_TRAP_FATAL) { + KDBGP("kdbtrp:fatal ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, vector); + BUG(); /* no return */ + + } else if (kdb_trap_immed_reason == KDB_TRAP_KDBSTACK) { + kdb_trap_immed_reason = 0; /* show kdb stack */ + show_registers(regs); + show_stack(regs); + regs->eflags &= ~X86_EFLAGS_TF; + rc = 1; + + } else if (kdb_trap_immed_reason == KDB_TRAP_NONFATAL) { + kdb_trap_immed_reason = 0; + rc = kdb_keyboard(regs); + } else { /* ss/ni/delayed install... */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + rc = kdbmain(KDB_REASON_DBEXCP, regs); + } + + } else if (vector == TRAP_nmi) { /* external nmi */ + /* when nmi is pressed, it could go to one or more or all cpus + * depending on the hardware. Also, for now assume it's fatal */ + KDBGP("kdbtrp:ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, TRAP_nmi); + } + return rc; +} + +int +kdb_trap_fatal(int vector, struct cpu_user_regs *regs) +{ + kdbmain_fatal(regs, vector); + return 0; +} + +/* From smp_send_nmi_allbutself() in crash.c which is static */ +void +kdb_nmi_pause_cpus(cpumask_t cpumask) +{ + int ccpu = smp_processor_id(); + mdelay(200); + cpumask_complement(&cpumask, &cpumask); /* flip bit map */ + cpumask_and(&cpumask, &cpumask, &cpu_online_map); /* remove extra bits */ + cpumask_clear_cpu(ccpu, &cpumask);/* absolutely make sure we're not on it */ + + KDBGP("ccpu:%d nmi pause. mask:0x%lx\n", ccpu, cpumask.bits[0]); + if ( !cpumask_empty(&cpumask) ) +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + send_IPI_mask(&cpumask, APIC_DM_NMI); +#else + send_IPI_mask(cpumask, APIC_DM_NMI); +#endif + mdelay(200); + KDBGP("ccpu:%d nmi pause done...\n", ccpu); +} + +/* + * Separate function from kdbmain to keep both within sanity levels. + */ +DEFINE_SPINLOCK(kdb_fatal_lk); +static int +kdbmain_fatal(struct cpu_user_regs *regs, int vector) +{ + int ccpu = smp_processor_id(); + + console_start_sync(); + + KDBGP("mainf:ccpu:%d vec:%d irq:%d\n", ccpu, vector,local_irq_is_enabled()); + cpumask_set_cpu(ccpu, &kdb_fatal_cpumask); /* uses LOCK_PREFIX */ + + if (spin_trylock(&kdb_fatal_lk)) { + + kdbp("*** kdb (Fatal Error on cpu:%d vec:%d %s):\n", ccpu, + vector, kdb_gettrapname(vector)); + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + kdb_display_pc(regs); + + watchdog_disable(); /* important */ + kdb_sys_crash = 1; + kdb_session_begun = 0; /* incase session already active */ + local_irq_enable(); + kdb_nmi_pause_cpus(kdb_fatal_cpumask); + + kdb_clear_prev_cmd(); /* buffered CRs will repeat prev cmd */ + kdb_session_begun = 1; /* for kdb_hold_this_cpu() */ + local_irq_disable(); + } else { + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); +#if 0 + /* dump is the only way to exit in crashed state */ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DUMP) + kdb_do_dump(regs); +#endif + } + return 0; +} + +/* Mostly called in fatal cases. earlykdb calls non-fatal. + * kdb_trap_immed_reason is global, so allow only one cpu at a time. Also, + * multiple cpu may be crashing at the same time. We enable because if there + * is a bad hang, at least ctrl-\ will break into kdb. Also, we don't call + * call kdb_keyboard directly becaue we don't have the register context. + */ +DEFINE_SPINLOCK(kdb_immed_lk); +void +kdb_trap_immed(int reason) /* fatal, non-fatal, kdb stack etc... */ +{ + int ccpu = smp_processor_id(); + int disabled = !local_irq_is_enabled(); + + KDBGP("trapimm:ccpu:%d reas:%d\n", ccpu, reason); + local_irq_enable(); + spin_lock(&kdb_immed_lk); + kdb_trap_immed_reason = reason; + barrier(); + __asm__ __volatile__ ( "int $1" ); + kdb_trap_immed_reason = 0; + + spin_unlock(&kdb_immed_lk); + if (disabled) + local_irq_disable(); +} + +/* called very early during init, even before all CPUs are brought online */ +void +kdb_init(void) +{ + kdb_init_cmdtab(); /* Initialize Command Table */ +} + +static const char * +kdb_gettrapname(int trapno) +{ + char *ret; + switch (trapno) { + case 0: ret = "Divide Error"; break; + case 2: ret = "NMI Interrupt"; break; + case 3: ret = "Int 3 Trap"; break; + case 4: ret = "Overflow Error"; break; + case 6: ret = "Invalid Opcode"; break; + case 8: ret = "Double Fault"; break; + case 10: ret = "Invalid TSS"; break; + case 11: ret = "Segment Not Present"; break; + case 12: ret = "Stack-Segment Fault"; break; + case 13: ret = "General Protection"; break; + case 14: ret = "Page Fault"; break; + case 17: ret = "Alignment Check"; break; + default: ret = " ????? "; + } + return ret; +} + + +/* ====================== Generic tracing subsystem ======================== */ + +#define KDBTRCMAX 1 /* set this to max number of recs to trace. each rec + * is 32 bytes */ +volatile int kdb_trcon=1; /* turn tracing ON: set here or via the trcon cmd */ + +typedef struct { + union { + struct { uint d0; uint cpu_trcid; } s0; + uint64_t l0; + }u; + uint64_t l1, l2, l3; +} trc_rec_t; + +static volatile unsigned int trcidx; /* points to where new entry will go */ +static trc_rec_t trca[KDBTRCMAX]; /* trace array */ + +/* atomically: add i to *p, return prev value of *p (ie, val before add) */ +static int +kdb_fetch_and_add(int i, uint *p) +{ + asm volatile("lock xaddl %0, %1;" : "=r"(i) : "m"(*p), "0"(i)); + return i; +} + +/* zero out the entire buffer */ +void +kdb_trczero(void) +{ + for (trcidx = KDBTRCMAX-1; trcidx; trcidx--) { + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + } + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + kdbp("kdb trace buffer has been zeroed\n"); +} + +/* add trace entry: eg.: kdbtrc(0xe0f099, intdata, vcpu, domain, 0) + * where: 0xe0f099 : 24bits max trcid, lower 8 bits are set to cpuid */ +void +kdbtrc(uint trcid, uint int_d0, uint64_t d1_64, uint64_t d2_64, uint64_t d3_64) +{ + uint idx; + + if (!kdb_trcon) + return; + + idx = kdb_fetch_and_add(1, (uint*)&trcidx); + idx = idx % KDBTRCMAX; + +#if 0 + trca[idx].u.s0.cpu_trcid = (smp_processor_id()<<24) | trcid; +#endif + trca[idx].u.s0.cpu_trcid = (trcid<<8) | smp_processor_id(); + trca[idx].u.s0.d0 = int_d0; + trca[idx].l1 = d1_64; + trca[idx].l2 = d2_64; + trca[idx].l3 = d3_64; +} + +/* give hints so user can print trc buffer via the dd command. last has the + * most recent entry */ +void +kdb_trcp(void) +{ + int i = trcidx % KDBTRCMAX; + + i = (i==0) ? KDBTRCMAX-1 : i-1; + kdbp("trcbuf: [0]: %016lx [MAX-1]: %016lx\n", &trca[0], + &trca[KDBTRCMAX-1]); + kdbp(" [most recent]: %016lx trcidx: 0x%x\n", &trca[i], trcidx); +} + diff -r 54c8c9eaee92 xen/kdb/x86/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/Makefile Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_wp.o +subdir-y += udis86-1.7 diff -r 54c8c9eaee92 xen/kdb/x86/kdb_wp.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/kdb_wp.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +#if 0 +#define DR6_BT 0x00008000 +#define DR6_BS 0x00004000 +#define DR6_BD 0x00002000 +#endif +#define DR6_B3 0x00000008 +#define DR6_B2 0x00000004 +#define DR6_B1 0x00000002 +#define DR6_B0 0x00000001 + +#define KDB_MAXWP 4 /* DR0 thru DR3 */ + +struct kdb_wp { + kdbma_t wp_addr; + int wp_rwflag; + int wp_len; + int wp_deleted; /* pending delete */ +}; +static struct kdb_wp kdb_wpa[KDB_MAXWP]; + +/* following because vmcs has it's own dr7. when vmcs runs, it messes up the + * native dr7 so we need to save/restore it */ +unsigned long kdb_dr7; + + +/* Set G0-G3 bits in DR7. this does global enable of the corresponding wp */ +static void +kdb_set_gx_in_dr7(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p | 0x2; + else if (regno == 1) + *dr7p = *dr7p | 0x8; + else if (regno == 2) + *dr7p = *dr7p | 0x20; + else if (regno == 3) + *dr7p = *dr7p | 0x80; +} + +/* Set LEN0 - LEN3 pair bits in DR7 (len should be 1 2 4 or 8) */ +static void +kdb_set_len_in_dr7(int regno, kdbma_t *dr7p, int len) +{ + int lenbits = (len == 8) ? 2 : len-1; + + *dr7p &= ~(0x3 << (18 + 4*regno)); + *dr7p |= ((ulong)(lenbits & 0x3) << (18 + 4*regno)); +} + +static void +kdb_set_dr7_rw(int regno, kdbma_t *dr7p, int rw) +{ + *dr7p &= ~(0x3 << (16 + 4*regno)); + *dr7p |= ((ulong)(rw & 0x3)) << (16 + 4*regno); +} + +/* get value of a debug register: DR0-DR3 DR6 DR7. other values return 0 */ +kdbma_t +kdb_rd_dbgreg(int regnum) +{ + kdbma_t contents = 0; + + if (regnum == 0) + __asm__ ("movq %%db0,%0\n\t":"=r"(contents)); + else if (regnum == 1) + __asm__ ("movq %%db1,%0\n\t":"=r"(contents)); + else if (regnum == 2) + __asm__ ("movq %%db2,%0\n\t":"=r"(contents)); + else if (regnum == 3) + __asm__ ("movq %%db3,%0\n\t":"=r"(contents)); + else if (regnum == 6) + __asm__ ("movq %%db6,%0\n\t":"=r"(contents)); + else if (regnum == 7) + __asm__ ("movq %%db7,%0\n\t":"=r"(contents)); + + return contents; +} + +static void +kdb_wr_dbgreg(int regnum, kdbma_t contents) +{ + if (regnum == 0) + __asm__ ("movq %0,%%db0\n\t"::"r"(contents)); + else if (regnum == 1) + __asm__ ("movq %0,%%db1\n\t"::"r"(contents)); + else if (regnum == 2) + __asm__ ("movq %0,%%db2\n\t"::"r"(contents)); + else if (regnum == 3) + __asm__ ("movq %0,%%db3\n\t"::"r"(contents)); + else if (regnum == 6) + __asm__ ("movq %0,%%db6\n\t"::"r"(contents)); + else if (regnum == 7) + __asm__ ("movq %0,%%db7\n\t"::"r"(contents)); +} + +static void +kdb_print_wp_info(char *strp, int idx) +{ + kdbp("%s[%d]:%016lx len:%d ", strp, idx, kdb_wpa[idx].wp_addr, + kdb_wpa[idx].wp_len); + if (kdb_wpa[idx].wp_rwflag == 1) + kdbp("on data write only\n"); + else if (kdb_wpa[idx].wp_rwflag == 2) + kdbp("on IO read/write\n"); + else + kdbp("on data read/write\n"); +} + +/* + * Returns : 0 if not one of ours + * 1 if one of ours + */ +int +kdb_check_watchpoints(struct cpu_user_regs *regs) +{ + int wpnum; + kdbma_t dr6 = kdb_rd_dbgreg(6); + + KDBGP1("check_wp: IP:%lx EFLAGS:%lx\n", regs->rip, regs->rflags); + if (dr6 & DR6_B0) + wpnum = 0; + else if (dr6 & DR6_B1) + wpnum = 1; + else if (dr6 & DR6_B2) + wpnum = 2; + else if (dr6 & DR6_B3) + wpnum = 3; + else + return 0; + + kdb_print_wp_info("Watchpoint ", wpnum); + return 1; +} + +/* set a watchpoint at a given address + * PreCondition: addr != 0 */ +static void +kdb_set_wp(kdbva_t addr, int rwflag, int len) +{ + int regno; + + for (regno=0; regno < KDB_MAXWP; regno++) { + if (kdb_wpa[regno].wp_addr == addr && !kdb_wpa[regno].wp_deleted) { + kdbp("Watchpoint already set\n"); + return; + } + if (kdb_wpa[regno].wp_deleted) + memset(&kdb_wpa[regno], 0, sizeof(kdb_wpa[regno])); + } + for (regno=0; regno < KDB_MAXWP && kdb_wpa[regno].wp_addr; regno++); + if (regno >= KDB_MAXWP) { + kdbp("watchpoint table full. limit:%d\n", KDB_MAXWP); + return; + } + kdb_wpa[regno].wp_addr = addr; + kdb_wpa[regno].wp_rwflag = rwflag; + kdb_wpa[regno].wp_len = len; + kdb_print_wp_info("Watchpoint set ", regno); +} + +/* write reg DR0-3 with address. Update corresponding bits in DR7 */ +static void +kdb_install_watchpoint(int regno, kdbma_t *dr7p) +{ + kdb_set_gx_in_dr7(regno, dr7p); + kdb_set_len_in_dr7(regno, dr7p, kdb_wpa[regno].wp_len); + kdb_set_dr7_rw(regno, dr7p, kdb_wpa[regno].wp_rwflag); + kdb_wr_dbgreg(regno, kdb_wpa[regno].wp_addr); + + KDBGP1("ccpu:%d installed wp. addr:%lx rw:%x len:%x dr7:%016lx\n", + smp_processor_id(), kdb_wpa[regno].wp_addr, + kdb_wpa[regno].wp_rwflag, kdb_wpa[regno].wp_len, *dr7p); +} + +/* clear G0-G3 bits in DR7 for given DR0-3 */ +static void +kdb_clear_dr7_gx(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p & ~0x2; + else if (regno == 1) + *dr7p = *dr7p & ~0x8; + else if (regno == 2) + *dr7p = *dr7p & ~0x20; + else if (regno == 3) + *dr7p = *dr7p & ~0x80; +} + +/* update dr7 once, as it's slow to update debug regs and cpu's will still be + * paused when leaving kdb. + * + * Just leave DR0-3 clobbered but remove bits from DR7 to disable wp + */ +void +kdb_install_watchpoints(void) +{ + int regno; + kdbma_t dr7 = kdb_rd_dbgreg(7); + + for (regno=0; regno < KDB_MAXWP; regno++) { + /* do not clear wp_deleted here as all cpus must clear wps */ + if (kdb_wpa[regno].wp_deleted) { + kdb_clear_dr7_gx(regno, &dr7); + continue; + } + if (kdb_wpa[regno].wp_addr) + kdb_install_watchpoint(regno, &dr7); + } + /* always clear DR6 when leaving */ + kdb_wr_dbgreg(6, 0); + kdb_wr_dbgreg(7, dr7); + + if (dr7 & DR7_ACTIVE_MASK) + kdb_dr7 = dr7; + else + kdb_dr7 = 0; +#if 0 + for(dp=domain_list; dp; dp=dp->next_in_list) { + struct vcpu *vp; + for_each_vcpu(dp, vp) { + for (regno=0; regno < KDB_MAXWP; regno++) + vp->arch.guest_context.debugreg[regno] = kdb_wpa[regno].wp_addr; + + vp->arch.guest_context.debugreg[6] = 0; + vp->arch.guest_context.debugreg[7] = dr7; + KDBGP("kdb_install_watchpoints(): v:%p dr7:%lx\n", vp, dr7); + /* hvm_set_info_guest(vp);: Can't because can't vmcs_enter in kdb */ + } + } +#endif +} + +/* clear watchpoint/s. wpnum == -1 to clear all watchpoints */ +void +kdb_clear_wps(int wpnum) +{ + int i; + + if (wpnum >= KDB_MAXWP) { + kdbp("Invalid wpnum %d\n", wpnum); + return; + } + if (wpnum >=0) { + if (kdb_wpa[wpnum].wp_addr) { + kdb_wpa[wpnum].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", wpnum); + } else + kdbp("watchpoint %d not set\n", wpnum); + return; + } + for (i=0; i < KDB_MAXWP; i++) { + if (kdb_wpa[i].wp_addr) { + kdb_wpa[i].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", i); + } + } +} + +/* display any watchpoints that are set */ +static void +kdb_display_wps(void) +{ + int i; + for (i=0; i < KDB_MAXWP; i++) + if (kdb_wpa[i].wp_addr && !kdb_wpa[i].wp_deleted) + kdb_print_wp_info("", i); +} + +/* + * Display or Set hardware breakpoints, ie, watchpoints: + * - Upto 4 are allowed + * + * rw_flag should be one of: + * 01 == break on data write only + * 10 == break on IO read/write + * 11 == Break on data reads or writes + * + * len should be one of : 1 2 4 8 + */ +void +kdb_do_watchpoints(kdbva_t addr, int rw_flag, int len) +{ + if (addr == 0) { + kdb_display_wps(); /* display set watchpoints */ + return; + } + kdb_set_wp(addr, rw_flag, len); + return; +} + diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/LICENSE --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/LICENSE Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,22 @@ +Copyright (c) 2002, 2003, 2004, 2005, 2006 +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/Makefile Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,5 @@ + +CFLAGS += -D__UD_STANDALONE__ +obj-y := decode.o input.o itab.o kdb_dis.o syn-att.o syn.o \ + syn-intel.o udis86.o + diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/README Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,10 @@ + +http://udis86.sourceforge.net/ +udis86-1.6 : + - cd libudis86 + - cp *c to here + - cp *h to here + +Mukesh Rathor +04/30/2008 + diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/decode.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,1197 @@ +/* ----------------------------------------------------------------------------- + * decode.c + * + * Copyright (c) 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#endif + +#include "types.h" +#include "itab.h" +#include "input.h" +#include "decode.h" + +/* The max number of prefixes to an instruction */ +#define MAX_PREFIXES 15 + +static struct ud_itab_entry ie_invalid = { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_pause = { UD_Ipause, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_nop = { UD_Inop, O_NONE, O_NONE, O_NONE, P_none }; + + +/* Looks up mnemonic code in the mnemonic string table + * Returns NULL if the mnemonic code is invalid + */ +const char * ud_lookup_mnemonic( enum ud_mnemonic_code c ) +{ + if ( c < UD_Id3vil ) + return ud_mnemonics_str[ c ]; + return NULL; +} + + +/* Extracts instruction prefixes. + */ +static int get_prefixes( struct ud* u ) +{ + unsigned int have_pfx = 1; + unsigned int i; + uint8_t curr; + + /* if in error state, bail out */ + if ( u->error ) + return -1; + + /* keep going as long as there are prefixes available */ + for ( i = 0; have_pfx ; ++i ) { + + /* Get next byte. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr( u ); + + /* rex prefixes in 64bit mode */ + if ( u->dis_mode == 64 && ( curr & 0xF0 ) == 0x40 ) { + u->pfx_rex = curr; + } else { + switch ( curr ) + { + case 0x2E : + u->pfx_seg = UD_R_CS; + u->pfx_rex = 0; + break; + case 0x36 : + u->pfx_seg = UD_R_SS; + u->pfx_rex = 0; + break; + case 0x3E : + u->pfx_seg = UD_R_DS; + u->pfx_rex = 0; + break; + case 0x26 : + u->pfx_seg = UD_R_ES; + u->pfx_rex = 0; + break; + case 0x64 : + u->pfx_seg = UD_R_FS; + u->pfx_rex = 0; + break; + case 0x65 : + u->pfx_seg = UD_R_GS; + u->pfx_rex = 0; + break; + case 0x67 : /* adress-size override prefix */ + u->pfx_adr = 0x67; + u->pfx_rex = 0; + break; + case 0xF0 : + u->pfx_lock = 0xF0; + u->pfx_rex = 0; + break; + case 0x66: + /* the 0x66 sse prefix is only effective if no other sse prefix + * has already been specified. + */ + if ( !u->pfx_insn ) u->pfx_insn = 0x66; + u->pfx_opr = 0x66; + u->pfx_rex = 0; + break; + case 0xF2: + u->pfx_insn = 0xF2; + u->pfx_repne = 0xF2; + u->pfx_rex = 0; + break; + case 0xF3: + u->pfx_insn = 0xF3; + u->pfx_rep = 0xF3; + u->pfx_repe = 0xF3; + u->pfx_rex = 0; + break; + default : + /* No more prefixes */ + have_pfx = 0; + break; + } + } + + /* check if we reached max instruction length */ + if ( i + 1 == MAX_INSN_LENGTH ) { + u->error = 1; + break; + } + } + + /* return status */ + if ( u->error ) + return -1; + + /* rewind back one byte in stream, since the above loop + * stops with a non-prefix byte. + */ + inp_back(u); + + /* speculatively determine the effective operand mode, + * based on the prefixes and the current disassembly + * mode. This may be inaccurate, but useful for mode + * dependent decoding. + */ + if ( u->dis_mode == 64 ) { + u->opr_mode = REX_W( u->pfx_rex ) ? 64 : ( ( u->pfx_opr ) ? 16 : 32 ) ; + u->adr_mode = ( u->pfx_adr ) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + return 0; +} + + +/* Searches the instruction tables for the right entry. + */ +static int search_itab( struct ud * u ) +{ + struct ud_itab_entry * e = NULL; + enum ud_itab_index table; + uint8_t peek; + uint8_t did_peek = 0; + uint8_t curr; + uint8_t index; + + /* if in state of error, return */ + if ( u->error ) + return -1; + + /* get first byte of opcode. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr(u); + + /* resolve xchg, nop, pause crazyness */ + if ( 0x90 == curr ) { + if ( !( u->dis_mode == 64 && REX_B( u->pfx_rex ) ) ) { + if ( u->pfx_rep ) { + u->pfx_rep = 0; + e = & ie_pause; + } else { + e = & ie_nop; + } + goto found_entry; + } + } + + /* get top-level table */ + if ( 0x0F == curr ) { + table = ITAB__0F; + curr = inp_next(u); + if ( u->error ) + return -1; + + /* 2byte opcodes can be modified by 0x66, F3, and F2 prefixes */ + if ( 0x66 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSE66__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSE66__0F; + u->pfx_opr = 0; + } + } else if ( 0xF2 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF2__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF2__0F; + u->pfx_repne = 0; + } + } else if ( 0xF3 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF3__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF3__0F; + u->pfx_repe = 0; + u->pfx_rep = 0; + } + } + /* pick an instruction from the 1byte table */ + } else { + table = ITAB__1BYTE; + } + + index = curr; + +search: + + e = & ud_itab_list[ table ][ index ]; + + /* if mnemonic constant is a standard instruction constant + * our search is over. + */ + + if ( e->mnemonic < UD_Id3vil ) { + if ( e->mnemonic == UD_Iinvalid ) { + if ( did_peek ) { + inp_next( u ); if ( u->error ) return -1; + } + goto found_entry; + } + goto found_entry; + } + + table = e->prefix; + + switch ( e->mnemonic ) + { + case UD_Igrp_reg: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_REG( peek ); + break; + + case UD_Igrp_mod: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_MOD( peek ); + if ( index == 3 ) + index = ITAB__MOD_INDX__11; + else + index = ITAB__MOD_INDX__NOT_11; + break; + + case UD_Igrp_rm: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = MODRM_RM( curr ); + break; + + case UD_Igrp_x87: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = curr - 0xC0; + break; + + case UD_Igrp_osize: + if ( u->opr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->opr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_asize: + if ( u->adr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->adr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_mode: + if ( u->dis_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->dis_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_vendor: + if ( u->vendor == UD_VENDOR_INTEL ) + index = ITAB__VENDOR_INDX__INTEL; + else if ( u->vendor == UD_VENDOR_AMD ) + index = ITAB__VENDOR_INDX__AMD; + else { + kdbp("KDB:search_itab(): unrecognized vendor id\n"); + return -1; + } + break; + + case UD_Id3vil: + kdbp("KDB:search_itab(): invalid instr mnemonic constant Id3vil\n"); + return -1; + + default: + kdbp("KDB:search_itab(): invalid instruction mnemonic constant\n"); + return -1; + } + + goto search; + +found_entry: + + u->itab_entry = e; + u->mnemonic = u->itab_entry->mnemonic; + + return 0; +} + + +static unsigned int resolve_operand_size( const struct ud * u, unsigned int s ) +{ + switch ( s ) + { + case SZ_V: + return ( u->opr_mode ); + case SZ_Z: + return ( u->opr_mode == 16 ) ? 16 : 32; + case SZ_P: + return ( u->opr_mode == 16 ) ? SZ_WP : SZ_DP; + case SZ_MDQ: + return ( u->opr_mode == 16 ) ? 32 : u->opr_mode; + case SZ_RDQ: + return ( u->dis_mode == 64 ) ? 64 : 32; + default: + return s; + } +} + + +static int resolve_mnemonic( struct ud* u ) +{ + /* far/near flags */ + u->br_far = 0; + u->br_near = 0; + /* readjust operand sizes for call/jmp instrcutions */ + if ( u->mnemonic == UD_Icall || u->mnemonic == UD_Ijmp ) { + /* WP: 16bit pointer */ + if ( u->operand[ 0 ].size == SZ_WP ) { + u->operand[ 0 ].size = 16; + u->br_far = 1; + u->br_near= 0; + /* DP: 32bit pointer */ + } else if ( u->operand[ 0 ].size == SZ_DP ) { + u->operand[ 0 ].size = 32; + u->br_far = 1; + u->br_near= 0; + } else { + u->br_far = 0; + u->br_near= 1; + } + /* resolve 3dnow weirdness. */ + } else if ( u->mnemonic == UD_I3dnow ) { + u->mnemonic = ud_itab_list[ ITAB__3DNOW ][ inp_curr( u ) ].mnemonic; + } + /* SWAPGS is only valid in 64bits mode */ + if ( u->mnemonic == UD_Iswapgs && u->dis_mode != 64 ) { + u->error = 1; + return -1; + } + + return 0; +} + + +/* ----------------------------------------------------------------------------- + * decode_a()- Decodes operands of the type seg:offset + * ----------------------------------------------------------------------------- + */ +static void +decode_a(struct ud* u, struct ud_operand *op) +{ + if (u->opr_mode == 16) { + /* seg16:off16 */ + op->type = UD_OP_PTR; + op->size = 32; + op->lval.ptr.off = inp_uint16(u); + op->lval.ptr.seg = inp_uint16(u); + } else { + /* seg16:off32 */ + op->type = UD_OP_PTR; + op->size = 48; + op->lval.ptr.off = inp_uint32(u); + op->lval.ptr.seg = inp_uint16(u); + } +} + +/* ----------------------------------------------------------------------------- + * decode_gpr() - Returns decoded General Purpose Register + * ----------------------------------------------------------------------------- + */ +static enum ud_type +decode_gpr(register struct ud* u, unsigned int s, unsigned char rm) +{ + s = resolve_operand_size(u, s); + + switch (s) { + case 64: + return UD_R_RAX + rm; + case SZ_DP: + case 32: + return UD_R_EAX + rm; + case SZ_WP: + case 16: + return UD_R_AX + rm; + case 8: + if (u->dis_mode == 64 && u->pfx_rex) { + if (rm >= 4) + return UD_R_SPL + (rm-4); + return UD_R_AL + rm; + } else return UD_R_AL + rm; + default: + return 0; + } +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr64() - 64bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr64(struct ud* u, enum ud_operand_code gpr_op) +{ + if (gpr_op >= OP_rAXr8 && gpr_op <= OP_rDIr15) + gpr_op = (gpr_op - OP_rAXr8) | (REX_B(u->pfx_rex) << 3); + else gpr_op = (gpr_op - OP_rAX); + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + if (u->dis_mode == 32 || + (u->opr_mode == 32 && ! (REX_W(u->pfx_rex) || u->default64))) { + return gpr_op + UD_R_EAX; + } + + return gpr_op + UD_R_RAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr32 () - 32bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr32(struct ud* u, enum ud_operand_code gpr_op) +{ + gpr_op = gpr_op - OP_eAX; + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + + return gpr_op + UD_R_EAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_reg() - Resolves the register type + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_reg(struct ud* u, unsigned int type, unsigned char i) +{ + switch (type) { + case T_MMX : return UD_R_MM0 + (i & 7); + case T_XMM : return UD_R_XMM0 + i; + case T_CRG : return UD_R_CR0 + i; + case T_DBG : return UD_R_DR0 + i; + case T_SEG : return UD_R_ES + (i & 7); + case T_NONE: + default: return UD_NONE; + } +} + +/* ----------------------------------------------------------------------------- + * decode_imm() - Decodes Immediate values. + * ----------------------------------------------------------------------------- + */ +static void +decode_imm(struct ud* u, unsigned int s, struct ud_operand *op) +{ + op->size = resolve_operand_size(u, s); + op->type = UD_OP_IMM; + + switch (op->size) { + case 8: op->lval.sbyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: return; + } +} + +/* ----------------------------------------------------------------------------- + * decode_modrm() - Decodes ModRM Byte + * ----------------------------------------------------------------------------- + */ +static void +decode_modrm(struct ud* u, struct ud_operand *op, unsigned int s, + unsigned char rm_type, struct ud_operand *opreg, + unsigned char reg_size, unsigned char reg_type) +{ + unsigned char mod, rm, reg; + + inp_next(u); + + /* get mod, r/m and reg fields */ + mod = MODRM_MOD(inp_curr(u)); + rm = (REX_B(u->pfx_rex) << 3) | MODRM_RM(inp_curr(u)); + reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(inp_curr(u)); + + op->size = resolve_operand_size(u, s); + + /* if mod is 11b, then the UD_R_m specifies a gpr/mmx/sse/control/debug */ + if (mod == 3) { + op->type = UD_OP_REG; + if (rm_type == T_GPR) + op->base = decode_gpr(u, op->size, rm); + else op->base = resolve_reg(u, rm_type, (REX_B(u->pfx_rex) << 3) | (rm&7)); + } + /* else its memory addressing */ + else { + op->type = UD_OP_MEM; + + /* 64bit addressing */ + if (u->adr_mode == 64) { + + op->base = UD_R_RAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && (rm & 7) == 5) { + op->base = UD_R_RIP; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_RAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_RAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + /* special conditions for base reference */ + if (op->index == UD_R_RSP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + if (op->base == UD_R_RBP || op->base == UD_R_R13) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 32-Bit addressing mode */ + else if (u->adr_mode == 32) { + + /* get base */ + op->base = UD_R_EAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && rm == 5) { + op->base = UD_NONE; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_EAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_EAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + if (op->index == UD_R_ESP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + /* special condition for base reference */ + if (op->base == UD_R_EBP) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 16bit addressing mode */ + else { + switch (rm) { + case 0: op->base = UD_R_BX; op->index = UD_R_SI; break; + case 1: op->base = UD_R_BX; op->index = UD_R_DI; break; + case 2: op->base = UD_R_BP; op->index = UD_R_SI; break; + case 3: op->base = UD_R_BP; op->index = UD_R_DI; break; + case 4: op->base = UD_R_SI; break; + case 5: op->base = UD_R_DI; break; + case 6: op->base = UD_R_BP; break; + case 7: op->base = UD_R_BX; break; + } + + if (mod == 0 && rm == 6) { + op->offset= 16; + op->base = UD_NONE; + } + else if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 16; + } + } + + /* extract offset, if any */ + switch(op->offset) { + case 8 : op->lval.ubyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: break; + } + + /* resolve register encoded in reg field */ + if (opreg) { + opreg->type = UD_OP_REG; + opreg->size = resolve_operand_size(u, reg_size); + if (reg_type == T_GPR) + opreg->base = decode_gpr(u, opreg->size, reg); + else opreg->base = resolve_reg(u, reg_type, reg); + } +} + +/* ----------------------------------------------------------------------------- + * decode_o() - Decodes offset + * ----------------------------------------------------------------------------- + */ +static void +decode_o(struct ud* u, unsigned int s, struct ud_operand *op) +{ + switch (u->adr_mode) { + case 64: + op->offset = 64; + op->lval.uqword = inp_uint64(u); + break; + case 32: + op->offset = 32; + op->lval.udword = inp_uint32(u); + break; + case 16: + op->offset = 16; + op->lval.uword = inp_uint16(u); + break; + default: + return; + } + op->type = UD_OP_MEM; + op->size = resolve_operand_size(u, s); +} + +/* ----------------------------------------------------------------------------- + * disasm_operands() - Disassembles Operands. + * ----------------------------------------------------------------------------- + */ +static int disasm_operands(register struct ud* u) +{ + + + /* mopXt = map entry, operand X, type; */ + enum ud_operand_code mop1t = u->itab_entry->operand1.type; + enum ud_operand_code mop2t = u->itab_entry->operand2.type; + enum ud_operand_code mop3t = u->itab_entry->operand3.type; + + /* mopXs = map entry, operand X, size */ + unsigned int mop1s = u->itab_entry->operand1.size; + unsigned int mop2s = u->itab_entry->operand2.size; + unsigned int mop3s = u->itab_entry->operand3.size; + + /* iop = instruction operand */ + register struct ud_operand* iop = u->operand; + + switch(mop1t) { + + case OP_A : + decode_a(u, &(iop[0])); + break; + + /* M[b] ... */ + case OP_M : + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + /* E, G/P/V/I/CL/1/S */ + case OP_E : + if (mop2t == OP_G) { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + else if (mop3t == OP_CL) { + iop[2].type = UD_OP_REG; + iop[2].base = UD_R_CL; + iop[2].size = 8; + } + } + else if (mop2t == OP_P) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_MMX); + else if (mop2t == OP_V) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_XMM); + else if (mop2t == OP_S) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_SEG); + else { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, NULL, 0, T_NONE); + if (mop2t == OP_CL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_CL; + iop[1].size = 8; + } else if (mop2t == OP_I1) { + iop[1].type = UD_OP_CONST; + u->operand[1].lval.udword = 1; + } else if (mop2t == OP_I) { + decode_imm(u, mop2s, &(iop[1])); + } + } + break; + + /* G, E/PR[,I]/VR */ + case OP_G : + if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_W) + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + break; + + /* AL..BH, I/O/DX */ + case OP_AL : case OP_CL : case OP_DL : case OP_BL : + case OP_AH : case OP_CH : case OP_DH : case OP_BH : + + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AL + (mop1t - OP_AL); + iop[0].size = 8; + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } + else if (mop2t == OP_O) + decode_o(u, mop2s, &(iop[1])); + break; + + /* rAX[r8]..rDI[r15], I/rAX..rDI/O */ + case OP_rAXr8 : case OP_rCXr9 : case OP_rDXr10 : case OP_rBXr11 : + case OP_rSPr12: case OP_rBPr13: case OP_rSIr14 : case OP_rDIr15 : + case OP_rAX : case OP_rCX : case OP_rDX : case OP_rBX : + case OP_rSP : case OP_rBP : case OP_rSI : case OP_rDI : + + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr64(u, mop1t); + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t >= OP_rAX && mop2t <= OP_rDI) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr64(u, mop2t); + } + else if (mop2t == OP_O) { + decode_o(u, mop2s, &(iop[1])); + iop[0].size = resolve_operand_size(u, mop2s); + } + break; + + /* AL[r8b]..BH[r15b], I */ + case OP_ALr8b : case OP_CLr9b : case OP_DLr10b : case OP_BLr11b : + case OP_AHr12b: case OP_CHr13b: case OP_DHr14b : case OP_BHr15b : + { + ud_type_t gpr = (mop1t - OP_ALr8b) + UD_R_AL + + (REX_B(u->pfx_rex) << 3); + if (UD_R_AH <= gpr && u->pfx_rex) + gpr = gpr + 4; + iop[0].type = UD_OP_REG; + iop[0].base = gpr; + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + } + + /* eAX..eDX, DX/I */ + case OP_eAX : case OP_eCX : case OP_eDX : case OP_eBX : + case OP_eSP : case OP_eBP : case OP_eSI : case OP_eDI : + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr32(u, mop1t); + if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } else if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* ES..GS */ + case OP_ES : case OP_CS : case OP_DS : + case OP_SS : case OP_FS : case OP_GS : + + /* in 64bits mode, only fs and gs are allowed */ + if (u->dis_mode == 64) + if (mop1t != OP_FS && mop1t != OP_GS) + u->error= 1; + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t - OP_ES) + UD_R_ES; + iop[0].size = 16; + + break; + + /* J */ + case OP_J : + decode_imm(u, mop1s, &(iop[0])); + iop[0].type = UD_OP_JIMM; + break ; + + /* PR, I */ + case OP_PR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_MMX, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* VR, I */ + case OP_VR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_XMM, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* P, Q[,I]/W/E[,I],VR */ + case OP_P : + if (mop2t == OP_Q) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_W) { + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } + break; + + /* R, C/D */ + case OP_R : + if (mop2t == OP_C) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_CRG); + else if (mop2t == OP_D) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_DBG); + break; + + /* C, R */ + case OP_C : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_CRG); + break; + + /* D, R */ + case OP_D : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_DBG); + break; + + /* Q, P */ + case OP_Q : + decode_modrm(u, &(iop[0]), mop1s, T_MMX, &(iop[1]), mop2s, T_MMX); + break; + + /* S, E */ + case OP_S : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_SEG); + break; + + /* W, V */ + case OP_W : + decode_modrm(u, &(iop[0]), mop1s, T_XMM, &(iop[1]), mop2s, T_XMM); + break; + + /* V, W[,I]/Q/M/E */ + case OP_V : + if (mop2t == OP_W) { + /* special cases for movlps and movhps */ + if (MODRM_MOD(inp_peek(u)) == 3) { + if (u->mnemonic == UD_Imovlps) + u->mnemonic = UD_Imovhlps; + else + if (u->mnemonic == UD_Imovhps) + u->mnemonic = UD_Imovlhps; + } + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_XMM); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_Q) + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + else if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + } + break; + + /* DX, eAX/AL */ + case OP_DX : + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_DX; + iop[0].size = 16; + + if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 8; + } + + break; + + /* I, I/AL/eAX */ + case OP_I : + decode_imm(u, mop1s, &(iop[0])); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 16; + } else if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } + break; + + /* O, AL/eAX */ + case OP_O : + decode_o(u, mop1s, &(iop[0])); + iop[1].type = UD_OP_REG; + iop[1].size = resolve_operand_size(u, mop1s); + if (mop2t == OP_AL) + iop[1].base = UD_R_AL; + else if (mop2t == OP_eAX) + iop[1].base = resolve_gpr32(u, mop2t); + else if (mop2t == OP_rAX) + iop[1].base = resolve_gpr64(u, mop2t); + break; + + /* 3 */ + case OP_I3 : + iop[0].type = UD_OP_CONST; + iop[0].lval.sbyte = 3; + break; + + /* ST(n), ST(n) */ + case OP_ST0 : case OP_ST1 : case OP_ST2 : case OP_ST3 : + case OP_ST4 : case OP_ST5 : case OP_ST6 : case OP_ST7 : + + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t-OP_ST0) + UD_R_ST0; + iop[0].size = 0; + + if (mop2t >= OP_ST0 && mop2t <= OP_ST7) { + iop[1].type = UD_OP_REG; + iop[1].base = (mop2t-OP_ST0) + UD_R_ST0; + iop[1].size = 0; + } + break; + + /* AX */ + case OP_AX: + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AX; + iop[0].size = 16; + break; + + /* none */ + default : + iop[0].type = iop[1].type = iop[2].type = UD_NONE; + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * clear_insn() - clear instruction pointer + * ----------------------------------------------------------------------------- + */ +static int clear_insn(register struct ud* u) +{ + u->error = 0; + u->pfx_seg = 0; + u->pfx_opr = 0; + u->pfx_adr = 0; + u->pfx_lock = 0; + u->pfx_repne = 0; + u->pfx_rep = 0; + u->pfx_repe = 0; + u->pfx_seg = 0; + u->pfx_rex = 0; + u->pfx_insn = 0; + u->mnemonic = UD_Inone; + u->itab_entry = NULL; + + memset( &u->operand[ 0 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 1 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 2 ], 0, sizeof( struct ud_operand ) ); + + return 0; +} + +static int do_mode( struct ud* u ) +{ + /* if in error state, bail out */ + if ( u->error ) return -1; + + /* propagate perfix effects */ + if ( u->dis_mode == 64 ) { /* set 64bit-mode flags */ + + /* Check validity of instruction m64 */ + if ( P_INV64( u->itab_entry->prefix ) ) { + u->error = 1; + return -1; + } + + /* effective rex prefix is the effective mask for the + * instruction hard-coded in the opcode map. + */ + u->pfx_rex = ( u->pfx_rex & 0x40 ) | + ( u->pfx_rex & REX_PFX_MASK( u->itab_entry->prefix ) ); + + /* whether this instruction has a default operand size of + * 64bit, also hardcoded into the opcode map. + */ + u->default64 = P_DEF64( u->itab_entry->prefix ); + /* calculate effective operand size */ + if ( REX_W( u->pfx_rex ) ) { + u->opr_mode = 64; + } else if ( u->pfx_opr ) { + u->opr_mode = 16; + } else { + /* unless the default opr size of instruction is 64, + * the effective operand size in the absence of rex.w + * prefix is 32. + */ + u->opr_mode = ( u->default64 ) ? 64 : 32; + } + + /* calculate effective address size */ + u->adr_mode = (u->pfx_adr) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { /* set 32bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { /* set 16bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + /* These flags determine which operand to apply the operand size + * cast to. + */ + u->c1 = ( P_C1( u->itab_entry->prefix ) ) ? 1 : 0; + u->c2 = ( P_C2( u->itab_entry->prefix ) ) ? 1 : 0; + u->c3 = ( P_C3( u->itab_entry->prefix ) ) ? 1 : 0; + + /* set flags for implicit addressing */ + u->implicit_addr = P_IMPADDR( u->itab_entry->prefix ); + + return 0; +} + +static int gen_hex( struct ud *u ) +{ + unsigned int i; + unsigned char *src_ptr = inp_sess( u ); + char* src_hex; + + /* bail out if in error stat. */ + if ( u->error ) return -1; + /* output buffer pointe */ + src_hex = ( char* ) u->insn_hexcode; + /* for each byte used to decode instruction */ + for ( i = 0; i < u->inp_ctr; ++i, ++src_ptr) { + snprintf( src_hex, 2, "%02x", *src_ptr & 0xFF ); + src_hex += 2; + } + return 0; +} + +/* ============================================================================= + * ud_decode() - Instruction decoder. Returns the number of bytes decoded. + * ============================================================================= + */ +unsigned int ud_decode( struct ud* u ) +{ + inp_start(u); + + if ( clear_insn( u ) ) { + ; /* error */ + } else if ( get_prefixes( u ) != 0 ) { + ; /* error */ + } else if ( search_itab( u ) != 0 ) { + ; /* error */ + } else if ( do_mode( u ) != 0 ) { + ; /* error */ + } else if ( disasm_operands( u ) != 0 ) { + ; /* error */ + } else if ( resolve_mnemonic( u ) != 0 ) { + ; /* error */ + } + + /* Handle decode error. */ + if ( u->error ) { + /* clear out the decode data. */ + clear_insn( u ); + /* mark the sequence of bytes as invalid. */ + u->itab_entry = & ie_invalid; + u->mnemonic = u->itab_entry->mnemonic; + } + + u->insn_offset = u->pc; /* set offset of instruction */ + u->insn_fill = 0; /* set translation buffer index to 0 */ + u->pc += u->inp_ctr; /* move program counter by bytes decoded */ + gen_hex( u ); /* generate hex code */ + + /* return number of bytes disassembled. */ + return u->inp_ctr; +} + +/* vim:cindent + * vim:ts=4 + * vim:sw=4 + * vim:expandtab + */ diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/decode.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,273 @@ +#ifndef UD_DECODE_H +#define UD_DECODE_H + +#define MAX_INSN_LENGTH 15 + +/* register classes */ +#define T_NONE 0 +#define T_GPR 1 +#define T_MMX 2 +#define T_CRG 3 +#define T_DBG 4 +#define T_SEG 5 +#define T_XMM 6 + +/* itab prefix bits */ +#define P_none ( 0 ) +#define P_c1 ( 1 << 0 ) +#define P_C1(n) ( ( n >> 0 ) & 1 ) +#define P_rexb ( 1 << 1 ) +#define P_REXB(n) ( ( n >> 1 ) & 1 ) +#define P_depM ( 1 << 2 ) +#define P_DEPM(n) ( ( n >> 2 ) & 1 ) +#define P_c3 ( 1 << 3 ) +#define P_C3(n) ( ( n >> 3 ) & 1 ) +#define P_inv64 ( 1 << 4 ) +#define P_INV64(n) ( ( n >> 4 ) & 1 ) +#define P_rexw ( 1 << 5 ) +#define P_REXW(n) ( ( n >> 5 ) & 1 ) +#define P_c2 ( 1 << 6 ) +#define P_C2(n) ( ( n >> 6 ) & 1 ) +#define P_def64 ( 1 << 7 ) +#define P_DEF64(n) ( ( n >> 7 ) & 1 ) +#define P_rexr ( 1 << 8 ) +#define P_REXR(n) ( ( n >> 8 ) & 1 ) +#define P_oso ( 1 << 9 ) +#define P_OSO(n) ( ( n >> 9 ) & 1 ) +#define P_aso ( 1 << 10 ) +#define P_ASO(n) ( ( n >> 10 ) & 1 ) +#define P_rexx ( 1 << 11 ) +#define P_REXX(n) ( ( n >> 11 ) & 1 ) +#define P_ImpAddr ( 1 << 12 ) +#define P_IMPADDR(n) ( ( n >> 12 ) & 1 ) + +/* rex prefix bits */ +#define REX_W(r) ( ( 0xF & ( r ) ) >> 3 ) +#define REX_R(r) ( ( 0x7 & ( r ) ) >> 2 ) +#define REX_X(r) ( ( 0x3 & ( r ) ) >> 1 ) +#define REX_B(r) ( ( 0x1 & ( r ) ) >> 0 ) +#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \ + ( P_REXR(n) << 2 ) | \ + ( P_REXX(n) << 1 ) | \ + ( P_REXB(n) << 0 ) ) + +/* scable-index-base bits */ +#define SIB_S(b) ( ( b ) >> 6 ) +#define SIB_I(b) ( ( ( b ) >> 3 ) & 7 ) +#define SIB_B(b) ( ( b ) & 7 ) + +/* modrm bits */ +#define MODRM_REG(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_NNN(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_MOD(b) ( ( ( b ) >> 6 ) & 3 ) +#define MODRM_RM(b) ( ( b ) & 7 ) + +/* operand type constants -- order is important! */ + +enum ud_operand_code { + OP_NONE, + + OP_A, OP_E, OP_M, OP_G, + OP_I, + + OP_AL, OP_CL, OP_DL, OP_BL, + OP_AH, OP_CH, OP_DH, OP_BH, + + OP_ALr8b, OP_CLr9b, OP_DLr10b, OP_BLr11b, + OP_AHr12b, OP_CHr13b, OP_DHr14b, OP_BHr15b, + + OP_AX, OP_CX, OP_DX, OP_BX, + OP_SI, OP_DI, OP_SP, OP_BP, + + OP_rAX, OP_rCX, OP_rDX, OP_rBX, + OP_rSP, OP_rBP, OP_rSI, OP_rDI, + + OP_rAXr8, OP_rCXr9, OP_rDXr10, OP_rBXr11, + OP_rSPr12, OP_rBPr13, OP_rSIr14, OP_rDIr15, + + OP_eAX, OP_eCX, OP_eDX, OP_eBX, + OP_eSP, OP_eBP, OP_eSI, OP_eDI, + + OP_ES, OP_CS, OP_SS, OP_DS, + OP_FS, OP_GS, + + OP_ST0, OP_ST1, OP_ST2, OP_ST3, + OP_ST4, OP_ST5, OP_ST6, OP_ST7, + + OP_J, OP_S, OP_O, + OP_I1, OP_I3, + + OP_V, OP_W, OP_Q, OP_P, + + OP_R, OP_C, OP_D, OP_VR, OP_PR +}; + + +/* operand size constants */ + +enum ud_operand_size { + SZ_NA = 0, + SZ_Z = 1, + SZ_V = 2, + SZ_P = 3, + SZ_WP = 4, + SZ_DP = 5, + SZ_MDQ = 6, + SZ_RDQ = 7, + + /* the following values are used as is, + * and thus hard-coded. changing them + * will break internals + */ + SZ_B = 8, + SZ_W = 16, + SZ_D = 32, + SZ_Q = 64, + SZ_T = 80, +}; + +/* itab entry operand definitions */ + +#define O_rSPr12 { OP_rSPr12, SZ_NA } +#define O_BL { OP_BL, SZ_NA } +#define O_BH { OP_BH, SZ_NA } +#define O_BP { OP_BP, SZ_NA } +#define O_AHr12b { OP_AHr12b, SZ_NA } +#define O_BX { OP_BX, SZ_NA } +#define O_Jz { OP_J, SZ_Z } +#define O_Jv { OP_J, SZ_V } +#define O_Jb { OP_J, SZ_B } +#define O_rSIr14 { OP_rSIr14, SZ_NA } +#define O_GS { OP_GS, SZ_NA } +#define O_D { OP_D, SZ_NA } +#define O_rBPr13 { OP_rBPr13, SZ_NA } +#define O_Ob { OP_O, SZ_B } +#define O_P { OP_P, SZ_NA } +#define O_Ow { OP_O, SZ_W } +#define O_Ov { OP_O, SZ_V } +#define O_Gw { OP_G, SZ_W } +#define O_Gv { OP_G, SZ_V } +#define O_rDX { OP_rDX, SZ_NA } +#define O_Gx { OP_G, SZ_MDQ } +#define O_Gd { OP_G, SZ_D } +#define O_Gb { OP_G, SZ_B } +#define O_rBXr11 { OP_rBXr11, SZ_NA } +#define O_rDI { OP_rDI, SZ_NA } +#define O_rSI { OP_rSI, SZ_NA } +#define O_ALr8b { OP_ALr8b, SZ_NA } +#define O_eDI { OP_eDI, SZ_NA } +#define O_Gz { OP_G, SZ_Z } +#define O_eDX { OP_eDX, SZ_NA } +#define O_DHr14b { OP_DHr14b, SZ_NA } +#define O_rSP { OP_rSP, SZ_NA } +#define O_PR { OP_PR, SZ_NA } +#define O_NONE { OP_NONE, SZ_NA } +#define O_rCX { OP_rCX, SZ_NA } +#define O_jWP { OP_J, SZ_WP } +#define O_rDXr10 { OP_rDXr10, SZ_NA } +#define O_Md { OP_M, SZ_D } +#define O_C { OP_C, SZ_NA } +#define O_G { OP_G, SZ_NA } +#define O_Mb { OP_M, SZ_B } +#define O_Mt { OP_M, SZ_T } +#define O_S { OP_S, SZ_NA } +#define O_Mq { OP_M, SZ_Q } +#define O_W { OP_W, SZ_NA } +#define O_ES { OP_ES, SZ_NA } +#define O_rBX { OP_rBX, SZ_NA } +#define O_Ed { OP_E, SZ_D } +#define O_DLr10b { OP_DLr10b, SZ_NA } +#define O_Mw { OP_M, SZ_W } +#define O_Eb { OP_E, SZ_B } +#define O_Ex { OP_E, SZ_MDQ } +#define O_Ez { OP_E, SZ_Z } +#define O_Ew { OP_E, SZ_W } +#define O_Ev { OP_E, SZ_V } +#define O_Ep { OP_E, SZ_P } +#define O_FS { OP_FS, SZ_NA } +#define O_Ms { OP_M, SZ_W } +#define O_rAXr8 { OP_rAXr8, SZ_NA } +#define O_eBP { OP_eBP, SZ_NA } +#define O_Isb { OP_I, SZ_SB } +#define O_eBX { OP_eBX, SZ_NA } +#define O_rCXr9 { OP_rCXr9, SZ_NA } +#define O_jDP { OP_J, SZ_DP } +#define O_CH { OP_CH, SZ_NA } +#define O_CL { OP_CL, SZ_NA } +#define O_R { OP_R, SZ_RDQ } +#define O_V { OP_V, SZ_NA } +#define O_CS { OP_CS, SZ_NA } +#define O_CHr13b { OP_CHr13b, SZ_NA } +#define O_eCX { OP_eCX, SZ_NA } +#define O_eSP { OP_eSP, SZ_NA } +#define O_SS { OP_SS, SZ_NA } +#define O_SP { OP_SP, SZ_NA } +#define O_BLr11b { OP_BLr11b, SZ_NA } +#define O_SI { OP_SI, SZ_NA } +#define O_eSI { OP_eSI, SZ_NA } +#define O_DL { OP_DL, SZ_NA } +#define O_DH { OP_DH, SZ_NA } +#define O_DI { OP_DI, SZ_NA } +#define O_DX { OP_DX, SZ_NA } +#define O_rBP { OP_rBP, SZ_NA } +#define O_Gvw { OP_G, SZ_MDQ } +#define O_I1 { OP_I1, SZ_NA } +#define O_I3 { OP_I3, SZ_NA } +#define O_DS { OP_DS, SZ_NA } +#define O_ST4 { OP_ST4, SZ_NA } +#define O_ST5 { OP_ST5, SZ_NA } +#define O_ST6 { OP_ST6, SZ_NA } +#define O_ST7 { OP_ST7, SZ_NA } +#define O_ST0 { OP_ST0, SZ_NA } +#define O_ST1 { OP_ST1, SZ_NA } +#define O_ST2 { OP_ST2, SZ_NA } +#define O_ST3 { OP_ST3, SZ_NA } +#define O_E { OP_E, SZ_NA } +#define O_AH { OP_AH, SZ_NA } +#define O_M { OP_M, SZ_NA } +#define O_AL { OP_AL, SZ_NA } +#define O_CLr9b { OP_CLr9b, SZ_NA } +#define O_Q { OP_Q, SZ_NA } +#define O_eAX { OP_eAX, SZ_NA } +#define O_VR { OP_VR, SZ_NA } +#define O_AX { OP_AX, SZ_NA } +#define O_rAX { OP_rAX, SZ_NA } +#define O_Iz { OP_I, SZ_Z } +#define O_rDIr15 { OP_rDIr15, SZ_NA } +#define O_Iw { OP_I, SZ_W } +#define O_Iv { OP_I, SZ_V } +#define O_Ap { OP_A, SZ_P } +#define O_CX { OP_CX, SZ_NA } +#define O_Ib { OP_I, SZ_B } +#define O_BHr15b { OP_BHr15b, SZ_NA } + + +/* A single operand of an entry in the instruction table. + * (internal use only) + */ +struct ud_itab_entry_operand +{ + enum ud_operand_code type; + enum ud_operand_size size; +}; + + +/* A single entry in an instruction table. + *(internal use only) + */ +struct ud_itab_entry +{ + enum ud_mnemonic_code mnemonic; + struct ud_itab_entry_operand operand1; + struct ud_itab_entry_operand operand2; + struct ud_itab_entry_operand operand3; + uint32_t prefix; +}; + +#endif /* UD_DECODE_H */ + +/* vim:cindent + * vim:expandtab + * vim:ts=4 + * vim:sw=4 + */ diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/extern.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,67 @@ +/* ----------------------------------------------------------------------------- + * extern.h + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_EXTERN_H +#define UD_EXTERN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* #include */ +#include "types.h" + +/* ============================= PUBLIC API ================================= */ + +extern void ud_init(struct ud*); + +extern void ud_set_mode(struct ud*, uint8_t); + +extern void ud_set_pc(struct ud*, uint64_t); + +extern void ud_set_input_hook(struct ud*, int (*)(struct ud*)); + +extern void ud_set_input_buffer(struct ud*, uint8_t*, size_t); + +#ifndef __UD_STANDALONE__ +extern void ud_set_input_file(struct ud*, FILE*); +#endif /* __UD_STANDALONE__ */ + +extern void ud_set_vendor(struct ud*, unsigned); + +extern void ud_set_syntax(struct ud*, void (*)(struct ud*)); + +extern void ud_input_skip(struct ud*, size_t); + +extern int ud_input_end(struct ud*); + +extern unsigned int ud_decode(struct ud*); + +extern unsigned int ud_disassemble(struct ud*); + +extern void ud_translate_intel(struct ud*); + +extern void ud_translate_att(struct ud*); + +extern char* ud_insn_asm(struct ud* u); + +extern uint8_t* ud_insn_ptr(struct ud* u); + +extern uint64_t ud_insn_off(struct ud*); + +extern char* ud_insn_hex(struct ud*); + +extern unsigned int ud_insn_len(struct ud* u); + +extern const char* ud_lookup_mnemonic(enum ud_mnemonic_code c); + +/* ========================================================================== */ + +#ifdef __cplusplus +} +#endif +#endif diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/input.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,226 @@ +/* ----------------------------------------------------------------------------- + * input.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#include "extern.h" +#include "types.h" +#include "input.h" + +/* ----------------------------------------------------------------------------- + * inp_buff_hook() - Hook for buffered inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_buff_hook(struct ud* u) +{ + if (u->inp_buff < u->inp_buff_end) + return *u->inp_buff++; + else return -1; +} + +#ifndef __UD_STANDALONE__ +/* ----------------------------------------------------------------------------- + * inp_file_hook() - Hook for FILE inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_file_hook(struct ud* u) +{ + return fgetc(u->inp_file); +} +#endif /* __UD_STANDALONE__*/ + +/* ============================================================================= + * ud_inp_set_hook() - Sets input hook. + * ============================================================================= + */ +extern void +ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*)) +{ + u->inp_hook = hook; + inp_init(u); +} + +/* ============================================================================= + * ud_inp_set_buffer() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_buffer(register struct ud* u, uint8_t* buf, size_t len) +{ + u->inp_hook = inp_buff_hook; + u->inp_buff = buf; + u->inp_buff_end = buf + len; + inp_init(u); +} + +#ifndef __UD_STANDALONE__ +/* ============================================================================= + * ud_input_set_file() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_file(register struct ud* u, FILE* f) +{ + u->inp_hook = inp_file_hook; + u->inp_file = f; + inp_init(u); +} +#endif /* __UD_STANDALONE__ */ + +/* ============================================================================= + * ud_input_skip() - Skip n input bytes. + * ============================================================================= + */ +extern void +ud_input_skip(struct ud* u, size_t n) +{ + while (n--) { + u->inp_hook(u); + } +} + +/* ============================================================================= + * ud_input_end() - Test for end of input. + * ============================================================================= + */ +extern int +ud_input_end(struct ud* u) +{ + return (u->inp_curr == u->inp_fill) && u->inp_end; +} + +/* ----------------------------------------------------------------------------- + * inp_next() - Loads and returns the next byte from input. + * + * inp_curr and inp_fill are pointers to the cache. The program is written based + * on the property that they are 8-bits in size, and will eventually wrap around + * forming a circular buffer. So, the size of the cache is 256 in size, kind of + * unnecessary yet optimized. + * + * A buffer inp_sess stores the bytes disassembled for a single session. + * ----------------------------------------------------------------------------- + */ +extern uint8_t inp_next(struct ud* u) +{ + int c = -1; + /* if current pointer is not upto the fill point in the + * input cache. + */ + if ( u->inp_curr != u->inp_fill ) { + c = u->inp_cache[ ++u->inp_curr ]; + /* if !end-of-input, call the input hook and get a byte */ + } else if ( u->inp_end || ( c = u->inp_hook( u ) ) == -1 ) { + /* end-of-input, mark it as an error, since the decoder, + * expected a byte more. + */ + u->error = 1; + /* flag end of input */ + u->inp_end = 1; + return 0; + } else { + /* increment pointers, we have a new byte. */ + u->inp_curr = ++u->inp_fill; + /* add the byte to the cache */ + u->inp_cache[ u->inp_fill ] = c; + } + /* record bytes input per decode-session. */ + u->inp_sess[ u->inp_ctr++ ] = c; + /* return byte */ + return ( uint8_t ) c; +} + +/* ----------------------------------------------------------------------------- + * inp_back() - Move back a single byte in the stream. + * ----------------------------------------------------------------------------- + */ +extern void +inp_back(struct ud* u) +{ + if ( u->inp_ctr > 0 ) { + --u->inp_curr; + --u->inp_ctr; + } +} + +/* ----------------------------------------------------------------------------- + * inp_peek() - Peek into the next byte in source. + * ----------------------------------------------------------------------------- + */ +extern uint8_t +inp_peek(struct ud* u) +{ + uint8_t r = inp_next(u); + if ( !u->error ) inp_back(u); /* Don't backup if there was an error */ + return r; +} + +/* ----------------------------------------------------------------------------- + * inp_move() - Move ahead n input bytes. + * ----------------------------------------------------------------------------- + */ +extern void +inp_move(struct ud* u, size_t n) +{ + while (n--) + inp_next(u); +} + +/*------------------------------------------------------------------------------ + * inp_uintN() - return uintN from source. + *------------------------------------------------------------------------------ + */ +extern uint8_t +inp_uint8(struct ud* u) +{ + return inp_next(u); +} + +extern uint16_t +inp_uint16(struct ud* u) +{ + uint16_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + return ret | (r << 8); +} + +extern uint32_t +inp_uint32(struct ud* u) +{ + uint32_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + return ret | (r << 24); +} + +extern uint64_t +inp_uint64(struct ud* u) +{ + uint64_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + ret = ret | (r << 24); + r = inp_next(u); + ret = ret | (r << 32); + r = inp_next(u); + ret = ret | (r << 40); + r = inp_next(u); + ret = ret | (r << 48); + r = inp_next(u); + return ret | (r << 56); +} diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/input.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,49 @@ +/* ----------------------------------------------------------------------------- + * input.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_INPUT_H +#define UD_INPUT_H + +#include "types.h" + +uint8_t inp_next(struct ud*); +uint8_t inp_peek(struct ud*); +uint8_t inp_uint8(struct ud*); +uint16_t inp_uint16(struct ud*); +uint32_t inp_uint32(struct ud*); +uint64_t inp_uint64(struct ud*); +void inp_move(struct ud*, size_t); +void inp_back(struct ud*); + +/* inp_init() - Initializes the input system. */ +#define inp_init(u) \ +do { \ + u->inp_curr = 0; \ + u->inp_fill = 0; \ + u->inp_ctr = 0; \ + u->inp_end = 0; \ +} while (0) + +/* inp_start() - Should be called before each de-code operation. */ +#define inp_start(u) u->inp_ctr = 0 + +/* inp_back() - Resets the current pointer to its position before the current + * instruction disassembly was started. + */ +#define inp_reset(u) \ +do { \ + u->inp_curr -= u->inp_ctr; \ + u->inp_ctr = 0; \ +} while (0) + +/* inp_sess() - Returns the pointer to current session. */ +#define inp_sess(u) (u->inp_sess) + +/* inp_cur() - Returns the current input byte. */ +#define inp_curr(u) ((u)->inp_cache[(u)->inp_curr]) + +#endif diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/itab.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,3668 @@ + +/* itab.c -- auto generated by opgen.py, do not edit. */ + +#include "types.h" +#include "decode.h" +#include "itab.h" + +const char * ud_mnemonics_str[] = { + "3dnow", + "aaa", + "aad", + "aam", + "aas", + "adc", + "add", + "addpd", + "addps", + "addsd", + "addss", + "addsubpd", + "addsubps", + "and", + "andpd", + "andps", + "andnpd", + "andnps", + "arpl", + "movsxd", + "bound", + "bsf", + "bsr", + "bswap", + "bt", + "btc", + "btr", + "bts", + "call", + "cbw", + "cwde", + "cdqe", + "clc", + "cld", + "clflush", + "clgi", + "cli", + "clts", + "cmc", + "cmovo", + "cmovno", + "cmovb", + "cmovae", + "cmovz", + "cmovnz", + "cmovbe", + "cmova", + "cmovs", + "cmovns", + "cmovp", + "cmovnp", + "cmovl", + "cmovge", + "cmovle", + "cmovg", + "cmp", + "cmppd", + "cmpps", + "cmpsb", + "cmpsw", + "cmpsd", + "cmpsq", + "cmpss", + "cmpxchg", + "cmpxchg8b", + "comisd", + "comiss", + "cpuid", + "cvtdq2pd", + "cvtdq2ps", + "cvtpd2dq", + "cvtpd2pi", + "cvtpd2ps", + "cvtpi2ps", + "cvtpi2pd", + "cvtps2dq", + "cvtps2pi", + "cvtps2pd", + "cvtsd2si", + "cvtsd2ss", + "cvtsi2ss", + "cvtss2si", + "cvtss2sd", + "cvttpd2pi", + "cvttpd2dq", + "cvttps2dq", + "cvttps2pi", + "cvttsd2si", + "cvtsi2sd", + "cvttss2si", + "cwd", + "cdq", + "cqo", + "daa", + "das", + "dec", + "div", + "divpd", + "divps", + "divsd", + "divss", + "emms", + "enter", + "f2xm1", + "fabs", + "fadd", + "faddp", + "fbld", + "fbstp", + "fchs", + "fclex", + "fcmovb", + "fcmove", + "fcmovbe", + "fcmovu", + "fcmovnb", + "fcmovne", + "fcmovnbe", + "fcmovnu", + "fucomi", + "fcom", + "fcom2", + "fcomp3", + "fcomi", + "fucomip", + "fcomip", + "fcomp", + "fcomp5", + "fcompp", + "fcos", + "fdecstp", + "fdiv", + "fdivp", + "fdivr", + "fdivrp", + "femms", + "ffree", + "ffreep", + "ficom", + "ficomp", + "fild", + "fncstp", + "fninit", + "fiadd", + "fidivr", + "fidiv", + "fisub", + "fisubr", + "fist", + "fistp", + "fisttp", + "fld", + "fld1", + "fldl2t", + "fldl2e", + "fldlpi", + "fldlg2", + "fldln2", + "fldz", + "fldcw", + "fldenv", + "fmul", + "fmulp", + "fimul", + "fnop", + "fpatan", + "fprem", + "fprem1", + "fptan", + "frndint", + "frstor", + "fnsave", + "fscale", + "fsin", + "fsincos", + "fsqrt", + "fstp", + "fstp1", + "fstp8", + "fstp9", + "fst", + "fnstcw", + "fnstenv", + "fnstsw", + "fsub", + "fsubp", + "fsubr", + "fsubrp", + "ftst", + "fucom", + "fucomp", + "fucompp", + "fxam", + "fxch", + "fxch4", + "fxch7", + "fxrstor", + "fxsave", + "fpxtract", + "fyl2x", + "fyl2xp1", + "haddpd", + "haddps", + "hlt", + "hsubpd", + "hsubps", + "idiv", + "in", + "imul", + "inc", + "insb", + "insw", + "insd", + "int1", + "int3", + "int", + "into", + "invd", + "invlpg", + "invlpga", + "iretw", + "iretd", + "iretq", + "jo", + "jno", + "jb", + "jae", + "jz", + "jnz", + "jbe", + "ja", + "js", + "jns", + "jp", + "jnp", + "jl", + "jge", + "jle", + "jg", + "jcxz", + "jecxz", + "jrcxz", + "jmp", + "lahf", + "lar", + "lddqu", + "ldmxcsr", + "lds", + "lea", + "les", + "lfs", + "lgs", + "lidt", + "lss", + "leave", + "lfence", + "lgdt", + "lldt", + "lmsw", + "lock", + "lodsb", + "lodsw", + "lodsd", + "lodsq", + "loopnz", + "loope", + "loop", + "lsl", + "ltr", + "maskmovq", + "maxpd", + "maxps", + "maxsd", + "maxss", + "mfence", + "minpd", + "minps", + "minsd", + "minss", + "monitor", + "mov", + "movapd", + "movaps", + "movd", + "movddup", + "movdqa", + "movdqu", + "movdq2q", + "movhpd", + "movhps", + "movlhps", + "movlpd", + "movlps", + "movhlps", + "movmskpd", + "movmskps", + "movntdq", + "movnti", + "movntpd", + "movntps", + "movntq", + "movq", + "movqa", + "movq2dq", + "movsb", + "movsw", + "movsd", + "movsq", + "movsldup", + "movshdup", + "movss", + "movsx", + "movupd", + "movups", + "movzx", + "mul", + "mulpd", + "mulps", + "mulsd", + "mulss", + "mwait", + "neg", + "nop", + "not", + "or", + "orpd", + "orps", + "out", + "outsb", + "outsw", + "outsd", + "outsq", + "packsswb", + "packssdw", + "packuswb", + "paddb", + "paddw", + "paddq", + "paddsb", + "paddsw", + "paddusb", + "paddusw", + "pand", + "pandn", + "pause", + "pavgb", + "pavgw", + "pcmpeqb", + "pcmpeqw", + "pcmpeqd", + "pcmpgtb", + "pcmpgtw", + "pcmpgtd", + "pextrw", + "pinsrw", + "pmaddwd", + "pmaxsw", + "pmaxub", + "pminsw", + "pminub", + "pmovmskb", + "pmulhuw", + "pmulhw", + "pmullw", + "pmuludq", + "pop", + "popa", + "popad", + "popfw", + "popfd", + "popfq", + "por", + "prefetch", + "prefetchnta", + "prefetcht0", + "prefetcht1", + "prefetcht2", + "psadbw", + "pshufd", + "pshufhw", + "pshuflw", + "pshufw", + "pslldq", + "psllw", + "pslld", + "psllq", + "psraw", + "psrad", + "psrlw", + "psrld", + "psrlq", + "psrldq", + "psubb", + "psubw", + "psubd", + "psubq", + "psubsb", + "psubsw", + "psubusb", + "psubusw", + "punpckhbw", + "punpckhwd", + "punpckhdq", + "punpckhqdq", + "punpcklbw", + "punpcklwd", + "punpckldq", + "punpcklqdq", + "pi2fw", + "pi2fd", + "pf2iw", + "pf2id", + "pfnacc", + "pfpnacc", + "pfcmpge", + "pfmin", + "pfrcp", + "pfrsqrt", + "pfsub", + "pfadd", + "pfcmpgt", + "pfmax", + "pfrcpit1", + "pfrspit1", + "pfsubr", + "pfacc", + "pfcmpeq", + "pfmul", + "pfrcpit2", + "pmulhrw", + "pswapd", + "pavgusb", + "push", + "pusha", + "pushad", + "pushfw", + "pushfd", + "pushfq", + "pxor", + "rcl", + "rcr", + "rol", + "ror", + "rcpps", + "rcpss", + "rdmsr", + "rdpmc", + "rdtsc", + "rdtscp", + "repne", + "rep", + "ret", + "retf", + "rsm", + "rsqrtps", + "rsqrtss", + "sahf", + "sal", + "salc", + "sar", + "shl", + "shr", + "sbb", + "scasb", + "scasw", + "scasd", + "scasq", + "seto", + "setno", + "setb", + "setnb", + "setz", + "setnz", + "setbe", + "seta", + "sets", + "setns", + "setp", + "setnp", + "setl", + "setge", + "setle", + "setg", + "sfence", + "sgdt", + "shld", + "shrd", + "shufpd", + "shufps", + "sidt", + "sldt", + "smsw", + "sqrtps", + "sqrtpd", + "sqrtsd", + "sqrtss", + "stc", + "std", + "stgi", + "sti", + "skinit", + "stmxcsr", + "stosb", + "stosw", + "stosd", + "stosq", + "str", + "sub", + "subpd", + "subps", + "subsd", + "subss", + "swapgs", + "syscall", + "sysenter", + "sysexit", + "sysret", + "test", + "ucomisd", + "ucomiss", + "ud2", + "unpckhpd", + "unpckhps", + "unpcklps", + "unpcklpd", + "verr", + "verw", + "vmcall", + "vmclear", + "vmxon", + "vmptrld", + "vmptrst", + "vmresume", + "vmxoff", + "vmrun", + "vmmcall", + "vmload", + "vmsave", + "wait", + "wbinvd", + "wrmsr", + "xadd", + "xchg", + "xlatb", + "xor", + "xorpd", + "xorps", + "db", + "invalid", +}; + + + +static struct ud_itab_entry itab__0f[256] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_00__REG }, + /* 01 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG }, + /* 02 */ { UD_Ilar, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ilsl, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isyscall, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iclts, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isysret, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iwbinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iud2, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_0D__REG }, + /* 0E */ { UD_Ifemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovups, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovups, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_18__REG }, + /* 19 */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1D */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1E */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1F */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 20 */ { UD_Imov, O_R, O_C, O_NONE, P_rexr }, + /* 21 */ { UD_Imov, O_R, O_D, O_NONE, P_rexr }, + /* 22 */ { UD_Imov, O_C, O_R, O_NONE, P_rexr }, + /* 23 */ { UD_Imov, O_D, O_R, O_NONE, P_rexr }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovaps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovaps, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2ps, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iwrmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Irdtsc, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Irdmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Irdpmc, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Isysenter, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 35 */ { UD_Isysexit, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Icmovo, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 41 */ { UD_Icmovno, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 42 */ { UD_Icmovb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 43 */ { UD_Icmovae, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 44 */ { UD_Icmovz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 45 */ { UD_Icmovnz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 46 */ { UD_Icmovbe, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 47 */ { UD_Icmova, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 48 */ { UD_Icmovs, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 49 */ { UD_Icmovns, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4A */ { UD_Icmovp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4B */ { UD_Icmovnp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4C */ { UD_Icmovl, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4D */ { UD_Icmovge, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4E */ { UD_Icmovle, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4F */ { UD_Icmovg, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 50 */ { UD_Imovmskps, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iandps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtps2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtdq2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Imovd, O_P, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufw, O_P, O_Q, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovd, O_Ex, O_P, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovq, O_Q, O_P, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Ijo, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 81 */ { UD_Ijno, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 82 */ { UD_Ijb, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 83 */ { UD_Ijae, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 84 */ { UD_Ijz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 85 */ { UD_Ijnz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 86 */ { UD_Ijbe, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 87 */ { UD_Ija, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 88 */ { UD_Ijs, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 89 */ { UD_Ijns, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8A */ { UD_Ijp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8B */ { UD_Ijnp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8C */ { UD_Ijl, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8D */ { UD_Ijge, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8E */ { UD_Ijle, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8F */ { UD_Ijg, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 90 */ { UD_Iseto, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 91 */ { UD_Isetno, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 92 */ { UD_Isetb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 93 */ { UD_Isetnb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 94 */ { UD_Isetz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 95 */ { UD_Isetnz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 96 */ { UD_Isetbe, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 97 */ { UD_Iseta, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 98 */ { UD_Isets, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 99 */ { UD_Isetns, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9A */ { UD_Isetp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9B */ { UD_Isetnp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9C */ { UD_Isetl, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9D */ { UD_Isetge, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9E */ { UD_Isetle, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9F */ { UD_Isetg, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* A0 */ { UD_Ipush, O_FS, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Ipop, O_FS, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Icpuid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Ibt, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A4 */ { UD_Ishld, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A5 */ { UD_Ishld, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Ipush, O_GS, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Ipop, O_GS, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Irsm, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Ibts, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AC */ { UD_Ishrd, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AD */ { UD_Ishrd, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG }, + /* AF */ { UD_Iimul, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B0 */ { UD_Icmpxchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* B1 */ { UD_Icmpxchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B2 */ { UD_Ilss, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B3 */ { UD_Ibtr, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B4 */ { UD_Ilfs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B5 */ { UD_Ilgs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B6 */ { UD_Imovzx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B7 */ { UD_Imovzx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_BA__REG }, + /* BB */ { UD_Ibtc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BC */ { UD_Ibsf, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BD */ { UD_Ibsr, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BE */ { UD_Imovsx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BF */ { UD_Imovsx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Imovnti, O_M, O_Gvw, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C4 */ { UD_Ipinsrw, O_P, O_Ew, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_PR, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C6 */ { UD_Ishufps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG }, + /* C8 */ { UD_Ibswap, O_rAXr8, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* C9 */ { UD_Ibswap, O_rCXr9, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CA */ { UD_Ibswap, O_rDXr10, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CB */ { UD_Ibswap, O_rBXr11, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CC */ { UD_Ibswap, O_rSPr12, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CD */ { UD_Ibswap, O_rBPr13, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CE */ { UD_Ibswap, O_rSIr14, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CF */ { UD_Ibswap, O_rDIr15, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Ipsrlw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_PR, O_NONE, P_oso|P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipaddusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipaddusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Imovntq, O_M, O_P, O_NONE, P_none }, + /* E8 */ { UD_Ipsubsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_00__reg[8] = { + /* 00 */ { UD_Isldt, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Istr, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Illdt, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iltr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iverr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iverw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg[8] = { + /* 00 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD }, + /* 01 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD }, + /* 02 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_02__MOD }, + /* 03 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD }, + /* 04 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_04__MOD }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod[2] = { + /* 00 */ { UD_Isgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmcall, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmresume, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxoff, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod[2] = { + /* 00 */ { UD_Isidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod__op_01__rm[8] = { + /* 00 */ { UD_Imonitor, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_02__mod[2] = { + /* 00 */ { UD_Ilgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod[2] = { + /* 00 */ { UD_Ilidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR }, + /* 06 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor[2] = { + /* 00 */ { UD_Ivmrun, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Ivmmcall, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor[2] = { + /* 00 */ { UD_Ivmload, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Ivmsave, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Istgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor[2] = { + /* 00 */ { UD_Iclgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor[2] = { + /* 00 */ { UD_Iskinit, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor[2] = { + /* 00 */ { UD_Iinvlpga, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_04__mod[2] = { + /* 00 */ { UD_Ismsw, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_06__mod[2] = { + /* 00 */ { UD_Ilmsw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod[2] = { + /* 00 */ { UD_Iinvlpg, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Iswapgs, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Irdtscp, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_0d__reg[8] = { + /* 00 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_18__reg[8] = { + /* 00 */ { UD_Iprefetchnta, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetcht0, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetcht1, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetcht2, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ildmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Istmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod__op_01__rm[8] = { + /* 00 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod__op_01__rm[8] = { + /* 00 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod[2] = { + /* 00 */ { UD_Iclflush, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ba__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ibt, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ibts, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ibtr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ibtc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Icmpxchg8b, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrld, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrst, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifabs, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_If2xm1, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte[256] = { + /* 00 */ { UD_Iadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadd, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iadd, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iadd, O_AL, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iadd, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 06 */ { UD_Ipush, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 07 */ { UD_Ipop, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 08 */ { UD_Ior, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 09 */ { UD_Ior, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0A */ { UD_Ior, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 0B */ { UD_Ior, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0C */ { UD_Ior, O_AL, O_Ib, O_NONE, P_none }, + /* 0D */ { UD_Ior, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 0E */ { UD_Ipush, O_CS, O_NONE, O_NONE, P_inv64|P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iadc, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Iadc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Iadc, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iadc, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iadc, O_AL, O_Ib, O_NONE, P_none }, + /* 15 */ { UD_Iadc, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 16 */ { UD_Ipush, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 17 */ { UD_Ipop, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 18 */ { UD_Isbb, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 19 */ { UD_Isbb, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Isbb, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Isbb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Isbb, O_AL, O_Ib, O_NONE, P_none }, + /* 1D */ { UD_Isbb, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 1E */ { UD_Ipush, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 1F */ { UD_Ipop, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 20 */ { UD_Iand, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 21 */ { UD_Iand, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 22 */ { UD_Iand, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 23 */ { UD_Iand, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 24 */ { UD_Iand, O_AL, O_Ib, O_NONE, P_none }, + /* 25 */ { UD_Iand, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Idaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 28 */ { UD_Isub, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Isub, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Isub, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Isub, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Isub, O_AL, O_Ib, O_NONE, P_none }, + /* 2D */ { UD_Isub, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Idas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 30 */ { UD_Ixor, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 31 */ { UD_Ixor, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 32 */ { UD_Ixor, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 33 */ { UD_Ixor, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 34 */ { UD_Ixor, O_AL, O_Ib, O_NONE, P_none }, + /* 35 */ { UD_Ixor, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iaaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 38 */ { UD_Icmp, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 39 */ { UD_Icmp, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3A */ { UD_Icmp, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 3B */ { UD_Icmp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3C */ { UD_Icmp, O_AL, O_Ib, O_NONE, P_none }, + /* 3D */ { UD_Icmp, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iaas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 40 */ { UD_Iinc, O_eAX, O_NONE, O_NONE, P_oso }, + /* 41 */ { UD_Iinc, O_eCX, O_NONE, O_NONE, P_oso }, + /* 42 */ { UD_Iinc, O_eDX, O_NONE, O_NONE, P_oso }, + /* 43 */ { UD_Iinc, O_eBX, O_NONE, O_NONE, P_oso }, + /* 44 */ { UD_Iinc, O_eSP, O_NONE, O_NONE, P_oso }, + /* 45 */ { UD_Iinc, O_eBP, O_NONE, O_NONE, P_oso }, + /* 46 */ { UD_Iinc, O_eSI, O_NONE, O_NONE, P_oso }, + /* 47 */ { UD_Iinc, O_eDI, O_NONE, O_NONE, P_oso }, + /* 48 */ { UD_Idec, O_eAX, O_NONE, O_NONE, P_oso }, + /* 49 */ { UD_Idec, O_eCX, O_NONE, O_NONE, P_oso }, + /* 4A */ { UD_Idec, O_eDX, O_NONE, O_NONE, P_oso }, + /* 4B */ { UD_Idec, O_eBX, O_NONE, O_NONE, P_oso }, + /* 4C */ { UD_Idec, O_eSP, O_NONE, O_NONE, P_oso }, + /* 4D */ { UD_Idec, O_eBP, O_NONE, O_NONE, P_oso }, + /* 4E */ { UD_Idec, O_eSI, O_NONE, O_NONE, P_oso }, + /* 4F */ { UD_Idec, O_eDI, O_NONE, O_NONE, P_oso }, + /* 50 */ { UD_Ipush, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 51 */ { UD_Ipush, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 52 */ { UD_Ipush, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 53 */ { UD_Ipush, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 54 */ { UD_Ipush, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 55 */ { UD_Ipush, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 56 */ { UD_Ipush, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 57 */ { UD_Ipush, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 58 */ { UD_Ipop, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 59 */ { UD_Ipop, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5A */ { UD_Ipop, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5B */ { UD_Ipop, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5C */ { UD_Ipop, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5D */ { UD_Ipop, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5E */ { UD_Ipop, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5F */ { UD_Ipop, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 60 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_60__OSIZE }, + /* 61 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_61__OSIZE }, + /* 62 */ { UD_Ibound, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* 63 */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_63__MODE }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Ipush, O_Iz, O_NONE, O_NONE, P_c1|P_oso }, + /* 69 */ { UD_Iimul, O_Gv, O_Ev, O_Iz, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipush, O_Ib, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iimul, O_Gv, O_Ev, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6D__OSIZE }, + /* 6E */ { UD_Ioutsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6F__OSIZE }, + /* 70 */ { UD_Ijo, O_Jb, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Ijno, O_Jb, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Ijb, O_Jb, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Ijae, O_Jb, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Ijz, O_Jb, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Ijnz, O_Jb, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Ijbe, O_Jb, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Ija, O_Jb, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Ijs, O_Jb, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Ijns, O_Jb, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Ijp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Ijnp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ijl, O_Jb, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Ijge, O_Jb, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Ijle, O_Jb, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Ijg, O_Jb, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_80__REG }, + /* 81 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_81__REG }, + /* 82 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_82__REG }, + /* 83 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_83__REG }, + /* 84 */ { UD_Itest, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 85 */ { UD_Itest, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 86 */ { UD_Ixchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 87 */ { UD_Ixchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 88 */ { UD_Imov, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 89 */ { UD_Imov, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8A */ { UD_Imov, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 8B */ { UD_Imov, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8C */ { UD_Imov, O_Ev, O_S, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8D */ { UD_Ilea, O_Gv, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8E */ { UD_Imov, O_S, O_Ev, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8F */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_8F__REG }, + /* 90 */ { UD_Ixchg, O_rAXr8, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 91 */ { UD_Ixchg, O_rCXr9, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 92 */ { UD_Ixchg, O_rDXr10, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 93 */ { UD_Ixchg, O_rBXr11, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 94 */ { UD_Ixchg, O_rSPr12, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 95 */ { UD_Ixchg, O_rBPr13, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 96 */ { UD_Ixchg, O_rSIr14, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 97 */ { UD_Ixchg, O_rDIr15, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 98 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_98__OSIZE }, + /* 99 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_99__OSIZE }, + /* 9A */ { UD_Icall, O_Ap, O_NONE, O_NONE, P_inv64|P_oso }, + /* 9B */ { UD_Iwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE }, + /* 9D */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE }, + /* 9E */ { UD_Isahf, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Ilahf, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Imov, O_AL, O_Ob, O_NONE, P_none }, + /* A1 */ { UD_Imov, O_rAX, O_Ov, O_NONE, P_aso|P_oso|P_rexw }, + /* A2 */ { UD_Imov, O_Ob, O_AL, O_NONE, P_none }, + /* A3 */ { UD_Imov, O_Ov, O_rAX, O_NONE, P_aso|P_oso|P_rexw }, + /* A4 */ { UD_Imovsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* A5 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A5__OSIZE }, + /* A6 */ { UD_Icmpsb, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A7__OSIZE }, + /* A8 */ { UD_Itest, O_AL, O_Ib, O_NONE, P_none }, + /* A9 */ { UD_Itest, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* AA */ { UD_Istosb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AB */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AB__OSIZE }, + /* AC */ { UD_Ilodsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AD */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AD__OSIZE }, + /* AE */ { UD_Iscasb, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AF__OSIZE }, + /* B0 */ { UD_Imov, O_ALr8b, O_Ib, O_NONE, P_rexb }, + /* B1 */ { UD_Imov, O_CLr9b, O_Ib, O_NONE, P_rexb }, + /* B2 */ { UD_Imov, O_DLr10b, O_Ib, O_NONE, P_rexb }, + /* B3 */ { UD_Imov, O_BLr11b, O_Ib, O_NONE, P_rexb }, + /* B4 */ { UD_Imov, O_AHr12b, O_Ib, O_NONE, P_rexb }, + /* B5 */ { UD_Imov, O_CHr13b, O_Ib, O_NONE, P_rexb }, + /* B6 */ { UD_Imov, O_DHr14b, O_Ib, O_NONE, P_rexb }, + /* B7 */ { UD_Imov, O_BHr15b, O_Ib, O_NONE, P_rexb }, + /* B8 */ { UD_Imov, O_rAXr8, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* B9 */ { UD_Imov, O_rCXr9, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BA */ { UD_Imov, O_rDXr10, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BB */ { UD_Imov, O_rBXr11, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BC */ { UD_Imov, O_rSPr12, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BD */ { UD_Imov, O_rBPr13, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BE */ { UD_Imov, O_rSIr14, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BF */ { UD_Imov, O_rDIr15, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* C0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C0__REG }, + /* C1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C1__REG }, + /* C2 */ { UD_Iret, O_Iw, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iret, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iles, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C5 */ { UD_Ilds, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C6__REG }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C7__REG }, + /* C8 */ { UD_Ienter, O_Iw, O_Ib, O_NONE, P_def64|P_depM|P_none }, + /* C9 */ { UD_Ileave, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iretf, O_Iw, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iretf, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iint3, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iint, O_Ib, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinto, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* CF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_CF__OSIZE }, + /* D0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D0__REG }, + /* D1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D1__REG }, + /* D2 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D2__REG }, + /* D3 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D3__REG }, + /* D4 */ { UD_Iaam, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D5 */ { UD_Iaad, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D6 */ { UD_Isalc, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* D7 */ { UD_Ixlatb, O_NONE, O_NONE, O_NONE, P_rexw }, + /* D8 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD }, + /* D9 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD }, + /* DA */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD }, + /* DB */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD }, + /* DC */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD }, + /* DD */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD }, + /* DE */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD }, + /* DF */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD }, + /* E0 */ { UD_Iloopnz, O_Jb, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iloope, O_Jb, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iloop, O_Jb, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Igrp_asize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_E3__ASIZE }, + /* E4 */ { UD_Iin, O_AL, O_Ib, O_NONE, P_none }, + /* E5 */ { UD_Iin, O_eAX, O_Ib, O_NONE, P_oso }, + /* E6 */ { UD_Iout, O_Ib, O_AL, O_NONE, P_none }, + /* E7 */ { UD_Iout, O_Ib, O_eAX, O_NONE, P_oso }, + /* E8 */ { UD_Icall, O_Jz, O_NONE, O_NONE, P_def64|P_oso }, + /* E9 */ { UD_Ijmp, O_Jz, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* EA */ { UD_Ijmp, O_Ap, O_NONE, O_NONE, P_inv64|P_none }, + /* EB */ { UD_Ijmp, O_Jb, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iin, O_AL, O_DX, O_NONE, P_none }, + /* ED */ { UD_Iin, O_eAX, O_DX, O_NONE, P_oso }, + /* EE */ { UD_Iout, O_DX, O_AL, O_NONE, P_none }, + /* EF */ { UD_Iout, O_DX, O_eAX, O_NONE, P_oso }, + /* F0 */ { UD_Ilock, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iint1, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Irepne, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Irep, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Ihlt, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Icmc, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F6__REG }, + /* F7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F7__REG }, + /* F8 */ { UD_Iclc, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Istc, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Icli, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Isti, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Icld, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Istd, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FE__REG }, + /* FF */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FF__REG }, +}; + +static struct ud_itab_entry itab__1byte__op_60__osize[3] = { + /* 00 */ { UD_Ipusha, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipushad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_61__osize[3] = { + /* 00 */ { UD_Ipopa, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipopad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_63__mode[3] = { + /* 00 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 01 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 02 */ { UD_Imovsxd, O_Gv, O_Ed, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexx|P_rexr|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_6d__osize[3] = { + /* 00 */ { UD_Iinsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Iinsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_6f__osize[3] = { + /* 00 */ { UD_Ioutsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Ioutsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Ioutsq, O_NONE, O_NONE, O_NONE, P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_80__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_81__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_82__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_83__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_8f__reg[8] = { + /* 00 */ { UD_Ipop, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_98__osize[3] = { + /* 00 */ { UD_Icbw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icwde, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icdqe, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_99__osize[3] = { + /* 00 */ { UD_Icwd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icdq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icqo, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipushfq, O_NONE, O_NONE, O_NONE, P_def64|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipopfq, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_a5__osize[3] = { + /* 00 */ { UD_Imovsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Imovsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Imovsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_a7__osize[3] = { + /* 00 */ { UD_Icmpsw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icmpsd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icmpsq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ab__osize[3] = { + /* 00 */ { UD_Istosw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Istosd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Istosq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ad__osize[3] = { + /* 00 */ { UD_Ilodsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Ilodsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Ilodsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AE__MOD__OP_00__REG }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifxsave, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifxrstor, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_af__osize[3] = { + /* 00 */ { UD_Iscasw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iscasd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iscasq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_c0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c6__reg[8] = { + /* 00 */ { UD_Imov, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_c7__reg[8] = { + /* 00 */ { UD_Imov, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_cf__osize[3] = { + /* 00 */ { UD_Iiretw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iiretd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iiretq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_d0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d2__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d3__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcom, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcom, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcom, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcom, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcom, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcom, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcom, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcom, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsub, O_ST0, O_ST1, O_NONE, P_none }, + /* 22 */ { UD_Ifsub, O_ST0, O_ST2, O_NONE, P_none }, + /* 23 */ { UD_Ifsub, O_ST0, O_ST3, O_NONE, P_none }, + /* 24 */ { UD_Ifsub, O_ST0, O_ST4, O_NONE, P_none }, + /* 25 */ { UD_Ifsub, O_ST0, O_ST5, O_NONE, P_none }, + /* 26 */ { UD_Ifsub, O_ST0, O_ST6, O_NONE, P_none }, + /* 27 */ { UD_Ifsub, O_ST0, O_ST7, O_NONE, P_none }, + /* 28 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubr, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifsubr, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifsubr, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifsubr, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifsubr, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifsubr, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifsubr, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdiv, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifdiv, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifdiv, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifdiv, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifdiv, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifdiv, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifdiv, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivr, O_ST0, O_ST1, O_NONE, P_none }, + /* 3A */ { UD_Ifdivr, O_ST0, O_ST2, O_NONE, P_none }, + /* 3B */ { UD_Ifdivr, O_ST0, O_ST3, O_NONE, P_none }, + /* 3C */ { UD_Ifdivr, O_ST0, O_ST4, O_NONE, P_none }, + /* 3D */ { UD_Ifdivr, O_ST0, O_ST5, O_NONE, P_none }, + /* 3E */ { UD_Ifdivr, O_ST0, O_ST6, O_NONE, P_none }, + /* 3F */ { UD_Ifdivr, O_ST0, O_ST7, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ifst, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifldenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifldcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifnstenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifld, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifld, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifld, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifld, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifld, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifld, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifld, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifxch, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifxch, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifxch, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifxch, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifxch, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifxch, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifxch, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifxch, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifnop, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp1, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp1, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp1, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp1, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp1, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp1, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp1, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp1, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifchs, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iftst, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifxam, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifld1, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifldl2t, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifldl2e, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifldlpi, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifldlg2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifldln2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifldz, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Ifyl2x, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Ifptan, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Ifpatan, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Ifpxtract, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Ifprem1, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Ifdecstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Ifncstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Ifprem, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Ifyl2xp1, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Ifsqrt, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Ifsincos, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Ifrndint, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Ifscale, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Ifsin, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Ifcos, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmove, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmove, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmove, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmove, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmove, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmove, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmove, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmove, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ifstp, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovnb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovnb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovnb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovnb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovnb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovnb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovnb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovnb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmovne, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmovne, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmovne, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmovne, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmovne, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmovne, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmovne, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmovne, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovnbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovnbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovnbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovnbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovnbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovnbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovnbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovnbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovnu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovnu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovnu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovnu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovnu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovnu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovnu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovnu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifclex, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifninit, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcom2, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcom2, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcom2, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcom2, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcom2, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcom2, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcom2, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcom2, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp3, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp3, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp3, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp3, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp3, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp3, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp3, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp3, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubr, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubr, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubr, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubr, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubr, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubr, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubr, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsub, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsub, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsub, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsub, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsub, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsub, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsub, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivr, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivr, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivr, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivr, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivr, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivr, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivr, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdiv, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdiv, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdiv, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdiv, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdiv, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdiv, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdiv, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifst, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifrstor, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ifnsave, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstsw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffree, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffree, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffree, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffree, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffree, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffree, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffree, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffree, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch4, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch4, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch4, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch4, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch4, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch4, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch4, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch4, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifst, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifst, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifst, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifst, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifst, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifst, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifst, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifst, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifucom, O_ST0, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifucom, O_ST1, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifucom, O_ST2, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifucom, O_ST3, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Ifucom, O_ST4, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifucom, O_ST5, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Ifucom, O_ST6, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Ifucom, O_ST7, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomp, O_ST0, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucomp, O_ST1, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifucomp, O_ST2, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifucomp, O_ST3, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifucomp, O_ST4, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifucomp, O_ST5, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifucomp, O_ST6, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Ifucomp, O_ST7, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifaddp, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifaddp, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifaddp, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifaddp, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifaddp, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifaddp, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifaddp, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifaddp, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmulp, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmulp, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmulp, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmulp, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmulp, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmulp, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmulp, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmulp, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcomp5, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcomp5, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcomp5, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcomp5, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcomp5, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcomp5, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcomp5, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcomp5, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsubp, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubp, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsubp, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsubp, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsubp, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsubp, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsubp, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsubp, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdivp, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivp, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdivp, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdivp, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdivp, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdivp, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdivp, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdivp, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifbld, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifild, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifbstp, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifistp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffreep, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffreep, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffreep, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffreep, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffreep, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffreep, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffreep, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffreep, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch7, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch7, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch7, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch7, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch7, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch7, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch7, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch7, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifstp8, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifstp8, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifstp8, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifstp8, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifstp8, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifstp8, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifstp8, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifstp8, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp9, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp9, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp9, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp9, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp9, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp9, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp9, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp9, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifnstsw, O_AX, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_e3__asize[3] = { + /* 00 */ { UD_Ijcxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 01 */ { UD_Ijecxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 02 */ { UD_Ijrcxz, O_Jb, O_NONE, O_NONE, P_aso }, +}; + +static struct ud_itab_entry itab__1byte__op_f6__reg[8] = { + /* 00 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_f7__reg[8] = { + /* 00 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_fe__reg[8] = { + /* 00 */ { UD_Iinc, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ff__reg[8] = { + /* 00 */ { UD_Iinc, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Icall, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Icall, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ijmp, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ijmp, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ipush, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__3dnow[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 59 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovupd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovupd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovapd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovapd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2pd, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Imovmskpd, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iandpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtpd2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Ipunpcklqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6D */ { UD_Ipunpckhqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6E */ { UD_Imovd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovqa, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Imovd, O_Ex, O_V, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqa, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmppd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Ipinsrw, O_V, O_Ew, O_Ib, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_VR, O_Ib, P_aso|P_rexr|P_rexb }, + /* C6 */ { UD_Ishufpd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Ipsrlw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Imovq, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_VR, O_NONE, P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Icvttpd2dq, O_V, O_W, O_NONE, P_none }, + /* E7 */ { UD_Imovntdq, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E8 */ { UD_Ipsubsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Ipsrldq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Ipslldq, O_VR, O_Ib, O_NONE, P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmclear, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_ssef2__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovsd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovddup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2sd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtsd2ss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Isubsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Ipshuflw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpsd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovdq2q, O_P, O_VR, O_NONE, P_aso|P_rexb }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtpd2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Ilddqu, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovss, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovsldup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Imovshdup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2ss, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtss2sd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvttps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Imovdqu, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufhw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqu, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpss, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovq2dq, O_V, O_PR, O_NONE, P_aso }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtdq2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxon, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +/* the order of this table matches enum ud_itab_index */ +struct ud_itab_entry * ud_itab_list[] = { + itab__0f, + itab__0f__op_00__reg, + itab__0f__op_01__reg, + itab__0f__op_01__reg__op_00__mod, + itab__0f__op_01__reg__op_00__mod__op_01__rm, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_01__mod, + itab__0f__op_01__reg__op_01__mod__op_01__rm, + itab__0f__op_01__reg__op_02__mod, + itab__0f__op_01__reg__op_03__mod, + itab__0f__op_01__reg__op_03__mod__op_01__rm, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor, + itab__0f__op_01__reg__op_04__mod, + itab__0f__op_01__reg__op_06__mod, + itab__0f__op_01__reg__op_07__mod, + itab__0f__op_01__reg__op_07__mod__op_01__rm, + itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor, + itab__0f__op_0d__reg, + itab__0f__op_18__reg, + itab__0f__op_71__reg, + itab__0f__op_72__reg, + itab__0f__op_73__reg, + itab__0f__op_ae__reg, + itab__0f__op_ae__reg__op_05__mod, + itab__0f__op_ae__reg__op_05__mod__op_01__rm, + itab__0f__op_ae__reg__op_06__mod, + itab__0f__op_ae__reg__op_06__mod__op_01__rm, + itab__0f__op_ae__reg__op_07__mod, + itab__0f__op_ae__reg__op_07__mod__op_01__rm, + itab__0f__op_ba__reg, + itab__0f__op_c7__reg, + itab__0f__op_c7__reg__op_00__vendor, + itab__0f__op_c7__reg__op_07__vendor, + itab__0f__op_d9__mod, + itab__0f__op_d9__mod__op_01__x87, + itab__1byte, + itab__1byte__op_60__osize, + itab__1byte__op_61__osize, + itab__1byte__op_63__mode, + itab__1byte__op_6d__osize, + itab__1byte__op_6f__osize, + itab__1byte__op_80__reg, + itab__1byte__op_81__reg, + itab__1byte__op_82__reg, + itab__1byte__op_83__reg, + itab__1byte__op_8f__reg, + itab__1byte__op_98__osize, + itab__1byte__op_99__osize, + itab__1byte__op_9c__mode, + itab__1byte__op_9c__mode__op_00__osize, + itab__1byte__op_9c__mode__op_01__osize, + itab__1byte__op_9d__mode, + itab__1byte__op_9d__mode__op_00__osize, + itab__1byte__op_9d__mode__op_01__osize, + itab__1byte__op_a5__osize, + itab__1byte__op_a7__osize, + itab__1byte__op_ab__osize, + itab__1byte__op_ad__osize, + itab__1byte__op_ae__mod, + itab__1byte__op_ae__mod__op_00__reg, + itab__1byte__op_af__osize, + itab__1byte__op_c0__reg, + itab__1byte__op_c1__reg, + itab__1byte__op_c6__reg, + itab__1byte__op_c7__reg, + itab__1byte__op_cf__osize, + itab__1byte__op_d0__reg, + itab__1byte__op_d1__reg, + itab__1byte__op_d2__reg, + itab__1byte__op_d3__reg, + itab__1byte__op_d8__mod, + itab__1byte__op_d8__mod__op_00__reg, + itab__1byte__op_d8__mod__op_01__x87, + itab__1byte__op_d9__mod, + itab__1byte__op_d9__mod__op_00__reg, + itab__1byte__op_d9__mod__op_01__x87, + itab__1byte__op_da__mod, + itab__1byte__op_da__mod__op_00__reg, + itab__1byte__op_da__mod__op_01__x87, + itab__1byte__op_db__mod, + itab__1byte__op_db__mod__op_00__reg, + itab__1byte__op_db__mod__op_01__x87, + itab__1byte__op_dc__mod, + itab__1byte__op_dc__mod__op_00__reg, + itab__1byte__op_dc__mod__op_01__x87, + itab__1byte__op_dd__mod, + itab__1byte__op_dd__mod__op_00__reg, + itab__1byte__op_dd__mod__op_01__x87, + itab__1byte__op_de__mod, + itab__1byte__op_de__mod__op_00__reg, + itab__1byte__op_de__mod__op_01__x87, + itab__1byte__op_df__mod, + itab__1byte__op_df__mod__op_00__reg, + itab__1byte__op_df__mod__op_01__x87, + itab__1byte__op_e3__asize, + itab__1byte__op_f6__reg, + itab__1byte__op_f7__reg, + itab__1byte__op_fe__reg, + itab__1byte__op_ff__reg, + itab__3dnow, + itab__pfx_sse66__0f, + itab__pfx_sse66__0f__op_71__reg, + itab__pfx_sse66__0f__op_72__reg, + itab__pfx_sse66__0f__op_73__reg, + itab__pfx_sse66__0f__op_c7__reg, + itab__pfx_sse66__0f__op_c7__reg__op_00__vendor, + itab__pfx_ssef2__0f, + itab__pfx_ssef3__0f, + itab__pfx_ssef3__0f__op_c7__reg, + itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor, +}; diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/itab.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,719 @@ + +/* itab.h -- auto generated by opgen.py, do not edit. */ + +#ifndef UD_ITAB_H +#define UD_ITAB_H + + + +enum ud_itab_vendor_index { + ITAB__VENDOR_INDX__AMD, + ITAB__VENDOR_INDX__INTEL, +}; + + +enum ud_itab_mode_index { + ITAB__MODE_INDX__16, + ITAB__MODE_INDX__32, + ITAB__MODE_INDX__64 +}; + + +enum ud_itab_mod_index { + ITAB__MOD_INDX__NOT_11, + ITAB__MOD_INDX__11 +}; + + +enum ud_itab_index { + ITAB__0F, + ITAB__0F__OP_00__REG, + ITAB__0F__OP_01__REG, + ITAB__0F__OP_01__REG__OP_00__MOD, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_01__MOD, + ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_02__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR, + ITAB__0F__OP_01__REG__OP_04__MOD, + ITAB__0F__OP_01__REG__OP_06__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_0D__REG, + ITAB__0F__OP_18__REG, + ITAB__0F__OP_71__REG, + ITAB__0F__OP_72__REG, + ITAB__0F__OP_73__REG, + ITAB__0F__OP_AE__REG, + ITAB__0F__OP_AE__REG__OP_05__MOD, + ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_06__MOD, + ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_07__MOD, + ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_BA__REG, + ITAB__0F__OP_C7__REG, + ITAB__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__0F__OP_C7__REG__OP_07__VENDOR, + ITAB__0F__OP_D9__MOD, + ITAB__0F__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE, + ITAB__1BYTE__OP_60__OSIZE, + ITAB__1BYTE__OP_61__OSIZE, + ITAB__1BYTE__OP_63__MODE, + ITAB__1BYTE__OP_6D__OSIZE, + ITAB__1BYTE__OP_6F__OSIZE, + ITAB__1BYTE__OP_80__REG, + ITAB__1BYTE__OP_81__REG, + ITAB__1BYTE__OP_82__REG, + ITAB__1BYTE__OP_83__REG, + ITAB__1BYTE__OP_8F__REG, + ITAB__1BYTE__OP_98__OSIZE, + ITAB__1BYTE__OP_99__OSIZE, + ITAB__1BYTE__OP_9C__MODE, + ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_9D__MODE, + ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_A5__OSIZE, + ITAB__1BYTE__OP_A7__OSIZE, + ITAB__1BYTE__OP_AB__OSIZE, + ITAB__1BYTE__OP_AD__OSIZE, + ITAB__1BYTE__OP_AE__MOD, + ITAB__1BYTE__OP_AE__MOD__OP_00__REG, + ITAB__1BYTE__OP_AF__OSIZE, + ITAB__1BYTE__OP_C0__REG, + ITAB__1BYTE__OP_C1__REG, + ITAB__1BYTE__OP_C6__REG, + ITAB__1BYTE__OP_C7__REG, + ITAB__1BYTE__OP_CF__OSIZE, + ITAB__1BYTE__OP_D0__REG, + ITAB__1BYTE__OP_D1__REG, + ITAB__1BYTE__OP_D2__REG, + ITAB__1BYTE__OP_D3__REG, + ITAB__1BYTE__OP_D8__MOD, + ITAB__1BYTE__OP_D8__MOD__OP_00__REG, + ITAB__1BYTE__OP_D8__MOD__OP_01__X87, + ITAB__1BYTE__OP_D9__MOD, + ITAB__1BYTE__OP_D9__MOD__OP_00__REG, + ITAB__1BYTE__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE__OP_DA__MOD, + ITAB__1BYTE__OP_DA__MOD__OP_00__REG, + ITAB__1BYTE__OP_DA__MOD__OP_01__X87, + ITAB__1BYTE__OP_DB__MOD, + ITAB__1BYTE__OP_DB__MOD__OP_00__REG, + ITAB__1BYTE__OP_DB__MOD__OP_01__X87, + ITAB__1BYTE__OP_DC__MOD, + ITAB__1BYTE__OP_DC__MOD__OP_00__REG, + ITAB__1BYTE__OP_DC__MOD__OP_01__X87, + ITAB__1BYTE__OP_DD__MOD, + ITAB__1BYTE__OP_DD__MOD__OP_00__REG, + ITAB__1BYTE__OP_DD__MOD__OP_01__X87, + ITAB__1BYTE__OP_DE__MOD, + ITAB__1BYTE__OP_DE__MOD__OP_00__REG, + ITAB__1BYTE__OP_DE__MOD__OP_01__X87, + ITAB__1BYTE__OP_DF__MOD, + ITAB__1BYTE__OP_DF__MOD__OP_00__REG, + ITAB__1BYTE__OP_DF__MOD__OP_01__X87, + ITAB__1BYTE__OP_E3__ASIZE, + ITAB__1BYTE__OP_F6__REG, + ITAB__1BYTE__OP_F7__REG, + ITAB__1BYTE__OP_FE__REG, + ITAB__1BYTE__OP_FF__REG, + ITAB__3DNOW, + ITAB__PFX_SSE66__0F, + ITAB__PFX_SSE66__0F__OP_71__REG, + ITAB__PFX_SSE66__0F__OP_72__REG, + ITAB__PFX_SSE66__0F__OP_73__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__PFX_SSEF2__0F, + ITAB__PFX_SSEF3__0F, + ITAB__PFX_SSEF3__0F__OP_C7__REG, + ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR, +}; + + +enum ud_mnemonic_code { + UD_I3dnow, + UD_Iaaa, + UD_Iaad, + UD_Iaam, + UD_Iaas, + UD_Iadc, + UD_Iadd, + UD_Iaddpd, + UD_Iaddps, + UD_Iaddsd, + UD_Iaddss, + UD_Iaddsubpd, + UD_Iaddsubps, + UD_Iand, + UD_Iandpd, + UD_Iandps, + UD_Iandnpd, + UD_Iandnps, + UD_Iarpl, + UD_Imovsxd, + UD_Ibound, + UD_Ibsf, + UD_Ibsr, + UD_Ibswap, + UD_Ibt, + UD_Ibtc, + UD_Ibtr, + UD_Ibts, + UD_Icall, + UD_Icbw, + UD_Icwde, + UD_Icdqe, + UD_Iclc, + UD_Icld, + UD_Iclflush, + UD_Iclgi, + UD_Icli, + UD_Iclts, + UD_Icmc, + UD_Icmovo, + UD_Icmovno, + UD_Icmovb, + UD_Icmovae, + UD_Icmovz, + UD_Icmovnz, + UD_Icmovbe, + UD_Icmova, + UD_Icmovs, + UD_Icmovns, + UD_Icmovp, + UD_Icmovnp, + UD_Icmovl, + UD_Icmovge, + UD_Icmovle, + UD_Icmovg, + UD_Icmp, + UD_Icmppd, + UD_Icmpps, + UD_Icmpsb, + UD_Icmpsw, + UD_Icmpsd, + UD_Icmpsq, + UD_Icmpss, + UD_Icmpxchg, + UD_Icmpxchg8b, + UD_Icomisd, + UD_Icomiss, + UD_Icpuid, + UD_Icvtdq2pd, + UD_Icvtdq2ps, + UD_Icvtpd2dq, + UD_Icvtpd2pi, + UD_Icvtpd2ps, + UD_Icvtpi2ps, + UD_Icvtpi2pd, + UD_Icvtps2dq, + UD_Icvtps2pi, + UD_Icvtps2pd, + UD_Icvtsd2si, + UD_Icvtsd2ss, + UD_Icvtsi2ss, + UD_Icvtss2si, + UD_Icvtss2sd, + UD_Icvttpd2pi, + UD_Icvttpd2dq, + UD_Icvttps2dq, + UD_Icvttps2pi, + UD_Icvttsd2si, + UD_Icvtsi2sd, + UD_Icvttss2si, + UD_Icwd, + UD_Icdq, + UD_Icqo, + UD_Idaa, + UD_Idas, + UD_Idec, + UD_Idiv, + UD_Idivpd, + UD_Idivps, + UD_Idivsd, + UD_Idivss, + UD_Iemms, + UD_Ienter, + UD_If2xm1, + UD_Ifabs, + UD_Ifadd, + UD_Ifaddp, + UD_Ifbld, + UD_Ifbstp, + UD_Ifchs, + UD_Ifclex, + UD_Ifcmovb, + UD_Ifcmove, + UD_Ifcmovbe, + UD_Ifcmovu, + UD_Ifcmovnb, + UD_Ifcmovne, + UD_Ifcmovnbe, + UD_Ifcmovnu, + UD_Ifucomi, + UD_Ifcom, + UD_Ifcom2, + UD_Ifcomp3, + UD_Ifcomi, + UD_Ifucomip, + UD_Ifcomip, + UD_Ifcomp, + UD_Ifcomp5, + UD_Ifcompp, + UD_Ifcos, + UD_Ifdecstp, + UD_Ifdiv, + UD_Ifdivp, + UD_Ifdivr, + UD_Ifdivrp, + UD_Ifemms, + UD_Iffree, + UD_Iffreep, + UD_Ificom, + UD_Ificomp, + UD_Ifild, + UD_Ifncstp, + UD_Ifninit, + UD_Ifiadd, + UD_Ifidivr, + UD_Ifidiv, + UD_Ifisub, + UD_Ifisubr, + UD_Ifist, + UD_Ifistp, + UD_Ifisttp, + UD_Ifld, + UD_Ifld1, + UD_Ifldl2t, + UD_Ifldl2e, + UD_Ifldlpi, + UD_Ifldlg2, + UD_Ifldln2, + UD_Ifldz, + UD_Ifldcw, + UD_Ifldenv, + UD_Ifmul, + UD_Ifmulp, + UD_Ifimul, + UD_Ifnop, + UD_Ifpatan, + UD_Ifprem, + UD_Ifprem1, + UD_Ifptan, + UD_Ifrndint, + UD_Ifrstor, + UD_Ifnsave, + UD_Ifscale, + UD_Ifsin, + UD_Ifsincos, + UD_Ifsqrt, + UD_Ifstp, + UD_Ifstp1, + UD_Ifstp8, + UD_Ifstp9, + UD_Ifst, + UD_Ifnstcw, + UD_Ifnstenv, + UD_Ifnstsw, + UD_Ifsub, + UD_Ifsubp, + UD_Ifsubr, + UD_Ifsubrp, + UD_Iftst, + UD_Ifucom, + UD_Ifucomp, + UD_Ifucompp, + UD_Ifxam, + UD_Ifxch, + UD_Ifxch4, + UD_Ifxch7, + UD_Ifxrstor, + UD_Ifxsave, + UD_Ifpxtract, + UD_Ifyl2x, + UD_Ifyl2xp1, + UD_Ihaddpd, + UD_Ihaddps, + UD_Ihlt, + UD_Ihsubpd, + UD_Ihsubps, + UD_Iidiv, + UD_Iin, + UD_Iimul, + UD_Iinc, + UD_Iinsb, + UD_Iinsw, + UD_Iinsd, + UD_Iint1, + UD_Iint3, + UD_Iint, + UD_Iinto, + UD_Iinvd, + UD_Iinvlpg, + UD_Iinvlpga, + UD_Iiretw, + UD_Iiretd, + UD_Iiretq, + UD_Ijo, + UD_Ijno, + UD_Ijb, + UD_Ijae, + UD_Ijz, + UD_Ijnz, + UD_Ijbe, + UD_Ija, + UD_Ijs, + UD_Ijns, + UD_Ijp, + UD_Ijnp, + UD_Ijl, + UD_Ijge, + UD_Ijle, + UD_Ijg, + UD_Ijcxz, + UD_Ijecxz, + UD_Ijrcxz, + UD_Ijmp, + UD_Ilahf, + UD_Ilar, + UD_Ilddqu, + UD_Ildmxcsr, + UD_Ilds, + UD_Ilea, + UD_Iles, + UD_Ilfs, + UD_Ilgs, + UD_Ilidt, + UD_Ilss, + UD_Ileave, + UD_Ilfence, + UD_Ilgdt, + UD_Illdt, + UD_Ilmsw, + UD_Ilock, + UD_Ilodsb, + UD_Ilodsw, + UD_Ilodsd, + UD_Ilodsq, + UD_Iloopnz, + UD_Iloope, + UD_Iloop, + UD_Ilsl, + UD_Iltr, + UD_Imaskmovq, + UD_Imaxpd, + UD_Imaxps, + UD_Imaxsd, + UD_Imaxss, + UD_Imfence, + UD_Iminpd, + UD_Iminps, + UD_Iminsd, + UD_Iminss, + UD_Imonitor, + UD_Imov, + UD_Imovapd, + UD_Imovaps, + UD_Imovd, + UD_Imovddup, + UD_Imovdqa, + UD_Imovdqu, + UD_Imovdq2q, + UD_Imovhpd, + UD_Imovhps, + UD_Imovlhps, + UD_Imovlpd, + UD_Imovlps, + UD_Imovhlps, + UD_Imovmskpd, + UD_Imovmskps, + UD_Imovntdq, + UD_Imovnti, + UD_Imovntpd, + UD_Imovntps, + UD_Imovntq, + UD_Imovq, + UD_Imovqa, + UD_Imovq2dq, + UD_Imovsb, + UD_Imovsw, + UD_Imovsd, + UD_Imovsq, + UD_Imovsldup, + UD_Imovshdup, + UD_Imovss, + UD_Imovsx, + UD_Imovupd, + UD_Imovups, + UD_Imovzx, + UD_Imul, + UD_Imulpd, + UD_Imulps, + UD_Imulsd, + UD_Imulss, + UD_Imwait, + UD_Ineg, + UD_Inop, + UD_Inot, + UD_Ior, + UD_Iorpd, + UD_Iorps, + UD_Iout, + UD_Ioutsb, + UD_Ioutsw, + UD_Ioutsd, + UD_Ioutsq, + UD_Ipacksswb, + UD_Ipackssdw, + UD_Ipackuswb, + UD_Ipaddb, + UD_Ipaddw, + UD_Ipaddq, + UD_Ipaddsb, + UD_Ipaddsw, + UD_Ipaddusb, + UD_Ipaddusw, + UD_Ipand, + UD_Ipandn, + UD_Ipause, + UD_Ipavgb, + UD_Ipavgw, + UD_Ipcmpeqb, + UD_Ipcmpeqw, + UD_Ipcmpeqd, + UD_Ipcmpgtb, + UD_Ipcmpgtw, + UD_Ipcmpgtd, + UD_Ipextrw, + UD_Ipinsrw, + UD_Ipmaddwd, + UD_Ipmaxsw, + UD_Ipmaxub, + UD_Ipminsw, + UD_Ipminub, + UD_Ipmovmskb, + UD_Ipmulhuw, + UD_Ipmulhw, + UD_Ipmullw, + UD_Ipmuludq, + UD_Ipop, + UD_Ipopa, + UD_Ipopad, + UD_Ipopfw, + UD_Ipopfd, + UD_Ipopfq, + UD_Ipor, + UD_Iprefetch, + UD_Iprefetchnta, + UD_Iprefetcht0, + UD_Iprefetcht1, + UD_Iprefetcht2, + UD_Ipsadbw, + UD_Ipshufd, + UD_Ipshufhw, + UD_Ipshuflw, + UD_Ipshufw, + UD_Ipslldq, + UD_Ipsllw, + UD_Ipslld, + UD_Ipsllq, + UD_Ipsraw, + UD_Ipsrad, + UD_Ipsrlw, + UD_Ipsrld, + UD_Ipsrlq, + UD_Ipsrldq, + UD_Ipsubb, + UD_Ipsubw, + UD_Ipsubd, + UD_Ipsubq, + UD_Ipsubsb, + UD_Ipsubsw, + UD_Ipsubusb, + UD_Ipsubusw, + UD_Ipunpckhbw, + UD_Ipunpckhwd, + UD_Ipunpckhdq, + UD_Ipunpckhqdq, + UD_Ipunpcklbw, + UD_Ipunpcklwd, + UD_Ipunpckldq, + UD_Ipunpcklqdq, + UD_Ipi2fw, + UD_Ipi2fd, + UD_Ipf2iw, + UD_Ipf2id, + UD_Ipfnacc, + UD_Ipfpnacc, + UD_Ipfcmpge, + UD_Ipfmin, + UD_Ipfrcp, + UD_Ipfrsqrt, + UD_Ipfsub, + UD_Ipfadd, + UD_Ipfcmpgt, + UD_Ipfmax, + UD_Ipfrcpit1, + UD_Ipfrspit1, + UD_Ipfsubr, + UD_Ipfacc, + UD_Ipfcmpeq, + UD_Ipfmul, + UD_Ipfrcpit2, + UD_Ipmulhrw, + UD_Ipswapd, + UD_Ipavgusb, + UD_Ipush, + UD_Ipusha, + UD_Ipushad, + UD_Ipushfw, + UD_Ipushfd, + UD_Ipushfq, + UD_Ipxor, + UD_Ircl, + UD_Ircr, + UD_Irol, + UD_Iror, + UD_Ircpps, + UD_Ircpss, + UD_Irdmsr, + UD_Irdpmc, + UD_Irdtsc, + UD_Irdtscp, + UD_Irepne, + UD_Irep, + UD_Iret, + UD_Iretf, + UD_Irsm, + UD_Irsqrtps, + UD_Irsqrtss, + UD_Isahf, + UD_Isal, + UD_Isalc, + UD_Isar, + UD_Ishl, + UD_Ishr, + UD_Isbb, + UD_Iscasb, + UD_Iscasw, + UD_Iscasd, + UD_Iscasq, + UD_Iseto, + UD_Isetno, + UD_Isetb, + UD_Isetnb, + UD_Isetz, + UD_Isetnz, + UD_Isetbe, + UD_Iseta, + UD_Isets, + UD_Isetns, + UD_Isetp, + UD_Isetnp, + UD_Isetl, + UD_Isetge, + UD_Isetle, + UD_Isetg, + UD_Isfence, + UD_Isgdt, + UD_Ishld, + UD_Ishrd, + UD_Ishufpd, + UD_Ishufps, + UD_Isidt, + UD_Isldt, + UD_Ismsw, + UD_Isqrtps, + UD_Isqrtpd, + UD_Isqrtsd, + UD_Isqrtss, + UD_Istc, + UD_Istd, + UD_Istgi, + UD_Isti, + UD_Iskinit, + UD_Istmxcsr, + UD_Istosb, + UD_Istosw, + UD_Istosd, + UD_Istosq, + UD_Istr, + UD_Isub, + UD_Isubpd, + UD_Isubps, + UD_Isubsd, + UD_Isubss, + UD_Iswapgs, + UD_Isyscall, + UD_Isysenter, + UD_Isysexit, + UD_Isysret, + UD_Itest, + UD_Iucomisd, + UD_Iucomiss, + UD_Iud2, + UD_Iunpckhpd, + UD_Iunpckhps, + UD_Iunpcklps, + UD_Iunpcklpd, + UD_Iverr, + UD_Iverw, + UD_Ivmcall, + UD_Ivmclear, + UD_Ivmxon, + UD_Ivmptrld, + UD_Ivmptrst, + UD_Ivmresume, + UD_Ivmxoff, + UD_Ivmrun, + UD_Ivmmcall, + UD_Ivmload, + UD_Ivmsave, + UD_Iwait, + UD_Iwbinvd, + UD_Iwrmsr, + UD_Ixadd, + UD_Ixchg, + UD_Ixlatb, + UD_Ixor, + UD_Ixorpd, + UD_Ixorps, + UD_Idb, + UD_Iinvalid, + UD_Id3vil, + UD_Ina, + UD_Igrp_reg, + UD_Igrp_rm, + UD_Igrp_vendor, + UD_Igrp_x87, + UD_Igrp_mode, + UD_Igrp_osize, + UD_Igrp_asize, + UD_Igrp_mod, + UD_Inone, +}; + + + +extern const char* ud_mnemonics_str[];; +extern struct ud_itab_entry* ud_itab_list[]; + +#endif diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/kdb_dis.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/kdb_dis.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include /* for XEN_SUBVERSION */ +#include "../../include/kdbinc.h" +#include "extern.h" + +static void (*dis_syntax)(ud_t*) = UD_SYN_ATT; /* default dis-assembly syntax */ + +static struct { /* info for kdb_read_byte_for_ud() */ + kdbva_t kud_instr_addr; + domid_t kud_domid; +} kdb_ud_rd_info; + +/* called via function ptr by ud when disassembling. + * kdb info passed via kdb_ud_rd_info{} + */ +static int +kdb_read_byte_for_ud(struct ud *udp) +{ + kdbbyt_t bytebuf; + domid_t domid = kdb_ud_rd_info.kud_domid; + kdbva_t addr = kdb_ud_rd_info.kud_instr_addr; + + if (kdb_read_mem(addr, &bytebuf, 1, domid) == 1) { + kdb_ud_rd_info.kud_instr_addr++; + KDBGP1("udrd:addr:%lx domid:%d byt:%x\n", addr, domid, bytebuf); + return bytebuf; + } + KDBGP1("udrd:addr:%lx domid:%d err\n", addr, domid); + return UD_EOI; +} + +/* + * given a domid, convert addr to symbol and print it + * Eg: ffff828c801235e2: idle_loop+52 jmp idle_loop+55 + * Called twice here for idle_loop. In first case, nl is null, + * in the second case nl == '\n' + */ +void +kdb_prnt_addr2sym(domid_t domid, kdbva_t addr, char *nl) +{ + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1], pbuf[150], prefix[8]; + char *p = buf; + + prefix[0]='\0'; + if (domid != DOMID_IDLE) { + snprintf(prefix, 8, "%x:", domid); + p = kdb_guest_addr2sym(addr, domid, &offs); + } else + symbols_lookup(addr, &sz, &offs, buf); + + snprintf(pbuf, 150, "%s%s+%lx", prefix, p, offs); + if (*nl != '\n') + kdbp("%-30s%s", pbuf, nl); /* prints more than 30 if needed */ + else + kdbp("%s%s", pbuf, nl); + +} + +static int +kdb_jump_instr(enum ud_mnemonic_code mnemonic) +{ + return (mnemonic >= UD_Ijo && mnemonic <= UD_Ijmp); +} + +/* + * print one instr: function so that we can print offsets of jmp etc.. as + * symbol+offset instead of just address + */ +static void +kdb_print_one_instr(struct ud *udp, domid_t domid) +{ + signed long val = 0; + ud_type_t type = udp->operand[0].type; + + if ((udp->mnemonic == UD_Icall || kdb_jump_instr(udp->mnemonic)) && + type == UD_OP_JIMM) { + + int sz = udp->operand[0].size; + char *p, ibuf[40], *q = ibuf; + kdbva_t addr; + + if (sz == 8) val = udp->operand[0].lval.sbyte; + else if (sz == 16) val = udp->operand[0].lval.sword; + else if (sz == 32) val = udp->operand[0].lval.sdword; + else if (sz == 64) val = udp->operand[0].lval.sqword; + else kdbp("kdb_print_one_instr: Inval sz:z%d\n", sz); + + addr = udp->pc + val; + for(p=ud_insn_asm(udp); (*q=*p) && *p!=' '; p++,q++); + *q='\0'; + kdbp(" %-4s ", ibuf); /* space before for long func names */ + kdb_prnt_addr2sym(domid, addr, "\n"); + } else + kdbp(" %-24s\n", ud_insn_asm(udp)); +#if 0 + kdbp("mnemonic:z%d ", udp->mnemonic); + if (type == UD_OP_CONST) kdbp("type is const\n"); + else if (type == UD_OP_JIMM) kdbp("type is JIMM\n"); + else if (type == UD_OP_IMM) kdbp("type is IMM\n"); + else if (type == UD_OP_PTR) kdbp("type is PTR\n"); +#endif +} + +static void +kdb_setup_ud(struct ud *udp, kdbva_t addr, domid_t domid) +{ + int bitness = kdb_guest_bitness(domid); + uint vendor = (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ? + UD_VENDOR_AMD : UD_VENDOR_INTEL; + + KDBGP1("setup_ud:domid:%d bitness:%d addr:%lx\n", domid, bitness, addr); + ud_init(udp); + ud_set_mode(udp, kdb_guest_bitness(domid)); + ud_set_syntax(udp, dis_syntax); + ud_set_vendor(udp, vendor); /* HVM: vmx/svm different instrs*/ + ud_set_pc(udp, addr); /* for numbers printed on left */ + ud_set_input_hook(udp, kdb_read_byte_for_ud); + kdb_ud_rd_info.kud_instr_addr = addr; + kdb_ud_rd_info.kud_domid = domid; +} + +/* + * given an addr, print given number of instructions. + * Returns: address of next instruction in the stream + */ +kdbva_t +kdb_print_instr(kdbva_t addr, long num, domid_t domid) +{ + struct ud ud_s; + + KDBGP1("print_instr:addr:0x%lx num:%ld domid:%x\n", addr, num, domid); + + kdb_setup_ud(&ud_s, addr, domid); + while(num--) { + if (ud_disassemble(&ud_s)) { + uint64_t pc = ud_insn_off(&ud_s); + /* kdbp("%08x: ",(int)pc); */ + kdbp("%016lx: ", pc); + kdb_prnt_addr2sym(domid, pc, ""); + kdb_print_one_instr(&ud_s, domid); + } else + kdbp("KDB:Couldn't disassemble PC:0x%lx\n", addr); + /* for stack reads, don't always display error */ + } + KDBGP1("print_instr:kudaddr:0x%lx\n", kdb_ud_rd_info.kud_instr_addr); + return kdb_ud_rd_info.kud_instr_addr; +} + +void +kdb_display_pc(struct cpu_user_regs *regs) +{ + domid_t domid; + struct cpu_user_regs regs1 = *regs; + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + regs1.KDBIP = regs->KDBIP; + kdb_print_instr(regs1.KDBIP, 1, domid); +} + +/* check if the instr at the addr is call instruction + * RETURNS: size of the instr if it's a call instr, else 0 + */ +int +kdb_check_call_instr(domid_t domid, kdbva_t addr) +{ + struct ud ud_s; + int sz; + + kdb_setup_ud(&ud_s, addr, domid); + if ((sz=ud_disassemble(&ud_s)) && ud_s.mnemonic == UD_Icall) + return (sz); + return 0; +} + +/* toggle ATT and Intel syntaxes */ +void +kdb_toggle_dis_syntax(void) +{ + if (dis_syntax == UD_SYN_INTEL) { + dis_syntax = UD_SYN_ATT; + kdbp("dis syntax now set to ATT (Gas)\n"); + } else { + dis_syntax = UD_SYN_INTEL; + kdbp("dis syntax now set to Intel (NASM)\n"); + } +} diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/syn-att.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-att.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,211 @@ +/* ----------------------------------------------------------------------------- + * syn-att.c + * + * Copyright (c) 2004, 2005, 2006 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 16 : case 32 : + mkasm(u, "*"); break; + default: break; + } +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void +gen_operand(struct ud* u, struct ud_operand* op) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: + if (u->br_far) opr_cast(u, op); + if (u->pfx_seg) + mkasm(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", (-op->lval.sbyte) & 0xff); + else mkasm(u, "0x%x", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "0x%x", op->lval.uword); + else if (op->offset == 32) + mkasm(u, "0x%lx", op->lval.udword); + else if (op->offset == 64) + mkasm(u, "0x" FMT64 "x", op->lval.uqword); + + if (op->base) + mkasm(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]); + if (op->index) { + if (op->base) + mkasm(u, ","); + else mkasm(u, "("); + mkasm(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]); + } + if (op->scale) + mkasm(u, ",%d", op->scale); + if (op->base || op->index) + mkasm(u, ")"); + break; + + case UD_OP_IMM: + switch (op->size) { + case 8: mkasm(u, "$0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "$0x%x", op->lval.uword); break; + case 32: mkasm(u, "$0x%lx", op->lval.udword); break; + case 64: mkasm(u, "$0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "$0x%x, $0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "$0x%x, $0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + default: return; + } +} + +/* ============================================================================= + * translates to AT&T syntax + * ============================================================================= + */ +extern void +ud_translate_att(struct ud *u) +{ + int size = 0; + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + + /* special instructions */ + switch (u->mnemonic) { + case UD_Iretf: + mkasm(u, "lret "); + break; + case UD_Idb: + mkasm(u, ".byte 0x%x", u->operand[0].lval.ubyte); + return; + case UD_Ijmp: + case UD_Icall: + if (u->br_far) mkasm(u, "l"); + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + break; + case UD_Ibound: + case UD_Ienter: + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); + if (u->operand[1].type != UD_NONE) { + mkasm(u, ","); + gen_operand(u, &u->operand[1]); + } + return; + default: + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + } + + if (u->c1) + size = u->operand[0].size; + else if (u->c2) + size = u->operand[1].size; + else if (u->c3) + size = u->operand[2].size; + + if (size == 8) + mkasm(u, "b"); + else if (size == 16) + mkasm(u, "w"); + else if (size == 64) + mkasm(u, "q"); + + mkasm(u, " "); + + if (u->operand[2].type != UD_NONE) { + gen_operand(u, &u->operand[2]); + mkasm(u, ", "); + } + + if (u->operand[1].type != UD_NONE) { + gen_operand(u, &u->operand[1]); + mkasm(u, ", "); + } + + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); +} diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/syn-intel.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-intel.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,208 @@ +/* ----------------------------------------------------------------------------- + * syn-intel.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 8: mkasm(u, "byte " ); break; + case 16: mkasm(u, "word " ); break; + case 32: mkasm(u, "dword "); break; + case 64: mkasm(u, "qword "); break; + case 80: mkasm(u, "tword "); break; + default: break; + } + if (u->br_far) + mkasm(u, "far "); + else if (u->br_near) + mkasm(u, "near "); +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: { + + int op_f = 0; + + if (syn_cast) + opr_cast(u, op); + + mkasm(u, "["); + + if (u->pfx_seg) + mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + if (op->base) { + mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]); + op_f = 1; + } + + if (op->index) { + if (op_f) + mkasm(u, "+"); + mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]); + op_f = 1; + } + + if (op->scale) + mkasm(u, "*%d", op->scale); + + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", -op->lval.sbyte); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword); + else if (op->offset == 32) { + if (u->adr_mode == 64) { + if (op->lval.sdword < 0) + mkasm(u, "-0x%x", -op->lval.sdword); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword); + } + else mkasm(u, "%s0x%lx", (op_f) ? "+" : "", op->lval.udword); + } + else if (op->offset == 64) + mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", op->lval.uqword); + + mkasm(u, "]"); + break; + } + + case UD_OP_IMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: mkasm(u, "0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "0x%x", op->lval.uword); break; + case 32: mkasm(u, "0x%lx", op->lval.udword); break; + case 64: mkasm(u, "0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + case UD_OP_CONST: + if (syn_cast) opr_cast(u, op); + mkasm(u, "%d", op->lval.udword); + break; + + default: return; + } +} + +/* ============================================================================= + * translates to intel syntax + * ============================================================================= + */ +extern void ud_translate_intel(struct ud* u) +{ + /* -- prefixes -- */ + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + if (u->implicit_addr && u->pfx_seg) + mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + /* print the instruction mnemonic */ + mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic)); + + /* operand 1 */ + if (u->operand[0].type != UD_NONE) { + gen_operand(u, &u->operand[0], u->c1); + } + /* operand 2 */ + if (u->operand[1].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[1], u->c2); + } + + /* operand 3 */ + if (u->operand[2].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[2], u->c3); + } +} diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/syn.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,61 @@ +/* ----------------------------------------------------------------------------- + * syn.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +/* ----------------------------------------------------------------------------- + * Intel Register Table - Order Matters (types.h)! + * ----------------------------------------------------------------------------- + */ +const char* ud_reg_tab[] = +{ + "al", "cl", "dl", "bl", + "ah", "ch", "dh", "bh", + "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", + "r12b", "r13b", "r14b", "r15b", + + "ax", "cx", "dx", "bx", + "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", + "r12w", "r13W" , "r14w", "r15w", + + "eax", "ecx", "edx", "ebx", + "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", + "r12d", "r13d", "r14d", "r15d", + + "rax", "rcx", "rdx", "rbx", + "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", + "r12", "r13", "r14", "r15", + + "es", "cs", "ss", "ds", + "fs", "gs", + + "cr0", "cr1", "cr2", "cr3", + "cr4", "cr5", "cr6", "cr7", + "cr8", "cr9", "cr10", "cr11", + "cr12", "cr13", "cr14", "cr15", + + "dr0", "dr1", "dr2", "dr3", + "dr4", "dr5", "dr6", "dr7", + "dr8", "dr9", "dr10", "dr11", + "dr12", "dr13", "dr14", "dr15", + + "mm0", "mm1", "mm2", "mm3", + "mm4", "mm5", "mm6", "mm7", + + "st0", "st1", "st2", "st3", + "st4", "st5", "st6", "st7", + + "xmm0", "xmm1", "xmm2", "xmm3", + "xmm4", "xmm5", "xmm6", "xmm7", + "xmm8", "xmm9", "xmm10", "xmm11", + "xmm12", "xmm13", "xmm14", "xmm15", + + "rip" +}; diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/syn.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,27 @@ +/* ----------------------------------------------------------------------------- + * syn.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_SYN_H +#define UD_SYN_H + +#if 0 +#include +#include +#endif +#include "types.h" + +extern const char* ud_reg_tab[]; + +static void mkasm(struct ud* u, const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + u->insn_fill += vsnprintf((char*) u->insn_buffer + u->insn_fill, 64, fmt, ap); + va_end(ap); +} + +#endif diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/types.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/types.h Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,186 @@ +/* ----------------------------------------------------------------------------- + * types.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_TYPES_H +#define UD_TYPES_H + + +#include "../../include/kdbinc.h" + +#define FMT64 "%ll" +#include "itab.h" + +/* ----------------------------------------------------------------------------- + * All possible "types" of objects in udis86. Order is Important! + * ----------------------------------------------------------------------------- + */ +enum ud_type +{ + UD_NONE, + + /* 8 bit GPRs */ + UD_R_AL, UD_R_CL, UD_R_DL, UD_R_BL, + UD_R_AH, UD_R_CH, UD_R_DH, UD_R_BH, + UD_R_SPL, UD_R_BPL, UD_R_SIL, UD_R_DIL, + UD_R_R8B, UD_R_R9B, UD_R_R10B, UD_R_R11B, + UD_R_R12B, UD_R_R13B, UD_R_R14B, UD_R_R15B, + + /* 16 bit GPRs */ + UD_R_AX, UD_R_CX, UD_R_DX, UD_R_BX, + UD_R_SP, UD_R_BP, UD_R_SI, UD_R_DI, + UD_R_R8W, UD_R_R9W, UD_R_R10W, UD_R_R11W, + UD_R_R12W, UD_R_R13W, UD_R_R14W, UD_R_R15W, + + /* 32 bit GPRs */ + UD_R_EAX, UD_R_ECX, UD_R_EDX, UD_R_EBX, + UD_R_ESP, UD_R_EBP, UD_R_ESI, UD_R_EDI, + UD_R_R8D, UD_R_R9D, UD_R_R10D, UD_R_R11D, + UD_R_R12D, UD_R_R13D, UD_R_R14D, UD_R_R15D, + + /* 64 bit GPRs */ + UD_R_RAX, UD_R_RCX, UD_R_RDX, UD_R_RBX, + UD_R_RSP, UD_R_RBP, UD_R_RSI, UD_R_RDI, + UD_R_R8, UD_R_R9, UD_R_R10, UD_R_R11, + UD_R_R12, UD_R_R13, UD_R_R14, UD_R_R15, + + /* segment registers */ + UD_R_ES, UD_R_CS, UD_R_SS, UD_R_DS, + UD_R_FS, UD_R_GS, + + /* control registers*/ + UD_R_CR0, UD_R_CR1, UD_R_CR2, UD_R_CR3, + UD_R_CR4, UD_R_CR5, UD_R_CR6, UD_R_CR7, + UD_R_CR8, UD_R_CR9, UD_R_CR10, UD_R_CR11, + UD_R_CR12, UD_R_CR13, UD_R_CR14, UD_R_CR15, + + /* debug registers */ + UD_R_DR0, UD_R_DR1, UD_R_DR2, UD_R_DR3, + UD_R_DR4, UD_R_DR5, UD_R_DR6, UD_R_DR7, + UD_R_DR8, UD_R_DR9, UD_R_DR10, UD_R_DR11, + UD_R_DR12, UD_R_DR13, UD_R_DR14, UD_R_DR15, + + /* mmx registers */ + UD_R_MM0, UD_R_MM1, UD_R_MM2, UD_R_MM3, + UD_R_MM4, UD_R_MM5, UD_R_MM6, UD_R_MM7, + + /* x87 registers */ + UD_R_ST0, UD_R_ST1, UD_R_ST2, UD_R_ST3, + UD_R_ST4, UD_R_ST5, UD_R_ST6, UD_R_ST7, + + /* extended multimedia registers */ + UD_R_XMM0, UD_R_XMM1, UD_R_XMM2, UD_R_XMM3, + UD_R_XMM4, UD_R_XMM5, UD_R_XMM6, UD_R_XMM7, + UD_R_XMM8, UD_R_XMM9, UD_R_XMM10, UD_R_XMM11, + UD_R_XMM12, UD_R_XMM13, UD_R_XMM14, UD_R_XMM15, + + UD_R_RIP, + + /* Operand Types */ + UD_OP_REG, UD_OP_MEM, UD_OP_PTR, UD_OP_IMM, + UD_OP_JIMM, UD_OP_CONST +}; + +/* ----------------------------------------------------------------------------- + * struct ud_operand - Disassembled instruction Operand. + * ----------------------------------------------------------------------------- + */ +struct ud_operand +{ + enum ud_type type; + uint8_t size; + union { + int8_t sbyte; + uint8_t ubyte; + int16_t sword; + uint16_t uword; + int32_t sdword; + uint32_t udword; + int64_t sqword; + uint64_t uqword; + + struct { + uint16_t seg; + uint32_t off; + } ptr; + } lval; + + enum ud_type base; + enum ud_type index; + uint8_t offset; + uint8_t scale; +}; + +/* ----------------------------------------------------------------------------- + * struct ud - The udis86 object. + * ----------------------------------------------------------------------------- + */ +struct ud +{ + int (*inp_hook) (struct ud*); + uint8_t inp_curr; + uint8_t inp_fill; + uint8_t inp_ctr; + uint8_t* inp_buff; + uint8_t* inp_buff_end; + uint8_t inp_end; + void (*translator)(struct ud*); + uint64_t insn_offset; + char insn_hexcode[32]; + char insn_buffer[64]; + unsigned int insn_fill; + uint8_t dis_mode; + uint64_t pc; + uint8_t vendor; + struct map_entry* mapen; + enum ud_mnemonic_code mnemonic; + struct ud_operand operand[3]; + uint8_t error; + uint8_t pfx_rex; + uint8_t pfx_seg; + uint8_t pfx_opr; + uint8_t pfx_adr; + uint8_t pfx_lock; + uint8_t pfx_rep; + uint8_t pfx_repe; + uint8_t pfx_repne; + uint8_t pfx_insn; + uint8_t default64; + uint8_t opr_mode; + uint8_t adr_mode; + uint8_t br_far; + uint8_t br_near; + uint8_t implicit_addr; + uint8_t c1; + uint8_t c2; + uint8_t c3; + uint8_t inp_cache[256]; + uint8_t inp_sess[64]; + struct ud_itab_entry * itab_entry; +}; + +/* ----------------------------------------------------------------------------- + * Type-definitions + * ----------------------------------------------------------------------------- + */ +typedef enum ud_type ud_type_t; +typedef enum ud_mnemonic_code ud_mnemonic_code_t; + +typedef struct ud ud_t; +typedef struct ud_operand ud_operand_t; + +#define UD_SYN_INTEL ud_translate_intel +#define UD_SYN_ATT ud_translate_att +#define UD_EOI -1 +#define UD_INP_CACHE_SZ 32 +#define UD_VENDOR_AMD 0 +#define UD_VENDOR_INTEL 1 + +#define bail_out(ud,error_code) longjmp( (ud)->bailout, error_code ) +#define try_decode(ud) if ( setjmp( (ud)->bailout ) == 0 ) +#define catch_error() else + +#endif diff -r 54c8c9eaee92 xen/kdb/x86/udis86-1.7/udis86.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/udis86.c Wed Jun 06 14:17:11 2012 -0700 @@ -0,0 +1,156 @@ +/* ----------------------------------------------------------------------------- + * udis86.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#include +#endif + +#include "input.h" +#include "extern.h" + +/* ============================================================================= + * ud_init() - Initializes ud_t object. + * ============================================================================= + */ +extern void +ud_init(struct ud* u) +{ + memset((void*)u, 0, sizeof(struct ud)); + ud_set_mode(u, 16); + u->mnemonic = UD_Iinvalid; + ud_set_pc(u, 0); +#ifndef __UD_STANDALONE__ + ud_set_input_file(u, stdin); +#endif /* __UD_STANDALONE__ */ +} + +/* ============================================================================= + * ud_disassemble() - disassembles one instruction and returns the number of + * bytes disassembled. A zero means end of disassembly. + * ============================================================================= + */ +extern unsigned int +ud_disassemble(struct ud* u) +{ + if (ud_input_end(u)) + return 0; + + + u->insn_buffer[0] = u->insn_hexcode[0] = 0; + + + if (ud_decode(u) == 0) + return 0; + if (u->translator) + u->translator(u); + return ud_insn_len(u); +} + +/* ============================================================================= + * ud_set_mode() - Set Disassemly Mode. + * ============================================================================= + */ +extern void +ud_set_mode(struct ud* u, uint8_t m) +{ + switch(m) { + case 16: + case 32: + case 64: u->dis_mode = m ; return; + default: u->dis_mode = 16; return; + } +} + +/* ============================================================================= + * ud_set_vendor() - Set vendor. + * ============================================================================= + */ +extern void +ud_set_vendor(struct ud* u, unsigned v) +{ + switch(v) { + case UD_VENDOR_INTEL: + u->vendor = v; + break; + default: + u->vendor = UD_VENDOR_AMD; + } +} + +/* ============================================================================= + * ud_set_pc() - Sets code origin. + * ============================================================================= + */ +extern void +ud_set_pc(struct ud* u, uint64_t o) +{ + u->pc = o; +} + +/* ============================================================================= + * ud_set_syntax() - Sets the output syntax. + * ============================================================================= + */ +extern void +ud_set_syntax(struct ud* u, void (*t)(struct ud*)) +{ + u->translator = t; +} + +/* ============================================================================= + * ud_insn() - returns the disassembled instruction + * ============================================================================= + */ +extern char* +ud_insn_asm(struct ud* u) +{ + return u->insn_buffer; +} + +/* ============================================================================= + * ud_insn_offset() - Returns the offset. + * ============================================================================= + */ +extern uint64_t +ud_insn_off(struct ud* u) +{ + return u->insn_offset; +} + + +/* ============================================================================= + * ud_insn_hex() - Returns hex form of disassembled instruction. + * ============================================================================= + */ +extern char* +ud_insn_hex(struct ud* u) +{ + return u->insn_hexcode; +} + +/* ============================================================================= + * ud_insn_ptr() - Returns code disassembled. + * ============================================================================= + */ +extern uint8_t* +ud_insn_ptr(struct ud* u) +{ + return u->inp_sess; +} + +/* ============================================================================= + * ud_insn_len() - Returns the count of bytes disassembled. + * ============================================================================= + */ +extern unsigned int +ud_insn_len(struct ud* u) +{ + return u->inp_ctr; +} --MP_/61SL/dFgoelVIa2N/5RWWnn Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --MP_/61SL/dFgoelVIa2N/5RWWnn-- From xen-devel-bounces@lists.xen.org Thu Jun 07 17:29:00 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 Jun 2012 17:29:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ScgVt-0005Hr-ER; Thu, 07 Jun 2012 17:28:49 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ScgVr-0005Hj-Qq for xen-devel@lists.xensource.com; Thu, 07 Jun 2012 17:28:48 +0000 Received: from [193.109.254.147:15044] by server-3.bemta-14.messagelabs.com id 36/16-05653-FC4E0DF4; Thu, 07 Jun 2012 17:28:47 +0000 X-Env-Sender: konrad.wilk@oracle.com X-Msg-Ref: server-3.tower-27.messagelabs.com!1339090124!8704413!1 X-Originating-IP: [148.87.113.117] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTQ4Ljg3LjExMy4xMTcgPT4gNTc1NTMy\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10652 invoked from network); 7 Jun 2012 17:28:46 -0000 Received: from rcsinet15.oracle.com (HELO rcsinet15.oracle.com) (148.87.113.117) by server-3.tower-27.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 7 Jun 2012 17:28:46 -0000 Received: from acsinet22.oracle.com (acsinet22.oracle.com [141.146.126.238]) by rcsinet15.oracle.com (Sentrion-MTA-4.2.2/Sentrion-MTA-4.2.2) with ESMTP id q57HRet7023761 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 7 Jun 2012 17:27:41 GMT Received: from acsmt356.oracle.com (acsmt356.oracle.com [141.146.40.156]) by acsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id q57HRdwZ006224 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 7 Jun 2012 17:27:39 GMT Received: from abhmt119.oracle.com (abhmt119.oracle.com [141.146.116.71]) by acsmt356.oracle.com (8.12.11.20060308/8.12.11) with ESMTP id q57HRcF6018180; Thu, 7 Jun 2012 12:27:38 -0500 Received: from phenom.dumpdata.com (/209.6.85.33) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 07 Jun 2012 10:27:38 -0700 Received: by phenom.dumpdata.com (Postfix, from userid 1000) id 1221A4030D; Thu, 7 Jun 2012 13:20:40 -0400 (EDT) Date: Thu, 7 Jun 2012 13:20:40 -0400 From: Konrad Rzeszutek Wilk To: "Liu, Jinsong" Message-ID: <20120607172039.GR9472@phenom.dumpdata.com> References: <20120606205523.GA10891@phenom.dumpdata.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-Source-IP: acsinet22.oracle.com [141.146.126.238] Cc: "Luck, Tony" , "'xen-devel@lists.xensource.com'" , Borislav Petkov , "'linux-kernel@vger.kernel.org'" Subject: Re: [Xen-devel] [PATCH 1/2] xen/mce: Add mcelog support for Xen platform X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org On Thu, Jun 07, 2012 at 06:45:39AM +0000, Liu, Jinsong wrote: > Konrad Rzeszutek Wilk wrote: > > On Thu, May 31, 2012 at 12:57:44PM +0000, Liu, Jinsong wrote: > >>> From 1a7951d6ca01d7f2c9dd2bdb6de5f8e7fdcb8bbd Mon Sep 17 00:00:00 > >>> 2001 > >> From: root > >> Date: Fri, 1 Jun 2012 03:12:51 +0800 > >> Subject: [PATCH 1/2] xen/mce: Add mcelog support for Xen platform > >> > >> When MCA error occurs, it would be handled by Xen hypervisor first, > >> and then the error information would be sent to initial domain for > >> logging. > >> > >> This patch gets error information from Xen hypervisor and convert > >> Xen format error into Linux format mcelog. This logic is basically > >> self-contained, not touching other kernel components. > >> > >> By using tools like mcelog tool users could read specific error > >> information, like what they did under native Linux. > >> > >> To test follow directions outlined in > >> Documentation/acpi/apei/einj.txt > > > > [ 53.264610] switch: port 1(eth0) entered forwarding state > > [ 1058.051938] BUG: sleeping function called from invalid context at > > /home/konrad/linux/include/linux/kernel.h:199 [ 1058.052066] > > in_atomic(): 1, irqs_disabled(): 0, pid: 4552, name: mcelog [ > > 1058.052130] Pid: 4552, comm: mcelog Tainted: G O > > 3.5.0-rc1upstream-00041-ga16e594-dirty #2 [ 1058.052235] Call Trace: > > [ 1058.052291] [] __might_sleep+0xda/0x100 [ > > 1058.052349] [] xen_mce_chrdev_read+0xab/0x140 [ > > 1058.052408] [] vfs_read+0xc5/0x190 [ 1058.052461] > > [] sys_read+0x4c/0x90 [ 1058.052515] > > [] system_call_fastpath+0x16/0x1 > > > > ? > > I will debug it. Would you tell me the steps to reproduce the bug, and your .config file? # echo 0x00000008 > error_type # echo 1 > error_inject (XEN) CMCI: send CMCI to DOM0 through virq [ 214.207962] BUG: sleeping function called from invalid context at /home/konradinux/kernel.h:199 [ 214.208129] in_atomic(): 1, irqs_disabled(): 0, pid: 4581, name: mcelog [ 214.208242] Pid: 4581, comm: mcelog Tainted: G O 3.5.0-rc1upstream-00003-g149000b-dirty #1 # [ 214.208384] Call Trace: [ 214.208490] [] __might_sleep+0xda/0x100 [ 214.208606] [] xen_mce_chrdev_read+0xab/0x140 [ 214.208715] [] vfs_read+0xc5/0x190 [ 214.208816] [] sys_read+0x4c/0x90 [ 214.208923] [] system_call_fastpath+0x16/0x1b > (Some issue w/ my email box this morning, just notice this) # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 3.5.0-rc1 Kernel Configuration # CONFIG_64BIT=y # CONFIG_X86_32 is not set CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_MMU=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_HWEIGHT=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y # CONFIG_RWSEM_GENERIC_SPINLOCK is not set CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_DEFAULT_IDLE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CPU_AUTOPROBE=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ZONE_DMA32=y CONFIG_AUDIT_ARCH=y CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_64_SMP=y CONFIG_X86_HT=y CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" CONFIG_ARCH_CPU_PROBE_RELEASE=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_HAVE_IRQ_WORK=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_EXTABLE_SORT=y # # General setup # CONFIG_EXPERIMENTAL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="" CONFIG_LOCALVERSION="upstream" CONFIG_LOCALVERSION_AUTO=y CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_FHANDLE is not set CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y CONFIG_AUDIT=y CONFIG_AUDITSYSCALL=y CONFIG_AUDIT_WATCH=y CONFIG_AUDIT_TREE=y # CONFIG_AUDIT_LOGINUID_IMMUTABLE is not set CONFIG_HAVE_GENERIC_HARDIRQS=y # # IRQ subsystem # CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_PREEMPT_RCU is not set CONFIG_RCU_FANOUT=64 CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_RCU_FAST_NO_HZ is not set # CONFIG_TREE_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y CONFIG_CGROUPS=y # CONFIG_CGROUP_DEBUG is not set CONFIG_CGROUP_FREEZER=y # CONFIG_CGROUP_DEVICE is not set CONFIG_CPUSETS=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_CPUACCT=y CONFIG_RESOURCE_COUNTERS=y # CONFIG_CGROUP_MEM_RES_CTLR is not set # CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_CFS_BANDWIDTH is not set CONFIG_RT_GROUP_SCHED=y # CONFIG_BLK_CGROUP is not set # CONFIG_CHECKPOINT_RESTORE is not set CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_IPC_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_SCHED_AUTOGROUP=y CONFIG_SYSFS_DEPRECATED=y # CONFIG_SYSFS_DEPRECATED_V2 is not set # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_ROOT_UID=0 CONFIG_INITRAMFS_ROOT_GID=0 CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y # CONFIG_INITRAMFS_COMPRESSION_NONE is not set CONFIG_INITRAMFS_COMPRESSION_GZIP=y # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set # CONFIG_INITRAMFS_COMPRESSION_XZ is not set # CONFIG_INITRAMFS_COMPRESSION_LZO is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_ANON_INODES=y # CONFIG_EXPERT is not set CONFIG_UID16=y # CONFIG_SYSCTL_SYSCALL is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set CONFIG_VM_EVENT_COUNTERS=y CONFIG_PCI_QUIRKS=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y # CONFIG_SLUB is not set CONFIG_PROFILING=y CONFIG_OPROFILE=m # CONFIG_OPROFILE_EVENT_MULTIPLEX is not set CONFIG_HAVE_OPROFILE=y CONFIG_OPROFILE_NMI_TIMER=y CONFIG_KPROBES=y CONFIG_JUMP_LABEL=y CONFIG_OPTPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_KRETPROBES=y CONFIG_USER_RETURN_NOTIFIER=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_USE_GENERIC_SMP_HELPERS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set CONFIG_OSF_PARTITION=y CONFIG_AMIGA_PARTITION=y # CONFIG_ATARI_PARTITION is not set CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y CONFIG_MINIX_SUBPARTITION=y CONFIG_SOLARIS_X86_PARTITION=y CONFIG_UNIXWARE_DISKLABEL=y # CONFIG_LDM_PARTITION is not set CONFIG_SGI_PARTITION=y # CONFIG_ULTRIX_PARTITION is not set CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set CONFIG_BLOCK_COMPAT=y # # IO Schedulers # CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" CONFIG_PREEMPT_NOTIFIERS=y # CONFIG_INLINE_SPIN_TRYLOCK is not set # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK is not set # CONFIG_INLINE_SPIN_LOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK_IRQ is not set # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set # CONFIG_INLINE_SPIN_UNLOCK_BH is not set CONFIG_INLINE_SPIN_UNLOCK_IRQ=y # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_READ_TRYLOCK is not set # CONFIG_INLINE_READ_LOCK is not set # CONFIG_INLINE_READ_LOCK_BH is not set # CONFIG_INLINE_READ_LOCK_IRQ is not set # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set CONFIG_INLINE_READ_UNLOCK=y # CONFIG_INLINE_READ_UNLOCK_BH is not set CONFIG_INLINE_READ_UNLOCK_IRQ=y # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_WRITE_TRYLOCK is not set # CONFIG_INLINE_WRITE_LOCK is not set # CONFIG_INLINE_WRITE_LOCK_BH is not set # CONFIG_INLINE_WRITE_LOCK_IRQ is not set # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set CONFIG_INLINE_WRITE_UNLOCK=y # CONFIG_INLINE_WRITE_UNLOCK_BH is not set CONFIG_INLINE_WRITE_UNLOCK_IRQ=y # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_FREEZER=y # # Processor type and features # CONFIG_ZONE_DMA=y CONFIG_SMP=y CONFIG_X86_MPPARSE=y # CONFIG_X86_EXTENDED_PLATFORM is not set CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_PARAVIRT_GUEST=y # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_XEN=y CONFIG_XEN_DOM0=y CONFIG_XEN_PRIVILEGED_GUEST=y CONFIG_XEN_PVHVM=y CONFIG_XEN_MAX_DOMAIN_MEMORY=500 CONFIG_XEN_SAVE_RESTORE=y # CONFIG_XEN_DEBUG_FS is not set CONFIG_KVM_CLOCK=y CONFIG_KVM_GUEST=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_PARAVIRT_DEBUG is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y CONFIG_GART_IOMMU=y CONFIG_CALGARY_IOMMU=y CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y CONFIG_SWIOTLB=y CONFIG_IOMMU_HELPER=y # CONFIG_MAXSMP is not set CONFIG_NR_CPUS=512 CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=y CONFIG_X86_THERMAL_VECTOR=y # CONFIG_I8K is not set CONFIG_MICROCODE=y CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_AMD=y CONFIG_MICROCODE_OLD_INTERFACE=y CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_ARCH_PHYS_ADDR_T_64BIT=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DIRECT_GBPAGES=y CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y CONFIG_NODES_SPAN_OTHER_NODES=y # CONFIG_NUMA_EMU is not set CONFIG_NODES_SHIFT=6 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_NEED_MULTIPLE_NODES=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_HAVE_MEMBLOCK=y CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_ARCH_DISCARD_MEMBLOCK=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_COMPACTION=y CONFIG_MIGRATION=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y CONFIG_MMU_NOTIFIER=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y # CONFIG_MEMORY_FAILURE is not set # CONFIG_TRANSPARENT_HUGEPAGE is not set CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y CONFIG_X86_CHECK_BIOS_CORRUPTION=y CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_ARCH_RANDOM=y CONFIG_EFI=y # CONFIG_EFI_STUB is not set CONFIG_SECCOMP=y # CONFIG_CC_STACKPROTECTOR is not set # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 CONFIG_SCHED_HRTICK=y CONFIG_KEXEC=y CONFIG_CRASH_DUMP=y # CONFIG_KEXEC_JUMP is not set CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y # CONFIG_COMPAT_VDSO is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y # # Power management and ACPI options # CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set # CONFIG_PM_RUNTIME is not set CONFIG_PM=y CONFIG_PM_DEBUG=y # CONFIG_PM_ADVANCED_DEBUG is not set # CONFIG_PM_TEST_SUSPEND is not set CONFIG_CAN_PM_TRACE=y CONFIG_PM_TRACE=y CONFIG_PM_TRACE_RTC=y CONFIG_ACPI=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_PROCFS=y # CONFIG_ACPI_PROCFS_POWER is not set # CONFIG_ACPI_EC_DEBUGFS is not set CONFIG_ACPI_PROC_EVENT=y CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=m CONFIG_ACPI_FAN=y CONFIG_ACPI_DOCK=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=m CONFIG_ACPI_THERMAL=y CONFIG_ACPI_NUMA=y # CONFIG_ACPI_CUSTOM_DSDT is not set CONFIG_ACPI_BLACKLIST_YEAR=0 CONFIG_ACPI_DEBUG=y # CONFIG_ACPI_DEBUG_FUNC_TRACE is not set # CONFIG_ACPI_PCI_SLOT is not set CONFIG_X86_PM_TIMER=y CONFIG_ACPI_CONTAINER=y # CONFIG_ACPI_SBS is not set CONFIG_ACPI_HED=y # CONFIG_ACPI_CUSTOM_METHOD is not set # CONFIG_ACPI_BGRT is not set CONFIG_ACPI_APEI=y CONFIG_ACPI_APEI_GHES=y CONFIG_ACPI_APEI_PCIEAER=y CONFIG_ACPI_APEI_EINJ=y # CONFIG_ACPI_APEI_ERST_DEBUG is not set # CONFIG_SFI is not set # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y # CONFIG_CPU_FREQ_STAT is not set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_GOV_USERSPACE is not set CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set # # x86 CPU frequency scaling drivers # # CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_ACPI_CPUFREQ=m CONFIG_X86_POWERNOW_K8=m CONFIG_X86_SPEEDSTEP_CENTRINO=m CONFIG_X86_P4_CLOCKMOD=m # # shared options # CONFIG_X86_SPEEDSTEP_LIB=m CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_INTEL_IDLE is not set # # Memory power savings # # CONFIG_I7300_IDLE is not set # # Bus options (PCI etc.) # CONFIG_PCI=y CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_PCI_XEN=y CONFIG_PCI_DOMAINS=y # CONFIG_PCI_CNB20LE_QUIRK is not set CONFIG_PCIEPORTBUS=y # CONFIG_HOTPLUG_PCI_PCIE is not set CONFIG_PCIEAER=y CONFIG_PCIE_ECRC=y # CONFIG_PCIEAER_INJECT is not set CONFIG_PCIEASPM=y # CONFIG_PCIEASPM_DEBUG is not set CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIEASPM_POWERSAVE is not set # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_PCI_MSI=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set # CONFIG_PCI_STUB is not set CONFIG_XEN_PCIDEV_FRONTEND=y CONFIG_HT_IRQ=y CONFIG_PCI_ATS=y CONFIG_PCI_IOV=y CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y # CONFIG_PCI_IOAPIC is not set CONFIG_PCI_LABEL=y CONFIG_ISA_DMA_API=y CONFIG_AMD_NB=y CONFIG_PCCARD=y CONFIG_PCMCIA=y CONFIG_PCMCIA_LOAD_CIS=y CONFIG_CARDBUS=y # # PC-card bridges # CONFIG_YENTA=y CONFIG_YENTA_O2=y CONFIG_YENTA_RICOH=y CONFIG_YENTA_TI=y CONFIG_YENTA_ENE_TUNE=y CONFIG_YENTA_TOSHIBA=y # CONFIG_PD6729 is not set # CONFIG_I82092 is not set CONFIG_PCCARD_NONSTATIC=y CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_FAKE is not set # CONFIG_HOTPLUG_PCI_ACPI is not set # CONFIG_HOTPLUG_PCI_CPCI is not set # CONFIG_HOTPLUG_PCI_SHPC is not set # CONFIG_RAPIDIO is not set # # Executable file formats / Emulations # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y # CONFIG_HAVE_AOUT is not set CONFIG_BINFMT_MISC=y CONFIG_IA32_EMULATION=y # CONFIG_IA32_AOUT is not set # CONFIG_X86_X32 is not set CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y CONFIG_SYSVIPC_COMPAT=y CONFIG_KEYS_COMPAT=y CONFIG_HAVE_TEXT_POKE_SMP=y CONFIG_X86_DEV_DMA_OPS=y CONFIG_NET=y # # Networking options # CONFIG_PACKET=y CONFIG_UNIX=y # CONFIG_UNIX_DIAG is not set CONFIG_XFRM=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y # CONFIG_IP_FIB_TRIE_STATS is not set CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE_DEMUX is not set CONFIG_IP_MROUTE=y # CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y # CONFIG_ARPD is not set CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set CONFIG_INET_TUNNEL=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set CONFIG_INET_LRO=y # CONFIG_INET_DIAG is not set CONFIG_TCP_CONG_ADVANCED=y # CONFIG_TCP_CONG_BIC is not set CONFIG_TCP_CONG_CUBIC=y # CONFIG_TCP_CONG_WESTWOOD is not set # CONFIG_TCP_CONG_HTCP is not set # CONFIG_TCP_CONG_HSTCP is not set # CONFIG_TCP_CONG_HYBLA is not set # CONFIG_TCP_CONG_VEGAS is not set # CONFIG_TCP_CONG_SCALABLE is not set # CONFIG_TCP_CONG_LP is not set # CONFIG_TCP_CONG_VENO is not set # CONFIG_TCP_CONG_YEAH is not set # CONFIG_TCP_CONG_ILLINOIS is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y # CONFIG_IPV6_PRIVACY is not set # CONFIG_IPV6_ROUTER_PREF is not set # CONFIG_IPV6_OPTIMISTIC_DAD is not set CONFIG_INET6_AH=y CONFIG_INET6_ESP=y # CONFIG_INET6_IPCOMP is not set # CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set CONFIG_INET6_XFRM_MODE_TRANSPORT=y CONFIG_INET6_XFRM_MODE_TUNNEL=y CONFIG_INET6_XFRM_MODE_BEET=y # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set CONFIG_IPV6_SIT=y # CONFIG_IPV6_SIT_6RD is not set CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set # CONFIG_IPV6_MULTIPLE_TABLES is not set # CONFIG_IPV6_MROUTE is not set CONFIG_NETLABEL=y CONFIG_NETWORK_SECMARK=y # CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set # CONFIG_NETFILTER_ADVANCED is not set # # Core Netfilter Configuration # CONFIG_NETFILTER_NETLINK=y CONFIG_NETFILTER_NETLINK_LOG=y CONFIG_NF_CONNTRACK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_FTP=y CONFIG_NF_CONNTRACK_IRC=y # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set CONFIG_NF_CONNTRACK_SIP=y CONFIG_NF_CT_NETLINK=y CONFIG_NETFILTER_XTABLES=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y CONFIG_NETFILTER_XT_TARGET_LOG=m CONFIG_NETFILTER_XT_TARGET_NFLOG=y CONFIG_NETFILTER_XT_TARGET_SECMARK=y CONFIG_NETFILTER_XT_TARGET_TCPMSS=y # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y CONFIG_NETFILTER_XT_MATCH_POLICY=y CONFIG_NETFILTER_XT_MATCH_STATE=y # CONFIG_IP_SET is not set # CONFIG_IP_VS is not set # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=y CONFIG_NF_CONNTRACK_IPV4=y CONFIG_NF_CONNTRACK_PROC_COMPAT=y CONFIG_IP_NF_IPTABLES=y CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y CONFIG_IP_NF_TARGET_ULOG=y CONFIG_NF_NAT=y CONFIG_NF_NAT_NEEDED=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_NF_NAT_FTP=y CONFIG_NF_NAT_IRC=y # CONFIG_NF_NAT_TFTP is not set # CONFIG_NF_NAT_AMANDA is not set # CONFIG_NF_NAT_PPTP is not set # CONFIG_NF_NAT_H323 is not set CONFIG_NF_NAT_SIP=y CONFIG_IP_NF_MANGLE=y # CONFIG_IP_NF_RAW is not set # # IPv6: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV6=y CONFIG_NF_CONNTRACK_IPV6=y CONFIG_IP6_NF_IPTABLES=y CONFIG_IP6_NF_MATCH_IPV6HEADER=y CONFIG_IP6_NF_FILTER=y CONFIG_IP6_NF_TARGET_REJECT=y CONFIG_IP6_NF_MANGLE=y # CONFIG_IP6_NF_RAW is not set # CONFIG_BRIDGE_NF_EBTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_L2TP is not set CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set CONFIG_LLC=y # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_WAN_ROUTER is not set # CONFIG_PHONET is not set # CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y # # Queueing/Scheduling # # CONFIG_NET_SCH_CBQ is not set # CONFIG_NET_SCH_HTB is not set # CONFIG_NET_SCH_HFSC is not set # CONFIG_NET_SCH_PRIO is not set # CONFIG_NET_SCH_MULTIQ is not set # CONFIG_NET_SCH_RED is not set # CONFIG_NET_SCH_SFB is not set # CONFIG_NET_SCH_SFQ is not set # CONFIG_NET_SCH_TEQL is not set # CONFIG_NET_SCH_TBF is not set # CONFIG_NET_SCH_GRED is not set # CONFIG_NET_SCH_DSMARK is not set # CONFIG_NET_SCH_NETEM is not set # CONFIG_NET_SCH_DRR is not set # CONFIG_NET_SCH_MQPRIO is not set # CONFIG_NET_SCH_CHOKE is not set # CONFIG_NET_SCH_QFQ is not set # CONFIG_NET_SCH_CODEL is not set # CONFIG_NET_SCH_FQ_CODEL is not set # CONFIG_NET_SCH_INGRESS is not set # CONFIG_NET_SCH_PLUG is not set # # Classification # CONFIG_NET_CLS=y # CONFIG_NET_CLS_BASIC is not set # CONFIG_NET_CLS_TCINDEX is not set # CONFIG_NET_CLS_ROUTE4 is not set # CONFIG_NET_CLS_FW is not set # CONFIG_NET_CLS_U32 is not set # CONFIG_NET_CLS_RSVP is not set # CONFIG_NET_CLS_RSVP6 is not set # CONFIG_NET_CLS_FLOW is not set # CONFIG_NET_CLS_CGROUP is not set CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 # CONFIG_NET_EMATCH_CMP is not set # CONFIG_NET_EMATCH_NBYTE is not set # CONFIG_NET_EMATCH_U32 is not set # CONFIG_NET_EMATCH_META is not set # CONFIG_NET_EMATCH_TEXT is not set CONFIG_NET_CLS_ACT=y # CONFIG_NET_ACT_POLICE is not set # CONFIG_NET_ACT_GACT is not set # CONFIG_NET_ACT_MIRRED is not set # CONFIG_NET_ACT_IPT is not set # CONFIG_NET_ACT_NAT is not set # CONFIG_NET_ACT_PEDIT is not set # CONFIG_NET_ACT_SIMP is not set # CONFIG_NET_ACT_SKBEDIT is not set # CONFIG_NET_ACT_CSUM is not set CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=y # CONFIG_BATMAN_ADV is not set # CONFIG_OPENVSWITCH is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # CONFIG_NETPRIO_CGROUP is not set CONFIG_BQL=y # CONFIG_BPF_JIT is not set # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_NET_TCPPROBE is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y # CONFIG_WIRELESS is not set # CONFIG_WIMAX is not set CONFIG_RFKILL=y CONFIG_RFKILL_INPUT=y # CONFIG_NET_9P is not set # CONFIG_CAIF is not set # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set CONFIG_HAVE_BPF_JIT=y # # Device Drivers # # # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set CONFIG_DEBUG_DEVRES=y CONFIG_SYS_HYPERVISOR=y # CONFIG_GENERIC_CPU_DEVICES is not set CONFIG_DMA_SHARED_BUFFER=y CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set # CONFIG_PARPORT is not set CONFIG_PNP=y CONFIG_PNP_DEBUG_MESSAGES=y # # Protocols # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_NVME is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=16384 # CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_XEN_BLKDEV_FRONTEND=m CONFIG_XEN_BLKDEV_BACKEND=y CONFIG_VIRTIO_BLK=m # CONFIG_BLK_DEV_HD is not set # CONFIG_BLK_DEV_RBD is not set # # Misc devices # # CONFIG_SENSORS_LIS3LV02D is not set # CONFIG_AD525X_DPOT is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set # CONFIG_INTEL_MID_PTI is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_HP_ILO is not set # CONFIG_APDS9802ALS is not set # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_SENSORS_BH1780 is not set # CONFIG_SENSORS_BH1770 is not set # CONFIG_SENSORS_APDS990X is not set # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set # CONFIG_VMWARE_BALLOON is not set # CONFIG_BMP085_I2C is not set # CONFIG_PCH_PHUB is not set # CONFIG_USB_SWITCH_FSA9480 is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_CB710_CORE is not set # # Texas Instruments shared transport line discipline # # CONFIG_SENSORS_LIS3_I2C is not set # # Altera FPGA firmware download module # # CONFIG_ALTERA_STAPL is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # CONFIG_SCSI_MOD=m CONFIG_RAID_ATTRS=m CONFIG_SCSI=m CONFIG_SCSI_DMA=y CONFIG_SCSI_TGT=m CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_ST=m CONFIG_CHR_DEV_OSST=m CONFIG_BLK_DEV_SR=m CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SCH=m CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_FC_TGT_ATTRS=y CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_HOST_SMP=y # CONFIG_SCSI_SRP_ATTRS is not set CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=m CONFIG_ISCSI_BOOT_SYSFS=m # CONFIG_SCSI_CXGB3_ISCSI is not set # CONFIG_SCSI_CXGB4_ISCSI is not set # CONFIG_SCSI_BNX2_ISCSI is not set # CONFIG_SCSI_BNX2X_FCOE is not set # CONFIG_BE2ISCSI is not set CONFIG_BLK_DEV_3W_XXXX_RAID=m # CONFIG_SCSI_HPSA is not set CONFIG_SCSI_3W_9XXX=m # CONFIG_SCSI_3W_SAS is not set CONFIG_SCSI_ACARD=m CONFIG_SCSI_AACRAID=m CONFIG_SCSI_AIC7XXX=m CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 CONFIG_AIC7XXX_RESET_DELAY_MS=15000 CONFIG_AIC7XXX_DEBUG_ENABLE=y CONFIG_AIC7XXX_DEBUG_MASK=0 CONFIG_AIC7XXX_REG_PRETTY_PRINT=y CONFIG_SCSI_AIC7XXX_OLD=m CONFIG_SCSI_AIC79XX=m CONFIG_AIC79XX_CMDS_PER_DEVICE=32 CONFIG_AIC79XX_RESET_DELAY_MS=15000 CONFIG_AIC79XX_DEBUG_ENABLE=y CONFIG_AIC79XX_DEBUG_MASK=0 CONFIG_AIC79XX_REG_PRETTY_PRINT=y CONFIG_SCSI_AIC94XX=m # CONFIG_AIC94XX_DEBUG is not set CONFIG_SCSI_MVSAS=m # CONFIG_SCSI_MVSAS_DEBUG is not set # CONFIG_SCSI_MVSAS_TASKLET is not set # CONFIG_SCSI_MVUMI is not set CONFIG_SCSI_DPT_I2O=m CONFIG_SCSI_ADVANSYS=m CONFIG_SCSI_ARCMSR=m CONFIG_MEGARAID_NEWGEN=y CONFIG_MEGARAID_MM=m CONFIG_MEGARAID_MAILBOX=m CONFIG_MEGARAID_LEGACY=m CONFIG_MEGARAID_SAS=m CONFIG_SCSI_MPT2SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS_LOGGING=y # CONFIG_SCSI_UFSHCD is not set CONFIG_SCSI_HPTIOP=m CONFIG_SCSI_BUSLOGIC=m # CONFIG_VMWARE_PVSCSI is not set CONFIG_LIBFC=m CONFIG_LIBFCOE=m CONFIG_FCOE=m # CONFIG_FCOE_FNIC is not set CONFIG_SCSI_DMX3191D=m CONFIG_SCSI_EATA=m CONFIG_SCSI_EATA_TAGGED_QUEUE=y CONFIG_SCSI_EATA_LINKED_COMMANDS=y CONFIG_SCSI_EATA_MAX_TAGS=16 CONFIG_SCSI_FUTURE_DOMAIN=m CONFIG_SCSI_GDTH=m CONFIG_SCSI_ISCI=m CONFIG_SCSI_IPS=m CONFIG_SCSI_INITIO=m # CONFIG_SCSI_INIA100 is not set CONFIG_SCSI_STEX=m CONFIG_SCSI_SYM53C8XX_2=m CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 CONFIG_SCSI_SYM53C8XX_MMIO=y CONFIG_SCSI_IPR=m # CONFIG_SCSI_IPR_TRACE is not set # CONFIG_SCSI_IPR_DUMP is not set CONFIG_SCSI_QLOGIC_1280=m CONFIG_SCSI_QLA_FC=m # CONFIG_TCM_QLA2XXX is not set # CONFIG_SCSI_QLA_ISCSI is not set CONFIG_SCSI_LPFC=m # CONFIG_SCSI_LPFC_DEBUG_FS is not set CONFIG_SCSI_DC395x=m CONFIG_SCSI_DC390T=m CONFIG_SCSI_DEBUG=m # CONFIG_SCSI_PMCRAID is not set # CONFIG_SCSI_PM8001 is not set CONFIG_SCSI_SRP=m # CONFIG_SCSI_BFA_FC is not set # CONFIG_SCSI_VIRTIO is not set # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=m # CONFIG_ATA_NONSTANDARD is not set CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_ACPI=y CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=m # CONFIG_SATA_AHCI_PLATFORM is not set CONFIG_SATA_INIC162X=m # CONFIG_SATA_ACARD_AHCI is not set CONFIG_SATA_SIL24=m CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # CONFIG_PDC_ADMA=m CONFIG_SATA_QSTOR=m CONFIG_SATA_SX4=m CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # CONFIG_ATA_PIIX=m CONFIG_SATA_MV=m CONFIG_SATA_NV=m CONFIG_SATA_PROMISE=m CONFIG_SATA_SIL=m CONFIG_SATA_SIS=m CONFIG_SATA_SVW=m CONFIG_SATA_ULI=m CONFIG_SATA_VIA=m CONFIG_SATA_VITESSE=m # # PATA SFF controllers with BMDMA # # CONFIG_PATA_ALI is not set # CONFIG_PATA_AMD is not set # CONFIG_PATA_ARASAN_CF is not set # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_ATP867X is not set # CONFIG_PATA_CMD64X is not set # CONFIG_PATA_CS5520 is not set # CONFIG_PATA_CS5530 is not set # CONFIG_PATA_CS5536 is not set # CONFIG_PATA_CYPRESS is not set CONFIG_PATA_EFAR=m # CONFIG_PATA_HPT366 is not set # CONFIG_PATA_HPT37X is not set # CONFIG_PATA_HPT3X2N is not set # CONFIG_PATA_HPT3X3 is not set # CONFIG_PATA_IT8213 is not set # CONFIG_PATA_IT821X is not set # CONFIG_PATA_JMICRON is not set CONFIG_PATA_MARVELL=m # CONFIG_PATA_NETCELL is not set # CONFIG_PATA_NINJA32 is not set # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OLDPIIX is not set # CONFIG_PATA_OPTIDMA is not set # CONFIG_PATA_PDC2027X is not set CONFIG_PATA_PDC_OLD=m CONFIG_PATA_RADISYS=m # CONFIG_PATA_RDC is not set # CONFIG_PATA_SC1200 is not set CONFIG_PATA_SCH=m # CONFIG_PATA_SERVERWORKS is not set # CONFIG_PATA_SIL680 is not set CONFIG_PATA_SIS=m # CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_VIA is not set CONFIG_PATA_WINBOND=m # # PIO-only SFF controllers # # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set CONFIG_PATA_PCMCIA=m # CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # # CONFIG_PATA_ACPI is not set CONFIG_ATA_GENERIC=m CONFIG_PATA_LEGACY=m CONFIG_MD=y CONFIG_BLK_DEV_MD=m CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m # CONFIG_MULTICORE_RAID456 is not set CONFIG_MD_MULTIPATH=m CONFIG_MD_FAULTY=m CONFIG_BLK_DEV_DM=m # CONFIG_DM_DEBUG is not set CONFIG_DM_CRYPT=m CONFIG_DM_SNAPSHOT=m # CONFIG_DM_THIN_PROVISIONING is not set CONFIG_DM_MIRROR=m # CONFIG_DM_RAID is not set # CONFIG_DM_LOG_USERSPACE is not set CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m # CONFIG_DM_MULTIPATH_QL is not set # CONFIG_DM_MULTIPATH_ST is not set CONFIG_DM_DELAY=m # CONFIG_DM_UEVENT is not set # CONFIG_DM_FLAKEY is not set # CONFIG_DM_VERITY is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m CONFIG_TCM_PSCSI=m CONFIG_LOOPBACK_TARGET=m CONFIG_TCM_FC=m CONFIG_ISCSI_TARGET=m CONFIG_FUSION=y CONFIG_FUSION_SPI=m CONFIG_FUSION_FC=m CONFIG_FUSION_SAS=m CONFIG_FUSION_MAX_SGE=40 CONFIG_FUSION_CTL=m # CONFIG_FUSION_LOGGING is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set # CONFIG_FIREWIRE_NOSY is not set # CONFIG_I2O is not set CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set # CONFIG_DUMMY is not set # CONFIG_EQUALIZER is not set # CONFIG_NET_FC is not set CONFIG_MII=m # CONFIG_IFB is not set # CONFIG_NET_TEAM is not set # CONFIG_MACVLAN is not set CONFIG_NETCONSOLE=m # CONFIG_NETCONSOLE_DYNAMIC is not set CONFIG_NETPOLL=y CONFIG_NETPOLL_TRAP=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_TUN=y # CONFIG_VETH is not set CONFIG_VIRTIO_NET=m CONFIG_SUNGEM_PHY=m # CONFIG_ARCNET is not set # # CAIF transport drivers # CONFIG_ETHERNET=y CONFIG_MDIO=m CONFIG_NET_VENDOR_3COM=y # CONFIG_PCMCIA_3C574 is not set # CONFIG_PCMCIA_3C589 is not set CONFIG_VORTEX=m CONFIG_TYPHOON=m CONFIG_NET_VENDOR_ADAPTEC=y # CONFIG_ADAPTEC_STARFIRE is not set CONFIG_NET_VENDOR_ALTEON=y # CONFIG_ACENIC is not set CONFIG_NET_VENDOR_AMD=y # CONFIG_AMD8111_ETH is not set # CONFIG_PCNET32 is not set # CONFIG_PCMCIA_NMCLAN is not set CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL2 is not set # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=m CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set CONFIG_BNX2=m # CONFIG_CNIC is not set CONFIG_TIGON3=y CONFIG_BNX2X=m CONFIG_NET_VENDOR_BROCADE=y # CONFIG_BNA is not set # CONFIG_NET_CALXEDA_XGMAC is not set CONFIG_NET_VENDOR_CHELSIO=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set # CONFIG_CHELSIO_T4 is not set # CONFIG_CHELSIO_T4VF is not set CONFIG_NET_VENDOR_CISCO=y # CONFIG_ENIC is not set # CONFIG_DNET is not set CONFIG_NET_VENDOR_DEC=y CONFIG_NET_TULIP=y # CONFIG_DE2104X is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_WINBOND_840 is not set # CONFIG_DM9102 is not set # CONFIG_ULI526X is not set # CONFIG_PCMCIA_XIRCOM is not set CONFIG_NET_VENDOR_DLINK=y # CONFIG_DL2K is not set # CONFIG_SUNDANCE is not set CONFIG_NET_VENDOR_EMULEX=y # CONFIG_BE2NET is not set CONFIG_NET_VENDOR_EXAR=y # CONFIG_S2IO is not set # CONFIG_VXGE is not set CONFIG_NET_VENDOR_FUJITSU=y # CONFIG_PCMCIA_FMVJ18X is not set CONFIG_NET_VENDOR_HP=y # CONFIG_HP100 is not set CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=m CONFIG_E1000=m CONFIG_E1000E=m CONFIG_IGB=m CONFIG_IGB_DCA=y CONFIG_IGBVF=m CONFIG_IXGB=m # CONFIG_IXGBE is not set CONFIG_IXGBEVF=y CONFIG_NET_VENDOR_I825XX=y # CONFIG_ZNET is not set # CONFIG_IP1000 is not set # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y CONFIG_SKGE=m # CONFIG_SKGE_DEBUG is not set # CONFIG_SKGE_GENESIS is not set CONFIG_SKY2=m # CONFIG_SKY2_DEBUG is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLX4_EN is not set # CONFIG_MLX4_CORE is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851_MLL is not set # CONFIG_KSZ884X_PCI is not set CONFIG_NET_VENDOR_MYRI=y # CONFIG_MYRI10GE is not set # CONFIG_FEALNX is not set CONFIG_NET_VENDOR_NATSEMI=y # CONFIG_NATSEMI is not set # CONFIG_NS83820 is not set CONFIG_NET_VENDOR_8390=y # CONFIG_PCMCIA_AXNET is not set CONFIG_NE2K_PCI=m # CONFIG_PCMCIA_PCNET is not set CONFIG_NET_VENDOR_NVIDIA=y CONFIG_FORCEDETH=y CONFIG_NET_VENDOR_OKI=y # CONFIG_PCH_GBE is not set # CONFIG_ETHOC is not set CONFIG_NET_PACKET_ENGINE=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set CONFIG_NET_VENDOR_QLOGIC=y # CONFIG_QLA3XXX is not set # CONFIG_QLCNIC is not set # CONFIG_QLGE is not set # CONFIG_NETXEN_NIC is not set CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set CONFIG_8139TOO=m # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=m CONFIG_NET_VENDOR_RDC=y # CONFIG_R6040 is not set CONFIG_NET_VENDOR_SEEQ=y # CONFIG_SEEQ8005 is not set CONFIG_NET_VENDOR_SILAN=y CONFIG_SC92031=m CONFIG_NET_VENDOR_SIS=y # CONFIG_SIS900 is not set # CONFIG_SIS190 is not set # CONFIG_SFC is not set CONFIG_NET_VENDOR_SMSC=y # CONFIG_PCMCIA_SMC91C92 is not set # CONFIG_EPIC100 is not set # CONFIG_SMSC9420 is not set CONFIG_NET_VENDOR_STMICRO=y # CONFIG_STMMAC_ETH is not set CONFIG_NET_VENDOR_SUN=y CONFIG_HAPPYMEAL=m CONFIG_SUNGEM=m CONFIG_CASSINI=m # CONFIG_NIU is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set CONFIG_NET_VENDOR_TI=y CONFIG_TLAN=m CONFIG_NET_VENDOR_VIA=y CONFIG_VIA_RHINE=m # CONFIG_VIA_RHINE_MMIO is not set CONFIG_VIA_VELOCITY=m CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set # CONFIG_WIZNET_W5300 is not set CONFIG_NET_VENDOR_XIRCOM=y # CONFIG_PCMCIA_XIRC2PS is not set CONFIG_FDDI=y # CONFIG_DEFXX is not set # CONFIG_SKFP is not set # CONFIG_HIPPI is not set # CONFIG_NET_SB1000 is not set CONFIG_PHYLIB=y # # MII PHY device drivers # # CONFIG_AMD_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_DAVICOM_PHY=m CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m CONFIG_CICADA_PHY=m CONFIG_VITESSE_PHY=m CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m # CONFIG_ICPLUS_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_NATIONAL_PHY is not set # CONFIG_STE10XP is not set # CONFIG_LSI_ET1011C_PHY is not set # CONFIG_MICREL_PHY is not set CONFIG_FIXED_PHY=y # CONFIG_MDIO_BITBANG is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # # USB Network Adapters # # CONFIG_USB_CATC is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set # CONFIG_USB_USBNET is not set # CONFIG_USB_HSO is not set # CONFIG_USB_IPHETH is not set # CONFIG_WLAN is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # # CONFIG_WAN is not set CONFIG_XEN_NETDEV_FRONTEND=m CONFIG_XEN_NETDEV_BACKEND=y # CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_POLLDEV is not set CONFIG_INPUT_SPARSEKMAP=y # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_TCA6416 is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_PS2_ELANTECH is not set # CONFIG_MOUSE_PS2_SENTELIC is not set # CONFIG_MOUSE_PS2_TOUCHKIT is not set # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_APPLETOUCH is not set # CONFIG_MOUSE_BCM5974 is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_MOUSE_SYNAPTICS_I2C is not set # CONFIG_MOUSE_SYNAPTICS_USB is not set CONFIG_INPUT_JOYSTICK=y # CONFIG_JOYSTICK_ANALOG is not set # CONFIG_JOYSTICK_A3D is not set # CONFIG_JOYSTICK_ADI is not set # CONFIG_JOYSTICK_COBRA is not set # CONFIG_JOYSTICK_GF2K is not set # CONFIG_JOYSTICK_GRIP is not set # CONFIG_JOYSTICK_GRIP_MP is not set # CONFIG_JOYSTICK_GUILLEMOT is not set # CONFIG_JOYSTICK_INTERACT is not set # CONFIG_JOYSTICK_SIDEWINDER is not set # CONFIG_JOYSTICK_TMDC is not set # CONFIG_JOYSTICK_IFORCE is not set # CONFIG_JOYSTICK_WARRIOR is not set # CONFIG_JOYSTICK_MAGELLAN is not set # CONFIG_JOYSTICK_SPACEORB is not set # CONFIG_JOYSTICK_SPACEBALL is not set # CONFIG_JOYSTICK_STINGER is not set # CONFIG_JOYSTICK_TWIDJOY is not set # CONFIG_JOYSTICK_ZHENHUA is not set # CONFIG_JOYSTICK_AS5011 is not set # CONFIG_JOYSTICK_JOYDUMP is not set # CONFIG_JOYSTICK_XPAD is not set CONFIG_INPUT_TABLET=y # CONFIG_TABLET_USB_ACECAD is not set # CONFIG_TABLET_USB_AIPTEK is not set # CONFIG_TABLET_USB_GTCO is not set # CONFIG_TABLET_USB_HANWANG is not set # CONFIG_TABLET_USB_KBTAB is not set # CONFIG_TABLET_USB_WACOM is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_PCSPKR is not set # CONFIG_INPUT_MMA8450 is not set # CONFIG_INPUT_MPU3050 is not set # CONFIG_INPUT_APANEL is not set # CONFIG_INPUT_ATLAS_BTNS is not set # CONFIG_INPUT_ATI_REMOTE2 is not set # CONFIG_INPUT_KEYSPAN_REMOTE is not set # CONFIG_INPUT_KXTJ9 is not set # CONFIG_INPUT_POWERMATE is not set # CONFIG_INPUT_YEALINK is not set # CONFIG_INPUT_CM109 is not set # CONFIG_INPUT_UINPUT is not set # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set # CONFIG_GAMEPORT is not set # # Character devices # CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set # CONFIG_N_GSM is not set # CONFIG_TRACE_SINK is not set CONFIG_DEVKMEM=y # # Serial drivers # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_PNP=y CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_8250_NR_UARTS=16 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set # CONFIG_SERIAL_8250_RSA is not set # # Non-8250 serial port support # # CONFIG_SERIAL_MFD_HSU is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_CONSOLE_POLL=y # CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set # CONFIG_SERIAL_XILINX_PS_UART is not set CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y CONFIG_HVC_XEN_FRONTEND=y # CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_INTEL is not set # CONFIG_HW_RANDOM_AMD is not set CONFIG_HW_RANDOM_VIA=y CONFIG_HW_RANDOM_VIRTIO=m CONFIG_NVRAM=y # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # # PCMCIA character devices # # CONFIG_SYNCLINK_CS is not set # CONFIG_CARDMAN_4000 is not set # CONFIG_CARDMAN_4040 is not set # CONFIG_IPWIRELESS is not set # CONFIG_MWAVE is not set # CONFIG_RAW_DRIVER is not set CONFIG_HPET=y # CONFIG_HPET_MMAP is not set # CONFIG_HANGCHECK_TIMER is not set CONFIG_TCG_TPM=y CONFIG_TCG_TIS=m CONFIG_TCG_NSC=m CONFIG_TCG_ATMEL=m CONFIG_TCG_INFINEON=m # CONFIG_TELCLOCK is not set CONFIG_DEVPORT=y CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y # CONFIG_I2C_CHARDEV is not set # CONFIG_I2C_MUX is not set CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support # # # PC SMBus host controller drivers # # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set CONFIG_I2C_I801=y # CONFIG_I2C_ISCH is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set # # ACPI drivers # # CONFIG_I2C_SCMI is not set # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EG20T is not set # CONFIG_I2C_INTEL_MID is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PXA_PCI is not set # CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers # # CONFIG_I2C_STUB is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_SPI is not set # CONFIG_HSI is not set # # PPS support # # CONFIG_PPS is not set # # PPS generators support # # # PTP clock support # # # Enable Device Drivers -> PPS to see the PTP clock options. # CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set # CONFIG_PDA_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set # CONFIG_BATTERY_SBS is not set # CONFIG_BATTERY_BQ27x00 is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_SMB347 is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # # CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_ABITUGURU3 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7411 is not set # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_K8TEMP is not set # CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_FAM15H_POWER is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FSCHMD is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_CORETEMP is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4261 is not set # CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_LM95245 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_SCH56XX_COMMON is not set # CONFIG_SENSORS_ADS1015 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83795 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_SENSORS_APPLESMC is not set # # ACPI drivers # # CONFIG_SENSORS_ACPI_POWER is not set # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y # # Broadcom specific AMBA # # CONFIG_BCMA is not set # # Multifunction device drivers # # CONFIG_MFD_CORE is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_SM501 is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TMIO is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_S5M_CORE is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_CS5535 is not set # CONFIG_LPC_SCH is not set # CONFIG_LPC_ICH is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_VX855 is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set # CONFIG_REGULATOR is not set # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # CONFIG_AGP=y CONFIG_AGP_AMD64=y CONFIG_AGP_INTEL=y CONFIG_AGP_SIS=y CONFIG_AGP_VIA=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_VGA_SWITCHEROO=y CONFIG_DRM=y CONFIG_DRM_KMS_HELPER=m # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set CONFIG_DRM_TTM=m # CONFIG_DRM_TDFX is not set # CONFIG_DRM_R128 is not set CONFIG_DRM_RADEON=m CONFIG_DRM_RADEON_KMS=y CONFIG_DRM_NOUVEAU=m # CONFIG_DRM_NOUVEAU_BACKLIGHT is not set CONFIG_DRM_NOUVEAU_DEBUG=y # # I2C encoder or helper chips # CONFIG_DRM_I2C_CH7006=m CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_I810 is not set CONFIG_DRM_I915=m CONFIG_DRM_I915_KMS=y CONFIG_DRM_MGA=m CONFIG_DRM_SIS=m CONFIG_DRM_VIA=m CONFIG_DRM_SAVAGE=m # CONFIG_DRM_VMWGFX is not set # CONFIG_DRM_GMA500 is not set # CONFIG_DRM_UDL is not set # CONFIG_DRM_AST is not set # CONFIG_DRM_MGAG200 is not set # CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_STUB_POULSBO is not set # CONFIG_VGASTATE is not set CONFIG_VIDEO_OUTPUT_CONTROL=y CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_DDC is not set # CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set CONFIG_FB_SYS_FILLRECT=m CONFIG_FB_SYS_COPYAREA=m CONFIG_FB_SYS_IMAGEBLIT=m # CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYS_FOPS=m # CONFIG_FB_WMT_GE_ROPS is not set CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set CONFIG_FB_MODE_HELPERS=y CONFIG_FB_TILEBLITTING=y # # Frame buffer hardware drivers # CONFIG_FB_CIRRUS=y # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ARC is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_VGA16 is not set # CONFIG_FB_UVESA is not set # CONFIG_FB_VESA is not set CONFIG_FB_EFI=y # CONFIG_FB_N411 is not set # CONFIG_FB_HGA is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set # CONFIG_FB_LE80578 is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set # CONFIG_FB_ATY is not set # CONFIG_FB_S3 is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set # CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_VT8623 is not set # CONFIG_FB_TRIDENT is not set # CONFIG_FB_ARK is not set # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set # CONFIG_FB_GEODE is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_VIRTUAL is not set CONFIG_XEN_FBDEV_FRONTEND=m # CONFIG_FB_METRONOME is not set # CONFIG_FB_MB862XX is not set # CONFIG_FB_BROADSHEET is not set # CONFIG_FB_AUO_K190X is not set # CONFIG_EXYNOS_VIDEO is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GENERIC=y # CONFIG_BACKLIGHT_PROGEAR is not set # CONFIG_BACKLIGHT_APPLE is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set # CONFIG_BACKLIGHT_LP855X is not set # # Console display driver support # CONFIG_VGA_CONSOLE=y # CONFIG_VGACON_SOFT_SCROLLBACK is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=m CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set # CONFIG_FONTS is not set CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y # CONFIG_LOGO is not set # CONFIG_SOUND is not set CONFIG_HID_SUPPORT=y CONFIG_HID=m CONFIG_HIDRAW=y # # USB Input Devices # CONFIG_USB_HID=m CONFIG_HID_PID=y CONFIG_USB_HIDDEV=y # # Special HID drivers # CONFIG_HID_GENERIC=m CONFIG_HID_A4TECH=m # CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=m # CONFIG_HID_AUREAL is not set CONFIG_HID_BELKIN=m CONFIG_HID_CHERRY=m CONFIG_HID_CHICONY=m CONFIG_HID_CYPRESS=m # CONFIG_HID_DRAGONRISE is not set # CONFIG_HID_EMS_FF is not set CONFIG_HID_EZKEY=m # CONFIG_HID_HOLTEK is not set # CONFIG_HID_KEYTOUCH is not set # CONFIG_HID_KYE is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=m # CONFIG_HID_TWINHAN is not set CONFIG_HID_KENSINGTON=m # CONFIG_HID_LCPOWER is not set CONFIG_HID_LOGITECH=m CONFIG_HID_LOGITECH_DJ=m CONFIG_LOGITECH_FF=y # CONFIG_LOGIRUMBLEPAD2_FF is not set # CONFIG_LOGIG940_FF is not set CONFIG_LOGIWHEELS_FF=y CONFIG_HID_MICROSOFT=m CONFIG_HID_MONTEREY=m # CONFIG_HID_MULTITOUCH is not set CONFIG_HID_NTRIG=m # CONFIG_HID_ORTEK is not set CONFIG_HID_PANTHERLORD=m CONFIG_PANTHERLORD_FF=y CONFIG_HID_PETALYNX=m # CONFIG_HID_PICOLCD is not set # CONFIG_HID_PRIMAX is not set # CONFIG_HID_ROCCAT is not set # CONFIG_HID_SAITEK is not set CONFIG_HID_SAMSUNG=m CONFIG_HID_SONY=m # CONFIG_HID_SPEEDLINK is not set CONFIG_HID_SUNPLUS=m # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set CONFIG_HID_TOPSEED=m # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_DEBUG=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # # CONFIG_USB_DYNAMIC_MINORS is not set CONFIG_USB_MON=y # CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set # CONFIG_USB_EHCI_TT_NEWSCHED is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_ISP1362_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_UHCI_HCD=y # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_CHIPIDEA is not set # # USB Device Class drivers # # CONFIG_USB_ACM is not set CONFIG_USB_PRINTER=y # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_REALTEK is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_USBAT is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set # CONFIG_USB_STORAGE_ONETOUCH is not set # CONFIG_USB_STORAGE_KARMA is not set # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set # CONFIG_USB_STORAGE_ENE_UB6250 is not set # CONFIG_USB_UAS is not set CONFIG_USB_LIBUSUAL=y # # USB Imaging devices # # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # # USB port drivers # # CONFIG_USB_SERIAL is not set # # USB Miscellaneous drivers # # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set # CONFIG_USB_SEVSEG is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_LED is not set # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_YUREX is not set # # USB Physical Layer drivers # # CONFIG_USB_ISP1301 is not set # CONFIG_USB_GADGET is not set # # OTG and related infrastructure # # CONFIG_NOP_USB_XCEIV is not set # CONFIG_UWB is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # # LED drivers # # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP5521 is not set # CONFIG_LEDS_LP5523 is not set # CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA9633 is not set # CONFIG_LEDS_BD2802 is not set # CONFIG_LEDS_INTEL_SS4200 is not set # CONFIG_LEDS_DELL_NETBOOKS is not set # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_OT200 is not set # CONFIG_LEDS_TRIGGERS is not set # # LED Triggers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_EDAC=y # # Reporting subsystems # # CONFIG_EDAC_DEBUG is not set CONFIG_EDAC_DECODE_MCE=y # CONFIG_EDAC_MCE_INJ is not set # CONFIG_EDAC_MM_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y # CONFIG_RTC_HCTOSYS is not set # CONFIG_RTC_DEBUG is not set # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # # CONFIG_RTC_DRV_DS1307 is not set # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_DS3232 is not set # CONFIG_RTC_DRV_MAX6900 is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3029C2 is not set # # SPI RTC drivers # # # Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_DS1286 is not set # CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set # CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set # CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set # # on-CPU RTC drivers # CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # # CONFIG_INTEL_MID_DMAC is not set CONFIG_INTEL_IOATDMA=y # CONFIG_TIMB_DMA is not set # CONFIG_PCH_DMA is not set CONFIG_DMA_ENGINE=y # # DMA Clients # CONFIG_NET_DMA=y CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set CONFIG_DCA=y # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set CONFIG_VIRTIO=y CONFIG_VIRTIO_RING=y # # Virtio drivers # CONFIG_VIRTIO_PCI=m CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_MMIO is not set # # Microsoft Hyper-V guest support # # CONFIG_HYPERV is not set # # Xen driver support # CONFIG_XEN_BALLOON=y CONFIG_XEN_SELFBALLOONING=y CONFIG_XEN_SCRUB_PAGES=y CONFIG_XEN_DEV_EVTCHN=m CONFIG_XEN_BACKEND=y CONFIG_XENFS=m CONFIG_XEN_COMPAT_XENFS=y CONFIG_XEN_SYS_HYPERVISOR=y CONFIG_XEN_XENBUS_FRONTEND=y CONFIG_XEN_GNTDEV=y CONFIG_XEN_GRANT_DEV_ALLOC=y CONFIG_SWIOTLB_XEN=y CONFIG_XEN_TMEM=y CONFIG_XEN_PCIDEV_BACKEND=y CONFIG_XEN_PRIVCMD=m CONFIG_XEN_ACPI_PROCESSOR=y CONFIG_XEN_MCE_LOG=y CONFIG_STAGING=y # CONFIG_ET131X is not set # CONFIG_SLICOSS is not set # CONFIG_USBIP_CORE is not set # CONFIG_ECHO is not set # CONFIG_COMEDI is not set # CONFIG_ASUS_OLED is not set # CONFIG_RTS_PSTOR is not set # CONFIG_RTS5139 is not set # CONFIG_TRANZPORT is not set # CONFIG_IDE_PHISON is not set # CONFIG_DX_SEP is not set CONFIG_ZRAM=y # CONFIG_ZRAM_DEBUG is not set CONFIG_ZCACHE=y CONFIG_ZSMALLOC=y # CONFIG_FB_SM7XX is not set # CONFIG_CRYSTALHD is not set # CONFIG_FB_XGI is not set # CONFIG_ACPI_QUICKSTART is not set # CONFIG_USB_ENESTORAGE is not set # CONFIG_BCM_WIMAX is not set # CONFIG_FT1000 is not set # # Speakup console speech # # CONFIG_SPEAKUP is not set # CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set # CONFIG_STAGING_MEDIA is not set # # Android # # CONFIG_ANDROID is not set # CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set # CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_ACER_WMI is not set # CONFIG_ACERHDF is not set # CONFIG_ASUS_LAPTOP is not set # CONFIG_DELL_WMI is not set # CONFIG_DELL_WMI_AIO is not set # CONFIG_FUJITSU_LAPTOP is not set # CONFIG_FUJITSU_TABLET is not set # CONFIG_AMILO_RFKILL is not set # CONFIG_HP_ACCEL is not set # CONFIG_HP_WMI is not set # CONFIG_MSI_LAPTOP is not set # CONFIG_PANASONIC_LAPTOP is not set # CONFIG_COMPAL_LAPTOP is not set # CONFIG_SONY_LAPTOP is not set # CONFIG_IDEAPAD_LAPTOP is not set # CONFIG_THINKPAD_ACPI is not set # CONFIG_SENSORS_HDAPS is not set # CONFIG_INTEL_MENLOW is not set CONFIG_EEEPC_LAPTOP=y # CONFIG_ASUS_WMI is not set CONFIG_ACPI_WMI=m # CONFIG_MSI_WMI is not set # CONFIG_TOPSTAR_LAPTOP is not set # CONFIG_ACPI_TOSHIBA is not set # CONFIG_TOSHIBA_BT_RFKILL is not set # CONFIG_ACPI_CMPC is not set # CONFIG_INTEL_IPS is not set # CONFIG_IBM_RTL is not set # CONFIG_XO15_EBOOK is not set # CONFIG_SAMSUNG_LAPTOP is not set CONFIG_MXM_WMI=m # CONFIG_INTEL_OAKTRAIL is not set # CONFIG_SAMSUNG_Q10 is not set # CONFIG_APPLE_GMUX is not set # # Hardware Spinlock drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_STATS=y # CONFIG_AMD_IOMMU_V2 is not set CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set CONFIG_INTEL_IOMMU_FLOPPY_WA=y # CONFIG_IRQ_REMAP is not set # # Remoteproc drivers (EXPERIMENTAL) # # # Rpmsg drivers (EXPERIMENTAL) # # CONFIG_VIRT_DRIVERS is not set # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # # Firmware Drivers # CONFIG_EDD=m # CONFIG_EDD_OFF is not set CONFIG_FIRMWARE_MEMMAP=y CONFIG_EFI_VARS=y # CONFIG_DELL_RBU is not set # CONFIG_DCDBAS is not set CONFIG_DMIID=y # CONFIG_DMI_SYSFS is not set CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=m # CONFIG_GOOGLE_FIRMWARE is not set # # File systems # CONFIG_DCACHE_WORD_ACCESS=y CONFIG_EXT2_FS=m CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT2_FS_XIP=y CONFIG_EXT3_FS=m # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=m CONFIG_EXT4_FS_XATTR=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_EXT4_DEBUG is not set CONFIG_FS_XIP=y CONFIG_JBD=m # CONFIG_JBD_DEBUG is not set CONFIG_JBD2=m # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=m CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set CONFIG_REISERFS_PROC_INFO=y CONFIG_REISERFS_FS_XATTR=y CONFIG_REISERFS_FS_POSIX_ACL=y CONFIG_REISERFS_FS_SECURITY=y CONFIG_JFS_FS=m CONFIG_JFS_POSIX_ACL=y CONFIG_JFS_SECURITY=y # CONFIG_JFS_DEBUG is not set CONFIG_JFS_STATISTICS=y CONFIG_XFS_FS=m # CONFIG_XFS_QUOTA is not set CONFIG_XFS_POSIX_ACL=y # CONFIG_XFS_RT is not set # CONFIG_XFS_DEBUG is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=m CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y CONFIG_QUOTACTL_COMPAT=y CONFIG_AUTOFS4_FS=y # CONFIG_FUSE_FS is not set CONFIG_GENERIC_ACL=y # # Caches # # CONFIG_FSCACHE is not set # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_ZISOFS=y # CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_NTFS_FS=y # CONFIG_NTFS_DEBUG is not set CONFIG_NTFS_RW=y # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_VMCORE=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y CONFIG_CONFIGFS_FS=m CONFIG_MISC_FILESYSTEMS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_LOGFS is not set # CONFIG_CRAMFS is not set # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y # CONFIG_PSTORE_RAM is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y # CONFIG_NFS_V4_1 is not set CONFIG_ROOT_NFS=y # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y # CONFIG_NFSD is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y # CONFIG_SUNRPC_DEBUG is not set # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_MAC_ROMAN is not set # CONFIG_NLS_MAC_CELTIC is not set # CONFIG_NLS_MAC_CENTEURO is not set # CONFIG_NLS_MAC_CROATIAN is not set # CONFIG_NLS_MAC_CYRILLIC is not set # CONFIG_NLS_MAC_GAELIC is not set # CONFIG_NLS_MAC_GREEK is not set # CONFIG_NLS_MAC_ICELAND is not set # CONFIG_NLS_MAC_INUIT is not set # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set CONFIG_NLS_UTF8=y # CONFIG_DLM is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_PRINTK_TIME=y CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 # CONFIG_ENABLE_WARN_DEPRECATED is not set CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_READABLE_ASM is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set CONFIG_LOCKUP_DETECTOR=y CONFIG_HARDLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_SCHED_DEBUG is not set CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y # CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set # CONFIG_SPARSE_RCU_POINTER is not set # CONFIG_LOCK_STAT is not set CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set CONFIG_DEBUG_STACK_USAGE=y # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VIRTUAL is not set # CONFIG_DEBUG_WRITECOUNT is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_LIST is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_CREDENTIALS is not set CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_FRAME_POINTER=y # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=60 # CONFIG_RCU_CPU_STALL_INFO is not set # CONFIG_RCU_TRACE is not set # CONFIG_KPROBES_SANITY_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_LKDTM is not set # CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set CONFIG_FAULT_INJECTION=y # CONFIG_FAILSLAB is not set # CONFIG_FAIL_PAGE_ALLOC is not set CONFIG_FAIL_MAKE_REQUEST=y # CONFIG_FAIL_IO_TIMEOUT is not set CONFIG_FAULT_INJECTION_DEBUG_FS=y # CONFIG_LATENCYTOP is not set # CONFIG_DEBUG_PAGEALLOC is not set CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_RING_BUFFER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DMA_API_DEBUG is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y CONFIG_KGDB=y CONFIG_KGDB_SERIAL_CONSOLE=y # CONFIG_KGDB_TESTS is not set # CONFIG_KGDB_LOW_LEVEL_TRAP is not set # CONFIG_KGDB_KDB is not set CONFIG_HAVE_ARCH_KMEMCHECK=y # CONFIG_KMEMCHECK is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_STRICT_DEVMEM is not set CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_DBGP=y CONFIG_DEBUG_STACKOVERFLOW=y CONFIG_X86_PTDUMP=y CONFIG_DEBUG_RODATA=y CONFIG_DEBUG_RODATA_TEST=y CONFIG_DEBUG_SET_MODULE_RONX=y CONFIG_DEBUG_NX_TEST=m # CONFIG_IOMMU_DEBUG is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y # CONFIG_X86_DECODER_SELFTEST is not set CONFIG_IO_DELAY_TYPE_0X80=0 CONFIG_IO_DELAY_TYPE_0XED=1 CONFIG_IO_DELAY_TYPE_UDELAY=2 CONFIG_IO_DELAY_TYPE_NONE=3 CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_DEFAULT_IO_DELAY_TYPE=0 CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_CPA_DEBUG is not set CONFIG_OPTIMIZE_INLINING=y # CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set # CONFIG_DEBUG_NMI_SELFTEST is not set # # Security options # CONFIG_KEYS=y # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y # CONFIG_SECURITY_NETWORK_XFRM is not set # CONFIG_SECURITY_PATH is not set CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65534 CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set # CONFIG_SECURITY_YAMA is not set # CONFIG_IMA is not set # CONFIG_EVM is not set CONFIG_DEFAULT_SECURITY_SELINUX=y # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_DEFAULT_SECURITY="selinux" CONFIG_XOR_BLOCKS=m CONFIG_ASYNC_CORE=m CONFIG_ASYNC_MEMCPY=m CONFIG_ASYNC_XOR=m CONFIG_ASYNC_PQ=m CONFIG_ASYNC_RAID6_RECOV=m CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_PCOMP=y CONFIG_CRYPTO_PCOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_USER is not set CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_WORKQUEUE=y # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_AUTHENC=y # CONFIG_CRYPTO_TEST is not set # # Authenticated Encryption with Associated Data # # CONFIG_CRYPTO_CCM is not set # CONFIG_CRYPTO_GCM is not set # CONFIG_CRYPTO_SEQIV is not set # # Block modes # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CTR is not set # CONFIG_CRYPTO_CTS is not set # CONFIG_CRYPTO_ECB is not set # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # # Hash modes # CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_VMAC is not set # # Digest # CONFIG_CRYPTO_CRC32C=m CONFIG_CRYPTO_CRC32C_INTEL=m # CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD128 is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RMD256 is not set # CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=y # CONFIG_CRYPTO_SHA1_SSSE3 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set # CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set # # Ciphers # # CONFIG_CRYPTO_AES is not set # CONFIG_CRYPTO_AES_X86_64 is not set # CONFIG_CRYPTO_AES_NI_INTEL is not set # CONFIG_CRYPTO_ANUBIS is not set # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_SALSA20 is not set # CONFIG_CRYPTO_SALSA20_X86_64 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set # CONFIG_CRYPTO_TEA is not set # CONFIG_CRYPTO_TWOFISH is not set # CONFIG_CRYPTO_TWOFISH_X86_64 is not set # CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set # # Compression # # CONFIG_CRYPTO_DEFLATE is not set CONFIG_CRYPTO_ZLIB=y CONFIG_CRYPTO_LZO=y # # Random Number Generation # # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_PADLOCK is not set CONFIG_HAVE_KVM=y CONFIG_HAVE_KVM_IRQCHIP=y CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_APIC_ARCHITECTURE=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y CONFIG_KVM_INTEL=m CONFIG_KVM_AMD=m CONFIG_VHOST_NET=y # CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_RAID6_PQ=m CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y CONFIG_CRC_CCITT=m CONFIG_CRC16=m CONFIG_CRC_T10DIF=y # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m # CONFIG_CRC8 is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_NLATTR=y # CONFIG_AVERAGE is not set # CONFIG_CORDIC is not set # CONFIG_DDR is not set > > Thanks, > Jinsong > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel From xen-users-bounces@lists.xen.org Sun Jun 10 03:43:27 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 10 Jun 2012 03:43:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SdZ2Q-00071j-De; Sun, 10 Jun 2012 03:42:02 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SczIZ-0002om-Ve for xen-users@lists.xen.org; Fri, 08 Jun 2012 13:32:20 +0000 Received: from [193.109.254.147:27133] by server-3.bemta-14.messagelabs.com id D6/D1-05653-3EEF1DF4; Fri, 08 Jun 2012 13:32:19 +0000 X-Env-Sender: thanos.makatos@citrix.com X-Msg-Ref: server-14.tower-27.messagelabs.com!1339162337!1913890!1 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiAxMDE3NDc=\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 17179 invoked from network); 8 Jun 2012 13:32:17 -0000 Received: from smtp.ctxuk.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-14.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 8 Jun 2012 13:32:17 -0000 X-IronPort-AV: E=Sophos;i="4.75,738,1330905600"; d="scan'208,217";a="12910179" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 08 Jun 2012 13:32:16 +0000 Received: from LONPMAILBOX01.citrite.net ([10.30.224.161]) by LONPMAILMX01.citrite.net ([10.30.203.162]) with mapi; Fri, 8 Jun 2012 14:32:17 +0100 From: Thanos Makatos To: "xen-users@lists.xen.org" Date: Fri, 8 Jun 2012 14:32:11 +0100 Thread-Topic: cannot boot guest VM Thread-Index: Ac1FexvDO+EYdhz+SEKO0RBLiBzEmA== Message-ID: <4B45B535F7F6BE4CB1C044ED5115CDDEED64F7E361@LONPMAILBOX01.citrite.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 10 Jun 2012 03:42:00 +0000 Subject: [Xen-users] cannot boot guest VM X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============0725551985205855416==" Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --===============0725551985205855416== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_4B45B535F7F6BE4CB1C044ED5115CDDEED64F7E361LONPMAILBOX01_" --_000_4B45B535F7F6BE4CB1C044ED5115CDDEED64F7E361LONPMAILBOX01_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi, I'm trying to boot a PV VM I just installed (following http://wiki.xen.org/= wiki/Debian_Guest_Installation_Using_Debian_Installer) without success. My XEN installation is xen-unstable 54c8c9eaee92+ on a Debian unstable mach= ine (x86_64), kernel 3.3.4+. The VM I installed is, again, a Debian unstabl= e x86_64. The installation went smoothly; I used an 8GB file as a disk back= -end. I went for the simplest partition scheme (all in an ext3 partition). Here's the installation configuration file: name =3D "debian-installer" memory =3D 256 disk =3D ['file:/root/debian-blktap2.img,xvda,w'] kernel =3D "/root/netinst/vmlinuz" ramdisk =3D "/root/netinst/initrd.gz" extra =3D "debian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0" cpu_weight=3D256 vif=3D['bridge=3Dxenbr0'] And here's the configuration file used to boot the VM: name =3D "debian" memory =3D 256 disk =3D ['file:/root/debian-blktap2.img,xvda,w'] kernel =3D "/root/netinst/vmlinuz" ramdisk =3D "/root/netinst/initrd.gz" extra =3D "debian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0" cpu_weight=3D256 vif=3D['bridge=3Dxenbr0'] root@dt07:~# cat debian-blktap2.cfg name =3D "debian-installer" memory =3D 256 disk =3D ['file:/root/debian-blktap2.img,xvda,w'] bootloader =3D "pygrub" extra =3D "debian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0" cpu_weight=3D256 vif=3D['bridge=3Dxenbr0'] When I try to boot the VM with the above configuration I get the following = error: Parsing config file debian-blktap2.cfg libxl: debug: libxl_device.c:183:libxl__device_disk_set_backend: Disk vdev= =3Dxvda spec.backend=3Dunknown libxl: debug: libxl_device.c:137:disk_try_backend: Disk vdev=3Dxvda, backen= d phy unsuitable as phys path not a block device libxl: debug: libxl_device.c:144:disk_try_backend: Disk vdev=3Dxvda, backen= d tap unsuitable because blktap not available libxl: debug: libxl_device.c:219:libxl__device_disk_set_backend: Disk vdev= =3Dxvda, using backend qdisk libxl: debug: libxl_device.c:183:libxl__device_disk_set_backend: Disk vdev= =3Dxvda spec.backend=3Dqdisk libxl: debug: libxl.c:1714:libxl_device_disk_local_attach: locally attachin= g qdisk /root/debian-blktap2.img libxl: error: libxl_create.c:603:do_domain_create: failed to run bootloader= : -3 xc: debug: hypercall buffer: total allocations:14 total releases:14 xc: debug: hypercall buffer: current allocations:0 maximum allocations:2 xc: debug: hypercall buffer: cache current size:2 xc: debug: hypercall buffer: cache hits:11 misses:2 toobig:1 When I try to see what goes wrong with pygrub (pygrub ), I get = the following error: Traceback (most recent call last): File "/usr/local/bin/pygrub", line 822, in raise RuntimeError, "Unable to find partition containing kernel" RuntimeError: Unable to find partition containing kernel Does this mean that something went terribly wrong during the installation? I mounted the disk image file with lomount, the partition table and file sy= stem in there seem to be fine. I then extract the kernel and ramdisk and tr= y without pygrub: # bootloader =3D "pygrub" kernel =3D "vmlinuz-2.6.32-5-amd64" ramdisk =3D "initrd.img-2.6.32-5-amd64" This is the output of the new "xl create": Parsing config file debian-blktap2.cfg libxl: debug: libxl_device.c:183:libxl__device_disk_set_backend: Disk vdev= =3Dxvda spec.backend=3Dunknown libxl: debug: libxl_device.c:137:disk_try_backend: Disk vdev=3Dxvda, backen= d phy unsuitable as phys path not a block device libxl: debug: libxl_device.c:144:disk_try_backend: Disk vdev=3Dxvda, backen= d tap unsuitable because blktap not available libxl: debug: libxl_device.c:219:libxl__device_disk_set_backend: Disk vdev= =3Dxvda, using backend qdisk domainbuilder: detail: xc_dom_allocate: cmdline=3D"debian-installer/exit/al= ways_halt=3Dtrue -- console=3Dhvc0", features=3D"(null)" domainbuilder: detail: xc_dom_kernel_file: filename=3D"vmlinuz-2.6.32-5-amd= 64" domainbuilder: detail: xc_dom_malloc_filemap : 2367 kB domainbuilder: detail: xc_dom_ramdisk_file: filename=3D"initrd.img-2.6.32-5= -amd64" domainbuilder: detail: xc_dom_malloc_filemap : 9075 kB domainbuilder: detail: xc_dom_boot_xen_init: ver 4.2, caps xen-3.0-x86_64 x= en-3.0-x86_32p hvm-3.0-x86_32 hvm-3.0-x86_32p hvm-3.0-x86_64 domainbuilder: detail: xc_dom_parse_image: called domainbuilder: detail: xc_dom_find_loader: trying multiboot-binary loader .= .. domainbuilder: detail: loader probe failed domainbuilder: detail: xc_dom_find_loader: trying Linux bzImage loader ... domainbuilder: detail: xc_dom_malloc : 11914 kB domainbuilder: detail: xc_dom_do_gunzip: unzip ok, 0x2485c8 -> 0xba2b00 domainbuilder: detail: loader probe OK xc: detail: elf_parse_binary: phdr: paddr=3D0x1000000 memsz=3D0x42d000 xc: detail: elf_parse_binary: phdr: paddr=3D0x142d000 memsz=3D0xd6150 xc: detail: elf_parse_binary: phdr: paddr=3D0x1504000 memsz=3D0x888 xc: detail: elf_parse_binary: phdr: paddr=3D0x1505000 memsz=3D0x160d8 xc: detail: elf_parse_binary: phdr: paddr=3D0x151c000 memsz=3D0x1de000 xc: detail: elf_parse_binary: memory: 0x1000000 -> 0x16fa000 xc: detail: elf_xen_parse_note: GUEST_OS =3D "linux" xc: detail: elf_xen_parse_note: GUEST_VERSION =3D "2.6" xc: detail: elf_xen_parse_note: XEN_VERSION =3D "xen-3.0" xc: detail: elf_xen_parse_note: VIRT_BASE =3D 0xffffffff80000000 xc: detail: elf_xen_parse_note: ENTRY =3D 0xffffffff8151c200 xc: detail: elf_xen_parse_note: HYPERCALL_PAGE =3D 0xffffffff81009000 xc: detail: elf_xen_parse_note: FEATURES =3D "!writable_page_tables|pae_pgd= ir_above_4gb" xc: detail: elf_xen_parse_note: PAE_MODE =3D "yes" xc: detail: elf_xen_parse_note: LOADER =3D "generic" xc: detail: elf_xen_parse_note: unknown xen elf note (0xd) xc: detail: elf_xen_parse_note: SUSPEND_CANCEL =3D 0x1 xc: detail: elf_xen_parse_note: HV_START_LOW =3D 0xffff800000000000 xc: detail: elf_xen_parse_note: PADDR_OFFSET =3D 0x0 xc: detail: elf_xen_addr_calc_check: addresses: xc: detail: virt_base =3D 0xffffffff80000000 xc: detail: elf_paddr_offset =3D 0x0 xc: detail: virt_offset =3D 0xffffffff80000000 xc: detail: virt_kstart =3D 0xffffffff81000000 xc: detail: virt_kend =3D 0xffffffff816fa000 xc: detail: virt_entry =3D 0xffffffff8151c200 xc: detail: p2m_base =3D 0xffffffffffffffff domainbuilder: detail: xc_dom_parse_elf_kernel: xen-3.0-x86_64: 0xffffffff8= 1000000 -> 0xffffffff816fa000 domainbuilder: detail: xc_dom_mem_init: mem 256 MB, pages 0x10000 pages, 4k= each domainbuilder: detail: xc_dom_mem_init: 0x10000 pages domainbuilder: detail: xc_dom_boot_mem_init: called domainbuilder: detail: x86_compat: guest xen-3.0-x86_64, address size 64 domainbuilder: detail: xc_dom_malloc : 512 kB domainbuilder: detail: xc_dom_build_image: called domainbuilder: detail: xc_dom_alloc_segment: kernel : 0xffffffff810= 00000 -> 0xffffffff816fa000 (pfn 0x1000 + 0x6fa pages) domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x1000+0x6fa at= 0x7f3a5921f000 xc: detail: elf_load_binary: phdr 0 at 0x0x7f3a5921f000 -> 0x0x7f3a5964c000 xc: detail: elf_load_binary: phdr 1 at 0x0x7f3a5964c000 -> 0x0x7f3a59722150 xc: detail: elf_load_binary: phdr 2 at 0x0x7f3a59723000 -> 0x0x7f3a59723888 xc: detail: elf_load_binary: phdr 3 at 0x0x7f3a59724000 -> 0x0x7f3a5973a0d8 xc: detail: elf_load_binary: phdr 4 at 0x0x7f3a5973b000 -> 0x0x7f3a597c1000 domainbuilder: detail: xc_dom_alloc_segment: ramdisk : 0xffffffff816= fa000 -> 0xffffffff83117000 (pfn 0x16fa + 0x1a1d pages) domainbuilder: detail: xc_dom_malloc : 156 kB domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x16fa+0x1a1d a= t 0x7f3a57802000 domainbuilder: detail: xc_dom_do_gunzip: unzip ok, 0x8dcc4c -> 0x1a1c010 domainbuilder: detail: xc_dom_alloc_segment: phys2mach : 0xffffffff831= 17000 -> 0xffffffff83197000 (pfn 0x3117 + 0x80 pages) domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x3117+0x80 at = 0x7f3a5cd6f000 domainbuilder: detail: xc_dom_alloc_page : start info : 0xffffffff831= 97000 (pfn 0x3197) domainbuilder: detail: xc_dom_alloc_page : xenstore : 0xffffffff831= 98000 (pfn 0x3198) domainbuilder: detail: xc_dom_alloc_page : console : 0xffffffff831= 99000 (pfn 0x3199) domainbuilder: detail: nr_page_tables: 0x0000ffffffffffff/48: 0xffff0000000= 00000 -> 0xffffffffffffffff, 1 table(s) domainbuilder: detail: nr_page_tables: 0x0000007fffffffff/39: 0xffffff80000= 00000 -> 0xffffffffffffffff, 1 table(s) domainbuilder: detail: nr_page_tables: 0x000000003fffffff/30: 0xffffffff800= 00000 -> 0xffffffffbfffffff, 1 table(s) domainbuilder: detail: nr_page_tables: 0x00000000001fffff/21: 0xffffffff800= 00000 -> 0xffffffff833fffff, 26 table(s) domainbuilder: detail: xc_dom_alloc_segment: page tables : 0xffffffff831= 9a000 -> 0xffffffff831b7000 (pfn 0x319a + 0x1d pages) domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x319a+0x1d at = 0x7f3a5cd52000 domainbuilder: detail: xc_dom_alloc_page : boot stack : 0xffffffff831= b7000 (pfn 0x31b7) domainbuilder: detail: xc_dom_build_image : virt_alloc_end : 0xffffffff831= b8000 domainbuilder: detail: xc_dom_build_image : virt_pgtab_end : 0xffffffff834= 00000 domainbuilder: detail: xc_dom_boot_image: called domainbuilder: detail: arch_setup_bootearly: doing nothing domainbuilder: detail: xc_dom_compat_check: supported guest type: xen-3.0-x= 86_64 <=3D matches domainbuilder: detail: xc_dom_compat_check: supported guest type: xen-3.0-x= 86_32p domainbuilder: detail: xc_dom_compat_check: supported guest type: hvm-3.0-x= 86_32 domainbuilder: detail: xc_dom_compat_check: supported guest type: hvm-3.0-x= 86_32p domainbuilder: detail: xc_dom_compat_check: supported guest type: hvm-3.0-x= 86_64 domainbuilder: detail: xc_dom_update_guest_p2m: dst 64bit, pages 0x10000 domainbuilder: detail: clear_page: pfn 0x3199, mfn 0x2125d8 domainbuilder: detail: clear_page: pfn 0x3198, mfn 0x2125d9 domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x3197+0x1 at 0= x7f3a5ce80000 domainbuilder: detail: start_info_x86_64: called domainbuilder: detail: setup_hypercall_page: vaddr=3D0xffffffff81009000 pfn= =3D0x1009 domainbuilder: detail: domain builder memory footprint domainbuilder: detail: allocated domainbuilder: detail: malloc : 12631 kB domainbuilder: detail: anon mmap : 0 bytes domainbuilder: detail: mapped domainbuilder: detail: file mmap : 11442 kB domainbuilder: detail: domU mmap : 33 MB domainbuilder: detail: arch_setup_bootlate: shared_info: pfn 0x0, mfn 0x95b= 9e domainbuilder: detail: shared_info_x86_64: called domainbuilder: detail: vcpu_x86_64: called domainbuilder: detail: vcpu_x86_64: cr3: pfn 0x319a mfn 0x2125d7 domainbuilder: detail: launch_vm: called, ctxt=3D0x7fffdec2f5b0 domainbuilder: detail: xc_dom_release: called libxl: debug: libxl_device.c:183:libxl__device_disk_set_backend: Disk vdev= =3Dxvda spec.backend=3Dqdisk libxl: debug: libxl_dm.c:996:libxl__create_device_model: Spawning device-mo= del /usr/lib/xen/bin/qemu-system-i386 with arguments: libxl: debug: libxl_dm.c:998:libxl__create_device_model: /usr/lib/xen/bin= /qemu-system-i386 libxl: debug: libxl_dm.c:998:libxl__create_device_model: -xen-domid libxl: debug: libxl_dm.c:998:libxl__create_device_model: 24 libxl: debug: libxl_dm.c:998:libxl__create_device_model: -chardev libxl: debug: libxl_dm.c:998:libxl__create_device_model: socket,id=3Dlibx= l-cmd,path=3D/var/run/xen/qmp-libxl-24,server,nowait libxl: debug: libxl_dm.c:998:libxl__create_device_model: -mon libxl: debug: libxl_dm.c:998:libxl__create_device_model: chardev=3Dlibxl-= cmd,mode=3Dcontrol libxl: debug: libxl_dm.c:998:libxl__create_device_model: -xen-attach libxl: debug: libxl_dm.c:998:libxl__create_device_model: -name libxl: debug: libxl_dm.c:998:libxl__create_device_model: debian libxl: debug: libxl_dm.c:998:libxl__create_device_model: -nographic libxl: debug: libxl_dm.c:998:libxl__create_device_model: -M libxl: debug: libxl_dm.c:998:libxl__create_device_model: xenpv libxl: debug: libxl_dm.c:998:libxl__create_device_model: -m libxl: debug: libxl_dm.c:998:libxl__create_device_model: 257 libxl: debug: libxl_qmp.c:692:libxl__qmp_initialize: connected to /var/run/= xen/qmp-libxl-24 libxl: debug: libxl_qmp.c:298:qmp_handle_response: message type: qmp libxl: debug: libxl_qmp.c:555:qmp_send_prepare: next qmp command: '{"execut= e":"qmp_capabilities","id":1}' libxl: debug: libxl_qmp.c:298:qmp_handle_response: message type: return libxl: debug: libxl_qmp.c:555:qmp_send_prepare: next qmp command: '{"execut= e":"query-chardev","id":2}' libxl: debug: libxl_qmp.c:298:qmp_handle_response: message type: return libxl: debug: libxl_qmp.c:555:qmp_send_prepare: next qmp command: '{"execut= e":"query-vnc","id":3}' libxl: debug: libxl_qmp.c:298:qmp_handle_response: message type: return Daemon running with PID 6479 xc: debug: hypercall buffer: total allocations:153 total releases:153 xc: debug: hypercall buffer: current allocations:0 maximum allocations:2 xc: debug: hypercall buffer: cache current size:2 xc: debug: hypercall buffer: cache hits:148 misses:2 toobig:3 I don't know how to interpret the above output. When I try to connect to th= e domain via "xl console", I get the following output: [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Linux version 2.6.32-5-amd64 (Debian 2.6.32-45) (dannf@debia= n.org) (gcc version 4.3.5 (Debian 4.3.5-4) ) #1 SMP Sun May 6 04:00:17 UTC = 2012 [ 0.000000] Command line: debian-installer/exit/always_halt=3Dtrue -- co= nsole=3Dhvc0 [ 0.000000] KERNEL supported cpus: [ 0.000000] Intel GenuineIntel [ 0.000000] AMD AuthenticAMD [ 0.000000] Centaur CentaurHauls [ 0.000000] ACPI in unprivileged domain disabled [ 0.000000] BIOS-provided physical RAM map: [ 0.000000] Xen: 0000000000000000 - 00000000000a0000 (usable) [ 0.000000] Xen: 00000000000a0000 - 0000000000100000 (reserved) [ 0.000000] Xen: 0000000000100000 - 0000000010000000 (usable) [ 0.000000] DMI not present or invalid. [ 0.000000] last_pfn =3D 0x10000 max_arch_pfn =3D 0x400000000 [ 0.000000] init_memory_mapping: 0000000000000000-0000000010000000 [ 0.000000] RAMDISK: 016fa000 - 03117000 [ 0.000000] No NUMA configuration found [ 0.000000] Faking a node at 0000000000000000-0000000010000000 [ 0.000000] Bootmem setup node 0 0000000000000000-0000000010000000 [ 0.000000] NODE_DATA [000000000006a000 - 0000000000071fff] [ 0.000000] bootmap [0000000000072000 - 0000000000073fff] pages 2 [ 0.000000] (7 early reservations) =3D=3D> bootmem [0000000000 - 0010000= 000] [ 0.000000] #0 [0000000000 - 0000001000] BIOS data page =3D=3D> [000= 0000000 - 0000001000] [ 0.000000] #1 [000319a000 - 00031b7000] XEN PAGETABLES =3D=3D> [000= 319a000 - 00031b7000] [ 0.000000] #2 [0000006000 - 0000008000] TRAMPOLINE =3D=3D> [000= 0006000 - 0000008000] [ 0.000000] #3 [0001000000 - 00016d95c4] TEXT DATA BSS =3D=3D> [000= 1000000 - 00016d95c4] [ 0.000000] #4 [00016fa000 - 0003117000] RAMDISK =3D=3D> [000= 16fa000 - 0003117000] [ 0.000000] #5 [0003117000 - 000319a000] XEN START INFO =3D=3D> [000= 3117000 - 000319a000] [ 0.000000] #6 [0000008000 - 000006a000] PGTABLE =3D=3D> [000= 0008000 - 000006a000] [ 0.000000] Zone PFN ranges: [ 0.000000] DMA 0x00000000 -> 0x00001000 [ 0.000000] DMA32 0x00001000 -> 0x00100000 [ 0.000000] Normal 0x00100000 -> 0x00100000 [ 0.000000] Movable zone start PFN for each node [ 0.000000] early_node_map[2] active PFN ranges [ 0.000000] 0: 0x00000000 -> 0x000000a0 [ 0.000000] 0: 0x00000100 -> 0x00010000 [ 0.000000] SFI: Simple Firmware Interface v0.7 http://simplefirmware.or= g [ 0.000000] SMP: Allowing 1 CPUs, 0 hotplug CPUs [ 0.000000] No local APIC present [ 0.000000] APIC: disable apic facility [ 0.000000] PM: Registered nosave memory: 00000000000a0000 - 00000000001= 00000 [ 0.000000] Allocating PCI resources starting at 10000000 (gap: 10000000= :f0000000) [ 0.000000] Booting paravirtualized kernel on Xen [ 0.000000] Xen version: 4.2-unstable (preserve-AD) [ 0.000000] NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:1 nr_node_ids:1 [ 0.000000] PERCPU: Embedded 30 pages/cpu @ffff8800031ed000 s90328 r8192= d24360 u122880 [ 0.000000] pcpu-alloc: s90328 r8192 d24360 u122880 alloc=3D30*4096 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Xen: using vcpu_info placement [ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Tota= l pages: 64443 [ 0.000000] Policy zone: DMA32 [ 0.000000] Kernel command line: debian-installer/exit/always_halt=3Dtru= e -- console=3Dhvc0 [ 0.000000] PID hash table entries: 1024 (order: 1, 8192 bytes) [ 0.000000] Initializing CPU#0 [ 0.000000] Checking aperture... [ 0.000000] No AGP bridge found [ 0.000000] Memory: 222956k/262144k available (3083k kernel code, 384k a= bsent, 38804k reserved, 2048k data, 592k init) [ 0.000000] SLUB: Genslabs=3D14, HWalign=3D64, Order=3D0-3, MinObjects= =3D0, CPUs=3D1, Nodes=3D1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] NR_IRQS:4352 nr_irqs:256 [ 0.000000] Console: colour dummy device 80x25 [ 0.000000] console [tty0] enabled [ 0.000000] console [hvc0] enabled [ 0.000000] installing Xen timer for CPU 0 [ 0.000000] Detected 2660.052 MHz processor. [ 0.004000] Calibrating delay loop (skipped), value calculated using tim= er frequency.. 5320.10 BogoMIPS (lpj=3D10640208) [ 0.004000] Security Framework initialized [ 0.004000] SELinux: Disabled at boot. [ 0.004000] Dentry cache hash table entries: 32768 (order: 6, 262144 byt= es) [ 0.004000] Inode-cache hash table entries: 16384 (order: 5, 131072 byte= s) [ 0.004000] Mount-cache hash table entries: 256 [ 0.004000] Initializing cgroup subsys ns [ 0.004000] Initializing cgroup subsys cpuacct [ 0.004000] Initializing cgroup subsys devices [ 0.004000] Initializing cgroup subsys freezer [ 0.004000] Initializing cgroup subsys net_cls [ 0.004000] CPU: L1 I cache: 32K, L1 D cache: 32K [ 0.004000] CPU: L2 cache: 256K [ 0.004000] CPU: L3 cache: 8192K [ 0.004000] CPU 0/0x6 -> Node 0 [ 0.004000] CPU: Unsupported number of siblings 16 [ 0.004000] Performance Events: unsupported p6 CPU model 30 no PMU drive= r, software events only. [ 0.004000] SMP alternatives: switching to UP code [ 0.004000] Freeing SMP alternatives: 28k freed [ 0.004240] Brought up 1 CPUs [ 0.004439] devtmpfs: initialized [ 0.011965] Grant table initialized [ 0.011978] regulator: core version 0.5 [ 0.012024] NET: Registered protocol family 16 [ 0.012331] PCI: Fatal: No config space access function found [ 0.012777] bio: create slab at 0 [ 0.012899] ACPI: Interpreter disabled. [ 0.012941] xen_balloon: Initialising balloon driver. [ 0.012941] vgaarb: loaded [ 0.012941] PCI: System does not support PCI [ 0.012941] PCI: System does not support PCI [ 0.012941] Switching to clocksource xen [ 0.014224] pnp: PnP ACPI: disabled [ 0.014597] NET: Registered protocol family 2 [ 0.014715] IP route cache hash table entries: 2048 (order: 2, 16384 byt= es) [ 0.015113] TCP established hash table entries: 8192 (order: 5, 131072 b= ytes) [ 0.015254] TCP bind hash table entries: 8192 (order: 5, 131072 bytes) [ 0.015342] TCP: Hash tables configured (established 8192 bind 8192) [ 0.015353] TCP reno registered [ 0.015447] NET: Registered protocol family 1 [ 0.015526] Unpacking initramfs... [ 0.046953] Freeing initrd memory: 26740k freed [ 0.056738] platform rtc_cmos: registered platform RTC device (no PNP de= vice found) [ 0.057076] audit: initializing netlink socket (disabled) [ 0.057102] type=3D2000 audit(1339162066.687:1): initialized [ 0.063338] HugeTLB registered 2 MB page size, pre-allocated 0 pages [ 0.065855] VFS: Disk quotas dquot_6.5.2 [ 0.065951] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.066095] msgmni has been set to 487 [ 0.066412] alg: No test for stdrng (krng) [ 0.066515] Block layer SCSI generic (bsg) driver version 0.4 loaded (ma= jor 253) [ 0.066530] io scheduler noop registered [ 0.066537] io scheduler anticipatory registered [ 0.066546] io scheduler deadline registered [ 0.066652] io scheduler cfq registered (default) [ 0.070219] Linux agpgart interface v0.103 [ 0.070279] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 0.070573] input: Macintosh mouse button emulation as /devices/virtual/= input/input0 [ 0.070662] PNP: No PS/2 controller found. Probing ports directly. [ 0.071502] i8042.c: No controller found. [ 0.071613] mice: PS/2 mouse device common for all mice [ 0.071702] rtc_cmos: probe of rtc_cmos failed with error -16 [ 0.071744] cpuidle: using governor ladder [ 0.071753] cpuidle: using governor menu [ 0.071765] No iBFT detected. [ 0.072238] TCP cubic registered [ 0.072448] NET: Registered protocol family 10 [ 0.073558] Mobile IPv6 [ 0.073571] NET: Registered protocol family 17 [ 0.073723] registered taskstats version 1 [ 0.073746] XENBUS: Device with no driver: device/vbd/51712 [ 0.073754] XENBUS: Device with no driver: device/vif/0 [ 0.073788] /build/buildd-linux-2.6_2.6.32-45-amd64-FcX7RM/linux-2.6-2.6= .32/debian/build/source_amd64_none/drivers/rtc/hctosys.c: unable to open rt= c device (rtc0) [ 0.073852] Initalizing network drop monitor service [ 0.073962] Freeing unused kernel memory: 592k freed [ 0.074170] Write protecting the kernel read-only data: 4240k Loading, please wait... [ 0.140302] udev[46]: starting version 164 [ 0.224372] Initialising Xen virtual ethernet driver. [ 0.231454] blkfront: xvda: barriers enabled [ 0.231630] xvda: xvda1 xvda2 < xvda5 > Begin: Loading essential drivers ... done. Begin: Running /scripts/init-premount ... done. Begin: Mounting root file system ... Begin: Running /scripts/local-top ... = done. Begin: Running /scripts/local-premount ... [ 0.534766] PM: Starting manu= al resume from disk done. mount: can't read '/etc/fstab': No such file or directory Begin: Running /scripts/local-bottom ... done. done. Begin: Running /scripts/init-bottom ... mount: mounting /dev on /root/dev f= ailed: No such file or directory done. mount: mounting /sys on /root/sys failed: No such file or directory mount: mounting /proc on /root/proc failed: No such file or directory Target filesystem doesn't have requested /sbin/init. No init found. Try passing init=3D bootarg. BusyBox v1.17.1 (Debian 1:1.17.1-8) built-in shell (ash) Enter 'help' for a list of built-in commands. /bin/sh: can't access tty; job control turned off (initramfs) (initramfs) So, what am I doing wrong? Regards -- Thanos Makatos --_000_4B45B535F7F6BE4CB1C044ED5115CDDEED64F7E361LONPMAILBOX01_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi,

 

I’m = trying to boot a PV VM I just installed (following http://wiki.xen.org/wiki= /Debian_Guest_Installation_Using_Debian_Installer) without success.

 

My XE= N installation is xen-unstable 54c8c9eaee92+ on a Debian unstable machine (= x86_64), kernel 3.3.4+. The VM I installed is, again, a Debian unstable x86= _64. The installation went smoothly; I used an 8GB file as a disk back-end.= I went for the simplest partition scheme (all in an ext3 partition).<= /o:p>

Here’s the installation configuration f= ile:

name =3D "debian-installer"

memory =3D 256

disk =3D ['f= ile:/root/debian-blktap2.img,xvda,w']

kernel =3D "/root/netinst/vm= linuz"

ramdisk =3D "/root/netinst/initrd.gz"<= /span>

extra = =3D "debian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0"<= o:p>

cpu_weight=3D256

vif=3D['bridge=3Dxenbr0']

 

And here’= ;s the configuration file used to boot the VM:

name =3D "debian"

memory =3D 256

disk =3D ['file:/root/debian-blktap2.img,xvda,w']<= /o:p>

k= ernel =3D "/root/netinst/vmlinuz"

ramdisk =3D "/root/n= etinst/initrd.gz"

extra =3D "debian-installer/exit/always_hal= t=3Dtrue -- console=3Dhvc0"

= cpu_weight=3D256

=

vif=3D['bridge=3D= xenbr0']

root@dt07:~# cat debian-blktap2.cfg

name =3D "debian= -installer"

memory =3D 256

disk =3D ['file:/root/debian-blktap= 2.img,xvda,w']

bootloader =3D "pygrub"

<= p class=3DMsoNormal>extra =3D "de= bian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0"

cpu_weig= ht=3D256

vif=3D['bridge=3Dxenbr0']

 

When I try to boot the VM w= ith the above configuration I get the following error:

Parsing config file deb= ian-blktap2.cfg

libxl: debug: libxl_device.c:183:libxl__device_disk_set= _backend: Disk vdev=3Dxvda spec.backend=3Dunknown

libxl: debug: libxl_d= evice.c:137:disk_try_backend: Disk vdev=3Dxvda, backend phy unsuitable as p= hys path not a block device

libxl: debug: libxl_device.c:144:disk_try_b= ackend: Disk vdev=3Dxvda, backend tap unsuitable because blktap not availab= le

libxl: debug: libxl_device.c:219:libxl__device_disk_set_backend: Dis= k vdev=3Dxvda, using backend qdisk

libxl: debug: libxl_device.c:183:lib= xl__device_disk_set_backend: Disk vdev=3Dxvda spec.backend=3Dqdisk

libx= l: debug: libxl.c:1714:libxl_device_disk_local_attach: locally attaching qd= isk /root/debian-blktap2.img

 

libxl: error: libxl_create.c:60= 3:do_domain_create: failed to run bootloader: -3

xc: debug: hypercall b= uffer: total allocations:14 total releases:14

xc: debug: hypercall buff= er: current allocations:0 maximum allocations:2

xc: debug: hypercall bu= ffer: cache current size:2

xc: debug: hypercall buffer: cache hits:11 m= isses:2 toobig:1

 

When I try to see what goes wrong with pygrub (py= grub <image-file>), I get the following error:

Traceback (most recent ca= ll last):

  File "/usr/local/bin/pygrub", line 822, in &= lt;module>

    raise RuntimeError, "Unable to fi= nd partition containing kernel"

RuntimeError: Unable to find parti= tion containing kernel

 = ;

Does this mean that something went terribly= wrong during the installation?

&nb= sp;

I mounted the disk image file with lomoun= t, the partition table and file system in there seem to be fine. I then ext= ract the kernel and ramdisk and try without pygrub:

# bootloader =3D "py= grub"

kernel =3D "vmlinuz-2.6.32-5-amd64"

ramdisk = =3D "initrd.img-2.6.32-5-amd64"

 

This is the output of th= e new “xl create”:

Parsing config file debian-blktap2.cfg

libx= l: debug: libxl_device.c:183:libxl__device_disk_set_backend: Disk vdev=3Dxv= da spec.backend=3Dunknown

libxl: debug: libxl_device.c:137:disk_try_bac= kend: Disk vdev=3Dxvda, backend phy unsuitable as phys path not a block dev= ice

libxl: debug: libxl_device.c:144:disk_try_backend: Disk vdev=3Dxvda= , backend tap unsuitable because blktap not available

=

libxl: debug: lib= xl_device.c:219:libxl__device_disk_set_backend: Disk vdev=3Dxvda, using bac= kend qdisk

domainbuilder: detail: xc_dom_allocate: cmdline=3D"debi= an-installer/exit/always_halt=3Dtrue -- console=3Dhvc0", features=3D&q= uot;(null)"

domainbuilder: detail: xc_dom_kernel_file: filename=3D= "vmlinuz-2.6.32-5-amd64"

domainbuilder: detail: xc_dom_malloc= _filemap    : 2367 kB

domainbuilder: detail: xc_dom_ramd= isk_file: filename=3D"initrd.img-2.6.32-5-amd64"

domainbuilde= r: detail: xc_dom_malloc_filemap    : 9075 kB

domainbuil= der: detail: xc_dom_boot_xen_init: ver 4.2, caps xen-3.0-x86_64 xen-3.0-x86= _32p hvm-3.0-x86_32 hvm-3.0-x86_32p hvm-3.0-x86_64

domainbuilder: deta= il: xc_dom_parse_image: called

domainbuilder: detail: xc_dom_find_loade= r: trying multiboot-binary loader ...

domainbuilder: detail: loader pr= obe failed

domainbuilder: detail: xc_dom_find_loader: trying Linux bzIm= age loader ...

domainbuilder: detail: xc_dom_malloc   &= nbsp;        : 11914 kB

domainbuilde= r: detail: xc_dom_do_gunzip: unzip ok, 0x2485c8 -> 0xba2b00

domainbu= ilder: detail: loader probe OK

xc: detail: elf_parse_binary: phdr: padd= r=3D0x1000000 memsz=3D0x42d000

xc: detail: elf_parse_binary: phdr: padd= r=3D0x142d000 memsz=3D0xd6150

xc: detail: elf_parse_binary: phdr: paddr= =3D0x1504000 memsz=3D0x888

xc: detail: elf_parse_binary: phdr: paddr=3D= 0x1505000 memsz=3D0x160d8

xc: detail: elf_parse_binary: phdr: paddr=3D0= x151c000 memsz=3D0x1de000

xc: detail: elf_parse_binary: memory: 0x10000= 00 -> 0x16fa000

xc: detail: elf_xen_parse_note: GUEST_OS =3D "l= inux"

xc: detail: elf_xen_parse_note: GUEST_VERSION =3D "2.6&= quot;

xc: detail: elf_xen_parse_note: XEN_VERSION =3D "xen-3.0&quo= t;

xc: detail: elf_xen_parse_note: VIRT_BASE =3D 0xffffffff80000000

xc: detail: elf_xen_parse_note: ENTRY =3D 0xffffffff8151c200

xc: detai= l: elf_xen_parse_note: HYPERCALL_PAGE =3D 0xffffffff81009000

xc: detail= : elf_xen_parse_note: FEATURES =3D "!writable_page_tables|pae_pgdir_ab= ove_4gb"

xc: detail: elf_xen_parse_note: PAE_MODE =3D "yes&qu= ot;

xc: detail: elf_xen_parse_note: LOADER =3D "generic"=

= xc: detail: elf_xen_parse_note: unknown xen elf note (0xd)

xc: detail: = elf_xen_parse_note: SUSPEND_CANCEL =3D 0x1

xc: detail: elf_xen_parse_no= te: HV_START_LOW =3D 0xffff800000000000

xc: detail: elf_xen_parse_note:= PADDR_OFFSET =3D 0x0

xc: detail: elf_xen_addr_calc_check: addresses:

xc: detail:     virt_base    &nb= sp;   =3D 0xffffffff80000000

xc: detail:   &nb= sp; elf_paddr_offset =3D 0x0

xc: detail:     virt_o= ffset      =3D 0xffffffff80000000

xc: detail:&= nbsp;    virt_kstart      =3D 0xfff= fffff81000000

xc: detail:     virt_kend  =       =3D 0xffffffff816fa000

=

xc: detail: =     virt_entry       =3D 0xfff= fffff8151c200

xc: detail:     p2m_base  &= nbsp;      =3D 0xffffffffffffffff

domainbuilde= r: detail: xc_dom_parse_elf_kernel: xen-3.0-x86_64: 0xffffffff81000000 ->= ; 0xffffffff816fa000

domainbuilder: detail: xc_dom_mem_init: mem 256 M= B, pages 0x10000 pages, 4k each

<= span style=3D'font-family:Consolas'>domainbuilder: detail: xc_dom_mem_init:= 0x10000 pages

domainbuilder: detail: xc_dom_boot_mem_init: called=

= domainbuilder: detail: x86_compat: guest xen-3.0-x86_64, address size 64

domainbuilder: detail: xc_dom_malloc       =      : 512 kB

domainbuilder: detail: xc_dom_bu= ild_image: called

domainbuilder: detail: xc_dom_alloc_segment: &nb= sp; kernel       : 0xffffffff81000000 -> 0= xffffffff816fa000  (pfn 0x1000 + 0x6fa pages)

domainbuilder: detai= l: xc_dom_pfn_to_ptr: domU mapping: pfn 0x1000+0x6fa at 0x7f3a5921f000=

= xc: detail: elf_load_binary: phdr 0 at 0x0x7f3a5921f000 -> 0x0x7f3a5964c= 000

xc: detail: elf_load_binary: phdr 1 at 0x0x7f3a5964c000 -> 0x0x7= f3a59722150

xc: detail: elf_load_binary: phdr 2 at 0x0x7f3a59723000 -&g= t; 0x0x7f3a59723888

xc: detail: elf_load_binary: phdr 3 at 0x0x7f3a59= 724000 -> 0x0x7f3a5973a0d8

xc: detail: elf_load_binary: phdr 4 at 0x= 0x7f3a5973b000 -> 0x0x7f3a597c1000

domainbuilder: detail: xc_dom_all= oc_segment:   ramdisk      : 0xffffffff8= 16fa000 -> 0xffffffff83117000  (pfn 0x16fa + 0x1a1d pages)

doma= inbuilder: detail: xc_dom_malloc       &= nbsp;    : 156 kB

= domainbuilder: detail: xc_dom_pfn_to_p= tr: domU mapping: pfn 0x16fa+0x1a1d at 0x7f3a57802000

=

domainbuilder: de= tail: xc_dom_do_gunzip: unzip ok, 0x8dcc4c -> 0x1a1c010

domainbuilde= r: detail: xc_dom_alloc_segment:   phys2mach    : = 0xffffffff83117000 -> 0xffffffff83197000  (pfn 0x3117 + 0x80 pages)=

domainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x3117+0x8= 0 at 0x7f3a5cd6f000

domainbuilder: detail: xc_dom_alloc_page &nb= sp; :   start info   : 0xffffffff83197000 (pfn 0x3197)<= o:p>

domainbuilder: detail: xc_dom_alloc_page   :   xens= tore     : 0xffffffff83198000 (pfn 0x3198)

domainbu= ilder: detail: xc_dom_alloc_page   :   console &nb= sp;    : 0xffffffff83199000 (pfn 0x3199)

domainbuilder: = detail: nr_page_tables: 0x0000ffffffffffff/48: 0xffff000000000000 -> 0xf= fffffffffffffff, 1 table(s)

domainbuilder: detail: nr_page_tables: 0x00= 00007fffffffff/39: 0xffffff8000000000 -> 0xffffffffffffffff, 1 table(s)<= o:p>

domainbuilder: detail: nr_page_tables: 0x000000003fffffff/30: 0xfffffff= f80000000 -> 0xffffffffbfffffff, 1 table(s)

domainbuilder: detail: n= r_page_tables: 0x00000000001fffff/21: 0xffffffff80000000 -> 0xffffffff83= 3fffff, 26 table(s)

domainbuilder: detail: xc_dom_alloc_segment: = ;  page tables  : 0xffffffff8319a000 -> 0xffffffff831b7000&nbs= p; (pfn 0x319a + 0x1d pages)

domainbuilder: detail: xc_dom_pfn_to_ptr: = domU mapping: pfn 0x319a+0x1d at 0x7f3a5cd52000

domainbuilder: detail: = xc_dom_alloc_page   :   boot stack   : 0xffff= ffff831b7000 (pfn 0x31b7)

domainbuilder: detail: xc_dom_build_image&nbs= p; : virt_alloc_end : 0xffffffff831b8000

domainbuilder: detail: xc_dom_= build_image  : virt_pgtab_end : 0xffffffff83400000

domainbuilder: = detail: xc_dom_boot_image: called

domainbuilder: detail: arch_setup_boo= tearly: doing nothing

domainbuilder: detail: xc_dom_compat_check: suppo= rted guest type: xen-3.0-x86_64 <=3D matches

domainbuilder: detail: = xc_dom_compat_check: supported guest type: xen-3.0-x86_32p

domainbuilde= r: detail: xc_dom_compat_check: supported guest type: hvm-3.0-x86_32

do= mainbuilder: detail: xc_dom_compat_check: supported guest type: hvm-3.0-x86= _32p

domainbuilder: detail: xc_dom_compat_check: supported guest type: = hvm-3.0-x86_64

domainbuilder: detail: xc_dom_update_guest_p2m: dst 64bi= t, pages 0x10000

domainbuilder: detail: clear_page: pfn 0x3199, mfn 0x2= 125d8

domainbuilder: detail: clear_page: pfn 0x3198, mfn 0x2125d9<= /o:p>

d= omainbuilder: detail: xc_dom_pfn_to_ptr: domU mapping: pfn 0x3197+0x1 at 0x= 7f3a5ce80000

domainbuilder: detail: start_info_x86_64: called

domai= nbuilder: detail: setup_hypercall_page: vaddr=3D0xffffffff81009000 pfn=3D0x= 1009

domainbuilder: detail: domain builder memory footprint<= /span>

domainb= uilder: detail:    allocated

domainbuilder: detail:&nb= sp;      malloc      = ;       : 12631 kB

domainbuilder: detail:=       anon mmap     = ;     : 0 bytes

domainbuilder: detail:  &= nbsp; mapped

domainbuilder: detail:      = file mmap          : 11442 kB=

domainbuilder: detail:       domU mmap&n= bsp;         : 33 MB

domainbuil= der: detail: arch_setup_bootlate: shared_info: pfn 0x0, mfn 0x95b9e

dom= ainbuilder: detail: shared_info_x86_64: called

domainbuilder: detail: v= cpu_x86_64: called

domainbuilder: detail: vcpu_x86_64: cr3: pfn 0x319a = mfn 0x2125d7

domainbuilder: detail: launch_vm: called, ctxt=3D0x7fffdec= 2f5b0

domainbuilder: detail: xc_dom_release: called

libxl: debug: l= ibxl_device.c:183:libxl__device_disk_set_backend: Disk vdev=3Dxvda spec.bac= kend=3Dqdisk

libxl: debug: libxl_dm.c:996:libxl__create_device_model: S= pawning device-model /usr/lib/xen/bin/qemu-system-i386 with arguments:=

= libxl: debug: libxl_dm.c:998:libxl__create_device_model:   /usr/l= ib/xen/bin/qemu-system-i386

libxl: debug: libxl_dm.c:998:libxl__create_= device_model:   -xen-domid

libxl: debug: libxl_dm.c:998:libxl= __create_device_model:   24

libxl: debug: libxl_dm.c:998:libx= l__create_device_model:   -chardev

libxl: debug: libxl_dm.c:= 998:libxl__create_device_model:   socket,id=3Dlibxl-cmd,path=3D/v= ar/run/xen/qmp-libxl-24,server,nowait

libxl: debug: libxl_dm.c:998:libx= l__create_device_model:   -mon

libxl: debug: libxl_dm.c:998:l= ibxl__create_device_model:   chardev=3Dlibxl-cmd,mode=3Dcontrol

libxl: debug: libxl_dm.c:998:libxl__create_device_model:   -xe= n-attach

libxl: debug: libxl_dm.c:998:libxl__create_device_model: =   -name

libxl: debug: libxl_dm.c:998:libxl__create_device_model:&n= bsp;  debian

libxl: debug: libxl_dm.c:998:libxl__create_device_mod= el:   -nographic

libxl: debug: libxl_dm.c:998:libxl__create_d= evice_model:   -M

libxl: debug: libxl_dm.c:998:libxl__create_= device_model:   xenpv

<= span style=3D'font-family:Consolas'>libxl: debug: libxl_dm.c:998:libxl__cre= ate_device_model:   -m

= libxl: debug: libxl_dm.c:998:libxl__cr= eate_device_model:   257

libxl: debug: libxl_qmp.c:692:libxl_= _qmp_initialize: connected to /var/run/xen/qmp-libxl-24

libxl: debug: l= ibxl_qmp.c:298:qmp_handle_response: message type: qmp

=

libxl: debug: lib= xl_qmp.c:555:qmp_send_prepare: next qmp command: '{"execute":&quo= t;qmp_capabilities","id":1}'

libxl: debug: libxl_qmp.c= :298:qmp_handle_response: message type: return

libxl: debug: libxl_qmp.= c:555:qmp_send_prepare: next qmp command: '{"execute":"query= -chardev","id":2}'

libxl: debug: libxl_qmp.c:298:qmp_han= dle_response: message type: return

libxl: debug: libxl_qmp.c:555:qmp_se= nd_prepare: next qmp command: '{"execute":"query-vnc",&= quot;id":3}'

libxl: debug: libxl_qmp.c:298:qmp_handle_response: me= ssage type: return

Daemon running with PID 6479

xc: debug: hypercal= l buffer: total allocations:153 total releases:153

xc: debug: hypercall= buffer: current allocations:0 maximum allocations:2

<= p class=3DMsoNormal>xc: debug: hyperca= ll buffer: cache current size:2

<= span style=3D'font-family:Consolas'>xc: debug: hypercall buffer: cache hits= :148 misses:2 toobig:3

 = ;

I don’t know how to interpret the abo= ve output. When I try to connect to the domain via “xl console”= , I get the following output:

[    0.000000] Initializing cgrou= p subsys cpuset

[    0.000000] Initializing cgroup subsy= s cpu

[    0.000000] Linux version 2.6.32-5-amd64 (Debia= n 2.6.32-45) (dannf@debian.org) (gcc version 4.3.5 (Debian 4.3.5-4) ) #1 SM= P Sun May 6 04:00:17 UTC 2012

[    0.000000] Command lin= e: debian-installer/exit/always_halt=3Dtrue -- console=3Dhvc0

[ &n= bsp;  0.000000] KERNEL supported cpus:

[    0.000= 000]   Intel GenuineIntel

[    0.000000] =   AMD AuthenticAMD

[    0.000000]   Centa= ur CentaurHauls

[    0.000000] ACPI in unprivileged doma= in disabled

[    0.000000] BIOS-provided physical RAM ma= p:

[    0.000000]  Xen: 0000000000000000 - 00000000= 000a0000 (usable)

[    0.000000]  Xen: 00000000000a= 0000 - 0000000000100000 (reserved)

[    0.000000]  = Xen: 0000000000100000 - 0000000010000000 (usable)

[    0= .000000] DMI not present or invalid.

[    0.000000] last= _pfn =3D 0x10000 max_arch_pfn =3D 0x400000000

[    0.000= 000] init_memory_mapping: 0000000000000000-0000000010000000

[ &nbs= p;  0.000000] RAMDISK: 016fa000 - 03117000

[    0.0= 00000] No NUMA configuration found

[    0.000000] Faking= a node at 0000000000000000-0000000010000000

[    0.000= 000] Bootmem setup node 0 0000000000000000-0000000010000000

[ &nbs= p;  0.000000]   NODE_DATA [000000000006a000 - 0000000000071f= ff]

[    0.000000]   bootmap [0000000000072000= -  0000000000073fff] pages 2

[    0.000000] (7 ear= ly reservations) =3D=3D> bootmem [0000000000 - 0010000000]

[ &n= bsp;  0.000000]   #0 [0000000000 - 0000001000]   B= IOS data page =3D=3D> [0000000000 - 0000001000]

[    = 0.000000]   #1 [000319a000 - 00031b7000]   XEN PAGETABL= ES =3D=3D> [000319a000 - 00031b7000]

[    0.000000]&n= bsp;  #2 [0000006000 - 0000008000]      = TRAMPOLINE =3D=3D> [0000006000 - 0000008000]

[    0.= 000000]   #3 [0001000000 - 00016d95c4]    TEXT DAT= A BSS =3D=3D> [0001000000 - 00016d95c4]

[    0.000000= ]   #4 [00016fa000 - 0003117000]     &nb= sp;    RAMDISK =3D=3D> [00016fa000 - 0003117000]

[&nb= sp;   0.000000]   #5 [0003117000 - 000319a000]  &n= bsp;XEN START INFO =3D=3D> [0003117000 - 000319a000]

[  &n= bsp; 0.000000]   #6 [0000008000 - 000006a000]   &n= bsp;      PGTABLE =3D=3D> [0000008000 - 000006a= 000]

[    0.000000] Zone PFN ranges:

[  &n= bsp; 0.000000]   DMA      0x00000000 -&g= t; 0x00001000

[    0.000000]   DMA32 &nbs= p;  0x00001000 -> 0x00100000

[    0.000000] = ;  Normal   0x00100000 -> 0x00100000

[  &nb= sp; 0.000000] Movable zone start PFN for each node

[    = 0.000000] early_node_map[2] active PFN ranges

[    0.000= 000]     0: 0x00000000 -> 0x000000a0

[ &nbs= p;  0.000000]     0: 0x00000100 -> 0x00010000

[    0.000000] SFI: Simple Firmware Interface v0.7 http:/= /simplefirmware.org

[    0.000000] SMP: Allowing 1 CPU= s, 0 hotplug CPUs

[    0.000000] No local APIC present

[    0.000000] APIC: disable apic facility

[ &nb= sp;  0.000000] PM: Registered nosave memory: 00000000000a0000 - 000000= 0000100000

[    0.000000] Allocating PCI resources start= ing at 10000000 (gap: 10000000:f0000000)

[    0.000000] = Booting paravirtualized kernel on Xen

[    0.000000] Xen= version: 4.2-unstable (preserve-AD)

[    0.000000] NR_C= PUS:512 nr_cpumask_bits:512 nr_cpu_ids:1 nr_node_ids:1

[  &nb= sp; 0.000000] PERCPU: Embedded 30 pages/cpu @ffff8800031ed000 s90328 r8192 = d24360 u122880

[    0.000000] pcpu-alloc: s90328 r8192 d= 24360 u122880 alloc=3D30*4096

[    0.000000] pcpu-alloc:= [0] 0

[    0.000000] Xen: using vcpu_info placement

[    0.000000] Built 1 zonelists in Node order, mobility g= rouping on.  Total pages: 64443

[    0.000000] Poli= cy zone: DMA32

[    0.000000] Kernel command line: debia= n-installer/exit/always_halt=3Dtrue -- console=3Dhvc0

=

[  &nbs= p; 0.000000] PID hash table entries: 1024 (order: 1, 8192 bytes)=

[ = ;   0.000000] Initializing CPU#0

[    0.000000= ] Checking aperture...

[    0.000000] No AGP bridge foun= d

[    0.000000] Memory: 222956k/262144k available (3083= k kernel code, 384k absent, 38804k reserved, 2048k data, 592k init)

[&n= bsp;   0.000000] SLUB: Genslabs=3D14, HWalign=3D64, Order=3D0-3, = MinObjects=3D0, CPUs=3D1, Nodes=3D1

[    0.000000] Hiera= rchical RCU implementation.

[    0.000000] NR_IRQS:4352 = nr_irqs:256

[    0.000000] Console: colour dummy device = 80x25

[    0.000000] console [tty0] enabled

[ &= nbsp;  0.000000] console [hvc0] enabled

[    0.000= 000] installing Xen timer for CPU 0

[    0.000000] Detec= ted 2660.052 MHz processor.

[    0.004000] Calibrating d= elay loop (skipped), value calculated using timer frequency.. 5320.10 BogoM= IPS (lpj=3D10640208)

[    0.004000] Security Framework = initialized

[    0.004000] SELinux:  Disabled at bo= ot.

[    0.004000] Dentry cache hash table entries: 3276= 8 (order: 6, 262144 bytes)

[    0.004000] Inode-cache ha= sh table entries: 16384 (order: 5, 131072 bytes)

[    0.= 004000] Mount-cache hash table entries: 256

[    0.004= 000] Initializing cgroup subsys ns

[    0.004000] Initia= lizing cgroup subsys cpuacct

[    0.004000] Initializing= cgroup subsys devices

[    0.004000] Initializing cgrou= p subsys freezer

[    0.004000] Initializing cgroup subs= ys net_cls

[    0.004000] CPU: L1 I cache: 32K, L1 D cac= he: 32K

[    0.004000] CPU: L2 cache: 256K

[ &n= bsp;  0.004000] CPU: L3 cache: 8192K

[    0.004000]= CPU 0/0x6 -> Node 0

[    0.004000] CPU: Unsupported = number of siblings 16

[    0.004000] Performance Events:= unsupported p6 CPU model 30 no PMU driver, software events only.

[&nbs= p;   0.004000] SMP alternatives: switching to UP code<= /span>

[ =    0.004000] Freeing SMP alternatives: 28k freed

[  = ;  0.004240] Brought up 1 CPUs

[    0.004439] devtm= pfs: initialized

[    0.011965] Grant table initialized<= o:p>

[    0.011978] regulator: core version 0.5

[ &n= bsp;  0.012024] NET: Registered protocol family 16

[  &n= bsp; 0.012331] PCI: Fatal: No config space access function found=

[ = ;   0.012777] bio: create slab <bio-0> at 0

[ &nbs= p;  0.012899] ACPI: Interpreter disabled.

[    0.01= 2941] xen_balloon: Initialising balloon driver.

[    0.0= 12941] vgaarb: loaded

[    0.012941] PCI: System does no= t support PCI

[    0.012941] PCI: System does not suppor= t PCI

[    0.012941] Switching to clocksource xen

[&= nbsp;   0.014224] pnp: PnP ACPI: disabled

[   = 0.014597] NET: Registered protocol family 2

[    0.014= 715] IP route cache hash table entries: 2048 (order: 2, 16384 bytes)

[&= nbsp;   0.015113] TCP established hash table entries: 8192 (order= : 5, 131072 bytes)

[    0.015254] TCP bind hash table en= tries: 8192 (order: 5, 131072 bytes)

[    0.015342] TCP:= Hash tables configured (established 8192 bind 8192)

<= p class=3DMsoNormal>[   = ; 0.015353] TCP reno registered

<= span style=3D'font-family:Consolas'>[    0.015447] NET: Regi= stered protocol family 1

[    0.015526] Unpacking initra= mfs...

[    0.046953] Freeing initrd memory: 26740k free= d

[    0.056738] platform rtc_cmos: registered platform = RTC device (no PNP device found)

= [    0.057076] audit: i= nitializing netlink socket (disabled)

[    0.057102] typ= e=3D2000 audit(1339162066.687:1): initialized

[    0.063= 338] HugeTLB registered 2 MB page size, pre-allocated 0 pages

[ &n= bsp;  0.065855] VFS: Disk quotas dquot_6.5.2

[    0= .065951] Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

[&nb= sp;   0.066095] msgmni has been set to 487

<= p class=3DMsoNormal>[   = ; 0.066412] alg: No test for stdrng (krng)

[    0.066515= ] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)=

= [    0.066530] io scheduler noop registered

[  = ;  0.066537] io scheduler anticipatory registered

[  &nb= sp; 0.066546] io scheduler deadline registered

[    0.06= 6652] io scheduler cfq registered (default)

[    0.070= 219] Linux agpgart interface v0.103

[    0.070279] Seria= l: 8250/16550 driver, 4 ports, IRQ sharing enabled

[    = 0.070573] input: Macintosh mouse button emulation as /devices/virtual/input= /input0

[    0.070662] PNP: No PS/2 controller found. Pr= obing ports directly.

[    0.071502] i8042.c: No control= ler found.

[    0.071613] mice: PS/2 mouse device common= for all mice

[    0.071702] rtc_cmos: probe of rtc_cmos= failed with error -16

[    0.071744] cpuidle: using gov= ernor ladder

[    0.071753] cpuidle: using governor menu=

[    0.071765] No iBFT detected.

<= p class=3DMsoNormal>[   = ; 0.072238] TCP cubic registered

= [    0.072448] NET: Reg= istered protocol family 10

[    0.073558] Mobile IPv6

[    0.073571] NET: Registered protocol family 17

[&nb= sp;   0.073723] registered taskstats version 1<= /p>

[  &= nbsp; 0.073746] XENBUS: Device with no driver: device/vbd/51712<= /span>

[ =    0.073754] XENBUS: Device with no driver: device/vif/0

[&nb= sp;   0.073788] /build/buildd-linux-2.6_2.6.32-45-amd64-FcX7RM/li= nux-2.6-2.6.32/debian/build/source_amd64_none/drivers/rtc/hctosys.c: unable= to open rtc device (rtc0)

[    0.073852] Initalizing ne= twork drop monitor service

[    0.073962] Freeing unused= kernel memory: 592k freed

[    0.074170] Write protecti= ng the kernel read-only data: 4240k

Loading, please wait...<= /span>

[ =    0.140302] udev[46]: starting version 164

=

[  &nbs= p; 0.224372] Initialising Xen virtual ethernet driver.

[  &nb= sp; 0.231454] blkfront: xvda: barriers enabled

[    0.23= 1630]  xvda: xvda1 xvda2 < xvda5 >

Begin: Loading essential = drivers ... done.

Begin: Running /scripts/init-premount ... done.<= /o:p>

B= egin: Mounting root file system ... Begin: Running /scripts/local-top ... d= one.

Begin: Running /scripts/local-premount ... [    0.5= 34766] PM: Starting manual resume from disk

done.

mount: can't re= ad '/etc/fstab': No such file or directory

Begin: Running /scripts/loca= l-bottom ... done.

done.

Begin: Running /scripts/init-bottom ... mo= unt: mounting /dev on /root/dev failed: No such file or directory

done.=

mount: mounting /sys on /root/sys failed: No such file or directory

mount: mounting /proc on /root/proc failed: No such file or directory

Target filesystem doesn't have requested /sbin/init.

=

No init found. Tr= y passing init=3D bootarg.

 

 

BusyBox v1.17.1 (Debia= n 1:1.17.1-8) built-in shell (ash)

Enter 'help' for a list of built-in = commands.

 

/bin/sh: can't access tty; job control turned off=

(initramfs)

(initramfs)

 

So, what am I doing wrong?<= /o:p>

 

Reg= ards

 

--

Thanos Makatos

<= p class=3DMsoNormal> 

= --_000_4B45B535F7F6BE4CB1C044ED5115CDDEED64F7E361LONPMAILBOX01_-- --===============0725551985205855416== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users --===============0725551985205855416==-- From xen-users-bounces@lists.xen.org Sun Jun 10 03:43:27 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 10 Jun 2012 03:43:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SdZ2R-00071y-6p; Sun, 10 Jun 2012 03:42:03 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Sd2oN-0002YC-2J for xen-users@lists.xen.org; Fri, 08 Jun 2012 17:17:24 +0000 Received: from [85.158.143.99:48475] by server-3.bemta-4.messagelabs.com id A2/62-29237-2A332DF4; Fri, 08 Jun 2012 17:17:22 +0000 X-Env-Sender: mythtv@hocken.net X-Msg-Ref: server-7.tower-216.messagelabs.com!1339175839!28593086!1 X-Originating-IP: [62.153.159.240] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMTUzLjE1OS4yNDAgPT4gMTE1MzQx\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 2490 invoked from network); 8 Jun 2012 17:17:20 -0000 Received: from mailoutvans01.telekom-dienste.de (HELO mailoutvans01.telekom-dienste.de) (62.153.159.240) by server-7.tower-216.messagelabs.com with SMTP; 8 Jun 2012 17:17:19 -0000 Received: from fwd20.aul.t-online.de (fwd20.aul.t-online.de ) by mailoutvans01.telekom-dienste.de with smtp id 1Sd2oJ-0000w5-Hk; Fri, 08 Jun 2012 19:17:19 +0200 Received: from mail-yw0-f45.google.com (TtsTh+ZLYtJK9miwMKotR85+2VPQ5wb4rMsZsAf9RAjFyJW19D9SqlJzyMMcNbO2RcnfSHg6Rt@[209.85.213.45]) by fwd20.webpage.t-com.de with esmtp id 1Sd2oF-17PkRs0; Fri, 8 Jun 2012 19:17:15 +0200 Received: by yhoo21 with SMTP id o21so1712852yho.32 for ; Fri, 08 Jun 2012 10:17:14 -0700 (PDT) MIME-Version: 1.0 Received: by 10.50.236.74 with SMTP id us10mr3123158igc.29.1339175834096; Fri, 08 Jun 2012 10:17:14 -0700 (PDT) Received: by 10.231.70.145 with HTTP; Fri, 8 Jun 2012 10:17:13 -0700 (PDT) Date: Fri, 8 Jun 2012 19:17:13 +0200 Message-ID: From: Christian To: xen-users@lists.xen.org Content-Type: multipart/mixed; boundary=14dae9340af5e2137804c1f92bb2 X-ID: TtsTh+ZLYtJK9miwMKotR85+2VPQ5wb4rMsZsAf9RAjFyJW19D9SqlJzyMMcNbO2RcnfSHg6Rt X-TOI-MSGID: 4ddc57c3-2cf0-4978-be29-25dfe461edeb X-Mailman-Approved-At: Sun, 10 Jun 2012 03:42:00 +0000 Subject: [Xen-users] PCI passthrough to PV guest - domU kernel panic when using iommu=soft X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --14dae9340af5e2137804c1f92bb2 Content-Type: multipart/alternative; boundary=14dae9340af5e2136f04c1f92bb0 --14dae9340af5e2136f04c1f92bb0 Content-Type: text/plain; charset=ISO-8859-1 Hi everybody, I followed the tutorial at http://wiki.xen.org/wiki/Xen_PCI_Passthrough to passthrough a PCI-Device (DVB-C Tuner Card [saa7146 device]) to a pv xen guest. My system ist based on an Asus M4N78 Pro motherboard + an AMD X4 600e processor and thus does not come with native IOMMU support. Both, dom0 and domU are based on Ubuntu 12.04 with Xen 4.1.2 from official repositories. I set up a pv domU guest system that works flawlessly. However, when I try to boot the guest with iommu=soft as a kernel-parameter the domU crashes with a kernel panic. The kernel panic does not seem to be related to an assigned PCI device, since the guest crashes even if no PCI device is passed. Here's an excerpt of the guest system's boot log: (early) [ 0.000000] Kernel command line: root=/dev/xvda1 iommu=soft debug loglevel=10 earlyprintk=xenboot console=hvc0 ro xencons=tty (early) [ 0.000000] PID hash table entries: 2048 (order: 2, 16384 bytes) (early) [ 0.000000] Xen-SWIOTLB: Lowering to 32MB (early) [ 0.000000] Xen-SWIOTLB: Lowering to 16MB (early) [ 0.000000] Xen-SWIOTLB: Lowering to 8MB (early) [ 0.000000] Kernel panic - not syncing: Failed to get contiguous memory for DMA from Xen! (early) [ 0.000000] You either: don't have the permissions, do not have enough free memory under 4GB, or the hypervisor memoryis too fragmented! (rc:-12) (early) [ 0.000000] Pid: 0, comm: swapper Not tainted 3.2.0-24-generic #39-Ubuntu (early) [ 0.000000] Call Trace: (early) [ 0.000000] [] panic+0x91/0x1a4 (early) [ 0.000000] [] xen_swiotlb_init+0x185/0x1e1 (early) [ 0.000000] [] ? pci_swiotlb_late_init+0x29/0x29 (early) [ 0.000000] [] ? pci_swiotlb_detect_4gb+0x2c/0x2c (early) [ 0.000000] [] ? bad_to_user+0x7f6/0x7f6 (early) [ 0.000000] [] pci_xen_swiotlb_init+0x17/0x29 (early) [ 0.000000] [] pci_iommu_alloc+0x57/0x6f (early) [ 0.000000] [] mem_init+0x19/0xec (early) [ 0.000000] [] start_kernel+0x1da/0x3c7 (early) [ 0.000000] [] x86_64_start_reservations+0x132/0x136 (early) [ 0.000000] [] xen_start_kernel+0x5bc/0x5c3 Some more information about my configuration: Dom0 (ubuntu 12.04, 3.2.0-24-generic #39-Ubuntu): * Kernel parameter pci=resource_alignment=01:05.0 set. * xen-pciback is loaded as module with options in /etc/modprobe.d/xen-pciback.conf: # hide (0000:01:05.0) options xen-pciback passthrough=1 options xen-pciback permissive options xen-pciback hide=(0000:01:05.0) * saa7146 driver is blacklisted: /etc/modprobe.d/blacklist-saa7146.conf: blacklist saa7146 * xm pci-list-assignable-devices lists mentioned PCI device * guest's xen.cfg looks as follows: kernel = "/usr/local/xendomains/precise_test/kernel.img" ramdisk = "/usr/local/xendomains/precise_test/initrd.img" memory = 512 vcpus = 1 name = "precisetest" vif = [ 'mac=00:16:00:00:42:23' ] disk = [ 'file:/usr/local/xendomains/precise_test/xvda.img,xvda,w' ] root = "/dev/xvda1" pci = [ '01:05.0' ] extra = "iommu=soft debug loglevel=10 earlyprintk=xenboot console=hvc0 ro xencons=tty" DomU ubuntu 12.04, 3.2.0-24-generic #39-Ubuntu): * xen-pcifront is loaded as module * System starts when iommu=soft is not set and lspci shows passed device. However, the device is not usable At this point I got stuck and have no clue how to further debug my setup. The log files of both systems are attached. Please let me know, if I missed something. Thank you very much for your support best regards Christian --14dae9340af5e2136f04c1f92bb0 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi everybody,

I followe= d the tutorial at=A0http://wiki.xen.org/wiki/Xen_PCI_Passthrough=A0to p= assthrough a PCI-Device (DVB-C Tuner Card [saa7146 device]) to a pv xen gue= st. My system ist based on an Asus M4N78 Pro motherboard + an AMD X4 600e p= rocessor and thus does not come with native IOMMU support. Both, dom0 and d= omU are based on Ubuntu 12.04 with Xen 4.1.2 from official repositories.
I set up a pv domU guest system that works flawlessly. However, when I= try to boot the guest with iommu=3Dsoft as a kernel-parameter the domU cra= shes with a kernel panic. The kernel panic does not seem to be related to a= n assigned PCI device, since the guest crashes even if no PCI device is pas= sed.=A0

Here's an excerpt of the guest system's boot lo= g:
(early) [ =A0 =A00.000000] Kernel command line: root=3D/d= ev/xvda1 iommu=3Dsoft debug loglevel=3D10 earlyprintk=3Dxenboot console=3Dh= vc0 ro xencons=3Dtty
(early) [ =A0 =A00.000000] PID hash table entries: 2048 (order: 2, 163= 84 bytes)
(early) [ =A0 =A00.000000] Xen-SWIOTLB: Lowering to 32M= B
(early) [ =A0 =A00.000000] Xen-SWIOTLB: Lowering to 16MB
<= div>(early) [ =A0 =A00.000000] Xen-SWIOTLB: Lowering to 8MB
(early) [ =A0 =A00.000000] Kernel panic - not syncing: Failed to get c= ontiguous memory for DMA from Xen!
(early) [ =A0 =A00.000000] You= either: don't have the permissions, do not have enough free memory und= er 4GB, or the hypervisor memoryis too fragmented! (rc:-12)
(early) [ =A0 =A00.000000] Pid: 0, comm: swapper Not tainted 3.2.0-24-= generic #39-Ubuntu
(early) [ =A0 =A00.000000] Call Trace:
(early) [ =A0 =A00.000000] =A0[<ffffffff8164434a>] panic+0x91/0x1a= 4
(early) [ =A0 =A00.000000] =A0[<ffffffff81d2ecd4>] xen_swiotlb_init+0= x185/0x1e1
(early) [ =A0 =A00.000000] =A0[<ffffffff81d0e596>= ;] ? pci_swiotlb_late_init+0x29/0x29
(early) [ =A0 =A00.000000] = =A0[<ffffffff81d0e56d>] ? pci_swiotlb_detect_4gb+0x2c/0x2c
(early) [ =A0 =A00.000000] =A0[<ffffffff81669cac>] ? bad_to_user= +0x7f6/0x7f6
(early) [ =A0 =A00.000000] =A0[<ffffffff81d00d78&= gt;] pci_xen_swiotlb_init+0x17/0x29
(early) [ =A0 =A00.000000] = =A0[<ffffffff81d03b4e>] pci_iommu_alloc+0x57/0x6f
(early) [ =A0 =A00.000000] =A0[<ffffffff81d10fa3>] mem_init+0x19= /0xec
(early) [ =A0 =A00.000000] =A0[<ffffffff81cfba2d>] st= art_kernel+0x1da/0x3c7
(early) [ =A0 =A00.000000] =A0[<fffffff= f81cfb388>] x86_64_start_reservations+0x132/0x136
(early) [ =A0 =A00.000000] =A0[<ffffffff81cfef06>] xen_start_ker= nel+0x5bc/0x5c3



Some more information about my configuration:

Do= m0 (ubuntu 12.04, 3.2.0-24-generic #39-Ubuntu):
* Kernel parameter=A0pci=3Dresource_alignment=3D01:05.0 set.

* xen-pciback is loaded as module with options in /etc/modp= robe.d/xen-pciback.conf:
# hide (0000:01:05.0)
opt= ions xen-pciback passthrough=3D1
options xen-pciback permissive
options xen-pciback hide=3D(0= 000:01:05.0)=A0

* saa7146 driver is blacklis= ted:
/etc/modprobe.d/blacklist-saa7146.conf:
black= list saa7146

* xm pci-list-assignable-devices lists mentioned = PCI device

* guest's xen.cfg looks as follows:=
kernel =3D "/usr/local/xendomains/precise_test/kernel.= img"
ramdisk =3D "/usr/local/xendomains/precise_test/initrd.img"<= /div>
memory =3D 512
vcpus =3D 1
name =3D "pre= cisetest"
vif =3D [ 'mac=3D00:16:00:00:42:23' ]
disk =3D [ 'file:/usr/local/xendomains/precise_test/xvda.img,xvda= ,w' =A0]
root =3D "/dev/xvda1"
pci =3D [ '01:05.0' = ]
extra =3D "iommu=3Dsoft debug loglevel=3D10 earlyprintk=3D= xenboot console=3Dhvc0 ro xencons=3Dtty"


DomU ubuntu 12.04,=A03.2.0-24-generic #39-Ubuntu):
* xen-pci= front is loaded as module

* System starts when iommu=3Dsoft is not set and lspci = shows passed device. However, the device is not usable

=
At this point I got stuck and have no clue how to further debug my set= up.=A0The log files of both systems are attached. Please let me know, if I = missed something.

Thank you very much for your support

best regards
Christian


=



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--14dae9340af5e2137804c1f92bb2 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users --14dae9340af5e2137804c1f92bb2-- From xen-devel-bounces@lists.xen.org Tue Jun 12 12:07:18 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 Jun 2012 12:07:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SePsG-0003mC-UC; Tue, 12 Jun 2012 12:07:04 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SeAVN-0003b3-ON for Xen-devel@lists.xensource.com; Mon, 11 Jun 2012 19:42:27 +0000 Received: from [85.158.143.35:16653] by server-1.bemta-4.messagelabs.com id 08/28-24392-02A46DF4; Mon, 11 Jun 2012 19:42:24 +0000 X-Env-Sender: mukesh.rathor@oracle.com X-Msg-Ref: server-11.tower-21.messagelabs.com!1339443740!11390857!1 X-Originating-IP: [141.146.126.227] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTQxLjE0Ni4xMjYuMjI3ID0+IDU4Mjc3OQ==\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 12310 invoked from network); 11 Jun 2012 19:42:22 -0000 Received: from acsinet15.oracle.com (HELO acsinet15.oracle.com) (141.146.126.227) by server-11.tower-21.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 11 Jun 2012 19:42:22 -0000 Received: from ucsinet22.oracle.com (ucsinet22.oracle.com [156.151.31.94]) by acsinet15.oracle.com (Sentrion-MTA-4.2.2/Sentrion-MTA-4.2.2) with ESMTP id q5BJgH5l004676 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 11 Jun 2012 19:42:18 GMT Received: from acsmt356.oracle.com (acsmt356.oracle.com [141.146.40.156]) by ucsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id q5BJgG3o011857 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 11 Jun 2012 19:42:16 GMT Received: from abhmt114.oracle.com (abhmt114.oracle.com [141.146.116.66]) by acsmt356.oracle.com (8.12.11.20060308/8.12.11) with ESMTP id q5BJgF4F018174; Mon, 11 Jun 2012 14:42:15 -0500 Received: from mantra.us.oracle.com (/130.35.68.95) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 11 Jun 2012 12:42:14 -0700 Date: Mon, 11 Jun 2012 12:42:13 -0700 From: Mukesh Rathor To: Cyclonus J Message-ID: <20120611124213.18e2c7fb@mantra.us.oracle.com> In-Reply-To: References: Organization: Oracle Corporation X-Mailer: Claws Mail 3.7.6 (GTK+ 2.18.9; x86_64-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="MP_/X3qA/jwEscosmMB+TVJPo3b" X-Source-IP: ucsinet22.oracle.com [156.151.31.94] X-Mailman-Approved-At: Tue, 12 Jun 2012 12:07:02 +0000 Cc: "Xen-devel@lists.xensource.com" Subject: Re: [Xen-devel] Xen debugger support for newer version of Xen X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --MP_/X3qA/jwEscosmMB+TVJPo3b Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Disposition: inline On Sat, 9 Jun 2012 01:56:32 -0700 Cyclonus J wrote: > Hi Mukesh, > > I am currently dealing some device driver issues with Xen 4.1.2 and > would like to try out your great Xen debugger, but it looks like that > your Xen debugger only supports 4.1.0-rc3 and the last update is > almost one year ago. > > So my question is what would be your plan to support Xen debugger for > future Xen releases? And if there is a plan, may I help you? > > Thanks, > CJ I've been just maintaining it here. I add/update as needed for my debugging. I am attaching patch that should apply cleanly to unstable c/s 25467. You should be able to back it up to 4.1.2 with minor changes, like header/struct changes, (so fixup printk's), etc. Give it a shot. This is the latest. If you have difficulty, I can send you 4.1.2 version, but I'd need to update it a bit. Hope that helps, Mukesh --MP_/X3qA/jwEscosmMB+TVJPo3b Content-Type: text/x-patch Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=kdb.patch diff -r 32034d1914a6 -r e4b01842b71c xen/Makefile --- a/xen/Makefile Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/Makefile Fri Jun 08 10:56:24 2012 -0700 @@ -61,6 +61,7 @@ _clean: delete-unfresh-files $(MAKE) -f $(BASEDIR)/Rules.mk -C xsm clean $(MAKE) -f $(BASEDIR)/Rules.mk -C crypto clean $(MAKE) -f $(BASEDIR)/Rules.mk -C arch/$(TARGET_ARCH) clean + $(MAKE) -f $(BASEDIR)/Rules.mk -C kdb clean rm -f include/asm *.o $(TARGET) $(TARGET).gz $(TARGET)-syms *~ core rm -f include/asm-*/asm-offsets.h [ -d tools/figlet ] && rm -f .banner* @@ -129,7 +130,7 @@ include/asm-$(TARGET_ARCH)/asm-offsets.h echo ""; \ echo "#endif") <$< >$@ -SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers +SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers kdb define all_sources ( find include/asm-$(TARGET_ARCH) -name '*.h' -print; \ find include -name 'asm-*' -prune -o -name '*.h' -print; \ diff -r 32034d1914a6 -r e4b01842b71c xen/Rules.mk --- a/xen/Rules.mk Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/Rules.mk Fri Jun 08 10:56:24 2012 -0700 @@ -10,6 +10,7 @@ lock_profile ?= n crash_debug ?= n frame_pointer ?= n lto ?= n +kdb ?= n include $(XEN_ROOT)/Config.mk @@ -40,6 +41,7 @@ ALL_OBJS-y += $(BASEDIR)/d ALL_OBJS-y += $(BASEDIR)/xsm/built_in.o ALL_OBJS-y += $(BASEDIR)/arch/$(TARGET_ARCH)/built_in.o ALL_OBJS-$(x86) += $(BASEDIR)/crypto/built_in.o +ALL_OBJS-$(kdb) += $(BASEDIR)/kdb/built_in.o CFLAGS-y += -g -D__XEN__ -include $(BASEDIR)/include/xen/config.h CFLAGS-$(XSM_ENABLE) += -DXSM_ENABLE @@ -53,6 +55,7 @@ CFLAGS-$(lock_profile) += -DLOCK_PROFIL CFLAGS-$(HAS_ACPI) += -DHAS_ACPI CFLAGS-$(HAS_PASSTHROUGH) += -DHAS_PASSTHROUGH CFLAGS-$(frame_pointer) += -fno-omit-frame-pointer -DCONFIG_FRAME_POINTER +CFLAGS-$(kdb) += -DXEN_KDB_CONFIG ifneq ($(max_phys_cpus),) CFLAGS-y += -DMAX_PHYS_CPUS=$(max_phys_cpus) diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/svm/entry.S --- a/xen/arch/x86/hvm/svm/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/entry.S Fri Jun 08 10:56:24 2012 -0700 @@ -59,12 +59,23 @@ ENTRY(svm_asm_do_resume) get_current(bx) CLGI +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) testl $~0,(r(dx),r(ax),1) jnz .Lsvm_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0, VCPU_nsvm_hap_enabled(r(bx)) UNLIKELY_START(nz, nsvm_hap) mov VCPU_nhvm_p2m(r(bx)),r(ax) diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/svm/svm.c --- a/xen/arch/x86/hvm/svm/svm.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/svm.c Fri Jun 08 10:56:24 2012 -0700 @@ -2170,6 +2170,10 @@ void svm_vmexit_handler(struct cpu_user_ break; case VMEXIT_EXCEPTION_DB: +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( !v->domain->debugger_attached ) goto exit_and_crash; domain_pause_for_debugger(); @@ -2182,6 +2186,10 @@ void svm_vmexit_handler(struct cpu_user_ if ( (inst_len = __get_instruction_length(v, INSTR_INT3)) == 0 ) break; __update_guest_eip(regs, inst_len); +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_int3, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/svm/vmcb.c --- a/xen/arch/x86/hvm/svm/vmcb.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/vmcb.c Fri Jun 08 10:56:24 2012 -0700 @@ -315,6 +315,36 @@ void setup_vmcb_dump(void) register_keyhandler('v', &vmcb_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +/* did == 0 : display for all HVM domains. domid 0 is never HVM. + * * vid == -1 : display for all HVM VCPUs + * */ +void kdb_dump_vmcb(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + + rcu_read_lock(&domlist_read_lock); + for_each_domain (dp) { + if (!is_hvm_or_hyb_domain(dp) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + kdbp(" VMCB [domid: %d vcpu:%d]:\n", dp->domain_id, vp->vcpu_id); + svm_vmcb_dump("kdb", vp->arch.hvm_svm.vmcb); + kdbp("\n"); + } + kdbp("\n"); + } + rcu_read_unlock(&domlist_read_lock); +} +#endif + /* * Local variables: * mode: C diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/vmx/entry.S --- a/xen/arch/x86/hvm/vmx/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/entry.S Fri Jun 08 10:56:24 2012 -0700 @@ -124,12 +124,23 @@ vmx_asm_do_vmentry: get_current(bx) cli +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) cmpl $0,(r(dx),r(ax),1) jnz .Lvmx_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0xff,VCPU_vmx_emulate(r(bx)) jnz .Lvmx_goto_emulator testb $0xff,VCPU_vmx_realmode(r(bx)) diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/vmx/vmcs.c --- a/xen/arch/x86/hvm/vmx/vmcs.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Fri Jun 08 10:56:24 2012 -0700 @@ -1117,6 +1117,13 @@ void vmx_do_resume(struct vcpu *v) hvm_asid_flush_vcpu(v); } +#if defined(XEN_KDB_CONFIG) + if (kdb_dr7) + __vmwrite(GUEST_DR7, kdb_dr7); + else + __vmwrite(GUEST_DR7, 0); +#endif + debug_state = v->domain->debugger_attached || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_INT3] || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]; @@ -1326,6 +1333,220 @@ void setup_vmcs_dump(void) register_keyhandler('v', &vmcs_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +#define GUEST_EFER 0x2806 /* see page 23-20 */ +#define GUEST_EFER_HIGH 0x2807 /* see page 23-20 */ + +/* it's a shame we can't use vmcs_dump_vcpu(), but it does vmx_vmcs_enter which + * will IPI other CPUs. also, print a subset relevant to software debugging */ +static void noinline kdb_print_vmcs(struct vcpu *vp) +{ + struct cpu_user_regs *regs = &vp->arch.user_regs; + unsigned long long x; + + kdbp("*** Guest State ***\n"); + kdbp("CR0: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR0), + (unsigned long long)vmr(CR0_READ_SHADOW), + (unsigned long long)vmr(CR0_GUEST_HOST_MASK)); + kdbp("CR4: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR4), + (unsigned long long)vmr(CR4_READ_SHADOW), + (unsigned long long)vmr(CR4_GUEST_HOST_MASK)); + kdbp("CR3: actual=0x%016llx, target_count=%d\n", + (unsigned long long)vmr(GUEST_CR3), + (int)vmr(CR3_TARGET_COUNT)); + kdbp(" target0=%016llx, target1=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE0), + (unsigned long long)vmr(CR3_TARGET_VALUE1)); + kdbp(" target2=%016llx, target3=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE2), + (unsigned long long)vmr(CR3_TARGET_VALUE3)); + kdbp("RSP = 0x%016llx (0x%016llx) RIP = 0x%016llx (0x%016llx)\n", + (unsigned long long)vmr(GUEST_RSP), + (unsigned long long)regs->esp, + (unsigned long long)vmr(GUEST_RIP), + (unsigned long long)regs->eip); + kdbp("RFLAGS=0x%016llx (0x%016llx) DR7 = 0x%016llx\n", + (unsigned long long)vmr(GUEST_RFLAGS), + (unsigned long long)regs->eflags, + (unsigned long long)vmr(GUEST_DR7)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(GUEST_SYSENTER_ESP), + (int)vmr(GUEST_SYSENTER_CS), + (unsigned long long)vmr(GUEST_SYSENTER_EIP)); + vmx_dump_sel("CS", GUEST_CS_SELECTOR); + vmx_dump_sel("DS", GUEST_DS_SELECTOR); + vmx_dump_sel("SS", GUEST_SS_SELECTOR); + vmx_dump_sel("ES", GUEST_ES_SELECTOR); + vmx_dump_sel("FS", GUEST_FS_SELECTOR); + vmx_dump_sel("GS", GUEST_GS_SELECTOR); + vmx_dump_sel2("GDTR", GUEST_GDTR_LIMIT); + vmx_dump_sel("LDTR", GUEST_LDTR_SELECTOR); + vmx_dump_sel2("IDTR", GUEST_IDTR_LIMIT); + vmx_dump_sel("TR", GUEST_TR_SELECTOR); + kdbp("Guest EFER = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_EFER_HIGH), (uint32_t)vmr(GUEST_EFER)); + kdbp("Guest PAT = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_PAT_HIGH), (uint32_t)vmr(GUEST_PAT)); + x = (unsigned long long)vmr(TSC_OFFSET_HIGH) << 32; + x |= (uint32_t)vmr(TSC_OFFSET); + kdbp("TSC Offset = %016llx\n", x); + x = (unsigned long long)vmr(GUEST_IA32_DEBUGCTL_HIGH) << 32; + x |= (uint32_t)vmr(GUEST_IA32_DEBUGCTL); + kdbp("DebugCtl=%016llx DebugExceptions=%016llx\n", x, + (unsigned long long)vmr(GUEST_PENDING_DBG_EXCEPTIONS)); + kdbp("Interruptibility=%04x ActivityState=%04x\n", + (int)vmr(GUEST_INTERRUPTIBILITY_INFO), + (int)vmr(GUEST_ACTIVITY_STATE)); + + kdbp("MSRs: entry_load:$%d exit_load:$%d exit_store:$%d\n", + vmr(VM_ENTRY_MSR_LOAD_COUNT), vmr(VM_EXIT_MSR_LOAD_COUNT), + vmr(VM_EXIT_MSR_STORE_COUNT)); + + kdbp("\n*** Host State ***\n"); + kdbp("RSP = 0x%016llx RIP = 0x%016llx\n", + (unsigned long long)vmr(HOST_RSP), + (unsigned long long)vmr(HOST_RIP)); + kdbp("CS=%04x DS=%04x ES=%04x FS=%04x GS=%04x SS=%04x TR=%04x\n", + (uint16_t)vmr(HOST_CS_SELECTOR), + (uint16_t)vmr(HOST_DS_SELECTOR), + (uint16_t)vmr(HOST_ES_SELECTOR), + (uint16_t)vmr(HOST_FS_SELECTOR), + (uint16_t)vmr(HOST_GS_SELECTOR), + (uint16_t)vmr(HOST_SS_SELECTOR), + (uint16_t)vmr(HOST_TR_SELECTOR)); + kdbp("FSBase=%016llx GSBase=%016llx TRBase=%016llx\n", + (unsigned long long)vmr(HOST_FS_BASE), + (unsigned long long)vmr(HOST_GS_BASE), + (unsigned long long)vmr(HOST_TR_BASE)); + kdbp("GDTBase=%016llx IDTBase=%016llx\n", + (unsigned long long)vmr(HOST_GDTR_BASE), + (unsigned long long)vmr(HOST_IDTR_BASE)); + kdbp("CR0=%016llx CR3=%016llx CR4=%016llx\n", + (unsigned long long)vmr(HOST_CR0), + (unsigned long long)vmr(HOST_CR3), + (unsigned long long)vmr(HOST_CR4)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(HOST_SYSENTER_ESP), + (int)vmr(HOST_SYSENTER_CS), + (unsigned long long)vmr(HOST_SYSENTER_EIP)); + kdbp("Host PAT = 0x%08x%08x\n", + (uint32_t)vmr(HOST_PAT_HIGH), (uint32_t)vmr(HOST_PAT)); + + kdbp("\n*** Control State ***\n"); + kdbp("PinBased=%08x CPUBased=%08x SecondaryExec=%08x\n", + (uint32_t)vmr(PIN_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(CPU_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(SECONDARY_VM_EXEC_CONTROL)); + kdbp("EntryControls=%08x ExitControls=%08x\n", + (uint32_t)vmr(VM_ENTRY_CONTROLS), + (uint32_t)vmr(VM_EXIT_CONTROLS)); + kdbp("ExceptionBitmap=%08x\n", + (uint32_t)vmr(EXCEPTION_BITMAP)); + kdbp("PAGE_FAULT_ERROR_CODE MASK:0x%lx MATCH:0x%lx\n", + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MASK), + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MATCH)); + kdbp("VMEntry: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_ENTRY_INTR_INFO), + (uint32_t)vmr(VM_ENTRY_EXCEPTION_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp("VMExit: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_EXIT_INTR_INFO), + (uint32_t)vmr(VM_EXIT_INTR_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp(" reason=%08x qualification=%08x\n", + (uint32_t)vmr(VM_EXIT_REASON), + (uint32_t)vmr(EXIT_QUALIFICATION)); + kdbp("IDTVectoring: info=%08x errcode=%08x\n", + (uint32_t)vmr(IDT_VECTORING_INFO), + (uint32_t)vmr(IDT_VECTORING_ERROR_CODE)); + kdbp("TPR Threshold = 0x%02x\n", + (uint32_t)vmr(TPR_THRESHOLD)); + kdbp("EPT pointer = 0x%08x%08x\n", + (uint32_t)vmr(EPT_POINTER_HIGH), (uint32_t)vmr(EPT_POINTER)); + kdbp("Virtual processor ID = 0x%04x\n", + (uint32_t)vmr(VIRTUAL_PROCESSOR_ID)); + kdbp("=================================================================\n"); +} + +/* Flush VMCS on this cpu if it needs to: + * - Upon leaving kdb, the HVM cpu will resume in vmx_vmexit_handler() and + * do __vmreads. So, the VMCS pointer can't be left cleared. + * - Doing __vmpclear will set the vmx state to 'clear', so to resume a + * vmlaunch must be done and not vmresume. This means, we must clear + * arch_vmx->launched. + */ +void kdb_curr_cpu_flush_vmcs(void) +{ + struct domain *dp; + struct vcpu *vp; + int ccpu = smp_processor_id(); + struct vmcs_struct *cvp = this_cpu(current_vmcs); + + if (this_cpu(current_vmcs) == NULL) + return; /* no HVM active on this CPU */ + + kdbp("KDB:[%d] curvmcs:%lx/%lx\n", ccpu, cvp, virt_to_maddr(cvp)); + + /* looks like we got one. unfortunately, current_vmcs points to vmcs + * and not VCPU, so we gotta search the entire list... */ + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + for_each_vcpu (dp, vp) { + if ( vp->arch.hvm_vmx.vmcs == cvp ) { + __vmpclear(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + __vmptrld(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + vp->arch.hvm_vmx.launched = 0; + this_cpu(current_vmcs) = NULL; + kdbp("KDB:[%d] %d:%d current_vmcs:%lx flushed\n", + ccpu, dp->domain_id, vp->vcpu_id, cvp, virt_to_maddr(cvp)); + } + } + } +} + +/* + * domid == 0 : display for all HVM domains (dom0 is never an HVM domain) + * vcpu id == -1 : display all vcpuids + * PreCondition: all HVM cpus (including current cpu) have flushed VMCS + */ +void kdb_dump_vmcs(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + struct vmcs_struct *vmcsp; + u64 addr = -1; + + ASSERT(!local_irq_is_enabled()); /* kdb should always run disabled */ + __vmptrst(&addr); + + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + vmcsp = vp->arch.hvm_vmx.vmcs; + kdbp("VMCS %lx/%lx [domid:%d (%p) vcpu:%d (%p)]:\n", vmcsp, + virt_to_maddr(vmcsp), dp->domain_id, dp, vp->vcpu_id, vp); + __vmptrld(virt_to_maddr(vmcsp)); + kdb_print_vmcs(vp); + __vmpclear(virt_to_maddr(vmcsp)); + vp->arch.hvm_vmx.launched = 0; + } + kdbp("\n"); + } + /* restore orig vmcs pointer for __vmreads in vmx_vmexit_handler() */ + if (addr && addr != (u64)-1) + __vmptrld(addr); +} +#endif /* * Local variables: diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/hvm/vmx/vmx.c --- a/xen/arch/x86/hvm/vmx/vmx.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/vmx.c Fri Jun 08 10:56:24 2012 -0700 @@ -2183,11 +2183,14 @@ static void vmx_failed_vmentry(unsigned printk("reason not known yet!"); break; } - +#if defined(XEN_KDB_CONFIG) + kdbp("\n************* VMCS Area **************\n"); + kdb_dump_vmcs(curr->domain->domain_id, (curr)->vcpu_id); +#else printk("************* VMCS Area **************\n"); vmcs_dump_vcpu(curr); printk("**************************************\n"); - +#endif domain_crash(curr->domain); } @@ -2415,6 +2418,12 @@ void vmx_vmexit_handler(struct cpu_user_ write_debugreg(6, exit_qualification | 0xffff0ff0); if ( !v->domain->debugger_attached || cpu_has_monitor_trap_flag ) goto exit_and_crash; + +#if defined(XEN_KDB_CONFIG) + /* TRAP_debug: IP points correctly to next instr */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif domain_pause_for_debugger(); break; case TRAP_int3: @@ -2423,6 +2432,13 @@ void vmx_vmexit_handler(struct cpu_user_ if ( v->domain->debugger_attached ) { update_guest_eip(); /* Safe: INT3 */ +#if defined(XEN_KDB_CONFIG) + /* vmcs.IP points to bp, kdb expects bp+1. Hence after the above + * update_guest_eip which updates to bp+1. works for gdbsx too + */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; @@ -2707,6 +2723,10 @@ void vmx_vmexit_handler(struct cpu_user_ case EXIT_REASON_MONITOR_TRAP_FLAG: v->arch.hvm_vmx.exec_control &= ~CPU_BASED_MONITOR_TRAP_FLAG; vmx_update_cpu_exec_control(v); +#if defined(XEN_KDB_CONFIG) + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( v->arch.hvm_vcpu.single_step ) { hvm_memory_event_single_step(regs->eip); if ( v->domain->debugger_attached ) diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/irq.c --- a/xen/arch/x86/irq.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/irq.c Fri Jun 08 10:56:24 2012 -0700 @@ -2305,3 +2305,29 @@ bool_t hvm_domain_use_pirq(const struct return is_hvm_domain(d) && pirq && pirq->arch.hvm.emuirq != IRQ_UNBOUND; } + +#ifdef XEN_KDB_CONFIG +void kdb_prnt_guest_mapped_irqs(void) +{ + int irq, j; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + kdbp("irq vec aff type domid:mapped-pirq pairs (all in decimal)\n"); + for (irq=0; irq < nr_irqs; irq++) { + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + irq_guest_action_t *actp = (irq_guest_action_t *)dp->action; + + if (!dp->handler ||dp->handler==&no_irq_type || !(dp->status&IRQ_GUEST)) + continue; + + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %3d %3s %-13s ", irq, archp->vector, affstr, + dp->handler->typename); + for (j=0; j < actp->nr_guests; j++) + kdbp("%03d:%04d ", actp->guest[j]->domain_id, + domain_irq_to_pirq(actp->guest[j], irq)); + kdbp("\n"); + } +} +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/setup.c --- a/xen/arch/x86/setup.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/setup.c Fri Jun 08 10:56:24 2012 -0700 @@ -47,6 +47,13 @@ #include #include +#ifdef XEN_KDB_CONFIG +#include + +int opt_earlykdb=0; +boolean_param("earlykdb", opt_earlykdb); +#endif + /* opt_nosmp: If true, secondary processors are ignored. */ static bool_t __initdata opt_nosmp; boolean_param("nosmp", opt_nosmp); @@ -1242,6 +1249,11 @@ void __init __start_xen(unsigned long mb trap_init(); +#ifdef XEN_KDB_CONFIG + kdb_init(); + if (opt_earlykdb) + kdb_trap_immed(KDB_TRAP_NONFATAL); +#endif rcu_init(); early_time_init(); diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/smp.c --- a/xen/arch/x86/smp.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/smp.c Fri Jun 08 10:56:24 2012 -0700 @@ -273,7 +273,7 @@ void smp_send_event_check_mask(const cpu * Structure and data for smp_call_function()/on_selected_cpus(). */ -static void __smp_call_function_interrupt(void); +static void __smp_call_function_interrupt(struct cpu_user_regs *regs); static DEFINE_SPINLOCK(call_lock); static struct call_data_struct { void (*func) (void *info); @@ -321,7 +321,7 @@ void on_selected_cpus( if ( cpumask_test_cpu(smp_processor_id(), &call_data.selected) ) { local_irq_disable(); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(NULL); local_irq_enable(); } @@ -390,7 +390,7 @@ void event_check_interrupt(struct cpu_us this_cpu(irq_count)++; } -static void __smp_call_function_interrupt(void) +static void __smp_call_function_interrupt(struct cpu_user_regs *regs) { void (*func)(void *info) = call_data.func; void *info = call_data.info; @@ -411,6 +411,11 @@ static void __smp_call_function_interrup { mb(); cpumask_clear_cpu(cpu, &call_data.selected); +#ifdef XEN_KDB_CONFIG + if (info && !strcmp(info, "XENKDB")) { /* called from kdb */ + (*(void (*)(struct cpu_user_regs *, void *))func)(regs, info); + } else +#endif (*func)(info); } @@ -421,5 +426,5 @@ void call_function_interrupt(struct cpu_ { ack_APIC_irq(); perfc_incr(ipis); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(regs); } diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/time.c --- a/xen/arch/x86/time.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/time.c Fri Jun 08 10:56:24 2012 -0700 @@ -2007,6 +2007,46 @@ static int __init setup_dump_softtsc(voi } __initcall(setup_dump_softtsc); +#ifdef XEN_KDB_CONFIG +void kdb_time_resume(int update_domains) +{ + s_time_t now; + int ccpu = smp_processor_id(); + struct cpu_time *t = &this_cpu(cpu_time); + + if (!plt_src.read_counter) /* not initialized for earlykdb */ + return; + + if (update_domains) { + plt_stamp = plt_src.read_counter(); + platform_timer_stamp = plt_stamp64; + platform_time_calibration(); + do_settime(get_cmos_time(), 0, read_platform_stime()); + } + if (local_irq_is_enabled()) + kdbp("kdb BUG: enabled in time_resume(). ccpu:%d\n", ccpu); + + rdtscll(t->local_tsc_stamp); + now = read_platform_stime(); + t->stime_master_stamp = now; + t->stime_local_stamp = now; + + update_vcpu_system_time(current); + + if (update_domains) + set_timer(&calibration_timer, NOW() + EPOCH); +} + +void kdb_dump_time_pcpu(void) +{ + int cpu; + for_each_online_cpu(cpu) { + kdbp("[%d]: cpu_time: %016lx\n", cpu, &per_cpu(cpu_time, cpu)); + kdbp("[%d]: cpu_calibration: %016lx\n", cpu, + &per_cpu(cpu_calibration, cpu)); + } +} +#endif /* * Local variables: * mode: C diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/traps.c Fri Jun 08 10:56:24 2012 -0700 @@ -225,7 +225,7 @@ static void show_trace(struct cpu_user_r #else -static void show_trace(struct cpu_user_regs *regs) +void show_trace(struct cpu_user_regs *regs) { unsigned long *frame, next, addr, low, high; @@ -3326,6 +3326,10 @@ void do_nmi(struct cpu_user_regs *regs) if ( nmi_callback(regs, cpu) ) return; +#ifdef XEN_KDB_CONFIG + if (kdb_enabled && kdb_handle_trap_entry(TRAP_nmi, regs)) + return; +#endif if ( nmi_watchdog ) nmi_watchdog_tick(regs); diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/x86_64/compat/entry.S --- a/xen/arch/x86/x86_64/compat/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/x86_64/compat/entry.S Fri Jun 08 10:56:24 2012 -0700 @@ -95,6 +95,10 @@ compat_skip_clobber: /* %rbx: struct vcpu */ ENTRY(compat_test_all_events) cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG + testl $1, kdb_session_begun(%rip) + jnz compat_restore_all_guest +#endif /*compat_test_softirqs:*/ movl VCPU_processor(%rbx),%eax shlq $IRQSTAT_shift,%rax diff -r 32034d1914a6 -r e4b01842b71c xen/arch/x86/x86_64/entry.S --- a/xen/arch/x86/x86_64/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/x86_64/entry.S Fri Jun 08 10:56:24 2012 -0700 @@ -184,6 +184,10 @@ skip_clobber: /* %rbx: struct vcpu */ test_all_events: cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG /* 64bit dom0 will resume here */ + testl $1, kdb_session_begun(%rip) + jnz restore_all_guest +#endif /*test_softirqs:*/ movl VCPU_processor(%rbx),%eax shl $IRQSTAT_shift,%rax @@ -546,6 +550,13 @@ ENTRY(debug) ENTRY(int3) pushq $0 +#ifdef XEN_KDB_CONFIG + pushq %rax + GET_CPUINFO_FIELD(CPUINFO_processor_id, %rax) + movq (%rax), %rax + lock bts %rax, kdb_cpu_traps(%rip) + popq %rax +#endif movl $TRAP_int3,4(%rsp) jmp handle_exception diff -r 32034d1914a6 -r e4b01842b71c xen/common/domain.c --- a/xen/common/domain.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/domain.c Fri Jun 08 10:56:24 2012 -0700 @@ -530,6 +530,14 @@ void domain_shutdown(struct domain *d, u { struct vcpu *v; +#ifdef XEN_KDB_CONFIG + if (reason == SHUTDOWN_crash) { + if ( IS_PRIV(d) ) + kdb_trap_immed(KDB_TRAP_FATAL); + else + kdb_trap_immed(KDB_TRAP_NONFATAL); + } +#endif spin_lock(&d->shutdown_lock); if ( d->shutdown_code == -1 ) @@ -624,7 +632,9 @@ void domain_pause_for_debugger(void) for_each_vcpu ( d, v ) vcpu_sleep_nosync(v); - send_global_virq(VIRQ_DEBUGGER); + /* send VIRQ_DEBUGGER to guest only if gdbsx_vcpu_event is not active */ + if (current->arch.gdbsx_vcpu_event == 0) + send_global_virq(VIRQ_DEBUGGER); } /* Complete domain destroy after RCU readers are not holding old references. */ diff -r 32034d1914a6 -r e4b01842b71c xen/common/sched_credit.c --- a/xen/common/sched_credit.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/sched_credit.c Fri Jun 08 10:56:24 2012 -0700 @@ -1475,6 +1475,33 @@ csched_dump_vcpu(struct csched_vcpu *svc printk("\n"); } +#ifdef XEN_KDB_CONFIG +static void kdb_csched_dump(int cpu) +{ + struct csched_pcpu *pcpup = CSCHED_PCPU(cpu); + struct vcpu *scurrvp = (CSCHED_VCPU(current))->vcpu; + struct list_head *tmp, *runq = RUNQ(cpu); + + kdbp(" csched_pcpu: %p\n", pcpup); + kdbp(" curr csched:%p {vcpu:%p id:%d domid:%d}\n", (current)->sched_priv, + scurrvp, scurrvp->vcpu_id, scurrvp->domain->domain_id); + kdbp(" runq:\n"); + + /* next is top of struct, so screw stupid, ugly hard to follow macros */ + if (offsetof(struct csched_vcpu, runq_elem.next) != 0) { + kdbp("next is not first in struct csched_vcpu. please fixme\n"); + return; /* otherwise for loop will crash */ + } + for (tmp = runq->next; tmp != runq; tmp = tmp->next) { + + struct csched_vcpu *csp = (struct csched_vcpu *)tmp; + struct vcpu *vp = csp->vcpu; + kdbp(" csp:%p pri:%02d vcpu: {p:%p id:%d domid:%d}\n", csp, + csp->pri, vp, vp->vcpu_id, vp->domain->domain_id); + }; +} +#endif + static void csched_dump_pcpu(const struct scheduler *ops, int cpu) { @@ -1484,6 +1511,10 @@ csched_dump_pcpu(const struct scheduler int loop; #define cpustr keyhandler_scratch +#ifdef XEN_KDB_CONFIG + kdb_csched_dump(cpu); + return; +#endif spc = CSCHED_PCPU(cpu); runq = &spc->runq; diff -r 32034d1914a6 -r e4b01842b71c xen/common/schedule.c --- a/xen/common/schedule.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/schedule.c Fri Jun 08 10:56:24 2012 -0700 @@ -1454,6 +1454,25 @@ void wait(void) schedule(); } +#ifdef XEN_KDB_CONFIG +void kdb_print_sched_info(void) +{ + int cpu; + + kdbp("Scheduler: name:%s opt_name:%s id:%d\n", ops.name, ops.opt_name, + ops.sched_id); + kdbp("per cpu schedule_data:\n"); + for_each_online_cpu(cpu) { + struct schedule_data *p = &per_cpu(schedule_data, cpu); + kdbp(" cpu:%d &(per cpu)schedule_data:%p\n", cpu, p); + kdbp(" curr:%p sched_priv:%p\n", p->curr, p->sched_priv); + kdbp("\n"); + ops.dump_cpu_state(&ops, cpu); + kdbp("\n"); + } +} +#endif + #ifdef CONFIG_COMPAT #include "compat/schedule.c" #endif diff -r 32034d1914a6 -r e4b01842b71c xen/common/symbols.c --- a/xen/common/symbols.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/symbols.c Fri Jun 08 10:56:24 2012 -0700 @@ -168,3 +168,21 @@ void __print_symbol(const char *fmt, uns spin_unlock_irqrestore(&lock, flags); } + +#ifdef XEN_KDB_CONFIG +/* + * * Given a symbol, return its address + * */ +unsigned long address_lookup(char *symp) +{ + int i, off = 0; + char namebuf[KSYM_NAME_LEN+1]; + + for (i=0; i < symbols_num_syms; i++) { + off = symbols_expand_symbol(off, namebuf); + if (strcmp(namebuf, symp) == 0) /* found it */ + return symbols_address(i); + } + return 0; +} +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/common/timer.c --- a/xen/common/timer.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/timer.c Fri Jun 08 10:56:24 2012 -0700 @@ -643,6 +643,48 @@ void __init timer_init(void) register_keyhandler('a', &dump_timerq_keyhandler); } +#ifdef XEN_KDB_CONFIG +#include +void kdb_dump_timer_queues(void) +{ + struct timer *t; + struct timers *ts; + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1]; + int cpu, j; + u64 tsc; + + for_each_online_cpu( cpu ) + { + ts = &per_cpu(timers, cpu); + kdbp("CPU[%02d]:", cpu); + + if (cpu == smp_processor_id()) { + s_time_t now = NOW(); + rdtscll(tsc); + kdbp("NOW:0x%08x%08x TSC:0x%016lx\n", (u32)(now>>32),(u32)now, tsc); + } else + kdbp("\n"); + + /* timers in the heap */ + for ( j = 1; j <= GET_HEAP_SIZE(ts->heap); j++ ) { + t = ts->heap[j]; + kdbp(" %d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + /* timers on the link list */ + for ( t = ts->list, j = 0; t != NULL; t = t->list_next, j++ ) { + kdbp(" L%d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + } +} +#endif + /* * Local variables: * mode: C diff -r 32034d1914a6 -r e4b01842b71c xen/drivers/char/console.c --- a/xen/drivers/char/console.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/drivers/char/console.c Fri Jun 08 10:56:24 2012 -0700 @@ -295,6 +295,21 @@ static void serial_rx(char c, struct cpu { static int switch_code_count = 0; +#ifdef XEN_KDB_CONFIG + /* if ctrl-\ pressed and kdb handles it, return */ + if (kdb_enabled && c == 0x1c) { + if (!kdb_session_begun) { + if (kdb_keyboard(regs)) + return; + } else { + kdbp("Sorry... kdb session already active.. please try again..\n"); + return; + } + } + if (kdb_session_begun) /* kdb should already be polling */ + return; /* swallow chars so they don't buffer in dom0 */ +#endif + if ( switch_code && (c == switch_code) ) { /* We eat CTRL- in groups of 3 to switch console input. */ @@ -710,6 +725,18 @@ void console_end_sync(void) atomic_dec(&print_everything); } +#ifdef XEN_KDB_CONFIG +void console_putc(char c) +{ + serial_putc(sercon_handle, c); +} + +int console_getc(void) +{ + return serial_getc(sercon_handle); +} +#endif + /* * printk rate limiting, lifted from Linux. * diff -r 32034d1914a6 -r e4b01842b71c xen/include/asm-x86/debugger.h --- a/xen/include/asm-x86/debugger.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/asm-x86/debugger.h Fri Jun 08 10:56:24 2012 -0700 @@ -39,7 +39,11 @@ #define DEBUGGER_trap_fatal(_v, _r) \ if ( debugger_trap_fatal(_v, _r) ) return; -#if defined(CRASH_DEBUG) +#if defined(XEN_KDB_CONFIG) +#define debugger_trap_immediate() kdb_trap_immed(KDB_TRAP_NONFATAL) +#define debugger_trap_fatal(_v, _r) kdb_trap_fatal(_v, _r) + +#elif defined(CRASH_DEBUG) #include @@ -70,6 +74,10 @@ static inline int debugger_trap_entry( { struct vcpu *v = current; +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(vector, regs)) + return 1; +#endif if ( guest_kernel_mode(v, regs) && v->domain->debugger_attached && ((vector == TRAP_int3) || (vector == TRAP_debug)) ) { diff -r 32034d1914a6 -r e4b01842b71c xen/include/xen/lib.h --- a/xen/include/xen/lib.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/xen/lib.h Fri Jun 08 10:56:24 2012 -0700 @@ -116,4 +116,7 @@ extern void add_taint(unsigned); struct cpu_user_regs; void dump_execstate(struct cpu_user_regs *); +#ifdef XEN_KDB_CONFIG +#include "../../kdb/include/kdb_extern.h" +#endif #endif /* __LIB_H__ */ diff -r 32034d1914a6 -r e4b01842b71c xen/include/xen/sched.h --- a/xen/include/xen/sched.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/xen/sched.h Fri Jun 08 10:56:24 2012 -0700 @@ -576,11 +576,14 @@ extern void (*dead_idle) (void); unsigned long hypercall_create_continuation( unsigned int op, const char *format, ...); void hypercall_cancel_continuation(void); - +#ifdef XEN_KDB_CONFIG +#define hypercall_preempt_check() (0) +#else #define hypercall_preempt_check() (unlikely( \ softirq_pending(smp_processor_id()) | \ local_events_need_delivery() \ )) +#endif extern struct domain *domain_list; diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/Makefile Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,5 @@ + +obj-y += kdbmain.o kdb_cmds.o kdb_io.o + +subdir-y += x86 guest + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/README Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,243 @@ + +Welcome to kdb for xen, a hypervisor built in debugger. + +FEATURES: + - set breakpoints in hypervisor + - examine virt/machine memory, registers, domains, vcpus, etc... + - single step, single step till jump/call, step over call to next + instruction after the call. + - examine memory of a PV/HVM guest. + - set breakpoints, single step, etc... for a PV guest. + - breaking into the debugger will freeze the system, all CPUs will pause, + no interrupts are acknowledged in the debugger. (Hence, the wall clock + will drift) + - single step will step only that cpu. + - earlykdb: break into kdb very early during boot. Put "earlykdb" on the + xen command line in grub.conf. + - generic tracing functions (see below) for quick tracing to debug timing + related problems. To use: + o set KDBTRCMAX to max num of recs in circular trc buffer in kdbmain.c + o call kdb_trc() from anywhere in xen + o turn tracing on by setting kdb_trcon in kdbmain.c or trcon command. + o trcp in kdb will give hints to dump trace recs. Use dd to see buffer + o trcz will zero out the entire buffer if needed. + +NOTE: + - since almost all numbers are in hex, 0x is not prefixed. Instead, decimal + numbers are preceded by $, as in $17 (sorry, one gets used to it). Note, + vcpu num, cpu num, domid are always displayed in decimal, without $. + - watchdog must be disabled to use kdb + +ISSUES: + - Currently, debug hypervisor is not supported. Make sure NDEBUG is defined + or compile with debug=n + - "timer went backwards" messages on dom0, but kdb/hyp should be fine. + I usually do "echo 2 > /proc/sys/kernel/printk" when using kdb. + - 32bit hypervisor may hang. Tested on 64bit hypervisor only. + + +TO BUILD: + - do >make kdb=y + +HOW TO USE: + 1. A serial line is needed to use the debugger. Set up a serial line + from the source machine to target victim. Make sure the serial line + is working properly by displaying login prompt and loging in etc.... + + 2. Add following to grub.conf: + kernel /xen.kdb console=com1,vga com1=57600,8n1 dom0_mem=542M + + (57600 or whatever used in step 1 above) + + 3. Boot the hypervisor built with the debugger. + + 4. ctrl-\ (ctrl and backslash) will break into the debugger. If the system is + badly hung, pressing NMI would also break into it. However, once kdb is + entered via NMI, normal execution can't continue. + + 5. type 'h' for list of commands. + + 6. Command line editing is limited to backspace. ctrl-c to start a new cmd. + + + +GUEST debug: + - type sym in the debugger + - for REL4, grep kallsyms_names, kallsyms_addresses, and kallsyms_num_syms + in the guest System.map* file. Run sym again with domid and the three + values on the command line. + - Now basic symbols can be used for guest debug. Note, if the binary is not + built with symbols, only function names are available, but not global vars. + + Eg: sym 0 c0696084 c068a590 c0696080 c06b43e8 c06b4740 + will set symbols for dom 0. Then : + + [4]xkdb> bp some_function 0 + + wills set bp at some_function in dom 0 + + [3]xkdb> dw c068a590 32 0 : display 32 bytes of dom0 memory + + +Tips: + - In "[0]xkdb>" : 0 is the cpu number in decimal + - In + 00000000c042645c: 0:do_timer+17 push %ebp + 0:do_timer : 0 is the domid in hex + offset +17 is in hex. + + absense of 0: would indicate it's a hypervisor function + + - commands starting with kdb (kdb*) are for kdb debug only. + + +Finally, + - think hex. + - bug/problem: enter kdbdbg, reproduce, and send me the output. + If the output is not enough, I may ask to run kdbdbg twice, then collect + output. + + +Thanks, +Mukesh Rathor +Oracle Corporatin, +Redwood Shores, CA 94065 + +-------------------------------------------------------------------------------- +COMMAND DESCRIPTION: + +info: Print basic info like version, compile flags, etc.. + +cur: print current domain id and vcpu id + +f: display current stack. If a vcpu ptr is given, then print stack for that + VCPU by using its IP and SP. + +fg: display stack for a guest given domid, SP and IP. + +dw: display words of memory. 'num' of bytes is optional, but if displaying guest + memory, then is required. + +dd: same as above, but display doublewords. + +dwm: same as above but the address is machine address instead of virtual. + +ddm: same as above, but display doublewords. + +dr: display registers. if 'sp' is specified then print few extra registers. + +drg: display guest context saved on stack bottom. + +dis: disassemble instructions. If disassembling for guest, then 'num' must + be specified. 'num' is number of instrs to display. + +dism: toggle disassembly mode between Intel and ATT/GAS. + +mw: modify word in memory given virtual address. 'domid' may be specified if + modifying guest memory. value is assumed in hex even without 0x. + +md: same as above but modify doubleword. + +mr: modify register. value is assumd hex. + +bc: clear given or all breakpoints + +bp: display breakpoints or set a breakpoint. Domid may be specified to set a bp + in guest. kdb functions may not be specified if debugging kdb. + Example: + xkdb> bp acpi_processor_idle : will set bp in xen + xkdb> bp default_idle 0 : will set bp in domid 0 + xkdb> bp idle_cpu 9 : will set bp in domid 9 + + Conditions may be specified for a bp: lhs == rhs or lhs != rhs + where : lhs is register like 'r6', 'rax', etc... or memory location + rhs is hex value with or without leading 0x. + Thus, + xkdb> bp acpi_processor_idle rdi == c000 + xkdb> bp 0xffffffff80062ebc 0 rsi == ffff880021edbc98 : will break into + kdb at 0xffffffff80062ebc in dom0 when rsi is ffff880021edbc98 + +btp: break point trace. Upon bp, print some info and continue without stopping. + Ex: btp idle_cpu 7 rax rbx 0x20ef5a5 r9 + + will print: rax, rbx, *(long *)0x20ef5a5, r9 upon hitting idle_cpu() and + continue. + +wp: set a watchpoint at a virtual address which can belong to hypervisor or + any guest. Do not specify wp in kdb path if debugging kdb. + +wc: clear given or all watchpoints. + +ni: single step, stepping over function calls. + +ss: single step. Be carefull when in interrupt handlers or context switches. + +ssb: single step to branch. Use with care. + +go: leave kdb and continue. + +cpu: go back to orig cpu when entering kdb. If 'cpu number' given, then switch + to that cpu. If 'all' then show status of all cpus. + +nmi: Only available in hung/crash state. Send NMI to a cpu that may be hung. + +sym: Initialize a symbol table for debugging a guest. Look into the System.map + file of guest for certain symbol values and provide them here. + +vcpuh: Given vcpu ptr, display hvm_vcpu struct. + +vcpu: Display current vcpu struct. If 'vcpu-ptr' given, display that vcpu. + +dom: display current domain. If 'domid' then display that domid. If 'all', then + display all domains. + +sched: show schedular info and run queues. + +mmu: print basic mmu info + +p2m: convert a gpfn to mfn given a domid. value in hex even without 0x. + +m2p: convert mfn to pfn. value in hex even without 0x. + +dpage: display struct page given a mfn or struct page ptr. Since, no info is + kept on page type, we display all possible page types. + +dtrq: display timer queues. + +didt: dump IDT table. + +dgt: dump GDT table. + +dirq: display IRQ bindings. + +dvmc: display all or given dom/vcpu VMCS or VMCB. + +trcon: turn tracing on. Trace hooks must be added in xen and kdb function + called directly from there. + +trcoff: turn tracing off. + +trcz: zero trace buffer. + +trcp: give hints to print the circular trace buffer, like current active ptr. + +usr1: allows to add any arbitraty command quickly. + +-------------------------------------------------------------------------------- +/* + * Copyright (C) 2008 Oracle. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/guest/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/Makefile Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_guest.o + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/guest/kdb_guest.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/kdb_guest.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,342 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +/* information for symbols for a guest (includeing dom 0 ) is saved here */ +struct gst_syminfo { /* guest symbols info */ + int domid; /* which domain */ + int bitness; /* 32 or 64 */ + void *addrtblp; /* ptr to (32/64)addresses tbl */ + u8 *toktbl; /* ptr to kallsyms_token_table */ + u16 *tokidxtbl; /* ptr to kallsyms_token_index */ + u8 *kallsyms_names; /* ptr to kallsyms_names */ + long kallsyms_num_syms; /* ptr to kallsyms_num_syms */ + kdbva_t stext; /* value of _stext in guest */ + kdbva_t etext; /* value of _etext in guest */ + kdbva_t sinittext; /* value of _sinittext in guest */ + kdbva_t einittext; /* value of _einittext in guest */ +}; + +#define MAX_CACHE 16 /* cache upto 16 guests */ +struct gst_syminfo gst_syminfoa[MAX_CACHE]; /* guest symbol info array */ + +static struct gst_syminfo * +kdb_get_syminfo_slot(void) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].addrtblp == NULL) + return (&gst_syminfoa[i]); + + return NULL; +} + +static struct gst_syminfo * +kdb_domid2syminfop(domid_t domid) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].domid == domid) + return (&gst_syminfoa[i]); + + return NULL; +} + +/* check if an address looks like text address in guest */ +int +kdb_is_addr_guest_text(kdbva_t addr, int domid) +{ + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + if (!gp || !gp->stext || !gp->etext) + return 0; + KDBGP1("guestaddr: addr:%lx domid:%d\n", addr, domid); + + return ( (addr >= gp->stext && addr <= gp->etext) || + (addr >= gp->sinittext && addr <= gp->einittext) ); +} + +/* + * returns: value of kallsyms_addresses[idx]; + */ +static kdbva_t +kdb_rd_guest_addrtbl(struct gst_syminfo *gp, int idx) +{ + kdbva_t addr, retaddr=0; + int num = gp->bitness/8; /* whether 4 byte or 8 byte ptrs */ + domid_t id = gp->domid; + + addr = (kdbva_t)(((char *)gp->addrtblp) + idx * num); + KDBGP1("rdguestaddrtbl:addr:%lx idx:%d\n", addr, idx); + + if (kdb_read_mem(addr, (kdbbyt_t *)&retaddr,num,id) != num) { + kdbp("Can't read addrtbl domid:%d at:%lx\n", id, addr); + return 0; + } + KDBGP1("rdguestaddrtbl:exit:retaddr:%lx\n", retaddr); + return retaddr; +} + +/* Based on el5 kallsyms.c file. */ +static unsigned int +kdb_expand_el5_sym(struct gst_syminfo *gp, unsigned int off, char *result) +{ + int len, skipped_first = 0; + u8 u8idx, *tptr, *datap; + domid_t domid = gp->domid; + + *result = '\0'; + + /* get the compressed symbol length from the first symbol byte */ + datap = gp->kallsyms_names + off; + len = 0; + if ((kdb_read_mem((kdbva_t)datap, (kdbbyt_t *)&len, 1, domid)) != 1) { + KDBGP("failed to read guest memory\n"); + return 0; + } + datap++; + + /* update the offset to return the offset for the next symbol on + * the compressed stream */ + off += len + 1; + + /* for every byte on the compressed symbol data, copy the table + * entry for that byte */ + while(len) { + u16 u16idx, *u16p; + if (kdb_read_mem((kdbva_t)datap,(kdbbyt_t *)&u8idx,1,domid)!=1){ + kdbp("memory (u8idx) read error:%p\n",gp->tokidxtbl); + return 0; + } + u16p = u8idx + gp->tokidxtbl; + if (kdb_read_mem((kdbva_t)u16p,(kdbbyt_t *)&u16idx,2,domid)!=2){ + kdbp("tokidxtbl read error:%p\n", u16p); + return 0; + } + tptr = gp->toktbl + u16idx; + datap++; + len--; + + while ((kdb_read_mem((kdbva_t)tptr, (kdbbyt_t *)&u8idx, 1, domid)==1) && + u8idx) { + + if(skipped_first) { + *result = u8idx; + result++; + } else + skipped_first = 1; + tptr++; + } + } + *result = '\0'; + return off; /* return to offset to the next symbol */ +} + +#define EL4_NMLEN 127 +/* so much pain, so not sure of it's worth .. :).. */ +static kdbva_t +kdb_expand_el4_sym(struct gst_syminfo *gp, int low, char *result, char *symp) +{ + int i, j; + u8 *nmp = gp->kallsyms_names; /* guest address space */ + kdbbyt_t byte, prefix; + domid_t id = gp->domid; + kdbva_t addr; + + KDBGP1("Eel4sym:nmp:%p maxidx:$%d sym:%s\n", nmp, low, symp); + for (i=0; i <= low; i++) { + /* unsigned prefix = *name++; */ + if (kdb_read_mem((kdbva_t)nmp, &prefix, 1, id) != 1) { + kdbp("failed to read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:i:%d prefix:%x\n", i, prefix); + nmp++; + /* strncpy(namebuf + prefix, name, KSYM_NAME_LEN - prefix); */ + addr = (long)result + prefix; + for (j=0; j < EL4_NMLEN-prefix; j++) { + if (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) != 1) { + kdbp("failed read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:j:%d byte:%x\n", j, byte); + *(kdbbyt_t *)addr = byte; + addr++; nmp++; + if (byte == '\0') + break; + } + KDBGP2("el4sym:i:%d res:%s\n", i, result); + if (symp && strcmp(result, symp) == 0) + return(kdb_rd_guest_addrtbl(gp, i)); + + /* kallsyms.c: name += strlen(name) + 1; */ + if (j == EL4_NMLEN-prefix && byte != '\0') + while (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) && byte != '\0') + nmp++; + } + KDBGP1("Xel4sym: na-ga-da\n"); + return 0; +} + +static unsigned int +kdb_get_el5_symoffset(struct gst_syminfo *gp, long pos) +{ + int i; + u8 data, *namep; + domid_t domid = gp->domid; + + namep = gp->kallsyms_names; + for (i=0; i < pos; i++) { + if (kdb_read_mem((kdbva_t)namep, &data, 1, domid) != 1) { + kdbp("Can't read id:$%d mem:%p\n", domid, namep); + return 0; + } + namep = namep + data + 1; + } + return namep - gp->kallsyms_names; +} + +/* + * for a given guest domid (domid >= 0 && < KDB_HYPDOMID), convert addr to + * symbol. offset is set to addr - symbolstart + */ +char * +kdb_guest_addr2sym(unsigned long addr, domid_t domid, ulong *offsp) +{ + static char namebuf[KSYM_NAME_LEN+1]; + unsigned long low, high, mid; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + *offsp = 0; + if(!gp || gp->kallsyms_num_syms == 0) + return " ??? "; + + namebuf[0] = namebuf[KSYM_NAME_LEN] = '\0'; + if (1) { + /* do a binary search on the sorted kallsyms_addresses array */ + low = 0; + high = gp->kallsyms_num_syms; + + while (high-low > 1) { + mid = (low + high) / 2; + if (kdb_rd_guest_addrtbl(gp, mid) <= addr) + low = mid; + else + high = mid; + } + /* Grab name */ + if (gp->toktbl) { + int symoff = kdb_get_el5_symoffset(gp,low); + kdb_expand_el5_sym(gp, symoff, namebuf); + } else + kdb_expand_el4_sym(gp, low, namebuf, NULL); + *offsp = addr - kdb_rd_guest_addrtbl(gp, low); + return namebuf; + } + return " ???? "; +} + + +/* + * save guest (dom0 and others) symbols info : domid and following addresses: + * &kallsyms_names &kallsyms_addresses &kallsyms_num_syms \ + * &kallsyms_token_table &kallsyms_token_index + */ +void +kdb_sav_dom_syminfo(domid_t domid, long namesp, long addrap, long nump, + long toktblp, long tokidxp) +{ + int bytes; + long val = 0; /* must be set to zero for 32 on 64 cases */ + struct gst_syminfo *gp = kdb_get_syminfo_slot(); + + if (gp == NULL) { + kdbp("kdb:kdb_sav_dom_syminfo():Table full.. symbols not saved\n"); + return; + } + memset(gp, 0, sizeof(*gp)); + + gp->domid = domid; + gp->bitness = kdb_guest_bitness(domid); + gp->addrtblp = (void *)addrap; + gp->kallsyms_names = (u8 *)namesp; + gp->toktbl = (u8 *)toktblp; + gp->tokidxtbl = (u16 *)tokidxp; + + KDBGP("domid:%x bitness:$%d numsyms:$%ld arrayp:%p\n", domid, + gp->bitness, gp->kallsyms_num_syms, gp->addrtblp); + + bytes = gp->bitness/8; + if (kdb_read_mem(nump, (kdbbyt_t *)&val, bytes, domid) != bytes) { + + kdbp("Unable to read number of symbols from:%lx\n", nump); + memset(gp, 0, sizeof(*gp)); + return; + } else + kdbp("Number of symbols:$%ld\n", val); + + gp->kallsyms_num_syms = val; + + bytes = (gp->bitness/8) * gp->kallsyms_num_syms; + gp->stext = kdb_guest_sym2addr("_stext", domid); + gp->etext = kdb_guest_sym2addr("_etext", domid); + if (!gp->stext || !gp->etext) + kdbp("Warn: Can't find stext/etext\n"); + + if (gp->toktbl && gp->tokidxtbl) { + gp->sinittext = kdb_guest_sym2addr("_sinittext", domid); + gp->einittext = kdb_guest_sym2addr("_einittext", domid); + if (!gp->sinittext || !gp->einittext) { + kdbp("Warn: Can't find sinittext/einittext\n"); + } + } + KDBGP1("stxt:%lx etxt:%lx sitxt:%lx eitxt:%lx\n", gp->stext, gp->etext, + gp->sinittext, gp->einittext); + kdbp("Succesfully saved symbol info\n"); +} + +/* + * given a symbol string for a guest/domid, return its address + */ +kdbva_t +kdb_guest_sym2addr(char *symp, domid_t domid) +{ + char namebuf[KSYM_NAME_LEN+1]; + int i, off=0; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + KDBGP("sym2a: sym:%s domid:%x numsyms:%ld\n", symp, domid, + gp ? gp->kallsyms_num_syms: -1); + + if (!gp) + return 0; + + if (gp->toktbl == 0 || gp->tokidxtbl == 0) + return(kdb_expand_el4_sym(gp, gp->kallsyms_num_syms, namebuf, symp)); + + for (i=0; i < gp->kallsyms_num_syms; i++) { + off = kdb_expand_el5_sym(gp, off, namebuf); + KDBGP1("i:%d namebuf:%s\n", i, namebuf); + if (strcmp(namebuf, symp) == 0) { + return(kdb_rd_guest_addrtbl(gp, i)); + } + } + KDBGP("sym2a:exit:na-ga-da\n"); + return 0; +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/include/kdb_extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdb_extern.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDB_EXTERN_H +#define _KDB_EXTERN_H + +#define KDB_TRAP_FATAL 1 /* trap is fatal. can't resume from kdb */ +#define KDB_TRAP_NONFATAL 2 /* can resume from kdb */ +#define KDB_TRAP_KDBSTACK 3 /* to debug kdb itself. dump kdb stack */ + +/* following can be called from anywhere in xen to debug */ +extern void kdb_trap_immed(int); +extern void kdbtrc(unsigned int, unsigned int, uint64_t, uint64_t, uint64_t); +extern void kdbp(const char *fmt, ...); + +typedef unsigned long kdbva_t; +typedef unsigned char kdbbyt_t; +typedef unsigned long kdbma_t; + +extern unsigned long kdb_dr7; + + +extern volatile int kdb_session_begun; +extern volatile int kdb_enabled; +extern void kdb_init(void); +extern int kdb_keyboard(struct cpu_user_regs *); +extern void kdb_ssni_reenter(struct cpu_user_regs *); +extern int kdb_handle_trap_entry(int, struct cpu_user_regs *); +extern int kdb_trap_fatal(int, struct cpu_user_regs *); /* fatal with regs */ +extern void kdb_dump_vmcs(uint16_t did, int vid); +void kdb_dump_vmcb(uint16_t did, int vid); +extern void kdb_dump_time_pcpu(void); + + +#define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 */ +#define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */ +static inline void __vmptrst(u64 *addr) +{ + asm volatile ( VMPTRST_OPCODE + MODRM_EAX_07 + : + : "a" (addr) + : "memory"); +} + +extern void mukchk(unsigned long); +#define is_hvm_or_hyb_domain is_hvm_domain +#define is_hvm_or_hyb_vcpu is_hvm_vcpu + + +#endif /* _KDB_EXTERN_H */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/include/kdbdefs.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbdefs.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBDEFS_H +#define _KDBDEFS_H + +/* reason we are entering kdbmain (bp == breakpoint) */ +typedef enum { + KDB_REASON_KEYBOARD=1, /* Keyboard entry - always 1 */ + KDB_REASON_BPEXCP, /* #BP excp: sw bp (INT3) */ + KDB_REASON_DBEXCP, /* #DB excp: TF flag or HW bp */ + KDB_REASON_PAUSE_IPI, /* received pause IPI from another CPU */ +} kdb_reason_t; + + +/* cpu state: past, present, and future */ +typedef enum { + KDB_CPU_INVAL=0, /* invalid value. not in or leaving kdb */ + KDB_CPU_QUIT, /* main cpu does GO. all others do QUIT */ + KDB_CPU_PAUSE, /* cpu is paused */ + KDB_CPU_DISABLE, /* disable interrupts */ + KDB_CPU_SHOWPC, /* all cpus must display their pc */ + KDB_CPU_DO_VMEXIT, /* all cpus must do vmcs vmexit. intel only */ + KDB_CPU_MAIN_KDB, /* cpu in kdb main command loop */ + KDB_CPU_GO, /* user entered go for this cpu */ + KDB_CPU_SS, /* single step for this cpu */ + KDB_CPU_NI, /* go to next instr after the call instr */ + KDB_CPU_INSTALL_BP, /* delayed install of sw bp(s) by this cpu */ +} kdb_cpu_cmd_t; + +/* ============= kdb commands ============================================= */ + +typedef kdb_cpu_cmd_t (*kdb_func_t)(int, const char **, struct cpu_user_regs *); +typedef kdb_cpu_cmd_t (*kdb_usgf_t)(void); + +typedef enum { + KDB_REPEAT_NONE = 0, /* Do not repeat this command */ + KDB_REPEAT_NO_ARGS, /* Repeat the command without arguments */ + KDB_REPEAT_WITH_ARGS, /* Repeat the command including its arguments */ +} kdb_repeat_t; + +typedef struct _kdbtab { + char *kdb_cmd_name; /* Command name */ + kdb_func_t kdb_cmd_func; /* ptr to function to execute command */ + kdb_usgf_t kdb_cmd_usgf; /* usage function ptr */ + int kdb_cmd_crash_avail; /* available in sys fatal/crash state */ + kdb_repeat_t kdb_cmd_repeat; /* Does command auto repeat on enter? */ +} kdbtab_t; + + +/* ============= types and stuff ========================================= */ +#define BFD_INVAL (~0UL) /* invalid bfd_vma */ + +#if defined(__x86_64__) + #define KDBIP rip + #define KDBSP rsp +#else + #define KDBIP eip + #define KDBSP esp +#endif + +/* ============= macros ================================================== */ +extern volatile int kdbdbg; +#define KDBGP(...) {(kdbdbg) ? kdbp(__VA_ARGS__):0;} +#define KDBGP1(...) {(kdbdbg>1) ? kdbp(__VA_ARGS__):0;} +#define KDBGP2(...) {(kdbdbg>2) ? kdbp(__VA_ARGS__):0;} +#define KDBGP3(...) {0;}; + +#define KDBMIN(x,y) (((x)<(y))?(x):(y)) + +#endif /* !_KDBDEFS_H */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/include/kdbinc.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbinc.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBINC_H +#define _KDBINC_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#ifdef _XEN_LATEST +#include +#endif + +#include + +#include "kdb_extern.h" +#include "kdbdefs.h" +#include "kdbproto.h" + +#endif /* !_KDBINC_H */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/include/kdbproto.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbproto.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBPROTO_H +#define _KDBPROTO_H + +/* hypervisor interfaces use by kdb or kdb interfaces in xen files */ +extern void console_putc(char); +extern int console_getc(void); +extern void show_trace(struct cpu_user_regs *); +extern void kdb_dump_timer_queues(void); +extern void kdb_time_resume(int); +extern void kdb_print_sched_info(void); +extern void kdb_curr_cpu_flush_vmcs(void); +extern unsigned long address_lookup(char *); +extern void kdb_prnt_guest_mapped_irqs(void); + +/* kdb globals */ +extern kdbtab_t *kdb_cmd_tbl; +extern char kdb_prompt[32]; +extern volatile int kdb_sys_crash; +extern volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +extern volatile int kdb_trcon; + +/* kdb interfaces */ +extern void __init kdb_io_init(void); +extern void kdb_init_cmdtab(void); +extern void kdb_do_cmds(struct cpu_user_regs *); +extern int kdb_check_sw_bkpts(struct cpu_user_regs *); +extern int kdb_check_watchpoints(struct cpu_user_regs *); +extern void kdb_do_watchpoints(kdbva_t, int, int); +extern void kdb_install_watchpoints(void); +extern void kdb_clear_wps(int); +extern kdbma_t kdb_rd_dbgreg(int); + + + +extern char *kdb_get_cmdline(char *); +extern void kdb_clear_prev_cmd(void); +extern void kdb_toggle_dis_syntax(void); +extern int kdb_check_call_instr(domid_t, kdbva_t); +extern void kdb_display_pc(struct cpu_user_regs *); +extern kdbva_t kdb_print_instr(kdbva_t, long, domid_t); +extern int kdb_read_mmem(kdbva_t, kdbbyt_t *, int); +extern int kdb_read_mem(kdbva_t, kdbbyt_t *, int, domid_t); +extern int kdb_write_mem(kdbva_t, kdbbyt_t *, int, domid_t); + +extern void kdb_install_all_swbp(void); +extern void kdb_uninstall_all_swbp(void); +extern int kdb_swbp_exists(void); +extern void kdb_flush_swbp_table(void); +extern int kdb_is_addr_guest_text(kdbva_t, int); +extern kdbva_t kdb_guest_sym2addr(char *, domid_t); +extern char *kdb_guest_addr2sym(unsigned long, domid_t, ulong *); +extern void kdb_prnt_addr2sym(domid_t, kdbva_t, char *); +extern void kdb_sav_dom_syminfo(domid_t, long, long, long, long, long); +extern int kdb_guest_bitness(domid_t); +extern void kdb_nmi_pause_cpus(cpumask_t); + +extern void kdb_trczero(void); +void kdb_trcp(void); + + + +#endif /* !_KDBPROTO_H */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/kdb_cmds.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_cmds.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,3769 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +#if defined(__x86_64__) + #define KDBF64 "%lx" + #define KDBFL "%016lx" /* print long all digits */ +#else + #define KDBF64 "%llx" + #define KDBFL "%08lx" +#endif + +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + #define KDB_LKDEF(l) ((l).raw.lock) + #define KDB_PGLLE(t) ((t).tail) /* page list last element ^%$#@ */ +#else + #define KDB_LKDEF(l) ((l).lock) + #define KDB_PGLLE(t) ((t).prev) /* page list last element ^%$#@ */ +#endif + +#define KDB_CMD_HISTORY_COUNT 32 +#define CMD_BUFLEN 200 /* kdb_printf: max printline == 256 */ + +#define KDBMAXSBP 16 /* max number of software breakpoints */ +#define KDB_MAXARGC 16 /* max args in a kdb command */ +#define KDB_MAXBTP 8 /* max display args in btp */ + +/* condition is: 'r6 == 0x123f' or '0xffffffff82800000 != deadbeef' */ +struct kdb_bpcond { + kdbbyt_t bp_cond_status; /* 0 == off, 1 == register, 2 == memory */ + kdbbyt_t bp_cond_type; /* 0 == bad, 1 == equal, 2 == not equal */ + ulong bp_cond_lhs; /* lhs of condition: reg offset or mem loc */ + ulong bp_cond_rhs; /* right hand side of condition */ +}; + +/* software breakpoint structure */ +struct kdb_sbrkpt { + kdbva_t bp_addr; /* address the bp is set at */ + domid_t bp_domid; /* which domain the bp belongs to */ + kdbbyt_t bp_originst; /* save orig instr/s here */ + kdbbyt_t bp_deleted; /* delete pending on this bp */ + kdbbyt_t bp_ni; /* set for KDB_CPU_NI */ + kdbbyt_t bp_just_added; /* added in the current kdb session */ + kdbbyt_t bp_type; /* 0 = normal, 1 == cond, 2 == btp */ + union { + struct kdb_bpcond bp_cond; + ulong *bp_btp; + } u; +}; + +/* don't use kmalloc in kdb which hijacks all cpus */ +static ulong kdb_btp_argsa[KDBMAXSBP][KDB_MAXBTP]; +static ulong *kdb_btp_ap[KDBMAXSBP]; + +static struct kdb_reg_nmofs { + char *reg_nm; + int reg_offs; +} kdb_reg_nm_offs[] = { + { "rax", offsetof(struct cpu_user_regs, rax) }, + { "rbx", offsetof(struct cpu_user_regs, rbx) }, + { "rcx", offsetof(struct cpu_user_regs, rcx) }, + { "rdx", offsetof(struct cpu_user_regs, rdx) }, + { "rsi", offsetof(struct cpu_user_regs, rsi) }, + { "rdi", offsetof(struct cpu_user_regs, rdi) }, + { "rbp", offsetof(struct cpu_user_regs, rbp) }, + { "rsp", offsetof(struct cpu_user_regs, rsp) }, + { "r8", offsetof(struct cpu_user_regs, r8) }, + { "r9", offsetof(struct cpu_user_regs, r9) }, + { "r10", offsetof(struct cpu_user_regs, r10) }, + { "r11", offsetof(struct cpu_user_regs, r11) }, + { "r12", offsetof(struct cpu_user_regs, r12) }, + { "r13", offsetof(struct cpu_user_regs, r13) }, + { "r14", offsetof(struct cpu_user_regs, r14) }, + { "r15", offsetof(struct cpu_user_regs, r15) }, + { "rflags", offsetof(struct cpu_user_regs, rflags) } }; + +static const int KDBBPSZ=1; /* size of KDB_BPINST is 1 byte*/ +static kdbbyt_t kdb_bpinst = 0xcc; /* breakpoint instr: INT3 */ +static struct kdb_sbrkpt kdb_sbpa[KDBMAXSBP]; /* soft brkpt array/table */ +static kdbtab_t *tbp; + +static int kdb_set_bp(domid_t, kdbva_t, int, ulong *, char*, char*, char*); +static void kdb_print_uregs(struct cpu_user_regs *); + + +/* ===================== cmdline functions ================================ */ + +/* lp points to a string of only alpha numeric chars terminated by '\n'. + * Parse the string into argv pointers, and RETURN argc + * Eg: if lp --> "dr sp\n" : argv[0]=="dr\0" argv[1]=="sp\0" argc==2 + */ +static int +kdb_parse_cmdline(char *lp, const char **argv) +{ + int i=0; + + for (; *lp == ' '; lp++); /* note: isspace() skips '\n' also */ + while ( *lp != '\n' ) { + if (i == KDB_MAXARGC) { + printk("kdb: max args exceeded\n"); + break; + } + argv[i++] = lp; + for (; *lp != ' ' && *lp != '\n'; lp++); + if (*lp != '\n') + *lp++ = '\0'; + for (; *lp == ' '; lp++); + } + *lp = '\0'; + return i; +} + +void +kdb_clear_prev_cmd() /* so previous command is not repeated */ +{ + tbp = NULL; +} + +void +kdb_do_cmds(struct cpu_user_regs *regs) +{ + char *cmdlinep; + const char *argv[KDB_MAXARGC]; + int argc = 0, curcpu = smp_processor_id(); + kdb_cpu_cmd_t result = KDB_CPU_MAIN_KDB; + + snprintf(kdb_prompt, sizeof(kdb_prompt), "[%d]xkdb> ", curcpu); + + while (result == KDB_CPU_MAIN_KDB) { + cmdlinep = kdb_get_cmdline(kdb_prompt); + if (*cmdlinep == '\n') { + if (tbp==NULL || tbp->kdb_cmd_func==NULL) + continue; + else + argc = -1; /* repeat prev command */ + } else { + argc = kdb_parse_cmdline(cmdlinep, argv); + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_func; tbp++) { + if (strcmp(argv[0], tbp->kdb_cmd_name)==0) + break; + } + } + if (kdb_sys_crash && tbp->kdb_cmd_func && !tbp->kdb_cmd_crash_avail) { + kdbp("cmd not available in fatal/crashed state....\n"); + continue; + } + if (tbp->kdb_cmd_func) { + result = (*tbp->kdb_cmd_func)(argc, argv, regs); + if (tbp->kdb_cmd_repeat == KDB_REPEAT_NONE) + tbp = NULL; + } else + kdbp("kdb: Unknown cmd: %s\n", cmdlinep); + } + kdb_cpu_cmd[curcpu] = result; + return; +} + +/* ===================== Util functions ==================================== */ + +int +kdb_vcpu_valid(struct vcpu *in_vp) +{ + struct domain *dp; + struct vcpu *vp; + + for(dp=domain_list; in_vp && dp; dp=dp->next_in_list) + for_each_vcpu(dp, vp) + if (in_vp == vp) + return 1; + return 0; /* not found */ +} + +/* + * Given a symbol, find it's address + */ +static kdbva_t +kdb_sym2addr(const char *p, domid_t domid) +{ + kdbva_t addr; + + KDBGP1("sym2addr: p:%s domid:%d\n", p, domid); + if (domid == DOMID_IDLE) + addr = address_lookup((char *)p); + else + addr = (kdbva_t)kdb_guest_sym2addr((char *)p, domid); + KDBGP1("sym2addr: exit: addr returned:0x%lx\n", addr); + return addr; +} + +/* + * convert ascii to int decimal (base 10). + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2deci(const char *strp, int *intp) +{ + const char *endp; + + KDBGP2("str2deci: str:%s\n", strp); + if (!isdigit(*strp)) + return 0; + *intp = (int)simple_strtoul(strp, &endp, 10); + if (endp != strp+strlen(strp)) + return 0; + KDBGP2("str2deci: intval:$%d\n", *intp); + return 1; +} +/* + * convert ascii to long. NOTE: base is 16 + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2ulong(const char *strp, ulong *longp) +{ + ulong val; + const char *endp; + + KDBGP2("str2long: str:%s\n", strp); + if (!isxdigit(*strp)) + return 0; + val = (long)simple_strtoul(strp, &endp, 16); /* handles leading 0x */ + if (endp != strp+strlen(strp)) + return 0; + if (longp) + *longp = val; + KDBGP2("str2long: val:0x%lx\n", val); + return 1; +} +/* + * convert a symbol or ascii address to hex address + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2addr(const char *strp, kdbva_t *addrp, domid_t id) +{ + kdbva_t addr; + const char *endp; + + /* assume it's an address */ + KDBGP2("str2addr: str:%s id:%d\n", strp, id); + addr = (kdbva_t)simple_strtoul(strp, &endp, 16); /*handles leading 0x */ + if (endp != strp+strlen(strp)) + if ( !(addr=kdb_sym2addr(strp, id)) ) + return 0; + *addrp = addr; + KDBGP2("str2addr: addr:0x%lx\n", addr); + return 1; +} + +/* Given domid, return ptr to struct domain + * IF domid == DOMID_IDLE return ptr to idle_domain + * IF domid == valid domain, return ptr to domain struct + * else domid is bad and return NULL + */ +static struct domain * +kdb_domid2ptr(domid_t domid) +{ + struct domain *dp; + + /* get_domain_by_id() ret NULL for both DOMID_IDLE and bad domids */ + if (domid == DOMID_IDLE) + dp = idle_vcpu[smp_processor_id()]->domain; + else + dp = get_domain_by_id(domid); /* NULL now means bad domid */ + return dp; +} + +/* + * Returns: 0: failed. invalid domid or string, *idp not changed. + */ +static int +kdb_str2domid(const char *domstr, domid_t *idp, int perr) +{ + int id; + if (!kdb_str2deci(domstr, &id) || !kdb_domid2ptr((domid_t)id)) { + if (perr) + kdbp("Invalid domid:%s\n", domstr); + return 0; + } + *idp = (domid_t)id; + return 1; +} + +static struct domain * +kdb_strdomid2ptr(const char *domstr, int perror) +{ + domid_t domid; + if (kdb_str2domid(domstr, &domid, perror)) { + return(kdb_domid2ptr(domid)); + } + return NULL; +} + +/* return a guest bitness: 32 or 64 */ +int +kdb_guest_bitness(domid_t domid) +{ + const int HYPSZ = sizeof(long) * 8; + struct domain *dp = kdb_domid2ptr(domid); + int retval; + + if (is_idle_domain(dp)) + retval = HYPSZ; + else if (is_hvm_or_hyb_domain(dp)) + retval = (hvm_long_mode_enabled(dp->vcpu[0])) ? HYPSZ : 32; + else + retval = is_pv_32bit_domain(dp) ? 32 : HYPSZ; + KDBGP1("gbitness: domid:%d dp:%p bitness:%d\n", domid, dp, retval); + return retval; +} + +/* kdb_print_spin_lock(&xyz_lock, "xyz_lock:", "\n"); */ +static void +kdb_print_spin_lock(char *strp, spinlock_t *lkp, char *nlp) +{ + kdbp("%s %04hx %d %d%s", strp, KDB_LKDEF(*lkp), lkp->recurse_cpu, + lkp->recurse_cnt, nlp); +} + +/* check if register string is valid. if yes, return offset to the register + * in cpu_user_regs, else return -1 */ +static int +kdb_valid_reg(const char *nmp) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (strcmp(kdb_reg_nm_offs[i].reg_nm, nmp) == 0) + return kdb_reg_nm_offs[i].reg_offs; + return -1; +} + +/* given offset of register, return register name string. if offset is invalid + * return NULL */ +static char *kdb_regoffs_to_name(int offs) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (kdb_reg_nm_offs[i].reg_offs == offs) + return kdb_reg_nm_offs[i].reg_nm; + return NULL; +} + +/* ===================== util struct funcs ================================= */ +static void +kdb_prnt_timer(struct timer *tp) +{ +#if XEN_SUBVERSION == 0 + kdbp(" expires:%016lx expires_end:%016lx cpu:%d status:%x\n", tp->expires, + tp->expires_end, tp->cpu, tp->status); +#else + kdbp(" expires:%016lx cpu:%d status:%x\n", tp->expires, tp->cpu,tp->status); +#endif + kdbp(" function data:%p ptr:%p ", tp->data, tp->function); + kdb_prnt_addr2sym(DOMID_IDLE, (kdbva_t)tp->function, "\n"); +} + +static void +kdb_prnt_periodic_time(struct periodic_time *ptp) +{ + kdbp(" next:%p prev:%p\n", ptp->list.next, ptp->list.prev); + kdbp(" on_list:%d one_shot:%d dont_freeze:%d irq_issued:%d src:%x irq:%x\n", + ptp->on_list, ptp->one_shot, ptp->do_not_freeze, ptp->irq_issued, + ptp->source, ptp->irq); + kdbp(" vcpu:%p pending_intr_nr:%08x period:%016lx\n", ptp->vcpu, + ptp->pending_intr_nr, ptp->period); + kdbp(" scheduled:%016lx last_plt_gtime:%016lx\n", ptp->scheduled, + ptp->last_plt_gtime); + kdbp(" \n timer info:\n"); + kdb_prnt_timer(&ptp->timer); + kdbp("\n"); +} + +/* ===================== cmd functions ==================================== */ + +/* + * FUNCTION: Disassemble instructions + */ +static kdb_cpu_cmd_t +kdb_usgf_dis(void) +{ + kdbp("dis [addr|sym][num][domid] : Disassemble instrs\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dis(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int num = 8; /* display 8 instr by default */ + static kdbva_t addr = BFD_INVAL; + static domid_t domid; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dis(); + + if (argc != -1) /* not a command repeat */ + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + if (argc >= 4 && !kdb_str2domid(argv[3], &domid, 1)) { + return KDB_CPU_MAIN_KDB; + } + if (argc >= 3 && !kdb_str2deci(argv[2], &num)) { + kdbp("kdb:Invalid num\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc > 1 && !kdb_str2addr(argv[1], &addr, domid)) { + kdbp("kdb:Invalid addr/sym\n"); + kdbp("(num has to be specified if providing domid)\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc == 1) /* not command repeat */ + addr = regs->KDBIP; /* PC is the default */ + else if (addr == BFD_INVAL) { + kdbp("kdb:Invalid addr/sym\n"); + return KDB_CPU_MAIN_KDB; + } + addr = kdb_print_instr(addr, num, domid); + return KDB_CPU_MAIN_KDB; +} + +/* FUNCTION: kdb_cmdf_dism() Toggle disassembly syntax from Intel to ATT/GAS */ +static kdb_cpu_cmd_t +kdb_usgf_dism(void) +{ + kdbp("dism: toggle disassembly mode between ATT/GAS and INTEL\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dism(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dism(); + + kdb_toggle_dis_syntax(); + return KDB_CPU_MAIN_KDB; +} + +static void +_kdb_show_guest_stack(domid_t domid, kdbva_t ipaddr, kdbva_t spaddr) +{ + kdbva_t val; + int num=0, max=0, rd = kdb_guest_bitness(domid)/8; + + kdb_print_instr(ipaddr, 1, domid); + KDBGP("_guest_stack:sp:%lx domid:%d rd:$%d\n", spaddr, domid, rd); + val = 0; /* must zero, in case guest is 32bit */ + while((kdb_read_mem(spaddr,(kdbbyt_t *)&val,rd,domid)==rd) && num < 16){ + KDBGP1("gstk:addr:%lx val:%lx\n", spaddr, val); + if (kdb_is_addr_guest_text(val, domid)) { + kdb_print_instr(val, 1, domid); + num++; + } + if (max++ > 10000) /* don't walk down the stack forever */ + break; /* 10k is chosen randomly */ + spaddr += rd; + } +} + +/* Read guest memory and display address that looks like text. */ +static void +kdb_show_guest_stack(struct cpu_user_regs *regs, struct vcpu *vcpup) +{ + kdbva_t ipaddr=regs->KDBIP, spaddr = regs->KDBSP; + domid_t domid = vcpup->domain->domain_id; + + ASSERT(domid != DOMID_IDLE); + _kdb_show_guest_stack(domid, ipaddr, spaddr); +} + +/* display stack. if vcpu ptr given, then display stack for that. Otherwise, + * use current regs */ +static kdb_cpu_cmd_t +kdb_usgf_f(void) +{ + kdbp("f [vcpu-ptr]: dump current/vcpu stack\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_f(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_f(); + + if (argc > 1 ) { + struct vcpu *vp; + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp)) { + kdbp("kdb: Bad VCPU ptr:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdb_show_guest_stack(&vp->arch.user_regs, vp); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs)) + kdb_show_guest_stack(regs, current); + else + show_trace(regs); + return KDB_CPU_MAIN_KDB; +} + +/* given an spaddr and domid for guest, dump stack */ +static kdb_cpu_cmd_t +kdb_usgf_fg(void) +{ + kdbp("fg domid RIP ESP: dump guest stack given domid, RIP, and ESP\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_fg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid; + kdbva_t ipaddr, spaddr; + + if (argc != 4) + return kdb_usgf_fg(); + + if (kdb_str2domid(argv[1], &domid, 1)==0) { + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[2], &ipaddr)==0) { + kdbp("Bad ipaddr:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[3], &spaddr)==0) { + kdbp("Bad spaddr:%s\n", argv[3]); + return KDB_CPU_MAIN_KDB; + } + _kdb_show_guest_stack(domid, ipaddr, spaddr); + return KDB_CPU_MAIN_KDB; +} + +/* Display kdb stack. for debugging kdb itself */ +static kdb_cpu_cmd_t +kdb_usgf_kdbf(void) +{ + kdbp("kdbf: display kdb stack. for debugging kdb only\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbf(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbf(); + + kdb_trap_immed(KDB_TRAP_KDBSTACK); + return KDB_CPU_MAIN_KDB; +} + +/* worker function to display memory. Request could be for any guest, domid. + * Also address could be machine or virtual */ +static void +_kdb_display_mem(kdbva_t *addrp, int *lenp, int wordsz, int domid, int is_maddr) +{ + #define DDBUFSZ 4096 + + kdbbyt_t buf[DDBUFSZ], *bp; + int numrd, bytes; + int len = *lenp; + kdbva_t addr = *addrp; + + /* round len down to wordsz boundry because on intel endian, printing + * characters is not prudent, (long and ints can't be interpreted + * easily) */ + len &= ~(wordsz-1); + len = KDBMIN(DDBUFSZ, len); + len = len ? len : wordsz; + + KDBGP("dmem:addr:%lx buf:%p len:$%d domid:%d sz:$%d maddr:%d\n", addr, + buf, len, domid, wordsz, is_maddr); + if (is_maddr) + numrd=kdb_read_mmem((kdbma_t)addr, buf, len); + else + numrd=kdb_read_mem(addr, buf, len, domid); + if (numrd != len) + kdbp("Memory read error. Bytes read:$%d\n", numrd); + + for (bp = buf; numrd > 0;) { + kdbp("%016lx: ", addr); + + /* display 16 bytes per line */ + for (bytes=0; bytes < 16 && numrd > 0; bytes += wordsz) { + if (numrd >= wordsz) { + if (wordsz == 8) + kdbp(" %016lx", *(long *)bp); + else + kdbp(" %08x", *(int *)bp); + bp += wordsz; + numrd -= wordsz; + addr += wordsz; + } + } + kdbp("\n"); + continue; + } + *lenp = len; + *addrp = addr; +} + +/* display machine mem, ie, the given address is machine address */ +static kdb_cpu_cmd_t +kdb_display_mmem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbma_t maddr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&maddr, &len, wordsz, id, 1); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + + if (!kdb_str2ulong(argv[1], &maddr)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + _kdb_display_mem(&maddr, &len, wordsz, 0, 1); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly machine Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dwm(void) +{ + kdbp("dwm: maddr|sym [num] : dump memory word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dwm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 4, kdb_usgf_dwm); +} + +/* + * FUNCTION: Dispaly machine Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_ddm(void) +{ + kdbp("ddm: maddr|sym [num] : dump double word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ddm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 8, kdb_usgf_ddm); +} + +/* + * FUNCTION: Dispaly Memory : word or doubleword + * wordsz : bytes in word. 4 or 8 + * + * We display upto BUFSZ bytes. User can just press enter for more. + * addr is always in hex with or without leading 0x + */ +static kdb_cpu_cmd_t +kdb_display_mem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbva_t addr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&addr, &len, wordsz, id, 0); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + id = DOMID_IDLE; /* not a command repeat, reset dom id */ + if (argc >= 4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + _kdb_display_mem(&addr, &len, wordsz, id, 0); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dw(void) +{ + kdbp("dw vaddr|sym [num][domid] : dump mem word. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 4, kdb_usgf_dw); +} + +/* + * FUNCTION: Dispaly Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_dd(void) +{ + kdbp("dd vaddr|sym [num][domid] : dump dword. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dd(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 8, kdb_usgf_dd); +} + +/* + * FUNCTION: Modify Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_mw(void) +{ + kdbp("mw vaddr|sym val [domid] : modify memory word in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_mw(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val, 4, id) != 4) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_md(void) +{ + kdbp("md vaddr|sym val [domid] : modify memory dword in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_md(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_md(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) { + return KDB_CPU_MAIN_KDB; + } + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val,sizeof(val),id) != sizeof(val)) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +struct Xgt_desc_struct { + unsigned short size; + unsigned long address __attribute__((packed)); +}; + +void +kdb_show_special_regs(struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + unsigned short tr; /* Task Register segment selector */ + __u64 efer; + + kdbp("\nSpecial Registers:\n"); + __asm__ __volatile__ ("sidt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("IDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("GDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + + kdbp("cr0: %016lx cr2: %016lx\n", read_cr0(), read_cr2()); + kdbp("cr3: %016lx cr4: %016lx\n", read_cr3(), read_cr4()); + __asm__ __volatile__ ("str (%0) \n":: "a"(&tr) : "memory"); + kdbp("TR: %x\n", tr); + + rdmsrl(MSR_EFER, efer); /* IA32_EFER */ + kdbp("efer:"KDBF64" LMA(IA-32e mode):%d SCE(syscall/sysret):%d\n", + efer, ((efer&EFER_LMA) != 0), ((efer&EFER_SCE) != 0)); + + kdbp("DR0: %016lx DR1:%016lx DR2:%016lx\n", kdb_rd_dbgreg(0), + kdb_rd_dbgreg(1), kdb_rd_dbgreg(2)); + kdbp("DR3: %016lx DR6:%016lx DR7:%016lx\n", kdb_rd_dbgreg(3), + kdb_rd_dbgreg(6), kdb_rd_dbgreg(7)); +} + +/* + * FUNCTION: Dispaly Registers. If "sp" argument, then display additional regs + */ +static kdb_cpu_cmd_t +kdb_usgf_dr(void) +{ + kdbp("dr [sp]: display registers. sp to display special regs also\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dr(); + + KDBGP1("regs:%p .rsp:%lx .rip:%lx\n", regs, regs->rsp, regs->rip); + show_registers(regs); + if (argc > 1 && !strcmp(argv[1], "sp")) + kdb_show_special_regs(regs); + return KDB_CPU_MAIN_KDB; +} + +/* show registers on stack bottom where guest context is. same as dr if + * not running in guest mode */ +static kdb_cpu_cmd_t +kdb_usgf_drg(void) +{ + kdbp("drg: display active guest registers at stack bottom\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_drg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_drg(); + + kdbp("\tNote: ds/es/fs/gs etc.. are not saved from the cpu\n"); + kdb_print_uregs(guest_cpu_user_regs()); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Register + */ +static kdb_cpu_cmd_t +kdb_usgf_mr(void) +{ + kdbp("mr reg val : Modify Register. val assumed in hex\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int regoffs; + ulong val; + + if (argc != 3 || !kdb_str2ulong(argv[2], &val)) { + return kdb_usgf_mr(); + } + argp = argv[1]; + +#if defined(__x86_64__) + if ((regoffs=kdb_valid_reg(argp)) != -1) + *((uint64_t *)((char *)regs+regoffs)) = val; +#else + if (!strcmp(argp, "eax")) + regs->eax = val; + else if (!strcmp(argp, "ebx")) + regs->ebx = val; + else if (!strcmp(argp, "ecx")) + regs->ecx = val; + else if (!strcmp(argp, "edx")) + regs->edx = val; + else if (!strcmp(argp, "esi")) + regs->esi = val; + else if (!strcmp(argp, "edi")) + regs->edi = val; + else if (!strcmp(argp, "ebp")) + regs->ebp = val; + else if (!strcmp(argp, "esp")) + regs->esp = val; + else if (!strcmp(argp, "eflags") || !strcmp(argp, "rflags")) + regs->eflags = val; +#endif + else + kdbp("Error. Bad register : %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Single Step + */ +static kdb_cpu_cmd_t +kdb_usgf_ss(void) +{ + kdbp("ss: single step\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ss(int argc, const char **argv, struct cpu_user_regs *regs) +{ + #define KDB_HALT_INSTR 0xf4 + + kdbbyt_t byte; + struct domain *dp = current->domain; + domid_t id = guest_mode(regs) ? dp->domain_id : DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ss(); + + KDBGP("enter kdb_cmdf_ss \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (kdb_read_mem(regs->KDBIP, &byte, 1, id) == 1) { + if (byte == KDB_HALT_INSTR) { + kdbp("kdb: jumping over halt instruction\n"); + regs->KDBIP++; + } + } else { + kdbp("kdb: Failed to read byte at: %lx\n", regs->KDBIP); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) { + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + current->arch.hvm_vcpu.single_step = 1; + } else + regs->eflags |= X86_EFLAGS_TF; + + return KDB_CPU_SS; +} + +/* + * FUNCTION: Next Instruction, step over the call instr to the next instr + */ +static kdb_cpu_cmd_t +kdb_usgf_ni(void) +{ + kdbp("ni: single step, stepping over function calls\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ni(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int sz, i; + domid_t id=guest_mode(regs) ? current->domain->domain_id:DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ni(); + + KDBGP("enter kdb_cmdf_ni \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if ((sz=kdb_check_call_instr(id, regs->KDBIP)) == 0) /* !call instr */ + return kdb_cmdf_ss(argc, argv, regs); /* just do ss */ + + if ((i=kdb_set_bp(id, regs->KDBIP+sz, 1,0,0,0,0)) >= KDBMAXSBP) /* failed */ + return KDB_CPU_MAIN_KDB; + + kdb_sbpa[i].bp_ni = 1; + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + else + regs->eflags &= ~X86_EFLAGS_TF; + + return KDB_CPU_NI; +} + +static void +kdb_btf_enable(void) +{ + u64 debugctl; + rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); + wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 0x2); +} + +/* + * FUNCTION: Single Step to branch. Doesn't seem to work very well. + */ +static kdb_cpu_cmd_t +kdb_usgf_ssb(void) +{ + kdbp("ssb: singe step to branch\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ssb(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ssb(); + + KDBGP("MUK: enter kdb_cmdf_ssb\n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (is_hvm_or_hyb_vcpu(current)) + current->domain->debugger_attached = 1; /* vmx/svm_do_resume()*/ + + regs->eflags |= X86_EFLAGS_TF; + kdb_btf_enable(); + return KDB_CPU_SS; +} + +/* + * FUNCTION: Continue Execution. TF must be cleared here as this could run on + * any cpu. Hence not OK to do it from kdb_end_session. + */ +static kdb_cpu_cmd_t +kdb_usgf_go(void) +{ + kdbp("go: leave kdb and continue execution\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_go(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_go(); + + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_GO; +} + +/* All cpus must display their current context */ +static kdb_cpu_cmd_t +kdb_cpu_status_all(int ccpu, struct cpu_user_regs *regs) +{ + int cpu; + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) /* hung cpu */ + continue; + kdb_cpu_cmd[cpu] = KDB_CPU_SHOWPC; + while (kdb_cpu_cmd[cpu]==KDB_CPU_SHOWPC); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* + * display/switch CPU. + * Argument: + * none: just go back to initial cpu + * cpunum: switch to given vpu + * "all": show one line status of all cpus + */ +extern volatile int kdb_init_cpu; +static kdb_cpu_cmd_t +kdb_usgf_cpu(void) +{ + kdbp("cpu [all|num]: none will switch back to initial cpu\n"); + kdbp(" cpunum to switch to the vcpu. all to show status\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + int ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cpu(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + return kdb_cpu_status_all(ccpu, regs); + + cpu = (int)simple_strtoul(argv[1], NULL, 0); /* handles 0x */ + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && + cpu_online(cpu) && kdb_cpu_cmd[cpu] == KDB_CPU_PAUSE) + { + kdbp("Switching to cpu:%d\n", cpu); + kdb_cpu_cmd[cpu] = KDB_CPU_MAIN_KDB; + + /* clear any single step on the current cpu */ + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_PAUSE; + } else { + if (cpu != ccpu) + kdbp("Unable to switch to cpu:%d\n", cpu); + else { + kdb_display_pc(regs); + } + return KDB_CPU_MAIN_KDB; + } + } + /* no arg means back to initial cpu */ + if (!kdb_sys_crash && ccpu != kdb_init_cpu) { + if (kdb_cpu_cmd[kdb_init_cpu] == KDB_CPU_PAUSE) { + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_MAIN_KDB; + return KDB_CPU_PAUSE; + } else + kdbp("Unable to switch to: %d\n", kdb_init_cpu); + } + return KDB_CPU_MAIN_KDB; +} + +/* send NMI to all or given CPU. Must be crashed/fatal state */ +static kdb_cpu_cmd_t +kdb_usgf_nmi(void) +{ + kdbp("nmi cpu#|all: send nmi cpu/s. must reboot when done with kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_nmi(int argc, const char **argv, struct cpu_user_regs *regs) +{ + cpumask_t cpumask; + int ccpu = smp_processor_id(); + + if (argc <= 1 || (argc > 1 && *argv[1] == '?')) + return kdb_usgf_nmi(); + + if (!kdb_sys_crash) { + kdbp("kdb: nmi cmd available in crashed state only\n"); + return KDB_CPU_MAIN_KDB; + } + if (!strcmp(argv[1], "all")) + cpumask = cpu_online_map; + else { + int cpu = (int)simple_strtoul(argv[1], NULL, 0); + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && cpu_online(cpu)) + cpumask = *cpumask_of(cpu); + else { + kdbp("KDB nmi: invalid cpu %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + } + kdb_nmi_pause_cpus(cpumask); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_percpu(void) +{ + kdbp("percpu: display per cpu pointers\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_percpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_percpu(); + kdb_dump_time_pcpu(); + return KDB_CPU_MAIN_KDB; +} + +/* ========================= Breakpoints ==================================== */ + +static void +kdb_prnt_bp_cond(int bpnum) +{ + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { + kdbp(" ( %s %c%c %lx )\n", + kdb_regoffs_to_name(bpcp->bp_cond_lhs), + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } else { + kdbp(" ( %lx %c%c %lx )\n", bpcp->bp_cond_lhs, + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } +} + +static void +kdb_prnt_bp_extra(int bpnum) +{ + if (kdb_sbpa[bpnum].bp_type == 2) { + ulong i, arg, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdbp(" will trace "); + for (i=0; i < KDB_MAXBTP && btp[i]; i++) + if ((arg=btp[i]) < sizeof (struct cpu_user_regs)) { + kdbp(" %s ", kdb_regoffs_to_name(arg)); + } else { + kdbp(" %lx ", arg); + } + kdbp("\n"); + + } else if (kdb_sbpa[bpnum].bp_type == 1) + kdb_prnt_bp_cond(bpnum); +} + +/* + * List software breakpoints + */ +static kdb_cpu_cmd_t +kdb_display_sbkpts(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) { + struct domain *dp = kdb_domid2ptr(kdb_sbpa[i].bp_domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + continue; + } + kdbp("[%d]: domid:%d 0x%lx ", i, + kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr,"\n"); + kdb_prnt_bp_extra(i); + } + return KDB_CPU_MAIN_KDB; +} + +/* + * Check if any breakpoints that we need to install (delayed install) + * Returns: 1 if yes, 0 if none. + */ +int +kdb_swbp_exists(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} +/* + * Check if any breakpoints were deleted this kdb session + * Returns: 0 if none, 1 if yes + */ +static int +kdb_swbp_deleted(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} + +/* + * Flush deleted sw breakpoints + */ +void +kdb_flush_swbp_table(void) +{ + int i; + KDBGP("ccpu:%d flush_swbp_table: deleted:%x\n", smp_processor_id(), + kdb_swbp_deleted()); + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) { + KDBGP("flush:[%x] addr:0x%lx\n",i,kdb_sbpa[i].bp_addr); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } +} + +/* + * Delete/Clear a sw breakpoint + */ +static kdb_cpu_cmd_t +kdb_usgf_bc(void) +{ + kdbp("bc $num|all : clear given or all breakpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, bpnum = -1, delall = 0; + const char *argp; + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_bc(); + + if (!kdb_swbp_exists()) { + kdbp("No breakpoints are set\n"); + return KDB_CPU_MAIN_KDB; + } + argp = argv[1]; + + if (!strcmp(argp, "all")) + delall = 1; + else if (!kdb_str2deci(argp, &bpnum) || bpnum < 0 || bpnum > KDBMAXSBP) { + kdbp("Invalid bpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + for (i=0; i < KDBMAXSBP; i++) { + if (delall && kdb_sbpa[i].bp_addr) { + kdbp("Deleted breakpoint [%x] addr:0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + continue; + } + if (bpnum != -1 && bpnum == i) { + kdbp("Deleted breakpoint [%x] at 0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + break; + } + } + if (i >= KDBMAXSBP && !delall) + kdbp("Unable to delete breakpoint: %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Install a breakpoint in the given array entry + * Returns: 0 : failed to install + * 1 : installed successfully + */ +static int +kdb_install_swbp(int idx) /* which entry in the bp array */ +{ + kdbva_t addr = kdb_sbpa[idx].bp_addr; + domid_t domid = kdb_sbpa[idx].bp_domid; + kdbbyt_t *p = &kdb_sbpa[idx].bp_originst; + struct domain *dp = kdb_domid2ptr(domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[idx], 0, sizeof(kdb_sbpa[idx])); + kdbp("Removed bp %d addr:%p domid:%d\n", idx, addr, domid); + return 0; + } + + if (kdb_read_mem(addr, p, KDBBPSZ, domid) != KDBBPSZ){ + kdbp("Failed(R) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + if (kdb_write_mem(addr, &kdb_bpinst, KDBBPSZ, domid) != KDBBPSZ) { + kdbp("Failed(W) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + KDBGP("install_swbp: installed bp:%x at:0x%lx ccpu:%x domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, smp_processor_id(), domid); + return 1; +} + +/* + * Install all the software breakpoints + */ +void +kdb_install_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_deleted && kdb_sbpa[i].bp_addr) + kdb_install_swbp(i); +} + +static void +kdb_uninstall_a_swbp(int i) +{ + kdbva_t addr = kdb_sbpa[i].bp_addr; + kdbbyt_t originst = kdb_sbpa[i].bp_originst; + domid_t id = kdb_sbpa[i].bp_domid; + + kdb_sbpa[i].bp_just_added = 0; + if (!addr) + return; + if (kdb_write_mem(addr, &originst, KDBBPSZ, id) != KDBBPSZ) { + kdbp("Failed to uninstall breakpoint %x at:0x%lx domid:%d\n", + i, kdb_sbpa[i].bp_addr, id); + } +} + +/* + * Uninstall all the software breakpoints at beginning of kdb session + */ +void +kdb_uninstall_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + kdb_uninstall_a_swbp(i); + KDBGP("ccpu:%d uninstalled all bps\n", smp_processor_id()); +} + +/* RETURNS: rc == 2: condition was not met, rc == 3: condition was met */ +static int +kdb_check_bp_condition(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong res = 0, lhsval=0; + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { /* register condition */ + uint64_t *rp = (uint64_t *)((char *)regs + bpcp->bp_cond_lhs); + lhsval = *rp; + } else if (bpcp->bp_cond_status == 2) { /* memaddr condition */ + ulong addr = bpcp->bp_cond_lhs; + int num = sizeof(lhsval); + + if (kdb_read_mem(addr, (kdbbyt_t *)&lhsval, num, domid) != num) { + kdbp("kdb: unable to read %d bytes at %lx\n", num, addr); + return 3; + } + } + if (bpcp->bp_cond_type == 1) /* lhs == rhs */ + res = (lhsval == bpcp->bp_cond_rhs); + else /* lhs != rhs */ + res = (lhsval != bpcp->bp_cond_rhs); + + if (!res) + kdbp("KDB: [%d]Ignoring bp:%d condition not met. val:%lx\n", + smp_processor_id(), bpnum, lhsval); + + KDBGP1("bpnum:%d domid:%d cond: %d %d %lx %lx res:%d\n", bpnum, domid, + bpcp->bp_cond_status, bpcp->bp_cond_type, bpcp->bp_cond_lhs, + bpcp->bp_cond_rhs, res); + + return (res ? 3 : 2); +} + +static void +kdb_prnt_btp_info(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong i, arg, val, num, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdb_prnt_addr2sym(domid, regs->KDBIP, "\n"); + num = kdb_guest_bitness(domid)/8; + for (i=0; i < KDB_MAXBTP && (arg=btp[i]); i++) { + if (arg < sizeof (struct cpu_user_regs)) { + uint64_t *rp = (uint64_t *)((char *)regs + arg); + kdbp(" %s: %016lx ", kdb_regoffs_to_name(arg), *rp); + } else { + if (kdb_read_mem(arg, (kdbbyt_t *)&val, num, domid) != num) + kdbp("kdb: unable to read %d bytes at %lx\n", num, arg); + if (num == 8) + kdbp(" %016lx:%016lx ", arg, val); + else + kdbp(" %08lx:%08lx ", arg, val); + } + } + kdbp("\n"); + KDBGP1("bpnum:%d domid:%d btp:%p num:%d\n", bpnum, domid, btp, num); +} + +/* + * Check if the BP trap belongs to us. + * Return: 0 : not one of ours. IP not changed. (leave kdb) + * 1 : one of ours but deleted. IP decremented. (leave kdb) + * 2 : one of ours but condition not met, or btp. IP decremented.(leave) + * 3 : one of ours and active. IP decremented. (stay in kdb) + */ +int +kdb_check_sw_bkpts(struct cpu_user_regs *regs) +{ + int i, rc=0; + domid_t curid; + + curid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + for(i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_domid == curid && + kdb_sbpa[i].bp_addr == (regs->KDBIP- KDBBPSZ)) { + + regs->KDBIP -= KDBBPSZ; + rc = 3; + + if (kdb_sbpa[i].bp_ni) { + kdb_uninstall_a_swbp(i); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } else if (kdb_sbpa[i].bp_deleted) { + rc = 1; + } else if (kdb_sbpa[i].bp_type == 1) { + rc = kdb_check_bp_condition(i, regs, curid); + } else if (kdb_sbpa[i].bp_type == 2) { + kdb_prnt_btp_info(i, regs, curid); + rc = 2; + } + KDBGP1("ccpu:%d rc:%d curid:%d domid:%d addr:%lx\n", + smp_processor_id(), rc, curid, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + break; + } + } + return (rc); +} + +/* Eg: r6 == 0x123EDF or 0xFFFF2034 != 0xDEADBEEF + * regoffs: -1 means lhs is not reg. else offset of reg in cpu_user_regs + * addr: memory location if lhs is not register, eg, 0xFFFF2034 + * condp : points to != or == + * rhsval : right hand side value + */ +static void +kdb_set_bp_cond(int bpnum, int regoffs, ulong addr, char *condp, ulong rhsval) +{ + if (bpnum >= KDBMAXSBP) { + kdbp("BUG: %s got invalid bpnum\n", __FUNCTION__); + return; + } + if (regoffs != -1) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 1; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = regoffs; + } else if (addr != 0) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 2; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = addr; + } else { + kdbp("error: invalid call to kdb_set_bp_cond\n"); + return; + } + kdb_sbpa[bpnum].u.bp_cond.bp_cond_rhs = rhsval; + + if (*condp == '!') + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 2; + else + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 1; +} + +/* install breakpt at given addr. + * ni: bp for next instr + * btpa: ptr to args for btp for printing when bp is hit + * lhsp/condp/rhsp: point to strings of condition + * + * RETURNS: the index in array where installed. KDBMAXSBP if error + */ +static int +kdb_set_bp(domid_t domid, kdbva_t addr, int ni, ulong *btpa, char *lhsp, + char *condp, char *rhsp) +{ + int i, pre_existing = 0, regoffs = -1; + ulong memloc=0, rhsval=0, tmpul; + + if (btpa && (lhsp || rhsp || condp)) { + kdbp("internal error. btpa and (lhsp || rhsp || condp) set\n"); + return KDBMAXSBP; + } + if (lhsp && ((regoffs=kdb_valid_reg(lhsp)) == -1) && + kdb_str2ulong(lhsp, &memloc) && + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0) { + + kdbp("error: invalid argument: %s\n", lhsp); + return KDBMAXSBP; + } + if (rhsp && ! kdb_str2ulong(rhsp, &rhsval)) { + kdbp("error: invalid argument: %s\n", rhsp); + return KDBMAXSBP; + } + + /* see if bp already set */ + for (i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_addr==addr && kdb_sbpa[i].bp_domid==domid) { + + if (kdb_sbpa[i].bp_deleted) { + /* just re-set this bp again */ + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + pre_existing = 1; + } else { + kdbp("Breakpoint already set \n"); + return KDBMAXSBP; + } + } + } + /* see if any room left for another breakpoint */ + for (i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_addr) + break; + if (i >= KDBMAXSBP) { + kdbp("ERROR: Breakpoint table full....\n"); + return i; + } + kdb_sbpa[i].bp_addr = addr; + kdb_sbpa[i].bp_domid = domid; + if (btpa) { + kdb_sbpa[i].bp_type = 2; + kdb_sbpa[i].u.bp_btp = btpa; + } else if (regoffs != -1 || memloc) { + kdb_sbpa[i].bp_type = 1; + kdb_set_bp_cond(i, regoffs, memloc, condp, rhsval); + } else + kdb_sbpa[i].bp_type = 0; + + if (kdb_install_swbp(i)) { /* make sure it can be done */ + if (ni) + return i; + + kdb_uninstall_a_swbp(i); /* dont' show user INT3 */ + if (!pre_existing) /* make sure no is cpu sitting on it */ + kdb_sbpa[i].bp_just_added = 1; + + kdbp("bp %d set for domid:%d at: 0x%lx ", i, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(domid, addr, "\n"); + kdb_prnt_bp_extra(i); + } else { + kdbp("ERROR:Can't install bp: 0x%lx domid:%d\n", addr, domid); + if (pre_existing) /* in case a cpu is sitting on this bp in traps */ + kdb_sbpa[i].bp_deleted = 1; + else + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + return KDBMAXSBP; + } + /* make sure swbp reporting is enabled in the vmcb/vmcs */ + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + struct domain *dp = kdb_domid2ptr(domid); + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + KDBGP("debugger_attached set. domid:%d\n", domid); + } + return i; +} + +/* + * Set/List Software Breakpoint/s + */ +static kdb_cpu_cmd_t +kdb_usgf_bp(void) +{ + kdbp("bp [addr|sym][domid][condition]: display or set a breakpoint\n"); + kdbp(" where cond is like: r6 == 0x123F or rax != DEADBEEF or \n"); + kdbp(" ffff82c48038fe58 == 321E or 0xffff82c48038fe58 != 0\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9"); + kdbp(" r10 r11 r12 r13 r14 r15 rflags\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + int idx = -1; + domid_t domid = DOMID_IDLE; + char *domidstrp, *lhsp=NULL, *condp=NULL, *rhsp=NULL; + + if ((argc > 1 && *argv[1] == '?') || argc == 4 || argc > 6) + return kdb_usgf_bp(); + + if (argc < 2 || kdb_sys_crash) /* list all set breakpoints */ + return kdb_display_sbkpts(); + + /* valid argc either: 2 3 5 or 6 + * 'bp idle_loop r6 == 0xc000' OR 'bp idle_loop 3 r9 != 0xdeadbeef' */ + idx = (argc == 5) ? 2 : ((argc == 6) ? 3 : idx); + if (argc >= 5 ) { + lhsp = (char *)argv[idx]; + condp = (char *)argv[idx+1]; + rhsp = (char *)argv[idx+2]; + + if (!kdb_str2ulong(rhsp, NULL) || *(condp+1) != '=' || + (*condp != '=' && *condp != '!')) { + + return kdb_usgf_bp(); + } + } + domidstrp = (argc == 3 || argc == 6 ) ? (char *)argv[2] : NULL; + if (domidstrp && !kdb_str2domid(domidstrp, &domid, 1)) { + return kdb_usgf_bp(); + } + if (argc > 3 && is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domain not supported yet for conditional bp\n"); + return KDB_CPU_MAIN_KDB; + } + + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + /* make sure xen addr is in xen text, otherwise bp set in 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + kdb_set_bp(domid, addr, 0, NULL, lhsp, condp, rhsp); /* 0 is ni flag */ + return KDB_CPU_MAIN_KDB; +} + + +/* trace breakpoint, meaning, upon bp trace/print some info and continue */ + +static kdb_cpu_cmd_t +kdb_usgf_btp(void) +{ + kdbp("btp addr|sym [domid] reg|domid-mem-addr... : breakpoint trace\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9 "); + kdbp("r10 r11 r12 r13 r14 r15 rflags\n"); + kdbp(" Eg. btp idle_cpu 7 rax rbx 0x20ef5a5 r9\n"); + kdbp(" will print rax, rbx, *(long *)0x20ef5a5, r9 and continue\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_btp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, btpidx, numrd, argsidx, regoffs = -1; + kdbva_t addr, memloc=0; + domid_t domid = DOMID_IDLE; + ulong *btpa, tmpul; + + if ((argc > 1 && *argv[1] == '?') || argc < 3) + return kdb_usgf_btp(); + + argsidx = 2; /* assume 3rd arg is not domid */ + if (argc > 3 && kdb_str2domid(argv[2], &domid, 0)) { + + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domains are not currently supprted\n"); + return KDB_CPU_MAIN_KDB; + } else + argsidx = 3; /* 3rd arg is a domid */ + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + /* make sure xen addr is in xen text, otherwise will trace 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + + numrd = kdb_guest_bitness(domid)/8; + if (kdb_read_mem(addr, (kdbbyt_t *)&tmpul, numrd, domid) != numrd) { + kdbp("Unable to read mem from %s (%lx)\n", argv[1], addr); + return KDB_CPU_MAIN_KDB; + } + + for (btpidx=0; btpidx < KDBMAXSBP && kdb_btp_ap[btpidx]; btpidx++); + if (btpidx >= KDBMAXSBP) { + kdbp("error: table full. delete few breakpoints\n"); + return KDB_CPU_MAIN_KDB; + } + btpa = kdb_btp_argsa[btpidx]; + memset(btpa, 0, sizeof(kdb_btp_argsa[0])); + + for (i=0; argv[argsidx]; i++, argsidx++) { + + if (((regoffs=kdb_valid_reg(argv[argsidx])) == -1) && + kdb_str2ulong(argv[argsidx], &memloc) && + (memloc < sizeof (struct cpu_user_regs) || + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0)){ + + kdbp("error: invalid argument: %s\n", argv[argsidx]); + return KDB_CPU_MAIN_KDB; + } + if (i >= KDB_MAXBTP) { + kdbp("error: cannot specify more than %d args\n", KDB_MAXBTP); + return KDB_CPU_MAIN_KDB; + } + btpa[i] = (regoffs == -1) ? memloc : regoffs; + } + + i = kdb_set_bp(domid, addr, 0, btpa, 0, 0, 0); /* 0 is ni flag */ + if (i < KDBMAXSBP) + kdb_btp_ap[btpidx] = kdb_btp_argsa[btpidx]; + + return KDB_CPU_MAIN_KDB; +} + +/* + * Set/List watchpoints, ie, hardware breakpoint/s, in hypervisor + * Usage: wp [sym|addr] [w|i] w == write only data watchpoint + * i == IO watchpoint (read/write) + * + * Eg: wp : list all watchpoints set + * wp addr : set a read/write wp at given addr + * wp addr w : set a write only wp at given addr + * wp addr i : set an IO wp at given addr (16bits port #) + * + * TBD: allow to be set on particular cpu + */ +static kdb_cpu_cmd_t +kdb_usgf_wp(void) +{ + kdbp("wp [addr|sym][w|i]: display or set watchpoint. writeonly or IO\n"); + kdbp("\tnote: watchpoint is triggered after the instruction executes\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + domid_t domid = DOMID_IDLE; + int rw = 3, len = 4; /* for now just default to 4 bytes len */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_wp(); + + if (argc <= 1 || kdb_sys_crash) { /* list all set watchpoints */ + kdb_do_watchpoints(0, 0, 0); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (argc > 2) { + if (!strcmp(argv[2], "w")) + rw = 1; + else if (!strcmp(argv[2], "i")) + rw = 2; + else { + return kdb_usgf_wp(); + } + } + kdb_do_watchpoints(addr, rw, len); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_wc(void) +{ + kdbp("wc $num|all : clear given or all watchpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int wpnum; /* wp num to delete. -1 for all */ + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_wc(); + + argp = argv[1]; + + if (!strcmp(argp, "all")) + wpnum = -1; + else if (!kdb_str2deci(argp, &wpnum)) { + kdbp("Invalid wpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + kdb_clear_wps(wpnum); + return KDB_CPU_MAIN_KDB; +} + +/* display struct hvm_vcpu{} in struct vcpu.arch{} */ +static kdb_cpu_cmd_t +kdb_usgf_vcpuh(void) +{ + kdbp("vcpuh vcpu-ptr : display hvm_vcpu struct\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpuh(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *vp; + struct hvm_vcpu *hvp; + struct hvm_io_op *ioop; + struct vlapic *vlp; + + if (argc < 2 || *argv[1] == '?') + return kdb_usgf_vcpuh(); + + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp) || + !is_hvm_or_hyb_vcpu(vp)) { + + kdbp("kdb: Bad VCPU: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + hvp = &vp->arch.hvm_vcpu; + vlp = &hvp->vlapic; + kdbp("vcpu:%lx id:%d domid:%d\n", vp, vp->vcpu_id, vp->domain->domain_id); + + ioop = NULL; /* compiler warning */ + kdbp("&hvm_vcpu:%lx guest_efer:"KDBFL"\n", hvp, hvp->guest_efer); + kdbp(" guest_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->guest_cr[0], + hvp->guest_cr[1],hvp->guest_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->guest_cr[3], + hvp->guest_cr[4]); + kdbp(" hw_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->hw_cr[0], + hvp->hw_cr[1], hvp->hw_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->hw_cr[3], hvp->hw_cr[4]); + + kdbp(" VLAPIC: base msr:"KDBF64" dis:%x tmrdiv:%x\n", + vlp->hw.apic_base_msr, vlp->hw.disabled, vlp->hw.timer_divisor); + kdbp(" regs:%p regs_page:%p\n", vlp->regs, vlp->regs_page); + kdbp(" periodic time:\n"); + kdb_prnt_periodic_time(&vlp->pt); + + kdbp(" xen_port:%x flag_dr_dirty:%x dbg_st_latch:%x\n", hvp->xen_port, + hvp->flag_dr_dirty, hvp->debug_state_latch); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + + struct arch_vmx_struct *vxp = &hvp->u.vmx; + kdbp(" &vmx: %p vmcs:%lx active_cpu:%x launched:%x\n", vxp, vxp->vmcs, + vxp->active_cpu, vxp->launched); +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" exec_ctrl:%x vpid:$%d\n", vxp->exec_control, vxp->vpid); +#endif + kdbp(" host_cr0: "KDBFL" vmx: {realm:%x emulate:%x}\n", + vxp->host_cr0, vxp->vmx_realmode, vxp->vmx_emulate); + +#ifdef __x86_64__ + kdbp(" &msr_state:%p\n", &vxp->msr_state); +#endif + } else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + struct arch_svm_struct *svp = &hvp->u.svm; +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" &svm: vmcb:%lx pa:"KDBF64" asid:"KDBF64"\n", svp, svp->vmcb, + svp->vmcb_pa, svp->asid_generation); +#endif + kdbp(" msrpm:%p lnch_core:%x vmcb_sync:%x\n", svp->msrpm, + svp->launch_core, svp->vmcb_in_sync); + } + kdbp(" cachemode:%x io: {state: %x data: "KDBFL"}\n", hvp->cache_mode, + hvp->hvm_io.io_state, hvp->hvm_io.io_data); + kdbp(" mmio: {gva: "KDBFL" gpfn: "KDBFL"}\n", hvp->hvm_io.mmio_gva, + hvp->hvm_io.mmio_gpfn); + + return KDB_CPU_MAIN_KDB; +} + +/* also look into arch_get_info_guest() to get context */ +static void +kdb_print_uregs(struct cpu_user_regs *regs) +{ +#ifdef __x86_64__ + kdbp(" rflags: %016lx rip: %016lx\n", regs->rflags, regs->rip); + kdbp(" rax: %016lx rbx: %016lx rcx: %016lx\n", + regs->rax, regs->rbx, regs->rcx); + kdbp(" rdx: %016lx rsi: %016lx rdi: %016lx\n", + regs->rdx, regs->rsi, regs->rdi); + kdbp(" rbp: %016lx rsp: %016lx r8: %016lx\n", + regs->rbp, regs->rsp, regs->r8); + kdbp(" r9: %016lx r10: %016lx r11: %016lx\n", + regs->r9, regs->r10, regs->r11); + kdbp(" r12: %016lx r13: %016lx r14: %016lx\n", + regs->r12, regs->r13, regs->r14); + kdbp(" r15: %016lx\n", regs->r15); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%08lx entryvec:%08lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#else + kdbp(" eflags: %016lx eip: 016lx\n", regs->eflags, regs->eip); + kdbp(" eax: %08x ebx: %08x ecx: %08x edx: %08x\n", + regs->eax, regs->ebx, regs->ecx, regs->edx); + kdbp(" esi: %08x edi: %08x ebp: %08x esp: %08x\n", + regs->esi, regs->edi, regs->ebp, regs->esp); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%04lx entryvec:%04lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#endif +} + +#if XEN_SUBVERSION < 3 /* xen 3.1.x or xen 3.2.x */ +#ifdef CONFIG_COMPAT + #undef vcpu_info + #define vcpu_info(v, field) \ + (*(!has_32bit_shinfo((v)->domain) ? \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->native.field : \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->compat.field)) + + #undef __shared_info + #define __shared_info(d, s, field) \ + (*(!has_32bit_shinfo(d) ? \ + (typeof(&(s)->compat.field))&(s)->native.field : \ + (typeof(&(s)->compat.field))&(s)->compat.field)) +#endif +#endif + +static void kdb_display_pv_vcpu(struct vcpu *vp) +{ + int i; + struct pv_vcpu *gp = &vp->arch.pv_vcpu; + + kdbp(" GDT_VIRT_START(vcpu): %lx\n", GDT_VIRT_START(vp)); + kdbp(" GDT: entries:0x%lx frames:\n", gp->gdt_ents); + for (i=0; i < 16; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->gdt_frames[i], + gp->gdt_frames[i+1], gp->gdt_frames[i+2],gp->gdt_frames[i+3]); + + kdbp(" trap_ctxt:%lx kernel_ss:%lx kernel_sp:%lx\n", gp->trap_ctxt, + gp->kernel_ss, gp->kernel_sp); + kdbp(" ctrlregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->ctrlreg[i], + gp->ctrlreg[i+1], gp->ctrlreg[i+2], gp->ctrlreg[i+3]); +#ifdef __x86_64__ + kdbp(" callback: event: %016lx failsafe: %016lx\n", + gp->event_callback_eip, gp->failsafe_callback_eip); + kdbp(" base: fs:0x%lx gskern:0x%lx gsuser:0x%lx\n", + gp->fs_base, gp->gs_base_kernel, gp->gs_base_user); +#else + kdbp(" callback: event: %08lx:%08lx failsafe: %08lx:%08lx\n", + gp->event_callback_cs, gp->event_callback_eip, + gp->failsafe_callback_cs, gp->failsafe_callback_eip); +#endif + kdbp(" vcpu_info_mfn: %lx iopl: %x\n", gp->vcpu_info_mfn, gp->iopl); + kdbp("\n"); +} + +/* Display one VCPU info */ +static void +kdb_display_vcpu(struct vcpu *vp) +{ + int i; + struct arch_vcpu *avp = &vp->arch; + struct paging_vcpu *pvp = &vp->arch.paging; + int domid = vp->domain->domain_id; + + kdbp("\nVCPU: vcpu-id:%d vcpu-ptr:%p ", vp->vcpu_id, vp); + kdbp(" processor:%d domid:%d domp:%p\n", vp->processor, domid,vp->domain); + + if (domid == DOMID_IDLE) { + kdbp(" IDLE vcpu.\n"); + return; + } + kdbp(" pause: flags:0x%016lx count:%x\n", vp->pause_flags, + vp->pause_count.counter); + kdbp(" vcpu: initdone:%d running:%d\n", + vp->is_initialised, vp->is_running); + kdbp(" mcepend:%d nmipend:%d shut: def:%d paused:%d\n", + vp->mce_pending, vp->nmi_pending, vp->defer_shutdown, + vp->paused_for_shutdown); + kdbp(" &vcpu_info:%p : evtchn_upc_pend:%x _mask:%x\n", + vp->vcpu_info, vcpu_info(vp, evtchn_upcall_pending), + vcpu_info(vp, evtchn_upcall_mask)); + kdbp(" evt_pend_sel:%lx poll_evtchn:%x ", + *(unsigned long *)&vcpu_info(vp, evtchn_pending_sel), vp->poll_evtchn); + kdb_print_spin_lock("virq_lock:", &vp->virq_lock, "\n"); + for (i=0; i < NR_VIRQS; i++) + if (vp->virq_to_evtchn[i] != 0) + kdbp(" virq:$%d port:$%d\n", i, vp->virq_to_evtchn[i]); + + kdbp(" next:%p periodic: period:0x%lx last_event:0x%lx\n", + vp->next_in_list, vp->periodic_period, vp->periodic_last_event); + kdbp(" cpu_affinity:0x%lx vcpu_dirty_cpumask:%p sched_priv:0x%p\n", + vp->cpu_affinity, vp->vcpu_dirty_cpumask, vp->sched_priv); + kdbp(" &runstate: %p state: %x (eg. RUNSTATE_running) guestptr:%p\n", + &vp->runstate, vp->runstate.state, runstate_guest(vp)); + kdbp("\n"); + kdbp(" arch info: (%p)\n", &vp->arch); + kdbp(" guest_context: VGCF_ flags:%lx", + vp->arch.vgc_flags); /* VGCF_in_kernel */ + if (is_hvm_or_hyb_vcpu(vp)) + kdbp(" (HVM guest: IP, SP, EFLAGS may be stale)"); + kdbp("\n"); + kdb_print_uregs(&vp->arch.user_regs); + kdbp(" debugregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", avp->debugreg[i], + avp->debugreg[i+1], avp->debugreg[i+2], avp->debugreg[i+3]); + kdb_display_pv_vcpu(vp); + + kdbp(" TF_flags: %016lx guest_table: %016lx cr3:%016lx\n", + vp->arch.flags, vp->arch.guest_table.pfn, avp->cr3); + kdbp(" paging: \n"); + kdbp(" vtlb:%p\n", &pvp->vtlb); + kdbp(" &pg_mode:%p gstlevels:%d &shadow:%p shlevels:%d\n", + pvp->mode, pvp->mode->guest_levels, &pvp->mode->shadow, + pvp->mode->shadow.shadow_levels); + kdbp(" shadow_vcpu:\n"); + kdbp(" guest_vtable:%p last em_mfn:"KDBFL"\n", + pvp->shadow.guest_vtable, pvp->shadow.last_emulated_mfn); +#if CONFIG_PAGING_LEVELS >= 3 + kdbp(" l3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.l3table[3].l3, pvp->shadow.l3table[2].l3, + pvp->shadow.l3table[1].l3, pvp->shadow.l3table[0].l3); + kdbp(" gl3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.gl3e[3].l3, pvp->shadow.gl3e[2].l3, + pvp->shadow.gl3e[1].l3, pvp->shadow.gl3e[0].l3); +#endif + kdbp(" gdbsx_vcpu_event:%x\n", vp->arch.gdbsx_vcpu_event); +} + +/* + * FUNCTION: Dispaly (current) VCPU/s + */ +static kdb_cpu_cmd_t +kdb_usgf_vcpu(void) +{ + kdbp("vcpu [vcpu-ptr] : display current/vcpu-ptr vcpu info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *v = current; + + if (argc > 2 || (argc > 1 && *argv[1] == '?')) + kdb_usgf_vcpu(); + else if (argc <= 1) + kdb_display_vcpu(v); + else if (kdb_str2ulong(argv[1], (ulong *)&v) && kdb_vcpu_valid(v)) + kdb_display_vcpu(v); + else + kdbp("Invalid usage/argument:%s v:%lx\n", argv[1], (long)v); + return KDB_CPU_MAIN_KDB; +} + +/* from paging_dump_domain_info() */ +static void kdb_pr_dom_pg_modes(struct domain *d) +{ + if (paging_mode_enabled(d)) { + kdbp(" paging mode enabled"); + if ( paging_mode_shadow(d) ) + kdbp(" shadow(PG_SH_enable)"); + if ( paging_mode_hap(d) ) + kdbp(" hap(PG_HAP_enable) "); + if ( paging_mode_refcounts(d) ) + kdbp(" refcounts(PG_refcounts) "); + if ( paging_mode_log_dirty(d) ) + kdbp(" log_dirty(PG_log_dirty) "); + if ( paging_mode_translate(d) ) + kdbp(" translate(PG_translate) "); + if ( paging_mode_external(d) ) + kdbp(" external(PG_external) "); + } else + kdbp(" disabled"); + kdbp("\n"); +} + +/* print event channels info for a given domain + * NOTE: very confusing, port and event channel refer to the same thing. evtchn + * is arry of pointers to a bucket of pointers to 128 struct evtchn{}. while + * 64bit xen can handle 4096 max channels, a 32bit guest is limited to 1024 */ +static void noinline kdb_print_dom_eventinfo(struct domain *dp) +{ + uint chn; + + kdbp("\n"); + kdbp(" Evt: MAX_EVTCHNS:$%d ptr:%p pollmsk:%08lx ", + MAX_EVTCHNS(dp), dp->evtchn, dp->poll_mask[0]); + kdb_print_spin_lock("lk:", &dp->event_lock, "\n"); + kdbp(" &evtchn_pending:%p &evtchn_mask:%p\n", + shared_info(dp, evtchn_pending), shared_info(dp, evtchn_mask)); + + kdbp(" Channels info: (everything is in decimal):\n"); + for (chn=0; chn < MAX_EVTCHNS(dp); chn++ ) { + struct evtchn *bktp = dp->evtchn[chn/EVTCHNS_PER_BUCKET]; + struct evtchn *chnp = &bktp[chn & (EVTCHNS_PER_BUCKET-1)]; + char pbit = test_bit(chn, &shared_info(dp, evtchn_pending)) ? 'Y' : 'N'; + char mbit = test_bit(chn, &shared_info(dp, evtchn_mask)) ? 'Y' : 'N'; + + if (bktp==NULL || chnp->state==ECS_FREE) + continue; + + kdbp(" chn:%4u st:%d _xen=%d _vcpu_id:%2d ", chn, chnp->state, + chnp->xen_consumer, chnp->notify_vcpu_id); + if (chnp->state == ECS_UNBOUND) + kdbp(" rem-domid:%d", chnp->u.unbound.remote_domid); + else if (chnp->state == ECS_INTERDOMAIN) + kdbp(" rem-port:%d rem-dom:%d", chnp->u.interdomain.remote_port, + chnp->u.interdomain.remote_dom->domain_id); + else if (chnp->state == ECS_PIRQ) + kdbp(" pirq:%d", chnp->u.pirq); + else if (chnp->state == ECS_VIRQ) + kdbp(" virq:%d", chnp->u.virq); + + kdbp(" pend:%c mask:%c\n", pbit, mbit); + } +#if 0 + kdbp("pirq to evtchn mapping (pirq:evtchn) (all decimal):\n"); + for (i=0; i < dp->nr_pirqs; i ++) + if (dp->pirq_to_evtchn[i]) + kdbp("(%d:%d) ", i, dp->pirq_to_evtchn[i]); + kdbp("\n"); +#endif +} + +static void kdb_prnt_hvm_dom_info(struct domain *dp) +{ + struct hvm_domain *hvp = &dp->arch.hvm_domain; + + kdbp(" HVM info: Hap is%s enabled\n", + dp->arch.hvm_domain.hap_enabled ? "" : " not"); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + struct vmx_domain *vdp = &dp->arch.hvm_domain.vmx; + kdbp(" EPT: ept_mt:%x ept_wl:%x asr:%013lx\n", + vdp->ept_control.ept_mt, vdp->ept_control.ept_wl, + vdp->ept_control.asr); + } + if (hvp == NULL) + return; + + if (hvp->irq.callback_via_type == HVMIRQ_callback_vector) + kdbp(" HVMIRQ_callback_vector: %x\n", hvp->irq.callback_via.vector); + + if (!is_hvm_domain(dp)) + return; + + kdbp(" HVM PARAMS (all in hex):\n"); + kdbp("\tioreq.page:%lx ioreq.va:%lx\n", hvp->ioreq.page, hvp->ioreq.va); + kdbp("\tbuf_ioreq.page:%lx ioreq.va:%lx\n", hvp->buf_ioreq.page, + hvp->buf_ioreq.va); + kdbp("\tHVM_PARAM_CALLBACK_IRQ: %x\n", hvp->params[HVM_PARAM_CALLBACK_IRQ]); + kdbp("\tHVM_PARAM_STORE_PFN: %x\n", hvp->params[HVM_PARAM_STORE_PFN]); + kdbp("\tHVM_PARAM_STORE_EVTCHN: %x\n", hvp->params[HVM_PARAM_STORE_EVTCHN]); + kdbp("\tHVM_PARAM_PAE_ENABLED: %x\n", hvp->params[HVM_PARAM_PAE_ENABLED]); + kdbp("\tHVM_PARAM_IOREQ_PFN: %x\n", hvp->params[HVM_PARAM_IOREQ_PFN]); + kdbp("\tHVM_PARAM_BUFIOREQ_PFN: %x\n", hvp->params[HVM_PARAM_BUFIOREQ_PFN]); + kdbp("\tHVM_PARAM_VIRIDIAN: %x\n", hvp->params[HVM_PARAM_VIRIDIAN]); + kdbp("\tHVM_PARAM_TIMER_MODE: %x\n", hvp->params[HVM_PARAM_TIMER_MODE]); + kdbp("\tHVM_PARAM_HPET_ENABLED: %x\n", hvp->params[HVM_PARAM_HPET_ENABLED]); + kdbp("\tHVM_PARAM_IDENT_PT: %x\n", hvp->params[HVM_PARAM_IDENT_PT]); + kdbp("\tHVM_PARAM_DM_DOMAIN: %x\n", hvp->params[HVM_PARAM_DM_DOMAIN]); + kdbp("\tHVM_PARAM_ACPI_S_STATE: %x\n", hvp->params[HVM_PARAM_ACPI_S_STATE]); + kdbp("\tHVM_PARAM_VM86_TSS: %x\n", hvp->params[HVM_PARAM_VM86_TSS]); + kdbp("\tHVM_PARAM_VPT_ALIGN: %x\n", hvp->params[HVM_PARAM_VPT_ALIGN]); + kdbp("\tHVM_PARAM_CONSOLE_PFN: %x\n", hvp->params[HVM_PARAM_CONSOLE_PFN]); + kdbp("\tHVM_PARAM_CONSOLE_EVTCHN: %x\n", + hvp->params[HVM_PARAM_CONSOLE_EVTCHN]); + kdbp("\tHVM_PARAM_ACPI_IOPORTS_LOCATION: %x\n", + hvp->params[HVM_PARAM_ACPI_IOPORTS_LOCATION]); + kdbp("\tHVM_PARAM_MEMORY_EVENT_SINGLE_STEP: %x\n", + hvp->params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]); +} +static void kdb_print_rangesets(struct domain *dp) +{ + int locked = spin_is_locked(&dp->rangesets_lock); + + if (locked) + spin_unlock(&dp->rangesets_lock); + rangeset_domain_printk(dp); + if (locked) + spin_lock(&dp->rangesets_lock); +} + +static void kdb_pr_vtsc_info(struct arch_domain *ap) +{ + kdbp(" VTSC info: tsc_mode:%x vtsc:%x vtsc_last:%016lx\n", + ap->tsc_mode, ap->vtsc, ap->vtsc_last); + kdbp(" vtsc_offset:%016lx tsc_khz:%08lx incarnation:%x\n", + ap->vtsc_offset, ap->vtsc_offset, ap->incarnation); + kdbp(" vtsc_kerncount:%016lx _usercount:%016lx\n", + ap->vtsc_kerncount, ap->vtsc_usercount); +} + +/* display one domain info */ +static void +kdb_display_dom(struct domain *dp) +{ + struct vcpu *vp; + int printed = 0; + struct grant_table *gp = dp->grant_table; + struct arch_domain *ap = &dp->arch; + + kdbp("\nDOMAIN : domid:0x%04x ptr:0x%p\n", dp->domain_id, dp); + if (dp->domain_id == DOMID_IDLE) { + kdbp(" IDLE domain.\n"); + return; + } + if (dp->is_dying) { + kdbp(" domain is DYING.\n"); + return; + } +#if 0 + kdb_print_spin_lock(" pgalk:", &dp->page_alloc_lock, "\n"); + kdbp(" pglist: 0x%p 0x%p\n", dp->page_list.next,KDB_PGLLE(dp->page_list)); + kdbp(" xpglist: 0x%p 0x%p\n", dp->xenpage_list.next, + KDB_PGLLE(dp->xenpage_list)); + kdbp(" next:0x%p hashnext:0x%p\n", + dp->next_in_list, dp->next_in_hashbucket); +#endif + kdbp(" PAGES: tot:0x%08x max:0x%08x xenheap:0x%08x\n", + dp->tot_pages, dp->max_pages, dp->xenheap_pages); + + kdb_print_rangesets(dp); + kdb_print_dom_eventinfo(dp); + kdbp("\n"); + kdbp(" Grant table: gp:0x%p\n", gp); + if (gp) { + kdbp(" nr_frames:0x%08x shpp:0x%p active:0x%p\n", + gp->nr_grant_frames, gp->shared_raw, gp->active); + kdbp(" maptrk:0x%p maphd:0x%08x maplmt:0x%08x\n", + gp->maptrack, gp->maptrack_head, gp->maptrack_limit); + kdbp(" mapcnt:"); + kdb_print_spin_lock("mapcnt: lk:", &gp->lock, "\n"); + } + kdbp(" hvm:%d priv:%d need_iommu:%d dbg:%d dying:%d paused:%d\n", + dp->is_hvm, dp->is_privileged, dp->need_iommu, + dp->debugger_attached, dp->is_dying, dp->is_paused_by_controller); + kdb_print_spin_lock(" shutdown: lk:", &dp->shutdown_lock, "\n"); + kdbp(" shutn:%d shut:%d code:%d \n", dp->is_shutting_down, + dp->is_shut_down, dp->shutdown_code); + kdbp(" pausecnt:0x%08x vm_assist:0x"KDBFL" refcnt:0x%08x\n", + dp->pause_count.counter, dp->vm_assist, dp->refcnt.counter); + kdbp(" &domain_dirty_cpumask:%p\n", &dp->domain_dirty_cpumask); + + kdbp(" shared == vcpu_info[]: %p\n", dp->shared_info); + kdbp(" arch_shared: maxpfn: %lx pfn-mfn-frame-ll mfn: %lx\n", + arch_get_max_pfn(dp), arch_get_pfn_to_mfn_frame_list_list(dp)); + kdbp("\n"); + kdbp(" arch_domain at : %p\n", ap); + +#ifdef CONFIG_X86_64 + kdbp(" pt_pages:0x%p ", ap->mm_perdomain_pt_pages); + kdbp(" l2:0x%p l3:0x%p\n", ap->mm_perdomain_l2, ap->mm_perdomain_l3); +#else + kdbp(" pt:0x%p ", ap->mm_perdomain_pt); +#endif +#ifdef CONFIG_X86_32 + kdbp(" &mapchache:0x%xp\n", &ap->mapcache); +#endif + kdbp(" ioport:0x%p &hvm_dom:0x%p\n", ap->ioport_caps, &ap->hvm_domain); + if (is_hvm_or_hyb_domain(dp)) + kdb_prnt_hvm_dom_info(dp); + + kdbp(" &pging_dom:%p mode: %lx", &ap->paging, ap->paging.mode); + kdb_pr_dom_pg_modes(dp); + kdbp(" p2m ptr:%p pages:{%p, %p}\n", ap->p2m, ap->p2m->pages.next, + KDB_PGLLE(ap->p2m->pages)); + kdbp(" max_mapped_pfn:"KDBFL, ap->p2m->max_mapped_pfn); +#if XEN_SUBVERSION > 0 && XEN_VERSION == 4 /* xen 4.1 and above */ + kdbp(" phys_table:%p\n", ap->p2m->phys_table.pfn); +#else + kdbp(" phys_table.pfn:"KDBFL"\n", ap->phys_table.pfn); +#endif + kdbp(" physaddr_bitsz:%d 32bit_pv:%d has_32bit_shinfo:%d\n", + ap->physaddr_bitsize, ap->is_32bit_pv, ap->has_32bit_shinfo); + kdb_pr_vtsc_info(ap); + kdbp(" sched:0x%p &handle:0x%p\n", dp->sched_priv, &dp->handle); + kdbp(" vcpu ptrs:\n "); + for_each_vcpu(dp, vp) { + kdbp(" %d:%p", vp->vcpu_id, vp); + if (++printed % 4 == 0) kdbp("\n "); + } + kdbp("\n"); +} + +/* + * FUNCTION: Dispaly (current) domain/s + */ +static kdb_cpu_cmd_t +kdb_usgf_dom(void) +{ + kdbp("dom [all|domid]: Display current/all/given domain/s\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dom(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int id; + struct domain *dp = current->domain; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dom(); + + if (argc > 1) { + for(dp=domain_list; dp; dp=dp->next_in_list) + if (kdb_str2deci(argv[1], &id) && dp->domain_id==id) + kdb_display_dom(dp); + else if (!strcmp(argv[1], "all")) + kdb_display_dom(dp); + } else { + kdbp("Displaying current domain :\n"); + kdb_display_dom(dp); + } + return KDB_CPU_MAIN_KDB; +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dirq(void) +{ + kdbp("dirq : dump irq bindings\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dirq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long irq, sz, offs, addr; + char buf[KSYM_NAME_LEN+1]; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dirq(); + +#if XEN_VERSION < 4 && XEN_SUBVERSION < 5 /* xen 3.4.x or below */ + kdbp("idx/irq#/status: all are in decimal\n"); + kdbp("idx irq# status action(handler name devid)\n"); + for (irq=0; irq < NR_VECTORS; irq++) { + irq_desc_t *dp = &irq_desc[irq]; + if (!dp->action) + continue; + addr = (unsigned long)dp->action->handler; + kdbp("[%3ld]:irq:%3d st:%3d f:%s devnm:%s devid:0x%p\n", + i, vector_to_irq(irq), dp->status, (dp->status & IRQ_GUEST) ? + "GUEST IRQ" : symbols_lookup(addr, &sz, &offs, buf), + dp->action->name, dp->action->dev_id); + } +#else + kdbp("irq_desc[]:%p nr_irqs: $%d nr_irqs_gsi: $%d\n", irq_desc, nr_irqs, + nr_irqs_gsi); + kdbp("irq/vec#/status: in decimal. affinity in hex, not bitmap\n"); + kdbp("irq-- vec sta function----------- name---- type--------- "); + kdbp("aff devid------------\n"); + for (irq=0; irq < nr_irqs; irq++) { + void *devidp; + const char *symp, *nmp; + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + + if (!dp->handler || dp->handler==&no_irq_type || dp->status & IRQ_GUEST) + continue; + + addr = dp->action ? (unsigned long)dp->action->handler : 0; + symp = addr ? symbols_lookup(addr, &sz, &offs, buf) : "n/a "; + nmp = addr ? dp->action->name : "n/a "; + devidp = addr ? dp->action->dev_id : NULL; + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %03d %03d %-19s %-8s %-13s %3s 0x%p\n", irq, archp->vector, + dp->status, symp, nmp, dp->handler->typename, affstr, devidp); + } + kdb_prnt_guest_mapped_irqs(); +#endif + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_prnt_vec_irq_table(int cpu) +{ + int i,j, *tbl = per_cpu(vector_irq, cpu); + + kdbp("CPU %d : ", cpu); + for (i=0, j=0; i < NR_VECTORS; i++) + if (tbl[i] != -1) { + kdbp("(%3d:%3d) ", i, tbl[i]); + if (!(++j % 5)) + kdbp("\n "); + } + kdbp("\n"); +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dvit(void) +{ + kdbp("dvit [cpu|all]: dump (per cpu)vector irq table\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvit(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu, ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvit(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + cpu = -1; + else if (!kdb_str2deci(argv[1], &cpu)) { + kdbp("Invalid cpu:%d\n", cpu); + return kdb_usgf_dvit(); + } + } else + cpu = ccpu; + + kdbp("Per CPU vector irq table pairs (vector:irq) (all decimals):\n"); + if (cpu != -1) + kdb_prnt_vec_irq_table(cpu); + else + for_each_online_cpu(cpu) + kdb_prnt_vec_irq_table(cpu); + + return KDB_CPU_MAIN_KDB; +} + +/* do vmexit on all cpu's so intel VMCS can be dumped */ +static kdb_cpu_cmd_t +kdb_all_cpu_flush_vmcs(void) +{ + int cpu, ccpu = smp_processor_id(); + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdb_curr_cpu_flush_vmcs(); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE){ /* hung cpu */ + kdbp("Skipping (hung?) cpu %d\n", cpu); + continue; + } + kdb_cpu_cmd[cpu] = KDB_CPU_DO_VMEXIT; + while (kdb_cpu_cmd[cpu]==KDB_CPU_DO_VMEXIT); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* Display VMCS or VMCB */ +static kdb_cpu_cmd_t +kdb_usgf_dvmc(void) +{ + kdbp("dvmc [domid][vcpuid] : Dump vmcs/vmcb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvmc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid = 0; /* unsigned type don't like -1 */ + int vcpuid = -1; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvmc(); + + if (argc > 1) { + if (!kdb_str2domid(argv[1], &domid, 1)) + return KDB_CPU_MAIN_KDB; + } + if (argc > 2 && !kdb_str2deci(argv[2], &vcpuid)) { + kdbp("Bad vcpuid: 0x%x\n", vcpuid); + return KDB_CPU_MAIN_KDB; + } + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + kdb_all_cpu_flush_vmcs(); + kdb_dump_vmcs(domid, (int)vcpuid); + } else { + kdb_dump_vmcb(domid, (int)vcpuid); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_mmio(void) +{ + kdbp("mmio: dump mmio related info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmio(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmio(); + + kdbp("r/o mmio ranges:\n"); + rangeset_printk(mmio_ro_ranges); + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Dump timer/timers queues */ +static kdb_cpu_cmd_t +kdb_usgf_dtrq(void) +{ + kdbp("dtrq: dump timer queues on all cpus\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dtrq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dtrq(); + + kdb_dump_timer_queues(); + return KDB_CPU_MAIN_KDB; +} + +struct idte { + uint16_t offs0_15; + uint16_t selector; + uint16_t meta; + uint16_t offs16_31; + uint32_t offs32_63; + uint32_t resvd; +}; + +#ifdef __x86_64__ +static void +kdb_print_idte(int num, struct idte *idtp) +{ + uint16_t mta = idtp->meta; + char dpl = ((mta & 0x6000) >> 13); + char present = ((mta &0x8000) >> 15); + int tval = ((mta &0x300) >> 8); + char *type = (tval == 1) ? "Task" : ((tval== 2) ? "Intr" : "Trap"); + domid_t domid = idtp->selector==__HYPERVISOR_CS64 ? DOMID_IDLE : + current->domain->domain_id; + uint64_t addr = idtp->offs0_15 | ((uint64_t)idtp->offs16_31 << 16) | + ((uint64_t)idtp->offs32_63 << 32); + + kdbp("[%03d]: %s %x %x %04x:%016lx ", num, type, dpl, present, + idtp->selector, addr); + kdb_prnt_addr2sym(domid, addr, "\n"); +} + +/* Dump 64bit idt table currently on this cpu. Intel Vol 3 section 5.14.1 */ +static kdb_cpu_cmd_t +kdb_usgf_didt(void) +{ + kdbp("didt : dump IDT table on the current cpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i; + struct idte *idtp = (struct idte *)idt_tables[smp_processor_id()]; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_didt(); + + kdbp("IDT at:%p\n", idtp); + kdbp("idt# Type DPL P addr (all hex except idt#)\n", idtp); + for (i=0; i < 256; i++, idtp++) + kdb_print_idte(i, idtp); + return KDB_CPU_MAIN_KDB; +} +#else +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbp("kdb: Please implement me in 32bit hypervisor\n"); + return KDB_CPU_MAIN_KDB; +} +#endif + +struct gdte { /* same for TSS and LDT */ + ulong limit0:16; + ulong base0:24; /* linear address base, not pa */ + ulong acctype:4; /* Type: access rights */ + ulong S:1; /* S: 0 = system, 1 = code/data */ + ulong DPL:2; /* DPL */ + ulong P:1; /* P: Segment Present */ + ulong limit1:4; + ulong AVL:1; /* AVL: avail for use by system software */ + ulong L:1; /* L: 64bit code segment */ + ulong DB:1; /* D/B */ + ulong G:1; /* G: granularity */ + ulong base1:8; /* linear address base, not pa */ +}; + +union gdte_u { + struct gdte gdte; + u64 gval; +}; + +struct call_gdte { + unsigned short offs0:16; + unsigned short sel:16; + unsigned short misc0:16; + unsigned short offs1:16; +}; + +struct idt_gdte { + unsigned long offs0:16; + unsigned long sel:16; + unsigned long ist:3; + unsigned long unused0:13; + unsigned long offs1:16; +}; +union sgdte_u { + struct call_gdte cgdte; + struct idt_gdte igdte; + u64 sgval; +}; + +/* return binary form of a hex in string : max 4 chars 0000 to 1111 */ +static char *kdb_ret_acctype(uint acctype) +{ + static char buf[16]; + char *p = buf; + int i; + + if (acctype > 0xf) { + buf[0] = buf[1] = buf[2] = buf[3] = '?'; + buf[5] = '\n'; + return buf; + } + for (i=0; i < 4; i++, p++, acctype=acctype>>1) + *p = (acctype & 0x1) ? '1' : '0'; + + return buf; +} + +/* Display GDT table. IA-32e mode is assumded. */ +/* first display non system descriptors then display system descriptors */ +static kdb_cpu_cmd_t +kdb_usgf_dgdt(void) +{ + kdbp("dgdt [gdt-ptr decimal-byte-size] dump GDT table on current cpu or for" + "given vcpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dgdt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + union gdte_u u1; + ulong start_addr, end_addr, taddr=0; + domid_t domid = DOMID_IDLE; + int idx; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dgdt(); + + if (argc > 1) { + if (argc != 3) + return kdb_usgf_dgdt(); + + if (kdb_str2ulong(argv[1], (ulong *)&start_addr) && + kdb_str2deci(argv[2], (int *)&taddr)) { + end_addr = start_addr + taddr; + } else { + kdbp("dgdt: Bad arg:%s or %s\n", argv[1], argv[2]); + return kdb_usgf_dgdt(); + } + } else { + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + start_addr = (ulong)desc.address; + end_addr = (ulong)desc.address + desc.size; + } + kdbp("GDT: Will skip null desc at 0, start:%lx end:%lx\n", start_addr, + end_addr); + kdbp("[idx] sel --- val -------- Accs DPL P AVL L DB G " + "--Base Addr ---- Limit\n"); + kdbp(" Type\n"); + + /* skip first 8 null bytes */ + /* the cpu multiplies the index by 8 and adds to GDT.base */ + for (taddr = start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (!kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1),domid) || !u1.gval) + continue; + + if (u1.gval == 0xffffffffffffffff || u1.gval == 0x5555555555555555) + continue; /* what an effin x86 mess */ + + idx = (taddr - start_addr) / 8; + if (u1.gdte.S == 0) { /* System Desc are 16 bytes in 64bit mode */ + taddr += sizeof(ulong); + continue; + } + kdbp("[%04x] %04x %016lx %4s %x %d %d %d %d %d %016lx %05x\n", + idx, (idx<<3), u1.gval, kdb_ret_acctype(u1.gdte.acctype), + u1.gdte.DPL, + u1.gdte.P, u1.gdte.AVL, u1.gdte.L, u1.gdte.DB, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | (u64)((u64)u1.gdte.base1<<24)), + u1.gdte.limit0 | (u1.gdte.limit1<<16)); + } + + kdbp("\nSystem descriptors (S=0) : (skipping 0th entry)\n"); + for (taddr=start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + uint acctype; + u64 upper, addr64=0; + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1), domid)==0 || + u1.gval == 0 || u1.gdte.S == 1) { + continue; + } + idx = (taddr - start_addr) / 8; + taddr += sizeof(ulong); + if (kdb_read_mem(taddr, (kdbbyt_t *)&upper, 8, domid) == 0) { + kdbp("Could not read upper 8 bytes of system desc\n"); + upper = 0; + } + acctype = u1.gdte.acctype; + if (acctype != 2 && acctype != 9 && acctype != 11 && acctype !=12 && + acctype != 14 && acctype != 15) + continue; + + kdbp("[%04x] %04x val:%016lx DPL:%x P:%d type:%x ", + idx, (idx<<3), u1.gval, u1.gdte.DPL, u1.gdte.P, acctype); + + upper = (u64)((u64)(upper & 0xFFFFFFFF) << 32); + + /* Vol 3A: table: 3-2 page: 3-19 */ + if (acctype == 2) { + kdbp("LDT gate (0010)\n"); + } + else if (acctype == 9) { + kdbp("TSS avail gate(1001)\n"); + } + else if (acctype == 11) { + kdbp("TSS busy gate(1011)\n"); + } + else if (acctype == 12) { + kdbp("CALL gate (1100)\n"); + } + else if (acctype == 14) { + kdbp("IDT gate (1110)\n"); + } + else if (acctype == 15) { + kdbp("Trap gate (1111)\n"); + } + + if (acctype == 2 || acctype == 9 || acctype == 11) { + kdbp(" AVL:%d G:%d Base Addr:%016lx Limit:%x\n", + u1.gdte.AVL, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | ((u64)u1.gdte.base1<<24)| upper), + (u32)u1.gdte.limit0 | (u32)((u32)u1.gdte.limit1<<16)); + + } else if (acctype == 12) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.cgdte.offs0 | + (u64)((u64)u2.cgdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx\n", u2.cgdte.sel, addr64); + } else if (acctype == 14 || acctype == 15) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.igdte.offs0 | + (u64)((u64)u2.igdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx ist:%03x\n", u2.igdte.sel, addr64, + u2.igdte.ist); + } else + kdbp(" Error: Unrecongized type:%lx\n", acctype); + } + return KDB_CPU_MAIN_KDB; +} + +/* Display scheduler basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_sched(void) +{ + kdbp("sched: show schedular info and run queues\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sched(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_sched(); + + kdb_print_sched_info(); + return KDB_CPU_MAIN_KDB; +} + +/* Display MMU basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_mmu(void) +{ + kdbp("mmu: print basic MMU info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmu(); + + kdbp("MMU Info:\n"); + kdbp("total pages: %lx\n", total_pages); + kdbp("max page/mfn: %lx\n", max_page); + kdbp("frame_table: %p\n", frame_table); + kdbp("DIRECTMAP_VIRT_START: %lx\n", DIRECTMAP_VIRT_START); + kdbp("HYPERVISOR_VIRT_START: %lx\n", HYPERVISOR_VIRT_START); + kdbp("HYPERVISOR_VIRT_END: %lx\n", HYPERVISOR_VIRT_END); + kdbp("RO_MPT_VIRT_START: %lx\n", RO_MPT_VIRT_START); + kdbp("PERDOMAIN_VIRT_START: %lx\n", PERDOMAIN_VIRT_START); + kdbp("CONFIG_PAGING_LEVELS:%d\n", CONFIG_PAGING_LEVELS); + kdbp("__HYPERVISOR_COMPAT_VIRT_START: %lx\n", + (ulong)__HYPERVISOR_COMPAT_VIRT_START); + kdbp("&MPT[0] == %016lx\n", &machine_to_phys_mapping[0]); + + kdbp("\nFIRST_RESERVED_GDT_PAGE: %x\n", FIRST_RESERVED_GDT_PAGE); + kdbp("FIRST_RESERVED_GDT_ENTRY: %lx\n", (ulong)FIRST_RESERVED_GDT_ENTRY); + kdbp("LAST_RESERVED_GDT_ENTRY: %lx\n", (ulong)LAST_RESERVED_GDT_ENTRY); + kdbp(" Per cpu non-compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(gdt_table, cpu)); + } + kdbp(" Per cpu compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(compat_gdt_table, cpu)); + } + kdbp("\n"); + kdbp(" Per cpu tss:\n"); + for_each_online_cpu(cpu) { + struct tss_struct *tssp = &per_cpu(init_tss, cpu); + kdbp("\tcpu:%d tss:%p (rsp0:%016lx)\n", cpu, tssp, tssp->rsp0); + } +#ifdef USER_MAPPINGS_ARE_GLOBAL + kdbp("USER_MAPPINGS_ARE_GLOBAL is defined\n"); +#else + kdbp("USER_MAPPINGS_ARE_GLOBAL is NOT defined\n"); +#endif + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* for HVM/HYB guests, go thru EPT. For PV guest we need to go to the btree. + * btree: pfn_to_mfn_frame_list_list is root that points (has mfns of) upto 16 + * pages (call 'em l2 nodes) that contain mfns of guest p2m table pages + * NOTE: num of entries in a p2m page is same as num of entries in l2 node */ +static noinline ulong +kdb_gpfn2mfn(struct domain *dp, ulong gpfn, p2m_type_t *typep) +{ + int idx; + + if ( !paging_mode_translate(dp) ) { + mfn_t *mfn_va, mfn = arch_get_pfn_to_mfn_frame_list_list(dp); + int g_longsz = kdb_guest_bitness(dp->domain_id)/8; + int entries_per_pg = PAGE_SIZE/g_longsz; + const int shift = get_count_order(entries_per_pg); + + if ( !mfn_valid(mfn) ) { + kdbp("Invalid frame_list_list mfn:%lx for non-xlate guest\n", mfn); + return INVALID_MFN; + } + + mfn_va = map_domain_page(mfn); + idx = gpfn >> 2*shift; /* index in root page/node */ + if (idx > 15) { + kdbp("gpfn:%lx idx:%x not in frame list limit of z16\n", gpfn, idx); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn = (g_longsz == 4) ? ((int *)mfn_va)[idx] : mfn_va[idx]; + if (mfn==0) { + kdbp("No mfn for idx:%d for gpfn:%lx in root pg\n", idx, gpfn); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn_va = map_domain_page(mfn); + KDBGP1("p2m: idx:%x fll:%lx mfn of 2nd lvl page:%lx\n", idx, + arch_get_pfn_to_mfn_frame_list_list(dp), mfn); + + idx = (gpfn>>shift) & ((1< 1 && kdb_str2ulong(argv[1], &mfn)) + if (mfn_valid(mfn)) + kdbp("mpt[%x] == %lx\n", mfn, machine_to_phys_mapping[mfn]); + else + kdbp("Invalid mfn:%lx\n", mfn); + else + kdb_usgf_m2p(); + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_pr_pg_pgt_flds(unsigned long type_info) +{ + switch (type_info & PGT_type_mask) { + case (PGT_l1_page_table): + kdbp(" page is PGT_l1_page_table\n"); + break; + case PGT_l2_page_table: + kdbp(" page is PGT_l2_page_table\n"); + break; + case PGT_l3_page_table: + kdbp(" page is PGT_l3_page_table\n"); + break; + case PGT_l4_page_table: + kdbp(" page is PGT_l4_page_table\n"); + break; + case PGT_seg_desc_page: + kdbp(" page is seg desc page\n"); + break; + case PGT_writable_page: + kdbp(" page is writable page\n"); + break; + case PGT_shared_page: + kdbp(" page is shared page\n"); + break; + } + if (type_info & PGT_pinned) + kdbp(" page is pinned\n"); + if (type_info & PGT_validated) + kdbp(" page is validated\n"); + if (type_info & PGT_pae_xen_l2) + kdbp(" page is PGT_pae_xen_l2\n"); + if (type_info & PGT_partial) + kdbp(" page is PGT_partial\n"); + if (type_info & PGT_locked) + kdbp(" page is PGT_locked\n"); +} + +static void +kdb_pr_pg_pgc_flds(unsigned long count_info) +{ + if (count_info & PGC_allocated) + kdbp(" PGC_allocated"); + if (count_info & PGC_xen_heap) + kdbp(" PGC_xen_heap"); + if (count_info & PGC_page_table) + kdbp(" PGC_page_table"); + if (count_info & PGC_broken) + kdbp(" PGC_broken"); +#if XEN_VERSION < 4 /* xen 3.x.x */ + if (count_info & PGC_offlining) + kdbp(" PGC_offlining"); + if (count_info & PGC_offlined) + kdbp(" PGC_offlined"); +#else + if (count_info & PGC_state_inuse) + kdbp(" PGC_inuse"); + if (count_info & PGC_state_offlining) + kdbp(" PGC_state_offlining"); + if (count_info & PGC_state_offlined) + kdbp(" PGC_state_offlined"); + if (count_info & PGC_state_free) + kdbp(" PGC_state_free"); +#endif + kdbp("\n"); +} + +/* print struct page_info{} given ptr to it or an mfn + * NOTE: that given an mfn there seems no way of knowing how it's used, so + * here we just print all info and let user decide what's applicable */ +static kdb_cpu_cmd_t +kdb_usgf_dpage(void) +{ + kdbp("dpage mfn|page-ptr : Display struct page\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dpage(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long val; + struct page_info *pgp; + struct domain *dp; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dpage(); + + if ((kdb_str2ulong(argv[1], &val) == 0) || + (val < (ulong)frame_table && !mfn_valid(val))) { + + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdbp("Page Info:\n"); + if (val <= (ulong)frame_table) { /* arg is mfn */ + pgp = mfn_to_page(val); + kdbp(" mfn: %lx page_info:%p\n", val, pgp); + } else { + pgp = (struct page_info *)val; /* arg is struct page{} */ + if (pgp < frame_table || pgp >= frame_table+max_page) { + kdbp("Invalid page ptr. below/beyond max_page\n"); + return KDB_CPU_MAIN_KDB; + } + kdbp(" mfn: %lx page_info:%p\n", page_to_mfn(pgp), pgp); + } + kdbp(" count_info: %016lx (refcnt: %x)\n", pgp->count_info, + pgp->count_info & PGC_count_mask); +#if XEN_VERSION > 3 || XEN_SUBVERSION > 3 /* xen 3.4.x or later */ + kdb_pr_pg_pgc_flds(pgp->count_info); + + kdbp("In use info:\n"); + kdbp(" type_info:%016lx\n", pgp->u.inuse.type_info); + kdb_pr_pg_pgt_flds(pgp->u.inuse.type_info); + dp = page_get_owner(pgp); + kdbp(" domid:%d (pickled:%lx)\n", dp ? dp->domain_id : -1, + pgp->v.inuse._domain); + + kdbp("Shadow Info:\n"); + kdbp(" type:%x pinned:%x count:%x\n", pgp->u.sh.type, pgp->u.sh.pinned, + pgp->u.sh.count); + kdbp(" back:%lx shadow_flags:%x next_shadow:%lx\n", pgp->v.sh.back, + pgp->shadow_flags, pgp->next_shadow); + + kdbp("Free Info\n"); + kdbp(" need_tlbflush:%d order:%d tlbflush_timestamp:%x\n", + pgp->u.free.need_tlbflush, pgp->v.free.order, + pgp->tlbflush_timestamp); +#else + if (pgp->count_info & PGC_allocated) /* page allocated */ + kdbp(" PGC_allocated"); + if (pgp->count_info & PGC_page_table) /* page table page */ + kdbp(" PGC_page_table"); + kdbp("\n"); + kdbp(" page is %s xen heap page\n", is_xen_heap_page(pgp) ? "a":"NOT"); + kdbp(" cacheattr:%x\n", (pgp->count_info>>PGC_cacheattr_base) & 7); + if (pgp->count_info & PGC_count_mask) { /* page in use */ + dp = pgp->u.inuse._domain; /* pickled domain */ + kdbp(" page is in use\n"); + kdbp(" domid: %d (pickled dom:%x)\n", + dp ? (unpickle_domptr(dp))->domain_id : -1, dp); + kdbp(" type_info: %lx\n", pgp->u.inuse.type_info); + kdb_prt_pg_type(pgp->u.inuse.type_info); + } else { /* page is free */ + kdbp(" page is free\n"); + kdbp(" order: %x\n", pgp->u.free.order); + kdbp(" cpumask: %lx\n", pgp->u.free.cpumask.bits); + } + kdbp(" tlbflush/shadow_flags: %lx\n", pgp->shadow_flags); +#endif + return KDB_CPU_MAIN_KDB; +} + +/* display asked msr value */ +static kdb_cpu_cmd_t +kdb_usgf_dmsr(void) +{ + kdbp("dmsr address : Display msr value\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dmsr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long addr, val; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dmsr(); + + if ((kdb_str2ulong(argv[1], &addr) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + rdmsrl(addr, val); + kdbp("msr: %lx val:%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_cpuid(void) +{ + kdbp("cpuid eax : Display cpuid value returned in rax\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpuid(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long rax=0, rbx=0, rcx=0, rdx=0; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_cpuid(); + + if ((kdb_str2ulong(argv[1], &rax) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } +#if 0 + __asm__ __volatile__ ( + /* "pushl %%rax \n" */ + + "movl %0, %%rax \n" + "cpuid \n" + : "=&a" (rax), "=b" (rbx), "=c" (rcx), "=d" (rdx) + : "0" (rax) + : "rax", "rbx", "rcx", "rdx", "memory"); +#endif + cpuid(rax, &rax, &rbx, &rcx, &rdx); + kdbp("rax: %016lx rbx:%016lx rcx:%016lx rdx:%016lx\n", rax, rbx, + rcx, rdx); + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_wept(void) +{ + kdbp("wept domid gfn: walk ept table for given domid and gfn\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wept(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + ulong gfn; + + if ((argc > 1 && *argv[1] == '?') || argc != 3) + return kdb_usgf_wept(); + if ((dp=kdb_strdomid2ptr(argv[1], 1)) && kdb_str2ulong(argv[2], &gfn)) + ept_walk_table(dp, gfn); + else + kdb_usgf_wept(); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Save symbols info for a guest, dom0 or other... + */ +static kdb_cpu_cmd_t +kdb_usgf_sym(void) +{ + kdbp("sym domid &kallsyms_names &kallsyms_addresses &kallsyms_num_syms\n"); + kdbp("\t [&kallsyms_token_table] [&kallsyms_token_index]\n"); + kdbp("\ttoken _table and _index MUST be specified for el5\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sym(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong namesp, addrap, nump, toktblp, tokidxp; + domid_t domid; + + if (argc < 5) { + return kdb_usgf_sym(); + } + toktblp = tokidxp = 0; /* optional parameters */ + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &namesp) && + kdb_str2ulong(argv[3], &addrap) && + kdb_str2ulong(argv[4], &nump) && + (argc==5 || (argc==7 && kdb_str2ulong(argv[5], &toktblp) && + kdb_str2ulong(argv[6], &tokidxp)))) { + + kdb_sav_dom_syminfo(domid, namesp, addrap,nump,toktblp,tokidxp); + } else + kdb_usgf_sym(); + return KDB_CPU_MAIN_KDB; +} + + +/* mods is the dumb ass &modules. modules is struct {nxt, prev}, and not ptr */ +static void +kdb_dump_linux_modules(domid_t domid, ulong mods, uint nxtoffs, uint nmoffs, + uint coreoffs) +{ + const int bufsz = 56; + char buf[bufsz]; + uint64_t addr, addrval, *nxtptr, *modptr; + uint i, num = 8; + + if (kdb_guest_bitness(domid) == 32) + num = 4; + + /* first read modules{}.next ptr */ + if (kdb_read_mem(mods, (kdbbyt_t *)&nxtptr, num, domid) != num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + + KDBGP("mods:%p nxtptr:%p nmoffs:%x coreoffs:%x\n", (void *)mods, nxtptr, + nmoffs, coreoffs); + + while ((uint64_t)nxtptr != mods) { + + modptr = (uint64_t *) ((ulong)nxtptr - nxtoffs); + + addr = (ulong)modptr + coreoffs; + if (kdb_read_mem(addr, (kdbbyt_t *)&addrval, num, domid) != num) { + kdbp("ERROR: Could not read mod addr at :%p\n", (void *)addr); + return; + } + + KDBGP("modptr:%p addr:%p\n", modptr, (void *)addr); + addr = (ulong)modptr + nmoffs; + i=0; + do { + if (kdb_read_mem(addr, (kdbbyt_t *)&buf[i], 1, domid) != 1) { + kdbp("ERROR:Could not read name ch at addr:%p\n", (void *)addr); + return; + } + addr++; + } while (buf[i] && i++ < bufsz); + buf[bufsz-1] = '\0'; + + kdbp("%016lx %016lx %s\n", modptr, addrval, buf); + + if (kdb_read_mem((ulong)nxtptr, (kdbbyt_t *)&nxtptr, num, domid)!=num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + KDBGP("nxtptr:%p addr:%p\n", nxtptr, (void *)addr); + } +} + +/* Display modules loaded in linux guest */ +static kdb_cpu_cmd_t +kdb_usgf_mod(void) +{ + kdbp("mod domid &modules next-offs name-offs module_core-offs\n"); + kdbp("\twhere next-offs: &((struct module *)0)->list.next\n"); + kdbp("\tname-offs: &((struct module *)0)->name etc..\n"); + kdbp("\tDisplays all loaded modules in the linux guest\n"); + kdbp("\tEg: mod 0 ffffffff80302780 8 0x18 0x178\n"); + + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_cmdf_mod(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong mods, nxtoffs, nmoffs, coreoffs; + domid_t domid; + + if (argc < 6) { + return kdb_usgf_mod(); + } + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &mods) && + kdb_str2ulong(argv[3], &nxtoffs) && + kdb_str2ulong(argv[4], &nmoffs) && + kdb_str2ulong(argv[5], &coreoffs)) { + + kdbp("modptr address name\n"); + kdb_dump_linux_modules(domid, mods, nxtoffs, nmoffs, coreoffs); + } else + kdb_usgf_mod(); + return KDB_CPU_MAIN_KDB; +} + +/* toggle kdb debug trace level */ +static kdb_cpu_cmd_t +kdb_usgf_kdbdbg(void) +{ + kdbp("kdbdbg : trace info to debug kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbdbg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbdbg(); + + kdbdbg = (kdbdbg==3) ? 0 : (kdbdbg+1); + kdbp("kdbdbg set to:%d\n", kdbdbg); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_reboot(void) +{ + kdbp("reboot: reboot system\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_reboot(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_reboot(); + + machine_restart(500); + return KDB_CPU_MAIN_KDB; /* not reached */ +} + + +static kdb_cpu_cmd_t +kdb_usgf_trcon(void) +{ + kdbp("trcon: turn user added kdb tracing on\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcon(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcon(); + + kdb_trcon = 1; + kdbp("kdb tracing is now on\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcoff(void) +{ + kdbp("trcoff: turn user added kdb tracing off\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcoff(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcoff(); + + kdb_trcon = 0; + kdbp("kdb tracing is now off\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcz(void) +{ + kdbp("trcz : zero entire trace buffer\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcz(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcz(); + + kdb_trczero(); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcp(void) +{ + kdbp("trcp : give hints to dump trace buffer via dw/dd command\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcp(); + + kdb_trcp(); + return KDB_CPU_MAIN_KDB; +} + +/* print some basic info, constants, etc.. */ +static kdb_cpu_cmd_t +kdb_usgf_info(void) +{ + kdbp("info : display basic info, constants, etc..\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_info(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + struct cpuinfo_x86 *bcdp; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_info(); + + kdbp("Version: %d.%d.%s (%s@%s) %s\n", xen_major_version(), + xen_minor_version(), xen_extra_version(), xen_compile_by(), + xen_compile_domain(), xen_compile_date()); + kdbp("__XEN_LATEST_INTERFACE_VERSION__ : 0x%x\n", + __XEN_LATEST_INTERFACE_VERSION__); + kdbp("__XEN_INTERFACE_VERSION__: 0x%x\n", __XEN_INTERFACE_VERSION__); + + bcdp = &boot_cpu_data; + kdbp("CPU: (all decimal)"); + if (bcdp->x86_vendor == X86_VENDOR_AMD) + kdbp(" AMD"); + else + kdbp(" INTEL"); + kdbp(" family:%d model:%d\n", bcdp->x86, bcdp->x86_model); + kdbp(" vendor_id:%16s model_id:%64s\n", bcdp->x86_vendor_id, + bcdp->x86_model_id); + kdbp(" cpuidlvl:%d cache:sz:%d align:%d\n", bcdp->cpuid_level, + bcdp->x86_cache_size, bcdp->x86_cache_alignment); + kdbp(" power:%d cores: max:%d booted:%d siblings:%d apicid:%d\n", + bcdp->x86_power, bcdp->x86_max_cores, bcdp->booted_cores, + bcdp->x86_num_siblings, bcdp->apicid); + kdbp(" "); + if (cpu_has_apic) + kdbp("_apic"); + if (cpu_has_sep) + kdbp("|_sep"); + if (cpu_has_xmm3) + kdbp("|_xmm3"); + if (cpu_has_ht) + kdbp("|_ht"); + if (cpu_has_nx) + kdbp("|_nx"); + if (cpu_has_clflush) + kdbp("|_clflush"); + if (cpu_has_page1gb) + kdbp("|_page1gb"); + if (cpu_has_ffxsr) + kdbp("|_ffxsr"); + if (cpu_has_x2apic) + kdbp("|_x2apic"); + kdbp("\n\n"); + kdbp("CC:"); +#if defined(CONFIG_X86_64) + kdbp(" CONFIG_X86_64"); +#endif +#if defined(CONFIG_COMPAT) + kdbp(" CONFIG_COMPAT"); +#endif +#if defined(CONFIG_PAGING_ASSISTANCE) + kdbp(" CONFIG_PAGING_ASSISTANCE"); +#endif + kdbp("\n"); + kdbp("cpu has following features:\n"); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_TSC_RELIABLE) ? + "X86_FEATURE_TSC_RELIABLE" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_CONSTANT_TSC)? "X86_FEATURE_CONSTANT_TSC":""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) ? "X86_FEATURE_NONSTOP_TSC" :""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_RDTSCP) ? "X86_FEATURE_RDTSCP" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_FXSR) ? "X86_FEATURE_FXSR" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_CPUID_FAULTING) ? + "X86_FEATURE_CPUID_FAULTING" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_PAGE1GB) ? "X86_FEATURE_PAGE1GB" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_MWAIT) ? "X86_FEATURE_MWAIT" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_X2APIC) ? "X86_FEATURE_X2APIC":""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_XSAVE) ? "X86_FEATURE_XSAVE":""); + kdbp("\n"); + + kdbp("MAX_VIRT_CPUS:$%d MAX_HVM_VCPUS:$%d\n", MAX_VIRT_CPUS,MAX_HVM_VCPUS); + kdbp("NR_EVENT_CHANNELS: $%d\n", NR_EVENT_CHANNELS); + kdbp("NR_EVTCHN_BUCKETS: $%d\n", NR_EVTCHN_BUCKETS); + + kdbp("\nDomains and their vcpus:\n"); + for_each_domain(dp) { + struct vcpu *vp; + int printed=0; + kdbp(" Domain: {id:%d 0x%x ptr:%p%s} VCPUs:\n", + dp->domain_id, dp->domain_id, dp, dp->is_dying ? " DYING":""); + for(vp=dp->vcpu[0]; vp; vp = vp->next_in_list) { + kdbp(" {id:%d p:%p runstate:%d}", vp->vcpu_id, vp, + vp->runstate.state); + if (++printed % 2 == 0) kdbp("\n"); + } + kdbp("\n"); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_cur(void) +{ + kdbp("cur : display current domid and vcpu\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Checking for guest_mode() not feasible here. if dom0->hcall->bp in xen, + * then g_m() will show xen, but vcpu is still dom0. hence just look at + * current only */ +static kdb_cpu_cmd_t +kdb_cmdf_cur(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t id = current->domain->domain_id; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cur(); + + kdbp("domid: %d{%p} %s vcpu:%d {%p} ", id, current->domain, + (id==DOMID_IDLE) ? "(IDLE)" : "", current->vcpu_id, current); + + /* if (id != DOMID_IDLE) { */ + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + u64 addr = -1; + __vmptrst(&addr); + kdbp(" VMCS:"KDBFL, addr); + } + /* } */ + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* stub to quickly and easily add a new command */ +static kdb_cpu_cmd_t +kdb_usgf_usr1(void) +{ + kdbp("usr1: add any arbitrary cmd using this in kdb_cmds.c\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_usr1(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_h(void) +{ + kdbp("h: display all commands. See kdb/README for more info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_h(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbtab_t *tbp; + + kdbp(" - ccpu is current cpu \n"); + kdbp(" - following are always in decimal:\n"); + kdbp(" vcpu num, cpu num, domid\n"); + kdbp(" - otherwise, almost all numbers are in hex (0x not needed)\n"); + kdbp(" - output: $17 means decimal 17\n"); + kdbp(" - domid 7fff($32767) refers to hypervisor\n"); + kdbp(" - if no domid before function name, then it's hypervisor\n"); + kdbp(" - earlykdb in xen grub line to break into kdb during boot\n"); + kdbp(" - command ? will show the command usage\n"); + kdbp("\n"); + + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_usgf; tbp++) + (*tbp->kdb_cmd_usgf)(); + return KDB_CPU_MAIN_KDB; +} + +/* ===================== cmd table initialization ========================== */ +void __init +kdb_init_cmdtab(void) +{ + static kdbtab_t _kdb_cmd_table[] = { + + {"info", kdb_cmdf_info, kdb_usgf_info, 1, KDB_REPEAT_NONE}, + {"cur", kdb_cmdf_cur, kdb_usgf_cur, 1, KDB_REPEAT_NONE}, + + {"f", kdb_cmdf_f, kdb_usgf_f, 1, KDB_REPEAT_NONE}, + {"fg", kdb_cmdf_fg, kdb_usgf_fg, 1, KDB_REPEAT_NONE}, + + {"dw", kdb_cmdf_dw, kdb_usgf_dw, 1, KDB_REPEAT_NO_ARGS}, + {"dd", kdb_cmdf_dd, kdb_usgf_dd, 1, KDB_REPEAT_NO_ARGS}, + {"dwm", kdb_cmdf_dwm, kdb_usgf_dwm, 1, KDB_REPEAT_NO_ARGS}, + {"ddm", kdb_cmdf_ddm, kdb_usgf_ddm, 1, KDB_REPEAT_NO_ARGS}, + {"dr", kdb_cmdf_dr, kdb_usgf_dr, 1, KDB_REPEAT_NONE}, + {"drg", kdb_cmdf_drg, kdb_usgf_drg, 1, KDB_REPEAT_NONE}, + + {"dis", kdb_cmdf_dis, kdb_usgf_dis, 1, KDB_REPEAT_NO_ARGS}, + {"dism",kdb_cmdf_dism, kdb_usgf_dism, 1, KDB_REPEAT_NO_ARGS}, + + {"mw", kdb_cmdf_mw, kdb_usgf_mw, 1, KDB_REPEAT_NONE}, + {"md", kdb_cmdf_md, kdb_usgf_md, 1, KDB_REPEAT_NONE}, + {"mr", kdb_cmdf_mr, kdb_usgf_mr, 1, KDB_REPEAT_NONE}, + + {"bc", kdb_cmdf_bc, kdb_usgf_bc, 0, KDB_REPEAT_NONE}, + {"bp", kdb_cmdf_bp, kdb_usgf_bp, 1, KDB_REPEAT_NONE}, + {"btp", kdb_cmdf_btp, kdb_usgf_btp, 1, KDB_REPEAT_NONE}, + + {"wp", kdb_cmdf_wp, kdb_usgf_wp, 1, KDB_REPEAT_NONE}, + {"wc", kdb_cmdf_wc, kdb_usgf_wc, 0, KDB_REPEAT_NONE}, + + {"ni", kdb_cmdf_ni, kdb_usgf_ni, 0, KDB_REPEAT_NO_ARGS}, + {"ss", kdb_cmdf_ss, kdb_usgf_ss, 1, KDB_REPEAT_NO_ARGS}, + {"ssb",kdb_cmdf_ssb,kdb_usgf_ssb,0, KDB_REPEAT_NO_ARGS}, + {"go", kdb_cmdf_go, kdb_usgf_go, 0, KDB_REPEAT_NONE}, + + {"cpu",kdb_cmdf_cpu, kdb_usgf_cpu, 1, KDB_REPEAT_NONE}, + {"nmi",kdb_cmdf_nmi, kdb_usgf_nmi, 1, KDB_REPEAT_NONE}, + {"percpu",kdb_cmdf_percpu, kdb_usgf_percpu, 1, KDB_REPEAT_NONE}, + + {"sym", kdb_cmdf_sym, kdb_usgf_sym, 1, KDB_REPEAT_NONE}, + {"mod", kdb_cmdf_mod, kdb_usgf_mod, 1, KDB_REPEAT_NONE}, + + {"vcpuh",kdb_cmdf_vcpuh, kdb_usgf_vcpuh, 1, KDB_REPEAT_NONE}, + {"vcpu", kdb_cmdf_vcpu, kdb_usgf_vcpu, 1, KDB_REPEAT_NONE}, + {"dom", kdb_cmdf_dom, kdb_usgf_dom, 1, KDB_REPEAT_NONE}, + + {"sched", kdb_cmdf_sched, kdb_usgf_sched, 1, KDB_REPEAT_NONE}, + {"mmu", kdb_cmdf_mmu, kdb_usgf_mmu, 1, KDB_REPEAT_NONE}, + {"p2m", kdb_cmdf_p2m, kdb_usgf_p2m, 1, KDB_REPEAT_NONE}, + {"m2p", kdb_cmdf_m2p, kdb_usgf_m2p, 1, KDB_REPEAT_NONE}, + {"dpage", kdb_cmdf_dpage, kdb_usgf_dpage, 1, KDB_REPEAT_NONE}, + {"dmsr", kdb_cmdf_dmsr, kdb_usgf_dmsr, 1, KDB_REPEAT_NONE}, + {"cpuid", kdb_cmdf_cpuid, kdb_usgf_cpuid, 1, KDB_REPEAT_NONE}, + {"wept", kdb_cmdf_wept, kdb_usgf_wept, 1, KDB_REPEAT_NONE}, + + {"dtrq", kdb_cmdf_dtrq, kdb_usgf_dtrq, 1, KDB_REPEAT_NONE}, + {"didt", kdb_cmdf_didt, kdb_usgf_didt, 1, KDB_REPEAT_NONE}, + {"dgdt", kdb_cmdf_dgdt, kdb_usgf_dgdt, 1, KDB_REPEAT_NONE}, + {"dirq", kdb_cmdf_dirq, kdb_usgf_dirq, 1, KDB_REPEAT_NONE}, + {"dvit", kdb_cmdf_dvit, kdb_usgf_dvit, 1, KDB_REPEAT_NONE}, + {"dvmc", kdb_cmdf_dvmc, kdb_usgf_dvmc, 1, KDB_REPEAT_NONE}, + {"mmio", kdb_cmdf_mmio, kdb_usgf_mmio, 1, KDB_REPEAT_NONE}, + + /* tracing related commands */ + {"trcon", kdb_cmdf_trcon, kdb_usgf_trcon, 0, KDB_REPEAT_NONE}, + {"trcoff",kdb_cmdf_trcoff, kdb_usgf_trcoff, 0, KDB_REPEAT_NONE}, + {"trcz", kdb_cmdf_trcz, kdb_usgf_trcz, 0, KDB_REPEAT_NONE}, + {"trcp", kdb_cmdf_trcp, kdb_usgf_trcp, 1, KDB_REPEAT_NONE}, + + {"usr1", kdb_cmdf_usr1, kdb_usgf_usr1, 1, KDB_REPEAT_NONE}, + {"kdbf", kdb_cmdf_kdbf, kdb_usgf_kdbf, 1, KDB_REPEAT_NONE}, + {"kdbdbg",kdb_cmdf_kdbdbg, kdb_usgf_kdbdbg, 1, KDB_REPEAT_NONE}, + {"reboot",kdb_cmdf_reboot, kdb_usgf_reboot, 1, KDB_REPEAT_NONE}, + {"h", kdb_cmdf_h, kdb_usgf_h, 1, KDB_REPEAT_NONE}, + + {"", NULL, NULL, 0, 0}, + }; + kdb_cmd_tbl = _kdb_cmd_table; + return; +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/kdb_io.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_io.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ +#include "include/kdbinc.h" + +#define K_BACKSPACE 0x8 /* ctrl-H */ +#define K_BACKSPACE1 0x7f /* ctrl-? */ +#define K_UNDERSCORE 0x5f +#define K_CMD_BUFSZ 160 +#define K_CMD_MAXI (K_CMD_BUFSZ - 1) /* max index in buffer */ + +#if 0 /* make a history array some day */ +#define K_UP_ARROW /* sequence : 1b 5b 41 ie, '\e[A' */ +#define K_DN_ARROW /* sequence : 1b 5b 42 ie, '\e[B' */ +#define K_NUM_HIST 32 +static int cursor; +static char cmds_a[NUM_HIST][K_CMD_BUFSZ]; +#endif + +static char cmds_a[K_CMD_BUFSZ]; + + +static int +kdb_key_valid(int key) +{ + /* note: isspace() is more than ' ', hence we don't use it here */ + if (isalnum(key) || key == ' ' || key == K_BACKSPACE || key == '\n' || + key == '?' || key == K_UNDERSCORE || key == '=' || key == '!') + return 1; + return 0; +} + +/* display kdb prompt and read command from the console + * RETURNS: a '\n' terminated command buffer */ +char * +kdb_get_cmdline(char *prompt) +{ + #define K_BELL 0x7 + #define K_CTRL_C 0x3 + + int key, i=0; + + kdbp(prompt); + memset(cmds_a, 0, K_CMD_BUFSZ); + cmds_a[K_CMD_BUFSZ-1] = '\n'; + + do { + key = console_getc(); + if (key == '\r') + key = '\n'; + if (key == K_BACKSPACE1) + key = K_BACKSPACE; + + if (key == K_CTRL_C || (i==K_CMD_MAXI && key != '\n')) { + console_putc('\n'); + if (i >= K_CMD_MAXI) { + kdbp("KDB: cmd buffer overflow\n"); + console_putc(K_BELL); + } + memset(cmds_a, 0, K_CMD_BUFSZ); + i = 0; + kdbp(prompt); + continue; + } + if (!kdb_key_valid(key)) { + console_putc(K_BELL); + continue; + } + if (key == K_BACKSPACE) { + if (i==0) { + console_putc(K_BELL); + continue; + } else + cmds_a[--i] = '\0'; + console_putc(K_BACKSPACE); + console_putc(' '); /* erase character */ + } else + cmds_a[i++] = key; + + console_putc(key); + + } while (key != '\n'); + + return cmds_a; +} + +/* + * printk takes a lock, an NMI could come in after that, and another cpu may + * spin. also, the console lock is forced unlock, so panic is been seen on + * 8 way. hence, no printk() calls. + */ +static volatile int kdbp_gate = 0; +void +kdbp(const char *fmt, ...) +{ + static char buf[1024]; + va_list args; + char *p; + int i=0; + + while ((__cmpxchg(&kdbp_gate, 0,1, sizeof(kdbp_gate)) != 0) && i++<1000) + mdelay(10); + + va_start(args, fmt); + (void)vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + + for (p=buf; *p != '\0'; p++) + console_putc(*p); + kdbp_gate = 0; +} + + +/* + * copy/read machine memory. + * RETURNS: number of bytes copied + */ +int +kdb_read_mmem(kdbma_t maddr, kdbbyt_t *dbuf, int len) +{ + ulong remain, orig=len; + + while (len > 0) { + ulong pagecnt = min_t(long, PAGE_SIZE-(maddr&~PAGE_MASK), len); + char *va = map_domain_page(maddr >> PAGE_SHIFT); + + va = va + (maddr & (PAGE_SIZE-1)); /* add page offset */ + remain = __copy_from_user(dbuf, (void *)va, pagecnt); + KDBGP1("maddr:%x va:%p len:%x pagecnt:%x rem:%x\n", + maddr, va, len, pagecnt, remain); + unmap_domain_page(va); + len = len - (pagecnt - remain); + if (remain != 0) + break; + maddr += pagecnt; + dbuf += pagecnt; + } + return orig - len; +} + + +/* + * copy/read guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes copied + */ +int +kdb_read_mem(kdbva_t saddr, kdbbyt_t *dbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(saddr, dbuf, len, domid, 0, 0)); +} + +/* + * write guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes written + */ +int +kdb_write_mem(kdbva_t daddr, kdbbyt_t *sbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(daddr, sbuf, len, domid, 1, 0)); +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/kdbmain.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdbmain.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,757 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +static int kdbmain(kdb_reason_t, struct cpu_user_regs *); +static int kdbmain_fatal(struct cpu_user_regs *, int); +static const char *kdb_gettrapname(int); + +/* ======================== GLOBAL VARIABLES =============================== */ +/* All global variables used by KDB must be defined here only. Module specific + * static variables must be declared in respective modules. + */ +kdbtab_t *kdb_cmd_tbl; +char kdb_prompt[32]; + +volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +cpumask_t kdb_cpu_traps; /* bit per cpu to tell which cpus hit int3 */ + +#ifndef NDEBUG + #error KDB is not supported on debug xen. Turn debug off +#endif + +volatile int kdb_init_cpu = -1; /* initial kdb cpu */ +volatile int kdb_session_begun = 0; /* active kdb session? */ +volatile int kdb_enabled = 1; /* kdb enabled currently? */ +volatile int kdb_sys_crash = 0; /* are we in crashed state? */ +volatile int kdbdbg = 0; /* to debug kdb itself */ + +static volatile int kdb_trap_immed_reason = 0; /* reason for immed trap */ + +static cpumask_t kdb_fatal_cpumask; /* which cpus in fatal path */ + +/* return index of first bit set in val. if val is 0, retval is undefined */ +static inline unsigned int kdb_firstbit(unsigned long val) +{ + __asm__ ( "bsf %1,%0" : "=r" (val) : "r" (val), "0" (BITS_PER_LONG) ); + return (unsigned int)val; +} + +void noinline mukchk(unsigned long ul) +{ +} + +static void +kdb_dbg_prnt_ctrps(char *label, int ccpu) +{ + int i; + if (!kdbdbg) + return; + + if (label || *label) + kdbp("%s ", label); + if (ccpu != -1) + kdbp("ccpu:%d ", ccpu); + kdbp("cputrps:"); + for (i=sizeof(kdb_cpu_traps)/sizeof(kdb_cpu_traps.bits[0]) - 1; i >=0; i--) + kdbp(" %lx", kdb_cpu_traps.bits[i]); + kdbp("\n"); +} + +/* + * Hold this cpu. Don't disable until all CPUs in kdb to avoid IPI deadlock + */ +static void +kdb_hold_this_cpu(int ccpu, struct cpu_user_regs *regs) +{ + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + do { + for(; kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE; cpu_relax()); + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DISABLE) { + local_irq_disable(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DO_VMEXIT) { + kdb_curr_cpu_flush_vmcs(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_SHOWPC) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + } while (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE); /* No goto, eh! */ + KDBGP1("un hold: ccpu:%d cmd:%d\n", ccpu, kdb_cpu_cmd[ccpu]); +} + +/* + * Pause this cpu while one CPU does main kdb processing. If that CPU does + * a "cpu switch" to this cpu, this cpu will become the main kdb cpu. If the + * user next does single step of some sort, this function will be exited, + * and this cpu will come back into kdb via kdb_handle_trap_entry function. + */ +static void +kdb_pause_this_cpu(struct cpu_user_regs *regs, void *unused) +{ + kdbmain(KDB_REASON_PAUSE_IPI, regs); +} + +/* pause other cpus via an IPI. Note, disabled CPUs can't receive IPIs until + * enabled */ +static void +kdb_smp_pause_cpus(void) +{ + int cpu, wait_count = 0; + int ccpu = smp_processor_id(); /* current cpu */ + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) { + kdbp("KDB: won't pause cpu:%d, cmd[cpu]=%d\n",cpu,kdb_cpu_cmd[cpu]); + cpumask_clear_cpu(cpu, &cpumask); + } + KDBGP("ccpu:%d will pause cpus. mask:0x%lx\n", ccpu, cpumask.bits[0]); +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + on_selected_cpus(&cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0); +#else + on_selected_cpus(cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0, 0); +#endif + mdelay(300); /* wait a bit for other CPUs to stop */ + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + bummer = 1; + if (!bummer) + break; + kdbp("ccpu:%d trying to stop other cpus...\n", ccpu); + mdelay(100); /* wait 100 ms */ + }; + for_each_cpu(cpu, &cpumask) /* now check who is with us */ + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + kdbp("Bummer cpu %d not paused. ccpu:%d\n", cpu,ccpu); + else { + kdb_cpu_cmd[cpu] = KDB_CPU_DISABLE; /* tell it to disable ints */ + while (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE); + } +} + +/* + * Do once per kdb session: A kdb session lasts from + * keybord/HWBP/SWBP till KDB_CPU_INSTALL_BP is done. Within a session, + * user may do several cpu switches, single step, next instr, etc.. + * + * DO: 1. pause other cpus if they are not already. they would already be + * if we are in single step mode + * 2. watchdog_disable() + * 3. uninstall all sw breakpoints so that user doesn't see them + */ +static void +kdb_begin_session(void) +{ + if (!kdb_session_begun) { + kdb_session_begun = 1; + kdb_smp_pause_cpus(); + local_irq_disable(); + watchdog_disable(); + kdb_uninstall_all_swbp(); + } +} + +int noinline mukid(void) +{ + return smp_processor_id(); +} + +static void +kdb_smp_unpause_cpus(int ccpu) +{ + int cpu; + + int wait_count = 0; + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + + KDBGP("kdb_smp_unpause_other_cpus(). ccpu:%d\n", ccpu); + for_each_cpu(cpu, &cpumask) + kdb_cpu_cmd[cpu] = KDB_CPU_QUIT; + + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + bummer = 1; + if (!bummer) + break; + mdelay(90); /* wait 90 ms, 50 too short on large systems */ + }; + /* now make sure they are all in there */ + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + kdbp("KDB: cpu %d still paused (cmd==%d). ccpu:%d\n", + cpu, kdb_cpu_cmd[cpu], ccpu); +} + +/* + * End of KDB session. + * This is called at the very end. In case of multiple cpus hitting BPs + * and sitting on a trap handlers, the last cpu to exit will call this. + * - isnstall all sw breakpoints, and purge deleted ones from table. + * - clear TF here also in case go is entered on a different cpu after switch + */ +static void +kdb_end_session(int ccpu, struct cpu_user_regs *regs) +{ + ASSERT(!cpumask_empty(&kdb_cpu_traps)); + ASSERT(kdb_session_begun); + kdb_install_all_swbp(); + kdb_flush_swbp_table(); + kdb_install_watchpoints(); + + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + kdb_time_resume(1); + kdb_session_begun = 0; /* before unpause for kdb_install_watchpoints */ + kdb_smp_unpause_cpus(ccpu); + watchdog_enable(); + KDBGP("end_session:ccpu:%d\n", ccpu); +} +volatile int mukwpprnt; +unsigned long mukaddr1 = 0xffffffff81243ae7, mukaddr2 = 0xffffffff8100986e; +/* + * check if we entered kdb because of DB trap. If yes, then check if + * we caused it or someone else. + * RETURNS: 0 : not one of ours. hypervisor must handle it. + * 1 : #DB for delayed sw bp install. + * 2 : this cpu must stay in kdb. + */ +static noinline int +kdb_check_dbtrap(kdb_reason_t *reasp, int ss_mode, struct cpu_user_regs *regs) +{ + int rc = 2; + int ccpu = smp_processor_id(); + + /* DB excp caused by hw breakpoint or the TF flag. The TF flag is set + * by us for ss mode or to install breakpoints. In ss mode, none of the + * breakpoints are installed. Check to make sure we intended BP INSTALL + * so we don't do it on a spurious DB trap. + * check for kdb_cpu_traps here also, because each cpu sitting on a trap + * must execute the instruction without the BP before passing control + * to next cpu in kdb_cpu_traps. + */ + if (*reasp == KDB_REASON_DBEXCP && !ss_mode) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP) { + if (!cpumask_empty(&kdb_cpu_traps)) { + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d trapcpu:%d\n", ccpu, a_trap_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + *reasp = KDB_REASON_PAUSE_IPI; + regs->eflags &= ~X86_EFLAGS_TF; /* hvm: exit handler ss = 0 */ + kdb_init_cpu = -1; + } else { + kdb_end_session(ccpu, regs); + rc = 1; + } + } else if (! kdb_check_watchpoints(regs)) { + rc = 0; /* hyp must handle it */ + } else { + if (regs->rip==mukaddr1 || regs->rip==mukaddr2) + { + if (mukwpprnt) + kdbp("MUK: ignoring wp:%lx\n", regs->rip); + kdb_end_session(ccpu, regs); + rc = 1; + } + } + } + return rc; +} + +/* + * Misc processing on kdb entry like displaying PC, adjust IP for sw bp.... + */ +static void +kdb_main_entry_misc(kdb_reason_t reason, struct cpu_user_regs *regs, + int ccpu, int ss_mode, int enabled) +{ + if (reason == KDB_REASON_KEYBOARD) + kdbp("\nEnter kdb (cpu:%d reason:%d vcpu=%d domid:%d" + " eflg:0x%lx irqs:%d)\n", ccpu, reason, current->vcpu_id, + current->domain->domain_id, regs->eflags, enabled); + else if (ss_mode) + KDBGP1("KDBG: KDB single step mode. ccpu:%d\n", ccpu); + + if (reason == KDB_REASON_BPEXCP && !ss_mode) + kdbp("Breakpoint on cpu %d at 0x%lx\n", ccpu, regs->KDBIP); + + /* display the current PC and instruction at it */ + if (reason != KDB_REASON_PAUSE_IPI) + kdb_display_pc(regs); + console_start_sync(); +} + +/* + * The MAIN kdb function. All cpus go thru this. IRQ is enabled on entry because + * a cpu could hit a bp set in disabled code. + * IPI: Even the main cpu must enable in case another CPU is trying to IPI us. + * That way, it would IPI us, then get out and be ready for our pause IPI. + * IRQs: The reason irqs enable/disable is scattered is because on a typical + * system IPIs are constantly going on amongs CPUs in a set of any size. + * As a result, to avoid deadlock, cpus have to loop enabled, until a + * quorum is established and the session has begun. + * Step: Intel Vol3B 18.3.1.4 : An external interrupt may be serviced upon + * single step. Since, the likely ext timer_interrupt and + * apic_timer_interrupt dont' mess with time data structs, we are prob OK + * leaving enabled. + * Time: Very messy. Most platform timers are readonly, so we can't stop time + * in the debugger. We take the only resort, let the TSC and plt run as + * normal, upon leaving, "attempt" to bring everybody to current time. + * kdbcputraps: bit per cpu. each cpu sets it bit in entry.S. The bit is + * reliable because upon traps, Ints are disabled. the bit is set + * before Ints are enabled. + * + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +static int +kdbmain(kdb_reason_t reason, struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); /* current cpu */ + int rc = 1, cmd = kdb_cpu_cmd[ccpu]; + int ss_mode = (cmd == KDB_CPU_SS || cmd == KDB_CPU_NI); + int delayed_install = (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP); + int enabled = local_irq_is_enabled(); + + KDBGP("kdbmain:ccpu:%d rsn:%d eflgs:0x%lx cmd:%d initc:%d irqs:%d " + "regs:%lx IP:%lx ", ccpu, reason, regs->eflags, cmd, + kdb_init_cpu, enabled, regs, regs->KDBIP); + kdb_dbg_prnt_ctrps("", -1); + + if (!ss_mode && !delayed_install) /* initial kdb enter */ + local_irq_enable(); /* so we can receive IPI */ + + if (!ss_mode && ccpu != kdb_init_cpu && reason != KDB_REASON_PAUSE_IPI){ + int sz = sizeof(kdb_init_cpu); + while (__cmpxchg(&kdb_init_cpu, -1, ccpu, sz) != -1) + for(; kdb_init_cpu != -1; cpu_relax()); + } + if (kdb_session_begun) + local_irq_disable(); /* kdb always runs disabled */ + + if (reason == KDB_REASON_BPEXCP) { /* INT 3 */ + cpumask_clear_cpu(ccpu, &kdb_cpu_traps); /* remove ourself */ + rc = kdb_check_sw_bkpts(regs); + if (rc == 0) { /* not one of ours. leave kdb */ + kdb_init_cpu = -1; + goto out; + } else if (rc == 1) { /* one of ours but deleted */ + if (cpumask_empty(&kdb_cpu_traps)) { + kdb_end_session(ccpu,regs); + kdb_init_cpu = -1; + goto out; + } else { + /* release another trap cpu, and put ourself in a pause mode */ + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d cmd:%d rsn:%d atrpcpu:%d initcpu:%d\n", ccpu, + kdb_cpu_cmd[ccpu], reason, a_trap_cpu, kdb_init_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + reason = KDB_REASON_PAUSE_IPI; + kdb_init_cpu = -1; + } + } else if (rc == 2) { /* one of ours but condition not met */ + kdb_begin_session(); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + + /* following will take care of KDB_CPU_INSTALL_BP, and also release + * kdb_init_cpu. it should not be done twice */ + if ((rc=kdb_check_dbtrap(&reason, ss_mode, regs)) == 0 || rc == 1) { + kdb_init_cpu = -1; /* leaving kdb */ + goto out; /* rc properly set to 0 or 1 */ + } + if (reason != KDB_REASON_PAUSE_IPI) { + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + } else + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB && !ss_mode) + kdb_begin_session(); + + kdb_main_entry_misc(reason, regs, ccpu, ss_mode, enabled); + /* note, one or more cpu switches may occur in between */ + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + if (ccpu != kdb_init_cpu) { + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_GO; + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + continue; /* for the pause guy */ + } + if (!cpumask_empty(&kdb_cpu_traps)) { + /* execute current instruction without 0xcc */ + kdb_dbg_prnt_ctrps("nempty:", ccpu); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + if (kdb_cpu_cmd[ccpu] != KDB_CPU_PAUSE && + kdb_cpu_cmd[ccpu] != KDB_CPU_MAIN_KDB) + break; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + ASSERT(cpumask_empty(&kdb_cpu_traps)); + if (kdb_swbp_exists()) { + if (reason == KDB_REASON_BPEXCP) { + /* do delayed install */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + kdb_end_session(ccpu, regs); + kdb_init_cpu = -1; + } +out: + if (kdb_cpu_cmd[ccpu] == KDB_CPU_QUIT) { + KDBGP("ccpu:%d _quit IP: %lx\n", ccpu, regs->KDBIP); + if (! kdb_session_begun) + kdb_install_watchpoints(); + kdb_time_resume(0); + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + } + + /* for ss and delayed install, TF is set. not much in EXT INT handlers*/ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_NI) + kdb_time_resume(1); + if (enabled) + local_irq_enable(); + + KDBGP("kdbmain:X:ccpu:%d rc:%d cmd:%d eflg:0x%lx initc:%d sesn:%d " + "cs:%x irqs:%d ", ccpu, rc, kdb_cpu_cmd[ccpu], regs->eflags, + kdb_init_cpu, kdb_session_begun, regs->cs, local_irq_is_enabled()); + kdb_dbg_prnt_ctrps("", -1); + return (rc ? 1 : 0); +} + +/* + * kdb entry function when coming in via a keyboard + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +int +kdb_keyboard(struct cpu_user_regs *regs) +{ + return kdbmain(KDB_REASON_KEYBOARD, regs); +} + +#if 0 +/* + * this function called when kdb session active and user presses ctrl\ again. + * the assumption is that the user typed ni/ss cmd, and it never got back into + * kdb, or the user is impatient. Either case, we just fake it that the SS did + * finish. Since, all other kdb cpus must be holding disabled, the interrupt + * would be on the CPU that did the ss/ni cmd + */ +void +kdb_ssni_reenter(struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); + int ccmd = kdb_cpu_cmd[ccpu]; + + if(ccmd == KDB_CPU_SS || ccmd == KDB_CPU_INSTALL_BP) + kdbmain(KDB_REASON_DBEXCP, regs); + else + kdbmain(KDB_REASON_KEYBOARD, regs); +} +#endif + +/* + * All traps are routed thru here. We care about BP (#3) trap (INT 3) and + * the DB trap(#1) only. + * returns: 0 kdb has nothing do with this trap + * 1 kdb handled this trap + */ +int +kdb_handle_trap_entry(int vector, struct cpu_user_regs *regs) +{ + int rc = 0; + int ccpu = smp_processor_id(); + + if (vector == TRAP_int3) { + rc = kdbmain(KDB_REASON_BPEXCP, regs); + + } else if (vector == TRAP_debug) { + KDBGP("ccpu:%d trapdbg reas:%d\n", ccpu, kdb_trap_immed_reason); + + if (kdb_trap_immed_reason == KDB_TRAP_FATAL) { + KDBGP("kdbtrp:fatal ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, vector); + BUG(); /* no return */ + + } else if (kdb_trap_immed_reason == KDB_TRAP_KDBSTACK) { + kdb_trap_immed_reason = 0; /* show kdb stack */ + show_registers(regs); + show_stack(regs); + regs->eflags &= ~X86_EFLAGS_TF; + rc = 1; + + } else if (kdb_trap_immed_reason == KDB_TRAP_NONFATAL) { + kdb_trap_immed_reason = 0; + rc = kdb_keyboard(regs); + } else { /* ss/ni/delayed install... */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + rc = kdbmain(KDB_REASON_DBEXCP, regs); + } + + } else if (vector == TRAP_nmi) { /* external nmi */ + /* when nmi is pressed, it could go to one or more or all cpus + * depending on the hardware. Also, for now assume it's fatal */ + KDBGP("kdbtrp:ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, TRAP_nmi); + } + return rc; +} + +int +kdb_trap_fatal(int vector, struct cpu_user_regs *regs) +{ + kdbmain_fatal(regs, vector); + return 0; +} + +/* From smp_send_nmi_allbutself() in crash.c which is static */ +void +kdb_nmi_pause_cpus(cpumask_t cpumask) +{ + int ccpu = smp_processor_id(); + mdelay(200); + cpumask_complement(&cpumask, &cpumask); /* flip bit map */ + cpumask_and(&cpumask, &cpumask, &cpu_online_map); /* remove extra bits */ + cpumask_clear_cpu(ccpu, &cpumask);/* absolutely make sure we're not on it */ + + KDBGP("ccpu:%d nmi pause. mask:0x%lx\n", ccpu, cpumask.bits[0]); + if ( !cpumask_empty(&cpumask) ) +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + send_IPI_mask(&cpumask, APIC_DM_NMI); +#else + send_IPI_mask(cpumask, APIC_DM_NMI); +#endif + mdelay(200); + KDBGP("ccpu:%d nmi pause done...\n", ccpu); +} + +/* + * Separate function from kdbmain to keep both within sanity levels. + */ +DEFINE_SPINLOCK(kdb_fatal_lk); +static int +kdbmain_fatal(struct cpu_user_regs *regs, int vector) +{ + int ccpu = smp_processor_id(); + + console_start_sync(); + + KDBGP("mainf:ccpu:%d vec:%d irq:%d\n", ccpu, vector,local_irq_is_enabled()); + cpumask_set_cpu(ccpu, &kdb_fatal_cpumask); /* uses LOCK_PREFIX */ + + if (spin_trylock(&kdb_fatal_lk)) { + + kdbp("*** kdb (Fatal Error on cpu:%d vec:%d %s):\n", ccpu, + vector, kdb_gettrapname(vector)); + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + kdb_display_pc(regs); + + watchdog_disable(); /* important */ + kdb_sys_crash = 1; + kdb_session_begun = 0; /* incase session already active */ + local_irq_enable(); + kdb_nmi_pause_cpus(kdb_fatal_cpumask); + + kdb_clear_prev_cmd(); /* buffered CRs will repeat prev cmd */ + kdb_session_begun = 1; /* for kdb_hold_this_cpu() */ + local_irq_disable(); + } else { + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); +#if 0 + /* dump is the only way to exit in crashed state */ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DUMP) + kdb_do_dump(regs); +#endif + } + return 0; +} + +/* Mostly called in fatal cases. earlykdb calls non-fatal. + * kdb_trap_immed_reason is global, so allow only one cpu at a time. Also, + * multiple cpu may be crashing at the same time. We enable because if there + * is a bad hang, at least ctrl-\ will break into kdb. Also, we don't call + * call kdb_keyboard directly becaue we don't have the register context. + */ +DEFINE_SPINLOCK(kdb_immed_lk); +void +kdb_trap_immed(int reason) /* fatal, non-fatal, kdb stack etc... */ +{ + int ccpu = smp_processor_id(); + int disabled = !local_irq_is_enabled(); + + KDBGP("trapimm:ccpu:%d reas:%d\n", ccpu, reason); + local_irq_enable(); + spin_lock(&kdb_immed_lk); + kdb_trap_immed_reason = reason; + barrier(); + __asm__ __volatile__ ( "int $1" ); + kdb_trap_immed_reason = 0; + + spin_unlock(&kdb_immed_lk); + if (disabled) + local_irq_disable(); +} + +/* called very early during init, even before all CPUs are brought online */ +void +kdb_init(void) +{ + kdb_init_cmdtab(); /* Initialize Command Table */ +} + +static const char * +kdb_gettrapname(int trapno) +{ + char *ret; + switch (trapno) { + case 0: ret = "Divide Error"; break; + case 2: ret = "NMI Interrupt"; break; + case 3: ret = "Int 3 Trap"; break; + case 4: ret = "Overflow Error"; break; + case 6: ret = "Invalid Opcode"; break; + case 8: ret = "Double Fault"; break; + case 10: ret = "Invalid TSS"; break; + case 11: ret = "Segment Not Present"; break; + case 12: ret = "Stack-Segment Fault"; break; + case 13: ret = "General Protection"; break; + case 14: ret = "Page Fault"; break; + case 17: ret = "Alignment Check"; break; + default: ret = " ????? "; + } + return ret; +} + + +/* ====================== Generic tracing subsystem ======================== */ + +#define KDBTRCMAX 1 /* set this to max number of recs to trace. each rec + * is 32 bytes */ +volatile int kdb_trcon=1; /* turn tracing ON: set here or via the trcon cmd */ + +typedef struct { + union { + struct { uint d0; uint cpu_trcid; } s0; + uint64_t l0; + }u; + uint64_t l1, l2, l3; +} trc_rec_t; + +static volatile unsigned int trcidx; /* points to where new entry will go */ +static trc_rec_t trca[KDBTRCMAX]; /* trace array */ + +/* atomically: add i to *p, return prev value of *p (ie, val before add) */ +static int +kdb_fetch_and_add(int i, uint *p) +{ + asm volatile("lock xaddl %0, %1;" : "=r"(i) : "m"(*p), "0"(i)); + return i; +} + +/* zero out the entire buffer */ +void +kdb_trczero(void) +{ + for (trcidx = KDBTRCMAX-1; trcidx; trcidx--) { + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + } + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + kdbp("kdb trace buffer has been zeroed\n"); +} + +/* add trace entry: eg.: kdbtrc(0xe0f099, intdata, vcpu, domain, 0) + * where: 0xe0f099 : 24bits max trcid, lower 8 bits are set to cpuid */ +void +kdbtrc(uint trcid, uint int_d0, uint64_t d1_64, uint64_t d2_64, uint64_t d3_64) +{ + uint idx; + + if (!kdb_trcon) + return; + + idx = kdb_fetch_and_add(1, (uint*)&trcidx); + idx = idx % KDBTRCMAX; + +#if 0 + trca[idx].u.s0.cpu_trcid = (smp_processor_id()<<24) | trcid; +#endif + trca[idx].u.s0.cpu_trcid = (trcid<<8) | smp_processor_id(); + trca[idx].u.s0.d0 = int_d0; + trca[idx].l1 = d1_64; + trca[idx].l2 = d2_64; + trca[idx].l3 = d3_64; +} + +/* give hints so user can print trc buffer via the dd command. last has the + * most recent entry */ +void +kdb_trcp(void) +{ + int i = trcidx % KDBTRCMAX; + + i = (i==0) ? KDBTRCMAX-1 : i-1; + kdbp("trcbuf: [0]: %016lx [MAX-1]: %016lx\n", &trca[0], + &trca[KDBTRCMAX-1]); + kdbp(" [most recent]: %016lx trcidx: 0x%x\n", &trca[i], trcidx); +} + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/Makefile Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_wp.o +subdir-y += udis86-1.7 diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/kdb_wp.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/kdb_wp.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +#if 0 +#define DR6_BT 0x00008000 +#define DR6_BS 0x00004000 +#define DR6_BD 0x00002000 +#endif +#define DR6_B3 0x00000008 +#define DR6_B2 0x00000004 +#define DR6_B1 0x00000002 +#define DR6_B0 0x00000001 + +#define KDB_MAXWP 4 /* DR0 thru DR3 */ + +struct kdb_wp { + kdbma_t wp_addr; + int wp_rwflag; + int wp_len; + int wp_deleted; /* pending delete */ +}; +static struct kdb_wp kdb_wpa[KDB_MAXWP]; + +/* following because vmcs has it's own dr7. when vmcs runs, it messes up the + * native dr7 so we need to save/restore it */ +unsigned long kdb_dr7; + + +/* Set G0-G3 bits in DR7. this does global enable of the corresponding wp */ +static void +kdb_set_gx_in_dr7(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p | 0x2; + else if (regno == 1) + *dr7p = *dr7p | 0x8; + else if (regno == 2) + *dr7p = *dr7p | 0x20; + else if (regno == 3) + *dr7p = *dr7p | 0x80; +} + +/* Set LEN0 - LEN3 pair bits in DR7 (len should be 1 2 4 or 8) */ +static void +kdb_set_len_in_dr7(int regno, kdbma_t *dr7p, int len) +{ + int lenbits = (len == 8) ? 2 : len-1; + + *dr7p &= ~(0x3 << (18 + 4*regno)); + *dr7p |= ((ulong)(lenbits & 0x3) << (18 + 4*regno)); +} + +static void +kdb_set_dr7_rw(int regno, kdbma_t *dr7p, int rw) +{ + *dr7p &= ~(0x3 << (16 + 4*regno)); + *dr7p |= ((ulong)(rw & 0x3)) << (16 + 4*regno); +} + +/* get value of a debug register: DR0-DR3 DR6 DR7. other values return 0 */ +kdbma_t +kdb_rd_dbgreg(int regnum) +{ + kdbma_t contents = 0; + + if (regnum == 0) + __asm__ ("movq %%db0,%0\n\t":"=r"(contents)); + else if (regnum == 1) + __asm__ ("movq %%db1,%0\n\t":"=r"(contents)); + else if (regnum == 2) + __asm__ ("movq %%db2,%0\n\t":"=r"(contents)); + else if (regnum == 3) + __asm__ ("movq %%db3,%0\n\t":"=r"(contents)); + else if (regnum == 6) + __asm__ ("movq %%db6,%0\n\t":"=r"(contents)); + else if (regnum == 7) + __asm__ ("movq %%db7,%0\n\t":"=r"(contents)); + + return contents; +} + +static void +kdb_wr_dbgreg(int regnum, kdbma_t contents) +{ + if (regnum == 0) + __asm__ ("movq %0,%%db0\n\t"::"r"(contents)); + else if (regnum == 1) + __asm__ ("movq %0,%%db1\n\t"::"r"(contents)); + else if (regnum == 2) + __asm__ ("movq %0,%%db2\n\t"::"r"(contents)); + else if (regnum == 3) + __asm__ ("movq %0,%%db3\n\t"::"r"(contents)); + else if (regnum == 6) + __asm__ ("movq %0,%%db6\n\t"::"r"(contents)); + else if (regnum == 7) + __asm__ ("movq %0,%%db7\n\t"::"r"(contents)); +} + +static void +kdb_print_wp_info(char *strp, int idx) +{ + kdbp("%s[%d]:%016lx len:%d ", strp, idx, kdb_wpa[idx].wp_addr, + kdb_wpa[idx].wp_len); + if (kdb_wpa[idx].wp_rwflag == 1) + kdbp("on data write only\n"); + else if (kdb_wpa[idx].wp_rwflag == 2) + kdbp("on IO read/write\n"); + else + kdbp("on data read/write\n"); +} + +/* + * Returns : 0 if not one of ours + * 1 if one of ours + */ +int +kdb_check_watchpoints(struct cpu_user_regs *regs) +{ + int wpnum; + kdbma_t dr6 = kdb_rd_dbgreg(6); + + KDBGP1("check_wp: IP:%lx EFLAGS:%lx\n", regs->rip, regs->rflags); + if (dr6 & DR6_B0) + wpnum = 0; + else if (dr6 & DR6_B1) + wpnum = 1; + else if (dr6 & DR6_B2) + wpnum = 2; + else if (dr6 & DR6_B3) + wpnum = 3; + else + return 0; + + kdb_print_wp_info("Watchpoint ", wpnum); + return 1; +} + +/* set a watchpoint at a given address + * PreCondition: addr != 0 */ +static void +kdb_set_wp(kdbva_t addr, int rwflag, int len) +{ + int regno; + + for (regno=0; regno < KDB_MAXWP; regno++) { + if (kdb_wpa[regno].wp_addr == addr && !kdb_wpa[regno].wp_deleted) { + kdbp("Watchpoint already set\n"); + return; + } + if (kdb_wpa[regno].wp_deleted) + memset(&kdb_wpa[regno], 0, sizeof(kdb_wpa[regno])); + } + for (regno=0; regno < KDB_MAXWP && kdb_wpa[regno].wp_addr; regno++); + if (regno >= KDB_MAXWP) { + kdbp("watchpoint table full. limit:%d\n", KDB_MAXWP); + return; + } + kdb_wpa[regno].wp_addr = addr; + kdb_wpa[regno].wp_rwflag = rwflag; + kdb_wpa[regno].wp_len = len; + kdb_print_wp_info("Watchpoint set ", regno); +} + +/* write reg DR0-3 with address. Update corresponding bits in DR7 */ +static void +kdb_install_watchpoint(int regno, kdbma_t *dr7p) +{ + kdb_set_gx_in_dr7(regno, dr7p); + kdb_set_len_in_dr7(regno, dr7p, kdb_wpa[regno].wp_len); + kdb_set_dr7_rw(regno, dr7p, kdb_wpa[regno].wp_rwflag); + kdb_wr_dbgreg(regno, kdb_wpa[regno].wp_addr); + + KDBGP1("ccpu:%d installed wp. addr:%lx rw:%x len:%x dr7:%016lx\n", + smp_processor_id(), kdb_wpa[regno].wp_addr, + kdb_wpa[regno].wp_rwflag, kdb_wpa[regno].wp_len, *dr7p); +} + +/* clear G0-G3 bits in DR7 for given DR0-3 */ +static void +kdb_clear_dr7_gx(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p & ~0x2; + else if (regno == 1) + *dr7p = *dr7p & ~0x8; + else if (regno == 2) + *dr7p = *dr7p & ~0x20; + else if (regno == 3) + *dr7p = *dr7p & ~0x80; +} + +/* update dr7 once, as it's slow to update debug regs and cpu's will still be + * paused when leaving kdb. + * + * Just leave DR0-3 clobbered but remove bits from DR7 to disable wp + */ +void +kdb_install_watchpoints(void) +{ + int regno; + kdbma_t dr7 = kdb_rd_dbgreg(7); + + for (regno=0; regno < KDB_MAXWP; regno++) { + /* do not clear wp_deleted here as all cpus must clear wps */ + if (kdb_wpa[regno].wp_deleted) { + kdb_clear_dr7_gx(regno, &dr7); + continue; + } + if (kdb_wpa[regno].wp_addr) + kdb_install_watchpoint(regno, &dr7); + } + /* always clear DR6 when leaving */ + kdb_wr_dbgreg(6, 0); + kdb_wr_dbgreg(7, dr7); + + if (dr7 & DR7_ACTIVE_MASK) + kdb_dr7 = dr7; + else + kdb_dr7 = 0; +#if 0 + for(dp=domain_list; dp; dp=dp->next_in_list) { + struct vcpu *vp; + for_each_vcpu(dp, vp) { + for (regno=0; regno < KDB_MAXWP; regno++) + vp->arch.guest_context.debugreg[regno] = kdb_wpa[regno].wp_addr; + + vp->arch.guest_context.debugreg[6] = 0; + vp->arch.guest_context.debugreg[7] = dr7; + KDBGP("kdb_install_watchpoints(): v:%p dr7:%lx\n", vp, dr7); + /* hvm_set_info_guest(vp);: Can't because can't vmcs_enter in kdb */ + } + } +#endif +} + +/* clear watchpoint/s. wpnum == -1 to clear all watchpoints */ +void +kdb_clear_wps(int wpnum) +{ + int i; + + if (wpnum >= KDB_MAXWP) { + kdbp("Invalid wpnum %d\n", wpnum); + return; + } + if (wpnum >=0) { + if (kdb_wpa[wpnum].wp_addr) { + kdb_wpa[wpnum].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", wpnum); + } else + kdbp("watchpoint %d not set\n", wpnum); + return; + } + for (i=0; i < KDB_MAXWP; i++) { + if (kdb_wpa[i].wp_addr) { + kdb_wpa[i].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", i); + } + } +} + +/* display any watchpoints that are set */ +static void +kdb_display_wps(void) +{ + int i; + for (i=0; i < KDB_MAXWP; i++) + if (kdb_wpa[i].wp_addr && !kdb_wpa[i].wp_deleted) + kdb_print_wp_info("", i); +} + +/* + * Display or Set hardware breakpoints, ie, watchpoints: + * - Upto 4 are allowed + * + * rw_flag should be one of: + * 01 == break on data write only + * 10 == break on IO read/write + * 11 == Break on data reads or writes + * + * len should be one of : 1 2 4 8 + */ +void +kdb_do_watchpoints(kdbva_t addr, int rw_flag, int len) +{ + if (addr == 0) { + kdb_display_wps(); /* display set watchpoints */ + return; + } + kdb_set_wp(addr, rw_flag, len); + return; +} + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/LICENSE --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/LICENSE Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,22 @@ +Copyright (c) 2002, 2003, 2004, 2005, 2006 +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/Makefile Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,5 @@ + +CFLAGS += -D__UD_STANDALONE__ +obj-y := decode.o input.o itab.o kdb_dis.o syn-att.o syn.o \ + syn-intel.o udis86.o + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/README Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,10 @@ + +http://udis86.sourceforge.net/ +udis86-1.6 : + - cd libudis86 + - cp *c to here + - cp *h to here + +Mukesh Rathor +04/30/2008 + diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/decode.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,1197 @@ +/* ----------------------------------------------------------------------------- + * decode.c + * + * Copyright (c) 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#endif + +#include "types.h" +#include "itab.h" +#include "input.h" +#include "decode.h" + +/* The max number of prefixes to an instruction */ +#define MAX_PREFIXES 15 + +static struct ud_itab_entry ie_invalid = { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_pause = { UD_Ipause, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_nop = { UD_Inop, O_NONE, O_NONE, O_NONE, P_none }; + + +/* Looks up mnemonic code in the mnemonic string table + * Returns NULL if the mnemonic code is invalid + */ +const char * ud_lookup_mnemonic( enum ud_mnemonic_code c ) +{ + if ( c < UD_Id3vil ) + return ud_mnemonics_str[ c ]; + return NULL; +} + + +/* Extracts instruction prefixes. + */ +static int get_prefixes( struct ud* u ) +{ + unsigned int have_pfx = 1; + unsigned int i; + uint8_t curr; + + /* if in error state, bail out */ + if ( u->error ) + return -1; + + /* keep going as long as there are prefixes available */ + for ( i = 0; have_pfx ; ++i ) { + + /* Get next byte. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr( u ); + + /* rex prefixes in 64bit mode */ + if ( u->dis_mode == 64 && ( curr & 0xF0 ) == 0x40 ) { + u->pfx_rex = curr; + } else { + switch ( curr ) + { + case 0x2E : + u->pfx_seg = UD_R_CS; + u->pfx_rex = 0; + break; + case 0x36 : + u->pfx_seg = UD_R_SS; + u->pfx_rex = 0; + break; + case 0x3E : + u->pfx_seg = UD_R_DS; + u->pfx_rex = 0; + break; + case 0x26 : + u->pfx_seg = UD_R_ES; + u->pfx_rex = 0; + break; + case 0x64 : + u->pfx_seg = UD_R_FS; + u->pfx_rex = 0; + break; + case 0x65 : + u->pfx_seg = UD_R_GS; + u->pfx_rex = 0; + break; + case 0x67 : /* adress-size override prefix */ + u->pfx_adr = 0x67; + u->pfx_rex = 0; + break; + case 0xF0 : + u->pfx_lock = 0xF0; + u->pfx_rex = 0; + break; + case 0x66: + /* the 0x66 sse prefix is only effective if no other sse prefix + * has already been specified. + */ + if ( !u->pfx_insn ) u->pfx_insn = 0x66; + u->pfx_opr = 0x66; + u->pfx_rex = 0; + break; + case 0xF2: + u->pfx_insn = 0xF2; + u->pfx_repne = 0xF2; + u->pfx_rex = 0; + break; + case 0xF3: + u->pfx_insn = 0xF3; + u->pfx_rep = 0xF3; + u->pfx_repe = 0xF3; + u->pfx_rex = 0; + break; + default : + /* No more prefixes */ + have_pfx = 0; + break; + } + } + + /* check if we reached max instruction length */ + if ( i + 1 == MAX_INSN_LENGTH ) { + u->error = 1; + break; + } + } + + /* return status */ + if ( u->error ) + return -1; + + /* rewind back one byte in stream, since the above loop + * stops with a non-prefix byte. + */ + inp_back(u); + + /* speculatively determine the effective operand mode, + * based on the prefixes and the current disassembly + * mode. This may be inaccurate, but useful for mode + * dependent decoding. + */ + if ( u->dis_mode == 64 ) { + u->opr_mode = REX_W( u->pfx_rex ) ? 64 : ( ( u->pfx_opr ) ? 16 : 32 ) ; + u->adr_mode = ( u->pfx_adr ) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + return 0; +} + + +/* Searches the instruction tables for the right entry. + */ +static int search_itab( struct ud * u ) +{ + struct ud_itab_entry * e = NULL; + enum ud_itab_index table; + uint8_t peek; + uint8_t did_peek = 0; + uint8_t curr; + uint8_t index; + + /* if in state of error, return */ + if ( u->error ) + return -1; + + /* get first byte of opcode. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr(u); + + /* resolve xchg, nop, pause crazyness */ + if ( 0x90 == curr ) { + if ( !( u->dis_mode == 64 && REX_B( u->pfx_rex ) ) ) { + if ( u->pfx_rep ) { + u->pfx_rep = 0; + e = & ie_pause; + } else { + e = & ie_nop; + } + goto found_entry; + } + } + + /* get top-level table */ + if ( 0x0F == curr ) { + table = ITAB__0F; + curr = inp_next(u); + if ( u->error ) + return -1; + + /* 2byte opcodes can be modified by 0x66, F3, and F2 prefixes */ + if ( 0x66 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSE66__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSE66__0F; + u->pfx_opr = 0; + } + } else if ( 0xF2 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF2__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF2__0F; + u->pfx_repne = 0; + } + } else if ( 0xF3 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF3__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF3__0F; + u->pfx_repe = 0; + u->pfx_rep = 0; + } + } + /* pick an instruction from the 1byte table */ + } else { + table = ITAB__1BYTE; + } + + index = curr; + +search: + + e = & ud_itab_list[ table ][ index ]; + + /* if mnemonic constant is a standard instruction constant + * our search is over. + */ + + if ( e->mnemonic < UD_Id3vil ) { + if ( e->mnemonic == UD_Iinvalid ) { + if ( did_peek ) { + inp_next( u ); if ( u->error ) return -1; + } + goto found_entry; + } + goto found_entry; + } + + table = e->prefix; + + switch ( e->mnemonic ) + { + case UD_Igrp_reg: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_REG( peek ); + break; + + case UD_Igrp_mod: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_MOD( peek ); + if ( index == 3 ) + index = ITAB__MOD_INDX__11; + else + index = ITAB__MOD_INDX__NOT_11; + break; + + case UD_Igrp_rm: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = MODRM_RM( curr ); + break; + + case UD_Igrp_x87: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = curr - 0xC0; + break; + + case UD_Igrp_osize: + if ( u->opr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->opr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_asize: + if ( u->adr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->adr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_mode: + if ( u->dis_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->dis_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_vendor: + if ( u->vendor == UD_VENDOR_INTEL ) + index = ITAB__VENDOR_INDX__INTEL; + else if ( u->vendor == UD_VENDOR_AMD ) + index = ITAB__VENDOR_INDX__AMD; + else { + kdbp("KDB:search_itab(): unrecognized vendor id\n"); + return -1; + } + break; + + case UD_Id3vil: + kdbp("KDB:search_itab(): invalid instr mnemonic constant Id3vil\n"); + return -1; + + default: + kdbp("KDB:search_itab(): invalid instruction mnemonic constant\n"); + return -1; + } + + goto search; + +found_entry: + + u->itab_entry = e; + u->mnemonic = u->itab_entry->mnemonic; + + return 0; +} + + +static unsigned int resolve_operand_size( const struct ud * u, unsigned int s ) +{ + switch ( s ) + { + case SZ_V: + return ( u->opr_mode ); + case SZ_Z: + return ( u->opr_mode == 16 ) ? 16 : 32; + case SZ_P: + return ( u->opr_mode == 16 ) ? SZ_WP : SZ_DP; + case SZ_MDQ: + return ( u->opr_mode == 16 ) ? 32 : u->opr_mode; + case SZ_RDQ: + return ( u->dis_mode == 64 ) ? 64 : 32; + default: + return s; + } +} + + +static int resolve_mnemonic( struct ud* u ) +{ + /* far/near flags */ + u->br_far = 0; + u->br_near = 0; + /* readjust operand sizes for call/jmp instrcutions */ + if ( u->mnemonic == UD_Icall || u->mnemonic == UD_Ijmp ) { + /* WP: 16bit pointer */ + if ( u->operand[ 0 ].size == SZ_WP ) { + u->operand[ 0 ].size = 16; + u->br_far = 1; + u->br_near= 0; + /* DP: 32bit pointer */ + } else if ( u->operand[ 0 ].size == SZ_DP ) { + u->operand[ 0 ].size = 32; + u->br_far = 1; + u->br_near= 0; + } else { + u->br_far = 0; + u->br_near= 1; + } + /* resolve 3dnow weirdness. */ + } else if ( u->mnemonic == UD_I3dnow ) { + u->mnemonic = ud_itab_list[ ITAB__3DNOW ][ inp_curr( u ) ].mnemonic; + } + /* SWAPGS is only valid in 64bits mode */ + if ( u->mnemonic == UD_Iswapgs && u->dis_mode != 64 ) { + u->error = 1; + return -1; + } + + return 0; +} + + +/* ----------------------------------------------------------------------------- + * decode_a()- Decodes operands of the type seg:offset + * ----------------------------------------------------------------------------- + */ +static void +decode_a(struct ud* u, struct ud_operand *op) +{ + if (u->opr_mode == 16) { + /* seg16:off16 */ + op->type = UD_OP_PTR; + op->size = 32; + op->lval.ptr.off = inp_uint16(u); + op->lval.ptr.seg = inp_uint16(u); + } else { + /* seg16:off32 */ + op->type = UD_OP_PTR; + op->size = 48; + op->lval.ptr.off = inp_uint32(u); + op->lval.ptr.seg = inp_uint16(u); + } +} + +/* ----------------------------------------------------------------------------- + * decode_gpr() - Returns decoded General Purpose Register + * ----------------------------------------------------------------------------- + */ +static enum ud_type +decode_gpr(register struct ud* u, unsigned int s, unsigned char rm) +{ + s = resolve_operand_size(u, s); + + switch (s) { + case 64: + return UD_R_RAX + rm; + case SZ_DP: + case 32: + return UD_R_EAX + rm; + case SZ_WP: + case 16: + return UD_R_AX + rm; + case 8: + if (u->dis_mode == 64 && u->pfx_rex) { + if (rm >= 4) + return UD_R_SPL + (rm-4); + return UD_R_AL + rm; + } else return UD_R_AL + rm; + default: + return 0; + } +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr64() - 64bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr64(struct ud* u, enum ud_operand_code gpr_op) +{ + if (gpr_op >= OP_rAXr8 && gpr_op <= OP_rDIr15) + gpr_op = (gpr_op - OP_rAXr8) | (REX_B(u->pfx_rex) << 3); + else gpr_op = (gpr_op - OP_rAX); + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + if (u->dis_mode == 32 || + (u->opr_mode == 32 && ! (REX_W(u->pfx_rex) || u->default64))) { + return gpr_op + UD_R_EAX; + } + + return gpr_op + UD_R_RAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr32 () - 32bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr32(struct ud* u, enum ud_operand_code gpr_op) +{ + gpr_op = gpr_op - OP_eAX; + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + + return gpr_op + UD_R_EAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_reg() - Resolves the register type + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_reg(struct ud* u, unsigned int type, unsigned char i) +{ + switch (type) { + case T_MMX : return UD_R_MM0 + (i & 7); + case T_XMM : return UD_R_XMM0 + i; + case T_CRG : return UD_R_CR0 + i; + case T_DBG : return UD_R_DR0 + i; + case T_SEG : return UD_R_ES + (i & 7); + case T_NONE: + default: return UD_NONE; + } +} + +/* ----------------------------------------------------------------------------- + * decode_imm() - Decodes Immediate values. + * ----------------------------------------------------------------------------- + */ +static void +decode_imm(struct ud* u, unsigned int s, struct ud_operand *op) +{ + op->size = resolve_operand_size(u, s); + op->type = UD_OP_IMM; + + switch (op->size) { + case 8: op->lval.sbyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: return; + } +} + +/* ----------------------------------------------------------------------------- + * decode_modrm() - Decodes ModRM Byte + * ----------------------------------------------------------------------------- + */ +static void +decode_modrm(struct ud* u, struct ud_operand *op, unsigned int s, + unsigned char rm_type, struct ud_operand *opreg, + unsigned char reg_size, unsigned char reg_type) +{ + unsigned char mod, rm, reg; + + inp_next(u); + + /* get mod, r/m and reg fields */ + mod = MODRM_MOD(inp_curr(u)); + rm = (REX_B(u->pfx_rex) << 3) | MODRM_RM(inp_curr(u)); + reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(inp_curr(u)); + + op->size = resolve_operand_size(u, s); + + /* if mod is 11b, then the UD_R_m specifies a gpr/mmx/sse/control/debug */ + if (mod == 3) { + op->type = UD_OP_REG; + if (rm_type == T_GPR) + op->base = decode_gpr(u, op->size, rm); + else op->base = resolve_reg(u, rm_type, (REX_B(u->pfx_rex) << 3) | (rm&7)); + } + /* else its memory addressing */ + else { + op->type = UD_OP_MEM; + + /* 64bit addressing */ + if (u->adr_mode == 64) { + + op->base = UD_R_RAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && (rm & 7) == 5) { + op->base = UD_R_RIP; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_RAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_RAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + /* special conditions for base reference */ + if (op->index == UD_R_RSP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + if (op->base == UD_R_RBP || op->base == UD_R_R13) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 32-Bit addressing mode */ + else if (u->adr_mode == 32) { + + /* get base */ + op->base = UD_R_EAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && rm == 5) { + op->base = UD_NONE; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_EAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_EAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + if (op->index == UD_R_ESP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + /* special condition for base reference */ + if (op->base == UD_R_EBP) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 16bit addressing mode */ + else { + switch (rm) { + case 0: op->base = UD_R_BX; op->index = UD_R_SI; break; + case 1: op->base = UD_R_BX; op->index = UD_R_DI; break; + case 2: op->base = UD_R_BP; op->index = UD_R_SI; break; + case 3: op->base = UD_R_BP; op->index = UD_R_DI; break; + case 4: op->base = UD_R_SI; break; + case 5: op->base = UD_R_DI; break; + case 6: op->base = UD_R_BP; break; + case 7: op->base = UD_R_BX; break; + } + + if (mod == 0 && rm == 6) { + op->offset= 16; + op->base = UD_NONE; + } + else if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 16; + } + } + + /* extract offset, if any */ + switch(op->offset) { + case 8 : op->lval.ubyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: break; + } + + /* resolve register encoded in reg field */ + if (opreg) { + opreg->type = UD_OP_REG; + opreg->size = resolve_operand_size(u, reg_size); + if (reg_type == T_GPR) + opreg->base = decode_gpr(u, opreg->size, reg); + else opreg->base = resolve_reg(u, reg_type, reg); + } +} + +/* ----------------------------------------------------------------------------- + * decode_o() - Decodes offset + * ----------------------------------------------------------------------------- + */ +static void +decode_o(struct ud* u, unsigned int s, struct ud_operand *op) +{ + switch (u->adr_mode) { + case 64: + op->offset = 64; + op->lval.uqword = inp_uint64(u); + break; + case 32: + op->offset = 32; + op->lval.udword = inp_uint32(u); + break; + case 16: + op->offset = 16; + op->lval.uword = inp_uint16(u); + break; + default: + return; + } + op->type = UD_OP_MEM; + op->size = resolve_operand_size(u, s); +} + +/* ----------------------------------------------------------------------------- + * disasm_operands() - Disassembles Operands. + * ----------------------------------------------------------------------------- + */ +static int disasm_operands(register struct ud* u) +{ + + + /* mopXt = map entry, operand X, type; */ + enum ud_operand_code mop1t = u->itab_entry->operand1.type; + enum ud_operand_code mop2t = u->itab_entry->operand2.type; + enum ud_operand_code mop3t = u->itab_entry->operand3.type; + + /* mopXs = map entry, operand X, size */ + unsigned int mop1s = u->itab_entry->operand1.size; + unsigned int mop2s = u->itab_entry->operand2.size; + unsigned int mop3s = u->itab_entry->operand3.size; + + /* iop = instruction operand */ + register struct ud_operand* iop = u->operand; + + switch(mop1t) { + + case OP_A : + decode_a(u, &(iop[0])); + break; + + /* M[b] ... */ + case OP_M : + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + /* E, G/P/V/I/CL/1/S */ + case OP_E : + if (mop2t == OP_G) { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + else if (mop3t == OP_CL) { + iop[2].type = UD_OP_REG; + iop[2].base = UD_R_CL; + iop[2].size = 8; + } + } + else if (mop2t == OP_P) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_MMX); + else if (mop2t == OP_V) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_XMM); + else if (mop2t == OP_S) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_SEG); + else { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, NULL, 0, T_NONE); + if (mop2t == OP_CL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_CL; + iop[1].size = 8; + } else if (mop2t == OP_I1) { + iop[1].type = UD_OP_CONST; + u->operand[1].lval.udword = 1; + } else if (mop2t == OP_I) { + decode_imm(u, mop2s, &(iop[1])); + } + } + break; + + /* G, E/PR[,I]/VR */ + case OP_G : + if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_W) + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + break; + + /* AL..BH, I/O/DX */ + case OP_AL : case OP_CL : case OP_DL : case OP_BL : + case OP_AH : case OP_CH : case OP_DH : case OP_BH : + + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AL + (mop1t - OP_AL); + iop[0].size = 8; + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } + else if (mop2t == OP_O) + decode_o(u, mop2s, &(iop[1])); + break; + + /* rAX[r8]..rDI[r15], I/rAX..rDI/O */ + case OP_rAXr8 : case OP_rCXr9 : case OP_rDXr10 : case OP_rBXr11 : + case OP_rSPr12: case OP_rBPr13: case OP_rSIr14 : case OP_rDIr15 : + case OP_rAX : case OP_rCX : case OP_rDX : case OP_rBX : + case OP_rSP : case OP_rBP : case OP_rSI : case OP_rDI : + + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr64(u, mop1t); + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t >= OP_rAX && mop2t <= OP_rDI) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr64(u, mop2t); + } + else if (mop2t == OP_O) { + decode_o(u, mop2s, &(iop[1])); + iop[0].size = resolve_operand_size(u, mop2s); + } + break; + + /* AL[r8b]..BH[r15b], I */ + case OP_ALr8b : case OP_CLr9b : case OP_DLr10b : case OP_BLr11b : + case OP_AHr12b: case OP_CHr13b: case OP_DHr14b : case OP_BHr15b : + { + ud_type_t gpr = (mop1t - OP_ALr8b) + UD_R_AL + + (REX_B(u->pfx_rex) << 3); + if (UD_R_AH <= gpr && u->pfx_rex) + gpr = gpr + 4; + iop[0].type = UD_OP_REG; + iop[0].base = gpr; + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + } + + /* eAX..eDX, DX/I */ + case OP_eAX : case OP_eCX : case OP_eDX : case OP_eBX : + case OP_eSP : case OP_eBP : case OP_eSI : case OP_eDI : + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr32(u, mop1t); + if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } else if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* ES..GS */ + case OP_ES : case OP_CS : case OP_DS : + case OP_SS : case OP_FS : case OP_GS : + + /* in 64bits mode, only fs and gs are allowed */ + if (u->dis_mode == 64) + if (mop1t != OP_FS && mop1t != OP_GS) + u->error= 1; + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t - OP_ES) + UD_R_ES; + iop[0].size = 16; + + break; + + /* J */ + case OP_J : + decode_imm(u, mop1s, &(iop[0])); + iop[0].type = UD_OP_JIMM; + break ; + + /* PR, I */ + case OP_PR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_MMX, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* VR, I */ + case OP_VR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_XMM, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* P, Q[,I]/W/E[,I],VR */ + case OP_P : + if (mop2t == OP_Q) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_W) { + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } + break; + + /* R, C/D */ + case OP_R : + if (mop2t == OP_C) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_CRG); + else if (mop2t == OP_D) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_DBG); + break; + + /* C, R */ + case OP_C : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_CRG); + break; + + /* D, R */ + case OP_D : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_DBG); + break; + + /* Q, P */ + case OP_Q : + decode_modrm(u, &(iop[0]), mop1s, T_MMX, &(iop[1]), mop2s, T_MMX); + break; + + /* S, E */ + case OP_S : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_SEG); + break; + + /* W, V */ + case OP_W : + decode_modrm(u, &(iop[0]), mop1s, T_XMM, &(iop[1]), mop2s, T_XMM); + break; + + /* V, W[,I]/Q/M/E */ + case OP_V : + if (mop2t == OP_W) { + /* special cases for movlps and movhps */ + if (MODRM_MOD(inp_peek(u)) == 3) { + if (u->mnemonic == UD_Imovlps) + u->mnemonic = UD_Imovhlps; + else + if (u->mnemonic == UD_Imovhps) + u->mnemonic = UD_Imovlhps; + } + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_XMM); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_Q) + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + else if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + } + break; + + /* DX, eAX/AL */ + case OP_DX : + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_DX; + iop[0].size = 16; + + if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 8; + } + + break; + + /* I, I/AL/eAX */ + case OP_I : + decode_imm(u, mop1s, &(iop[0])); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 16; + } else if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } + break; + + /* O, AL/eAX */ + case OP_O : + decode_o(u, mop1s, &(iop[0])); + iop[1].type = UD_OP_REG; + iop[1].size = resolve_operand_size(u, mop1s); + if (mop2t == OP_AL) + iop[1].base = UD_R_AL; + else if (mop2t == OP_eAX) + iop[1].base = resolve_gpr32(u, mop2t); + else if (mop2t == OP_rAX) + iop[1].base = resolve_gpr64(u, mop2t); + break; + + /* 3 */ + case OP_I3 : + iop[0].type = UD_OP_CONST; + iop[0].lval.sbyte = 3; + break; + + /* ST(n), ST(n) */ + case OP_ST0 : case OP_ST1 : case OP_ST2 : case OP_ST3 : + case OP_ST4 : case OP_ST5 : case OP_ST6 : case OP_ST7 : + + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t-OP_ST0) + UD_R_ST0; + iop[0].size = 0; + + if (mop2t >= OP_ST0 && mop2t <= OP_ST7) { + iop[1].type = UD_OP_REG; + iop[1].base = (mop2t-OP_ST0) + UD_R_ST0; + iop[1].size = 0; + } + break; + + /* AX */ + case OP_AX: + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AX; + iop[0].size = 16; + break; + + /* none */ + default : + iop[0].type = iop[1].type = iop[2].type = UD_NONE; + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * clear_insn() - clear instruction pointer + * ----------------------------------------------------------------------------- + */ +static int clear_insn(register struct ud* u) +{ + u->error = 0; + u->pfx_seg = 0; + u->pfx_opr = 0; + u->pfx_adr = 0; + u->pfx_lock = 0; + u->pfx_repne = 0; + u->pfx_rep = 0; + u->pfx_repe = 0; + u->pfx_seg = 0; + u->pfx_rex = 0; + u->pfx_insn = 0; + u->mnemonic = UD_Inone; + u->itab_entry = NULL; + + memset( &u->operand[ 0 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 1 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 2 ], 0, sizeof( struct ud_operand ) ); + + return 0; +} + +static int do_mode( struct ud* u ) +{ + /* if in error state, bail out */ + if ( u->error ) return -1; + + /* propagate perfix effects */ + if ( u->dis_mode == 64 ) { /* set 64bit-mode flags */ + + /* Check validity of instruction m64 */ + if ( P_INV64( u->itab_entry->prefix ) ) { + u->error = 1; + return -1; + } + + /* effective rex prefix is the effective mask for the + * instruction hard-coded in the opcode map. + */ + u->pfx_rex = ( u->pfx_rex & 0x40 ) | + ( u->pfx_rex & REX_PFX_MASK( u->itab_entry->prefix ) ); + + /* whether this instruction has a default operand size of + * 64bit, also hardcoded into the opcode map. + */ + u->default64 = P_DEF64( u->itab_entry->prefix ); + /* calculate effective operand size */ + if ( REX_W( u->pfx_rex ) ) { + u->opr_mode = 64; + } else if ( u->pfx_opr ) { + u->opr_mode = 16; + } else { + /* unless the default opr size of instruction is 64, + * the effective operand size in the absence of rex.w + * prefix is 32. + */ + u->opr_mode = ( u->default64 ) ? 64 : 32; + } + + /* calculate effective address size */ + u->adr_mode = (u->pfx_adr) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { /* set 32bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { /* set 16bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + /* These flags determine which operand to apply the operand size + * cast to. + */ + u->c1 = ( P_C1( u->itab_entry->prefix ) ) ? 1 : 0; + u->c2 = ( P_C2( u->itab_entry->prefix ) ) ? 1 : 0; + u->c3 = ( P_C3( u->itab_entry->prefix ) ) ? 1 : 0; + + /* set flags for implicit addressing */ + u->implicit_addr = P_IMPADDR( u->itab_entry->prefix ); + + return 0; +} + +static int gen_hex( struct ud *u ) +{ + unsigned int i; + unsigned char *src_ptr = inp_sess( u ); + char* src_hex; + + /* bail out if in error stat. */ + if ( u->error ) return -1; + /* output buffer pointe */ + src_hex = ( char* ) u->insn_hexcode; + /* for each byte used to decode instruction */ + for ( i = 0; i < u->inp_ctr; ++i, ++src_ptr) { + snprintf( src_hex, 2, "%02x", *src_ptr & 0xFF ); + src_hex += 2; + } + return 0; +} + +/* ============================================================================= + * ud_decode() - Instruction decoder. Returns the number of bytes decoded. + * ============================================================================= + */ +unsigned int ud_decode( struct ud* u ) +{ + inp_start(u); + + if ( clear_insn( u ) ) { + ; /* error */ + } else if ( get_prefixes( u ) != 0 ) { + ; /* error */ + } else if ( search_itab( u ) != 0 ) { + ; /* error */ + } else if ( do_mode( u ) != 0 ) { + ; /* error */ + } else if ( disasm_operands( u ) != 0 ) { + ; /* error */ + } else if ( resolve_mnemonic( u ) != 0 ) { + ; /* error */ + } + + /* Handle decode error. */ + if ( u->error ) { + /* clear out the decode data. */ + clear_insn( u ); + /* mark the sequence of bytes as invalid. */ + u->itab_entry = & ie_invalid; + u->mnemonic = u->itab_entry->mnemonic; + } + + u->insn_offset = u->pc; /* set offset of instruction */ + u->insn_fill = 0; /* set translation buffer index to 0 */ + u->pc += u->inp_ctr; /* move program counter by bytes decoded */ + gen_hex( u ); /* generate hex code */ + + /* return number of bytes disassembled. */ + return u->inp_ctr; +} + +/* vim:cindent + * vim:ts=4 + * vim:sw=4 + * vim:expandtab + */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/decode.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,273 @@ +#ifndef UD_DECODE_H +#define UD_DECODE_H + +#define MAX_INSN_LENGTH 15 + +/* register classes */ +#define T_NONE 0 +#define T_GPR 1 +#define T_MMX 2 +#define T_CRG 3 +#define T_DBG 4 +#define T_SEG 5 +#define T_XMM 6 + +/* itab prefix bits */ +#define P_none ( 0 ) +#define P_c1 ( 1 << 0 ) +#define P_C1(n) ( ( n >> 0 ) & 1 ) +#define P_rexb ( 1 << 1 ) +#define P_REXB(n) ( ( n >> 1 ) & 1 ) +#define P_depM ( 1 << 2 ) +#define P_DEPM(n) ( ( n >> 2 ) & 1 ) +#define P_c3 ( 1 << 3 ) +#define P_C3(n) ( ( n >> 3 ) & 1 ) +#define P_inv64 ( 1 << 4 ) +#define P_INV64(n) ( ( n >> 4 ) & 1 ) +#define P_rexw ( 1 << 5 ) +#define P_REXW(n) ( ( n >> 5 ) & 1 ) +#define P_c2 ( 1 << 6 ) +#define P_C2(n) ( ( n >> 6 ) & 1 ) +#define P_def64 ( 1 << 7 ) +#define P_DEF64(n) ( ( n >> 7 ) & 1 ) +#define P_rexr ( 1 << 8 ) +#define P_REXR(n) ( ( n >> 8 ) & 1 ) +#define P_oso ( 1 << 9 ) +#define P_OSO(n) ( ( n >> 9 ) & 1 ) +#define P_aso ( 1 << 10 ) +#define P_ASO(n) ( ( n >> 10 ) & 1 ) +#define P_rexx ( 1 << 11 ) +#define P_REXX(n) ( ( n >> 11 ) & 1 ) +#define P_ImpAddr ( 1 << 12 ) +#define P_IMPADDR(n) ( ( n >> 12 ) & 1 ) + +/* rex prefix bits */ +#define REX_W(r) ( ( 0xF & ( r ) ) >> 3 ) +#define REX_R(r) ( ( 0x7 & ( r ) ) >> 2 ) +#define REX_X(r) ( ( 0x3 & ( r ) ) >> 1 ) +#define REX_B(r) ( ( 0x1 & ( r ) ) >> 0 ) +#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \ + ( P_REXR(n) << 2 ) | \ + ( P_REXX(n) << 1 ) | \ + ( P_REXB(n) << 0 ) ) + +/* scable-index-base bits */ +#define SIB_S(b) ( ( b ) >> 6 ) +#define SIB_I(b) ( ( ( b ) >> 3 ) & 7 ) +#define SIB_B(b) ( ( b ) & 7 ) + +/* modrm bits */ +#define MODRM_REG(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_NNN(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_MOD(b) ( ( ( b ) >> 6 ) & 3 ) +#define MODRM_RM(b) ( ( b ) & 7 ) + +/* operand type constants -- order is important! */ + +enum ud_operand_code { + OP_NONE, + + OP_A, OP_E, OP_M, OP_G, + OP_I, + + OP_AL, OP_CL, OP_DL, OP_BL, + OP_AH, OP_CH, OP_DH, OP_BH, + + OP_ALr8b, OP_CLr9b, OP_DLr10b, OP_BLr11b, + OP_AHr12b, OP_CHr13b, OP_DHr14b, OP_BHr15b, + + OP_AX, OP_CX, OP_DX, OP_BX, + OP_SI, OP_DI, OP_SP, OP_BP, + + OP_rAX, OP_rCX, OP_rDX, OP_rBX, + OP_rSP, OP_rBP, OP_rSI, OP_rDI, + + OP_rAXr8, OP_rCXr9, OP_rDXr10, OP_rBXr11, + OP_rSPr12, OP_rBPr13, OP_rSIr14, OP_rDIr15, + + OP_eAX, OP_eCX, OP_eDX, OP_eBX, + OP_eSP, OP_eBP, OP_eSI, OP_eDI, + + OP_ES, OP_CS, OP_SS, OP_DS, + OP_FS, OP_GS, + + OP_ST0, OP_ST1, OP_ST2, OP_ST3, + OP_ST4, OP_ST5, OP_ST6, OP_ST7, + + OP_J, OP_S, OP_O, + OP_I1, OP_I3, + + OP_V, OP_W, OP_Q, OP_P, + + OP_R, OP_C, OP_D, OP_VR, OP_PR +}; + + +/* operand size constants */ + +enum ud_operand_size { + SZ_NA = 0, + SZ_Z = 1, + SZ_V = 2, + SZ_P = 3, + SZ_WP = 4, + SZ_DP = 5, + SZ_MDQ = 6, + SZ_RDQ = 7, + + /* the following values are used as is, + * and thus hard-coded. changing them + * will break internals + */ + SZ_B = 8, + SZ_W = 16, + SZ_D = 32, + SZ_Q = 64, + SZ_T = 80, +}; + +/* itab entry operand definitions */ + +#define O_rSPr12 { OP_rSPr12, SZ_NA } +#define O_BL { OP_BL, SZ_NA } +#define O_BH { OP_BH, SZ_NA } +#define O_BP { OP_BP, SZ_NA } +#define O_AHr12b { OP_AHr12b, SZ_NA } +#define O_BX { OP_BX, SZ_NA } +#define O_Jz { OP_J, SZ_Z } +#define O_Jv { OP_J, SZ_V } +#define O_Jb { OP_J, SZ_B } +#define O_rSIr14 { OP_rSIr14, SZ_NA } +#define O_GS { OP_GS, SZ_NA } +#define O_D { OP_D, SZ_NA } +#define O_rBPr13 { OP_rBPr13, SZ_NA } +#define O_Ob { OP_O, SZ_B } +#define O_P { OP_P, SZ_NA } +#define O_Ow { OP_O, SZ_W } +#define O_Ov { OP_O, SZ_V } +#define O_Gw { OP_G, SZ_W } +#define O_Gv { OP_G, SZ_V } +#define O_rDX { OP_rDX, SZ_NA } +#define O_Gx { OP_G, SZ_MDQ } +#define O_Gd { OP_G, SZ_D } +#define O_Gb { OP_G, SZ_B } +#define O_rBXr11 { OP_rBXr11, SZ_NA } +#define O_rDI { OP_rDI, SZ_NA } +#define O_rSI { OP_rSI, SZ_NA } +#define O_ALr8b { OP_ALr8b, SZ_NA } +#define O_eDI { OP_eDI, SZ_NA } +#define O_Gz { OP_G, SZ_Z } +#define O_eDX { OP_eDX, SZ_NA } +#define O_DHr14b { OP_DHr14b, SZ_NA } +#define O_rSP { OP_rSP, SZ_NA } +#define O_PR { OP_PR, SZ_NA } +#define O_NONE { OP_NONE, SZ_NA } +#define O_rCX { OP_rCX, SZ_NA } +#define O_jWP { OP_J, SZ_WP } +#define O_rDXr10 { OP_rDXr10, SZ_NA } +#define O_Md { OP_M, SZ_D } +#define O_C { OP_C, SZ_NA } +#define O_G { OP_G, SZ_NA } +#define O_Mb { OP_M, SZ_B } +#define O_Mt { OP_M, SZ_T } +#define O_S { OP_S, SZ_NA } +#define O_Mq { OP_M, SZ_Q } +#define O_W { OP_W, SZ_NA } +#define O_ES { OP_ES, SZ_NA } +#define O_rBX { OP_rBX, SZ_NA } +#define O_Ed { OP_E, SZ_D } +#define O_DLr10b { OP_DLr10b, SZ_NA } +#define O_Mw { OP_M, SZ_W } +#define O_Eb { OP_E, SZ_B } +#define O_Ex { OP_E, SZ_MDQ } +#define O_Ez { OP_E, SZ_Z } +#define O_Ew { OP_E, SZ_W } +#define O_Ev { OP_E, SZ_V } +#define O_Ep { OP_E, SZ_P } +#define O_FS { OP_FS, SZ_NA } +#define O_Ms { OP_M, SZ_W } +#define O_rAXr8 { OP_rAXr8, SZ_NA } +#define O_eBP { OP_eBP, SZ_NA } +#define O_Isb { OP_I, SZ_SB } +#define O_eBX { OP_eBX, SZ_NA } +#define O_rCXr9 { OP_rCXr9, SZ_NA } +#define O_jDP { OP_J, SZ_DP } +#define O_CH { OP_CH, SZ_NA } +#define O_CL { OP_CL, SZ_NA } +#define O_R { OP_R, SZ_RDQ } +#define O_V { OP_V, SZ_NA } +#define O_CS { OP_CS, SZ_NA } +#define O_CHr13b { OP_CHr13b, SZ_NA } +#define O_eCX { OP_eCX, SZ_NA } +#define O_eSP { OP_eSP, SZ_NA } +#define O_SS { OP_SS, SZ_NA } +#define O_SP { OP_SP, SZ_NA } +#define O_BLr11b { OP_BLr11b, SZ_NA } +#define O_SI { OP_SI, SZ_NA } +#define O_eSI { OP_eSI, SZ_NA } +#define O_DL { OP_DL, SZ_NA } +#define O_DH { OP_DH, SZ_NA } +#define O_DI { OP_DI, SZ_NA } +#define O_DX { OP_DX, SZ_NA } +#define O_rBP { OP_rBP, SZ_NA } +#define O_Gvw { OP_G, SZ_MDQ } +#define O_I1 { OP_I1, SZ_NA } +#define O_I3 { OP_I3, SZ_NA } +#define O_DS { OP_DS, SZ_NA } +#define O_ST4 { OP_ST4, SZ_NA } +#define O_ST5 { OP_ST5, SZ_NA } +#define O_ST6 { OP_ST6, SZ_NA } +#define O_ST7 { OP_ST7, SZ_NA } +#define O_ST0 { OP_ST0, SZ_NA } +#define O_ST1 { OP_ST1, SZ_NA } +#define O_ST2 { OP_ST2, SZ_NA } +#define O_ST3 { OP_ST3, SZ_NA } +#define O_E { OP_E, SZ_NA } +#define O_AH { OP_AH, SZ_NA } +#define O_M { OP_M, SZ_NA } +#define O_AL { OP_AL, SZ_NA } +#define O_CLr9b { OP_CLr9b, SZ_NA } +#define O_Q { OP_Q, SZ_NA } +#define O_eAX { OP_eAX, SZ_NA } +#define O_VR { OP_VR, SZ_NA } +#define O_AX { OP_AX, SZ_NA } +#define O_rAX { OP_rAX, SZ_NA } +#define O_Iz { OP_I, SZ_Z } +#define O_rDIr15 { OP_rDIr15, SZ_NA } +#define O_Iw { OP_I, SZ_W } +#define O_Iv { OP_I, SZ_V } +#define O_Ap { OP_A, SZ_P } +#define O_CX { OP_CX, SZ_NA } +#define O_Ib { OP_I, SZ_B } +#define O_BHr15b { OP_BHr15b, SZ_NA } + + +/* A single operand of an entry in the instruction table. + * (internal use only) + */ +struct ud_itab_entry_operand +{ + enum ud_operand_code type; + enum ud_operand_size size; +}; + + +/* A single entry in an instruction table. + *(internal use only) + */ +struct ud_itab_entry +{ + enum ud_mnemonic_code mnemonic; + struct ud_itab_entry_operand operand1; + struct ud_itab_entry_operand operand2; + struct ud_itab_entry_operand operand3; + uint32_t prefix; +}; + +#endif /* UD_DECODE_H */ + +/* vim:cindent + * vim:expandtab + * vim:ts=4 + * vim:sw=4 + */ diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/extern.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,67 @@ +/* ----------------------------------------------------------------------------- + * extern.h + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_EXTERN_H +#define UD_EXTERN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* #include */ +#include "types.h" + +/* ============================= PUBLIC API ================================= */ + +extern void ud_init(struct ud*); + +extern void ud_set_mode(struct ud*, uint8_t); + +extern void ud_set_pc(struct ud*, uint64_t); + +extern void ud_set_input_hook(struct ud*, int (*)(struct ud*)); + +extern void ud_set_input_buffer(struct ud*, uint8_t*, size_t); + +#ifndef __UD_STANDALONE__ +extern void ud_set_input_file(struct ud*, FILE*); +#endif /* __UD_STANDALONE__ */ + +extern void ud_set_vendor(struct ud*, unsigned); + +extern void ud_set_syntax(struct ud*, void (*)(struct ud*)); + +extern void ud_input_skip(struct ud*, size_t); + +extern int ud_input_end(struct ud*); + +extern unsigned int ud_decode(struct ud*); + +extern unsigned int ud_disassemble(struct ud*); + +extern void ud_translate_intel(struct ud*); + +extern void ud_translate_att(struct ud*); + +extern char* ud_insn_asm(struct ud* u); + +extern uint8_t* ud_insn_ptr(struct ud* u); + +extern uint64_t ud_insn_off(struct ud*); + +extern char* ud_insn_hex(struct ud*); + +extern unsigned int ud_insn_len(struct ud* u); + +extern const char* ud_lookup_mnemonic(enum ud_mnemonic_code c); + +/* ========================================================================== */ + +#ifdef __cplusplus +} +#endif +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/input.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,226 @@ +/* ----------------------------------------------------------------------------- + * input.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#include "extern.h" +#include "types.h" +#include "input.h" + +/* ----------------------------------------------------------------------------- + * inp_buff_hook() - Hook for buffered inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_buff_hook(struct ud* u) +{ + if (u->inp_buff < u->inp_buff_end) + return *u->inp_buff++; + else return -1; +} + +#ifndef __UD_STANDALONE__ +/* ----------------------------------------------------------------------------- + * inp_file_hook() - Hook for FILE inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_file_hook(struct ud* u) +{ + return fgetc(u->inp_file); +} +#endif /* __UD_STANDALONE__*/ + +/* ============================================================================= + * ud_inp_set_hook() - Sets input hook. + * ============================================================================= + */ +extern void +ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*)) +{ + u->inp_hook = hook; + inp_init(u); +} + +/* ============================================================================= + * ud_inp_set_buffer() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_buffer(register struct ud* u, uint8_t* buf, size_t len) +{ + u->inp_hook = inp_buff_hook; + u->inp_buff = buf; + u->inp_buff_end = buf + len; + inp_init(u); +} + +#ifndef __UD_STANDALONE__ +/* ============================================================================= + * ud_input_set_file() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_file(register struct ud* u, FILE* f) +{ + u->inp_hook = inp_file_hook; + u->inp_file = f; + inp_init(u); +} +#endif /* __UD_STANDALONE__ */ + +/* ============================================================================= + * ud_input_skip() - Skip n input bytes. + * ============================================================================= + */ +extern void +ud_input_skip(struct ud* u, size_t n) +{ + while (n--) { + u->inp_hook(u); + } +} + +/* ============================================================================= + * ud_input_end() - Test for end of input. + * ============================================================================= + */ +extern int +ud_input_end(struct ud* u) +{ + return (u->inp_curr == u->inp_fill) && u->inp_end; +} + +/* ----------------------------------------------------------------------------- + * inp_next() - Loads and returns the next byte from input. + * + * inp_curr and inp_fill are pointers to the cache. The program is written based + * on the property that they are 8-bits in size, and will eventually wrap around + * forming a circular buffer. So, the size of the cache is 256 in size, kind of + * unnecessary yet optimized. + * + * A buffer inp_sess stores the bytes disassembled for a single session. + * ----------------------------------------------------------------------------- + */ +extern uint8_t inp_next(struct ud* u) +{ + int c = -1; + /* if current pointer is not upto the fill point in the + * input cache. + */ + if ( u->inp_curr != u->inp_fill ) { + c = u->inp_cache[ ++u->inp_curr ]; + /* if !end-of-input, call the input hook and get a byte */ + } else if ( u->inp_end || ( c = u->inp_hook( u ) ) == -1 ) { + /* end-of-input, mark it as an error, since the decoder, + * expected a byte more. + */ + u->error = 1; + /* flag end of input */ + u->inp_end = 1; + return 0; + } else { + /* increment pointers, we have a new byte. */ + u->inp_curr = ++u->inp_fill; + /* add the byte to the cache */ + u->inp_cache[ u->inp_fill ] = c; + } + /* record bytes input per decode-session. */ + u->inp_sess[ u->inp_ctr++ ] = c; + /* return byte */ + return ( uint8_t ) c; +} + +/* ----------------------------------------------------------------------------- + * inp_back() - Move back a single byte in the stream. + * ----------------------------------------------------------------------------- + */ +extern void +inp_back(struct ud* u) +{ + if ( u->inp_ctr > 0 ) { + --u->inp_curr; + --u->inp_ctr; + } +} + +/* ----------------------------------------------------------------------------- + * inp_peek() - Peek into the next byte in source. + * ----------------------------------------------------------------------------- + */ +extern uint8_t +inp_peek(struct ud* u) +{ + uint8_t r = inp_next(u); + if ( !u->error ) inp_back(u); /* Don't backup if there was an error */ + return r; +} + +/* ----------------------------------------------------------------------------- + * inp_move() - Move ahead n input bytes. + * ----------------------------------------------------------------------------- + */ +extern void +inp_move(struct ud* u, size_t n) +{ + while (n--) + inp_next(u); +} + +/*------------------------------------------------------------------------------ + * inp_uintN() - return uintN from source. + *------------------------------------------------------------------------------ + */ +extern uint8_t +inp_uint8(struct ud* u) +{ + return inp_next(u); +} + +extern uint16_t +inp_uint16(struct ud* u) +{ + uint16_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + return ret | (r << 8); +} + +extern uint32_t +inp_uint32(struct ud* u) +{ + uint32_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + return ret | (r << 24); +} + +extern uint64_t +inp_uint64(struct ud* u) +{ + uint64_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + ret = ret | (r << 24); + r = inp_next(u); + ret = ret | (r << 32); + r = inp_next(u); + ret = ret | (r << 40); + r = inp_next(u); + ret = ret | (r << 48); + r = inp_next(u); + return ret | (r << 56); +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/input.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,49 @@ +/* ----------------------------------------------------------------------------- + * input.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_INPUT_H +#define UD_INPUT_H + +#include "types.h" + +uint8_t inp_next(struct ud*); +uint8_t inp_peek(struct ud*); +uint8_t inp_uint8(struct ud*); +uint16_t inp_uint16(struct ud*); +uint32_t inp_uint32(struct ud*); +uint64_t inp_uint64(struct ud*); +void inp_move(struct ud*, size_t); +void inp_back(struct ud*); + +/* inp_init() - Initializes the input system. */ +#define inp_init(u) \ +do { \ + u->inp_curr = 0; \ + u->inp_fill = 0; \ + u->inp_ctr = 0; \ + u->inp_end = 0; \ +} while (0) + +/* inp_start() - Should be called before each de-code operation. */ +#define inp_start(u) u->inp_ctr = 0 + +/* inp_back() - Resets the current pointer to its position before the current + * instruction disassembly was started. + */ +#define inp_reset(u) \ +do { \ + u->inp_curr -= u->inp_ctr; \ + u->inp_ctr = 0; \ +} while (0) + +/* inp_sess() - Returns the pointer to current session. */ +#define inp_sess(u) (u->inp_sess) + +/* inp_cur() - Returns the current input byte. */ +#define inp_curr(u) ((u)->inp_cache[(u)->inp_curr]) + +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/itab.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,3668 @@ + +/* itab.c -- auto generated by opgen.py, do not edit. */ + +#include "types.h" +#include "decode.h" +#include "itab.h" + +const char * ud_mnemonics_str[] = { + "3dnow", + "aaa", + "aad", + "aam", + "aas", + "adc", + "add", + "addpd", + "addps", + "addsd", + "addss", + "addsubpd", + "addsubps", + "and", + "andpd", + "andps", + "andnpd", + "andnps", + "arpl", + "movsxd", + "bound", + "bsf", + "bsr", + "bswap", + "bt", + "btc", + "btr", + "bts", + "call", + "cbw", + "cwde", + "cdqe", + "clc", + "cld", + "clflush", + "clgi", + "cli", + "clts", + "cmc", + "cmovo", + "cmovno", + "cmovb", + "cmovae", + "cmovz", + "cmovnz", + "cmovbe", + "cmova", + "cmovs", + "cmovns", + "cmovp", + "cmovnp", + "cmovl", + "cmovge", + "cmovle", + "cmovg", + "cmp", + "cmppd", + "cmpps", + "cmpsb", + "cmpsw", + "cmpsd", + "cmpsq", + "cmpss", + "cmpxchg", + "cmpxchg8b", + "comisd", + "comiss", + "cpuid", + "cvtdq2pd", + "cvtdq2ps", + "cvtpd2dq", + "cvtpd2pi", + "cvtpd2ps", + "cvtpi2ps", + "cvtpi2pd", + "cvtps2dq", + "cvtps2pi", + "cvtps2pd", + "cvtsd2si", + "cvtsd2ss", + "cvtsi2ss", + "cvtss2si", + "cvtss2sd", + "cvttpd2pi", + "cvttpd2dq", + "cvttps2dq", + "cvttps2pi", + "cvttsd2si", + "cvtsi2sd", + "cvttss2si", + "cwd", + "cdq", + "cqo", + "daa", + "das", + "dec", + "div", + "divpd", + "divps", + "divsd", + "divss", + "emms", + "enter", + "f2xm1", + "fabs", + "fadd", + "faddp", + "fbld", + "fbstp", + "fchs", + "fclex", + "fcmovb", + "fcmove", + "fcmovbe", + "fcmovu", + "fcmovnb", + "fcmovne", + "fcmovnbe", + "fcmovnu", + "fucomi", + "fcom", + "fcom2", + "fcomp3", + "fcomi", + "fucomip", + "fcomip", + "fcomp", + "fcomp5", + "fcompp", + "fcos", + "fdecstp", + "fdiv", + "fdivp", + "fdivr", + "fdivrp", + "femms", + "ffree", + "ffreep", + "ficom", + "ficomp", + "fild", + "fncstp", + "fninit", + "fiadd", + "fidivr", + "fidiv", + "fisub", + "fisubr", + "fist", + "fistp", + "fisttp", + "fld", + "fld1", + "fldl2t", + "fldl2e", + "fldlpi", + "fldlg2", + "fldln2", + "fldz", + "fldcw", + "fldenv", + "fmul", + "fmulp", + "fimul", + "fnop", + "fpatan", + "fprem", + "fprem1", + "fptan", + "frndint", + "frstor", + "fnsave", + "fscale", + "fsin", + "fsincos", + "fsqrt", + "fstp", + "fstp1", + "fstp8", + "fstp9", + "fst", + "fnstcw", + "fnstenv", + "fnstsw", + "fsub", + "fsubp", + "fsubr", + "fsubrp", + "ftst", + "fucom", + "fucomp", + "fucompp", + "fxam", + "fxch", + "fxch4", + "fxch7", + "fxrstor", + "fxsave", + "fpxtract", + "fyl2x", + "fyl2xp1", + "haddpd", + "haddps", + "hlt", + "hsubpd", + "hsubps", + "idiv", + "in", + "imul", + "inc", + "insb", + "insw", + "insd", + "int1", + "int3", + "int", + "into", + "invd", + "invlpg", + "invlpga", + "iretw", + "iretd", + "iretq", + "jo", + "jno", + "jb", + "jae", + "jz", + "jnz", + "jbe", + "ja", + "js", + "jns", + "jp", + "jnp", + "jl", + "jge", + "jle", + "jg", + "jcxz", + "jecxz", + "jrcxz", + "jmp", + "lahf", + "lar", + "lddqu", + "ldmxcsr", + "lds", + "lea", + "les", + "lfs", + "lgs", + "lidt", + "lss", + "leave", + "lfence", + "lgdt", + "lldt", + "lmsw", + "lock", + "lodsb", + "lodsw", + "lodsd", + "lodsq", + "loopnz", + "loope", + "loop", + "lsl", + "ltr", + "maskmovq", + "maxpd", + "maxps", + "maxsd", + "maxss", + "mfence", + "minpd", + "minps", + "minsd", + "minss", + "monitor", + "mov", + "movapd", + "movaps", + "movd", + "movddup", + "movdqa", + "movdqu", + "movdq2q", + "movhpd", + "movhps", + "movlhps", + "movlpd", + "movlps", + "movhlps", + "movmskpd", + "movmskps", + "movntdq", + "movnti", + "movntpd", + "movntps", + "movntq", + "movq", + "movqa", + "movq2dq", + "movsb", + "movsw", + "movsd", + "movsq", + "movsldup", + "movshdup", + "movss", + "movsx", + "movupd", + "movups", + "movzx", + "mul", + "mulpd", + "mulps", + "mulsd", + "mulss", + "mwait", + "neg", + "nop", + "not", + "or", + "orpd", + "orps", + "out", + "outsb", + "outsw", + "outsd", + "outsq", + "packsswb", + "packssdw", + "packuswb", + "paddb", + "paddw", + "paddq", + "paddsb", + "paddsw", + "paddusb", + "paddusw", + "pand", + "pandn", + "pause", + "pavgb", + "pavgw", + "pcmpeqb", + "pcmpeqw", + "pcmpeqd", + "pcmpgtb", + "pcmpgtw", + "pcmpgtd", + "pextrw", + "pinsrw", + "pmaddwd", + "pmaxsw", + "pmaxub", + "pminsw", + "pminub", + "pmovmskb", + "pmulhuw", + "pmulhw", + "pmullw", + "pmuludq", + "pop", + "popa", + "popad", + "popfw", + "popfd", + "popfq", + "por", + "prefetch", + "prefetchnta", + "prefetcht0", + "prefetcht1", + "prefetcht2", + "psadbw", + "pshufd", + "pshufhw", + "pshuflw", + "pshufw", + "pslldq", + "psllw", + "pslld", + "psllq", + "psraw", + "psrad", + "psrlw", + "psrld", + "psrlq", + "psrldq", + "psubb", + "psubw", + "psubd", + "psubq", + "psubsb", + "psubsw", + "psubusb", + "psubusw", + "punpckhbw", + "punpckhwd", + "punpckhdq", + "punpckhqdq", + "punpcklbw", + "punpcklwd", + "punpckldq", + "punpcklqdq", + "pi2fw", + "pi2fd", + "pf2iw", + "pf2id", + "pfnacc", + "pfpnacc", + "pfcmpge", + "pfmin", + "pfrcp", + "pfrsqrt", + "pfsub", + "pfadd", + "pfcmpgt", + "pfmax", + "pfrcpit1", + "pfrspit1", + "pfsubr", + "pfacc", + "pfcmpeq", + "pfmul", + "pfrcpit2", + "pmulhrw", + "pswapd", + "pavgusb", + "push", + "pusha", + "pushad", + "pushfw", + "pushfd", + "pushfq", + "pxor", + "rcl", + "rcr", + "rol", + "ror", + "rcpps", + "rcpss", + "rdmsr", + "rdpmc", + "rdtsc", + "rdtscp", + "repne", + "rep", + "ret", + "retf", + "rsm", + "rsqrtps", + "rsqrtss", + "sahf", + "sal", + "salc", + "sar", + "shl", + "shr", + "sbb", + "scasb", + "scasw", + "scasd", + "scasq", + "seto", + "setno", + "setb", + "setnb", + "setz", + "setnz", + "setbe", + "seta", + "sets", + "setns", + "setp", + "setnp", + "setl", + "setge", + "setle", + "setg", + "sfence", + "sgdt", + "shld", + "shrd", + "shufpd", + "shufps", + "sidt", + "sldt", + "smsw", + "sqrtps", + "sqrtpd", + "sqrtsd", + "sqrtss", + "stc", + "std", + "stgi", + "sti", + "skinit", + "stmxcsr", + "stosb", + "stosw", + "stosd", + "stosq", + "str", + "sub", + "subpd", + "subps", + "subsd", + "subss", + "swapgs", + "syscall", + "sysenter", + "sysexit", + "sysret", + "test", + "ucomisd", + "ucomiss", + "ud2", + "unpckhpd", + "unpckhps", + "unpcklps", + "unpcklpd", + "verr", + "verw", + "vmcall", + "vmclear", + "vmxon", + "vmptrld", + "vmptrst", + "vmresume", + "vmxoff", + "vmrun", + "vmmcall", + "vmload", + "vmsave", + "wait", + "wbinvd", + "wrmsr", + "xadd", + "xchg", + "xlatb", + "xor", + "xorpd", + "xorps", + "db", + "invalid", +}; + + + +static struct ud_itab_entry itab__0f[256] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_00__REG }, + /* 01 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG }, + /* 02 */ { UD_Ilar, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ilsl, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isyscall, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iclts, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isysret, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iwbinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iud2, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_0D__REG }, + /* 0E */ { UD_Ifemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovups, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovups, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_18__REG }, + /* 19 */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1D */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1E */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1F */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 20 */ { UD_Imov, O_R, O_C, O_NONE, P_rexr }, + /* 21 */ { UD_Imov, O_R, O_D, O_NONE, P_rexr }, + /* 22 */ { UD_Imov, O_C, O_R, O_NONE, P_rexr }, + /* 23 */ { UD_Imov, O_D, O_R, O_NONE, P_rexr }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovaps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovaps, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2ps, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iwrmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Irdtsc, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Irdmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Irdpmc, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Isysenter, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 35 */ { UD_Isysexit, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Icmovo, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 41 */ { UD_Icmovno, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 42 */ { UD_Icmovb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 43 */ { UD_Icmovae, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 44 */ { UD_Icmovz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 45 */ { UD_Icmovnz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 46 */ { UD_Icmovbe, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 47 */ { UD_Icmova, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 48 */ { UD_Icmovs, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 49 */ { UD_Icmovns, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4A */ { UD_Icmovp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4B */ { UD_Icmovnp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4C */ { UD_Icmovl, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4D */ { UD_Icmovge, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4E */ { UD_Icmovle, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4F */ { UD_Icmovg, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 50 */ { UD_Imovmskps, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iandps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtps2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtdq2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Imovd, O_P, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufw, O_P, O_Q, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovd, O_Ex, O_P, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovq, O_Q, O_P, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Ijo, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 81 */ { UD_Ijno, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 82 */ { UD_Ijb, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 83 */ { UD_Ijae, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 84 */ { UD_Ijz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 85 */ { UD_Ijnz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 86 */ { UD_Ijbe, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 87 */ { UD_Ija, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 88 */ { UD_Ijs, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 89 */ { UD_Ijns, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8A */ { UD_Ijp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8B */ { UD_Ijnp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8C */ { UD_Ijl, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8D */ { UD_Ijge, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8E */ { UD_Ijle, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8F */ { UD_Ijg, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 90 */ { UD_Iseto, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 91 */ { UD_Isetno, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 92 */ { UD_Isetb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 93 */ { UD_Isetnb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 94 */ { UD_Isetz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 95 */ { UD_Isetnz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 96 */ { UD_Isetbe, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 97 */ { UD_Iseta, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 98 */ { UD_Isets, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 99 */ { UD_Isetns, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9A */ { UD_Isetp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9B */ { UD_Isetnp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9C */ { UD_Isetl, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9D */ { UD_Isetge, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9E */ { UD_Isetle, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9F */ { UD_Isetg, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* A0 */ { UD_Ipush, O_FS, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Ipop, O_FS, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Icpuid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Ibt, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A4 */ { UD_Ishld, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A5 */ { UD_Ishld, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Ipush, O_GS, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Ipop, O_GS, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Irsm, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Ibts, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AC */ { UD_Ishrd, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AD */ { UD_Ishrd, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG }, + /* AF */ { UD_Iimul, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B0 */ { UD_Icmpxchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* B1 */ { UD_Icmpxchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B2 */ { UD_Ilss, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B3 */ { UD_Ibtr, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B4 */ { UD_Ilfs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B5 */ { UD_Ilgs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B6 */ { UD_Imovzx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B7 */ { UD_Imovzx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_BA__REG }, + /* BB */ { UD_Ibtc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BC */ { UD_Ibsf, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BD */ { UD_Ibsr, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BE */ { UD_Imovsx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BF */ { UD_Imovsx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Imovnti, O_M, O_Gvw, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C4 */ { UD_Ipinsrw, O_P, O_Ew, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_PR, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C6 */ { UD_Ishufps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG }, + /* C8 */ { UD_Ibswap, O_rAXr8, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* C9 */ { UD_Ibswap, O_rCXr9, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CA */ { UD_Ibswap, O_rDXr10, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CB */ { UD_Ibswap, O_rBXr11, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CC */ { UD_Ibswap, O_rSPr12, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CD */ { UD_Ibswap, O_rBPr13, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CE */ { UD_Ibswap, O_rSIr14, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CF */ { UD_Ibswap, O_rDIr15, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Ipsrlw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_PR, O_NONE, P_oso|P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipaddusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipaddusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Imovntq, O_M, O_P, O_NONE, P_none }, + /* E8 */ { UD_Ipsubsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_00__reg[8] = { + /* 00 */ { UD_Isldt, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Istr, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Illdt, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iltr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iverr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iverw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg[8] = { + /* 00 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD }, + /* 01 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD }, + /* 02 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_02__MOD }, + /* 03 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD }, + /* 04 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_04__MOD }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod[2] = { + /* 00 */ { UD_Isgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmcall, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmresume, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxoff, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod[2] = { + /* 00 */ { UD_Isidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod__op_01__rm[8] = { + /* 00 */ { UD_Imonitor, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_02__mod[2] = { + /* 00 */ { UD_Ilgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod[2] = { + /* 00 */ { UD_Ilidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR }, + /* 06 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor[2] = { + /* 00 */ { UD_Ivmrun, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Ivmmcall, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor[2] = { + /* 00 */ { UD_Ivmload, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Ivmsave, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Istgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor[2] = { + /* 00 */ { UD_Iclgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor[2] = { + /* 00 */ { UD_Iskinit, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor[2] = { + /* 00 */ { UD_Iinvlpga, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_04__mod[2] = { + /* 00 */ { UD_Ismsw, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_06__mod[2] = { + /* 00 */ { UD_Ilmsw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod[2] = { + /* 00 */ { UD_Iinvlpg, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Iswapgs, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Irdtscp, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_0d__reg[8] = { + /* 00 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_18__reg[8] = { + /* 00 */ { UD_Iprefetchnta, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetcht0, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetcht1, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetcht2, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ildmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Istmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod__op_01__rm[8] = { + /* 00 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod__op_01__rm[8] = { + /* 00 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod[2] = { + /* 00 */ { UD_Iclflush, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ba__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ibt, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ibts, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ibtr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ibtc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Icmpxchg8b, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrld, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrst, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifabs, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_If2xm1, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte[256] = { + /* 00 */ { UD_Iadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadd, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iadd, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iadd, O_AL, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iadd, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 06 */ { UD_Ipush, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 07 */ { UD_Ipop, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 08 */ { UD_Ior, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 09 */ { UD_Ior, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0A */ { UD_Ior, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 0B */ { UD_Ior, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0C */ { UD_Ior, O_AL, O_Ib, O_NONE, P_none }, + /* 0D */ { UD_Ior, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 0E */ { UD_Ipush, O_CS, O_NONE, O_NONE, P_inv64|P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iadc, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Iadc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Iadc, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iadc, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iadc, O_AL, O_Ib, O_NONE, P_none }, + /* 15 */ { UD_Iadc, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 16 */ { UD_Ipush, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 17 */ { UD_Ipop, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 18 */ { UD_Isbb, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 19 */ { UD_Isbb, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Isbb, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Isbb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Isbb, O_AL, O_Ib, O_NONE, P_none }, + /* 1D */ { UD_Isbb, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 1E */ { UD_Ipush, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 1F */ { UD_Ipop, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 20 */ { UD_Iand, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 21 */ { UD_Iand, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 22 */ { UD_Iand, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 23 */ { UD_Iand, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 24 */ { UD_Iand, O_AL, O_Ib, O_NONE, P_none }, + /* 25 */ { UD_Iand, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Idaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 28 */ { UD_Isub, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Isub, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Isub, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Isub, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Isub, O_AL, O_Ib, O_NONE, P_none }, + /* 2D */ { UD_Isub, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Idas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 30 */ { UD_Ixor, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 31 */ { UD_Ixor, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 32 */ { UD_Ixor, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 33 */ { UD_Ixor, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 34 */ { UD_Ixor, O_AL, O_Ib, O_NONE, P_none }, + /* 35 */ { UD_Ixor, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iaaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 38 */ { UD_Icmp, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 39 */ { UD_Icmp, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3A */ { UD_Icmp, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 3B */ { UD_Icmp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3C */ { UD_Icmp, O_AL, O_Ib, O_NONE, P_none }, + /* 3D */ { UD_Icmp, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iaas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 40 */ { UD_Iinc, O_eAX, O_NONE, O_NONE, P_oso }, + /* 41 */ { UD_Iinc, O_eCX, O_NONE, O_NONE, P_oso }, + /* 42 */ { UD_Iinc, O_eDX, O_NONE, O_NONE, P_oso }, + /* 43 */ { UD_Iinc, O_eBX, O_NONE, O_NONE, P_oso }, + /* 44 */ { UD_Iinc, O_eSP, O_NONE, O_NONE, P_oso }, + /* 45 */ { UD_Iinc, O_eBP, O_NONE, O_NONE, P_oso }, + /* 46 */ { UD_Iinc, O_eSI, O_NONE, O_NONE, P_oso }, + /* 47 */ { UD_Iinc, O_eDI, O_NONE, O_NONE, P_oso }, + /* 48 */ { UD_Idec, O_eAX, O_NONE, O_NONE, P_oso }, + /* 49 */ { UD_Idec, O_eCX, O_NONE, O_NONE, P_oso }, + /* 4A */ { UD_Idec, O_eDX, O_NONE, O_NONE, P_oso }, + /* 4B */ { UD_Idec, O_eBX, O_NONE, O_NONE, P_oso }, + /* 4C */ { UD_Idec, O_eSP, O_NONE, O_NONE, P_oso }, + /* 4D */ { UD_Idec, O_eBP, O_NONE, O_NONE, P_oso }, + /* 4E */ { UD_Idec, O_eSI, O_NONE, O_NONE, P_oso }, + /* 4F */ { UD_Idec, O_eDI, O_NONE, O_NONE, P_oso }, + /* 50 */ { UD_Ipush, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 51 */ { UD_Ipush, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 52 */ { UD_Ipush, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 53 */ { UD_Ipush, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 54 */ { UD_Ipush, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 55 */ { UD_Ipush, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 56 */ { UD_Ipush, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 57 */ { UD_Ipush, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 58 */ { UD_Ipop, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 59 */ { UD_Ipop, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5A */ { UD_Ipop, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5B */ { UD_Ipop, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5C */ { UD_Ipop, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5D */ { UD_Ipop, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5E */ { UD_Ipop, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5F */ { UD_Ipop, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 60 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_60__OSIZE }, + /* 61 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_61__OSIZE }, + /* 62 */ { UD_Ibound, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* 63 */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_63__MODE }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Ipush, O_Iz, O_NONE, O_NONE, P_c1|P_oso }, + /* 69 */ { UD_Iimul, O_Gv, O_Ev, O_Iz, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipush, O_Ib, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iimul, O_Gv, O_Ev, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6D__OSIZE }, + /* 6E */ { UD_Ioutsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6F__OSIZE }, + /* 70 */ { UD_Ijo, O_Jb, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Ijno, O_Jb, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Ijb, O_Jb, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Ijae, O_Jb, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Ijz, O_Jb, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Ijnz, O_Jb, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Ijbe, O_Jb, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Ija, O_Jb, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Ijs, O_Jb, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Ijns, O_Jb, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Ijp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Ijnp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ijl, O_Jb, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Ijge, O_Jb, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Ijle, O_Jb, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Ijg, O_Jb, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_80__REG }, + /* 81 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_81__REG }, + /* 82 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_82__REG }, + /* 83 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_83__REG }, + /* 84 */ { UD_Itest, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 85 */ { UD_Itest, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 86 */ { UD_Ixchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 87 */ { UD_Ixchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 88 */ { UD_Imov, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 89 */ { UD_Imov, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8A */ { UD_Imov, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 8B */ { UD_Imov, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8C */ { UD_Imov, O_Ev, O_S, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8D */ { UD_Ilea, O_Gv, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8E */ { UD_Imov, O_S, O_Ev, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8F */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_8F__REG }, + /* 90 */ { UD_Ixchg, O_rAXr8, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 91 */ { UD_Ixchg, O_rCXr9, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 92 */ { UD_Ixchg, O_rDXr10, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 93 */ { UD_Ixchg, O_rBXr11, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 94 */ { UD_Ixchg, O_rSPr12, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 95 */ { UD_Ixchg, O_rBPr13, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 96 */ { UD_Ixchg, O_rSIr14, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 97 */ { UD_Ixchg, O_rDIr15, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 98 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_98__OSIZE }, + /* 99 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_99__OSIZE }, + /* 9A */ { UD_Icall, O_Ap, O_NONE, O_NONE, P_inv64|P_oso }, + /* 9B */ { UD_Iwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE }, + /* 9D */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE }, + /* 9E */ { UD_Isahf, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Ilahf, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Imov, O_AL, O_Ob, O_NONE, P_none }, + /* A1 */ { UD_Imov, O_rAX, O_Ov, O_NONE, P_aso|P_oso|P_rexw }, + /* A2 */ { UD_Imov, O_Ob, O_AL, O_NONE, P_none }, + /* A3 */ { UD_Imov, O_Ov, O_rAX, O_NONE, P_aso|P_oso|P_rexw }, + /* A4 */ { UD_Imovsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* A5 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A5__OSIZE }, + /* A6 */ { UD_Icmpsb, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A7__OSIZE }, + /* A8 */ { UD_Itest, O_AL, O_Ib, O_NONE, P_none }, + /* A9 */ { UD_Itest, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* AA */ { UD_Istosb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AB */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AB__OSIZE }, + /* AC */ { UD_Ilodsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AD */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AD__OSIZE }, + /* AE */ { UD_Iscasb, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AF__OSIZE }, + /* B0 */ { UD_Imov, O_ALr8b, O_Ib, O_NONE, P_rexb }, + /* B1 */ { UD_Imov, O_CLr9b, O_Ib, O_NONE, P_rexb }, + /* B2 */ { UD_Imov, O_DLr10b, O_Ib, O_NONE, P_rexb }, + /* B3 */ { UD_Imov, O_BLr11b, O_Ib, O_NONE, P_rexb }, + /* B4 */ { UD_Imov, O_AHr12b, O_Ib, O_NONE, P_rexb }, + /* B5 */ { UD_Imov, O_CHr13b, O_Ib, O_NONE, P_rexb }, + /* B6 */ { UD_Imov, O_DHr14b, O_Ib, O_NONE, P_rexb }, + /* B7 */ { UD_Imov, O_BHr15b, O_Ib, O_NONE, P_rexb }, + /* B8 */ { UD_Imov, O_rAXr8, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* B9 */ { UD_Imov, O_rCXr9, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BA */ { UD_Imov, O_rDXr10, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BB */ { UD_Imov, O_rBXr11, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BC */ { UD_Imov, O_rSPr12, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BD */ { UD_Imov, O_rBPr13, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BE */ { UD_Imov, O_rSIr14, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BF */ { UD_Imov, O_rDIr15, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* C0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C0__REG }, + /* C1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C1__REG }, + /* C2 */ { UD_Iret, O_Iw, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iret, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iles, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C5 */ { UD_Ilds, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C6__REG }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C7__REG }, + /* C8 */ { UD_Ienter, O_Iw, O_Ib, O_NONE, P_def64|P_depM|P_none }, + /* C9 */ { UD_Ileave, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iretf, O_Iw, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iretf, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iint3, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iint, O_Ib, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinto, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* CF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_CF__OSIZE }, + /* D0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D0__REG }, + /* D1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D1__REG }, + /* D2 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D2__REG }, + /* D3 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D3__REG }, + /* D4 */ { UD_Iaam, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D5 */ { UD_Iaad, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D6 */ { UD_Isalc, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* D7 */ { UD_Ixlatb, O_NONE, O_NONE, O_NONE, P_rexw }, + /* D8 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD }, + /* D9 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD }, + /* DA */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD }, + /* DB */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD }, + /* DC */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD }, + /* DD */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD }, + /* DE */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD }, + /* DF */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD }, + /* E0 */ { UD_Iloopnz, O_Jb, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iloope, O_Jb, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iloop, O_Jb, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Igrp_asize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_E3__ASIZE }, + /* E4 */ { UD_Iin, O_AL, O_Ib, O_NONE, P_none }, + /* E5 */ { UD_Iin, O_eAX, O_Ib, O_NONE, P_oso }, + /* E6 */ { UD_Iout, O_Ib, O_AL, O_NONE, P_none }, + /* E7 */ { UD_Iout, O_Ib, O_eAX, O_NONE, P_oso }, + /* E8 */ { UD_Icall, O_Jz, O_NONE, O_NONE, P_def64|P_oso }, + /* E9 */ { UD_Ijmp, O_Jz, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* EA */ { UD_Ijmp, O_Ap, O_NONE, O_NONE, P_inv64|P_none }, + /* EB */ { UD_Ijmp, O_Jb, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iin, O_AL, O_DX, O_NONE, P_none }, + /* ED */ { UD_Iin, O_eAX, O_DX, O_NONE, P_oso }, + /* EE */ { UD_Iout, O_DX, O_AL, O_NONE, P_none }, + /* EF */ { UD_Iout, O_DX, O_eAX, O_NONE, P_oso }, + /* F0 */ { UD_Ilock, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iint1, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Irepne, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Irep, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Ihlt, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Icmc, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F6__REG }, + /* F7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F7__REG }, + /* F8 */ { UD_Iclc, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Istc, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Icli, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Isti, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Icld, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Istd, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FE__REG }, + /* FF */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FF__REG }, +}; + +static struct ud_itab_entry itab__1byte__op_60__osize[3] = { + /* 00 */ { UD_Ipusha, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipushad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_61__osize[3] = { + /* 00 */ { UD_Ipopa, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipopad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_63__mode[3] = { + /* 00 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 01 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 02 */ { UD_Imovsxd, O_Gv, O_Ed, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexx|P_rexr|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_6d__osize[3] = { + /* 00 */ { UD_Iinsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Iinsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_6f__osize[3] = { + /* 00 */ { UD_Ioutsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Ioutsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Ioutsq, O_NONE, O_NONE, O_NONE, P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_80__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_81__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_82__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_83__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_8f__reg[8] = { + /* 00 */ { UD_Ipop, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_98__osize[3] = { + /* 00 */ { UD_Icbw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icwde, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icdqe, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_99__osize[3] = { + /* 00 */ { UD_Icwd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icdq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icqo, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipushfq, O_NONE, O_NONE, O_NONE, P_def64|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipopfq, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_a5__osize[3] = { + /* 00 */ { UD_Imovsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Imovsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Imovsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_a7__osize[3] = { + /* 00 */ { UD_Icmpsw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icmpsd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icmpsq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ab__osize[3] = { + /* 00 */ { UD_Istosw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Istosd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Istosq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ad__osize[3] = { + /* 00 */ { UD_Ilodsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Ilodsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Ilodsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AE__MOD__OP_00__REG }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifxsave, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifxrstor, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_af__osize[3] = { + /* 00 */ { UD_Iscasw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iscasd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iscasq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_c0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c6__reg[8] = { + /* 00 */ { UD_Imov, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_c7__reg[8] = { + /* 00 */ { UD_Imov, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_cf__osize[3] = { + /* 00 */ { UD_Iiretw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iiretd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iiretq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_d0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d2__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d3__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcom, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcom, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcom, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcom, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcom, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcom, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcom, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcom, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsub, O_ST0, O_ST1, O_NONE, P_none }, + /* 22 */ { UD_Ifsub, O_ST0, O_ST2, O_NONE, P_none }, + /* 23 */ { UD_Ifsub, O_ST0, O_ST3, O_NONE, P_none }, + /* 24 */ { UD_Ifsub, O_ST0, O_ST4, O_NONE, P_none }, + /* 25 */ { UD_Ifsub, O_ST0, O_ST5, O_NONE, P_none }, + /* 26 */ { UD_Ifsub, O_ST0, O_ST6, O_NONE, P_none }, + /* 27 */ { UD_Ifsub, O_ST0, O_ST7, O_NONE, P_none }, + /* 28 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubr, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifsubr, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifsubr, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifsubr, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifsubr, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifsubr, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifsubr, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdiv, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifdiv, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifdiv, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifdiv, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifdiv, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifdiv, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifdiv, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivr, O_ST0, O_ST1, O_NONE, P_none }, + /* 3A */ { UD_Ifdivr, O_ST0, O_ST2, O_NONE, P_none }, + /* 3B */ { UD_Ifdivr, O_ST0, O_ST3, O_NONE, P_none }, + /* 3C */ { UD_Ifdivr, O_ST0, O_ST4, O_NONE, P_none }, + /* 3D */ { UD_Ifdivr, O_ST0, O_ST5, O_NONE, P_none }, + /* 3E */ { UD_Ifdivr, O_ST0, O_ST6, O_NONE, P_none }, + /* 3F */ { UD_Ifdivr, O_ST0, O_ST7, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ifst, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifldenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifldcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifnstenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifld, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifld, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifld, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifld, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifld, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifld, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifld, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifxch, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifxch, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifxch, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifxch, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifxch, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifxch, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifxch, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifxch, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifnop, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp1, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp1, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp1, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp1, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp1, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp1, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp1, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp1, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifchs, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iftst, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifxam, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifld1, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifldl2t, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifldl2e, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifldlpi, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifldlg2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifldln2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifldz, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Ifyl2x, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Ifptan, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Ifpatan, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Ifpxtract, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Ifprem1, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Ifdecstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Ifncstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Ifprem, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Ifyl2xp1, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Ifsqrt, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Ifsincos, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Ifrndint, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Ifscale, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Ifsin, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Ifcos, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmove, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmove, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmove, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmove, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmove, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmove, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmove, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmove, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ifstp, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovnb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovnb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovnb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovnb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovnb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovnb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovnb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovnb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmovne, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmovne, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmovne, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmovne, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmovne, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmovne, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmovne, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmovne, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovnbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovnbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovnbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovnbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovnbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovnbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovnbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovnbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovnu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovnu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovnu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovnu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovnu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovnu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovnu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovnu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifclex, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifninit, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcom2, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcom2, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcom2, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcom2, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcom2, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcom2, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcom2, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcom2, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp3, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp3, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp3, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp3, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp3, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp3, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp3, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp3, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubr, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubr, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubr, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubr, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubr, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubr, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubr, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsub, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsub, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsub, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsub, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsub, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsub, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsub, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivr, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivr, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivr, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivr, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivr, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivr, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivr, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdiv, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdiv, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdiv, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdiv, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdiv, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdiv, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdiv, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifst, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifrstor, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ifnsave, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstsw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffree, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffree, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffree, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffree, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffree, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffree, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffree, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffree, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch4, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch4, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch4, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch4, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch4, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch4, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch4, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch4, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifst, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifst, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifst, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifst, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifst, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifst, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifst, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifst, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifucom, O_ST0, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifucom, O_ST1, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifucom, O_ST2, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifucom, O_ST3, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Ifucom, O_ST4, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifucom, O_ST5, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Ifucom, O_ST6, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Ifucom, O_ST7, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomp, O_ST0, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucomp, O_ST1, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifucomp, O_ST2, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifucomp, O_ST3, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifucomp, O_ST4, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifucomp, O_ST5, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifucomp, O_ST6, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Ifucomp, O_ST7, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifaddp, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifaddp, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifaddp, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifaddp, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifaddp, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifaddp, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifaddp, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifaddp, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmulp, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmulp, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmulp, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmulp, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmulp, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmulp, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmulp, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmulp, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcomp5, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcomp5, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcomp5, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcomp5, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcomp5, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcomp5, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcomp5, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcomp5, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsubp, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubp, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsubp, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsubp, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsubp, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsubp, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsubp, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsubp, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdivp, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivp, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdivp, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdivp, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdivp, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdivp, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdivp, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdivp, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifbld, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifild, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifbstp, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifistp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffreep, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffreep, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffreep, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffreep, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffreep, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffreep, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffreep, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffreep, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch7, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch7, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch7, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch7, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch7, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch7, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch7, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch7, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifstp8, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifstp8, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifstp8, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifstp8, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifstp8, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifstp8, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifstp8, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifstp8, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp9, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp9, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp9, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp9, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp9, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp9, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp9, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp9, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifnstsw, O_AX, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_e3__asize[3] = { + /* 00 */ { UD_Ijcxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 01 */ { UD_Ijecxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 02 */ { UD_Ijrcxz, O_Jb, O_NONE, O_NONE, P_aso }, +}; + +static struct ud_itab_entry itab__1byte__op_f6__reg[8] = { + /* 00 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_f7__reg[8] = { + /* 00 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_fe__reg[8] = { + /* 00 */ { UD_Iinc, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ff__reg[8] = { + /* 00 */ { UD_Iinc, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Icall, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Icall, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ijmp, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ijmp, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ipush, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__3dnow[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 59 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovupd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovupd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovapd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovapd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2pd, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Imovmskpd, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iandpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtpd2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Ipunpcklqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6D */ { UD_Ipunpckhqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6E */ { UD_Imovd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovqa, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Imovd, O_Ex, O_V, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqa, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmppd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Ipinsrw, O_V, O_Ew, O_Ib, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_VR, O_Ib, P_aso|P_rexr|P_rexb }, + /* C6 */ { UD_Ishufpd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Ipsrlw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Imovq, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_VR, O_NONE, P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Icvttpd2dq, O_V, O_W, O_NONE, P_none }, + /* E7 */ { UD_Imovntdq, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E8 */ { UD_Ipsubsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Ipsrldq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Ipslldq, O_VR, O_Ib, O_NONE, P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmclear, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_ssef2__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovsd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovddup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2sd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtsd2ss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Isubsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Ipshuflw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpsd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovdq2q, O_P, O_VR, O_NONE, P_aso|P_rexb }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtpd2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Ilddqu, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovss, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovsldup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Imovshdup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2ss, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtss2sd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvttps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Imovdqu, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufhw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqu, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpss, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovq2dq, O_V, O_PR, O_NONE, P_aso }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtdq2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxon, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +/* the order of this table matches enum ud_itab_index */ +struct ud_itab_entry * ud_itab_list[] = { + itab__0f, + itab__0f__op_00__reg, + itab__0f__op_01__reg, + itab__0f__op_01__reg__op_00__mod, + itab__0f__op_01__reg__op_00__mod__op_01__rm, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_01__mod, + itab__0f__op_01__reg__op_01__mod__op_01__rm, + itab__0f__op_01__reg__op_02__mod, + itab__0f__op_01__reg__op_03__mod, + itab__0f__op_01__reg__op_03__mod__op_01__rm, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor, + itab__0f__op_01__reg__op_04__mod, + itab__0f__op_01__reg__op_06__mod, + itab__0f__op_01__reg__op_07__mod, + itab__0f__op_01__reg__op_07__mod__op_01__rm, + itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor, + itab__0f__op_0d__reg, + itab__0f__op_18__reg, + itab__0f__op_71__reg, + itab__0f__op_72__reg, + itab__0f__op_73__reg, + itab__0f__op_ae__reg, + itab__0f__op_ae__reg__op_05__mod, + itab__0f__op_ae__reg__op_05__mod__op_01__rm, + itab__0f__op_ae__reg__op_06__mod, + itab__0f__op_ae__reg__op_06__mod__op_01__rm, + itab__0f__op_ae__reg__op_07__mod, + itab__0f__op_ae__reg__op_07__mod__op_01__rm, + itab__0f__op_ba__reg, + itab__0f__op_c7__reg, + itab__0f__op_c7__reg__op_00__vendor, + itab__0f__op_c7__reg__op_07__vendor, + itab__0f__op_d9__mod, + itab__0f__op_d9__mod__op_01__x87, + itab__1byte, + itab__1byte__op_60__osize, + itab__1byte__op_61__osize, + itab__1byte__op_63__mode, + itab__1byte__op_6d__osize, + itab__1byte__op_6f__osize, + itab__1byte__op_80__reg, + itab__1byte__op_81__reg, + itab__1byte__op_82__reg, + itab__1byte__op_83__reg, + itab__1byte__op_8f__reg, + itab__1byte__op_98__osize, + itab__1byte__op_99__osize, + itab__1byte__op_9c__mode, + itab__1byte__op_9c__mode__op_00__osize, + itab__1byte__op_9c__mode__op_01__osize, + itab__1byte__op_9d__mode, + itab__1byte__op_9d__mode__op_00__osize, + itab__1byte__op_9d__mode__op_01__osize, + itab__1byte__op_a5__osize, + itab__1byte__op_a7__osize, + itab__1byte__op_ab__osize, + itab__1byte__op_ad__osize, + itab__1byte__op_ae__mod, + itab__1byte__op_ae__mod__op_00__reg, + itab__1byte__op_af__osize, + itab__1byte__op_c0__reg, + itab__1byte__op_c1__reg, + itab__1byte__op_c6__reg, + itab__1byte__op_c7__reg, + itab__1byte__op_cf__osize, + itab__1byte__op_d0__reg, + itab__1byte__op_d1__reg, + itab__1byte__op_d2__reg, + itab__1byte__op_d3__reg, + itab__1byte__op_d8__mod, + itab__1byte__op_d8__mod__op_00__reg, + itab__1byte__op_d8__mod__op_01__x87, + itab__1byte__op_d9__mod, + itab__1byte__op_d9__mod__op_00__reg, + itab__1byte__op_d9__mod__op_01__x87, + itab__1byte__op_da__mod, + itab__1byte__op_da__mod__op_00__reg, + itab__1byte__op_da__mod__op_01__x87, + itab__1byte__op_db__mod, + itab__1byte__op_db__mod__op_00__reg, + itab__1byte__op_db__mod__op_01__x87, + itab__1byte__op_dc__mod, + itab__1byte__op_dc__mod__op_00__reg, + itab__1byte__op_dc__mod__op_01__x87, + itab__1byte__op_dd__mod, + itab__1byte__op_dd__mod__op_00__reg, + itab__1byte__op_dd__mod__op_01__x87, + itab__1byte__op_de__mod, + itab__1byte__op_de__mod__op_00__reg, + itab__1byte__op_de__mod__op_01__x87, + itab__1byte__op_df__mod, + itab__1byte__op_df__mod__op_00__reg, + itab__1byte__op_df__mod__op_01__x87, + itab__1byte__op_e3__asize, + itab__1byte__op_f6__reg, + itab__1byte__op_f7__reg, + itab__1byte__op_fe__reg, + itab__1byte__op_ff__reg, + itab__3dnow, + itab__pfx_sse66__0f, + itab__pfx_sse66__0f__op_71__reg, + itab__pfx_sse66__0f__op_72__reg, + itab__pfx_sse66__0f__op_73__reg, + itab__pfx_sse66__0f__op_c7__reg, + itab__pfx_sse66__0f__op_c7__reg__op_00__vendor, + itab__pfx_ssef2__0f, + itab__pfx_ssef3__0f, + itab__pfx_ssef3__0f__op_c7__reg, + itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor, +}; diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/itab.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,719 @@ + +/* itab.h -- auto generated by opgen.py, do not edit. */ + +#ifndef UD_ITAB_H +#define UD_ITAB_H + + + +enum ud_itab_vendor_index { + ITAB__VENDOR_INDX__AMD, + ITAB__VENDOR_INDX__INTEL, +}; + + +enum ud_itab_mode_index { + ITAB__MODE_INDX__16, + ITAB__MODE_INDX__32, + ITAB__MODE_INDX__64 +}; + + +enum ud_itab_mod_index { + ITAB__MOD_INDX__NOT_11, + ITAB__MOD_INDX__11 +}; + + +enum ud_itab_index { + ITAB__0F, + ITAB__0F__OP_00__REG, + ITAB__0F__OP_01__REG, + ITAB__0F__OP_01__REG__OP_00__MOD, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_01__MOD, + ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_02__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR, + ITAB__0F__OP_01__REG__OP_04__MOD, + ITAB__0F__OP_01__REG__OP_06__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_0D__REG, + ITAB__0F__OP_18__REG, + ITAB__0F__OP_71__REG, + ITAB__0F__OP_72__REG, + ITAB__0F__OP_73__REG, + ITAB__0F__OP_AE__REG, + ITAB__0F__OP_AE__REG__OP_05__MOD, + ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_06__MOD, + ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_07__MOD, + ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_BA__REG, + ITAB__0F__OP_C7__REG, + ITAB__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__0F__OP_C7__REG__OP_07__VENDOR, + ITAB__0F__OP_D9__MOD, + ITAB__0F__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE, + ITAB__1BYTE__OP_60__OSIZE, + ITAB__1BYTE__OP_61__OSIZE, + ITAB__1BYTE__OP_63__MODE, + ITAB__1BYTE__OP_6D__OSIZE, + ITAB__1BYTE__OP_6F__OSIZE, + ITAB__1BYTE__OP_80__REG, + ITAB__1BYTE__OP_81__REG, + ITAB__1BYTE__OP_82__REG, + ITAB__1BYTE__OP_83__REG, + ITAB__1BYTE__OP_8F__REG, + ITAB__1BYTE__OP_98__OSIZE, + ITAB__1BYTE__OP_99__OSIZE, + ITAB__1BYTE__OP_9C__MODE, + ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_9D__MODE, + ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_A5__OSIZE, + ITAB__1BYTE__OP_A7__OSIZE, + ITAB__1BYTE__OP_AB__OSIZE, + ITAB__1BYTE__OP_AD__OSIZE, + ITAB__1BYTE__OP_AE__MOD, + ITAB__1BYTE__OP_AE__MOD__OP_00__REG, + ITAB__1BYTE__OP_AF__OSIZE, + ITAB__1BYTE__OP_C0__REG, + ITAB__1BYTE__OP_C1__REG, + ITAB__1BYTE__OP_C6__REG, + ITAB__1BYTE__OP_C7__REG, + ITAB__1BYTE__OP_CF__OSIZE, + ITAB__1BYTE__OP_D0__REG, + ITAB__1BYTE__OP_D1__REG, + ITAB__1BYTE__OP_D2__REG, + ITAB__1BYTE__OP_D3__REG, + ITAB__1BYTE__OP_D8__MOD, + ITAB__1BYTE__OP_D8__MOD__OP_00__REG, + ITAB__1BYTE__OP_D8__MOD__OP_01__X87, + ITAB__1BYTE__OP_D9__MOD, + ITAB__1BYTE__OP_D9__MOD__OP_00__REG, + ITAB__1BYTE__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE__OP_DA__MOD, + ITAB__1BYTE__OP_DA__MOD__OP_00__REG, + ITAB__1BYTE__OP_DA__MOD__OP_01__X87, + ITAB__1BYTE__OP_DB__MOD, + ITAB__1BYTE__OP_DB__MOD__OP_00__REG, + ITAB__1BYTE__OP_DB__MOD__OP_01__X87, + ITAB__1BYTE__OP_DC__MOD, + ITAB__1BYTE__OP_DC__MOD__OP_00__REG, + ITAB__1BYTE__OP_DC__MOD__OP_01__X87, + ITAB__1BYTE__OP_DD__MOD, + ITAB__1BYTE__OP_DD__MOD__OP_00__REG, + ITAB__1BYTE__OP_DD__MOD__OP_01__X87, + ITAB__1BYTE__OP_DE__MOD, + ITAB__1BYTE__OP_DE__MOD__OP_00__REG, + ITAB__1BYTE__OP_DE__MOD__OP_01__X87, + ITAB__1BYTE__OP_DF__MOD, + ITAB__1BYTE__OP_DF__MOD__OP_00__REG, + ITAB__1BYTE__OP_DF__MOD__OP_01__X87, + ITAB__1BYTE__OP_E3__ASIZE, + ITAB__1BYTE__OP_F6__REG, + ITAB__1BYTE__OP_F7__REG, + ITAB__1BYTE__OP_FE__REG, + ITAB__1BYTE__OP_FF__REG, + ITAB__3DNOW, + ITAB__PFX_SSE66__0F, + ITAB__PFX_SSE66__0F__OP_71__REG, + ITAB__PFX_SSE66__0F__OP_72__REG, + ITAB__PFX_SSE66__0F__OP_73__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__PFX_SSEF2__0F, + ITAB__PFX_SSEF3__0F, + ITAB__PFX_SSEF3__0F__OP_C7__REG, + ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR, +}; + + +enum ud_mnemonic_code { + UD_I3dnow, + UD_Iaaa, + UD_Iaad, + UD_Iaam, + UD_Iaas, + UD_Iadc, + UD_Iadd, + UD_Iaddpd, + UD_Iaddps, + UD_Iaddsd, + UD_Iaddss, + UD_Iaddsubpd, + UD_Iaddsubps, + UD_Iand, + UD_Iandpd, + UD_Iandps, + UD_Iandnpd, + UD_Iandnps, + UD_Iarpl, + UD_Imovsxd, + UD_Ibound, + UD_Ibsf, + UD_Ibsr, + UD_Ibswap, + UD_Ibt, + UD_Ibtc, + UD_Ibtr, + UD_Ibts, + UD_Icall, + UD_Icbw, + UD_Icwde, + UD_Icdqe, + UD_Iclc, + UD_Icld, + UD_Iclflush, + UD_Iclgi, + UD_Icli, + UD_Iclts, + UD_Icmc, + UD_Icmovo, + UD_Icmovno, + UD_Icmovb, + UD_Icmovae, + UD_Icmovz, + UD_Icmovnz, + UD_Icmovbe, + UD_Icmova, + UD_Icmovs, + UD_Icmovns, + UD_Icmovp, + UD_Icmovnp, + UD_Icmovl, + UD_Icmovge, + UD_Icmovle, + UD_Icmovg, + UD_Icmp, + UD_Icmppd, + UD_Icmpps, + UD_Icmpsb, + UD_Icmpsw, + UD_Icmpsd, + UD_Icmpsq, + UD_Icmpss, + UD_Icmpxchg, + UD_Icmpxchg8b, + UD_Icomisd, + UD_Icomiss, + UD_Icpuid, + UD_Icvtdq2pd, + UD_Icvtdq2ps, + UD_Icvtpd2dq, + UD_Icvtpd2pi, + UD_Icvtpd2ps, + UD_Icvtpi2ps, + UD_Icvtpi2pd, + UD_Icvtps2dq, + UD_Icvtps2pi, + UD_Icvtps2pd, + UD_Icvtsd2si, + UD_Icvtsd2ss, + UD_Icvtsi2ss, + UD_Icvtss2si, + UD_Icvtss2sd, + UD_Icvttpd2pi, + UD_Icvttpd2dq, + UD_Icvttps2dq, + UD_Icvttps2pi, + UD_Icvttsd2si, + UD_Icvtsi2sd, + UD_Icvttss2si, + UD_Icwd, + UD_Icdq, + UD_Icqo, + UD_Idaa, + UD_Idas, + UD_Idec, + UD_Idiv, + UD_Idivpd, + UD_Idivps, + UD_Idivsd, + UD_Idivss, + UD_Iemms, + UD_Ienter, + UD_If2xm1, + UD_Ifabs, + UD_Ifadd, + UD_Ifaddp, + UD_Ifbld, + UD_Ifbstp, + UD_Ifchs, + UD_Ifclex, + UD_Ifcmovb, + UD_Ifcmove, + UD_Ifcmovbe, + UD_Ifcmovu, + UD_Ifcmovnb, + UD_Ifcmovne, + UD_Ifcmovnbe, + UD_Ifcmovnu, + UD_Ifucomi, + UD_Ifcom, + UD_Ifcom2, + UD_Ifcomp3, + UD_Ifcomi, + UD_Ifucomip, + UD_Ifcomip, + UD_Ifcomp, + UD_Ifcomp5, + UD_Ifcompp, + UD_Ifcos, + UD_Ifdecstp, + UD_Ifdiv, + UD_Ifdivp, + UD_Ifdivr, + UD_Ifdivrp, + UD_Ifemms, + UD_Iffree, + UD_Iffreep, + UD_Ificom, + UD_Ificomp, + UD_Ifild, + UD_Ifncstp, + UD_Ifninit, + UD_Ifiadd, + UD_Ifidivr, + UD_Ifidiv, + UD_Ifisub, + UD_Ifisubr, + UD_Ifist, + UD_Ifistp, + UD_Ifisttp, + UD_Ifld, + UD_Ifld1, + UD_Ifldl2t, + UD_Ifldl2e, + UD_Ifldlpi, + UD_Ifldlg2, + UD_Ifldln2, + UD_Ifldz, + UD_Ifldcw, + UD_Ifldenv, + UD_Ifmul, + UD_Ifmulp, + UD_Ifimul, + UD_Ifnop, + UD_Ifpatan, + UD_Ifprem, + UD_Ifprem1, + UD_Ifptan, + UD_Ifrndint, + UD_Ifrstor, + UD_Ifnsave, + UD_Ifscale, + UD_Ifsin, + UD_Ifsincos, + UD_Ifsqrt, + UD_Ifstp, + UD_Ifstp1, + UD_Ifstp8, + UD_Ifstp9, + UD_Ifst, + UD_Ifnstcw, + UD_Ifnstenv, + UD_Ifnstsw, + UD_Ifsub, + UD_Ifsubp, + UD_Ifsubr, + UD_Ifsubrp, + UD_Iftst, + UD_Ifucom, + UD_Ifucomp, + UD_Ifucompp, + UD_Ifxam, + UD_Ifxch, + UD_Ifxch4, + UD_Ifxch7, + UD_Ifxrstor, + UD_Ifxsave, + UD_Ifpxtract, + UD_Ifyl2x, + UD_Ifyl2xp1, + UD_Ihaddpd, + UD_Ihaddps, + UD_Ihlt, + UD_Ihsubpd, + UD_Ihsubps, + UD_Iidiv, + UD_Iin, + UD_Iimul, + UD_Iinc, + UD_Iinsb, + UD_Iinsw, + UD_Iinsd, + UD_Iint1, + UD_Iint3, + UD_Iint, + UD_Iinto, + UD_Iinvd, + UD_Iinvlpg, + UD_Iinvlpga, + UD_Iiretw, + UD_Iiretd, + UD_Iiretq, + UD_Ijo, + UD_Ijno, + UD_Ijb, + UD_Ijae, + UD_Ijz, + UD_Ijnz, + UD_Ijbe, + UD_Ija, + UD_Ijs, + UD_Ijns, + UD_Ijp, + UD_Ijnp, + UD_Ijl, + UD_Ijge, + UD_Ijle, + UD_Ijg, + UD_Ijcxz, + UD_Ijecxz, + UD_Ijrcxz, + UD_Ijmp, + UD_Ilahf, + UD_Ilar, + UD_Ilddqu, + UD_Ildmxcsr, + UD_Ilds, + UD_Ilea, + UD_Iles, + UD_Ilfs, + UD_Ilgs, + UD_Ilidt, + UD_Ilss, + UD_Ileave, + UD_Ilfence, + UD_Ilgdt, + UD_Illdt, + UD_Ilmsw, + UD_Ilock, + UD_Ilodsb, + UD_Ilodsw, + UD_Ilodsd, + UD_Ilodsq, + UD_Iloopnz, + UD_Iloope, + UD_Iloop, + UD_Ilsl, + UD_Iltr, + UD_Imaskmovq, + UD_Imaxpd, + UD_Imaxps, + UD_Imaxsd, + UD_Imaxss, + UD_Imfence, + UD_Iminpd, + UD_Iminps, + UD_Iminsd, + UD_Iminss, + UD_Imonitor, + UD_Imov, + UD_Imovapd, + UD_Imovaps, + UD_Imovd, + UD_Imovddup, + UD_Imovdqa, + UD_Imovdqu, + UD_Imovdq2q, + UD_Imovhpd, + UD_Imovhps, + UD_Imovlhps, + UD_Imovlpd, + UD_Imovlps, + UD_Imovhlps, + UD_Imovmskpd, + UD_Imovmskps, + UD_Imovntdq, + UD_Imovnti, + UD_Imovntpd, + UD_Imovntps, + UD_Imovntq, + UD_Imovq, + UD_Imovqa, + UD_Imovq2dq, + UD_Imovsb, + UD_Imovsw, + UD_Imovsd, + UD_Imovsq, + UD_Imovsldup, + UD_Imovshdup, + UD_Imovss, + UD_Imovsx, + UD_Imovupd, + UD_Imovups, + UD_Imovzx, + UD_Imul, + UD_Imulpd, + UD_Imulps, + UD_Imulsd, + UD_Imulss, + UD_Imwait, + UD_Ineg, + UD_Inop, + UD_Inot, + UD_Ior, + UD_Iorpd, + UD_Iorps, + UD_Iout, + UD_Ioutsb, + UD_Ioutsw, + UD_Ioutsd, + UD_Ioutsq, + UD_Ipacksswb, + UD_Ipackssdw, + UD_Ipackuswb, + UD_Ipaddb, + UD_Ipaddw, + UD_Ipaddq, + UD_Ipaddsb, + UD_Ipaddsw, + UD_Ipaddusb, + UD_Ipaddusw, + UD_Ipand, + UD_Ipandn, + UD_Ipause, + UD_Ipavgb, + UD_Ipavgw, + UD_Ipcmpeqb, + UD_Ipcmpeqw, + UD_Ipcmpeqd, + UD_Ipcmpgtb, + UD_Ipcmpgtw, + UD_Ipcmpgtd, + UD_Ipextrw, + UD_Ipinsrw, + UD_Ipmaddwd, + UD_Ipmaxsw, + UD_Ipmaxub, + UD_Ipminsw, + UD_Ipminub, + UD_Ipmovmskb, + UD_Ipmulhuw, + UD_Ipmulhw, + UD_Ipmullw, + UD_Ipmuludq, + UD_Ipop, + UD_Ipopa, + UD_Ipopad, + UD_Ipopfw, + UD_Ipopfd, + UD_Ipopfq, + UD_Ipor, + UD_Iprefetch, + UD_Iprefetchnta, + UD_Iprefetcht0, + UD_Iprefetcht1, + UD_Iprefetcht2, + UD_Ipsadbw, + UD_Ipshufd, + UD_Ipshufhw, + UD_Ipshuflw, + UD_Ipshufw, + UD_Ipslldq, + UD_Ipsllw, + UD_Ipslld, + UD_Ipsllq, + UD_Ipsraw, + UD_Ipsrad, + UD_Ipsrlw, + UD_Ipsrld, + UD_Ipsrlq, + UD_Ipsrldq, + UD_Ipsubb, + UD_Ipsubw, + UD_Ipsubd, + UD_Ipsubq, + UD_Ipsubsb, + UD_Ipsubsw, + UD_Ipsubusb, + UD_Ipsubusw, + UD_Ipunpckhbw, + UD_Ipunpckhwd, + UD_Ipunpckhdq, + UD_Ipunpckhqdq, + UD_Ipunpcklbw, + UD_Ipunpcklwd, + UD_Ipunpckldq, + UD_Ipunpcklqdq, + UD_Ipi2fw, + UD_Ipi2fd, + UD_Ipf2iw, + UD_Ipf2id, + UD_Ipfnacc, + UD_Ipfpnacc, + UD_Ipfcmpge, + UD_Ipfmin, + UD_Ipfrcp, + UD_Ipfrsqrt, + UD_Ipfsub, + UD_Ipfadd, + UD_Ipfcmpgt, + UD_Ipfmax, + UD_Ipfrcpit1, + UD_Ipfrspit1, + UD_Ipfsubr, + UD_Ipfacc, + UD_Ipfcmpeq, + UD_Ipfmul, + UD_Ipfrcpit2, + UD_Ipmulhrw, + UD_Ipswapd, + UD_Ipavgusb, + UD_Ipush, + UD_Ipusha, + UD_Ipushad, + UD_Ipushfw, + UD_Ipushfd, + UD_Ipushfq, + UD_Ipxor, + UD_Ircl, + UD_Ircr, + UD_Irol, + UD_Iror, + UD_Ircpps, + UD_Ircpss, + UD_Irdmsr, + UD_Irdpmc, + UD_Irdtsc, + UD_Irdtscp, + UD_Irepne, + UD_Irep, + UD_Iret, + UD_Iretf, + UD_Irsm, + UD_Irsqrtps, + UD_Irsqrtss, + UD_Isahf, + UD_Isal, + UD_Isalc, + UD_Isar, + UD_Ishl, + UD_Ishr, + UD_Isbb, + UD_Iscasb, + UD_Iscasw, + UD_Iscasd, + UD_Iscasq, + UD_Iseto, + UD_Isetno, + UD_Isetb, + UD_Isetnb, + UD_Isetz, + UD_Isetnz, + UD_Isetbe, + UD_Iseta, + UD_Isets, + UD_Isetns, + UD_Isetp, + UD_Isetnp, + UD_Isetl, + UD_Isetge, + UD_Isetle, + UD_Isetg, + UD_Isfence, + UD_Isgdt, + UD_Ishld, + UD_Ishrd, + UD_Ishufpd, + UD_Ishufps, + UD_Isidt, + UD_Isldt, + UD_Ismsw, + UD_Isqrtps, + UD_Isqrtpd, + UD_Isqrtsd, + UD_Isqrtss, + UD_Istc, + UD_Istd, + UD_Istgi, + UD_Isti, + UD_Iskinit, + UD_Istmxcsr, + UD_Istosb, + UD_Istosw, + UD_Istosd, + UD_Istosq, + UD_Istr, + UD_Isub, + UD_Isubpd, + UD_Isubps, + UD_Isubsd, + UD_Isubss, + UD_Iswapgs, + UD_Isyscall, + UD_Isysenter, + UD_Isysexit, + UD_Isysret, + UD_Itest, + UD_Iucomisd, + UD_Iucomiss, + UD_Iud2, + UD_Iunpckhpd, + UD_Iunpckhps, + UD_Iunpcklps, + UD_Iunpcklpd, + UD_Iverr, + UD_Iverw, + UD_Ivmcall, + UD_Ivmclear, + UD_Ivmxon, + UD_Ivmptrld, + UD_Ivmptrst, + UD_Ivmresume, + UD_Ivmxoff, + UD_Ivmrun, + UD_Ivmmcall, + UD_Ivmload, + UD_Ivmsave, + UD_Iwait, + UD_Iwbinvd, + UD_Iwrmsr, + UD_Ixadd, + UD_Ixchg, + UD_Ixlatb, + UD_Ixor, + UD_Ixorpd, + UD_Ixorps, + UD_Idb, + UD_Iinvalid, + UD_Id3vil, + UD_Ina, + UD_Igrp_reg, + UD_Igrp_rm, + UD_Igrp_vendor, + UD_Igrp_x87, + UD_Igrp_mode, + UD_Igrp_osize, + UD_Igrp_asize, + UD_Igrp_mod, + UD_Inone, +}; + + + +extern const char* ud_mnemonics_str[];; +extern struct ud_itab_entry* ud_itab_list[]; + +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/kdb_dis.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/kdb_dis.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include /* for XEN_SUBVERSION */ +#include "../../include/kdbinc.h" +#include "extern.h" + +static void (*dis_syntax)(ud_t*) = UD_SYN_ATT; /* default dis-assembly syntax */ + +static struct { /* info for kdb_read_byte_for_ud() */ + kdbva_t kud_instr_addr; + domid_t kud_domid; +} kdb_ud_rd_info; + +/* called via function ptr by ud when disassembling. + * kdb info passed via kdb_ud_rd_info{} + */ +static int +kdb_read_byte_for_ud(struct ud *udp) +{ + kdbbyt_t bytebuf; + domid_t domid = kdb_ud_rd_info.kud_domid; + kdbva_t addr = kdb_ud_rd_info.kud_instr_addr; + + if (kdb_read_mem(addr, &bytebuf, 1, domid) == 1) { + kdb_ud_rd_info.kud_instr_addr++; + KDBGP1("udrd:addr:%lx domid:%d byt:%x\n", addr, domid, bytebuf); + return bytebuf; + } + KDBGP1("udrd:addr:%lx domid:%d err\n", addr, domid); + return UD_EOI; +} + +/* + * given a domid, convert addr to symbol and print it + * Eg: ffff828c801235e2: idle_loop+52 jmp idle_loop+55 + * Called twice here for idle_loop. In first case, nl is null, + * in the second case nl == '\n' + */ +void +kdb_prnt_addr2sym(domid_t domid, kdbva_t addr, char *nl) +{ + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1], pbuf[150], prefix[8]; + char *p = buf; + + prefix[0]='\0'; + if (domid != DOMID_IDLE) { + snprintf(prefix, 8, "%x:", domid); + p = kdb_guest_addr2sym(addr, domid, &offs); + } else + symbols_lookup(addr, &sz, &offs, buf); + + snprintf(pbuf, 150, "%s%s+%lx", prefix, p, offs); + if (*nl != '\n') + kdbp("%-30s%s", pbuf, nl); /* prints more than 30 if needed */ + else + kdbp("%s%s", pbuf, nl); + +} + +static int +kdb_jump_instr(enum ud_mnemonic_code mnemonic) +{ + return (mnemonic >= UD_Ijo && mnemonic <= UD_Ijmp); +} + +/* + * print one instr: function so that we can print offsets of jmp etc.. as + * symbol+offset instead of just address + */ +static void +kdb_print_one_instr(struct ud *udp, domid_t domid) +{ + signed long val = 0; + ud_type_t type = udp->operand[0].type; + + if ((udp->mnemonic == UD_Icall || kdb_jump_instr(udp->mnemonic)) && + type == UD_OP_JIMM) { + + int sz = udp->operand[0].size; + char *p, ibuf[40], *q = ibuf; + kdbva_t addr; + + if (sz == 8) val = udp->operand[0].lval.sbyte; + else if (sz == 16) val = udp->operand[0].lval.sword; + else if (sz == 32) val = udp->operand[0].lval.sdword; + else if (sz == 64) val = udp->operand[0].lval.sqword; + else kdbp("kdb_print_one_instr: Inval sz:z%d\n", sz); + + addr = udp->pc + val; + for(p=ud_insn_asm(udp); (*q=*p) && *p!=' '; p++,q++); + *q='\0'; + kdbp(" %-4s ", ibuf); /* space before for long func names */ + kdb_prnt_addr2sym(domid, addr, "\n"); + } else + kdbp(" %-24s\n", ud_insn_asm(udp)); +#if 0 + kdbp("mnemonic:z%d ", udp->mnemonic); + if (type == UD_OP_CONST) kdbp("type is const\n"); + else if (type == UD_OP_JIMM) kdbp("type is JIMM\n"); + else if (type == UD_OP_IMM) kdbp("type is IMM\n"); + else if (type == UD_OP_PTR) kdbp("type is PTR\n"); +#endif +} + +static void +kdb_setup_ud(struct ud *udp, kdbva_t addr, domid_t domid) +{ + int bitness = kdb_guest_bitness(domid); + uint vendor = (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ? + UD_VENDOR_AMD : UD_VENDOR_INTEL; + + KDBGP1("setup_ud:domid:%d bitness:%d addr:%lx\n", domid, bitness, addr); + ud_init(udp); + ud_set_mode(udp, kdb_guest_bitness(domid)); + ud_set_syntax(udp, dis_syntax); + ud_set_vendor(udp, vendor); /* HVM: vmx/svm different instrs*/ + ud_set_pc(udp, addr); /* for numbers printed on left */ + ud_set_input_hook(udp, kdb_read_byte_for_ud); + kdb_ud_rd_info.kud_instr_addr = addr; + kdb_ud_rd_info.kud_domid = domid; +} + +/* + * given an addr, print given number of instructions. + * Returns: address of next instruction in the stream + */ +kdbva_t +kdb_print_instr(kdbva_t addr, long num, domid_t domid) +{ + struct ud ud_s; + + KDBGP1("print_instr:addr:0x%lx num:%ld domid:%x\n", addr, num, domid); + + kdb_setup_ud(&ud_s, addr, domid); + while(num--) { + if (ud_disassemble(&ud_s)) { + uint64_t pc = ud_insn_off(&ud_s); + /* kdbp("%08x: ",(int)pc); */ + kdbp("%016lx: ", pc); + kdb_prnt_addr2sym(domid, pc, ""); + kdb_print_one_instr(&ud_s, domid); + } else + kdbp("KDB:Couldn't disassemble PC:0x%lx\n", addr); + /* for stack reads, don't always display error */ + } + KDBGP1("print_instr:kudaddr:0x%lx\n", kdb_ud_rd_info.kud_instr_addr); + return kdb_ud_rd_info.kud_instr_addr; +} + +void +kdb_display_pc(struct cpu_user_regs *regs) +{ + domid_t domid; + struct cpu_user_regs regs1 = *regs; + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + regs1.KDBIP = regs->KDBIP; + kdb_print_instr(regs1.KDBIP, 1, domid); +} + +/* check if the instr at the addr is call instruction + * RETURNS: size of the instr if it's a call instr, else 0 + */ +int +kdb_check_call_instr(domid_t domid, kdbva_t addr) +{ + struct ud ud_s; + int sz; + + kdb_setup_ud(&ud_s, addr, domid); + if ((sz=ud_disassemble(&ud_s)) && ud_s.mnemonic == UD_Icall) + return (sz); + return 0; +} + +/* toggle ATT and Intel syntaxes */ +void +kdb_toggle_dis_syntax(void) +{ + if (dis_syntax == UD_SYN_INTEL) { + dis_syntax = UD_SYN_ATT; + kdbp("dis syntax now set to ATT (Gas)\n"); + } else { + dis_syntax = UD_SYN_INTEL; + kdbp("dis syntax now set to Intel (NASM)\n"); + } +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/syn-att.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-att.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,211 @@ +/* ----------------------------------------------------------------------------- + * syn-att.c + * + * Copyright (c) 2004, 2005, 2006 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 16 : case 32 : + mkasm(u, "*"); break; + default: break; + } +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void +gen_operand(struct ud* u, struct ud_operand* op) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: + if (u->br_far) opr_cast(u, op); + if (u->pfx_seg) + mkasm(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", (-op->lval.sbyte) & 0xff); + else mkasm(u, "0x%x", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "0x%x", op->lval.uword); + else if (op->offset == 32) + mkasm(u, "0x%lx", op->lval.udword); + else if (op->offset == 64) + mkasm(u, "0x" FMT64 "x", op->lval.uqword); + + if (op->base) + mkasm(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]); + if (op->index) { + if (op->base) + mkasm(u, ","); + else mkasm(u, "("); + mkasm(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]); + } + if (op->scale) + mkasm(u, ",%d", op->scale); + if (op->base || op->index) + mkasm(u, ")"); + break; + + case UD_OP_IMM: + switch (op->size) { + case 8: mkasm(u, "$0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "$0x%x", op->lval.uword); break; + case 32: mkasm(u, "$0x%lx", op->lval.udword); break; + case 64: mkasm(u, "$0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "$0x%x, $0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "$0x%x, $0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + default: return; + } +} + +/* ============================================================================= + * translates to AT&T syntax + * ============================================================================= + */ +extern void +ud_translate_att(struct ud *u) +{ + int size = 0; + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + + /* special instructions */ + switch (u->mnemonic) { + case UD_Iretf: + mkasm(u, "lret "); + break; + case UD_Idb: + mkasm(u, ".byte 0x%x", u->operand[0].lval.ubyte); + return; + case UD_Ijmp: + case UD_Icall: + if (u->br_far) mkasm(u, "l"); + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + break; + case UD_Ibound: + case UD_Ienter: + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); + if (u->operand[1].type != UD_NONE) { + mkasm(u, ","); + gen_operand(u, &u->operand[1]); + } + return; + default: + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + } + + if (u->c1) + size = u->operand[0].size; + else if (u->c2) + size = u->operand[1].size; + else if (u->c3) + size = u->operand[2].size; + + if (size == 8) + mkasm(u, "b"); + else if (size == 16) + mkasm(u, "w"); + else if (size == 64) + mkasm(u, "q"); + + mkasm(u, " "); + + if (u->operand[2].type != UD_NONE) { + gen_operand(u, &u->operand[2]); + mkasm(u, ", "); + } + + if (u->operand[1].type != UD_NONE) { + gen_operand(u, &u->operand[1]); + mkasm(u, ", "); + } + + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/syn-intel.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-intel.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,208 @@ +/* ----------------------------------------------------------------------------- + * syn-intel.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 8: mkasm(u, "byte " ); break; + case 16: mkasm(u, "word " ); break; + case 32: mkasm(u, "dword "); break; + case 64: mkasm(u, "qword "); break; + case 80: mkasm(u, "tword "); break; + default: break; + } + if (u->br_far) + mkasm(u, "far "); + else if (u->br_near) + mkasm(u, "near "); +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: { + + int op_f = 0; + + if (syn_cast) + opr_cast(u, op); + + mkasm(u, "["); + + if (u->pfx_seg) + mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + if (op->base) { + mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]); + op_f = 1; + } + + if (op->index) { + if (op_f) + mkasm(u, "+"); + mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]); + op_f = 1; + } + + if (op->scale) + mkasm(u, "*%d", op->scale); + + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", -op->lval.sbyte); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword); + else if (op->offset == 32) { + if (u->adr_mode == 64) { + if (op->lval.sdword < 0) + mkasm(u, "-0x%x", -op->lval.sdword); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword); + } + else mkasm(u, "%s0x%lx", (op_f) ? "+" : "", op->lval.udword); + } + else if (op->offset == 64) + mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", op->lval.uqword); + + mkasm(u, "]"); + break; + } + + case UD_OP_IMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: mkasm(u, "0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "0x%x", op->lval.uword); break; + case 32: mkasm(u, "0x%lx", op->lval.udword); break; + case 64: mkasm(u, "0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + case UD_OP_CONST: + if (syn_cast) opr_cast(u, op); + mkasm(u, "%d", op->lval.udword); + break; + + default: return; + } +} + +/* ============================================================================= + * translates to intel syntax + * ============================================================================= + */ +extern void ud_translate_intel(struct ud* u) +{ + /* -- prefixes -- */ + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + if (u->implicit_addr && u->pfx_seg) + mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + /* print the instruction mnemonic */ + mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic)); + + /* operand 1 */ + if (u->operand[0].type != UD_NONE) { + gen_operand(u, &u->operand[0], u->c1); + } + /* operand 2 */ + if (u->operand[1].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[1], u->c2); + } + + /* operand 3 */ + if (u->operand[2].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[2], u->c3); + } +} diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/syn.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,61 @@ +/* ----------------------------------------------------------------------------- + * syn.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +/* ----------------------------------------------------------------------------- + * Intel Register Table - Order Matters (types.h)! + * ----------------------------------------------------------------------------- + */ +const char* ud_reg_tab[] = +{ + "al", "cl", "dl", "bl", + "ah", "ch", "dh", "bh", + "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", + "r12b", "r13b", "r14b", "r15b", + + "ax", "cx", "dx", "bx", + "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", + "r12w", "r13W" , "r14w", "r15w", + + "eax", "ecx", "edx", "ebx", + "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", + "r12d", "r13d", "r14d", "r15d", + + "rax", "rcx", "rdx", "rbx", + "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", + "r12", "r13", "r14", "r15", + + "es", "cs", "ss", "ds", + "fs", "gs", + + "cr0", "cr1", "cr2", "cr3", + "cr4", "cr5", "cr6", "cr7", + "cr8", "cr9", "cr10", "cr11", + "cr12", "cr13", "cr14", "cr15", + + "dr0", "dr1", "dr2", "dr3", + "dr4", "dr5", "dr6", "dr7", + "dr8", "dr9", "dr10", "dr11", + "dr12", "dr13", "dr14", "dr15", + + "mm0", "mm1", "mm2", "mm3", + "mm4", "mm5", "mm6", "mm7", + + "st0", "st1", "st2", "st3", + "st4", "st5", "st6", "st7", + + "xmm0", "xmm1", "xmm2", "xmm3", + "xmm4", "xmm5", "xmm6", "xmm7", + "xmm8", "xmm9", "xmm10", "xmm11", + "xmm12", "xmm13", "xmm14", "xmm15", + + "rip" +}; diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/syn.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,27 @@ +/* ----------------------------------------------------------------------------- + * syn.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_SYN_H +#define UD_SYN_H + +#if 0 +#include +#include +#endif +#include "types.h" + +extern const char* ud_reg_tab[]; + +static void mkasm(struct ud* u, const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + u->insn_fill += vsnprintf((char*) u->insn_buffer + u->insn_fill, 64, fmt, ap); + va_end(ap); +} + +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/types.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/types.h Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,186 @@ +/* ----------------------------------------------------------------------------- + * types.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_TYPES_H +#define UD_TYPES_H + + +#include "../../include/kdbinc.h" + +#define FMT64 "%ll" +#include "itab.h" + +/* ----------------------------------------------------------------------------- + * All possible "types" of objects in udis86. Order is Important! + * ----------------------------------------------------------------------------- + */ +enum ud_type +{ + UD_NONE, + + /* 8 bit GPRs */ + UD_R_AL, UD_R_CL, UD_R_DL, UD_R_BL, + UD_R_AH, UD_R_CH, UD_R_DH, UD_R_BH, + UD_R_SPL, UD_R_BPL, UD_R_SIL, UD_R_DIL, + UD_R_R8B, UD_R_R9B, UD_R_R10B, UD_R_R11B, + UD_R_R12B, UD_R_R13B, UD_R_R14B, UD_R_R15B, + + /* 16 bit GPRs */ + UD_R_AX, UD_R_CX, UD_R_DX, UD_R_BX, + UD_R_SP, UD_R_BP, UD_R_SI, UD_R_DI, + UD_R_R8W, UD_R_R9W, UD_R_R10W, UD_R_R11W, + UD_R_R12W, UD_R_R13W, UD_R_R14W, UD_R_R15W, + + /* 32 bit GPRs */ + UD_R_EAX, UD_R_ECX, UD_R_EDX, UD_R_EBX, + UD_R_ESP, UD_R_EBP, UD_R_ESI, UD_R_EDI, + UD_R_R8D, UD_R_R9D, UD_R_R10D, UD_R_R11D, + UD_R_R12D, UD_R_R13D, UD_R_R14D, UD_R_R15D, + + /* 64 bit GPRs */ + UD_R_RAX, UD_R_RCX, UD_R_RDX, UD_R_RBX, + UD_R_RSP, UD_R_RBP, UD_R_RSI, UD_R_RDI, + UD_R_R8, UD_R_R9, UD_R_R10, UD_R_R11, + UD_R_R12, UD_R_R13, UD_R_R14, UD_R_R15, + + /* segment registers */ + UD_R_ES, UD_R_CS, UD_R_SS, UD_R_DS, + UD_R_FS, UD_R_GS, + + /* control registers*/ + UD_R_CR0, UD_R_CR1, UD_R_CR2, UD_R_CR3, + UD_R_CR4, UD_R_CR5, UD_R_CR6, UD_R_CR7, + UD_R_CR8, UD_R_CR9, UD_R_CR10, UD_R_CR11, + UD_R_CR12, UD_R_CR13, UD_R_CR14, UD_R_CR15, + + /* debug registers */ + UD_R_DR0, UD_R_DR1, UD_R_DR2, UD_R_DR3, + UD_R_DR4, UD_R_DR5, UD_R_DR6, UD_R_DR7, + UD_R_DR8, UD_R_DR9, UD_R_DR10, UD_R_DR11, + UD_R_DR12, UD_R_DR13, UD_R_DR14, UD_R_DR15, + + /* mmx registers */ + UD_R_MM0, UD_R_MM1, UD_R_MM2, UD_R_MM3, + UD_R_MM4, UD_R_MM5, UD_R_MM6, UD_R_MM7, + + /* x87 registers */ + UD_R_ST0, UD_R_ST1, UD_R_ST2, UD_R_ST3, + UD_R_ST4, UD_R_ST5, UD_R_ST6, UD_R_ST7, + + /* extended multimedia registers */ + UD_R_XMM0, UD_R_XMM1, UD_R_XMM2, UD_R_XMM3, + UD_R_XMM4, UD_R_XMM5, UD_R_XMM6, UD_R_XMM7, + UD_R_XMM8, UD_R_XMM9, UD_R_XMM10, UD_R_XMM11, + UD_R_XMM12, UD_R_XMM13, UD_R_XMM14, UD_R_XMM15, + + UD_R_RIP, + + /* Operand Types */ + UD_OP_REG, UD_OP_MEM, UD_OP_PTR, UD_OP_IMM, + UD_OP_JIMM, UD_OP_CONST +}; + +/* ----------------------------------------------------------------------------- + * struct ud_operand - Disassembled instruction Operand. + * ----------------------------------------------------------------------------- + */ +struct ud_operand +{ + enum ud_type type; + uint8_t size; + union { + int8_t sbyte; + uint8_t ubyte; + int16_t sword; + uint16_t uword; + int32_t sdword; + uint32_t udword; + int64_t sqword; + uint64_t uqword; + + struct { + uint16_t seg; + uint32_t off; + } ptr; + } lval; + + enum ud_type base; + enum ud_type index; + uint8_t offset; + uint8_t scale; +}; + +/* ----------------------------------------------------------------------------- + * struct ud - The udis86 object. + * ----------------------------------------------------------------------------- + */ +struct ud +{ + int (*inp_hook) (struct ud*); + uint8_t inp_curr; + uint8_t inp_fill; + uint8_t inp_ctr; + uint8_t* inp_buff; + uint8_t* inp_buff_end; + uint8_t inp_end; + void (*translator)(struct ud*); + uint64_t insn_offset; + char insn_hexcode[32]; + char insn_buffer[64]; + unsigned int insn_fill; + uint8_t dis_mode; + uint64_t pc; + uint8_t vendor; + struct map_entry* mapen; + enum ud_mnemonic_code mnemonic; + struct ud_operand operand[3]; + uint8_t error; + uint8_t pfx_rex; + uint8_t pfx_seg; + uint8_t pfx_opr; + uint8_t pfx_adr; + uint8_t pfx_lock; + uint8_t pfx_rep; + uint8_t pfx_repe; + uint8_t pfx_repne; + uint8_t pfx_insn; + uint8_t default64; + uint8_t opr_mode; + uint8_t adr_mode; + uint8_t br_far; + uint8_t br_near; + uint8_t implicit_addr; + uint8_t c1; + uint8_t c2; + uint8_t c3; + uint8_t inp_cache[256]; + uint8_t inp_sess[64]; + struct ud_itab_entry * itab_entry; +}; + +/* ----------------------------------------------------------------------------- + * Type-definitions + * ----------------------------------------------------------------------------- + */ +typedef enum ud_type ud_type_t; +typedef enum ud_mnemonic_code ud_mnemonic_code_t; + +typedef struct ud ud_t; +typedef struct ud_operand ud_operand_t; + +#define UD_SYN_INTEL ud_translate_intel +#define UD_SYN_ATT ud_translate_att +#define UD_EOI -1 +#define UD_INP_CACHE_SZ 32 +#define UD_VENDOR_AMD 0 +#define UD_VENDOR_INTEL 1 + +#define bail_out(ud,error_code) longjmp( (ud)->bailout, error_code ) +#define try_decode(ud) if ( setjmp( (ud)->bailout ) == 0 ) +#define catch_error() else + +#endif diff -r 32034d1914a6 -r e4b01842b71c xen/kdb/x86/udis86-1.7/udis86.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/udis86.c Fri Jun 08 10:56:24 2012 -0700 @@ -0,0 +1,156 @@ +/* ----------------------------------------------------------------------------- + * udis86.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#include +#endif + +#include "input.h" +#include "extern.h" + +/* ============================================================================= + * ud_init() - Initializes ud_t object. + * ============================================================================= + */ +extern void +ud_init(struct ud* u) +{ + memset((void*)u, 0, sizeof(struct ud)); + ud_set_mode(u, 16); + u->mnemonic = UD_Iinvalid; + ud_set_pc(u, 0); +#ifndef __UD_STANDALONE__ + ud_set_input_file(u, stdin); +#endif /* __UD_STANDALONE__ */ +} + +/* ============================================================================= + * ud_disassemble() - disassembles one instruction and returns the number of + * bytes disassembled. A zero means end of disassembly. + * ============================================================================= + */ +extern unsigned int +ud_disassemble(struct ud* u) +{ + if (ud_input_end(u)) + return 0; + + + u->insn_buffer[0] = u->insn_hexcode[0] = 0; + + + if (ud_decode(u) == 0) + return 0; + if (u->translator) + u->translator(u); + return ud_insn_len(u); +} + +/* ============================================================================= + * ud_set_mode() - Set Disassemly Mode. + * ============================================================================= + */ +extern void +ud_set_mode(struct ud* u, uint8_t m) +{ + switch(m) { + case 16: + case 32: + case 64: u->dis_mode = m ; return; + default: u->dis_mode = 16; return; + } +} + +/* ============================================================================= + * ud_set_vendor() - Set vendor. + * ============================================================================= + */ +extern void +ud_set_vendor(struct ud* u, unsigned v) +{ + switch(v) { + case UD_VENDOR_INTEL: + u->vendor = v; + break; + default: + u->vendor = UD_VENDOR_AMD; + } +} + +/* ============================================================================= + * ud_set_pc() - Sets code origin. + * ============================================================================= + */ +extern void +ud_set_pc(struct ud* u, uint64_t o) +{ + u->pc = o; +} + +/* ============================================================================= + * ud_set_syntax() - Sets the output syntax. + * ============================================================================= + */ +extern void +ud_set_syntax(struct ud* u, void (*t)(struct ud*)) +{ + u->translator = t; +} + +/* ============================================================================= + * ud_insn() - returns the disassembled instruction + * ============================================================================= + */ +extern char* +ud_insn_asm(struct ud* u) +{ + return u->insn_buffer; +} + +/* ============================================================================= + * ud_insn_offset() - Returns the offset. + * ============================================================================= + */ +extern uint64_t +ud_insn_off(struct ud* u) +{ + return u->insn_offset; +} + + +/* ============================================================================= + * ud_insn_hex() - Returns hex form of disassembled instruction. + * ============================================================================= + */ +extern char* +ud_insn_hex(struct ud* u) +{ + return u->insn_hexcode; +} + +/* ============================================================================= + * ud_insn_ptr() - Returns code disassembled. + * ============================================================================= + */ +extern uint8_t* +ud_insn_ptr(struct ud* u) +{ + return u->inp_sess; +} + +/* ============================================================================= + * ud_insn_len() - Returns the count of bytes disassembled. + * ============================================================================= + */ +extern unsigned int +ud_insn_len(struct ud* u) +{ + return u->inp_ctr; +} --MP_/X3qA/jwEscosmMB+TVJPo3b Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --MP_/X3qA/jwEscosmMB+TVJPo3b-- From xen-users-bounces@lists.xen.org Fri Jun 15 12:49:35 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 Jun 2012 12:49:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SfVwX-0003Jv-Bs; Fri, 15 Jun 2012 12:48:02 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SerdP-0006pM-AN for xen-users@lists.xen.org; Wed, 13 Jun 2012 17:45:38 +0000 Received: from [85.158.139.83:45104] by server-12.bemta-5.messagelabs.com id 14/25-12933-DB1D8DF4; Wed, 13 Jun 2012 17:45:33 +0000 X-Env-Sender: kacper@kacper.se X-Msg-Ref: server-2.tower-182.messagelabs.com!1339609487!27513613!1 X-Originating-IP: [209.85.210.45] X-SpamReason: No, hits=0.0 required=7.0 tests=Mail larger than overall mail size limit X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 8121 invoked from network); 13 Jun 2012 17:44:48 -0000 Received: from mail-pz0-f45.google.com (HELO mail-pz0-f45.google.com) (209.85.210.45) by server-2.tower-182.messagelabs.com with RC4-SHA encrypted SMTP; 13 Jun 2012 17:44:48 -0000 Received: by dadn2 with SMTP id n2so312481dad.32 for ; Wed, 13 Jun 2012 10:44:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:x-gm-message-state; bh=LHjDQ5Jn9TQa6K2RVglCo3ih6cazq6wj3QhsjtAkuC4=; b=S4SIVOTw2C81xh8psIsr8A9ByG6MUiH5vw6L1xDKWC3u/zQUB2w0fE0tGVjpxFQF+X 8iRPjW4314SgmX8YFj1ucmCa8R5IVjhvf8oPzyntoT9sIQMb2zaOLFX+hZijFGDP7wbL kRiHgyssrigyF3b38w6kOWKwJDZKS0EmsTgZtWB/AHjE1MR7Oy5pZW7Y0LmgtFOTMA3h 6JRqsJyVrCjIJg5JE230m+wbL0izn64Ht1FpIv/zg2t08KScNObSS9a+J5ZcD10NnGTt 6knWyAJs/s02RJmG1VO6P4Kq+KWVZhneIrG+dN96B2l64S6yl6AsfdtWmr2KrWLJepqx vuug== MIME-Version: 1.0 Received: by 10.68.232.232 with SMTP id tr8mr52969093pbc.73.1339609485826; Wed, 13 Jun 2012 10:44:45 -0700 (PDT) Received: by 10.68.46.129 with HTTP; Wed, 13 Jun 2012 10:44:43 -0700 (PDT) In-Reply-To: References: Date: Wed, 13 Jun 2012 19:44:43 +0200 Message-ID: From: Kacper To: Casey DeLorme Content-Type: multipart/mixed; boundary=047d7b33cf6c8a66a504c25e2359 X-Gm-Message-State: ALoCoQkJdZGbnQEkXWGygOpWiLD74Mh9Ja7DaMMFJe75VP5l8fS+2iCqP2SL79sPrOjG7axm81H+ X-Mailman-Approved-At: Fri, 15 Jun 2012 12:47:40 +0000 Cc: xen-users@lists.xen.org Subject: Re: [Xen-users] xen i/o errors X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --047d7b33cf6c8a66a504c25e2359 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi, I tried to make a debug trace of xend and I think I found something relevan= t. --- Traceback (most recent call last): File "/usr/lib/xen-4.0/lib/python/xen/xend/xenstore/xswatch.py", line 63, in watchMain we =3D xs.read_watch() Error: (22, 'Invalid argument') --- Can this be causing the machine to hang (it appears multiple times in the trace, and the trace ends with this error)? I've attached the whole log, if someone more xen dev involved would take a look. On Tue, Jun 12, 2012 at 1:14 AM, Casey DeLorme wrote: > Thanks, that helped me begin looking for you. > > Unfortunately going on these posts your hardware may not work with Xen ou= t > of the box: > http://www.linuxquestions.org/questions/linux-virtualization-90/xen-on-de= bian-hangs-my-machine-4175410758/ > > http://old-list-archives.xen.org/archives/html/xen-users/2010-07/msg00696= .html > http://old-list-archives.xen.org/archives/html/xen-users/2010-07/msg00699= .html > > No responses to a 2010 post is not promising, but the second of the two > archived messages states that there is no hardware virtualization on the > PowerEdge 2600. > > Not sure where to proceed from here, I have never used server hardware. > > On Mon, Jun 11, 2012 at 7:00 PM, Kacper wrote: >> >> Thanks, >> >> Let's see now. >> >> Xen version: xen-hypervisor-4.0-i386 (4.0.1-4) >> Kernel: 3.2+44~bpo60+1 (debian squeeze backport) >> >> It was all installed using apt-get (eg. the package manager). >> >> The system I have xen troubles with is a Dell PowerEdge 2600 (32-bit, >> 2 x 1 Xeon. no Intel Vt-d) with a via_sata controller and two sata >> drives. >> >> Intel IOMMU, doesn't that require Intel Vt-d? >> >> Please let me know if there is more information I can provide. >> >> On Tue, Jun 12, 2012 at 12:40 AM, Casey DeLorme >> wrote: >> > Hello, >> > >> > Additional information about your hardware might help others debug the >> > situation. >> > >> > What version of Xen are you using? =A0Are you compiling or is it from = the >> > package manager? >> > >> > >> > I have experienced a DMA READ issue before but I have no idea if it is >> > relative to your configuration. =A0Something to do with a Marvell SATA >> > controller and intel's IOMMU, which was optional when compiling the >> > kernel >> > but required fror VT-d/IOMMU Passthrough. >> > >> > I don't know if that is much help to you, but feel free to add more >> > system >> > information to help everyone debug. >> > >> > ~Casey >> > >> > On Mon, Jun 11, 2012 at 4:59 AM, Kacper wrote: >> >> >> >> Hello, >> >> I've been trying to setup xen on Debian Squeeze but it isn't going th= at >> >> well. >> >> When booting with the xen/hypervisor kernel the system hangs with i/o >> >> errors thrown in console. The standard kernel is working fine and the >> >> disk has been tested and swapped. >> >> Errors include: >> >> ata1.00: failed command: READ DMA >> >> task xend:1404 blocked for more than 120 seconds >> >> Buffer I/O error on device sda1 >> >> end_request: I/O error, dev sda >> >> >> >> _______________________________________________ >> >> Xen-users mailing list >> >> Xen-users@lists.xen.org >> >> http://lists.xen.org/xen-users >> > >> > >> >> _______________________________________________ >> Xen-users mailing list >> Xen-users@lists.xen.org >> http://lists.xen.org/xen-users > > --047d7b33cf6c8a66a504c25e2359 Content-Type: text/plain; charset=US-ASCII; name="xend.trace.txt" Content-Disposition: attachment; filename="xend.trace.txt" Content-Transfer-Encoding: base64 X-Attachment-Id: f_h3eouahs0 TWFpblRocmVhZDogfD4gc2VydmVyL1NydkRhZW1vbi5weTpydW4KTWFpblRocmVhZDogfCAzMzEg ICAgICAgICB0cnk6Ck1haW5UaHJlYWQ6IHwgMzMyICAgICAgICAgICAgIGxvZy5pbmZvKCJYZW5k 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_______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users --047d7b33cf6c8a66a504c25e2359-- From xen-devel-bounces@lists.xen.org Mon Jun 18 11:27:50 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 Jun 2012 11:27:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Sga79-0008Kb-Il; Mon, 18 Jun 2012 11:27:23 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SfbzF-00009y-7i for xen-devel@lists.xensource.com; Fri, 15 Jun 2012 19:15:14 +0000 Received: from [85.158.143.99:10971] by server-2.bemta-4.messagelabs.com id 57/1F-17938-0C98BDF4; Fri, 15 Jun 2012 19:15:12 +0000 X-Env-Sender: mukesh.rathor@oracle.com X-Msg-Ref: server-9.tower-216.messagelabs.com!1339787708!27616580!1 X-Originating-IP: [141.146.126.227] X-SpamReason: No, hits=0.0 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by acsmt358.oracle.com (8.12.11.20060308/8.12.11) with ESMTP id q5FJExUs028435; Fri, 15 Jun 2012 14:14:59 -0500 Received: from mantra.us.oracle.com (/130.35.68.95) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Fri, 15 Jun 2012 12:14:58 -0700 Date: Fri, 15 Jun 2012 12:14:56 -0700 From: Mukesh Rathor To: Konrad Rzeszutek Wilk Message-ID: <20120615121456.3f0089ad@mantra.us.oracle.com> In-Reply-To: <20120615155844.GB20422@phenom.dumpdata.com> References: <20120614151148.Horde.haVTPcL8999P2eMUDQK1xEA@webmail.df.eu> <20120615155844.GB20422@phenom.dumpdata.com> Organization: Oracle Corporation X-Mailer: Claws Mail 3.7.6 (GTK+ 2.18.9; x86_64-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="MP_/c2HycnF26WhVANwYZbmqoQR" X-Source-IP: ucsinet22.oracle.com [156.151.31.94] X-Mailman-Approved-At: Mon, 18 Jun 2012 11:27:21 +0000 Cc: xen-devel@lists.xensource.com, ml@consolo.de Subject: Re: [Xen-devel] using kdb with current xen release X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --MP_/c2HycnF26WhVANwYZbmqoQR Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Disposition: inline On Fri, 15 Jun 2012 11:58:44 -0400 Konrad Rzeszutek Wilk wrote: > On Thu, Jun 14, 2012 at 03:11:48PM +0200, ml@consolo.de wrote: > > > > Hi, > > > > I am currently trying to get kdb working with the current 4.1 XEN > > release. I first tried to use debuggers.hg, but could not manage to > > compile it due tho many different errors. > > Did you email the author (Mukesh) of debuggers.hg to see if he can > help? > I just posted a patch for unstable c/s 25467 last week. Attached here again. thanks, Mukesh --MP_/c2HycnF26WhVANwYZbmqoQR Content-Type: text/x-patch Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=kdb.patch diff -r 32034d1914a6 xen/Makefile --- a/xen/Makefile Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/Makefile Fri Jun 15 12:13:29 2012 -0700 @@ -61,6 +61,7 @@ _clean: delete-unfresh-files $(MAKE) -f $(BASEDIR)/Rules.mk -C xsm clean $(MAKE) -f $(BASEDIR)/Rules.mk -C crypto clean $(MAKE) -f $(BASEDIR)/Rules.mk -C arch/$(TARGET_ARCH) clean + $(MAKE) -f $(BASEDIR)/Rules.mk -C kdb clean rm -f include/asm *.o $(TARGET) $(TARGET).gz $(TARGET)-syms *~ core rm -f include/asm-*/asm-offsets.h [ -d tools/figlet ] && rm -f .banner* @@ -129,7 +130,7 @@ include/asm-$(TARGET_ARCH)/asm-offsets.h echo ""; \ echo "#endif") <$< >$@ -SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers +SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers kdb define all_sources ( find include/asm-$(TARGET_ARCH) -name '*.h' -print; \ find include -name 'asm-*' -prune -o -name '*.h' -print; \ diff -r 32034d1914a6 xen/Rules.mk --- a/xen/Rules.mk Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/Rules.mk Fri Jun 15 12:13:29 2012 -0700 @@ -10,6 +10,7 @@ lock_profile ?= n crash_debug ?= n frame_pointer ?= n lto ?= n +kdb ?= n include $(XEN_ROOT)/Config.mk @@ -40,6 +41,7 @@ ALL_OBJS-y += $(BASEDIR)/d ALL_OBJS-y += $(BASEDIR)/xsm/built_in.o ALL_OBJS-y += $(BASEDIR)/arch/$(TARGET_ARCH)/built_in.o ALL_OBJS-$(x86) += $(BASEDIR)/crypto/built_in.o +ALL_OBJS-$(kdb) += $(BASEDIR)/kdb/built_in.o CFLAGS-y += -g -D__XEN__ -include $(BASEDIR)/include/xen/config.h CFLAGS-$(XSM_ENABLE) += -DXSM_ENABLE @@ -53,6 +55,7 @@ CFLAGS-$(lock_profile) += -DLOCK_PROFIL CFLAGS-$(HAS_ACPI) += -DHAS_ACPI CFLAGS-$(HAS_PASSTHROUGH) += -DHAS_PASSTHROUGH CFLAGS-$(frame_pointer) += -fno-omit-frame-pointer -DCONFIG_FRAME_POINTER +CFLAGS-$(kdb) += -DXEN_KDB_CONFIG ifneq ($(max_phys_cpus),) CFLAGS-y += -DMAX_PHYS_CPUS=$(max_phys_cpus) diff -r 32034d1914a6 xen/arch/x86/hvm/svm/entry.S --- a/xen/arch/x86/hvm/svm/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/entry.S Fri Jun 15 12:13:29 2012 -0700 @@ -59,12 +59,23 @@ ENTRY(svm_asm_do_resume) get_current(bx) CLGI +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) testl $~0,(r(dx),r(ax),1) jnz .Lsvm_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0, VCPU_nsvm_hap_enabled(r(bx)) UNLIKELY_START(nz, nsvm_hap) mov VCPU_nhvm_p2m(r(bx)),r(ax) diff -r 32034d1914a6 xen/arch/x86/hvm/svm/svm.c --- a/xen/arch/x86/hvm/svm/svm.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/svm.c Fri Jun 15 12:13:29 2012 -0700 @@ -2170,6 +2170,10 @@ void svm_vmexit_handler(struct cpu_user_ break; case VMEXIT_EXCEPTION_DB: +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( !v->domain->debugger_attached ) goto exit_and_crash; domain_pause_for_debugger(); @@ -2182,6 +2186,10 @@ void svm_vmexit_handler(struct cpu_user_ if ( (inst_len = __get_instruction_length(v, INSTR_INT3)) == 0 ) break; __update_guest_eip(regs, inst_len); +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(TRAP_int3, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; diff -r 32034d1914a6 xen/arch/x86/hvm/svm/vmcb.c --- a/xen/arch/x86/hvm/svm/vmcb.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/svm/vmcb.c Fri Jun 15 12:13:29 2012 -0700 @@ -315,6 +315,36 @@ void setup_vmcb_dump(void) register_keyhandler('v', &vmcb_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +/* did == 0 : display for all HVM domains. domid 0 is never HVM. + * * vid == -1 : display for all HVM VCPUs + * */ +void kdb_dump_vmcb(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + + rcu_read_lock(&domlist_read_lock); + for_each_domain (dp) { + if (!is_hvm_or_hyb_domain(dp) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + kdbp(" VMCB [domid: %d vcpu:%d]:\n", dp->domain_id, vp->vcpu_id); + svm_vmcb_dump("kdb", vp->arch.hvm_svm.vmcb); + kdbp("\n"); + } + kdbp("\n"); + } + rcu_read_unlock(&domlist_read_lock); +} +#endif + /* * Local variables: * mode: C diff -r 32034d1914a6 xen/arch/x86/hvm/vmx/entry.S --- a/xen/arch/x86/hvm/vmx/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/entry.S Fri Jun 15 12:13:29 2012 -0700 @@ -124,12 +124,23 @@ vmx_asm_do_vmentry: get_current(bx) cli +#ifdef XEN_KDB_CONFIG +#if defined(__x86_64__) + testl $1, kdb_session_begun(%rip) +#else + testl $1, kdb_session_begun +#endif + jnz .Lkdb_skip_softirq +#endif mov VCPU_processor(r(bx)),%eax shl $IRQSTAT_shift,r(ax) lea addr_of(irq_stat),r(dx) cmpl $0,(r(dx),r(ax),1) jnz .Lvmx_process_softirqs +#ifdef XEN_KDB_CONFIG +.Lkdb_skip_softirq: +#endif testb $0xff,VCPU_vmx_emulate(r(bx)) jnz .Lvmx_goto_emulator testb $0xff,VCPU_vmx_realmode(r(bx)) diff -r 32034d1914a6 xen/arch/x86/hvm/vmx/vmcs.c --- a/xen/arch/x86/hvm/vmx/vmcs.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Fri Jun 15 12:13:29 2012 -0700 @@ -1117,6 +1117,13 @@ void vmx_do_resume(struct vcpu *v) hvm_asid_flush_vcpu(v); } +#if defined(XEN_KDB_CONFIG) + if (kdb_dr7) + __vmwrite(GUEST_DR7, kdb_dr7); + else + __vmwrite(GUEST_DR7, 0); +#endif + debug_state = v->domain->debugger_attached || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_INT3] || v->domain->arch.hvm_domain.params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]; @@ -1326,6 +1333,220 @@ void setup_vmcs_dump(void) register_keyhandler('v', &vmcs_dump_keyhandler); } +#if defined(XEN_KDB_CONFIG) +#define GUEST_EFER 0x2806 /* see page 23-20 */ +#define GUEST_EFER_HIGH 0x2807 /* see page 23-20 */ + +/* it's a shame we can't use vmcs_dump_vcpu(), but it does vmx_vmcs_enter which + * will IPI other CPUs. also, print a subset relevant to software debugging */ +static void noinline kdb_print_vmcs(struct vcpu *vp) +{ + struct cpu_user_regs *regs = &vp->arch.user_regs; + unsigned long long x; + + kdbp("*** Guest State ***\n"); + kdbp("CR0: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR0), + (unsigned long long)vmr(CR0_READ_SHADOW), + (unsigned long long)vmr(CR0_GUEST_HOST_MASK)); + kdbp("CR4: actual=0x%016llx, shadow=0x%016llx, gh_mask=%016llx\n", + (unsigned long long)vmr(GUEST_CR4), + (unsigned long long)vmr(CR4_READ_SHADOW), + (unsigned long long)vmr(CR4_GUEST_HOST_MASK)); + kdbp("CR3: actual=0x%016llx, target_count=%d\n", + (unsigned long long)vmr(GUEST_CR3), + (int)vmr(CR3_TARGET_COUNT)); + kdbp(" target0=%016llx, target1=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE0), + (unsigned long long)vmr(CR3_TARGET_VALUE1)); + kdbp(" target2=%016llx, target3=%016llx\n", + (unsigned long long)vmr(CR3_TARGET_VALUE2), + (unsigned long long)vmr(CR3_TARGET_VALUE3)); + kdbp("RSP = 0x%016llx (0x%016llx) RIP = 0x%016llx (0x%016llx)\n", + (unsigned long long)vmr(GUEST_RSP), + (unsigned long long)regs->esp, + (unsigned long long)vmr(GUEST_RIP), + (unsigned long long)regs->eip); + kdbp("RFLAGS=0x%016llx (0x%016llx) DR7 = 0x%016llx\n", + (unsigned long long)vmr(GUEST_RFLAGS), + (unsigned long long)regs->eflags, + (unsigned long long)vmr(GUEST_DR7)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(GUEST_SYSENTER_ESP), + (int)vmr(GUEST_SYSENTER_CS), + (unsigned long long)vmr(GUEST_SYSENTER_EIP)); + vmx_dump_sel("CS", GUEST_CS_SELECTOR); + vmx_dump_sel("DS", GUEST_DS_SELECTOR); + vmx_dump_sel("SS", GUEST_SS_SELECTOR); + vmx_dump_sel("ES", GUEST_ES_SELECTOR); + vmx_dump_sel("FS", GUEST_FS_SELECTOR); + vmx_dump_sel("GS", GUEST_GS_SELECTOR); + vmx_dump_sel2("GDTR", GUEST_GDTR_LIMIT); + vmx_dump_sel("LDTR", GUEST_LDTR_SELECTOR); + vmx_dump_sel2("IDTR", GUEST_IDTR_LIMIT); + vmx_dump_sel("TR", GUEST_TR_SELECTOR); + kdbp("Guest EFER = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_EFER_HIGH), (uint32_t)vmr(GUEST_EFER)); + kdbp("Guest PAT = 0x%08x%08x\n", + (uint32_t)vmr(GUEST_PAT_HIGH), (uint32_t)vmr(GUEST_PAT)); + x = (unsigned long long)vmr(TSC_OFFSET_HIGH) << 32; + x |= (uint32_t)vmr(TSC_OFFSET); + kdbp("TSC Offset = %016llx\n", x); + x = (unsigned long long)vmr(GUEST_IA32_DEBUGCTL_HIGH) << 32; + x |= (uint32_t)vmr(GUEST_IA32_DEBUGCTL); + kdbp("DebugCtl=%016llx DebugExceptions=%016llx\n", x, + (unsigned long long)vmr(GUEST_PENDING_DBG_EXCEPTIONS)); + kdbp("Interruptibility=%04x ActivityState=%04x\n", + (int)vmr(GUEST_INTERRUPTIBILITY_INFO), + (int)vmr(GUEST_ACTIVITY_STATE)); + + kdbp("MSRs: entry_load:$%d exit_load:$%d exit_store:$%d\n", + vmr(VM_ENTRY_MSR_LOAD_COUNT), vmr(VM_EXIT_MSR_LOAD_COUNT), + vmr(VM_EXIT_MSR_STORE_COUNT)); + + kdbp("\n*** Host State ***\n"); + kdbp("RSP = 0x%016llx RIP = 0x%016llx\n", + (unsigned long long)vmr(HOST_RSP), + (unsigned long long)vmr(HOST_RIP)); + kdbp("CS=%04x DS=%04x ES=%04x FS=%04x GS=%04x SS=%04x TR=%04x\n", + (uint16_t)vmr(HOST_CS_SELECTOR), + (uint16_t)vmr(HOST_DS_SELECTOR), + (uint16_t)vmr(HOST_ES_SELECTOR), + (uint16_t)vmr(HOST_FS_SELECTOR), + (uint16_t)vmr(HOST_GS_SELECTOR), + (uint16_t)vmr(HOST_SS_SELECTOR), + (uint16_t)vmr(HOST_TR_SELECTOR)); + kdbp("FSBase=%016llx GSBase=%016llx TRBase=%016llx\n", + (unsigned long long)vmr(HOST_FS_BASE), + (unsigned long long)vmr(HOST_GS_BASE), + (unsigned long long)vmr(HOST_TR_BASE)); + kdbp("GDTBase=%016llx IDTBase=%016llx\n", + (unsigned long long)vmr(HOST_GDTR_BASE), + (unsigned long long)vmr(HOST_IDTR_BASE)); + kdbp("CR0=%016llx CR3=%016llx CR4=%016llx\n", + (unsigned long long)vmr(HOST_CR0), + (unsigned long long)vmr(HOST_CR3), + (unsigned long long)vmr(HOST_CR4)); + kdbp("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", + (unsigned long long)vmr(HOST_SYSENTER_ESP), + (int)vmr(HOST_SYSENTER_CS), + (unsigned long long)vmr(HOST_SYSENTER_EIP)); + kdbp("Host PAT = 0x%08x%08x\n", + (uint32_t)vmr(HOST_PAT_HIGH), (uint32_t)vmr(HOST_PAT)); + + kdbp("\n*** Control State ***\n"); + kdbp("PinBased=%08x CPUBased=%08x SecondaryExec=%08x\n", + (uint32_t)vmr(PIN_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(CPU_BASED_VM_EXEC_CONTROL), + (uint32_t)vmr(SECONDARY_VM_EXEC_CONTROL)); + kdbp("EntryControls=%08x ExitControls=%08x\n", + (uint32_t)vmr(VM_ENTRY_CONTROLS), + (uint32_t)vmr(VM_EXIT_CONTROLS)); + kdbp("ExceptionBitmap=%08x\n", + (uint32_t)vmr(EXCEPTION_BITMAP)); + kdbp("PAGE_FAULT_ERROR_CODE MASK:0x%lx MATCH:0x%lx\n", + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MASK), + (unsigned long)vmr(PAGE_FAULT_ERROR_CODE_MATCH)); + kdbp("VMEntry: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_ENTRY_INTR_INFO), + (uint32_t)vmr(VM_ENTRY_EXCEPTION_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp("VMExit: intr_info=%08x errcode=%08x ilen=%08x\n", + (uint32_t)vmr(VM_EXIT_INTR_INFO), + (uint32_t)vmr(VM_EXIT_INTR_ERROR_CODE), + (uint32_t)vmr(VM_ENTRY_INSTRUCTION_LEN)); + kdbp(" reason=%08x qualification=%08x\n", + (uint32_t)vmr(VM_EXIT_REASON), + (uint32_t)vmr(EXIT_QUALIFICATION)); + kdbp("IDTVectoring: info=%08x errcode=%08x\n", + (uint32_t)vmr(IDT_VECTORING_INFO), + (uint32_t)vmr(IDT_VECTORING_ERROR_CODE)); + kdbp("TPR Threshold = 0x%02x\n", + (uint32_t)vmr(TPR_THRESHOLD)); + kdbp("EPT pointer = 0x%08x%08x\n", + (uint32_t)vmr(EPT_POINTER_HIGH), (uint32_t)vmr(EPT_POINTER)); + kdbp("Virtual processor ID = 0x%04x\n", + (uint32_t)vmr(VIRTUAL_PROCESSOR_ID)); + kdbp("=================================================================\n"); +} + +/* Flush VMCS on this cpu if it needs to: + * - Upon leaving kdb, the HVM cpu will resume in vmx_vmexit_handler() and + * do __vmreads. So, the VMCS pointer can't be left cleared. + * - Doing __vmpclear will set the vmx state to 'clear', so to resume a + * vmlaunch must be done and not vmresume. This means, we must clear + * arch_vmx->launched. + */ +void kdb_curr_cpu_flush_vmcs(void) +{ + struct domain *dp; + struct vcpu *vp; + int ccpu = smp_processor_id(); + struct vmcs_struct *cvp = this_cpu(current_vmcs); + + if (this_cpu(current_vmcs) == NULL) + return; /* no HVM active on this CPU */ + + kdbp("KDB:[%d] curvmcs:%lx/%lx\n", ccpu, cvp, virt_to_maddr(cvp)); + + /* looks like we got one. unfortunately, current_vmcs points to vmcs + * and not VCPU, so we gotta search the entire list... */ + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + for_each_vcpu (dp, vp) { + if ( vp->arch.hvm_vmx.vmcs == cvp ) { + __vmpclear(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + __vmptrld(virt_to_maddr(vp->arch.hvm_vmx.vmcs)); + vp->arch.hvm_vmx.launched = 0; + this_cpu(current_vmcs) = NULL; + kdbp("KDB:[%d] %d:%d current_vmcs:%lx flushed\n", + ccpu, dp->domain_id, vp->vcpu_id, cvp, virt_to_maddr(cvp)); + } + } + } +} + +/* + * domid == 0 : display for all HVM domains (dom0 is never an HVM domain) + * vcpu id == -1 : display all vcpuids + * PreCondition: all HVM cpus (including current cpu) have flushed VMCS + */ +void kdb_dump_vmcs(domid_t did, int vid) +{ + struct domain *dp; + struct vcpu *vp; + struct vmcs_struct *vmcsp; + u64 addr = -1; + + ASSERT(!local_irq_is_enabled()); /* kdb should always run disabled */ + __vmptrst(&addr); + + for_each_domain (dp) { + if ( !(is_hvm_or_hyb_domain(dp)) || dp->is_dying) + continue; + if (did != 0 && did != dp->domain_id) + continue; + + for_each_vcpu (dp, vp) { + if (vid != -1 && vid != vp->vcpu_id) + continue; + + vmcsp = vp->arch.hvm_vmx.vmcs; + kdbp("VMCS %lx/%lx [domid:%d (%p) vcpu:%d (%p)]:\n", vmcsp, + virt_to_maddr(vmcsp), dp->domain_id, dp, vp->vcpu_id, vp); + __vmptrld(virt_to_maddr(vmcsp)); + kdb_print_vmcs(vp); + __vmpclear(virt_to_maddr(vmcsp)); + vp->arch.hvm_vmx.launched = 0; + } + kdbp("\n"); + } + /* restore orig vmcs pointer for __vmreads in vmx_vmexit_handler() */ + if (addr && addr != (u64)-1) + __vmptrld(addr); +} +#endif /* * Local variables: diff -r 32034d1914a6 xen/arch/x86/hvm/vmx/vmx.c --- a/xen/arch/x86/hvm/vmx/vmx.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/hvm/vmx/vmx.c Fri Jun 15 12:13:29 2012 -0700 @@ -2183,11 +2183,14 @@ static void vmx_failed_vmentry(unsigned printk("reason not known yet!"); break; } - +#if defined(XEN_KDB_CONFIG) + kdbp("\n************* VMCS Area **************\n"); + kdb_dump_vmcs(curr->domain->domain_id, (curr)->vcpu_id); +#else printk("************* VMCS Area **************\n"); vmcs_dump_vcpu(curr); printk("**************************************\n"); - +#endif domain_crash(curr->domain); } @@ -2415,6 +2418,12 @@ void vmx_vmexit_handler(struct cpu_user_ write_debugreg(6, exit_qualification | 0xffff0ff0); if ( !v->domain->debugger_attached || cpu_has_monitor_trap_flag ) goto exit_and_crash; + +#if defined(XEN_KDB_CONFIG) + /* TRAP_debug: IP points correctly to next instr */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif domain_pause_for_debugger(); break; case TRAP_int3: @@ -2423,6 +2432,13 @@ void vmx_vmexit_handler(struct cpu_user_ if ( v->domain->debugger_attached ) { update_guest_eip(); /* Safe: INT3 */ +#if defined(XEN_KDB_CONFIG) + /* vmcs.IP points to bp, kdb expects bp+1. Hence after the above + * update_guest_eip which updates to bp+1. works for gdbsx too + */ + if (kdb_handle_trap_entry(vector, regs)) + break; +#endif current->arch.gdbsx_vcpu_event = TRAP_int3; domain_pause_for_debugger(); break; @@ -2707,6 +2723,10 @@ void vmx_vmexit_handler(struct cpu_user_ case EXIT_REASON_MONITOR_TRAP_FLAG: v->arch.hvm_vmx.exec_control &= ~CPU_BASED_MONITOR_TRAP_FLAG; vmx_update_cpu_exec_control(v); +#if defined(XEN_KDB_CONFIG) + if (kdb_handle_trap_entry(TRAP_debug, regs)) + break; +#endif if ( v->arch.hvm_vcpu.single_step ) { hvm_memory_event_single_step(regs->eip); if ( v->domain->debugger_attached ) diff -r 32034d1914a6 xen/arch/x86/irq.c --- a/xen/arch/x86/irq.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/irq.c Fri Jun 15 12:13:29 2012 -0700 @@ -2305,3 +2305,29 @@ bool_t hvm_domain_use_pirq(const struct return is_hvm_domain(d) && pirq && pirq->arch.hvm.emuirq != IRQ_UNBOUND; } + +#ifdef XEN_KDB_CONFIG +void kdb_prnt_guest_mapped_irqs(void) +{ + int irq, j; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + kdbp("irq vec aff type domid:mapped-pirq pairs (all in decimal)\n"); + for (irq=0; irq < nr_irqs; irq++) { + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + irq_guest_action_t *actp = (irq_guest_action_t *)dp->action; + + if (!dp->handler ||dp->handler==&no_irq_type || !(dp->status&IRQ_GUEST)) + continue; + + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %3d %3s %-13s ", irq, archp->vector, affstr, + dp->handler->typename); + for (j=0; j < actp->nr_guests; j++) + kdbp("%03d:%04d ", actp->guest[j]->domain_id, + domain_irq_to_pirq(actp->guest[j], irq)); + kdbp("\n"); + } +} +#endif diff -r 32034d1914a6 xen/arch/x86/setup.c --- a/xen/arch/x86/setup.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/setup.c Fri Jun 15 12:13:29 2012 -0700 @@ -47,6 +47,13 @@ #include #include +#ifdef XEN_KDB_CONFIG +#include + +int opt_earlykdb=0; +boolean_param("earlykdb", opt_earlykdb); +#endif + /* opt_nosmp: If true, secondary processors are ignored. */ static bool_t __initdata opt_nosmp; boolean_param("nosmp", opt_nosmp); @@ -1242,6 +1249,11 @@ void __init __start_xen(unsigned long mb trap_init(); +#ifdef XEN_KDB_CONFIG + kdb_init(); + if (opt_earlykdb) + kdb_trap_immed(KDB_TRAP_NONFATAL); +#endif rcu_init(); early_time_init(); diff -r 32034d1914a6 xen/arch/x86/smp.c --- a/xen/arch/x86/smp.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/smp.c Fri Jun 15 12:13:29 2012 -0700 @@ -273,7 +273,7 @@ void smp_send_event_check_mask(const cpu * Structure and data for smp_call_function()/on_selected_cpus(). */ -static void __smp_call_function_interrupt(void); +static void __smp_call_function_interrupt(struct cpu_user_regs *regs); static DEFINE_SPINLOCK(call_lock); static struct call_data_struct { void (*func) (void *info); @@ -321,7 +321,7 @@ void on_selected_cpus( if ( cpumask_test_cpu(smp_processor_id(), &call_data.selected) ) { local_irq_disable(); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(NULL); local_irq_enable(); } @@ -390,7 +390,7 @@ void event_check_interrupt(struct cpu_us this_cpu(irq_count)++; } -static void __smp_call_function_interrupt(void) +static void __smp_call_function_interrupt(struct cpu_user_regs *regs) { void (*func)(void *info) = call_data.func; void *info = call_data.info; @@ -411,6 +411,11 @@ static void __smp_call_function_interrup { mb(); cpumask_clear_cpu(cpu, &call_data.selected); +#ifdef XEN_KDB_CONFIG + if (info && !strcmp(info, "XENKDB")) { /* called from kdb */ + (*(void (*)(struct cpu_user_regs *, void *))func)(regs, info); + } else +#endif (*func)(info); } @@ -421,5 +426,5 @@ void call_function_interrupt(struct cpu_ { ack_APIC_irq(); perfc_incr(ipis); - __smp_call_function_interrupt(); + __smp_call_function_interrupt(regs); } diff -r 32034d1914a6 xen/arch/x86/time.c --- a/xen/arch/x86/time.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/time.c Fri Jun 15 12:13:29 2012 -0700 @@ -2007,6 +2007,46 @@ static int __init setup_dump_softtsc(voi } __initcall(setup_dump_softtsc); +#ifdef XEN_KDB_CONFIG +void kdb_time_resume(int update_domains) +{ + s_time_t now; + int ccpu = smp_processor_id(); + struct cpu_time *t = &this_cpu(cpu_time); + + if (!plt_src.read_counter) /* not initialized for earlykdb */ + return; + + if (update_domains) { + plt_stamp = plt_src.read_counter(); + platform_timer_stamp = plt_stamp64; + platform_time_calibration(); + do_settime(get_cmos_time(), 0, read_platform_stime()); + } + if (local_irq_is_enabled()) + kdbp("kdb BUG: enabled in time_resume(). ccpu:%d\n", ccpu); + + rdtscll(t->local_tsc_stamp); + now = read_platform_stime(); + t->stime_master_stamp = now; + t->stime_local_stamp = now; + + update_vcpu_system_time(current); + + if (update_domains) + set_timer(&calibration_timer, NOW() + EPOCH); +} + +void kdb_dump_time_pcpu(void) +{ + int cpu; + for_each_online_cpu(cpu) { + kdbp("[%d]: cpu_time: %016lx\n", cpu, &per_cpu(cpu_time, cpu)); + kdbp("[%d]: cpu_calibration: %016lx\n", cpu, + &per_cpu(cpu_calibration, cpu)); + } +} +#endif /* * Local variables: * mode: C diff -r 32034d1914a6 xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/traps.c Fri Jun 15 12:13:29 2012 -0700 @@ -225,7 +225,7 @@ static void show_trace(struct cpu_user_r #else -static void show_trace(struct cpu_user_regs *regs) +void show_trace(struct cpu_user_regs *regs) { unsigned long *frame, next, addr, low, high; @@ -3326,6 +3326,10 @@ void do_nmi(struct cpu_user_regs *regs) if ( nmi_callback(regs, cpu) ) return; +#ifdef XEN_KDB_CONFIG + if (kdb_enabled && kdb_handle_trap_entry(TRAP_nmi, regs)) + return; +#endif if ( nmi_watchdog ) nmi_watchdog_tick(regs); diff -r 32034d1914a6 xen/arch/x86/x86_64/compat/entry.S --- a/xen/arch/x86/x86_64/compat/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/x86_64/compat/entry.S Fri Jun 15 12:13:29 2012 -0700 @@ -95,6 +95,10 @@ compat_skip_clobber: /* %rbx: struct vcpu */ ENTRY(compat_test_all_events) cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG + testl $1, kdb_session_begun(%rip) + jnz compat_restore_all_guest +#endif /*compat_test_softirqs:*/ movl VCPU_processor(%rbx),%eax shlq $IRQSTAT_shift,%rax diff -r 32034d1914a6 xen/arch/x86/x86_64/entry.S --- a/xen/arch/x86/x86_64/entry.S Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/arch/x86/x86_64/entry.S Fri Jun 15 12:13:29 2012 -0700 @@ -184,6 +184,10 @@ skip_clobber: /* %rbx: struct vcpu */ test_all_events: cli # tests must not race interrupts +#ifdef XEN_KDB_CONFIG /* 64bit dom0 will resume here */ + testl $1, kdb_session_begun(%rip) + jnz restore_all_guest +#endif /*test_softirqs:*/ movl VCPU_processor(%rbx),%eax shl $IRQSTAT_shift,%rax @@ -546,6 +550,13 @@ ENTRY(debug) ENTRY(int3) pushq $0 +#ifdef XEN_KDB_CONFIG + pushq %rax + GET_CPUINFO_FIELD(CPUINFO_processor_id, %rax) + movq (%rax), %rax + lock bts %rax, kdb_cpu_traps(%rip) + popq %rax +#endif movl $TRAP_int3,4(%rsp) jmp handle_exception diff -r 32034d1914a6 xen/common/domain.c --- a/xen/common/domain.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/domain.c Fri Jun 15 12:13:29 2012 -0700 @@ -530,6 +530,14 @@ void domain_shutdown(struct domain *d, u { struct vcpu *v; +#ifdef XEN_KDB_CONFIG + if (reason == SHUTDOWN_crash) { + if ( IS_PRIV(d) ) + kdb_trap_immed(KDB_TRAP_FATAL); + else + kdb_trap_immed(KDB_TRAP_NONFATAL); + } +#endif spin_lock(&d->shutdown_lock); if ( d->shutdown_code == -1 ) @@ -624,7 +632,9 @@ void domain_pause_for_debugger(void) for_each_vcpu ( d, v ) vcpu_sleep_nosync(v); - send_global_virq(VIRQ_DEBUGGER); + /* send VIRQ_DEBUGGER to guest only if gdbsx_vcpu_event is not active */ + if (current->arch.gdbsx_vcpu_event == 0) + send_global_virq(VIRQ_DEBUGGER); } /* Complete domain destroy after RCU readers are not holding old references. */ diff -r 32034d1914a6 xen/common/sched_credit.c --- a/xen/common/sched_credit.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/sched_credit.c Fri Jun 15 12:13:29 2012 -0700 @@ -1475,6 +1475,33 @@ csched_dump_vcpu(struct csched_vcpu *svc printk("\n"); } +#ifdef XEN_KDB_CONFIG +static void kdb_csched_dump(int cpu) +{ + struct csched_pcpu *pcpup = CSCHED_PCPU(cpu); + struct vcpu *scurrvp = (CSCHED_VCPU(current))->vcpu; + struct list_head *tmp, *runq = RUNQ(cpu); + + kdbp(" csched_pcpu: %p\n", pcpup); + kdbp(" curr csched:%p {vcpu:%p id:%d domid:%d}\n", (current)->sched_priv, + scurrvp, scurrvp->vcpu_id, scurrvp->domain->domain_id); + kdbp(" runq:\n"); + + /* next is top of struct, so screw stupid, ugly hard to follow macros */ + if (offsetof(struct csched_vcpu, runq_elem.next) != 0) { + kdbp("next is not first in struct csched_vcpu. please fixme\n"); + return; /* otherwise for loop will crash */ + } + for (tmp = runq->next; tmp != runq; tmp = tmp->next) { + + struct csched_vcpu *csp = (struct csched_vcpu *)tmp; + struct vcpu *vp = csp->vcpu; + kdbp(" csp:%p pri:%02d vcpu: {p:%p id:%d domid:%d}\n", csp, + csp->pri, vp, vp->vcpu_id, vp->domain->domain_id); + }; +} +#endif + static void csched_dump_pcpu(const struct scheduler *ops, int cpu) { @@ -1484,6 +1511,10 @@ csched_dump_pcpu(const struct scheduler int loop; #define cpustr keyhandler_scratch +#ifdef XEN_KDB_CONFIG + kdb_csched_dump(cpu); + return; +#endif spc = CSCHED_PCPU(cpu); runq = &spc->runq; diff -r 32034d1914a6 xen/common/schedule.c --- a/xen/common/schedule.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/schedule.c Fri Jun 15 12:13:29 2012 -0700 @@ -1454,6 +1454,25 @@ void wait(void) schedule(); } +#ifdef XEN_KDB_CONFIG +void kdb_print_sched_info(void) +{ + int cpu; + + kdbp("Scheduler: name:%s opt_name:%s id:%d\n", ops.name, ops.opt_name, + ops.sched_id); + kdbp("per cpu schedule_data:\n"); + for_each_online_cpu(cpu) { + struct schedule_data *p = &per_cpu(schedule_data, cpu); + kdbp(" cpu:%d &(per cpu)schedule_data:%p\n", cpu, p); + kdbp(" curr:%p sched_priv:%p\n", p->curr, p->sched_priv); + kdbp("\n"); + ops.dump_cpu_state(&ops, cpu); + kdbp("\n"); + } +} +#endif + #ifdef CONFIG_COMPAT #include "compat/schedule.c" #endif diff -r 32034d1914a6 xen/common/symbols.c --- a/xen/common/symbols.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/symbols.c Fri Jun 15 12:13:29 2012 -0700 @@ -168,3 +168,21 @@ void __print_symbol(const char *fmt, uns spin_unlock_irqrestore(&lock, flags); } + +#ifdef XEN_KDB_CONFIG +/* + * * Given a symbol, return its address + * */ +unsigned long address_lookup(char *symp) +{ + int i, off = 0; + char namebuf[KSYM_NAME_LEN+1]; + + for (i=0; i < symbols_num_syms; i++) { + off = symbols_expand_symbol(off, namebuf); + if (strcmp(namebuf, symp) == 0) /* found it */ + return symbols_address(i); + } + return 0; +} +#endif diff -r 32034d1914a6 xen/common/timer.c --- a/xen/common/timer.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/common/timer.c Fri Jun 15 12:13:29 2012 -0700 @@ -643,6 +643,48 @@ void __init timer_init(void) register_keyhandler('a', &dump_timerq_keyhandler); } +#ifdef XEN_KDB_CONFIG +#include +void kdb_dump_timer_queues(void) +{ + struct timer *t; + struct timers *ts; + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1]; + int cpu, j; + u64 tsc; + + for_each_online_cpu( cpu ) + { + ts = &per_cpu(timers, cpu); + kdbp("CPU[%02d]:", cpu); + + if (cpu == smp_processor_id()) { + s_time_t now = NOW(); + rdtscll(tsc); + kdbp("NOW:0x%08x%08x TSC:0x%016lx\n", (u32)(now>>32),(u32)now, tsc); + } else + kdbp("\n"); + + /* timers in the heap */ + for ( j = 1; j <= GET_HEAP_SIZE(ts->heap); j++ ) { + t = ts->heap[j]; + kdbp(" %d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + /* timers on the link list */ + for ( t = ts->list, j = 0; t != NULL; t = t->list_next, j++ ) { + kdbp(" L%d: exp=0x%08x%08x fn:%s data:%p\n", + j, (u32)(t->expires>>32), (u32)t->expires, + symbols_lookup((unsigned long)t->function, &sz, &offs, buf), + t->data); + } + } +} +#endif + /* * Local variables: * mode: C diff -r 32034d1914a6 xen/drivers/char/console.c --- a/xen/drivers/char/console.c Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/drivers/char/console.c Fri Jun 15 12:13:29 2012 -0700 @@ -295,6 +295,21 @@ static void serial_rx(char c, struct cpu { static int switch_code_count = 0; +#ifdef XEN_KDB_CONFIG + /* if ctrl-\ pressed and kdb handles it, return */ + if (kdb_enabled && c == 0x1c) { + if (!kdb_session_begun) { + if (kdb_keyboard(regs)) + return; + } else { + kdbp("Sorry... kdb session already active.. please try again..\n"); + return; + } + } + if (kdb_session_begun) /* kdb should already be polling */ + return; /* swallow chars so they don't buffer in dom0 */ +#endif + if ( switch_code && (c == switch_code) ) { /* We eat CTRL- in groups of 3 to switch console input. */ @@ -710,6 +725,18 @@ void console_end_sync(void) atomic_dec(&print_everything); } +#ifdef XEN_KDB_CONFIG +void console_putc(char c) +{ + serial_putc(sercon_handle, c); +} + +int console_getc(void) +{ + return serial_getc(sercon_handle); +} +#endif + /* * printk rate limiting, lifted from Linux. * diff -r 32034d1914a6 xen/include/asm-x86/debugger.h --- a/xen/include/asm-x86/debugger.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/asm-x86/debugger.h Fri Jun 15 12:13:29 2012 -0700 @@ -39,7 +39,11 @@ #define DEBUGGER_trap_fatal(_v, _r) \ if ( debugger_trap_fatal(_v, _r) ) return; -#if defined(CRASH_DEBUG) +#if defined(XEN_KDB_CONFIG) +#define debugger_trap_immediate() kdb_trap_immed(KDB_TRAP_NONFATAL) +#define debugger_trap_fatal(_v, _r) kdb_trap_fatal(_v, _r) + +#elif defined(CRASH_DEBUG) #include @@ -70,6 +74,10 @@ static inline int debugger_trap_entry( { struct vcpu *v = current; +#ifdef XEN_KDB_CONFIG + if (kdb_handle_trap_entry(vector, regs)) + return 1; +#endif if ( guest_kernel_mode(v, regs) && v->domain->debugger_attached && ((vector == TRAP_int3) || (vector == TRAP_debug)) ) { diff -r 32034d1914a6 xen/include/xen/lib.h --- a/xen/include/xen/lib.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/xen/lib.h Fri Jun 15 12:13:29 2012 -0700 @@ -116,4 +116,7 @@ extern void add_taint(unsigned); struct cpu_user_regs; void dump_execstate(struct cpu_user_regs *); +#ifdef XEN_KDB_CONFIG +#include "../../kdb/include/kdb_extern.h" +#endif #endif /* __LIB_H__ */ diff -r 32034d1914a6 xen/include/xen/sched.h --- a/xen/include/xen/sched.h Thu Jun 07 19:46:57 2012 +0100 +++ b/xen/include/xen/sched.h Fri Jun 15 12:13:29 2012 -0700 @@ -576,11 +576,14 @@ extern void (*dead_idle) (void); unsigned long hypercall_create_continuation( unsigned int op, const char *format, ...); void hypercall_cancel_continuation(void); - +#ifdef XEN_KDB_CONFIG +#define hypercall_preempt_check() (0) +#else #define hypercall_preempt_check() (unlikely( \ softirq_pending(smp_processor_id()) | \ local_events_need_delivery() \ )) +#endif extern struct domain *domain_list; diff -r 32034d1914a6 xen/kdb/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/Makefile Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,5 @@ + +obj-y += kdbmain.o kdb_cmds.o kdb_io.o + +subdir-y += x86 guest + diff -r 32034d1914a6 xen/kdb/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/README Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,243 @@ + +Welcome to kdb for xen, a hypervisor built in debugger. + +FEATURES: + - set breakpoints in hypervisor + - examine virt/machine memory, registers, domains, vcpus, etc... + - single step, single step till jump/call, step over call to next + instruction after the call. + - examine memory of a PV/HVM guest. + - set breakpoints, single step, etc... for a PV guest. + - breaking into the debugger will freeze the system, all CPUs will pause, + no interrupts are acknowledged in the debugger. (Hence, the wall clock + will drift) + - single step will step only that cpu. + - earlykdb: break into kdb very early during boot. Put "earlykdb" on the + xen command line in grub.conf. + - generic tracing functions (see below) for quick tracing to debug timing + related problems. To use: + o set KDBTRCMAX to max num of recs in circular trc buffer in kdbmain.c + o call kdb_trc() from anywhere in xen + o turn tracing on by setting kdb_trcon in kdbmain.c or trcon command. + o trcp in kdb will give hints to dump trace recs. Use dd to see buffer + o trcz will zero out the entire buffer if needed. + +NOTE: + - since almost all numbers are in hex, 0x is not prefixed. Instead, decimal + numbers are preceded by $, as in $17 (sorry, one gets used to it). Note, + vcpu num, cpu num, domid are always displayed in decimal, without $. + - watchdog must be disabled to use kdb + +ISSUES: + - Currently, debug hypervisor is not supported. Make sure NDEBUG is defined + or compile with debug=n + - "timer went backwards" messages on dom0, but kdb/hyp should be fine. + I usually do "echo 2 > /proc/sys/kernel/printk" when using kdb. + - 32bit hypervisor may hang. Tested on 64bit hypervisor only. + + +TO BUILD: + - do >make kdb=y + +HOW TO USE: + 1. A serial line is needed to use the debugger. Set up a serial line + from the source machine to target victim. Make sure the serial line + is working properly by displaying login prompt and loging in etc.... + + 2. Add following to grub.conf: + kernel /xen.kdb console=com1,vga com1=57600,8n1 dom0_mem=542M + + (57600 or whatever used in step 1 above) + + 3. Boot the hypervisor built with the debugger. + + 4. ctrl-\ (ctrl and backslash) will break into the debugger. If the system is + badly hung, pressing NMI would also break into it. However, once kdb is + entered via NMI, normal execution can't continue. + + 5. type 'h' for list of commands. + + 6. Command line editing is limited to backspace. ctrl-c to start a new cmd. + + + +GUEST debug: + - type sym in the debugger + - for REL4, grep kallsyms_names, kallsyms_addresses, and kallsyms_num_syms + in the guest System.map* file. Run sym again with domid and the three + values on the command line. + - Now basic symbols can be used for guest debug. Note, if the binary is not + built with symbols, only function names are available, but not global vars. + + Eg: sym 0 c0696084 c068a590 c0696080 c06b43e8 c06b4740 + will set symbols for dom 0. Then : + + [4]xkdb> bp some_function 0 + + wills set bp at some_function in dom 0 + + [3]xkdb> dw c068a590 32 0 : display 32 bytes of dom0 memory + + +Tips: + - In "[0]xkdb>" : 0 is the cpu number in decimal + - In + 00000000c042645c: 0:do_timer+17 push %ebp + 0:do_timer : 0 is the domid in hex + offset +17 is in hex. + + absense of 0: would indicate it's a hypervisor function + + - commands starting with kdb (kdb*) are for kdb debug only. + + +Finally, + - think hex. + - bug/problem: enter kdbdbg, reproduce, and send me the output. + If the output is not enough, I may ask to run kdbdbg twice, then collect + output. + + +Thanks, +Mukesh Rathor +Oracle Corporatin, +Redwood Shores, CA 94065 + +-------------------------------------------------------------------------------- +COMMAND DESCRIPTION: + +info: Print basic info like version, compile flags, etc.. + +cur: print current domain id and vcpu id + +f: display current stack. If a vcpu ptr is given, then print stack for that + VCPU by using its IP and SP. + +fg: display stack for a guest given domid, SP and IP. + +dw: display words of memory. 'num' of bytes is optional, but if displaying guest + memory, then is required. + +dd: same as above, but display doublewords. + +dwm: same as above but the address is machine address instead of virtual. + +ddm: same as above, but display doublewords. + +dr: display registers. if 'sp' is specified then print few extra registers. + +drg: display guest context saved on stack bottom. + +dis: disassemble instructions. If disassembling for guest, then 'num' must + be specified. 'num' is number of instrs to display. + +dism: toggle disassembly mode between Intel and ATT/GAS. + +mw: modify word in memory given virtual address. 'domid' may be specified if + modifying guest memory. value is assumed in hex even without 0x. + +md: same as above but modify doubleword. + +mr: modify register. value is assumd hex. + +bc: clear given or all breakpoints + +bp: display breakpoints or set a breakpoint. Domid may be specified to set a bp + in guest. kdb functions may not be specified if debugging kdb. + Example: + xkdb> bp acpi_processor_idle : will set bp in xen + xkdb> bp default_idle 0 : will set bp in domid 0 + xkdb> bp idle_cpu 9 : will set bp in domid 9 + + Conditions may be specified for a bp: lhs == rhs or lhs != rhs + where : lhs is register like 'r6', 'rax', etc... or memory location + rhs is hex value with or without leading 0x. + Thus, + xkdb> bp acpi_processor_idle rdi == c000 + xkdb> bp 0xffffffff80062ebc 0 rsi == ffff880021edbc98 : will break into + kdb at 0xffffffff80062ebc in dom0 when rsi is ffff880021edbc98 + +btp: break point trace. Upon bp, print some info and continue without stopping. + Ex: btp idle_cpu 7 rax rbx 0x20ef5a5 r9 + + will print: rax, rbx, *(long *)0x20ef5a5, r9 upon hitting idle_cpu() and + continue. + +wp: set a watchpoint at a virtual address which can belong to hypervisor or + any guest. Do not specify wp in kdb path if debugging kdb. + +wc: clear given or all watchpoints. + +ni: single step, stepping over function calls. + +ss: single step. Be carefull when in interrupt handlers or context switches. + +ssb: single step to branch. Use with care. + +go: leave kdb and continue. + +cpu: go back to orig cpu when entering kdb. If 'cpu number' given, then switch + to that cpu. If 'all' then show status of all cpus. + +nmi: Only available in hung/crash state. Send NMI to a cpu that may be hung. + +sym: Initialize a symbol table for debugging a guest. Look into the System.map + file of guest for certain symbol values and provide them here. + +vcpuh: Given vcpu ptr, display hvm_vcpu struct. + +vcpu: Display current vcpu struct. If 'vcpu-ptr' given, display that vcpu. + +dom: display current domain. If 'domid' then display that domid. If 'all', then + display all domains. + +sched: show schedular info and run queues. + +mmu: print basic mmu info + +p2m: convert a gpfn to mfn given a domid. value in hex even without 0x. + +m2p: convert mfn to pfn. value in hex even without 0x. + +dpage: display struct page given a mfn or struct page ptr. Since, no info is + kept on page type, we display all possible page types. + +dtrq: display timer queues. + +didt: dump IDT table. + +dgt: dump GDT table. + +dirq: display IRQ bindings. + +dvmc: display all or given dom/vcpu VMCS or VMCB. + +trcon: turn tracing on. Trace hooks must be added in xen and kdb function + called directly from there. + +trcoff: turn tracing off. + +trcz: zero trace buffer. + +trcp: give hints to print the circular trace buffer, like current active ptr. + +usr1: allows to add any arbitraty command quickly. + +-------------------------------------------------------------------------------- +/* + * Copyright (C) 2008 Oracle. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ diff -r 32034d1914a6 xen/kdb/guest/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/Makefile Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_guest.o + diff -r 32034d1914a6 xen/kdb/guest/kdb_guest.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/guest/kdb_guest.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,342 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +/* information for symbols for a guest (includeing dom 0 ) is saved here */ +struct gst_syminfo { /* guest symbols info */ + int domid; /* which domain */ + int bitness; /* 32 or 64 */ + void *addrtblp; /* ptr to (32/64)addresses tbl */ + u8 *toktbl; /* ptr to kallsyms_token_table */ + u16 *tokidxtbl; /* ptr to kallsyms_token_index */ + u8 *kallsyms_names; /* ptr to kallsyms_names */ + long kallsyms_num_syms; /* ptr to kallsyms_num_syms */ + kdbva_t stext; /* value of _stext in guest */ + kdbva_t etext; /* value of _etext in guest */ + kdbva_t sinittext; /* value of _sinittext in guest */ + kdbva_t einittext; /* value of _einittext in guest */ +}; + +#define MAX_CACHE 16 /* cache upto 16 guests */ +struct gst_syminfo gst_syminfoa[MAX_CACHE]; /* guest symbol info array */ + +static struct gst_syminfo * +kdb_get_syminfo_slot(void) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].addrtblp == NULL) + return (&gst_syminfoa[i]); + + return NULL; +} + +static struct gst_syminfo * +kdb_domid2syminfop(domid_t domid) +{ + int i; + for (i=0; i < MAX_CACHE; i++) + if (gst_syminfoa[i].domid == domid) + return (&gst_syminfoa[i]); + + return NULL; +} + +/* check if an address looks like text address in guest */ +int +kdb_is_addr_guest_text(kdbva_t addr, int domid) +{ + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + if (!gp || !gp->stext || !gp->etext) + return 0; + KDBGP1("guestaddr: addr:%lx domid:%d\n", addr, domid); + + return ( (addr >= gp->stext && addr <= gp->etext) || + (addr >= gp->sinittext && addr <= gp->einittext) ); +} + +/* + * returns: value of kallsyms_addresses[idx]; + */ +static kdbva_t +kdb_rd_guest_addrtbl(struct gst_syminfo *gp, int idx) +{ + kdbva_t addr, retaddr=0; + int num = gp->bitness/8; /* whether 4 byte or 8 byte ptrs */ + domid_t id = gp->domid; + + addr = (kdbva_t)(((char *)gp->addrtblp) + idx * num); + KDBGP1("rdguestaddrtbl:addr:%lx idx:%d\n", addr, idx); + + if (kdb_read_mem(addr, (kdbbyt_t *)&retaddr,num,id) != num) { + kdbp("Can't read addrtbl domid:%d at:%lx\n", id, addr); + return 0; + } + KDBGP1("rdguestaddrtbl:exit:retaddr:%lx\n", retaddr); + return retaddr; +} + +/* Based on el5 kallsyms.c file. */ +static unsigned int +kdb_expand_el5_sym(struct gst_syminfo *gp, unsigned int off, char *result) +{ + int len, skipped_first = 0; + u8 u8idx, *tptr, *datap; + domid_t domid = gp->domid; + + *result = '\0'; + + /* get the compressed symbol length from the first symbol byte */ + datap = gp->kallsyms_names + off; + len = 0; + if ((kdb_read_mem((kdbva_t)datap, (kdbbyt_t *)&len, 1, domid)) != 1) { + KDBGP("failed to read guest memory\n"); + return 0; + } + datap++; + + /* update the offset to return the offset for the next symbol on + * the compressed stream */ + off += len + 1; + + /* for every byte on the compressed symbol data, copy the table + * entry for that byte */ + while(len) { + u16 u16idx, *u16p; + if (kdb_read_mem((kdbva_t)datap,(kdbbyt_t *)&u8idx,1,domid)!=1){ + kdbp("memory (u8idx) read error:%p\n",gp->tokidxtbl); + return 0; + } + u16p = u8idx + gp->tokidxtbl; + if (kdb_read_mem((kdbva_t)u16p,(kdbbyt_t *)&u16idx,2,domid)!=2){ + kdbp("tokidxtbl read error:%p\n", u16p); + return 0; + } + tptr = gp->toktbl + u16idx; + datap++; + len--; + + while ((kdb_read_mem((kdbva_t)tptr, (kdbbyt_t *)&u8idx, 1, domid)==1) && + u8idx) { + + if(skipped_first) { + *result = u8idx; + result++; + } else + skipped_first = 1; + tptr++; + } + } + *result = '\0'; + return off; /* return to offset to the next symbol */ +} + +#define EL4_NMLEN 127 +/* so much pain, so not sure of it's worth .. :).. */ +static kdbva_t +kdb_expand_el4_sym(struct gst_syminfo *gp, int low, char *result, char *symp) +{ + int i, j; + u8 *nmp = gp->kallsyms_names; /* guest address space */ + kdbbyt_t byte, prefix; + domid_t id = gp->domid; + kdbva_t addr; + + KDBGP1("Eel4sym:nmp:%p maxidx:$%d sym:%s\n", nmp, low, symp); + for (i=0; i <= low; i++) { + /* unsigned prefix = *name++; */ + if (kdb_read_mem((kdbva_t)nmp, &prefix, 1, id) != 1) { + kdbp("failed to read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:i:%d prefix:%x\n", i, prefix); + nmp++; + /* strncpy(namebuf + prefix, name, KSYM_NAME_LEN - prefix); */ + addr = (long)result + prefix; + for (j=0; j < EL4_NMLEN-prefix; j++) { + if (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) != 1) { + kdbp("failed read:%p domid:%x\n", nmp, id); + return 0; + } + KDBGP2("el4:j:%d byte:%x\n", j, byte); + *(kdbbyt_t *)addr = byte; + addr++; nmp++; + if (byte == '\0') + break; + } + KDBGP2("el4sym:i:%d res:%s\n", i, result); + if (symp && strcmp(result, symp) == 0) + return(kdb_rd_guest_addrtbl(gp, i)); + + /* kallsyms.c: name += strlen(name) + 1; */ + if (j == EL4_NMLEN-prefix && byte != '\0') + while (kdb_read_mem((kdbva_t)nmp, &byte, 1, id) && byte != '\0') + nmp++; + } + KDBGP1("Xel4sym: na-ga-da\n"); + return 0; +} + +static unsigned int +kdb_get_el5_symoffset(struct gst_syminfo *gp, long pos) +{ + int i; + u8 data, *namep; + domid_t domid = gp->domid; + + namep = gp->kallsyms_names; + for (i=0; i < pos; i++) { + if (kdb_read_mem((kdbva_t)namep, &data, 1, domid) != 1) { + kdbp("Can't read id:$%d mem:%p\n", domid, namep); + return 0; + } + namep = namep + data + 1; + } + return namep - gp->kallsyms_names; +} + +/* + * for a given guest domid (domid >= 0 && < KDB_HYPDOMID), convert addr to + * symbol. offset is set to addr - symbolstart + */ +char * +kdb_guest_addr2sym(unsigned long addr, domid_t domid, ulong *offsp) +{ + static char namebuf[KSYM_NAME_LEN+1]; + unsigned long low, high, mid; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + *offsp = 0; + if(!gp || gp->kallsyms_num_syms == 0) + return " ??? "; + + namebuf[0] = namebuf[KSYM_NAME_LEN] = '\0'; + if (1) { + /* do a binary search on the sorted kallsyms_addresses array */ + low = 0; + high = gp->kallsyms_num_syms; + + while (high-low > 1) { + mid = (low + high) / 2; + if (kdb_rd_guest_addrtbl(gp, mid) <= addr) + low = mid; + else + high = mid; + } + /* Grab name */ + if (gp->toktbl) { + int symoff = kdb_get_el5_symoffset(gp,low); + kdb_expand_el5_sym(gp, symoff, namebuf); + } else + kdb_expand_el4_sym(gp, low, namebuf, NULL); + *offsp = addr - kdb_rd_guest_addrtbl(gp, low); + return namebuf; + } + return " ???? "; +} + + +/* + * save guest (dom0 and others) symbols info : domid and following addresses: + * &kallsyms_names &kallsyms_addresses &kallsyms_num_syms \ + * &kallsyms_token_table &kallsyms_token_index + */ +void +kdb_sav_dom_syminfo(domid_t domid, long namesp, long addrap, long nump, + long toktblp, long tokidxp) +{ + int bytes; + long val = 0; /* must be set to zero for 32 on 64 cases */ + struct gst_syminfo *gp = kdb_get_syminfo_slot(); + + if (gp == NULL) { + kdbp("kdb:kdb_sav_dom_syminfo():Table full.. symbols not saved\n"); + return; + } + memset(gp, 0, sizeof(*gp)); + + gp->domid = domid; + gp->bitness = kdb_guest_bitness(domid); + gp->addrtblp = (void *)addrap; + gp->kallsyms_names = (u8 *)namesp; + gp->toktbl = (u8 *)toktblp; + gp->tokidxtbl = (u16 *)tokidxp; + + KDBGP("domid:%x bitness:$%d numsyms:$%ld arrayp:%p\n", domid, + gp->bitness, gp->kallsyms_num_syms, gp->addrtblp); + + bytes = gp->bitness/8; + if (kdb_read_mem(nump, (kdbbyt_t *)&val, bytes, domid) != bytes) { + + kdbp("Unable to read number of symbols from:%lx\n", nump); + memset(gp, 0, sizeof(*gp)); + return; + } else + kdbp("Number of symbols:$%ld\n", val); + + gp->kallsyms_num_syms = val; + + bytes = (gp->bitness/8) * gp->kallsyms_num_syms; + gp->stext = kdb_guest_sym2addr("_stext", domid); + gp->etext = kdb_guest_sym2addr("_etext", domid); + if (!gp->stext || !gp->etext) + kdbp("Warn: Can't find stext/etext\n"); + + if (gp->toktbl && gp->tokidxtbl) { + gp->sinittext = kdb_guest_sym2addr("_sinittext", domid); + gp->einittext = kdb_guest_sym2addr("_einittext", domid); + if (!gp->sinittext || !gp->einittext) { + kdbp("Warn: Can't find sinittext/einittext\n"); + } + } + KDBGP1("stxt:%lx etxt:%lx sitxt:%lx eitxt:%lx\n", gp->stext, gp->etext, + gp->sinittext, gp->einittext); + kdbp("Succesfully saved symbol info\n"); +} + +/* + * given a symbol string for a guest/domid, return its address + */ +kdbva_t +kdb_guest_sym2addr(char *symp, domid_t domid) +{ + char namebuf[KSYM_NAME_LEN+1]; + int i, off=0; + struct gst_syminfo *gp = kdb_domid2syminfop(domid); + + KDBGP("sym2a: sym:%s domid:%x numsyms:%ld\n", symp, domid, + gp ? gp->kallsyms_num_syms: -1); + + if (!gp) + return 0; + + if (gp->toktbl == 0 || gp->tokidxtbl == 0) + return(kdb_expand_el4_sym(gp, gp->kallsyms_num_syms, namebuf, symp)); + + for (i=0; i < gp->kallsyms_num_syms; i++) { + off = kdb_expand_el5_sym(gp, off, namebuf); + KDBGP1("i:%d namebuf:%s\n", i, namebuf); + if (strcmp(namebuf, symp) == 0) { + return(kdb_rd_guest_addrtbl(gp, i)); + } + } + KDBGP("sym2a:exit:na-ga-da\n"); + return 0; +} diff -r 32034d1914a6 xen/kdb/include/kdb_extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdb_extern.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDB_EXTERN_H +#define _KDB_EXTERN_H + +#define KDB_TRAP_FATAL 1 /* trap is fatal. can't resume from kdb */ +#define KDB_TRAP_NONFATAL 2 /* can resume from kdb */ +#define KDB_TRAP_KDBSTACK 3 /* to debug kdb itself. dump kdb stack */ + +/* following can be called from anywhere in xen to debug */ +extern void kdb_trap_immed(int); +extern void kdbtrc(unsigned int, unsigned int, uint64_t, uint64_t, uint64_t); +extern void kdbp(const char *fmt, ...); + +typedef unsigned long kdbva_t; +typedef unsigned char kdbbyt_t; +typedef unsigned long kdbma_t; + +extern unsigned long kdb_dr7; + + +extern volatile int kdb_session_begun; +extern volatile int kdb_enabled; +extern void kdb_init(void); +extern int kdb_keyboard(struct cpu_user_regs *); +extern void kdb_ssni_reenter(struct cpu_user_regs *); +extern int kdb_handle_trap_entry(int, struct cpu_user_regs *); +extern int kdb_trap_fatal(int, struct cpu_user_regs *); /* fatal with regs */ +extern void kdb_dump_vmcs(uint16_t did, int vid); +void kdb_dump_vmcb(uint16_t did, int vid); +extern void kdb_dump_time_pcpu(void); + + +#define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 */ +#define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */ +static inline void __vmptrst(u64 *addr) +{ + asm volatile ( VMPTRST_OPCODE + MODRM_EAX_07 + : + : "a" (addr) + : "memory"); +} + +extern void mukchk(unsigned long); +#define is_hvm_or_hyb_domain is_hvm_domain +#define is_hvm_or_hyb_vcpu is_hvm_vcpu + + +#endif /* _KDB_EXTERN_H */ diff -r 32034d1914a6 xen/kdb/include/kdbdefs.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbdefs.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBDEFS_H +#define _KDBDEFS_H + +/* reason we are entering kdbmain (bp == breakpoint) */ +typedef enum { + KDB_REASON_KEYBOARD=1, /* Keyboard entry - always 1 */ + KDB_REASON_BPEXCP, /* #BP excp: sw bp (INT3) */ + KDB_REASON_DBEXCP, /* #DB excp: TF flag or HW bp */ + KDB_REASON_PAUSE_IPI, /* received pause IPI from another CPU */ +} kdb_reason_t; + + +/* cpu state: past, present, and future */ +typedef enum { + KDB_CPU_INVAL=0, /* invalid value. not in or leaving kdb */ + KDB_CPU_QUIT, /* main cpu does GO. all others do QUIT */ + KDB_CPU_PAUSE, /* cpu is paused */ + KDB_CPU_DISABLE, /* disable interrupts */ + KDB_CPU_SHOWPC, /* all cpus must display their pc */ + KDB_CPU_DO_VMEXIT, /* all cpus must do vmcs vmexit. intel only */ + KDB_CPU_MAIN_KDB, /* cpu in kdb main command loop */ + KDB_CPU_GO, /* user entered go for this cpu */ + KDB_CPU_SS, /* single step for this cpu */ + KDB_CPU_NI, /* go to next instr after the call instr */ + KDB_CPU_INSTALL_BP, /* delayed install of sw bp(s) by this cpu */ +} kdb_cpu_cmd_t; + +/* ============= kdb commands ============================================= */ + +typedef kdb_cpu_cmd_t (*kdb_func_t)(int, const char **, struct cpu_user_regs *); +typedef kdb_cpu_cmd_t (*kdb_usgf_t)(void); + +typedef enum { + KDB_REPEAT_NONE = 0, /* Do not repeat this command */ + KDB_REPEAT_NO_ARGS, /* Repeat the command without arguments */ + KDB_REPEAT_WITH_ARGS, /* Repeat the command including its arguments */ +} kdb_repeat_t; + +typedef struct _kdbtab { + char *kdb_cmd_name; /* Command name */ + kdb_func_t kdb_cmd_func; /* ptr to function to execute command */ + kdb_usgf_t kdb_cmd_usgf; /* usage function ptr */ + int kdb_cmd_crash_avail; /* available in sys fatal/crash state */ + kdb_repeat_t kdb_cmd_repeat; /* Does command auto repeat on enter? */ +} kdbtab_t; + + +/* ============= types and stuff ========================================= */ +#define BFD_INVAL (~0UL) /* invalid bfd_vma */ + +#if defined(__x86_64__) + #define KDBIP rip + #define KDBSP rsp +#else + #define KDBIP eip + #define KDBSP esp +#endif + +/* ============= macros ================================================== */ +extern volatile int kdbdbg; +#define KDBGP(...) {(kdbdbg) ? kdbp(__VA_ARGS__):0;} +#define KDBGP1(...) {(kdbdbg>1) ? kdbp(__VA_ARGS__):0;} +#define KDBGP2(...) {(kdbdbg>2) ? kdbp(__VA_ARGS__):0;} +#define KDBGP3(...) {0;}; + +#define KDBMIN(x,y) (((x)<(y))?(x):(y)) + +#endif /* !_KDBDEFS_H */ diff -r 32034d1914a6 xen/kdb/include/kdbinc.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbinc.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBINC_H +#define _KDBINC_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#ifdef _XEN_LATEST +#include +#endif + +#include + +#include "kdb_extern.h" +#include "kdbdefs.h" +#include "kdbproto.h" + +#endif /* !_KDBINC_H */ diff -r 32034d1914a6 xen/kdb/include/kdbproto.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/include/kdbproto.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#ifndef _KDBPROTO_H +#define _KDBPROTO_H + +/* hypervisor interfaces use by kdb or kdb interfaces in xen files */ +extern void console_putc(char); +extern int console_getc(void); +extern void show_trace(struct cpu_user_regs *); +extern void kdb_dump_timer_queues(void); +extern void kdb_time_resume(int); +extern void kdb_print_sched_info(void); +extern void kdb_curr_cpu_flush_vmcs(void); +extern unsigned long address_lookup(char *); +extern void kdb_prnt_guest_mapped_irqs(void); + +/* kdb globals */ +extern kdbtab_t *kdb_cmd_tbl; +extern char kdb_prompt[32]; +extern volatile int kdb_sys_crash; +extern volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +extern volatile int kdb_trcon; + +/* kdb interfaces */ +extern void __init kdb_io_init(void); +extern void kdb_init_cmdtab(void); +extern void kdb_do_cmds(struct cpu_user_regs *); +extern int kdb_check_sw_bkpts(struct cpu_user_regs *); +extern int kdb_check_watchpoints(struct cpu_user_regs *); +extern void kdb_do_watchpoints(kdbva_t, int, int); +extern void kdb_install_watchpoints(void); +extern void kdb_clear_wps(int); +extern kdbma_t kdb_rd_dbgreg(int); + + + +extern char *kdb_get_cmdline(char *); +extern void kdb_clear_prev_cmd(void); +extern void kdb_toggle_dis_syntax(void); +extern int kdb_check_call_instr(domid_t, kdbva_t); +extern void kdb_display_pc(struct cpu_user_regs *); +extern kdbva_t kdb_print_instr(kdbva_t, long, domid_t); +extern int kdb_read_mmem(kdbva_t, kdbbyt_t *, int); +extern int kdb_read_mem(kdbva_t, kdbbyt_t *, int, domid_t); +extern int kdb_write_mem(kdbva_t, kdbbyt_t *, int, domid_t); + +extern void kdb_install_all_swbp(void); +extern void kdb_uninstall_all_swbp(void); +extern int kdb_swbp_exists(void); +extern void kdb_flush_swbp_table(void); +extern int kdb_is_addr_guest_text(kdbva_t, int); +extern kdbva_t kdb_guest_sym2addr(char *, domid_t); +extern char *kdb_guest_addr2sym(unsigned long, domid_t, ulong *); +extern void kdb_prnt_addr2sym(domid_t, kdbva_t, char *); +extern void kdb_sav_dom_syminfo(domid_t, long, long, long, long, long); +extern int kdb_guest_bitness(domid_t); +extern void kdb_nmi_pause_cpus(cpumask_t); + +extern void kdb_trczero(void); +void kdb_trcp(void); + + + +#endif /* !_KDBPROTO_H */ diff -r 32034d1914a6 xen/kdb/kdb_cmds.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_cmds.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,3769 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +#if defined(__x86_64__) + #define KDBF64 "%lx" + #define KDBFL "%016lx" /* print long all digits */ +#else + #define KDBF64 "%llx" + #define KDBFL "%08lx" +#endif + +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + #define KDB_LKDEF(l) ((l).raw.lock) + #define KDB_PGLLE(t) ((t).tail) /* page list last element ^%$#@ */ +#else + #define KDB_LKDEF(l) ((l).lock) + #define KDB_PGLLE(t) ((t).prev) /* page list last element ^%$#@ */ +#endif + +#define KDB_CMD_HISTORY_COUNT 32 +#define CMD_BUFLEN 200 /* kdb_printf: max printline == 256 */ + +#define KDBMAXSBP 16 /* max number of software breakpoints */ +#define KDB_MAXARGC 16 /* max args in a kdb command */ +#define KDB_MAXBTP 8 /* max display args in btp */ + +/* condition is: 'r6 == 0x123f' or '0xffffffff82800000 != deadbeef' */ +struct kdb_bpcond { + kdbbyt_t bp_cond_status; /* 0 == off, 1 == register, 2 == memory */ + kdbbyt_t bp_cond_type; /* 0 == bad, 1 == equal, 2 == not equal */ + ulong bp_cond_lhs; /* lhs of condition: reg offset or mem loc */ + ulong bp_cond_rhs; /* right hand side of condition */ +}; + +/* software breakpoint structure */ +struct kdb_sbrkpt { + kdbva_t bp_addr; /* address the bp is set at */ + domid_t bp_domid; /* which domain the bp belongs to */ + kdbbyt_t bp_originst; /* save orig instr/s here */ + kdbbyt_t bp_deleted; /* delete pending on this bp */ + kdbbyt_t bp_ni; /* set for KDB_CPU_NI */ + kdbbyt_t bp_just_added; /* added in the current kdb session */ + kdbbyt_t bp_type; /* 0 = normal, 1 == cond, 2 == btp */ + union { + struct kdb_bpcond bp_cond; + ulong *bp_btp; + } u; +}; + +/* don't use kmalloc in kdb which hijacks all cpus */ +static ulong kdb_btp_argsa[KDBMAXSBP][KDB_MAXBTP]; +static ulong *kdb_btp_ap[KDBMAXSBP]; + +static struct kdb_reg_nmofs { + char *reg_nm; + int reg_offs; +} kdb_reg_nm_offs[] = { + { "rax", offsetof(struct cpu_user_regs, rax) }, + { "rbx", offsetof(struct cpu_user_regs, rbx) }, + { "rcx", offsetof(struct cpu_user_regs, rcx) }, + { "rdx", offsetof(struct cpu_user_regs, rdx) }, + { "rsi", offsetof(struct cpu_user_regs, rsi) }, + { "rdi", offsetof(struct cpu_user_regs, rdi) }, + { "rbp", offsetof(struct cpu_user_regs, rbp) }, + { "rsp", offsetof(struct cpu_user_regs, rsp) }, + { "r8", offsetof(struct cpu_user_regs, r8) }, + { "r9", offsetof(struct cpu_user_regs, r9) }, + { "r10", offsetof(struct cpu_user_regs, r10) }, + { "r11", offsetof(struct cpu_user_regs, r11) }, + { "r12", offsetof(struct cpu_user_regs, r12) }, + { "r13", offsetof(struct cpu_user_regs, r13) }, + { "r14", offsetof(struct cpu_user_regs, r14) }, + { "r15", offsetof(struct cpu_user_regs, r15) }, + { "rflags", offsetof(struct cpu_user_regs, rflags) } }; + +static const int KDBBPSZ=1; /* size of KDB_BPINST is 1 byte*/ +static kdbbyt_t kdb_bpinst = 0xcc; /* breakpoint instr: INT3 */ +static struct kdb_sbrkpt kdb_sbpa[KDBMAXSBP]; /* soft brkpt array/table */ +static kdbtab_t *tbp; + +static int kdb_set_bp(domid_t, kdbva_t, int, ulong *, char*, char*, char*); +static void kdb_print_uregs(struct cpu_user_regs *); + + +/* ===================== cmdline functions ================================ */ + +/* lp points to a string of only alpha numeric chars terminated by '\n'. + * Parse the string into argv pointers, and RETURN argc + * Eg: if lp --> "dr sp\n" : argv[0]=="dr\0" argv[1]=="sp\0" argc==2 + */ +static int +kdb_parse_cmdline(char *lp, const char **argv) +{ + int i=0; + + for (; *lp == ' '; lp++); /* note: isspace() skips '\n' also */ + while ( *lp != '\n' ) { + if (i == KDB_MAXARGC) { + printk("kdb: max args exceeded\n"); + break; + } + argv[i++] = lp; + for (; *lp != ' ' && *lp != '\n'; lp++); + if (*lp != '\n') + *lp++ = '\0'; + for (; *lp == ' '; lp++); + } + *lp = '\0'; + return i; +} + +void +kdb_clear_prev_cmd() /* so previous command is not repeated */ +{ + tbp = NULL; +} + +void +kdb_do_cmds(struct cpu_user_regs *regs) +{ + char *cmdlinep; + const char *argv[KDB_MAXARGC]; + int argc = 0, curcpu = smp_processor_id(); + kdb_cpu_cmd_t result = KDB_CPU_MAIN_KDB; + + snprintf(kdb_prompt, sizeof(kdb_prompt), "[%d]xkdb> ", curcpu); + + while (result == KDB_CPU_MAIN_KDB) { + cmdlinep = kdb_get_cmdline(kdb_prompt); + if (*cmdlinep == '\n') { + if (tbp==NULL || tbp->kdb_cmd_func==NULL) + continue; + else + argc = -1; /* repeat prev command */ + } else { + argc = kdb_parse_cmdline(cmdlinep, argv); + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_func; tbp++) { + if (strcmp(argv[0], tbp->kdb_cmd_name)==0) + break; + } + } + if (kdb_sys_crash && tbp->kdb_cmd_func && !tbp->kdb_cmd_crash_avail) { + kdbp("cmd not available in fatal/crashed state....\n"); + continue; + } + if (tbp->kdb_cmd_func) { + result = (*tbp->kdb_cmd_func)(argc, argv, regs); + if (tbp->kdb_cmd_repeat == KDB_REPEAT_NONE) + tbp = NULL; + } else + kdbp("kdb: Unknown cmd: %s\n", cmdlinep); + } + kdb_cpu_cmd[curcpu] = result; + return; +} + +/* ===================== Util functions ==================================== */ + +int +kdb_vcpu_valid(struct vcpu *in_vp) +{ + struct domain *dp; + struct vcpu *vp; + + for(dp=domain_list; in_vp && dp; dp=dp->next_in_list) + for_each_vcpu(dp, vp) + if (in_vp == vp) + return 1; + return 0; /* not found */ +} + +/* + * Given a symbol, find it's address + */ +static kdbva_t +kdb_sym2addr(const char *p, domid_t domid) +{ + kdbva_t addr; + + KDBGP1("sym2addr: p:%s domid:%d\n", p, domid); + if (domid == DOMID_IDLE) + addr = address_lookup((char *)p); + else + addr = (kdbva_t)kdb_guest_sym2addr((char *)p, domid); + KDBGP1("sym2addr: exit: addr returned:0x%lx\n", addr); + return addr; +} + +/* + * convert ascii to int decimal (base 10). + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2deci(const char *strp, int *intp) +{ + const char *endp; + + KDBGP2("str2deci: str:%s\n", strp); + if (!isdigit(*strp)) + return 0; + *intp = (int)simple_strtoul(strp, &endp, 10); + if (endp != strp+strlen(strp)) + return 0; + KDBGP2("str2deci: intval:$%d\n", *intp); + return 1; +} +/* + * convert ascii to long. NOTE: base is 16 + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2ulong(const char *strp, ulong *longp) +{ + ulong val; + const char *endp; + + KDBGP2("str2long: str:%s\n", strp); + if (!isxdigit(*strp)) + return 0; + val = (long)simple_strtoul(strp, &endp, 16); /* handles leading 0x */ + if (endp != strp+strlen(strp)) + return 0; + if (longp) + *longp = val; + KDBGP2("str2long: val:0x%lx\n", val); + return 1; +} +/* + * convert a symbol or ascii address to hex address + * Return: 0 : failed to convert, otherwise 1 + */ +static int +kdb_str2addr(const char *strp, kdbva_t *addrp, domid_t id) +{ + kdbva_t addr; + const char *endp; + + /* assume it's an address */ + KDBGP2("str2addr: str:%s id:%d\n", strp, id); + addr = (kdbva_t)simple_strtoul(strp, &endp, 16); /*handles leading 0x */ + if (endp != strp+strlen(strp)) + if ( !(addr=kdb_sym2addr(strp, id)) ) + return 0; + *addrp = addr; + KDBGP2("str2addr: addr:0x%lx\n", addr); + return 1; +} + +/* Given domid, return ptr to struct domain + * IF domid == DOMID_IDLE return ptr to idle_domain + * IF domid == valid domain, return ptr to domain struct + * else domid is bad and return NULL + */ +static struct domain * +kdb_domid2ptr(domid_t domid) +{ + struct domain *dp; + + /* get_domain_by_id() ret NULL for both DOMID_IDLE and bad domids */ + if (domid == DOMID_IDLE) + dp = idle_vcpu[smp_processor_id()]->domain; + else + dp = get_domain_by_id(domid); /* NULL now means bad domid */ + return dp; +} + +/* + * Returns: 0: failed. invalid domid or string, *idp not changed. + */ +static int +kdb_str2domid(const char *domstr, domid_t *idp, int perr) +{ + int id; + if (!kdb_str2deci(domstr, &id) || !kdb_domid2ptr((domid_t)id)) { + if (perr) + kdbp("Invalid domid:%s\n", domstr); + return 0; + } + *idp = (domid_t)id; + return 1; +} + +static struct domain * +kdb_strdomid2ptr(const char *domstr, int perror) +{ + domid_t domid; + if (kdb_str2domid(domstr, &domid, perror)) { + return(kdb_domid2ptr(domid)); + } + return NULL; +} + +/* return a guest bitness: 32 or 64 */ +int +kdb_guest_bitness(domid_t domid) +{ + const int HYPSZ = sizeof(long) * 8; + struct domain *dp = kdb_domid2ptr(domid); + int retval; + + if (is_idle_domain(dp)) + retval = HYPSZ; + else if (is_hvm_or_hyb_domain(dp)) + retval = (hvm_long_mode_enabled(dp->vcpu[0])) ? HYPSZ : 32; + else + retval = is_pv_32bit_domain(dp) ? 32 : HYPSZ; + KDBGP1("gbitness: domid:%d dp:%p bitness:%d\n", domid, dp, retval); + return retval; +} + +/* kdb_print_spin_lock(&xyz_lock, "xyz_lock:", "\n"); */ +static void +kdb_print_spin_lock(char *strp, spinlock_t *lkp, char *nlp) +{ + kdbp("%s %04hx %d %d%s", strp, KDB_LKDEF(*lkp), lkp->recurse_cpu, + lkp->recurse_cnt, nlp); +} + +/* check if register string is valid. if yes, return offset to the register + * in cpu_user_regs, else return -1 */ +static int +kdb_valid_reg(const char *nmp) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (strcmp(kdb_reg_nm_offs[i].reg_nm, nmp) == 0) + return kdb_reg_nm_offs[i].reg_offs; + return -1; +} + +/* given offset of register, return register name string. if offset is invalid + * return NULL */ +static char *kdb_regoffs_to_name(int offs) +{ + int i; + for (i=0; i < sizeof(kdb_reg_nm_offs)/sizeof(kdb_reg_nm_offs[0]); i++) + if (kdb_reg_nm_offs[i].reg_offs == offs) + return kdb_reg_nm_offs[i].reg_nm; + return NULL; +} + +/* ===================== util struct funcs ================================= */ +static void +kdb_prnt_timer(struct timer *tp) +{ +#if XEN_SUBVERSION == 0 + kdbp(" expires:%016lx expires_end:%016lx cpu:%d status:%x\n", tp->expires, + tp->expires_end, tp->cpu, tp->status); +#else + kdbp(" expires:%016lx cpu:%d status:%x\n", tp->expires, tp->cpu,tp->status); +#endif + kdbp(" function data:%p ptr:%p ", tp->data, tp->function); + kdb_prnt_addr2sym(DOMID_IDLE, (kdbva_t)tp->function, "\n"); +} + +static void +kdb_prnt_periodic_time(struct periodic_time *ptp) +{ + kdbp(" next:%p prev:%p\n", ptp->list.next, ptp->list.prev); + kdbp(" on_list:%d one_shot:%d dont_freeze:%d irq_issued:%d src:%x irq:%x\n", + ptp->on_list, ptp->one_shot, ptp->do_not_freeze, ptp->irq_issued, + ptp->source, ptp->irq); + kdbp(" vcpu:%p pending_intr_nr:%08x period:%016lx\n", ptp->vcpu, + ptp->pending_intr_nr, ptp->period); + kdbp(" scheduled:%016lx last_plt_gtime:%016lx\n", ptp->scheduled, + ptp->last_plt_gtime); + kdbp(" \n timer info:\n"); + kdb_prnt_timer(&ptp->timer); + kdbp("\n"); +} + +/* ===================== cmd functions ==================================== */ + +/* + * FUNCTION: Disassemble instructions + */ +static kdb_cpu_cmd_t +kdb_usgf_dis(void) +{ + kdbp("dis [addr|sym][num][domid] : Disassemble instrs\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dis(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int num = 8; /* display 8 instr by default */ + static kdbva_t addr = BFD_INVAL; + static domid_t domid; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dis(); + + if (argc != -1) /* not a command repeat */ + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + if (argc >= 4 && !kdb_str2domid(argv[3], &domid, 1)) { + return KDB_CPU_MAIN_KDB; + } + if (argc >= 3 && !kdb_str2deci(argv[2], &num)) { + kdbp("kdb:Invalid num\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc > 1 && !kdb_str2addr(argv[1], &addr, domid)) { + kdbp("kdb:Invalid addr/sym\n"); + kdbp("(num has to be specified if providing domid)\n"); + return KDB_CPU_MAIN_KDB; + } + if (argc == 1) /* not command repeat */ + addr = regs->KDBIP; /* PC is the default */ + else if (addr == BFD_INVAL) { + kdbp("kdb:Invalid addr/sym\n"); + return KDB_CPU_MAIN_KDB; + } + addr = kdb_print_instr(addr, num, domid); + return KDB_CPU_MAIN_KDB; +} + +/* FUNCTION: kdb_cmdf_dism() Toggle disassembly syntax from Intel to ATT/GAS */ +static kdb_cpu_cmd_t +kdb_usgf_dism(void) +{ + kdbp("dism: toggle disassembly mode between ATT/GAS and INTEL\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dism(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dism(); + + kdb_toggle_dis_syntax(); + return KDB_CPU_MAIN_KDB; +} + +static void +_kdb_show_guest_stack(domid_t domid, kdbva_t ipaddr, kdbva_t spaddr) +{ + kdbva_t val; + int num=0, max=0, rd = kdb_guest_bitness(domid)/8; + + kdb_print_instr(ipaddr, 1, domid); + KDBGP("_guest_stack:sp:%lx domid:%d rd:$%d\n", spaddr, domid, rd); + val = 0; /* must zero, in case guest is 32bit */ + while((kdb_read_mem(spaddr,(kdbbyt_t *)&val,rd,domid)==rd) && num < 16){ + KDBGP1("gstk:addr:%lx val:%lx\n", spaddr, val); + if (kdb_is_addr_guest_text(val, domid)) { + kdb_print_instr(val, 1, domid); + num++; + } + if (max++ > 10000) /* don't walk down the stack forever */ + break; /* 10k is chosen randomly */ + spaddr += rd; + } +} + +/* Read guest memory and display address that looks like text. */ +static void +kdb_show_guest_stack(struct cpu_user_regs *regs, struct vcpu *vcpup) +{ + kdbva_t ipaddr=regs->KDBIP, spaddr = regs->KDBSP; + domid_t domid = vcpup->domain->domain_id; + + ASSERT(domid != DOMID_IDLE); + _kdb_show_guest_stack(domid, ipaddr, spaddr); +} + +/* display stack. if vcpu ptr given, then display stack for that. Otherwise, + * use current regs */ +static kdb_cpu_cmd_t +kdb_usgf_f(void) +{ + kdbp("f [vcpu-ptr]: dump current/vcpu stack\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_f(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_f(); + + if (argc > 1 ) { + struct vcpu *vp; + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp)) { + kdbp("kdb: Bad VCPU ptr:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdb_show_guest_stack(&vp->arch.user_regs, vp); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs)) + kdb_show_guest_stack(regs, current); + else + show_trace(regs); + return KDB_CPU_MAIN_KDB; +} + +/* given an spaddr and domid for guest, dump stack */ +static kdb_cpu_cmd_t +kdb_usgf_fg(void) +{ + kdbp("fg domid RIP ESP: dump guest stack given domid, RIP, and ESP\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_fg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid; + kdbva_t ipaddr, spaddr; + + if (argc != 4) + return kdb_usgf_fg(); + + if (kdb_str2domid(argv[1], &domid, 1)==0) { + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[2], &ipaddr)==0) { + kdbp("Bad ipaddr:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_str2ulong(argv[3], &spaddr)==0) { + kdbp("Bad spaddr:%s\n", argv[3]); + return KDB_CPU_MAIN_KDB; + } + _kdb_show_guest_stack(domid, ipaddr, spaddr); + return KDB_CPU_MAIN_KDB; +} + +/* Display kdb stack. for debugging kdb itself */ +static kdb_cpu_cmd_t +kdb_usgf_kdbf(void) +{ + kdbp("kdbf: display kdb stack. for debugging kdb only\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbf(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbf(); + + kdb_trap_immed(KDB_TRAP_KDBSTACK); + return KDB_CPU_MAIN_KDB; +} + +/* worker function to display memory. Request could be for any guest, domid. + * Also address could be machine or virtual */ +static void +_kdb_display_mem(kdbva_t *addrp, int *lenp, int wordsz, int domid, int is_maddr) +{ + #define DDBUFSZ 4096 + + kdbbyt_t buf[DDBUFSZ], *bp; + int numrd, bytes; + int len = *lenp; + kdbva_t addr = *addrp; + + /* round len down to wordsz boundry because on intel endian, printing + * characters is not prudent, (long and ints can't be interpreted + * easily) */ + len &= ~(wordsz-1); + len = KDBMIN(DDBUFSZ, len); + len = len ? len : wordsz; + + KDBGP("dmem:addr:%lx buf:%p len:$%d domid:%d sz:$%d maddr:%d\n", addr, + buf, len, domid, wordsz, is_maddr); + if (is_maddr) + numrd=kdb_read_mmem((kdbma_t)addr, buf, len); + else + numrd=kdb_read_mem(addr, buf, len, domid); + if (numrd != len) + kdbp("Memory read error. Bytes read:$%d\n", numrd); + + for (bp = buf; numrd > 0;) { + kdbp("%016lx: ", addr); + + /* display 16 bytes per line */ + for (bytes=0; bytes < 16 && numrd > 0; bytes += wordsz) { + if (numrd >= wordsz) { + if (wordsz == 8) + kdbp(" %016lx", *(long *)bp); + else + kdbp(" %08x", *(int *)bp); + bp += wordsz; + numrd -= wordsz; + addr += wordsz; + } + } + kdbp("\n"); + continue; + } + *lenp = len; + *addrp = addr; +} + +/* display machine mem, ie, the given address is machine address */ +static kdb_cpu_cmd_t +kdb_display_mmem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbma_t maddr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&maddr, &len, wordsz, id, 1); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + + if (!kdb_str2ulong(argv[1], &maddr)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + _kdb_display_mem(&maddr, &len, wordsz, 0, 1); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly machine Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dwm(void) +{ + kdbp("dwm: maddr|sym [num] : dump memory word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dwm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 4, kdb_usgf_dwm); +} + +/* + * FUNCTION: Dispaly machine Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_ddm(void) +{ + kdbp("ddm: maddr|sym [num] : dump double word given machine addr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ddm(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mmem(argc, argv, 8, kdb_usgf_ddm); +} + +/* + * FUNCTION: Dispaly Memory : word or doubleword + * wordsz : bytes in word. 4 or 8 + * + * We display upto BUFSZ bytes. User can just press enter for more. + * addr is always in hex with or without leading 0x + */ +static kdb_cpu_cmd_t +kdb_display_mem(int argc, const char **argv, int wordsz, kdb_usgf_t usg_fp) +{ + static kdbva_t addr; + static int len; + static domid_t id = DOMID_IDLE; + + if (argc == -1) { + _kdb_display_mem(&addr, &len, wordsz, id, 0); /* cmd repeat */ + return KDB_CPU_MAIN_KDB; + } + if (argc <= 1 || *argv[1] == '?') + return (*usg_fp)(); + + id = DOMID_IDLE; /* not a command repeat, reset dom id */ + if (argc >= 4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + /* check if num of bytes to display is given by user */ + if (argc >= 3) { + if (!kdb_str2deci(argv[2], &len)) { + kdbp("Invalid length:%s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + } else + len = 32; /* default read len */ + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + _kdb_display_mem(&addr, &len, wordsz, id, 0); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Dispaly Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_dw(void) +{ + kdbp("dw vaddr|sym [num][domid] : dump mem word. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 4, kdb_usgf_dw); +} + +/* + * FUNCTION: Dispaly Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_dd(void) +{ + kdbp("dd vaddr|sym [num][domid] : dump dword. num required for domid\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dd(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return kdb_display_mem(argc, argv, 8, kdb_usgf_dd); +} + +/* + * FUNCTION: Modify Memory Word + */ +static kdb_cpu_cmd_t +kdb_usgf_mw(void) +{ + kdbp("mw vaddr|sym val [domid] : modify memory word in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mw(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_mw(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val, 4, id) != 4) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Memory DoubleWord + */ +static kdb_cpu_cmd_t +kdb_usgf_md(void) +{ + kdbp("md vaddr|sym val [domid] : modify memory dword in vaddr\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_md(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong val; + kdbva_t addr; + domid_t id = DOMID_IDLE; + + if (argc < 3) { + return kdb_usgf_md(); + } + if (argc >=4) { + if (!kdb_str2domid(argv[3], &id, 1)) { + return KDB_CPU_MAIN_KDB; + } + } + if (!kdb_str2ulong(argv[2], &val)) { + kdbp("Invalid val: %s\n", argv[2]); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, id)) { + kdbp("Invalid addr/sym: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (kdb_write_mem(addr, (kdbbyt_t *)&val,sizeof(val),id) != sizeof(val)) + kdbp("Unable to set 0x%lx to 0x%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +struct Xgt_desc_struct { + unsigned short size; + unsigned long address __attribute__((packed)); +}; + +void +kdb_show_special_regs(struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + unsigned short tr; /* Task Register segment selector */ + __u64 efer; + + kdbp("\nSpecial Registers:\n"); + __asm__ __volatile__ ("sidt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("IDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + kdbp("GDTR: addr: %016lx limit: %04x\n", desc.address, desc.size); + + kdbp("cr0: %016lx cr2: %016lx\n", read_cr0(), read_cr2()); + kdbp("cr3: %016lx cr4: %016lx\n", read_cr3(), read_cr4()); + __asm__ __volatile__ ("str (%0) \n":: "a"(&tr) : "memory"); + kdbp("TR: %x\n", tr); + + rdmsrl(MSR_EFER, efer); /* IA32_EFER */ + kdbp("efer:"KDBF64" LMA(IA-32e mode):%d SCE(syscall/sysret):%d\n", + efer, ((efer&EFER_LMA) != 0), ((efer&EFER_SCE) != 0)); + + kdbp("DR0: %016lx DR1:%016lx DR2:%016lx\n", kdb_rd_dbgreg(0), + kdb_rd_dbgreg(1), kdb_rd_dbgreg(2)); + kdbp("DR3: %016lx DR6:%016lx DR7:%016lx\n", kdb_rd_dbgreg(3), + kdb_rd_dbgreg(6), kdb_rd_dbgreg(7)); +} + +/* + * FUNCTION: Dispaly Registers. If "sp" argument, then display additional regs + */ +static kdb_cpu_cmd_t +kdb_usgf_dr(void) +{ + kdbp("dr [sp]: display registers. sp to display special regs also\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dr(); + + KDBGP1("regs:%p .rsp:%lx .rip:%lx\n", regs, regs->rsp, regs->rip); + show_registers(regs); + if (argc > 1 && !strcmp(argv[1], "sp")) + kdb_show_special_regs(regs); + return KDB_CPU_MAIN_KDB; +} + +/* show registers on stack bottom where guest context is. same as dr if + * not running in guest mode */ +static kdb_cpu_cmd_t +kdb_usgf_drg(void) +{ + kdbp("drg: display active guest registers at stack bottom\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_drg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_drg(); + + kdbp("\tNote: ds/es/fs/gs etc.. are not saved from the cpu\n"); + kdb_print_uregs(guest_cpu_user_regs()); + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Modify Register + */ +static kdb_cpu_cmd_t +kdb_usgf_mr(void) +{ + kdbp("mr reg val : Modify Register. val assumed in hex\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int regoffs; + ulong val; + + if (argc != 3 || !kdb_str2ulong(argv[2], &val)) { + return kdb_usgf_mr(); + } + argp = argv[1]; + +#if defined(__x86_64__) + if ((regoffs=kdb_valid_reg(argp)) != -1) + *((uint64_t *)((char *)regs+regoffs)) = val; +#else + if (!strcmp(argp, "eax")) + regs->eax = val; + else if (!strcmp(argp, "ebx")) + regs->ebx = val; + else if (!strcmp(argp, "ecx")) + regs->ecx = val; + else if (!strcmp(argp, "edx")) + regs->edx = val; + else if (!strcmp(argp, "esi")) + regs->esi = val; + else if (!strcmp(argp, "edi")) + regs->edi = val; + else if (!strcmp(argp, "ebp")) + regs->ebp = val; + else if (!strcmp(argp, "esp")) + regs->esp = val; + else if (!strcmp(argp, "eflags") || !strcmp(argp, "rflags")) + regs->eflags = val; +#endif + else + kdbp("Error. Bad register : %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * FUNCTION: Single Step + */ +static kdb_cpu_cmd_t +kdb_usgf_ss(void) +{ + kdbp("ss: single step\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ss(int argc, const char **argv, struct cpu_user_regs *regs) +{ + #define KDB_HALT_INSTR 0xf4 + + kdbbyt_t byte; + struct domain *dp = current->domain; + domid_t id = guest_mode(regs) ? dp->domain_id : DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ss(); + + KDBGP("enter kdb_cmdf_ss \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (kdb_read_mem(regs->KDBIP, &byte, 1, id) == 1) { + if (byte == KDB_HALT_INSTR) { + kdbp("kdb: jumping over halt instruction\n"); + regs->KDBIP++; + } + } else { + kdbp("kdb: Failed to read byte at: %lx\n", regs->KDBIP); + return KDB_CPU_MAIN_KDB; + } + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) { + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + current->arch.hvm_vcpu.single_step = 1; + } else + regs->eflags |= X86_EFLAGS_TF; + + return KDB_CPU_SS; +} + +/* + * FUNCTION: Next Instruction, step over the call instr to the next instr + */ +static kdb_cpu_cmd_t +kdb_usgf_ni(void) +{ + kdbp("ni: single step, stepping over function calls\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ni(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int sz, i; + domid_t id=guest_mode(regs) ? current->domain->domain_id:DOMID_IDLE; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ni(); + + KDBGP("enter kdb_cmdf_ni \n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if ((sz=kdb_check_call_instr(id, regs->KDBIP)) == 0) /* !call instr */ + return kdb_cmdf_ss(argc, argv, regs); /* just do ss */ + + if ((i=kdb_set_bp(id, regs->KDBIP+sz, 1,0,0,0,0)) >= KDBMAXSBP) /* failed */ + return KDB_CPU_MAIN_KDB; + + kdb_sbpa[i].bp_ni = 1; + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + else + regs->eflags &= ~X86_EFLAGS_TF; + + return KDB_CPU_NI; +} + +static void +kdb_btf_enable(void) +{ + u64 debugctl; + rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); + wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 0x2); +} + +/* + * FUNCTION: Single Step to branch. Doesn't seem to work very well. + */ +static kdb_cpu_cmd_t +kdb_usgf_ssb(void) +{ + kdbp("ssb: singe step to branch\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_ssb(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_ssb(); + + KDBGP("MUK: enter kdb_cmdf_ssb\n"); + if (!regs) { + kdbp("%s: regs not available\n", __FUNCTION__); + return KDB_CPU_MAIN_KDB; + } + if (is_hvm_or_hyb_vcpu(current)) + current->domain->debugger_attached = 1; /* vmx/svm_do_resume()*/ + + regs->eflags |= X86_EFLAGS_TF; + kdb_btf_enable(); + return KDB_CPU_SS; +} + +/* + * FUNCTION: Continue Execution. TF must be cleared here as this could run on + * any cpu. Hence not OK to do it from kdb_end_session. + */ +static kdb_cpu_cmd_t +kdb_usgf_go(void) +{ + kdbp("go: leave kdb and continue execution\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_go(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_go(); + + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_GO; +} + +/* All cpus must display their current context */ +static kdb_cpu_cmd_t +kdb_cpu_status_all(int ccpu, struct cpu_user_regs *regs) +{ + int cpu; + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) /* hung cpu */ + continue; + kdb_cpu_cmd[cpu] = KDB_CPU_SHOWPC; + while (kdb_cpu_cmd[cpu]==KDB_CPU_SHOWPC); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* + * display/switch CPU. + * Argument: + * none: just go back to initial cpu + * cpunum: switch to given vpu + * "all": show one line status of all cpus + */ +extern volatile int kdb_init_cpu; +static kdb_cpu_cmd_t +kdb_usgf_cpu(void) +{ + kdbp("cpu [all|num]: none will switch back to initial cpu\n"); + kdbp(" cpunum to switch to the vcpu. all to show status\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + int ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cpu(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + return kdb_cpu_status_all(ccpu, regs); + + cpu = (int)simple_strtoul(argv[1], NULL, 0); /* handles 0x */ + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && + cpu_online(cpu) && kdb_cpu_cmd[cpu] == KDB_CPU_PAUSE) + { + kdbp("Switching to cpu:%d\n", cpu); + kdb_cpu_cmd[cpu] = KDB_CPU_MAIN_KDB; + + /* clear any single step on the current cpu */ + regs->eflags &= ~X86_EFLAGS_TF; + return KDB_CPU_PAUSE; + } else { + if (cpu != ccpu) + kdbp("Unable to switch to cpu:%d\n", cpu); + else { + kdb_display_pc(regs); + } + return KDB_CPU_MAIN_KDB; + } + } + /* no arg means back to initial cpu */ + if (!kdb_sys_crash && ccpu != kdb_init_cpu) { + if (kdb_cpu_cmd[kdb_init_cpu] == KDB_CPU_PAUSE) { + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_MAIN_KDB; + return KDB_CPU_PAUSE; + } else + kdbp("Unable to switch to: %d\n", kdb_init_cpu); + } + return KDB_CPU_MAIN_KDB; +} + +/* send NMI to all or given CPU. Must be crashed/fatal state */ +static kdb_cpu_cmd_t +kdb_usgf_nmi(void) +{ + kdbp("nmi cpu#|all: send nmi cpu/s. must reboot when done with kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_nmi(int argc, const char **argv, struct cpu_user_regs *regs) +{ + cpumask_t cpumask; + int ccpu = smp_processor_id(); + + if (argc <= 1 || (argc > 1 && *argv[1] == '?')) + return kdb_usgf_nmi(); + + if (!kdb_sys_crash) { + kdbp("kdb: nmi cmd available in crashed state only\n"); + return KDB_CPU_MAIN_KDB; + } + if (!strcmp(argv[1], "all")) + cpumask = cpu_online_map; + else { + int cpu = (int)simple_strtoul(argv[1], NULL, 0); + if (cpu >= 0 && cpu < NR_CPUS && cpu != ccpu && cpu_online(cpu)) + cpumask = *cpumask_of(cpu); + else { + kdbp("KDB nmi: invalid cpu %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + } + kdb_nmi_pause_cpus(cpumask); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_percpu(void) +{ + kdbp("percpu: display per cpu pointers\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_percpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_percpu(); + kdb_dump_time_pcpu(); + return KDB_CPU_MAIN_KDB; +} + +/* ========================= Breakpoints ==================================== */ + +static void +kdb_prnt_bp_cond(int bpnum) +{ + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { + kdbp(" ( %s %c%c %lx )\n", + kdb_regoffs_to_name(bpcp->bp_cond_lhs), + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } else { + kdbp(" ( %lx %c%c %lx )\n", bpcp->bp_cond_lhs, + bpcp->bp_cond_type == 1 ? '=' : '!', '=', bpcp->bp_cond_rhs); + } +} + +static void +kdb_prnt_bp_extra(int bpnum) +{ + if (kdb_sbpa[bpnum].bp_type == 2) { + ulong i, arg, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdbp(" will trace "); + for (i=0; i < KDB_MAXBTP && btp[i]; i++) + if ((arg=btp[i]) < sizeof (struct cpu_user_regs)) { + kdbp(" %s ", kdb_regoffs_to_name(arg)); + } else { + kdbp(" %lx ", arg); + } + kdbp("\n"); + + } else if (kdb_sbpa[bpnum].bp_type == 1) + kdb_prnt_bp_cond(bpnum); +} + +/* + * List software breakpoints + */ +static kdb_cpu_cmd_t +kdb_display_sbkpts(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) { + struct domain *dp = kdb_domid2ptr(kdb_sbpa[i].bp_domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + continue; + } + kdbp("[%d]: domid:%d 0x%lx ", i, + kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(kdb_sbpa[i].bp_domid, kdb_sbpa[i].bp_addr,"\n"); + kdb_prnt_bp_extra(i); + } + return KDB_CPU_MAIN_KDB; +} + +/* + * Check if any breakpoints that we need to install (delayed install) + * Returns: 1 if yes, 0 if none. + */ +int +kdb_swbp_exists(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && !kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} +/* + * Check if any breakpoints were deleted this kdb session + * Returns: 0 if none, 1 if yes + */ +static int +kdb_swbp_deleted(void) +{ + int i; + for (i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) + return 1; + return 0; +} + +/* + * Flush deleted sw breakpoints + */ +void +kdb_flush_swbp_table(void) +{ + int i; + KDBGP("ccpu:%d flush_swbp_table: deleted:%x\n", smp_processor_id(), + kdb_swbp_deleted()); + for(i=0; i < KDBMAXSBP; i++) + if (kdb_sbpa[i].bp_addr && kdb_sbpa[i].bp_deleted) { + KDBGP("flush:[%x] addr:0x%lx\n",i,kdb_sbpa[i].bp_addr); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } +} + +/* + * Delete/Clear a sw breakpoint + */ +static kdb_cpu_cmd_t +kdb_usgf_bc(void) +{ + kdbp("bc $num|all : clear given or all breakpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, bpnum = -1, delall = 0; + const char *argp; + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_bc(); + + if (!kdb_swbp_exists()) { + kdbp("No breakpoints are set\n"); + return KDB_CPU_MAIN_KDB; + } + argp = argv[1]; + + if (!strcmp(argp, "all")) + delall = 1; + else if (!kdb_str2deci(argp, &bpnum) || bpnum < 0 || bpnum > KDBMAXSBP) { + kdbp("Invalid bpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + for (i=0; i < KDBMAXSBP; i++) { + if (delall && kdb_sbpa[i].bp_addr) { + kdbp("Deleted breakpoint [%x] addr:0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + continue; + } + if (bpnum != -1 && bpnum == i) { + kdbp("Deleted breakpoint [%x] at 0x%lx domid:%d\n", + (int)i, kdb_sbpa[i].bp_addr, kdb_sbpa[i].bp_domid); + if (kdb_sbpa[i].bp_just_added) + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + else + kdb_sbpa[i].bp_deleted = 1; + break; + } + } + if (i >= KDBMAXSBP && !delall) + kdbp("Unable to delete breakpoint: %s\n", argp); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Install a breakpoint in the given array entry + * Returns: 0 : failed to install + * 1 : installed successfully + */ +static int +kdb_install_swbp(int idx) /* which entry in the bp array */ +{ + kdbva_t addr = kdb_sbpa[idx].bp_addr; + domid_t domid = kdb_sbpa[idx].bp_domid; + kdbbyt_t *p = &kdb_sbpa[idx].bp_originst; + struct domain *dp = kdb_domid2ptr(domid); + + if (dp == NULL || dp->is_dying) { + memset(&kdb_sbpa[idx], 0, sizeof(kdb_sbpa[idx])); + kdbp("Removed bp %d addr:%p domid:%d\n", idx, addr, domid); + return 0; + } + + if (kdb_read_mem(addr, p, KDBBPSZ, domid) != KDBBPSZ){ + kdbp("Failed(R) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + if (kdb_write_mem(addr, &kdb_bpinst, KDBBPSZ, domid) != KDBBPSZ) { + kdbp("Failed(W) to install bp:%x at:0x%lx domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, domid); + return 0; + } + KDBGP("install_swbp: installed bp:%x at:0x%lx ccpu:%x domid:%d\n", + idx, kdb_sbpa[idx].bp_addr, smp_processor_id(), domid); + return 1; +} + +/* + * Install all the software breakpoints + */ +void +kdb_install_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_deleted && kdb_sbpa[i].bp_addr) + kdb_install_swbp(i); +} + +static void +kdb_uninstall_a_swbp(int i) +{ + kdbva_t addr = kdb_sbpa[i].bp_addr; + kdbbyt_t originst = kdb_sbpa[i].bp_originst; + domid_t id = kdb_sbpa[i].bp_domid; + + kdb_sbpa[i].bp_just_added = 0; + if (!addr) + return; + if (kdb_write_mem(addr, &originst, KDBBPSZ, id) != KDBBPSZ) { + kdbp("Failed to uninstall breakpoint %x at:0x%lx domid:%d\n", + i, kdb_sbpa[i].bp_addr, id); + } +} + +/* + * Uninstall all the software breakpoints at beginning of kdb session + */ +void +kdb_uninstall_all_swbp(void) +{ + int i; + for(i=0; i < KDBMAXSBP; i++) + kdb_uninstall_a_swbp(i); + KDBGP("ccpu:%d uninstalled all bps\n", smp_processor_id()); +} + +/* RETURNS: rc == 2: condition was not met, rc == 3: condition was met */ +static int +kdb_check_bp_condition(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong res = 0, lhsval=0; + struct kdb_bpcond *bpcp = &kdb_sbpa[bpnum].u.bp_cond; + + if (bpcp->bp_cond_status == 1) { /* register condition */ + uint64_t *rp = (uint64_t *)((char *)regs + bpcp->bp_cond_lhs); + lhsval = *rp; + } else if (bpcp->bp_cond_status == 2) { /* memaddr condition */ + ulong addr = bpcp->bp_cond_lhs; + int num = sizeof(lhsval); + + if (kdb_read_mem(addr, (kdbbyt_t *)&lhsval, num, domid) != num) { + kdbp("kdb: unable to read %d bytes at %lx\n", num, addr); + return 3; + } + } + if (bpcp->bp_cond_type == 1) /* lhs == rhs */ + res = (lhsval == bpcp->bp_cond_rhs); + else /* lhs != rhs */ + res = (lhsval != bpcp->bp_cond_rhs); + + if (!res) + kdbp("KDB: [%d]Ignoring bp:%d condition not met. val:%lx\n", + smp_processor_id(), bpnum, lhsval); + + KDBGP1("bpnum:%d domid:%d cond: %d %d %lx %lx res:%d\n", bpnum, domid, + bpcp->bp_cond_status, bpcp->bp_cond_type, bpcp->bp_cond_lhs, + bpcp->bp_cond_rhs, res); + + return (res ? 3 : 2); +} + +static void +kdb_prnt_btp_info(int bpnum, struct cpu_user_regs *regs, domid_t domid) +{ + ulong i, arg, val, num, *btp = kdb_sbpa[bpnum].u.bp_btp; + + kdb_prnt_addr2sym(domid, regs->KDBIP, "\n"); + num = kdb_guest_bitness(domid)/8; + for (i=0; i < KDB_MAXBTP && (arg=btp[i]); i++) { + if (arg < sizeof (struct cpu_user_regs)) { + uint64_t *rp = (uint64_t *)((char *)regs + arg); + kdbp(" %s: %016lx ", kdb_regoffs_to_name(arg), *rp); + } else { + if (kdb_read_mem(arg, (kdbbyt_t *)&val, num, domid) != num) + kdbp("kdb: unable to read %d bytes at %lx\n", num, arg); + if (num == 8) + kdbp(" %016lx:%016lx ", arg, val); + else + kdbp(" %08lx:%08lx ", arg, val); + } + } + kdbp("\n"); + KDBGP1("bpnum:%d domid:%d btp:%p num:%d\n", bpnum, domid, btp, num); +} + +/* + * Check if the BP trap belongs to us. + * Return: 0 : not one of ours. IP not changed. (leave kdb) + * 1 : one of ours but deleted. IP decremented. (leave kdb) + * 2 : one of ours but condition not met, or btp. IP decremented.(leave) + * 3 : one of ours and active. IP decremented. (stay in kdb) + */ +int +kdb_check_sw_bkpts(struct cpu_user_regs *regs) +{ + int i, rc=0; + domid_t curid; + + curid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + for(i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_domid == curid && + kdb_sbpa[i].bp_addr == (regs->KDBIP- KDBBPSZ)) { + + regs->KDBIP -= KDBBPSZ; + rc = 3; + + if (kdb_sbpa[i].bp_ni) { + kdb_uninstall_a_swbp(i); + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + } else if (kdb_sbpa[i].bp_deleted) { + rc = 1; + } else if (kdb_sbpa[i].bp_type == 1) { + rc = kdb_check_bp_condition(i, regs, curid); + } else if (kdb_sbpa[i].bp_type == 2) { + kdb_prnt_btp_info(i, regs, curid); + rc = 2; + } + KDBGP1("ccpu:%d rc:%d curid:%d domid:%d addr:%lx\n", + smp_processor_id(), rc, curid, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + break; + } + } + return (rc); +} + +/* Eg: r6 == 0x123EDF or 0xFFFF2034 != 0xDEADBEEF + * regoffs: -1 means lhs is not reg. else offset of reg in cpu_user_regs + * addr: memory location if lhs is not register, eg, 0xFFFF2034 + * condp : points to != or == + * rhsval : right hand side value + */ +static void +kdb_set_bp_cond(int bpnum, int regoffs, ulong addr, char *condp, ulong rhsval) +{ + if (bpnum >= KDBMAXSBP) { + kdbp("BUG: %s got invalid bpnum\n", __FUNCTION__); + return; + } + if (regoffs != -1) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 1; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = regoffs; + } else if (addr != 0) { + kdb_sbpa[bpnum].u.bp_cond.bp_cond_status = 2; + kdb_sbpa[bpnum].u.bp_cond.bp_cond_lhs = addr; + } else { + kdbp("error: invalid call to kdb_set_bp_cond\n"); + return; + } + kdb_sbpa[bpnum].u.bp_cond.bp_cond_rhs = rhsval; + + if (*condp == '!') + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 2; + else + kdb_sbpa[bpnum].u.bp_cond.bp_cond_type = 1; +} + +/* install breakpt at given addr. + * ni: bp for next instr + * btpa: ptr to args for btp for printing when bp is hit + * lhsp/condp/rhsp: point to strings of condition + * + * RETURNS: the index in array where installed. KDBMAXSBP if error + */ +static int +kdb_set_bp(domid_t domid, kdbva_t addr, int ni, ulong *btpa, char *lhsp, + char *condp, char *rhsp) +{ + int i, pre_existing = 0, regoffs = -1; + ulong memloc=0, rhsval=0, tmpul; + + if (btpa && (lhsp || rhsp || condp)) { + kdbp("internal error. btpa and (lhsp || rhsp || condp) set\n"); + return KDBMAXSBP; + } + if (lhsp && ((regoffs=kdb_valid_reg(lhsp)) == -1) && + kdb_str2ulong(lhsp, &memloc) && + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0) { + + kdbp("error: invalid argument: %s\n", lhsp); + return KDBMAXSBP; + } + if (rhsp && ! kdb_str2ulong(rhsp, &rhsval)) { + kdbp("error: invalid argument: %s\n", rhsp); + return KDBMAXSBP; + } + + /* see if bp already set */ + for (i=0; i < KDBMAXSBP; i++) { + if (kdb_sbpa[i].bp_addr==addr && kdb_sbpa[i].bp_domid==domid) { + + if (kdb_sbpa[i].bp_deleted) { + /* just re-set this bp again */ + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + pre_existing = 1; + } else { + kdbp("Breakpoint already set \n"); + return KDBMAXSBP; + } + } + } + /* see if any room left for another breakpoint */ + for (i=0; i < KDBMAXSBP; i++) + if (!kdb_sbpa[i].bp_addr) + break; + if (i >= KDBMAXSBP) { + kdbp("ERROR: Breakpoint table full....\n"); + return i; + } + kdb_sbpa[i].bp_addr = addr; + kdb_sbpa[i].bp_domid = domid; + if (btpa) { + kdb_sbpa[i].bp_type = 2; + kdb_sbpa[i].u.bp_btp = btpa; + } else if (regoffs != -1 || memloc) { + kdb_sbpa[i].bp_type = 1; + kdb_set_bp_cond(i, regoffs, memloc, condp, rhsval); + } else + kdb_sbpa[i].bp_type = 0; + + if (kdb_install_swbp(i)) { /* make sure it can be done */ + if (ni) + return i; + + kdb_uninstall_a_swbp(i); /* dont' show user INT3 */ + if (!pre_existing) /* make sure no is cpu sitting on it */ + kdb_sbpa[i].bp_just_added = 1; + + kdbp("bp %d set for domid:%d at: 0x%lx ", i, kdb_sbpa[i].bp_domid, + kdb_sbpa[i].bp_addr); + kdb_prnt_addr2sym(domid, addr, "\n"); + kdb_prnt_bp_extra(i); + } else { + kdbp("ERROR:Can't install bp: 0x%lx domid:%d\n", addr, domid); + if (pre_existing) /* in case a cpu is sitting on this bp in traps */ + kdb_sbpa[i].bp_deleted = 1; + else + memset(&kdb_sbpa[i], 0, sizeof(kdb_sbpa[i])); + return KDBMAXSBP; + } + /* make sure swbp reporting is enabled in the vmcb/vmcs */ + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + struct domain *dp = kdb_domid2ptr(domid); + dp->debugger_attached = 1; /* see svm_do_resume/vmx_do_ */ + KDBGP("debugger_attached set. domid:%d\n", domid); + } + return i; +} + +/* + * Set/List Software Breakpoint/s + */ +static kdb_cpu_cmd_t +kdb_usgf_bp(void) +{ + kdbp("bp [addr|sym][domid][condition]: display or set a breakpoint\n"); + kdbp(" where cond is like: r6 == 0x123F or rax != DEADBEEF or \n"); + kdbp(" ffff82c48038fe58 == 321E or 0xffff82c48038fe58 != 0\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9"); + kdbp(" r10 r11 r12 r13 r14 r15 rflags\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_bp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + int idx = -1; + domid_t domid = DOMID_IDLE; + char *domidstrp, *lhsp=NULL, *condp=NULL, *rhsp=NULL; + + if ((argc > 1 && *argv[1] == '?') || argc == 4 || argc > 6) + return kdb_usgf_bp(); + + if (argc < 2 || kdb_sys_crash) /* list all set breakpoints */ + return kdb_display_sbkpts(); + + /* valid argc either: 2 3 5 or 6 + * 'bp idle_loop r6 == 0xc000' OR 'bp idle_loop 3 r9 != 0xdeadbeef' */ + idx = (argc == 5) ? 2 : ((argc == 6) ? 3 : idx); + if (argc >= 5 ) { + lhsp = (char *)argv[idx]; + condp = (char *)argv[idx+1]; + rhsp = (char *)argv[idx+2]; + + if (!kdb_str2ulong(rhsp, NULL) || *(condp+1) != '=' || + (*condp != '=' && *condp != '!')) { + + return kdb_usgf_bp(); + } + } + domidstrp = (argc == 3 || argc == 6 ) ? (char *)argv[2] : NULL; + if (domidstrp && !kdb_str2domid(domidstrp, &domid, 1)) { + return kdb_usgf_bp(); + } + if (argc > 3 && is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domain not supported yet for conditional bp\n"); + return KDB_CPU_MAIN_KDB; + } + + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + /* make sure xen addr is in xen text, otherwise bp set in 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + kdb_set_bp(domid, addr, 0, NULL, lhsp, condp, rhsp); /* 0 is ni flag */ + return KDB_CPU_MAIN_KDB; +} + + +/* trace breakpoint, meaning, upon bp trace/print some info and continue */ + +static kdb_cpu_cmd_t +kdb_usgf_btp(void) +{ + kdbp("btp addr|sym [domid] reg|domid-mem-addr... : breakpoint trace\n"); + kdbp(" regs: rax rbx rcx rdx rsi rdi rbp rsp r8 r9 "); + kdbp("r10 r11 r12 r13 r14 r15 rflags\n"); + kdbp(" Eg. btp idle_cpu 7 rax rbx 0x20ef5a5 r9\n"); + kdbp(" will print rax, rbx, *(long *)0x20ef5a5, r9 and continue\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_btp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i, btpidx, numrd, argsidx, regoffs = -1; + kdbva_t addr, memloc=0; + domid_t domid = DOMID_IDLE; + ulong *btpa, tmpul; + + if ((argc > 1 && *argv[1] == '?') || argc < 3) + return kdb_usgf_btp(); + + argsidx = 2; /* assume 3rd arg is not domid */ + if (argc > 3 && kdb_str2domid(argv[2], &domid, 0)) { + + if (is_hvm_or_hyb_domain(kdb_domid2ptr(domid))) { + kdbp("HVM domains are not currently supprted\n"); + return KDB_CPU_MAIN_KDB; + } else + argsidx = 3; /* 3rd arg is a domid */ + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + /* make sure xen addr is in xen text, otherwise will trace 64bit dom0/U */ + if (domid == DOMID_IDLE && + (addr < XEN_VIRT_START || addr > XEN_VIRT_END)) + { + kdbp("addr:%lx not in xen text\n", addr); + return KDB_CPU_MAIN_KDB; + } + + numrd = kdb_guest_bitness(domid)/8; + if (kdb_read_mem(addr, (kdbbyt_t *)&tmpul, numrd, domid) != numrd) { + kdbp("Unable to read mem from %s (%lx)\n", argv[1], addr); + return KDB_CPU_MAIN_KDB; + } + + for (btpidx=0; btpidx < KDBMAXSBP && kdb_btp_ap[btpidx]; btpidx++); + if (btpidx >= KDBMAXSBP) { + kdbp("error: table full. delete few breakpoints\n"); + return KDB_CPU_MAIN_KDB; + } + btpa = kdb_btp_argsa[btpidx]; + memset(btpa, 0, sizeof(kdb_btp_argsa[0])); + + for (i=0; argv[argsidx]; i++, argsidx++) { + + if (((regoffs=kdb_valid_reg(argv[argsidx])) == -1) && + kdb_str2ulong(argv[argsidx], &memloc) && + (memloc < sizeof (struct cpu_user_regs) || + kdb_read_mem(memloc, (kdbbyt_t *)&tmpul, sizeof(tmpul), domid)==0)){ + + kdbp("error: invalid argument: %s\n", argv[argsidx]); + return KDB_CPU_MAIN_KDB; + } + if (i >= KDB_MAXBTP) { + kdbp("error: cannot specify more than %d args\n", KDB_MAXBTP); + return KDB_CPU_MAIN_KDB; + } + btpa[i] = (regoffs == -1) ? memloc : regoffs; + } + + i = kdb_set_bp(domid, addr, 0, btpa, 0, 0, 0); /* 0 is ni flag */ + if (i < KDBMAXSBP) + kdb_btp_ap[btpidx] = kdb_btp_argsa[btpidx]; + + return KDB_CPU_MAIN_KDB; +} + +/* + * Set/List watchpoints, ie, hardware breakpoint/s, in hypervisor + * Usage: wp [sym|addr] [w|i] w == write only data watchpoint + * i == IO watchpoint (read/write) + * + * Eg: wp : list all watchpoints set + * wp addr : set a read/write wp at given addr + * wp addr w : set a write only wp at given addr + * wp addr i : set an IO wp at given addr (16bits port #) + * + * TBD: allow to be set on particular cpu + */ +static kdb_cpu_cmd_t +kdb_usgf_wp(void) +{ + kdbp("wp [addr|sym][w|i]: display or set watchpoint. writeonly or IO\n"); + kdbp("\tnote: watchpoint is triggered after the instruction executes\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbva_t addr; + domid_t domid = DOMID_IDLE; + int rw = 3, len = 4; /* for now just default to 4 bytes len */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_wp(); + + if (argc <= 1 || kdb_sys_crash) { /* list all set watchpoints */ + kdb_do_watchpoints(0, 0, 0); + return KDB_CPU_MAIN_KDB; + } + if (!kdb_str2addr(argv[1], &addr, domid) || addr == 0) { + kdbp("Invalid argument:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + if (argc > 2) { + if (!strcmp(argv[2], "w")) + rw = 1; + else if (!strcmp(argv[2], "i")) + rw = 2; + else { + return kdb_usgf_wp(); + } + } + kdb_do_watchpoints(addr, rw, len); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_wc(void) +{ + kdbp("wc $num|all : clear given or all watchpoints\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + const char *argp; + int wpnum; /* wp num to delete. -1 for all */ + + if (argc != 2 || *argv[1] == '?') + return kdb_usgf_wc(); + + argp = argv[1]; + + if (!strcmp(argp, "all")) + wpnum = -1; + else if (!kdb_str2deci(argp, &wpnum)) { + kdbp("Invalid wpnum: %s\n", argp); + return KDB_CPU_MAIN_KDB; + } + kdb_clear_wps(wpnum); + return KDB_CPU_MAIN_KDB; +} + +/* display struct hvm_vcpu{} in struct vcpu.arch{} */ +static kdb_cpu_cmd_t +kdb_usgf_vcpuh(void) +{ + kdbp("vcpuh vcpu-ptr : display hvm_vcpu struct\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpuh(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *vp; + struct hvm_vcpu *hvp; + struct hvm_io_op *ioop; + struct vlapic *vlp; + + if (argc < 2 || *argv[1] == '?') + return kdb_usgf_vcpuh(); + + if (!kdb_str2ulong(argv[1], (ulong *)&vp) || !kdb_vcpu_valid(vp) || + !is_hvm_or_hyb_vcpu(vp)) { + + kdbp("kdb: Bad VCPU: %s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + + hvp = &vp->arch.hvm_vcpu; + vlp = &hvp->vlapic; + kdbp("vcpu:%lx id:%d domid:%d\n", vp, vp->vcpu_id, vp->domain->domain_id); + + ioop = NULL; /* compiler warning */ + kdbp("&hvm_vcpu:%lx guest_efer:"KDBFL"\n", hvp, hvp->guest_efer); + kdbp(" guest_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->guest_cr[0], + hvp->guest_cr[1],hvp->guest_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->guest_cr[3], + hvp->guest_cr[4]); + kdbp(" hw_cr: [0]:"KDBFL" [1]:"KDBFL" [2]:"KDBFL"\n", hvp->hw_cr[0], + hvp->hw_cr[1], hvp->hw_cr[2]); + kdbp(" [3]:"KDBFL" [4]:"KDBFL"\n", hvp->hw_cr[3], hvp->hw_cr[4]); + + kdbp(" VLAPIC: base msr:"KDBF64" dis:%x tmrdiv:%x\n", + vlp->hw.apic_base_msr, vlp->hw.disabled, vlp->hw.timer_divisor); + kdbp(" regs:%p regs_page:%p\n", vlp->regs, vlp->regs_page); + kdbp(" periodic time:\n"); + kdb_prnt_periodic_time(&vlp->pt); + + kdbp(" xen_port:%x flag_dr_dirty:%x dbg_st_latch:%x\n", hvp->xen_port, + hvp->flag_dr_dirty, hvp->debug_state_latch); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + + struct arch_vmx_struct *vxp = &hvp->u.vmx; + kdbp(" &vmx: %p vmcs:%lx active_cpu:%x launched:%x\n", vxp, vxp->vmcs, + vxp->active_cpu, vxp->launched); +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" exec_ctrl:%x vpid:$%d\n", vxp->exec_control, vxp->vpid); +#endif + kdbp(" host_cr0: "KDBFL" vmx: {realm:%x emulate:%x}\n", + vxp->host_cr0, vxp->vmx_realmode, vxp->vmx_emulate); + +#ifdef __x86_64__ + kdbp(" &msr_state:%p\n", &vxp->msr_state); +#endif + } else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + struct arch_svm_struct *svp = &hvp->u.svm; +#if XEN_VERSION != 4 /* xen 3.x.x */ + kdbp(" &svm: vmcb:%lx pa:"KDBF64" asid:"KDBF64"\n", svp, svp->vmcb, + svp->vmcb_pa, svp->asid_generation); +#endif + kdbp(" msrpm:%p lnch_core:%x vmcb_sync:%x\n", svp->msrpm, + svp->launch_core, svp->vmcb_in_sync); + } + kdbp(" cachemode:%x io: {state: %x data: "KDBFL"}\n", hvp->cache_mode, + hvp->hvm_io.io_state, hvp->hvm_io.io_data); + kdbp(" mmio: {gva: "KDBFL" gpfn: "KDBFL"}\n", hvp->hvm_io.mmio_gva, + hvp->hvm_io.mmio_gpfn); + + return KDB_CPU_MAIN_KDB; +} + +/* also look into arch_get_info_guest() to get context */ +static void +kdb_print_uregs(struct cpu_user_regs *regs) +{ +#ifdef __x86_64__ + kdbp(" rflags: %016lx rip: %016lx\n", regs->rflags, regs->rip); + kdbp(" rax: %016lx rbx: %016lx rcx: %016lx\n", + regs->rax, regs->rbx, regs->rcx); + kdbp(" rdx: %016lx rsi: %016lx rdi: %016lx\n", + regs->rdx, regs->rsi, regs->rdi); + kdbp(" rbp: %016lx rsp: %016lx r8: %016lx\n", + regs->rbp, regs->rsp, regs->r8); + kdbp(" r9: %016lx r10: %016lx r11: %016lx\n", + regs->r9, regs->r10, regs->r11); + kdbp(" r12: %016lx r13: %016lx r14: %016lx\n", + regs->r12, regs->r13, regs->r14); + kdbp(" r15: %016lx\n", regs->r15); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%08lx entryvec:%08lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#else + kdbp(" eflags: %016lx eip: 016lx\n", regs->eflags, regs->eip); + kdbp(" eax: %08x ebx: %08x ecx: %08x edx: %08x\n", + regs->eax, regs->ebx, regs->ecx, regs->edx); + kdbp(" esi: %08x edi: %08x ebp: %08x esp: %08x\n", + regs->esi, regs->edi, regs->ebp, regs->esp); + kdbp(" ds: %04x es: %04x fs: %04x gs: %04x " + " ss: %04x cs: %04x\n", regs->ds, regs->es, regs->fs, + regs->gs, regs->ss, regs->cs); + kdbp(" errcode:%04lx entryvec:%04lx upcall_mask:%lx\n", + regs->error_code, regs->entry_vector, regs->saved_upcall_mask); +#endif +} + +#if XEN_SUBVERSION < 3 /* xen 3.1.x or xen 3.2.x */ +#ifdef CONFIG_COMPAT + #undef vcpu_info + #define vcpu_info(v, field) \ + (*(!has_32bit_shinfo((v)->domain) ? \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->native.field : \ + (typeof(&(v)->vcpu_info->compat.field))&(v)->vcpu_info->compat.field)) + + #undef __shared_info + #define __shared_info(d, s, field) \ + (*(!has_32bit_shinfo(d) ? \ + (typeof(&(s)->compat.field))&(s)->native.field : \ + (typeof(&(s)->compat.field))&(s)->compat.field)) +#endif +#endif + +static void kdb_display_pv_vcpu(struct vcpu *vp) +{ + int i; + struct pv_vcpu *gp = &vp->arch.pv_vcpu; + + kdbp(" GDT_VIRT_START(vcpu): %lx\n", GDT_VIRT_START(vp)); + kdbp(" GDT: entries:0x%lx frames:\n", gp->gdt_ents); + for (i=0; i < 16; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->gdt_frames[i], + gp->gdt_frames[i+1], gp->gdt_frames[i+2],gp->gdt_frames[i+3]); + + kdbp(" trap_ctxt:%lx kernel_ss:%lx kernel_sp:%lx\n", gp->trap_ctxt, + gp->kernel_ss, gp->kernel_sp); + kdbp(" ctrlregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", gp->ctrlreg[i], + gp->ctrlreg[i+1], gp->ctrlreg[i+2], gp->ctrlreg[i+3]); +#ifdef __x86_64__ + kdbp(" callback: event: %016lx failsafe: %016lx\n", + gp->event_callback_eip, gp->failsafe_callback_eip); + kdbp(" base: fs:0x%lx gskern:0x%lx gsuser:0x%lx\n", + gp->fs_base, gp->gs_base_kernel, gp->gs_base_user); +#else + kdbp(" callback: event: %08lx:%08lx failsafe: %08lx:%08lx\n", + gp->event_callback_cs, gp->event_callback_eip, + gp->failsafe_callback_cs, gp->failsafe_callback_eip); +#endif + kdbp(" vcpu_info_mfn: %lx iopl: %x\n", gp->vcpu_info_mfn, gp->iopl); + kdbp("\n"); +} + +/* Display one VCPU info */ +static void +kdb_display_vcpu(struct vcpu *vp) +{ + int i; + struct arch_vcpu *avp = &vp->arch; + struct paging_vcpu *pvp = &vp->arch.paging; + int domid = vp->domain->domain_id; + + kdbp("\nVCPU: vcpu-id:%d vcpu-ptr:%p ", vp->vcpu_id, vp); + kdbp(" processor:%d domid:%d domp:%p\n", vp->processor, domid,vp->domain); + + if (domid == DOMID_IDLE) { + kdbp(" IDLE vcpu.\n"); + return; + } + kdbp(" pause: flags:0x%016lx count:%x\n", vp->pause_flags, + vp->pause_count.counter); + kdbp(" vcpu: initdone:%d running:%d\n", + vp->is_initialised, vp->is_running); + kdbp(" mcepend:%d nmipend:%d shut: def:%d paused:%d\n", + vp->mce_pending, vp->nmi_pending, vp->defer_shutdown, + vp->paused_for_shutdown); + kdbp(" &vcpu_info:%p : evtchn_upc_pend:%x _mask:%x\n", + vp->vcpu_info, vcpu_info(vp, evtchn_upcall_pending), + vcpu_info(vp, evtchn_upcall_mask)); + kdbp(" evt_pend_sel:%lx poll_evtchn:%x ", + *(unsigned long *)&vcpu_info(vp, evtchn_pending_sel), vp->poll_evtchn); + kdb_print_spin_lock("virq_lock:", &vp->virq_lock, "\n"); + for (i=0; i < NR_VIRQS; i++) + if (vp->virq_to_evtchn[i] != 0) + kdbp(" virq:$%d port:$%d\n", i, vp->virq_to_evtchn[i]); + + kdbp(" next:%p periodic: period:0x%lx last_event:0x%lx\n", + vp->next_in_list, vp->periodic_period, vp->periodic_last_event); + kdbp(" cpu_affinity:0x%lx vcpu_dirty_cpumask:%p sched_priv:0x%p\n", + vp->cpu_affinity, vp->vcpu_dirty_cpumask, vp->sched_priv); + kdbp(" &runstate: %p state: %x (eg. RUNSTATE_running) guestptr:%p\n", + &vp->runstate, vp->runstate.state, runstate_guest(vp)); + kdbp("\n"); + kdbp(" arch info: (%p)\n", &vp->arch); + kdbp(" guest_context: VGCF_ flags:%lx", + vp->arch.vgc_flags); /* VGCF_in_kernel */ + if (is_hvm_or_hyb_vcpu(vp)) + kdbp(" (HVM guest: IP, SP, EFLAGS may be stale)"); + kdbp("\n"); + kdb_print_uregs(&vp->arch.user_regs); + kdbp(" debugregs:\n"); + for (i=0; i < 8; i=i+4) + kdbp(" %016lx %016lx %016lx %016lx\n", avp->debugreg[i], + avp->debugreg[i+1], avp->debugreg[i+2], avp->debugreg[i+3]); + kdb_display_pv_vcpu(vp); + + kdbp(" TF_flags: %016lx guest_table: %016lx cr3:%016lx\n", + vp->arch.flags, vp->arch.guest_table.pfn, avp->cr3); + kdbp(" paging: \n"); + kdbp(" vtlb:%p\n", &pvp->vtlb); + kdbp(" &pg_mode:%p gstlevels:%d &shadow:%p shlevels:%d\n", + pvp->mode, pvp->mode->guest_levels, &pvp->mode->shadow, + pvp->mode->shadow.shadow_levels); + kdbp(" shadow_vcpu:\n"); + kdbp(" guest_vtable:%p last em_mfn:"KDBFL"\n", + pvp->shadow.guest_vtable, pvp->shadow.last_emulated_mfn); +#if CONFIG_PAGING_LEVELS >= 3 + kdbp(" l3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.l3table[3].l3, pvp->shadow.l3table[2].l3, + pvp->shadow.l3table[1].l3, pvp->shadow.l3table[0].l3); + kdbp(" gl3tbl: 3:"KDBFL" 2:"KDBFL"\n" + " 1:"KDBFL" 0:"KDBFL"\n", + pvp->shadow.gl3e[3].l3, pvp->shadow.gl3e[2].l3, + pvp->shadow.gl3e[1].l3, pvp->shadow.gl3e[0].l3); +#endif + kdbp(" gdbsx_vcpu_event:%x\n", vp->arch.gdbsx_vcpu_event); +} + +/* + * FUNCTION: Dispaly (current) VCPU/s + */ +static kdb_cpu_cmd_t +kdb_usgf_vcpu(void) +{ + kdbp("vcpu [vcpu-ptr] : display current/vcpu-ptr vcpu info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_vcpu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct vcpu *v = current; + + if (argc > 2 || (argc > 1 && *argv[1] == '?')) + kdb_usgf_vcpu(); + else if (argc <= 1) + kdb_display_vcpu(v); + else if (kdb_str2ulong(argv[1], (ulong *)&v) && kdb_vcpu_valid(v)) + kdb_display_vcpu(v); + else + kdbp("Invalid usage/argument:%s v:%lx\n", argv[1], (long)v); + return KDB_CPU_MAIN_KDB; +} + +/* from paging_dump_domain_info() */ +static void kdb_pr_dom_pg_modes(struct domain *d) +{ + if (paging_mode_enabled(d)) { + kdbp(" paging mode enabled"); + if ( paging_mode_shadow(d) ) + kdbp(" shadow(PG_SH_enable)"); + if ( paging_mode_hap(d) ) + kdbp(" hap(PG_HAP_enable) "); + if ( paging_mode_refcounts(d) ) + kdbp(" refcounts(PG_refcounts) "); + if ( paging_mode_log_dirty(d) ) + kdbp(" log_dirty(PG_log_dirty) "); + if ( paging_mode_translate(d) ) + kdbp(" translate(PG_translate) "); + if ( paging_mode_external(d) ) + kdbp(" external(PG_external) "); + } else + kdbp(" disabled"); + kdbp("\n"); +} + +/* print event channels info for a given domain + * NOTE: very confusing, port and event channel refer to the same thing. evtchn + * is arry of pointers to a bucket of pointers to 128 struct evtchn{}. while + * 64bit xen can handle 4096 max channels, a 32bit guest is limited to 1024 */ +static void noinline kdb_print_dom_eventinfo(struct domain *dp) +{ + uint chn; + + kdbp("\n"); + kdbp(" Evt: MAX_EVTCHNS:$%d ptr:%p pollmsk:%08lx ", + MAX_EVTCHNS(dp), dp->evtchn, dp->poll_mask[0]); + kdb_print_spin_lock("lk:", &dp->event_lock, "\n"); + kdbp(" &evtchn_pending:%p &evtchn_mask:%p\n", + shared_info(dp, evtchn_pending), shared_info(dp, evtchn_mask)); + + kdbp(" Channels info: (everything is in decimal):\n"); + for (chn=0; chn < MAX_EVTCHNS(dp); chn++ ) { + struct evtchn *bktp = dp->evtchn[chn/EVTCHNS_PER_BUCKET]; + struct evtchn *chnp = &bktp[chn & (EVTCHNS_PER_BUCKET-1)]; + char pbit = test_bit(chn, &shared_info(dp, evtchn_pending)) ? 'Y' : 'N'; + char mbit = test_bit(chn, &shared_info(dp, evtchn_mask)) ? 'Y' : 'N'; + + if (bktp==NULL || chnp->state==ECS_FREE) + continue; + + kdbp(" chn:%4u st:%d _xen=%d _vcpu_id:%2d ", chn, chnp->state, + chnp->xen_consumer, chnp->notify_vcpu_id); + if (chnp->state == ECS_UNBOUND) + kdbp(" rem-domid:%d", chnp->u.unbound.remote_domid); + else if (chnp->state == ECS_INTERDOMAIN) + kdbp(" rem-port:%d rem-dom:%d", chnp->u.interdomain.remote_port, + chnp->u.interdomain.remote_dom->domain_id); + else if (chnp->state == ECS_PIRQ) + kdbp(" pirq:%d", chnp->u.pirq); + else if (chnp->state == ECS_VIRQ) + kdbp(" virq:%d", chnp->u.virq); + + kdbp(" pend:%c mask:%c\n", pbit, mbit); + } +#if 0 + kdbp("pirq to evtchn mapping (pirq:evtchn) (all decimal):\n"); + for (i=0; i < dp->nr_pirqs; i ++) + if (dp->pirq_to_evtchn[i]) + kdbp("(%d:%d) ", i, dp->pirq_to_evtchn[i]); + kdbp("\n"); +#endif +} + +static void kdb_prnt_hvm_dom_info(struct domain *dp) +{ + struct hvm_domain *hvp = &dp->arch.hvm_domain; + + kdbp(" HVM info: Hap is%s enabled\n", + dp->arch.hvm_domain.hap_enabled ? "" : " not"); + + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + struct vmx_domain *vdp = &dp->arch.hvm_domain.vmx; + kdbp(" EPT: ept_mt:%x ept_wl:%x asr:%013lx\n", + vdp->ept_control.ept_mt, vdp->ept_control.ept_wl, + vdp->ept_control.asr); + } + if (hvp == NULL) + return; + + if (hvp->irq.callback_via_type == HVMIRQ_callback_vector) + kdbp(" HVMIRQ_callback_vector: %x\n", hvp->irq.callback_via.vector); + + if (!is_hvm_domain(dp)) + return; + + kdbp(" HVM PARAMS (all in hex):\n"); + kdbp("\tioreq.page:%lx ioreq.va:%lx\n", hvp->ioreq.page, hvp->ioreq.va); + kdbp("\tbuf_ioreq.page:%lx ioreq.va:%lx\n", hvp->buf_ioreq.page, + hvp->buf_ioreq.va); + kdbp("\tHVM_PARAM_CALLBACK_IRQ: %x\n", hvp->params[HVM_PARAM_CALLBACK_IRQ]); + kdbp("\tHVM_PARAM_STORE_PFN: %x\n", hvp->params[HVM_PARAM_STORE_PFN]); + kdbp("\tHVM_PARAM_STORE_EVTCHN: %x\n", hvp->params[HVM_PARAM_STORE_EVTCHN]); + kdbp("\tHVM_PARAM_PAE_ENABLED: %x\n", hvp->params[HVM_PARAM_PAE_ENABLED]); + kdbp("\tHVM_PARAM_IOREQ_PFN: %x\n", hvp->params[HVM_PARAM_IOREQ_PFN]); + kdbp("\tHVM_PARAM_BUFIOREQ_PFN: %x\n", hvp->params[HVM_PARAM_BUFIOREQ_PFN]); + kdbp("\tHVM_PARAM_VIRIDIAN: %x\n", hvp->params[HVM_PARAM_VIRIDIAN]); + kdbp("\tHVM_PARAM_TIMER_MODE: %x\n", hvp->params[HVM_PARAM_TIMER_MODE]); + kdbp("\tHVM_PARAM_HPET_ENABLED: %x\n", hvp->params[HVM_PARAM_HPET_ENABLED]); + kdbp("\tHVM_PARAM_IDENT_PT: %x\n", hvp->params[HVM_PARAM_IDENT_PT]); + kdbp("\tHVM_PARAM_DM_DOMAIN: %x\n", hvp->params[HVM_PARAM_DM_DOMAIN]); + kdbp("\tHVM_PARAM_ACPI_S_STATE: %x\n", hvp->params[HVM_PARAM_ACPI_S_STATE]); + kdbp("\tHVM_PARAM_VM86_TSS: %x\n", hvp->params[HVM_PARAM_VM86_TSS]); + kdbp("\tHVM_PARAM_VPT_ALIGN: %x\n", hvp->params[HVM_PARAM_VPT_ALIGN]); + kdbp("\tHVM_PARAM_CONSOLE_PFN: %x\n", hvp->params[HVM_PARAM_CONSOLE_PFN]); + kdbp("\tHVM_PARAM_CONSOLE_EVTCHN: %x\n", + hvp->params[HVM_PARAM_CONSOLE_EVTCHN]); + kdbp("\tHVM_PARAM_ACPI_IOPORTS_LOCATION: %x\n", + hvp->params[HVM_PARAM_ACPI_IOPORTS_LOCATION]); + kdbp("\tHVM_PARAM_MEMORY_EVENT_SINGLE_STEP: %x\n", + hvp->params[HVM_PARAM_MEMORY_EVENT_SINGLE_STEP]); +} +static void kdb_print_rangesets(struct domain *dp) +{ + int locked = spin_is_locked(&dp->rangesets_lock); + + if (locked) + spin_unlock(&dp->rangesets_lock); + rangeset_domain_printk(dp); + if (locked) + spin_lock(&dp->rangesets_lock); +} + +static void kdb_pr_vtsc_info(struct arch_domain *ap) +{ + kdbp(" VTSC info: tsc_mode:%x vtsc:%x vtsc_last:%016lx\n", + ap->tsc_mode, ap->vtsc, ap->vtsc_last); + kdbp(" vtsc_offset:%016lx tsc_khz:%08lx incarnation:%x\n", + ap->vtsc_offset, ap->vtsc_offset, ap->incarnation); + kdbp(" vtsc_kerncount:%016lx _usercount:%016lx\n", + ap->vtsc_kerncount, ap->vtsc_usercount); +} + +/* display one domain info */ +static void +kdb_display_dom(struct domain *dp) +{ + struct vcpu *vp; + int printed = 0; + struct grant_table *gp = dp->grant_table; + struct arch_domain *ap = &dp->arch; + + kdbp("\nDOMAIN : domid:0x%04x ptr:0x%p\n", dp->domain_id, dp); + if (dp->domain_id == DOMID_IDLE) { + kdbp(" IDLE domain.\n"); + return; + } + if (dp->is_dying) { + kdbp(" domain is DYING.\n"); + return; + } +#if 0 + kdb_print_spin_lock(" pgalk:", &dp->page_alloc_lock, "\n"); + kdbp(" pglist: 0x%p 0x%p\n", dp->page_list.next,KDB_PGLLE(dp->page_list)); + kdbp(" xpglist: 0x%p 0x%p\n", dp->xenpage_list.next, + KDB_PGLLE(dp->xenpage_list)); + kdbp(" next:0x%p hashnext:0x%p\n", + dp->next_in_list, dp->next_in_hashbucket); +#endif + kdbp(" PAGES: tot:0x%08x max:0x%08x xenheap:0x%08x\n", + dp->tot_pages, dp->max_pages, dp->xenheap_pages); + + kdb_print_rangesets(dp); + kdb_print_dom_eventinfo(dp); + kdbp("\n"); + kdbp(" Grant table: gp:0x%p\n", gp); + if (gp) { + kdbp(" nr_frames:0x%08x shpp:0x%p active:0x%p\n", + gp->nr_grant_frames, gp->shared_raw, gp->active); + kdbp(" maptrk:0x%p maphd:0x%08x maplmt:0x%08x\n", + gp->maptrack, gp->maptrack_head, gp->maptrack_limit); + kdbp(" mapcnt:"); + kdb_print_spin_lock("mapcnt: lk:", &gp->lock, "\n"); + } + kdbp(" hvm:%d priv:%d need_iommu:%d dbg:%d dying:%d paused:%d\n", + dp->is_hvm, dp->is_privileged, dp->need_iommu, + dp->debugger_attached, dp->is_dying, dp->is_paused_by_controller); + kdb_print_spin_lock(" shutdown: lk:", &dp->shutdown_lock, "\n"); + kdbp(" shutn:%d shut:%d code:%d \n", dp->is_shutting_down, + dp->is_shut_down, dp->shutdown_code); + kdbp(" pausecnt:0x%08x vm_assist:0x"KDBFL" refcnt:0x%08x\n", + dp->pause_count.counter, dp->vm_assist, dp->refcnt.counter); + kdbp(" &domain_dirty_cpumask:%p\n", &dp->domain_dirty_cpumask); + + kdbp(" shared == vcpu_info[]: %p\n", dp->shared_info); + kdbp(" arch_shared: maxpfn: %lx pfn-mfn-frame-ll mfn: %lx\n", + arch_get_max_pfn(dp), arch_get_pfn_to_mfn_frame_list_list(dp)); + kdbp("\n"); + kdbp(" arch_domain at : %p\n", ap); + +#ifdef CONFIG_X86_64 + kdbp(" pt_pages:0x%p ", ap->mm_perdomain_pt_pages); + kdbp(" l2:0x%p l3:0x%p\n", ap->mm_perdomain_l2, ap->mm_perdomain_l3); +#else + kdbp(" pt:0x%p ", ap->mm_perdomain_pt); +#endif +#ifdef CONFIG_X86_32 + kdbp(" &mapchache:0x%xp\n", &ap->mapcache); +#endif + kdbp(" ioport:0x%p &hvm_dom:0x%p\n", ap->ioport_caps, &ap->hvm_domain); + if (is_hvm_or_hyb_domain(dp)) + kdb_prnt_hvm_dom_info(dp); + + kdbp(" &pging_dom:%p mode: %lx", &ap->paging, ap->paging.mode); + kdb_pr_dom_pg_modes(dp); + kdbp(" p2m ptr:%p pages:{%p, %p}\n", ap->p2m, ap->p2m->pages.next, + KDB_PGLLE(ap->p2m->pages)); + kdbp(" max_mapped_pfn:"KDBFL, ap->p2m->max_mapped_pfn); +#if XEN_SUBVERSION > 0 && XEN_VERSION == 4 /* xen 4.1 and above */ + kdbp(" phys_table:%p\n", ap->p2m->phys_table.pfn); +#else + kdbp(" phys_table.pfn:"KDBFL"\n", ap->phys_table.pfn); +#endif + kdbp(" physaddr_bitsz:%d 32bit_pv:%d has_32bit_shinfo:%d\n", + ap->physaddr_bitsize, ap->is_32bit_pv, ap->has_32bit_shinfo); + kdb_pr_vtsc_info(ap); + kdbp(" sched:0x%p &handle:0x%p\n", dp->sched_priv, &dp->handle); + kdbp(" vcpu ptrs:\n "); + for_each_vcpu(dp, vp) { + kdbp(" %d:%p", vp->vcpu_id, vp); + if (++printed % 4 == 0) kdbp("\n "); + } + kdbp("\n"); +} + +/* + * FUNCTION: Dispaly (current) domain/s + */ +static kdb_cpu_cmd_t +kdb_usgf_dom(void) +{ + kdbp("dom [all|domid]: Display current/all/given domain/s\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dom(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int id; + struct domain *dp = current->domain; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dom(); + + if (argc > 1) { + for(dp=domain_list; dp; dp=dp->next_in_list) + if (kdb_str2deci(argv[1], &id) && dp->domain_id==id) + kdb_display_dom(dp); + else if (!strcmp(argv[1], "all")) + kdb_display_dom(dp); + } else { + kdbp("Displaying current domain :\n"); + kdb_display_dom(dp); + } + return KDB_CPU_MAIN_KDB; +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dirq(void) +{ + kdbp("dirq : dump irq bindings\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dirq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long irq, sz, offs, addr; + char buf[KSYM_NAME_LEN+1]; + char affstr[NR_CPUS/4+NR_CPUS/32+2]; /* courtesy dump_irqs() */ + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dirq(); + +#if XEN_VERSION < 4 && XEN_SUBVERSION < 5 /* xen 3.4.x or below */ + kdbp("idx/irq#/status: all are in decimal\n"); + kdbp("idx irq# status action(handler name devid)\n"); + for (irq=0; irq < NR_VECTORS; irq++) { + irq_desc_t *dp = &irq_desc[irq]; + if (!dp->action) + continue; + addr = (unsigned long)dp->action->handler; + kdbp("[%3ld]:irq:%3d st:%3d f:%s devnm:%s devid:0x%p\n", + i, vector_to_irq(irq), dp->status, (dp->status & IRQ_GUEST) ? + "GUEST IRQ" : symbols_lookup(addr, &sz, &offs, buf), + dp->action->name, dp->action->dev_id); + } +#else + kdbp("irq_desc[]:%p nr_irqs: $%d nr_irqs_gsi: $%d\n", irq_desc, nr_irqs, + nr_irqs_gsi); + kdbp("irq/vec#/status: in decimal. affinity in hex, not bitmap\n"); + kdbp("irq-- vec sta function----------- name---- type--------- "); + kdbp("aff devid------------\n"); + for (irq=0; irq < nr_irqs; irq++) { + void *devidp; + const char *symp, *nmp; + irq_desc_t *dp = irq_to_desc(irq); + struct arch_irq_desc *archp = &dp->arch; + + if (!dp->handler || dp->handler==&no_irq_type || dp->status & IRQ_GUEST) + continue; + + addr = dp->action ? (unsigned long)dp->action->handler : 0; + symp = addr ? symbols_lookup(addr, &sz, &offs, buf) : "n/a "; + nmp = addr ? dp->action->name : "n/a "; + devidp = addr ? dp->action->dev_id : NULL; + cpumask_scnprintf(affstr, sizeof(affstr), dp->affinity); + kdbp("[%3ld] %03d %03d %-19s %-8s %-13s %3s 0x%p\n", irq, archp->vector, + dp->status, symp, nmp, dp->handler->typename, affstr, devidp); + } + kdb_prnt_guest_mapped_irqs(); +#endif + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_prnt_vec_irq_table(int cpu) +{ + int i,j, *tbl = per_cpu(vector_irq, cpu); + + kdbp("CPU %d : ", cpu); + for (i=0, j=0; i < NR_VECTORS; i++) + if (tbl[i] != -1) { + kdbp("(%3d:%3d) ", i, tbl[i]); + if (!(++j % 5)) + kdbp("\n "); + } + kdbp("\n"); +} + +/* Dump irq desc table */ +static kdb_cpu_cmd_t +kdb_usgf_dvit(void) +{ + kdbp("dvit [cpu|all]: dump (per cpu)vector irq table\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvit(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu, ccpu = smp_processor_id(); + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvit(); + + if (argc > 1) { + if (!strcmp(argv[1], "all")) + cpu = -1; + else if (!kdb_str2deci(argv[1], &cpu)) { + kdbp("Invalid cpu:%d\n", cpu); + return kdb_usgf_dvit(); + } + } else + cpu = ccpu; + + kdbp("Per CPU vector irq table pairs (vector:irq) (all decimals):\n"); + if (cpu != -1) + kdb_prnt_vec_irq_table(cpu); + else + for_each_online_cpu(cpu) + kdb_prnt_vec_irq_table(cpu); + + return KDB_CPU_MAIN_KDB; +} + +/* do vmexit on all cpu's so intel VMCS can be dumped */ +static kdb_cpu_cmd_t +kdb_all_cpu_flush_vmcs(void) +{ + int cpu, ccpu = smp_processor_id(); + for_each_online_cpu(cpu) { + if (cpu == ccpu) { + kdb_curr_cpu_flush_vmcs(); + } else { + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE){ /* hung cpu */ + kdbp("Skipping (hung?) cpu %d\n", cpu); + continue; + } + kdb_cpu_cmd[cpu] = KDB_CPU_DO_VMEXIT; + while (kdb_cpu_cmd[cpu]==KDB_CPU_DO_VMEXIT); + } + } + return KDB_CPU_MAIN_KDB; +} + +/* Display VMCS or VMCB */ +static kdb_cpu_cmd_t +kdb_usgf_dvmc(void) +{ + kdbp("dvmc [domid][vcpuid] : Dump vmcs/vmcb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dvmc(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t domid = 0; /* unsigned type don't like -1 */ + int vcpuid = -1; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dvmc(); + + if (argc > 1) { + if (!kdb_str2domid(argv[1], &domid, 1)) + return KDB_CPU_MAIN_KDB; + } + if (argc > 2 && !kdb_str2deci(argv[2], &vcpuid)) { + kdbp("Bad vcpuid: 0x%x\n", vcpuid); + return KDB_CPU_MAIN_KDB; + } + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + kdb_all_cpu_flush_vmcs(); + kdb_dump_vmcs(domid, (int)vcpuid); + } else { + kdb_dump_vmcb(domid, (int)vcpuid); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_mmio(void) +{ + kdbp("mmio: dump mmio related info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmio(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmio(); + + kdbp("r/o mmio ranges:\n"); + rangeset_printk(mmio_ro_ranges); + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Dump timer/timers queues */ +static kdb_cpu_cmd_t +kdb_usgf_dtrq(void) +{ + kdbp("dtrq: dump timer queues on all cpus\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dtrq(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dtrq(); + + kdb_dump_timer_queues(); + return KDB_CPU_MAIN_KDB; +} + +struct idte { + uint16_t offs0_15; + uint16_t selector; + uint16_t meta; + uint16_t offs16_31; + uint32_t offs32_63; + uint32_t resvd; +}; + +#ifdef __x86_64__ +static void +kdb_print_idte(int num, struct idte *idtp) +{ + uint16_t mta = idtp->meta; + char dpl = ((mta & 0x6000) >> 13); + char present = ((mta &0x8000) >> 15); + int tval = ((mta &0x300) >> 8); + char *type = (tval == 1) ? "Task" : ((tval== 2) ? "Intr" : "Trap"); + domid_t domid = idtp->selector==__HYPERVISOR_CS64 ? DOMID_IDLE : + current->domain->domain_id; + uint64_t addr = idtp->offs0_15 | ((uint64_t)idtp->offs16_31 << 16) | + ((uint64_t)idtp->offs32_63 << 32); + + kdbp("[%03d]: %s %x %x %04x:%016lx ", num, type, dpl, present, + idtp->selector, addr); + kdb_prnt_addr2sym(domid, addr, "\n"); +} + +/* Dump 64bit idt table currently on this cpu. Intel Vol 3 section 5.14.1 */ +static kdb_cpu_cmd_t +kdb_usgf_didt(void) +{ + kdbp("didt : dump IDT table on the current cpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int i; + struct idte *idtp = (struct idte *)idt_tables[smp_processor_id()]; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_didt(); + + kdbp("IDT at:%p\n", idtp); + kdbp("idt# Type DPL P addr (all hex except idt#)\n", idtp); + for (i=0; i < 256; i++, idtp++) + kdb_print_idte(i, idtp); + return KDB_CPU_MAIN_KDB; +} +#else +static kdb_cpu_cmd_t +kdb_cmdf_didt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbp("kdb: Please implement me in 32bit hypervisor\n"); + return KDB_CPU_MAIN_KDB; +} +#endif + +struct gdte { /* same for TSS and LDT */ + ulong limit0:16; + ulong base0:24; /* linear address base, not pa */ + ulong acctype:4; /* Type: access rights */ + ulong S:1; /* S: 0 = system, 1 = code/data */ + ulong DPL:2; /* DPL */ + ulong P:1; /* P: Segment Present */ + ulong limit1:4; + ulong AVL:1; /* AVL: avail for use by system software */ + ulong L:1; /* L: 64bit code segment */ + ulong DB:1; /* D/B */ + ulong G:1; /* G: granularity */ + ulong base1:8; /* linear address base, not pa */ +}; + +union gdte_u { + struct gdte gdte; + u64 gval; +}; + +struct call_gdte { + unsigned short offs0:16; + unsigned short sel:16; + unsigned short misc0:16; + unsigned short offs1:16; +}; + +struct idt_gdte { + unsigned long offs0:16; + unsigned long sel:16; + unsigned long ist:3; + unsigned long unused0:13; + unsigned long offs1:16; +}; +union sgdte_u { + struct call_gdte cgdte; + struct idt_gdte igdte; + u64 sgval; +}; + +/* return binary form of a hex in string : max 4 chars 0000 to 1111 */ +static char *kdb_ret_acctype(uint acctype) +{ + static char buf[16]; + char *p = buf; + int i; + + if (acctype > 0xf) { + buf[0] = buf[1] = buf[2] = buf[3] = '?'; + buf[5] = '\n'; + return buf; + } + for (i=0; i < 4; i++, p++, acctype=acctype>>1) + *p = (acctype & 0x1) ? '1' : '0'; + + return buf; +} + +/* Display GDT table. IA-32e mode is assumded. */ +/* first display non system descriptors then display system descriptors */ +static kdb_cpu_cmd_t +kdb_usgf_dgdt(void) +{ + kdbp("dgdt [gdt-ptr decimal-byte-size] dump GDT table on current cpu or for" + "given vcpu\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dgdt(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct Xgt_desc_struct desc; + union gdte_u u1; + ulong start_addr, end_addr, taddr=0; + domid_t domid = DOMID_IDLE; + int idx; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_dgdt(); + + if (argc > 1) { + if (argc != 3) + return kdb_usgf_dgdt(); + + if (kdb_str2ulong(argv[1], (ulong *)&start_addr) && + kdb_str2deci(argv[2], (int *)&taddr)) { + end_addr = start_addr + taddr; + } else { + kdbp("dgdt: Bad arg:%s or %s\n", argv[1], argv[2]); + return kdb_usgf_dgdt(); + } + } else { + __asm__ __volatile__ ("sgdt (%0) \n" :: "a"(&desc) : "memory"); + start_addr = (ulong)desc.address; + end_addr = (ulong)desc.address + desc.size; + } + kdbp("GDT: Will skip null desc at 0, start:%lx end:%lx\n", start_addr, + end_addr); + kdbp("[idx] sel --- val -------- Accs DPL P AVL L DB G " + "--Base Addr ---- Limit\n"); + kdbp(" Type\n"); + + /* skip first 8 null bytes */ + /* the cpu multiplies the index by 8 and adds to GDT.base */ + for (taddr = start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (!kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1),domid) || !u1.gval) + continue; + + if (u1.gval == 0xffffffffffffffff || u1.gval == 0x5555555555555555) + continue; /* what an effin x86 mess */ + + idx = (taddr - start_addr) / 8; + if (u1.gdte.S == 0) { /* System Desc are 16 bytes in 64bit mode */ + taddr += sizeof(ulong); + continue; + } + kdbp("[%04x] %04x %016lx %4s %x %d %d %d %d %d %016lx %05x\n", + idx, (idx<<3), u1.gval, kdb_ret_acctype(u1.gdte.acctype), + u1.gdte.DPL, + u1.gdte.P, u1.gdte.AVL, u1.gdte.L, u1.gdte.DB, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | (u64)((u64)u1.gdte.base1<<24)), + u1.gdte.limit0 | (u1.gdte.limit1<<16)); + } + + kdbp("\nSystem descriptors (S=0) : (skipping 0th entry)\n"); + for (taddr=start_addr+8; taddr < end_addr; taddr += sizeof(ulong)) { + uint acctype; + u64 upper, addr64=0; + + /* not all entries are mapped. do this to avoid GP even if hyp */ + if (kdb_read_mem(taddr, (kdbbyt_t *)&u1, sizeof(u1), domid)==0 || + u1.gval == 0 || u1.gdte.S == 1) { + continue; + } + idx = (taddr - start_addr) / 8; + taddr += sizeof(ulong); + if (kdb_read_mem(taddr, (kdbbyt_t *)&upper, 8, domid) == 0) { + kdbp("Could not read upper 8 bytes of system desc\n"); + upper = 0; + } + acctype = u1.gdte.acctype; + if (acctype != 2 && acctype != 9 && acctype != 11 && acctype !=12 && + acctype != 14 && acctype != 15) + continue; + + kdbp("[%04x] %04x val:%016lx DPL:%x P:%d type:%x ", + idx, (idx<<3), u1.gval, u1.gdte.DPL, u1.gdte.P, acctype); + + upper = (u64)((u64)(upper & 0xFFFFFFFF) << 32); + + /* Vol 3A: table: 3-2 page: 3-19 */ + if (acctype == 2) { + kdbp("LDT gate (0010)\n"); + } + else if (acctype == 9) { + kdbp("TSS avail gate(1001)\n"); + } + else if (acctype == 11) { + kdbp("TSS busy gate(1011)\n"); + } + else if (acctype == 12) { + kdbp("CALL gate (1100)\n"); + } + else if (acctype == 14) { + kdbp("IDT gate (1110)\n"); + } + else if (acctype == 15) { + kdbp("Trap gate (1111)\n"); + } + + if (acctype == 2 || acctype == 9 || acctype == 11) { + kdbp(" AVL:%d G:%d Base Addr:%016lx Limit:%x\n", + u1.gdte.AVL, u1.gdte.G, + (u64)((u64)u1.gdte.base0 | ((u64)u1.gdte.base1<<24)| upper), + (u32)u1.gdte.limit0 | (u32)((u32)u1.gdte.limit1<<16)); + + } else if (acctype == 12) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.cgdte.offs0 | + (u64)((u64)u2.cgdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx\n", u2.cgdte.sel, addr64); + } else if (acctype == 14 || acctype == 15) { + union sgdte_u u2; + u2.sgval = u1.gval; + + addr64 = (u64)((u64)u2.igdte.offs0 | + (u64)((u64)u2.igdte.offs1<<16) | upper); + kdbp(" Entry: %04x:%016lx ist:%03x\n", u2.igdte.sel, addr64, + u2.igdte.ist); + } else + kdbp(" Error: Unrecongized type:%lx\n", acctype); + } + return KDB_CPU_MAIN_KDB; +} + +/* Display scheduler basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_sched(void) +{ + kdbp("sched: show schedular info and run queues\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sched(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_sched(); + + kdb_print_sched_info(); + return KDB_CPU_MAIN_KDB; +} + +/* Display MMU basic and extended info */ +static kdb_cpu_cmd_t +kdb_usgf_mmu(void) +{ + kdbp("mmu: print basic MMU info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_mmu(int argc, const char **argv, struct cpu_user_regs *regs) +{ + int cpu; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_mmu(); + + kdbp("MMU Info:\n"); + kdbp("total pages: %lx\n", total_pages); + kdbp("max page/mfn: %lx\n", max_page); + kdbp("frame_table: %p\n", frame_table); + kdbp("DIRECTMAP_VIRT_START: %lx\n", DIRECTMAP_VIRT_START); + kdbp("HYPERVISOR_VIRT_START: %lx\n", HYPERVISOR_VIRT_START); + kdbp("HYPERVISOR_VIRT_END: %lx\n", HYPERVISOR_VIRT_END); + kdbp("RO_MPT_VIRT_START: %lx\n", RO_MPT_VIRT_START); + kdbp("PERDOMAIN_VIRT_START: %lx\n", PERDOMAIN_VIRT_START); + kdbp("CONFIG_PAGING_LEVELS:%d\n", CONFIG_PAGING_LEVELS); + kdbp("__HYPERVISOR_COMPAT_VIRT_START: %lx\n", + (ulong)__HYPERVISOR_COMPAT_VIRT_START); + kdbp("&MPT[0] == %016lx\n", &machine_to_phys_mapping[0]); + + kdbp("\nFIRST_RESERVED_GDT_PAGE: %x\n", FIRST_RESERVED_GDT_PAGE); + kdbp("FIRST_RESERVED_GDT_ENTRY: %lx\n", (ulong)FIRST_RESERVED_GDT_ENTRY); + kdbp("LAST_RESERVED_GDT_ENTRY: %lx\n", (ulong)LAST_RESERVED_GDT_ENTRY); + kdbp(" Per cpu non-compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(gdt_table, cpu)); + } + kdbp(" Per cpu compat gdt_table:\n"); + for_each_online_cpu(cpu) { + kdbp("\tcpu:%d gdt_table:%p\n", cpu, per_cpu(compat_gdt_table, cpu)); + } + kdbp("\n"); + kdbp(" Per cpu tss:\n"); + for_each_online_cpu(cpu) { + struct tss_struct *tssp = &per_cpu(init_tss, cpu); + kdbp("\tcpu:%d tss:%p (rsp0:%016lx)\n", cpu, tssp, tssp->rsp0); + } +#ifdef USER_MAPPINGS_ARE_GLOBAL + kdbp("USER_MAPPINGS_ARE_GLOBAL is defined\n"); +#else + kdbp("USER_MAPPINGS_ARE_GLOBAL is NOT defined\n"); +#endif + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* for HVM/HYB guests, go thru EPT. For PV guest we need to go to the btree. + * btree: pfn_to_mfn_frame_list_list is root that points (has mfns of) upto 16 + * pages (call 'em l2 nodes) that contain mfns of guest p2m table pages + * NOTE: num of entries in a p2m page is same as num of entries in l2 node */ +static noinline ulong +kdb_gpfn2mfn(struct domain *dp, ulong gpfn, p2m_type_t *typep) +{ + int idx; + + if ( !paging_mode_translate(dp) ) { + mfn_t *mfn_va, mfn = arch_get_pfn_to_mfn_frame_list_list(dp); + int g_longsz = kdb_guest_bitness(dp->domain_id)/8; + int entries_per_pg = PAGE_SIZE/g_longsz; + const int shift = get_count_order(entries_per_pg); + + if ( !mfn_valid(mfn) ) { + kdbp("Invalid frame_list_list mfn:%lx for non-xlate guest\n", mfn); + return INVALID_MFN; + } + + mfn_va = map_domain_page(mfn); + idx = gpfn >> 2*shift; /* index in root page/node */ + if (idx > 15) { + kdbp("gpfn:%lx idx:%x not in frame list limit of z16\n", gpfn, idx); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn = (g_longsz == 4) ? ((int *)mfn_va)[idx] : mfn_va[idx]; + if (mfn==0) { + kdbp("No mfn for idx:%d for gpfn:%lx in root pg\n", idx, gpfn); + unmap_domain_page(mfn_va); + return INVALID_MFN; + } + mfn_va = map_domain_page(mfn); + KDBGP1("p2m: idx:%x fll:%lx mfn of 2nd lvl page:%lx\n", idx, + arch_get_pfn_to_mfn_frame_list_list(dp), mfn); + + idx = (gpfn>>shift) & ((1< 1 && kdb_str2ulong(argv[1], &mfn)) + if (mfn_valid(mfn)) + kdbp("mpt[%x] == %lx\n", mfn, machine_to_phys_mapping[mfn]); + else + kdbp("Invalid mfn:%lx\n", mfn); + else + kdb_usgf_m2p(); + return KDB_CPU_MAIN_KDB; +} + +static void +kdb_pr_pg_pgt_flds(unsigned long type_info) +{ + switch (type_info & PGT_type_mask) { + case (PGT_l1_page_table): + kdbp(" page is PGT_l1_page_table\n"); + break; + case PGT_l2_page_table: + kdbp(" page is PGT_l2_page_table\n"); + break; + case PGT_l3_page_table: + kdbp(" page is PGT_l3_page_table\n"); + break; + case PGT_l4_page_table: + kdbp(" page is PGT_l4_page_table\n"); + break; + case PGT_seg_desc_page: + kdbp(" page is seg desc page\n"); + break; + case PGT_writable_page: + kdbp(" page is writable page\n"); + break; + case PGT_shared_page: + kdbp(" page is shared page\n"); + break; + } + if (type_info & PGT_pinned) + kdbp(" page is pinned\n"); + if (type_info & PGT_validated) + kdbp(" page is validated\n"); + if (type_info & PGT_pae_xen_l2) + kdbp(" page is PGT_pae_xen_l2\n"); + if (type_info & PGT_partial) + kdbp(" page is PGT_partial\n"); + if (type_info & PGT_locked) + kdbp(" page is PGT_locked\n"); +} + +static void +kdb_pr_pg_pgc_flds(unsigned long count_info) +{ + if (count_info & PGC_allocated) + kdbp(" PGC_allocated"); + if (count_info & PGC_xen_heap) + kdbp(" PGC_xen_heap"); + if (count_info & PGC_page_table) + kdbp(" PGC_page_table"); + if (count_info & PGC_broken) + kdbp(" PGC_broken"); +#if XEN_VERSION < 4 /* xen 3.x.x */ + if (count_info & PGC_offlining) + kdbp(" PGC_offlining"); + if (count_info & PGC_offlined) + kdbp(" PGC_offlined"); +#else + if (count_info & PGC_state_inuse) + kdbp(" PGC_inuse"); + if (count_info & PGC_state_offlining) + kdbp(" PGC_state_offlining"); + if (count_info & PGC_state_offlined) + kdbp(" PGC_state_offlined"); + if (count_info & PGC_state_free) + kdbp(" PGC_state_free"); +#endif + kdbp("\n"); +} + +/* print struct page_info{} given ptr to it or an mfn + * NOTE: that given an mfn there seems no way of knowing how it's used, so + * here we just print all info and let user decide what's applicable */ +static kdb_cpu_cmd_t +kdb_usgf_dpage(void) +{ + kdbp("dpage mfn|page-ptr : Display struct page\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dpage(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long val; + struct page_info *pgp; + struct domain *dp; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dpage(); + + if ((kdb_str2ulong(argv[1], &val) == 0) || + (val < (ulong)frame_table && !mfn_valid(val))) { + + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + kdbp("Page Info:\n"); + if (val <= (ulong)frame_table) { /* arg is mfn */ + pgp = mfn_to_page(val); + kdbp(" mfn: %lx page_info:%p\n", val, pgp); + } else { + pgp = (struct page_info *)val; /* arg is struct page{} */ + if (pgp < frame_table || pgp >= frame_table+max_page) { + kdbp("Invalid page ptr. below/beyond max_page\n"); + return KDB_CPU_MAIN_KDB; + } + kdbp(" mfn: %lx page_info:%p\n", page_to_mfn(pgp), pgp); + } + kdbp(" count_info: %016lx (refcnt: %x)\n", pgp->count_info, + pgp->count_info & PGC_count_mask); +#if XEN_VERSION > 3 || XEN_SUBVERSION > 3 /* xen 3.4.x or later */ + kdb_pr_pg_pgc_flds(pgp->count_info); + + kdbp("In use info:\n"); + kdbp(" type_info:%016lx\n", pgp->u.inuse.type_info); + kdb_pr_pg_pgt_flds(pgp->u.inuse.type_info); + dp = page_get_owner(pgp); + kdbp(" domid:%d (pickled:%lx)\n", dp ? dp->domain_id : -1, + pgp->v.inuse._domain); + + kdbp("Shadow Info:\n"); + kdbp(" type:%x pinned:%x count:%x\n", pgp->u.sh.type, pgp->u.sh.pinned, + pgp->u.sh.count); + kdbp(" back:%lx shadow_flags:%x next_shadow:%lx\n", pgp->v.sh.back, + pgp->shadow_flags, pgp->next_shadow); + + kdbp("Free Info\n"); + kdbp(" need_tlbflush:%d order:%d tlbflush_timestamp:%x\n", + pgp->u.free.need_tlbflush, pgp->v.free.order, + pgp->tlbflush_timestamp); +#else + if (pgp->count_info & PGC_allocated) /* page allocated */ + kdbp(" PGC_allocated"); + if (pgp->count_info & PGC_page_table) /* page table page */ + kdbp(" PGC_page_table"); + kdbp("\n"); + kdbp(" page is %s xen heap page\n", is_xen_heap_page(pgp) ? "a":"NOT"); + kdbp(" cacheattr:%x\n", (pgp->count_info>>PGC_cacheattr_base) & 7); + if (pgp->count_info & PGC_count_mask) { /* page in use */ + dp = pgp->u.inuse._domain; /* pickled domain */ + kdbp(" page is in use\n"); + kdbp(" domid: %d (pickled dom:%x)\n", + dp ? (unpickle_domptr(dp))->domain_id : -1, dp); + kdbp(" type_info: %lx\n", pgp->u.inuse.type_info); + kdb_prt_pg_type(pgp->u.inuse.type_info); + } else { /* page is free */ + kdbp(" page is free\n"); + kdbp(" order: %x\n", pgp->u.free.order); + kdbp(" cpumask: %lx\n", pgp->u.free.cpumask.bits); + } + kdbp(" tlbflush/shadow_flags: %lx\n", pgp->shadow_flags); +#endif + return KDB_CPU_MAIN_KDB; +} + +/* display asked msr value */ +static kdb_cpu_cmd_t +kdb_usgf_dmsr(void) +{ + kdbp("dmsr address : Display msr value\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_dmsr(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long addr, val; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_dmsr(); + + if ((kdb_str2ulong(argv[1], &addr) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } + rdmsrl(addr, val); + kdbp("msr: %lx val:%lx\n", addr, val); + + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_cpuid(void) +{ + kdbp("cpuid eax : Display cpuid value returned in rax\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_cpuid(int argc, const char **argv, struct cpu_user_regs *regs) +{ + unsigned long rax=0, rbx=0, rcx=0, rdx=0; + + if (argc <= 1 || *argv[1] == '?') + return kdb_usgf_cpuid(); + + if ((kdb_str2ulong(argv[1], &rax) == 0)) { + kdbp("Invalid arg:%s\n", argv[1]); + return KDB_CPU_MAIN_KDB; + } +#if 0 + __asm__ __volatile__ ( + /* "pushl %%rax \n" */ + + "movl %0, %%rax \n" + "cpuid \n" + : "=&a" (rax), "=b" (rbx), "=c" (rcx), "=d" (rdx) + : "0" (rax) + : "rax", "rbx", "rcx", "rdx", "memory"); +#endif + cpuid(rax, &rax, &rbx, &rcx, &rdx); + kdbp("rax: %016lx rbx:%016lx rcx:%016lx rdx:%016lx\n", rax, rbx, + rcx, rdx); + return KDB_CPU_MAIN_KDB; +} + +/* execute cpuid for given value */ +static kdb_cpu_cmd_t +kdb_usgf_wept(void) +{ + kdbp("wept domid gfn: walk ept table for given domid and gfn\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_wept(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + ulong gfn; + + if ((argc > 1 && *argv[1] == '?') || argc != 3) + return kdb_usgf_wept(); + if ((dp=kdb_strdomid2ptr(argv[1], 1)) && kdb_str2ulong(argv[2], &gfn)) + ept_walk_table(dp, gfn); + else + kdb_usgf_wept(); + + return KDB_CPU_MAIN_KDB; +} + +/* + * Save symbols info for a guest, dom0 or other... + */ +static kdb_cpu_cmd_t +kdb_usgf_sym(void) +{ + kdbp("sym domid &kallsyms_names &kallsyms_addresses &kallsyms_num_syms\n"); + kdbp("\t [&kallsyms_token_table] [&kallsyms_token_index]\n"); + kdbp("\ttoken _table and _index MUST be specified for el5\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_sym(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong namesp, addrap, nump, toktblp, tokidxp; + domid_t domid; + + if (argc < 5) { + return kdb_usgf_sym(); + } + toktblp = tokidxp = 0; /* optional parameters */ + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &namesp) && + kdb_str2ulong(argv[3], &addrap) && + kdb_str2ulong(argv[4], &nump) && + (argc==5 || (argc==7 && kdb_str2ulong(argv[5], &toktblp) && + kdb_str2ulong(argv[6], &tokidxp)))) { + + kdb_sav_dom_syminfo(domid, namesp, addrap,nump,toktblp,tokidxp); + } else + kdb_usgf_sym(); + return KDB_CPU_MAIN_KDB; +} + + +/* mods is the dumb ass &modules. modules is struct {nxt, prev}, and not ptr */ +static void +kdb_dump_linux_modules(domid_t domid, ulong mods, uint nxtoffs, uint nmoffs, + uint coreoffs) +{ + const int bufsz = 56; + char buf[bufsz]; + uint64_t addr, addrval, *nxtptr, *modptr; + uint i, num = 8; + + if (kdb_guest_bitness(domid) == 32) + num = 4; + + /* first read modules{}.next ptr */ + if (kdb_read_mem(mods, (kdbbyt_t *)&nxtptr, num, domid) != num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + + KDBGP("mods:%p nxtptr:%p nmoffs:%x coreoffs:%x\n", (void *)mods, nxtptr, + nmoffs, coreoffs); + + while ((uint64_t)nxtptr != mods) { + + modptr = (uint64_t *) ((ulong)nxtptr - nxtoffs); + + addr = (ulong)modptr + coreoffs; + if (kdb_read_mem(addr, (kdbbyt_t *)&addrval, num, domid) != num) { + kdbp("ERROR: Could not read mod addr at :%p\n", (void *)addr); + return; + } + + KDBGP("modptr:%p addr:%p\n", modptr, (void *)addr); + addr = (ulong)modptr + nmoffs; + i=0; + do { + if (kdb_read_mem(addr, (kdbbyt_t *)&buf[i], 1, domid) != 1) { + kdbp("ERROR:Could not read name ch at addr:%p\n", (void *)addr); + return; + } + addr++; + } while (buf[i] && i++ < bufsz); + buf[bufsz-1] = '\0'; + + kdbp("%016lx %016lx %s\n", modptr, addrval, buf); + + if (kdb_read_mem((ulong)nxtptr, (kdbbyt_t *)&nxtptr, num, domid)!=num) { + kdbp("ERROR: Could not read next at mod:%p\n", (void *)mods); + return; + } + KDBGP("nxtptr:%p addr:%p\n", nxtptr, (void *)addr); + } +} + +/* Display modules loaded in linux guest */ +static kdb_cpu_cmd_t +kdb_usgf_mod(void) +{ + kdbp("mod domid &modules next-offs name-offs module_core-offs\n"); + kdbp("\twhere next-offs: &((struct module *)0)->list.next\n"); + kdbp("\tname-offs: &((struct module *)0)->name etc..\n"); + kdbp("\tDisplays all loaded modules in the linux guest\n"); + kdbp("\tEg: mod 0 ffffffff80302780 8 0x18 0x178\n"); + + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_cmdf_mod(int argc, const char **argv, struct cpu_user_regs *regs) +{ + ulong mods, nxtoffs, nmoffs, coreoffs; + domid_t domid; + + if (argc < 6) { + return kdb_usgf_mod(); + } + if (kdb_str2domid(argv[1], &domid, 1) && + kdb_str2ulong(argv[2], &mods) && + kdb_str2ulong(argv[3], &nxtoffs) && + kdb_str2ulong(argv[4], &nmoffs) && + kdb_str2ulong(argv[5], &coreoffs)) { + + kdbp("modptr address name\n"); + kdb_dump_linux_modules(domid, mods, nxtoffs, nmoffs, coreoffs); + } else + kdb_usgf_mod(); + return KDB_CPU_MAIN_KDB; +} + +/* toggle kdb debug trace level */ +static kdb_cpu_cmd_t +kdb_usgf_kdbdbg(void) +{ + kdbp("kdbdbg : trace info to debug kdb\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_kdbdbg(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_kdbdbg(); + + kdbdbg = (kdbdbg==3) ? 0 : (kdbdbg+1); + kdbp("kdbdbg set to:%d\n", kdbdbg); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_reboot(void) +{ + kdbp("reboot: reboot system\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_reboot(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_reboot(); + + machine_restart(500); + return KDB_CPU_MAIN_KDB; /* not reached */ +} + + +static kdb_cpu_cmd_t +kdb_usgf_trcon(void) +{ + kdbp("trcon: turn user added kdb tracing on\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcon(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcon(); + + kdb_trcon = 1; + kdbp("kdb tracing is now on\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcoff(void) +{ + kdbp("trcoff: turn user added kdb tracing off\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcoff(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcoff(); + + kdb_trcon = 0; + kdbp("kdb tracing is now off\n"); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcz(void) +{ + kdbp("trcz : zero entire trace buffer\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcz(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcz(); + + kdb_trczero(); + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_trcp(void) +{ + kdbp("trcp : give hints to dump trace buffer via dw/dd command\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_trcp(int argc, const char **argv, struct cpu_user_regs *regs) +{ + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_trcp(); + + kdb_trcp(); + return KDB_CPU_MAIN_KDB; +} + +/* print some basic info, constants, etc.. */ +static kdb_cpu_cmd_t +kdb_usgf_info(void) +{ + kdbp("info : display basic info, constants, etc..\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_info(int argc, const char **argv, struct cpu_user_regs *regs) +{ + struct domain *dp; + struct cpuinfo_x86 *bcdp; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_info(); + + kdbp("Version: %d.%d.%s (%s@%s) %s\n", xen_major_version(), + xen_minor_version(), xen_extra_version(), xen_compile_by(), + xen_compile_domain(), xen_compile_date()); + kdbp("__XEN_LATEST_INTERFACE_VERSION__ : 0x%x\n", + __XEN_LATEST_INTERFACE_VERSION__); + kdbp("__XEN_INTERFACE_VERSION__: 0x%x\n", __XEN_INTERFACE_VERSION__); + + bcdp = &boot_cpu_data; + kdbp("CPU: (all decimal)"); + if (bcdp->x86_vendor == X86_VENDOR_AMD) + kdbp(" AMD"); + else + kdbp(" INTEL"); + kdbp(" family:%d model:%d\n", bcdp->x86, bcdp->x86_model); + kdbp(" vendor_id:%16s model_id:%64s\n", bcdp->x86_vendor_id, + bcdp->x86_model_id); + kdbp(" cpuidlvl:%d cache:sz:%d align:%d\n", bcdp->cpuid_level, + bcdp->x86_cache_size, bcdp->x86_cache_alignment); + kdbp(" power:%d cores: max:%d booted:%d siblings:%d apicid:%d\n", + bcdp->x86_power, bcdp->x86_max_cores, bcdp->booted_cores, + bcdp->x86_num_siblings, bcdp->apicid); + kdbp(" "); + if (cpu_has_apic) + kdbp("_apic"); + if (cpu_has_sep) + kdbp("|_sep"); + if (cpu_has_xmm3) + kdbp("|_xmm3"); + if (cpu_has_ht) + kdbp("|_ht"); + if (cpu_has_nx) + kdbp("|_nx"); + if (cpu_has_clflush) + kdbp("|_clflush"); + if (cpu_has_page1gb) + kdbp("|_page1gb"); + if (cpu_has_ffxsr) + kdbp("|_ffxsr"); + if (cpu_has_x2apic) + kdbp("|_x2apic"); + kdbp("\n\n"); + kdbp("CC:"); +#if defined(CONFIG_X86_64) + kdbp(" CONFIG_X86_64"); +#endif +#if defined(CONFIG_COMPAT) + kdbp(" CONFIG_COMPAT"); +#endif +#if defined(CONFIG_PAGING_ASSISTANCE) + kdbp(" CONFIG_PAGING_ASSISTANCE"); +#endif + kdbp("\n"); + kdbp("cpu has following features:\n"); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_TSC_RELIABLE) ? + "X86_FEATURE_TSC_RELIABLE" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_CONSTANT_TSC)? "X86_FEATURE_CONSTANT_TSC":""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) ? "X86_FEATURE_NONSTOP_TSC" :""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_RDTSCP) ? "X86_FEATURE_RDTSCP" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_FXSR) ? "X86_FEATURE_FXSR" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_CPUID_FAULTING) ? + "X86_FEATURE_CPUID_FAULTING" : ""); + kdbp(" %s\n", + boot_cpu_has(X86_FEATURE_PAGE1GB) ? "X86_FEATURE_PAGE1GB" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_MWAIT) ? "X86_FEATURE_MWAIT" : ""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_X2APIC) ? "X86_FEATURE_X2APIC":""); + kdbp(" %s\n", boot_cpu_has(X86_FEATURE_XSAVE) ? "X86_FEATURE_XSAVE":""); + kdbp("\n"); + + kdbp("MAX_VIRT_CPUS:$%d MAX_HVM_VCPUS:$%d\n", MAX_VIRT_CPUS,MAX_HVM_VCPUS); + kdbp("NR_EVENT_CHANNELS: $%d\n", NR_EVENT_CHANNELS); + kdbp("NR_EVTCHN_BUCKETS: $%d\n", NR_EVTCHN_BUCKETS); + + kdbp("\nDomains and their vcpus:\n"); + for_each_domain(dp) { + struct vcpu *vp; + int printed=0; + kdbp(" Domain: {id:%d 0x%x ptr:%p%s} VCPUs:\n", + dp->domain_id, dp->domain_id, dp, dp->is_dying ? " DYING":""); + for(vp=dp->vcpu[0]; vp; vp = vp->next_in_list) { + kdbp(" {id:%d p:%p runstate:%d}", vp->vcpu_id, vp, + vp->runstate.state); + if (++printed % 2 == 0) kdbp("\n"); + } + kdbp("\n"); + } + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_cur(void) +{ + kdbp("cur : display current domid and vcpu\n"); + return KDB_CPU_MAIN_KDB; +} + +/* Checking for guest_mode() not feasible here. if dom0->hcall->bp in xen, + * then g_m() will show xen, but vcpu is still dom0. hence just look at + * current only */ +static kdb_cpu_cmd_t +kdb_cmdf_cur(int argc, const char **argv, struct cpu_user_regs *regs) +{ + domid_t id = current->domain->domain_id; + + if (argc > 1 && *argv[1] == '?') + return kdb_usgf_cur(); + + kdbp("domid: %d{%p} %s vcpu:%d {%p} ", id, current->domain, + (id==DOMID_IDLE) ? "(IDLE)" : "", current->vcpu_id, current); + + /* if (id != DOMID_IDLE) { */ + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { + u64 addr = -1; + __vmptrst(&addr); + kdbp(" VMCS:"KDBFL, addr); + } + /* } */ + kdbp("\n"); + return KDB_CPU_MAIN_KDB; +} + +/* stub to quickly and easily add a new command */ +static kdb_cpu_cmd_t +kdb_usgf_usr1(void) +{ + kdbp("usr1: add any arbitrary cmd using this in kdb_cmds.c\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_usr1(int argc, const char **argv, struct cpu_user_regs *regs) +{ + return KDB_CPU_MAIN_KDB; +} + +static kdb_cpu_cmd_t +kdb_usgf_h(void) +{ + kdbp("h: display all commands. See kdb/README for more info\n"); + return KDB_CPU_MAIN_KDB; +} +static kdb_cpu_cmd_t +kdb_cmdf_h(int argc, const char **argv, struct cpu_user_regs *regs) +{ + kdbtab_t *tbp; + + kdbp(" - ccpu is current cpu \n"); + kdbp(" - following are always in decimal:\n"); + kdbp(" vcpu num, cpu num, domid\n"); + kdbp(" - otherwise, almost all numbers are in hex (0x not needed)\n"); + kdbp(" - output: $17 means decimal 17\n"); + kdbp(" - domid 7fff($32767) refers to hypervisor\n"); + kdbp(" - if no domid before function name, then it's hypervisor\n"); + kdbp(" - earlykdb in xen grub line to break into kdb during boot\n"); + kdbp(" - command ? will show the command usage\n"); + kdbp("\n"); + + for(tbp=kdb_cmd_tbl; tbp->kdb_cmd_usgf; tbp++) + (*tbp->kdb_cmd_usgf)(); + return KDB_CPU_MAIN_KDB; +} + +/* ===================== cmd table initialization ========================== */ +void __init +kdb_init_cmdtab(void) +{ + static kdbtab_t _kdb_cmd_table[] = { + + {"info", kdb_cmdf_info, kdb_usgf_info, 1, KDB_REPEAT_NONE}, + {"cur", kdb_cmdf_cur, kdb_usgf_cur, 1, KDB_REPEAT_NONE}, + + {"f", kdb_cmdf_f, kdb_usgf_f, 1, KDB_REPEAT_NONE}, + {"fg", kdb_cmdf_fg, kdb_usgf_fg, 1, KDB_REPEAT_NONE}, + + {"dw", kdb_cmdf_dw, kdb_usgf_dw, 1, KDB_REPEAT_NO_ARGS}, + {"dd", kdb_cmdf_dd, kdb_usgf_dd, 1, KDB_REPEAT_NO_ARGS}, + {"dwm", kdb_cmdf_dwm, kdb_usgf_dwm, 1, KDB_REPEAT_NO_ARGS}, + {"ddm", kdb_cmdf_ddm, kdb_usgf_ddm, 1, KDB_REPEAT_NO_ARGS}, + {"dr", kdb_cmdf_dr, kdb_usgf_dr, 1, KDB_REPEAT_NONE}, + {"drg", kdb_cmdf_drg, kdb_usgf_drg, 1, KDB_REPEAT_NONE}, + + {"dis", kdb_cmdf_dis, kdb_usgf_dis, 1, KDB_REPEAT_NO_ARGS}, + {"dism",kdb_cmdf_dism, kdb_usgf_dism, 1, KDB_REPEAT_NO_ARGS}, + + {"mw", kdb_cmdf_mw, kdb_usgf_mw, 1, KDB_REPEAT_NONE}, + {"md", kdb_cmdf_md, kdb_usgf_md, 1, KDB_REPEAT_NONE}, + {"mr", kdb_cmdf_mr, kdb_usgf_mr, 1, KDB_REPEAT_NONE}, + + {"bc", kdb_cmdf_bc, kdb_usgf_bc, 0, KDB_REPEAT_NONE}, + {"bp", kdb_cmdf_bp, kdb_usgf_bp, 1, KDB_REPEAT_NONE}, + {"btp", kdb_cmdf_btp, kdb_usgf_btp, 1, KDB_REPEAT_NONE}, + + {"wp", kdb_cmdf_wp, kdb_usgf_wp, 1, KDB_REPEAT_NONE}, + {"wc", kdb_cmdf_wc, kdb_usgf_wc, 0, KDB_REPEAT_NONE}, + + {"ni", kdb_cmdf_ni, kdb_usgf_ni, 0, KDB_REPEAT_NO_ARGS}, + {"ss", kdb_cmdf_ss, kdb_usgf_ss, 1, KDB_REPEAT_NO_ARGS}, + {"ssb",kdb_cmdf_ssb,kdb_usgf_ssb,0, KDB_REPEAT_NO_ARGS}, + {"go", kdb_cmdf_go, kdb_usgf_go, 0, KDB_REPEAT_NONE}, + + {"cpu",kdb_cmdf_cpu, kdb_usgf_cpu, 1, KDB_REPEAT_NONE}, + {"nmi",kdb_cmdf_nmi, kdb_usgf_nmi, 1, KDB_REPEAT_NONE}, + {"percpu",kdb_cmdf_percpu, kdb_usgf_percpu, 1, KDB_REPEAT_NONE}, + + {"sym", kdb_cmdf_sym, kdb_usgf_sym, 1, KDB_REPEAT_NONE}, + {"mod", kdb_cmdf_mod, kdb_usgf_mod, 1, KDB_REPEAT_NONE}, + + {"vcpuh",kdb_cmdf_vcpuh, kdb_usgf_vcpuh, 1, KDB_REPEAT_NONE}, + {"vcpu", kdb_cmdf_vcpu, kdb_usgf_vcpu, 1, KDB_REPEAT_NONE}, + {"dom", kdb_cmdf_dom, kdb_usgf_dom, 1, KDB_REPEAT_NONE}, + + {"sched", kdb_cmdf_sched, kdb_usgf_sched, 1, KDB_REPEAT_NONE}, + {"mmu", kdb_cmdf_mmu, kdb_usgf_mmu, 1, KDB_REPEAT_NONE}, + {"p2m", kdb_cmdf_p2m, kdb_usgf_p2m, 1, KDB_REPEAT_NONE}, + {"m2p", kdb_cmdf_m2p, kdb_usgf_m2p, 1, KDB_REPEAT_NONE}, + {"dpage", kdb_cmdf_dpage, kdb_usgf_dpage, 1, KDB_REPEAT_NONE}, + {"dmsr", kdb_cmdf_dmsr, kdb_usgf_dmsr, 1, KDB_REPEAT_NONE}, + {"cpuid", kdb_cmdf_cpuid, kdb_usgf_cpuid, 1, KDB_REPEAT_NONE}, + {"wept", kdb_cmdf_wept, kdb_usgf_wept, 1, KDB_REPEAT_NONE}, + + {"dtrq", kdb_cmdf_dtrq, kdb_usgf_dtrq, 1, KDB_REPEAT_NONE}, + {"didt", kdb_cmdf_didt, kdb_usgf_didt, 1, KDB_REPEAT_NONE}, + {"dgdt", kdb_cmdf_dgdt, kdb_usgf_dgdt, 1, KDB_REPEAT_NONE}, + {"dirq", kdb_cmdf_dirq, kdb_usgf_dirq, 1, KDB_REPEAT_NONE}, + {"dvit", kdb_cmdf_dvit, kdb_usgf_dvit, 1, KDB_REPEAT_NONE}, + {"dvmc", kdb_cmdf_dvmc, kdb_usgf_dvmc, 1, KDB_REPEAT_NONE}, + {"mmio", kdb_cmdf_mmio, kdb_usgf_mmio, 1, KDB_REPEAT_NONE}, + + /* tracing related commands */ + {"trcon", kdb_cmdf_trcon, kdb_usgf_trcon, 0, KDB_REPEAT_NONE}, + {"trcoff",kdb_cmdf_trcoff, kdb_usgf_trcoff, 0, KDB_REPEAT_NONE}, + {"trcz", kdb_cmdf_trcz, kdb_usgf_trcz, 0, KDB_REPEAT_NONE}, + {"trcp", kdb_cmdf_trcp, kdb_usgf_trcp, 1, KDB_REPEAT_NONE}, + + {"usr1", kdb_cmdf_usr1, kdb_usgf_usr1, 1, KDB_REPEAT_NONE}, + {"kdbf", kdb_cmdf_kdbf, kdb_usgf_kdbf, 1, KDB_REPEAT_NONE}, + {"kdbdbg",kdb_cmdf_kdbdbg, kdb_usgf_kdbdbg, 1, KDB_REPEAT_NONE}, + {"reboot",kdb_cmdf_reboot, kdb_usgf_reboot, 1, KDB_REPEAT_NONE}, + {"h", kdb_cmdf_h, kdb_usgf_h, 1, KDB_REPEAT_NONE}, + + {"", NULL, NULL, 0, 0}, + }; + kdb_cmd_tbl = _kdb_cmd_table; + return; +} diff -r 32034d1914a6 xen/kdb/kdb_io.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdb_io.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ +#include "include/kdbinc.h" + +#define K_BACKSPACE 0x8 /* ctrl-H */ +#define K_BACKSPACE1 0x7f /* ctrl-? */ +#define K_UNDERSCORE 0x5f +#define K_CMD_BUFSZ 160 +#define K_CMD_MAXI (K_CMD_BUFSZ - 1) /* max index in buffer */ + +#if 0 /* make a history array some day */ +#define K_UP_ARROW /* sequence : 1b 5b 41 ie, '\e[A' */ +#define K_DN_ARROW /* sequence : 1b 5b 42 ie, '\e[B' */ +#define K_NUM_HIST 32 +static int cursor; +static char cmds_a[NUM_HIST][K_CMD_BUFSZ]; +#endif + +static char cmds_a[K_CMD_BUFSZ]; + + +static int +kdb_key_valid(int key) +{ + /* note: isspace() is more than ' ', hence we don't use it here */ + if (isalnum(key) || key == ' ' || key == K_BACKSPACE || key == '\n' || + key == '?' || key == K_UNDERSCORE || key == '=' || key == '!') + return 1; + return 0; +} + +/* display kdb prompt and read command from the console + * RETURNS: a '\n' terminated command buffer */ +char * +kdb_get_cmdline(char *prompt) +{ + #define K_BELL 0x7 + #define K_CTRL_C 0x3 + + int key, i=0; + + kdbp(prompt); + memset(cmds_a, 0, K_CMD_BUFSZ); + cmds_a[K_CMD_BUFSZ-1] = '\n'; + + do { + key = console_getc(); + if (key == '\r') + key = '\n'; + if (key == K_BACKSPACE1) + key = K_BACKSPACE; + + if (key == K_CTRL_C || (i==K_CMD_MAXI && key != '\n')) { + console_putc('\n'); + if (i >= K_CMD_MAXI) { + kdbp("KDB: cmd buffer overflow\n"); + console_putc(K_BELL); + } + memset(cmds_a, 0, K_CMD_BUFSZ); + i = 0; + kdbp(prompt); + continue; + } + if (!kdb_key_valid(key)) { + console_putc(K_BELL); + continue; + } + if (key == K_BACKSPACE) { + if (i==0) { + console_putc(K_BELL); + continue; + } else + cmds_a[--i] = '\0'; + console_putc(K_BACKSPACE); + console_putc(' '); /* erase character */ + } else + cmds_a[i++] = key; + + console_putc(key); + + } while (key != '\n'); + + return cmds_a; +} + +/* + * printk takes a lock, an NMI could come in after that, and another cpu may + * spin. also, the console lock is forced unlock, so panic is been seen on + * 8 way. hence, no printk() calls. + */ +static volatile int kdbp_gate = 0; +void +kdbp(const char *fmt, ...) +{ + static char buf[1024]; + va_list args; + char *p; + int i=0; + + while ((__cmpxchg(&kdbp_gate, 0,1, sizeof(kdbp_gate)) != 0) && i++<1000) + mdelay(10); + + va_start(args, fmt); + (void)vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + + for (p=buf; *p != '\0'; p++) + console_putc(*p); + kdbp_gate = 0; +} + + +/* + * copy/read machine memory. + * RETURNS: number of bytes copied + */ +int +kdb_read_mmem(kdbma_t maddr, kdbbyt_t *dbuf, int len) +{ + ulong remain, orig=len; + + while (len > 0) { + ulong pagecnt = min_t(long, PAGE_SIZE-(maddr&~PAGE_MASK), len); + char *va = map_domain_page(maddr >> PAGE_SHIFT); + + va = va + (maddr & (PAGE_SIZE-1)); /* add page offset */ + remain = __copy_from_user(dbuf, (void *)va, pagecnt); + KDBGP1("maddr:%x va:%p len:%x pagecnt:%x rem:%x\n", + maddr, va, len, pagecnt, remain); + unmap_domain_page(va); + len = len - (pagecnt - remain); + if (remain != 0) + break; + maddr += pagecnt; + dbuf += pagecnt; + } + return orig - len; +} + + +/* + * copy/read guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes copied + */ +int +kdb_read_mem(kdbva_t saddr, kdbbyt_t *dbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(saddr, dbuf, len, domid, 0, 0)); +} + +/* + * write guest or hypervisor memory. (domid == DOMID_IDLE) => hyp + * RETURNS: number of bytes written + */ +int +kdb_write_mem(kdbva_t daddr, kdbbyt_t *sbuf, int len, domid_t domid) +{ + return (len - dbg_rw_mem(daddr, sbuf, len, domid, 1, 0)); +} diff -r 32034d1914a6 xen/kdb/kdbmain.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/kdbmain.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,757 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "include/kdbinc.h" + +static int kdbmain(kdb_reason_t, struct cpu_user_regs *); +static int kdbmain_fatal(struct cpu_user_regs *, int); +static const char *kdb_gettrapname(int); + +/* ======================== GLOBAL VARIABLES =============================== */ +/* All global variables used by KDB must be defined here only. Module specific + * static variables must be declared in respective modules. + */ +kdbtab_t *kdb_cmd_tbl; +char kdb_prompt[32]; + +volatile kdb_cpu_cmd_t kdb_cpu_cmd[NR_CPUS]; +cpumask_t kdb_cpu_traps; /* bit per cpu to tell which cpus hit int3 */ + +#ifndef NDEBUG + #error KDB is not supported on debug xen. Turn debug off +#endif + +volatile int kdb_init_cpu = -1; /* initial kdb cpu */ +volatile int kdb_session_begun = 0; /* active kdb session? */ +volatile int kdb_enabled = 1; /* kdb enabled currently? */ +volatile int kdb_sys_crash = 0; /* are we in crashed state? */ +volatile int kdbdbg = 0; /* to debug kdb itself */ + +static volatile int kdb_trap_immed_reason = 0; /* reason for immed trap */ + +static cpumask_t kdb_fatal_cpumask; /* which cpus in fatal path */ + +/* return index of first bit set in val. if val is 0, retval is undefined */ +static inline unsigned int kdb_firstbit(unsigned long val) +{ + __asm__ ( "bsf %1,%0" : "=r" (val) : "r" (val), "0" (BITS_PER_LONG) ); + return (unsigned int)val; +} + +void noinline mukchk(unsigned long ul) +{ +} + +static void +kdb_dbg_prnt_ctrps(char *label, int ccpu) +{ + int i; + if (!kdbdbg) + return; + + if (label || *label) + kdbp("%s ", label); + if (ccpu != -1) + kdbp("ccpu:%d ", ccpu); + kdbp("cputrps:"); + for (i=sizeof(kdb_cpu_traps)/sizeof(kdb_cpu_traps.bits[0]) - 1; i >=0; i--) + kdbp(" %lx", kdb_cpu_traps.bits[i]); + kdbp("\n"); +} + +/* + * Hold this cpu. Don't disable until all CPUs in kdb to avoid IPI deadlock + */ +static void +kdb_hold_this_cpu(int ccpu, struct cpu_user_regs *regs) +{ + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + do { + for(; kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE; cpu_relax()); + KDBGP("ccpu:%d hold. cmd:%x\n", kdb_cpu_cmd[ccpu]); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DISABLE) { + local_irq_disable(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DO_VMEXIT) { + kdb_curr_cpu_flush_vmcs(); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_SHOWPC) { + kdbp("[%d]", ccpu); + kdb_display_pc(regs); + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + } while (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE); /* No goto, eh! */ + KDBGP1("un hold: ccpu:%d cmd:%d\n", ccpu, kdb_cpu_cmd[ccpu]); +} + +/* + * Pause this cpu while one CPU does main kdb processing. If that CPU does + * a "cpu switch" to this cpu, this cpu will become the main kdb cpu. If the + * user next does single step of some sort, this function will be exited, + * and this cpu will come back into kdb via kdb_handle_trap_entry function. + */ +static void +kdb_pause_this_cpu(struct cpu_user_regs *regs, void *unused) +{ + kdbmain(KDB_REASON_PAUSE_IPI, regs); +} + +/* pause other cpus via an IPI. Note, disabled CPUs can't receive IPIs until + * enabled */ +static void +kdb_smp_pause_cpus(void) +{ + int cpu, wait_count = 0; + int ccpu = smp_processor_id(); /* current cpu */ + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) { + kdbp("KDB: won't pause cpu:%d, cmd[cpu]=%d\n",cpu,kdb_cpu_cmd[cpu]); + cpumask_clear_cpu(cpu, &cpumask); + } + KDBGP("ccpu:%d will pause cpus. mask:0x%lx\n", ccpu, cpumask.bits[0]); +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + on_selected_cpus(&cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0); +#else + on_selected_cpus(cpumask, (void (*)(void *))kdb_pause_this_cpu, + "XENKDB", 0, 0); +#endif + mdelay(300); /* wait a bit for other CPUs to stop */ + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + bummer = 1; + if (!bummer) + break; + kdbp("ccpu:%d trying to stop other cpus...\n", ccpu); + mdelay(100); /* wait 100 ms */ + }; + for_each_cpu(cpu, &cpumask) /* now check who is with us */ + if (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE) + kdbp("Bummer cpu %d not paused. ccpu:%d\n", cpu,ccpu); + else { + kdb_cpu_cmd[cpu] = KDB_CPU_DISABLE; /* tell it to disable ints */ + while (kdb_cpu_cmd[cpu] != KDB_CPU_PAUSE); + } +} + +/* + * Do once per kdb session: A kdb session lasts from + * keybord/HWBP/SWBP till KDB_CPU_INSTALL_BP is done. Within a session, + * user may do several cpu switches, single step, next instr, etc.. + * + * DO: 1. pause other cpus if they are not already. they would already be + * if we are in single step mode + * 2. watchdog_disable() + * 3. uninstall all sw breakpoints so that user doesn't see them + */ +static void +kdb_begin_session(void) +{ + if (!kdb_session_begun) { + kdb_session_begun = 1; + kdb_smp_pause_cpus(); + local_irq_disable(); + watchdog_disable(); + kdb_uninstall_all_swbp(); + } +} + +int noinline mukid(void) +{ + return smp_processor_id(); +} + +static void +kdb_smp_unpause_cpus(int ccpu) +{ + int cpu; + + int wait_count = 0; + cpumask_t cpumask = cpu_online_map; + + cpumask_clear_cpu(smp_processor_id(), &cpumask); + + KDBGP("kdb_smp_unpause_other_cpus(). ccpu:%d\n", ccpu); + for_each_cpu(cpu, &cpumask) + kdb_cpu_cmd[cpu] = KDB_CPU_QUIT; + + while(wait_count++ < 10) { + int bummer = 0; + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + bummer = 1; + if (!bummer) + break; + mdelay(90); /* wait 90 ms, 50 too short on large systems */ + }; + /* now make sure they are all in there */ + for_each_cpu(cpu, &cpumask) + if (kdb_cpu_cmd[cpu] != KDB_CPU_INVAL) + kdbp("KDB: cpu %d still paused (cmd==%d). ccpu:%d\n", + cpu, kdb_cpu_cmd[cpu], ccpu); +} + +/* + * End of KDB session. + * This is called at the very end. In case of multiple cpus hitting BPs + * and sitting on a trap handlers, the last cpu to exit will call this. + * - isnstall all sw breakpoints, and purge deleted ones from table. + * - clear TF here also in case go is entered on a different cpu after switch + */ +static void +kdb_end_session(int ccpu, struct cpu_user_regs *regs) +{ + ASSERT(!cpumask_empty(&kdb_cpu_traps)); + ASSERT(kdb_session_begun); + kdb_install_all_swbp(); + kdb_flush_swbp_table(); + kdb_install_watchpoints(); + + regs->eflags &= ~X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + kdb_time_resume(1); + kdb_session_begun = 0; /* before unpause for kdb_install_watchpoints */ + kdb_smp_unpause_cpus(ccpu); + watchdog_enable(); + KDBGP("end_session:ccpu:%d\n", ccpu); +} +volatile int mukwpprnt; +unsigned long mukaddr1 = 0xffffffff81243ae7, mukaddr2 = 0xffffffff8100986e; +/* + * check if we entered kdb because of DB trap. If yes, then check if + * we caused it or someone else. + * RETURNS: 0 : not one of ours. hypervisor must handle it. + * 1 : #DB for delayed sw bp install. + * 2 : this cpu must stay in kdb. + */ +static noinline int +kdb_check_dbtrap(kdb_reason_t *reasp, int ss_mode, struct cpu_user_regs *regs) +{ + int rc = 2; + int ccpu = smp_processor_id(); + + /* DB excp caused by hw breakpoint or the TF flag. The TF flag is set + * by us for ss mode or to install breakpoints. In ss mode, none of the + * breakpoints are installed. Check to make sure we intended BP INSTALL + * so we don't do it on a spurious DB trap. + * check for kdb_cpu_traps here also, because each cpu sitting on a trap + * must execute the instruction without the BP before passing control + * to next cpu in kdb_cpu_traps. + */ + if (*reasp == KDB_REASON_DBEXCP && !ss_mode) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP) { + if (!cpumask_empty(&kdb_cpu_traps)) { + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d trapcpu:%d\n", ccpu, a_trap_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + *reasp = KDB_REASON_PAUSE_IPI; + regs->eflags &= ~X86_EFLAGS_TF; /* hvm: exit handler ss = 0 */ + kdb_init_cpu = -1; + } else { + kdb_end_session(ccpu, regs); + rc = 1; + } + } else if (! kdb_check_watchpoints(regs)) { + rc = 0; /* hyp must handle it */ + } else { + if (regs->rip==mukaddr1 || regs->rip==mukaddr2) + { + if (mukwpprnt) + kdbp("MUK: ignoring wp:%lx\n", regs->rip); + kdb_end_session(ccpu, regs); + rc = 1; + } + } + } + return rc; +} + +/* + * Misc processing on kdb entry like displaying PC, adjust IP for sw bp.... + */ +static void +kdb_main_entry_misc(kdb_reason_t reason, struct cpu_user_regs *regs, + int ccpu, int ss_mode, int enabled) +{ + if (reason == KDB_REASON_KEYBOARD) + kdbp("\nEnter kdb (cpu:%d reason:%d vcpu=%d domid:%d" + " eflg:0x%lx irqs:%d)\n", ccpu, reason, current->vcpu_id, + current->domain->domain_id, regs->eflags, enabled); + else if (ss_mode) + KDBGP1("KDBG: KDB single step mode. ccpu:%d\n", ccpu); + + if (reason == KDB_REASON_BPEXCP && !ss_mode) + kdbp("Breakpoint on cpu %d at 0x%lx\n", ccpu, regs->KDBIP); + + /* display the current PC and instruction at it */ + if (reason != KDB_REASON_PAUSE_IPI) + kdb_display_pc(regs); + console_start_sync(); +} + +/* + * The MAIN kdb function. All cpus go thru this. IRQ is enabled on entry because + * a cpu could hit a bp set in disabled code. + * IPI: Even the main cpu must enable in case another CPU is trying to IPI us. + * That way, it would IPI us, then get out and be ready for our pause IPI. + * IRQs: The reason irqs enable/disable is scattered is because on a typical + * system IPIs are constantly going on amongs CPUs in a set of any size. + * As a result, to avoid deadlock, cpus have to loop enabled, until a + * quorum is established and the session has begun. + * Step: Intel Vol3B 18.3.1.4 : An external interrupt may be serviced upon + * single step. Since, the likely ext timer_interrupt and + * apic_timer_interrupt dont' mess with time data structs, we are prob OK + * leaving enabled. + * Time: Very messy. Most platform timers are readonly, so we can't stop time + * in the debugger. We take the only resort, let the TSC and plt run as + * normal, upon leaving, "attempt" to bring everybody to current time. + * kdbcputraps: bit per cpu. each cpu sets it bit in entry.S. The bit is + * reliable because upon traps, Ints are disabled. the bit is set + * before Ints are enabled. + * + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +static int +kdbmain(kdb_reason_t reason, struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); /* current cpu */ + int rc = 1, cmd = kdb_cpu_cmd[ccpu]; + int ss_mode = (cmd == KDB_CPU_SS || cmd == KDB_CPU_NI); + int delayed_install = (kdb_cpu_cmd[ccpu] == KDB_CPU_INSTALL_BP); + int enabled = local_irq_is_enabled(); + + KDBGP("kdbmain:ccpu:%d rsn:%d eflgs:0x%lx cmd:%d initc:%d irqs:%d " + "regs:%lx IP:%lx ", ccpu, reason, regs->eflags, cmd, + kdb_init_cpu, enabled, regs, regs->KDBIP); + kdb_dbg_prnt_ctrps("", -1); + + if (!ss_mode && !delayed_install) /* initial kdb enter */ + local_irq_enable(); /* so we can receive IPI */ + + if (!ss_mode && ccpu != kdb_init_cpu && reason != KDB_REASON_PAUSE_IPI){ + int sz = sizeof(kdb_init_cpu); + while (__cmpxchg(&kdb_init_cpu, -1, ccpu, sz) != -1) + for(; kdb_init_cpu != -1; cpu_relax()); + } + if (kdb_session_begun) + local_irq_disable(); /* kdb always runs disabled */ + + if (reason == KDB_REASON_BPEXCP) { /* INT 3 */ + cpumask_clear_cpu(ccpu, &kdb_cpu_traps); /* remove ourself */ + rc = kdb_check_sw_bkpts(regs); + if (rc == 0) { /* not one of ours. leave kdb */ + kdb_init_cpu = -1; + goto out; + } else if (rc == 1) { /* one of ours but deleted */ + if (cpumask_empty(&kdb_cpu_traps)) { + kdb_end_session(ccpu,regs); + kdb_init_cpu = -1; + goto out; + } else { + /* release another trap cpu, and put ourself in a pause mode */ + int a_trap_cpu = cpumask_first(&kdb_cpu_traps); + KDBGP("ccpu:%d cmd:%d rsn:%d atrpcpu:%d initcpu:%d\n", ccpu, + kdb_cpu_cmd[ccpu], reason, a_trap_cpu, kdb_init_cpu); + kdb_cpu_cmd[a_trap_cpu] = KDB_CPU_QUIT; + reason = KDB_REASON_PAUSE_IPI; + kdb_init_cpu = -1; + } + } else if (rc == 2) { /* one of ours but condition not met */ + kdb_begin_session(); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + + /* following will take care of KDB_CPU_INSTALL_BP, and also release + * kdb_init_cpu. it should not be done twice */ + if ((rc=kdb_check_dbtrap(&reason, ss_mode, regs)) == 0 || rc == 1) { + kdb_init_cpu = -1; /* leaving kdb */ + goto out; /* rc properly set to 0 or 1 */ + } + if (reason != KDB_REASON_PAUSE_IPI) { + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + } else + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB && !ss_mode) + kdb_begin_session(); + + kdb_main_entry_misc(reason, regs, ccpu, ss_mode, enabled); + /* note, one or more cpu switches may occur in between */ + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); + + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + if (ccpu != kdb_init_cpu) { + kdb_cpu_cmd[kdb_init_cpu] = KDB_CPU_GO; + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + continue; /* for the pause guy */ + } + if (!cpumask_empty(&kdb_cpu_traps)) { + /* execute current instruction without 0xcc */ + kdb_dbg_prnt_ctrps("nempty:", ccpu); + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + if (kdb_cpu_cmd[ccpu] != KDB_CPU_PAUSE && + kdb_cpu_cmd[ccpu] != KDB_CPU_MAIN_KDB) + break; + } + if (kdb_cpu_cmd[ccpu] == KDB_CPU_GO) { + ASSERT(cpumask_empty(&kdb_cpu_traps)); + if (kdb_swbp_exists()) { + if (reason == KDB_REASON_BPEXCP) { + /* do delayed install */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 1; + else + regs->eflags |= X86_EFLAGS_TF; + kdb_cpu_cmd[ccpu] = KDB_CPU_INSTALL_BP; + goto out; + } + } + kdb_end_session(ccpu, regs); + kdb_init_cpu = -1; + } +out: + if (kdb_cpu_cmd[ccpu] == KDB_CPU_QUIT) { + KDBGP("ccpu:%d _quit IP: %lx\n", ccpu, regs->KDBIP); + if (! kdb_session_begun) + kdb_install_watchpoints(); + kdb_time_resume(0); + kdb_cpu_cmd[ccpu] = KDB_CPU_INVAL; + } + + /* for ss and delayed install, TF is set. not much in EXT INT handlers*/ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_NI) + kdb_time_resume(1); + if (enabled) + local_irq_enable(); + + KDBGP("kdbmain:X:ccpu:%d rc:%d cmd:%d eflg:0x%lx initc:%d sesn:%d " + "cs:%x irqs:%d ", ccpu, rc, kdb_cpu_cmd[ccpu], regs->eflags, + kdb_init_cpu, kdb_session_begun, regs->cs, local_irq_is_enabled()); + kdb_dbg_prnt_ctrps("", -1); + return (rc ? 1 : 0); +} + +/* + * kdb entry function when coming in via a keyboard + * RETURNS: 0 : kdb was called for event it was not responsible + * 1 : event owned and handled by kdb + */ +int +kdb_keyboard(struct cpu_user_regs *regs) +{ + return kdbmain(KDB_REASON_KEYBOARD, regs); +} + +#if 0 +/* + * this function called when kdb session active and user presses ctrl\ again. + * the assumption is that the user typed ni/ss cmd, and it never got back into + * kdb, or the user is impatient. Either case, we just fake it that the SS did + * finish. Since, all other kdb cpus must be holding disabled, the interrupt + * would be on the CPU that did the ss/ni cmd + */ +void +kdb_ssni_reenter(struct cpu_user_regs *regs) +{ + int ccpu = smp_processor_id(); + int ccmd = kdb_cpu_cmd[ccpu]; + + if(ccmd == KDB_CPU_SS || ccmd == KDB_CPU_INSTALL_BP) + kdbmain(KDB_REASON_DBEXCP, regs); + else + kdbmain(KDB_REASON_KEYBOARD, regs); +} +#endif + +/* + * All traps are routed thru here. We care about BP (#3) trap (INT 3) and + * the DB trap(#1) only. + * returns: 0 kdb has nothing do with this trap + * 1 kdb handled this trap + */ +int +kdb_handle_trap_entry(int vector, struct cpu_user_regs *regs) +{ + int rc = 0; + int ccpu = smp_processor_id(); + + if (vector == TRAP_int3) { + rc = kdbmain(KDB_REASON_BPEXCP, regs); + + } else if (vector == TRAP_debug) { + KDBGP("ccpu:%d trapdbg reas:%d\n", ccpu, kdb_trap_immed_reason); + + if (kdb_trap_immed_reason == KDB_TRAP_FATAL) { + KDBGP("kdbtrp:fatal ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, vector); + BUG(); /* no return */ + + } else if (kdb_trap_immed_reason == KDB_TRAP_KDBSTACK) { + kdb_trap_immed_reason = 0; /* show kdb stack */ + show_registers(regs); + show_stack(regs); + regs->eflags &= ~X86_EFLAGS_TF; + rc = 1; + + } else if (kdb_trap_immed_reason == KDB_TRAP_NONFATAL) { + kdb_trap_immed_reason = 0; + rc = kdb_keyboard(regs); + } else { /* ss/ni/delayed install... */ + if (guest_mode(regs) && is_hvm_or_hyb_vcpu(current)) + current->arch.hvm_vcpu.single_step = 0; + rc = kdbmain(KDB_REASON_DBEXCP, regs); + } + + } else if (vector == TRAP_nmi) { /* external nmi */ + /* when nmi is pressed, it could go to one or more or all cpus + * depending on the hardware. Also, for now assume it's fatal */ + KDBGP("kdbtrp:ccpu:%d vec:%d\n", ccpu, vector); + rc = kdbmain_fatal(regs, TRAP_nmi); + } + return rc; +} + +int +kdb_trap_fatal(int vector, struct cpu_user_regs *regs) +{ + kdbmain_fatal(regs, vector); + return 0; +} + +/* From smp_send_nmi_allbutself() in crash.c which is static */ +void +kdb_nmi_pause_cpus(cpumask_t cpumask) +{ + int ccpu = smp_processor_id(); + mdelay(200); + cpumask_complement(&cpumask, &cpumask); /* flip bit map */ + cpumask_and(&cpumask, &cpumask, &cpu_online_map); /* remove extra bits */ + cpumask_clear_cpu(ccpu, &cpumask);/* absolutely make sure we're not on it */ + + KDBGP("ccpu:%d nmi pause. mask:0x%lx\n", ccpu, cpumask.bits[0]); + if ( !cpumask_empty(&cpumask) ) +#if XEN_SUBVERSION > 4 || XEN_VERSION == 4 /* xen 3.5.x or above */ + send_IPI_mask(&cpumask, APIC_DM_NMI); +#else + send_IPI_mask(cpumask, APIC_DM_NMI); +#endif + mdelay(200); + KDBGP("ccpu:%d nmi pause done...\n", ccpu); +} + +/* + * Separate function from kdbmain to keep both within sanity levels. + */ +DEFINE_SPINLOCK(kdb_fatal_lk); +static int +kdbmain_fatal(struct cpu_user_regs *regs, int vector) +{ + int ccpu = smp_processor_id(); + + console_start_sync(); + + KDBGP("mainf:ccpu:%d vec:%d irq:%d\n", ccpu, vector,local_irq_is_enabled()); + cpumask_set_cpu(ccpu, &kdb_fatal_cpumask); /* uses LOCK_PREFIX */ + + if (spin_trylock(&kdb_fatal_lk)) { + + kdbp("*** kdb (Fatal Error on cpu:%d vec:%d %s):\n", ccpu, + vector, kdb_gettrapname(vector)); + kdb_cpu_cmd[ccpu] = KDB_CPU_MAIN_KDB; + kdb_display_pc(regs); + + watchdog_disable(); /* important */ + kdb_sys_crash = 1; + kdb_session_begun = 0; /* incase session already active */ + local_irq_enable(); + kdb_nmi_pause_cpus(kdb_fatal_cpumask); + + kdb_clear_prev_cmd(); /* buffered CRs will repeat prev cmd */ + kdb_session_begun = 1; /* for kdb_hold_this_cpu() */ + local_irq_disable(); + } else { + kdb_cpu_cmd[ccpu] = KDB_CPU_PAUSE; + } + while (1) { + if (kdb_cpu_cmd[ccpu] == KDB_CPU_PAUSE) + kdb_hold_this_cpu(ccpu, regs); + if (kdb_cpu_cmd[ccpu] == KDB_CPU_MAIN_KDB) + kdb_do_cmds(regs); +#if 0 + /* dump is the only way to exit in crashed state */ + if (kdb_cpu_cmd[ccpu] == KDB_CPU_DUMP) + kdb_do_dump(regs); +#endif + } + return 0; +} + +/* Mostly called in fatal cases. earlykdb calls non-fatal. + * kdb_trap_immed_reason is global, so allow only one cpu at a time. Also, + * multiple cpu may be crashing at the same time. We enable because if there + * is a bad hang, at least ctrl-\ will break into kdb. Also, we don't call + * call kdb_keyboard directly becaue we don't have the register context. + */ +DEFINE_SPINLOCK(kdb_immed_lk); +void +kdb_trap_immed(int reason) /* fatal, non-fatal, kdb stack etc... */ +{ + int ccpu = smp_processor_id(); + int disabled = !local_irq_is_enabled(); + + KDBGP("trapimm:ccpu:%d reas:%d\n", ccpu, reason); + local_irq_enable(); + spin_lock(&kdb_immed_lk); + kdb_trap_immed_reason = reason; + barrier(); + __asm__ __volatile__ ( "int $1" ); + kdb_trap_immed_reason = 0; + + spin_unlock(&kdb_immed_lk); + if (disabled) + local_irq_disable(); +} + +/* called very early during init, even before all CPUs are brought online */ +void +kdb_init(void) +{ + kdb_init_cmdtab(); /* Initialize Command Table */ +} + +static const char * +kdb_gettrapname(int trapno) +{ + char *ret; + switch (trapno) { + case 0: ret = "Divide Error"; break; + case 2: ret = "NMI Interrupt"; break; + case 3: ret = "Int 3 Trap"; break; + case 4: ret = "Overflow Error"; break; + case 6: ret = "Invalid Opcode"; break; + case 8: ret = "Double Fault"; break; + case 10: ret = "Invalid TSS"; break; + case 11: ret = "Segment Not Present"; break; + case 12: ret = "Stack-Segment Fault"; break; + case 13: ret = "General Protection"; break; + case 14: ret = "Page Fault"; break; + case 17: ret = "Alignment Check"; break; + default: ret = " ????? "; + } + return ret; +} + + +/* ====================== Generic tracing subsystem ======================== */ + +#define KDBTRCMAX 1 /* set this to max number of recs to trace. each rec + * is 32 bytes */ +volatile int kdb_trcon=1; /* turn tracing ON: set here or via the trcon cmd */ + +typedef struct { + union { + struct { uint d0; uint cpu_trcid; } s0; + uint64_t l0; + }u; + uint64_t l1, l2, l3; +} trc_rec_t; + +static volatile unsigned int trcidx; /* points to where new entry will go */ +static trc_rec_t trca[KDBTRCMAX]; /* trace array */ + +/* atomically: add i to *p, return prev value of *p (ie, val before add) */ +static int +kdb_fetch_and_add(int i, uint *p) +{ + asm volatile("lock xaddl %0, %1;" : "=r"(i) : "m"(*p), "0"(i)); + return i; +} + +/* zero out the entire buffer */ +void +kdb_trczero(void) +{ + for (trcidx = KDBTRCMAX-1; trcidx; trcidx--) { + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + } + memset(&trca[trcidx], 0, sizeof(trc_rec_t)); + kdbp("kdb trace buffer has been zeroed\n"); +} + +/* add trace entry: eg.: kdbtrc(0xe0f099, intdata, vcpu, domain, 0) + * where: 0xe0f099 : 24bits max trcid, lower 8 bits are set to cpuid */ +void +kdbtrc(uint trcid, uint int_d0, uint64_t d1_64, uint64_t d2_64, uint64_t d3_64) +{ + uint idx; + + if (!kdb_trcon) + return; + + idx = kdb_fetch_and_add(1, (uint*)&trcidx); + idx = idx % KDBTRCMAX; + +#if 0 + trca[idx].u.s0.cpu_trcid = (smp_processor_id()<<24) | trcid; +#endif + trca[idx].u.s0.cpu_trcid = (trcid<<8) | smp_processor_id(); + trca[idx].u.s0.d0 = int_d0; + trca[idx].l1 = d1_64; + trca[idx].l2 = d2_64; + trca[idx].l3 = d3_64; +} + +/* give hints so user can print trc buffer via the dd command. last has the + * most recent entry */ +void +kdb_trcp(void) +{ + int i = trcidx % KDBTRCMAX; + + i = (i==0) ? KDBTRCMAX-1 : i-1; + kdbp("trcbuf: [0]: %016lx [MAX-1]: %016lx\n", &trca[0], + &trca[KDBTRCMAX-1]); + kdbp(" [most recent]: %016lx trcidx: 0x%x\n", &trca[i], trcidx); +} + diff -r 32034d1914a6 xen/kdb/x86/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/Makefile Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,3 @@ + +obj-y := kdb_wp.o +subdir-y += udis86-1.7 diff -r 32034d1914a6 xen/kdb/x86/kdb_wp.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/kdb_wp.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include "../include/kdbinc.h" + +#if 0 +#define DR6_BT 0x00008000 +#define DR6_BS 0x00004000 +#define DR6_BD 0x00002000 +#endif +#define DR6_B3 0x00000008 +#define DR6_B2 0x00000004 +#define DR6_B1 0x00000002 +#define DR6_B0 0x00000001 + +#define KDB_MAXWP 4 /* DR0 thru DR3 */ + +struct kdb_wp { + kdbma_t wp_addr; + int wp_rwflag; + int wp_len; + int wp_deleted; /* pending delete */ +}; +static struct kdb_wp kdb_wpa[KDB_MAXWP]; + +/* following because vmcs has it's own dr7. when vmcs runs, it messes up the + * native dr7 so we need to save/restore it */ +unsigned long kdb_dr7; + + +/* Set G0-G3 bits in DR7. this does global enable of the corresponding wp */ +static void +kdb_set_gx_in_dr7(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p | 0x2; + else if (regno == 1) + *dr7p = *dr7p | 0x8; + else if (regno == 2) + *dr7p = *dr7p | 0x20; + else if (regno == 3) + *dr7p = *dr7p | 0x80; +} + +/* Set LEN0 - LEN3 pair bits in DR7 (len should be 1 2 4 or 8) */ +static void +kdb_set_len_in_dr7(int regno, kdbma_t *dr7p, int len) +{ + int lenbits = (len == 8) ? 2 : len-1; + + *dr7p &= ~(0x3 << (18 + 4*regno)); + *dr7p |= ((ulong)(lenbits & 0x3) << (18 + 4*regno)); +} + +static void +kdb_set_dr7_rw(int regno, kdbma_t *dr7p, int rw) +{ + *dr7p &= ~(0x3 << (16 + 4*regno)); + *dr7p |= ((ulong)(rw & 0x3)) << (16 + 4*regno); +} + +/* get value of a debug register: DR0-DR3 DR6 DR7. other values return 0 */ +kdbma_t +kdb_rd_dbgreg(int regnum) +{ + kdbma_t contents = 0; + + if (regnum == 0) + __asm__ ("movq %%db0,%0\n\t":"=r"(contents)); + else if (regnum == 1) + __asm__ ("movq %%db1,%0\n\t":"=r"(contents)); + else if (regnum == 2) + __asm__ ("movq %%db2,%0\n\t":"=r"(contents)); + else if (regnum == 3) + __asm__ ("movq %%db3,%0\n\t":"=r"(contents)); + else if (regnum == 6) + __asm__ ("movq %%db6,%0\n\t":"=r"(contents)); + else if (regnum == 7) + __asm__ ("movq %%db7,%0\n\t":"=r"(contents)); + + return contents; +} + +static void +kdb_wr_dbgreg(int regnum, kdbma_t contents) +{ + if (regnum == 0) + __asm__ ("movq %0,%%db0\n\t"::"r"(contents)); + else if (regnum == 1) + __asm__ ("movq %0,%%db1\n\t"::"r"(contents)); + else if (regnum == 2) + __asm__ ("movq %0,%%db2\n\t"::"r"(contents)); + else if (regnum == 3) + __asm__ ("movq %0,%%db3\n\t"::"r"(contents)); + else if (regnum == 6) + __asm__ ("movq %0,%%db6\n\t"::"r"(contents)); + else if (regnum == 7) + __asm__ ("movq %0,%%db7\n\t"::"r"(contents)); +} + +static void +kdb_print_wp_info(char *strp, int idx) +{ + kdbp("%s[%d]:%016lx len:%d ", strp, idx, kdb_wpa[idx].wp_addr, + kdb_wpa[idx].wp_len); + if (kdb_wpa[idx].wp_rwflag == 1) + kdbp("on data write only\n"); + else if (kdb_wpa[idx].wp_rwflag == 2) + kdbp("on IO read/write\n"); + else + kdbp("on data read/write\n"); +} + +/* + * Returns : 0 if not one of ours + * 1 if one of ours + */ +int +kdb_check_watchpoints(struct cpu_user_regs *regs) +{ + int wpnum; + kdbma_t dr6 = kdb_rd_dbgreg(6); + + KDBGP1("check_wp: IP:%lx EFLAGS:%lx\n", regs->rip, regs->rflags); + if (dr6 & DR6_B0) + wpnum = 0; + else if (dr6 & DR6_B1) + wpnum = 1; + else if (dr6 & DR6_B2) + wpnum = 2; + else if (dr6 & DR6_B3) + wpnum = 3; + else + return 0; + + kdb_print_wp_info("Watchpoint ", wpnum); + return 1; +} + +/* set a watchpoint at a given address + * PreCondition: addr != 0 */ +static void +kdb_set_wp(kdbva_t addr, int rwflag, int len) +{ + int regno; + + for (regno=0; regno < KDB_MAXWP; regno++) { + if (kdb_wpa[regno].wp_addr == addr && !kdb_wpa[regno].wp_deleted) { + kdbp("Watchpoint already set\n"); + return; + } + if (kdb_wpa[regno].wp_deleted) + memset(&kdb_wpa[regno], 0, sizeof(kdb_wpa[regno])); + } + for (regno=0; regno < KDB_MAXWP && kdb_wpa[regno].wp_addr; regno++); + if (regno >= KDB_MAXWP) { + kdbp("watchpoint table full. limit:%d\n", KDB_MAXWP); + return; + } + kdb_wpa[regno].wp_addr = addr; + kdb_wpa[regno].wp_rwflag = rwflag; + kdb_wpa[regno].wp_len = len; + kdb_print_wp_info("Watchpoint set ", regno); +} + +/* write reg DR0-3 with address. Update corresponding bits in DR7 */ +static void +kdb_install_watchpoint(int regno, kdbma_t *dr7p) +{ + kdb_set_gx_in_dr7(regno, dr7p); + kdb_set_len_in_dr7(regno, dr7p, kdb_wpa[regno].wp_len); + kdb_set_dr7_rw(regno, dr7p, kdb_wpa[regno].wp_rwflag); + kdb_wr_dbgreg(regno, kdb_wpa[regno].wp_addr); + + KDBGP1("ccpu:%d installed wp. addr:%lx rw:%x len:%x dr7:%016lx\n", + smp_processor_id(), kdb_wpa[regno].wp_addr, + kdb_wpa[regno].wp_rwflag, kdb_wpa[regno].wp_len, *dr7p); +} + +/* clear G0-G3 bits in DR7 for given DR0-3 */ +static void +kdb_clear_dr7_gx(int regno, kdbma_t *dr7p) +{ + if (regno == 0) + *dr7p = *dr7p & ~0x2; + else if (regno == 1) + *dr7p = *dr7p & ~0x8; + else if (regno == 2) + *dr7p = *dr7p & ~0x20; + else if (regno == 3) + *dr7p = *dr7p & ~0x80; +} + +/* update dr7 once, as it's slow to update debug regs and cpu's will still be + * paused when leaving kdb. + * + * Just leave DR0-3 clobbered but remove bits from DR7 to disable wp + */ +void +kdb_install_watchpoints(void) +{ + int regno; + kdbma_t dr7 = kdb_rd_dbgreg(7); + + for (regno=0; regno < KDB_MAXWP; regno++) { + /* do not clear wp_deleted here as all cpus must clear wps */ + if (kdb_wpa[regno].wp_deleted) { + kdb_clear_dr7_gx(regno, &dr7); + continue; + } + if (kdb_wpa[regno].wp_addr) + kdb_install_watchpoint(regno, &dr7); + } + /* always clear DR6 when leaving */ + kdb_wr_dbgreg(6, 0); + kdb_wr_dbgreg(7, dr7); + + if (dr7 & DR7_ACTIVE_MASK) + kdb_dr7 = dr7; + else + kdb_dr7 = 0; +#if 0 + for(dp=domain_list; dp; dp=dp->next_in_list) { + struct vcpu *vp; + for_each_vcpu(dp, vp) { + for (regno=0; regno < KDB_MAXWP; regno++) + vp->arch.guest_context.debugreg[regno] = kdb_wpa[regno].wp_addr; + + vp->arch.guest_context.debugreg[6] = 0; + vp->arch.guest_context.debugreg[7] = dr7; + KDBGP("kdb_install_watchpoints(): v:%p dr7:%lx\n", vp, dr7); + /* hvm_set_info_guest(vp);: Can't because can't vmcs_enter in kdb */ + } + } +#endif +} + +/* clear watchpoint/s. wpnum == -1 to clear all watchpoints */ +void +kdb_clear_wps(int wpnum) +{ + int i; + + if (wpnum >= KDB_MAXWP) { + kdbp("Invalid wpnum %d\n", wpnum); + return; + } + if (wpnum >=0) { + if (kdb_wpa[wpnum].wp_addr) { + kdb_wpa[wpnum].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", wpnum); + } else + kdbp("watchpoint %d not set\n", wpnum); + return; + } + for (i=0; i < KDB_MAXWP; i++) { + if (kdb_wpa[i].wp_addr) { + kdb_wpa[i].wp_deleted = 1; + kdb_print_wp_info("Deleted watchpoint", i); + } + } +} + +/* display any watchpoints that are set */ +static void +kdb_display_wps(void) +{ + int i; + for (i=0; i < KDB_MAXWP; i++) + if (kdb_wpa[i].wp_addr && !kdb_wpa[i].wp_deleted) + kdb_print_wp_info("", i); +} + +/* + * Display or Set hardware breakpoints, ie, watchpoints: + * - Upto 4 are allowed + * + * rw_flag should be one of: + * 01 == break on data write only + * 10 == break on IO read/write + * 11 == Break on data reads or writes + * + * len should be one of : 1 2 4 8 + */ +void +kdb_do_watchpoints(kdbva_t addr, int rw_flag, int len) +{ + if (addr == 0) { + kdb_display_wps(); /* display set watchpoints */ + return; + } + kdb_set_wp(addr, rw_flag, len); + return; +} + diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/LICENSE --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/LICENSE Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,22 @@ +Copyright (c) 2002, 2003, 2004, 2005, 2006 +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/Makefile Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,5 @@ + +CFLAGS += -D__UD_STANDALONE__ +obj-y := decode.o input.o itab.o kdb_dis.o syn-att.o syn.o \ + syn-intel.o udis86.o + diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/README --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/README Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,10 @@ + +http://udis86.sourceforge.net/ +udis86-1.6 : + - cd libudis86 + - cp *c to here + - cp *h to here + +Mukesh Rathor +04/30/2008 + diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/decode.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,1197 @@ +/* ----------------------------------------------------------------------------- + * decode.c + * + * Copyright (c) 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#endif + +#include "types.h" +#include "itab.h" +#include "input.h" +#include "decode.h" + +/* The max number of prefixes to an instruction */ +#define MAX_PREFIXES 15 + +static struct ud_itab_entry ie_invalid = { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_pause = { UD_Ipause, O_NONE, O_NONE, O_NONE, P_none }; +static struct ud_itab_entry ie_nop = { UD_Inop, O_NONE, O_NONE, O_NONE, P_none }; + + +/* Looks up mnemonic code in the mnemonic string table + * Returns NULL if the mnemonic code is invalid + */ +const char * ud_lookup_mnemonic( enum ud_mnemonic_code c ) +{ + if ( c < UD_Id3vil ) + return ud_mnemonics_str[ c ]; + return NULL; +} + + +/* Extracts instruction prefixes. + */ +static int get_prefixes( struct ud* u ) +{ + unsigned int have_pfx = 1; + unsigned int i; + uint8_t curr; + + /* if in error state, bail out */ + if ( u->error ) + return -1; + + /* keep going as long as there are prefixes available */ + for ( i = 0; have_pfx ; ++i ) { + + /* Get next byte. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr( u ); + + /* rex prefixes in 64bit mode */ + if ( u->dis_mode == 64 && ( curr & 0xF0 ) == 0x40 ) { + u->pfx_rex = curr; + } else { + switch ( curr ) + { + case 0x2E : + u->pfx_seg = UD_R_CS; + u->pfx_rex = 0; + break; + case 0x36 : + u->pfx_seg = UD_R_SS; + u->pfx_rex = 0; + break; + case 0x3E : + u->pfx_seg = UD_R_DS; + u->pfx_rex = 0; + break; + case 0x26 : + u->pfx_seg = UD_R_ES; + u->pfx_rex = 0; + break; + case 0x64 : + u->pfx_seg = UD_R_FS; + u->pfx_rex = 0; + break; + case 0x65 : + u->pfx_seg = UD_R_GS; + u->pfx_rex = 0; + break; + case 0x67 : /* adress-size override prefix */ + u->pfx_adr = 0x67; + u->pfx_rex = 0; + break; + case 0xF0 : + u->pfx_lock = 0xF0; + u->pfx_rex = 0; + break; + case 0x66: + /* the 0x66 sse prefix is only effective if no other sse prefix + * has already been specified. + */ + if ( !u->pfx_insn ) u->pfx_insn = 0x66; + u->pfx_opr = 0x66; + u->pfx_rex = 0; + break; + case 0xF2: + u->pfx_insn = 0xF2; + u->pfx_repne = 0xF2; + u->pfx_rex = 0; + break; + case 0xF3: + u->pfx_insn = 0xF3; + u->pfx_rep = 0xF3; + u->pfx_repe = 0xF3; + u->pfx_rex = 0; + break; + default : + /* No more prefixes */ + have_pfx = 0; + break; + } + } + + /* check if we reached max instruction length */ + if ( i + 1 == MAX_INSN_LENGTH ) { + u->error = 1; + break; + } + } + + /* return status */ + if ( u->error ) + return -1; + + /* rewind back one byte in stream, since the above loop + * stops with a non-prefix byte. + */ + inp_back(u); + + /* speculatively determine the effective operand mode, + * based on the prefixes and the current disassembly + * mode. This may be inaccurate, but useful for mode + * dependent decoding. + */ + if ( u->dis_mode == 64 ) { + u->opr_mode = REX_W( u->pfx_rex ) ? 64 : ( ( u->pfx_opr ) ? 16 : 32 ) ; + u->adr_mode = ( u->pfx_adr ) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + return 0; +} + + +/* Searches the instruction tables for the right entry. + */ +static int search_itab( struct ud * u ) +{ + struct ud_itab_entry * e = NULL; + enum ud_itab_index table; + uint8_t peek; + uint8_t did_peek = 0; + uint8_t curr; + uint8_t index; + + /* if in state of error, return */ + if ( u->error ) + return -1; + + /* get first byte of opcode. */ + inp_next(u); + if ( u->error ) + return -1; + curr = inp_curr(u); + + /* resolve xchg, nop, pause crazyness */ + if ( 0x90 == curr ) { + if ( !( u->dis_mode == 64 && REX_B( u->pfx_rex ) ) ) { + if ( u->pfx_rep ) { + u->pfx_rep = 0; + e = & ie_pause; + } else { + e = & ie_nop; + } + goto found_entry; + } + } + + /* get top-level table */ + if ( 0x0F == curr ) { + table = ITAB__0F; + curr = inp_next(u); + if ( u->error ) + return -1; + + /* 2byte opcodes can be modified by 0x66, F3, and F2 prefixes */ + if ( 0x66 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSE66__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSE66__0F; + u->pfx_opr = 0; + } + } else if ( 0xF2 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF2__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF2__0F; + u->pfx_repne = 0; + } + } else if ( 0xF3 == u->pfx_insn ) { + if ( ud_itab_list[ ITAB__PFX_SSEF3__0F ][ curr ].mnemonic != UD_Iinvalid ) { + table = ITAB__PFX_SSEF3__0F; + u->pfx_repe = 0; + u->pfx_rep = 0; + } + } + /* pick an instruction from the 1byte table */ + } else { + table = ITAB__1BYTE; + } + + index = curr; + +search: + + e = & ud_itab_list[ table ][ index ]; + + /* if mnemonic constant is a standard instruction constant + * our search is over. + */ + + if ( e->mnemonic < UD_Id3vil ) { + if ( e->mnemonic == UD_Iinvalid ) { + if ( did_peek ) { + inp_next( u ); if ( u->error ) return -1; + } + goto found_entry; + } + goto found_entry; + } + + table = e->prefix; + + switch ( e->mnemonic ) + { + case UD_Igrp_reg: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_REG( peek ); + break; + + case UD_Igrp_mod: + peek = inp_peek( u ); + did_peek = 1; + index = MODRM_MOD( peek ); + if ( index == 3 ) + index = ITAB__MOD_INDX__11; + else + index = ITAB__MOD_INDX__NOT_11; + break; + + case UD_Igrp_rm: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = MODRM_RM( curr ); + break; + + case UD_Igrp_x87: + curr = inp_next( u ); + did_peek = 0; + if ( u->error ) + return -1; + index = curr - 0xC0; + break; + + case UD_Igrp_osize: + if ( u->opr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->opr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_asize: + if ( u->adr_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->adr_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_mode: + if ( u->dis_mode == 64 ) + index = ITAB__MODE_INDX__64; + else if ( u->dis_mode == 32 ) + index = ITAB__MODE_INDX__32; + else + index = ITAB__MODE_INDX__16; + break; + + case UD_Igrp_vendor: + if ( u->vendor == UD_VENDOR_INTEL ) + index = ITAB__VENDOR_INDX__INTEL; + else if ( u->vendor == UD_VENDOR_AMD ) + index = ITAB__VENDOR_INDX__AMD; + else { + kdbp("KDB:search_itab(): unrecognized vendor id\n"); + return -1; + } + break; + + case UD_Id3vil: + kdbp("KDB:search_itab(): invalid instr mnemonic constant Id3vil\n"); + return -1; + + default: + kdbp("KDB:search_itab(): invalid instruction mnemonic constant\n"); + return -1; + } + + goto search; + +found_entry: + + u->itab_entry = e; + u->mnemonic = u->itab_entry->mnemonic; + + return 0; +} + + +static unsigned int resolve_operand_size( const struct ud * u, unsigned int s ) +{ + switch ( s ) + { + case SZ_V: + return ( u->opr_mode ); + case SZ_Z: + return ( u->opr_mode == 16 ) ? 16 : 32; + case SZ_P: + return ( u->opr_mode == 16 ) ? SZ_WP : SZ_DP; + case SZ_MDQ: + return ( u->opr_mode == 16 ) ? 32 : u->opr_mode; + case SZ_RDQ: + return ( u->dis_mode == 64 ) ? 64 : 32; + default: + return s; + } +} + + +static int resolve_mnemonic( struct ud* u ) +{ + /* far/near flags */ + u->br_far = 0; + u->br_near = 0; + /* readjust operand sizes for call/jmp instrcutions */ + if ( u->mnemonic == UD_Icall || u->mnemonic == UD_Ijmp ) { + /* WP: 16bit pointer */ + if ( u->operand[ 0 ].size == SZ_WP ) { + u->operand[ 0 ].size = 16; + u->br_far = 1; + u->br_near= 0; + /* DP: 32bit pointer */ + } else if ( u->operand[ 0 ].size == SZ_DP ) { + u->operand[ 0 ].size = 32; + u->br_far = 1; + u->br_near= 0; + } else { + u->br_far = 0; + u->br_near= 1; + } + /* resolve 3dnow weirdness. */ + } else if ( u->mnemonic == UD_I3dnow ) { + u->mnemonic = ud_itab_list[ ITAB__3DNOW ][ inp_curr( u ) ].mnemonic; + } + /* SWAPGS is only valid in 64bits mode */ + if ( u->mnemonic == UD_Iswapgs && u->dis_mode != 64 ) { + u->error = 1; + return -1; + } + + return 0; +} + + +/* ----------------------------------------------------------------------------- + * decode_a()- Decodes operands of the type seg:offset + * ----------------------------------------------------------------------------- + */ +static void +decode_a(struct ud* u, struct ud_operand *op) +{ + if (u->opr_mode == 16) { + /* seg16:off16 */ + op->type = UD_OP_PTR; + op->size = 32; + op->lval.ptr.off = inp_uint16(u); + op->lval.ptr.seg = inp_uint16(u); + } else { + /* seg16:off32 */ + op->type = UD_OP_PTR; + op->size = 48; + op->lval.ptr.off = inp_uint32(u); + op->lval.ptr.seg = inp_uint16(u); + } +} + +/* ----------------------------------------------------------------------------- + * decode_gpr() - Returns decoded General Purpose Register + * ----------------------------------------------------------------------------- + */ +static enum ud_type +decode_gpr(register struct ud* u, unsigned int s, unsigned char rm) +{ + s = resolve_operand_size(u, s); + + switch (s) { + case 64: + return UD_R_RAX + rm; + case SZ_DP: + case 32: + return UD_R_EAX + rm; + case SZ_WP: + case 16: + return UD_R_AX + rm; + case 8: + if (u->dis_mode == 64 && u->pfx_rex) { + if (rm >= 4) + return UD_R_SPL + (rm-4); + return UD_R_AL + rm; + } else return UD_R_AL + rm; + default: + return 0; + } +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr64() - 64bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr64(struct ud* u, enum ud_operand_code gpr_op) +{ + if (gpr_op >= OP_rAXr8 && gpr_op <= OP_rDIr15) + gpr_op = (gpr_op - OP_rAXr8) | (REX_B(u->pfx_rex) << 3); + else gpr_op = (gpr_op - OP_rAX); + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + if (u->dis_mode == 32 || + (u->opr_mode == 32 && ! (REX_W(u->pfx_rex) || u->default64))) { + return gpr_op + UD_R_EAX; + } + + return gpr_op + UD_R_RAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_gpr32 () - 32bit General Purpose Register-Selection. + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_gpr32(struct ud* u, enum ud_operand_code gpr_op) +{ + gpr_op = gpr_op - OP_eAX; + + if (u->opr_mode == 16) + return gpr_op + UD_R_AX; + + return gpr_op + UD_R_EAX; +} + +/* ----------------------------------------------------------------------------- + * resolve_reg() - Resolves the register type + * ----------------------------------------------------------------------------- + */ +static enum ud_type +resolve_reg(struct ud* u, unsigned int type, unsigned char i) +{ + switch (type) { + case T_MMX : return UD_R_MM0 + (i & 7); + case T_XMM : return UD_R_XMM0 + i; + case T_CRG : return UD_R_CR0 + i; + case T_DBG : return UD_R_DR0 + i; + case T_SEG : return UD_R_ES + (i & 7); + case T_NONE: + default: return UD_NONE; + } +} + +/* ----------------------------------------------------------------------------- + * decode_imm() - Decodes Immediate values. + * ----------------------------------------------------------------------------- + */ +static void +decode_imm(struct ud* u, unsigned int s, struct ud_operand *op) +{ + op->size = resolve_operand_size(u, s); + op->type = UD_OP_IMM; + + switch (op->size) { + case 8: op->lval.sbyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: return; + } +} + +/* ----------------------------------------------------------------------------- + * decode_modrm() - Decodes ModRM Byte + * ----------------------------------------------------------------------------- + */ +static void +decode_modrm(struct ud* u, struct ud_operand *op, unsigned int s, + unsigned char rm_type, struct ud_operand *opreg, + unsigned char reg_size, unsigned char reg_type) +{ + unsigned char mod, rm, reg; + + inp_next(u); + + /* get mod, r/m and reg fields */ + mod = MODRM_MOD(inp_curr(u)); + rm = (REX_B(u->pfx_rex) << 3) | MODRM_RM(inp_curr(u)); + reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(inp_curr(u)); + + op->size = resolve_operand_size(u, s); + + /* if mod is 11b, then the UD_R_m specifies a gpr/mmx/sse/control/debug */ + if (mod == 3) { + op->type = UD_OP_REG; + if (rm_type == T_GPR) + op->base = decode_gpr(u, op->size, rm); + else op->base = resolve_reg(u, rm_type, (REX_B(u->pfx_rex) << 3) | (rm&7)); + } + /* else its memory addressing */ + else { + op->type = UD_OP_MEM; + + /* 64bit addressing */ + if (u->adr_mode == 64) { + + op->base = UD_R_RAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && (rm & 7) == 5) { + op->base = UD_R_RIP; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_RAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_RAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + /* special conditions for base reference */ + if (op->index == UD_R_RSP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + if (op->base == UD_R_RBP || op->base == UD_R_R13) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 32-Bit addressing mode */ + else if (u->adr_mode == 32) { + + /* get base */ + op->base = UD_R_EAX + rm; + + /* get offset type */ + if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 32; + else if (mod == 0 && rm == 5) { + op->base = UD_NONE; + op->offset = 32; + } else op->offset = 0; + + /* Scale-Index-Base (SIB) */ + if ((rm & 7) == 4) { + inp_next(u); + + op->scale = (1 << SIB_S(inp_curr(u))) & ~1; + op->index = UD_R_EAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3)); + op->base = UD_R_EAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3)); + + if (op->index == UD_R_ESP) { + op->index = UD_NONE; + op->scale = UD_NONE; + } + + /* special condition for base reference */ + if (op->base == UD_R_EBP) { + if (mod == 0) + op->base = UD_NONE; + if (mod == 1) + op->offset = 8; + else op->offset = 32; + } + } + } + + /* 16bit addressing mode */ + else { + switch (rm) { + case 0: op->base = UD_R_BX; op->index = UD_R_SI; break; + case 1: op->base = UD_R_BX; op->index = UD_R_DI; break; + case 2: op->base = UD_R_BP; op->index = UD_R_SI; break; + case 3: op->base = UD_R_BP; op->index = UD_R_DI; break; + case 4: op->base = UD_R_SI; break; + case 5: op->base = UD_R_DI; break; + case 6: op->base = UD_R_BP; break; + case 7: op->base = UD_R_BX; break; + } + + if (mod == 0 && rm == 6) { + op->offset= 16; + op->base = UD_NONE; + } + else if (mod == 1) + op->offset = 8; + else if (mod == 2) + op->offset = 16; + } + } + + /* extract offset, if any */ + switch(op->offset) { + case 8 : op->lval.ubyte = inp_uint8(u); break; + case 16: op->lval.uword = inp_uint16(u); break; + case 32: op->lval.udword = inp_uint32(u); break; + case 64: op->lval.uqword = inp_uint64(u); break; + default: break; + } + + /* resolve register encoded in reg field */ + if (opreg) { + opreg->type = UD_OP_REG; + opreg->size = resolve_operand_size(u, reg_size); + if (reg_type == T_GPR) + opreg->base = decode_gpr(u, opreg->size, reg); + else opreg->base = resolve_reg(u, reg_type, reg); + } +} + +/* ----------------------------------------------------------------------------- + * decode_o() - Decodes offset + * ----------------------------------------------------------------------------- + */ +static void +decode_o(struct ud* u, unsigned int s, struct ud_operand *op) +{ + switch (u->adr_mode) { + case 64: + op->offset = 64; + op->lval.uqword = inp_uint64(u); + break; + case 32: + op->offset = 32; + op->lval.udword = inp_uint32(u); + break; + case 16: + op->offset = 16; + op->lval.uword = inp_uint16(u); + break; + default: + return; + } + op->type = UD_OP_MEM; + op->size = resolve_operand_size(u, s); +} + +/* ----------------------------------------------------------------------------- + * disasm_operands() - Disassembles Operands. + * ----------------------------------------------------------------------------- + */ +static int disasm_operands(register struct ud* u) +{ + + + /* mopXt = map entry, operand X, type; */ + enum ud_operand_code mop1t = u->itab_entry->operand1.type; + enum ud_operand_code mop2t = u->itab_entry->operand2.type; + enum ud_operand_code mop3t = u->itab_entry->operand3.type; + + /* mopXs = map entry, operand X, size */ + unsigned int mop1s = u->itab_entry->operand1.size; + unsigned int mop2s = u->itab_entry->operand2.size; + unsigned int mop3s = u->itab_entry->operand3.size; + + /* iop = instruction operand */ + register struct ud_operand* iop = u->operand; + + switch(mop1t) { + + case OP_A : + decode_a(u, &(iop[0])); + break; + + /* M[b] ... */ + case OP_M : + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + /* E, G/P/V/I/CL/1/S */ + case OP_E : + if (mop2t == OP_G) { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + else if (mop3t == OP_CL) { + iop[2].type = UD_OP_REG; + iop[2].base = UD_R_CL; + iop[2].size = 8; + } + } + else if (mop2t == OP_P) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_MMX); + else if (mop2t == OP_V) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_XMM); + else if (mop2t == OP_S) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_SEG); + else { + decode_modrm(u, &(iop[0]), mop1s, T_GPR, NULL, 0, T_NONE); + if (mop2t == OP_CL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_CL; + iop[1].size = 8; + } else if (mop2t == OP_I1) { + iop[1].type = UD_OP_CONST; + u->operand[1].lval.udword = 1; + } else if (mop2t == OP_I) { + decode_imm(u, mop2s, &(iop[1])); + } + } + break; + + /* G, E/PR[,I]/VR */ + case OP_G : + if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_GPR); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + } else if (mop2t == OP_W) + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR); + break; + + /* AL..BH, I/O/DX */ + case OP_AL : case OP_CL : case OP_DL : case OP_BL : + case OP_AH : case OP_CH : case OP_DH : case OP_BH : + + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AL + (mop1t - OP_AL); + iop[0].size = 8; + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } + else if (mop2t == OP_O) + decode_o(u, mop2s, &(iop[1])); + break; + + /* rAX[r8]..rDI[r15], I/rAX..rDI/O */ + case OP_rAXr8 : case OP_rCXr9 : case OP_rDXr10 : case OP_rBXr11 : + case OP_rSPr12: case OP_rBPr13: case OP_rSIr14 : case OP_rDIr15 : + case OP_rAX : case OP_rCX : case OP_rDX : case OP_rBX : + case OP_rSP : case OP_rBP : case OP_rSI : case OP_rDI : + + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr64(u, mop1t); + + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t >= OP_rAX && mop2t <= OP_rDI) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr64(u, mop2t); + } + else if (mop2t == OP_O) { + decode_o(u, mop2s, &(iop[1])); + iop[0].size = resolve_operand_size(u, mop2s); + } + break; + + /* AL[r8b]..BH[r15b], I */ + case OP_ALr8b : case OP_CLr9b : case OP_DLr10b : case OP_BLr11b : + case OP_AHr12b: case OP_CHr13b: case OP_DHr14b : case OP_BHr15b : + { + ud_type_t gpr = (mop1t - OP_ALr8b) + UD_R_AL + + (REX_B(u->pfx_rex) << 3); + if (UD_R_AH <= gpr && u->pfx_rex) + gpr = gpr + 4; + iop[0].type = UD_OP_REG; + iop[0].base = gpr; + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + } + + /* eAX..eDX, DX/I */ + case OP_eAX : case OP_eCX : case OP_eDX : case OP_eBX : + case OP_eSP : case OP_eBP : case OP_eSI : case OP_eDI : + iop[0].type = UD_OP_REG; + iop[0].base = resolve_gpr32(u, mop1t); + if (mop2t == OP_DX) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_DX; + iop[1].size = 16; + } else if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* ES..GS */ + case OP_ES : case OP_CS : case OP_DS : + case OP_SS : case OP_FS : case OP_GS : + + /* in 64bits mode, only fs and gs are allowed */ + if (u->dis_mode == 64) + if (mop1t != OP_FS && mop1t != OP_GS) + u->error= 1; + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t - OP_ES) + UD_R_ES; + iop[0].size = 16; + + break; + + /* J */ + case OP_J : + decode_imm(u, mop1s, &(iop[0])); + iop[0].type = UD_OP_JIMM; + break ; + + /* PR, I */ + case OP_PR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_MMX, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* VR, I */ + case OP_VR: + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[0]), mop1s, T_XMM, NULL, 0, T_NONE); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + break; + + /* P, Q[,I]/W/E[,I],VR */ + case OP_P : + if (mop2t == OP_Q) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_W) { + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_VR) { + if (MODRM_MOD(inp_peek(u)) != 3) + u->error = 1; + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_MMX); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } + break; + + /* R, C/D */ + case OP_R : + if (mop2t == OP_C) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_CRG); + else if (mop2t == OP_D) + decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_DBG); + break; + + /* C, R */ + case OP_C : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_CRG); + break; + + /* D, R */ + case OP_D : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_DBG); + break; + + /* Q, P */ + case OP_Q : + decode_modrm(u, &(iop[0]), mop1s, T_MMX, &(iop[1]), mop2s, T_MMX); + break; + + /* S, E */ + case OP_S : + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_SEG); + break; + + /* W, V */ + case OP_W : + decode_modrm(u, &(iop[0]), mop1s, T_XMM, &(iop[1]), mop2s, T_XMM); + break; + + /* V, W[,I]/Q/M/E */ + case OP_V : + if (mop2t == OP_W) { + /* special cases for movlps and movhps */ + if (MODRM_MOD(inp_peek(u)) == 3) { + if (u->mnemonic == UD_Imovlps) + u->mnemonic = UD_Imovhlps; + else + if (u->mnemonic == UD_Imovhps) + u->mnemonic = UD_Imovlhps; + } + decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_XMM); + if (mop3t == OP_I) + decode_imm(u, mop3s, &(iop[2])); + } else if (mop2t == OP_Q) + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + else if (mop2t == OP_M) { + if (MODRM_MOD(inp_peek(u)) == 3) + u->error= 1; + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_E) { + decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM); + } else if (mop2t == OP_PR) { + decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM); + } + break; + + /* DX, eAX/AL */ + case OP_DX : + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_DX; + iop[0].size = 16; + + if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 8; + } + + break; + + /* I, I/AL/eAX */ + case OP_I : + decode_imm(u, mop1s, &(iop[0])); + if (mop2t == OP_I) + decode_imm(u, mop2s, &(iop[1])); + else if (mop2t == OP_AL) { + iop[1].type = UD_OP_REG; + iop[1].base = UD_R_AL; + iop[1].size = 16; + } else if (mop2t == OP_eAX) { + iop[1].type = UD_OP_REG; + iop[1].base = resolve_gpr32(u, mop2t); + } + break; + + /* O, AL/eAX */ + case OP_O : + decode_o(u, mop1s, &(iop[0])); + iop[1].type = UD_OP_REG; + iop[1].size = resolve_operand_size(u, mop1s); + if (mop2t == OP_AL) + iop[1].base = UD_R_AL; + else if (mop2t == OP_eAX) + iop[1].base = resolve_gpr32(u, mop2t); + else if (mop2t == OP_rAX) + iop[1].base = resolve_gpr64(u, mop2t); + break; + + /* 3 */ + case OP_I3 : + iop[0].type = UD_OP_CONST; + iop[0].lval.sbyte = 3; + break; + + /* ST(n), ST(n) */ + case OP_ST0 : case OP_ST1 : case OP_ST2 : case OP_ST3 : + case OP_ST4 : case OP_ST5 : case OP_ST6 : case OP_ST7 : + + iop[0].type = UD_OP_REG; + iop[0].base = (mop1t-OP_ST0) + UD_R_ST0; + iop[0].size = 0; + + if (mop2t >= OP_ST0 && mop2t <= OP_ST7) { + iop[1].type = UD_OP_REG; + iop[1].base = (mop2t-OP_ST0) + UD_R_ST0; + iop[1].size = 0; + } + break; + + /* AX */ + case OP_AX: + iop[0].type = UD_OP_REG; + iop[0].base = UD_R_AX; + iop[0].size = 16; + break; + + /* none */ + default : + iop[0].type = iop[1].type = iop[2].type = UD_NONE; + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * clear_insn() - clear instruction pointer + * ----------------------------------------------------------------------------- + */ +static int clear_insn(register struct ud* u) +{ + u->error = 0; + u->pfx_seg = 0; + u->pfx_opr = 0; + u->pfx_adr = 0; + u->pfx_lock = 0; + u->pfx_repne = 0; + u->pfx_rep = 0; + u->pfx_repe = 0; + u->pfx_seg = 0; + u->pfx_rex = 0; + u->pfx_insn = 0; + u->mnemonic = UD_Inone; + u->itab_entry = NULL; + + memset( &u->operand[ 0 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 1 ], 0, sizeof( struct ud_operand ) ); + memset( &u->operand[ 2 ], 0, sizeof( struct ud_operand ) ); + + return 0; +} + +static int do_mode( struct ud* u ) +{ + /* if in error state, bail out */ + if ( u->error ) return -1; + + /* propagate perfix effects */ + if ( u->dis_mode == 64 ) { /* set 64bit-mode flags */ + + /* Check validity of instruction m64 */ + if ( P_INV64( u->itab_entry->prefix ) ) { + u->error = 1; + return -1; + } + + /* effective rex prefix is the effective mask for the + * instruction hard-coded in the opcode map. + */ + u->pfx_rex = ( u->pfx_rex & 0x40 ) | + ( u->pfx_rex & REX_PFX_MASK( u->itab_entry->prefix ) ); + + /* whether this instruction has a default operand size of + * 64bit, also hardcoded into the opcode map. + */ + u->default64 = P_DEF64( u->itab_entry->prefix ); + /* calculate effective operand size */ + if ( REX_W( u->pfx_rex ) ) { + u->opr_mode = 64; + } else if ( u->pfx_opr ) { + u->opr_mode = 16; + } else { + /* unless the default opr size of instruction is 64, + * the effective operand size in the absence of rex.w + * prefix is 32. + */ + u->opr_mode = ( u->default64 ) ? 64 : 32; + } + + /* calculate effective address size */ + u->adr_mode = (u->pfx_adr) ? 32 : 64; + } else if ( u->dis_mode == 32 ) { /* set 32bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 16 : 32; + u->adr_mode = ( u->pfx_adr ) ? 16 : 32; + } else if ( u->dis_mode == 16 ) { /* set 16bit-mode flags */ + u->opr_mode = ( u->pfx_opr ) ? 32 : 16; + u->adr_mode = ( u->pfx_adr ) ? 32 : 16; + } + + /* These flags determine which operand to apply the operand size + * cast to. + */ + u->c1 = ( P_C1( u->itab_entry->prefix ) ) ? 1 : 0; + u->c2 = ( P_C2( u->itab_entry->prefix ) ) ? 1 : 0; + u->c3 = ( P_C3( u->itab_entry->prefix ) ) ? 1 : 0; + + /* set flags for implicit addressing */ + u->implicit_addr = P_IMPADDR( u->itab_entry->prefix ); + + return 0; +} + +static int gen_hex( struct ud *u ) +{ + unsigned int i; + unsigned char *src_ptr = inp_sess( u ); + char* src_hex; + + /* bail out if in error stat. */ + if ( u->error ) return -1; + /* output buffer pointe */ + src_hex = ( char* ) u->insn_hexcode; + /* for each byte used to decode instruction */ + for ( i = 0; i < u->inp_ctr; ++i, ++src_ptr) { + snprintf( src_hex, 2, "%02x", *src_ptr & 0xFF ); + src_hex += 2; + } + return 0; +} + +/* ============================================================================= + * ud_decode() - Instruction decoder. Returns the number of bytes decoded. + * ============================================================================= + */ +unsigned int ud_decode( struct ud* u ) +{ + inp_start(u); + + if ( clear_insn( u ) ) { + ; /* error */ + } else if ( get_prefixes( u ) != 0 ) { + ; /* error */ + } else if ( search_itab( u ) != 0 ) { + ; /* error */ + } else if ( do_mode( u ) != 0 ) { + ; /* error */ + } else if ( disasm_operands( u ) != 0 ) { + ; /* error */ + } else if ( resolve_mnemonic( u ) != 0 ) { + ; /* error */ + } + + /* Handle decode error. */ + if ( u->error ) { + /* clear out the decode data. */ + clear_insn( u ); + /* mark the sequence of bytes as invalid. */ + u->itab_entry = & ie_invalid; + u->mnemonic = u->itab_entry->mnemonic; + } + + u->insn_offset = u->pc; /* set offset of instruction */ + u->insn_fill = 0; /* set translation buffer index to 0 */ + u->pc += u->inp_ctr; /* move program counter by bytes decoded */ + gen_hex( u ); /* generate hex code */ + + /* return number of bytes disassembled. */ + return u->inp_ctr; +} + +/* vim:cindent + * vim:ts=4 + * vim:sw=4 + * vim:expandtab + */ diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/decode.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/decode.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,273 @@ +#ifndef UD_DECODE_H +#define UD_DECODE_H + +#define MAX_INSN_LENGTH 15 + +/* register classes */ +#define T_NONE 0 +#define T_GPR 1 +#define T_MMX 2 +#define T_CRG 3 +#define T_DBG 4 +#define T_SEG 5 +#define T_XMM 6 + +/* itab prefix bits */ +#define P_none ( 0 ) +#define P_c1 ( 1 << 0 ) +#define P_C1(n) ( ( n >> 0 ) & 1 ) +#define P_rexb ( 1 << 1 ) +#define P_REXB(n) ( ( n >> 1 ) & 1 ) +#define P_depM ( 1 << 2 ) +#define P_DEPM(n) ( ( n >> 2 ) & 1 ) +#define P_c3 ( 1 << 3 ) +#define P_C3(n) ( ( n >> 3 ) & 1 ) +#define P_inv64 ( 1 << 4 ) +#define P_INV64(n) ( ( n >> 4 ) & 1 ) +#define P_rexw ( 1 << 5 ) +#define P_REXW(n) ( ( n >> 5 ) & 1 ) +#define P_c2 ( 1 << 6 ) +#define P_C2(n) ( ( n >> 6 ) & 1 ) +#define P_def64 ( 1 << 7 ) +#define P_DEF64(n) ( ( n >> 7 ) & 1 ) +#define P_rexr ( 1 << 8 ) +#define P_REXR(n) ( ( n >> 8 ) & 1 ) +#define P_oso ( 1 << 9 ) +#define P_OSO(n) ( ( n >> 9 ) & 1 ) +#define P_aso ( 1 << 10 ) +#define P_ASO(n) ( ( n >> 10 ) & 1 ) +#define P_rexx ( 1 << 11 ) +#define P_REXX(n) ( ( n >> 11 ) & 1 ) +#define P_ImpAddr ( 1 << 12 ) +#define P_IMPADDR(n) ( ( n >> 12 ) & 1 ) + +/* rex prefix bits */ +#define REX_W(r) ( ( 0xF & ( r ) ) >> 3 ) +#define REX_R(r) ( ( 0x7 & ( r ) ) >> 2 ) +#define REX_X(r) ( ( 0x3 & ( r ) ) >> 1 ) +#define REX_B(r) ( ( 0x1 & ( r ) ) >> 0 ) +#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \ + ( P_REXR(n) << 2 ) | \ + ( P_REXX(n) << 1 ) | \ + ( P_REXB(n) << 0 ) ) + +/* scable-index-base bits */ +#define SIB_S(b) ( ( b ) >> 6 ) +#define SIB_I(b) ( ( ( b ) >> 3 ) & 7 ) +#define SIB_B(b) ( ( b ) & 7 ) + +/* modrm bits */ +#define MODRM_REG(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_NNN(b) ( ( ( b ) >> 3 ) & 7 ) +#define MODRM_MOD(b) ( ( ( b ) >> 6 ) & 3 ) +#define MODRM_RM(b) ( ( b ) & 7 ) + +/* operand type constants -- order is important! */ + +enum ud_operand_code { + OP_NONE, + + OP_A, OP_E, OP_M, OP_G, + OP_I, + + OP_AL, OP_CL, OP_DL, OP_BL, + OP_AH, OP_CH, OP_DH, OP_BH, + + OP_ALr8b, OP_CLr9b, OP_DLr10b, OP_BLr11b, + OP_AHr12b, OP_CHr13b, OP_DHr14b, OP_BHr15b, + + OP_AX, OP_CX, OP_DX, OP_BX, + OP_SI, OP_DI, OP_SP, OP_BP, + + OP_rAX, OP_rCX, OP_rDX, OP_rBX, + OP_rSP, OP_rBP, OP_rSI, OP_rDI, + + OP_rAXr8, OP_rCXr9, OP_rDXr10, OP_rBXr11, + OP_rSPr12, OP_rBPr13, OP_rSIr14, OP_rDIr15, + + OP_eAX, OP_eCX, OP_eDX, OP_eBX, + OP_eSP, OP_eBP, OP_eSI, OP_eDI, + + OP_ES, OP_CS, OP_SS, OP_DS, + OP_FS, OP_GS, + + OP_ST0, OP_ST1, OP_ST2, OP_ST3, + OP_ST4, OP_ST5, OP_ST6, OP_ST7, + + OP_J, OP_S, OP_O, + OP_I1, OP_I3, + + OP_V, OP_W, OP_Q, OP_P, + + OP_R, OP_C, OP_D, OP_VR, OP_PR +}; + + +/* operand size constants */ + +enum ud_operand_size { + SZ_NA = 0, + SZ_Z = 1, + SZ_V = 2, + SZ_P = 3, + SZ_WP = 4, + SZ_DP = 5, + SZ_MDQ = 6, + SZ_RDQ = 7, + + /* the following values are used as is, + * and thus hard-coded. changing them + * will break internals + */ + SZ_B = 8, + SZ_W = 16, + SZ_D = 32, + SZ_Q = 64, + SZ_T = 80, +}; + +/* itab entry operand definitions */ + +#define O_rSPr12 { OP_rSPr12, SZ_NA } +#define O_BL { OP_BL, SZ_NA } +#define O_BH { OP_BH, SZ_NA } +#define O_BP { OP_BP, SZ_NA } +#define O_AHr12b { OP_AHr12b, SZ_NA } +#define O_BX { OP_BX, SZ_NA } +#define O_Jz { OP_J, SZ_Z } +#define O_Jv { OP_J, SZ_V } +#define O_Jb { OP_J, SZ_B } +#define O_rSIr14 { OP_rSIr14, SZ_NA } +#define O_GS { OP_GS, SZ_NA } +#define O_D { OP_D, SZ_NA } +#define O_rBPr13 { OP_rBPr13, SZ_NA } +#define O_Ob { OP_O, SZ_B } +#define O_P { OP_P, SZ_NA } +#define O_Ow { OP_O, SZ_W } +#define O_Ov { OP_O, SZ_V } +#define O_Gw { OP_G, SZ_W } +#define O_Gv { OP_G, SZ_V } +#define O_rDX { OP_rDX, SZ_NA } +#define O_Gx { OP_G, SZ_MDQ } +#define O_Gd { OP_G, SZ_D } +#define O_Gb { OP_G, SZ_B } +#define O_rBXr11 { OP_rBXr11, SZ_NA } +#define O_rDI { OP_rDI, SZ_NA } +#define O_rSI { OP_rSI, SZ_NA } +#define O_ALr8b { OP_ALr8b, SZ_NA } +#define O_eDI { OP_eDI, SZ_NA } +#define O_Gz { OP_G, SZ_Z } +#define O_eDX { OP_eDX, SZ_NA } +#define O_DHr14b { OP_DHr14b, SZ_NA } +#define O_rSP { OP_rSP, SZ_NA } +#define O_PR { OP_PR, SZ_NA } +#define O_NONE { OP_NONE, SZ_NA } +#define O_rCX { OP_rCX, SZ_NA } +#define O_jWP { OP_J, SZ_WP } +#define O_rDXr10 { OP_rDXr10, SZ_NA } +#define O_Md { OP_M, SZ_D } +#define O_C { OP_C, SZ_NA } +#define O_G { OP_G, SZ_NA } +#define O_Mb { OP_M, SZ_B } +#define O_Mt { OP_M, SZ_T } +#define O_S { OP_S, SZ_NA } +#define O_Mq { OP_M, SZ_Q } +#define O_W { OP_W, SZ_NA } +#define O_ES { OP_ES, SZ_NA } +#define O_rBX { OP_rBX, SZ_NA } +#define O_Ed { OP_E, SZ_D } +#define O_DLr10b { OP_DLr10b, SZ_NA } +#define O_Mw { OP_M, SZ_W } +#define O_Eb { OP_E, SZ_B } +#define O_Ex { OP_E, SZ_MDQ } +#define O_Ez { OP_E, SZ_Z } +#define O_Ew { OP_E, SZ_W } +#define O_Ev { OP_E, SZ_V } +#define O_Ep { OP_E, SZ_P } +#define O_FS { OP_FS, SZ_NA } +#define O_Ms { OP_M, SZ_W } +#define O_rAXr8 { OP_rAXr8, SZ_NA } +#define O_eBP { OP_eBP, SZ_NA } +#define O_Isb { OP_I, SZ_SB } +#define O_eBX { OP_eBX, SZ_NA } +#define O_rCXr9 { OP_rCXr9, SZ_NA } +#define O_jDP { OP_J, SZ_DP } +#define O_CH { OP_CH, SZ_NA } +#define O_CL { OP_CL, SZ_NA } +#define O_R { OP_R, SZ_RDQ } +#define O_V { OP_V, SZ_NA } +#define O_CS { OP_CS, SZ_NA } +#define O_CHr13b { OP_CHr13b, SZ_NA } +#define O_eCX { OP_eCX, SZ_NA } +#define O_eSP { OP_eSP, SZ_NA } +#define O_SS { OP_SS, SZ_NA } +#define O_SP { OP_SP, SZ_NA } +#define O_BLr11b { OP_BLr11b, SZ_NA } +#define O_SI { OP_SI, SZ_NA } +#define O_eSI { OP_eSI, SZ_NA } +#define O_DL { OP_DL, SZ_NA } +#define O_DH { OP_DH, SZ_NA } +#define O_DI { OP_DI, SZ_NA } +#define O_DX { OP_DX, SZ_NA } +#define O_rBP { OP_rBP, SZ_NA } +#define O_Gvw { OP_G, SZ_MDQ } +#define O_I1 { OP_I1, SZ_NA } +#define O_I3 { OP_I3, SZ_NA } +#define O_DS { OP_DS, SZ_NA } +#define O_ST4 { OP_ST4, SZ_NA } +#define O_ST5 { OP_ST5, SZ_NA } +#define O_ST6 { OP_ST6, SZ_NA } +#define O_ST7 { OP_ST7, SZ_NA } +#define O_ST0 { OP_ST0, SZ_NA } +#define O_ST1 { OP_ST1, SZ_NA } +#define O_ST2 { OP_ST2, SZ_NA } +#define O_ST3 { OP_ST3, SZ_NA } +#define O_E { OP_E, SZ_NA } +#define O_AH { OP_AH, SZ_NA } +#define O_M { OP_M, SZ_NA } +#define O_AL { OP_AL, SZ_NA } +#define O_CLr9b { OP_CLr9b, SZ_NA } +#define O_Q { OP_Q, SZ_NA } +#define O_eAX { OP_eAX, SZ_NA } +#define O_VR { OP_VR, SZ_NA } +#define O_AX { OP_AX, SZ_NA } +#define O_rAX { OP_rAX, SZ_NA } +#define O_Iz { OP_I, SZ_Z } +#define O_rDIr15 { OP_rDIr15, SZ_NA } +#define O_Iw { OP_I, SZ_W } +#define O_Iv { OP_I, SZ_V } +#define O_Ap { OP_A, SZ_P } +#define O_CX { OP_CX, SZ_NA } +#define O_Ib { OP_I, SZ_B } +#define O_BHr15b { OP_BHr15b, SZ_NA } + + +/* A single operand of an entry in the instruction table. + * (internal use only) + */ +struct ud_itab_entry_operand +{ + enum ud_operand_code type; + enum ud_operand_size size; +}; + + +/* A single entry in an instruction table. + *(internal use only) + */ +struct ud_itab_entry +{ + enum ud_mnemonic_code mnemonic; + struct ud_itab_entry_operand operand1; + struct ud_itab_entry_operand operand2; + struct ud_itab_entry_operand operand3; + uint32_t prefix; +}; + +#endif /* UD_DECODE_H */ + +/* vim:cindent + * vim:expandtab + * vim:ts=4 + * vim:sw=4 + */ diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/extern.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/extern.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,67 @@ +/* ----------------------------------------------------------------------------- + * extern.h + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_EXTERN_H +#define UD_EXTERN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* #include */ +#include "types.h" + +/* ============================= PUBLIC API ================================= */ + +extern void ud_init(struct ud*); + +extern void ud_set_mode(struct ud*, uint8_t); + +extern void ud_set_pc(struct ud*, uint64_t); + +extern void ud_set_input_hook(struct ud*, int (*)(struct ud*)); + +extern void ud_set_input_buffer(struct ud*, uint8_t*, size_t); + +#ifndef __UD_STANDALONE__ +extern void ud_set_input_file(struct ud*, FILE*); +#endif /* __UD_STANDALONE__ */ + +extern void ud_set_vendor(struct ud*, unsigned); + +extern void ud_set_syntax(struct ud*, void (*)(struct ud*)); + +extern void ud_input_skip(struct ud*, size_t); + +extern int ud_input_end(struct ud*); + +extern unsigned int ud_decode(struct ud*); + +extern unsigned int ud_disassemble(struct ud*); + +extern void ud_translate_intel(struct ud*); + +extern void ud_translate_att(struct ud*); + +extern char* ud_insn_asm(struct ud* u); + +extern uint8_t* ud_insn_ptr(struct ud* u); + +extern uint64_t ud_insn_off(struct ud*); + +extern char* ud_insn_hex(struct ud*); + +extern unsigned int ud_insn_len(struct ud* u); + +extern const char* ud_lookup_mnemonic(enum ud_mnemonic_code c); + +/* ========================================================================== */ + +#ifdef __cplusplus +} +#endif +#endif diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/input.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,226 @@ +/* ----------------------------------------------------------------------------- + * input.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#include "extern.h" +#include "types.h" +#include "input.h" + +/* ----------------------------------------------------------------------------- + * inp_buff_hook() - Hook for buffered inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_buff_hook(struct ud* u) +{ + if (u->inp_buff < u->inp_buff_end) + return *u->inp_buff++; + else return -1; +} + +#ifndef __UD_STANDALONE__ +/* ----------------------------------------------------------------------------- + * inp_file_hook() - Hook for FILE inputs. + * ----------------------------------------------------------------------------- + */ +static int +inp_file_hook(struct ud* u) +{ + return fgetc(u->inp_file); +} +#endif /* __UD_STANDALONE__*/ + +/* ============================================================================= + * ud_inp_set_hook() - Sets input hook. + * ============================================================================= + */ +extern void +ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*)) +{ + u->inp_hook = hook; + inp_init(u); +} + +/* ============================================================================= + * ud_inp_set_buffer() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_buffer(register struct ud* u, uint8_t* buf, size_t len) +{ + u->inp_hook = inp_buff_hook; + u->inp_buff = buf; + u->inp_buff_end = buf + len; + inp_init(u); +} + +#ifndef __UD_STANDALONE__ +/* ============================================================================= + * ud_input_set_file() - Set buffer as input. + * ============================================================================= + */ +extern void +ud_set_input_file(register struct ud* u, FILE* f) +{ + u->inp_hook = inp_file_hook; + u->inp_file = f; + inp_init(u); +} +#endif /* __UD_STANDALONE__ */ + +/* ============================================================================= + * ud_input_skip() - Skip n input bytes. + * ============================================================================= + */ +extern void +ud_input_skip(struct ud* u, size_t n) +{ + while (n--) { + u->inp_hook(u); + } +} + +/* ============================================================================= + * ud_input_end() - Test for end of input. + * ============================================================================= + */ +extern int +ud_input_end(struct ud* u) +{ + return (u->inp_curr == u->inp_fill) && u->inp_end; +} + +/* ----------------------------------------------------------------------------- + * inp_next() - Loads and returns the next byte from input. + * + * inp_curr and inp_fill are pointers to the cache. The program is written based + * on the property that they are 8-bits in size, and will eventually wrap around + * forming a circular buffer. So, the size of the cache is 256 in size, kind of + * unnecessary yet optimized. + * + * A buffer inp_sess stores the bytes disassembled for a single session. + * ----------------------------------------------------------------------------- + */ +extern uint8_t inp_next(struct ud* u) +{ + int c = -1; + /* if current pointer is not upto the fill point in the + * input cache. + */ + if ( u->inp_curr != u->inp_fill ) { + c = u->inp_cache[ ++u->inp_curr ]; + /* if !end-of-input, call the input hook and get a byte */ + } else if ( u->inp_end || ( c = u->inp_hook( u ) ) == -1 ) { + /* end-of-input, mark it as an error, since the decoder, + * expected a byte more. + */ + u->error = 1; + /* flag end of input */ + u->inp_end = 1; + return 0; + } else { + /* increment pointers, we have a new byte. */ + u->inp_curr = ++u->inp_fill; + /* add the byte to the cache */ + u->inp_cache[ u->inp_fill ] = c; + } + /* record bytes input per decode-session. */ + u->inp_sess[ u->inp_ctr++ ] = c; + /* return byte */ + return ( uint8_t ) c; +} + +/* ----------------------------------------------------------------------------- + * inp_back() - Move back a single byte in the stream. + * ----------------------------------------------------------------------------- + */ +extern void +inp_back(struct ud* u) +{ + if ( u->inp_ctr > 0 ) { + --u->inp_curr; + --u->inp_ctr; + } +} + +/* ----------------------------------------------------------------------------- + * inp_peek() - Peek into the next byte in source. + * ----------------------------------------------------------------------------- + */ +extern uint8_t +inp_peek(struct ud* u) +{ + uint8_t r = inp_next(u); + if ( !u->error ) inp_back(u); /* Don't backup if there was an error */ + return r; +} + +/* ----------------------------------------------------------------------------- + * inp_move() - Move ahead n input bytes. + * ----------------------------------------------------------------------------- + */ +extern void +inp_move(struct ud* u, size_t n) +{ + while (n--) + inp_next(u); +} + +/*------------------------------------------------------------------------------ + * inp_uintN() - return uintN from source. + *------------------------------------------------------------------------------ + */ +extern uint8_t +inp_uint8(struct ud* u) +{ + return inp_next(u); +} + +extern uint16_t +inp_uint16(struct ud* u) +{ + uint16_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + return ret | (r << 8); +} + +extern uint32_t +inp_uint32(struct ud* u) +{ + uint32_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + return ret | (r << 24); +} + +extern uint64_t +inp_uint64(struct ud* u) +{ + uint64_t r, ret; + + ret = inp_next(u); + r = inp_next(u); + ret = ret | (r << 8); + r = inp_next(u); + ret = ret | (r << 16); + r = inp_next(u); + ret = ret | (r << 24); + r = inp_next(u); + ret = ret | (r << 32); + r = inp_next(u); + ret = ret | (r << 40); + r = inp_next(u); + ret = ret | (r << 48); + r = inp_next(u); + return ret | (r << 56); +} diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/input.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/input.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,49 @@ +/* ----------------------------------------------------------------------------- + * input.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_INPUT_H +#define UD_INPUT_H + +#include "types.h" + +uint8_t inp_next(struct ud*); +uint8_t inp_peek(struct ud*); +uint8_t inp_uint8(struct ud*); +uint16_t inp_uint16(struct ud*); +uint32_t inp_uint32(struct ud*); +uint64_t inp_uint64(struct ud*); +void inp_move(struct ud*, size_t); +void inp_back(struct ud*); + +/* inp_init() - Initializes the input system. */ +#define inp_init(u) \ +do { \ + u->inp_curr = 0; \ + u->inp_fill = 0; \ + u->inp_ctr = 0; \ + u->inp_end = 0; \ +} while (0) + +/* inp_start() - Should be called before each de-code operation. */ +#define inp_start(u) u->inp_ctr = 0 + +/* inp_back() - Resets the current pointer to its position before the current + * instruction disassembly was started. + */ +#define inp_reset(u) \ +do { \ + u->inp_curr -= u->inp_ctr; \ + u->inp_ctr = 0; \ +} while (0) + +/* inp_sess() - Returns the pointer to current session. */ +#define inp_sess(u) (u->inp_sess) + +/* inp_cur() - Returns the current input byte. */ +#define inp_curr(u) ((u)->inp_cache[(u)->inp_curr]) + +#endif diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/itab.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,3668 @@ + +/* itab.c -- auto generated by opgen.py, do not edit. */ + +#include "types.h" +#include "decode.h" +#include "itab.h" + +const char * ud_mnemonics_str[] = { + "3dnow", + "aaa", + "aad", + "aam", + "aas", + "adc", + "add", + "addpd", + "addps", + "addsd", + "addss", + "addsubpd", + "addsubps", + "and", + "andpd", + "andps", + "andnpd", + "andnps", + "arpl", + "movsxd", + "bound", + "bsf", + "bsr", + "bswap", + "bt", + "btc", + "btr", + "bts", + "call", + "cbw", + "cwde", + "cdqe", + "clc", + "cld", + "clflush", + "clgi", + "cli", + "clts", + "cmc", + "cmovo", + "cmovno", + "cmovb", + "cmovae", + "cmovz", + "cmovnz", + "cmovbe", + "cmova", + "cmovs", + "cmovns", + "cmovp", + "cmovnp", + "cmovl", + "cmovge", + "cmovle", + "cmovg", + "cmp", + "cmppd", + "cmpps", + "cmpsb", + "cmpsw", + "cmpsd", + "cmpsq", + "cmpss", + "cmpxchg", + "cmpxchg8b", + "comisd", + "comiss", + "cpuid", + "cvtdq2pd", + "cvtdq2ps", + "cvtpd2dq", + "cvtpd2pi", + "cvtpd2ps", + "cvtpi2ps", + "cvtpi2pd", + "cvtps2dq", + "cvtps2pi", + "cvtps2pd", + "cvtsd2si", + "cvtsd2ss", + "cvtsi2ss", + "cvtss2si", + "cvtss2sd", + "cvttpd2pi", + "cvttpd2dq", + "cvttps2dq", + "cvttps2pi", + "cvttsd2si", + "cvtsi2sd", + "cvttss2si", + "cwd", + "cdq", + "cqo", + "daa", + "das", + "dec", + "div", + "divpd", + "divps", + "divsd", + "divss", + "emms", + "enter", + "f2xm1", + "fabs", + "fadd", + "faddp", + "fbld", + "fbstp", + "fchs", + "fclex", + "fcmovb", + "fcmove", + "fcmovbe", + "fcmovu", + "fcmovnb", + "fcmovne", + "fcmovnbe", + "fcmovnu", + "fucomi", + "fcom", + "fcom2", + "fcomp3", + "fcomi", + "fucomip", + "fcomip", + "fcomp", + "fcomp5", + "fcompp", + "fcos", + "fdecstp", + "fdiv", + "fdivp", + "fdivr", + "fdivrp", + "femms", + "ffree", + "ffreep", + "ficom", + "ficomp", + "fild", + "fncstp", + "fninit", + "fiadd", + "fidivr", + "fidiv", + "fisub", + "fisubr", + "fist", + "fistp", + "fisttp", + "fld", + "fld1", + "fldl2t", + "fldl2e", + "fldlpi", + "fldlg2", + "fldln2", + "fldz", + "fldcw", + "fldenv", + "fmul", + "fmulp", + "fimul", + "fnop", + "fpatan", + "fprem", + "fprem1", + "fptan", + "frndint", + "frstor", + "fnsave", + "fscale", + "fsin", + "fsincos", + "fsqrt", + "fstp", + "fstp1", + "fstp8", + "fstp9", + "fst", + "fnstcw", + "fnstenv", + "fnstsw", + "fsub", + "fsubp", + "fsubr", + "fsubrp", + "ftst", + "fucom", + "fucomp", + "fucompp", + "fxam", + "fxch", + "fxch4", + "fxch7", + "fxrstor", + "fxsave", + "fpxtract", + "fyl2x", + "fyl2xp1", + "haddpd", + "haddps", + "hlt", + "hsubpd", + "hsubps", + "idiv", + "in", + "imul", + "inc", + "insb", + "insw", + "insd", + "int1", + "int3", + "int", + "into", + "invd", + "invlpg", + "invlpga", + "iretw", + "iretd", + "iretq", + "jo", + "jno", + "jb", + "jae", + "jz", + "jnz", + "jbe", + "ja", + "js", + "jns", + "jp", + "jnp", + "jl", + "jge", + "jle", + "jg", + "jcxz", + "jecxz", + "jrcxz", + "jmp", + "lahf", + "lar", + "lddqu", + "ldmxcsr", + "lds", + "lea", + "les", + "lfs", + "lgs", + "lidt", + "lss", + "leave", + "lfence", + "lgdt", + "lldt", + "lmsw", + "lock", + "lodsb", + "lodsw", + "lodsd", + "lodsq", + "loopnz", + "loope", + "loop", + "lsl", + "ltr", + "maskmovq", + "maxpd", + "maxps", + "maxsd", + "maxss", + "mfence", + "minpd", + "minps", + "minsd", + "minss", + "monitor", + "mov", + "movapd", + "movaps", + "movd", + "movddup", + "movdqa", + "movdqu", + "movdq2q", + "movhpd", + "movhps", + "movlhps", + "movlpd", + "movlps", + "movhlps", + "movmskpd", + "movmskps", + "movntdq", + "movnti", + "movntpd", + "movntps", + "movntq", + "movq", + "movqa", + "movq2dq", + "movsb", + "movsw", + "movsd", + "movsq", + "movsldup", + "movshdup", + "movss", + "movsx", + "movupd", + "movups", + "movzx", + "mul", + "mulpd", + "mulps", + "mulsd", + "mulss", + "mwait", + "neg", + "nop", + "not", + "or", + "orpd", + "orps", + "out", + "outsb", + "outsw", + "outsd", + "outsq", + "packsswb", + "packssdw", + "packuswb", + "paddb", + "paddw", + "paddq", + "paddsb", + "paddsw", + "paddusb", + "paddusw", + "pand", + "pandn", + "pause", + "pavgb", + "pavgw", + "pcmpeqb", + "pcmpeqw", + "pcmpeqd", + "pcmpgtb", + "pcmpgtw", + "pcmpgtd", + "pextrw", + "pinsrw", + "pmaddwd", + "pmaxsw", + "pmaxub", + "pminsw", + "pminub", + "pmovmskb", + "pmulhuw", + "pmulhw", + "pmullw", + "pmuludq", + "pop", + "popa", + "popad", + "popfw", + "popfd", + "popfq", + "por", + "prefetch", + "prefetchnta", + "prefetcht0", + "prefetcht1", + "prefetcht2", + "psadbw", + "pshufd", + "pshufhw", + "pshuflw", + "pshufw", + "pslldq", + "psllw", + "pslld", + "psllq", + "psraw", + "psrad", + "psrlw", + "psrld", + "psrlq", + "psrldq", + "psubb", + "psubw", + "psubd", + "psubq", + "psubsb", + "psubsw", + "psubusb", + "psubusw", + "punpckhbw", + "punpckhwd", + "punpckhdq", + "punpckhqdq", + "punpcklbw", + "punpcklwd", + "punpckldq", + "punpcklqdq", + "pi2fw", + "pi2fd", + "pf2iw", + "pf2id", + "pfnacc", + "pfpnacc", + "pfcmpge", + "pfmin", + "pfrcp", + "pfrsqrt", + "pfsub", + "pfadd", + "pfcmpgt", + "pfmax", + "pfrcpit1", + "pfrspit1", + "pfsubr", + "pfacc", + "pfcmpeq", + "pfmul", + "pfrcpit2", + "pmulhrw", + "pswapd", + "pavgusb", + "push", + "pusha", + "pushad", + "pushfw", + "pushfd", + "pushfq", + "pxor", + "rcl", + "rcr", + "rol", + "ror", + "rcpps", + "rcpss", + "rdmsr", + "rdpmc", + "rdtsc", + "rdtscp", + "repne", + "rep", + "ret", + "retf", + "rsm", + "rsqrtps", + "rsqrtss", + "sahf", + "sal", + "salc", + "sar", + "shl", + "shr", + "sbb", + "scasb", + "scasw", + "scasd", + "scasq", + "seto", + "setno", + "setb", + "setnb", + "setz", + "setnz", + "setbe", + "seta", + "sets", + "setns", + "setp", + "setnp", + "setl", + "setge", + "setle", + "setg", + "sfence", + "sgdt", + "shld", + "shrd", + "shufpd", + "shufps", + "sidt", + "sldt", + "smsw", + "sqrtps", + "sqrtpd", + "sqrtsd", + "sqrtss", + "stc", + "std", + "stgi", + "sti", + "skinit", + "stmxcsr", + "stosb", + "stosw", + "stosd", + "stosq", + "str", + "sub", + "subpd", + "subps", + "subsd", + "subss", + "swapgs", + "syscall", + "sysenter", + "sysexit", + "sysret", + "test", + "ucomisd", + "ucomiss", + "ud2", + "unpckhpd", + "unpckhps", + "unpcklps", + "unpcklpd", + "verr", + "verw", + "vmcall", + "vmclear", + "vmxon", + "vmptrld", + "vmptrst", + "vmresume", + "vmxoff", + "vmrun", + "vmmcall", + "vmload", + "vmsave", + "wait", + "wbinvd", + "wrmsr", + "xadd", + "xchg", + "xlatb", + "xor", + "xorpd", + "xorps", + "db", + "invalid", +}; + + + +static struct ud_itab_entry itab__0f[256] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_00__REG }, + /* 01 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG }, + /* 02 */ { UD_Ilar, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ilsl, O_Gv, O_Ew, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isyscall, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iclts, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isysret, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iwbinvd, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iud2, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_0D__REG }, + /* 0E */ { UD_Ifemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovups, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovups, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_18__REG }, + /* 19 */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1D */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1E */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1F */ { UD_Inop, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 20 */ { UD_Imov, O_R, O_C, O_NONE, P_rexr }, + /* 21 */ { UD_Imov, O_R, O_D, O_NONE, P_rexr }, + /* 22 */ { UD_Imov, O_C, O_R, O_NONE, P_rexr }, + /* 23 */ { UD_Imov, O_D, O_R, O_NONE, P_rexr }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovaps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovaps, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2ps, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntps, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtps2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomiss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iwrmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Irdtsc, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Irdmsr, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Irdpmc, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Isysenter, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 35 */ { UD_Isysexit, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Icmovo, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 41 */ { UD_Icmovno, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 42 */ { UD_Icmovb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 43 */ { UD_Icmovae, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 44 */ { UD_Icmovz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 45 */ { UD_Icmovnz, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 46 */ { UD_Icmovbe, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 47 */ { UD_Icmova, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 48 */ { UD_Icmovs, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 49 */ { UD_Icmovns, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4A */ { UD_Icmovp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4B */ { UD_Icmovnp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4C */ { UD_Icmovl, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4D */ { UD_Icmovge, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4E */ { UD_Icmovle, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 4F */ { UD_Icmovg, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 50 */ { UD_Imovmskps, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iandps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtps2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtdq2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Imovd, O_P, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufw, O_P, O_Q, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iemms, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovd, O_Ex, O_P, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovq, O_Q, O_P, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Ijo, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 81 */ { UD_Ijno, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 82 */ { UD_Ijb, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 83 */ { UD_Ijae, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 84 */ { UD_Ijz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 85 */ { UD_Ijnz, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 86 */ { UD_Ijbe, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 87 */ { UD_Ija, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 88 */ { UD_Ijs, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 89 */ { UD_Ijns, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8A */ { UD_Ijp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8B */ { UD_Ijnp, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8C */ { UD_Ijl, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8D */ { UD_Ijge, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8E */ { UD_Ijle, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 8F */ { UD_Ijg, O_Jz, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_oso }, + /* 90 */ { UD_Iseto, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 91 */ { UD_Isetno, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 92 */ { UD_Isetb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 93 */ { UD_Isetnb, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 94 */ { UD_Isetz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 95 */ { UD_Isetnz, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 96 */ { UD_Isetbe, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 97 */ { UD_Iseta, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 98 */ { UD_Isets, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 99 */ { UD_Isetns, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9A */ { UD_Isetp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9B */ { UD_Isetnp, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9C */ { UD_Isetl, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9D */ { UD_Isetge, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9E */ { UD_Isetle, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 9F */ { UD_Isetg, O_Eb, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* A0 */ { UD_Ipush, O_FS, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Ipop, O_FS, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Icpuid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Ibt, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A4 */ { UD_Ishld, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A5 */ { UD_Ishld, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Ipush, O_GS, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Ipop, O_GS, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Irsm, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Ibts, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AC */ { UD_Ishrd, O_Ev, O_Gv, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AD */ { UD_Ishrd, O_Ev, O_Gv, O_CL, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* AE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG }, + /* AF */ { UD_Iimul, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B0 */ { UD_Icmpxchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* B1 */ { UD_Icmpxchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B2 */ { UD_Ilss, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B3 */ { UD_Ibtr, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B4 */ { UD_Ilfs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B5 */ { UD_Ilgs, O_Gz, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B6 */ { UD_Imovzx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B7 */ { UD_Imovzx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_BA__REG }, + /* BB */ { UD_Ibtc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BC */ { UD_Ibsf, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BD */ { UD_Ibsr, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BE */ { UD_Imovsx, O_Gv, O_Eb, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* BF */ { UD_Imovsx, O_Gv, O_Ew, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Imovnti, O_M, O_Gvw, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C4 */ { UD_Ipinsrw, O_P, O_Ew, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_PR, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C6 */ { UD_Ishufps, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG }, + /* C8 */ { UD_Ibswap, O_rAXr8, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* C9 */ { UD_Ibswap, O_rCXr9, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CA */ { UD_Ibswap, O_rDXr10, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CB */ { UD_Ibswap, O_rBXr11, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CC */ { UD_Ibswap, O_rSPr12, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CD */ { UD_Ibswap, O_rBPr13, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CE */ { UD_Ibswap, O_rSIr14, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* CF */ { UD_Ibswap, O_rDIr15, O_NONE, O_NONE, P_oso|P_rexw|P_rexb }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Ipsrlw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_PR, O_NONE, P_oso|P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipaddusb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipaddusw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Imovntq, O_M, O_P, O_NONE, P_none }, + /* E8 */ { UD_Ipsubsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_P, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_00__reg[8] = { + /* 00 */ { UD_Isldt, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Istr, O_Ev, O_NONE, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Illdt, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iltr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iverr, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iverw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg[8] = { + /* 00 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD }, + /* 01 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD }, + /* 02 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_02__MOD }, + /* 03 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD }, + /* 04 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_04__MOD }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod[2] = { + /* 00 */ { UD_Isgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmcall, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmresume, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxoff, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod[2] = { + /* 00 */ { UD_Isidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod__op_01__rm[8] = { + /* 00 */ { UD_Imonitor, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_02__mod[2] = { + /* 00 */ { UD_Ilgdt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod[2] = { + /* 00 */ { UD_Ilidt, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR }, + /* 03 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR }, + /* 04 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR }, + /* 05 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR }, + /* 06 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor[2] = { + /* 00 */ { UD_Ivmrun, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Ivmmcall, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor[2] = { + /* 00 */ { UD_Ivmload, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor[2] = { + /* 00 */ { UD_Ivmsave, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor[2] = { + /* 00 */ { UD_Istgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor[2] = { + /* 00 */ { UD_Iclgi, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor[2] = { + /* 00 */ { UD_Iskinit, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor[2] = { + /* 00 */ { UD_Iinvlpga, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_04__mod[2] = { + /* 00 */ { UD_Ismsw, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_06__mod[2] = { + /* 00 */ { UD_Ilmsw, O_Ew, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod[2] = { + /* 00 */ { UD_Iinvlpg, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Iswapgs, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor[2] = { + /* 00 */ { UD_Irdtscp, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_0d__reg[8] = { + /* 00 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iprefetch, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_18__reg[8] = { + /* 00 */ { UD_Iprefetchnta, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iprefetcht0, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iprefetcht1, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iprefetcht2, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_PR, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_PR, O_Ib, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_PR, O_Ib, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ildmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Istmxcsr, O_Md, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD }, + /* 06 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD }, + /* 07 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod__op_01__rm[8] = { + /* 00 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ilfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod__op_01__rm[8] = { + /* 00 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Imfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod[2] = { + /* 00 */ { UD_Iclflush, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Igrp_rm, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM }, +}; + +static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod__op_01__rm[8] = { + /* 00 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Isfence, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__0f__op_ba__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ibt, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ibts, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ibtr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ibtc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Icmpxchg8b, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrld, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmptrst, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__0F__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__0f__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifabs, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_If2xm1, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte[256] = { + /* 00 */ { UD_Iadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadd, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Iadd, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iadd, O_AL, O_Ib, O_NONE, P_none }, + /* 05 */ { UD_Iadd, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 06 */ { UD_Ipush, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 07 */ { UD_Ipop, O_ES, O_NONE, O_NONE, P_inv64|P_none }, + /* 08 */ { UD_Ior, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 09 */ { UD_Ior, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0A */ { UD_Ior, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 0B */ { UD_Ior, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 0C */ { UD_Ior, O_AL, O_Ib, O_NONE, P_none }, + /* 0D */ { UD_Ior, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 0E */ { UD_Ipush, O_CS, O_NONE, O_NONE, P_inv64|P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iadc, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Iadc, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Iadc, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iadc, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iadc, O_AL, O_Ib, O_NONE, P_none }, + /* 15 */ { UD_Iadc, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 16 */ { UD_Ipush, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 17 */ { UD_Ipop, O_SS, O_NONE, O_NONE, P_inv64|P_none }, + /* 18 */ { UD_Isbb, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 19 */ { UD_Isbb, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1A */ { UD_Isbb, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 1B */ { UD_Isbb, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 1C */ { UD_Isbb, O_AL, O_Ib, O_NONE, P_none }, + /* 1D */ { UD_Isbb, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 1E */ { UD_Ipush, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 1F */ { UD_Ipop, O_DS, O_NONE, O_NONE, P_inv64|P_none }, + /* 20 */ { UD_Iand, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 21 */ { UD_Iand, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 22 */ { UD_Iand, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 23 */ { UD_Iand, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 24 */ { UD_Iand, O_AL, O_Ib, O_NONE, P_none }, + /* 25 */ { UD_Iand, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Idaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 28 */ { UD_Isub, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Isub, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Isub, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Isub, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Isub, O_AL, O_Ib, O_NONE, P_none }, + /* 2D */ { UD_Isub, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Idas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 30 */ { UD_Ixor, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 31 */ { UD_Ixor, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 32 */ { UD_Ixor, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 33 */ { UD_Ixor, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 34 */ { UD_Ixor, O_AL, O_Ib, O_NONE, P_none }, + /* 35 */ { UD_Ixor, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iaaa, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 38 */ { UD_Icmp, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 39 */ { UD_Icmp, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3A */ { UD_Icmp, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 3B */ { UD_Icmp, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 3C */ { UD_Icmp, O_AL, O_Ib, O_NONE, P_none }, + /* 3D */ { UD_Icmp, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iaas, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* 40 */ { UD_Iinc, O_eAX, O_NONE, O_NONE, P_oso }, + /* 41 */ { UD_Iinc, O_eCX, O_NONE, O_NONE, P_oso }, + /* 42 */ { UD_Iinc, O_eDX, O_NONE, O_NONE, P_oso }, + /* 43 */ { UD_Iinc, O_eBX, O_NONE, O_NONE, P_oso }, + /* 44 */ { UD_Iinc, O_eSP, O_NONE, O_NONE, P_oso }, + /* 45 */ { UD_Iinc, O_eBP, O_NONE, O_NONE, P_oso }, + /* 46 */ { UD_Iinc, O_eSI, O_NONE, O_NONE, P_oso }, + /* 47 */ { UD_Iinc, O_eDI, O_NONE, O_NONE, P_oso }, + /* 48 */ { UD_Idec, O_eAX, O_NONE, O_NONE, P_oso }, + /* 49 */ { UD_Idec, O_eCX, O_NONE, O_NONE, P_oso }, + /* 4A */ { UD_Idec, O_eDX, O_NONE, O_NONE, P_oso }, + /* 4B */ { UD_Idec, O_eBX, O_NONE, O_NONE, P_oso }, + /* 4C */ { UD_Idec, O_eSP, O_NONE, O_NONE, P_oso }, + /* 4D */ { UD_Idec, O_eBP, O_NONE, O_NONE, P_oso }, + /* 4E */ { UD_Idec, O_eSI, O_NONE, O_NONE, P_oso }, + /* 4F */ { UD_Idec, O_eDI, O_NONE, O_NONE, P_oso }, + /* 50 */ { UD_Ipush, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 51 */ { UD_Ipush, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 52 */ { UD_Ipush, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 53 */ { UD_Ipush, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 54 */ { UD_Ipush, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 55 */ { UD_Ipush, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 56 */ { UD_Ipush, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 57 */ { UD_Ipush, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 58 */ { UD_Ipop, O_rAXr8, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 59 */ { UD_Ipop, O_rCXr9, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5A */ { UD_Ipop, O_rDXr10, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5B */ { UD_Ipop, O_rBXr11, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5C */ { UD_Ipop, O_rSPr12, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5D */ { UD_Ipop, O_rBPr13, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5E */ { UD_Ipop, O_rSIr14, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 5F */ { UD_Ipop, O_rDIr15, O_NONE, O_NONE, P_def64|P_depM|P_oso|P_rexb }, + /* 60 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_60__OSIZE }, + /* 61 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_61__OSIZE }, + /* 62 */ { UD_Ibound, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* 63 */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_63__MODE }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Ipush, O_Iz, O_NONE, O_NONE, P_c1|P_oso }, + /* 69 */ { UD_Iimul, O_Gv, O_Ev, O_Iz, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipush, O_Ib, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iimul, O_Gv, O_Ev, O_Ib, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Iinsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6D__OSIZE }, + /* 6E */ { UD_Ioutsb, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_6F__OSIZE }, + /* 70 */ { UD_Ijo, O_Jb, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Ijno, O_Jb, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Ijb, O_Jb, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Ijae, O_Jb, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Ijz, O_Jb, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Ijnz, O_Jb, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Ijbe, O_Jb, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Ija, O_Jb, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Ijs, O_Jb, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Ijns, O_Jb, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Ijp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Ijnp, O_Jb, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ijl, O_Jb, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Ijge, O_Jb, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Ijle, O_Jb, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Ijg, O_Jb, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_80__REG }, + /* 81 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_81__REG }, + /* 82 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_82__REG }, + /* 83 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_83__REG }, + /* 84 */ { UD_Itest, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 85 */ { UD_Itest, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 86 */ { UD_Ixchg, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 87 */ { UD_Ixchg, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 88 */ { UD_Imov, O_Eb, O_Gb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 89 */ { UD_Imov, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8A */ { UD_Imov, O_Gb, O_Eb, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 8B */ { UD_Imov, O_Gv, O_Ev, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8C */ { UD_Imov, O_Ev, O_S, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8D */ { UD_Ilea, O_Gv, O_M, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 8E */ { UD_Imov, O_S, O_Ev, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* 8F */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_8F__REG }, + /* 90 */ { UD_Ixchg, O_rAXr8, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 91 */ { UD_Ixchg, O_rCXr9, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 92 */ { UD_Ixchg, O_rDXr10, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 93 */ { UD_Ixchg, O_rBXr11, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 94 */ { UD_Ixchg, O_rSPr12, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 95 */ { UD_Ixchg, O_rBPr13, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 96 */ { UD_Ixchg, O_rSIr14, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 97 */ { UD_Ixchg, O_rDIr15, O_rAX, O_NONE, P_oso|P_rexw|P_rexb }, + /* 98 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_98__OSIZE }, + /* 99 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_99__OSIZE }, + /* 9A */ { UD_Icall, O_Ap, O_NONE, O_NONE, P_inv64|P_oso }, + /* 9B */ { UD_Iwait, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE }, + /* 9D */ { UD_Igrp_mode, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE }, + /* 9E */ { UD_Isahf, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Ilahf, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Imov, O_AL, O_Ob, O_NONE, P_none }, + /* A1 */ { UD_Imov, O_rAX, O_Ov, O_NONE, P_aso|P_oso|P_rexw }, + /* A2 */ { UD_Imov, O_Ob, O_AL, O_NONE, P_none }, + /* A3 */ { UD_Imov, O_Ov, O_rAX, O_NONE, P_aso|P_oso|P_rexw }, + /* A4 */ { UD_Imovsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* A5 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A5__OSIZE }, + /* A6 */ { UD_Icmpsb, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_A7__OSIZE }, + /* A8 */ { UD_Itest, O_AL, O_Ib, O_NONE, P_none }, + /* A9 */ { UD_Itest, O_rAX, O_Iz, O_NONE, P_oso|P_rexw }, + /* AA */ { UD_Istosb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AB */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AB__OSIZE }, + /* AC */ { UD_Ilodsb, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_none }, + /* AD */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AD__OSIZE }, + /* AE */ { UD_Iscasb, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AF__OSIZE }, + /* B0 */ { UD_Imov, O_ALr8b, O_Ib, O_NONE, P_rexb }, + /* B1 */ { UD_Imov, O_CLr9b, O_Ib, O_NONE, P_rexb }, + /* B2 */ { UD_Imov, O_DLr10b, O_Ib, O_NONE, P_rexb }, + /* B3 */ { UD_Imov, O_BLr11b, O_Ib, O_NONE, P_rexb }, + /* B4 */ { UD_Imov, O_AHr12b, O_Ib, O_NONE, P_rexb }, + /* B5 */ { UD_Imov, O_CHr13b, O_Ib, O_NONE, P_rexb }, + /* B6 */ { UD_Imov, O_DHr14b, O_Ib, O_NONE, P_rexb }, + /* B7 */ { UD_Imov, O_BHr15b, O_Ib, O_NONE, P_rexb }, + /* B8 */ { UD_Imov, O_rAXr8, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* B9 */ { UD_Imov, O_rCXr9, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BA */ { UD_Imov, O_rDXr10, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BB */ { UD_Imov, O_rBXr11, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BC */ { UD_Imov, O_rSPr12, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BD */ { UD_Imov, O_rBPr13, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BE */ { UD_Imov, O_rSIr14, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* BF */ { UD_Imov, O_rDIr15, O_Iv, O_NONE, P_oso|P_rexw|P_rexb }, + /* C0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C0__REG }, + /* C1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C1__REG }, + /* C2 */ { UD_Iret, O_Iw, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iret, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iles, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C5 */ { UD_Ilds, O_Gv, O_M, O_NONE, P_inv64|P_aso|P_oso }, + /* C6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C6__REG }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_C7__REG }, + /* C8 */ { UD_Ienter, O_Iw, O_Ib, O_NONE, P_def64|P_depM|P_none }, + /* C9 */ { UD_Ileave, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iretf, O_Iw, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iretf, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iint3, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iint, O_Ib, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinto, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* CF */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_CF__OSIZE }, + /* D0 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D0__REG }, + /* D1 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D1__REG }, + /* D2 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D2__REG }, + /* D3 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D3__REG }, + /* D4 */ { UD_Iaam, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D5 */ { UD_Iaad, O_Ib, O_NONE, O_NONE, P_inv64|P_none }, + /* D6 */ { UD_Isalc, O_NONE, O_NONE, O_NONE, P_inv64|P_none }, + /* D7 */ { UD_Ixlatb, O_NONE, O_NONE, O_NONE, P_rexw }, + /* D8 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD }, + /* D9 */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD }, + /* DA */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD }, + /* DB */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD }, + /* DC */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD }, + /* DD */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD }, + /* DE */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD }, + /* DF */ { UD_Igrp_mod, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD }, + /* E0 */ { UD_Iloopnz, O_Jb, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iloope, O_Jb, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iloop, O_Jb, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Igrp_asize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_E3__ASIZE }, + /* E4 */ { UD_Iin, O_AL, O_Ib, O_NONE, P_none }, + /* E5 */ { UD_Iin, O_eAX, O_Ib, O_NONE, P_oso }, + /* E6 */ { UD_Iout, O_Ib, O_AL, O_NONE, P_none }, + /* E7 */ { UD_Iout, O_Ib, O_eAX, O_NONE, P_oso }, + /* E8 */ { UD_Icall, O_Jz, O_NONE, O_NONE, P_def64|P_oso }, + /* E9 */ { UD_Ijmp, O_Jz, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* EA */ { UD_Ijmp, O_Ap, O_NONE, O_NONE, P_inv64|P_none }, + /* EB */ { UD_Ijmp, O_Jb, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iin, O_AL, O_DX, O_NONE, P_none }, + /* ED */ { UD_Iin, O_eAX, O_DX, O_NONE, P_oso }, + /* EE */ { UD_Iout, O_DX, O_AL, O_NONE, P_none }, + /* EF */ { UD_Iout, O_DX, O_eAX, O_NONE, P_oso }, + /* F0 */ { UD_Ilock, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iint1, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Irepne, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Irep, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Ihlt, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Icmc, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F6__REG }, + /* F7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_F7__REG }, + /* F8 */ { UD_Iclc, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Istc, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Icli, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Isti, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Icld, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Istd, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FE__REG }, + /* FF */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_FF__REG }, +}; + +static struct ud_itab_entry itab__1byte__op_60__osize[3] = { + /* 00 */ { UD_Ipusha, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipushad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_61__osize[3] = { + /* 00 */ { UD_Ipopa, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 01 */ { UD_Ipopad, O_NONE, O_NONE, O_NONE, P_inv64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_63__mode[3] = { + /* 00 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 01 */ { UD_Iarpl, O_Ew, O_Gw, O_NONE, P_inv64|P_aso }, + /* 02 */ { UD_Imovsxd, O_Gv, O_Ed, O_NONE, P_c2|P_aso|P_oso|P_rexw|P_rexx|P_rexr|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_6d__osize[3] = { + /* 00 */ { UD_Iinsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Iinsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_6f__osize[3] = { + /* 00 */ { UD_Ioutsw, O_NONE, O_NONE, O_NONE, P_oso }, + /* 01 */ { UD_Ioutsd, O_NONE, O_NONE, O_NONE, P_oso }, + /* 02 */ { UD_Ioutsq, O_NONE, O_NONE, O_NONE, P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_80__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_81__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_82__reg[8] = { + /* 00 */ { UD_Iadd, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Eb, O_Ib, O_NONE, P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_83__reg[8] = { + /* 00 */ { UD_Iadd, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ior, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iadc, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Isbb, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iand, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Isub, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ixor, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Icmp, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_8f__reg[8] = { + /* 00 */ { UD_Ipop, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_98__osize[3] = { + /* 00 */ { UD_Icbw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icwde, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icdqe, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_99__osize[3] = { + /* 00 */ { UD_Icwd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icdq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icqo, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipushfq, O_NONE, O_NONE, O_NONE, P_def64|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9c__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipushfw, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 01 */ { UD_Ipushfd, O_NONE, O_NONE, O_NONE, P_def64|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode[3] = { + /* 00 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE }, + /* 01 */ { UD_Igrp_osize, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE }, + /* 02 */ { UD_Ipopfq, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_00__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_9d__mode__op_01__osize[3] = { + /* 00 */ { UD_Ipopfw, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 01 */ { UD_Ipopfd, O_NONE, O_NONE, O_NONE, P_def64|P_depM|P_oso }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_a5__osize[3] = { + /* 00 */ { UD_Imovsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Imovsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Imovsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_a7__osize[3] = { + /* 00 */ { UD_Icmpsw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Icmpsd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Icmpsq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ab__osize[3] = { + /* 00 */ { UD_Istosw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Istosd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Istosq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ad__osize[3] = { + /* 00 */ { UD_Ilodsw, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 01 */ { UD_Ilodsd, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, + /* 02 */ { UD_Ilodsq, O_NONE, O_NONE, O_NONE, P_ImpAddr|P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_AE__MOD__OP_00__REG }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ae__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifxsave, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifxrstor, O_M, O_NONE, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_af__osize[3] = { + /* 00 */ { UD_Iscasw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iscasd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iscasq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_c0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_Ib, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_c6__reg[8] = { + /* 00 */ { UD_Imov, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_c7__reg[8] = { + /* 00 */ { UD_Imov, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_cf__osize[3] = { + /* 00 */ { UD_Iiretw, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 01 */ { UD_Iiretd, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, + /* 02 */ { UD_Iiretq, O_NONE, O_NONE, O_NONE, P_oso|P_rexw }, +}; + +static struct ud_itab_entry itab__1byte__op_d0__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_I1, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d1__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_I1, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d2__reg[8] = { + /* 00 */ { UD_Irol, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Eb, O_CL, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Eb, O_CL, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d3__reg[8] = { + /* 00 */ { UD_Irol, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iror, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ircl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ircr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ishr, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ishl, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Isar, O_Ev, O_CL, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D8__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d8__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcom, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcom, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcom, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcom, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcom, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcom, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcom, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcom, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsub, O_ST0, O_ST1, O_NONE, P_none }, + /* 22 */ { UD_Ifsub, O_ST0, O_ST2, O_NONE, P_none }, + /* 23 */ { UD_Ifsub, O_ST0, O_ST3, O_NONE, P_none }, + /* 24 */ { UD_Ifsub, O_ST0, O_ST4, O_NONE, P_none }, + /* 25 */ { UD_Ifsub, O_ST0, O_ST5, O_NONE, P_none }, + /* 26 */ { UD_Ifsub, O_ST0, O_ST6, O_NONE, P_none }, + /* 27 */ { UD_Ifsub, O_ST0, O_ST7, O_NONE, P_none }, + /* 28 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubr, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifsubr, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifsubr, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifsubr, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifsubr, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifsubr, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifsubr, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdiv, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifdiv, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifdiv, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifdiv, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifdiv, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifdiv, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifdiv, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivr, O_ST0, O_ST1, O_NONE, P_none }, + /* 3A */ { UD_Ifdivr, O_ST0, O_ST2, O_NONE, P_none }, + /* 3B */ { UD_Ifdivr, O_ST0, O_ST3, O_NONE, P_none }, + /* 3C */ { UD_Ifdivr, O_ST0, O_ST4, O_NONE, P_none }, + /* 3D */ { UD_Ifdivr, O_ST0, O_ST5, O_NONE, P_none }, + /* 3E */ { UD_Ifdivr, O_ST0, O_ST6, O_NONE, P_none }, + /* 3F */ { UD_Ifdivr, O_ST0, O_ST7, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_D9__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ifst, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifldenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifldcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifnstenv, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstcw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_d9__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifld, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifld, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifld, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifld, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifld, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifld, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifld, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifxch, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifxch, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifxch, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifxch, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifxch, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifxch, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifxch, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifxch, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifnop, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp1, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp1, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp1, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp1, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp1, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp1, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp1, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp1, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifchs, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iftst, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifxam, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifld1, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifldl2t, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifldl2e, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifldlpi, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifldlg2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifldln2, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifldz, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Ifyl2x, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Ifptan, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Ifpatan, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Ifpxtract, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Ifprem1, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Ifdecstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Ifncstp, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Ifprem, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Ifyl2xp1, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Ifsqrt, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Ifsincos, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Ifrndint, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Ifscale, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Ifsin, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Ifcos, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DA__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_da__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmove, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmove, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmove, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmove, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmove, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmove, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmove, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmove, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DB__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Md, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Ifld, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Ifstp, O_Mt, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_db__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifcmovnb, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifcmovnb, O_ST0, O_ST1, O_NONE, P_none }, + /* 02 */ { UD_Ifcmovnb, O_ST0, O_ST2, O_NONE, P_none }, + /* 03 */ { UD_Ifcmovnb, O_ST0, O_ST3, O_NONE, P_none }, + /* 04 */ { UD_Ifcmovnb, O_ST0, O_ST4, O_NONE, P_none }, + /* 05 */ { UD_Ifcmovnb, O_ST0, O_ST5, O_NONE, P_none }, + /* 06 */ { UD_Ifcmovnb, O_ST0, O_ST6, O_NONE, P_none }, + /* 07 */ { UD_Ifcmovnb, O_ST0, O_ST7, O_NONE, P_none }, + /* 08 */ { UD_Ifcmovne, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifcmovne, O_ST0, O_ST1, O_NONE, P_none }, + /* 0A */ { UD_Ifcmovne, O_ST0, O_ST2, O_NONE, P_none }, + /* 0B */ { UD_Ifcmovne, O_ST0, O_ST3, O_NONE, P_none }, + /* 0C */ { UD_Ifcmovne, O_ST0, O_ST4, O_NONE, P_none }, + /* 0D */ { UD_Ifcmovne, O_ST0, O_ST5, O_NONE, P_none }, + /* 0E */ { UD_Ifcmovne, O_ST0, O_ST6, O_NONE, P_none }, + /* 0F */ { UD_Ifcmovne, O_ST0, O_ST7, O_NONE, P_none }, + /* 10 */ { UD_Ifcmovnbe, O_ST0, O_ST0, O_NONE, P_none }, + /* 11 */ { UD_Ifcmovnbe, O_ST0, O_ST1, O_NONE, P_none }, + /* 12 */ { UD_Ifcmovnbe, O_ST0, O_ST2, O_NONE, P_none }, + /* 13 */ { UD_Ifcmovnbe, O_ST0, O_ST3, O_NONE, P_none }, + /* 14 */ { UD_Ifcmovnbe, O_ST0, O_ST4, O_NONE, P_none }, + /* 15 */ { UD_Ifcmovnbe, O_ST0, O_ST5, O_NONE, P_none }, + /* 16 */ { UD_Ifcmovnbe, O_ST0, O_ST6, O_NONE, P_none }, + /* 17 */ { UD_Ifcmovnbe, O_ST0, O_ST7, O_NONE, P_none }, + /* 18 */ { UD_Ifcmovnu, O_ST0, O_ST0, O_NONE, P_none }, + /* 19 */ { UD_Ifcmovnu, O_ST0, O_ST1, O_NONE, P_none }, + /* 1A */ { UD_Ifcmovnu, O_ST0, O_ST2, O_NONE, P_none }, + /* 1B */ { UD_Ifcmovnu, O_ST0, O_ST3, O_NONE, P_none }, + /* 1C */ { UD_Ifcmovnu, O_ST0, O_ST4, O_NONE, P_none }, + /* 1D */ { UD_Ifcmovnu, O_ST0, O_ST5, O_NONE, P_none }, + /* 1E */ { UD_Ifcmovnu, O_ST0, O_ST6, O_NONE, P_none }, + /* 1F */ { UD_Ifcmovnu, O_ST0, O_ST7, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifclex, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifninit, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomi, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomi, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomi, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomi, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomi, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomi, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomi, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomi, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DC__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifadd, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifmul, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifcom, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifcomp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifsub, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifsubr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifdiv, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifdivr, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dc__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifadd, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifadd, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifadd, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifadd, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifadd, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifadd, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifadd, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifadd, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmul, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmul, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmul, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmul, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmul, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmul, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmul, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmul, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcom2, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcom2, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcom2, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcom2, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcom2, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcom2, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcom2, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcom2, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifcomp3, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcomp3, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifcomp3, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifcomp3, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifcomp3, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifcomp3, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifcomp3, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifcomp3, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubr, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubr, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubr, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubr, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubr, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubr, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubr, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubr, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsub, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsub, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsub, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsub, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsub, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsub, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsub, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsub, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivr, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivr, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivr, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivr, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivr, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivr, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivr, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivr, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdiv, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdiv, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdiv, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdiv, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdiv, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdiv, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdiv, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdiv, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DD__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifld, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifst, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifstp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifrstor, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ifnsave, O_M, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifnstsw, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_dd__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffree, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffree, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffree, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffree, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffree, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffree, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffree, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffree, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch4, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch4, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch4, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch4, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch4, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch4, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch4, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch4, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifst, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifst, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifst, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifst, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifst, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifst, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifst, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifst, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifucom, O_ST0, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Ifucom, O_ST1, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Ifucom, O_ST2, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Ifucom, O_ST3, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Ifucom, O_ST4, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Ifucom, O_ST5, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Ifucom, O_ST6, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Ifucom, O_ST7, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomp, O_ST0, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Ifucomp, O_ST1, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Ifucomp, O_ST2, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Ifucomp, O_ST3, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Ifucomp, O_ST4, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Ifucomp, O_ST5, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Ifucomp, O_ST6, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Ifucomp, O_ST7, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DE__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifiadd, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifimul, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ificom, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ificomp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifisub, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifisubr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifidiv, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifidivr, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_de__mod__op_01__x87[64] = { + /* 00 */ { UD_Ifaddp, O_ST0, O_ST0, O_NONE, P_none }, + /* 01 */ { UD_Ifaddp, O_ST1, O_ST0, O_NONE, P_none }, + /* 02 */ { UD_Ifaddp, O_ST2, O_ST0, O_NONE, P_none }, + /* 03 */ { UD_Ifaddp, O_ST3, O_ST0, O_NONE, P_none }, + /* 04 */ { UD_Ifaddp, O_ST4, O_ST0, O_NONE, P_none }, + /* 05 */ { UD_Ifaddp, O_ST5, O_ST0, O_NONE, P_none }, + /* 06 */ { UD_Ifaddp, O_ST6, O_ST0, O_NONE, P_none }, + /* 07 */ { UD_Ifaddp, O_ST7, O_ST0, O_NONE, P_none }, + /* 08 */ { UD_Ifmulp, O_ST0, O_ST0, O_NONE, P_none }, + /* 09 */ { UD_Ifmulp, O_ST1, O_ST0, O_NONE, P_none }, + /* 0A */ { UD_Ifmulp, O_ST2, O_ST0, O_NONE, P_none }, + /* 0B */ { UD_Ifmulp, O_ST3, O_ST0, O_NONE, P_none }, + /* 0C */ { UD_Ifmulp, O_ST4, O_ST0, O_NONE, P_none }, + /* 0D */ { UD_Ifmulp, O_ST5, O_ST0, O_NONE, P_none }, + /* 0E */ { UD_Ifmulp, O_ST6, O_ST0, O_NONE, P_none }, + /* 0F */ { UD_Ifmulp, O_ST7, O_ST0, O_NONE, P_none }, + /* 10 */ { UD_Ifcomp5, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifcomp5, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifcomp5, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifcomp5, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifcomp5, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifcomp5, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifcomp5, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifcomp5, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifcompp, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifsubrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 21 */ { UD_Ifsubrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 22 */ { UD_Ifsubrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 23 */ { UD_Ifsubrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 24 */ { UD_Ifsubrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 25 */ { UD_Ifsubrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 26 */ { UD_Ifsubrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 27 */ { UD_Ifsubrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 28 */ { UD_Ifsubp, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifsubp, O_ST1, O_ST0, O_NONE, P_none }, + /* 2A */ { UD_Ifsubp, O_ST2, O_ST0, O_NONE, P_none }, + /* 2B */ { UD_Ifsubp, O_ST3, O_ST0, O_NONE, P_none }, + /* 2C */ { UD_Ifsubp, O_ST4, O_ST0, O_NONE, P_none }, + /* 2D */ { UD_Ifsubp, O_ST5, O_ST0, O_NONE, P_none }, + /* 2E */ { UD_Ifsubp, O_ST6, O_ST0, O_NONE, P_none }, + /* 2F */ { UD_Ifsubp, O_ST7, O_ST0, O_NONE, P_none }, + /* 30 */ { UD_Ifdivrp, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifdivrp, O_ST1, O_ST0, O_NONE, P_none }, + /* 32 */ { UD_Ifdivrp, O_ST2, O_ST0, O_NONE, P_none }, + /* 33 */ { UD_Ifdivrp, O_ST3, O_ST0, O_NONE, P_none }, + /* 34 */ { UD_Ifdivrp, O_ST4, O_ST0, O_NONE, P_none }, + /* 35 */ { UD_Ifdivrp, O_ST5, O_ST0, O_NONE, P_none }, + /* 36 */ { UD_Ifdivrp, O_ST6, O_ST0, O_NONE, P_none }, + /* 37 */ { UD_Ifdivrp, O_ST7, O_ST0, O_NONE, P_none }, + /* 38 */ { UD_Ifdivp, O_ST0, O_ST0, O_NONE, P_none }, + /* 39 */ { UD_Ifdivp, O_ST1, O_ST0, O_NONE, P_none }, + /* 3A */ { UD_Ifdivp, O_ST2, O_ST0, O_NONE, P_none }, + /* 3B */ { UD_Ifdivp, O_ST3, O_ST0, O_NONE, P_none }, + /* 3C */ { UD_Ifdivp, O_ST4, O_ST0, O_NONE, P_none }, + /* 3D */ { UD_Ifdivp, O_ST5, O_ST0, O_NONE, P_none }, + /* 3E */ { UD_Ifdivp, O_ST6, O_ST0, O_NONE, P_none }, + /* 3F */ { UD_Ifdivp, O_ST7, O_ST0, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod[2] = { + /* 00 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_00__REG }, + /* 01 */ { UD_Igrp_x87, O_NONE, O_NONE, O_NONE, ITAB__1BYTE__OP_DF__MOD__OP_01__X87 }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_00__reg[8] = { + /* 00 */ { UD_Ifild, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Ifisttp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Ifist, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ifistp, O_Mw, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ifbld, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ifild, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ifbstp, O_Mt, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Ifistp, O_Mq, O_NONE, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_df__mod__op_01__x87[64] = { + /* 00 */ { UD_Iffreep, O_ST0, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iffreep, O_ST1, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iffreep, O_ST2, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iffreep, O_ST3, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iffreep, O_ST4, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iffreep, O_ST5, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iffreep, O_ST6, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iffreep, O_ST7, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Ifxch7, O_ST0, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Ifxch7, O_ST1, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Ifxch7, O_ST2, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Ifxch7, O_ST3, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Ifxch7, O_ST4, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Ifxch7, O_ST5, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Ifxch7, O_ST6, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Ifxch7, O_ST7, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Ifstp8, O_ST0, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Ifstp8, O_ST1, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Ifstp8, O_ST2, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Ifstp8, O_ST3, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Ifstp8, O_ST4, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Ifstp8, O_ST5, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Ifstp8, O_ST6, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Ifstp8, O_ST7, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Ifstp9, O_ST0, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Ifstp9, O_ST1, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Ifstp9, O_ST2, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Ifstp9, O_ST3, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Ifstp9, O_ST4, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Ifstp9, O_ST5, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Ifstp9, O_ST6, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Ifstp9, O_ST7, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Ifnstsw, O_AX, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Ifucomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 29 */ { UD_Ifucomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 2A */ { UD_Ifucomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 2B */ { UD_Ifucomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 2C */ { UD_Ifucomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 2D */ { UD_Ifucomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 2E */ { UD_Ifucomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 2F */ { UD_Ifucomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 30 */ { UD_Ifcomip, O_ST0, O_ST0, O_NONE, P_none }, + /* 31 */ { UD_Ifcomip, O_ST0, O_ST1, O_NONE, P_none }, + /* 32 */ { UD_Ifcomip, O_ST0, O_ST2, O_NONE, P_none }, + /* 33 */ { UD_Ifcomip, O_ST0, O_ST3, O_NONE, P_none }, + /* 34 */ { UD_Ifcomip, O_ST0, O_ST4, O_NONE, P_none }, + /* 35 */ { UD_Ifcomip, O_ST0, O_ST5, O_NONE, P_none }, + /* 36 */ { UD_Ifcomip, O_ST0, O_ST6, O_NONE, P_none }, + /* 37 */ { UD_Ifcomip, O_ST0, O_ST7, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_e3__asize[3] = { + /* 00 */ { UD_Ijcxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 01 */ { UD_Ijecxz, O_Jb, O_NONE, O_NONE, P_aso }, + /* 02 */ { UD_Ijrcxz, O_Jb, O_NONE, O_NONE, P_aso }, +}; + +static struct ud_itab_entry itab__1byte__op_f6__reg[8] = { + /* 00 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Eb, O_Ib, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_f7__reg[8] = { + /* 00 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Itest, O_Ev, O_Iz, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Inot, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Ineg, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Imul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Iimul, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Idiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iidiv, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__1byte__op_fe__reg[8] = { + /* 00 */ { UD_Iinc, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Eb, O_NONE, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__1byte__op_ff__reg[8] = { + /* 00 */ { UD_Iinc, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 01 */ { UD_Idec, O_Ev, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 02 */ { UD_Icall, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 03 */ { UD_Icall, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 04 */ { UD_Ijmp, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 05 */ { UD_Ijmp, O_Ep, O_NONE, O_NONE, P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 06 */ { UD_Ipush, O_Ev, O_NONE, O_NONE, P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__3dnow[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 11 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 12 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 59 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovupd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovupd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovlpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Imovlpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 14 */ { UD_Iunpcklpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 15 */ { UD_Iunpckhpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 16 */ { UD_Imovhpd, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Imovhpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Imovapd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 29 */ { UD_Imovapd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2A */ { UD_Icvtpi2pd, O_V, O_Q, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Imovntpd, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2C */ { UD_Icvttpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtpd2pi, O_P, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iucomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 2F */ { UD_Icomisd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Imovmskpd, O_Gd, O_VR, O_NONE, P_oso|P_rexr|P_rexb }, + /* 51 */ { UD_Isqrtpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iandpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 55 */ { UD_Iandnpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 56 */ { UD_Iorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 57 */ { UD_Ixorpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 58 */ { UD_Iaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtpd2ps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvtps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Ipunpcklbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 61 */ { UD_Ipunpcklwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 62 */ { UD_Ipunpckldq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 63 */ { UD_Ipacksswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 64 */ { UD_Ipcmpgtb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 65 */ { UD_Ipcmpgtw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 66 */ { UD_Ipcmpgtd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 67 */ { UD_Ipackuswb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 68 */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 69 */ { UD_Ipunpckhwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6A */ { UD_Ipunpckhdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6B */ { UD_Ipackssdw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6C */ { UD_Ipunpcklqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6D */ { UD_Ipunpckhqdq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 6E */ { UD_Imovd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 6F */ { UD_Imovqa, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_71__REG }, + /* 72 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_72__REG }, + /* 73 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_73__REG }, + /* 74 */ { UD_Ipcmpeqb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 75 */ { UD_Ipcmpeqw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 76 */ { UD_Ipcmpeqd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Imovd, O_Ex, O_V, O_NONE, P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqa, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmppd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Ipinsrw, O_V, O_Ew, O_Ib, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C5 */ { UD_Ipextrw, O_Gd, O_VR, O_Ib, P_aso|P_rexr|P_rexb }, + /* C6 */ { UD_Ishufpd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubpd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Ipsrlw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D2 */ { UD_Ipsrld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D3 */ { UD_Ipsrlq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D4 */ { UD_Ipaddq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D5 */ { UD_Ipmullw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D6 */ { UD_Imovq, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D7 */ { UD_Ipmovmskb, O_Gd, O_VR, O_NONE, P_rexr|P_rexb }, + /* D8 */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D9 */ { UD_Ipsubusw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DA */ { UD_Ipminub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DB */ { UD_Ipand, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DC */ { UD_Ipsubusb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DD */ { UD_Ipunpckhbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DE */ { UD_Ipmaxub, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* DF */ { UD_Ipandn, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E0 */ { UD_Ipavgb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E1 */ { UD_Ipsraw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E2 */ { UD_Ipsrad, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E3 */ { UD_Ipavgw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E4 */ { UD_Ipmulhuw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E5 */ { UD_Ipmulhw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E6 */ { UD_Icvttpd2dq, O_V, O_W, O_NONE, P_none }, + /* E7 */ { UD_Imovntdq, O_M, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E8 */ { UD_Ipsubsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E9 */ { UD_Ipsubsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EA */ { UD_Ipminsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EB */ { UD_Ipor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EC */ { UD_Ipaddsb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* ED */ { UD_Ipaddsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EE */ { UD_Ipmaxsw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* EF */ { UD_Ipxor, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Ipsllw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F2 */ { UD_Ipslld, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F3 */ { UD_Ipsllq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F4 */ { UD_Ipmuludq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F5 */ { UD_Ipmaddwd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F6 */ { UD_Ipsadbw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F7 */ { UD_Imaskmovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F8 */ { UD_Ipsubb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F9 */ { UD_Ipsubw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FA */ { UD_Ipsubd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FB */ { UD_Ipsubq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FC */ { UD_Ipaddb, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FD */ { UD_Ipaddw, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_71__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsraw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllw, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_72__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Ipsrad, O_VR, O_Ib, O_NONE, P_rexb }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipslld, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_73__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Ipsrlq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 03 */ { UD_Ipsrldq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Ipsllq, O_VR, O_Ib, O_NONE, P_rexb }, + /* 07 */ { UD_Ipslldq, O_VR, O_Ib, O_NONE, P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg[8] = { + /* 00 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg__op_00__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmclear, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +static struct ud_itab_entry itab__pfx_ssef2__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovsd, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovddup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2sd, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtsd2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 53 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtsd2ss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 5C */ { UD_Isubsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxsd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 70 */ { UD_Ipshuflw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Ihaddps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7D */ { UD_Ihsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_oso|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpsd, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iaddsubps, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovdq2q, O_P, O_VR, O_NONE, P_aso|P_rexb }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtpd2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Ilddqu, O_V, O_M, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f[256] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 08 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 09 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 0F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 10 */ { UD_Imovss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 11 */ { UD_Imovss, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 12 */ { UD_Imovsldup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 13 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 14 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 15 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 16 */ { UD_Imovshdup, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 17 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 18 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 19 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 1F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 20 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 21 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 22 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 23 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 24 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 25 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 26 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 27 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 28 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 29 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2A */ { UD_Icvtsi2ss, O_V, O_Ex, O_NONE, P_c2|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2C */ { UD_Icvttss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2D */ { UD_Icvtss2si, O_Gvw, O_W, O_NONE, P_c1|P_aso|P_rexr|P_rexx|P_rexb }, + /* 2E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 2F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 30 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 31 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 32 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 33 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 34 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 35 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 36 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 37 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 38 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 39 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 3F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 40 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 41 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 42 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 43 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 44 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 45 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 46 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 47 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 48 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 49 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 4F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 50 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 51 */ { UD_Isqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 52 */ { UD_Irsqrtss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 53 */ { UD_Ircpss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 54 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 55 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 56 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 57 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 58 */ { UD_Iaddss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 59 */ { UD_Imulss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5A */ { UD_Icvtss2sd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5B */ { UD_Icvttps2dq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5C */ { UD_Isubss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5D */ { UD_Iminss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5E */ { UD_Idivss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 5F */ { UD_Imaxss, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 60 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 61 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 62 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 63 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 64 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 65 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 66 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 67 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 68 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 69 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 6F */ { UD_Imovdqu, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 70 */ { UD_Ipshufhw, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* 71 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 72 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 73 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 74 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 75 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 76 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 77 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 78 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 79 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 7E */ { UD_Imovq, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 7F */ { UD_Imovdqu, O_W, O_V, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* 80 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 81 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 82 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 83 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 84 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 85 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 86 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 87 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 88 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 89 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 8F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 90 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 91 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 92 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 93 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 94 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 95 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 96 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 97 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 98 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 99 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9A */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9B */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9C */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9D */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9E */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 9F */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* A9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* AF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* B9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* BF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C0 */ { UD_Ixadd, O_Eb, O_Gb, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C1 */ { UD_Ixadd, O_Ev, O_Gv, O_NONE, P_aso|P_rexw|P_rexr|P_rexx|P_rexb }, + /* C2 */ { UD_Icmpss, O_V, O_W, O_Ib, P_aso|P_rexr|P_rexx|P_rexb }, + /* C3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C7 */ { UD_Igrp_reg, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG }, + /* C8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* C9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* CF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D6 */ { UD_Imovq2dq, O_V, O_PR, O_NONE, P_aso }, + /* D7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* D9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* DF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E6 */ { UD_Icvtdq2pd, O_V, O_W, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, + /* E7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* E9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* ED */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* EF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F0 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F1 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F2 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F3 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F4 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F5 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F6 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F7 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F8 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* F9 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FA */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FB */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FC */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FD */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FE */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* FF */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg[8] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 02 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 03 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 04 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 05 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 06 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 07 */ { UD_Igrp_vendor, O_NONE, O_NONE, O_NONE, ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR }, +}; + +static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor[2] = { + /* 00 */ { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none }, + /* 01 */ { UD_Ivmxon, O_Mq, O_NONE, O_NONE, P_aso|P_rexr|P_rexx|P_rexb }, +}; + +/* the order of this table matches enum ud_itab_index */ +struct ud_itab_entry * ud_itab_list[] = { + itab__0f, + itab__0f__op_00__reg, + itab__0f__op_01__reg, + itab__0f__op_01__reg__op_00__mod, + itab__0f__op_01__reg__op_00__mod__op_01__rm, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_01__mod, + itab__0f__op_01__reg__op_01__mod__op_01__rm, + itab__0f__op_01__reg__op_02__mod, + itab__0f__op_01__reg__op_03__mod, + itab__0f__op_01__reg__op_03__mod__op_01__rm, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor, + itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor, + itab__0f__op_01__reg__op_04__mod, + itab__0f__op_01__reg__op_06__mod, + itab__0f__op_01__reg__op_07__mod, + itab__0f__op_01__reg__op_07__mod__op_01__rm, + itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor, + itab__0f__op_0d__reg, + itab__0f__op_18__reg, + itab__0f__op_71__reg, + itab__0f__op_72__reg, + itab__0f__op_73__reg, + itab__0f__op_ae__reg, + itab__0f__op_ae__reg__op_05__mod, + itab__0f__op_ae__reg__op_05__mod__op_01__rm, + itab__0f__op_ae__reg__op_06__mod, + itab__0f__op_ae__reg__op_06__mod__op_01__rm, + itab__0f__op_ae__reg__op_07__mod, + itab__0f__op_ae__reg__op_07__mod__op_01__rm, + itab__0f__op_ba__reg, + itab__0f__op_c7__reg, + itab__0f__op_c7__reg__op_00__vendor, + itab__0f__op_c7__reg__op_07__vendor, + itab__0f__op_d9__mod, + itab__0f__op_d9__mod__op_01__x87, + itab__1byte, + itab__1byte__op_60__osize, + itab__1byte__op_61__osize, + itab__1byte__op_63__mode, + itab__1byte__op_6d__osize, + itab__1byte__op_6f__osize, + itab__1byte__op_80__reg, + itab__1byte__op_81__reg, + itab__1byte__op_82__reg, + itab__1byte__op_83__reg, + itab__1byte__op_8f__reg, + itab__1byte__op_98__osize, + itab__1byte__op_99__osize, + itab__1byte__op_9c__mode, + itab__1byte__op_9c__mode__op_00__osize, + itab__1byte__op_9c__mode__op_01__osize, + itab__1byte__op_9d__mode, + itab__1byte__op_9d__mode__op_00__osize, + itab__1byte__op_9d__mode__op_01__osize, + itab__1byte__op_a5__osize, + itab__1byte__op_a7__osize, + itab__1byte__op_ab__osize, + itab__1byte__op_ad__osize, + itab__1byte__op_ae__mod, + itab__1byte__op_ae__mod__op_00__reg, + itab__1byte__op_af__osize, + itab__1byte__op_c0__reg, + itab__1byte__op_c1__reg, + itab__1byte__op_c6__reg, + itab__1byte__op_c7__reg, + itab__1byte__op_cf__osize, + itab__1byte__op_d0__reg, + itab__1byte__op_d1__reg, + itab__1byte__op_d2__reg, + itab__1byte__op_d3__reg, + itab__1byte__op_d8__mod, + itab__1byte__op_d8__mod__op_00__reg, + itab__1byte__op_d8__mod__op_01__x87, + itab__1byte__op_d9__mod, + itab__1byte__op_d9__mod__op_00__reg, + itab__1byte__op_d9__mod__op_01__x87, + itab__1byte__op_da__mod, + itab__1byte__op_da__mod__op_00__reg, + itab__1byte__op_da__mod__op_01__x87, + itab__1byte__op_db__mod, + itab__1byte__op_db__mod__op_00__reg, + itab__1byte__op_db__mod__op_01__x87, + itab__1byte__op_dc__mod, + itab__1byte__op_dc__mod__op_00__reg, + itab__1byte__op_dc__mod__op_01__x87, + itab__1byte__op_dd__mod, + itab__1byte__op_dd__mod__op_00__reg, + itab__1byte__op_dd__mod__op_01__x87, + itab__1byte__op_de__mod, + itab__1byte__op_de__mod__op_00__reg, + itab__1byte__op_de__mod__op_01__x87, + itab__1byte__op_df__mod, + itab__1byte__op_df__mod__op_00__reg, + itab__1byte__op_df__mod__op_01__x87, + itab__1byte__op_e3__asize, + itab__1byte__op_f6__reg, + itab__1byte__op_f7__reg, + itab__1byte__op_fe__reg, + itab__1byte__op_ff__reg, + itab__3dnow, + itab__pfx_sse66__0f, + itab__pfx_sse66__0f__op_71__reg, + itab__pfx_sse66__0f__op_72__reg, + itab__pfx_sse66__0f__op_73__reg, + itab__pfx_sse66__0f__op_c7__reg, + itab__pfx_sse66__0f__op_c7__reg__op_00__vendor, + itab__pfx_ssef2__0f, + itab__pfx_ssef3__0f, + itab__pfx_ssef3__0f__op_c7__reg, + itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor, +}; diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/itab.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/itab.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,719 @@ + +/* itab.h -- auto generated by opgen.py, do not edit. */ + +#ifndef UD_ITAB_H +#define UD_ITAB_H + + + +enum ud_itab_vendor_index { + ITAB__VENDOR_INDX__AMD, + ITAB__VENDOR_INDX__INTEL, +}; + + +enum ud_itab_mode_index { + ITAB__MODE_INDX__16, + ITAB__MODE_INDX__32, + ITAB__MODE_INDX__64 +}; + + +enum ud_itab_mod_index { + ITAB__MOD_INDX__NOT_11, + ITAB__MOD_INDX__11 +}; + + +enum ud_itab_index { + ITAB__0F, + ITAB__0F__OP_00__REG, + ITAB__0F__OP_01__REG, + ITAB__0F__OP_01__REG__OP_00__MOD, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_01__MOD, + ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_02__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR, + ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR, + ITAB__0F__OP_01__REG__OP_04__MOD, + ITAB__0F__OP_01__REG__OP_06__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR, + ITAB__0F__OP_0D__REG, + ITAB__0F__OP_18__REG, + ITAB__0F__OP_71__REG, + ITAB__0F__OP_72__REG, + ITAB__0F__OP_73__REG, + ITAB__0F__OP_AE__REG, + ITAB__0F__OP_AE__REG__OP_05__MOD, + ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_06__MOD, + ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM, + ITAB__0F__OP_AE__REG__OP_07__MOD, + ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM, + ITAB__0F__OP_BA__REG, + ITAB__0F__OP_C7__REG, + ITAB__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__0F__OP_C7__REG__OP_07__VENDOR, + ITAB__0F__OP_D9__MOD, + ITAB__0F__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE, + ITAB__1BYTE__OP_60__OSIZE, + ITAB__1BYTE__OP_61__OSIZE, + ITAB__1BYTE__OP_63__MODE, + ITAB__1BYTE__OP_6D__OSIZE, + ITAB__1BYTE__OP_6F__OSIZE, + ITAB__1BYTE__OP_80__REG, + ITAB__1BYTE__OP_81__REG, + ITAB__1BYTE__OP_82__REG, + ITAB__1BYTE__OP_83__REG, + ITAB__1BYTE__OP_8F__REG, + ITAB__1BYTE__OP_98__OSIZE, + ITAB__1BYTE__OP_99__OSIZE, + ITAB__1BYTE__OP_9C__MODE, + ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_9D__MODE, + ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE, + ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE, + ITAB__1BYTE__OP_A5__OSIZE, + ITAB__1BYTE__OP_A7__OSIZE, + ITAB__1BYTE__OP_AB__OSIZE, + ITAB__1BYTE__OP_AD__OSIZE, + ITAB__1BYTE__OP_AE__MOD, + ITAB__1BYTE__OP_AE__MOD__OP_00__REG, + ITAB__1BYTE__OP_AF__OSIZE, + ITAB__1BYTE__OP_C0__REG, + ITAB__1BYTE__OP_C1__REG, + ITAB__1BYTE__OP_C6__REG, + ITAB__1BYTE__OP_C7__REG, + ITAB__1BYTE__OP_CF__OSIZE, + ITAB__1BYTE__OP_D0__REG, + ITAB__1BYTE__OP_D1__REG, + ITAB__1BYTE__OP_D2__REG, + ITAB__1BYTE__OP_D3__REG, + ITAB__1BYTE__OP_D8__MOD, + ITAB__1BYTE__OP_D8__MOD__OP_00__REG, + ITAB__1BYTE__OP_D8__MOD__OP_01__X87, + ITAB__1BYTE__OP_D9__MOD, + ITAB__1BYTE__OP_D9__MOD__OP_00__REG, + ITAB__1BYTE__OP_D9__MOD__OP_01__X87, + ITAB__1BYTE__OP_DA__MOD, + ITAB__1BYTE__OP_DA__MOD__OP_00__REG, + ITAB__1BYTE__OP_DA__MOD__OP_01__X87, + ITAB__1BYTE__OP_DB__MOD, + ITAB__1BYTE__OP_DB__MOD__OP_00__REG, + ITAB__1BYTE__OP_DB__MOD__OP_01__X87, + ITAB__1BYTE__OP_DC__MOD, + ITAB__1BYTE__OP_DC__MOD__OP_00__REG, + ITAB__1BYTE__OP_DC__MOD__OP_01__X87, + ITAB__1BYTE__OP_DD__MOD, + ITAB__1BYTE__OP_DD__MOD__OP_00__REG, + ITAB__1BYTE__OP_DD__MOD__OP_01__X87, + ITAB__1BYTE__OP_DE__MOD, + ITAB__1BYTE__OP_DE__MOD__OP_00__REG, + ITAB__1BYTE__OP_DE__MOD__OP_01__X87, + ITAB__1BYTE__OP_DF__MOD, + ITAB__1BYTE__OP_DF__MOD__OP_00__REG, + ITAB__1BYTE__OP_DF__MOD__OP_01__X87, + ITAB__1BYTE__OP_E3__ASIZE, + ITAB__1BYTE__OP_F6__REG, + ITAB__1BYTE__OP_F7__REG, + ITAB__1BYTE__OP_FE__REG, + ITAB__1BYTE__OP_FF__REG, + ITAB__3DNOW, + ITAB__PFX_SSE66__0F, + ITAB__PFX_SSE66__0F__OP_71__REG, + ITAB__PFX_SSE66__0F__OP_72__REG, + ITAB__PFX_SSE66__0F__OP_73__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG, + ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR, + ITAB__PFX_SSEF2__0F, + ITAB__PFX_SSEF3__0F, + ITAB__PFX_SSEF3__0F__OP_C7__REG, + ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR, +}; + + +enum ud_mnemonic_code { + UD_I3dnow, + UD_Iaaa, + UD_Iaad, + UD_Iaam, + UD_Iaas, + UD_Iadc, + UD_Iadd, + UD_Iaddpd, + UD_Iaddps, + UD_Iaddsd, + UD_Iaddss, + UD_Iaddsubpd, + UD_Iaddsubps, + UD_Iand, + UD_Iandpd, + UD_Iandps, + UD_Iandnpd, + UD_Iandnps, + UD_Iarpl, + UD_Imovsxd, + UD_Ibound, + UD_Ibsf, + UD_Ibsr, + UD_Ibswap, + UD_Ibt, + UD_Ibtc, + UD_Ibtr, + UD_Ibts, + UD_Icall, + UD_Icbw, + UD_Icwde, + UD_Icdqe, + UD_Iclc, + UD_Icld, + UD_Iclflush, + UD_Iclgi, + UD_Icli, + UD_Iclts, + UD_Icmc, + UD_Icmovo, + UD_Icmovno, + UD_Icmovb, + UD_Icmovae, + UD_Icmovz, + UD_Icmovnz, + UD_Icmovbe, + UD_Icmova, + UD_Icmovs, + UD_Icmovns, + UD_Icmovp, + UD_Icmovnp, + UD_Icmovl, + UD_Icmovge, + UD_Icmovle, + UD_Icmovg, + UD_Icmp, + UD_Icmppd, + UD_Icmpps, + UD_Icmpsb, + UD_Icmpsw, + UD_Icmpsd, + UD_Icmpsq, + UD_Icmpss, + UD_Icmpxchg, + UD_Icmpxchg8b, + UD_Icomisd, + UD_Icomiss, + UD_Icpuid, + UD_Icvtdq2pd, + UD_Icvtdq2ps, + UD_Icvtpd2dq, + UD_Icvtpd2pi, + UD_Icvtpd2ps, + UD_Icvtpi2ps, + UD_Icvtpi2pd, + UD_Icvtps2dq, + UD_Icvtps2pi, + UD_Icvtps2pd, + UD_Icvtsd2si, + UD_Icvtsd2ss, + UD_Icvtsi2ss, + UD_Icvtss2si, + UD_Icvtss2sd, + UD_Icvttpd2pi, + UD_Icvttpd2dq, + UD_Icvttps2dq, + UD_Icvttps2pi, + UD_Icvttsd2si, + UD_Icvtsi2sd, + UD_Icvttss2si, + UD_Icwd, + UD_Icdq, + UD_Icqo, + UD_Idaa, + UD_Idas, + UD_Idec, + UD_Idiv, + UD_Idivpd, + UD_Idivps, + UD_Idivsd, + UD_Idivss, + UD_Iemms, + UD_Ienter, + UD_If2xm1, + UD_Ifabs, + UD_Ifadd, + UD_Ifaddp, + UD_Ifbld, + UD_Ifbstp, + UD_Ifchs, + UD_Ifclex, + UD_Ifcmovb, + UD_Ifcmove, + UD_Ifcmovbe, + UD_Ifcmovu, + UD_Ifcmovnb, + UD_Ifcmovne, + UD_Ifcmovnbe, + UD_Ifcmovnu, + UD_Ifucomi, + UD_Ifcom, + UD_Ifcom2, + UD_Ifcomp3, + UD_Ifcomi, + UD_Ifucomip, + UD_Ifcomip, + UD_Ifcomp, + UD_Ifcomp5, + UD_Ifcompp, + UD_Ifcos, + UD_Ifdecstp, + UD_Ifdiv, + UD_Ifdivp, + UD_Ifdivr, + UD_Ifdivrp, + UD_Ifemms, + UD_Iffree, + UD_Iffreep, + UD_Ificom, + UD_Ificomp, + UD_Ifild, + UD_Ifncstp, + UD_Ifninit, + UD_Ifiadd, + UD_Ifidivr, + UD_Ifidiv, + UD_Ifisub, + UD_Ifisubr, + UD_Ifist, + UD_Ifistp, + UD_Ifisttp, + UD_Ifld, + UD_Ifld1, + UD_Ifldl2t, + UD_Ifldl2e, + UD_Ifldlpi, + UD_Ifldlg2, + UD_Ifldln2, + UD_Ifldz, + UD_Ifldcw, + UD_Ifldenv, + UD_Ifmul, + UD_Ifmulp, + UD_Ifimul, + UD_Ifnop, + UD_Ifpatan, + UD_Ifprem, + UD_Ifprem1, + UD_Ifptan, + UD_Ifrndint, + UD_Ifrstor, + UD_Ifnsave, + UD_Ifscale, + UD_Ifsin, + UD_Ifsincos, + UD_Ifsqrt, + UD_Ifstp, + UD_Ifstp1, + UD_Ifstp8, + UD_Ifstp9, + UD_Ifst, + UD_Ifnstcw, + UD_Ifnstenv, + UD_Ifnstsw, + UD_Ifsub, + UD_Ifsubp, + UD_Ifsubr, + UD_Ifsubrp, + UD_Iftst, + UD_Ifucom, + UD_Ifucomp, + UD_Ifucompp, + UD_Ifxam, + UD_Ifxch, + UD_Ifxch4, + UD_Ifxch7, + UD_Ifxrstor, + UD_Ifxsave, + UD_Ifpxtract, + UD_Ifyl2x, + UD_Ifyl2xp1, + UD_Ihaddpd, + UD_Ihaddps, + UD_Ihlt, + UD_Ihsubpd, + UD_Ihsubps, + UD_Iidiv, + UD_Iin, + UD_Iimul, + UD_Iinc, + UD_Iinsb, + UD_Iinsw, + UD_Iinsd, + UD_Iint1, + UD_Iint3, + UD_Iint, + UD_Iinto, + UD_Iinvd, + UD_Iinvlpg, + UD_Iinvlpga, + UD_Iiretw, + UD_Iiretd, + UD_Iiretq, + UD_Ijo, + UD_Ijno, + UD_Ijb, + UD_Ijae, + UD_Ijz, + UD_Ijnz, + UD_Ijbe, + UD_Ija, + UD_Ijs, + UD_Ijns, + UD_Ijp, + UD_Ijnp, + UD_Ijl, + UD_Ijge, + UD_Ijle, + UD_Ijg, + UD_Ijcxz, + UD_Ijecxz, + UD_Ijrcxz, + UD_Ijmp, + UD_Ilahf, + UD_Ilar, + UD_Ilddqu, + UD_Ildmxcsr, + UD_Ilds, + UD_Ilea, + UD_Iles, + UD_Ilfs, + UD_Ilgs, + UD_Ilidt, + UD_Ilss, + UD_Ileave, + UD_Ilfence, + UD_Ilgdt, + UD_Illdt, + UD_Ilmsw, + UD_Ilock, + UD_Ilodsb, + UD_Ilodsw, + UD_Ilodsd, + UD_Ilodsq, + UD_Iloopnz, + UD_Iloope, + UD_Iloop, + UD_Ilsl, + UD_Iltr, + UD_Imaskmovq, + UD_Imaxpd, + UD_Imaxps, + UD_Imaxsd, + UD_Imaxss, + UD_Imfence, + UD_Iminpd, + UD_Iminps, + UD_Iminsd, + UD_Iminss, + UD_Imonitor, + UD_Imov, + UD_Imovapd, + UD_Imovaps, + UD_Imovd, + UD_Imovddup, + UD_Imovdqa, + UD_Imovdqu, + UD_Imovdq2q, + UD_Imovhpd, + UD_Imovhps, + UD_Imovlhps, + UD_Imovlpd, + UD_Imovlps, + UD_Imovhlps, + UD_Imovmskpd, + UD_Imovmskps, + UD_Imovntdq, + UD_Imovnti, + UD_Imovntpd, + UD_Imovntps, + UD_Imovntq, + UD_Imovq, + UD_Imovqa, + UD_Imovq2dq, + UD_Imovsb, + UD_Imovsw, + UD_Imovsd, + UD_Imovsq, + UD_Imovsldup, + UD_Imovshdup, + UD_Imovss, + UD_Imovsx, + UD_Imovupd, + UD_Imovups, + UD_Imovzx, + UD_Imul, + UD_Imulpd, + UD_Imulps, + UD_Imulsd, + UD_Imulss, + UD_Imwait, + UD_Ineg, + UD_Inop, + UD_Inot, + UD_Ior, + UD_Iorpd, + UD_Iorps, + UD_Iout, + UD_Ioutsb, + UD_Ioutsw, + UD_Ioutsd, + UD_Ioutsq, + UD_Ipacksswb, + UD_Ipackssdw, + UD_Ipackuswb, + UD_Ipaddb, + UD_Ipaddw, + UD_Ipaddq, + UD_Ipaddsb, + UD_Ipaddsw, + UD_Ipaddusb, + UD_Ipaddusw, + UD_Ipand, + UD_Ipandn, + UD_Ipause, + UD_Ipavgb, + UD_Ipavgw, + UD_Ipcmpeqb, + UD_Ipcmpeqw, + UD_Ipcmpeqd, + UD_Ipcmpgtb, + UD_Ipcmpgtw, + UD_Ipcmpgtd, + UD_Ipextrw, + UD_Ipinsrw, + UD_Ipmaddwd, + UD_Ipmaxsw, + UD_Ipmaxub, + UD_Ipminsw, + UD_Ipminub, + UD_Ipmovmskb, + UD_Ipmulhuw, + UD_Ipmulhw, + UD_Ipmullw, + UD_Ipmuludq, + UD_Ipop, + UD_Ipopa, + UD_Ipopad, + UD_Ipopfw, + UD_Ipopfd, + UD_Ipopfq, + UD_Ipor, + UD_Iprefetch, + UD_Iprefetchnta, + UD_Iprefetcht0, + UD_Iprefetcht1, + UD_Iprefetcht2, + UD_Ipsadbw, + UD_Ipshufd, + UD_Ipshufhw, + UD_Ipshuflw, + UD_Ipshufw, + UD_Ipslldq, + UD_Ipsllw, + UD_Ipslld, + UD_Ipsllq, + UD_Ipsraw, + UD_Ipsrad, + UD_Ipsrlw, + UD_Ipsrld, + UD_Ipsrlq, + UD_Ipsrldq, + UD_Ipsubb, + UD_Ipsubw, + UD_Ipsubd, + UD_Ipsubq, + UD_Ipsubsb, + UD_Ipsubsw, + UD_Ipsubusb, + UD_Ipsubusw, + UD_Ipunpckhbw, + UD_Ipunpckhwd, + UD_Ipunpckhdq, + UD_Ipunpckhqdq, + UD_Ipunpcklbw, + UD_Ipunpcklwd, + UD_Ipunpckldq, + UD_Ipunpcklqdq, + UD_Ipi2fw, + UD_Ipi2fd, + UD_Ipf2iw, + UD_Ipf2id, + UD_Ipfnacc, + UD_Ipfpnacc, + UD_Ipfcmpge, + UD_Ipfmin, + UD_Ipfrcp, + UD_Ipfrsqrt, + UD_Ipfsub, + UD_Ipfadd, + UD_Ipfcmpgt, + UD_Ipfmax, + UD_Ipfrcpit1, + UD_Ipfrspit1, + UD_Ipfsubr, + UD_Ipfacc, + UD_Ipfcmpeq, + UD_Ipfmul, + UD_Ipfrcpit2, + UD_Ipmulhrw, + UD_Ipswapd, + UD_Ipavgusb, + UD_Ipush, + UD_Ipusha, + UD_Ipushad, + UD_Ipushfw, + UD_Ipushfd, + UD_Ipushfq, + UD_Ipxor, + UD_Ircl, + UD_Ircr, + UD_Irol, + UD_Iror, + UD_Ircpps, + UD_Ircpss, + UD_Irdmsr, + UD_Irdpmc, + UD_Irdtsc, + UD_Irdtscp, + UD_Irepne, + UD_Irep, + UD_Iret, + UD_Iretf, + UD_Irsm, + UD_Irsqrtps, + UD_Irsqrtss, + UD_Isahf, + UD_Isal, + UD_Isalc, + UD_Isar, + UD_Ishl, + UD_Ishr, + UD_Isbb, + UD_Iscasb, + UD_Iscasw, + UD_Iscasd, + UD_Iscasq, + UD_Iseto, + UD_Isetno, + UD_Isetb, + UD_Isetnb, + UD_Isetz, + UD_Isetnz, + UD_Isetbe, + UD_Iseta, + UD_Isets, + UD_Isetns, + UD_Isetp, + UD_Isetnp, + UD_Isetl, + UD_Isetge, + UD_Isetle, + UD_Isetg, + UD_Isfence, + UD_Isgdt, + UD_Ishld, + UD_Ishrd, + UD_Ishufpd, + UD_Ishufps, + UD_Isidt, + UD_Isldt, + UD_Ismsw, + UD_Isqrtps, + UD_Isqrtpd, + UD_Isqrtsd, + UD_Isqrtss, + UD_Istc, + UD_Istd, + UD_Istgi, + UD_Isti, + UD_Iskinit, + UD_Istmxcsr, + UD_Istosb, + UD_Istosw, + UD_Istosd, + UD_Istosq, + UD_Istr, + UD_Isub, + UD_Isubpd, + UD_Isubps, + UD_Isubsd, + UD_Isubss, + UD_Iswapgs, + UD_Isyscall, + UD_Isysenter, + UD_Isysexit, + UD_Isysret, + UD_Itest, + UD_Iucomisd, + UD_Iucomiss, + UD_Iud2, + UD_Iunpckhpd, + UD_Iunpckhps, + UD_Iunpcklps, + UD_Iunpcklpd, + UD_Iverr, + UD_Iverw, + UD_Ivmcall, + UD_Ivmclear, + UD_Ivmxon, + UD_Ivmptrld, + UD_Ivmptrst, + UD_Ivmresume, + UD_Ivmxoff, + UD_Ivmrun, + UD_Ivmmcall, + UD_Ivmload, + UD_Ivmsave, + UD_Iwait, + UD_Iwbinvd, + UD_Iwrmsr, + UD_Ixadd, + UD_Ixchg, + UD_Ixlatb, + UD_Ixor, + UD_Ixorpd, + UD_Ixorps, + UD_Idb, + UD_Iinvalid, + UD_Id3vil, + UD_Ina, + UD_Igrp_reg, + UD_Igrp_rm, + UD_Igrp_vendor, + UD_Igrp_x87, + UD_Igrp_mode, + UD_Igrp_osize, + UD_Igrp_asize, + UD_Igrp_mod, + UD_Inone, +}; + + + +extern const char* ud_mnemonics_str[];; +extern struct ud_itab_entry* ud_itab_list[]; + +#endif diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/kdb_dis.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/kdb_dis.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2009, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include /* for XEN_SUBVERSION */ +#include "../../include/kdbinc.h" +#include "extern.h" + +static void (*dis_syntax)(ud_t*) = UD_SYN_ATT; /* default dis-assembly syntax */ + +static struct { /* info for kdb_read_byte_for_ud() */ + kdbva_t kud_instr_addr; + domid_t kud_domid; +} kdb_ud_rd_info; + +/* called via function ptr by ud when disassembling. + * kdb info passed via kdb_ud_rd_info{} + */ +static int +kdb_read_byte_for_ud(struct ud *udp) +{ + kdbbyt_t bytebuf; + domid_t domid = kdb_ud_rd_info.kud_domid; + kdbva_t addr = kdb_ud_rd_info.kud_instr_addr; + + if (kdb_read_mem(addr, &bytebuf, 1, domid) == 1) { + kdb_ud_rd_info.kud_instr_addr++; + KDBGP1("udrd:addr:%lx domid:%d byt:%x\n", addr, domid, bytebuf); + return bytebuf; + } + KDBGP1("udrd:addr:%lx domid:%d err\n", addr, domid); + return UD_EOI; +} + +/* + * given a domid, convert addr to symbol and print it + * Eg: ffff828c801235e2: idle_loop+52 jmp idle_loop+55 + * Called twice here for idle_loop. In first case, nl is null, + * in the second case nl == '\n' + */ +void +kdb_prnt_addr2sym(domid_t domid, kdbva_t addr, char *nl) +{ + unsigned long sz, offs; + char buf[KSYM_NAME_LEN+1], pbuf[150], prefix[8]; + char *p = buf; + + prefix[0]='\0'; + if (domid != DOMID_IDLE) { + snprintf(prefix, 8, "%x:", domid); + p = kdb_guest_addr2sym(addr, domid, &offs); + } else + symbols_lookup(addr, &sz, &offs, buf); + + snprintf(pbuf, 150, "%s%s+%lx", prefix, p, offs); + if (*nl != '\n') + kdbp("%-30s%s", pbuf, nl); /* prints more than 30 if needed */ + else + kdbp("%s%s", pbuf, nl); + +} + +static int +kdb_jump_instr(enum ud_mnemonic_code mnemonic) +{ + return (mnemonic >= UD_Ijo && mnemonic <= UD_Ijmp); +} + +/* + * print one instr: function so that we can print offsets of jmp etc.. as + * symbol+offset instead of just address + */ +static void +kdb_print_one_instr(struct ud *udp, domid_t domid) +{ + signed long val = 0; + ud_type_t type = udp->operand[0].type; + + if ((udp->mnemonic == UD_Icall || kdb_jump_instr(udp->mnemonic)) && + type == UD_OP_JIMM) { + + int sz = udp->operand[0].size; + char *p, ibuf[40], *q = ibuf; + kdbva_t addr; + + if (sz == 8) val = udp->operand[0].lval.sbyte; + else if (sz == 16) val = udp->operand[0].lval.sword; + else if (sz == 32) val = udp->operand[0].lval.sdword; + else if (sz == 64) val = udp->operand[0].lval.sqword; + else kdbp("kdb_print_one_instr: Inval sz:z%d\n", sz); + + addr = udp->pc + val; + for(p=ud_insn_asm(udp); (*q=*p) && *p!=' '; p++,q++); + *q='\0'; + kdbp(" %-4s ", ibuf); /* space before for long func names */ + kdb_prnt_addr2sym(domid, addr, "\n"); + } else + kdbp(" %-24s\n", ud_insn_asm(udp)); +#if 0 + kdbp("mnemonic:z%d ", udp->mnemonic); + if (type == UD_OP_CONST) kdbp("type is const\n"); + else if (type == UD_OP_JIMM) kdbp("type is JIMM\n"); + else if (type == UD_OP_IMM) kdbp("type is IMM\n"); + else if (type == UD_OP_PTR) kdbp("type is PTR\n"); +#endif +} + +static void +kdb_setup_ud(struct ud *udp, kdbva_t addr, domid_t domid) +{ + int bitness = kdb_guest_bitness(domid); + uint vendor = (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ? + UD_VENDOR_AMD : UD_VENDOR_INTEL; + + KDBGP1("setup_ud:domid:%d bitness:%d addr:%lx\n", domid, bitness, addr); + ud_init(udp); + ud_set_mode(udp, kdb_guest_bitness(domid)); + ud_set_syntax(udp, dis_syntax); + ud_set_vendor(udp, vendor); /* HVM: vmx/svm different instrs*/ + ud_set_pc(udp, addr); /* for numbers printed on left */ + ud_set_input_hook(udp, kdb_read_byte_for_ud); + kdb_ud_rd_info.kud_instr_addr = addr; + kdb_ud_rd_info.kud_domid = domid; +} + +/* + * given an addr, print given number of instructions. + * Returns: address of next instruction in the stream + */ +kdbva_t +kdb_print_instr(kdbva_t addr, long num, domid_t domid) +{ + struct ud ud_s; + + KDBGP1("print_instr:addr:0x%lx num:%ld domid:%x\n", addr, num, domid); + + kdb_setup_ud(&ud_s, addr, domid); + while(num--) { + if (ud_disassemble(&ud_s)) { + uint64_t pc = ud_insn_off(&ud_s); + /* kdbp("%08x: ",(int)pc); */ + kdbp("%016lx: ", pc); + kdb_prnt_addr2sym(domid, pc, ""); + kdb_print_one_instr(&ud_s, domid); + } else + kdbp("KDB:Couldn't disassemble PC:0x%lx\n", addr); + /* for stack reads, don't always display error */ + } + KDBGP1("print_instr:kudaddr:0x%lx\n", kdb_ud_rd_info.kud_instr_addr); + return kdb_ud_rd_info.kud_instr_addr; +} + +void +kdb_display_pc(struct cpu_user_regs *regs) +{ + domid_t domid; + struct cpu_user_regs regs1 = *regs; + domid = guest_mode(regs) ? current->domain->domain_id : DOMID_IDLE; + + regs1.KDBIP = regs->KDBIP; + kdb_print_instr(regs1.KDBIP, 1, domid); +} + +/* check if the instr at the addr is call instruction + * RETURNS: size of the instr if it's a call instr, else 0 + */ +int +kdb_check_call_instr(domid_t domid, kdbva_t addr) +{ + struct ud ud_s; + int sz; + + kdb_setup_ud(&ud_s, addr, domid); + if ((sz=ud_disassemble(&ud_s)) && ud_s.mnemonic == UD_Icall) + return (sz); + return 0; +} + +/* toggle ATT and Intel syntaxes */ +void +kdb_toggle_dis_syntax(void) +{ + if (dis_syntax == UD_SYN_INTEL) { + dis_syntax = UD_SYN_ATT; + kdbp("dis syntax now set to ATT (Gas)\n"); + } else { + dis_syntax = UD_SYN_INTEL; + kdbp("dis syntax now set to Intel (NASM)\n"); + } +} diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/syn-att.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-att.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,211 @@ +/* ----------------------------------------------------------------------------- + * syn-att.c + * + * Copyright (c) 2004, 2005, 2006 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 16 : case 32 : + mkasm(u, "*"); break; + default: break; + } +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void +gen_operand(struct ud* u, struct ud_operand* op) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: + if (u->br_far) opr_cast(u, op); + if (u->pfx_seg) + mkasm(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", (-op->lval.sbyte) & 0xff); + else mkasm(u, "0x%x", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "0x%x", op->lval.uword); + else if (op->offset == 32) + mkasm(u, "0x%lx", op->lval.udword); + else if (op->offset == 64) + mkasm(u, "0x" FMT64 "x", op->lval.uqword); + + if (op->base) + mkasm(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]); + if (op->index) { + if (op->base) + mkasm(u, ","); + else mkasm(u, "("); + mkasm(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]); + } + if (op->scale) + mkasm(u, ",%d", op->scale); + if (op->base || op->index) + mkasm(u, ")"); + break; + + case UD_OP_IMM: + switch (op->size) { + case 8: mkasm(u, "$0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "$0x%x", op->lval.uword); break; + case 32: mkasm(u, "$0x%lx", op->lval.udword); break; + case 64: mkasm(u, "$0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "$0x%x, $0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "$0x%x, $0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + default: return; + } +} + +/* ============================================================================= + * translates to AT&T syntax + * ============================================================================= + */ +extern void +ud_translate_att(struct ud *u) +{ + int size = 0; + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + + /* special instructions */ + switch (u->mnemonic) { + case UD_Iretf: + mkasm(u, "lret "); + break; + case UD_Idb: + mkasm(u, ".byte 0x%x", u->operand[0].lval.ubyte); + return; + case UD_Ijmp: + case UD_Icall: + if (u->br_far) mkasm(u, "l"); + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + break; + case UD_Ibound: + case UD_Ienter: + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); + if (u->operand[1].type != UD_NONE) { + mkasm(u, ","); + gen_operand(u, &u->operand[1]); + } + return; + default: + mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic)); + } + + if (u->c1) + size = u->operand[0].size; + else if (u->c2) + size = u->operand[1].size; + else if (u->c3) + size = u->operand[2].size; + + if (size == 8) + mkasm(u, "b"); + else if (size == 16) + mkasm(u, "w"); + else if (size == 64) + mkasm(u, "q"); + + mkasm(u, " "); + + if (u->operand[2].type != UD_NONE) { + gen_operand(u, &u->operand[2]); + mkasm(u, ", "); + } + + if (u->operand[1].type != UD_NONE) { + gen_operand(u, &u->operand[1]); + mkasm(u, ", "); + } + + if (u->operand[0].type != UD_NONE) + gen_operand(u, &u->operand[0]); +} diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/syn-intel.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn-intel.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,208 @@ +/* ----------------------------------------------------------------------------- + * syn-intel.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +#include "types.h" +#include "extern.h" +#include "decode.h" +#include "itab.h" +#include "syn.h" + +/* ----------------------------------------------------------------------------- + * opr_cast() - Prints an operand cast. + * ----------------------------------------------------------------------------- + */ +static void +opr_cast(struct ud* u, struct ud_operand* op) +{ + switch(op->size) { + case 8: mkasm(u, "byte " ); break; + case 16: mkasm(u, "word " ); break; + case 32: mkasm(u, "dword "); break; + case 64: mkasm(u, "qword "); break; + case 80: mkasm(u, "tword "); break; + default: break; + } + if (u->br_far) + mkasm(u, "far "); + else if (u->br_near) + mkasm(u, "near "); +} + +/* ----------------------------------------------------------------------------- + * gen_operand() - Generates assembly output for each operand. + * ----------------------------------------------------------------------------- + */ +static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast) +{ + switch(op->type) { + case UD_OP_REG: + mkasm(u, ud_reg_tab[op->base - UD_R_AL]); + break; + + case UD_OP_MEM: { + + int op_f = 0; + + if (syn_cast) + opr_cast(u, op); + + mkasm(u, "["); + + if (u->pfx_seg) + mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + if (op->base) { + mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]); + op_f = 1; + } + + if (op->index) { + if (op_f) + mkasm(u, "+"); + mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]); + op_f = 1; + } + + if (op->scale) + mkasm(u, "*%d", op->scale); + + if (op->offset == 8) { + if (op->lval.sbyte < 0) + mkasm(u, "-0x%x", -op->lval.sbyte); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte); + } + else if (op->offset == 16) + mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword); + else if (op->offset == 32) { + if (u->adr_mode == 64) { + if (op->lval.sdword < 0) + mkasm(u, "-0x%x", -op->lval.sdword); + else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword); + } + else mkasm(u, "%s0x%lx", (op_f) ? "+" : "", op->lval.udword); + } + else if (op->offset == 64) + mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", op->lval.uqword); + + mkasm(u, "]"); + break; + } + + case UD_OP_IMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: mkasm(u, "0x%x", op->lval.ubyte); break; + case 16: mkasm(u, "0x%x", op->lval.uword); break; + case 32: mkasm(u, "0x%lx", op->lval.udword); break; + case 64: mkasm(u, "0x" FMT64 "x", op->lval.uqword); break; + default: break; + } + break; + + case UD_OP_JIMM: + if (syn_cast) opr_cast(u, op); + switch (op->size) { + case 8: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); + break; + case 16: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword); + break; + case 32: + mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword); + break; + default:break; + } + break; + + case UD_OP_PTR: + switch (op->size) { + case 32: + mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg, + op->lval.ptr.off & 0xFFFF); + break; + case 48: + mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg, + op->lval.ptr.off); + break; + } + break; + + case UD_OP_CONST: + if (syn_cast) opr_cast(u, op); + mkasm(u, "%d", op->lval.udword); + break; + + default: return; + } +} + +/* ============================================================================= + * translates to intel syntax + * ============================================================================= + */ +extern void ud_translate_intel(struct ud* u) +{ + /* -- prefixes -- */ + + /* check if P_OSO prefix is used */ + if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "o32 "); + break; + case 32: + case 64: + mkasm(u, "o16 "); + break; + } + } + + /* check if P_ASO prefix was used */ + if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) { + switch (u->dis_mode) { + case 16: + mkasm(u, "a32 "); + break; + case 32: + mkasm(u, "a16 "); + break; + case 64: + mkasm(u, "a32 "); + break; + } + } + + if (u->pfx_lock) + mkasm(u, "lock "); + if (u->pfx_rep) + mkasm(u, "rep "); + if (u->pfx_repne) + mkasm(u, "repne "); + if (u->implicit_addr && u->pfx_seg) + mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]); + + /* print the instruction mnemonic */ + mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic)); + + /* operand 1 */ + if (u->operand[0].type != UD_NONE) { + gen_operand(u, &u->operand[0], u->c1); + } + /* operand 2 */ + if (u->operand[1].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[1], u->c2); + } + + /* operand 3 */ + if (u->operand[2].type != UD_NONE) { + mkasm(u, ", "); + gen_operand(u, &u->operand[2], u->c3); + } +} diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/syn.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,61 @@ +/* ----------------------------------------------------------------------------- + * syn.c + * + * Copyright (c) 2002, 2003, 2004 Vivek Mohan + * All rights reserved. See (LICENSE) + * ----------------------------------------------------------------------------- + */ + +/* ----------------------------------------------------------------------------- + * Intel Register Table - Order Matters (types.h)! + * ----------------------------------------------------------------------------- + */ +const char* ud_reg_tab[] = +{ + "al", "cl", "dl", "bl", + "ah", "ch", "dh", "bh", + "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", + "r12b", "r13b", "r14b", "r15b", + + "ax", "cx", "dx", "bx", + "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", + "r12w", "r13W" , "r14w", "r15w", + + "eax", "ecx", "edx", "ebx", + "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", + "r12d", "r13d", "r14d", "r15d", + + "rax", "rcx", "rdx", "rbx", + "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", + "r12", "r13", "r14", "r15", + + "es", "cs", "ss", "ds", + "fs", "gs", + + "cr0", "cr1", "cr2", "cr3", + "cr4", "cr5", "cr6", "cr7", + "cr8", "cr9", "cr10", "cr11", + "cr12", "cr13", "cr14", "cr15", + + "dr0", "dr1", "dr2", "dr3", + "dr4", "dr5", "dr6", "dr7", + "dr8", "dr9", "dr10", "dr11", + "dr12", "dr13", "dr14", "dr15", + + "mm0", "mm1", "mm2", "mm3", + "mm4", "mm5", "mm6", "mm7", + + "st0", "st1", "st2", "st3", + "st4", "st5", "st6", "st7", + + "xmm0", "xmm1", "xmm2", "xmm3", + "xmm4", "xmm5", "xmm6", "xmm7", + "xmm8", "xmm9", "xmm10", "xmm11", + "xmm12", "xmm13", "xmm14", "xmm15", + + "rip" +}; diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/syn.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/syn.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,27 @@ +/* ----------------------------------------------------------------------------- + * syn.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_SYN_H +#define UD_SYN_H + +#if 0 +#include +#include +#endif +#include "types.h" + +extern const char* ud_reg_tab[]; + +static void mkasm(struct ud* u, const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + u->insn_fill += vsnprintf((char*) u->insn_buffer + u->insn_fill, 64, fmt, ap); + va_end(ap); +} + +#endif diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/types.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/types.h Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,186 @@ +/* ----------------------------------------------------------------------------- + * types.h + * + * Copyright (c) 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ +#ifndef UD_TYPES_H +#define UD_TYPES_H + + +#include "../../include/kdbinc.h" + +#define FMT64 "%ll" +#include "itab.h" + +/* ----------------------------------------------------------------------------- + * All possible "types" of objects in udis86. Order is Important! + * ----------------------------------------------------------------------------- + */ +enum ud_type +{ + UD_NONE, + + /* 8 bit GPRs */ + UD_R_AL, UD_R_CL, UD_R_DL, UD_R_BL, + UD_R_AH, UD_R_CH, UD_R_DH, UD_R_BH, + UD_R_SPL, UD_R_BPL, UD_R_SIL, UD_R_DIL, + UD_R_R8B, UD_R_R9B, UD_R_R10B, UD_R_R11B, + UD_R_R12B, UD_R_R13B, UD_R_R14B, UD_R_R15B, + + /* 16 bit GPRs */ + UD_R_AX, UD_R_CX, UD_R_DX, UD_R_BX, + UD_R_SP, UD_R_BP, UD_R_SI, UD_R_DI, + UD_R_R8W, UD_R_R9W, UD_R_R10W, UD_R_R11W, + UD_R_R12W, UD_R_R13W, UD_R_R14W, UD_R_R15W, + + /* 32 bit GPRs */ + UD_R_EAX, UD_R_ECX, UD_R_EDX, UD_R_EBX, + UD_R_ESP, UD_R_EBP, UD_R_ESI, UD_R_EDI, + UD_R_R8D, UD_R_R9D, UD_R_R10D, UD_R_R11D, + UD_R_R12D, UD_R_R13D, UD_R_R14D, UD_R_R15D, + + /* 64 bit GPRs */ + UD_R_RAX, UD_R_RCX, UD_R_RDX, UD_R_RBX, + UD_R_RSP, UD_R_RBP, UD_R_RSI, UD_R_RDI, + UD_R_R8, UD_R_R9, UD_R_R10, UD_R_R11, + UD_R_R12, UD_R_R13, UD_R_R14, UD_R_R15, + + /* segment registers */ + UD_R_ES, UD_R_CS, UD_R_SS, UD_R_DS, + UD_R_FS, UD_R_GS, + + /* control registers*/ + UD_R_CR0, UD_R_CR1, UD_R_CR2, UD_R_CR3, + UD_R_CR4, UD_R_CR5, UD_R_CR6, UD_R_CR7, + UD_R_CR8, UD_R_CR9, UD_R_CR10, UD_R_CR11, + UD_R_CR12, UD_R_CR13, UD_R_CR14, UD_R_CR15, + + /* debug registers */ + UD_R_DR0, UD_R_DR1, UD_R_DR2, UD_R_DR3, + UD_R_DR4, UD_R_DR5, UD_R_DR6, UD_R_DR7, + UD_R_DR8, UD_R_DR9, UD_R_DR10, UD_R_DR11, + UD_R_DR12, UD_R_DR13, UD_R_DR14, UD_R_DR15, + + /* mmx registers */ + UD_R_MM0, UD_R_MM1, UD_R_MM2, UD_R_MM3, + UD_R_MM4, UD_R_MM5, UD_R_MM6, UD_R_MM7, + + /* x87 registers */ + UD_R_ST0, UD_R_ST1, UD_R_ST2, UD_R_ST3, + UD_R_ST4, UD_R_ST5, UD_R_ST6, UD_R_ST7, + + /* extended multimedia registers */ + UD_R_XMM0, UD_R_XMM1, UD_R_XMM2, UD_R_XMM3, + UD_R_XMM4, UD_R_XMM5, UD_R_XMM6, UD_R_XMM7, + UD_R_XMM8, UD_R_XMM9, UD_R_XMM10, UD_R_XMM11, + UD_R_XMM12, UD_R_XMM13, UD_R_XMM14, UD_R_XMM15, + + UD_R_RIP, + + /* Operand Types */ + UD_OP_REG, UD_OP_MEM, UD_OP_PTR, UD_OP_IMM, + UD_OP_JIMM, UD_OP_CONST +}; + +/* ----------------------------------------------------------------------------- + * struct ud_operand - Disassembled instruction Operand. + * ----------------------------------------------------------------------------- + */ +struct ud_operand +{ + enum ud_type type; + uint8_t size; + union { + int8_t sbyte; + uint8_t ubyte; + int16_t sword; + uint16_t uword; + int32_t sdword; + uint32_t udword; + int64_t sqword; + uint64_t uqword; + + struct { + uint16_t seg; + uint32_t off; + } ptr; + } lval; + + enum ud_type base; + enum ud_type index; + uint8_t offset; + uint8_t scale; +}; + +/* ----------------------------------------------------------------------------- + * struct ud - The udis86 object. + * ----------------------------------------------------------------------------- + */ +struct ud +{ + int (*inp_hook) (struct ud*); + uint8_t inp_curr; + uint8_t inp_fill; + uint8_t inp_ctr; + uint8_t* inp_buff; + uint8_t* inp_buff_end; + uint8_t inp_end; + void (*translator)(struct ud*); + uint64_t insn_offset; + char insn_hexcode[32]; + char insn_buffer[64]; + unsigned int insn_fill; + uint8_t dis_mode; + uint64_t pc; + uint8_t vendor; + struct map_entry* mapen; + enum ud_mnemonic_code mnemonic; + struct ud_operand operand[3]; + uint8_t error; + uint8_t pfx_rex; + uint8_t pfx_seg; + uint8_t pfx_opr; + uint8_t pfx_adr; + uint8_t pfx_lock; + uint8_t pfx_rep; + uint8_t pfx_repe; + uint8_t pfx_repne; + uint8_t pfx_insn; + uint8_t default64; + uint8_t opr_mode; + uint8_t adr_mode; + uint8_t br_far; + uint8_t br_near; + uint8_t implicit_addr; + uint8_t c1; + uint8_t c2; + uint8_t c3; + uint8_t inp_cache[256]; + uint8_t inp_sess[64]; + struct ud_itab_entry * itab_entry; +}; + +/* ----------------------------------------------------------------------------- + * Type-definitions + * ----------------------------------------------------------------------------- + */ +typedef enum ud_type ud_type_t; +typedef enum ud_mnemonic_code ud_mnemonic_code_t; + +typedef struct ud ud_t; +typedef struct ud_operand ud_operand_t; + +#define UD_SYN_INTEL ud_translate_intel +#define UD_SYN_ATT ud_translate_att +#define UD_EOI -1 +#define UD_INP_CACHE_SZ 32 +#define UD_VENDOR_AMD 0 +#define UD_VENDOR_INTEL 1 + +#define bail_out(ud,error_code) longjmp( (ud)->bailout, error_code ) +#define try_decode(ud) if ( setjmp( (ud)->bailout ) == 0 ) +#define catch_error() else + +#endif diff -r 32034d1914a6 xen/kdb/x86/udis86-1.7/udis86.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/kdb/x86/udis86-1.7/udis86.c Fri Jun 15 12:13:29 2012 -0700 @@ -0,0 +1,156 @@ +/* ----------------------------------------------------------------------------- + * udis86.c + * + * Copyright (c) 2004, 2005, 2006, Vivek Mohan + * All rights reserved. See LICENSE + * ----------------------------------------------------------------------------- + */ + +#if 0 +#include +#include +#include +#endif + +#include "input.h" +#include "extern.h" + +/* ============================================================================= + * ud_init() - Initializes ud_t object. + * ============================================================================= + */ +extern void +ud_init(struct ud* u) +{ + memset((void*)u, 0, sizeof(struct ud)); + ud_set_mode(u, 16); + u->mnemonic = UD_Iinvalid; + ud_set_pc(u, 0); +#ifndef __UD_STANDALONE__ + ud_set_input_file(u, stdin); +#endif /* __UD_STANDALONE__ */ +} + +/* ============================================================================= + * ud_disassemble() - disassembles one instruction and returns the number of + * bytes disassembled. A zero means end of disassembly. + * ============================================================================= + */ +extern unsigned int +ud_disassemble(struct ud* u) +{ + if (ud_input_end(u)) + return 0; + + + u->insn_buffer[0] = u->insn_hexcode[0] = 0; + + + if (ud_decode(u) == 0) + return 0; + if (u->translator) + u->translator(u); + return ud_insn_len(u); +} + +/* ============================================================================= + * ud_set_mode() - Set Disassemly Mode. + * ============================================================================= + */ +extern void +ud_set_mode(struct ud* u, uint8_t m) +{ + switch(m) { + case 16: + case 32: + case 64: u->dis_mode = m ; return; + default: u->dis_mode = 16; return; + } +} + +/* ============================================================================= + * ud_set_vendor() - Set vendor. + * ============================================================================= + */ +extern void +ud_set_vendor(struct ud* u, unsigned v) +{ + switch(v) { + case UD_VENDOR_INTEL: + u->vendor = v; + break; + default: + u->vendor = UD_VENDOR_AMD; + } +} + +/* ============================================================================= + * ud_set_pc() - Sets code origin. + * ============================================================================= + */ +extern void +ud_set_pc(struct ud* u, uint64_t o) +{ + u->pc = o; +} + +/* ============================================================================= + * ud_set_syntax() - Sets the output syntax. + * ============================================================================= + */ +extern void +ud_set_syntax(struct ud* u, void (*t)(struct ud*)) +{ + u->translator = t; +} + +/* ============================================================================= + * ud_insn() - returns the disassembled instruction + * ============================================================================= + */ +extern char* +ud_insn_asm(struct ud* u) +{ + return u->insn_buffer; +} + +/* ============================================================================= + * ud_insn_offset() - Returns the offset. + * ============================================================================= + */ +extern uint64_t +ud_insn_off(struct ud* u) +{ + return u->insn_offset; +} + + +/* ============================================================================= + * ud_insn_hex() - Returns hex form of disassembled instruction. + * ============================================================================= + */ +extern char* +ud_insn_hex(struct ud* u) +{ + return u->insn_hexcode; +} + +/* ============================================================================= + * ud_insn_ptr() - Returns code disassembled. + * ============================================================================= + */ +extern uint8_t* +ud_insn_ptr(struct ud* u) +{ + return u->inp_sess; +} + +/* ============================================================================= + * ud_insn_len() - Returns the count of bytes disassembled. + * ============================================================================= + */ +extern unsigned int +ud_insn_len(struct ud* u) +{ + return u->inp_ctr; +} --MP_/c2HycnF26WhVANwYZbmqoQR Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --MP_/c2HycnF26WhVANwYZbmqoQR-- From xen-api-bounces@lists.xen.org Thu Jun 21 17:06:15 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 Jun 2012 17:06:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Shkpc-0008Pv-QD; Thu, 21 Jun 2012 17:06:08 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Shkpa-0008Pq-Vt for xen-api@lists.xen.org; Thu, 21 Jun 2012 17:06:07 +0000 Received: from [85.158.143.99:46952] by server-2.bemta-4.messagelabs.com id 7D/84-17938-E7453EF4; Thu, 21 Jun 2012 17:06:06 +0000 X-Env-Sender: egoitz@sarenet.es X-Msg-Ref: server-6.tower-216.messagelabs.com!1340298364!21464713!1 X-Originating-IP: [194.30.0.79] X-SpamReason: No, hits=4.6 required=7.0 tests=HTML_IMAGE_ONLY_12, HTML_MESSAGE,HTML_SHORT_LINK_IMG_1 X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 19270 invoked from network); 21 Jun 2012 17:06:04 -0000 Received: from proxypop04b.sare.net (HELO proxypop04b.sare.net) (194.30.0.79) by server-6.tower-216.messagelabs.com with SMTP; 21 Jun 2012 17:06:04 -0000 Received: from [172.16.2.46] (izaro.sarenet.es [192.148.167.11]) by proxypop04.sare.net (Postfix) with ESMTPSA id 1116E9DCDB1; Thu, 21 Jun 2012 19:06:02 +0200 (CEST) Mime-Version: 1.0 (Apple Message framework v1278) From: Egoitz Aurrekoetxea Aurre In-Reply-To: <4FD1FF5A.5000508@xen.org> Date: Thu, 21 Jun 2012 19:06:03 +0200 Message-Id: <11D4DEE3-6A75-4A0B-B1EB-2A2E841AC3D1@sarenet.es> References: <4FCF7993.8040505@xen.org> <949F7BE0-EDC8-404A-80C8-753DCEA07016@sarenet.es> <3A9DB808-4792-4FCA-B15F-C97B5FD8264B@sarenet.es> <4FD1FF5A.5000508@xen.org> To: lars.kurth@xen.org X-Mailer: Apple Mail (2.1278) Cc: xen-api@lists.xen.org Subject: Re: [Xen-API] XenserverTools for FreeBSD 64bit HVM X-BeenThere: xen-api@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: User and development list for XCP and XAPI List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============7795161561793120617==" Sender: xen-api-bounces@lists.xen.org Errors-To: xen-api-bounces@lists.xen.org --===============7795161561793120617== Content-Type: multipart/alternative; boundary="Apple-Mail=_D58CB7BF-E490-4736-8364-CB45AC4FB10D" --Apple-Mail=_D58CB7BF-E490-4736-8364-CB45AC4FB10D Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=windows-1252 Hi Lards, Here is the short (I'm sorry :) ) promised documentation. I wanted to = say=85 FreeBSD rulezzzzZZzzzzz!!! :) . Best regards, Egoitz Aurrekoetxea Departamento de sistemas egoitz@sarenet.es --Apple-Mail=_D58CB7BF-E490-4736-8364-CB45AC4FB10D Content-Type: multipart/mixed; boundary="Apple-Mail=_4EF5464D-583C-4102-93C1-676F058D80F9" --Apple-Mail=_4EF5464D-583C-4102-93C1-676F058D80F9 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=windows-1252 Hi = Lards,

Here is the short (I'm sorry :) ) promised = documentation. I wanted to say=85 FreeBSD rulezzzzZZzzzzz!!! :) = .

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Content-Transfer-Encoding: 7bit Content-Type: text/html; charset=windows-1252


Best regards,


Egoitz Aurrekoetxea
Departamento de sistemas
egoitz@sarenet.es

--Apple-Mail=_4EF5464D-583C-4102-93C1-676F058D80F9-- --Apple-Mail=_D58CB7BF-E490-4736-8364-CB45AC4FB10D-- --===============7795161561793120617== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-api mailing list Xen-api@lists.xen.org http://lists.xen.org/cgi-bin/mailman/listinfo/xen-api --===============7795161561793120617==-- From xen-users-bounces@lists.xen.org Sun Jun 24 00:29:49 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 Jun 2012 00:29:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Siagf-0000Js-Tl; Sun, 24 Jun 2012 00:28:21 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Siage-0000Jm-5d for xen-users@lists.xen.org; Sun, 24 Jun 2012 00:28:21 +0000 Received: from [85.158.138.51:15436] by server-11.bemta-3.messagelabs.com id 9D/1F-02904-32F56EF4; Sun, 24 Jun 2012 00:28:19 +0000 X-Env-Sender: cdelorme@gmail.com X-Msg-Ref: server-10.tower-174.messagelabs.com!1340497696!25147010!1 X-Originating-IP: [209.85.214.173] X-SpamReason: No, hits=1.2 required=7.0 tests=HTML_20_30,HTML_MESSAGE, ML_RADAR_SPEW_LINKS_14,RCVD_BY_IP,spamassassin: X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 1563 invoked from network); 24 Jun 2012 00:28:17 -0000 Received: from mail-ob0-f173.google.com (HELO mail-ob0-f173.google.com) (209.85.214.173) by server-10.tower-174.messagelabs.com with RC4-SHA encrypted SMTP; 24 Jun 2012 00:28:17 -0000 Received: by obbta14 with SMTP id ta14so5625259obb.32 for ; Sat, 23 Jun 2012 17:28:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=c/pKV3/QaWyeqxTzY0BeIeh2i/IuUyfI8M5sV8eW+b8=; b=CYz3Bo7+yfvoY54yIHd/ecCCuDvbj3eDZ5Ecjh7h5W5G+O++OPvHzUR/LZySvmCNIM 8vBeiXII8teAAR8INi7REqhxGqTMSknPbzVSL07LltDzhJ+hc1P+WgCskOerrVfxfDxG hmgjoJr6CCYoAYAl4YxvdwFiC+b7B7JHmy88Tvm7nxnPuzPAQ5nVjp4LnDLeUG2hDdYs dIhZwwJxC2lpT3C5I8x+qAapFfKtzOKsD9CYwlnLSBiVsfD2AVE/SdcDkW1Wg8ZxCjI/ KxR7KS5RMUbXZ55aFW/Z1k6ky9vk1pT7clMZAhVH0/nW4wy8fSeI4OpjrAMEMZfDlufE 3nzg== MIME-Version: 1.0 Received: by 10.60.11.199 with SMTP id s7mr7072806oeb.49.1340497695678; Sat, 23 Jun 2012 17:28:15 -0700 (PDT) Received: by 10.76.82.132 with HTTP; Sat, 23 Jun 2012 17:28:15 -0700 (PDT) In-Reply-To: References: <4FE5E764.2040203@gmail.com> Date: Sat, 23 Jun 2012 20:28:15 -0400 Message-ID: From: Casey DeLorme To: Chris Content-Type: multipart/mixed; boundary=e89a8fb1eb0cf920f104c32cf089 Cc: xen-users@lists.xen.org Subject: Re: [Xen-users] VGA passthru troubleshooting X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --e89a8fb1eb0cf920f104c32cf089 Content-Type: multipart/alternative; boundary=e89a8fb1eb0cf920e604c32cf087 --e89a8fb1eb0cf920e604c32cf087 Content-Type: text/plain; charset=ISO-8859-1 Hello, My experience with Windows is that you have to restart the physical system before passing the card to install drivers. If you restart the system you may have to eject it from the system tray icon for safe device ejection. When you pass the card to a DomU, the card is initialized. However, Windows does not reset the card. So after that DomU is shutdown the card remains initialized. When a Windows 7 DomU boots if the card is already in an initialized state, and driver installation, removal, and 3D applications will fail. I attached a diagram as a visual aid to depict what is happening. ~Casey On Sat, Jun 23, 2012 at 3:30 PM, Chris wrote: > Thanks for the suggestion. It's taking me down a weird path. > > I attempted installation of the fglrx Linux driver, which failed > (while building the module for my domU kernel). At first I thought > perhaps it failed because an instance of X was running as the Nvidia > driver does, so I switched the Fedora VM to run level 3... and then my > monitor lit up... the one that the Fedora VM was supposed to control. > Never mind there's supposed to be no X11 in run level 3. > > As far as I can tell there's no driver bound to the device. The > /sys/bus/pci/device// directory contains no driver symlink. Also, > the lsmod listing doesn't include anything that's obviously a video > driver. So I'm guessing that's what happens when it's just pure > software rendering, but I don't really know. In any case, it's > definitely not either of the radeon or fglrx drivers. > > The configuration that produces the effect closest to what I was > aiming for has 'gfx_passthru=0', which allows me to watch boot via VNC > and then the secondary adapter takes over when gdm starts. However, I > use 'gfx_passthru=1' then I get the same behaviour as before where the > guest starts without error, but appears to hang shortly after > power-on. > > The Win7 VM behaviour is unchanged: 'gfx_passthru=0' starts booting > until the ATI driver loads and bluescreens; 'gfx_passthru=1' hangs > very early after power-on. The result is the same whether using the > latest official release driver or the latest beta driver. > > Any other ideas greatly appreciated > > _______________________________________________ > Xen-users mailing list > Xen-users@lists.xen.org > http://lists.xen.org/xen-users > --e89a8fb1eb0cf920e604c32cf087 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable
Hello,

My experience with Windows is tha= t you have to restart the physical system before passing the card to instal= l drivers.

If you restart the system you may have = to eject it from the system tray icon for safe device ejection.

When you pass the card to a DomU, the card is initializ= ed. =A0However, Windows does not reset the card. =A0So after that DomU is s= hutdown the card remains initialized.

When a Windo= ws 7 DomU boots if the card is already in an initialized state, and driver = installation, removal, and 3D applications will fail.

I attached a diagram as a visual aid to depict what is = happening.

~Casey

On Sat, Jun 23, 2012 at 3:30 PM, Chris <kavefish@gmail.com&= gt; wrote:
Thanks for the suggestion. It's taking m= e down a weird path.

I attempted installation of the fglrx Linux driver, which failed
(while building the module for my domU kernel). At first I thought
perhaps it failed because an instance of X was running as the Nvidia
driver does, so I switched the Fedora VM to run level 3... and then my
monitor lit up... the one that the Fedora VM was supposed to control.
Never mind there's supposed to be no X11 in run level 3.

As far as I can tell there's no driver bound to the device. The
/sys/bus/pci/device/<BFD>/ directory contains no driver symlink. Also= ,
the lsmod listing doesn't include anything that's obviously a video=
driver. So I'm guessing that's what happens when it's just pure=
software rendering, but I don't really know. =A0In any case, it's definitely not either of the radeon or fglrx drivers.

The configuration that produces the effect closest to what I was
aiming for has 'gfx_passthru=3D0', which allows me to watch boot vi= a VNC
and then the secondary adapter takes over when gdm starts. However, =A0I use 'gfx_passthru=3D1' then I get the same behaviour as before wher= e the
guest starts without error, but appears to hang shortly after
power-on.

The Win7 VM behaviour is unchanged: 'gfx_passthru=3D0' starts booti= ng
until the ATI driver loads and bluescreens; 'gfx_passthru=3D1' =A0h= angs
very early after power-on. The result is the same whether using the
latest official release driver or the latest beta driver.

Any other ideas greatly appreciated

_______________________________________________
Xen-users mailing list
Xen-users@list= s.xen.org
http://lists.x= en.org/xen-users

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Received: by 10.64.95.131 with HTTP; Mon, 25 Jun 2012 15:47:56 -0700 (PDT) In-Reply-To: References: Date: Mon, 25 Jun 2012 18:47:56 -0400 Message-ID: From: Casey DeLorme To: Radoslaw Szkodzinski Content-Type: multipart/mixed; boundary=14dae9341237ede20e04c353c535 Cc: xen-users@lists.xen.org Subject: Re: [Xen-users] PCI Passthrough, Radeon 7950 and Windows 7 64-bit X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --14dae9341237ede20e04c353c535 Content-Type: multipart/alternative; boundary=14dae9341237ede20304c353c533 --14dae9341237ede20304c353c533 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hello, I am fairly certain you are experiencing the second-boot degradation, probably combined with a half-working driver installation. I will try to explain it but the topic is fairly complex and difficult to comprehend without a solid understanding of what is happening. I have attached a flowchart as a visual aid to depict the problem. When Xen, the physical machine, boots the card is passed and the state remains "uninitialized". If the card were to be initialized normally, rebooting the physical machine would reset the state due to a change in power supplied to the card. So the question to ask is how does a virtual machine reset physical hardware? Tobias Geiger wrote up an email on the subject of FLR (Function Level Reset), which I believe is the virtual machine solution to resetting device state. Windows fails to issue an FLR to passed GPU's. The first pass to Windows works great because it is the first time the card is "initialized", but Windows does not reset the device when you shutdown or restart it. With me so far? His email chains also suggested a solution, which was to use the safely remove hardware menu when the system has started back up, this restores the state of the card (your monitor will go black for a few seconds as the card resets). However, now you are stuck at the crossroads because you can't get to the second restart due to a BlueScreen. I would be almost certain that you are receiving a bluescreen because the driver installation was run on a second boot previously, where the card state had been initialized during a previous boot of the system. This "first boot" is still under investigation, I believe it initializes if you pass it to another VM, or if you pass it during the installation process, but I haven't spent the time to verify this. Most people will boot into safe mode and remove the drivers via VNC Console, but if you do this during a second boot without resetting the card first, you will end up with leftover .NET data that prevents ATI Driver Installation AND cannot be removed, meaning you would need to reinstall Windows. So, my suggestion to you is to reboot the physical system, boot Windows and remove the drivers. Reboot the physical system a second time to be sure, and install the drivers again during first boot of Windows. Then give it another spin. If this did not make sense, please let me know where I lost you and I will try to explain it better. ~Casey On Mon, Jun 25, 2012 at 11:32 AM, Radoslaw Szkodzinski < astralstorm@gmail.com> wrote: > On Mon, Jun 25, 2012 at 5:21 PM, Matthias > wrote: > > Maybe you should give xm a try just to see if it does the trick. I > > never got vga passthrough working with xl (and from my understanding, > > it's a lot mor complicated there with compiling the vga bios into xen > > and manual calculating vga adress ranges.. with xm, I'm doing neither > > of it). > > Why? I'm not using the VGA Passthrough, The card is set up as a secondary= . > That shouldn't need any VGA BIOS. Also, it works fine for the first > boot very well! > > The problem occurs on the second start of the same VM. > > > Also, do you increase the log level for xen? my kernel line is: > > multiboot /boot/xen.gz dom0_mem=3D2048M iommu=3D1 loglvl=3Dall guest_lo= glvl=3Dall > > Will do. (except dom0_mem) > > > What kernel are you using? If you want i can provide my build commands > > for the xen-patched openSuse Kernel.. > > I don't want to use the XenLinux kernel. PVOps only please. > Unless the Xen kernel is actually Pvops-based, in which case why would > I want to use OpenSUSE one instead of vanilla? > > As I've mentioned, vanilla 3.4.1. > > -- > Rados=C5=82aw Szkodzi=C5=84ski > > _______________________________________________ > Xen-users mailing list > Xen-users@lists.xen.org > http://lists.xen.org/xen-users > --14dae9341237ede20304c353c533 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Hello,

I am fairly certain you are experienci= ng the second-boot degradation, probably combined with a half-working drive= r installation.

I will try to explain it but the t= opic is fairly complex and difficult to comprehend without a solid understa= nding of what is happening.

I have attached a flowchart as a visual aid to depict t= he problem.


When Xen, the physical = machine, boots the card is passed and the state remains "uninitialized= ". =C2=A0If the card were to be initialized normally, rebooting the ph= ysical machine would reset the state due to a change in power supplied to t= he card.

So the question to ask is how does a virtual machine re= set physical hardware? =C2=A0Tobias Geiger wrote up an email on the subject= of FLR (Function Level Reset), which I believe is the virtual machine solu= tion to resetting device state.

Windows fails to issue an FLR to passed GPU's.


The first pass to Windows works great b= ecause it is the first time the card is "initialized", but Window= s does not reset the device when you shutdown or restart it.

With me so far?

His email chai= ns also suggested a solution, which was to use the safely remove hardware m= enu when the system has started back up, this restores the state of the car= d (your monitor will go black for a few seconds as the card resets).


However, now you are stuck at the crossr= oads because you can't get to the second restart due to a BlueScreen.

I would be almost certain that you are receiving a = bluescreen because the driver installation was run on a second boot previou= sly, where the card state had been initialized during a previous boot of th= e system.

This "first boot" is still under investigatio= n, I believe it initializes if you pass it to another VM, or if you pass it= during the installation process, but I haven't spent the time to verif= y this.


Most people will boot into safe mode and= remove the drivers via VNC Console, but if you do this during a second boo= t without resetting the card first, you will end up with leftover .NET data= that prevents ATI Driver Installation AND cannot be removed, meaning you w= ould need to reinstall Windows.



So, my suggestion to you = is to reboot the physical system, boot Windows and remove the drivers. =C2= =A0Reboot the physical system a second time to be sure, and install the dri= vers again during first boot of Windows.

Then give it another spin.

If = this did not make sense, please let me know where I lost you and I will try= to explain it better.

~Casey

On Mon, Jun 25, 2012 at 11:32 AM, Radoslaw Szkodzinski &l= t;astralstorm@gm= ail.com> wrote:
On Mon, Jun 25, 2012 at 5:21 PM, Matthias
<matthias.kannenbe= rg@googlemail.com> wrote:
> Maybe you should give xm a try just to see if it does the trick. I
> never got vga passthrough working with xl (and from my understanding,<= br> > it's a lot mor complicated there with compiling the vga bios into = xen
> and manual calculating vga adress ranges.. with xm, I'm doing neit= her
> of it).

Why? I'm not using the VGA Passthrough, The card is set up as a s= econdary.
That shouldn't need any VGA BIOS. Also, it works fine for the first
boot very well!

The problem occurs on the second start of the same VM.

> Also, do you increase the log level for xen? my kernel line is:
> multiboot /boot/xen.gz dom0_mem=3D2048M iommu=3D1 loglvl=3Dall guest_l= oglvl=3Dall

Will do. (except dom0_mem)

> What kernel are you using? If you want i can provide my build commands=
> for the xen-patched openSuse Kernel..

I don't want to use the XenLinux kernel. PVOps only please.
Unless the Xen kernel is actually Pvops-based, in which case why would
I want to use OpenSUSE one instead of vanilla?

As I've mentioned, vanilla 3.4.1.

--
Rados=C5=82aw Szkodzi=C5=84ski

_______________________________________________
Xen-users mailing list
Xen-users@lists.xen.org
http://lists.x= en.org/xen-users

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Tue Jun 26 10:41:54 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 Jun 2012 10:41:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SjTDQ-0006Ez-HM; Tue, 26 Jun 2012 10:41:48 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ShNXg-0001Gq-EF for xen-devel@lists.xensource.com; Wed, 20 Jun 2012 16:14:05 +0000 Received: from [85.158.143.99:44428] by server-3.bemta-4.messagelabs.com id DF/11-05808-BC6F1EF4; Wed, 20 Jun 2012 16:14:03 +0000 X-Env-Sender: jinsong.liu@intel.com X-Msg-Ref: server-10.tower-216.messagelabs.com!1340208832!21915062!1 X-Originating-IP: [143.182.124.37] X-SpamReason: No, hits=0.0 required=7.0 tests=Known-good attachment (ppt) X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 29049 invoked from network); 20 Jun 2012 16:13:52 -0000 Received: from mga14.intel.com (HELO mga14.intel.com) (143.182.124.37) by server-10.tower-216.messagelabs.com with SMTP; 20 Jun 2012 16:13:52 -0000 Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga102.ch.intel.com with ESMTP; 20 Jun 2012 09:13:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="ppt'32?scan'32,208,32";a="114261987" Received: from fmsmsx108.amr.corp.intel.com ([10.19.9.228]) by AZSMGA002.ch.intel.com with ESMTP; 20 Jun 2012 09:13:49 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.19.9.52) by FMSMSX108.amr.corp.intel.com (10.19.9.228) with Microsoft SMTP Server (TLS) id 14.1.355.2; Wed, 20 Jun 2012 09:13:48 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX101.amr.corp.intel.com (10.19.9.52) with Microsoft SMTP Server (TLS) id 14.1.355.2; Wed, 20 Jun 2012 09:13:46 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.87]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.126]) with mapi id 14.01.0355.002; Thu, 21 Jun 2012 00:13:39 +0800 From: "Liu, Jinsong" To: Jan Beulich , Keir Fraser Thread-Topic: [vMCE design RFC] Xen vMCE design Thread-Index: Ac1O/6XAexbUH0BVTLGVMLMLWAtaJw== Date: Wed, 20 Jun 2012 16:13:38 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: multipart/mixed; boundary="_002_DE8DF0795D48FD4CA783C40EC829233524C532SHSMSX101ccrcorpi_" MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 26 Jun 2012 10:41:46 +0000 Cc: "Luck, Tony" , "Raj, Ashok" , "Jiang, Yunhong" , "Shan, Haitao" , "linux-kernel@vger.kernel.org" , "Dugger, Donald D" , "Auld, Will" , "xen-devel@lists.xensource.com" , "Nakajima, Jun" , "Zhang, Xiantao" Subject: [Xen-devel] [vMCE design RFC] Xen vMCE design X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --_002_DE8DF0795D48FD4CA783C40EC829233524C532SHSMSX101ccrcorpi_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Jan, Keir, Recently we design xen vMCE as attached. Please kindly help me to review it, any comments/suggestions are appreciate= d. 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//////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////// /////////1IAbwBvAHQAIABFAG4AdAByAHkAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAWAAUB//////////8DAAAAEI2BZJtPzxGG6gCqALkp6AAAAAAAAAAAAAAA AAAAAAAAAAAA/v///wAAAAAAAAAAUABpAGMAdAB1AHIAZQBzAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAABIAAgH///////////////8AAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAArm4CAAAAAABDAHUAcgByAGUAbgB0ACAAVQBzAGUA cgAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAGgACAQEAAAD///////// /wAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAALEDAAAAEAAAAAAAAAUAUwB1AG0A bQBhAHIAeQBJAG4AZgBvAHIAbQBhAHQAaQBvAG4AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAo AAIBAgAAAAUAAAD/////AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAUgMAAMyt AAAAAAAAUABvAHcAZQByAFAAbwBpAG4AdAAgAEQAbwBjAHUAbQBlAG4AdAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAACgAAgH///////////////8AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAA4AQAA/zIEAAAAAAAFAEQAbwBjAHUAbQBlAG4AdABTAHUAbQBtAGEAcgB5AEkAbgBm AG8AcgBtAGEAdABpAG8AbgAAAAAAAAAAAAAAOAACAQQAAAD//////////wAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAKkDAAAAEAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA//////////////// AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAD///////////////8AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA= --_002_DE8DF0795D48FD4CA783C40EC829233524C532SHSMSX101ccrcorpi_ Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --_002_DE8DF0795D48FD4CA783C40EC829233524C532SHSMSX101ccrcorpi_-- From xen-devel-bounces@lists.xen.org Wed Jun 27 03:52:39 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 Jun 2012 03:52:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SjjIY-0006To-SI; Wed, 27 Jun 2012 03:52:10 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SjjIW-0006Tj-FJ for xen-devel@lists.xensource.com; Wed, 27 Jun 2012 03:52:09 +0000 Received: from [85.158.139.83:59293] by server-11.bemta-5.messagelabs.com id 51/9C-20400-7638AEF4; Wed, 27 Jun 2012 03:52:07 +0000 X-Env-Sender: jinsong.liu@intel.com X-Msg-Ref: server-9.tower-182.messagelabs.com!1340769121!28988428!1 X-Originating-IP: [143.182.124.21] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTQzLjE4Mi4xMjQuMjEgPT4gMzAwMzg0\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 14830 invoked from network); 27 Jun 2012 03:52:02 -0000 Received: from mga03.intel.com (HELO mga03.intel.com) (143.182.124.21) by server-9.tower-182.messagelabs.com with SMTP; 27 Jun 2012 03:52:02 -0000 Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga101.ch.intel.com with ESMTP; 26 Jun 2012 20:52:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="pdf'?scan'208";a="116396146" Received: from fmsmsx108.amr.corp.intel.com ([10.19.9.228]) by AZSMGA002.ch.intel.com with ESMTP; 26 Jun 2012 20:51:59 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX108.amr.corp.intel.com (10.19.9.228) with Microsoft SMTP Server (TLS) id 14.1.355.2; Tue, 26 Jun 2012 20:51:58 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.87]) by SHSMSX102.ccr.corp.intel.com ([169.254.2.47]) with mapi id 14.01.0355.002; Wed, 27 Jun 2012 11:51:54 +0800 From: "Liu, Jinsong" To: Jan Beulich , Keir Fraser , "Auld, Will" Thread-Topic: [xen vMCE RFC V0.2] xen vMCE design Thread-Index: Ac1UGDBj1l9vq4iTRyWE8p2SJy8j9w== Date: Wed, 27 Jun 2012 03:51:54 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: multipart/mixed; boundary="_002_DE8DF0795D48FD4CA783C40EC829233525D395SHSMSX101ccrcorpi_" MIME-Version: 1.0 Cc: "Luck, Tony" , "Raj, Ashok" , "Jiang, Yunhong" , "Shan, Haitao" , "linux-kernel@vger.kernel.org" , "Dugger, Donald D" , "xen-devel@lists.xensource.com" , "Nakajima, Jun" , "Li, Susie" , "Zhang, Xiantao" Subject: [Xen-devel] [xen vMCE RFC V0.2] xen vMCE design X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org --_002_DE8DF0795D48FD4CA783C40EC829233525D395SHSMSX101ccrcorpi_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi, This is updated xen vMCE design foils, according to comments from community= recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it's some dense. Later Will will present a document to elaborate more, including Intel MCA a= nd surrounding features and Xen implementation. Thanks, Jinsong= --_002_DE8DF0795D48FD4CA783C40EC829233525D395SHSMSX101ccrcorpi_ Content-Type: application/pdf; name="xen vMCE design (v0 2).pdf" Content-Description: xen vMCE design (v0 2).pdf Content-Disposition: attachment; filename="xen vMCE design (v0 2).pdf"; size=256622; creation-date="Wed, 27 Jun 2012 03:21:05 GMT"; modification-date="Wed, 27 Jun 2012 03:18:50 GMT" Content-Transfer-Encoding: base64 JVBERi0xLjUNCiW1tbW1DQoxIDAgb2JqDQo8PC9UeXBlL0NhdGFsb2cvUGFnZXMgMiAwIFIvTGFu Zyhlbi1VUykgL1N0cnVjdFRyZWVSb290IDc4IDAgUi9NYXJrSW5mbzw8L01hcmtlZCB0cnVlPj4+ Pg0KZW5kb2JqDQoyIDAgb2JqDQo8PC9UeXBlL1BhZ2VzL0NvdW50IDE0L0tpZHNbIDMgMCBSIDE0 IDAgUiA0MSAwIFIgNTQgMCBSIDU2IDAgUiA1OCAwIFIgNjAgMCBSIDYyIDAgUiA2NSAwIFIgNjcg MCBSIDY5IDAgUiA3MSAwIFIgNzMgMCBSIDc1IDAgUl0gPj4NCmVuZG9iag0KMyAwIG9iag0KPDwv VHlwZS9QYWdlL1BhcmVudCAyIDAgUi9SZXNvdXJjZXM8PC9YT2JqZWN0PDwvSW1hZ2U1IDUgMCBS L0ltYWdlNiA2IDAgUi9JbWFnZTcgNyAwIFIvSW1hZ2U4IDggMCBSPj4vRm9udDw8L0YxIDkgMCBS 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_______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --_002_DE8DF0795D48FD4CA783C40EC829233525D395SHSMSX101ccrcorpi_-- From xen-users-bounces@lists.xen.org Wed Jun 27 11:12:54 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 Jun 2012 11:12:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SjqAB-0004OF-Ib; Wed, 27 Jun 2012 11:11:59 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Sjmvf-0008Dz-7O for xen-users@lists.xen.org; Wed, 27 Jun 2012 07:44:49 +0000 Received: from [85.158.139.83:52384] by server-2.bemta-5.messagelabs.com id 93/FF-04598-EE9BAEF4; Wed, 27 Jun 2012 07:44:46 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-8.tower-182.messagelabs.com!1340783084!18443849!1 X-Originating-IP: [62.200.22.115] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjIuMjAwLjIyLjExNSA9PiAxMDI5OTE=\n X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 8376 invoked from network); 27 Jun 2012 07:44:44 -0000 Received: from smtp.eu.citrix.com (HELO SMTP.EU.CITRIX.COM) (62.200.22.115) by server-8.tower-182.messagelabs.com with RC4-SHA encrypted SMTP; 27 Jun 2012 07:44:44 -0000 X-IronPort-AV: E=Sophos;i="4.77,483,1336348800"; d="c'?scan'208,104";a="13238094" Received: from lonpmailmx01.citrite.net ([10.30.203.162]) by LONPIPO01.EU.CITRIX.COM with ESMTP/TLS/RC4-MD5; 27 Jun 2012 07:44:42 +0000 Received: from [127.0.0.1] (10.80.16.67) by smtprelay.citrix.com (10.30.203.162) with Microsoft SMTP Server id 8.3.213.0; Wed, 27 Jun 2012 08:44:38 +0100 Message-ID: <1340783078.14761.11.camel@dagon.hellion.org.uk> From: Ian Campbell To: Shane Johnson Date: Wed, 27 Jun 2012 08:44:38 +0100 In-Reply-To: References: <4FEA2557.3000309@ondore.com> Organization: Citrix Systems, Inc. Content-Type: multipart/mixed; boundary="=-W0jqgMXqf7/puYFACUP1" X-Mailer: Evolution 3.2.2-1+b1 MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jun 2012 11:11:57 +0000 Cc: "xen-users@lists.xen.org" , Alexandre Kouznetsov Subject: Re: [Xen-users] HVM help please - wrong GRUB entry? X-BeenThere: xen-users@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen user discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-users-bounces@lists.xen.org Errors-To: xen-users-bounces@lists.xen.org --=-W0jqgMXqf7/puYFACUP1 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit On Tue, 2012-06-26 at 22:26 +0100, Shane Johnson wrote: > On Tue, Jun 26, 2012 at 3:10 PM, Alexandre Kouznetsov wrote: > > Hello. > > > > Can you please show your grub.cfg, and the output of "ls -l /boot"? > > Specify what section of your grub.cfg is used when the "not an ELF binary" > > error occur. > > > > -- > > Alexandre Kouznetsov > > > > > > _______________________________________________ > > Xen-users mailing list > > Xen-users@lists.xen.org > > http://lists.xen.org/xen-users > > ls -l /boot > -rw-r--r-- 1 root root 2007679 Jun 3 16:44 System.map-3.2.0-0.bpo.2-amd64 > -rw-r--r-- 1 root root 2024845 Jun 3 17:15 System.map-3.2.0-0.bpo.2-rt-amd64 > -rw-r--r-- 1 root root 2052633 Jun 21 15:02 System.map-3.2.18 > -rw-r--r-- 1 root root 129015 Jun 3 16:44 config-3.2.0-0.bpo.2-amd64 > -rw-r--r-- 1 root root 128580 Jun 3 17:15 config-3.2.0-0.bpo.2-rt-amd64 > -rw-r--r-- 1 root root 128623 Jun 21 13:21 config-3.2.18 > drwxr-xr-x 3 root root 4096 Jun 26 14:04 grub > -rw-r--r-- 1 root root 11186911 Jun 25 16:13 initrd.img-3.2.0-0.bpo.2-amd64 > -rw-r--r-- 1 root root 11305992 Jun 25 16:13 initrd.img-3.2.0-0.bpo.2-rt-amd64 > -rw-r--r-- 1 root root 11133522 Jun 25 16:21 initrd.img-3.2.18 > -rw-r--r-- 1 root root 2695559 Jun 25 16:18 initrd.img-vmlinuz-3.2.18-xen-amd64 > -rw-r--r-- 1 root root 2846608 Jun 3 16:41 vmlinuz-3.2.0-0.bpo.2-amd64 > -rw-r--r-- 1 root root 2895120 Jun 3 17:13 vmlinuz-3.2.0-0.bpo.2-rt-amd64 > -rw-r--r-- 1 root root 2937200 Jun 26 14:08 vmlinuz-3.2.18 > -rw-r--r-- 1 root root 11733424 Jun 26 14:07 vmlinuz-3.2.18-new > -rw-r--r-- 1 root root 678554 Jun 9 2011 xen-4.0-amd64.gz > > Entry that causes panic - Is it just this one or are others faulty too? Do the bpo kernels work? What about the 2.6.32-xen kernel from Squeeze proper (as an experiment). I think you can ignore any concerns about pciback hiding here -- your failure is well before that would make any difference. [...] > module /boot/vmlinuz-3.2.18 placeholder root=/dev/mapper/vg-base ro > quiet xen-pciback.hide=(05.00.0)(05:00.1) What does file /boot/vmlinuz-3.2.18 say? What about this using the attached bzexplode: ./bzexplode /boot/vmlinuz-3.2.18 | file - and then, depending on the type of compression that reports: ./bzexplode /boot/vmlinuz-3.2.18 | zcat | file - (exchange zcat for the appropriate FOOcat, although if it isn't gzip then that would be a good thing to fix first). > echo 'Loading initial ramdisk ...' > module /boot/initrd.img-3.2.18 > > Full boot.cfg attached. > --=-W0jqgMXqf7/puYFACUP1 Content-Disposition: attachment; filename="bzexplode.c" Content-Type: text/x-csrc; name="bzexplode.c"; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit #include #include #include #include #include #include #include #include #include int main(int argc, char **argv) { int fd; struct stat sb; void *p; uint8_t *hdr; int setup_sectors; uint32_t compressed_payload_offset; uint32_t compressed_payload_length; if (argc != 2) errx(1, "usage: bzexplode "); fd = open(argv[1], O_RDONLY); if (fd < 0) err(1, "open"); if (fstat(fd, &sb) < 0) err(1, "fstat"); p = mmap(0, sb.st_size, PROT_READ, MAP_SHARED, fd, 0); if (p == MAP_FAILED) err(1, "mmap"); hdr = p; setup_sectors = hdr[0x1f1]; compressed_payload_offset = *(uint32_t*)&hdr[0x248]; fprintf(stderr, "setup sectors %d\n", setup_sectors); compressed_payload_offset += (setup_sectors+1) * 512; //compressed_payload_length = *(uint32_t*)(p + compressed_payload_offset - 4); compressed_payload_length = *(uint32_t*)&hdr[0x24c]; fprintf(stderr, "compressed_payload_offset %"PRIx32" (abs)\n", compressed_payload_offset); fprintf(stderr, "compressed_payload_length %"PRIx32"\n", compressed_payload_length); write(1, p + compressed_payload_offset, compressed_payload_length); return 0; } --=-W0jqgMXqf7/puYFACUP1 Content-Type: application/x-executable; name="bzexplode" Content-Disposition: attachment; filename="bzexplode" Content-Transfer-Encoding: base64 f0VMRgEBAQAAAAAAAAAAAAIAAwABAAAAMIEECDQAAADE1wcAAAAAADQAIAAFACgAIQAeAAEAAAAA AAAAAIAECACABAjUjQcA1I0HAAUAAAAAEAAAAQAAAACQBwAAEAwIABAMCKAHAACsIgAABgAAAAAQ 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TENfSURFTlRJRklDQVRJT04AX2RsX25zAF9ubF9sb2FkX2xvY2FsZV9mcm9tX2FyY2hpdmUAd2N0 cmFucwA= --=-W0jqgMXqf7/puYFACUP1 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users --=-W0jqgMXqf7/puYFACUP1-- From xen-devel-bounces@lists.xen.org Wed Jun 27 11:13:47 2012 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 Jun 2012 11:13:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1SjqBi-0004ib-KF; Wed, 27 Jun 2012 11:13:34 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Sjo1X-0001E3-ND for xen-devel@lists.xensource.com; Wed, 27 Jun 2012 08:55:00 +0000 Received: from [85.158.138.51:15062] by server-8.bemta-3.messagelabs.com id C3/12-06157-E5ACAEF4; Wed, 27 Jun 2012 08:54:54 +0000 X-Env-Sender: fantonifabio@tiscali.it X-Msg-Ref: server-7.tower-174.messagelabs.com!1340787276!20836528!1 X-Originating-IP: [82.57.200.101] X-SpamReason: No, hits=0.0 required=7.0 tests=ML_RADAR_SPEW_LINKS_14, spamassassin: X-StarScan-Version: 6.5.10; banners=-,-,- X-VirusChecked: Checked Received: (qmail 16236 invoked from network); 27 Jun 2012 08:54:36 -0000 Received: from smtp205.alice.it (HELO smtp205.alice.it) (82.57.200.101) by server-7.tower-174.messagelabs.com with SMTP; 27 Jun 2012 08:54:36 -0000 Received: from [192.168.178.50] (82.50.150.238) by smtp205.alice.it (8.6.023.02) id 4F421F7B0F1B7C20 for xen-devel@lists.xensource.com; Wed, 27 Jun 2012 10:54:33 +0200 Message-ID: <4FEACA2B.4040400@tiscali.it> Date: Wed, 27 Jun 2012 10:54:03 +0200 From: Fabio Fantoni User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:12.0) Gecko/20120428 Thunderbird/12.0.1 MIME-Version: 1.0 To: "xen-devel@lists.xensource.com" X-Mailman-Approved-At: Wed, 27 Jun 2012 11:13:32 +0000 Subject: [Xen-devel] Build error with xen-unstable changeset 25517:c6c9d20963d7 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list Reply-To: fantonifabio@tiscali.it List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============7158966147011069039==" Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org Questo è un messaggio firmato digitalmente in formato MIME. --===============7158966147011069039== Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha1; boundary="------------ms060008070700000805000102" Questo è un messaggio firmato digitalmente in formato MIME. --------------ms060008070700000805000102 Content-Type: multipart/mixed; boundary="------------030803080800070300000702" This is a multi-part message in MIME format. --------------030803080800070300000702 Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: quoted-printable I had built on Wheezy updated xen-unstable changeset 25517:c6c9d20963d7=20 and I had this build error: drivers/bus/isa.c: In function =E2isabus_probe=E2: drivers/bus/isa.c:112:18: error: array subscript is above array bounds=20 [-Werror=3Darray-bounds] cc1: all warnings being treated as errors make[7]: *** [bin/isa.o] Error 1 make[7]: Leaving directory=20 `/mnt/vm/xen/xen-unstable.hg/tools/firmware/etherboot/ipxe/src' make[6]: *** [ipxe/src/bin/rtl8139.rom] Error 2 make[6]: Leaving directory=20 `/mnt/vm/xen/xen-unstable.hg/tools/firmware/etherboot' make[5]: *** [subdir-all-etherboot] Error 2 make[5]: Leaving directory `/mnt/vm/xen/xen-unstable.hg/tools/firmware' make[4]: *** [subdirs-all] Error 2 make[4]: Leaving directory `/mnt/vm/xen/xen-unstable.hg/tools/firmware' make[3]: *** [all] Error 2 make[3]: Leaving directory `/mnt/vm/xen/xen-unstable.hg/tools/firmware' make[2]: *** [subdir-install-firmware] Error 2 make[2]: Leaving directory `/mnt/vm/xen/xen-unstable.hg/tools' make[1]: *** [subdirs-install] Error 2 make[1]: Leaving directory `/mnt/vm/xen/xen-unstable.hg/tools' make: *** [install-tools] Error 2 In attachment full log file. If you need some additional info please notify me, thanks for any reply. --------------030803080800070300000702 Content-Type: text/plain; charset=windows-1252; name="xenbuild.log" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="xenbuild.log" cm9vdEB2ZmFybTovbW50L3ZtL3hlbi94ZW4tdW5zdGFibGUuaGcjIG1ha2UgZGViDQptYWtl IC1DIHhlbiBpbnN0YWxsDQptYWtlWzFdOiBFbnRlcmluZyBkaXJlY3RvcnkgYC9tbnQvdm0v eGVuL3hlbi11bnN0YWJsZS5oZy94ZW4nDQptYWtlIC1mIFJ1bGVzLm1rIF9pbnN0YWxsDQpt YWtlWzJdOiBFbnRlcmluZyBkaXJlY3RvcnkgYC9tbnQvdm0veGVuL3hlbi11bnN0YWJsZS5o Zy94ZW4nDQptYWtlIC1DIHRvb2xzDQptYWtlWzNdOiBFbnRlcmluZyBkaXJlY3RvcnkgYC9t bnQvdm0veGVuL3hlbi11bnN0YWJsZS5oZy94ZW4vdG9vbHMnDQpbIC1kIGZpZ2xldCBdICYm IG1ha2UgLUMgZmlnbGV0DQptYWtlWzRdOiBFbnRlcmluZyBkaXJlY3RvcnkgYC9tbnQvdm0v eGVuL3hlbi11bnN0YWJsZS5oZy94ZW4vdG9vbHMvZmlnbGV0Jw0KZ2NjIC1vIGZpZ2xldCBm aWdsZXQuYw0KbWFrZVs0XTogTGVhdmluZyBkaXJlY3RvcnkgYC9tbnQvdm0veGVuL3hlbi11 bnN0YWJsZS5oZy94ZW4vdG9vbHMvZmlnbGV0Jw0KbWFrZSBzeW1ib2xzDQptYWtlWzRdOiBF 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