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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/libs/ctrl: rename and export do_memory_op as xc_memory_op
Message-Id: <E1nwIg8-0005gi-JJ@xenbits.xenproject.org>
Date: Wed, 01 Jun 2022 07:22:04 +0000

commit 108d145df8d5401c7fafc3a7056d2ecce1288794
Author:     Tamas K Lengyel <tamas.lengyel@intel.com>
AuthorDate: Wed Jun 1 09:18:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:18:30 2022 +0200

    tools/libs/ctrl: rename and export do_memory_op as xc_memory_op
    
    Make the do_memory_op function accessible to tools linking with libxc.
    Similar functions are already available for both domctl and sysctl. As part
    of this patch we also change the input 'cmd' to be unsigned int to accurately
    reflect what the hypervisor expects.
    
    Signed-off-by: Tamas K Lengyel <tamas.lengyel@intel.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/include/xenctrl.h                |  1 +
 tools/libs/ctrl/xc_domain.c            | 28 ++++++++++++++--------------
 tools/libs/ctrl/xc_mem_access.c        |  6 +++---
 tools/libs/ctrl/xc_mem_paging.c        |  2 +-
 tools/libs/ctrl/xc_memshr.c            |  8 ++++----
 tools/libs/ctrl/xc_private.c           |  6 +++---
 tools/libs/ctrl/xc_private.h           |  2 --
 tools/libs/guest/xg_dom_boot.c         |  6 +++---
 tools/libs/guest/xg_sr_common_x86_pv.c |  2 +-
 9 files changed, 30 insertions(+), 31 deletions(-)

diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h
index 159eaac050..5464a68eb2 100644
--- a/tools/include/xenctrl.h
+++ b/tools/include/xenctrl.h
@@ -1597,6 +1597,7 @@ int xc_vmtrace_set_option(xc_interface *xch, uint32_t domid,
 
 int xc_domctl(xc_interface *xch, struct xen_domctl *domctl);
 int xc_sysctl(xc_interface *xch, struct xen_sysctl *sysctl);
+long xc_memory_op(xc_interface *xch, unsigned int cmd, void *arg, size_t len);
 
 int xc_version(xc_interface *xch, int cmd, void *arg);
 
diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index 71608c00e9..14c0420c35 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -736,7 +736,7 @@ int xc_domain_set_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(fmap.map.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_set_memory_map, &fmap, sizeof(fmap));
+    rc = xc_memory_op(xch, XENMEM_set_memory_map, &fmap, sizeof(fmap));
 
     xc_hypercall_bounce_post(xch, entries);
 
@@ -760,7 +760,7 @@ int xc_get_machine_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(memmap.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_machine_memory_map, &memmap, sizeof(memmap));
+    rc = xc_memory_op(xch, XENMEM_machine_memory_map, &memmap, sizeof(memmap));
 
     xc_hypercall_bounce_post(xch, entries);
 
@@ -814,7 +814,7 @@ int xc_reserved_device_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(xrdmmap.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_reserved_device_memory_map,
+    rc = xc_memory_op(xch, XENMEM_reserved_device_memory_map,
                       &xrdmmap, sizeof(xrdmmap));
 
     xc_hypercall_bounce_post(xch, entries);
@@ -879,7 +879,7 @@ int xc_domain_get_tsc_info(xc_interface *xch,
 int xc_domain_maximum_gpfn(xc_interface *xch, uint32_t domid, xen_pfn_t *gpfns)
 {
     struct xen_memory_domain dom = { .domid = domid };
-    long rc = do_memory_op(xch, XENMEM_maximum_gpfn, &dom, sizeof(dom));
+    long rc = xc_memory_op(xch, XENMEM_maximum_gpfn, &dom, sizeof(dom));
 
     if ( rc >= 0 )
     {
@@ -924,7 +924,7 @@ int xc_domain_increase_reservation(xc_interface *xch,
 
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_increase_reservation, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_increase_reservation, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
 
@@ -987,7 +987,7 @@ int xc_domain_decrease_reservation(xc_interface *xch,
     }
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_decrease_reservation, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_decrease_reservation, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
 
@@ -1031,7 +1031,7 @@ int xc_domain_add_to_physmap(xc_interface *xch,
         .idx = idx,
         .gpfn = gpfn,
     };
-    return do_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
+    return xc_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
 }
 
 int xc_domain_add_to_physmap_batch(xc_interface *xch,
@@ -1068,7 +1068,7 @@ int xc_domain_add_to_physmap_batch(xc_interface *xch,
     set_xen_guest_handle(xatp_batch.gpfns, gpfns);
     set_xen_guest_handle(xatp_batch.errs, errs);
 
-    rc = do_memory_op(xch, XENMEM_add_to_physmap_batch,
+    rc = xc_memory_op(xch, XENMEM_add_to_physmap_batch,
                       &xatp_batch, sizeof(xatp_batch));
 
 out:
@@ -1087,7 +1087,7 @@ int xc_domain_remove_from_physmap(xc_interface *xch,
         .domid = domid,
         .gpfn = gpfn,
     };
-    return do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
+    return xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
 }
 
 int xc_domain_claim_pages(xc_interface *xch,
@@ -1104,7 +1104,7 @@ int xc_domain_claim_pages(xc_interface *xch,
 
     set_xen_guest_handle(reservation.extent_start, HYPERCALL_BUFFER_NULL);
 
-    err = do_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation));
     /* Ignore it if the hypervisor does not support the call. */
     if (err == -1 && errno == ENOSYS)
         err = errno = 0;
@@ -1134,7 +1134,7 @@ int xc_domain_populate_physmap(xc_interface *xch,
     }
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_populate_physmap, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_populate_physmap, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
     return err;
@@ -1197,7 +1197,7 @@ int xc_domain_memory_exchange_pages(xc_interface *xch,
     set_xen_guest_handle(exchange.in.extent_start, in_extents);
     set_xen_guest_handle(exchange.out.extent_start, out_extents);
 
-    rc = do_memory_op(xch, XENMEM_exchange, &exchange, sizeof(exchange));
+    rc = xc_memory_op(xch, XENMEM_exchange, &exchange, sizeof(exchange));
 
 out:
     xc_hypercall_bounce_post(xch, in_extents);
@@ -1227,7 +1227,7 @@ static int xc_domain_pod_target(xc_interface *xch,
         .target_pages = target_pages
     };
 
-    err = do_memory_op(xch, op, &pod_target, sizeof(pod_target));
+    err = xc_memory_op(xch, op, &pod_target, sizeof(pod_target));
 
     if ( err < 0 )
         DPRINTF("Failed %s_pod_target dom %d\n",
@@ -2178,7 +2178,7 @@ int xc_domain_getvnuma(xc_interface *xch,
     vnuma_topo.domid = domid;
     vnuma_topo.pad = 0;
 
-    rc = do_memory_op(xch, XENMEM_get_vnumainfo, &vnuma_topo,
+    rc = xc_memory_op(xch, XENMEM_get_vnumainfo, &vnuma_topo,
                       sizeof(vnuma_topo));
 
     *nr_vnodes = vnuma_topo.nr_vnodes;
diff --git a/tools/libs/ctrl/xc_mem_access.c b/tools/libs/ctrl/xc_mem_access.c
index b452460e32..6d613037d0 100644
--- a/tools/libs/ctrl/xc_mem_access.c
+++ b/tools/libs/ctrl/xc_mem_access.c
@@ -38,7 +38,7 @@ int xc_set_mem_access(xc_interface *xch,
         .nr     = nr
     };
 
-    return do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    return xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 }
 
 int xc_set_mem_access_multi(xc_interface *xch,
@@ -71,7 +71,7 @@ int xc_set_mem_access_multi(xc_interface *xch,
     set_xen_guest_handle(mao.pfn_list, pages);
     set_xen_guest_handle(mao.access_list, access);
 
-    rc = do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    rc = xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 
     xc_hypercall_bounce_post(xch, access);
     xc_hypercall_bounce_post(xch, pages);
@@ -92,7 +92,7 @@ int xc_get_mem_access(xc_interface *xch,
         .pfn   = pfn
     };
 
-    rc = do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    rc = xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 
     if ( rc == 0 )
         *access = mao.access;
diff --git a/tools/libs/ctrl/xc_mem_paging.c b/tools/libs/ctrl/xc_mem_paging.c
index 738f63ac20..999a572cef 100644
--- a/tools/libs/ctrl/xc_mem_paging.c
+++ b/tools/libs/ctrl/xc_mem_paging.c
@@ -47,7 +47,7 @@ static int xc_mem_paging_memop(xc_interface *xch, uint32_t domain_id,
         set_xen_guest_handle(mpo.buffer, buffer);
     }
 
-    rc = do_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo));
+    rc = xc_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo));
 
     if ( buffer )
         xc_hypercall_bounce_post(xch, buffer);
diff --git a/tools/libs/ctrl/xc_memshr.c b/tools/libs/ctrl/xc_memshr.c
index a0d0b894e2..2f65b3b22e 100644
--- a/tools/libs/ctrl/xc_memshr.c
+++ b/tools/libs/ctrl/xc_memshr.c
@@ -71,7 +71,7 @@ static int xc_memshr_memop(xc_interface *xch, uint32_t domid,
 {
     mso->domain = domid;
 
-    return do_memory_op(xch, XENMEM_sharing_op, mso, sizeof(*mso));
+    return xc_memory_op(xch, XENMEM_sharing_op, mso, sizeof(*mso));
 }
 
 int xc_memshr_nominate_gfn(xc_interface *xch,
@@ -280,15 +280,15 @@ int xc_memshr_audit(xc_interface *xch)
 
     mso.op = XENMEM_sharing_op_audit;
 
-    return do_memory_op(xch, XENMEM_sharing_op, &mso, sizeof(mso));
+    return xc_memory_op(xch, XENMEM_sharing_op, &mso, sizeof(mso));
 }
 
 long xc_sharing_freed_pages(xc_interface *xch)
 {
-    return do_memory_op(xch, XENMEM_get_sharing_freed_pages, NULL, 0);
+    return xc_memory_op(xch, XENMEM_get_sharing_freed_pages, NULL, 0);
 }
 
 long xc_sharing_used_frames(xc_interface *xch)
 {
-    return do_memory_op(xch, XENMEM_get_sharing_shared_pages, NULL, 0);
+    return xc_memory_op(xch, XENMEM_get_sharing_shared_pages, NULL, 0);
 }
diff --git a/tools/libs/ctrl/xc_private.c b/tools/libs/ctrl/xc_private.c
index c0422662f0..2f99a7d2cf 100644
--- a/tools/libs/ctrl/xc_private.c
+++ b/tools/libs/ctrl/xc_private.c
@@ -326,7 +326,7 @@ int xc_flush_mmu_updates(xc_interface *xch, struct xc_mmu *mmu)
     return flush_mmu_updates(xch, mmu);
 }
 
-long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len)
+long xc_memory_op(xc_interface *xch, unsigned int cmd, void *arg, size_t len)
 {
     DECLARE_HYPERCALL_BOUNCE(arg, len, XC_HYPERCALL_BUFFER_BOUNCE_BOTH);
     long ret = -1;
@@ -386,7 +386,7 @@ long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len)
 
 int xc_maximum_ram_page(xc_interface *xch, unsigned long *max_mfn)
 {
-    long rc = do_memory_op(xch, XENMEM_maximum_ram_page, NULL, 0);
+    long rc = xc_memory_op(xch, XENMEM_maximum_ram_page, NULL, 0);
 
     if ( rc >= 0 )
     {
@@ -428,7 +428,7 @@ int xc_machphys_mfn_list(xc_interface *xch,
     }
 
     set_xen_guest_handle(xmml.extent_start, extent_start);
-    rc = do_memory_op(xch, XENMEM_machphys_mfn_list, &xmml, sizeof(xmml));
+    rc = xc_memory_op(xch, XENMEM_machphys_mfn_list, &xmml, sizeof(xmml));
     if (rc || xmml.nr_extents != max_extents)
         rc = -1;
     else
diff --git a/tools/libs/ctrl/xc_private.h b/tools/libs/ctrl/xc_private.h
index ebdf78c2bf..ed960c6f30 100644
--- a/tools/libs/ctrl/xc_private.h
+++ b/tools/libs/ctrl/xc_private.h
@@ -367,8 +367,6 @@ static inline int do_multicall_op(xc_interface *xch,
     return ret;
 }
 
-long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len);
-
 void *xc_map_foreign_ranges(xc_interface *xch, uint32_t dom,
                             size_t size, int prot, size_t chunksize,
                             privcmd_mmap_entry_t entries[], int nentries);
diff --git a/tools/libs/guest/xg_dom_boot.c b/tools/libs/guest/xg_dom_boot.c
index f809dcbe97..263a3f4c85 100644
--- a/tools/libs/guest/xg_dom_boot.c
+++ b/tools/libs/guest/xg_dom_boot.c
@@ -348,7 +348,7 @@ static int compat_gnttab_hvm_seed(xc_interface *xch, uint32_t domid,
     xc_dom_printf(xch, "%s: d%d: pfn=0x%"PRI_xen_pfn, __func__,
                   domid, scratch_gfn);
 
-    rc = do_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
+    rc = xc_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
     if ( rc != 0 )
     {
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
@@ -366,12 +366,12 @@ static int compat_gnttab_hvm_seed(xc_interface *xch, uint32_t domid,
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
                      "%s: failed to seed gnttab entries for d%d\n",
                      __func__, domid);
-        (void) do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp,
+        (void) xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp,
                             sizeof(xrfp));
         return -1;
     }
 
-    rc = do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
+    rc = xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
     if (rc != 0)
     {
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
diff --git a/tools/libs/guest/xg_sr_common_x86_pv.c b/tools/libs/guest/xg_sr_common_x86_pv.c
index c0acf00f90..1fa2821e91 100644
--- a/tools/libs/guest/xg_sr_common_x86_pv.c
+++ b/tools/libs/guest/xg_sr_common_x86_pv.c
@@ -161,7 +161,7 @@ int x86_pv_map_m2p(struct xc_sr_context *ctx)
             .extent_start = { &ctx->x86.pv.compat_m2p_mfn0 },
         };
 
-        rc = do_memory_op(xch, XENMEM_machphys_compat_mfn_list,
+        rc = xc_memory_op(xch, XENMEM_machphys_compat_mfn_list,
                           &xmml, sizeof(xmml));
         if ( rc || xmml.nr_extents != 1 )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libxl: don't leak self pipes
Message-Id: <E1nwIgI-0005iy-Mg@xenbits.xenproject.org>
Date: Wed, 01 Jun 2022 07:22:14 +0000

commit 7fbebfa5406dadd82ba2e650282715dacf771133
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Wed Jun 1 09:18:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:18:49 2022 +0200

    libxl: don't leak self pipes
    
    libxl is leaking self pipes to child processes.  These can be seen when
    running with env var _LIBXL_DEBUG_EXEC_FDS=1:
    
    libxl: debug: libxl_aoutils.c:593:libxl__async_exec_start: forking to execute: /etc/xen/scripts/vif-bridge online
    [Detaching after fork from child process 5099]
    libxl: execing /etc/xen/scripts/vif-bridge: fd 4 is open to pipe:[46805] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 13 is open to pipe:[46807] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 14 is open to pipe:[46807] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 19 is open to pipe:[48570] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 20 is open to pipe:[48570] with flags 0
    
    (fd 3 is also open, but the check only starts at 4 for some reason.)
    
    For xl, this is the poller created by libxl_ctx_alloc, the poller
    created by do_domain_create -> libxl__ao_create, and the self pipe for
    libxl__sigchld_needed.  Set CLOEXEC on the FDs so they are not leaked
    into children.
    
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/libs/light/libxl_event.c | 3 +++
 tools/libs/light/libxl_fork.c  | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/tools/libs/light/libxl_event.c b/tools/libs/light/libxl_event.c
index c8bcd13960..8d24613921 100644
--- a/tools/libs/light/libxl_event.c
+++ b/tools/libs/light/libxl_event.c
@@ -1800,6 +1800,9 @@ int libxl__poller_init(libxl__gc *gc, libxl__poller *p)
     rc = libxl__pipe_nonblock(CTX, p->wakeup_pipe);
     if (rc) goto out;
 
+    libxl_fd_set_cloexec(CTX, p->wakeup_pipe[0], 1);
+    libxl_fd_set_cloexec(CTX, p->wakeup_pipe[1], 1);
+
     return 0;
 
  out:
diff --git a/tools/libs/light/libxl_fork.c b/tools/libs/light/libxl_fork.c
index 676a14bb28..b13659d231 100644
--- a/tools/libs/light/libxl_fork.c
+++ b/tools/libs/light/libxl_fork.c
@@ -387,6 +387,8 @@ int libxl__sigchld_needed(libxl__gc *gc) /* non-reentrant, idempotent */
     if (CTX->sigchld_selfpipe[0] < 0) {
         rc = libxl__pipe_nonblock(CTX, CTX->sigchld_selfpipe);
         if (rc) goto out;
+        libxl_fd_set_cloexec(CTX, CTX->sigchld_selfpipe[0], 1);
+        libxl_fd_set_cloexec(CTX, CTX->sigchld_selfpipe[1], 1);
     }
     if (!libxl__ev_fd_isregistered(&CTX->sigchld_selfpipe_efd)) {
         rc = libxl__ev_fd_register(gc, &CTX->sigchld_selfpipe_efd,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86: harden use of calc_ler_msr()
Message-Id: <E1nwIgS-0005ji-Pq@xenbits.xenproject.org>
Date: Wed, 01 Jun 2022 07:22:24 +0000

commit 58ce5b6c33ecae76f2e9fc5213a56e98c3be4be5
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 1 09:19:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:19:25 2022 +0200

    x86: harden use of calc_ler_msr()
    
    Avoid calling the function more than once, thus making sure we won't,
    under any unusual circumstances, attempt to enable XEN_LER late (which
    can't work, for setup_force_cpu_cap() being __init. In turn this then
    allows making the function itself __init, too.
    
    While fiddling with section attributes in this area, also move the two
    involved variables to .data.ro_after_init.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/traps.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 25bffe47d7..0a5e42595c 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -126,11 +126,11 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_page, tss_page);
 static int debug_stack_lines = 20;
 integer_param("debug_stack_lines", debug_stack_lines);
 
-static bool opt_ler;
+static bool __ro_after_init opt_ler;
 boolean_param("ler", opt_ler);
 
 /* LastExceptionFromIP on this hardware.  Zero if LER is not in use. */
-unsigned int __read_mostly ler_msr;
+unsigned int __ro_after_init ler_msr;
 
 const unsigned int nmi_cpu;
 
@@ -2133,7 +2133,7 @@ static void __init set_intr_gate(unsigned int n, void *addr)
     __set_intr_gate(n, 0, addr);
 }
 
-static unsigned int calc_ler_msr(void)
+static unsigned int noinline __init calc_ler_msr(void)
 {
     switch ( boot_cpu_data.x86_vendor )
     {
@@ -2171,8 +2171,17 @@ void percpu_traps_init(void)
     if ( !opt_ler )
         return;
 
-    if ( !ler_msr && (ler_msr = calc_ler_msr()) )
+    if ( !ler_msr )
+    {
+        ler_msr = calc_ler_msr();
+        if ( !ler_msr )
+        {
+            opt_ler = false;
+            return;
+        }
+
         setup_force_cpu_cap(X86_FEATURE_XEN_LBR);
+    }
 
     if ( cpu_has_xen_lbr )
         wrmsrl(MSR_IA32_DEBUGCTLMSR, IA32_DEBUGCTLMSR_LBR);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] init-dom0less: better snprintf checks
Message-Id: <E1nwK85-0003bg-Tt@xenbits.xenproject.org>
Date: Wed, 01 Jun 2022 08:55:01 +0000

commit 09a6a71097e3e7d28eaa0f55e8f2c4b879c299f5
Author:     Stefano Stabellini <stefano.stabellini@xilinx.com>
AuthorDate: Tue May 24 16:35:44 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue May 31 13:01:24 2022 -0700

    init-dom0less: better snprintf checks
    
    snprintf returns the number of characters that would have been written
    to the final string if enough space had been available. A return value
    of size or more means that the output was truncated.
    
    Add a check for that in init-dom0less.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 tools/helpers/init-dom0less.c | 38 ++++++++++++++++++++++----------------
 1 file changed, 22 insertions(+), 16 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index 42e74c4153..4c90dd6a0c 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -48,14 +48,16 @@ static bool do_xs_write_dom(struct xs_handle *xsh, xs_transaction_t t,
 {
     char full_path[STR_MAX_LENGTH];
     struct xs_permissions perms[2];
+    int rc;
 
     perms[0].id = domid;
     perms[0].perms = XS_PERM_NONE;
     perms[1].id = 0;
     perms[1].perms = XS_PERM_READ;
 
-    if (snprintf(full_path, STR_MAX_LENGTH,
-                 "/local/domain/%u/%s", domid, path) < 0)
+    rc = snprintf(full_path, STR_MAX_LENGTH,
+                  "/local/domain/%u/%s", domid, path);
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return false;
     if (!xs_write(xsh, t, full_path, val, strlen(val)))
         return false;
@@ -66,9 +68,11 @@ static bool do_xs_write_libxl(struct xs_handle *xsh, xs_transaction_t t,
                               domid_t domid, char *path, char *val)
 {
     char full_path[STR_MAX_LENGTH];
+    int rc;
 
-    if (snprintf(full_path, STR_MAX_LENGTH,
-                 "/libxl/%u/%s", domid, path) < 0)
+    rc = snprintf(full_path, STR_MAX_LENGTH,
+                  "/libxl/%u/%s", domid, path);
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return false;
     return xs_write(xsh, t, full_path, val, strlen(val));
 }
@@ -77,9 +81,11 @@ static bool do_xs_write_vm(struct xs_handle *xsh, xs_transaction_t t,
                            libxl_uuid uuid, char *path, char *val)
 {
     char full_path[STR_MAX_LENGTH];
+    int rc;
 
-    if (snprintf(full_path, STR_MAX_LENGTH,
-                 "/vm/" LIBXL_UUID_FMT "/%s", LIBXL_UUID_BYTES(uuid), path) < 0)
+    rc = snprintf(full_path, STR_MAX_LENGTH,
+                  "/vm/" LIBXL_UUID_FMT "/%s", LIBXL_UUID_BYTES(uuid), path);
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return false;
     return xs_write(xsh, t, full_path, val, strlen(val));
 }
@@ -115,35 +121,35 @@ static int create_xenstore(struct xs_handle *xsh,
         return -errno;
     rc = snprintf(start_time_str, STR_MAX_LENGTH, "%jd.%02d",
             (intmax_t)start_time.tv_sec, (int)start_time.tv_usec / 10000);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
 
     domid = info->domid;
     rc = snprintf(id_str, STR_MAX_LENGTH, "%u", domid);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(dom_name_str, STR_MAX_LENGTH, "dom0less-%u", domid);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(uuid_str, STR_MAX_LENGTH, LIBXL_UUID_FMT, LIBXL_UUID_BYTES(uuid));
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(vm_val_str, STR_MAX_LENGTH,
                   "vm/" LIBXL_UUID_FMT, LIBXL_UUID_BYTES(uuid));
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(max_memkb_str, STR_MAX_LENGTH, "%lu", info->max_memkb);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(target_memkb_str, STR_MAX_LENGTH, "%lu", info->current_memkb);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(ring_ref_str, STR_MAX_LENGTH, "%lld",
                   (GUEST_MAGIC_BASE >> XC_PAGE_SHIFT) + XENSTORE_PFN_OFFSET);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
     rc = snprintf(xenstore_port_str, STR_MAX_LENGTH, "%u", xenstore_port);
-    if (rc < 0)
+    if (rc < 0 || rc >= STR_MAX_LENGTH)
         return rc;
 
 retry_transaction:
@@ -163,7 +169,7 @@ retry_transaction:
     if (!do_xs_write_dom(xsh, t, domid, "cpu", "")) goto err;
     for (i = 0; i < info->vcpu_max_id; i++) {
         rc = snprintf(cpu_str, STR_MAX_LENGTH, "cpu/%u/availability/", i);
-        if (rc < 0)
+        if (rc < 0 || rc >= STR_MAX_LENGTH)
             goto err;
         rc = -EIO;
         if (!do_xs_write_dom(xsh, t, domid, cpu_str,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/libs/ctrl: rename and export do_memory_op as xc_memory_op
Message-Id: <E1nweyz-0000OS-Ix@xenbits.xenproject.org>
Date: Thu, 02 Jun 2022 07:11:01 +0000

commit 108d145df8d5401c7fafc3a7056d2ecce1288794
Author:     Tamas K Lengyel <tamas.lengyel@intel.com>
AuthorDate: Wed Jun 1 09:18:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:18:30 2022 +0200

    tools/libs/ctrl: rename and export do_memory_op as xc_memory_op
    
    Make the do_memory_op function accessible to tools linking with libxc.
    Similar functions are already available for both domctl and sysctl. As part
    of this patch we also change the input 'cmd' to be unsigned int to accurately
    reflect what the hypervisor expects.
    
    Signed-off-by: Tamas K Lengyel <tamas.lengyel@intel.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/include/xenctrl.h                |  1 +
 tools/libs/ctrl/xc_domain.c            | 28 ++++++++++++++--------------
 tools/libs/ctrl/xc_mem_access.c        |  6 +++---
 tools/libs/ctrl/xc_mem_paging.c        |  2 +-
 tools/libs/ctrl/xc_memshr.c            |  8 ++++----
 tools/libs/ctrl/xc_private.c           |  6 +++---
 tools/libs/ctrl/xc_private.h           |  2 --
 tools/libs/guest/xg_dom_boot.c         |  6 +++---
 tools/libs/guest/xg_sr_common_x86_pv.c |  2 +-
 9 files changed, 30 insertions(+), 31 deletions(-)

diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h
index 159eaac050..5464a68eb2 100644
--- a/tools/include/xenctrl.h
+++ b/tools/include/xenctrl.h
@@ -1597,6 +1597,7 @@ int xc_vmtrace_set_option(xc_interface *xch, uint32_t domid,
 
 int xc_domctl(xc_interface *xch, struct xen_domctl *domctl);
 int xc_sysctl(xc_interface *xch, struct xen_sysctl *sysctl);
+long xc_memory_op(xc_interface *xch, unsigned int cmd, void *arg, size_t len);
 
 int xc_version(xc_interface *xch, int cmd, void *arg);
 
diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index 71608c00e9..14c0420c35 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -736,7 +736,7 @@ int xc_domain_set_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(fmap.map.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_set_memory_map, &fmap, sizeof(fmap));
+    rc = xc_memory_op(xch, XENMEM_set_memory_map, &fmap, sizeof(fmap));
 
     xc_hypercall_bounce_post(xch, entries);
 
@@ -760,7 +760,7 @@ int xc_get_machine_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(memmap.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_machine_memory_map, &memmap, sizeof(memmap));
+    rc = xc_memory_op(xch, XENMEM_machine_memory_map, &memmap, sizeof(memmap));
 
     xc_hypercall_bounce_post(xch, entries);
 
@@ -814,7 +814,7 @@ int xc_reserved_device_memory_map(xc_interface *xch,
 
     set_xen_guest_handle(xrdmmap.buffer, entries);
 
-    rc = do_memory_op(xch, XENMEM_reserved_device_memory_map,
+    rc = xc_memory_op(xch, XENMEM_reserved_device_memory_map,
                       &xrdmmap, sizeof(xrdmmap));
 
     xc_hypercall_bounce_post(xch, entries);
@@ -879,7 +879,7 @@ int xc_domain_get_tsc_info(xc_interface *xch,
 int xc_domain_maximum_gpfn(xc_interface *xch, uint32_t domid, xen_pfn_t *gpfns)
 {
     struct xen_memory_domain dom = { .domid = domid };
-    long rc = do_memory_op(xch, XENMEM_maximum_gpfn, &dom, sizeof(dom));
+    long rc = xc_memory_op(xch, XENMEM_maximum_gpfn, &dom, sizeof(dom));
 
     if ( rc >= 0 )
     {
@@ -924,7 +924,7 @@ int xc_domain_increase_reservation(xc_interface *xch,
 
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_increase_reservation, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_increase_reservation, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
 
@@ -987,7 +987,7 @@ int xc_domain_decrease_reservation(xc_interface *xch,
     }
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_decrease_reservation, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_decrease_reservation, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
 
@@ -1031,7 +1031,7 @@ int xc_domain_add_to_physmap(xc_interface *xch,
         .idx = idx,
         .gpfn = gpfn,
     };
-    return do_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
+    return xc_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
 }
 
 int xc_domain_add_to_physmap_batch(xc_interface *xch,
@@ -1068,7 +1068,7 @@ int xc_domain_add_to_physmap_batch(xc_interface *xch,
     set_xen_guest_handle(xatp_batch.gpfns, gpfns);
     set_xen_guest_handle(xatp_batch.errs, errs);
 
-    rc = do_memory_op(xch, XENMEM_add_to_physmap_batch,
+    rc = xc_memory_op(xch, XENMEM_add_to_physmap_batch,
                       &xatp_batch, sizeof(xatp_batch));
 
 out:
@@ -1087,7 +1087,7 @@ int xc_domain_remove_from_physmap(xc_interface *xch,
         .domid = domid,
         .gpfn = gpfn,
     };
-    return do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
+    return xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
 }
 
 int xc_domain_claim_pages(xc_interface *xch,
@@ -1104,7 +1104,7 @@ int xc_domain_claim_pages(xc_interface *xch,
 
     set_xen_guest_handle(reservation.extent_start, HYPERCALL_BUFFER_NULL);
 
-    err = do_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_claim_pages, &reservation, sizeof(reservation));
     /* Ignore it if the hypervisor does not support the call. */
     if (err == -1 && errno == ENOSYS)
         err = errno = 0;
@@ -1134,7 +1134,7 @@ int xc_domain_populate_physmap(xc_interface *xch,
     }
     set_xen_guest_handle(reservation.extent_start, extent_start);
 
-    err = do_memory_op(xch, XENMEM_populate_physmap, &reservation, sizeof(reservation));
+    err = xc_memory_op(xch, XENMEM_populate_physmap, &reservation, sizeof(reservation));
 
     xc_hypercall_bounce_post(xch, extent_start);
     return err;
@@ -1197,7 +1197,7 @@ int xc_domain_memory_exchange_pages(xc_interface *xch,
     set_xen_guest_handle(exchange.in.extent_start, in_extents);
     set_xen_guest_handle(exchange.out.extent_start, out_extents);
 
-    rc = do_memory_op(xch, XENMEM_exchange, &exchange, sizeof(exchange));
+    rc = xc_memory_op(xch, XENMEM_exchange, &exchange, sizeof(exchange));
 
 out:
     xc_hypercall_bounce_post(xch, in_extents);
@@ -1227,7 +1227,7 @@ static int xc_domain_pod_target(xc_interface *xch,
         .target_pages = target_pages
     };
 
-    err = do_memory_op(xch, op, &pod_target, sizeof(pod_target));
+    err = xc_memory_op(xch, op, &pod_target, sizeof(pod_target));
 
     if ( err < 0 )
         DPRINTF("Failed %s_pod_target dom %d\n",
@@ -2178,7 +2178,7 @@ int xc_domain_getvnuma(xc_interface *xch,
     vnuma_topo.domid = domid;
     vnuma_topo.pad = 0;
 
-    rc = do_memory_op(xch, XENMEM_get_vnumainfo, &vnuma_topo,
+    rc = xc_memory_op(xch, XENMEM_get_vnumainfo, &vnuma_topo,
                       sizeof(vnuma_topo));
 
     *nr_vnodes = vnuma_topo.nr_vnodes;
diff --git a/tools/libs/ctrl/xc_mem_access.c b/tools/libs/ctrl/xc_mem_access.c
index b452460e32..6d613037d0 100644
--- a/tools/libs/ctrl/xc_mem_access.c
+++ b/tools/libs/ctrl/xc_mem_access.c
@@ -38,7 +38,7 @@ int xc_set_mem_access(xc_interface *xch,
         .nr     = nr
     };
 
-    return do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    return xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 }
 
 int xc_set_mem_access_multi(xc_interface *xch,
@@ -71,7 +71,7 @@ int xc_set_mem_access_multi(xc_interface *xch,
     set_xen_guest_handle(mao.pfn_list, pages);
     set_xen_guest_handle(mao.access_list, access);
 
-    rc = do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    rc = xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 
     xc_hypercall_bounce_post(xch, access);
     xc_hypercall_bounce_post(xch, pages);
@@ -92,7 +92,7 @@ int xc_get_mem_access(xc_interface *xch,
         .pfn   = pfn
     };
 
-    rc = do_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
+    rc = xc_memory_op(xch, XENMEM_access_op, &mao, sizeof(mao));
 
     if ( rc == 0 )
         *access = mao.access;
diff --git a/tools/libs/ctrl/xc_mem_paging.c b/tools/libs/ctrl/xc_mem_paging.c
index 738f63ac20..999a572cef 100644
--- a/tools/libs/ctrl/xc_mem_paging.c
+++ b/tools/libs/ctrl/xc_mem_paging.c
@@ -47,7 +47,7 @@ static int xc_mem_paging_memop(xc_interface *xch, uint32_t domain_id,
         set_xen_guest_handle(mpo.buffer, buffer);
     }
 
-    rc = do_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo));
+    rc = xc_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo));
 
     if ( buffer )
         xc_hypercall_bounce_post(xch, buffer);
diff --git a/tools/libs/ctrl/xc_memshr.c b/tools/libs/ctrl/xc_memshr.c
index a0d0b894e2..2f65b3b22e 100644
--- a/tools/libs/ctrl/xc_memshr.c
+++ b/tools/libs/ctrl/xc_memshr.c
@@ -71,7 +71,7 @@ static int xc_memshr_memop(xc_interface *xch, uint32_t domid,
 {
     mso->domain = domid;
 
-    return do_memory_op(xch, XENMEM_sharing_op, mso, sizeof(*mso));
+    return xc_memory_op(xch, XENMEM_sharing_op, mso, sizeof(*mso));
 }
 
 int xc_memshr_nominate_gfn(xc_interface *xch,
@@ -280,15 +280,15 @@ int xc_memshr_audit(xc_interface *xch)
 
     mso.op = XENMEM_sharing_op_audit;
 
-    return do_memory_op(xch, XENMEM_sharing_op, &mso, sizeof(mso));
+    return xc_memory_op(xch, XENMEM_sharing_op, &mso, sizeof(mso));
 }
 
 long xc_sharing_freed_pages(xc_interface *xch)
 {
-    return do_memory_op(xch, XENMEM_get_sharing_freed_pages, NULL, 0);
+    return xc_memory_op(xch, XENMEM_get_sharing_freed_pages, NULL, 0);
 }
 
 long xc_sharing_used_frames(xc_interface *xch)
 {
-    return do_memory_op(xch, XENMEM_get_sharing_shared_pages, NULL, 0);
+    return xc_memory_op(xch, XENMEM_get_sharing_shared_pages, NULL, 0);
 }
diff --git a/tools/libs/ctrl/xc_private.c b/tools/libs/ctrl/xc_private.c
index c0422662f0..2f99a7d2cf 100644
--- a/tools/libs/ctrl/xc_private.c
+++ b/tools/libs/ctrl/xc_private.c
@@ -326,7 +326,7 @@ int xc_flush_mmu_updates(xc_interface *xch, struct xc_mmu *mmu)
     return flush_mmu_updates(xch, mmu);
 }
 
-long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len)
+long xc_memory_op(xc_interface *xch, unsigned int cmd, void *arg, size_t len)
 {
     DECLARE_HYPERCALL_BOUNCE(arg, len, XC_HYPERCALL_BUFFER_BOUNCE_BOTH);
     long ret = -1;
@@ -386,7 +386,7 @@ long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len)
 
 int xc_maximum_ram_page(xc_interface *xch, unsigned long *max_mfn)
 {
-    long rc = do_memory_op(xch, XENMEM_maximum_ram_page, NULL, 0);
+    long rc = xc_memory_op(xch, XENMEM_maximum_ram_page, NULL, 0);
 
     if ( rc >= 0 )
     {
@@ -428,7 +428,7 @@ int xc_machphys_mfn_list(xc_interface *xch,
     }
 
     set_xen_guest_handle(xmml.extent_start, extent_start);
-    rc = do_memory_op(xch, XENMEM_machphys_mfn_list, &xmml, sizeof(xmml));
+    rc = xc_memory_op(xch, XENMEM_machphys_mfn_list, &xmml, sizeof(xmml));
     if (rc || xmml.nr_extents != max_extents)
         rc = -1;
     else
diff --git a/tools/libs/ctrl/xc_private.h b/tools/libs/ctrl/xc_private.h
index ebdf78c2bf..ed960c6f30 100644
--- a/tools/libs/ctrl/xc_private.h
+++ b/tools/libs/ctrl/xc_private.h
@@ -367,8 +367,6 @@ static inline int do_multicall_op(xc_interface *xch,
     return ret;
 }
 
-long do_memory_op(xc_interface *xch, int cmd, void *arg, size_t len);
-
 void *xc_map_foreign_ranges(xc_interface *xch, uint32_t dom,
                             size_t size, int prot, size_t chunksize,
                             privcmd_mmap_entry_t entries[], int nentries);
diff --git a/tools/libs/guest/xg_dom_boot.c b/tools/libs/guest/xg_dom_boot.c
index f809dcbe97..263a3f4c85 100644
--- a/tools/libs/guest/xg_dom_boot.c
+++ b/tools/libs/guest/xg_dom_boot.c
@@ -348,7 +348,7 @@ static int compat_gnttab_hvm_seed(xc_interface *xch, uint32_t domid,
     xc_dom_printf(xch, "%s: d%d: pfn=0x%"PRI_xen_pfn, __func__,
                   domid, scratch_gfn);
 
-    rc = do_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
+    rc = xc_memory_op(xch, XENMEM_add_to_physmap, &xatp, sizeof(xatp));
     if ( rc != 0 )
     {
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
@@ -366,12 +366,12 @@ static int compat_gnttab_hvm_seed(xc_interface *xch, uint32_t domid,
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
                      "%s: failed to seed gnttab entries for d%d\n",
                      __func__, domid);
-        (void) do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp,
+        (void) xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp,
                             sizeof(xrfp));
         return -1;
     }
 
-    rc = do_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
+    rc = xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp));
     if (rc != 0)
     {
         xc_dom_panic(xch, XC_INTERNAL_ERROR,
diff --git a/tools/libs/guest/xg_sr_common_x86_pv.c b/tools/libs/guest/xg_sr_common_x86_pv.c
index c0acf00f90..1fa2821e91 100644
--- a/tools/libs/guest/xg_sr_common_x86_pv.c
+++ b/tools/libs/guest/xg_sr_common_x86_pv.c
@@ -161,7 +161,7 @@ int x86_pv_map_m2p(struct xc_sr_context *ctx)
             .extent_start = { &ctx->x86.pv.compat_m2p_mfn0 },
         };
 
-        rc = do_memory_op(xch, XENMEM_machphys_compat_mfn_list,
+        rc = xc_memory_op(xch, XENMEM_machphys_compat_mfn_list,
                           &xmml, sizeof(xmml));
         if ( rc || xmml.nr_extents != 1 )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libxl: don't leak self pipes
Message-Id: <E1nwez9-0000PL-MQ@xenbits.xenproject.org>
Date: Thu, 02 Jun 2022 07:11:11 +0000

commit 7fbebfa5406dadd82ba2e650282715dacf771133
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Wed Jun 1 09:18:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:18:49 2022 +0200

    libxl: don't leak self pipes
    
    libxl is leaking self pipes to child processes.  These can be seen when
    running with env var _LIBXL_DEBUG_EXEC_FDS=1:
    
    libxl: debug: libxl_aoutils.c:593:libxl__async_exec_start: forking to execute: /etc/xen/scripts/vif-bridge online
    [Detaching after fork from child process 5099]
    libxl: execing /etc/xen/scripts/vif-bridge: fd 4 is open to pipe:[46805] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 13 is open to pipe:[46807] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 14 is open to pipe:[46807] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 19 is open to pipe:[48570] with flags 0
    libxl: execing /etc/xen/scripts/vif-bridge: fd 20 is open to pipe:[48570] with flags 0
    
    (fd 3 is also open, but the check only starts at 4 for some reason.)
    
    For xl, this is the poller created by libxl_ctx_alloc, the poller
    created by do_domain_create -> libxl__ao_create, and the self pipe for
    libxl__sigchld_needed.  Set CLOEXEC on the FDs so they are not leaked
    into children.
    
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/libs/light/libxl_event.c | 3 +++
 tools/libs/light/libxl_fork.c  | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/tools/libs/light/libxl_event.c b/tools/libs/light/libxl_event.c
index c8bcd13960..8d24613921 100644
--- a/tools/libs/light/libxl_event.c
+++ b/tools/libs/light/libxl_event.c
@@ -1800,6 +1800,9 @@ int libxl__poller_init(libxl__gc *gc, libxl__poller *p)
     rc = libxl__pipe_nonblock(CTX, p->wakeup_pipe);
     if (rc) goto out;
 
+    libxl_fd_set_cloexec(CTX, p->wakeup_pipe[0], 1);
+    libxl_fd_set_cloexec(CTX, p->wakeup_pipe[1], 1);
+
     return 0;
 
  out:
diff --git a/tools/libs/light/libxl_fork.c b/tools/libs/light/libxl_fork.c
index 676a14bb28..b13659d231 100644
--- a/tools/libs/light/libxl_fork.c
+++ b/tools/libs/light/libxl_fork.c
@@ -387,6 +387,8 @@ int libxl__sigchld_needed(libxl__gc *gc) /* non-reentrant, idempotent */
     if (CTX->sigchld_selfpipe[0] < 0) {
         rc = libxl__pipe_nonblock(CTX, CTX->sigchld_selfpipe);
         if (rc) goto out;
+        libxl_fd_set_cloexec(CTX, CTX->sigchld_selfpipe[0], 1);
+        libxl_fd_set_cloexec(CTX, CTX->sigchld_selfpipe[1], 1);
     }
     if (!libxl__ev_fd_isregistered(&CTX->sigchld_selfpipe_efd)) {
         rc = libxl__ev_fd_register(gc, &CTX->sigchld_selfpipe_efd,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86: harden use of calc_ler_msr()
Message-Id: <E1nwezJ-0000QM-QL@xenbits.xenproject.org>
Date: Thu, 02 Jun 2022 07:11:21 +0000

commit 58ce5b6c33ecae76f2e9fc5213a56e98c3be4be5
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 1 09:19:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 1 09:19:25 2022 +0200

    x86: harden use of calc_ler_msr()
    
    Avoid calling the function more than once, thus making sure we won't,
    under any unusual circumstances, attempt to enable XEN_LER late (which
    can't work, for setup_force_cpu_cap() being __init. In turn this then
    allows making the function itself __init, too.
    
    While fiddling with section attributes in this area, also move the two
    involved variables to .data.ro_after_init.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/traps.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 25bffe47d7..0a5e42595c 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -126,11 +126,11 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_page, tss_page);
 static int debug_stack_lines = 20;
 integer_param("debug_stack_lines", debug_stack_lines);
 
-static bool opt_ler;
+static bool __ro_after_init opt_ler;
 boolean_param("ler", opt_ler);
 
 /* LastExceptionFromIP on this hardware.  Zero if LER is not in use. */
-unsigned int __read_mostly ler_msr;
+unsigned int __ro_after_init ler_msr;
 
 const unsigned int nmi_cpu;
 
@@ -2133,7 +2133,7 @@ static void __init set_intr_gate(unsigned int n, void *addr)
     __set_intr_gate(n, 0, addr);
 }
 
-static unsigned int calc_ler_msr(void)
+static unsigned int noinline __init calc_ler_msr(void)
 {
     switch ( boot_cpu_data.x86_vendor )
     {
@@ -2171,8 +2171,17 @@ void percpu_traps_init(void)
     if ( !opt_ler )
         return;
 
-    if ( !ler_msr && (ler_msr = calc_ler_msr()) )
+    if ( !ler_msr )
+    {
+        ler_msr = calc_ler_msr();
+        if ( !ler_msr )
+        {
+            opt_ler = false;
+            return;
+        }
+
         setup_force_cpu_cap(X86_FEATURE_XEN_LBR);
+    }
 
     if ( cpu_has_xen_lbr )
         wrmsrl(MSR_IA32_DEBUGCTLMSR, IA32_DEBUGCTLMSR_LBR);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Enumeration for new Intel BHI controls
Message-Id: <E1nyGQW-00029G-A8@xenbits.xenproject.org>
Date: Mon, 06 Jun 2022 17:22:04 +0000

commit cea9ae06229577cd5b77019ce122f9cdd1568106
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Feb 18 16:02:51 2022 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 6 18:15:46 2022 +0100

    x86/spec-ctrl: Enumeration for new Intel BHI controls
    
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/msr-index.h        | 7 +++++++
 xen/include/public/arch-x86/cpufeatureset.h | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 31964b88af..6c250bfcad 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -36,7 +36,12 @@
 #define  SPEC_CTRL_IBRS                     (_AC(1, ULL) <<  0)
 #define  SPEC_CTRL_STIBP                    (_AC(1, ULL) <<  1)
 #define  SPEC_CTRL_SSBD                     (_AC(1, ULL) <<  2)
+#define  SPEC_CTRL_IPRED_DIS_U              (_AC(1, ULL) <<  3)
+#define  SPEC_CTRL_IPRED_DIS_S              (_AC(1, ULL) <<  4)
+#define  SPEC_CTRL_RRSBA_DIS_U              (_AC(1, ULL) <<  5)
+#define  SPEC_CTRL_RRSBA_DIS_S              (_AC(1, ULL) <<  6)
 #define  SPEC_CTRL_PSFD                     (_AC(1, ULL) <<  7)
+#define  SPEC_CTRL_BHI_DIS_S                (_AC(1, ULL) << 10)
 
 #define MSR_PRED_CMD                        0x00000049
 #define  PRED_CMD_IBPB                      (_AC(1, ULL) <<  0)
@@ -66,6 +71,8 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_RRSBA                    (_AC(1, ULL) << 19)
+#define  ARCH_CAPS_BHI_NO                   (_AC(1, ULL) << 20)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 0c27f5bbaf..1016989410 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -304,6 +304,9 @@ XEN_CPUFEATURE(INTEL_PPIN,         12*32+ 0) /*   Protected Processor Inventory
 
 /* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */
 XEN_CPUFEATURE(INTEL_PSFD,         13*32+ 0) /*A  MSR_SPEC_CTRL.PSFD */
+XEN_CPUFEATURE(IPRED_CTRL,         13*32+ 1) /*   MSR_SPEC_CTRL.IPRED_DIS_* */
+XEN_CPUFEATURE(RRSBA_CTRL,         13*32+ 2) /*   MSR_SPEC_CTRL.RRSBA_DIS_* */
+XEN_CPUFEATURE(BHI_CTRL,           13*32+ 4) /*   MSR_SPEC_CTRL.BHI_DIS_S */
 XEN_CPUFEATURE(MCDT_NO,            13*32+ 5) /*A  MCDT_NO */
 
 #endif /* XEN_CPUFEATURE */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] update Xen version to 4.16.2-pre
Message-Id: <E1nyY36-0000XZ-5o@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:04 +0000

commit 5be9edb482ab20cf3e7acb05b511465294d1e19b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 13:55:17 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:55:17 2022 +0200

    update Xen version to 4.16.2-pre
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 8abc71cf73..90a29782db 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -2,7 +2,7 @@
 # All other places this is stored (eg. compile.h) should be autogenerated.
 export XEN_VERSION       = 4
 export XEN_SUBVERSION    = 16
-export XEN_EXTRAVERSION ?= .1$(XEN_VENDORVERSION)
+export XEN_EXTRAVERSION ?= .2-pre$(XEN_VENDORVERSION)
 export XEN_FULLVERSION   = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION)
 -include xen-version
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/irq: skip unmap_domain_pirq XSM during destruction
Message-Id: <E1nyY3G-0000YI-93@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:14 +0000

commit b58fb6e81bd55b6bd946abc3070770f7994c9ef9
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Tue Jun 7 13:55:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:55:39 2022 +0200

    x86/irq: skip unmap_domain_pirq XSM during destruction
    
    xsm_unmap_domain_irq was seen denying unmap_domain_pirq when called from
    complete_domain_destroy as an RCU callback.  The source context was an
    unexpected, random domain.  Since this is a xen-internal operation,
    going through the XSM hook is inapproriate.
    
    Check d->is_dying and skip the XSM hook when set since this is a cleanup
    operation for a domain being destroyed.
    
    Suggested-by: Roger Pau Monné <roger.pau@citrix.com>
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 2e6f95a942d1927a53f077c301db0b799c54c05a
    master date: 2022-04-08 14:51:52 +0200
---
 xen/arch/x86/irq.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 67cbf6b979..47b86af5dc 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2342,8 +2342,14 @@ int unmap_domain_pirq(struct domain *d, int pirq)
         nr = msi_desc->msi.nvec;
     }
 
-    ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
-                               msi_desc ? msi_desc->dev : NULL);
+    /*
+     * When called by complete_domain_destroy via RCU, current is a random
+     * domain.  Skip the XSM check since this is a Xen-initiated action.
+     */
+    if ( !d->is_dying )
+        ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
+                                   msi_desc ? msi_desc->dev : NULL);
+
     if ( ret )
         goto done;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
Message-Id: <E1nyY3Q-0000ZO-C0@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:24 +0000

commit 6c6bbfdff9374ef41f84c4ebed7b8a7a40767ef6
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 13:56:54 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:56:54 2022 +0200

    xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
    
    A hypervisor built without CONFIG_GDBSX will crash in case the
    XEN_DOMCTL_gdbsx_guestmemio domctl is being called, as the call will
    end up in iommu_do_domctl() with d == NULL:
    
      (XEN) CPU:    6
      (XEN) RIP:    e008:[<ffff82d040269984>] iommu_do_domctl+0x4/0x30
      (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d0v0)
      (XEN) rax: 00000000000003e8   rbx: ffff830856277ef8   rcx: ffff830856277fff
      ...
      (XEN) Xen call trace:
      (XEN)    [<ffff82d040269984>] R iommu_do_domctl+0x4/0x30
      (XEN)    [<ffff82d04035cd5f>] S arch_do_domctl+0x7f/0x2330
      (XEN)    [<ffff82d040239e46>] S do_domctl+0xe56/0x1930
      (XEN)    [<ffff82d040238ff0>] S do_domctl+0/0x1930
      (XEN)    [<ffff82d0402f8c59>] S pv_hypercall+0x99/0x110
      (XEN)    [<ffff82d0402f5161>] S arch/x86/pv/domain.c#_toggle_guest_pt+0x11/0x90
      (XEN)    [<ffff82d040366288>] S lstar_enter+0x128/0x130
      (XEN)
      (XEN) Pagetable walk from 0000000000000144:
      (XEN)  L4[0x000] = 0000000000000000 ffffffffffffffff
      (XEN)
      (XEN) ****************************************
      (XEN) Panic on CPU 6:
      (XEN) FATAL PAGE FAULT
      (XEN) [error_code=0000]
      (XEN) Faulting linear address: 0000000000000144
      (XEN) ****************************************
    
    It used to be permitted to pass DOMID_IDLE to dbg_rw_mem(), which is why the
    special case skipping the domid checks exists.  Now that it is only permitted
    to pass proper domids, remove the special case, making 'd' always valid.
    
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Fixes: e726a82ca0dc ("xen: make gdbsx support configurable")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: f00daf1fb3213a9b0335d9dcd90fe9cb5c02b7a9
    master date: 2022-04-19 17:07:08 +0100
---
 xen/common/domctl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index 271862ae58..419e4070f5 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -304,7 +304,6 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
         if ( op->domain == DOMID_INVALID )
         {
     case XEN_DOMCTL_createdomain:
-    case XEN_DOMCTL_gdbsx_guestmemio:
             d = NULL;
             break;
         }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] VT-d: refuse to use IOMMU with reserved CAP.ND value
Message-Id: <E1nyY3a-0000a6-F4@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:34 +0000

commit b378ee56c7e0bb5eeb35dcc55b3d29e5f50eb566
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 13:58:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:58:16 2022 +0200

    VT-d: refuse to use IOMMU with reserved CAP.ND value
    
    The field taking the value 7 (resulting in 18-bit DIDs when using the
    calculation in cap_ndoms(), when the DID fields are only 16 bits wide)
    is reserved. Instead of misbehaving in case we would encounter such an
    IOMMU, refuse to use it.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    master commit: a1545fbf45c689aff39ce76a6eaa609d32ef72a7
    master date: 2022-04-20 10:54:26 +0200
---
 xen/drivers/passthrough/vtd/iommu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 93dd8aa643..8975c1de61 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1279,8 +1279,11 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     quirk_iommu_caps(iommu);
 
+    nr_dom = cap_ndoms(iommu->cap);
+
     if ( cap_fault_reg_offset(iommu->cap) +
          cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >= PAGE_SIZE ||
+         ((nr_dom - 1) >> 16) /* I.e. cap.nd > 6 */ ||
          ecap_iotlb_offset(iommu->ecap) >= PAGE_SIZE )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported\n");
@@ -1305,7 +1308,6 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
         vtd_ops.sync_cache = sync_cache;
 
     /* allocate domain id bitmap */
-    nr_dom = cap_ndoms(iommu->cap);
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
     if ( !iommu->domid_bitmap )
         return -ENOMEM;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/mm: avoid inadvertently degrading a TLB flush to local only
Message-Id: <E1nyY3k-0000b5-Ik@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:44 +0000

commit 7c003ab4a398ff4ddd54d15d4158cffb463134cc
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Jun 7 13:59:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:59:31 2022 +0200

    x86/mm: avoid inadvertently degrading a TLB flush to local only
    
    If the direct map is incorrectly modified with interrupts disabled,
    the required TLB flushes are degraded to flushing the local CPU only.
    
    This could lead to very hard to diagnose problems as different CPUs will
    end up with different views of memory. Although, no such issues have yet
    been identified.
    
    Change the check in the flush_area() macro to look at system_state
    instead. This defers the switch from local to all later in the boot
    (see xen/arch/x86/setup.c:__start_xen()). This is fine because
    additional PCPUs are not brought up until after the system state is
    SYS_STATE_smp_boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    
    x86/flushtlb: remove flush_area check on system state
    
    Booting with Shadow Stacks leads to the following assert on a debug
    hypervisor:
    
    Assertion 'local_irq_is_enabled()' failed at arch/x86/smp.c:265
    ----[ Xen-4.17.0-10.24-d  x86_64  debug=y  Not tainted ]----
    CPU:    0
    RIP:    e008:[<ffff82d040345300>] flush_area_mask+0x40/0x13e
    [...]
    Xen call trace:
       [<ffff82d040345300>] R flush_area_mask+0x40/0x13e
       [<ffff82d040338a40>] F modify_xen_mappings+0xc5/0x958
       [<ffff82d0404474f9>] F arch/x86/alternative.c#_alternative_instructions+0xb7/0xb9
       [<ffff82d0404476cc>] F alternative_branches+0xf/0x12
       [<ffff82d04044e37d>] F __start_xen+0x1ef4/0x2776
       [<ffff82d040203344>] F __high_start+0x94/0xa0
    
    This is due to SYS_STATE_smp_boot being set before calling
    alternative_branches(), and the flush in modify_xen_mappings() then
    using flush_area_all() with interrupts disabled.  Note that
    alternative_branches() is called before APs are started, so the flush
    must be a local one (and indeed the cpumask passed to
    flush_area_mask() just contains one CPU).
    
    Take the opportunity to simplify a bit the logic and make flush_area()
    an alias of flush_area_all() in mm.c, taking into account that
    cpu_online_map just contains the BSP before APs are started.  This
    requires widening the assert in flush_area_mask() to allow being
    called with interrupts disabled as long as it's strictly a local only
    flush.
    
    The overall result is that a conditional can be removed from
    flush_area().
    
    While there also introduce an ASSERT to check that a vCPU state flush
    is not issued for the local CPU only.
    
    Fixes: 78e072bc37 ('x86/mm: avoid inadvertently degrading a TLB flush to local only')
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 78e072bc375043e81691a59454e09f0b38241ddd
    master date: 2022-04-20 10:55:01 +0200
    master commit: 9f735ee4903f1b9f1966bb4ba5b5616b03ae08b5
    master date: 2022-05-25 11:09:46 +0200
---
 xen/arch/x86/mm.c  | 10 ++--------
 xen/arch/x86/smp.c |  5 ++++-
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4d799032dc..e222d9aa98 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5051,14 +5051,8 @@ l1_pgentry_t *virt_to_xen_l1e(unsigned long v)
 #define l1f_to_lNf(f) (((f) & _PAGE_PRESENT) ? ((f) |  _PAGE_PSE) : (f))
 #define lNf_to_l1f(f) (((f) & _PAGE_PRESENT) ? ((f) & ~_PAGE_PSE) : (f))
 
-/*
- * map_pages_to_xen() can be called with interrupts disabled during
- * early bootstrap. In this case it is safe to use flush_area_local()
- * and avoid locking because only the local CPU is online.
- */
-#define flush_area(v,f) (!local_irq_is_enabled() ?              \
-                         flush_area_local((const void *)v, f) : \
-                         flush_area_all((const void *)v, f))
+/* flush_area_all() can be used prior to any other CPU being online.  */
+#define flush_area(v, f) flush_area_all((const void *)(v), f)
 
 #define L3T_INIT(page) (page) = ZERO_BLOCK_PTR
 
diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index eef0f9c6cb..3556ec1166 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -262,7 +262,10 @@ void flush_area_mask(const cpumask_t *mask, const void *va, unsigned int flags)
 {
     unsigned int cpu = smp_processor_id();
 
-    ASSERT(local_irq_is_enabled());
+    /* Local flushes can be performed with interrupts disabled. */
+    ASSERT(local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu)));
+    /* Exclude use of FLUSH_VCPU_STATE for the local CPU. */
+    ASSERT(!cpumask_test_cpu(cpu, mask) || !(flags & FLUSH_VCPU_STATE));
 
     if ( (flags & ~(FLUSH_VCPU_STATE | FLUSH_ORDER_MASK)) &&
          cpumask_test_cpu(cpu, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] xen/build: Fix dependency for the MAP rule
Message-Id: <E1nyY3u-0000bp-Le@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:11:54 +0000

commit 4bb8c34ba4241c2bf7845cd8b80c17530dbfb085
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 7 14:00:09 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:00:09 2022 +0200

    xen/build: Fix dependency for the MAP rule
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    master commit: e1e72198213b80b7a82bdc90f96ed05ae4f53e20
    master date: 2022-04-20 19:10:59 +0100
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 90a29782db..ce4eca3ee4 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -507,7 +507,7 @@ cscope:
 	cscope -k -b -q
 
 .PHONY: _MAP
-_MAP:
+_MAP: $(TARGET)
 	$(NM) -n $(TARGET)-syms | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' > System.map
 
 %.o %.i %.s: %.c FORCE
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] tools/libs/evtchn: don't set errno to negative values
Message-Id: <E1nyY44-0000ch-QF@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:04 +0000

commit 13a29f3756bc4cab96c59f46c3875b483553fb8f
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:00:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:00:31 2022 +0200

    tools/libs/evtchn: don't set errno to negative values
    
    Setting errno to a negative value makes no sense.
    
    Fixes: 6b6500b3cbaa ("tools/libs/evtchn: Add support for restricting a handle")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 60245b71c1cd001686fa7b7a26869cbcb80d074c
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/evtchn/freebsd.c | 2 +-
 tools/libs/evtchn/minios.c  | 2 +-
 tools/libs/evtchn/netbsd.c  | 2 +-
 tools/libs/evtchn/solaris.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/libs/evtchn/freebsd.c b/tools/libs/evtchn/freebsd.c
index 7427ab2408..fa17a0f8db 100644
--- a/tools/libs/evtchn/freebsd.c
+++ b/tools/libs/evtchn/freebsd.c
@@ -58,7 +58,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index e5dfdc5ef5..c0bd5429ee 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -97,7 +97,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/netbsd.c b/tools/libs/evtchn/netbsd.c
index 1cebc21ffc..56409513bc 100644
--- a/tools/libs/evtchn/netbsd.c
+++ b/tools/libs/evtchn/netbsd.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/solaris.c b/tools/libs/evtchn/solaris.c
index df9579df17..beaa772142 100644
--- a/tools/libs/evtchn/solaris.c
+++ b/tools/libs/evtchn/solaris.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
     return -1;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] tools/libs/ctrl: don't set errno to a negative value
Message-Id: <E1nyY4E-0000f6-TR@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:14 +0000

commit ba62afdbc31a8cfe897191efd25ed4449d9acd94
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:03 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:03 2022 +0200

    tools/libs/ctrl: don't set errno to a negative value
    
    The claimed reason for setting errno to -1 is wrong. On x86
    xc_domain_pod_target() will set errno to a sane value in the error
    case.
    
    Fixes: ff1745d5882b ("tools: libxl: do not set the PoD target on ARM")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: a0fb7e0e73483ed042d5ca34861a891a51ad337b
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/ctrl/xc_domain.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index b155d6afd2..9d675c8f21 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -1297,9 +1297,7 @@ int xc_domain_get_pod_target(xc_interface *xch,
                              uint64_t *pod_cache_pages,
                              uint64_t *pod_entries)
 {
-    /* On x86 (above) xc_domain_pod_target will incorrectly return -1
-     * with errno==-1 on error. Do the same for least surprise. */
-    errno = -1;
+    errno = EOPNOTSUPP;
     return -1;
 }
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] tools/libs/guest: don't set errno to a negative value
Message-Id: <E1nyY4P-0000g0-1y@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:25 +0000

commit a2cf30eec08db5df974a9e8bb7366fee8fc7fcd9
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:27 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:27 2022 +0200

    tools/libs/guest: don't set errno to a negative value
    
    Setting errno to a negative error value makes no sense.
    
    Fixes: cb99a64029c9 ("libxc: arm: allow passing a device tree blob to the guest")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 438e96ab479495a932391a22e219ee62fa8c4f47
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/guest/xg_dom_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/guest/xg_dom_core.c b/tools/libs/guest/xg_dom_core.c
index 2e4c1330ea..65975a75da 100644
--- a/tools/libs/guest/xg_dom_core.c
+++ b/tools/libs/guest/xg_dom_core.c
@@ -856,7 +856,7 @@ int xc_dom_devicetree_file(struct xc_dom_image *dom, const char *filename)
         return -1;
     return 0;
 #else
-    errno = -EINVAL;
+    errno = EINVAL;
     return -1;
 #endif
 }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] tools/libs/light: don't set errno to a negative value
Message-Id: <E1nyY4Z-0000hH-4t@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:35 +0000

commit 15391de8e2bb6153eadd483154c53044ab53d98d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:44 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:44 2022 +0200

    tools/libs/light: don't set errno to a negative value
    
    Setting errno to a negative value makes no sense.
    
    Fixes: e78e8b9bb649 ("libxl: Add interface for querying hypervisor about PCI topology")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 2419a159fb943c24a6f2439604b9fdb1478fcd08
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/light/libxl_linux.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/light/libxl_linux.c b/tools/libs/light/libxl_linux.c
index 8d62dfd255..27f2bce718 100644
--- a/tools/libs/light/libxl_linux.c
+++ b/tools/libs/light/libxl_linux.c
@@ -288,7 +288,7 @@ int libxl__pci_topology_init(libxl__gc *gc,
         if (i == num_devs) {
             LOG(ERROR, "Too many devices");
             err = ERROR_FAIL;
-            errno = -ENOSPC;
+            errno = ENOSPC;
             goto out;
         }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] xen/iommu: cleanup iommu related domctl handling
Message-Id: <E1nyY4j-0000iB-85@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:45 +0000

commit a6c32abd144ec6443c6a433b5a2ac00e2615aa86
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:02:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:02:08 2022 +0200

    xen/iommu: cleanup iommu related domctl handling
    
    Today iommu_do_domctl() is being called from arch_do_domctl() in the
    "default:" case of a switch statement. This has led already to crashes
    due to unvalidated parameters.
    
    Fix that by moving the call of iommu_do_domctl() to the main switch
    statement of do_domctl().
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> # Arm
    master commit: 9cd7e31b3f584e97a138a770cfb031a91a867936
    master date: 2022-04-26 10:23:58 +0200
---
 xen/arch/arm/domctl.c   | 11 +----------
 xen/arch/x86/domctl.c   |  2 +-
 xen/common/domctl.c     |  7 +++++++
 xen/include/xen/iommu.h | 12 +++++++++---
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/domctl.c b/xen/arch/arm/domctl.c
index 6245af6d0b..1baf25c3d9 100644
--- a/xen/arch/arm/domctl.c
+++ b/xen/arch/arm/domctl.c
@@ -176,16 +176,7 @@ long arch_do_domctl(struct xen_domctl *domctl, struct domain *d,
         return rc;
     }
     default:
-    {
-        int rc;
-
-        rc = subarch_do_domctl(domctl, d, u_domctl);
-
-        if ( rc == -ENOSYS )
-            rc = iommu_do_domctl(domctl, d, u_domctl);
-
-        return rc;
-    }
+        return subarch_do_domctl(domctl, d, u_domctl);
     }
 }
 
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 7d102e0647..0fa51f2ebd 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1380,7 +1380,7 @@ long arch_do_domctl(
         break;
 
     default:
-        ret = iommu_do_domctl(domctl, d, u_domctl);
+        ret = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index 419e4070f5..65d2a4588b 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -870,6 +870,13 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
             copyback = 1;
         break;
 
+    case XEN_DOMCTL_assign_device:
+    case XEN_DOMCTL_test_assign_device:
+    case XEN_DOMCTL_deassign_device:
+    case XEN_DOMCTL_get_device_group:
+        ret = iommu_do_domctl(op, d, u_domctl);
+        break;
+
     default:
         ret = arch_do_domctl(op, d, u_domctl);
         break;
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 92b2d23f0b..861579562e 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -342,8 +342,17 @@ struct domain_iommu {
 /* Does the IOMMU pagetable need to be kept synchronized with the P2M */
 #ifdef CONFIG_HAS_PASSTHROUGH
 #define need_iommu_pt_sync(d)     (dom_iommu(d)->need_sync)
+
+int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 #else
 #define need_iommu_pt_sync(d)     ({ (void)(d); false; })
+
+static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                                  XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
+{
+    return -ENOSYS;
+}
 #endif
 
 int __must_check iommu_suspend(void);
@@ -357,9 +366,6 @@ int iommu_do_pci_domctl(struct xen_domctl *, struct domain *d,
                         XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
 #endif
 
-int iommu_do_domctl(struct xen_domctl *, struct domain *d,
-                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
-
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] IOMMU: make domctl handler tolerate NULL domain
Message-Id: <E1nyY4t-0000ik-B9@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:12:55 +0000

commit 4cf9a7c7bdb9d544fbac81105bbc1059ba3dd932
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:02:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:02:30 2022 +0200

    IOMMU: make domctl handler tolerate NULL domain
    
    Besides the reporter's issue of hitting a NULL deref when !CONFIG_GDBSX,
    XEN_DOMCTL_test_assign_device can legitimately end up having NULL passed
    here, when the domctl was passed DOMID_INVALID.
    
    Fixes: 71e617a6b8f6 ("use is_iommu_enabled() where appropriate...")
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    master commit: fa4d84e6dd3c3bfd23a525b75a5483d4ce15adbb
    master date: 2022-04-26 10:25:54 +0200
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index caaba62c88..287f63fc73 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -535,7 +535,7 @@ int iommu_do_domctl(
 {
     int ret = -ENODEV;
 
-    if ( !is_iommu_enabled(d) )
+    if ( !(d ? is_iommu_enabled(d) : iommu_enabled) )
         return -EOPNOTSUPP;
 
 #ifdef CONFIG_HAS_PCI
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] IOMMU/x86: disallow device assignment to PoD guests
Message-Id: <E1nyY53-0000ja-EM@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:05 +0000

commit 838f6c211f7f05f107e1acdfb0977ab61ec0bf2e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:03:20 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:03:20 2022 +0200

    IOMMU/x86: disallow device assignment to PoD guests
    
    While it is okay for IOMMU page tables to be set up for guests starting
    in PoD mode, actual device assignment may only occur once all PoD
    entries have been removed from the P2M. So far this was enforced only
    for boot-time assignment, and only in the tool stack.
    
    Also use the new function to replace p2m_pod_entry_count(): Its unlocked
    access to p2m->pod.entry_count wasn't really okay (irrespective of the
    result being stale by the time the caller gets to see it). Nor was the
    use of that function in line with the immediately preceding comment: A
    PoD guest isn't just one with a non-zero entry count, but also one with
    a non-empty cache (e.g. prior to actually launching the guest).
    
    To allow the tool stack to see a consistent snapshot of PoD state, move
    the tail of XENMEM_{get,set}_pod_target handling into a function, adding
    proper locking there.
    
    In libxl take the liberty to use the new local variable r also for a
    pre-existing call into libxc.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: ad4312d764e8b40a1e45b64aac6d840a60c59f13
    master date: 2022-05-02 08:48:02 +0200
---
 xen/arch/x86/mm.c                   |  6 +-----
 xen/arch/x86/mm/p2m-pod.c           | 43 ++++++++++++++++++++++++++++++++++++-
 xen/common/vm_event.c               |  2 +-
 xen/drivers/passthrough/x86/iommu.c |  3 ++-
 xen/include/asm-x86/p2m.h           | 21 +++++++++---------
 5 files changed, 57 insertions(+), 18 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index e222d9aa98..4ee2de1105 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4777,7 +4777,6 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     {
         xen_pod_target_t target;
         struct domain *d;
-        struct p2m_domain *p2m;
 
         if ( copy_from_guest(&target, arg, 1) )
             return -EFAULT;
@@ -4812,10 +4811,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         }
         else if ( rc >= 0 )
         {
-            p2m = p2m_get_hostp2m(d);
-            target.tot_pages       = domain_tot_pages(d);
-            target.pod_cache_pages = p2m->pod.count;
-            target.pod_entries     = p2m->pod.entry_count;
+            p2m_pod_get_mem_target(d, &target);
 
             if ( __copy_to_guest(arg, &target, 1) )
             {
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index d8d1a0ce7e..a3c9d8a974 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -20,6 +20,7 @@
  */
 
 #include <xen/event.h>
+#include <xen/iocap.h>
 #include <xen/ioreq.h>
 #include <xen/mm.h>
 #include <xen/sched.h>
@@ -362,7 +363,10 @@ p2m_pod_set_mem_target(struct domain *d, unsigned long target)
 
     ASSERT( pod_target >= p2m->pod.count );
 
-    ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        ret = -ENOTEMPTY;
+    else
+        ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
 
 out:
     pod_unlock(p2m);
@@ -370,6 +374,23 @@ out:
     return ret;
 }
 
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+    ASSERT(is_hvm_domain(d));
+
+    pod_lock(p2m);
+    lock_page_alloc(p2m);
+
+    target->tot_pages       = domain_tot_pages(d);
+    target->pod_cache_pages = p2m->pod.count;
+    target->pod_entries     = p2m->pod.entry_count;
+
+    unlock_page_alloc(p2m);
+    pod_unlock(p2m);
+}
+
 int p2m_pod_empty_cache(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -1387,6 +1408,9 @@ guest_physmap_mark_populate_on_demand(struct domain *d, unsigned long gfn,
     if ( !paging_mode_translate(d) )
         return -EINVAL;
 
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        return -ENOTEMPTY;
+
     do {
         rc = mark_populate_on_demand(d, gfn, chunk_order);
 
@@ -1408,3 +1432,20 @@ void p2m_pod_init(struct p2m_domain *p2m)
     for ( i = 0; i < ARRAY_SIZE(p2m->pod.mrp.list); ++i )
         p2m->pod.mrp.list[i] = gfn_x(INVALID_GFN);
 }
+
+bool p2m_pod_active(const struct domain *d)
+{
+    struct p2m_domain *p2m;
+    bool res;
+
+    if ( !is_hvm_domain(d) )
+        return false;
+
+    p2m = p2m_get_hostp2m(d);
+
+    pod_lock(p2m);
+    res = p2m->pod.entry_count | p2m->pod.count;
+    pod_unlock(p2m);
+
+    return res;
+}
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index 70ab3ba406..21d2f0edf7 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -639,7 +639,7 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec)
 
             rc = -EXDEV;
             /* Disallow paging in a PoD guest */
-            if ( p2m_pod_entry_count(p2m_get_hostp2m(d)) )
+            if ( p2m_pod_active(d) )
                 break;
 
             /* domain_pause() not required here, see XSA-99 */
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index a36a6bd4b2..dc9936e169 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -502,11 +502,12 @@ bool arch_iommu_use_permitted(const struct domain *d)
 {
     /*
      * Prevent device assign if mem paging, mem sharing or log-dirty
-     * have been enabled for this domain.
+     * have been enabled for this domain, or if PoD is still in active use.
      */
     return d == dom_io ||
            (likely(!mem_sharing_enabled(d)) &&
             likely(!mem_paging_enabled(d)) &&
+            likely(!p2m_pod_active(d)) &&
             likely(!p2m_get_hostp2m(d)->global_logdirty));
 }
 
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 357a808748..f2af7a746c 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -661,6 +661,12 @@ int p2m_pod_empty_cache(struct domain *d);
  * domain matches target */
 int p2m_pod_set_mem_target(struct domain *d, unsigned long target);
 
+/* Obtain a consistent snapshot of PoD related domain state. */
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target);
+
+/* Check whether PoD is (still) active in a domain. */
+bool p2m_pod_active(const struct domain *d);
+
 /* Scan pod cache when offline/broken page triggered */
 int
 p2m_pod_offline_or_broken_hit(struct page_info *p);
@@ -669,11 +675,6 @@ p2m_pod_offline_or_broken_hit(struct page_info *p);
 void
 p2m_pod_offline_or_broken_replace(struct page_info *p);
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return p2m->pod.entry_count;
-}
-
 void p2m_pod_init(struct p2m_domain *p2m);
 
 #else
@@ -689,6 +690,11 @@ static inline int p2m_pod_empty_cache(struct domain *d)
     return 0;
 }
 
+static inline bool p2m_pod_active(const struct domain *d)
+{
+    return false;
+}
+
 static inline int p2m_pod_offline_or_broken_hit(struct page_info *p)
 {
     return 0;
@@ -699,11 +705,6 @@ static inline void p2m_pod_offline_or_broken_replace(struct page_info *p)
     ASSERT_UNREACHABLE();
 }
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return 0;
-}
-
 static inline void p2m_pod_init(struct p2m_domain *p2m) {}
 
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
Message-Id: <E1nyY5D-0000kF-Hc@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:15 +0000

commit 9ebe2ba83644ec6cd33a93c68dab5f551adcbea0
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:04:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:04:16 2022 +0200

    x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
    
    Windows Server 2019 Essentials will unconditionally attempt to read
    P5_MC_ADDR MSR at boot and throw a BSOD if injected a #GP.
    
    Fix this by mapping MSR_P5_MC_{ADDR,TYPE} to
    MSR_IA32_MCi_{ADDR,STATUS}, as reported also done by hardware in Intel
    SDM "Mapping of the Pentium Processor Machine-Check Errors to the
    Machine-Check Architecture" section.
    
    Reported-by: Steffen Einsle <einsle@phptrix.de>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: ce59e472b581e4923f6892172dde62b88c8aa8b7
    master date: 2022-05-02 08:49:12 +0200
---
 xen/arch/x86/cpu/mcheck/mce.h       |  6 ++++++
 xen/arch/x86/cpu/mcheck/mce_intel.c | 19 +++++++++++++++++++
 xen/arch/x86/cpu/mcheck/vmce.c      |  2 ++
 xen/arch/x86/msr.c                  |  2 ++
 xen/include/asm-x86/msr-index.h     |  3 +++
 5 files changed, 32 insertions(+)

diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 1953626919..192315ecfa 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -169,6 +169,12 @@ static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
         if (msr >= MSR_IA32_MC0_CTL2 &&
             msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) )
             return 1;
+        fallthrough;
+
+    case X86_VENDOR_CENTAUR:
+    case X86_VENDOR_SHANGHAI:
+        if (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE)
+            return 1;
         break;
 
     case X86_VENDOR_AMD:
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index bb9f3a3ff7..d364e9bf5a 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -1001,8 +1001,27 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
 
 int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
 {
+    const struct cpuid_policy *cp = v->domain->arch.cpuid;
     unsigned int bank = msr - MSR_IA32_MC0_CTL2;
 
+    switch ( msr )
+    {
+    case MSR_P5_MC_ADDR:
+        /*
+         * Bank 0 is used for the 'bank 0 quirk' on older processors.
+         * See vcpu_fill_mc_msrs() for reference.
+         */
+        *val = v->arch.vmce.bank[1].mci_addr;
+        return 1;
+
+    case MSR_P5_MC_TYPE:
+        *val = v->arch.vmce.bank[1].mci_status;
+        return 1;
+    }
+
+    if ( !(cp->x86_vendor & X86_VENDOR_INTEL) )
+        return 0;
+
     if ( bank < GUEST_MC_BANK_NUM )
     {
         *val = v->arch.vmce.bank[bank].mci_ctl2;
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index eb6434a3ba..0899df58bc 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -150,6 +150,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
     default:
         switch ( boot_cpu_data.x86_vendor )
         {
+        case X86_VENDOR_CENTAUR:
+        case X86_VENDOR_SHANGHAI:
         case X86_VENDOR_INTEL:
             ret = vmce_intel_rdmsr(v, msr, val);
             break;
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index aaedb2c312..da305c7aa4 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -282,6 +282,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         *val = msrs->misc_features_enables.raw;
         break;
 
+    case MSR_P5_MC_ADDR:
+    case MSR_P5_MC_TYPE:
     case MSR_IA32_MCG_CAP     ... MSR_IA32_MCG_CTL:      /* 0x179 -> 0x17b */
     case MSR_IA32_MCx_CTL2(0) ... MSR_IA32_MCx_CTL2(31): /* 0x280 -> 0x29f */
     case MSR_IA32_MCx_CTL(0)  ... MSR_IA32_MCx_MISC(31): /* 0x400 -> 0x47f */
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 3e038db618..31964b88af 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -15,6 +15,9 @@
  * abbreviated name.  Exceptions will be considered on a case-by-case basis.
  */
 
+#define MSR_P5_MC_ADDR                      0
+#define MSR_P5_MC_TYPE                      0x00000001
+
 #define MSR_APIC_BASE                       0x0000001b
 #define  APIC_BASE_BSP                      (_AC(1, ULL) <<  8)
 #define  APIC_BASE_EXTD                     (_AC(1, ULL) << 10)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] kconfig: detect LD implementation
Message-Id: <E1nyY5N-0000l6-KQ@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:25 +0000

commit 3754bd128d1a6b3d5864d1a3ee5d27b67d35387a
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:05:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:05:06 2022 +0200

    kconfig: detect LD implementation
    
    Detect GNU and LLVM ld implementations. This is required for further
    patches that will introduce diverging behaviour depending on the
    linker implementation in use.
    
    Note that LLVM ld returns "compatible with GNU linkers" as part of the
    version string, so be on the safe side and use '^' to only match at
    the start of the line in case LLVM ever decides to change the text to
    use "compatible with GNU ld" instead.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: c70c4b624f85f7d4e28c70a804a0a3f20d73092b
    master date: 2022-05-02 08:50:39 +0200
---
 xen/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/xen/Kconfig b/xen/Kconfig
index bcbd2758e5..0c89afd50f 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -23,6 +23,12 @@ config CLANG_VERSION
 	int
 	default $(shell,$(BASEDIR)/scripts/clang-version.sh $(CC))
 
+config LD_IS_GNU
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^GNU ld")
+
+config LD_IS_LLVM
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
+
 # -fvisibility=hidden reduces -fpic cost, if it's available
 config CC_HAS_VISIBILITY_ATTRIBUTE
 	def_bool $(cc-option,-fvisibility=hidden)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] linker/lld: do not generate quoted section names
Message-Id: <E1nyY5X-0000mU-N7@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:35 +0000

commit 88b653f73928117461dc250acd1e830a47a14c2b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:05:24 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:05:24 2022 +0200

    linker/lld: do not generate quoted section names
    
    LLVM LD doesn't strip the quotes from the section names, and so the
    resulting binary ends up with section names like:
    
      [ 1] ".text"           PROGBITS         ffff82d040200000  00008000
           000000000018cbc1  0000000000000000  AX       0     0     4096
    
    This confuses some tools (like gdb) and prevents proper parsing of the
    binary.
    
    The issue has already been reported and is being fixed in LLD.  In
    order to workaround this issue and keep the GNU ld support define
    different DECL_SECTION macros depending on the used ld
    implementation.
    
    Drop the quotes from the definitions of the debug sections in
    DECL_DEBUG{2}, as those quotes are not required for GNU ld either.
    
    Fixes: 6254920587c3 ('x86: quote section names when defining them in linker script')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 702c9a800eb3ecd4b8595998d37a769d470c5bb0
    master date: 2022-05-02 08:51:45 +0200
---
 xen/arch/x86/xen.lds.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 4c58f3209c..bc9b9651b1 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -18,7 +18,11 @@ ENTRY(efi_start)
 #else /* !EFI */
 
 #define FORMAT "elf64-x86-64"
-#define DECL_SECTION(x) #x : AT(ADDR(#x) - __XEN_VIRT_START)
+#ifdef CONFIG_LD_IS_GNU
+# define DECL_SECTION(x) x : AT(ADDR(#x) - __XEN_VIRT_START)
+#else
+# define DECL_SECTION(x) x : AT(ADDR(x) - __XEN_VIRT_START)
+#endif
 
 ENTRY(start_pa)
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] xen: io: Fix race between sending an I/O and domain shutdown
Message-Id: <E1nyY5h-0000nQ-QE@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:45 +0000

commit 982a314bd3000a16c3128afadb36a8ff41029adc
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Tue Jun 7 14:06:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:06:11 2022 +0200

    xen: io: Fix race between sending an I/O and domain shutdown
    
    Xen provides hypercalls to shutdown (SCHEDOP_shutdown{,_code}) and
    resume a domain (XEN_DOMCTL_resumedomain). They can be used for checkpoint
    where the expectation is the domain should continue as nothing happened
    afterwards.
    
    hvmemul_do_io() and handle_pio() will act differently if the return
    code of hvm_send_ioreq() (resp. hvmemul_do_pio_buffer()) is X86EMUL_RETRY.
    
    In this case, the I/O state will be reset to STATE_IOREQ_NONE (i.e
    no I/O is pending) and/or the PC will not be advanced.
    
    If the shutdown request happens right after the I/O was sent to the
    IOREQ, then emulation code will end up to re-execute the instruction
    and therefore forward again the same I/O (at least when reading IO port).
    
    This would be problem if the access has a side-effect. A dumb example,
    is a device implementing a counter which is incremented by one for every
    access. When running shutdown/resume in a loop, the value read by the
    OS may not be the old value + 1.
    
    Add an extra boolean in the structure hvm_vcpu_io to indicate whether
    the I/O was suspended. This is then used in place of checking the domain
    is shutting down in hvmemul_do_io() and handle_pio() as they should
    act on suspend (i.e. vcpu_start_shutdown_deferral() returns false) rather
    than shutdown.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    master commit: b7e0d8978810b534725e94a321736496928f00a5
    master date: 2022-05-06 17:16:22 +0100
---
 xen/arch/arm/ioreq.c       | 3 ++-
 xen/arch/x86/hvm/emulate.c | 3 ++-
 xen/arch/x86/hvm/io.c      | 7 ++++---
 xen/common/ioreq.c         | 4 ++++
 xen/include/xen/sched.h    | 5 +++++
 5 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/ioreq.c b/xen/arch/arm/ioreq.c
index 308650b400..fbccef212b 100644
--- a/xen/arch/arm/ioreq.c
+++ b/xen/arch/arm/ioreq.c
@@ -80,9 +80,10 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
         return IO_ABORT;
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = ioreq_send(s, &p, 0);
-    if ( rc != IO_RETRY || v->domain->is_shutting_down )
+    if ( rc != IO_RETRY || vio->suspended )
         vio->req.state = STATE_IOREQ_NONE;
     else if ( !ioreq_needs_completion(&vio->req) )
         rc = IO_HANDLED;
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 76a2ccfafe..7da348b5d4 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -239,6 +239,7 @@ static int hvmemul_do_io(
     ASSERT(p.count);
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = hvm_io_intercept(&p);
 
@@ -334,7 +335,7 @@ static int hvmemul_do_io(
         else
         {
             rc = ioreq_send(s, &p, 0);
-            if ( rc != X86EMUL_RETRY || currd->is_shutting_down )
+            if ( rc != X86EMUL_RETRY || vio->suspended )
                 vio->req.state = STATE_IOREQ_NONE;
             else if ( !ioreq_needs_completion(&vio->req) )
                 rc = X86EMUL_OKAY;
diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c
index 93f1d1503f..80915f27e4 100644
--- a/xen/arch/x86/hvm/io.c
+++ b/xen/arch/x86/hvm/io.c
@@ -138,10 +138,11 @@ bool handle_pio(uint16_t port, unsigned int size, int dir)
 
     case X86EMUL_RETRY:
         /*
-         * We should not advance RIP/EIP if the domain is shutting down or
-         * if X86EMUL_RETRY has been returned by an internal handler.
+         * We should not advance RIP/EIP if the vio was suspended (e.g.
+         * because the domain is shutting down) or if X86EMUL_RETRY has
+         * been returned by an internal handler.
          */
-        if ( curr->domain->is_shutting_down || !vcpu_ioreq_pending(curr) )
+        if ( vio->suspended || !vcpu_ioreq_pending(curr) )
             return false;
         break;
 
diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index d732dc045d..42414b750b 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -1256,6 +1256,7 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
     struct vcpu *curr = current;
     struct domain *d = curr->domain;
     struct ioreq_vcpu *sv;
+    struct vcpu_io *vio = &curr->io;
 
     ASSERT(s);
 
@@ -1263,7 +1264,10 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
         return ioreq_send_buffered(s, proto_p);
 
     if ( unlikely(!vcpu_start_shutdown_deferral(curr)) )
+    {
+        vio->suspended = true;
         return IOREQ_STATUS_RETRY;
+    }
 
     list_for_each_entry ( sv,
                           &s->ioreq_vcpu_list,
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 28146ee404..9671062360 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -159,6 +159,11 @@ enum vio_completion {
 struct vcpu_io {
     /* I/O request in flight to device model. */
     enum vio_completion  completion;
+    /*
+     * Indicate whether the I/O was not handled because the domain
+     * is about to be paused.
+     */
+    bool                 suspended;
     ioreq_t              req;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
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Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] build: suppress GNU ld warning about RWX load segments
Message-Id: <E1nyY5r-0000oG-T9@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:13:55 +0000

commit 4890031d224262a6cf43d3bef1af4a16c13db306
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:06:51 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:06:51 2022 +0200

    build: suppress GNU ld warning about RWX load segments
    
    We cannot really avoid such and we're also not really at risk because of
    them, as we control page table permissions ourselves rather than relying
    on a loader of some sort. Present GNU ld master started warning about
    such, and hence 2.39 is anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 68f5aac012b9ae36ce9b65d9ca9cc9f232191ad3
    master date: 2022-05-18 11:17:19 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index ce4eca3ee4..4d9abe7046 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -260,6 +260,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
+
 CFLAGS += $(CFLAGS-y)
 # allow extra CFLAGS externally via EXTRA_CFLAGS_XEN_CORE
 CFLAGS += $(EXTRA_CFLAGS_XEN_CORE)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] build: silence GNU ld warning about executable stacks
Message-Id: <E1nyY61-0000pY-Vw@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:14:05 +0000

commit 1bc669a568a9f4bdab9e9ddb95823ba370dc0baf
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:07:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:07:11 2022 +0200

    build: silence GNU ld warning about executable stacks
    
    While for C files the compiler is supposed to arrange for emitting
    respective information, for assembly sources we're responsible ourselves.
    Present GNU ld master started warning about such, and hence 2.39 is
    anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 62d22296a95d259c934ca2f39ac511d729cfbb68
    master date: 2022-05-18 11:18:45 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 4d9abe7046..971028eda2 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -260,6 +260,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+$(call cc-option-add,AFLAGS,CC,-Wa$(comma)--noexecstack)
+
 LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
 
 CFLAGS += $(CFLAGS-y)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] ns16550: use poll mode if INTERRUPT_LINE is 0xff
Message-Id: <E1nyY6C-0000qR-2e@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:14:16 +0000

commit f1be0b62a03b90a40a03e21f965e4cbb89809bb1
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 14:07:34 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:07:34 2022 +0200

    ns16550: use poll mode if INTERRUPT_LINE is 0xff
    
    Intel LPSS has INTERRUPT_LINE set to 0xff by default, that is declared
    by the PCI Local Bus Specification Revision 3.0 (from 2004) as
    "unknown"/"no connection". Fallback to poll mode in this case.
    The 0xff handling is x86-specific, the surrounding code is guarded with
    CONFIG_X86 anyway.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 6a2ea1a2370a0c8a0210accac0ae62e68c185134
    master date: 2022-05-20 12:19:45 +0200
---
 xen/drivers/char/ns16550.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 30596d60d4..2d2bd2a024 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1221,6 +1221,19 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx)
                             pci_conf_read8(PCI_SBDF(0, b, d, f),
                                            PCI_INTERRUPT_LINE) : 0;
 
+#ifdef CONFIG_X86
+                /*
+                 * PCI Local Bus Specification Revision 3.0 defines 0xff value
+                 * as special only for X86.
+                 */
+                if ( uart->irq == 0xff )
+                    uart->irq = 0;
+#endif
+                if ( !uart->irq )
+                    printk(XENLOG_INFO
+                           "ns16550: %pp: no legacy IRQ, using poll mode\n",
+                           &PCI_SBDF(0, b, d, f));
+
                 return 0;
             }
         }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
Message-Id: <E1nyY6M-0000r5-5e@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:14:26 +0000

commit 8e11ec8fbf6f933f8854f4bc54226653316903f2
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:08:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:08:06 2022 +0200

    PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
    
    IOMMU code mapping / unmapping devices and interrupts will misbehave if
    a wrong command line option declared a function "phantom" when there's a
    real device at that position. Warn about this and adjust the specified
    stride (in the worst case ignoring the option altogether).
    
    Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 444b555dc9e09fa3ce90f066e0c88dec9b47f422
    master date: 2022-05-20 12:20:35 +0200
---
 xen/drivers/passthrough/pci.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 395958698e..e0491c908f 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -382,7 +382,24 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
                          phantom_devs[i].slot == PCI_SLOT(devfn) &&
                          phantom_devs[i].stride > PCI_FUNC(devfn) )
                     {
-                        pdev->phantom_stride = phantom_devs[i].stride;
+                        pci_sbdf_t sbdf = pdev->sbdf;
+                        unsigned int stride = phantom_devs[i].stride;
+
+                        while ( (sbdf.fn += stride) > PCI_FUNC(devfn) )
+                        {
+                            if ( pci_conf_read16(sbdf, PCI_VENDOR_ID) == 0xffff &&
+                                 pci_conf_read16(sbdf, PCI_DEVICE_ID) == 0xffff )
+                                continue;
+                            stride <<= 1;
+                            printk(XENLOG_WARNING
+                                   "%pp looks to be a real device; bumping %04x:%02x:%02x stride to %u\n",
+                                   &sbdf, phantom_devs[i].seg,
+                                   phantom_devs[i].bus, phantom_devs[i].slot,
+                                   stride);
+                            sbdf = pdev->sbdf;
+                        }
+                        if ( PCI_FUNC(stride) )
+                           pdev->phantom_stride = stride;
                         break;
                     }
             }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/irq: skip unmap_domain_pirq XSM during destruction
Message-Id: <E1nyYOO-00029h-9U@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:04 +0000

commit ef1df2a144c68833e1d24c1373c14b8141ddb1e2
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Tue Jun 7 14:12:47 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:12:47 2022 +0200

    x86/irq: skip unmap_domain_pirq XSM during destruction
    
    xsm_unmap_domain_irq was seen denying unmap_domain_pirq when called from
    complete_domain_destroy as an RCU callback.  The source context was an
    unexpected, random domain.  Since this is a xen-internal operation,
    going through the XSM hook is inapproriate.
    
    Check d->is_dying and skip the XSM hook when set since this is a cleanup
    operation for a domain being destroyed.
    
    Suggested-by: Roger Pau Monné <roger.pau@citrix.com>
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 2e6f95a942d1927a53f077c301db0b799c54c05a
    master date: 2022-04-08 14:51:52 +0200
---
 xen/arch/x86/irq.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 032fe82167..e0f00902e0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2343,8 +2343,14 @@ int unmap_domain_pirq(struct domain *d, int pirq)
         nr = msi_desc->msi.nvec;
     }
 
-    ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
-                               msi_desc ? msi_desc->dev : NULL);
+    /*
+     * When called by complete_domain_destroy via RCU, current is a random
+     * domain.  Skip the XSM check since this is a Xen-initiated action.
+     */
+    if ( !d->is_dying )
+        ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
+                                   msi_desc ? msi_desc->dev : NULL);
+
     if ( ret )
         goto done;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
Message-Id: <E1nyYOY-0002AA-Cm@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:14 +0000

commit 94b4745948b8f7954129b70498de4bfb12fe9f5d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:14:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:14:07 2022 +0200

    xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
    
    A hypervisor built without CONFIG_GDBSX will crash in case the
    XEN_DOMCTL_gdbsx_guestmemio domctl is being called, as the call will
    end up in iommu_do_domctl() with d == NULL:
    
      (XEN) CPU:    6
      (XEN) RIP:    e008:[<ffff82d040269984>] iommu_do_domctl+0x4/0x30
      (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d0v0)
      (XEN) rax: 00000000000003e8   rbx: ffff830856277ef8   rcx: ffff830856277fff
      ...
      (XEN) Xen call trace:
      (XEN)    [<ffff82d040269984>] R iommu_do_domctl+0x4/0x30
      (XEN)    [<ffff82d04035cd5f>] S arch_do_domctl+0x7f/0x2330
      (XEN)    [<ffff82d040239e46>] S do_domctl+0xe56/0x1930
      (XEN)    [<ffff82d040238ff0>] S do_domctl+0/0x1930
      (XEN)    [<ffff82d0402f8c59>] S pv_hypercall+0x99/0x110
      (XEN)    [<ffff82d0402f5161>] S arch/x86/pv/domain.c#_toggle_guest_pt+0x11/0x90
      (XEN)    [<ffff82d040366288>] S lstar_enter+0x128/0x130
      (XEN)
      (XEN) Pagetable walk from 0000000000000144:
      (XEN)  L4[0x000] = 0000000000000000 ffffffffffffffff
      (XEN)
      (XEN) ****************************************
      (XEN) Panic on CPU 6:
      (XEN) FATAL PAGE FAULT
      (XEN) [error_code=0000]
      (XEN) Faulting linear address: 0000000000000144
      (XEN) ****************************************
    
    It used to be permitted to pass DOMID_IDLE to dbg_rw_mem(), which is why the
    special case skipping the domid checks exists.  Now that it is only permitted
    to pass proper domids, remove the special case, making 'd' always valid.
    
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Fixes: e726a82ca0dc ("xen: make gdbsx support configurable")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: f00daf1fb3213a9b0335d9dcd90fe9cb5c02b7a9
    master date: 2022-04-19 17:07:08 +0100
---
 xen/common/domctl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index af044e2eda..b7dc6080d4 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -303,7 +303,6 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
         if ( op->domain == DOMID_INVALID )
         {
     case XEN_DOMCTL_createdomain:
-    case XEN_DOMCTL_gdbsx_guestmemio:
             d = NULL;
             break;
         }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] VT-d: refuse to use IOMMU with reserved CAP.ND value
Message-Id: <E1nyYOi-0002Aj-HT@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:24 +0000

commit e73ab4e84bb065b65c502750413f2db3e7ced7e1
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:14:41 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:14:41 2022 +0200

    VT-d: refuse to use IOMMU with reserved CAP.ND value
    
    The field taking the value 7 (resulting in 18-bit DIDs when using the
    calculation in cap_ndoms(), when the DID fields are only 16 bits wide)
    is reserved. Instead of misbehaving in case we would encounter such an
    IOMMU, refuse to use it.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    master commit: a1545fbf45c689aff39ce76a6eaa609d32ef72a7
    master date: 2022-04-20 10:54:26 +0200
---
 xen/drivers/passthrough/vtd/iommu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 68dd2f5500..a063462cff 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1276,8 +1276,11 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     quirk_iommu_caps(iommu);
 
+    nr_dom = cap_ndoms(iommu->cap);
+
     if ( cap_fault_reg_offset(iommu->cap) +
          cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >= PAGE_SIZE ||
+         ((nr_dom - 1) >> 16) /* I.e. cap.nd > 6 */ ||
          ecap_iotlb_offset(iommu->ecap) >= PAGE_SIZE )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported\n");
@@ -1302,7 +1305,6 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
         vtd_ops.sync_cache = sync_cache;
 
     /* allocate domain id bitmap */
-    nr_dom = cap_ndoms(iommu->cap);
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
     if ( !iommu->domid_bitmap )
         return -ENOMEM;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/mm: avoid inadvertently degrading a TLB flush to local only
Message-Id: <E1nyYOs-0002BX-MW@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:34 +0000

commit fc371c9f4f06b38073ffaf5b5a97f2621cc1ae17
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Jun 7 14:15:15 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:15:15 2022 +0200

    x86/mm: avoid inadvertently degrading a TLB flush to local only
    
    If the direct map is incorrectly modified with interrupts disabled,
    the required TLB flushes are degraded to flushing the local CPU only.
    
    This could lead to very hard to diagnose problems as different CPUs will
    end up with different views of memory. Although, no such issues have yet
    been identified.
    
    Change the check in the flush_area() macro to look at system_state
    instead. This defers the switch from local to all later in the boot
    (see xen/arch/x86/setup.c:__start_xen()). This is fine because
    additional PCPUs are not brought up until after the system state is
    SYS_STATE_smp_boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    
    x86/flushtlb: remove flush_area check on system state
    
    Booting with Shadow Stacks leads to the following assert on a debug
    hypervisor:
    
    Assertion 'local_irq_is_enabled()' failed at arch/x86/smp.c:265
    ----[ Xen-4.17.0-10.24-d  x86_64  debug=y  Not tainted ]----
    CPU:    0
    RIP:    e008:[<ffff82d040345300>] flush_area_mask+0x40/0x13e
    [...]
    Xen call trace:
       [<ffff82d040345300>] R flush_area_mask+0x40/0x13e
       [<ffff82d040338a40>] F modify_xen_mappings+0xc5/0x958
       [<ffff82d0404474f9>] F arch/x86/alternative.c#_alternative_instructions+0xb7/0xb9
       [<ffff82d0404476cc>] F alternative_branches+0xf/0x12
       [<ffff82d04044e37d>] F __start_xen+0x1ef4/0x2776
       [<ffff82d040203344>] F __high_start+0x94/0xa0
    
    This is due to SYS_STATE_smp_boot being set before calling
    alternative_branches(), and the flush in modify_xen_mappings() then
    using flush_area_all() with interrupts disabled.  Note that
    alternative_branches() is called before APs are started, so the flush
    must be a local one (and indeed the cpumask passed to
    flush_area_mask() just contains one CPU).
    
    Take the opportunity to simplify a bit the logic and make flush_area()
    an alias of flush_area_all() in mm.c, taking into account that
    cpu_online_map just contains the BSP before APs are started.  This
    requires widening the assert in flush_area_mask() to allow being
    called with interrupts disabled as long as it's strictly a local only
    flush.
    
    The overall result is that a conditional can be removed from
    flush_area().
    
    While there also introduce an ASSERT to check that a vCPU state flush
    is not issued for the local CPU only.
    
    Fixes: 78e072bc37 ('x86/mm: avoid inadvertently degrading a TLB flush to local only')
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 78e072bc375043e81691a59454e09f0b38241ddd
    master date: 2022-04-20 10:55:01 +0200
    master commit: 9f735ee4903f1b9f1966bb4ba5b5616b03ae08b5
    master date: 2022-05-25 11:09:46 +0200
---
 xen/arch/x86/mm.c  | 10 ++--------
 xen/arch/x86/smp.c |  5 ++++-
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index afb4febf6f..80f99dff77 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5019,14 +5019,8 @@ l1_pgentry_t *virt_to_xen_l1e(unsigned long v)
 #define l1f_to_lNf(f) (((f) & _PAGE_PRESENT) ? ((f) |  _PAGE_PSE) : (f))
 #define lNf_to_l1f(f) (((f) & _PAGE_PRESENT) ? ((f) & ~_PAGE_PSE) : (f))
 
-/*
- * map_pages_to_xen() can be called with interrupts disabled during
- * early bootstrap. In this case it is safe to use flush_area_local()
- * and avoid locking because only the local CPU is online.
- */
-#define flush_area(v,f) (!local_irq_is_enabled() ?              \
-                         flush_area_local((const void *)v, f) : \
-                         flush_area_all((const void *)v, f))
+/* flush_area_all() can be used prior to any other CPU being online.  */
+#define flush_area(v, f) flush_area_all((const void *)(v), f)
 
 #define L3T_INIT(page) (page) = ZERO_BLOCK_PTR
 
diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index eef0f9c6cb..3556ec1166 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -262,7 +262,10 @@ void flush_area_mask(const cpumask_t *mask, const void *va, unsigned int flags)
 {
     unsigned int cpu = smp_processor_id();
 
-    ASSERT(local_irq_is_enabled());
+    /* Local flushes can be performed with interrupts disabled. */
+    ASSERT(local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu)));
+    /* Exclude use of FLUSH_VCPU_STATE for the local CPU. */
+    ASSERT(!cpumask_test_cpu(cpu, mask) || !(flags & FLUSH_VCPU_STATE));
 
     if ( (flags & ~(FLUSH_VCPU_STATE | FLUSH_ORDER_MASK)) &&
          cpumask_test_cpu(cpu, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] xen/build: Fix dependency for the MAP rule
Message-Id: <E1nyYP2-0002C0-Ra@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:44 +0000

commit 3b154fdda990d4229392c389f4384acd3e7c1dc2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 7 14:16:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:08 2022 +0200

    xen/build: Fix dependency for the MAP rule
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    master commit: e1e72198213b80b7a82bdc90f96ed05ae4f53e20
    master date: 2022-04-20 19:10:59 +0100
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 212c819498..6fed25ce32 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -456,7 +456,7 @@ cscope:
 	cscope -k -b -q
 
 .PHONY: _MAP
-_MAP:
+_MAP: $(TARGET)
 	$(NM) -n $(TARGET)-syms | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' > System.map
 
 %.o %.i %.s: %.c FORCE
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] tools/libs/evtchn: don't set errno to negative values
Message-Id: <E1nyYPC-0002CR-UY@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:33:54 +0000

commit defa8807bf6d89508a911fe08f74b7c5b2f5b396
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:16:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:30 2022 +0200

    tools/libs/evtchn: don't set errno to negative values
    
    Setting errno to a negative value makes no sense.
    
    Fixes: 6b6500b3cbaa ("tools/libs/evtchn: Add support for restricting a handle")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 60245b71c1cd001686fa7b7a26869cbcb80d074c
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/evtchn/freebsd.c | 2 +-
 tools/libs/evtchn/minios.c  | 2 +-
 tools/libs/evtchn/netbsd.c  | 2 +-
 tools/libs/evtchn/solaris.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/libs/evtchn/freebsd.c b/tools/libs/evtchn/freebsd.c
index 7427ab2408..fa17a0f8db 100644
--- a/tools/libs/evtchn/freebsd.c
+++ b/tools/libs/evtchn/freebsd.c
@@ -58,7 +58,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index e5dfdc5ef5..c0bd5429ee 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -97,7 +97,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/netbsd.c b/tools/libs/evtchn/netbsd.c
index 1cebc21ffc..56409513bc 100644
--- a/tools/libs/evtchn/netbsd.c
+++ b/tools/libs/evtchn/netbsd.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/solaris.c b/tools/libs/evtchn/solaris.c
index df9579df17..beaa772142 100644
--- a/tools/libs/evtchn/solaris.c
+++ b/tools/libs/evtchn/solaris.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
     return -1;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] tools/libs/ctrl: don't set errno to a negative value
Message-Id: <E1nyYPN-0002DG-1J@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:05 +0000

commit f151bb7ce45d7995c7fc4d3dd9df3f96cf637ffc
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:16:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:49 2022 +0200

    tools/libs/ctrl: don't set errno to a negative value
    
    The claimed reason for setting errno to -1 is wrong. On x86
    xc_domain_pod_target() will set errno to a sane value in the error
    case.
    
    Fixes: ff1745d5882b ("tools: libxl: do not set the PoD target on ARM")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: a0fb7e0e73483ed042d5ca34861a891a51ad337b
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/ctrl/xc_domain.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index e7cea4a17d..52892fca18 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -1276,9 +1276,7 @@ int xc_domain_get_pod_target(xc_interface *xch,
                              uint64_t *pod_cache_pages,
                              uint64_t *pod_entries)
 {
-    /* On x86 (above) xc_domain_pod_target will incorrectly return -1
-     * with errno==-1 on error. Do the same for least surprise. */
-    errno = -1;
+    errno = EOPNOTSUPP;
     return -1;
 }
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] tools/libs/guest: don't set errno to a negative value
Message-Id: <E1nyYPX-0002EC-6g@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:15 +0000

commit b8a3edba1f284323c8292a0ec372d8f79d39d4e8
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:17:22 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:17:22 2022 +0200

    tools/libs/guest: don't set errno to a negative value
    
    Setting errno to a negative error value makes no sense.
    
    Fixes: cb99a64029c9 ("libxc: arm: allow passing a device tree blob to the guest")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 438e96ab479495a932391a22e219ee62fa8c4f47
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/guest/xg_dom_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/guest/xg_dom_core.c b/tools/libs/guest/xg_dom_core.c
index 98ef8e8fc9..8543a8fea8 100644
--- a/tools/libs/guest/xg_dom_core.c
+++ b/tools/libs/guest/xg_dom_core.c
@@ -856,7 +856,7 @@ int xc_dom_devicetree_file(struct xc_dom_image *dom, const char *filename)
         return -1;
     return 0;
 #else
-    errno = -EINVAL;
+    errno = EINVAL;
     return -1;
 #endif
 }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] tools/libs/light: don't set errno to a negative value
Message-Id: <E1nyYPh-0002F3-A3@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:25 +0000

commit 2e6062aa824e763407e1505cfdf0c71ce0f515ca
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:17:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:17:37 2022 +0200

    tools/libs/light: don't set errno to a negative value
    
    Setting errno to a negative value makes no sense.
    
    Fixes: e78e8b9bb649 ("libxl: Add interface for querying hypervisor about PCI topology")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 2419a159fb943c24a6f2439604b9fdb1478fcd08
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/light/libxl_linux.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/light/libxl_linux.c b/tools/libs/light/libxl_linux.c
index 8d62dfd255..27f2bce718 100644
--- a/tools/libs/light/libxl_linux.c
+++ b/tools/libs/light/libxl_linux.c
@@ -288,7 +288,7 @@ int libxl__pci_topology_init(libxl__gc *gc,
         if (i == num_devs) {
             LOG(ERROR, "Too many devices");
             err = ERROR_FAIL;
-            errno = -ENOSPC;
+            errno = ENOSPC;
             goto out;
         }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] xen/iommu: cleanup iommu related domctl handling
Message-Id: <E1nyYPr-0002Fs-DD@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:35 +0000

commit 3b1031b3b4e26db93b532c83e9a4e5f5f33f9f73
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:18:01 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:18:01 2022 +0200

    xen/iommu: cleanup iommu related domctl handling
    
    Today iommu_do_domctl() is being called from arch_do_domctl() in the
    "default:" case of a switch statement. This has led already to crashes
    due to unvalidated parameters.
    
    Fix that by moving the call of iommu_do_domctl() to the main switch
    statement of do_domctl().
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> # Arm
    master commit: 9cd7e31b3f584e97a138a770cfb031a91a867936
    master date: 2022-04-26 10:23:58 +0200
---
 xen/arch/arm/domctl.c   | 11 +----------
 xen/arch/x86/domctl.c   |  2 +-
 xen/common/domctl.c     |  7 +++++++
 xen/include/xen/iommu.h | 12 +++++++++---
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/domctl.c b/xen/arch/arm/domctl.c
index b7d27f37df..a8c48b0bea 100644
--- a/xen/arch/arm/domctl.c
+++ b/xen/arch/arm/domctl.c
@@ -174,16 +174,7 @@ long arch_do_domctl(struct xen_domctl *domctl, struct domain *d,
         return rc;
     }
     default:
-    {
-        int rc;
-
-        rc = subarch_do_domctl(domctl, d, u_domctl);
-
-        if ( rc == -ENOSYS )
-            rc = iommu_do_domctl(domctl, d, u_domctl);
-
-        return rc;
-    }
+        return subarch_do_domctl(domctl, d, u_domctl);
     }
 }
 
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index b129d2cc2f..8dc84796b9 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1374,7 +1374,7 @@ long arch_do_domctl(
         break;
 
     default:
-        ret = iommu_do_domctl(domctl, d, u_domctl);
+        ret = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index b7dc6080d4..99952bfe6e 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -866,6 +866,13 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
             copyback = 1;
         break;
 
+    case XEN_DOMCTL_assign_device:
+    case XEN_DOMCTL_test_assign_device:
+    case XEN_DOMCTL_deassign_device:
+    case XEN_DOMCTL_get_device_group:
+        ret = iommu_do_domctl(op, d, u_domctl);
+        break;
+
     default:
         ret = arch_do_domctl(op, d, u_domctl);
         break;
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index cd79374a14..e733ebf69d 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -344,8 +344,17 @@ struct domain_iommu {
 /* Does the IOMMU pagetable need to be kept synchronized with the P2M */
 #ifdef CONFIG_HAS_PASSTHROUGH
 #define need_iommu_pt_sync(d)     (dom_iommu(d)->need_sync)
+
+int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 #else
 #define need_iommu_pt_sync(d)     ({ (void)(d); false; })
+
+static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                                  XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
+{
+    return -ENOSYS;
+}
 #endif
 
 int __must_check iommu_suspend(void);
@@ -359,9 +368,6 @@ int iommu_do_pci_domctl(struct xen_domctl *, struct domain *d,
                         XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
 #endif
 
-int iommu_do_domctl(struct xen_domctl *, struct domain *d,
-                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
-
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] IOMMU: make domctl handler tolerate NULL domain
Message-Id: <E1nyYQ1-0002Gl-Fv@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:45 +0000

commit dc798302e7d4e55f518e10fa00d654abd6695e5c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:18:41 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:18:41 2022 +0200

    IOMMU: make domctl handler tolerate NULL domain
    
    Besides the reporter's issue of hitting a NULL deref when !CONFIG_GDBSX,
    XEN_DOMCTL_test_assign_device can legitimately end up having NULL passed
    here, when the domctl was passed DOMID_INVALID.
    
    Fixes: 71e617a6b8f6 ("use is_iommu_enabled() where appropriate...")
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    master commit: fa4d84e6dd3c3bfd23a525b75a5483d4ce15adbb
    master date: 2022-04-26 10:25:54 +0200
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 98c6550a36..9a2b1e7808 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -515,7 +515,7 @@ int iommu_do_domctl(
 {
     int ret = -ENODEV;
 
-    if ( !is_iommu_enabled(d) )
+    if ( !(d ? is_iommu_enabled(d) : iommu_enabled) )
         return -EOPNOTSUPP;
 
 #ifdef CONFIG_HAS_PCI
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] IOMMU/x86: disallow device assignment to PoD guests
Message-Id: <E1nyYQB-0002Hg-JC@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:34:55 +0000

commit 9e818d4edc3d63df30e18d4061768c5b8fe3edba
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:19:18 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:19:18 2022 +0200

    IOMMU/x86: disallow device assignment to PoD guests
    
    While it is okay for IOMMU page tables to be set up for guests starting
    in PoD mode, actual device assignment may only occur once all PoD
    entries have been removed from the P2M. So far this was enforced only
    for boot-time assignment, and only in the tool stack.
    
    Also use the new function to replace p2m_pod_entry_count(): Its unlocked
    access to p2m->pod.entry_count wasn't really okay (irrespective of the
    result being stale by the time the caller gets to see it). Nor was the
    use of that function in line with the immediately preceding comment: A
    PoD guest isn't just one with a non-zero entry count, but also one with
    a non-empty cache (e.g. prior to actually launching the guest).
    
    To allow the tool stack to see a consistent snapshot of PoD state, move
    the tail of XENMEM_{get,set}_pod_target handling into a function, adding
    proper locking there.
    
    In libxl take the liberty to use the new local variable r also for a
    pre-existing call into libxc.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: ad4312d764e8b40a1e45b64aac6d840a60c59f13
    master date: 2022-05-02 08:48:02 +0200
---
 xen/arch/x86/mm.c                   |  6 +-----
 xen/arch/x86/mm/p2m-pod.c           | 43 ++++++++++++++++++++++++++++++++++++-
 xen/common/vm_event.c               |  2 +-
 xen/drivers/passthrough/x86/iommu.c |  3 ++-
 xen/include/asm-x86/p2m.h           | 21 +++++++++---------
 5 files changed, 57 insertions(+), 18 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 80f99dff77..13f9dd9db9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4763,7 +4763,6 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     {
         xen_pod_target_t target;
         struct domain *d;
-        struct p2m_domain *p2m;
 
         if ( copy_from_guest(&target, arg, 1) )
             return -EFAULT;
@@ -4798,10 +4797,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         }
         else if ( rc >= 0 )
         {
-            p2m = p2m_get_hostp2m(d);
-            target.tot_pages       = domain_tot_pages(d);
-            target.pod_cache_pages = p2m->pod.count;
-            target.pod_entries     = p2m->pod.entry_count;
+            p2m_pod_get_mem_target(d, &target);
 
             if ( __copy_to_guest(arg, &target, 1) )
             {
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index efc9b4bb55..c1d2693683 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -20,6 +20,7 @@
  */
 
 #include <xen/event.h>
+#include <xen/iocap.h>
 #include <xen/ioreq.h>
 #include <xen/mm.h>
 #include <xen/sched.h>
@@ -361,7 +362,10 @@ p2m_pod_set_mem_target(struct domain *d, unsigned long target)
 
     ASSERT( pod_target >= p2m->pod.count );
 
-    ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        ret = -ENOTEMPTY;
+    else
+        ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
 
 out:
     pod_unlock(p2m);
@@ -369,6 +373,23 @@ out:
     return ret;
 }
 
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+    ASSERT(is_hvm_domain(d));
+
+    pod_lock(p2m);
+    lock_page_alloc(p2m);
+
+    target->tot_pages       = domain_tot_pages(d);
+    target->pod_cache_pages = p2m->pod.count;
+    target->pod_entries     = p2m->pod.entry_count;
+
+    unlock_page_alloc(p2m);
+    pod_unlock(p2m);
+}
+
 int p2m_pod_empty_cache(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -1371,6 +1392,9 @@ guest_physmap_mark_populate_on_demand(struct domain *d, unsigned long gfn,
     if ( !paging_mode_translate(d) )
         return -EINVAL;
 
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        return -ENOTEMPTY;
+
     do {
         rc = mark_populate_on_demand(d, gfn, chunk_order);
 
@@ -1392,3 +1416,20 @@ void p2m_pod_init(struct p2m_domain *p2m)
     for ( i = 0; i < ARRAY_SIZE(p2m->pod.mrp.list); ++i )
         p2m->pod.mrp.list[i] = gfn_x(INVALID_GFN);
 }
+
+bool p2m_pod_active(const struct domain *d)
+{
+    struct p2m_domain *p2m;
+    bool res;
+
+    if ( !is_hvm_domain(d) )
+        return false;
+
+    p2m = p2m_get_hostp2m(d);
+
+    pod_lock(p2m);
+    res = p2m->pod.entry_count | p2m->pod.count;
+    pod_unlock(p2m);
+
+    return res;
+}
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index 44d542f23e..edafc232ca 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -639,7 +639,7 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec)
 
             rc = -EXDEV;
             /* Disallow paging in a PoD guest */
-            if ( p2m_pod_entry_count(p2m_get_hostp2m(d)) )
+            if ( p2m_pod_active(d) )
                 break;
 
             /* domain_pause() not required here, see XSA-99 */
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index edb2d9bd64..f3aaec8254 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -496,11 +496,12 @@ bool arch_iommu_use_permitted(const struct domain *d)
 {
     /*
      * Prevent device assign if mem paging, mem sharing or log-dirty
-     * have been enabled for this domain.
+     * have been enabled for this domain, or if PoD is still in active use.
      */
     return d == dom_io ||
            (likely(!mem_sharing_enabled(d)) &&
             likely(!vm_event_check_ring(d->vm_event_paging)) &&
+            likely(!p2m_pod_active(d)) &&
             likely(!p2m_get_hostp2m(d)->global_logdirty));
 }
 
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 422a8b228f..46e8b94a49 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -697,6 +697,12 @@ int p2m_pod_empty_cache(struct domain *d);
  * domain matches target */
 int p2m_pod_set_mem_target(struct domain *d, unsigned long target);
 
+/* Obtain a consistent snapshot of PoD related domain state. */
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target);
+
+/* Check whether PoD is (still) active in a domain. */
+bool p2m_pod_active(const struct domain *d);
+
 /* Scan pod cache when offline/broken page triggered */
 int
 p2m_pod_offline_or_broken_hit(struct page_info *p);
@@ -705,11 +711,6 @@ p2m_pod_offline_or_broken_hit(struct page_info *p);
 void
 p2m_pod_offline_or_broken_replace(struct page_info *p);
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return p2m->pod.entry_count;
-}
-
 void p2m_pod_init(struct p2m_domain *p2m);
 
 #else
@@ -725,6 +726,11 @@ static inline int p2m_pod_empty_cache(struct domain *d)
     return 0;
 }
 
+static inline bool p2m_pod_active(const struct domain *d)
+{
+    return false;
+}
+
 static inline int p2m_pod_offline_or_broken_hit(struct page_info *p)
 {
     return 0;
@@ -735,11 +741,6 @@ static inline void p2m_pod_offline_or_broken_replace(struct page_info *p)
     ASSERT_UNREACHABLE();
 }
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return 0;
-}
-
 static inline void p2m_pod_init(struct p2m_domain *p2m) {}
 
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
Message-Id: <E1nyYQL-0002Ip-O1@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:05 +0000

commit 30c9ec31b3035bf08a34799f99c06a7bbcaec0ab
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:04 2022 +0200

    x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
    
    Windows Server 2019 Essentials will unconditionally attempt to read
    P5_MC_ADDR MSR at boot and throw a BSOD if injected a #GP.
    
    Fix this by mapping MSR_P5_MC_{ADDR,TYPE} to
    MSR_IA32_MCi_{ADDR,STATUS}, as reported also done by hardware in Intel
    SDM "Mapping of the Pentium Processor Machine-Check Errors to the
    Machine-Check Architecture" section.
    
    Reported-by: Steffen Einsle <einsle@phptrix.de>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: ce59e472b581e4923f6892172dde62b88c8aa8b7
    master date: 2022-05-02 08:49:12 +0200
---
 xen/arch/x86/cpu/mcheck/mce.h       |  6 ++++++
 xen/arch/x86/cpu/mcheck/mce_intel.c | 19 +++++++++++++++++++
 xen/arch/x86/cpu/mcheck/vmce.c      |  2 ++
 xen/arch/x86/msr.c                  |  2 ++
 xen/include/asm-x86/msr-index.h     |  3 +++
 5 files changed, 32 insertions(+)

diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 1953626919..192315ecfa 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -169,6 +169,12 @@ static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
         if (msr >= MSR_IA32_MC0_CTL2 &&
             msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) )
             return 1;
+        fallthrough;
+
+    case X86_VENDOR_CENTAUR:
+    case X86_VENDOR_SHANGHAI:
+        if (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE)
+            return 1;
         break;
 
     case X86_VENDOR_AMD:
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index bb9f3a3ff7..d364e9bf5a 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -1001,8 +1001,27 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
 
 int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
 {
+    const struct cpuid_policy *cp = v->domain->arch.cpuid;
     unsigned int bank = msr - MSR_IA32_MC0_CTL2;
 
+    switch ( msr )
+    {
+    case MSR_P5_MC_ADDR:
+        /*
+         * Bank 0 is used for the 'bank 0 quirk' on older processors.
+         * See vcpu_fill_mc_msrs() for reference.
+         */
+        *val = v->arch.vmce.bank[1].mci_addr;
+        return 1;
+
+    case MSR_P5_MC_TYPE:
+        *val = v->arch.vmce.bank[1].mci_status;
+        return 1;
+    }
+
+    if ( !(cp->x86_vendor & X86_VENDOR_INTEL) )
+        return 0;
+
     if ( bank < GUEST_MC_BANK_NUM )
     {
         *val = v->arch.vmce.bank[bank].mci_ctl2;
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index eb6434a3ba..0899df58bc 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -150,6 +150,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
     default:
         switch ( boot_cpu_data.x86_vendor )
         {
+        case X86_VENDOR_CENTAUR:
+        case X86_VENDOR_SHANGHAI:
         case X86_VENDOR_INTEL:
             ret = vmce_intel_rdmsr(v, msr, val);
             break;
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 999ddf5107..0739d00e74 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -267,6 +267,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         *val = msrs->misc_features_enables.raw;
         break;
 
+    case MSR_P5_MC_ADDR:
+    case MSR_P5_MC_TYPE:
     case MSR_IA32_MCG_CAP     ... MSR_IA32_MCG_CTL:      /* 0x179 -> 0x17b */
     case MSR_IA32_MCx_CTL2(0) ... MSR_IA32_MCx_CTL2(31): /* 0x280 -> 0x29f */
     case MSR_IA32_MCx_CTL(0)  ... MSR_IA32_MCx_MISC(31): /* 0x400 -> 0x47f */
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 3ea30aab75..947778105f 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -15,6 +15,9 @@
  * abbreviated name.  Exceptions will be considered on a case-by-case basis.
  */
 
+#define MSR_P5_MC_ADDR                      0
+#define MSR_P5_MC_TYPE                      0x00000001
+
 #define MSR_APIC_BASE                       0x0000001b
 #define  APIC_BASE_BSP                      (_AC(1, ULL) <<  8)
 #define  APIC_BASE_EXTD                     (_AC(1, ULL) << 10)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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Subject: [xen staging-4.15] kconfig: detect LD implementation
Message-Id: <E1nyYQV-0002Jn-Qk@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:15 +0000

commit c92c99fdfaec7a740daba5ef97720af35d1008f7
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:25 2022 +0200

    kconfig: detect LD implementation
    
    Detect GNU and LLVM ld implementations. This is required for further
    patches that will introduce diverging behaviour depending on the
    linker implementation in use.
    
    Note that LLVM ld returns "compatible with GNU linkers" as part of the
    version string, so be on the safe side and use '^' to only match at
    the start of the line in case LLVM ever decides to change the text to
    use "compatible with GNU ld" instead.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: c70c4b624f85f7d4e28c70a804a0a3f20d73092b
    master date: 2022-05-02 08:50:39 +0200
---
 xen/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/xen/Kconfig b/xen/Kconfig
index bcbd2758e5..0c89afd50f 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -23,6 +23,12 @@ config CLANG_VERSION
 	int
 	default $(shell,$(BASEDIR)/scripts/clang-version.sh $(CC))
 
+config LD_IS_GNU
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^GNU ld")
+
+config LD_IS_LLVM
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
+
 # -fvisibility=hidden reduces -fpic cost, if it's available
 config CC_HAS_VISIBILITY_ATTRIBUTE
 	def_bool $(cc-option,-fvisibility=hidden)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] linker/lld: do not generate quoted section names
Message-Id: <E1nyYQf-0002Kf-TW@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:25 +0000

commit 0a7f20c0df7e8ad656396c6c038c7281bbbb0890
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:45 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:45 2022 +0200

    linker/lld: do not generate quoted section names
    
    LLVM LD doesn't strip the quotes from the section names, and so the
    resulting binary ends up with section names like:
    
      [ 1] ".text"           PROGBITS         ffff82d040200000  00008000
           000000000018cbc1  0000000000000000  AX       0     0     4096
    
    This confuses some tools (like gdb) and prevents proper parsing of the
    binary.
    
    The issue has already been reported and is being fixed in LLD.  In
    order to workaround this issue and keep the GNU ld support define
    different DECL_SECTION macros depending on the used ld
    implementation.
    
    Drop the quotes from the definitions of the debug sections in
    DECL_DEBUG{2}, as those quotes are not required for GNU ld either.
    
    Fixes: 6254920587c3 ('x86: quote section names when defining them in linker script')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 702c9a800eb3ecd4b8595998d37a769d470c5bb0
    master date: 2022-05-02 08:51:45 +0200
---
 xen/arch/x86/xen.lds.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 7c9758c8cc..6759a6f3eb 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -18,7 +18,11 @@ ENTRY(efi_start)
 #else /* !EFI */
 
 #define FORMAT "elf64-x86-64"
-#define DECL_SECTION(x) #x : AT(ADDR(#x) - __XEN_VIRT_START)
+#ifdef CONFIG_LD_IS_GNU
+# define DECL_SECTION(x) x : AT(ADDR(#x) - __XEN_VIRT_START)
+#else
+# define DECL_SECTION(x) x : AT(ADDR(x) - __XEN_VIRT_START)
+#endif
 
 ENTRY(start_pa)
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] xen: io: Fix race between sending an I/O and domain shutdown
Message-Id: <E1nyYQq-0002Lq-0I@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:36 +0000

commit c6e560b90339ca8fc8c6966ed719a3908bfd493a
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Tue Jun 7 14:21:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:21:25 2022 +0200

    xen: io: Fix race between sending an I/O and domain shutdown
    
    Xen provides hypercalls to shutdown (SCHEDOP_shutdown{,_code}) and
    resume a domain (XEN_DOMCTL_resumedomain). They can be used for checkpoint
    where the expectation is the domain should continue as nothing happened
    afterwards.
    
    hvmemul_do_io() and handle_pio() will act differently if the return
    code of hvm_send_ioreq() (resp. hvmemul_do_pio_buffer()) is X86EMUL_RETRY.
    
    In this case, the I/O state will be reset to STATE_IOREQ_NONE (i.e
    no I/O is pending) and/or the PC will not be advanced.
    
    If the shutdown request happens right after the I/O was sent to the
    IOREQ, then emulation code will end up to re-execute the instruction
    and therefore forward again the same I/O (at least when reading IO port).
    
    This would be problem if the access has a side-effect. A dumb example,
    is a device implementing a counter which is incremented by one for every
    access. When running shutdown/resume in a loop, the value read by the
    OS may not be the old value + 1.
    
    Add an extra boolean in the structure hvm_vcpu_io to indicate whether
    the I/O was suspended. This is then used in place of checking the domain
    is shutting down in hvmemul_do_io() and handle_pio() as they should
    act on suspend (i.e. vcpu_start_shutdown_deferral() returns false) rather
    than shutdown.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    master commit: b7e0d8978810b534725e94a321736496928f00a5
    master date: 2022-05-06 17:16:22 +0100
---
 xen/arch/arm/ioreq.c       | 3 ++-
 xen/arch/x86/hvm/emulate.c | 3 ++-
 xen/arch/x86/hvm/io.c      | 7 ++++---
 xen/common/ioreq.c         | 4 ++++
 xen/include/xen/sched.h    | 5 +++++
 5 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/ioreq.c b/xen/arch/arm/ioreq.c
index 308650b400..fbccef212b 100644
--- a/xen/arch/arm/ioreq.c
+++ b/xen/arch/arm/ioreq.c
@@ -80,9 +80,10 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
         return IO_ABORT;
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = ioreq_send(s, &p, 0);
-    if ( rc != IO_RETRY || v->domain->is_shutting_down )
+    if ( rc != IO_RETRY || vio->suspended )
         vio->req.state = STATE_IOREQ_NONE;
     else if ( !ioreq_needs_completion(&vio->req) )
         rc = IO_HANDLED;
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 76a2ccfafe..7da348b5d4 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -239,6 +239,7 @@ static int hvmemul_do_io(
     ASSERT(p.count);
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = hvm_io_intercept(&p);
 
@@ -334,7 +335,7 @@ static int hvmemul_do_io(
         else
         {
             rc = ioreq_send(s, &p, 0);
-            if ( rc != X86EMUL_RETRY || currd->is_shutting_down )
+            if ( rc != X86EMUL_RETRY || vio->suspended )
                 vio->req.state = STATE_IOREQ_NONE;
             else if ( !ioreq_needs_completion(&vio->req) )
                 rc = X86EMUL_OKAY;
diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c
index 046a8eb4ed..69e93b3ea1 100644
--- a/xen/arch/x86/hvm/io.c
+++ b/xen/arch/x86/hvm/io.c
@@ -138,10 +138,11 @@ bool handle_pio(uint16_t port, unsigned int size, int dir)
 
     case X86EMUL_RETRY:
         /*
-         * We should not advance RIP/EIP if the domain is shutting down or
-         * if X86EMUL_RETRY has been returned by an internal handler.
+         * We should not advance RIP/EIP if the vio was suspended (e.g.
+         * because the domain is shutting down) or if X86EMUL_RETRY has
+         * been returned by an internal handler.
          */
-        if ( curr->domain->is_shutting_down || !vcpu_ioreq_pending(curr) )
+        if ( vio->suspended || !vcpu_ioreq_pending(curr) )
             return false;
         break;
 
diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index d732dc045d..42414b750b 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -1256,6 +1256,7 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
     struct vcpu *curr = current;
     struct domain *d = curr->domain;
     struct ioreq_vcpu *sv;
+    struct vcpu_io *vio = &curr->io;
 
     ASSERT(s);
 
@@ -1263,7 +1264,10 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
         return ioreq_send_buffered(s, proto_p);
 
     if ( unlikely(!vcpu_start_shutdown_deferral(curr)) )
+    {
+        vio->suspended = true;
         return IOREQ_STATUS_RETRY;
+    }
 
     list_for_each_entry ( sv,
                           &s->ioreq_vcpu_list,
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 5485d08afb..701963f84c 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -159,6 +159,11 @@ enum vio_completion {
 struct vcpu_io {
     /* I/O request in flight to device model. */
     enum vio_completion  completion;
+    /*
+     * Indicate whether the I/O was not handled because the domain
+     * is about to be paused.
+     */
+    bool                 suspended;
     ioreq_t              req;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] build: suppress GNU ld warning about RWX load segments
Message-Id: <E1nyYR0-0002Ms-33@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:46 +0000

commit fcbee61b21472a814be4383ec7a7d1ae906c4b59
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:21:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:21:49 2022 +0200

    build: suppress GNU ld warning about RWX load segments
    
    We cannot really avoid such and we're also not really at risk because of
    them, as we control page table permissions ourselves rather than relying
    on a loader of some sort. Present GNU ld master started warning about
    such, and hence 2.39 is anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 68f5aac012b9ae36ce9b65d9ca9cc9f232191ad3
    master date: 2022-05-18 11:17:19 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 6fed25ce32..0c22f36adf 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -221,6 +221,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
+
 CFLAGS += $(CFLAGS-y)
 # allow extra CFLAGS externally via EXTRA_CFLAGS_XEN_CORE
 CFLAGS += $(EXTRA_CFLAGS_XEN_CORE)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] build: silence GNU ld warning about executable stacks
Message-Id: <E1nyYRA-0002Np-5v@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:35:56 +0000

commit f6594c3f05bbec0a97cb313378d33fc0eee51cc2
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:22:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:22:11 2022 +0200

    build: silence GNU ld warning about executable stacks
    
    While for C files the compiler is supposed to arrange for emitting
    respective information, for assembly sources we're responsible ourselves.
    Present GNU ld master started warning about such, and hence 2.39 is
    anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 62d22296a95d259c934ca2f39ac511d729cfbb68
    master date: 2022-05-18 11:18:45 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 0c22f36adf..85358930a8 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -221,6 +221,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+$(call cc-option-add,AFLAGS,CC,-Wa$(comma)--noexecstack)
+
 LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
 
 CFLAGS += $(CFLAGS-y)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] ns16550: use poll mode if INTERRUPT_LINE is 0xff
Message-Id: <E1nyYRK-0002Os-8p@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:36:06 +0000

commit c7f9e0e30de957979f3cd040d6748fdd1397fd7f
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 14:22:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:22:50 2022 +0200

    ns16550: use poll mode if INTERRUPT_LINE is 0xff
    
    Intel LPSS has INTERRUPT_LINE set to 0xff by default, that is declared
    by the PCI Local Bus Specification Revision 3.0 (from 2004) as
    "unknown"/"no connection". Fallback to poll mode in this case.
    The 0xff handling is x86-specific, the surrounding code is guarded with
    CONFIG_X86 anyway.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 6a2ea1a2370a0c8a0210accac0ae62e68c185134
    master date: 2022-05-20 12:19:45 +0200
---
 xen/drivers/char/ns16550.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 16a73d0c0e..c7332e02f1 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1162,6 +1162,19 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx)
                             pci_conf_read8(PCI_SBDF(0, b, d, f),
                                            PCI_INTERRUPT_LINE) : 0;
 
+#ifdef CONFIG_X86
+                /*
+                 * PCI Local Bus Specification Revision 3.0 defines 0xff value
+                 * as special only for X86.
+                 */
+                if ( uart->irq == 0xff )
+                    uart->irq = 0;
+#endif
+                if ( !uart->irq )
+                    printk(XENLOG_INFO
+                           "ns16550: %pp: no legacy IRQ, using poll mode\n",
+                           &PCI_SBDF(0, b, d, f));
+
                 return 0;
             }
         }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
Message-Id: <E1nyYRU-0002Ph-Bb@xenbits.xenproject.org>
Date: Tue, 07 Jun 2022 12:36:16 +0000

commit 64249afeb63cf7d70b4faf02e76df5eed82371f9
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:23:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:23:07 2022 +0200

    PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
    
    IOMMU code mapping / unmapping devices and interrupts will misbehave if
    a wrong command line option declared a function "phantom" when there's a
    real device at that position. Warn about this and adjust the specified
    stride (in the worst case ignoring the option altogether).
    
    Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 444b555dc9e09fa3ce90f066e0c88dec9b47f422
    master date: 2022-05-20 12:20:35 +0200
---
 xen/drivers/passthrough/pci.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 37c2d5b1d1..bbacbe41da 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -403,7 +403,24 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
                          phantom_devs[i].slot == PCI_SLOT(devfn) &&
                          phantom_devs[i].stride > PCI_FUNC(devfn) )
                     {
-                        pdev->phantom_stride = phantom_devs[i].stride;
+                        pci_sbdf_t sbdf = pdev->sbdf;
+                        unsigned int stride = phantom_devs[i].stride;
+
+                        while ( (sbdf.fn += stride) > PCI_FUNC(devfn) )
+                        {
+                            if ( pci_conf_read16(sbdf, PCI_VENDOR_ID) == 0xffff &&
+                                 pci_conf_read16(sbdf, PCI_DEVICE_ID) == 0xffff )
+                                continue;
+                            stride <<= 1;
+                            printk(XENLOG_WARNING
+                                   "%pp looks to be a real device; bumping %04x:%02x:%02x stride to %u\n",
+                                   &sbdf, phantom_devs[i].seg,
+                                   phantom_devs[i].bus, phantom_devs[i].slot,
+                                   stride);
+                            sbdf = pdev->sbdf;
+                        }
+                        if ( PCI_FUNC(stride) )
+                           pdev->phantom_stride = stride;
                         break;
                     }
             }
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] docs/misra: introduce rules.rst
Message-Id: <E1nyjyS-0007wE-6Q@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 00:55:04 +0000

commit 4b08435f586e3f605fdc13f7cb38484f37ad42e9
Author:     Stefano Stabellini <stefano.stabellini@xilinx.com>
AuthorDate: Tue May 31 18:44:01 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 7 17:43:47 2022 -0700

    docs/misra: introduce rules.rst
    
    Introduce a list of MISRA C rules that apply to the Xen hypervisor. The
    list is in RST format.
    
    Specify that rules deviations need to be documented. Introduce a
    documentation tag for in-code comments to mark them as deviations. Also
    mention that other documentation mechanisms are work-in-progress.
    
    Add a mention of the new list to CODING_STYLE.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 CODING_STYLE         |   6 +++
 docs/index.rst       |  12 +++++
 docs/misra/rules.rst | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 141 insertions(+)

diff --git a/CODING_STYLE b/CODING_STYLE
index 9f50d9cec4..3386ee1d90 100644
--- a/CODING_STYLE
+++ b/CODING_STYLE
@@ -14,6 +14,12 @@ explicitly (e.g. tools/libxl/CODING_STYLE) but often implicitly (Linux
 coding style is fairly common). In general you should copy the style
 of the surrounding code. If you are unsure please ask.
 
+MISRA C
+-------
+
+The Xen Hypervisor follows some MISRA C coding rules. See
+docs/misra/rules.rst for details.
+
 Indentation
 -----------
 
diff --git a/docs/index.rst b/docs/index.rst
index b75487a05d..2c47cfa999 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -53,6 +53,18 @@ kind of development environment.
    hypervisor-guide/index
 
 
+MISRA C coding guidelines
+-------------------------
+
+MISRA C rules and directive to be used as coding guidelines when writing
+Xen hypervisor code.
+
+.. toctree::
+   :maxdepth: 2
+
+   misra/rules
+
+
 Miscellanea
 -----------
 
diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
new file mode 100644
index 0000000000..7d6a9fe063
--- /dev/null
+++ b/docs/misra/rules.rst
@@ -0,0 +1,123 @@
+.. SPDX-License-Identifier: CC-BY-4.0
+
+MISRA C rules for Xen
+=====================
+
+.. note::
+
+   **IMPORTANT** All MISRA C rules, text, and examples are copyrighted
+   by the MISRA Consortium Limited and used with permission.
+
+   Please refer to https://www.misra.org.uk/ to obtain a copy of MISRA
+   C, or for licensing options for other use of the rules.
+
+The following is the list of MISRA C rules that apply to the Xen
+hypervisor.
+
+It is possible that in specific circumstances it is best not to follow a
+rule because it is not possible or because the alternative leads to
+better code quality. Those cases are called "deviations". They are
+permissible as long as they are documented as an in-code comment using
+the following format::
+
+    /*
+     * MISRA_DEV: Rule ID
+     * Justification text.
+     */
+
+Other documentation mechanisms are work-in-progress.
+
+The existing codebase is not 100% compliant with the rules. Some of the
+violations are meant to be documented as deviations, while some others
+should be fixed. Both compliance and documenting deviations on the
+existing codebase are work-in-progress.
+
+.. list-table::
+   :header-rows: 1
+
+   * - Dir number
+     - Severity
+     - Summary
+     - Notes
+
+   * - `Dir 2.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_02_01.c>`_
+     - Required
+     - All source files shall compile without any compilation errors
+     -
+
+   * - `Dir 4.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_07.c>`_
+     - Required
+     - If a function returns error information then that error
+       information shall be tested
+     -
+
+   * - `Dir 4.10 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_10.c>`_
+     - Required
+     - Precautions shall be taken in order to prevent the contents of a
+       header file being included more than once
+     -
+
+   * - `Dir 4.14 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_14.c>`_
+     - Required
+     - The validity of values received from external sources shall be
+       checked
+     -
+
+.. list-table::
+   :header-rows: 1
+
+   * - Rule number
+     - Severity
+     - Summary
+     - Notes
+
+   * - `Rule 1.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_01_03.c>`_
+     - Required
+     - There shall be no occurrence of undefined or critical unspecified
+       behaviour
+     -
+
+   * - `Rule 3.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_03_02.c>`_
+     - Required
+     - Line-splicing shall not be used in // comments
+     -
+
+   * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
+     - Required
+     - Single-bit named bit fields shall not be of a signed type
+     -
+
+   * - `Rule 8.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_01.c>`_
+     - Required
+     - Types shall be explicitly specified
+     -
+
+   * - `Rule 8.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_04.c>`_
+     - Required
+     - A compatible declaration shall be visible when an object or
+       function with external linkage is defined
+     -
+
+   * - `Rule 8.5 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_05_2.c>`_
+     - Required
+     - An external object or function shall be declared once in one and only one file
+     -
+
+   * - `Rule 8.6 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_06_2.c>`_
+     - Required
+     - An identifier with external linkage shall have exactly one
+       external definition
+     - Declarations without definitions are allowed (specifically when
+       the definition is compiled-out or optimized-out by the compiler)
+
+   * - `Rule 8.8 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_08.c>`_
+     - Required
+     - The static storage class specifier shall be used in all
+       declarations of objects and functions that have internal linkage
+     -
+
+   * - `Rule 8.12 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_12.c>`_
+     - Required
+     - Within an enumerator list the value of an implicitly-specified
+       enumeration constant shall be unique
+     -
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] docs/misra: add Rule 5.1
Message-Id: <E1nyjyc-0007wj-9m@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 00:55:14 +0000

commit 8c1cc69748f4719e6ba8a275c2ecd60747c52c21
Author:     Stefano Stabellini <stefano.stabellini@xilinx.com>
AuthorDate: Tue May 31 18:44:02 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 7 17:44:03 2022 -0700

    docs/misra: add Rule 5.1
    
    Add Rule 5.1, with the additional note that the character limit for Xen
    is 40 characters.
    
    The max length identifiers found by ECLAIR are:
    
    __mitigate_spectre_bhb_clear_insn_start
    domain_pause_by_systemcontroller_nosync
    
    Both of them are 40 characters long.
    
    Explicitly mention that public headers might have longer identifiers.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 docs/misra/rules.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 7d6a9fe063..6ccff07765 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -82,6 +82,13 @@ existing codebase are work-in-progress.
      - Line-splicing shall not be used in // comments
      -
 
+   * - `Rule 5.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_01_2.c>`_
+     - Required
+     - External identifiers shall be distinct
+     - The Xen characters limit for identifiers is 40. Public headers
+       (xen/include/public/) are allowed to retain longer identifiers
+       for backward compatibility.
+
    * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
      - Required
      - Single-bit named bit fields shall not be of a signed type
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/irq: skip unmap_domain_pirq XSM during destruction
Message-Id: <E1nynig-0004TZ-Gn@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:02 +0000

commit ef1df2a144c68833e1d24c1373c14b8141ddb1e2
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Tue Jun 7 14:12:47 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:12:47 2022 +0200

    x86/irq: skip unmap_domain_pirq XSM during destruction
    
    xsm_unmap_domain_irq was seen denying unmap_domain_pirq when called from
    complete_domain_destroy as an RCU callback.  The source context was an
    unexpected, random domain.  Since this is a xen-internal operation,
    going through the XSM hook is inapproriate.
    
    Check d->is_dying and skip the XSM hook when set since this is a cleanup
    operation for a domain being destroyed.
    
    Suggested-by: Roger Pau Monné <roger.pau@citrix.com>
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 2e6f95a942d1927a53f077c301db0b799c54c05a
    master date: 2022-04-08 14:51:52 +0200
---
 xen/arch/x86/irq.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 032fe82167..e0f00902e0 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2343,8 +2343,14 @@ int unmap_domain_pirq(struct domain *d, int pirq)
         nr = msi_desc->msi.nvec;
     }
 
-    ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
-                               msi_desc ? msi_desc->dev : NULL);
+    /*
+     * When called by complete_domain_destroy via RCU, current is a random
+     * domain.  Skip the XSM check since this is a Xen-initiated action.
+     */
+    if ( !d->is_dying )
+        ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
+                                   msi_desc ? msi_desc->dev : NULL);
+
     if ( ret )
         goto done;
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
Message-Id: <E1nyniq-0004UB-KH@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:12 +0000

commit 94b4745948b8f7954129b70498de4bfb12fe9f5d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:14:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:14:07 2022 +0200

    xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
    
    A hypervisor built without CONFIG_GDBSX will crash in case the
    XEN_DOMCTL_gdbsx_guestmemio domctl is being called, as the call will
    end up in iommu_do_domctl() with d == NULL:
    
      (XEN) CPU:    6
      (XEN) RIP:    e008:[<ffff82d040269984>] iommu_do_domctl+0x4/0x30
      (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d0v0)
      (XEN) rax: 00000000000003e8   rbx: ffff830856277ef8   rcx: ffff830856277fff
      ...
      (XEN) Xen call trace:
      (XEN)    [<ffff82d040269984>] R iommu_do_domctl+0x4/0x30
      (XEN)    [<ffff82d04035cd5f>] S arch_do_domctl+0x7f/0x2330
      (XEN)    [<ffff82d040239e46>] S do_domctl+0xe56/0x1930
      (XEN)    [<ffff82d040238ff0>] S do_domctl+0/0x1930
      (XEN)    [<ffff82d0402f8c59>] S pv_hypercall+0x99/0x110
      (XEN)    [<ffff82d0402f5161>] S arch/x86/pv/domain.c#_toggle_guest_pt+0x11/0x90
      (XEN)    [<ffff82d040366288>] S lstar_enter+0x128/0x130
      (XEN)
      (XEN) Pagetable walk from 0000000000000144:
      (XEN)  L4[0x000] = 0000000000000000 ffffffffffffffff
      (XEN)
      (XEN) ****************************************
      (XEN) Panic on CPU 6:
      (XEN) FATAL PAGE FAULT
      (XEN) [error_code=0000]
      (XEN) Faulting linear address: 0000000000000144
      (XEN) ****************************************
    
    It used to be permitted to pass DOMID_IDLE to dbg_rw_mem(), which is why the
    special case skipping the domid checks exists.  Now that it is only permitted
    to pass proper domids, remove the special case, making 'd' always valid.
    
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Fixes: e726a82ca0dc ("xen: make gdbsx support configurable")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: f00daf1fb3213a9b0335d9dcd90fe9cb5c02b7a9
    master date: 2022-04-19 17:07:08 +0100
---
 xen/common/domctl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index af044e2eda..b7dc6080d4 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -303,7 +303,6 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
         if ( op->domain == DOMID_INVALID )
         {
     case XEN_DOMCTL_createdomain:
-    case XEN_DOMCTL_gdbsx_guestmemio:
             d = NULL;
             break;
         }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] VT-d: refuse to use IOMMU with reserved CAP.ND value
Message-Id: <E1nynj0-0004Um-NQ@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:22 +0000

commit e73ab4e84bb065b65c502750413f2db3e7ced7e1
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:14:41 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:14:41 2022 +0200

    VT-d: refuse to use IOMMU with reserved CAP.ND value
    
    The field taking the value 7 (resulting in 18-bit DIDs when using the
    calculation in cap_ndoms(), when the DID fields are only 16 bits wide)
    is reserved. Instead of misbehaving in case we would encounter such an
    IOMMU, refuse to use it.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    master commit: a1545fbf45c689aff39ce76a6eaa609d32ef72a7
    master date: 2022-04-20 10:54:26 +0200
---
 xen/drivers/passthrough/vtd/iommu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 68dd2f5500..a063462cff 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1276,8 +1276,11 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     quirk_iommu_caps(iommu);
 
+    nr_dom = cap_ndoms(iommu->cap);
+
     if ( cap_fault_reg_offset(iommu->cap) +
          cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >= PAGE_SIZE ||
+         ((nr_dom - 1) >> 16) /* I.e. cap.nd > 6 */ ||
          ecap_iotlb_offset(iommu->ecap) >= PAGE_SIZE )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported\n");
@@ -1302,7 +1305,6 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
         vtd_ops.sync_cache = sync_cache;
 
     /* allocate domain id bitmap */
-    nr_dom = cap_ndoms(iommu->cap);
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
     if ( !iommu->domid_bitmap )
         return -ENOMEM;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/mm: avoid inadvertently degrading a TLB flush to local only
Message-Id: <E1nynjA-0004VR-Qq@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:32 +0000

commit fc371c9f4f06b38073ffaf5b5a97f2621cc1ae17
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Jun 7 14:15:15 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:15:15 2022 +0200

    x86/mm: avoid inadvertently degrading a TLB flush to local only
    
    If the direct map is incorrectly modified with interrupts disabled,
    the required TLB flushes are degraded to flushing the local CPU only.
    
    This could lead to very hard to diagnose problems as different CPUs will
    end up with different views of memory. Although, no such issues have yet
    been identified.
    
    Change the check in the flush_area() macro to look at system_state
    instead. This defers the switch from local to all later in the boot
    (see xen/arch/x86/setup.c:__start_xen()). This is fine because
    additional PCPUs are not brought up until after the system state is
    SYS_STATE_smp_boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    
    x86/flushtlb: remove flush_area check on system state
    
    Booting with Shadow Stacks leads to the following assert on a debug
    hypervisor:
    
    Assertion 'local_irq_is_enabled()' failed at arch/x86/smp.c:265
    ----[ Xen-4.17.0-10.24-d  x86_64  debug=y  Not tainted ]----
    CPU:    0
    RIP:    e008:[<ffff82d040345300>] flush_area_mask+0x40/0x13e
    [...]
    Xen call trace:
       [<ffff82d040345300>] R flush_area_mask+0x40/0x13e
       [<ffff82d040338a40>] F modify_xen_mappings+0xc5/0x958
       [<ffff82d0404474f9>] F arch/x86/alternative.c#_alternative_instructions+0xb7/0xb9
       [<ffff82d0404476cc>] F alternative_branches+0xf/0x12
       [<ffff82d04044e37d>] F __start_xen+0x1ef4/0x2776
       [<ffff82d040203344>] F __high_start+0x94/0xa0
    
    This is due to SYS_STATE_smp_boot being set before calling
    alternative_branches(), and the flush in modify_xen_mappings() then
    using flush_area_all() with interrupts disabled.  Note that
    alternative_branches() is called before APs are started, so the flush
    must be a local one (and indeed the cpumask passed to
    flush_area_mask() just contains one CPU).
    
    Take the opportunity to simplify a bit the logic and make flush_area()
    an alias of flush_area_all() in mm.c, taking into account that
    cpu_online_map just contains the BSP before APs are started.  This
    requires widening the assert in flush_area_mask() to allow being
    called with interrupts disabled as long as it's strictly a local only
    flush.
    
    The overall result is that a conditional can be removed from
    flush_area().
    
    While there also introduce an ASSERT to check that a vCPU state flush
    is not issued for the local CPU only.
    
    Fixes: 78e072bc37 ('x86/mm: avoid inadvertently degrading a TLB flush to local only')
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 78e072bc375043e81691a59454e09f0b38241ddd
    master date: 2022-04-20 10:55:01 +0200
    master commit: 9f735ee4903f1b9f1966bb4ba5b5616b03ae08b5
    master date: 2022-05-25 11:09:46 +0200
---
 xen/arch/x86/mm.c  | 10 ++--------
 xen/arch/x86/smp.c |  5 ++++-
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index afb4febf6f..80f99dff77 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5019,14 +5019,8 @@ l1_pgentry_t *virt_to_xen_l1e(unsigned long v)
 #define l1f_to_lNf(f) (((f) & _PAGE_PRESENT) ? ((f) |  _PAGE_PSE) : (f))
 #define lNf_to_l1f(f) (((f) & _PAGE_PRESENT) ? ((f) & ~_PAGE_PSE) : (f))
 
-/*
- * map_pages_to_xen() can be called with interrupts disabled during
- * early bootstrap. In this case it is safe to use flush_area_local()
- * and avoid locking because only the local CPU is online.
- */
-#define flush_area(v,f) (!local_irq_is_enabled() ?              \
-                         flush_area_local((const void *)v, f) : \
-                         flush_area_all((const void *)v, f))
+/* flush_area_all() can be used prior to any other CPU being online.  */
+#define flush_area(v, f) flush_area_all((const void *)(v), f)
 
 #define L3T_INIT(page) (page) = ZERO_BLOCK_PTR
 
diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index eef0f9c6cb..3556ec1166 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -262,7 +262,10 @@ void flush_area_mask(const cpumask_t *mask, const void *va, unsigned int flags)
 {
     unsigned int cpu = smp_processor_id();
 
-    ASSERT(local_irq_is_enabled());
+    /* Local flushes can be performed with interrupts disabled. */
+    ASSERT(local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu)));
+    /* Exclude use of FLUSH_VCPU_STATE for the local CPU. */
+    ASSERT(!cpumask_test_cpu(cpu, mask) || !(flags & FLUSH_VCPU_STATE));
 
     if ( (flags & ~(FLUSH_VCPU_STATE | FLUSH_ORDER_MASK)) &&
          cpumask_test_cpu(cpu, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] xen/build: Fix dependency for the MAP rule
Message-Id: <E1nynjK-0004Vy-To@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:42 +0000

commit 3b154fdda990d4229392c389f4384acd3e7c1dc2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 7 14:16:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:08 2022 +0200

    xen/build: Fix dependency for the MAP rule
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    master commit: e1e72198213b80b7a82bdc90f96ed05ae4f53e20
    master date: 2022-04-20 19:10:59 +0100
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 212c819498..6fed25ce32 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -456,7 +456,7 @@ cscope:
 	cscope -k -b -q
 
 .PHONY: _MAP
-_MAP:
+_MAP: $(TARGET)
 	$(NM) -n $(TARGET)-syms | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' > System.map
 
 %.o %.i %.s: %.c FORCE
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] tools/libs/evtchn: don't set errno to negative values
Message-Id: <E1nynjV-0004WP-0c@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:55:53 +0000

commit defa8807bf6d89508a911fe08f74b7c5b2f5b396
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:16:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:30 2022 +0200

    tools/libs/evtchn: don't set errno to negative values
    
    Setting errno to a negative value makes no sense.
    
    Fixes: 6b6500b3cbaa ("tools/libs/evtchn: Add support for restricting a handle")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 60245b71c1cd001686fa7b7a26869cbcb80d074c
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/evtchn/freebsd.c | 2 +-
 tools/libs/evtchn/minios.c  | 2 +-
 tools/libs/evtchn/netbsd.c  | 2 +-
 tools/libs/evtchn/solaris.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/libs/evtchn/freebsd.c b/tools/libs/evtchn/freebsd.c
index 7427ab2408..fa17a0f8db 100644
--- a/tools/libs/evtchn/freebsd.c
+++ b/tools/libs/evtchn/freebsd.c
@@ -58,7 +58,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index e5dfdc5ef5..c0bd5429ee 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -97,7 +97,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/netbsd.c b/tools/libs/evtchn/netbsd.c
index 1cebc21ffc..56409513bc 100644
--- a/tools/libs/evtchn/netbsd.c
+++ b/tools/libs/evtchn/netbsd.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/solaris.c b/tools/libs/evtchn/solaris.c
index df9579df17..beaa772142 100644
--- a/tools/libs/evtchn/solaris.c
+++ b/tools/libs/evtchn/solaris.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
     return -1;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] tools/libs/ctrl: don't set errno to a negative value
Message-Id: <E1nynjf-0004XO-3g@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:03 +0000

commit f151bb7ce45d7995c7fc4d3dd9df3f96cf637ffc
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:16:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:16:49 2022 +0200

    tools/libs/ctrl: don't set errno to a negative value
    
    The claimed reason for setting errno to -1 is wrong. On x86
    xc_domain_pod_target() will set errno to a sane value in the error
    case.
    
    Fixes: ff1745d5882b ("tools: libxl: do not set the PoD target on ARM")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: a0fb7e0e73483ed042d5ca34861a891a51ad337b
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/ctrl/xc_domain.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index e7cea4a17d..52892fca18 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -1276,9 +1276,7 @@ int xc_domain_get_pod_target(xc_interface *xch,
                              uint64_t *pod_cache_pages,
                              uint64_t *pod_entries)
 {
-    /* On x86 (above) xc_domain_pod_target will incorrectly return -1
-     * with errno==-1 on error. Do the same for least surprise. */
-    errno = -1;
+    errno = EOPNOTSUPP;
     return -1;
 }
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] tools/libs/guest: don't set errno to a negative value
Message-Id: <E1nynjp-0004Xv-6b@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:13 +0000

commit b8a3edba1f284323c8292a0ec372d8f79d39d4e8
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:17:22 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:17:22 2022 +0200

    tools/libs/guest: don't set errno to a negative value
    
    Setting errno to a negative error value makes no sense.
    
    Fixes: cb99a64029c9 ("libxc: arm: allow passing a device tree blob to the guest")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 438e96ab479495a932391a22e219ee62fa8c4f47
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/guest/xg_dom_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/guest/xg_dom_core.c b/tools/libs/guest/xg_dom_core.c
index 98ef8e8fc9..8543a8fea8 100644
--- a/tools/libs/guest/xg_dom_core.c
+++ b/tools/libs/guest/xg_dom_core.c
@@ -856,7 +856,7 @@ int xc_dom_devicetree_file(struct xc_dom_image *dom, const char *filename)
         return -1;
     return 0;
 #else
-    errno = -EINVAL;
+    errno = EINVAL;
     return -1;
 #endif
 }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] tools/libs/light: don't set errno to a negative value
Message-Id: <E1nynjz-0004YY-9T@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:23 +0000

commit 2e6062aa824e763407e1505cfdf0c71ce0f515ca
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:17:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:17:37 2022 +0200

    tools/libs/light: don't set errno to a negative value
    
    Setting errno to a negative value makes no sense.
    
    Fixes: e78e8b9bb649 ("libxl: Add interface for querying hypervisor about PCI topology")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 2419a159fb943c24a6f2439604b9fdb1478fcd08
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/light/libxl_linux.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/light/libxl_linux.c b/tools/libs/light/libxl_linux.c
index 8d62dfd255..27f2bce718 100644
--- a/tools/libs/light/libxl_linux.c
+++ b/tools/libs/light/libxl_linux.c
@@ -288,7 +288,7 @@ int libxl__pci_topology_init(libxl__gc *gc,
         if (i == num_devs) {
             LOG(ERROR, "Too many devices");
             err = ERROR_FAIL;
-            errno = -ENOSPC;
+            errno = ENOSPC;
             goto out;
         }
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] xen/iommu: cleanup iommu related domctl handling
Message-Id: <E1nynk9-0004Z7-CU@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:33 +0000

commit 3b1031b3b4e26db93b532c83e9a4e5f5f33f9f73
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:18:01 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:18:01 2022 +0200

    xen/iommu: cleanup iommu related domctl handling
    
    Today iommu_do_domctl() is being called from arch_do_domctl() in the
    "default:" case of a switch statement. This has led already to crashes
    due to unvalidated parameters.
    
    Fix that by moving the call of iommu_do_domctl() to the main switch
    statement of do_domctl().
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> # Arm
    master commit: 9cd7e31b3f584e97a138a770cfb031a91a867936
    master date: 2022-04-26 10:23:58 +0200
---
 xen/arch/arm/domctl.c   | 11 +----------
 xen/arch/x86/domctl.c   |  2 +-
 xen/common/domctl.c     |  7 +++++++
 xen/include/xen/iommu.h | 12 +++++++++---
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/domctl.c b/xen/arch/arm/domctl.c
index b7d27f37df..a8c48b0bea 100644
--- a/xen/arch/arm/domctl.c
+++ b/xen/arch/arm/domctl.c
@@ -174,16 +174,7 @@ long arch_do_domctl(struct xen_domctl *domctl, struct domain *d,
         return rc;
     }
     default:
-    {
-        int rc;
-
-        rc = subarch_do_domctl(domctl, d, u_domctl);
-
-        if ( rc == -ENOSYS )
-            rc = iommu_do_domctl(domctl, d, u_domctl);
-
-        return rc;
-    }
+        return subarch_do_domctl(domctl, d, u_domctl);
     }
 }
 
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index b129d2cc2f..8dc84796b9 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1374,7 +1374,7 @@ long arch_do_domctl(
         break;
 
     default:
-        ret = iommu_do_domctl(domctl, d, u_domctl);
+        ret = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index b7dc6080d4..99952bfe6e 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -866,6 +866,13 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
             copyback = 1;
         break;
 
+    case XEN_DOMCTL_assign_device:
+    case XEN_DOMCTL_test_assign_device:
+    case XEN_DOMCTL_deassign_device:
+    case XEN_DOMCTL_get_device_group:
+        ret = iommu_do_domctl(op, d, u_domctl);
+        break;
+
     default:
         ret = arch_do_domctl(op, d, u_domctl);
         break;
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index cd79374a14..e733ebf69d 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -344,8 +344,17 @@ struct domain_iommu {
 /* Does the IOMMU pagetable need to be kept synchronized with the P2M */
 #ifdef CONFIG_HAS_PASSTHROUGH
 #define need_iommu_pt_sync(d)     (dom_iommu(d)->need_sync)
+
+int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 #else
 #define need_iommu_pt_sync(d)     ({ (void)(d); false; })
+
+static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                                  XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
+{
+    return -ENOSYS;
+}
 #endif
 
 int __must_check iommu_suspend(void);
@@ -359,9 +368,6 @@ int iommu_do_pci_domctl(struct xen_domctl *, struct domain *d,
                         XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
 #endif
 
-int iommu_do_domctl(struct xen_domctl *, struct domain *d,
-                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
-
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] IOMMU: make domctl handler tolerate NULL domain
Message-Id: <E1nynkJ-0004Zf-FL@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:43 +0000

commit dc798302e7d4e55f518e10fa00d654abd6695e5c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:18:41 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:18:41 2022 +0200

    IOMMU: make domctl handler tolerate NULL domain
    
    Besides the reporter's issue of hitting a NULL deref when !CONFIG_GDBSX,
    XEN_DOMCTL_test_assign_device can legitimately end up having NULL passed
    here, when the domctl was passed DOMID_INVALID.
    
    Fixes: 71e617a6b8f6 ("use is_iommu_enabled() where appropriate...")
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    master commit: fa4d84e6dd3c3bfd23a525b75a5483d4ce15adbb
    master date: 2022-04-26 10:25:54 +0200
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 98c6550a36..9a2b1e7808 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -515,7 +515,7 @@ int iommu_do_domctl(
 {
     int ret = -ENODEV;
 
-    if ( !is_iommu_enabled(d) )
+    if ( !(d ? is_iommu_enabled(d) : iommu_enabled) )
         return -EOPNOTSUPP;
 
 #ifdef CONFIG_HAS_PCI
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] IOMMU/x86: disallow device assignment to PoD guests
Message-Id: <E1nynkT-0004aE-Ig@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:56:53 +0000

commit 9e818d4edc3d63df30e18d4061768c5b8fe3edba
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:19:18 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:19:18 2022 +0200

    IOMMU/x86: disallow device assignment to PoD guests
    
    While it is okay for IOMMU page tables to be set up for guests starting
    in PoD mode, actual device assignment may only occur once all PoD
    entries have been removed from the P2M. So far this was enforced only
    for boot-time assignment, and only in the tool stack.
    
    Also use the new function to replace p2m_pod_entry_count(): Its unlocked
    access to p2m->pod.entry_count wasn't really okay (irrespective of the
    result being stale by the time the caller gets to see it). Nor was the
    use of that function in line with the immediately preceding comment: A
    PoD guest isn't just one with a non-zero entry count, but also one with
    a non-empty cache (e.g. prior to actually launching the guest).
    
    To allow the tool stack to see a consistent snapshot of PoD state, move
    the tail of XENMEM_{get,set}_pod_target handling into a function, adding
    proper locking there.
    
    In libxl take the liberty to use the new local variable r also for a
    pre-existing call into libxc.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: ad4312d764e8b40a1e45b64aac6d840a60c59f13
    master date: 2022-05-02 08:48:02 +0200
---
 xen/arch/x86/mm.c                   |  6 +-----
 xen/arch/x86/mm/p2m-pod.c           | 43 ++++++++++++++++++++++++++++++++++++-
 xen/common/vm_event.c               |  2 +-
 xen/drivers/passthrough/x86/iommu.c |  3 ++-
 xen/include/asm-x86/p2m.h           | 21 +++++++++---------
 5 files changed, 57 insertions(+), 18 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 80f99dff77..13f9dd9db9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4763,7 +4763,6 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     {
         xen_pod_target_t target;
         struct domain *d;
-        struct p2m_domain *p2m;
 
         if ( copy_from_guest(&target, arg, 1) )
             return -EFAULT;
@@ -4798,10 +4797,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         }
         else if ( rc >= 0 )
         {
-            p2m = p2m_get_hostp2m(d);
-            target.tot_pages       = domain_tot_pages(d);
-            target.pod_cache_pages = p2m->pod.count;
-            target.pod_entries     = p2m->pod.entry_count;
+            p2m_pod_get_mem_target(d, &target);
 
             if ( __copy_to_guest(arg, &target, 1) )
             {
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index efc9b4bb55..c1d2693683 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -20,6 +20,7 @@
  */
 
 #include <xen/event.h>
+#include <xen/iocap.h>
 #include <xen/ioreq.h>
 #include <xen/mm.h>
 #include <xen/sched.h>
@@ -361,7 +362,10 @@ p2m_pod_set_mem_target(struct domain *d, unsigned long target)
 
     ASSERT( pod_target >= p2m->pod.count );
 
-    ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        ret = -ENOTEMPTY;
+    else
+        ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
 
 out:
     pod_unlock(p2m);
@@ -369,6 +373,23 @@ out:
     return ret;
 }
 
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+    ASSERT(is_hvm_domain(d));
+
+    pod_lock(p2m);
+    lock_page_alloc(p2m);
+
+    target->tot_pages       = domain_tot_pages(d);
+    target->pod_cache_pages = p2m->pod.count;
+    target->pod_entries     = p2m->pod.entry_count;
+
+    unlock_page_alloc(p2m);
+    pod_unlock(p2m);
+}
+
 int p2m_pod_empty_cache(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -1371,6 +1392,9 @@ guest_physmap_mark_populate_on_demand(struct domain *d, unsigned long gfn,
     if ( !paging_mode_translate(d) )
         return -EINVAL;
 
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        return -ENOTEMPTY;
+
     do {
         rc = mark_populate_on_demand(d, gfn, chunk_order);
 
@@ -1392,3 +1416,20 @@ void p2m_pod_init(struct p2m_domain *p2m)
     for ( i = 0; i < ARRAY_SIZE(p2m->pod.mrp.list); ++i )
         p2m->pod.mrp.list[i] = gfn_x(INVALID_GFN);
 }
+
+bool p2m_pod_active(const struct domain *d)
+{
+    struct p2m_domain *p2m;
+    bool res;
+
+    if ( !is_hvm_domain(d) )
+        return false;
+
+    p2m = p2m_get_hostp2m(d);
+
+    pod_lock(p2m);
+    res = p2m->pod.entry_count | p2m->pod.count;
+    pod_unlock(p2m);
+
+    return res;
+}
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index 44d542f23e..edafc232ca 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -639,7 +639,7 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec)
 
             rc = -EXDEV;
             /* Disallow paging in a PoD guest */
-            if ( p2m_pod_entry_count(p2m_get_hostp2m(d)) )
+            if ( p2m_pod_active(d) )
                 break;
 
             /* domain_pause() not required here, see XSA-99 */
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index edb2d9bd64..f3aaec8254 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -496,11 +496,12 @@ bool arch_iommu_use_permitted(const struct domain *d)
 {
     /*
      * Prevent device assign if mem paging, mem sharing or log-dirty
-     * have been enabled for this domain.
+     * have been enabled for this domain, or if PoD is still in active use.
      */
     return d == dom_io ||
            (likely(!mem_sharing_enabled(d)) &&
             likely(!vm_event_check_ring(d->vm_event_paging)) &&
+            likely(!p2m_pod_active(d)) &&
             likely(!p2m_get_hostp2m(d)->global_logdirty));
 }
 
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 422a8b228f..46e8b94a49 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -697,6 +697,12 @@ int p2m_pod_empty_cache(struct domain *d);
  * domain matches target */
 int p2m_pod_set_mem_target(struct domain *d, unsigned long target);
 
+/* Obtain a consistent snapshot of PoD related domain state. */
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target);
+
+/* Check whether PoD is (still) active in a domain. */
+bool p2m_pod_active(const struct domain *d);
+
 /* Scan pod cache when offline/broken page triggered */
 int
 p2m_pod_offline_or_broken_hit(struct page_info *p);
@@ -705,11 +711,6 @@ p2m_pod_offline_or_broken_hit(struct page_info *p);
 void
 p2m_pod_offline_or_broken_replace(struct page_info *p);
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return p2m->pod.entry_count;
-}
-
 void p2m_pod_init(struct p2m_domain *p2m);
 
 #else
@@ -725,6 +726,11 @@ static inline int p2m_pod_empty_cache(struct domain *d)
     return 0;
 }
 
+static inline bool p2m_pod_active(const struct domain *d)
+{
+    return false;
+}
+
 static inline int p2m_pod_offline_or_broken_hit(struct page_info *p)
 {
     return 0;
@@ -735,11 +741,6 @@ static inline void p2m_pod_offline_or_broken_replace(struct page_info *p)
     ASSERT_UNREACHABLE();
 }
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return 0;
-}
-
 static inline void p2m_pod_init(struct p2m_domain *p2m) {}
 
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
Message-Id: <E1nynkd-0004b0-Lq@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:03 +0000

commit 30c9ec31b3035bf08a34799f99c06a7bbcaec0ab
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:04 2022 +0200

    x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
    
    Windows Server 2019 Essentials will unconditionally attempt to read
    P5_MC_ADDR MSR at boot and throw a BSOD if injected a #GP.
    
    Fix this by mapping MSR_P5_MC_{ADDR,TYPE} to
    MSR_IA32_MCi_{ADDR,STATUS}, as reported also done by hardware in Intel
    SDM "Mapping of the Pentium Processor Machine-Check Errors to the
    Machine-Check Architecture" section.
    
    Reported-by: Steffen Einsle <einsle@phptrix.de>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: ce59e472b581e4923f6892172dde62b88c8aa8b7
    master date: 2022-05-02 08:49:12 +0200
---
 xen/arch/x86/cpu/mcheck/mce.h       |  6 ++++++
 xen/arch/x86/cpu/mcheck/mce_intel.c | 19 +++++++++++++++++++
 xen/arch/x86/cpu/mcheck/vmce.c      |  2 ++
 xen/arch/x86/msr.c                  |  2 ++
 xen/include/asm-x86/msr-index.h     |  3 +++
 5 files changed, 32 insertions(+)

diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 1953626919..192315ecfa 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -169,6 +169,12 @@ static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
         if (msr >= MSR_IA32_MC0_CTL2 &&
             msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) )
             return 1;
+        fallthrough;
+
+    case X86_VENDOR_CENTAUR:
+    case X86_VENDOR_SHANGHAI:
+        if (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE)
+            return 1;
         break;
 
     case X86_VENDOR_AMD:
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index bb9f3a3ff7..d364e9bf5a 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -1001,8 +1001,27 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
 
 int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
 {
+    const struct cpuid_policy *cp = v->domain->arch.cpuid;
     unsigned int bank = msr - MSR_IA32_MC0_CTL2;
 
+    switch ( msr )
+    {
+    case MSR_P5_MC_ADDR:
+        /*
+         * Bank 0 is used for the 'bank 0 quirk' on older processors.
+         * See vcpu_fill_mc_msrs() for reference.
+         */
+        *val = v->arch.vmce.bank[1].mci_addr;
+        return 1;
+
+    case MSR_P5_MC_TYPE:
+        *val = v->arch.vmce.bank[1].mci_status;
+        return 1;
+    }
+
+    if ( !(cp->x86_vendor & X86_VENDOR_INTEL) )
+        return 0;
+
     if ( bank < GUEST_MC_BANK_NUM )
     {
         *val = v->arch.vmce.bank[bank].mci_ctl2;
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index eb6434a3ba..0899df58bc 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -150,6 +150,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
     default:
         switch ( boot_cpu_data.x86_vendor )
         {
+        case X86_VENDOR_CENTAUR:
+        case X86_VENDOR_SHANGHAI:
         case X86_VENDOR_INTEL:
             ret = vmce_intel_rdmsr(v, msr, val);
             break;
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 999ddf5107..0739d00e74 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -267,6 +267,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         *val = msrs->misc_features_enables.raw;
         break;
 
+    case MSR_P5_MC_ADDR:
+    case MSR_P5_MC_TYPE:
     case MSR_IA32_MCG_CAP     ... MSR_IA32_MCG_CTL:      /* 0x179 -> 0x17b */
     case MSR_IA32_MCx_CTL2(0) ... MSR_IA32_MCx_CTL2(31): /* 0x280 -> 0x29f */
     case MSR_IA32_MCx_CTL(0)  ... MSR_IA32_MCx_MISC(31): /* 0x400 -> 0x47f */
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 3ea30aab75..947778105f 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -15,6 +15,9 @@
  * abbreviated name.  Exceptions will be considered on a case-by-case basis.
  */
 
+#define MSR_P5_MC_ADDR                      0
+#define MSR_P5_MC_TYPE                      0x00000001
+
 #define MSR_APIC_BASE                       0x0000001b
 #define  APIC_BASE_BSP                      (_AC(1, ULL) <<  8)
 #define  APIC_BASE_EXTD                     (_AC(1, ULL) << 10)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] kconfig: detect LD implementation
Message-Id: <E1nynkn-0004d1-Oc@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:13 +0000

commit c92c99fdfaec7a740daba5ef97720af35d1008f7
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:25 2022 +0200

    kconfig: detect LD implementation
    
    Detect GNU and LLVM ld implementations. This is required for further
    patches that will introduce diverging behaviour depending on the
    linker implementation in use.
    
    Note that LLVM ld returns "compatible with GNU linkers" as part of the
    version string, so be on the safe side and use '^' to only match at
    the start of the line in case LLVM ever decides to change the text to
    use "compatible with GNU ld" instead.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: c70c4b624f85f7d4e28c70a804a0a3f20d73092b
    master date: 2022-05-02 08:50:39 +0200
---
 xen/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/xen/Kconfig b/xen/Kconfig
index bcbd2758e5..0c89afd50f 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -23,6 +23,12 @@ config CLANG_VERSION
 	int
 	default $(shell,$(BASEDIR)/scripts/clang-version.sh $(CC))
 
+config LD_IS_GNU
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^GNU ld")
+
+config LD_IS_LLVM
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
+
 # -fvisibility=hidden reduces -fpic cost, if it's available
 config CC_HAS_VISIBILITY_ATTRIBUTE
 	def_bool $(cc-option,-fvisibility=hidden)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] linker/lld: do not generate quoted section names
Message-Id: <E1nynkx-0004da-RP@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:23 +0000

commit 0a7f20c0df7e8ad656396c6c038c7281bbbb0890
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:20:45 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:20:45 2022 +0200

    linker/lld: do not generate quoted section names
    
    LLVM LD doesn't strip the quotes from the section names, and so the
    resulting binary ends up with section names like:
    
      [ 1] ".text"           PROGBITS         ffff82d040200000  00008000
           000000000018cbc1  0000000000000000  AX       0     0     4096
    
    This confuses some tools (like gdb) and prevents proper parsing of the
    binary.
    
    The issue has already been reported and is being fixed in LLD.  In
    order to workaround this issue and keep the GNU ld support define
    different DECL_SECTION macros depending on the used ld
    implementation.
    
    Drop the quotes from the definitions of the debug sections in
    DECL_DEBUG{2}, as those quotes are not required for GNU ld either.
    
    Fixes: 6254920587c3 ('x86: quote section names when defining them in linker script')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 702c9a800eb3ecd4b8595998d37a769d470c5bb0
    master date: 2022-05-02 08:51:45 +0200
---
 xen/arch/x86/xen.lds.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 7c9758c8cc..6759a6f3eb 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -18,7 +18,11 @@ ENTRY(efi_start)
 #else /* !EFI */
 
 #define FORMAT "elf64-x86-64"
-#define DECL_SECTION(x) #x : AT(ADDR(#x) - __XEN_VIRT_START)
+#ifdef CONFIG_LD_IS_GNU
+# define DECL_SECTION(x) x : AT(ADDR(#x) - __XEN_VIRT_START)
+#else
+# define DECL_SECTION(x) x : AT(ADDR(x) - __XEN_VIRT_START)
+#endif
 
 ENTRY(start_pa)
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] xen: io: Fix race between sending an I/O and domain shutdown
Message-Id: <E1nynl7-0004e9-UY@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:33 +0000

commit c6e560b90339ca8fc8c6966ed719a3908bfd493a
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Tue Jun 7 14:21:25 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:21:25 2022 +0200

    xen: io: Fix race between sending an I/O and domain shutdown
    
    Xen provides hypercalls to shutdown (SCHEDOP_shutdown{,_code}) and
    resume a domain (XEN_DOMCTL_resumedomain). They can be used for checkpoint
    where the expectation is the domain should continue as nothing happened
    afterwards.
    
    hvmemul_do_io() and handle_pio() will act differently if the return
    code of hvm_send_ioreq() (resp. hvmemul_do_pio_buffer()) is X86EMUL_RETRY.
    
    In this case, the I/O state will be reset to STATE_IOREQ_NONE (i.e
    no I/O is pending) and/or the PC will not be advanced.
    
    If the shutdown request happens right after the I/O was sent to the
    IOREQ, then emulation code will end up to re-execute the instruction
    and therefore forward again the same I/O (at least when reading IO port).
    
    This would be problem if the access has a side-effect. A dumb example,
    is a device implementing a counter which is incremented by one for every
    access. When running shutdown/resume in a loop, the value read by the
    OS may not be the old value + 1.
    
    Add an extra boolean in the structure hvm_vcpu_io to indicate whether
    the I/O was suspended. This is then used in place of checking the domain
    is shutting down in hvmemul_do_io() and handle_pio() as they should
    act on suspend (i.e. vcpu_start_shutdown_deferral() returns false) rather
    than shutdown.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    master commit: b7e0d8978810b534725e94a321736496928f00a5
    master date: 2022-05-06 17:16:22 +0100
---
 xen/arch/arm/ioreq.c       | 3 ++-
 xen/arch/x86/hvm/emulate.c | 3 ++-
 xen/arch/x86/hvm/io.c      | 7 ++++---
 xen/common/ioreq.c         | 4 ++++
 xen/include/xen/sched.h    | 5 +++++
 5 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/ioreq.c b/xen/arch/arm/ioreq.c
index 308650b400..fbccef212b 100644
--- a/xen/arch/arm/ioreq.c
+++ b/xen/arch/arm/ioreq.c
@@ -80,9 +80,10 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
         return IO_ABORT;
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = ioreq_send(s, &p, 0);
-    if ( rc != IO_RETRY || v->domain->is_shutting_down )
+    if ( rc != IO_RETRY || vio->suspended )
         vio->req.state = STATE_IOREQ_NONE;
     else if ( !ioreq_needs_completion(&vio->req) )
         rc = IO_HANDLED;
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 76a2ccfafe..7da348b5d4 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -239,6 +239,7 @@ static int hvmemul_do_io(
     ASSERT(p.count);
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = hvm_io_intercept(&p);
 
@@ -334,7 +335,7 @@ static int hvmemul_do_io(
         else
         {
             rc = ioreq_send(s, &p, 0);
-            if ( rc != X86EMUL_RETRY || currd->is_shutting_down )
+            if ( rc != X86EMUL_RETRY || vio->suspended )
                 vio->req.state = STATE_IOREQ_NONE;
             else if ( !ioreq_needs_completion(&vio->req) )
                 rc = X86EMUL_OKAY;
diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c
index 046a8eb4ed..69e93b3ea1 100644
--- a/xen/arch/x86/hvm/io.c
+++ b/xen/arch/x86/hvm/io.c
@@ -138,10 +138,11 @@ bool handle_pio(uint16_t port, unsigned int size, int dir)
 
     case X86EMUL_RETRY:
         /*
-         * We should not advance RIP/EIP if the domain is shutting down or
-         * if X86EMUL_RETRY has been returned by an internal handler.
+         * We should not advance RIP/EIP if the vio was suspended (e.g.
+         * because the domain is shutting down) or if X86EMUL_RETRY has
+         * been returned by an internal handler.
          */
-        if ( curr->domain->is_shutting_down || !vcpu_ioreq_pending(curr) )
+        if ( vio->suspended || !vcpu_ioreq_pending(curr) )
             return false;
         break;
 
diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index d732dc045d..42414b750b 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -1256,6 +1256,7 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
     struct vcpu *curr = current;
     struct domain *d = curr->domain;
     struct ioreq_vcpu *sv;
+    struct vcpu_io *vio = &curr->io;
 
     ASSERT(s);
 
@@ -1263,7 +1264,10 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
         return ioreq_send_buffered(s, proto_p);
 
     if ( unlikely(!vcpu_start_shutdown_deferral(curr)) )
+    {
+        vio->suspended = true;
         return IOREQ_STATUS_RETRY;
+    }
 
     list_for_each_entry ( sv,
                           &s->ioreq_vcpu_list,
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 5485d08afb..701963f84c 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -159,6 +159,11 @@ enum vio_completion {
 struct vcpu_io {
     /* I/O request in flight to device model. */
     enum vio_completion  completion;
+    /*
+     * Indicate whether the I/O was not handled because the domain
+     * is about to be paused.
+     */
+    bool                 suspended;
     ioreq_t              req;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] build: suppress GNU ld warning about RWX load segments
Message-Id: <E1nynlI-0004ei-12@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:44 +0000

commit fcbee61b21472a814be4383ec7a7d1ae906c4b59
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:21:49 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:21:49 2022 +0200

    build: suppress GNU ld warning about RWX load segments
    
    We cannot really avoid such and we're also not really at risk because of
    them, as we control page table permissions ourselves rather than relying
    on a loader of some sort. Present GNU ld master started warning about
    such, and hence 2.39 is anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 68f5aac012b9ae36ce9b65d9ca9cc9f232191ad3
    master date: 2022-05-18 11:17:19 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 6fed25ce32..0c22f36adf 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -221,6 +221,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
+
 CFLAGS += $(CFLAGS-y)
 # allow extra CFLAGS externally via EXTRA_CFLAGS_XEN_CORE
 CFLAGS += $(EXTRA_CFLAGS_XEN_CORE)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] build: silence GNU ld warning about executable stacks
Message-Id: <E1nynlS-0004fH-3s@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:57:54 +0000

commit f6594c3f05bbec0a97cb313378d33fc0eee51cc2
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:22:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:22:11 2022 +0200

    build: silence GNU ld warning about executable stacks
    
    While for C files the compiler is supposed to arrange for emitting
    respective information, for assembly sources we're responsible ourselves.
    Present GNU ld master started warning about such, and hence 2.39 is
    anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 62d22296a95d259c934ca2f39ac511d729cfbb68
    master date: 2022-05-18 11:18:45 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 0c22f36adf..85358930a8 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -221,6 +221,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+$(call cc-option-add,AFLAGS,CC,-Wa$(comma)--noexecstack)
+
 LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
 
 CFLAGS += $(CFLAGS-y)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] ns16550: use poll mode if INTERRUPT_LINE is 0xff
Message-Id: <E1nynlc-0004fv-6q@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:58:04 +0000

commit c7f9e0e30de957979f3cd040d6748fdd1397fd7f
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 14:22:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:22:50 2022 +0200

    ns16550: use poll mode if INTERRUPT_LINE is 0xff
    
    Intel LPSS has INTERRUPT_LINE set to 0xff by default, that is declared
    by the PCI Local Bus Specification Revision 3.0 (from 2004) as
    "unknown"/"no connection". Fallback to poll mode in this case.
    The 0xff handling is x86-specific, the surrounding code is guarded with
    CONFIG_X86 anyway.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 6a2ea1a2370a0c8a0210accac0ae62e68c185134
    master date: 2022-05-20 12:19:45 +0200
---
 xen/drivers/char/ns16550.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 16a73d0c0e..c7332e02f1 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1162,6 +1162,19 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx)
                             pci_conf_read8(PCI_SBDF(0, b, d, f),
                                            PCI_INTERRUPT_LINE) : 0;
 
+#ifdef CONFIG_X86
+                /*
+                 * PCI Local Bus Specification Revision 3.0 defines 0xff value
+                 * as special only for X86.
+                 */
+                if ( uart->irq == 0xff )
+                    uart->irq = 0;
+#endif
+                if ( !uart->irq )
+                    printk(XENLOG_INFO
+                           "ns16550: %pp: no legacy IRQ, using poll mode\n",
+                           &PCI_SBDF(0, b, d, f));
+
                 return 0;
             }
         }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
Message-Id: <E1nynlm-0004gU-BI@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 04:58:14 +0000

commit 64249afeb63cf7d70b4faf02e76df5eed82371f9
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:23:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:23:07 2022 +0200

    PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
    
    IOMMU code mapping / unmapping devices and interrupts will misbehave if
    a wrong command line option declared a function "phantom" when there's a
    real device at that position. Warn about this and adjust the specified
    stride (in the worst case ignoring the option altogether).
    
    Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 444b555dc9e09fa3ce90f066e0c88dec9b47f422
    master date: 2022-05-20 12:20:35 +0200
---
 xen/drivers/passthrough/pci.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 37c2d5b1d1..bbacbe41da 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -403,7 +403,24 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
                          phantom_devs[i].slot == PCI_SLOT(devfn) &&
                          phantom_devs[i].stride > PCI_FUNC(devfn) )
                     {
-                        pdev->phantom_stride = phantom_devs[i].stride;
+                        pci_sbdf_t sbdf = pdev->sbdf;
+                        unsigned int stride = phantom_devs[i].stride;
+
+                        while ( (sbdf.fn += stride) > PCI_FUNC(devfn) )
+                        {
+                            if ( pci_conf_read16(sbdf, PCI_VENDOR_ID) == 0xffff &&
+                                 pci_conf_read16(sbdf, PCI_DEVICE_ID) == 0xffff )
+                                continue;
+                            stride <<= 1;
+                            printk(XENLOG_WARNING
+                                   "%pp looks to be a real device; bumping %04x:%02x:%02x stride to %u\n",
+                                   &sbdf, phantom_devs[i].seg,
+                                   phantom_devs[i].bus, phantom_devs[i].slot,
+                                   stride);
+                            sbdf = pdev->sbdf;
+                        }
+                        if ( PCI_FUNC(stride) )
+                           pdev->phantom_stride = stride;
                         break;
                     }
             }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] update Xen version to 4.16.2-pre
Message-Id: <E1nyqWs-0000OM-Ah@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:02 +0000

commit 5be9edb482ab20cf3e7acb05b511465294d1e19b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 13:55:17 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:55:17 2022 +0200

    update Xen version to 4.16.2-pre
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 8abc71cf73..90a29782db 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -2,7 +2,7 @@
 # All other places this is stored (eg. compile.h) should be autogenerated.
 export XEN_VERSION       = 4
 export XEN_SUBVERSION    = 16
-export XEN_EXTRAVERSION ?= .1$(XEN_VENDORVERSION)
+export XEN_EXTRAVERSION ?= .2-pre$(XEN_VENDORVERSION)
 export XEN_FULLVERSION   = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION)
 -include xen-version
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/irq: skip unmap_domain_pirq XSM during destruction
Message-Id: <E1nyqX2-0000P0-EB@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:12 +0000

commit b58fb6e81bd55b6bd946abc3070770f7994c9ef9
Author:     Jason Andryuk <jandryuk@gmail.com>
AuthorDate: Tue Jun 7 13:55:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:55:39 2022 +0200

    x86/irq: skip unmap_domain_pirq XSM during destruction
    
    xsm_unmap_domain_irq was seen denying unmap_domain_pirq when called from
    complete_domain_destroy as an RCU callback.  The source context was an
    unexpected, random domain.  Since this is a xen-internal operation,
    going through the XSM hook is inapproriate.
    
    Check d->is_dying and skip the XSM hook when set since this is a cleanup
    operation for a domain being destroyed.
    
    Suggested-by: Roger Pau Monné <roger.pau@citrix.com>
    Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 2e6f95a942d1927a53f077c301db0b799c54c05a
    master date: 2022-04-08 14:51:52 +0200
---
 xen/arch/x86/irq.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 67cbf6b979..47b86af5dc 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -2342,8 +2342,14 @@ int unmap_domain_pirq(struct domain *d, int pirq)
         nr = msi_desc->msi.nvec;
     }
 
-    ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
-                               msi_desc ? msi_desc->dev : NULL);
+    /*
+     * When called by complete_domain_destroy via RCU, current is a random
+     * domain.  Skip the XSM check since this is a Xen-initiated action.
+     */
+    if ( !d->is_dying )
+        ret = xsm_unmap_domain_irq(XSM_HOOK, d, irq,
+                                   msi_desc ? msi_desc->dev : NULL);
+
     if ( ret )
         goto done;
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
Message-Id: <E1nyqXC-0000PZ-HR@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:22 +0000

commit 6c6bbfdff9374ef41f84c4ebed7b8a7a40767ef6
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 13:56:54 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:56:54 2022 +0200

    xen: fix XEN_DOMCTL_gdbsx_guestmemio crash
    
    A hypervisor built without CONFIG_GDBSX will crash in case the
    XEN_DOMCTL_gdbsx_guestmemio domctl is being called, as the call will
    end up in iommu_do_domctl() with d == NULL:
    
      (XEN) CPU:    6
      (XEN) RIP:    e008:[<ffff82d040269984>] iommu_do_domctl+0x4/0x30
      (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d0v0)
      (XEN) rax: 00000000000003e8   rbx: ffff830856277ef8   rcx: ffff830856277fff
      ...
      (XEN) Xen call trace:
      (XEN)    [<ffff82d040269984>] R iommu_do_domctl+0x4/0x30
      (XEN)    [<ffff82d04035cd5f>] S arch_do_domctl+0x7f/0x2330
      (XEN)    [<ffff82d040239e46>] S do_domctl+0xe56/0x1930
      (XEN)    [<ffff82d040238ff0>] S do_domctl+0/0x1930
      (XEN)    [<ffff82d0402f8c59>] S pv_hypercall+0x99/0x110
      (XEN)    [<ffff82d0402f5161>] S arch/x86/pv/domain.c#_toggle_guest_pt+0x11/0x90
      (XEN)    [<ffff82d040366288>] S lstar_enter+0x128/0x130
      (XEN)
      (XEN) Pagetable walk from 0000000000000144:
      (XEN)  L4[0x000] = 0000000000000000 ffffffffffffffff
      (XEN)
      (XEN) ****************************************
      (XEN) Panic on CPU 6:
      (XEN) FATAL PAGE FAULT
      (XEN) [error_code=0000]
      (XEN) Faulting linear address: 0000000000000144
      (XEN) ****************************************
    
    It used to be permitted to pass DOMID_IDLE to dbg_rw_mem(), which is why the
    special case skipping the domid checks exists.  Now that it is only permitted
    to pass proper domids, remove the special case, making 'd' always valid.
    
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Fixes: e726a82ca0dc ("xen: make gdbsx support configurable")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: f00daf1fb3213a9b0335d9dcd90fe9cb5c02b7a9
    master date: 2022-04-19 17:07:08 +0100
---
 xen/common/domctl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index 271862ae58..419e4070f5 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -304,7 +304,6 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
         if ( op->domain == DOMID_INVALID )
         {
     case XEN_DOMCTL_createdomain:
-    case XEN_DOMCTL_gdbsx_guestmemio:
             d = NULL;
             break;
         }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] VT-d: refuse to use IOMMU with reserved CAP.ND value
Message-Id: <E1nyqXM-0000QH-KV@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:32 +0000

commit b378ee56c7e0bb5eeb35dcc55b3d29e5f50eb566
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 13:58:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:58:16 2022 +0200

    VT-d: refuse to use IOMMU with reserved CAP.ND value
    
    The field taking the value 7 (resulting in 18-bit DIDs when using the
    calculation in cap_ndoms(), when the DID fields are only 16 bits wide)
    is reserved. Instead of misbehaving in case we would encounter such an
    IOMMU, refuse to use it.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    master commit: a1545fbf45c689aff39ce76a6eaa609d32ef72a7
    master date: 2022-04-20 10:54:26 +0200
---
 xen/drivers/passthrough/vtd/iommu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 93dd8aa643..8975c1de61 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1279,8 +1279,11 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     quirk_iommu_caps(iommu);
 
+    nr_dom = cap_ndoms(iommu->cap);
+
     if ( cap_fault_reg_offset(iommu->cap) +
          cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >= PAGE_SIZE ||
+         ((nr_dom - 1) >> 16) /* I.e. cap.nd > 6 */ ||
          ecap_iotlb_offset(iommu->ecap) >= PAGE_SIZE )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported\n");
@@ -1305,7 +1308,6 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
         vtd_ops.sync_cache = sync_cache;
 
     /* allocate domain id bitmap */
-    nr_dom = cap_ndoms(iommu->cap);
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
     if ( !iommu->domid_bitmap )
         return -ENOMEM;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/mm: avoid inadvertently degrading a TLB flush to local only
Message-Id: <E1nyqXW-0000Qq-Oe@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:42 +0000

commit 7c003ab4a398ff4ddd54d15d4158cffb463134cc
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Jun 7 13:59:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 13:59:31 2022 +0200

    x86/mm: avoid inadvertently degrading a TLB flush to local only
    
    If the direct map is incorrectly modified with interrupts disabled,
    the required TLB flushes are degraded to flushing the local CPU only.
    
    This could lead to very hard to diagnose problems as different CPUs will
    end up with different views of memory. Although, no such issues have yet
    been identified.
    
    Change the check in the flush_area() macro to look at system_state
    instead. This defers the switch from local to all later in the boot
    (see xen/arch/x86/setup.c:__start_xen()). This is fine because
    additional PCPUs are not brought up until after the system state is
    SYS_STATE_smp_boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    
    x86/flushtlb: remove flush_area check on system state
    
    Booting with Shadow Stacks leads to the following assert on a debug
    hypervisor:
    
    Assertion 'local_irq_is_enabled()' failed at arch/x86/smp.c:265
    ----[ Xen-4.17.0-10.24-d  x86_64  debug=y  Not tainted ]----
    CPU:    0
    RIP:    e008:[<ffff82d040345300>] flush_area_mask+0x40/0x13e
    [...]
    Xen call trace:
       [<ffff82d040345300>] R flush_area_mask+0x40/0x13e
       [<ffff82d040338a40>] F modify_xen_mappings+0xc5/0x958
       [<ffff82d0404474f9>] F arch/x86/alternative.c#_alternative_instructions+0xb7/0xb9
       [<ffff82d0404476cc>] F alternative_branches+0xf/0x12
       [<ffff82d04044e37d>] F __start_xen+0x1ef4/0x2776
       [<ffff82d040203344>] F __high_start+0x94/0xa0
    
    This is due to SYS_STATE_smp_boot being set before calling
    alternative_branches(), and the flush in modify_xen_mappings() then
    using flush_area_all() with interrupts disabled.  Note that
    alternative_branches() is called before APs are started, so the flush
    must be a local one (and indeed the cpumask passed to
    flush_area_mask() just contains one CPU).
    
    Take the opportunity to simplify a bit the logic and make flush_area()
    an alias of flush_area_all() in mm.c, taking into account that
    cpu_online_map just contains the BSP before APs are started.  This
    requires widening the assert in flush_area_mask() to allow being
    called with interrupts disabled as long as it's strictly a local only
    flush.
    
    The overall result is that a conditional can be removed from
    flush_area().
    
    While there also introduce an ASSERT to check that a vCPU state flush
    is not issued for the local CPU only.
    
    Fixes: 78e072bc37 ('x86/mm: avoid inadvertently degrading a TLB flush to local only')
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 78e072bc375043e81691a59454e09f0b38241ddd
    master date: 2022-04-20 10:55:01 +0200
    master commit: 9f735ee4903f1b9f1966bb4ba5b5616b03ae08b5
    master date: 2022-05-25 11:09:46 +0200
---
 xen/arch/x86/mm.c  | 10 ++--------
 xen/arch/x86/smp.c |  5 ++++-
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4d799032dc..e222d9aa98 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5051,14 +5051,8 @@ l1_pgentry_t *virt_to_xen_l1e(unsigned long v)
 #define l1f_to_lNf(f) (((f) & _PAGE_PRESENT) ? ((f) |  _PAGE_PSE) : (f))
 #define lNf_to_l1f(f) (((f) & _PAGE_PRESENT) ? ((f) & ~_PAGE_PSE) : (f))
 
-/*
- * map_pages_to_xen() can be called with interrupts disabled during
- * early bootstrap. In this case it is safe to use flush_area_local()
- * and avoid locking because only the local CPU is online.
- */
-#define flush_area(v,f) (!local_irq_is_enabled() ?              \
-                         flush_area_local((const void *)v, f) : \
-                         flush_area_all((const void *)v, f))
+/* flush_area_all() can be used prior to any other CPU being online.  */
+#define flush_area(v, f) flush_area_all((const void *)(v), f)
 
 #define L3T_INIT(page) (page) = ZERO_BLOCK_PTR
 
diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c
index eef0f9c6cb..3556ec1166 100644
--- a/xen/arch/x86/smp.c
+++ b/xen/arch/x86/smp.c
@@ -262,7 +262,10 @@ void flush_area_mask(const cpumask_t *mask, const void *va, unsigned int flags)
 {
     unsigned int cpu = smp_processor_id();
 
-    ASSERT(local_irq_is_enabled());
+    /* Local flushes can be performed with interrupts disabled. */
+    ASSERT(local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu)));
+    /* Exclude use of FLUSH_VCPU_STATE for the local CPU. */
+    ASSERT(!cpumask_test_cpu(cpu, mask) || !(flags & FLUSH_VCPU_STATE));
 
     if ( (flags & ~(FLUSH_VCPU_STATE | FLUSH_ORDER_MASK)) &&
          cpumask_test_cpu(cpu, mask) )
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] xen/build: Fix dependency for the MAP rule
Message-Id: <E1nyqXg-0000RN-Rb@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:55:52 +0000

commit 4bb8c34ba4241c2bf7845cd8b80c17530dbfb085
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Tue Jun 7 14:00:09 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:00:09 2022 +0200

    xen/build: Fix dependency for the MAP rule
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    master commit: e1e72198213b80b7a82bdc90f96ed05ae4f53e20
    master date: 2022-04-20 19:10:59 +0100
---
 xen/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Makefile b/xen/Makefile
index 90a29782db..ce4eca3ee4 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -507,7 +507,7 @@ cscope:
 	cscope -k -b -q
 
 .PHONY: _MAP
-_MAP:
+_MAP: $(TARGET)
 	$(NM) -n $(TARGET)-syms | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' > System.map
 
 %.o %.i %.s: %.c FORCE
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] tools/libs/evtchn: don't set errno to negative values
Message-Id: <E1nyqXq-0000S7-Uk@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:02 +0000

commit 13a29f3756bc4cab96c59f46c3875b483553fb8f
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:00:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:00:31 2022 +0200

    tools/libs/evtchn: don't set errno to negative values
    
    Setting errno to a negative value makes no sense.
    
    Fixes: 6b6500b3cbaa ("tools/libs/evtchn: Add support for restricting a handle")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 60245b71c1cd001686fa7b7a26869cbcb80d074c
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/evtchn/freebsd.c | 2 +-
 tools/libs/evtchn/minios.c  | 2 +-
 tools/libs/evtchn/netbsd.c  | 2 +-
 tools/libs/evtchn/solaris.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/libs/evtchn/freebsd.c b/tools/libs/evtchn/freebsd.c
index 7427ab2408..fa17a0f8db 100644
--- a/tools/libs/evtchn/freebsd.c
+++ b/tools/libs/evtchn/freebsd.c
@@ -58,7 +58,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index e5dfdc5ef5..c0bd5429ee 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -97,7 +97,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/netbsd.c b/tools/libs/evtchn/netbsd.c
index 1cebc21ffc..56409513bc 100644
--- a/tools/libs/evtchn/netbsd.c
+++ b/tools/libs/evtchn/netbsd.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
 
     return -1;
 }
diff --git a/tools/libs/evtchn/solaris.c b/tools/libs/evtchn/solaris.c
index df9579df17..beaa772142 100644
--- a/tools/libs/evtchn/solaris.c
+++ b/tools/libs/evtchn/solaris.c
@@ -53,7 +53,7 @@ int osdep_evtchn_close(xenevtchn_handle *xce)
 
 int osdep_evtchn_restrict(xenevtchn_handle *xce, domid_t domid)
 {
-    errno = -EOPNOTSUPP;
+    errno = EOPNOTSUPP;
     return -1;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] tools/libs/ctrl: don't set errno to a negative value
Message-Id: <E1nyqY1-0000Sm-1W@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:13 +0000

commit ba62afdbc31a8cfe897191efd25ed4449d9acd94
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:03 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:03 2022 +0200

    tools/libs/ctrl: don't set errno to a negative value
    
    The claimed reason for setting errno to -1 is wrong. On x86
    xc_domain_pod_target() will set errno to a sane value in the error
    case.
    
    Fixes: ff1745d5882b ("tools: libxl: do not set the PoD target on ARM")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: a0fb7e0e73483ed042d5ca34861a891a51ad337b
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/ctrl/xc_domain.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c
index b155d6afd2..9d675c8f21 100644
--- a/tools/libs/ctrl/xc_domain.c
+++ b/tools/libs/ctrl/xc_domain.c
@@ -1297,9 +1297,7 @@ int xc_domain_get_pod_target(xc_interface *xch,
                              uint64_t *pod_cache_pages,
                              uint64_t *pod_entries)
 {
-    /* On x86 (above) xc_domain_pod_target will incorrectly return -1
-     * with errno==-1 on error. Do the same for least surprise. */
-    errno = -1;
+    errno = EOPNOTSUPP;
     return -1;
 }
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] tools/libs/guest: don't set errno to a negative value
Message-Id: <E1nyqYB-0000TF-4Y@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:23 +0000

commit a2cf30eec08db5df974a9e8bb7366fee8fc7fcd9
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:27 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:27 2022 +0200

    tools/libs/guest: don't set errno to a negative value
    
    Setting errno to a negative error value makes no sense.
    
    Fixes: cb99a64029c9 ("libxc: arm: allow passing a device tree blob to the guest")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 438e96ab479495a932391a22e219ee62fa8c4f47
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/guest/xg_dom_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/guest/xg_dom_core.c b/tools/libs/guest/xg_dom_core.c
index 2e4c1330ea..65975a75da 100644
--- a/tools/libs/guest/xg_dom_core.c
+++ b/tools/libs/guest/xg_dom_core.c
@@ -856,7 +856,7 @@ int xc_dom_devicetree_file(struct xc_dom_image *dom, const char *filename)
         return -1;
     return 0;
 #else
-    errno = -EINVAL;
+    errno = EINVAL;
     return -1;
 #endif
 }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] tools/libs/light: don't set errno to a negative value
Message-Id: <E1nyqYL-0000To-7Q@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:33 +0000

commit 15391de8e2bb6153eadd483154c53044ab53d98d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:01:44 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:01:44 2022 +0200

    tools/libs/light: don't set errno to a negative value
    
    Setting errno to a negative value makes no sense.
    
    Fixes: e78e8b9bb649 ("libxl: Add interface for querying hypervisor about PCI topology")
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: 2419a159fb943c24a6f2439604b9fdb1478fcd08
    master date: 2022-04-22 20:39:34 +0100
---
 tools/libs/light/libxl_linux.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/light/libxl_linux.c b/tools/libs/light/libxl_linux.c
index 8d62dfd255..27f2bce718 100644
--- a/tools/libs/light/libxl_linux.c
+++ b/tools/libs/light/libxl_linux.c
@@ -288,7 +288,7 @@ int libxl__pci_topology_init(libxl__gc *gc,
         if (i == num_devs) {
             LOG(ERROR, "Too many devices");
             err = ERROR_FAIL;
-            errno = -ENOSPC;
+            errno = ENOSPC;
             goto out;
         }
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] xen/iommu: cleanup iommu related domctl handling
Message-Id: <E1nyqYV-0000US-CU@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:43 +0000

commit a6c32abd144ec6443c6a433b5a2ac00e2615aa86
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 7 14:02:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:02:08 2022 +0200

    xen/iommu: cleanup iommu related domctl handling
    
    Today iommu_do_domctl() is being called from arch_do_domctl() in the
    "default:" case of a switch statement. This has led already to crashes
    due to unvalidated parameters.
    
    Fix that by moving the call of iommu_do_domctl() to the main switch
    statement of do_domctl().
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> # Arm
    master commit: 9cd7e31b3f584e97a138a770cfb031a91a867936
    master date: 2022-04-26 10:23:58 +0200
---
 xen/arch/arm/domctl.c   | 11 +----------
 xen/arch/x86/domctl.c   |  2 +-
 xen/common/domctl.c     |  7 +++++++
 xen/include/xen/iommu.h | 12 +++++++++---
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/domctl.c b/xen/arch/arm/domctl.c
index 6245af6d0b..1baf25c3d9 100644
--- a/xen/arch/arm/domctl.c
+++ b/xen/arch/arm/domctl.c
@@ -176,16 +176,7 @@ long arch_do_domctl(struct xen_domctl *domctl, struct domain *d,
         return rc;
     }
     default:
-    {
-        int rc;
-
-        rc = subarch_do_domctl(domctl, d, u_domctl);
-
-        if ( rc == -ENOSYS )
-            rc = iommu_do_domctl(domctl, d, u_domctl);
-
-        return rc;
-    }
+        return subarch_do_domctl(domctl, d, u_domctl);
     }
 }
 
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 7d102e0647..0fa51f2ebd 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1380,7 +1380,7 @@ long arch_do_domctl(
         break;
 
     default:
-        ret = iommu_do_domctl(domctl, d, u_domctl);
+        ret = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index 419e4070f5..65d2a4588b 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -870,6 +870,13 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
             copyback = 1;
         break;
 
+    case XEN_DOMCTL_assign_device:
+    case XEN_DOMCTL_test_assign_device:
+    case XEN_DOMCTL_deassign_device:
+    case XEN_DOMCTL_get_device_group:
+        ret = iommu_do_domctl(op, d, u_domctl);
+        break;
+
     default:
         ret = arch_do_domctl(op, d, u_domctl);
         break;
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 92b2d23f0b..861579562e 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -342,8 +342,17 @@ struct domain_iommu {
 /* Does the IOMMU pagetable need to be kept synchronized with the P2M */
 #ifdef CONFIG_HAS_PASSTHROUGH
 #define need_iommu_pt_sync(d)     (dom_iommu(d)->need_sync)
+
+int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 #else
 #define need_iommu_pt_sync(d)     ({ (void)(d); false; })
+
+static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d,
+                                  XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
+{
+    return -ENOSYS;
+}
 #endif
 
 int __must_check iommu_suspend(void);
@@ -357,9 +366,6 @@ int iommu_do_pci_domctl(struct xen_domctl *, struct domain *d,
                         XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
 #endif
 
-int iommu_do_domctl(struct xen_domctl *, struct domain *d,
-                    XEN_GUEST_HANDLE_PARAM(xen_domctl_t));
-
 void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] IOMMU: make domctl handler tolerate NULL domain
Message-Id: <E1nyqYf-0000V1-FM@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:56:53 +0000

commit 4cf9a7c7bdb9d544fbac81105bbc1059ba3dd932
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:02:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:02:30 2022 +0200

    IOMMU: make domctl handler tolerate NULL domain
    
    Besides the reporter's issue of hitting a NULL deref when !CONFIG_GDBSX,
    XEN_DOMCTL_test_assign_device can legitimately end up having NULL passed
    here, when the domctl was passed DOMID_INVALID.
    
    Fixes: 71e617a6b8f6 ("use is_iommu_enabled() where appropriate...")
    Reported-by: Cheyenne Wills <cheyenne.wills@gmail.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    master commit: fa4d84e6dd3c3bfd23a525b75a5483d4ce15adbb
    master date: 2022-04-26 10:25:54 +0200
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index caaba62c88..287f63fc73 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -535,7 +535,7 @@ int iommu_do_domctl(
 {
     int ret = -ENODEV;
 
-    if ( !is_iommu_enabled(d) )
+    if ( !(d ? is_iommu_enabled(d) : iommu_enabled) )
         return -EOPNOTSUPP;
 
 #ifdef CONFIG_HAS_PCI
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] IOMMU/x86: disallow device assignment to PoD guests
Message-Id: <E1nyqYp-0000WF-Ir@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:03 +0000

commit 838f6c211f7f05f107e1acdfb0977ab61ec0bf2e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:03:20 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:03:20 2022 +0200

    IOMMU/x86: disallow device assignment to PoD guests
    
    While it is okay for IOMMU page tables to be set up for guests starting
    in PoD mode, actual device assignment may only occur once all PoD
    entries have been removed from the P2M. So far this was enforced only
    for boot-time assignment, and only in the tool stack.
    
    Also use the new function to replace p2m_pod_entry_count(): Its unlocked
    access to p2m->pod.entry_count wasn't really okay (irrespective of the
    result being stale by the time the caller gets to see it). Nor was the
    use of that function in line with the immediately preceding comment: A
    PoD guest isn't just one with a non-zero entry count, but also one with
    a non-empty cache (e.g. prior to actually launching the guest).
    
    To allow the tool stack to see a consistent snapshot of PoD state, move
    the tail of XENMEM_{get,set}_pod_target handling into a function, adding
    proper locking there.
    
    In libxl take the liberty to use the new local variable r also for a
    pre-existing call into libxc.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: ad4312d764e8b40a1e45b64aac6d840a60c59f13
    master date: 2022-05-02 08:48:02 +0200
---
 xen/arch/x86/mm.c                   |  6 +-----
 xen/arch/x86/mm/p2m-pod.c           | 43 ++++++++++++++++++++++++++++++++++++-
 xen/common/vm_event.c               |  2 +-
 xen/drivers/passthrough/x86/iommu.c |  3 ++-
 xen/include/asm-x86/p2m.h           | 21 +++++++++---------
 5 files changed, 57 insertions(+), 18 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index e222d9aa98..4ee2de1105 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4777,7 +4777,6 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     {
         xen_pod_target_t target;
         struct domain *d;
-        struct p2m_domain *p2m;
 
         if ( copy_from_guest(&target, arg, 1) )
             return -EFAULT;
@@ -4812,10 +4811,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
         }
         else if ( rc >= 0 )
         {
-            p2m = p2m_get_hostp2m(d);
-            target.tot_pages       = domain_tot_pages(d);
-            target.pod_cache_pages = p2m->pod.count;
-            target.pod_entries     = p2m->pod.entry_count;
+            p2m_pod_get_mem_target(d, &target);
 
             if ( __copy_to_guest(arg, &target, 1) )
             {
diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c
index d8d1a0ce7e..a3c9d8a974 100644
--- a/xen/arch/x86/mm/p2m-pod.c
+++ b/xen/arch/x86/mm/p2m-pod.c
@@ -20,6 +20,7 @@
  */
 
 #include <xen/event.h>
+#include <xen/iocap.h>
 #include <xen/ioreq.h>
 #include <xen/mm.h>
 #include <xen/sched.h>
@@ -362,7 +363,10 @@ p2m_pod_set_mem_target(struct domain *d, unsigned long target)
 
     ASSERT( pod_target >= p2m->pod.count );
 
-    ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        ret = -ENOTEMPTY;
+    else
+        ret = p2m_pod_set_cache_target(p2m, pod_target, 1/*preemptible*/);
 
 out:
     pod_unlock(p2m);
@@ -370,6 +374,23 @@ out:
     return ret;
 }
 
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target)
+{
+    struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+    ASSERT(is_hvm_domain(d));
+
+    pod_lock(p2m);
+    lock_page_alloc(p2m);
+
+    target->tot_pages       = domain_tot_pages(d);
+    target->pod_cache_pages = p2m->pod.count;
+    target->pod_entries     = p2m->pod.entry_count;
+
+    unlock_page_alloc(p2m);
+    pod_unlock(p2m);
+}
+
 int p2m_pod_empty_cache(struct domain *d)
 {
     struct p2m_domain *p2m = p2m_get_hostp2m(d);
@@ -1387,6 +1408,9 @@ guest_physmap_mark_populate_on_demand(struct domain *d, unsigned long gfn,
     if ( !paging_mode_translate(d) )
         return -EINVAL;
 
+    if ( has_arch_pdevs(d) || cache_flush_permitted(d) )
+        return -ENOTEMPTY;
+
     do {
         rc = mark_populate_on_demand(d, gfn, chunk_order);
 
@@ -1408,3 +1432,20 @@ void p2m_pod_init(struct p2m_domain *p2m)
     for ( i = 0; i < ARRAY_SIZE(p2m->pod.mrp.list); ++i )
         p2m->pod.mrp.list[i] = gfn_x(INVALID_GFN);
 }
+
+bool p2m_pod_active(const struct domain *d)
+{
+    struct p2m_domain *p2m;
+    bool res;
+
+    if ( !is_hvm_domain(d) )
+        return false;
+
+    p2m = p2m_get_hostp2m(d);
+
+    pod_lock(p2m);
+    res = p2m->pod.entry_count | p2m->pod.count;
+    pod_unlock(p2m);
+
+    return res;
+}
diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
index 70ab3ba406..21d2f0edf7 100644
--- a/xen/common/vm_event.c
+++ b/xen/common/vm_event.c
@@ -639,7 +639,7 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec)
 
             rc = -EXDEV;
             /* Disallow paging in a PoD guest */
-            if ( p2m_pod_entry_count(p2m_get_hostp2m(d)) )
+            if ( p2m_pod_active(d) )
                 break;
 
             /* domain_pause() not required here, see XSA-99 */
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index a36a6bd4b2..dc9936e169 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -502,11 +502,12 @@ bool arch_iommu_use_permitted(const struct domain *d)
 {
     /*
      * Prevent device assign if mem paging, mem sharing or log-dirty
-     * have been enabled for this domain.
+     * have been enabled for this domain, or if PoD is still in active use.
      */
     return d == dom_io ||
            (likely(!mem_sharing_enabled(d)) &&
             likely(!mem_paging_enabled(d)) &&
+            likely(!p2m_pod_active(d)) &&
             likely(!p2m_get_hostp2m(d)->global_logdirty));
 }
 
diff --git a/xen/include/asm-x86/p2m.h b/xen/include/asm-x86/p2m.h
index 357a808748..f2af7a746c 100644
--- a/xen/include/asm-x86/p2m.h
+++ b/xen/include/asm-x86/p2m.h
@@ -661,6 +661,12 @@ int p2m_pod_empty_cache(struct domain *d);
  * domain matches target */
 int p2m_pod_set_mem_target(struct domain *d, unsigned long target);
 
+/* Obtain a consistent snapshot of PoD related domain state. */
+void p2m_pod_get_mem_target(const struct domain *d, xen_pod_target_t *target);
+
+/* Check whether PoD is (still) active in a domain. */
+bool p2m_pod_active(const struct domain *d);
+
 /* Scan pod cache when offline/broken page triggered */
 int
 p2m_pod_offline_or_broken_hit(struct page_info *p);
@@ -669,11 +675,6 @@ p2m_pod_offline_or_broken_hit(struct page_info *p);
 void
 p2m_pod_offline_or_broken_replace(struct page_info *p);
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return p2m->pod.entry_count;
-}
-
 void p2m_pod_init(struct p2m_domain *p2m);
 
 #else
@@ -689,6 +690,11 @@ static inline int p2m_pod_empty_cache(struct domain *d)
     return 0;
 }
 
+static inline bool p2m_pod_active(const struct domain *d)
+{
+    return false;
+}
+
 static inline int p2m_pod_offline_or_broken_hit(struct page_info *p)
 {
     return 0;
@@ -699,11 +705,6 @@ static inline void p2m_pod_offline_or_broken_replace(struct page_info *p)
     ASSERT_UNREACHABLE();
 }
 
-static inline long p2m_pod_entry_count(const struct p2m_domain *p2m)
-{
-    return 0;
-}
-
 static inline void p2m_pod_init(struct p2m_domain *p2m) {}
 
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
Message-Id: <E1nyqYz-0000Yd-Lu@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:13 +0000

commit 9ebe2ba83644ec6cd33a93c68dab5f551adcbea0
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:04:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:04:16 2022 +0200

    x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}
    
    Windows Server 2019 Essentials will unconditionally attempt to read
    P5_MC_ADDR MSR at boot and throw a BSOD if injected a #GP.
    
    Fix this by mapping MSR_P5_MC_{ADDR,TYPE} to
    MSR_IA32_MCi_{ADDR,STATUS}, as reported also done by hardware in Intel
    SDM "Mapping of the Pentium Processor Machine-Check Errors to the
    Machine-Check Architecture" section.
    
    Reported-by: Steffen Einsle <einsle@phptrix.de>
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: ce59e472b581e4923f6892172dde62b88c8aa8b7
    master date: 2022-05-02 08:49:12 +0200
---
 xen/arch/x86/cpu/mcheck/mce.h       |  6 ++++++
 xen/arch/x86/cpu/mcheck/mce_intel.c | 19 +++++++++++++++++++
 xen/arch/x86/cpu/mcheck/vmce.c      |  2 ++
 xen/arch/x86/msr.c                  |  2 ++
 xen/include/asm-x86/msr-index.h     |  3 +++
 5 files changed, 32 insertions(+)

diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h
index 1953626919..192315ecfa 100644
--- a/xen/arch/x86/cpu/mcheck/mce.h
+++ b/xen/arch/x86/cpu/mcheck/mce.h
@@ -169,6 +169,12 @@ static inline int mce_vendor_bank_msr(const struct vcpu *v, uint32_t msr)
         if (msr >= MSR_IA32_MC0_CTL2 &&
             msr < MSR_IA32_MCx_CTL2(v->arch.vmce.mcg_cap & MCG_CAP_COUNT) )
             return 1;
+        fallthrough;
+
+    case X86_VENDOR_CENTAUR:
+    case X86_VENDOR_SHANGHAI:
+        if (msr == MSR_P5_MC_ADDR || msr == MSR_P5_MC_TYPE)
+            return 1;
         break;
 
     case X86_VENDOR_AMD:
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index bb9f3a3ff7..d364e9bf5a 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -1001,8 +1001,27 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
 
 int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
 {
+    const struct cpuid_policy *cp = v->domain->arch.cpuid;
     unsigned int bank = msr - MSR_IA32_MC0_CTL2;
 
+    switch ( msr )
+    {
+    case MSR_P5_MC_ADDR:
+        /*
+         * Bank 0 is used for the 'bank 0 quirk' on older processors.
+         * See vcpu_fill_mc_msrs() for reference.
+         */
+        *val = v->arch.vmce.bank[1].mci_addr;
+        return 1;
+
+    case MSR_P5_MC_TYPE:
+        *val = v->arch.vmce.bank[1].mci_status;
+        return 1;
+    }
+
+    if ( !(cp->x86_vendor & X86_VENDOR_INTEL) )
+        return 0;
+
     if ( bank < GUEST_MC_BANK_NUM )
     {
         *val = v->arch.vmce.bank[bank].mci_ctl2;
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c
index eb6434a3ba..0899df58bc 100644
--- a/xen/arch/x86/cpu/mcheck/vmce.c
+++ b/xen/arch/x86/cpu/mcheck/vmce.c
@@ -150,6 +150,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
     default:
         switch ( boot_cpu_data.x86_vendor )
         {
+        case X86_VENDOR_CENTAUR:
+        case X86_VENDOR_SHANGHAI:
         case X86_VENDOR_INTEL:
             ret = vmce_intel_rdmsr(v, msr, val);
             break;
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index aaedb2c312..da305c7aa4 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -282,6 +282,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         *val = msrs->misc_features_enables.raw;
         break;
 
+    case MSR_P5_MC_ADDR:
+    case MSR_P5_MC_TYPE:
     case MSR_IA32_MCG_CAP     ... MSR_IA32_MCG_CTL:      /* 0x179 -> 0x17b */
     case MSR_IA32_MCx_CTL2(0) ... MSR_IA32_MCx_CTL2(31): /* 0x280 -> 0x29f */
     case MSR_IA32_MCx_CTL(0)  ... MSR_IA32_MCx_MISC(31): /* 0x400 -> 0x47f */
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 3e038db618..31964b88af 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -15,6 +15,9 @@
  * abbreviated name.  Exceptions will be considered on a case-by-case basis.
  */
 
+#define MSR_P5_MC_ADDR                      0
+#define MSR_P5_MC_TYPE                      0x00000001
+
 #define MSR_APIC_BASE                       0x0000001b
 #define  APIC_BASE_BSP                      (_AC(1, ULL) <<  8)
 #define  APIC_BASE_EXTD                     (_AC(1, ULL) << 10)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] kconfig: detect LD implementation
Message-Id: <E1nyqZ9-0000Z8-Ow@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:23 +0000

commit 3754bd128d1a6b3d5864d1a3ee5d27b67d35387a
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:05:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:05:06 2022 +0200

    kconfig: detect LD implementation
    
    Detect GNU and LLVM ld implementations. This is required for further
    patches that will introduce diverging behaviour depending on the
    linker implementation in use.
    
    Note that LLVM ld returns "compatible with GNU linkers" as part of the
    version string, so be on the safe side and use '^' to only match at
    the start of the line in case LLVM ever decides to change the text to
    use "compatible with GNU ld" instead.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: c70c4b624f85f7d4e28c70a804a0a3f20d73092b
    master date: 2022-05-02 08:50:39 +0200
---
 xen/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/xen/Kconfig b/xen/Kconfig
index bcbd2758e5..0c89afd50f 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -23,6 +23,12 @@ config CLANG_VERSION
 	int
 	default $(shell,$(BASEDIR)/scripts/clang-version.sh $(CC))
 
+config LD_IS_GNU
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^GNU ld")
+
+config LD_IS_LLVM
+	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
+
 # -fvisibility=hidden reduces -fpic cost, if it's available
 config CC_HAS_VISIBILITY_ATTRIBUTE
 	def_bool $(cc-option,-fvisibility=hidden)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] linker/lld: do not generate quoted section names
Message-Id: <E1nyqZJ-0000Zh-Rp@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:33 +0000

commit 88b653f73928117461dc250acd1e830a47a14c2b
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Tue Jun 7 14:05:24 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:05:24 2022 +0200

    linker/lld: do not generate quoted section names
    
    LLVM LD doesn't strip the quotes from the section names, and so the
    resulting binary ends up with section names like:
    
      [ 1] ".text"           PROGBITS         ffff82d040200000  00008000
           000000000018cbc1  0000000000000000  AX       0     0     4096
    
    This confuses some tools (like gdb) and prevents proper parsing of the
    binary.
    
    The issue has already been reported and is being fixed in LLD.  In
    order to workaround this issue and keep the GNU ld support define
    different DECL_SECTION macros depending on the used ld
    implementation.
    
    Drop the quotes from the definitions of the debug sections in
    DECL_DEBUG{2}, as those quotes are not required for GNU ld either.
    
    Fixes: 6254920587c3 ('x86: quote section names when defining them in linker script')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 702c9a800eb3ecd4b8595998d37a769d470c5bb0
    master date: 2022-05-02 08:51:45 +0200
---
 xen/arch/x86/xen.lds.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 4c58f3209c..bc9b9651b1 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -18,7 +18,11 @@ ENTRY(efi_start)
 #else /* !EFI */
 
 #define FORMAT "elf64-x86-64"
-#define DECL_SECTION(x) #x : AT(ADDR(#x) - __XEN_VIRT_START)
+#ifdef CONFIG_LD_IS_GNU
+# define DECL_SECTION(x) x : AT(ADDR(#x) - __XEN_VIRT_START)
+#else
+# define DECL_SECTION(x) x : AT(ADDR(x) - __XEN_VIRT_START)
+#endif
 
 ENTRY(start_pa)
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] xen: io: Fix race between sending an I/O and domain shutdown
Message-Id: <E1nyqZT-0000aI-VI@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:43 +0000

commit 982a314bd3000a16c3128afadb36a8ff41029adc
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Tue Jun 7 14:06:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:06:11 2022 +0200

    xen: io: Fix race between sending an I/O and domain shutdown
    
    Xen provides hypercalls to shutdown (SCHEDOP_shutdown{,_code}) and
    resume a domain (XEN_DOMCTL_resumedomain). They can be used for checkpoint
    where the expectation is the domain should continue as nothing happened
    afterwards.
    
    hvmemul_do_io() and handle_pio() will act differently if the return
    code of hvm_send_ioreq() (resp. hvmemul_do_pio_buffer()) is X86EMUL_RETRY.
    
    In this case, the I/O state will be reset to STATE_IOREQ_NONE (i.e
    no I/O is pending) and/or the PC will not be advanced.
    
    If the shutdown request happens right after the I/O was sent to the
    IOREQ, then emulation code will end up to re-execute the instruction
    and therefore forward again the same I/O (at least when reading IO port).
    
    This would be problem if the access has a side-effect. A dumb example,
    is a device implementing a counter which is incremented by one for every
    access. When running shutdown/resume in a loop, the value read by the
    OS may not be the old value + 1.
    
    Add an extra boolean in the structure hvm_vcpu_io to indicate whether
    the I/O was suspended. This is then used in place of checking the domain
    is shutting down in hvmemul_do_io() and handle_pio() as they should
    act on suspend (i.e. vcpu_start_shutdown_deferral() returns false) rather
    than shutdown.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Paul Durrant <paul@xen.org>
    master commit: b7e0d8978810b534725e94a321736496928f00a5
    master date: 2022-05-06 17:16:22 +0100
---
 xen/arch/arm/ioreq.c       | 3 ++-
 xen/arch/x86/hvm/emulate.c | 3 ++-
 xen/arch/x86/hvm/io.c      | 7 ++++---
 xen/common/ioreq.c         | 4 ++++
 xen/include/xen/sched.h    | 5 +++++
 5 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/ioreq.c b/xen/arch/arm/ioreq.c
index 308650b400..fbccef212b 100644
--- a/xen/arch/arm/ioreq.c
+++ b/xen/arch/arm/ioreq.c
@@ -80,9 +80,10 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
         return IO_ABORT;
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = ioreq_send(s, &p, 0);
-    if ( rc != IO_RETRY || v->domain->is_shutting_down )
+    if ( rc != IO_RETRY || vio->suspended )
         vio->req.state = STATE_IOREQ_NONE;
     else if ( !ioreq_needs_completion(&vio->req) )
         rc = IO_HANDLED;
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 76a2ccfafe..7da348b5d4 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -239,6 +239,7 @@ static int hvmemul_do_io(
     ASSERT(p.count);
 
     vio->req = p;
+    vio->suspended = false;
 
     rc = hvm_io_intercept(&p);
 
@@ -334,7 +335,7 @@ static int hvmemul_do_io(
         else
         {
             rc = ioreq_send(s, &p, 0);
-            if ( rc != X86EMUL_RETRY || currd->is_shutting_down )
+            if ( rc != X86EMUL_RETRY || vio->suspended )
                 vio->req.state = STATE_IOREQ_NONE;
             else if ( !ioreq_needs_completion(&vio->req) )
                 rc = X86EMUL_OKAY;
diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c
index 93f1d1503f..80915f27e4 100644
--- a/xen/arch/x86/hvm/io.c
+++ b/xen/arch/x86/hvm/io.c
@@ -138,10 +138,11 @@ bool handle_pio(uint16_t port, unsigned int size, int dir)
 
     case X86EMUL_RETRY:
         /*
-         * We should not advance RIP/EIP if the domain is shutting down or
-         * if X86EMUL_RETRY has been returned by an internal handler.
+         * We should not advance RIP/EIP if the vio was suspended (e.g.
+         * because the domain is shutting down) or if X86EMUL_RETRY has
+         * been returned by an internal handler.
          */
-        if ( curr->domain->is_shutting_down || !vcpu_ioreq_pending(curr) )
+        if ( vio->suspended || !vcpu_ioreq_pending(curr) )
             return false;
         break;
 
diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c
index d732dc045d..42414b750b 100644
--- a/xen/common/ioreq.c
+++ b/xen/common/ioreq.c
@@ -1256,6 +1256,7 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
     struct vcpu *curr = current;
     struct domain *d = curr->domain;
     struct ioreq_vcpu *sv;
+    struct vcpu_io *vio = &curr->io;
 
     ASSERT(s);
 
@@ -1263,7 +1264,10 @@ int ioreq_send(struct ioreq_server *s, ioreq_t *proto_p,
         return ioreq_send_buffered(s, proto_p);
 
     if ( unlikely(!vcpu_start_shutdown_deferral(curr)) )
+    {
+        vio->suspended = true;
         return IOREQ_STATUS_RETRY;
+    }
 
     list_for_each_entry ( sv,
                           &s->ioreq_vcpu_list,
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 28146ee404..9671062360 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -159,6 +159,11 @@ enum vio_completion {
 struct vcpu_io {
     /* I/O request in flight to device model. */
     enum vio_completion  completion;
+    /*
+     * Indicate whether the I/O was not handled because the domain
+     * is about to be paused.
+     */
+    bool                 suspended;
     ioreq_t              req;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] build: suppress GNU ld warning about RWX load segments
Message-Id: <E1nyqZe-0000ap-25@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:57:54 +0000

commit 4890031d224262a6cf43d3bef1af4a16c13db306
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:06:51 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:06:51 2022 +0200

    build: suppress GNU ld warning about RWX load segments
    
    We cannot really avoid such and we're also not really at risk because of
    them, as we control page table permissions ourselves rather than relying
    on a loader of some sort. Present GNU ld master started warning about
    such, and hence 2.39 is anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 68f5aac012b9ae36ce9b65d9ca9cc9f232191ad3
    master date: 2022-05-18 11:17:19 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index ce4eca3ee4..4d9abe7046 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -260,6 +260,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
+
 CFLAGS += $(CFLAGS-y)
 # allow extra CFLAGS externally via EXTRA_CFLAGS_XEN_CORE
 CFLAGS += $(EXTRA_CFLAGS_XEN_CORE)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] build: silence GNU ld warning about executable stacks
Message-Id: <E1nyqZo-0000bT-5G@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:58:04 +0000

commit 1bc669a568a9f4bdab9e9ddb95823ba370dc0baf
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:07:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:07:11 2022 +0200

    build: silence GNU ld warning about executable stacks
    
    While for C files the compiler is supposed to arrange for emitting
    respective information, for assembly sources we're responsible ourselves.
    Present GNU ld master started warning about such, and hence 2.39 is
    anticipated to have this warning.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    master commit: 62d22296a95d259c934ca2f39ac511d729cfbb68
    master date: 2022-05-18 11:18:45 +0200
---
 xen/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/Makefile b/xen/Makefile
index 4d9abe7046..971028eda2 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -260,6 +260,8 @@ endif
 
 AFLAGS += -D__ASSEMBLY__
 
+$(call cc-option-add,AFLAGS,CC,-Wa$(comma)--noexecstack)
+
 LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments
 
 CFLAGS += $(CFLAGS-y)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] ns16550: use poll mode if INTERRUPT_LINE is 0xff
Message-Id: <E1nyqZy-0000c0-8E@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:58:14 +0000

commit f1be0b62a03b90a40a03e21f965e4cbb89809bb1
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 14:07:34 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:07:34 2022 +0200

    ns16550: use poll mode if INTERRUPT_LINE is 0xff
    
    Intel LPSS has INTERRUPT_LINE set to 0xff by default, that is declared
    by the PCI Local Bus Specification Revision 3.0 (from 2004) as
    "unknown"/"no connection". Fallback to poll mode in this case.
    The 0xff handling is x86-specific, the surrounding code is guarded with
    CONFIG_X86 anyway.
    
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 6a2ea1a2370a0c8a0210accac0ae62e68c185134
    master date: 2022-05-20 12:19:45 +0200
---
 xen/drivers/char/ns16550.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 30596d60d4..2d2bd2a024 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1221,6 +1221,19 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx)
                             pci_conf_read8(PCI_SBDF(0, b, d, f),
                                            PCI_INTERRUPT_LINE) : 0;
 
+#ifdef CONFIG_X86
+                /*
+                 * PCI Local Bus Specification Revision 3.0 defines 0xff value
+                 * as special only for X86.
+                 */
+                if ( uart->irq == 0xff )
+                    uart->irq = 0;
+#endif
+                if ( !uart->irq )
+                    printk(XENLOG_INFO
+                           "ns16550: %pp: no legacy IRQ, using poll mode\n",
+                           &PCI_SBDF(0, b, d, f));
+
                 return 0;
             }
         }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
Message-Id: <E1nyqa8-0000cT-B3@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 07:58:24 +0000

commit 8e11ec8fbf6f933f8854f4bc54226653316903f2
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 7 14:08:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 7 14:08:06 2022 +0200

    PCI: don't allow "pci-phantom=" to mark real devices as phantom functions
    
    IOMMU code mapping / unmapping devices and interrupts will misbehave if
    a wrong command line option declared a function "phantom" when there's a
    real device at that position. Warn about this and adjust the specified
    stride (in the worst case ignoring the option altogether).
    
    Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    master commit: 444b555dc9e09fa3ce90f066e0c88dec9b47f422
    master date: 2022-05-20 12:20:35 +0200
---
 xen/drivers/passthrough/pci.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index 395958698e..e0491c908f 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -382,7 +382,24 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg, u8 bus, u8 devfn)
                          phantom_devs[i].slot == PCI_SLOT(devfn) &&
                          phantom_devs[i].stride > PCI_FUNC(devfn) )
                     {
-                        pdev->phantom_stride = phantom_devs[i].stride;
+                        pci_sbdf_t sbdf = pdev->sbdf;
+                        unsigned int stride = phantom_devs[i].stride;
+
+                        while ( (sbdf.fn += stride) > PCI_FUNC(devfn) )
+                        {
+                            if ( pci_conf_read16(sbdf, PCI_VENDOR_ID) == 0xffff &&
+                                 pci_conf_read16(sbdf, PCI_DEVICE_ID) == 0xffff )
+                                continue;
+                            stride <<= 1;
+                            printk(XENLOG_WARNING
+                                   "%pp looks to be a real device; bumping %04x:%02x:%02x stride to %u\n",
+                                   &sbdf, phantom_devs[i].seg,
+                                   phantom_devs[i].bus, phantom_devs[i].slot,
+                                   stride);
+                            sbdf = pdev->sbdf;
+                        }
+                        if ( PCI_FUNC(stride) )
+                           pdev->phantom_stride = stride;
                         break;
                     }
             }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] page_alloc: assert IRQs are enabled in heap alloc/free
Message-Id: <E1nysEO-0007fY-D7@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 09:44:04 +0000

commit e890b685996cbde3ba5378e772e7bfd2dd304b59
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Apr 26 10:33:01 2022 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 10:38:40 2022 +0100

    page_alloc: assert IRQs are enabled in heap alloc/free
    
    Heap pages can only be safely allocated and freed with interrupts
    enabled as they may require a TLB flush which may send IPIs (on x86).
    
    Normally spinlock debugging would catch calls from the incorrect
    context, but not from stop_machine_run() action functions as these are
    called with spin lock debugging disabled.
    
    Enhance the assertions in alloc_xenheap_pages() and
    alloc_domheap_pages() to check interrupts are enabled. For consistency
    the same asserts are used when freeing heap pages.
    
    As an exception, when only 1 PCPU is online, allocations are permitted
    with interrupts disabled as any TLB flushes would be local only. This
    is necessary during early boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/page_alloc.c | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 319029140f..e866e0d864 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -162,6 +162,13 @@
 static char __initdata opt_badpage[100] = "";
 string_param("badpage", opt_badpage);
 
+/*
+ * Heap allocations may need TLB flushes which may require IRQs to be
+ * enabled (except when only 1 PCPU is online).
+ */
+#define ASSERT_ALLOC_CONTEXT() \
+    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
+
 /*
  * no-bootscrub -> Free pages are not zeroed during boot.
  */
@@ -2160,7 +2167,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
 {
     struct page_info *pg;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     pg = alloc_heap_pages(MEMZONE_XEN, MEMZONE_XEN,
                           order, memflags | MEMF_no_scrub, NULL);
@@ -2173,7 +2180,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
 
 void free_xenheap_pages(void *v, unsigned int order)
 {
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( v == NULL )
         return;
@@ -2202,7 +2209,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
     struct page_info *pg;
     unsigned int i;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( xenheap_bits && (memflags >> _MEMF_bits) > xenheap_bits )
         memflags &= ~MEMF_bits(~0U);
@@ -2224,7 +2231,7 @@ void free_xenheap_pages(void *v, unsigned int order)
     struct page_info *pg;
     unsigned int i;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( v == NULL )
         return;
@@ -2249,7 +2256,7 @@ void init_domheap_pages(paddr_t ps, paddr_t pe)
 {
     mfn_t smfn, emfn;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     smfn = maddr_to_mfn(round_pgup(ps));
     emfn = maddr_to_mfn(round_pgdown(pe));
@@ -2369,7 +2376,7 @@ struct page_info *alloc_domheap_pages(
     unsigned int bits = memflags >> _MEMF_bits, zone_hi = NR_ZONES - 1;
     unsigned int dma_zone;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     bits = domain_clamp_alloc_bitsize(memflags & MEMF_no_owner ? NULL : d,
                                       bits ? : (BITS_PER_LONG+PAGE_SHIFT));
@@ -2419,7 +2426,7 @@ void free_domheap_pages(struct page_info *pg, unsigned int order)
     unsigned int i;
     bool drop_dom_ref;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( unlikely(is_xen_heap_page(pg)) )
     {
@@ -2738,7 +2745,7 @@ int __init acquire_domstatic_pages(struct domain *d, mfn_t smfn,
 {
     struct page_info *pg;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     pg = acquire_staticmem_pages(smfn, nr_mfns, memflags);
     if ( !pg )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in xmalloc()
Message-Id: <E1nysEY-0007gX-GA@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 09:44:14 +0000

commit 5047cd1d5deaa734ce67b4d706ac59d9a258c3e1
Author:     Henry Wang <Henry.Wang@arm.com>
AuthorDate: Sat May 7 10:54:34 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 10:40:08 2022 +0100

    xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in xmalloc()
    
    xmalloc() will use a pool for allocation smaller than a page.
    The pool is extended only when there are no more space. At which
    point, alloc_xenheap_pages() is called to add more memory.
    
    xmalloc() must be protected by ASSERT_ALLOC_CONTEXT. It should not
    rely on pool expanding to trigger the ASSERT_ALLOC_CONTEXT in
    alloc_xenheap_pages(). Hence, this commit moves the definition of
    ASSERT_ALLOC_CONTEXT to header and uses the ASSERT_ALLOC_CONTEXT
    to replace the original assertion in xmalloc().
    
    For consistency, the same assertion should be used in xfree(),
    and the position of the assertion should be at the beginning of
    the xfree().
    
    Also take the opportunity to enhance the non-static functions
    xmem_pool_{alloc,free}() with the same assertion so that future
    callers of these two functions can be benefited.
    
    Reported-by: Wei Chen <Wei.Chen@arm.com>
    Suggested-by: Julien Grall <jgrall@amazon.com>
    Signed-off-by: Henry Wang <Henry.Wang@arm.com>
    Tested-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/common/page_alloc.c   |  7 -------
 xen/common/xmalloc_tlsf.c | 10 +++++++---
 xen/include/xen/irq.h     |  7 +++++++
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index e866e0d864..ea59cd1a4a 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -162,13 +162,6 @@
 static char __initdata opt_badpage[100] = "";
 string_param("badpage", opt_badpage);
 
-/*
- * Heap allocations may need TLB flushes which may require IRQs to be
- * enabled (except when only 1 PCPU is online).
- */
-#define ASSERT_ALLOC_CONTEXT() \
-    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
-
 /*
  * no-bootscrub -> Free pages are not zeroed during boot.
  */
diff --git a/xen/common/xmalloc_tlsf.c b/xen/common/xmalloc_tlsf.c
index d2ad909502..75bdf18c4e 100644
--- a/xen/common/xmalloc_tlsf.c
+++ b/xen/common/xmalloc_tlsf.c
@@ -378,6 +378,8 @@ void *xmem_pool_alloc(unsigned long size, struct xmem_pool *pool)
     int fl, sl;
     unsigned long tmp_size;
 
+    ASSERT_ALLOC_CONTEXT();
+
     if ( size < MIN_BLOCK_SIZE )
         size = MIN_BLOCK_SIZE;
     else
@@ -456,6 +458,8 @@ void xmem_pool_free(void *ptr, struct xmem_pool *pool)
     struct bhdr *b, *tmp_b;
     int fl = 0, sl = 0;
 
+    ASSERT_ALLOC_CONTEXT();
+
     if ( unlikely(ptr == NULL) )
         return;
 
@@ -594,7 +598,7 @@ void *_xmalloc(unsigned long size, unsigned long align)
 {
     void *p = NULL;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( !size )
         return ZERO_BLOCK_PTR;
@@ -697,11 +701,11 @@ void *_xrealloc(void *ptr, unsigned long size, unsigned long align)
 
 void xfree(void *p)
 {
+    ASSERT_ALLOC_CONTEXT();
+
     if ( p == NULL || p == ZERO_BLOCK_PTR )
         return;
 
-    ASSERT(!in_irq());
-
     if ( !((unsigned long)p & (PAGE_SIZE - 1)) )
     {
         unsigned long size = PFN_ORDER(virt_to_page(p));
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index d8beadd16b..300625e56d 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -10,6 +10,13 @@
 #include <asm/hardirq.h>
 #include <public/event_channel.h>
 
+/*
+ * Heap allocations may need TLB flushes which may require IRQs to be
+ * enabled (except when only 1 PCPU is online).
+ */
+#define ASSERT_ALLOC_CONTEXT() \
+    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
+
 struct irqaction {
     void (*handler)(int, void *, struct cpu_user_regs *);
     const char *name;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Allow other mapping size in xen_pt_update_entry()
Message-Id: <E1nyspA-0001cR-4V@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:04 +0000

commit 677b3f8f7baa4d5a037543237e1967f1d1c3c502
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:22 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allow other mapping size in xen_pt_update_entry()
    
    At the moment, xen_pt_update_entry() only supports mapping at level 3
    (i.e 4KB mapping). While this is fine for most of the runtime helper,
    the boot code will require to use superpage mapping.
    
    We don't want to allow superpage mapping by default as some of the
    callers may expect small mappings (i.e populate_pt_range()) or even
    expect to unmap only a part of a superpage.
    
    To keep the code simple, a new flag _PAGE_BLOCK is introduced to
    allow the caller to enable superpage mapping.
    
    As the code doesn't support all the combinations, xen_pt_check_entry()
    is extended to take into account the cases we don't support when
    using block mapping:
        - Replacing a table with a mapping. This may happen if region was
        first mapped with 4KB mapping and then later on replaced with a 2MB
        (or 1GB mapping).
        - Removing/modifying a table. This may happen if a caller try to
        remove a region with _PAGE_BLOCK set when it was created without it.
    
    Note that the current restriction means that the caller must ensure that
    _PAGE_BLOCK is consistently set/cleared across all the updates on a
    given virtual region. This ought to be fine with the expected use-cases.
    
    More rework will be necessary if we wanted to remove the restrictions.
    
    Note that nr_mfns is now marked const as it is used for flushing the
    TLBs and we don't want it to be modified.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/page.h |   4 ++
 xen/arch/arm/mm.c               | 109 +++++++++++++++++++++++++++++++++-------
 2 files changed, 95 insertions(+), 18 deletions(-)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index c6f9fb0d4e..07998df47b 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -69,6 +69,7 @@
  * [3:4] Permission flags
  * [5]   Page present
  * [6]   Only populate page tables
+ * [7]   Superpage mappings is allowed
  */
 #define PAGE_AI_MASK(x) ((x) & 0x7U)
 
@@ -82,6 +83,9 @@
 #define _PAGE_PRESENT    (1U << 5)
 #define _PAGE_POPULATE   (1U << 6)
 
+#define _PAGE_BLOCK_BIT     7
+#define _PAGE_BLOCK         (1U << _PAGE_BLOCK_BIT)
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 7b1f2f4906..be2ac302d7 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1078,9 +1078,10 @@ static int xen_pt_next_level(bool read_only, unsigned int level,
 }
 
 /* Sanity check of the entry */
-static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
+static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int level,
+                               unsigned int flags)
 {
-    /* Sanity check when modifying a page. */
+    /* Sanity check when modifying an entry. */
     if ( (flags & _PAGE_PRESENT) && mfn_eq(mfn, INVALID_MFN) )
     {
         /* We don't allow modifying an invalid entry. */
@@ -1090,6 +1091,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
             return false;
         }
 
+        /* We don't allow modifying a table entry */
+        if ( !lpae_is_mapping(entry, level) )
+        {
+            mm_printk("Modifying a table entry is not allowed.\n");
+            return false;
+        }
+
         /* We don't allow changing memory attributes. */
         if ( entry.pt.ai != PAGE_AI_MASK(flags) )
         {
@@ -1105,7 +1113,7 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
             return false;
         }
     }
-    /* Sanity check when inserting a page */
+    /* Sanity check when inserting a mapping */
     else if ( flags & _PAGE_PRESENT )
     {
         /* We should be here with a valid MFN. */
@@ -1114,18 +1122,28 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
         /* We don't allow replacing any valid entry. */
         if ( lpae_is_valid(entry) )
         {
-            mm_printk("Changing MFN for a valid entry is not allowed (%#"PRI_mfn" -> %#"PRI_mfn").\n",
-                      mfn_x(lpae_get_mfn(entry)), mfn_x(mfn));
+            if ( lpae_is_mapping(entry, level) )
+                mm_printk("Changing MFN for a valid entry is not allowed (%#"PRI_mfn" -> %#"PRI_mfn").\n",
+                          mfn_x(lpae_get_mfn(entry)), mfn_x(mfn));
+            else
+                mm_printk("Trying to replace a table with a mapping.\n");
             return false;
         }
     }
-    /* Sanity check when removing a page. */
+    /* Sanity check when removing a mapping. */
     else if ( (flags & (_PAGE_PRESENT|_PAGE_POPULATE)) == 0 )
     {
         /* We should be here with an invalid MFN. */
         ASSERT(mfn_eq(mfn, INVALID_MFN));
 
-        /* We don't allow removing page with contiguous bit set. */
+        /* We don't allow removing a table */
+        if ( lpae_is_table(entry, level) )
+        {
+            mm_printk("Removing a table is not allowed.\n");
+            return false;
+        }
+
+        /* We don't allow removing a mapping with contiguous bit set. */
         if ( entry.pt.contig )
         {
             mm_printk("Removing entry with contiguous bit set is not allowed.\n");
@@ -1143,13 +1161,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
     return true;
 }
 
+/* Update an entry at the level @target. */
 static int xen_pt_update_entry(mfn_t root, unsigned long virt,
-                               mfn_t mfn, unsigned int flags)
+                               mfn_t mfn, unsigned int target,
+                               unsigned int flags)
 {
     int rc;
     unsigned int level;
-    /* We only support 4KB mapping (i.e level 3) for now */
-    unsigned int target = 3;
     lpae_t *table;
     /*
      * The intermediate page tables are read-only when the MFN is not valid
@@ -1204,7 +1222,7 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
     entry = table + offsets[level];
 
     rc = -EINVAL;
-    if ( !xen_pt_check_entry(*entry, mfn, flags) )
+    if ( !xen_pt_check_entry(*entry, mfn, level, flags) )
         goto out;
 
     /* If we are only populating page-table, then we are done. */
@@ -1222,8 +1240,11 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
         {
             pte = mfn_to_xen_entry(mfn, PAGE_AI_MASK(flags));
 
-            /* Third level entries set pte.pt.table = 1 */
-            pte.pt.table = 1;
+            /*
+             * First and second level pages set pte.pt.table = 0, but
+             * third level entries set pte.pt.table = 1.
+             */
+            pte.pt.table = (level == 3);
         }
         else /* We are updating the permission => Copy the current pte. */
             pte = *entry;
@@ -1243,15 +1264,57 @@ out:
     return rc;
 }
 
+/* Return the level where mapping should be done */
+static int xen_pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
+                                unsigned int flags)
+{
+    unsigned int level;
+    unsigned long mask;
+
+    /*
+      * Don't take into account the MFN when removing mapping (i.e
+      * MFN_INVALID) to calculate the correct target order.
+      *
+      * Per the Arm Arm, `vfn` and `mfn` must be both superpage aligned.
+      * They are or-ed together and then checked against the size of
+      * each level.
+      *
+      * `left` is not included and checked separately to allow
+      * superpage mapping even if it is not properly aligned (the
+      * user may have asked to map 2MB + 4k).
+      */
+     mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0;
+     mask |= vfn;
+
+     /*
+      * Always use level 3 mapping unless the caller request block
+      * mapping.
+      */
+     if ( likely(!(flags & _PAGE_BLOCK)) )
+         level = 3;
+     else if ( !(mask & (BIT(FIRST_ORDER, UL) - 1)) &&
+               (nr >= BIT(FIRST_ORDER, UL)) )
+         level = 1;
+     else if ( !(mask & (BIT(SECOND_ORDER, UL) - 1)) &&
+               (nr >= BIT(SECOND_ORDER, UL)) )
+         level = 2;
+     else
+         level = 3;
+
+     return level;
+}
+
 static DEFINE_SPINLOCK(xen_pt_lock);
 
 static int xen_pt_update(unsigned long virt,
                          mfn_t mfn,
-                         unsigned long nr_mfns,
+                         /* const on purpose as it is used for TLB flush */
+                         const unsigned long nr_mfns,
                          unsigned int flags)
 {
     int rc = 0;
-    unsigned long addr = virt, addr_end = addr + nr_mfns * PAGE_SIZE;
+    unsigned long vfn = virt >> PAGE_SHIFT;
+    unsigned long left = nr_mfns;
 
     /*
      * For arm32, page-tables are different on each CPUs. Yet, they share
@@ -1283,14 +1346,24 @@ static int xen_pt_update(unsigned long virt,
 
     spin_lock(&xen_pt_lock);
 
-    for ( ; addr < addr_end; addr += PAGE_SIZE )
+    while ( left )
     {
-        rc = xen_pt_update_entry(root, addr, mfn, flags);
+        unsigned int order, level;
+
+        level = xen_pt_mapping_level(vfn, mfn, left, flags);
+        order = XEN_PT_LEVEL_ORDER(level);
+
+        ASSERT(left >= BIT(order, UL));
+
+        rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level, flags);
         if ( rc )
             break;
 
+        vfn += 1U << order;
         if ( !mfn_eq(mfn, INVALID_MFN) )
-            mfn = mfn_add(mfn, 1);
+            mfn = mfn_add(mfn, 1U << order);
+
+        left -= (1U << order);
     }
 
     /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Add support for the contiguous bit
Message-Id: <E1nyspK-0001ec-9v@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:14 +0000

commit d1459136f39546950c19a640834b0205ca71a84c
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:23 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Add support for the contiguous bit
    
    In follow-up patches, we will use xen_pt_update() (or its callers)
    to handle large mappings (e.g. frametable, xenheap). They are also
    not going to be modified once created.
    
    The page-table entries have an hint to indicate that whether an
    entry is contiguous to another 16 entries (assuming 4KB). When the
    processor support the hint, one TLB entry will be created per
    contiguous region.
    
    For now this is tied to _PAGE_BLOCK. We can untie it in the future
    if there are use-cases where we may want to use _PAGE_BLOCK without
    setting the contiguous (couldn't think of any yet).
    
    Note that to avoid extra complexity, mappings with the contiguous
    bit set cannot be removed. Given the expected use, this restriction
    ought to be fine.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Deng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/page.h |  4 ++
 xen/arch/arm/mm.c               | 83 +++++++++++++++++++++++++++++++++++++----
 2 files changed, 79 insertions(+), 8 deletions(-)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 07998df47b..e7cd62190c 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -70,6 +70,7 @@
  * [5]   Page present
  * [6]   Only populate page tables
  * [7]   Superpage mappings is allowed
+ * [8]   Set contiguous bit (internal flag)
  */
 #define PAGE_AI_MASK(x) ((x) & 0x7U)
 
@@ -86,6 +87,9 @@
 #define _PAGE_BLOCK_BIT     7
 #define _PAGE_BLOCK         (1U << _PAGE_BLOCK_BIT)
 
+#define _PAGE_CONTIG_BIT    8
+#define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index be2ac302d7..c4487dd7fc 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1252,6 +1252,8 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
         /* Set permission */
         pte.pt.ro = PAGE_RO_MASK(flags);
         pte.pt.xn = PAGE_XN_MASK(flags);
+        /* Set contiguous bit */
+        pte.pt.contig = !!(flags & _PAGE_CONTIG);
     }
 
     write_pte(entry, pte);
@@ -1304,6 +1306,51 @@ static int xen_pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
      return level;
 }
 
+#define XEN_PT_4K_NR_CONTIG 16
+
+/*
+ * Check whether the contiguous bit can be set. Return the number of
+ * contiguous entry allowed. If not allowed, return 1.
+ */
+static unsigned int xen_pt_check_contig(unsigned long vfn, mfn_t mfn,
+                                        unsigned int level, unsigned long left,
+                                        unsigned int flags)
+{
+    unsigned long nr_contig;
+
+    /*
+     * Allow the contiguous bit to set when the caller requests block
+     * mapping.
+     */
+    if ( !(flags & _PAGE_BLOCK) )
+        return 1;
+
+    /*
+     * We don't allow to remove mapping with the contiguous bit set.
+     * So shortcut the logic and directly return 1.
+     */
+    if ( mfn_eq(mfn, INVALID_MFN) )
+        return 1;
+
+    /*
+     * The number of contiguous entries varies depending on the page
+     * granularity used. The logic below assumes 4KB.
+     */
+    BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
+
+    /*
+     * In order to enable the contiguous bit, we should have enough entries
+     * to map left and both the virtual and physical address should be
+     * aligned to the size of 16 translation tables entries.
+     */
+    nr_contig = BIT(XEN_PT_LEVEL_ORDER(level), UL) * XEN_PT_4K_NR_CONTIG;
+
+    if ( (left < nr_contig) || ((mfn_x(mfn) | vfn) & (nr_contig - 1)) )
+        return 1;
+
+    return XEN_PT_4K_NR_CONTIG;
+}
+
 static DEFINE_SPINLOCK(xen_pt_lock);
 
 static int xen_pt_update(unsigned long virt,
@@ -1338,6 +1385,12 @@ static int xen_pt_update(unsigned long virt,
         return -EINVAL;
     }
 
+    if ( flags & _PAGE_CONTIG )
+    {
+        mm_printk("_PAGE_CONTIG is an internal only flag.\n");
+        return -EINVAL;
+    }
+
     if ( !IS_ALIGNED(virt, PAGE_SIZE) )
     {
         mm_printk("The virtual address is not aligned to the page-size.\n");
@@ -1348,22 +1401,36 @@ static int xen_pt_update(unsigned long virt,
 
     while ( left )
     {
-        unsigned int order, level;
+        unsigned int order, level, nr_contig, new_flags;
 
         level = xen_pt_mapping_level(vfn, mfn, left, flags);
         order = XEN_PT_LEVEL_ORDER(level);
 
         ASSERT(left >= BIT(order, UL));
 
-        rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level, flags);
-        if ( rc )
-            break;
+        /*
+         * Check if we can set the contiguous mapping and update the
+         * flags accordingly.
+         */
+        nr_contig = xen_pt_check_contig(vfn, mfn, level, left, flags);
+        new_flags = flags | ((nr_contig > 1) ? _PAGE_CONTIG : 0);
 
-        vfn += 1U << order;
-        if ( !mfn_eq(mfn, INVALID_MFN) )
-            mfn = mfn_add(mfn, 1U << order);
+        for ( ; nr_contig > 0; nr_contig-- )
+        {
+            rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level,
+                                     new_flags);
+            if ( rc )
+                break;
+
+            vfn += 1U << order;
+            if ( !mfn_eq(mfn, INVALID_MFN) )
+                mfn = mfn_add(mfn, 1U << order);
 
-        left -= (1U << order);
+            left -= (1U << order);
+        }
+
+        if ( rc )
+            break;
     }
 
     /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Avoid flushing the TLBs when mapping are inserted
Message-Id: <E1nyspU-0001fM-E4@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:24 +0000

commit 07d11f63d03ee919038e707e6618846cf4e6df0f
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:24 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Avoid flushing the TLBs when mapping are inserted
    
    Currently, the function xen_pt_update() will flush the TLBs even when
    the mappings are inserted. This is a bit wasteful because we don't
    allow mapping replacement. Even if we were, the flush would need to
    happen earlier because mapping replacement should use Break-Before-Make
    when updating the entry.
    
    A single call to xen_pt_update() can perform a single action. IOW, it
    is not possible to, for instance, mix inserting and removing mappings.
    Therefore, we can use `flags` to determine what action is performed.
    
    This change will be particularly help to limit the impact of switching
    boot time mapping to use xen_pt_update().
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
---
 xen/arch/arm/mm.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index c4487dd7fc..747083d820 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1119,7 +1119,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int level,
         /* We should be here with a valid MFN. */
         ASSERT(!mfn_eq(mfn, INVALID_MFN));
 
-        /* We don't allow replacing any valid entry. */
+        /*
+         * We don't allow replacing any valid entry.
+         *
+         * Note that the function xen_pt_update() relies on this
+         * assumption and will skip the TLB flush. The function will need
+         * to be updated if the check is relaxed.
+         */
         if ( lpae_is_valid(entry) )
         {
             if ( lpae_is_mapping(entry, level) )
@@ -1434,11 +1440,16 @@ static int xen_pt_update(unsigned long virt,
     }
 
     /*
-     * Flush the TLBs even in case of failure because we may have
+     * The TLBs flush can be safely skipped when a mapping is inserted
+     * as we don't allow mapping replacement (see xen_pt_check_entry()).
+     *
+     * For all the other cases, the TLBs will be flushed unconditionally
+     * even if the mapping has failed. This is because we may have
      * partially modified the PT. This will prevent any unexpected
      * behavior afterwards.
      */
-    flush_xen_tlb_range_va(virt, PAGE_SIZE * nr_mfns);
+    if ( !((flags & _PAGE_PRESENT) && !mfn_eq(mfn, INVALID_MFN)) )
+        flush_xen_tlb_range_va(virt, PAGE_SIZE * nr_mfns);
 
     spin_unlock(&xen_pt_lock);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Don't open-code Xen PT update in remove_early_mappings()
Message-Id: <E1nyspe-0001fu-Gy@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:34 +0000

commit 6eb5a9396413896a696c4d6dda2e26c4c94589bf
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:25 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Don't open-code Xen PT update in remove_early_mappings()
    
    Now that xen_pt_update_entry() is able to deal with different mapping
    size, we can replace the open-coding of the page-tables update by a call
    to modify_xen_mappings().
    
    As the function is not meant to fail, a BUG_ON() is added to check the
    return.
    
    Note that we don't use destroy_xen_mappings() because the helper doesn't
    allow us to pass a flags. In theory we could add an extra parameter to
    the function, however there are no other expected users. Hence why
    modify_xen_mappings() is used.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 747083d820..64a79d45b3 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -614,11 +614,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
 
 void __init remove_early_mappings(void)
 {
-    lpae_t pte = {0};
-    write_pte(xen_second + second_table_offset(BOOT_FDT_VIRT_START), pte);
-    write_pte(xen_second + second_table_offset(BOOT_FDT_VIRT_START + SZ_2M),
-              pte);
-    flush_xen_tlb_range_va(BOOT_FDT_VIRT_START, BOOT_FDT_SLOT_SIZE);
+    int rc;
+
+    /* destroy the _PAGE_BLOCK mapping */
+    rc = modify_xen_mappings(BOOT_FDT_VIRT_START, BOOT_FDT_VIRT_END,
+                             _PAGE_BLOCK);
+    BUG_ON(rc);
 }
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Re-implement early_fdt_map() using map_pages_to_xen()
Message-Id: <E1nyspo-0001gX-Jr@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:44 +0000

commit f8c818848fa64b1957411faea7cee22d677cebcc
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:26 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Re-implement early_fdt_map() using map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() calls by map_pages_to_xen() calls.
    
    The mapping can also be marked read-only as Xen should not modify
    the host Device Tree during boot.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 64a79d45b3..03f970e4d1 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -574,6 +574,7 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
     paddr_t offset;
     void *fdt_virt;
     uint32_t size;
+    int rc;
 
     /*
      * Check whether the physical FDT address is set and meets the minimum
@@ -589,8 +590,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
     /* The FDT is mapped using 2MB superpage */
     BUILD_BUG_ON(BOOT_FDT_VIRT_START % SZ_2M);
 
-    create_mappings(xen_second, BOOT_FDT_VIRT_START, paddr_to_pfn(base_paddr),
-                    SZ_2M >> PAGE_SHIFT, SZ_2M);
+    rc = map_pages_to_xen(BOOT_FDT_VIRT_START, maddr_to_mfn(base_paddr),
+                          SZ_2M >> PAGE_SHIFT,
+                          PAGE_HYPERVISOR_RO | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to map the device-tree.\n");
+
 
     offset = fdt_paddr % SECOND_SIZE;
     fdt_virt = (void *)BOOT_FDT_VIRT_START + offset;
@@ -604,9 +609,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
 
     if ( (offset + size) > SZ_2M )
     {
-        create_mappings(xen_second, BOOT_FDT_VIRT_START + SZ_2M,
-                        paddr_to_pfn(base_paddr + SZ_2M),
-                        SZ_2M >> PAGE_SHIFT, SZ_2M);
+        rc = map_pages_to_xen(BOOT_FDT_VIRT_START + SZ_2M,
+                              maddr_to_mfn(base_paddr + SZ_2M),
+                              SZ_2M >> PAGE_SHIFT,
+                              PAGE_HYPERVISOR_RO | _PAGE_BLOCK);
+        if ( rc )
+            panic("Unable to map the device-tree\n");
     }
 
     return fdt_virt;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm32: mm: Re-implement setup_xenheap_mappings() using map_pages_to_xen()
Message-Id: <E1nyspy-0001h2-Mr@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:22:54 +0000

commit aafcc54689de010fb2964a282fab7ce27b225328
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:27 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm32: mm: Re-implement setup_xenheap_mappings() using map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() call by map_pages_to_xen() call.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 03f970e4d1..47c2111c36 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -825,7 +825,12 @@ void mmu_init_secondary_cpu(void)
 void __init setup_xenheap_mappings(unsigned long base_mfn,
                                    unsigned long nr_mfns)
 {
-    create_mappings(xen_second, XENHEAP_VIRT_START, base_mfn, nr_mfns, MB(32));
+    int rc;
+
+    rc = map_pages_to_xen(XENHEAP_VIRT_START, _mfn(base_mfn), nr_mfns,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the xenheap mappings.\n");
 
     /* Record where the xenheap is, for translation routines. */
     xenheap_virt_end = XENHEAP_VIRT_START + nr_mfns * PAGE_SIZE;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Allocate xen page tables in domheap rather than xenheap
Message-Id: <E1nysq8-0001hm-Pu@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:23:04 +0000

commit 922936dc0657c3f6f21023308e93bc681762faf6
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:28 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allocate xen page tables in domheap rather than xenheap
    
    xen_{un,}map_table() already uses the helper to map/unmap pages
    on-demand (note this is currently a NOP on arm64). So switching to
    domheap don't have any disavantage.
    
    But this as the benefit:
        - to keep the page tables unmapped if an arch decided to do so
        - reduce xenheap use on arm32 which can be pretty small
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 36 +++++++++++++++++++++---------------
 1 file changed, 21 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 47c2111c36..252114d67d 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -988,21 +988,6 @@ void *ioremap(paddr_t pa, size_t len)
     return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE);
 }
 
-static int create_xen_table(lpae_t *entry)
-{
-    void *p;
-    lpae_t pte;
-
-    p = alloc_xenheap_page();
-    if ( p == NULL )
-        return -ENOMEM;
-    clear_page(p);
-    pte = mfn_to_xen_entry(virt_to_mfn(p), MT_NORMAL);
-    pte.pt.table = 1;
-    write_pte(entry, pte);
-    return 0;
-}
-
 static lpae_t *xen_map_table(mfn_t mfn)
 {
     /*
@@ -1043,6 +1028,27 @@ static void xen_unmap_table(const lpae_t *table)
     unmap_domain_page(table);
 }
 
+static int create_xen_table(lpae_t *entry)
+{
+    struct page_info *pg;
+    void *p;
+    lpae_t pte;
+
+    pg = alloc_domheap_page(NULL, 0);
+    if ( pg == NULL )
+        return -ENOMEM;
+
+    p = xen_map_table(page_to_mfn(pg));
+    clear_page(p);
+    xen_unmap_table(p);
+
+    pte = mfn_to_xen_entry(page_to_mfn(pg), MT_NORMAL);
+    pte.pt.table = 1;
+    write_pte(entry, pte);
+
+    return 0;
+}
+
 #define XEN_TABLE_MAP_FAILED 0
 #define XEN_TABLE_SUPER_PAGE 1
 #define XEN_TABLE_NORMAL_PAGE 2
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Allow page-table allocation from the boot allocator
Message-Id: <E1nysqI-0001iN-Sq@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:23:14 +0000

commit 77f00c2f023ef1236ec29347bcef13069971fae2
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:29 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allow page-table allocation from the boot allocator
    
    At the moment, page-table can only be allocated from domheap. This means
    it is not possible to create mapping in the page-tables via
    map_pages_to_xen() if page-table needs to be allocated.
    
    In order to avoid open-coding page-tables update in early boot, we need
    to be able to allocate page-tables much earlier. Thankfully, we have the
    boot allocator for those cases.
    
    create_xen_table() is updated to cater early boot allocation by using
    alloc_boot_pages().
    
    Note, this is not sufficient to bootstrap the page-tables (i.e mapping
    before any memory is actually mapped). This will be addressed
    separately.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 252114d67d..6b7b72de27 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1030,19 +1030,27 @@ static void xen_unmap_table(const lpae_t *table)
 
 static int create_xen_table(lpae_t *entry)
 {
-    struct page_info *pg;
+    mfn_t mfn;
     void *p;
     lpae_t pte;
 
-    pg = alloc_domheap_page(NULL, 0);
-    if ( pg == NULL )
-        return -ENOMEM;
+    if ( system_state != SYS_STATE_early_boot )
+    {
+        struct page_info *pg = alloc_domheap_page(NULL, 0);
+
+        if ( pg == NULL )
+            return -ENOMEM;
+
+        mfn = page_to_mfn(pg);
+    }
+    else
+        mfn = alloc_boot_pages(1, 1);
 
-    p = xen_map_table(page_to_mfn(pg));
+    p = xen_map_table(mfn);
     clear_page(p);
     xen_unmap_table(p);
 
-    pte = mfn_to_xen_entry(page_to_mfn(pg), MT_NORMAL);
+    pte = mfn_to_xen_entry(mfn, MT_NORMAL);
     pte.pt.table = 1;
     write_pte(entry, pte);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Move fixmap definitions in a separate header
Message-Id: <E1nysqS-0001j7-Vy@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:23:24 +0000

commit e7f144f80839168e632ea4405ad114e991beecdf
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:30 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: Move fixmap definitions in a separate header
    
    To use properly the fixmap definitions, their user would need
    also new to include <xen/acpi.h>. This is not very great when
    the user itself is not meant to directly use ACPI definitions.
    
    Including <xen/acpi.h> in <asm/config.h> is not option because
    the latter header is included by everyone. So move out the fixmap
    entries definition in a new header.
    
    Take the opportunity to also move {set, clear}_fixmap() prototypes
    in the new header.
    
    Note that most of the definitions in <xen/acpi.h> now need to be
    surrounded with #ifndef __ASSEMBLY__ because <asm/fixmap.h> will
    be used in assembly (see EARLY_UART_VIRTUAL_ADDRESS).
    
    The split will become more helpful in a follow-up patch where new
    fixmap entries will be defined.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/acpi/lib.c                 |  2 ++
 xen/arch/arm/include/asm/config.h       |  6 ------
 xen/arch/arm/include/asm/early_printk.h |  1 +
 xen/arch/arm/include/asm/fixmap.h       | 24 ++++++++++++++++++++++++
 xen/arch/arm/include/asm/mm.h           |  4 ----
 xen/arch/arm/kernel.c                   |  1 +
 xen/arch/arm/mm.c                       |  1 +
 xen/include/xen/acpi.h                  | 18 +++++++++++-------
 8 files changed, 40 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/acpi/lib.c b/xen/arch/arm/acpi/lib.c
index a59cc4074c..41d521f720 100644
--- a/xen/arch/arm/acpi/lib.c
+++ b/xen/arch/arm/acpi/lib.c
@@ -25,6 +25,8 @@
 #include <xen/init.h>
 #include <xen/mm.h>
 
+#include <asm/fixmap.h>
+
 static bool fixmap_inuse;
 
 char *__acpi_map_table(paddr_t phys, unsigned long size)
diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h
index b25c9d39bb..3e2a55a910 100644
--- a/xen/arch/arm/include/asm/config.h
+++ b/xen/arch/arm/include/asm/config.h
@@ -169,12 +169,6 @@
 
 #endif
 
-/* Fixmap slots */
-#define FIXMAP_CONSOLE  0  /* The primary UART */
-#define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
-#define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
-#define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
-
 #define NR_hypercalls 64
 
 #define STACK_ORDER 3
diff --git a/xen/arch/arm/include/asm/early_printk.h b/xen/arch/arm/include/asm/early_printk.h
index 8dc911cf48..c5149b2976 100644
--- a/xen/arch/arm/include/asm/early_printk.h
+++ b/xen/arch/arm/include/asm/early_printk.h
@@ -11,6 +11,7 @@
 #define __ARM_EARLY_PRINTK_H__
 
 #include <xen/page-size.h>
+#include <asm/fixmap.h>
 
 #ifdef CONFIG_EARLY_PRINTK
 
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
new file mode 100644
index 0000000000..1cee51e52a
--- /dev/null
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -0,0 +1,24 @@
+/*
+ * fixmap.h: compile-time virtual memory allocation
+ */
+#ifndef __ASM_FIXMAP_H
+#define __ASM_FIXMAP_H
+
+#include <xen/acpi.h>
+
+/* Fixmap slots */
+#define FIXMAP_CONSOLE  0  /* The primary UART */
+#define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
+#define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
+#define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
+
+#ifndef __ASSEMBLY__
+
+/* Map a page in a fixmap entry */
+extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
+/* Remove a mapping from a fixmap entry */
+extern void clear_fixmap(unsigned map);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_FIXMAP_H */
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 424aaf2823..045a8ba4bb 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -191,10 +191,6 @@ extern void mmu_init_secondary_cpu(void);
 extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns);
 /* Map a frame table to cover physical addresses ps through pe */
 extern void setup_frametable_mappings(paddr_t ps, paddr_t pe);
-/* Map a 4k page in a fixmap entry */
-extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
-/* Remove a mapping from a fixmap entry */
-extern void clear_fixmap(unsigned map);
 /* map a physical range in virtual memory */
 void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned attributes);
 
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 8f43caa186..25ded1c056 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -15,6 +15,7 @@
 #include <xen/vmap.h>
 
 #include <asm/byteorder.h>
+#include <asm/fixmap.h>
 #include <asm/kernel.h>
 #include <asm/setup.h>
 
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 6b7b72de27..52b2a03940 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -41,6 +41,7 @@
 #include <xen/sizes.h>
 #include <xen/libfdt/libfdt.h>
 
+#include <asm/fixmap.h>
 #include <asm/setup.h>
 
 /* Override macros from asm/page.h to make them work with mfn_t */
diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h
index 39d51fcd01..1b9c75e68f 100644
--- a/xen/include/xen/acpi.h
+++ b/xen/include/xen/acpi.h
@@ -28,6 +28,15 @@
 #define _LINUX
 #endif
 
+/*
+ * Fixmap pages to reserve for ACPI boot-time tables (see
+ * arch/x86/include/asm/fixmap.h or arch/arm/include/asm/fixmap.h),
+ * 64 pages(256KB) is large enough for most cases.)
+ */
+#define NUM_FIXMAP_ACPI_PAGES  64
+
+#ifndef __ASSEMBLY__
+
 #include <xen/list.h>
 
 #include <acpi/acpi.h>
@@ -39,13 +48,6 @@
 #define ACPI_MADT_GET_POLARITY(inti)	ACPI_MADT_GET_(POLARITY, inti)
 #define ACPI_MADT_GET_TRIGGER(inti)	ACPI_MADT_GET_(TRIGGER, inti)
 
-/*
- * Fixmap pages to reserve for ACPI boot-time tables (see
- * arch/x86/include/asm/fixmap.h or arch/arm/include/asm/config.h,
- * 64 pages(256KB) is large enough for most cases.)
- */
-#define NUM_FIXMAP_ACPI_PAGES  64
-
 #define BAD_MADT_ENTRY(entry, end) (                                        \
                 (!(entry)) || (unsigned long)(entry) + sizeof(*(entry)) > (end) ||  \
                 (entry)->header.length < sizeof(*(entry)))
@@ -207,4 +209,6 @@ void acpi_reboot(void);
 void acpi_dmar_zap(void);
 void acpi_dmar_reinstate(void);
 
+#endif /* __ASSEMBLY__ */
+
 #endif /*_LINUX_ACPI_H*/
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Allow setting the number of CPUs to activate at runtime
Message-Id: <E1nysqd-0001jz-2o@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 10:23:35 +0000

commit 7ac12e3634cc3ed9234de03e48149e7f5fbf73c3
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Mon May 23 11:13:24 2022 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:16:38 2022 +0100

    xen/arm: Allow setting the number of CPUs to activate at runtime
    
    Introduce a command line parameter "maxcpus" on Arm to allow adjusting
    the number of CPUs to activate. Currently the limit is defined by the
    config option CONFIG_NR_CPUS. Such parameter already exists on x86.
    
    Define a parameter "maxcpus" and a corresponding static variable
    max_cpus in Arm smpboot.c. Modify function smp_get_max_cpus to take
    max_cpus as a limit and to return proper unsigned int instead of int.
    
    Take the opportunity to remove redundant variable cpus from start_xen
    function and to directly assign the return value from smp_get_max_cpus
    to nr_cpu_ids (global variable in Xen used to store the number of CPUs
    actually activated).
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 docs/misc/xen-command-line.pandoc |  5 ++++-
 xen/arch/arm/include/asm/smp.h    |  2 +-
 xen/arch/arm/setup.c              | 10 ++++------
 xen/arch/arm/smpboot.c            | 18 ++++++++++++------
 4 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 881fe409ac..0d1d98d715 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -1652,13 +1652,16 @@ with **crashinfo_maxaddr**.
 Specify the threshold below which Xen will inform dom0 that the quantity of
 free memory is getting low.  Specifying `0` will disable this notification.
 
-### maxcpus (x86)
+### maxcpus
 > `= <integer>`
 
 Specify the maximum number of CPUs that should be brought up.
 
 This option is ignored in **pv-shim** mode.
 
+**WARNING: On Arm big.LITTLE systems, when `hmp-unsafe` option is enabled, this command line
+option does not guarantee on which CPU types will be used.**
+
 ### max_cstate (x86)
 > `= <integer>[,<integer>]`
 
diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h
index 83c0cd6976..8133d5c295 100644
--- a/xen/arch/arm/include/asm/smp.h
+++ b/xen/arch/arm/include/asm/smp.h
@@ -33,7 +33,7 @@ extern void init_secondary(void);
 
 extern void smp_init_cpus(void);
 extern void smp_clear_cpu_maps (void);
-extern int smp_get_max_cpus (void);
+extern unsigned int smp_get_max_cpus(void);
 
 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
 
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index ea1f5ee3d3..65fdaa0900 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -871,11 +871,10 @@ void __init start_xen(unsigned long boot_phys_offset,
                       unsigned long fdt_paddr)
 {
     size_t fdt_size;
-    int cpus, i;
     const char *cmdline;
     struct bootmodule *xen_bootmodule;
     struct domain *d;
-    int rc;
+    int rc, i;
 
     dcache_line_bytes = read_dcache_line_bytes();
 
@@ -951,9 +950,8 @@ void __init start_xen(unsigned long boot_phys_offset,
     processor_id();
 
     smp_init_cpus();
-    cpus = smp_get_max_cpus();
-    printk(XENLOG_INFO "SMP: Allowing %u CPUs\n", cpus);
-    nr_cpu_ids = cpus;
+    nr_cpu_ids = smp_get_max_cpus();
+    printk(XENLOG_INFO "SMP: Allowing %u CPUs\n", nr_cpu_ids);
 
     /*
      * Some errata relies on SMCCC version which is detected by psci_init()
@@ -997,7 +995,7 @@ void __init start_xen(unsigned long boot_phys_offset,
 
     for_each_present_cpu ( i )
     {
-        if ( (num_online_cpus() < cpus) && !cpu_online(i) )
+        if ( (num_online_cpus() < nr_cpu_ids) && !cpu_online(i) )
         {
             int ret = cpu_up(i);
             if ( ret != 0 )
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 9bb32a301a..22fede6600 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -43,6 +43,10 @@ cpumask_t cpu_possible_map;
 
 struct cpuinfo_arm cpu_data[NR_CPUS];
 
+/* maxcpus: maximum number of CPUs to activate. */
+static unsigned int __initdata max_cpus;
+integer_param("maxcpus", max_cpus);
+
 /* CPU logical map: map xen cpuid to an MPIDR */
 register_t __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
 
@@ -277,16 +281,18 @@ void __init smp_init_cpus(void)
                     "unless the cpu affinity of all domains is specified.\n");
 }
 
-int __init
-smp_get_max_cpus (void)
+unsigned int __init smp_get_max_cpus(void)
 {
-    int i, max_cpus = 0;
+    unsigned int i, cpus = 0;
+
+    if ( ( !max_cpus ) || ( max_cpus > nr_cpu_ids ) )
+        max_cpus = nr_cpu_ids;
 
-    for ( i = 0; i < nr_cpu_ids; i++ )
+    for ( i = 0; i < max_cpus; i++ )
         if ( cpu_possible(i) )
-            max_cpus++;
+            cpus++;
 
-    return max_cpus;
+    return cpus;
 }
 
 void __init
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/libxl: optimize domain creation skipping domain cpupool move
Message-Id: <E1nyxKq-0003lJ-9h@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 15:11:04 +0000

commit be464973e4565fd9b4999a6eb9db9f469616f07b
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Wed Jun 8 16:59:55 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 16:59:55 2022 +0200

    tools/libxl: optimize domain creation skipping domain cpupool move
    
    Commit 92ea9c54fc81 ("arm/dom0less: assign dom0less guests to cpupools")
    introduced a way to start a domain directly on a certain cpupool,
    adding a "cpupool_id" member to struct xen_domctl_createdomain.
    
    This was done to be able to start dom0less guests in different pools than
    cpupool0, but the toolstack can benefit from it because it can now use
    the struct member directly instead of creating the guest in cpupool0
    and then moving it to the target cpupool.
    
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/libs/light/libxl_create.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
index 69ec405858..2339f09e95 100644
--- a/tools/libs/light/libxl_create.c
+++ b/tools/libs/light/libxl_create.c
@@ -633,6 +633,7 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config,
             .max_maptrack_frames = b_info->max_maptrack_frames,
             .grant_opts = XEN_DOMCTL_GRANT_version(b_info->max_grant_version),
             .vmtrace_size = ROUNDUP(b_info->vmtrace_buf_kb << 10, XC_PAGE_SHIFT),
+            .cpupool_id = info->poolid,
         };
 
         if (info->type != LIBXL_DOMAIN_TYPE_PV) {
@@ -757,13 +758,6 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config,
      */
     assert(libxl_domid_valid_guest(*domid));
 
-    ret = xc_cpupool_movedomain(ctx->xch, info->poolid, *domid);
-    if (ret < 0) {
-        LOGED(ERROR, *domid, "domain move fail");
-        rc = ERROR_FAIL;
-        goto out;
-    }
-
     dom_path = libxl__xs_get_dompath(gc, *domid);
     if (!dom_path) {
         rc = ERROR_FAIL;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] build: xen/include: use if_changed
Message-Id: <E1nyxL0-0003mD-DI@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 15:11:14 +0000

commit 28e13c7f4382f5dce6b2fb2ccef2098f22c04694
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Wed Jun 8 17:00:29 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:00:29 2022 +0200

    build: xen/include: use if_changed
    
    Use "define" for the headers*_chk commands. That allow us to keep
    writing "#include" in the Makefile without having to replace that by
    "$(pound)include" which would be a bit less obvious about the command
    line purpose.
    
    Adding several .PRECIOUS as without them `make` deletes the
    intermediate targets. This is an issue because the macro $(if_changed,)
    check if the target exist in order to decide whether to recreate the
    target.
    
    Removing the call to `mkdir` from the commands. Those aren't needed
    anymore because a rune in Rules.mk creates the directory for each
    $(targets).
    
    Remove "export PYTHON" as it is already exported.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 108 ++++++++++++++++++++++++++++++++++++---------------
 1 file changed, 76 insertions(+), 32 deletions(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 03baf10efb..6d9bcc19b0 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -45,38 +45,65 @@ public-$(CONFIG_ARM) := $(wildcard $(srcdir)/public/arch-arm/*.h $(srcdir)/publi
 .PHONY: all
 all: $(addprefix $(obj)/,$(headers-y))
 
-$(obj)/compat/%.h: $(obj)/compat/%.i $(srcdir)/Makefile $(srctree)/tools/compat-build-header.py
-	$(PYTHON) $(srctree)/tools/compat-build-header.py <$< $(patsubst $(obj)/%,%,$@) >>$@.new; \
-	mv -f $@.new $@
-
-$(obj)/compat/%.i: $(obj)/compat/%.c $(srcdir)/Makefile
-	$(CPP) $(filter-out -Wa$(comma)% -include %/include/xen/config.h,$(XEN_CFLAGS)) $(cppflags-y) -o $@ $<
-
-$(obj)/compat/%.c: $(src)/public/%.h $(srcdir)/xlat.lst $(srcdir)/Makefile $(srctree)/tools/compat-build-source.py
-	mkdir -p $(@D)
-	$(PYTHON) $(srctree)/tools/compat-build-source.py $(srcdir)/xlat.lst <$< >$@.new
-	mv -f $@.new $@
-
-$(obj)/compat/.xlat/%.h: $(obj)/compat/%.h $(obj)/compat/.xlat/%.lst $(srctree)/tools/get-fields.sh $(srcdir)/Makefile
-	export PYTHON=$(PYTHON); \
-	while read what name; do \
-		$(SHELL) $(srctree)/tools/get-fields.sh "$$what" compat_$$name $< || exit $$?; \
-	done <$(patsubst $(obj)/compat/%,$(obj)/compat/.xlat/%,$(basename $<)).lst >$@.new
-	mv -f $@.new $@
+quiet_cmd_compat_h = GEN     $@
+cmd_compat_h = \
+    $(PYTHON) $(srctree)/tools/compat-build-header.py <$< $(patsubst $(obj)/%,%,$@) >>$@.new; \
+    mv -f $@.new $@
+
+quiet_cmd_compat_i = CPP     $@
+cmd_compat_i = $(CPP) $(filter-out -Wa$(comma)% -include %/include/xen/config.h,$(XEN_CFLAGS)) $(cppflags-y) -o $@ $<
+
+quiet_cmd_compat_c = GEN     $@
+cmd_compat_c = \
+   $(PYTHON) $(srctree)/tools/compat-build-source.py $(srcdir)/xlat.lst <$< >$@.new; \
+   mv -f $@.new $@
+
+quiet_cmd_xlat_headers = GEN     $@
+cmd_xlat_headers = \
+    while read what name; do \
+        $(SHELL) $(srctree)/tools/get-fields.sh "$$what" compat_$$name $< || exit $$?; \
+    done <$(patsubst $(obj)/compat/%,$(obj)/compat/.xlat/%,$(basename $<)).lst >$@.new; \
+    mv -f $@.new $@
+
+targets += $(headers-y)
+$(obj)/compat/%.h: $(obj)/compat/%.i $(srctree)/tools/compat-build-header.py FORCE
+	$(call if_changed,compat_h)
+
+.PRECIOUS: $(obj)/compat/%.i
+targets += $(patsubst %.h, %.i, $(headers-y))
+$(obj)/compat/%.i: $(obj)/compat/%.c FORCE
+	$(call if_changed,compat_i)
+
+.PRECIOUS: $(obj)/compat/%.c
+targets += $(patsubst %.h, %.c, $(headers-y))
+$(obj)/compat/%.c: $(src)/public/%.h $(srcdir)/xlat.lst $(srctree)/tools/compat-build-source.py FORCE
+	$(call if_changed,compat_c)
+
+targets += $(patsubst compat/%, compat/.xlat/%, $(headers-y))
+$(obj)/compat/.xlat/%.h: $(obj)/compat/%.h $(obj)/compat/.xlat/%.lst $(srctree)/tools/get-fields.sh FORCE
+	$(call if_changed,xlat_headers)
+
+quiet_cmd_xlat_lst = GEN     $@
+cmd_xlat_lst = \
+	grep -v '^[[:blank:]]*$(pound)' $< | sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,[[:blank:]]+$*\.h[[:blank:]]*$$,,p' >$@.new; \
+	$(call move-if-changed,$@.new,$@)
 
 .PRECIOUS: $(obj)/compat/.xlat/%.lst
-$(obj)/compat/.xlat/%.lst: $(srcdir)/xlat.lst $(srcdir)/Makefile
-	mkdir -p $(@D)
-	grep -v '^[[:blank:]]*#' $< | sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,[[:blank:]]+$*\.h[[:blank:]]*$$,,p' >$@.new
-	$(call move-if-changed,$@.new,$@)
+targets += $(patsubst compat/%.h, compat/.xlat/%.lst, $(headers-y))
+$(obj)/compat/.xlat/%.lst: $(srcdir)/xlat.lst FORCE
+	$(call if_changed,xlat_lst)
 
 xlat-y := $(shell sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,^[?!][[:blank:]]+[^[:blank:]]+[[:blank:]]+,,p' $(srcdir)/xlat.lst | uniq)
 xlat-y := $(filter $(patsubst compat/%,%,$(headers-y)),$(xlat-y))
 
-$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf $(srcdir)/Makefile
-	cat $(filter %.h,$^) >$@.new
+quiet_cmd_xlat_h = GEN     $@
+cmd_xlat_h = \
+	cat $(filter %.h,$^) >$@.new; \
 	mv -f $@.new $@
 
+$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf FORCE
+	$(call if_changed,xlat_h)
+
 ifeq ($(XEN_TARGET_ARCH),$(XEN_COMPILE_ARCH))
 
 all: $(obj)/headers.chk $(obj)/headers99.chk $(obj)/headers++.chk
@@ -102,27 +129,31 @@ PUBLIC_C99_HEADERS := $(call public-filter-headers,public-c99-headers)
 $(src)/public/io/9pfs.h-prereq := string
 $(src)/public/io/pvcalls.h-prereq := string
 
-$(obj)/headers.chk: $(PUBLIC_ANSI_HEADERS) $(srcdir)/Makefile
+quiet_cmd_header_chk = CHK     $@
+cmd_header_chk = \
 	for i in $(filter %.h,$^); do \
 	    $(CC) -x c -ansi -Wall -Werror -include stdint.h \
 	          -S -o /dev/null $$i || exit 1; \
 	    echo $$i; \
-	done >$@.new
+	done >$@.new; \
 	mv $@.new $@
 
-$(obj)/headers99.chk: $(PUBLIC_C99_HEADERS) $(srcdir)/Makefile
-	rm -f $@.new
+quiet_cmd_headers99_chk = CHK     $@
+define cmd_headers99_chk
+	rm -f $@.new; \
 	$(foreach i, $(filter %.h,$^),                                        \
 	    echo "#include "\"$(i)\"                                          \
 	    | $(CC) -x c -std=c99 -Wall -Werror                               \
 	      -include stdint.h                                               \
 	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include $(j).h) \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;)
+	    || exit $$?; echo $(i) >> $@.new;) \
 	mv $@.new $@
+endef
 
-$(obj)/headers++.chk: $(PUBLIC_HEADERS) $(srcdir)/Makefile
-	rm -f $@.new
+quiet_cmd_headerscxx_chk = CHK     $@
+define cmd_headerscxx_chk
+	rm -f $@.new; \
 	if ! $(CXX) -v >/dev/null 2>&1; then                                  \
 	    touch $@.new;                                                     \
 	    exit 0;                                                           \
@@ -133,8 +164,21 @@ $(obj)/headers++.chk: $(PUBLIC_HEADERS) $(srcdir)/Makefile
 	      -include stdint.h -include $(srcdir)/public/xen.h               \
 	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include c$(j)) \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;)
+	    || exit $$?; echo $(i) >> $@.new;) \
 	mv $@.new $@
+endef
+
+targets += headers.chk
+$(obj)/headers.chk: $(PUBLIC_ANSI_HEADERS) FORCE
+	$(call if_changed,header_chk)
+
+targets += headers99.chk
+$(obj)/headers99.chk: $(PUBLIC_C99_HEADERS) FORCE
+	$(call if_changed,headers99_chk)
+
+targets += headers++.chk
+$(obj)/headers++.chk: $(PUBLIC_HEADERS) FORCE
+	$(call if_changed,headerscxx_chk)
 
 endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] IOMMU/x86: restrict IO-APIC mappings for PV Dom0
Message-Id: <E1nyxLA-0003mx-GM@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 15:11:24 +0000

commit 7158e80c887d8b451c8525b7fe32049742814e69
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 8 17:02:19 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:02:19 2022 +0200

    IOMMU/x86: restrict IO-APIC mappings for PV Dom0
    
    While already the case for PVH, there's no reason to treat PV
    differently here, though of course the addresses get taken from another
    source in this case. Except that, to match CPU side mappings, by default
    we permit r/o ones. This then also means we now deal consistently with
    IO-APICs whose MMIO is or is not covered by E820 reserved regions.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/drivers/passthrough/x86/iommu.c | 59 +++++++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 19 deletions(-)

diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 616b66e755..0ba95473c9 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -13,6 +13,7 @@
  */
 
 #include <xen/sched.h>
+#include <xen/iocap.h>
 #include <xen/iommu.h>
 #include <xen/paging.h>
 #include <xen/guest_access.h>
@@ -275,12 +276,12 @@ void iommu_identity_map_teardown(struct domain *d)
     }
 }
 
-static bool __hwdom_init hwdom_iommu_map(const struct domain *d,
-                                         unsigned long pfn,
-                                         unsigned long max_pfn)
+static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
+                                                 unsigned long pfn,
+                                                 unsigned long max_pfn)
 {
     mfn_t mfn = _mfn(pfn);
-    unsigned int i, type;
+    unsigned int i, type, perms = IOMMUF_readable | IOMMUF_writable;
 
     /*
      * Set up 1:1 mapping for dom0. Default to include only conventional RAM
@@ -289,44 +290,60 @@ static bool __hwdom_init hwdom_iommu_map(const struct domain *d,
      * that fall in unusable ranges for PV Dom0.
      */
     if ( (pfn > max_pfn && !mfn_valid(mfn)) || xen_in_range(pfn) )
-        return false;
+        return 0;
 
     switch ( type = page_get_ram_type(mfn) )
     {
     case RAM_TYPE_UNUSABLE:
-        return false;
+        return 0;
 
     case RAM_TYPE_CONVENTIONAL:
         if ( iommu_hwdom_strict )
-            return false;
+            return 0;
         break;
 
     default:
         if ( type & RAM_TYPE_RESERVED )
         {
             if ( !iommu_hwdom_inclusive && !iommu_hwdom_reserved )
-                return false;
+                perms = 0;
         }
-        else if ( is_hvm_domain(d) || !iommu_hwdom_inclusive || pfn > max_pfn )
-            return false;
+        else if ( is_hvm_domain(d) )
+            return 0;
+        else if ( !iommu_hwdom_inclusive || pfn > max_pfn )
+            perms = 0;
     }
 
     /* Check that it doesn't overlap with the Interrupt Address Range. */
     if ( pfn >= 0xfee00 && pfn <= 0xfeeff )
-        return false;
+        return 0;
     /* ... or the IO-APIC */
-    for ( i = 0; has_vioapic(d) && i < d->arch.hvm.nr_vioapics; i++ )
-        if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )
-            return false;
+    if ( has_vioapic(d) )
+    {
+        for ( i = 0; i < d->arch.hvm.nr_vioapics; i++ )
+            if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )
+                return 0;
+    }
+    else if ( is_pv_domain(d) )
+    {
+        /*
+         * Be consistent with CPU mappings: Dom0 is permitted to establish r/o
+         * ones there (also for e.g. HPET in certain cases), so it should also
+         * have such established for IOMMUs.
+         */
+        if ( iomem_access_permitted(d, pfn, pfn) &&
+             rangeset_contains_singleton(mmio_ro_ranges, pfn) )
+            perms = IOMMUF_readable;
+    }
     /*
      * ... or the PCIe MCFG regions.
      * TODO: runtime added MMCFG regions are not checked to make sure they
      * don't overlap with already mapped regions, thus preventing trapping.
      */
     if ( has_vpci(d) && vpci_is_mmcfg_address(d, pfn_to_paddr(pfn)) )
-        return false;
+        return 0;
 
-    return true;
+    return perms;
 }
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
@@ -368,15 +385,19 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
     for ( ; i < top; i++ )
     {
         unsigned long pfn = pdx_to_pfn(i);
+        unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
         int rc;
 
-        if ( !hwdom_iommu_map(d, pfn, max_pfn) )
+        if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
-            rc = p2m_add_identity_entry(d, pfn, p2m_access_rw, 0);
+            rc = p2m_add_identity_entry(d, pfn,
+                                        perms & IOMMUF_writable ? p2m_access_rw
+                                                                : p2m_access_r,
+                                        0);
         else
             rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
-                           IOMMUF_readable | IOMMUF_writable, &flush_flags);
+                           perms, &flush_flags);
 
         if ( rc )
             printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] IOMMU/x86: perform PV Dom0 mappings in batches
Message-Id: <E1nyxLK-0003o1-JS@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 15:11:34 +0000

commit f3185c165d28901c3222becfc8be547263c53745
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 8 17:03:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:03:32 2022 +0200

    IOMMU/x86: perform PV Dom0 mappings in batches
    
    For large page mappings to be easily usable (i.e. in particular without
    un-shattering of smaller page mappings) and for mapping operations to
    then also be more efficient, pass batches of Dom0 memory to iommu_map().
    In dom0_construct_pv() and its helpers (covering strict mode) this
    additionally requires establishing the type of those pages (albeit with
    zero type references).
    
    The earlier establishing of PGT_writable_page | PGT_validated requires
    the existing places where this gets done (through get_page_and_type())
    to be updated: For pages which actually have a mapping, the type
    refcount needs to be 1.
    
    There is actually a related bug that gets fixed here as a side effect:
    Typically the last L1 table would get marked as such only after
    get_page_and_type(..., PGT_writable_page). While this is fine as far as
    refcounting goes, the page did remain mapped in the IOMMU in this case
    (when "iommu=dom0-strict").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/pv/dom0_build.c        | 84 +++++++++++++++++++++++++++++++++----
 xen/drivers/passthrough/x86/iommu.c | 41 +++++++++++++-----
 2 files changed, 108 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index e501979a86..04a4ea3c18 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -46,7 +46,8 @@ void __init dom0_update_physmap(bool compat, unsigned long pfn,
 static __init void mark_pv_pt_pages_rdonly(struct domain *d,
                                            l4_pgentry_t *l4start,
                                            unsigned long vpt_start,
-                                           unsigned long nr_pt_pages)
+                                           unsigned long nr_pt_pages,
+                                           unsigned int *flush_flags)
 {
     unsigned long count;
     struct page_info *page;
@@ -71,6 +72,14 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
         ASSERT((page->u.inuse.type_info & PGT_type_mask) <= PGT_root_page_table);
         ASSERT(!(page->u.inuse.type_info & ~(PGT_type_mask | PGT_pae_xen_l2)));
 
+        /*
+         * Page table pages need to be removed from the IOMMU again in case
+         * iommu_memory_setup() ended up mapping them.
+         */
+        if ( need_iommu_pt_sync(d) &&
+             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, flush_flags) )
+            BUG();
+
         /* Read-only mapping + PGC_allocated + page-table page. */
         page->count_info         = PGC_allocated | 3;
         page->u.inuse.type_info |= PGT_validated | 1;
@@ -107,11 +116,43 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
     unmap_domain_page(pl3e);
 }
 
+static void __init iommu_memory_setup(struct domain *d, const char *what,
+                                      struct page_info *page, unsigned long nr,
+                                      unsigned int *flush_flags)
+{
+    int rc;
+    mfn_t mfn = page_to_mfn(page);
+
+    if ( !need_iommu_pt_sync(d) )
+        return;
+
+    rc = iommu_map(d, _dfn(mfn_x(mfn)), mfn, nr,
+                   IOMMUF_readable | IOMMUF_writable, flush_flags);
+    if ( rc )
+    {
+        printk(XENLOG_ERR "pre-mapping %s MFN [%lx,%lx) into IOMMU failed: %d\n",
+               what, mfn_x(mfn), mfn_x(mfn) + nr, rc);
+        return;
+    }
+
+    /*
+     * For successfully established IOMMU mappings the type of the page(s)
+     * needs to match (for _get_page_type() to unmap upon type change). Set
+     * the page(s) to writable with no type ref.
+     */
+    for ( ; nr--; ++page )
+    {
+        ASSERT(!page->u.inuse.type_info);
+        page->u.inuse.type_info = PGT_writable_page | PGT_validated;
+    }
+}
+
 static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                     unsigned long v_start, unsigned long v_end,
                                     unsigned long vphysmap_start,
                                     unsigned long vphysmap_end,
-                                    unsigned long nr_pages)
+                                    unsigned long nr_pages,
+                                    unsigned int *flush_flags)
 {
     struct page_info *page = NULL;
     l4_pgentry_t *pl4e, *l4start = map_domain_page(_mfn(pgtbl_pfn));
@@ -177,6 +218,10 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L3_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
+                iommu_memory_setup(d, "P2M 1G", page,
+                                   SUPERPAGE_PAGES * SUPERPAGE_PAGES,
+                                   flush_flags);
+
                 *pl3e = l3e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L3_PAGETABLE_SHIFT;
                 continue;
@@ -203,6 +248,9 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L2_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
+                iommu_memory_setup(d, "P2M 2M", page, SUPERPAGE_PAGES,
+                                   flush_flags);
+
                 *pl2e = l2e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L2_PAGETABLE_SHIFT;
                 continue;
@@ -311,6 +359,7 @@ int __init dom0_construct_pv(struct domain *d,
     unsigned long initrd_pfn = -1, initrd_mfn = 0;
     unsigned long count;
     struct page_info *page = NULL;
+    unsigned int flush_flags = 0;
     start_info_t *si;
     struct vcpu *v = d->vcpu[0];
     void *image_base = bootstrap_map(image);
@@ -573,6 +622,9 @@ int __init dom0_construct_pv(struct domain *d,
                     BUG();
         }
         initrd->mod_end = 0;
+
+        iommu_memory_setup(d, "initrd", mfn_to_page(_mfn(initrd_mfn)),
+                           PFN_UP(initrd_len), &flush_flags);
     }
 
     printk("PHYSICAL MEMORY ARRANGEMENT:\n"
@@ -606,6 +658,13 @@ int __init dom0_construct_pv(struct domain *d,
 
     process_pending_softirqs();
 
+    /*
+     * Map the full range here and then punch holes for page tables
+     * alongside marking them as such in mark_pv_pt_pages_rdonly().
+     */
+    iommu_memory_setup(d, "init-alloc", mfn_to_page(_mfn(alloc_spfn)),
+                       alloc_epfn - alloc_spfn, &flush_flags);
+
     mpt_alloc = (vpt_start - v_start) + pfn_to_paddr(alloc_spfn);
     if ( vinitrd_start )
         mpt_alloc -= PAGE_ALIGN(initrd_len);
@@ -690,7 +749,8 @@ int __init dom0_construct_pv(struct domain *d,
         l1tab++;
 
         page = mfn_to_page(_mfn(mfn));
-        if ( !page->u.inuse.type_info &&
+        if ( (!page->u.inuse.type_info ||
+              page->u.inuse.type_info == (PGT_writable_page | PGT_validated)) &&
              !get_page_and_type(page, d, PGT_writable_page) )
             BUG();
     }
@@ -719,7 +779,7 @@ int __init dom0_construct_pv(struct domain *d,
     }
 
     /* Pages that are part of page tables must be read only. */
-    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages);
+    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages, &flush_flags);
 
     /* Mask all upcalls... */
     for ( i = 0; i < XEN_LEGACY_MAX_VCPUS; i++ )
@@ -794,7 +854,7 @@ int __init dom0_construct_pv(struct domain *d,
     {
         pfn = pagetable_get_pfn(v->arch.guest_table);
         setup_pv_physmap(d, pfn, v_start, v_end, vphysmap_start, vphysmap_end,
-                         nr_pages);
+                         nr_pages, &flush_flags);
     }
 
     /* Write the phys->machine and machine->phys table entries. */
@@ -825,7 +885,9 @@ int __init dom0_construct_pv(struct domain *d,
         if ( get_gpfn_from_mfn(mfn) >= count )
         {
             BUG_ON(compat);
-            if ( !page->u.inuse.type_info &&
+            if ( (!page->u.inuse.type_info ||
+                  page->u.inuse.type_info == (PGT_writable_page |
+                                              PGT_validated)) &&
                  !get_page_and_type(page, d, PGT_writable_page) )
                 BUG();
 
@@ -841,8 +903,12 @@ int __init dom0_construct_pv(struct domain *d,
 #endif
     while ( pfn < nr_pages )
     {
-        if ( (page = alloc_chunk(d, nr_pages - domain_tot_pages(d))) == NULL )
+        count = domain_tot_pages(d);
+        if ( (page = alloc_chunk(d, nr_pages - count)) == NULL )
             panic("Not enough RAM for DOM0 reservation\n");
+
+        iommu_memory_setup(d, "chunk", page, domain_tot_pages(d) - count,
+                           &flush_flags);
         while ( pfn < domain_tot_pages(d) )
         {
             mfn = mfn_x(page_to_mfn(page));
@@ -857,6 +923,10 @@ int __init dom0_construct_pv(struct domain *d,
         }
     }
 
+    /* Use while() to avoid compiler warning. */
+    while ( iommu_iotlb_flush_all(d, flush_flags) )
+        break;
+
     if ( initrd_len != 0 )
     {
         si->mod_start = vinitrd_start ?: initrd_pfn;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 0ba95473c9..11a4f244e4 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -348,8 +348,8 @@ static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 {
-    unsigned long i, top, max_pfn;
-    unsigned int flush_flags = 0;
+    unsigned long i, top, max_pfn, start, count;
+    unsigned int flush_flags = 0, start_perms = 0;
 
     BUG_ON(!is_hardware_domain(d));
 
@@ -380,9 +380,9 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
      * First Mb will get mapped in one go by pvh_populate_p2m(). Avoid
      * setting up potentially conflicting mappings here.
      */
-    i = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
+    start = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
 
-    for ( ; i < top; i++ )
+    for ( i = start, count = 0; i < top; )
     {
         unsigned long pfn = pdx_to_pfn(i);
         unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
@@ -391,20 +391,41 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
         if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
+        {
             rc = p2m_add_identity_entry(d, pfn,
                                         perms & IOMMUF_writable ? p2m_access_rw
                                                                 : p2m_access_r,
                                         0);
+            if ( rc )
+                printk(XENLOG_WARNING
+                       "%pd: identity mapping of %lx failed: %d\n",
+                       d, pfn, rc);
+        }
+        else if ( pfn != start + count || perms != start_perms )
+        {
+        commit:
+            rc = iommu_map(d, _dfn(start), _mfn(start), count, start_perms,
+                           &flush_flags);
+            if ( rc )
+                printk(XENLOG_WARNING
+                       "%pd: IOMMU identity mapping of [%lx,%lx) failed: %d\n",
+                       d, pfn, pfn + count, rc);
+            SWAP(start, pfn);
+            start_perms = perms;
+            count = 1;
+        }
         else
-            rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
-                           perms, &flush_flags);
+        {
+            ++count;
+            rc = 0;
+        }
 
-        if ( rc )
-            printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
-                   d, !paging_mode_translate(d) ? "IOMMU " : "", pfn, rc);
 
-        if (!(i & 0xfffff))
+        if ( !(++i & 0xfffff) )
             process_pending_softirqs();
+
+        if ( i == top && count )
+            goto commit;
     }
 
     /* Use if to avoid compiler warning */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/spec-ctrl: Enumeration for new Intel BHI controls
Message-Id: <E1nz2MP-0000JV-Qp@xenbits.xenproject.org>
Date: Wed, 08 Jun 2022 20:33:01 +0000

commit cea9ae06229577cd5b77019ce122f9cdd1568106
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Feb 18 16:02:51 2022 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 6 18:15:46 2022 +0100

    x86/spec-ctrl: Enumeration for new Intel BHI controls
    
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/msr-index.h        | 7 +++++++
 xen/include/public/arch-x86/cpufeatureset.h | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 31964b88af..6c250bfcad 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -36,7 +36,12 @@
 #define  SPEC_CTRL_IBRS                     (_AC(1, ULL) <<  0)
 #define  SPEC_CTRL_STIBP                    (_AC(1, ULL) <<  1)
 #define  SPEC_CTRL_SSBD                     (_AC(1, ULL) <<  2)
+#define  SPEC_CTRL_IPRED_DIS_U              (_AC(1, ULL) <<  3)
+#define  SPEC_CTRL_IPRED_DIS_S              (_AC(1, ULL) <<  4)
+#define  SPEC_CTRL_RRSBA_DIS_U              (_AC(1, ULL) <<  5)
+#define  SPEC_CTRL_RRSBA_DIS_S              (_AC(1, ULL) <<  6)
 #define  SPEC_CTRL_PSFD                     (_AC(1, ULL) <<  7)
+#define  SPEC_CTRL_BHI_DIS_S                (_AC(1, ULL) << 10)
 
 #define MSR_PRED_CMD                        0x00000049
 #define  PRED_CMD_IBPB                      (_AC(1, ULL) <<  0)
@@ -66,6 +71,8 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_RRSBA                    (_AC(1, ULL) << 19)
+#define  ARCH_CAPS_BHI_NO                   (_AC(1, ULL) << 20)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 0c27f5bbaf..1016989410 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -304,6 +304,9 @@ XEN_CPUFEATURE(INTEL_PPIN,         12*32+ 0) /*   Protected Processor Inventory
 
 /* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */
 XEN_CPUFEATURE(INTEL_PSFD,         13*32+ 0) /*A  MSR_SPEC_CTRL.PSFD */
+XEN_CPUFEATURE(IPRED_CTRL,         13*32+ 1) /*   MSR_SPEC_CTRL.IPRED_DIS_* */
+XEN_CPUFEATURE(RRSBA_CTRL,         13*32+ 2) /*   MSR_SPEC_CTRL.RRSBA_DIS_* */
+XEN_CPUFEATURE(BHI_CTRL,           13*32+ 4) /*   MSR_SPEC_CTRL.BHI_DIS_S */
 XEN_CPUFEATURE(MCDT_NO,            13*32+ 5) /*A  MCDT_NO */
 
 #endif /* XEN_CPUFEATURE */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] docs/misra: introduce rules.rst
Message-Id: <E1nzDFu-0000lw-5e@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:02 +0000

commit 4b08435f586e3f605fdc13f7cb38484f37ad42e9
Author:     Stefano Stabellini <stefano.stabellini@xilinx.com>
AuthorDate: Tue May 31 18:44:01 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 7 17:43:47 2022 -0700

    docs/misra: introduce rules.rst
    
    Introduce a list of MISRA C rules that apply to the Xen hypervisor. The
    list is in RST format.
    
    Specify that rules deviations need to be documented. Introduce a
    documentation tag for in-code comments to mark them as deviations. Also
    mention that other documentation mechanisms are work-in-progress.
    
    Add a mention of the new list to CODING_STYLE.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 CODING_STYLE         |   6 +++
 docs/index.rst       |  12 +++++
 docs/misra/rules.rst | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 141 insertions(+)

diff --git a/CODING_STYLE b/CODING_STYLE
index 9f50d9cec4..3386ee1d90 100644
--- a/CODING_STYLE
+++ b/CODING_STYLE
@@ -14,6 +14,12 @@ explicitly (e.g. tools/libxl/CODING_STYLE) but often implicitly (Linux
 coding style is fairly common). In general you should copy the style
 of the surrounding code. If you are unsure please ask.
 
+MISRA C
+-------
+
+The Xen Hypervisor follows some MISRA C coding rules. See
+docs/misra/rules.rst for details.
+
 Indentation
 -----------
 
diff --git a/docs/index.rst b/docs/index.rst
index b75487a05d..2c47cfa999 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -53,6 +53,18 @@ kind of development environment.
    hypervisor-guide/index
 
 
+MISRA C coding guidelines
+-------------------------
+
+MISRA C rules and directive to be used as coding guidelines when writing
+Xen hypervisor code.
+
+.. toctree::
+   :maxdepth: 2
+
+   misra/rules
+
+
 Miscellanea
 -----------
 
diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
new file mode 100644
index 0000000000..7d6a9fe063
--- /dev/null
+++ b/docs/misra/rules.rst
@@ -0,0 +1,123 @@
+.. SPDX-License-Identifier: CC-BY-4.0
+
+MISRA C rules for Xen
+=====================
+
+.. note::
+
+   **IMPORTANT** All MISRA C rules, text, and examples are copyrighted
+   by the MISRA Consortium Limited and used with permission.
+
+   Please refer to https://www.misra.org.uk/ to obtain a copy of MISRA
+   C, or for licensing options for other use of the rules.
+
+The following is the list of MISRA C rules that apply to the Xen
+hypervisor.
+
+It is possible that in specific circumstances it is best not to follow a
+rule because it is not possible or because the alternative leads to
+better code quality. Those cases are called "deviations". They are
+permissible as long as they are documented as an in-code comment using
+the following format::
+
+    /*
+     * MISRA_DEV: Rule ID
+     * Justification text.
+     */
+
+Other documentation mechanisms are work-in-progress.
+
+The existing codebase is not 100% compliant with the rules. Some of the
+violations are meant to be documented as deviations, while some others
+should be fixed. Both compliance and documenting deviations on the
+existing codebase are work-in-progress.
+
+.. list-table::
+   :header-rows: 1
+
+   * - Dir number
+     - Severity
+     - Summary
+     - Notes
+
+   * - `Dir 2.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_02_01.c>`_
+     - Required
+     - All source files shall compile without any compilation errors
+     -
+
+   * - `Dir 4.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_07.c>`_
+     - Required
+     - If a function returns error information then that error
+       information shall be tested
+     -
+
+   * - `Dir 4.10 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_10.c>`_
+     - Required
+     - Precautions shall be taken in order to prevent the contents of a
+       header file being included more than once
+     -
+
+   * - `Dir 4.14 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_14.c>`_
+     - Required
+     - The validity of values received from external sources shall be
+       checked
+     -
+
+.. list-table::
+   :header-rows: 1
+
+   * - Rule number
+     - Severity
+     - Summary
+     - Notes
+
+   * - `Rule 1.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_01_03.c>`_
+     - Required
+     - There shall be no occurrence of undefined or critical unspecified
+       behaviour
+     -
+
+   * - `Rule 3.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_03_02.c>`_
+     - Required
+     - Line-splicing shall not be used in // comments
+     -
+
+   * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
+     - Required
+     - Single-bit named bit fields shall not be of a signed type
+     -
+
+   * - `Rule 8.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_01.c>`_
+     - Required
+     - Types shall be explicitly specified
+     -
+
+   * - `Rule 8.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_04.c>`_
+     - Required
+     - A compatible declaration shall be visible when an object or
+       function with external linkage is defined
+     -
+
+   * - `Rule 8.5 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_05_2.c>`_
+     - Required
+     - An external object or function shall be declared once in one and only one file
+     -
+
+   * - `Rule 8.6 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_06_2.c>`_
+     - Required
+     - An identifier with external linkage shall have exactly one
+       external definition
+     - Declarations without definitions are allowed (specifically when
+       the definition is compiled-out or optimized-out by the compiler)
+
+   * - `Rule 8.8 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_08.c>`_
+     - Required
+     - The static storage class specifier shall be used in all
+       declarations of objects and functions that have internal linkage
+     -
+
+   * - `Rule 8.12 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_12.c>`_
+     - Required
+     - Within an enumerator list the value of an implicitly-specified
+       enumeration constant shall be unique
+     -
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] docs/misra: add Rule 5.1
Message-Id: <E1nzDG4-0000mS-8e@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:12 +0000

commit 8c1cc69748f4719e6ba8a275c2ecd60747c52c21
Author:     Stefano Stabellini <stefano.stabellini@xilinx.com>
AuthorDate: Tue May 31 18:44:02 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 7 17:44:03 2022 -0700

    docs/misra: add Rule 5.1
    
    Add Rule 5.1, with the additional note that the character limit for Xen
    is 40 characters.
    
    The max length identifiers found by ECLAIR are:
    
    __mitigate_spectre_bhb_clear_insn_start
    domain_pause_by_systemcontroller_nosync
    
    Both of them are 40 characters long.
    
    Explicitly mention that public headers might have longer identifiers.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 docs/misra/rules.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 7d6a9fe063..6ccff07765 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -82,6 +82,13 @@ existing codebase are work-in-progress.
      - Line-splicing shall not be used in // comments
      -
 
+   * - `Rule 5.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_01_2.c>`_
+     - Required
+     - External identifiers shall be distinct
+     - The Xen characters limit for identifiers is 40. Public headers
+       (xen/include/public/) are allowed to retain longer identifiers
+       for backward compatibility.
+
    * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
      - Required
      - Single-bit named bit fields shall not be of a signed type
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] page_alloc: assert IRQs are enabled in heap alloc/free
Message-Id: <E1nzDGE-0000mv-Bq@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:22 +0000

commit e890b685996cbde3ba5378e772e7bfd2dd304b59
Author:     David Vrabel <dvrabel@amazon.co.uk>
AuthorDate: Tue Apr 26 10:33:01 2022 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 10:38:40 2022 +0100

    page_alloc: assert IRQs are enabled in heap alloc/free
    
    Heap pages can only be safely allocated and freed with interrupts
    enabled as they may require a TLB flush which may send IPIs (on x86).
    
    Normally spinlock debugging would catch calls from the incorrect
    context, but not from stop_machine_run() action functions as these are
    called with spin lock debugging disabled.
    
    Enhance the assertions in alloc_xenheap_pages() and
    alloc_domheap_pages() to check interrupts are enabled. For consistency
    the same asserts are used when freeing heap pages.
    
    As an exception, when only 1 PCPU is online, allocations are permitted
    with interrupts disabled as any TLB flushes would be local only. This
    is necessary during early boot.
    
    Signed-off-by: David Vrabel <dvrabel@amazon.co.uk>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/page_alloc.c | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 319029140f..e866e0d864 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -162,6 +162,13 @@
 static char __initdata opt_badpage[100] = "";
 string_param("badpage", opt_badpage);
 
+/*
+ * Heap allocations may need TLB flushes which may require IRQs to be
+ * enabled (except when only 1 PCPU is online).
+ */
+#define ASSERT_ALLOC_CONTEXT() \
+    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
+
 /*
  * no-bootscrub -> Free pages are not zeroed during boot.
  */
@@ -2160,7 +2167,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
 {
     struct page_info *pg;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     pg = alloc_heap_pages(MEMZONE_XEN, MEMZONE_XEN,
                           order, memflags | MEMF_no_scrub, NULL);
@@ -2173,7 +2180,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
 
 void free_xenheap_pages(void *v, unsigned int order)
 {
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( v == NULL )
         return;
@@ -2202,7 +2209,7 @@ void *alloc_xenheap_pages(unsigned int order, unsigned int memflags)
     struct page_info *pg;
     unsigned int i;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( xenheap_bits && (memflags >> _MEMF_bits) > xenheap_bits )
         memflags &= ~MEMF_bits(~0U);
@@ -2224,7 +2231,7 @@ void free_xenheap_pages(void *v, unsigned int order)
     struct page_info *pg;
     unsigned int i;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( v == NULL )
         return;
@@ -2249,7 +2256,7 @@ void init_domheap_pages(paddr_t ps, paddr_t pe)
 {
     mfn_t smfn, emfn;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     smfn = maddr_to_mfn(round_pgup(ps));
     emfn = maddr_to_mfn(round_pgdown(pe));
@@ -2369,7 +2376,7 @@ struct page_info *alloc_domheap_pages(
     unsigned int bits = memflags >> _MEMF_bits, zone_hi = NR_ZONES - 1;
     unsigned int dma_zone;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     bits = domain_clamp_alloc_bitsize(memflags & MEMF_no_owner ? NULL : d,
                                       bits ? : (BITS_PER_LONG+PAGE_SHIFT));
@@ -2419,7 +2426,7 @@ void free_domheap_pages(struct page_info *pg, unsigned int order)
     unsigned int i;
     bool drop_dom_ref;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( unlikely(is_xen_heap_page(pg)) )
     {
@@ -2738,7 +2745,7 @@ int __init acquire_domstatic_pages(struct domain *d, mfn_t smfn,
 {
     struct page_info *pg;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     pg = acquire_staticmem_pages(smfn, nr_mfns, memflags);
     if ( !pg )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in xmalloc()
Message-Id: <E1nzDGO-0000nS-FI@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:32 +0000

commit 5047cd1d5deaa734ce67b4d706ac59d9a258c3e1
Author:     Henry Wang <Henry.Wang@arm.com>
AuthorDate: Sat May 7 10:54:34 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 10:40:08 2022 +0100

    xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in xmalloc()
    
    xmalloc() will use a pool for allocation smaller than a page.
    The pool is extended only when there are no more space. At which
    point, alloc_xenheap_pages() is called to add more memory.
    
    xmalloc() must be protected by ASSERT_ALLOC_CONTEXT. It should not
    rely on pool expanding to trigger the ASSERT_ALLOC_CONTEXT in
    alloc_xenheap_pages(). Hence, this commit moves the definition of
    ASSERT_ALLOC_CONTEXT to header and uses the ASSERT_ALLOC_CONTEXT
    to replace the original assertion in xmalloc().
    
    For consistency, the same assertion should be used in xfree(),
    and the position of the assertion should be at the beginning of
    the xfree().
    
    Also take the opportunity to enhance the non-static functions
    xmem_pool_{alloc,free}() with the same assertion so that future
    callers of these two functions can be benefited.
    
    Reported-by: Wei Chen <Wei.Chen@arm.com>
    Suggested-by: Julien Grall <jgrall@amazon.com>
    Signed-off-by: Henry Wang <Henry.Wang@arm.com>
    Tested-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/common/page_alloc.c   |  7 -------
 xen/common/xmalloc_tlsf.c | 10 +++++++---
 xen/include/xen/irq.h     |  7 +++++++
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index e866e0d864..ea59cd1a4a 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -162,13 +162,6 @@
 static char __initdata opt_badpage[100] = "";
 string_param("badpage", opt_badpage);
 
-/*
- * Heap allocations may need TLB flushes which may require IRQs to be
- * enabled (except when only 1 PCPU is online).
- */
-#define ASSERT_ALLOC_CONTEXT() \
-    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
-
 /*
  * no-bootscrub -> Free pages are not zeroed during boot.
  */
diff --git a/xen/common/xmalloc_tlsf.c b/xen/common/xmalloc_tlsf.c
index d2ad909502..75bdf18c4e 100644
--- a/xen/common/xmalloc_tlsf.c
+++ b/xen/common/xmalloc_tlsf.c
@@ -378,6 +378,8 @@ void *xmem_pool_alloc(unsigned long size, struct xmem_pool *pool)
     int fl, sl;
     unsigned long tmp_size;
 
+    ASSERT_ALLOC_CONTEXT();
+
     if ( size < MIN_BLOCK_SIZE )
         size = MIN_BLOCK_SIZE;
     else
@@ -456,6 +458,8 @@ void xmem_pool_free(void *ptr, struct xmem_pool *pool)
     struct bhdr *b, *tmp_b;
     int fl = 0, sl = 0;
 
+    ASSERT_ALLOC_CONTEXT();
+
     if ( unlikely(ptr == NULL) )
         return;
 
@@ -594,7 +598,7 @@ void *_xmalloc(unsigned long size, unsigned long align)
 {
     void *p = NULL;
 
-    ASSERT(!in_irq());
+    ASSERT_ALLOC_CONTEXT();
 
     if ( !size )
         return ZERO_BLOCK_PTR;
@@ -697,11 +701,11 @@ void *_xrealloc(void *ptr, unsigned long size, unsigned long align)
 
 void xfree(void *p)
 {
+    ASSERT_ALLOC_CONTEXT();
+
     if ( p == NULL || p == ZERO_BLOCK_PTR )
         return;
 
-    ASSERT(!in_irq());
-
     if ( !((unsigned long)p & (PAGE_SIZE - 1)) )
     {
         unsigned long size = PFN_ORDER(virt_to_page(p));
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index d8beadd16b..300625e56d 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -10,6 +10,13 @@
 #include <asm/hardirq.h>
 #include <public/event_channel.h>
 
+/*
+ * Heap allocations may need TLB flushes which may require IRQs to be
+ * enabled (except when only 1 PCPU is online).
+ */
+#define ASSERT_ALLOC_CONTEXT() \
+    ASSERT(!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1))
+
 struct irqaction {
     void (*handler)(int, void *, struct cpu_user_regs *);
     const char *name;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Allow other mapping size in xen_pt_update_entry()
Message-Id: <E1nzDGY-0000o2-IH@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:42 +0000

commit 677b3f8f7baa4d5a037543237e1967f1d1c3c502
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:22 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allow other mapping size in xen_pt_update_entry()
    
    At the moment, xen_pt_update_entry() only supports mapping at level 3
    (i.e 4KB mapping). While this is fine for most of the runtime helper,
    the boot code will require to use superpage mapping.
    
    We don't want to allow superpage mapping by default as some of the
    callers may expect small mappings (i.e populate_pt_range()) or even
    expect to unmap only a part of a superpage.
    
    To keep the code simple, a new flag _PAGE_BLOCK is introduced to
    allow the caller to enable superpage mapping.
    
    As the code doesn't support all the combinations, xen_pt_check_entry()
    is extended to take into account the cases we don't support when
    using block mapping:
        - Replacing a table with a mapping. This may happen if region was
        first mapped with 4KB mapping and then later on replaced with a 2MB
        (or 1GB mapping).
        - Removing/modifying a table. This may happen if a caller try to
        remove a region with _PAGE_BLOCK set when it was created without it.
    
    Note that the current restriction means that the caller must ensure that
    _PAGE_BLOCK is consistently set/cleared across all the updates on a
    given virtual region. This ought to be fine with the expected use-cases.
    
    More rework will be necessary if we wanted to remove the restrictions.
    
    Note that nr_mfns is now marked const as it is used for flushing the
    TLBs and we don't want it to be modified.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/page.h |   4 ++
 xen/arch/arm/mm.c               | 109 +++++++++++++++++++++++++++++++++-------
 2 files changed, 95 insertions(+), 18 deletions(-)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index c6f9fb0d4e..07998df47b 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -69,6 +69,7 @@
  * [3:4] Permission flags
  * [5]   Page present
  * [6]   Only populate page tables
+ * [7]   Superpage mappings is allowed
  */
 #define PAGE_AI_MASK(x) ((x) & 0x7U)
 
@@ -82,6 +83,9 @@
 #define _PAGE_PRESENT    (1U << 5)
 #define _PAGE_POPULATE   (1U << 6)
 
+#define _PAGE_BLOCK_BIT     7
+#define _PAGE_BLOCK         (1U << _PAGE_BLOCK_BIT)
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 7b1f2f4906..be2ac302d7 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1078,9 +1078,10 @@ static int xen_pt_next_level(bool read_only, unsigned int level,
 }
 
 /* Sanity check of the entry */
-static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
+static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int level,
+                               unsigned int flags)
 {
-    /* Sanity check when modifying a page. */
+    /* Sanity check when modifying an entry. */
     if ( (flags & _PAGE_PRESENT) && mfn_eq(mfn, INVALID_MFN) )
     {
         /* We don't allow modifying an invalid entry. */
@@ -1090,6 +1091,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
             return false;
         }
 
+        /* We don't allow modifying a table entry */
+        if ( !lpae_is_mapping(entry, level) )
+        {
+            mm_printk("Modifying a table entry is not allowed.\n");
+            return false;
+        }
+
         /* We don't allow changing memory attributes. */
         if ( entry.pt.ai != PAGE_AI_MASK(flags) )
         {
@@ -1105,7 +1113,7 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
             return false;
         }
     }
-    /* Sanity check when inserting a page */
+    /* Sanity check when inserting a mapping */
     else if ( flags & _PAGE_PRESENT )
     {
         /* We should be here with a valid MFN. */
@@ -1114,18 +1122,28 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
         /* We don't allow replacing any valid entry. */
         if ( lpae_is_valid(entry) )
         {
-            mm_printk("Changing MFN for a valid entry is not allowed (%#"PRI_mfn" -> %#"PRI_mfn").\n",
-                      mfn_x(lpae_get_mfn(entry)), mfn_x(mfn));
+            if ( lpae_is_mapping(entry, level) )
+                mm_printk("Changing MFN for a valid entry is not allowed (%#"PRI_mfn" -> %#"PRI_mfn").\n",
+                          mfn_x(lpae_get_mfn(entry)), mfn_x(mfn));
+            else
+                mm_printk("Trying to replace a table with a mapping.\n");
             return false;
         }
     }
-    /* Sanity check when removing a page. */
+    /* Sanity check when removing a mapping. */
     else if ( (flags & (_PAGE_PRESENT|_PAGE_POPULATE)) == 0 )
     {
         /* We should be here with an invalid MFN. */
         ASSERT(mfn_eq(mfn, INVALID_MFN));
 
-        /* We don't allow removing page with contiguous bit set. */
+        /* We don't allow removing a table */
+        if ( lpae_is_table(entry, level) )
+        {
+            mm_printk("Removing a table is not allowed.\n");
+            return false;
+        }
+
+        /* We don't allow removing a mapping with contiguous bit set. */
         if ( entry.pt.contig )
         {
             mm_printk("Removing entry with contiguous bit set is not allowed.\n");
@@ -1143,13 +1161,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int flags)
     return true;
 }
 
+/* Update an entry at the level @target. */
 static int xen_pt_update_entry(mfn_t root, unsigned long virt,
-                               mfn_t mfn, unsigned int flags)
+                               mfn_t mfn, unsigned int target,
+                               unsigned int flags)
 {
     int rc;
     unsigned int level;
-    /* We only support 4KB mapping (i.e level 3) for now */
-    unsigned int target = 3;
     lpae_t *table;
     /*
      * The intermediate page tables are read-only when the MFN is not valid
@@ -1204,7 +1222,7 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
     entry = table + offsets[level];
 
     rc = -EINVAL;
-    if ( !xen_pt_check_entry(*entry, mfn, flags) )
+    if ( !xen_pt_check_entry(*entry, mfn, level, flags) )
         goto out;
 
     /* If we are only populating page-table, then we are done. */
@@ -1222,8 +1240,11 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
         {
             pte = mfn_to_xen_entry(mfn, PAGE_AI_MASK(flags));
 
-            /* Third level entries set pte.pt.table = 1 */
-            pte.pt.table = 1;
+            /*
+             * First and second level pages set pte.pt.table = 0, but
+             * third level entries set pte.pt.table = 1.
+             */
+            pte.pt.table = (level == 3);
         }
         else /* We are updating the permission => Copy the current pte. */
             pte = *entry;
@@ -1243,15 +1264,57 @@ out:
     return rc;
 }
 
+/* Return the level where mapping should be done */
+static int xen_pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
+                                unsigned int flags)
+{
+    unsigned int level;
+    unsigned long mask;
+
+    /*
+      * Don't take into account the MFN when removing mapping (i.e
+      * MFN_INVALID) to calculate the correct target order.
+      *
+      * Per the Arm Arm, `vfn` and `mfn` must be both superpage aligned.
+      * They are or-ed together and then checked against the size of
+      * each level.
+      *
+      * `left` is not included and checked separately to allow
+      * superpage mapping even if it is not properly aligned (the
+      * user may have asked to map 2MB + 4k).
+      */
+     mask = !mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0;
+     mask |= vfn;
+
+     /*
+      * Always use level 3 mapping unless the caller request block
+      * mapping.
+      */
+     if ( likely(!(flags & _PAGE_BLOCK)) )
+         level = 3;
+     else if ( !(mask & (BIT(FIRST_ORDER, UL) - 1)) &&
+               (nr >= BIT(FIRST_ORDER, UL)) )
+         level = 1;
+     else if ( !(mask & (BIT(SECOND_ORDER, UL) - 1)) &&
+               (nr >= BIT(SECOND_ORDER, UL)) )
+         level = 2;
+     else
+         level = 3;
+
+     return level;
+}
+
 static DEFINE_SPINLOCK(xen_pt_lock);
 
 static int xen_pt_update(unsigned long virt,
                          mfn_t mfn,
-                         unsigned long nr_mfns,
+                         /* const on purpose as it is used for TLB flush */
+                         const unsigned long nr_mfns,
                          unsigned int flags)
 {
     int rc = 0;
-    unsigned long addr = virt, addr_end = addr + nr_mfns * PAGE_SIZE;
+    unsigned long vfn = virt >> PAGE_SHIFT;
+    unsigned long left = nr_mfns;
 
     /*
      * For arm32, page-tables are different on each CPUs. Yet, they share
@@ -1283,14 +1346,24 @@ static int xen_pt_update(unsigned long virt,
 
     spin_lock(&xen_pt_lock);
 
-    for ( ; addr < addr_end; addr += PAGE_SIZE )
+    while ( left )
     {
-        rc = xen_pt_update_entry(root, addr, mfn, flags);
+        unsigned int order, level;
+
+        level = xen_pt_mapping_level(vfn, mfn, left, flags);
+        order = XEN_PT_LEVEL_ORDER(level);
+
+        ASSERT(left >= BIT(order, UL));
+
+        rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level, flags);
         if ( rc )
             break;
 
+        vfn += 1U << order;
         if ( !mfn_eq(mfn, INVALID_MFN) )
-            mfn = mfn_add(mfn, 1);
+            mfn = mfn_add(mfn, 1U << order);
+
+        left -= (1U << order);
     }
 
     /*
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Add support for the contiguous bit
Message-Id: <E1nzDGi-0000oR-LG@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:11:52 +0000

commit d1459136f39546950c19a640834b0205ca71a84c
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:23 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Add support for the contiguous bit
    
    In follow-up patches, we will use xen_pt_update() (or its callers)
    to handle large mappings (e.g. frametable, xenheap). They are also
    not going to be modified once created.
    
    The page-table entries have an hint to indicate that whether an
    entry is contiguous to another 16 entries (assuming 4KB). When the
    processor support the hint, one TLB entry will be created per
    contiguous region.
    
    For now this is tied to _PAGE_BLOCK. We can untie it in the future
    if there are use-cases where we may want to use _PAGE_BLOCK without
    setting the contiguous (couldn't think of any yet).
    
    Note that to avoid extra complexity, mappings with the contiguous
    bit set cannot be removed. Given the expected use, this restriction
    ought to be fine.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Deng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/page.h |  4 ++
 xen/arch/arm/mm.c               | 83 +++++++++++++++++++++++++++++++++++++----
 2 files changed, 79 insertions(+), 8 deletions(-)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 07998df47b..e7cd62190c 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -70,6 +70,7 @@
  * [5]   Page present
  * [6]   Only populate page tables
  * [7]   Superpage mappings is allowed
+ * [8]   Set contiguous bit (internal flag)
  */
 #define PAGE_AI_MASK(x) ((x) & 0x7U)
 
@@ -86,6 +87,9 @@
 #define _PAGE_BLOCK_BIT     7
 #define _PAGE_BLOCK         (1U << _PAGE_BLOCK_BIT)
 
+#define _PAGE_CONTIG_BIT    8
+#define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index be2ac302d7..c4487dd7fc 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1252,6 +1252,8 @@ static int xen_pt_update_entry(mfn_t root, unsigned long virt,
         /* Set permission */
         pte.pt.ro = PAGE_RO_MASK(flags);
         pte.pt.xn = PAGE_XN_MASK(flags);
+        /* Set contiguous bit */
+        pte.pt.contig = !!(flags & _PAGE_CONTIG);
     }
 
     write_pte(entry, pte);
@@ -1304,6 +1306,51 @@ static int xen_pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
      return level;
 }
 
+#define XEN_PT_4K_NR_CONTIG 16
+
+/*
+ * Check whether the contiguous bit can be set. Return the number of
+ * contiguous entry allowed. If not allowed, return 1.
+ */
+static unsigned int xen_pt_check_contig(unsigned long vfn, mfn_t mfn,
+                                        unsigned int level, unsigned long left,
+                                        unsigned int flags)
+{
+    unsigned long nr_contig;
+
+    /*
+     * Allow the contiguous bit to set when the caller requests block
+     * mapping.
+     */
+    if ( !(flags & _PAGE_BLOCK) )
+        return 1;
+
+    /*
+     * We don't allow to remove mapping with the contiguous bit set.
+     * So shortcut the logic and directly return 1.
+     */
+    if ( mfn_eq(mfn, INVALID_MFN) )
+        return 1;
+
+    /*
+     * The number of contiguous entries varies depending on the page
+     * granularity used. The logic below assumes 4KB.
+     */
+    BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
+
+    /*
+     * In order to enable the contiguous bit, we should have enough entries
+     * to map left and both the virtual and physical address should be
+     * aligned to the size of 16 translation tables entries.
+     */
+    nr_contig = BIT(XEN_PT_LEVEL_ORDER(level), UL) * XEN_PT_4K_NR_CONTIG;
+
+    if ( (left < nr_contig) || ((mfn_x(mfn) | vfn) & (nr_contig - 1)) )
+        return 1;
+
+    return XEN_PT_4K_NR_CONTIG;
+}
+
 static DEFINE_SPINLOCK(xen_pt_lock);
 
 static int xen_pt_update(unsigned long virt,
@@ -1338,6 +1385,12 @@ static int xen_pt_update(unsigned long virt,
         return -EINVAL;
     }
 
+    if ( flags & _PAGE_CONTIG )
+    {
+        mm_printk("_PAGE_CONTIG is an internal only flag.\n");
+        return -EINVAL;
+    }
+
     if ( !IS_ALIGNED(virt, PAGE_SIZE) )
     {
         mm_printk("The virtual address is not aligned to the page-size.\n");
@@ -1348,22 +1401,36 @@ static int xen_pt_update(unsigned long virt,
 
     while ( left )
     {
-        unsigned int order, level;
+        unsigned int order, level, nr_contig, new_flags;
 
         level = xen_pt_mapping_level(vfn, mfn, left, flags);
         order = XEN_PT_LEVEL_ORDER(level);
 
         ASSERT(left >= BIT(order, UL));
 
-        rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level, flags);
-        if ( rc )
-            break;
+        /*
+         * Check if we can set the contiguous mapping and update the
+         * flags accordingly.
+         */
+        nr_contig = xen_pt_check_contig(vfn, mfn, level, left, flags);
+        new_flags = flags | ((nr_contig > 1) ? _PAGE_CONTIG : 0);
 
-        vfn += 1U << order;
-        if ( !mfn_eq(mfn, INVALID_MFN) )
-            mfn = mfn_add(mfn, 1U << order);
+        for ( ; nr_contig > 0; nr_contig-- )
+        {
+            rc = xen_pt_update_entry(root, vfn << PAGE_SHIFT, mfn, level,
+                                     new_flags);
+            if ( rc )
+                break;
+
+            vfn += 1U << order;
+            if ( !mfn_eq(mfn, INVALID_MFN) )
+                mfn = mfn_add(mfn, 1U << order);
 
-        left -= (1U << order);
+            left -= (1U << order);
+        }
+
+        if ( rc )
+            break;
     }
 
     /*
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Avoid flushing the TLBs when mapping are inserted
Message-Id: <E1nzDGs-0000pF-O5@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:02 +0000

commit 07d11f63d03ee919038e707e6618846cf4e6df0f
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:24 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Avoid flushing the TLBs when mapping are inserted
    
    Currently, the function xen_pt_update() will flush the TLBs even when
    the mappings are inserted. This is a bit wasteful because we don't
    allow mapping replacement. Even if we were, the flush would need to
    happen earlier because mapping replacement should use Break-Before-Make
    when updating the entry.
    
    A single call to xen_pt_update() can perform a single action. IOW, it
    is not possible to, for instance, mix inserting and removing mappings.
    Therefore, we can use `flags` to determine what action is performed.
    
    This change will be particularly help to limit the impact of switching
    boot time mapping to use xen_pt_update().
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
---
 xen/arch/arm/mm.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index c4487dd7fc..747083d820 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1119,7 +1119,13 @@ static bool xen_pt_check_entry(lpae_t entry, mfn_t mfn, unsigned int level,
         /* We should be here with a valid MFN. */
         ASSERT(!mfn_eq(mfn, INVALID_MFN));
 
-        /* We don't allow replacing any valid entry. */
+        /*
+         * We don't allow replacing any valid entry.
+         *
+         * Note that the function xen_pt_update() relies on this
+         * assumption and will skip the TLB flush. The function will need
+         * to be updated if the check is relaxed.
+         */
         if ( lpae_is_valid(entry) )
         {
             if ( lpae_is_mapping(entry, level) )
@@ -1434,11 +1440,16 @@ static int xen_pt_update(unsigned long virt,
     }
 
     /*
-     * Flush the TLBs even in case of failure because we may have
+     * The TLBs flush can be safely skipped when a mapping is inserted
+     * as we don't allow mapping replacement (see xen_pt_check_entry()).
+     *
+     * For all the other cases, the TLBs will be flushed unconditionally
+     * even if the mapping has failed. This is because we may have
      * partially modified the PT. This will prevent any unexpected
      * behavior afterwards.
      */
-    flush_xen_tlb_range_va(virt, PAGE_SIZE * nr_mfns);
+    if ( !((flags & _PAGE_PRESENT) && !mfn_eq(mfn, INVALID_MFN)) )
+        flush_xen_tlb_range_va(virt, PAGE_SIZE * nr_mfns);
 
     spin_unlock(&xen_pt_lock);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Don't open-code Xen PT update in remove_early_mappings()
Message-Id: <E1nzDH2-0000rj-R7@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:12 +0000

commit 6eb5a9396413896a696c4d6dda2e26c4c94589bf
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:25 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Don't open-code Xen PT update in remove_early_mappings()
    
    Now that xen_pt_update_entry() is able to deal with different mapping
    size, we can replace the open-coding of the page-tables update by a call
    to modify_xen_mappings().
    
    As the function is not meant to fail, a BUG_ON() is added to check the
    return.
    
    Note that we don't use destroy_xen_mappings() because the helper doesn't
    allow us to pass a flags. In theory we could add an extra parameter to
    the function, however there are no other expected users. Hence why
    modify_xen_mappings() is used.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 747083d820..64a79d45b3 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -614,11 +614,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
 
 void __init remove_early_mappings(void)
 {
-    lpae_t pte = {0};
-    write_pte(xen_second + second_table_offset(BOOT_FDT_VIRT_START), pte);
-    write_pte(xen_second + second_table_offset(BOOT_FDT_VIRT_START + SZ_2M),
-              pte);
-    flush_xen_tlb_range_va(BOOT_FDT_VIRT_START, BOOT_FDT_SLOT_SIZE);
+    int rc;
+
+    /* destroy the _PAGE_BLOCK mapping */
+    rc = modify_xen_mappings(BOOT_FDT_VIRT_START, BOOT_FDT_VIRT_END,
+                             _PAGE_BLOCK);
+    BUG_ON(rc);
 }
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Re-implement early_fdt_map() using map_pages_to_xen()
Message-Id: <E1nzDHC-0000s9-U2@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:22 +0000

commit f8c818848fa64b1957411faea7cee22d677cebcc
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:26 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Re-implement early_fdt_map() using map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() calls by map_pages_to_xen() calls.
    
    The mapping can also be marked read-only as Xen should not modify
    the host Device Tree during boot.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Hongda Deng <Hongda.Heng@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 64a79d45b3..03f970e4d1 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -574,6 +574,7 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
     paddr_t offset;
     void *fdt_virt;
     uint32_t size;
+    int rc;
 
     /*
      * Check whether the physical FDT address is set and meets the minimum
@@ -589,8 +590,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
     /* The FDT is mapped using 2MB superpage */
     BUILD_BUG_ON(BOOT_FDT_VIRT_START % SZ_2M);
 
-    create_mappings(xen_second, BOOT_FDT_VIRT_START, paddr_to_pfn(base_paddr),
-                    SZ_2M >> PAGE_SHIFT, SZ_2M);
+    rc = map_pages_to_xen(BOOT_FDT_VIRT_START, maddr_to_mfn(base_paddr),
+                          SZ_2M >> PAGE_SHIFT,
+                          PAGE_HYPERVISOR_RO | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to map the device-tree.\n");
+
 
     offset = fdt_paddr % SECOND_SIZE;
     fdt_virt = (void *)BOOT_FDT_VIRT_START + offset;
@@ -604,9 +609,12 @@ void * __init early_fdt_map(paddr_t fdt_paddr)
 
     if ( (offset + size) > SZ_2M )
     {
-        create_mappings(xen_second, BOOT_FDT_VIRT_START + SZ_2M,
-                        paddr_to_pfn(base_paddr + SZ_2M),
-                        SZ_2M >> PAGE_SHIFT, SZ_2M);
+        rc = map_pages_to_xen(BOOT_FDT_VIRT_START + SZ_2M,
+                              maddr_to_mfn(base_paddr + SZ_2M),
+                              SZ_2M >> PAGE_SHIFT,
+                              PAGE_HYPERVISOR_RO | _PAGE_BLOCK);
+        if ( rc )
+            panic("Unable to map the device-tree\n");
     }
 
     return fdt_virt;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm32: mm: Re-implement setup_xenheap_mappings() using map_pages_to_xen()
Message-Id: <E1nzDHN-0000se-0z@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:33 +0000

commit aafcc54689de010fb2964a282fab7ce27b225328
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:27 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm32: mm: Re-implement setup_xenheap_mappings() using map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() call by map_pages_to_xen() call.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 03f970e4d1..47c2111c36 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -825,7 +825,12 @@ void mmu_init_secondary_cpu(void)
 void __init setup_xenheap_mappings(unsigned long base_mfn,
                                    unsigned long nr_mfns)
 {
-    create_mappings(xen_second, XENHEAP_VIRT_START, base_mfn, nr_mfns, MB(32));
+    int rc;
+
+    rc = map_pages_to_xen(XENHEAP_VIRT_START, _mfn(base_mfn), nr_mfns,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the xenheap mappings.\n");
 
     /* Record where the xenheap is, for translation routines. */
     xenheap_virt_end = XENHEAP_VIRT_START + nr_mfns * PAGE_SIZE;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Allocate xen page tables in domheap rather than xenheap
Message-Id: <E1nzDHX-0000t9-4S@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:43 +0000

commit 922936dc0657c3f6f21023308e93bc681762faf6
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:28 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allocate xen page tables in domheap rather than xenheap
    
    xen_{un,}map_table() already uses the helper to map/unmap pages
    on-demand (note this is currently a NOP on arm64). So switching to
    domheap don't have any disavantage.
    
    But this as the benefit:
        - to keep the page tables unmapped if an arch decided to do so
        - reduce xenheap use on arm32 which can be pretty small
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 36 +++++++++++++++++++++---------------
 1 file changed, 21 insertions(+), 15 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 47c2111c36..252114d67d 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -988,21 +988,6 @@ void *ioremap(paddr_t pa, size_t len)
     return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE);
 }
 
-static int create_xen_table(lpae_t *entry)
-{
-    void *p;
-    lpae_t pte;
-
-    p = alloc_xenheap_page();
-    if ( p == NULL )
-        return -ENOMEM;
-    clear_page(p);
-    pte = mfn_to_xen_entry(virt_to_mfn(p), MT_NORMAL);
-    pte.pt.table = 1;
-    write_pte(entry, pte);
-    return 0;
-}
-
 static lpae_t *xen_map_table(mfn_t mfn)
 {
     /*
@@ -1043,6 +1028,27 @@ static void xen_unmap_table(const lpae_t *table)
     unmap_domain_page(table);
 }
 
+static int create_xen_table(lpae_t *entry)
+{
+    struct page_info *pg;
+    void *p;
+    lpae_t pte;
+
+    pg = alloc_domheap_page(NULL, 0);
+    if ( pg == NULL )
+        return -ENOMEM;
+
+    p = xen_map_table(page_to_mfn(pg));
+    clear_page(p);
+    xen_unmap_table(p);
+
+    pte = mfn_to_xen_entry(page_to_mfn(pg), MT_NORMAL);
+    pte.pt.table = 1;
+    write_pte(entry, pte);
+
+    return 0;
+}
+
 #define XEN_TABLE_MAP_FAILED 0
 #define XEN_TABLE_SUPER_PAGE 1
 #define XEN_TABLE_NORMAL_PAGE 2
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Allow page-table allocation from the boot allocator
Message-Id: <E1nzDHh-0000ta-7L@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:12:53 +0000

commit 77f00c2f023ef1236ec29347bcef13069971fae2
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Fri May 20 13:09:29 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: mm: Allow page-table allocation from the boot allocator
    
    At the moment, page-table can only be allocated from domheap. This means
    it is not possible to create mapping in the page-tables via
    map_pages_to_xen() if page-table needs to be allocated.
    
    In order to avoid open-coding page-tables update in early boot, we need
    to be able to allocate page-tables much earlier. Thankfully, we have the
    boot allocator for those cases.
    
    create_xen_table() is updated to cater early boot allocation by using
    alloc_boot_pages().
    
    Note, this is not sufficient to bootstrap the page-tables (i.e mapping
    before any memory is actually mapped). This will be addressed
    separately.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 252114d67d..6b7b72de27 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1030,19 +1030,27 @@ static void xen_unmap_table(const lpae_t *table)
 
 static int create_xen_table(lpae_t *entry)
 {
-    struct page_info *pg;
+    mfn_t mfn;
     void *p;
     lpae_t pte;
 
-    pg = alloc_domheap_page(NULL, 0);
-    if ( pg == NULL )
-        return -ENOMEM;
+    if ( system_state != SYS_STATE_early_boot )
+    {
+        struct page_info *pg = alloc_domheap_page(NULL, 0);
+
+        if ( pg == NULL )
+            return -ENOMEM;
+
+        mfn = page_to_mfn(pg);
+    }
+    else
+        mfn = alloc_boot_pages(1, 1);
 
-    p = xen_map_table(page_to_mfn(pg));
+    p = xen_map_table(mfn);
     clear_page(p);
     xen_unmap_table(p);
 
-    pte = mfn_to_xen_entry(page_to_mfn(pg), MT_NORMAL);
+    pte = mfn_to_xen_entry(mfn, MT_NORMAL);
     pte.pt.table = 1;
     write_pte(entry, pte);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Move fixmap definitions in a separate header
Message-Id: <E1nzDHr-0000uE-Bc@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:13:03 +0000

commit e7f144f80839168e632ea4405ad114e991beecdf
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Fri May 20 13:09:30 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:04:53 2022 +0100

    xen/arm: Move fixmap definitions in a separate header
    
    To use properly the fixmap definitions, their user would need
    also new to include <xen/acpi.h>. This is not very great when
    the user itself is not meant to directly use ACPI definitions.
    
    Including <xen/acpi.h> in <asm/config.h> is not option because
    the latter header is included by everyone. So move out the fixmap
    entries definition in a new header.
    
    Take the opportunity to also move {set, clear}_fixmap() prototypes
    in the new header.
    
    Note that most of the definitions in <xen/acpi.h> now need to be
    surrounded with #ifndef __ASSEMBLY__ because <asm/fixmap.h> will
    be used in assembly (see EARLY_UART_VIRTUAL_ADDRESS).
    
    The split will become more helpful in a follow-up patch where new
    fixmap entries will be defined.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/acpi/lib.c                 |  2 ++
 xen/arch/arm/include/asm/config.h       |  6 ------
 xen/arch/arm/include/asm/early_printk.h |  1 +
 xen/arch/arm/include/asm/fixmap.h       | 24 ++++++++++++++++++++++++
 xen/arch/arm/include/asm/mm.h           |  4 ----
 xen/arch/arm/kernel.c                   |  1 +
 xen/arch/arm/mm.c                       |  1 +
 xen/include/xen/acpi.h                  | 18 +++++++++++-------
 8 files changed, 40 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/acpi/lib.c b/xen/arch/arm/acpi/lib.c
index a59cc4074c..41d521f720 100644
--- a/xen/arch/arm/acpi/lib.c
+++ b/xen/arch/arm/acpi/lib.c
@@ -25,6 +25,8 @@
 #include <xen/init.h>
 #include <xen/mm.h>
 
+#include <asm/fixmap.h>
+
 static bool fixmap_inuse;
 
 char *__acpi_map_table(paddr_t phys, unsigned long size)
diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h
index b25c9d39bb..3e2a55a910 100644
--- a/xen/arch/arm/include/asm/config.h
+++ b/xen/arch/arm/include/asm/config.h
@@ -169,12 +169,6 @@
 
 #endif
 
-/* Fixmap slots */
-#define FIXMAP_CONSOLE  0  /* The primary UART */
-#define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
-#define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
-#define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
-
 #define NR_hypercalls 64
 
 #define STACK_ORDER 3
diff --git a/xen/arch/arm/include/asm/early_printk.h b/xen/arch/arm/include/asm/early_printk.h
index 8dc911cf48..c5149b2976 100644
--- a/xen/arch/arm/include/asm/early_printk.h
+++ b/xen/arch/arm/include/asm/early_printk.h
@@ -11,6 +11,7 @@
 #define __ARM_EARLY_PRINTK_H__
 
 #include <xen/page-size.h>
+#include <asm/fixmap.h>
 
 #ifdef CONFIG_EARLY_PRINTK
 
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
new file mode 100644
index 0000000000..1cee51e52a
--- /dev/null
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -0,0 +1,24 @@
+/*
+ * fixmap.h: compile-time virtual memory allocation
+ */
+#ifndef __ASM_FIXMAP_H
+#define __ASM_FIXMAP_H
+
+#include <xen/acpi.h>
+
+/* Fixmap slots */
+#define FIXMAP_CONSOLE  0  /* The primary UART */
+#define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
+#define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
+#define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
+
+#ifndef __ASSEMBLY__
+
+/* Map a page in a fixmap entry */
+extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
+/* Remove a mapping from a fixmap entry */
+extern void clear_fixmap(unsigned map);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_FIXMAP_H */
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 424aaf2823..045a8ba4bb 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -191,10 +191,6 @@ extern void mmu_init_secondary_cpu(void);
 extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns);
 /* Map a frame table to cover physical addresses ps through pe */
 extern void setup_frametable_mappings(paddr_t ps, paddr_t pe);
-/* Map a 4k page in a fixmap entry */
-extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
-/* Remove a mapping from a fixmap entry */
-extern void clear_fixmap(unsigned map);
 /* map a physical range in virtual memory */
 void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned attributes);
 
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 8f43caa186..25ded1c056 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -15,6 +15,7 @@
 #include <xen/vmap.h>
 
 #include <asm/byteorder.h>
+#include <asm/fixmap.h>
 #include <asm/kernel.h>
 #include <asm/setup.h>
 
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 6b7b72de27..52b2a03940 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -41,6 +41,7 @@
 #include <xen/sizes.h>
 #include <xen/libfdt/libfdt.h>
 
+#include <asm/fixmap.h>
 #include <asm/setup.h>
 
 /* Override macros from asm/page.h to make them work with mfn_t */
diff --git a/xen/include/xen/acpi.h b/xen/include/xen/acpi.h
index 39d51fcd01..1b9c75e68f 100644
--- a/xen/include/xen/acpi.h
+++ b/xen/include/xen/acpi.h
@@ -28,6 +28,15 @@
 #define _LINUX
 #endif
 
+/*
+ * Fixmap pages to reserve for ACPI boot-time tables (see
+ * arch/x86/include/asm/fixmap.h or arch/arm/include/asm/fixmap.h),
+ * 64 pages(256KB) is large enough for most cases.)
+ */
+#define NUM_FIXMAP_ACPI_PAGES  64
+
+#ifndef __ASSEMBLY__
+
 #include <xen/list.h>
 
 #include <acpi/acpi.h>
@@ -39,13 +48,6 @@
 #define ACPI_MADT_GET_POLARITY(inti)	ACPI_MADT_GET_(POLARITY, inti)
 #define ACPI_MADT_GET_TRIGGER(inti)	ACPI_MADT_GET_(TRIGGER, inti)
 
-/*
- * Fixmap pages to reserve for ACPI boot-time tables (see
- * arch/x86/include/asm/fixmap.h or arch/arm/include/asm/config.h,
- * 64 pages(256KB) is large enough for most cases.)
- */
-#define NUM_FIXMAP_ACPI_PAGES  64
-
 #define BAD_MADT_ENTRY(entry, end) (                                        \
                 (!(entry)) || (unsigned long)(entry) + sizeof(*(entry)) > (end) ||  \
                 (entry)->header.length < sizeof(*(entry)))
@@ -207,4 +209,6 @@ void acpi_reboot(void);
 void acpi_dmar_zap(void);
 void acpi_dmar_reinstate(void);
 
+#endif /* __ASSEMBLY__ */
+
 #endif /*_LINUX_ACPI_H*/
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Allow setting the number of CPUs to activate at runtime
Message-Id: <E1nzDI1-0000up-Er@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 08:13:13 +0000

commit 7ac12e3634cc3ed9234de03e48149e7f5fbf73c3
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Mon May 23 11:13:24 2022 +0200
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 8 11:16:38 2022 +0100

    xen/arm: Allow setting the number of CPUs to activate at runtime
    
    Introduce a command line parameter "maxcpus" on Arm to allow adjusting
    the number of CPUs to activate. Currently the limit is defined by the
    config option CONFIG_NR_CPUS. Such parameter already exists on x86.
    
    Define a parameter "maxcpus" and a corresponding static variable
    max_cpus in Arm smpboot.c. Modify function smp_get_max_cpus to take
    max_cpus as a limit and to return proper unsigned int instead of int.
    
    Take the opportunity to remove redundant variable cpus from start_xen
    function and to directly assign the return value from smp_get_max_cpus
    to nr_cpu_ids (global variable in Xen used to store the number of CPUs
    actually activated).
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 docs/misc/xen-command-line.pandoc |  5 ++++-
 xen/arch/arm/include/asm/smp.h    |  2 +-
 xen/arch/arm/setup.c              | 10 ++++------
 xen/arch/arm/smpboot.c            | 18 ++++++++++++------
 4 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 881fe409ac..0d1d98d715 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -1652,13 +1652,16 @@ with **crashinfo_maxaddr**.
 Specify the threshold below which Xen will inform dom0 that the quantity of
 free memory is getting low.  Specifying `0` will disable this notification.
 
-### maxcpus (x86)
+### maxcpus
 > `= <integer>`
 
 Specify the maximum number of CPUs that should be brought up.
 
 This option is ignored in **pv-shim** mode.
 
+**WARNING: On Arm big.LITTLE systems, when `hmp-unsafe` option is enabled, this command line
+option does not guarantee on which CPU types will be used.**
+
 ### max_cstate (x86)
 > `= <integer>[,<integer>]`
 
diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h
index 83c0cd6976..8133d5c295 100644
--- a/xen/arch/arm/include/asm/smp.h
+++ b/xen/arch/arm/include/asm/smp.h
@@ -33,7 +33,7 @@ extern void init_secondary(void);
 
 extern void smp_init_cpus(void);
 extern void smp_clear_cpu_maps (void);
-extern int smp_get_max_cpus (void);
+extern unsigned int smp_get_max_cpus(void);
 
 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
 
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index ea1f5ee3d3..65fdaa0900 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -871,11 +871,10 @@ void __init start_xen(unsigned long boot_phys_offset,
                       unsigned long fdt_paddr)
 {
     size_t fdt_size;
-    int cpus, i;
     const char *cmdline;
     struct bootmodule *xen_bootmodule;
     struct domain *d;
-    int rc;
+    int rc, i;
 
     dcache_line_bytes = read_dcache_line_bytes();
 
@@ -951,9 +950,8 @@ void __init start_xen(unsigned long boot_phys_offset,
     processor_id();
 
     smp_init_cpus();
-    cpus = smp_get_max_cpus();
-    printk(XENLOG_INFO "SMP: Allowing %u CPUs\n", cpus);
-    nr_cpu_ids = cpus;
+    nr_cpu_ids = smp_get_max_cpus();
+    printk(XENLOG_INFO "SMP: Allowing %u CPUs\n", nr_cpu_ids);
 
     /*
      * Some errata relies on SMCCC version which is detected by psci_init()
@@ -997,7 +995,7 @@ void __init start_xen(unsigned long boot_phys_offset,
 
     for_each_present_cpu ( i )
     {
-        if ( (num_online_cpus() < cpus) && !cpu_online(i) )
+        if ( (num_online_cpus() < nr_cpu_ids) && !cpu_online(i) )
         {
             int ret = cpu_up(i);
             if ( ret != 0 )
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 9bb32a301a..22fede6600 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -43,6 +43,10 @@ cpumask_t cpu_possible_map;
 
 struct cpuinfo_arm cpu_data[NR_CPUS];
 
+/* maxcpus: maximum number of CPUs to activate. */
+static unsigned int __initdata max_cpus;
+integer_param("maxcpus", max_cpus);
+
 /* CPU logical map: map xen cpuid to an MPIDR */
 register_t __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
 
@@ -277,16 +281,18 @@ void __init smp_init_cpus(void)
                     "unless the cpu affinity of all domains is specified.\n");
 }
 
-int __init
-smp_get_max_cpus (void)
+unsigned int __init smp_get_max_cpus(void)
 {
-    int i, max_cpus = 0;
+    unsigned int i, cpus = 0;
+
+    if ( ( !max_cpus ) || ( max_cpus > nr_cpu_ids ) )
+        max_cpus = nr_cpu_ids;
 
-    for ( i = 0; i < nr_cpu_ids; i++ )
+    for ( i = 0; i < max_cpus; i++ )
         if ( cpu_possible(i) )
-            max_cpus++;
+            cpus++;
 
-    return max_cpus;
+    return cpus;
 }
 
 void __init
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] SUPPORT.md: extend security support for x86 hosts to 12 TiB of memory
Message-Id: <E1nzE1N-0003eD-BA@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 09:00:05 +0000

commit 8dac2928c2c1160c00dea65f9beb07656d249f3c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:54:01 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:54:01 2022 +0200

    SUPPORT.md: extend security support for x86 hosts to 12 TiB of memory
    
    c49ee0329ff3 ("SUPPORT.md: limit security support for hosts with very
    much memory"), as a result of XSA-385, restricted security support to
    8 TiB of host memory. While subsequently further restricted for Arm,
    extend this to 12 TiB on x86, putting in place a guest restriction to
    8 TiB (or yet less for Arm) in exchange.
    
    A 12 TiB x86 host was certified successfully for use with Xen 4.14 as
    per https://www.suse.com/nbswebapp/yesBulletin.jsp?bulletinNumber=150753.
    This in particular included running as many guests (2 TiB each) as
    possible in parallel, to actually prove that all the memory can be used
    like this. It may be relevant to note that the Optane memory there was
    used in memory-only mode, with DRAM acting as cache.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: George Dunlap <george.dunlap@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 SUPPORT.md | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/SUPPORT.md b/SUPPORT.md
index ee2cd319e2..70e98964cb 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -50,7 +50,7 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075.
 
 ### Physical Memory
 
-    Status, x86: Supported up to 8 TiB. Hosts with more memory are supported, but not security supported.
+    Status, x86: Supported up to 12 TiB. Hosts with more memory are supported, but not security supported.
     Status, Arm32: Supported up to 12 GiB
     Status, Arm64: Supported up to 2 TiB
 
@@ -121,6 +121,14 @@ ARM only has one guest type at the moment
 
     Status: Supported
 
+## Guest Limits
+
+### Memory
+
+    Status, x86: Supported up to 8 TiB. Guests with more memory, but less than 16 TiB, are supported, but not security supported.
+    Status, Arm32: Supported up to 12 GiB
+    Status, Arm64: Supported up to 1 TiB
+
 ## Hypervisor file system
 
 ### Build info
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] IOMMU: fold flush-all hook into "flush one"
Message-Id: <E1nzE1X-0003fI-F6@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 09:00:15 +0000

commit 79faa321f2f31d7794604007a290fb6c8fc05035
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:54:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:54:30 2022 +0200

    IOMMU: fold flush-all hook into "flush one"
    
    Having a separate flush-all hook has always been puzzling me some. We
    will want to be able to force a full flush via accumulated flush flags
    from the map/unmap functions. Introduce a respective new flag and fold
    all flush handling to use the single remaining hook.
    
    Note that because of the respective comments in SMMU and IPMMU-VMSA
    code, I've folded the two prior hook functions into one. For SMMU-v3,
    which lacks a comment towards incapable hardware, I've left both
    functions in place on the assumption that selective and full flushes
    will eventually want separating.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> # IPMMU-VMSA, SMMU-V2
    Reviewed-by: Rahul Singh <rahul.singh@arm.com> # SMMUv3
    Acked-by: Julien Grall <jgrall@amazon.com> # Arm
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
---
 xen/drivers/passthrough/amd/iommu.h         |  1 -
 xen/drivers/passthrough/amd/iommu_map.c     | 18 +++++++-----------
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  1 -
 xen/drivers/passthrough/arm/ipmmu-vmsa.c    | 19 +++++++------------
 xen/drivers/passthrough/arm/smmu-v3.c       |  1 -
 xen/drivers/passthrough/arm/smmu.c          | 19 +++++++------------
 xen/drivers/passthrough/iommu.c             |  9 +++------
 xen/drivers/passthrough/vtd/iommu.c         | 18 ++++++++++--------
 xen/include/xen/iommu.h                     |  3 ++-
 9 files changed, 36 insertions(+), 53 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index a05dd112bc..8bc3c35b1b 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -258,7 +258,6 @@ int cf_check amd_iommu_get_reserved_device_memory(
 int __must_check cf_check amd_iommu_flush_iotlb_pages(
     struct domain *d, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags);
-int __must_check cf_check amd_iommu_flush_iotlb_all(struct domain *d);
 void amd_iommu_print_entries(const struct amd_iommu *iommu, unsigned int dev_id,
                              dfn_t dfn);
 
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 9dbd44812d..28da5cc85e 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -506,15 +506,18 @@ int cf_check amd_iommu_flush_iotlb_pages(
 {
     unsigned long dfn_l = dfn_x(dfn);
 
-    ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-    ASSERT(flush_flags);
+    if ( !(flush_flags & IOMMU_FLUSHF_all) )
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
 
     /* Unless a PTE was modified, no flush is required */
     if ( !(flush_flags & IOMMU_FLUSHF_modified) )
         return 0;
 
-    /* If the range wraps then just flush everything */
-    if ( dfn_l + page_count < dfn_l )
+    /* If so requested or if the range wraps then just flush everything. */
+    if ( (flush_flags & IOMMU_FLUSHF_all) || dfn_l + page_count < dfn_l )
     {
         amd_iommu_flush_all_pages(d);
         return 0;
@@ -540,13 +543,6 @@ int cf_check amd_iommu_flush_iotlb_pages(
     return 0;
 }
 
-int cf_check amd_iommu_flush_iotlb_all(struct domain *d)
-{
-    amd_iommu_flush_all_pages(d);
-
-    return 0;
-}
-
 int amd_iommu_reserve_domain_unity_map(struct domain *d,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag)
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 4bf87e8c03..fd91f1367f 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -759,7 +759,6 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .map_page = amd_iommu_map_page,
     .unmap_page = amd_iommu_unmap_page,
     .iotlb_flush = amd_iommu_flush_iotlb_pages,
-    .iotlb_flush_all = amd_iommu_flush_iotlb_all,
     .reassign_device = reassign_device,
     .get_device_group_id = amd_iommu_group_id,
     .enable_x2apic = iov_enable_xt,
diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
index 5a7b332bcc..091f09b217 100644
--- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c
+++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
@@ -1000,13 +1000,19 @@ out:
 }
 
 /* Xen IOMMU ops */
-static int __must_check ipmmu_iotlb_flush_all(struct domain *d)
+static int __must_check ipmmu_iotlb_flush(struct domain *d, dfn_t dfn,
+                                          unsigned long page_count,
+                                          unsigned int flush_flags)
 {
     struct ipmmu_vmsa_xen_domain *xen_domain = dom_iommu(d)->arch.priv;
 
+    ASSERT(flush_flags);
+
     if ( !xen_domain || !xen_domain->root_domain )
         return 0;
 
+    /* The hardware doesn't support selective TLB flush. */
+
     spin_lock(&xen_domain->lock);
     ipmmu_tlb_invalidate(xen_domain->root_domain);
     spin_unlock(&xen_domain->lock);
@@ -1014,16 +1020,6 @@ static int __must_check ipmmu_iotlb_flush_all(struct domain *d)
     return 0;
 }
 
-static int __must_check ipmmu_iotlb_flush(struct domain *d, dfn_t dfn,
-                                          unsigned long page_count,
-                                          unsigned int flush_flags)
-{
-    ASSERT(flush_flags);
-
-    /* The hardware doesn't support selective TLB flush. */
-    return ipmmu_iotlb_flush_all(d);
-}
-
 static struct ipmmu_vmsa_domain *ipmmu_get_cache_domain(struct domain *d,
                                                         struct device *dev)
 {
@@ -1360,7 +1356,6 @@ static const struct iommu_ops ipmmu_iommu_ops =
     .hwdom_init      = arch_iommu_hwdom_init,
     .teardown        = ipmmu_iommu_domain_teardown,
     .iotlb_flush     = ipmmu_iotlb_flush,
-    .iotlb_flush_all = ipmmu_iotlb_flush_all,
     .assign_device   = ipmmu_assign_device,
     .reassign_device = ipmmu_reassign_device,
     .map_page        = arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index 2822ffe05f..1e857f915a 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -3416,7 +3416,6 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
 	.hwdom_init		= arch_iommu_hwdom_init,
 	.teardown		= arm_smmu_iommu_xen_domain_teardown,
 	.iotlb_flush		= arm_smmu_iotlb_flush,
-	.iotlb_flush_all	= arm_smmu_iotlb_flush_all,
 	.assign_device		= arm_smmu_assign_dev,
 	.reassign_device	= arm_smmu_reassign_dev,
 	.map_page		= arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
index c21c4f3ac0..69511683b4 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -2648,11 +2648,17 @@ static int force_stage = 2;
  */
 static u32 platform_features = ARM_SMMU_FEAT_COHERENT_WALK;
 
-static int __must_check arm_smmu_iotlb_flush_all(struct domain *d)
+static int __must_check arm_smmu_iotlb_flush(struct domain *d, dfn_t dfn,
+					     unsigned long page_count,
+					     unsigned int flush_flags)
 {
 	struct arm_smmu_xen_domain *smmu_domain = dom_iommu(d)->arch.priv;
 	struct iommu_domain *cfg;
 
+	ASSERT(flush_flags);
+
+	/* ARM SMMU v1 doesn't have flush by VMA and VMID */
+
 	spin_lock(&smmu_domain->lock);
 	list_for_each_entry(cfg, &smmu_domain->contexts, list) {
 		/*
@@ -2669,16 +2675,6 @@ static int __must_check arm_smmu_iotlb_flush_all(struct domain *d)
 	return 0;
 }
 
-static int __must_check arm_smmu_iotlb_flush(struct domain *d, dfn_t dfn,
-					     unsigned long page_count,
-					     unsigned int flush_flags)
-{
-	ASSERT(flush_flags);
-
-	/* ARM SMMU v1 doesn't have flush by VMA and VMID */
-	return arm_smmu_iotlb_flush_all(d);
-}
-
 static struct iommu_domain *arm_smmu_get_domain(struct domain *d,
 						struct device *dev)
 {
@@ -2863,7 +2859,6 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
     .add_device = arm_smmu_dt_add_device_generic,
     .teardown = arm_smmu_iommu_domain_teardown,
     .iotlb_flush = arm_smmu_iotlb_flush,
-    .iotlb_flush_all = arm_smmu_iotlb_flush_all,
     .assign_device = arm_smmu_assign_dev,
     .reassign_device = arm_smmu_reassign_dev,
     .map_page = arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 9393d987c7..75df3aa8dd 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -478,15 +478,12 @@ int iommu_iotlb_flush_all(struct domain *d, unsigned int flush_flags)
     const struct domain_iommu *hd = dom_iommu(d);
     int rc;
 
-    if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush_all ||
+    if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush ||
          !flush_flags )
         return 0;
 
-    /*
-     * The operation does a full flush so we don't need to pass the
-     * flush_flags in.
-     */
-    rc = iommu_call(hd->platform_ops, iotlb_flush_all, d);
+    rc = iommu_call(hd->platform_ops, iotlb_flush, d, INVALID_DFN, 0,
+                    flush_flags | IOMMU_FLUSHF_all);
     if ( unlikely(rc) )
     {
         if ( !d->is_shutting_down && printk_ratelimit() )
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 6d9513ef41..2acacc3679 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -772,18 +772,21 @@ static int __must_check cf_check iommu_flush_iotlb_pages(
     struct domain *d, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags)
 {
-    ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-    ASSERT(flush_flags);
+    if ( flush_flags & IOMMU_FLUSHF_all )
+    {
+        dfn = INVALID_DFN;
+        page_count = 0;
+    }
+    else
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
 
     return iommu_flush_iotlb(d, dfn, flush_flags & IOMMU_FLUSHF_modified,
                              page_count);
 }
 
-static int __must_check cf_check iommu_flush_iotlb_all(struct domain *d)
-{
-    return iommu_flush_iotlb(d, INVALID_DFN, 0, 0);
-}
-
 /* clear one page's page table */
 static int dma_pte_clear_one(struct domain *domain, daddr_t addr,
                              unsigned int order,
@@ -3145,7 +3148,6 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .resume = vtd_resume,
     .crash_shutdown = vtd_crash_shutdown,
     .iotlb_flush = iommu_flush_iotlb_pages,
-    .iotlb_flush_all = iommu_flush_iotlb_all,
     .get_reserved_device_memory = intel_iommu_get_reserved_device_memory,
     .dump_page_tables = vtd_dump_page_tables,
 };
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index e0f82712ed..79529adf1f 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -147,9 +147,11 @@ enum
 {
     _IOMMU_FLUSHF_added,
     _IOMMU_FLUSHF_modified,
+    _IOMMU_FLUSHF_all,
 };
 #define IOMMU_FLUSHF_added (1u << _IOMMU_FLUSHF_added)
 #define IOMMU_FLUSHF_modified (1u << _IOMMU_FLUSHF_modified)
+#define IOMMU_FLUSHF_all (1u << _IOMMU_FLUSHF_all)
 
 int __must_check iommu_map(struct domain *d, dfn_t dfn, mfn_t mfn,
                            unsigned long page_count, unsigned int flags,
@@ -281,7 +283,6 @@ struct iommu_ops {
     int __must_check (*iotlb_flush)(struct domain *d, dfn_t dfn,
                                     unsigned long page_count,
                                     unsigned int flush_flags);
-    int __must_check (*iotlb_flush_all)(struct domain *d);
     int (*get_reserved_device_memory)(iommu_grdm_t *, void *);
     void (*dump_page_tables)(struct domain *d);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] VT-d: fold iommu_flush_iotlb{,_pages}()
Message-Id: <E1nzE1h-0003fx-IX@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 09:00:25 +0000

commit 59fbdf8a3667ce42c1cf70c94c3bcd0451afd4d8
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:56:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:56:08 2022 +0200

    VT-d: fold iommu_flush_iotlb{,_pages}()
    
    With iommu_flush_iotlb_all() gone, iommu_flush_iotlb_pages() is merely a
    wrapper around the not otherwise called iommu_flush_iotlb(). Fold both
    functions.
    
    No functional change intended.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/drivers/passthrough/vtd/iommu.c | 40 +++++++++++++++----------------------
 1 file changed, 16 insertions(+), 24 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 2acacc3679..f1e91b3d18 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -719,9 +719,9 @@ static int __must_check iommu_flush_all(void)
     return rc;
 }
 
-static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
-                                          bool_t dma_old_pte_present,
-                                          unsigned long page_count)
+static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
+                                                   unsigned long page_count,
+                                                   unsigned int flush_flags)
 {
     struct domain_iommu *hd = dom_iommu(d);
     struct acpi_drhd_unit *drhd;
@@ -730,6 +730,17 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
     int iommu_domid;
     int ret = 0;
 
+    if ( flush_flags & IOMMU_FLUSHF_all )
+    {
+        dfn = INVALID_DFN;
+        page_count = 0;
+    }
+    else
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
+
     /*
      * No need pcideves_lock here because we have flush
      * when assign/deassign device
@@ -756,7 +767,7 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
             rc = iommu_flush_iotlb_psi(iommu, iommu_domid,
                                        dfn_to_daddr(dfn),
                                        get_order_from_pages(page_count),
-                                       !dma_old_pte_present,
+                                       !(flush_flags & IOMMU_FLUSHF_modified),
                                        flush_dev_iotlb);
 
         if ( rc > 0 )
@@ -768,25 +779,6 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
     return ret;
 }
 
-static int __must_check cf_check iommu_flush_iotlb_pages(
-    struct domain *d, dfn_t dfn, unsigned long page_count,
-    unsigned int flush_flags)
-{
-    if ( flush_flags & IOMMU_FLUSHF_all )
-    {
-        dfn = INVALID_DFN;
-        page_count = 0;
-    }
-    else
-    {
-        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-        ASSERT(flush_flags);
-    }
-
-    return iommu_flush_iotlb(d, dfn, flush_flags & IOMMU_FLUSHF_modified,
-                             page_count);
-}
-
 /* clear one page's page table */
 static int dma_pte_clear_one(struct domain *domain, daddr_t addr,
                              unsigned int order,
@@ -3147,7 +3139,7 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .suspend = vtd_suspend,
     .resume = vtd_resume,
     .crash_shutdown = vtd_crash_shutdown,
-    .iotlb_flush = iommu_flush_iotlb_pages,
+    .iotlb_flush = iommu_flush_iotlb,
     .get_reserved_device_memory = intel_iommu_get_reserved_device_memory,
     .dump_page_tables = vtd_dump_page_tables,
 };
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzHLU-0003VH-3M@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:04 +0000

commit 9186e96b199e4f7e52e033b238f9fe869afb69c7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:20:36 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:20:36 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 04d5ec705d..6434900aa7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2935,16 +2935,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2952,8 +2953,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2964,8 +2972,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2977,7 +2985,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -3008,7 +3016,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -3027,18 +3042,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3087,6 +3130,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzHLe-0003Vz-6Y@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:14 +0000

commit 8cc5036bc385112a82f1faff27a0970e6440dfed
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:21:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:21:04 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 6434900aa7..34bb9dddab 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2962,56 +2962,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_NO_ASSIST
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3092,6 +3048,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_NO_ASSIST
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3120,13 +3126,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzHLo-0003Wg-9Y@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:24 +0000

commit 1be8707c75bf4ba68447c74e1618b521dd432499
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:21:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:21:38 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/page.h | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h
index 447491cd09..b585235d06 100644
--- a/xen/arch/x86/include/asm/page.h
+++ b/xen/arch/x86/include/asm/page.h
@@ -331,6 +331,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -349,10 +357,10 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_WT      (__PAGE_HYPERVISOR | _PAGE_PWT)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_HYPERVISOR_WC      (__PAGE_HYPERVISOR | _PAGE_PAT)
+#define __PAGE_HYPERVISOR_WT      (__PAGE_HYPERVISOR | _PAGE_WT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
+#define __PAGE_HYPERVISOR_WC      (__PAGE_HYPERVISOR | _PAGE_WC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzHLy-0003XW-Ci@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:34 +0000

commit ae09597da34aee6bc5b76475c5eea6994457e854
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:22:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:22:08 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/include/asm/mm.h | 23 +++++-------
 xen/arch/x86/mm.c             | 85 ++++---------------------------------------
 2 files changed, 17 insertions(+), 91 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index f2f7b6902c..605c101528 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted (see below for caveats) */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 34bb9dddab..2b5f5b553d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -808,29 +808,6 @@ bool is_memory_hole(mfn_t start, mfn_t end)
     return true;
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-                 mfn <  PFN_UP(xen_phys_start + (unsigned long)__2M_rwdata_end -
-                               XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1038,47 +1015,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2496,24 +2440,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzHM8-0003Y3-Fo@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:44 +0000

commit 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:22:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:22:38 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/flushtlb.c          | 60 ++++++++++++++++++++++++++--------------
 xen/arch/x86/include/asm/cache.h |  1 +
 xen/common/grant_table.c         |  4 +--
 3 files changed, 42 insertions(+), 23 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c5a1de443..471b3e31c4 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -235,7 +235,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -245,12 +245,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input("ds; clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,7 +260,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
-void cache_writeback(const void *addr, unsigned int size)
+void cache_flush(const void *addr, unsigned int size)
 {
     /*
      * This function may be called before current_cpu_data is established.
@@ -274,6 +269,38 @@ void cache_writeback(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -296,24 +323,15 @@ void cache_writeback(const void *addr, unsigned int size)
 #else
 # define INPUT(addr) "a" (addr), BASE_INPUT(addr)
 #endif
-        /*
-         * Note regarding the "ds" prefix use: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2("ds; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
 #undef INPUT
 #undef BASE_INPUT
 #undef CLWB_ENCODING
     }
 
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    asm volatile ("sfence" ::: "memory");
 }
 
 unsigned int guest_flush_tlb_flags(const struct domain *d)
diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h
index 424dc5b7b9..e4770efb22 100644
--- a/xen/arch/x86/include/asm/cache.h
+++ b/xen/arch/x86/include/asm/cache.h
@@ -13,6 +13,7 @@
 
 #ifndef __ASSEMBLY__
 
+void cache_flush(const void *addr, unsigned int size);
 void cache_writeback(const void *addr, unsigned int size);
 
 #endif
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index febbe12eab..3918e6de6b 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3447,7 +3447,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3541,7 +3541,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzHMI-0003Ye-If@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:33:54 +0000

commit 062868a5a8b428b85db589fa9a6d6e43969ffeb9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:23:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:23:07 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/cpu/amd.c                 |  8 ++++++++
 xen/arch/x86/flushtlb.c                | 13 ++++++++++++-
 xen/arch/x86/include/asm/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 4999f8be2b..94b9e31016 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -812,6 +812,14 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 471b3e31c4..18748b2bc8 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -260,6 +260,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -269,6 +276,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -284,7 +293,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index 7413febd7a..ff3157d52d 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -47,6 +47,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
 #define X86_BUG_NULL_SEG          X86_BUG( 1) /* NULL-ing a selector preserves the base and limit. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzHMS-0003ZP-N4@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 12:34:04 +0000

commit c1c9cae3a9633054b177c5de21ad7268162b2f2c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:23:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:23:37 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/mm.h |  6 +++++-
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 605c101528..07b59c982b 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 2b5f5b553d..94f6ae9ae7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -1025,6 +1025,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2482,6 +2491,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3055,6 +3077,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzIHY-0007EC-Fv@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:04 +0000

commit b152dfbc3ad71a788996440b18174d995c3bffc9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:19 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:19 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4ee2de1105..79ad7fdd2b 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2906,16 +2906,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2923,8 +2924,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2935,8 +2943,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2948,7 +2956,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2979,7 +2987,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2998,18 +3013,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3058,6 +3101,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzIHi-0007Eg-JP@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:14 +0000

commit 8dab3f79b122e69cbcdebca72cdc14f004ee2193
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:37 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 79ad7fdd2b..c6429b0f74 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2933,56 +2933,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3063,6 +3019,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3091,13 +3097,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzIHs-0007FJ-Me@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:24 +0000

commit 9cfd796ae05421ded8e4f70b2c55352491cfa841
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:53 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:53 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index 1d080cffbe..2e542050f6 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -331,6 +331,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -349,8 +357,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzII2-0007GA-R8@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:34 +0000

commit 74193f4292d9cfc2874866e941d9939d8f33fcef
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:28:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:28:23 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 84 ++++--------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++-------
 2 files changed, 17 insertions(+), 90 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index c6429b0f74..ab32d13a1a 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -783,28 +783,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1009,47 +987,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2467,24 +2412,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index cb90527499..8a9a43bb0a 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted (see below for caveats) */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzIIC-0007Gl-Uj@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:44 +0000

commit 8eafa2d871ae51d461256e4a14175e24df330c70
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:28:48 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:28:48 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 53 ++--------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 88 insertions(+), 66 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 66f8ce7174..4c742cd8fe 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3431,7 +3431,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3525,7 +3525,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index 01e010a10d..4010792997 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -76,7 +76,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 8975c1de61..bc377c9bcf 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -206,54 +207,6 @@ static void check_cleanup_domid_map(const struct domain *d,
     }
 }
 
-static void sync_cache(const void *addr, unsigned int size)
-{
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
-}
-
 /* Allocate page table, return its machine address */
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
 {
@@ -273,7 +226,7 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
         clear_page(vaddr);
 
         if ( (iommu_ops.init ? &iommu_ops : &vtd_ops)->sync_cache )
-            sync_cache(vaddr, PAGE_SIZE);
+            cache_writeback(vaddr, PAGE_SIZE);
         unmap_domain_page(vaddr);
         cur_pg++;
     }
@@ -1305,7 +1258,7 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
     iommu->nr_pt_levels = agaw_to_level(agaw);
 
     if ( !ecap_coherent(iommu->ecap) )
-        vtd_ops.sync_cache = sync_cache;
+        vtd_ops.sync_cache = cache_writeback;
 
     /* allocate domain id bitmap */
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 6681dccd69..55f0faa521 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(const void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzIIN-0007HE-1f@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:33:55 +0000

commit c4815be949aae6583a9a22897beb96b095b4f1a2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:29:13 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:29:13 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index a8e37dbb1f..b3b9a0df5f 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -812,6 +812,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 7413febd7a..ff3157d52d 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -47,6 +47,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
 #define X86_BUG_NULL_SEG          X86_BUG( 1) /* NULL-ing a selector preserves the base and limit. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzIIX-0007I2-4w@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:34:05 +0000

commit dc020d8d1ba420e2dd0e7a40f5045db897f3c4f4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:29:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:29:38 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ab32d13a1a..bab9624fab 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -997,6 +997,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2454,6 +2463,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3027,6 +3049,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 8a9a43bb0a..7464167ae1 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzISC-00085U-Sc@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:04 +0000

commit cc74ff882364317e3667c6251cc79bc76fa20ae4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:00 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:00 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 13f9dd9db9..f630d9c1ee 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2894,16 +2894,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2911,8 +2912,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2923,8 +2931,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2936,7 +2944,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2967,7 +2975,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2986,18 +3001,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3046,6 +3089,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzISN-000861-0Z@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:15 +0000

commit 82a94a179cae9fca3ecebe6c26868072088b8e3c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:23 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f630d9c1ee..2644b9f033 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2921,56 +2921,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3051,6 +3007,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3079,13 +3085,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzISX-00086d-3h@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:25 +0000

commit 887b5ff2938ae256aa14df751816d830b5152d49
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:40 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:40 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index 4c7f2cb70c..534bc1f403 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -336,6 +336,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -354,8 +362,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzISh-00087J-6t@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:35 +0000

commit 9b1e1e74a6c23ffad4c6a78973995957db2d4cc7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:36:15 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:36:15 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 84 ++++--------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++-------
 2 files changed, 17 insertions(+), 90 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 2644b9f033..6ce8c19dce 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -783,28 +783,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1009,47 +987,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2455,24 +2400,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 041c158f03..f5b8862b83 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzISr-00087q-Ac@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:45 +0000

commit 78fd76e1881d8fac3bec5f8a2ddd53d8a3de7762
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:36:40 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:36:40 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 53 ++--------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 88 insertions(+), 66 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 47b019c750..77bba98069 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3423,7 +3423,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3517,7 +3517,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index cf4d2218fa..8f70ae727b 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -76,7 +76,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index a063462cff..68a658930a 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -204,54 +205,6 @@ static void check_cleanup_domid_map(struct domain *d,
     }
 }
 
-static void sync_cache(const void *addr, unsigned int size)
-{
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
-}
-
 /* Allocate page table, return its machine address */
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
 {
@@ -271,7 +224,7 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
         clear_page(vaddr);
 
         if ( (iommu_ops.init ? &iommu_ops : &vtd_ops)->sync_cache )
-            sync_cache(vaddr, PAGE_SIZE);
+            cache_writeback(vaddr, PAGE_SIZE);
         unmap_domain_page(vaddr);
         cur_pg++;
     }
@@ -1302,7 +1255,7 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
     iommu->nr_pt_levels = agaw_to_level(agaw);
 
     if ( !ecap_coherent(iommu->ecap) )
-        vtd_ops.sync_cache = sync_cache;
+        vtd_ops.sync_cache = cache_writeback;
 
     /* allocate domain id bitmap */
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 6681dccd69..55f0faa521 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(const void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzIT1-00088L-De@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:44:55 +0000

commit 890efc0d2e64c92f708bf0e5acd0257181dcbacf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:37:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:37:07 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 1ee687d0d2..986672a072 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -787,6 +787,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index fe2f97354f..09f619459b 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -46,6 +46,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzITB-00089H-H9@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:45:05 +0000

commit a851dbce6876cd2c5689f912787c15cc507cbb39
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:37:52 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:37:52 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 6ce8c19dce..1759b84ba9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -997,6 +997,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2442,6 +2451,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3015,6 +3037,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index f5b8862b83..5c19b71eca 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzIcq-0000NK-4k@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:04 +0000

commit c70071eb6c6d43f96d0d9e2f2446de491c8ed527
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:49:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:49:50 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 689a430d3b..709eea2ee9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2892,16 +2892,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2909,8 +2910,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2921,8 +2929,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2934,7 +2942,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2965,7 +2973,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2984,18 +2999,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3042,6 +3085,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzId0-0000Nl-8H@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:14 +0000

commit 758f40d7fa7e98ef2d2772ef8f0f57eabde028bd
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:16 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 709eea2ee9..0b75b6371d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2919,56 +2919,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3049,6 +3005,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3075,13 +3081,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzIdA-0000OV-BY@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:24 +0000

commit a72146db9e9719f16bf2cab2fc9ac7a0d8d7ee3f
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:32 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index f632affaef..52551535a9 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -344,6 +344,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -362,8 +370,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzIdK-0000PD-Ek@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:34 +0000

commit 07fbed87582c117262541a9a0903848a36adcc79
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:59 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:59 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 80 +++++-------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++--------
 2 files changed, 17 insertions(+), 86 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 0b75b6371d..7d3d186edb 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -785,24 +785,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1007,47 +989,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2453,24 +2402,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 7e74996053..7a2093da59 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -64,25 +64,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzIdU-0000Q0-I1@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:44 +0000

commit 204d4f16506334a0398649c714c19349145589be
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:51:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:51:23 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 46 +------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 87 insertions(+), 60 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 71ee5c6ec5..34498d4652 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3440,7 +3440,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3534,7 +3534,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index fbe951b2fa..3defe9677f 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -77,7 +77,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index cc088cd9ff..3bd17a4a24 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -207,53 +208,10 @@ static int iommus_incoherent;
 
 static void sync_cache(const void *addr, unsigned int size)
 {
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
     if ( !iommus_incoherent )
         return;
 
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    cache_writeback(addr, size);
 }
 
 /* Allocate page table, return its machine address */
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index bbe358dc36..bb08a55e29 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzIde-0000QV-MY@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:55:54 +0000

commit 25c7adeefa7538d1f88bab1859ce77f8b46f229e
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:51:47 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:51:47 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 2ef59e22dc..142f34af5f 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -787,6 +787,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index fe2f97354f..09f619459b 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -46,6 +46,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzIdo-0000RM-Po@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 13:56:04 +0000

commit 82ba97ec6b24f3e92fd1749962154cedf2addc5d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:52:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:52:11 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 7d3d186edb..4d6b04c1cf 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -999,6 +999,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2444,6 +2453,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3015,6 +3037,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 7a2093da59..4c814abaa0 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -48,8 +48,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzJz2-000668-9M@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:04 +0000

commit 3826ba5f8271676c1569588abb32d960e5882e54
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:13:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:13:30 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ad89bfb45f..96738b0278 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2978,16 +2978,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2995,8 +2996,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -3007,8 +3015,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -3020,7 +3028,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -3041,7 +3049,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -3060,18 +3075,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3116,6 +3159,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzJzC-00068F-Cx@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:14 +0000

commit 7669737d7da5790e66ffb670576175c2465ab09c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:13:54 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:13:54 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 96 +++++++++++++++++++++++++++++++++----------------------
 1 file changed, 57 insertions(+), 39 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 96738b0278..ee91c7fe5f 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3005,46 +3005,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    flush_tlb_mask(mask);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3125,6 +3091,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                flush_tlb_mask(mask);
+            }
+        }
+    }
+
     if ( unlikely((x & PGT_type_mask) != type) )
     {
         /* Special pages should not be accessible from devices. */
@@ -3149,13 +3155,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = alloc_page_type(page, type, preemptible);
         }
-        rc = alloc_page_type(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzJzM-00068o-G5@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:24 +0000

commit c7da430b21e0f6c48d81874a465f94221163beba
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:14:12 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:14:12 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index c1e92937c0..7269ae89b8 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -320,6 +320,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -338,8 +346,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzJzW-00069p-L3@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:34 +0000

commit fce392fa36c31f88be4f6b5f5821d244549cc825
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:14:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:14:39 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 80 +++++-------------------------------------------
 xen/include/asm-x86/mm.h | 19 +++++-------
 2 files changed, 15 insertions(+), 84 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ee91c7fe5f..859646b670 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -786,24 +786,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1008,47 +990,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_xen_heap_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_xen_heap_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2541,24 +2490,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_xen_heap_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 320c6cd196..db09849f73 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -64,22 +64,19 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 
  /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(9)
+#define PGC_count_width   PG_shift(6)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzJzg-0006Am-OQ@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:44 +0000

commit 8d9f36132afd7c95c47809ee0e8e5c678b31f828
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:15:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:15:11 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 46 +------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 87 insertions(+), 60 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 03f92c23dc..8568491c7e 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -224,7 +224,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -234,13 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -254,3 +248,77 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
 
     return flags;
 }
+
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index cbb2ce17c0..709509e0fc 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3407,7 +3407,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3501,7 +3501,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index fbe951b2fa..3defe9677f 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -77,7 +77,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index f051a55764..2bf5f02c08 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -201,53 +202,10 @@ static int iommus_incoherent;
 
 static void sync_cache(const void *addr, unsigned int size)
 {
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
     if ( !iommus_incoherent )
         return;
 
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    cache_writeback(addr, size);
 }
 
 /* Allocate page table, return its machine address */
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 229938f3a8..2a18b76e80 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -46,11 +46,6 @@ void unmap_vtd_domain_page(void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzJzq-0006BT-RQ@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:22:54 +0000

commit e8c04e468312713b5ad737e905494616f87f339f
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:15:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:15:39 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index b77fa19297..aa1b9d0dda 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -639,6 +639,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 8568491c7e..6f3f5ab1a3 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -249,6 +249,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -258,6 +265,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -273,7 +282,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index b9d3cac975..a8222e978c 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -44,6 +44,7 @@ XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzK01-0006CT-0K@xenbits.xenproject.org>
Date: Thu, 09 Jun 2022 15:23:05 +0000

commit f9ae12fc103c7429d8ce6bc57b8cbcefdd71cd45
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:16:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:16:06 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 859646b670..f5eeddce58 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -1000,6 +1000,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2532,6 +2541,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3089,6 +3111,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index db09849f73..82d0fd6104 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -48,8 +48,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nza4m-0006RP-NQ@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:04 +0000

commit c2095ac76be0f4a1940346c9ffb49fb967345060
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:21:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:21:06 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 94f6ae9ae7..4f749fd888 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2956,7 +2956,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] Revert "IOMMU/x86: perform PV Dom0 mappings in batches"
Message-Id: <E1nza4w-0006SH-Qc@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:14 +0000

commit 81a739a99300ea325caedf696741c9814c5318f6
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:22:00 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:22:00 2022 +0200

    Revert "IOMMU/x86: perform PV Dom0 mappings in batches"
    
    This reverts commit f3185c165d28901c3222becfc8be547263c53745.
    That change require preemption checking to first be in place in
    iommu_{,un}map().
---
 xen/arch/x86/pv/dom0_build.c        | 84 ++++---------------------------------
 xen/drivers/passthrough/x86/iommu.c | 41 +++++-------------
 2 files changed, 17 insertions(+), 108 deletions(-)

diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 04a4ea3c18..e501979a86 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -46,8 +46,7 @@ void __init dom0_update_physmap(bool compat, unsigned long pfn,
 static __init void mark_pv_pt_pages_rdonly(struct domain *d,
                                            l4_pgentry_t *l4start,
                                            unsigned long vpt_start,
-                                           unsigned long nr_pt_pages,
-                                           unsigned int *flush_flags)
+                                           unsigned long nr_pt_pages)
 {
     unsigned long count;
     struct page_info *page;
@@ -72,14 +71,6 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
         ASSERT((page->u.inuse.type_info & PGT_type_mask) <= PGT_root_page_table);
         ASSERT(!(page->u.inuse.type_info & ~(PGT_type_mask | PGT_pae_xen_l2)));
 
-        /*
-         * Page table pages need to be removed from the IOMMU again in case
-         * iommu_memory_setup() ended up mapping them.
-         */
-        if ( need_iommu_pt_sync(d) &&
-             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, flush_flags) )
-            BUG();
-
         /* Read-only mapping + PGC_allocated + page-table page. */
         page->count_info         = PGC_allocated | 3;
         page->u.inuse.type_info |= PGT_validated | 1;
@@ -116,43 +107,11 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
     unmap_domain_page(pl3e);
 }
 
-static void __init iommu_memory_setup(struct domain *d, const char *what,
-                                      struct page_info *page, unsigned long nr,
-                                      unsigned int *flush_flags)
-{
-    int rc;
-    mfn_t mfn = page_to_mfn(page);
-
-    if ( !need_iommu_pt_sync(d) )
-        return;
-
-    rc = iommu_map(d, _dfn(mfn_x(mfn)), mfn, nr,
-                   IOMMUF_readable | IOMMUF_writable, flush_flags);
-    if ( rc )
-    {
-        printk(XENLOG_ERR "pre-mapping %s MFN [%lx,%lx) into IOMMU failed: %d\n",
-               what, mfn_x(mfn), mfn_x(mfn) + nr, rc);
-        return;
-    }
-
-    /*
-     * For successfully established IOMMU mappings the type of the page(s)
-     * needs to match (for _get_page_type() to unmap upon type change). Set
-     * the page(s) to writable with no type ref.
-     */
-    for ( ; nr--; ++page )
-    {
-        ASSERT(!page->u.inuse.type_info);
-        page->u.inuse.type_info = PGT_writable_page | PGT_validated;
-    }
-}
-
 static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                     unsigned long v_start, unsigned long v_end,
                                     unsigned long vphysmap_start,
                                     unsigned long vphysmap_end,
-                                    unsigned long nr_pages,
-                                    unsigned int *flush_flags)
+                                    unsigned long nr_pages)
 {
     struct page_info *page = NULL;
     l4_pgentry_t *pl4e, *l4start = map_domain_page(_mfn(pgtbl_pfn));
@@ -218,10 +177,6 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L3_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
-                iommu_memory_setup(d, "P2M 1G", page,
-                                   SUPERPAGE_PAGES * SUPERPAGE_PAGES,
-                                   flush_flags);
-
                 *pl3e = l3e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L3_PAGETABLE_SHIFT;
                 continue;
@@ -248,9 +203,6 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L2_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
-                iommu_memory_setup(d, "P2M 2M", page, SUPERPAGE_PAGES,
-                                   flush_flags);
-
                 *pl2e = l2e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L2_PAGETABLE_SHIFT;
                 continue;
@@ -359,7 +311,6 @@ int __init dom0_construct_pv(struct domain *d,
     unsigned long initrd_pfn = -1, initrd_mfn = 0;
     unsigned long count;
     struct page_info *page = NULL;
-    unsigned int flush_flags = 0;
     start_info_t *si;
     struct vcpu *v = d->vcpu[0];
     void *image_base = bootstrap_map(image);
@@ -622,9 +573,6 @@ int __init dom0_construct_pv(struct domain *d,
                     BUG();
         }
         initrd->mod_end = 0;
-
-        iommu_memory_setup(d, "initrd", mfn_to_page(_mfn(initrd_mfn)),
-                           PFN_UP(initrd_len), &flush_flags);
     }
 
     printk("PHYSICAL MEMORY ARRANGEMENT:\n"
@@ -658,13 +606,6 @@ int __init dom0_construct_pv(struct domain *d,
 
     process_pending_softirqs();
 
-    /*
-     * Map the full range here and then punch holes for page tables
-     * alongside marking them as such in mark_pv_pt_pages_rdonly().
-     */
-    iommu_memory_setup(d, "init-alloc", mfn_to_page(_mfn(alloc_spfn)),
-                       alloc_epfn - alloc_spfn, &flush_flags);
-
     mpt_alloc = (vpt_start - v_start) + pfn_to_paddr(alloc_spfn);
     if ( vinitrd_start )
         mpt_alloc -= PAGE_ALIGN(initrd_len);
@@ -749,8 +690,7 @@ int __init dom0_construct_pv(struct domain *d,
         l1tab++;
 
         page = mfn_to_page(_mfn(mfn));
-        if ( (!page->u.inuse.type_info ||
-              page->u.inuse.type_info == (PGT_writable_page | PGT_validated)) &&
+        if ( !page->u.inuse.type_info &&
              !get_page_and_type(page, d, PGT_writable_page) )
             BUG();
     }
@@ -779,7 +719,7 @@ int __init dom0_construct_pv(struct domain *d,
     }
 
     /* Pages that are part of page tables must be read only. */
-    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages, &flush_flags);
+    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages);
 
     /* Mask all upcalls... */
     for ( i = 0; i < XEN_LEGACY_MAX_VCPUS; i++ )
@@ -854,7 +794,7 @@ int __init dom0_construct_pv(struct domain *d,
     {
         pfn = pagetable_get_pfn(v->arch.guest_table);
         setup_pv_physmap(d, pfn, v_start, v_end, vphysmap_start, vphysmap_end,
-                         nr_pages, &flush_flags);
+                         nr_pages);
     }
 
     /* Write the phys->machine and machine->phys table entries. */
@@ -885,9 +825,7 @@ int __init dom0_construct_pv(struct domain *d,
         if ( get_gpfn_from_mfn(mfn) >= count )
         {
             BUG_ON(compat);
-            if ( (!page->u.inuse.type_info ||
-                  page->u.inuse.type_info == (PGT_writable_page |
-                                              PGT_validated)) &&
+            if ( !page->u.inuse.type_info &&
                  !get_page_and_type(page, d, PGT_writable_page) )
                 BUG();
 
@@ -903,12 +841,8 @@ int __init dom0_construct_pv(struct domain *d,
 #endif
     while ( pfn < nr_pages )
     {
-        count = domain_tot_pages(d);
-        if ( (page = alloc_chunk(d, nr_pages - count)) == NULL )
+        if ( (page = alloc_chunk(d, nr_pages - domain_tot_pages(d))) == NULL )
             panic("Not enough RAM for DOM0 reservation\n");
-
-        iommu_memory_setup(d, "chunk", page, domain_tot_pages(d) - count,
-                           &flush_flags);
         while ( pfn < domain_tot_pages(d) )
         {
             mfn = mfn_x(page_to_mfn(page));
@@ -923,10 +857,6 @@ int __init dom0_construct_pv(struct domain *d,
         }
     }
 
-    /* Use while() to avoid compiler warning. */
-    while ( iommu_iotlb_flush_all(d, flush_flags) )
-        break;
-
     if ( initrd_len != 0 )
     {
         si->mod_start = vinitrd_start ?: initrd_pfn;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 11a4f244e4..0ba95473c9 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -348,8 +348,8 @@ static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 {
-    unsigned long i, top, max_pfn, start, count;
-    unsigned int flush_flags = 0, start_perms = 0;
+    unsigned long i, top, max_pfn;
+    unsigned int flush_flags = 0;
 
     BUG_ON(!is_hardware_domain(d));
 
@@ -380,9 +380,9 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
      * First Mb will get mapped in one go by pvh_populate_p2m(). Avoid
      * setting up potentially conflicting mappings here.
      */
-    start = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
+    i = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
 
-    for ( i = start, count = 0; i < top; )
+    for ( ; i < top; i++ )
     {
         unsigned long pfn = pdx_to_pfn(i);
         unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
@@ -391,41 +391,20 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
         if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
-        {
             rc = p2m_add_identity_entry(d, pfn,
                                         perms & IOMMUF_writable ? p2m_access_rw
                                                                 : p2m_access_r,
                                         0);
-            if ( rc )
-                printk(XENLOG_WARNING
-                       "%pd: identity mapping of %lx failed: %d\n",
-                       d, pfn, rc);
-        }
-        else if ( pfn != start + count || perms != start_perms )
-        {
-        commit:
-            rc = iommu_map(d, _dfn(start), _mfn(start), count, start_perms,
-                           &flush_flags);
-            if ( rc )
-                printk(XENLOG_WARNING
-                       "%pd: IOMMU identity mapping of [%lx,%lx) failed: %d\n",
-                       d, pfn, pfn + count, rc);
-            SWAP(start, pfn);
-            start_perms = perms;
-            count = 1;
-        }
         else
-        {
-            ++count;
-            rc = 0;
-        }
+            rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
+                           perms, &flush_flags);
 
+        if ( rc )
+            printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
+                   d, !paging_mode_translate(d) ? "IOMMU " : "", pfn, rc);
 
-        if ( !(++i & 0xfffff) )
+        if (!(i & 0xfffff))
             process_pending_softirqs();
-
-        if ( i == top && count )
-            goto commit;
     }
 
     /* Use if to avoid compiler warning */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/mm: further simplify cleanup_page_mappings()
Message-Id: <E1nza56-0006Sv-Tr@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:24 +0000

commit 2730650c9cd65c1cb2412b480ee1f51748bc1445
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:23:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:23:31 2022 +0200

    x86/mm: further simplify cleanup_page_mappings()
    
    With the removal of update_xen_mappings() there's no need anymore for a
    2nd error code variable to transiently hold the IOMMU unmap return
    value.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/mm.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4f749fd888..ac74ae389c 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2470,12 +2470,7 @@ static int cleanup_page_mappings(struct page_info *page)
         struct domain *d = page_get_owner(page);
 
         if ( d && unlikely(need_iommu_pt_sync(d)) && is_pv_domain(d) )
-        {
-            int rc2 = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
-
-            if ( !rc )
-                rc = rc2;
-        }
+            rc = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
 
         if ( likely(!is_special_page(page)) )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86emul/test: encourage compiler to use more embedded broadcast
Message-Id: <E1nza5H-0006Tn-0a@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:35 +0000

commit b8bc4588b32e8a40354defac29ceb9c90e570af8
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:24:21 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:24:21 2022 +0200

    x86emul/test: encourage compiler to use more embedded broadcast
    
    For one it was an oversight to leave dup_{hi,lo}() undefined for 512-bit
    vector size. And then in FMA testing we can also arrange for the
    compiler to (hopefully) recognize broadcasting potential. Plus we can
    replace the broadcast(1) use in the addsub() surrogate with inline
    assembly explicitly using embedded broadcast (even gcc12 still doesn't
    support broadcast for any of the addsub/subadd builtins).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 tools/tests/x86_emulator/simd-fma.c | 26 +++++++++++++++++++++++++-
 tools/tests/x86_emulator/simd.c     |  7 +++++++
 tools/tests/x86_emulator/simd.h     |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/tools/tests/x86_emulator/simd-fma.c b/tools/tests/x86_emulator/simd-fma.c
index 11a9dd6a27..d2ccefac9b 100644
--- a/tools/tests/x86_emulator/simd-fma.c
+++ b/tools/tests/x86_emulator/simd-fma.c
@@ -56,13 +56,27 @@ ENTRY(fma_test);
 #endif
 
 #if defined(fmaddsub) && !defined(addsub)
-# define addsub(x, y) fmaddsub(x, broadcast(1), y)
+# ifdef __AVX512F__
+#  define addsub(x, y) ({ \
+    vec_t t_; \
+    typeof(t_[0]) one_ = 1; \
+    asm ( "vfmaddsub231p" ELEM_SFX " %2%{1to%c4%}, %1, %0" \
+          : "=v" (t_) \
+          : "v" (x), "m" (one_), "0" (y), "i" (ELEM_COUNT) ); \
+    t_; \
+})
+# else
+#  define addsub(x, y) fmaddsub(x, broadcast(1), y)
+# endif
 #endif
 
 int fma_test(void)
 {
     unsigned int i;
     vec_t x, y, z, src, inv, one;
+#ifdef __AVX512F__
+    typeof(one[0]) one_ = 1;
+#endif
 
     for ( i = 0; i < ELEM_COUNT; ++i )
     {
@@ -71,6 +85,10 @@ int fma_test(void)
         one[i] = 1;
     }
 
+#ifdef __AVX512F__
+# define one one_
+#endif
+
     x = (src + one) * inv;
     y = (src - one) * inv;
     touch(src);
@@ -93,22 +111,28 @@ int fma_test(void)
     x = src + inv;
     y = src - inv;
     touch(inv);
+    touch(one);
     z = src * one + inv;
     if ( !eq(x, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = -src * one - inv;
     if ( !eq(-x, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = src * one - inv;
     if ( !eq(y, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = -src * one + inv;
     if ( !eq(-y, z) ) return __LINE__;
     touch(inv);
 
+#undef one
+
 #if defined(addsub) && defined(fmaddsub)
     x = addsub(src * inv, one);
     y = addsub(src * inv, -one);
diff --git a/tools/tests/x86_emulator/simd.c b/tools/tests/x86_emulator/simd.c
index 198f7b933e..c805f1cc1e 100644
--- a/tools/tests/x86_emulator/simd.c
+++ b/tools/tests/x86_emulator/simd.c
@@ -912,6 +912,13 @@ static inline vec_t movlhps(vec_t x, vec_t y) {
 })
 #  endif
 # endif
+#elif VEC_SIZE == 64
+# if FLOAT_SIZE == 4
+#  define dup_hi(x) B(movshdup, _mask, x, undef(), ~0)
+#  define dup_lo(x) B(movsldup, _mask, x, undef(), ~0)
+# elif FLOAT_SIZE == 8
+#  define dup_lo(x) B(movddup, _mask, x, undef(), ~0)
+# endif
 #endif
 #if VEC_SIZE == 16 && defined(__SSSE3__) && !defined(__AVX512VL__)
 # if INT_SIZE == 1
diff --git a/tools/tests/x86_emulator/simd.h b/tools/tests/x86_emulator/simd.h
index 685d78d84b..936952ab52 100644
--- a/tools/tests/x86_emulator/simd.h
+++ b/tools/tests/x86_emulator/simd.h
@@ -49,8 +49,10 @@ float
 # define ELEM_SIZE FLOAT_SIZE
 # if FLOAT_SIZE == 4
 #  define MODE SF
+#  define ELEM_SFX "s"
 # elif FLOAT_SIZE == 8
 #  define MODE DF
+#  define ELEM_SFX "d"
 # endif
 #endif
 #ifndef VEC_SIZE
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nza5R-0006Ur-8z@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:45 +0000

commit 0b4e62847c5af1a59eea8d17093feccd550d1c26
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:28:28 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:28:28 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index bab9624fab..c1b9a3bb10 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2928,7 +2928,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nza5b-0006Vk-HU@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:33:55 +0000

commit 0d12261727410d13c4a59d94e34937d6d91ba641
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:30:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:30:06 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1759b84ba9..7d0747017d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2916,7 +2916,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nza5l-0006X8-RA@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:34:05 +0000

commit d7ebe3dfe3b2385bef10014549c36e0f73d39b52
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:30:44 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:30:44 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4d6b04c1cf..3b72d9e8d3 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2918,7 +2918,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nza5w-0006YW-4U@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 08:34:16 +0000

commit 1575075b2e3ac93e9bb2271f4c26a2fb7d947ade
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:31:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:31:23 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f5eeddce58..12531d3bff 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3004,7 +3004,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: traps: Fix reference to invalid erratum ID
Message-Id: <E1nzoIO-0007rL-Cs@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 23:44:04 +0000

commit a6f7ed5fc7d5fb5001ef82db99d34bc8a85fc2b6
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Fri Jun 10 10:33:56 2022 +0200
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Fri Jun 10 16:29:19 2022 -0700

    xen/arm: traps: Fix reference to invalid erratum ID
    
    The correct erratum ID should be 834220.
    
    Fixes: 0a7ba2936457 ("xen/arm: arm64: Add Cortex-A57 erratum 834220 workaround")
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 43f30747cf..e989e742fd 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1856,7 +1856,7 @@ static inline bool hpfar_is_valid(bool s1ptw, uint8_t fsc)
      *  1. the stage 2 fault happen during a stage 1 page table walk
      *  (the bit ESR_EL2.S1PTW is set)
      *  2. the fault was due to a translation fault and the processor
-     *  does not carry erratum #8342220
+     *  does not carry erratum #834220
      *
      * Note that technically HPFAR is valid for other cases, but they
      * are currently not supported by Xen.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: gicv2: Rename gicv2_map_hwdown_extra_mappings
Message-Id: <E1nzoIY-0007rq-Ft@xenbits.xenproject.org>
Date: Fri, 10 Jun 2022 23:44:14 +0000

commit e051b5cd1043cc1aad506faace824e6aacc887bf
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Fri Jun 10 10:33:57 2022 +0200
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Fri Jun 10 16:29:19 2022 -0700

    xen/arm: gicv2: Rename gicv2_map_hwdown_extra_mappings
    
    ... to gicv2_map_hwdom_extra_mappings as the former clearly contains
    a typo.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    [stefano: remove fixes tag]
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/gic-v2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 2cc2f6bc18..bd773bcc67 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -679,7 +679,7 @@ static void gicv2_irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_m
     spin_unlock(&gicv2.lock);
 }
 
-static int gicv2_map_hwdown_extra_mappings(struct domain *d)
+static int gicv2_map_hwdom_extra_mappings(struct domain *d)
 {
     const struct v2m_data *v2m_data;
 
@@ -1352,7 +1352,7 @@ const static struct gic_hw_operations gicv2_ops = {
     .make_hwdom_madt     = gicv2_make_hwdom_madt,
     .get_hwdom_extra_madt_size = gicv2_get_hwdom_extra_madt_size,
 #endif
-    .map_hwdom_extra_mappings = gicv2_map_hwdown_extra_mappings,
+    .map_hwdom_extra_mappings = gicv2_map_hwdom_extra_mappings,
     .iomem_deny_access   = gicv2_iomem_deny_access,
     .do_LPI              = gicv2_do_LPI,
 };
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzr6X-0001E1-Lq@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:01 +0000

commit cc74ff882364317e3667c6251cc79bc76fa20ae4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:00 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:00 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 13f9dd9db9..f630d9c1ee 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2894,16 +2894,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2911,8 +2912,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2923,8 +2931,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2936,7 +2944,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2967,7 +2975,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2986,18 +3001,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3046,6 +3089,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzr6h-0001Ee-PK@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:11 +0000

commit 82a94a179cae9fca3ecebe6c26868072088b8e3c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:23 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f630d9c1ee..2644b9f033 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2921,56 +2921,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3051,6 +3007,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3079,13 +3085,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzr6r-0001FG-SM@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:21 +0000

commit 887b5ff2938ae256aa14df751816d830b5152d49
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:35:40 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:35:40 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index 4c7f2cb70c..534bc1f403 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -336,6 +336,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -354,8 +362,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzr71-0001Fr-VT@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:31 +0000

commit 9b1e1e74a6c23ffad4c6a78973995957db2d4cc7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:36:15 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:36:15 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 84 ++++--------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++-------
 2 files changed, 17 insertions(+), 90 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 2644b9f033..6ce8c19dce 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -783,28 +783,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1009,47 +987,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2455,24 +2400,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 041c158f03..f5b8862b83 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzr7C-0001GO-2e@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:42 +0000

commit 78fd76e1881d8fac3bec5f8a2ddd53d8a3de7762
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:36:40 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:36:40 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 53 ++--------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 88 insertions(+), 66 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 47b019c750..77bba98069 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3423,7 +3423,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3517,7 +3517,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index cf4d2218fa..8f70ae727b 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -76,7 +76,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index a063462cff..68a658930a 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -204,54 +205,6 @@ static void check_cleanup_domid_map(struct domain *d,
     }
 }
 
-static void sync_cache(const void *addr, unsigned int size)
-{
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
-}
-
 /* Allocate page table, return its machine address */
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
 {
@@ -271,7 +224,7 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
         clear_page(vaddr);
 
         if ( (iommu_ops.init ? &iommu_ops : &vtd_ops)->sync_cache )
-            sync_cache(vaddr, PAGE_SIZE);
+            cache_writeback(vaddr, PAGE_SIZE);
         unmap_domain_page(vaddr);
         cur_pg++;
     }
@@ -1302,7 +1255,7 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
     iommu->nr_pt_levels = agaw_to_level(agaw);
 
     if ( !ecap_coherent(iommu->ecap) )
-        vtd_ops.sync_cache = sync_cache;
+        vtd_ops.sync_cache = cache_writeback;
 
     /* allocate domain id bitmap */
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 6681dccd69..55f0faa521 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(const void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzr7M-0001H3-5s@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:44:52 +0000

commit 890efc0d2e64c92f708bf0e5acd0257181dcbacf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:37:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:37:07 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 1ee687d0d2..986672a072 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -787,6 +787,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index fe2f97354f..09f619459b 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -46,6 +46,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzr7W-0001Hr-AC@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:45:02 +0000

commit a851dbce6876cd2c5689f912787c15cc507cbb39
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:37:52 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:37:52 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 6ce8c19dce..1759b84ba9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -997,6 +997,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2442,6 +2451,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3015,6 +3037,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index f5b8862b83..5c19b71eca 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
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Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nzr7g-0001IR-De@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 02:45:12 +0000

commit 0d12261727410d13c4a59d94e34937d6d91ba641
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:30:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:30:06 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1759b84ba9..7d0747017d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2916,7 +2916,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzxJh-0000NT-QW@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:01 +0000

commit c70071eb6c6d43f96d0d9e2f2446de491c8ed527
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:49:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:49:50 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 689a430d3b..709eea2ee9 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2892,16 +2892,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2909,8 +2910,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2921,8 +2929,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2934,7 +2942,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2965,7 +2973,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2984,18 +2999,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3042,6 +3085,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzxJr-0000Pc-UH@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:11 +0000

commit 758f40d7fa7e98ef2d2772ef8f0f57eabde028bd
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:16 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 709eea2ee9..0b75b6371d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2919,56 +2919,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3049,6 +3005,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3075,13 +3081,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzxK2-0000QF-19@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:22 +0000

commit a72146db9e9719f16bf2cab2fc9ac7a0d8d7ee3f
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:32 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index f632affaef..52551535a9 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -344,6 +344,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -362,8 +370,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzxKC-0000Qm-4Z@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:32 +0000

commit 07fbed87582c117262541a9a0903848a36adcc79
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:50:59 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:50:59 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 80 +++++-------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++--------
 2 files changed, 17 insertions(+), 86 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 0b75b6371d..7d3d186edb 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -785,24 +785,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1007,47 +989,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2453,24 +2402,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 7e74996053..7a2093da59 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -64,25 +64,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzxKM-0000RL-83@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:42 +0000

commit 204d4f16506334a0398649c714c19349145589be
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:51:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:51:23 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 46 +------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 87 insertions(+), 60 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 71ee5c6ec5..34498d4652 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3440,7 +3440,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3534,7 +3534,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index fbe951b2fa..3defe9677f 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -77,7 +77,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index cc088cd9ff..3bd17a4a24 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -207,53 +208,10 @@ static int iommus_incoherent;
 
 static void sync_cache(const void *addr, unsigned int size)
 {
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
     if ( !iommus_incoherent )
         return;
 
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    cache_writeback(addr, size);
 }
 
 /* Allocate page table, return its machine address */
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index bbe358dc36..bb08a55e29 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzxKW-0000Rm-B7@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:22:52 +0000

commit 25c7adeefa7538d1f88bab1859ce77f8b46f229e
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:51:47 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:51:47 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 2ef59e22dc..142f34af5f 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -787,6 +787,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index fe2f97354f..09f619459b 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -46,6 +46,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzxKg-0000SR-EE@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:23:02 +0000

commit 82ba97ec6b24f3e92fd1749962154cedf2addc5d
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:52:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:52:11 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 7d3d186edb..4d6b04c1cf 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -999,6 +999,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2444,6 +2453,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3015,6 +3037,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 7a2093da59..4c814abaa0 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -48,8 +48,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nzxKq-0000T2-HT@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 09:23:12 +0000

commit d7ebe3dfe3b2385bef10014549c36e0f73d39b52
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:30:44 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:30:44 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4d6b04c1cf..3b72d9e8d3 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2918,7 +2918,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/pv: Clean up _get_page_type()
Message-Id: <E1nzylh-0005tH-SP@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:01 +0000

commit 3826ba5f8271676c1569588abb32d960e5882e54
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:13:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:13:30 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ad89bfb45f..96738b0278 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2978,16 +2978,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2995,8 +2996,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -3007,8 +3015,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -3020,7 +3028,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -3041,7 +3049,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -3060,18 +3075,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3116,6 +3159,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1nzylr-0005tr-WD@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:11 +0000

commit 7669737d7da5790e66ffb670576175c2465ab09c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:13:54 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:13:54 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 96 +++++++++++++++++++++++++++++++++----------------------
 1 file changed, 57 insertions(+), 39 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 96738b0278..ee91c7fe5f 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3005,46 +3005,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    flush_tlb_mask(mask);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3125,6 +3091,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                flush_tlb_mask(mask);
+            }
+        }
+    }
+
     if ( unlikely((x & PGT_type_mask) != type) )
     {
         /* Special pages should not be accessible from devices. */
@@ -3149,13 +3155,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = alloc_page_type(page, type, preemptible);
         }
-        rc = alloc_page_type(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1nzym2-0005uI-32@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:22 +0000

commit c7da430b21e0f6c48d81874a465f94221163beba
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:14:12 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:14:12 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index c1e92937c0..7269ae89b8 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -320,6 +320,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -338,8 +346,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86: Don't change the cacheability of the directmap
Message-Id: <E1nzymC-0005uw-7X@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:32 +0000

commit fce392fa36c31f88be4f6b5f5821d244549cc825
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:14:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:14:39 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 80 +++++-------------------------------------------
 xen/include/asm-x86/mm.h | 19 +++++-------
 2 files changed, 15 insertions(+), 84 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ee91c7fe5f..859646b670 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -786,24 +786,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1008,47 +990,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_xen_heap_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_xen_heap_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2541,24 +2490,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_xen_heap_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 320c6cd196..db09849f73 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -64,22 +64,19 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 
  /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(9)
+#define PGC_count_width   PG_shift(6)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1nzymM-0005vW-B7@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:42 +0000

commit 8d9f36132afd7c95c47809ee0e8e5c678b31f828
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:15:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:15:11 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 46 +------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 87 insertions(+), 60 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 03f92c23dc..8568491c7e 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -224,7 +224,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -234,13 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -254,3 +248,77 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
 
     return flags;
 }
+
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index cbb2ce17c0..709509e0fc 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3407,7 +3407,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3501,7 +3501,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index fbe951b2fa..3defe9677f 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -77,7 +77,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index f051a55764..2bf5f02c08 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -201,53 +202,10 @@ static int iommus_incoherent;
 
 static void sync_cache(const void *addr, unsigned int size)
 {
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
     if ( !iommus_incoherent )
         return;
 
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    cache_writeback(addr, size);
 }
 
 /* Allocate page table, return its machine address */
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 229938f3a8..2a18b76e80 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -46,11 +46,6 @@ void unmap_vtd_domain_page(void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1nzymW-0005w3-FW@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:55:52 +0000

commit e8c04e468312713b5ad737e905494616f87f339f
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:15:39 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:15:39 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index b77fa19297..aa1b9d0dda 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -639,6 +639,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 8568491c7e..6f3f5ab1a3 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -249,6 +249,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -258,6 +265,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -273,7 +282,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index b9d3cac975..a8222e978c 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -44,6 +44,7 @@ XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 #define X86_BUG(x) ((FSCAPINTS + X86_NR_SYNTH) * 32 + (x))
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1nzymg-0005wr-JN@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:56:02 +0000

commit f9ae12fc103c7429d8ce6bc57b8cbcefdd71cd45
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 17:16:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 17:16:06 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 859646b670..f5eeddce58 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -1000,6 +1000,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2532,6 +2541,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3089,6 +3111,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index db09849f73..82d0fd6104 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -48,8 +48,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1nzymq-0005xJ-Mw@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 10:56:12 +0000

commit 1575075b2e3ac93e9bb2271f4c26a2fb7d947ade
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:31:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:31:23 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f5eeddce58..12531d3bff 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3004,7 +3004,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: add Persistent Map (PMAP) infrastructure
Message-Id: <E1nzzMW-00005y-LC@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:04 +0000

commit 4f17357b52f6ea9e76ff2375a6c61e8f43f65723
Author:     Wei Liu <wei.liu2@citrix.com>
AuthorDate: Sat Jun 11 12:20:33 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: add Persistent Map (PMAP) infrastructure
    
    The basic idea is like Persistent Kernel Map (PKMAP) in Linux. We
    pre-populate all the relevant page tables before the system is fully
    set up.
    
    We will need it on Arm in order to rework the arm64 version of
    xenheap_setup_mappings() as we may need to use pages allocated from
    the boot allocator before they are effectively mapped.
    
    This infrastructure is not lock-protected therefore can only be used
    before smpboot. After smpboot, map_domain_page() has to be used.
    
    This is based on the x86 version [1] that was originally implemented
    by Wei Liu.
    
    The PMAP infrastructure is implemented in common code with some
    arch helpers to set/clear the page-table entries and convertion
    between a fixmap slot to a virtual address...
    
    As mfn_to_xen_entry() now needs to be exported, take the opportunity
    to swich the parameter attr from unsigned to unsigned int.
    
    [1] <e92da4ad6015b6089737fcccba3ec1d6424649a5.1588278317.git.hongyxia@amazon.com>
    
    Signed-off-by: Wei Liu <wei.liu2@citrix.com>
    Signed-off-by: Hongyan Xia <hongyxia@amazon.com>
    [julien: Adapted for Arm]
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/Kconfig              |  1 +
 xen/arch/arm/include/asm/fixmap.h | 24 +++++++++++++
 xen/arch/arm/include/asm/lpae.h   |  8 +++++
 xen/arch/arm/include/asm/pmap.h   | 29 ++++++++++++++++
 xen/arch/arm/mm.c                 |  7 +---
 xen/common/Kconfig                |  3 ++
 xen/common/Makefile               |  1 +
 xen/common/pmap.c                 | 72 +++++++++++++++++++++++++++++++++++++++
 xen/include/xen/pmap.h            | 16 +++++++++
 9 files changed, 155 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index ecfa6822e4..a89a67802a 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -14,6 +14,7 @@ config ARM
 	select HAS_DEVICE_TREE
 	select HAS_PASSTHROUGH
 	select HAS_PDX
+	select HAS_PMAP
 	select IOMMU_FORCE_PT_SHARE
 
 config ARCH_DEFCONFIG
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
index 1cee51e52a..365a2385a0 100644
--- a/xen/arch/arm/include/asm/fixmap.h
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -5,20 +5,44 @@
 #define __ASM_FIXMAP_H
 
 #include <xen/acpi.h>
+#include <xen/pmap.h>
 
 /* Fixmap slots */
 #define FIXMAP_CONSOLE  0  /* The primary UART */
 #define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
 #define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
 #define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
+#define FIXMAP_PMAP_BEGIN (FIXMAP_ACPI_END + 1) /* Start of PMAP */
+#define FIXMAP_PMAP_END (FIXMAP_PMAP_BEGIN + NUM_FIX_PMAP - 1) /* End of PMAP */
+
+#define FIXMAP_LAST FIXMAP_PMAP_END
+
+#define FIXADDR_START FIXMAP_ADDR(0)
+#define FIXADDR_TOP FIXMAP_ADDR(FIXMAP_LAST)
 
 #ifndef __ASSEMBLY__
 
+/*
+ * Direct access to xen_fixmap[] should only happen when {set,
+ * clear}_fixmap() is unusable (e.g. where we would end up to
+ * recursively call the helpers).
+ */
+extern lpae_t xen_fixmap[XEN_PT_LPAE_ENTRIES];
+
 /* Map a page in a fixmap entry */
 extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
 /* Remove a mapping from a fixmap entry */
 extern void clear_fixmap(unsigned map);
 
+#define fix_to_virt(slot) ((void *)FIXMAP_ADDR(slot))
+
+static inline unsigned int virt_to_fix(vaddr_t vaddr)
+{
+    BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
+
+    return ((vaddr - FIXADDR_START) >> PAGE_SHIFT);
+}
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_FIXMAP_H */
diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h
index aecb320dec..fc19cbd847 100644
--- a/xen/arch/arm/include/asm/lpae.h
+++ b/xen/arch/arm/include/asm/lpae.h
@@ -4,6 +4,7 @@
 #ifndef __ASSEMBLY__
 
 #include <xen/page-defs.h>
+#include <xen/mm-frame.h>
 
 /*
  * WARNING!  Unlike the x86 pagetable code, where l1 is the lowest level and
@@ -168,6 +169,13 @@ static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
         third_table_offset(addr)            \
     }
 
+/*
+ * Standard entry type that we'll use to build Xen's own pagetables.
+ * We put the same permissions at every level, because they're ignored
+ * by the walker in non-leaf entries.
+ */
+lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr);
+
 #endif /* __ASSEMBLY__ */
 
 /*
diff --git a/xen/arch/arm/include/asm/pmap.h b/xen/arch/arm/include/asm/pmap.h
new file mode 100644
index 0000000000..e094d13dd2
--- /dev/null
+++ b/xen/arch/arm/include/asm/pmap.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_PMAP_H__
+#define __ASM_PMAP_H__
+
+#include <xen/mm.h>
+
+#include <asm/fixmap.h>
+
+static inline void arch_pmap_map(unsigned int slot, mfn_t mfn)
+{
+    lpae_t *entry = &xen_fixmap[slot];
+    lpae_t pte;
+
+    ASSERT(!lpae_is_valid(*entry));
+
+    pte = mfn_to_xen_entry(mfn, PAGE_HYPERVISOR_RW);
+    pte.pt.table = 1;
+    write_pte(entry, pte);
+}
+
+static inline void arch_pmap_unmap(unsigned int slot)
+{
+    lpae_t pte = {};
+
+    write_pte(&xen_fixmap[slot], pte);
+
+    flush_xen_tlb_range_va_local(FIXMAP_ADDR(slot), PAGE_SIZE);
+}
+
+#endif /* __ASM_PMAP_H__ */
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 52b2a03940..bd1348a997 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -305,12 +305,7 @@ void dump_hyp_walk(vaddr_t addr)
     dump_pt_walk(ttbr, addr, HYP_PT_ROOT_LEVEL, 1);
 }
 
-/*
- * Standard entry type that we'll use to build Xen's own pagetables.
- * We put the same permissions at every level, because they're ignored
- * by the walker in non-leaf entries.
- */
-static inline lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned attr)
+lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr)
 {
     lpae_t e = (lpae_t) {
         .pt = {
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index d921c74d61..5b6b2406c0 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -49,6 +49,9 @@ config HAS_KEXEC
 config HAS_PDX
 	bool
 
+config HAS_PMAP
+	bool
+
 config HAS_SCHED_GRANULARITY
 	bool
 
diff --git a/xen/common/Makefile b/xen/common/Makefile
index b1e076c30b..3baf83d527 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -29,6 +29,7 @@ obj-y += notifier.o
 obj-y += page_alloc.o
 obj-$(CONFIG_HAS_PDX) += pdx.o
 obj-$(CONFIG_PERF_COUNTERS) += perfc.o
+obj-bin-$(CONFIG_HAS_PMAP) += pmap.init.o
 obj-y += preempt.o
 obj-y += random.o
 obj-y += rangeset.o
diff --git a/xen/common/pmap.c b/xen/common/pmap.c
new file mode 100644
index 0000000000..14517198aa
--- /dev/null
+++ b/xen/common/pmap.c
@@ -0,0 +1,72 @@
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/irq.h>
+#include <xen/pmap.h>
+
+#include <asm/pmap.h>
+#include <asm/fixmap.h>
+
+/*
+ * Simple mapping infrastructure to map / unmap pages in fixed map.
+ * This is used to set the page table before the map domain page infrastructure
+ * is initialized.
+ *
+ * This structure is not protected by any locks, so it must not be used after
+ * smp bring-up.
+ */
+
+/* Bitmap to track which slot is used */
+static __initdata DECLARE_BITMAP(inuse, NUM_FIX_PMAP);
+
+void *__init pmap_map(mfn_t mfn)
+{
+    unsigned int idx;
+    unsigned int slot;
+
+    ASSERT(system_state < SYS_STATE_smp_boot);
+    ASSERT(!in_irq());
+
+    idx = find_first_zero_bit(inuse, NUM_FIX_PMAP);
+    if ( idx == NUM_FIX_PMAP )
+        panic("Out of PMAP slots\n");
+
+    __set_bit(idx, inuse);
+
+    slot = idx + FIXMAP_PMAP_BEGIN;
+    ASSERT(slot >= FIXMAP_PMAP_BEGIN && slot <= FIXMAP_PMAP_END);
+
+    /*
+     * We cannot use set_fixmap() here. We use PMAP when the domain map
+     * page infrastructure is not yet initialized, so map_pages_to_xen() called
+     * by set_fixmap() needs to map pages on demand, which then calls pmap()
+     * again, resulting in a loop. Modify the PTEs directly instead. The same
+     * is true for pmap_unmap().
+     */
+    arch_pmap_map(slot, mfn);
+
+    return fix_to_virt(slot);
+}
+
+void __init pmap_unmap(const void *p)
+{
+    unsigned int idx;
+    unsigned int slot = virt_to_fix((unsigned long)p);
+
+    ASSERT(system_state < SYS_STATE_smp_boot);
+    ASSERT(slot >= FIXMAP_PMAP_BEGIN && slot <= FIXMAP_PMAP_END);
+    ASSERT(!in_irq());
+
+    idx = slot - FIXMAP_PMAP_BEGIN;
+
+    __clear_bit(idx, inuse);
+    arch_pmap_unmap(slot);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/xen/pmap.h b/xen/include/xen/pmap.h
new file mode 100644
index 0000000000..93e61b1087
--- /dev/null
+++ b/xen/include/xen/pmap.h
@@ -0,0 +1,16 @@
+#ifndef __XEN_PMAP_H__
+#define __XEN_PMAP_H__
+
+/* Large enough for mapping 5 levels of page tables with some headroom */
+#define NUM_FIX_PMAP 8
+
+#ifndef __ASSEMBLY__
+
+#include <xen/mm-frame.h>
+
+void *pmap_map(mfn_t mfn);
+void pmap_unmap(const void *p);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __XEN_PMAP_H__ */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Clean-up the includes and order them
Message-Id: <E1nzzMg-00006c-O6@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:14 +0000

commit 53098ba58101f64b61c314ab8c5c95db798563e7
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:21:09 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Clean-up the includes and order them
    
    The numbers of includes in mm.c has been growing quite a lot. However
    some of them (e.g. xen/device_tree.h, xen/softirq.h) doesn't look
    to be directly used by the file or other will be included by
    larger headers (e.g asm/flushtlb.h will be included by xen/mm.h).
    
    So trim down the number of includes. Take the opportunity to order
    them with the xen headers first, then asm headers and last public
    headers.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 27 ++++++++++-----------------
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index bd1348a997..d40dd4e6c9 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -17,33 +17,26 @@
  * GNU General Public License for more details.
  */
 
-#include <xen/compile.h>
-#include <xen/types.h>
-#include <xen/device_tree.h>
-#include <xen/init.h>
-#include <xen/mm.h>
-#include <xen/preempt.h>
+#include <xen/domain_page.h>
 #include <xen/errno.h>
 #include <xen/grant_table.h>
-#include <xen/softirq.h>
-#include <xen/event.h>
 #include <xen/guest_access.h>
-#include <xen/domain_page.h>
-#include <xen/err.h>
-#include <asm/page.h>
-#include <asm/current.h>
-#include <asm/flushtlb.h>
-#include <public/memory.h>
+#include <xen/init.h>
+#include <xen/libfdt/libfdt.h>
+#include <xen/mm.h>
+#include <xen/pfn.h>
 #include <xen/sched.h>
+#include <xen/sizes.h>
+#include <xen/types.h>
 #include <xen/vmap.h>
+
 #include <xsm/xsm.h>
-#include <xen/pfn.h>
-#include <xen/sizes.h>
-#include <xen/libfdt/libfdt.h>
 
 #include <asm/fixmap.h>
 #include <asm/setup.h>
 
+#include <public/memory.h>
+
 /* Override macros from asm/page.h to make them work with mfn_t */
 #undef virt_to_mfn
 #define virt_to_mfn(va) _mfn(__virt_to_mfn(va))
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Use the PMAP helpers in xen_{,un}map_table()
Message-Id: <E1nzzMq-00007Q-Qt@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:24 +0000

commit de5fdb562c3c31639becb4548540fcf58afbc485
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:21:17 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Use the PMAP helpers in xen_{,un}map_table()
    
    During early boot, it is not possible to use xen_{,un}map_table()
    if the page tables are not residing the Xen binary.
    
    This is a blocker to switch some of the helpers to use xen_pt_update()
    as we may need to allocate extra page tables and access them before
    the domheap has been initialized (see setup_xenheap_mappings()).
    
    xen_{,un}map_table() are now updated to use the PMAP helpers for early
    boot map/unmap. Note that the special case for page-tables residing
    in Xen binary has been dropped because it is "complex" and was
    only added as a workaround in 8d4f1b8878e0 ("xen/arm: mm: Allow
    generic xen page-tables helpers to be called early").
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 33 +++++++++------------------------
 1 file changed, 9 insertions(+), 24 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index d40dd4e6c9..b019e4b35b 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -25,6 +25,7 @@
 #include <xen/libfdt/libfdt.h>
 #include <xen/mm.h>
 #include <xen/pfn.h>
+#include <xen/pmap.h>
 #include <xen/sched.h>
 #include <xen/sizes.h>
 #include <xen/types.h>
@@ -980,27 +981,11 @@ void *ioremap(paddr_t pa, size_t len)
 static lpae_t *xen_map_table(mfn_t mfn)
 {
     /*
-     * We may require to map the page table before map_domain_page() is
-     * useable. The requirements here is it must be useable as soon as
-     * page-tables are allocated dynamically via alloc_boot_pages().
-     *
-     * We need to do the check on physical address rather than virtual
-     * address to avoid truncation on Arm32. Therefore is_kernel() cannot
-     * be used.
+     * During early boot, map_domain_page() may be unusable. Use the
+     * PMAP to map temporarily a page-table.
      */
     if ( system_state == SYS_STATE_early_boot )
-    {
-        if ( is_xen_fixed_mfn(mfn) )
-        {
-            /*
-             * It is fine to demote the type because the size of Xen
-             * will always fit in vaddr_t.
-             */
-            vaddr_t offset = mfn_to_maddr(mfn) - virt_to_maddr(&_start);
-
-            return (lpae_t *)(XEN_VIRT_START + offset);
-        }
-    }
+        return pmap_map(mfn);
 
     return map_domain_page(mfn);
 }
@@ -1009,12 +994,12 @@ static void xen_unmap_table(const lpae_t *table)
 {
     /*
      * During early boot, xen_map_table() will not use map_domain_page()
-     * for page-tables residing in Xen binary. So skip the unmap part.
+     * but the PMAP.
      */
-    if ( system_state == SYS_STATE_early_boot && is_kernel(table) )
-        return;
-
-    unmap_domain_page(table);
+    if ( system_state == SYS_STATE_early_boot )
+        pmap_unmap(table);
+    else
+        unmap_domain_page(table);
 }
 
 static int create_xen_table(lpae_t *entry)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm32: setup: Move out the code to populate the boot allocator
Message-Id: <E1nzzN0-00008G-Th@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:34 +0000

commit 38ed4a4876383d8acd4365dafb6454feba01a4e5
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:24:49 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm32: setup: Move out the code to populate the boot allocator
    
    In a follow-up patch, we will want to populate the boot allocator
    separately for arm64. The code will end up to be very similar to the one
    on arm32. So move out the code in a new helper populate_boot_allocator().
    
    For now the code is still protected by CONFIG_ARM_32 to avoid any build
    failure on arm64.
    
    Take the opportunity to replace mfn_add(xen_mfn_start, xenheap_pages) with
    xenheap_mfn_end as they are equivalent.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/setup.c | 90 +++++++++++++++++++++++++++++-----------------------
 1 file changed, 51 insertions(+), 39 deletions(-)

diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 65fdaa0900..5ab257f916 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -646,10 +646,58 @@ static void __init init_staticmem_pages(void)
 }
 
 #ifdef CONFIG_ARM_32
+/*
+ * Populate the boot allocator. All the RAM but the following regions
+ * will be added:
+ *  - Modules (e.g., Xen, Kernel)
+ *  - Reserved regions
+ *  - Xenheap
+ */
+static void __init populate_boot_allocator(void)
+{
+    unsigned int i;
+    const struct meminfo *banks = &bootinfo.mem;
+
+    for ( i = 0; i < banks->nr_banks; i++ )
+    {
+        const struct membank *bank = &banks->bank[i];
+        paddr_t bank_end = bank->start + bank->size;
+        paddr_t s, e;
+
+        s = bank->start;
+        while ( s < bank_end )
+        {
+            paddr_t n = bank_end;
+
+            e = next_module(s, &n);
+
+            if ( e == ~(paddr_t)0 )
+                e = n = bank_end;
+
+            /*
+             * Module in a RAM bank other than the one which we are
+             * not dealing with here.
+             */
+            if ( e > bank_end )
+                e = bank_end;
+
+            /* Avoid the xenheap */
+            if ( s < mfn_to_maddr(xenheap_mfn_end) &&
+                 mfn_to_maddr(xenheap_mfn_start) < e )
+            {
+                e = mfn_to_maddr(xenheap_mfn_start);
+                n = mfn_to_maddr(xenheap_mfn_end);
+            }
+
+            fw_unreserved_regions(s, e, init_boot_pages, 0);
+            s = n;
+        }
+    }
+}
+
 static void __init setup_mm(void)
 {
-    paddr_t ram_start, ram_end, ram_size;
-    paddr_t s, e;
+    paddr_t ram_start, ram_end, ram_size, e;
     unsigned long ram_pages;
     unsigned long heap_pages, xenheap_pages, domheap_pages;
     unsigned int i;
@@ -727,43 +775,7 @@ static void __init setup_mm(void)
     setup_xenheap_mappings((e >> PAGE_SHIFT) - xenheap_pages, xenheap_pages);
 
     /* Add non-xenheap memory */
-    for ( i = 0; i < bootinfo.mem.nr_banks; i++ )
-    {
-        paddr_t bank_start = bootinfo.mem.bank[i].start;
-        paddr_t bank_end = bank_start + bootinfo.mem.bank[i].size;
-
-        s = bank_start;
-        while ( s < bank_end )
-        {
-            paddr_t n = bank_end;
-
-            e = next_module(s, &n);
-
-            if ( e == ~(paddr_t)0 )
-            {
-                e = n = ram_end;
-            }
-
-            /*
-             * Module in a RAM bank other than the one which we are
-             * not dealing with here.
-             */
-            if ( e > bank_end )
-                e = bank_end;
-
-            /* Avoid the xenheap */
-            if ( s < mfn_to_maddr(mfn_add(xenheap_mfn_start, xenheap_pages))
-                 && mfn_to_maddr(xenheap_mfn_start) < e )
-            {
-                e = mfn_to_maddr(xenheap_mfn_start);
-                n = mfn_to_maddr(mfn_add(xenheap_mfn_start, xenheap_pages));
-            }
-
-            fw_unreserved_regions(s, e, init_boot_pages, 0);
-
-            s = n;
-        }
-    }
+    populate_boot_allocator();
 
     /* Frame table covers all of RAM region, including holes */
     setup_frametable_mappings(ram_start, ram_end);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm64: mm: Add memory to the boot allocator first
Message-Id: <E1nzzNB-00008s-0L@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:45 +0000

commit 942eb0a831b0e2ca9d7cab4be67dc61eba59298a
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:25:32 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm64: mm: Add memory to the boot allocator first
    
    Currently, memory is added to the boot allocator after the xenheap
    mappings are done. This will break if the first mapping is more than
    512GB of RAM.
    
    In addition to that, a follow-up patch will rework setup_xenheap_mappings()
    to use smaller mappings (e.g. 2MB, 4KB). So it will be necessary to have
    memory in the boot allocator earlier.
    
    Only free memory (e.g. not reserved or modules) can be added to the boot
    allocator. It might be possible that some regions (including the first
    one) will have no free memory.
    
    So we need to add all the free memory to the boot allocator first
    and then add do the mappings.
    
    Populating the boot allocator is nearly the same between arm32 and
    arm64. The only difference is on the former we need to exclude the
    xenheap for the boot allocator. Gate the difference with CONFIG_ARM_32
    so the code be re-used on arm64.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/setup.c | 55 +++++++++++++++++++++++-----------------------------
 1 file changed, 24 insertions(+), 31 deletions(-)

diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 5ab257f916..6016471d37 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -645,13 +645,12 @@ static void __init init_staticmem_pages(void)
 #endif
 }
 
-#ifdef CONFIG_ARM_32
 /*
  * Populate the boot allocator. All the RAM but the following regions
  * will be added:
  *  - Modules (e.g., Xen, Kernel)
  *  - Reserved regions
- *  - Xenheap
+ *  - Xenheap (arm32 only)
  */
 static void __init populate_boot_allocator(void)
 {
@@ -681,6 +680,7 @@ static void __init populate_boot_allocator(void)
             if ( e > bank_end )
                 e = bank_end;
 
+#ifdef CONFIG_ARM_32
             /* Avoid the xenheap */
             if ( s < mfn_to_maddr(xenheap_mfn_end) &&
                  mfn_to_maddr(xenheap_mfn_start) < e )
@@ -688,6 +688,7 @@ static void __init populate_boot_allocator(void)
                 e = mfn_to_maddr(xenheap_mfn_start);
                 n = mfn_to_maddr(xenheap_mfn_end);
             }
+#endif
 
             fw_unreserved_regions(s, e, init_boot_pages, 0);
             s = n;
@@ -695,6 +696,7 @@ static void __init populate_boot_allocator(void)
     }
 }
 
+#ifdef CONFIG_ARM_32
 static void __init setup_mm(void)
 {
     paddr_t ram_start, ram_end, ram_size, e;
@@ -790,45 +792,36 @@ static void __init setup_mm(void)
 #else /* CONFIG_ARM_64 */
 static void __init setup_mm(void)
 {
+    const struct meminfo *banks = &bootinfo.mem;
     paddr_t ram_start = ~0;
     paddr_t ram_end = 0;
     paddr_t ram_size = 0;
-    int bank;
+    unsigned int i;
 
     init_pdx();
 
-    total_pages = 0;
-    for ( bank = 0 ; bank < bootinfo.mem.nr_banks; bank++ )
-    {
-        paddr_t bank_start = bootinfo.mem.bank[bank].start;
-        paddr_t bank_size = bootinfo.mem.bank[bank].size;
-        paddr_t bank_end = bank_start + bank_size;
-        paddr_t s, e;
-
-        ram_size = ram_size + bank_size;
-        ram_start = min(ram_start,bank_start);
-        ram_end = max(ram_end,bank_end);
-
-        setup_xenheap_mappings(bank_start>>PAGE_SHIFT, bank_size>>PAGE_SHIFT);
-
-        s = bank_start;
-        while ( s < bank_end )
-        {
-            paddr_t n = bank_end;
+    /*
+     * We need some memory to allocate the page-tables used for the xenheap
+     * mappings. But some regions may contain memory already allocated
+     * for other uses (e.g. modules, reserved-memory...).
+     *
+     * For simplicity, add all the free regions in the boot allocator.
+     */
+    populate_boot_allocator();
 
-            e = next_module(s, &n);
+    total_pages = 0;
 
-            if ( e == ~(paddr_t)0 )
-            {
-                e = n = bank_end;
-            }
+    for ( i = 0; i < banks->nr_banks; i++ )
+    {
+        const struct membank *bank = &banks->bank[i];
+        paddr_t bank_end = bank->start + bank->size;
 
-            if ( e > bank_end )
-                e = bank_end;
+        ram_size = ram_size + bank->size;
+        ram_start = min(ram_start, bank->start);
+        ram_end = max(ram_end, bank_end);
 
-            fw_unreserved_regions(s, e, init_boot_pages, 0);
-            s = n;
-        }
+        setup_xenheap_mappings(PFN_DOWN(bank->start),
+                               PFN_DOWN(bank->size));
     }
 
     total_pages += ram_size >> PAGE_SHIFT;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Rework setup_xenheap_mappings()
Message-Id: <E1nzzNL-00009x-3d@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:33:55 +0000

commit 26a470875b7e6f52a2c172a26c1f9ee432ad8893
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Sat Jun 11 12:26:18 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Rework setup_xenheap_mappings()
    
    The current implementation of setup_xenheap_mappings() is using 1GB
    mappings. This can lead to unexpected result because the mapping
    may alias a non-cachable region (such as device or reserved regions).
    For more details see B2.8 in ARM DDI 0487H.a.
    
    map_pages_to_xen() was recently reworked to allow superpage mappings,
    support contiguous mapping and deal with the use of page-tables before
    they are mapped.
    
    Most of the code in setup_xenheap_mappings() is now replaced with a
    single call to map_pages_to_xen().
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
---
 xen/arch/arm/mm.c | 87 ++++++++++++-------------------------------------------
 1 file changed, 18 insertions(+), 69 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index b019e4b35b..65af44f422 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -138,17 +138,6 @@ static DEFINE_PAGE_TABLE(cpu0_pgtable);
 static DEFINE_PAGE_TABLES(cpu0_dommap, DOMHEAP_SECOND_PAGES);
 #endif
 
-#ifdef CONFIG_ARM_64
-/* The first page of the first level mapping of the xenheap. The
- * subsequent xenheap first level pages are dynamically allocated, but
- * we need this one to bootstrap ourselves. */
-static DEFINE_PAGE_TABLE(xenheap_first_first);
-/* The zeroeth level slot which uses xenheap_first_first. Used because
- * setup_xenheap_mappings otherwise relies on mfn_to_virt which isn't
- * valid for a non-xenheap mapping. */
-static __initdata int xenheap_first_first_slot = -1;
-#endif
-
 /* Common pagetable leaves */
 /* Second level page tables.
  *
@@ -831,77 +820,37 @@ void __init setup_xenheap_mappings(unsigned long base_mfn,
 void __init setup_xenheap_mappings(unsigned long base_mfn,
                                    unsigned long nr_mfns)
 {
-    lpae_t *first, pte;
-    unsigned long mfn, end_mfn;
-    vaddr_t vaddr;
-
-    /* Align to previous 1GB boundary */
-    mfn = base_mfn & ~((FIRST_SIZE>>PAGE_SHIFT)-1);
+    int rc;
 
     /* First call sets the xenheap physical and virtual offset. */
     if ( mfn_eq(xenheap_mfn_start, INVALID_MFN) )
     {
+        unsigned long mfn_gb = base_mfn & ~((FIRST_SIZE >> PAGE_SHIFT) - 1);
+
         xenheap_mfn_start = _mfn(base_mfn);
         xenheap_base_pdx = mfn_to_pdx(_mfn(base_mfn));
+        /*
+         * The base address may not be aligned to the first level
+         * size (e.g. 1GB when using 4KB pages). This would prevent
+         * superpage mappings for all the regions because the virtual
+         * address and machine address should both be suitably aligned.
+         *
+         * Prevent that by offsetting the start of the xenheap virtual
+         * address.
+         */
         xenheap_virt_start = DIRECTMAP_VIRT_START +
-            (base_mfn - mfn) * PAGE_SIZE;
+            (base_mfn - mfn_gb) * PAGE_SIZE;
     }
 
     if ( base_mfn < mfn_x(xenheap_mfn_start) )
         panic("cannot add xenheap mapping at %lx below heap start %lx\n",
               base_mfn, mfn_x(xenheap_mfn_start));
 
-    end_mfn = base_mfn + nr_mfns;
-
-    /*
-     * Virtual address aligned to previous 1GB to match physical
-     * address alignment done above.
-     */
-    vaddr = (vaddr_t)__mfn_to_virt(base_mfn) & FIRST_MASK;
-
-    while ( mfn < end_mfn )
-    {
-        int slot = zeroeth_table_offset(vaddr);
-        lpae_t *p = &xen_pgtable[slot];
-
-        if ( p->pt.valid )
-        {
-            /* mfn_to_virt is not valid on the 1st 1st mfn, since it
-             * is not within the xenheap. */
-            first = slot == xenheap_first_first_slot ?
-                xenheap_first_first : mfn_to_virt(lpae_get_mfn(*p));
-        }
-        else if ( xenheap_first_first_slot == -1)
-        {
-            /* Use xenheap_first_first to bootstrap the mappings */
-            first = xenheap_first_first;
-
-            pte = pte_of_xenaddr((vaddr_t)xenheap_first_first);
-            pte.pt.table = 1;
-            write_pte(p, pte);
-
-            xenheap_first_first_slot = slot;
-        }
-        else
-        {
-            mfn_t first_mfn = alloc_boot_pages(1, 1);
-
-            clear_page(mfn_to_virt(first_mfn));
-            pte = mfn_to_xen_entry(first_mfn, MT_NORMAL);
-            pte.pt.table = 1;
-            write_pte(p, pte);
-            first = mfn_to_virt(first_mfn);
-        }
-
-        pte = mfn_to_xen_entry(_mfn(mfn), MT_NORMAL);
-        /* TODO: Set pte.pt.contig when appropriate. */
-        write_pte(&first[first_table_offset(vaddr)], pte);
-
-        mfn += FIRST_SIZE>>PAGE_SHIFT;
-        vaddr += FIRST_SIZE;
-    }
-
-    flush_xen_tlb_local();
+    rc = map_pages_to_xen((vaddr_t)__mfn_to_virt(base_mfn),
+                          _mfn(base_mfn), nr_mfns,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the xenheap mappings.\n");
 }
 #endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: mm: Re-implement setup_frame_table_mappings() with map_pages_to_xen()
Message-Id: <E1nzzNV-0000Ax-6Y@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 11:34:05 +0000

commit c9a707df83aad17a6fcf2e8330ab3b5bead6fb8b
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Sat Jun 11 12:27:41 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Re-implement setup_frame_table_mappings() with map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() call by map_pages_to_xen() call.
    
    This has the advantage to remove the differences between 32-bit and
    64-bit code.
    
    Lastly remove create_mappings() as there is no more callers.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 64 ++++++-------------------------------------------------
 1 file changed, 6 insertions(+), 58 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 65af44f422..be37176a47 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -369,40 +369,6 @@ void clear_fixmap(unsigned map)
     BUG_ON(res != 0);
 }
 
-/* Create Xen's mappings of memory.
- * Mapping_size must be either 2MB or 32MB.
- * Base and virt must be mapping_size aligned.
- * Size must be a multiple of mapping_size.
- * second must be a contiguous set of second level page tables
- * covering the region starting at virt_offset. */
-static void __init create_mappings(lpae_t *second,
-                                   unsigned long virt_offset,
-                                   unsigned long base_mfn,
-                                   unsigned long nr_mfns,
-                                   unsigned int mapping_size)
-{
-    unsigned long i, count;
-    const unsigned long granularity = mapping_size >> PAGE_SHIFT;
-    lpae_t pte, *p;
-
-    ASSERT((mapping_size == MB(2)) || (mapping_size == MB(32)));
-    ASSERT(!((virt_offset >> PAGE_SHIFT) % granularity));
-    ASSERT(!(base_mfn % granularity));
-    ASSERT(!(nr_mfns % granularity));
-
-    count = nr_mfns / XEN_PT_LPAE_ENTRIES;
-    p = second + second_linear_offset(virt_offset);
-    pte = mfn_to_xen_entry(_mfn(base_mfn), MT_NORMAL);
-    if ( granularity == 16 * XEN_PT_LPAE_ENTRIES )
-        pte.pt.contig = 1;  /* These maps are in 16-entry contiguous chunks. */
-    for ( i = 0; i < count; i++ )
-    {
-        write_pte(p + i, pte);
-        pte.pt.base += 1 << XEN_PT_LPAE_SHIFT;
-    }
-    flush_xen_tlb_local();
-}
-
 #ifdef CONFIG_DOMAIN_PAGE
 void *map_domain_page_global(mfn_t mfn)
 {
@@ -862,36 +828,18 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe)
     unsigned long frametable_size = nr_pdxs * sizeof(struct page_info);
     mfn_t base_mfn;
     const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) : MB(32);
-#ifdef CONFIG_ARM_64
-    lpae_t *second, pte;
-    unsigned long nr_second;
-    mfn_t second_base;
-    int i;
-#endif
+    int rc;
 
     frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps));
     /* Round up to 2M or 32M boundary, as appropriate. */
     frametable_size = ROUNDUP(frametable_size, mapping_size);
     base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12));
 
-#ifdef CONFIG_ARM_64
-    /* Compute the number of second level pages. */
-    nr_second = ROUNDUP(frametable_size, FIRST_SIZE) >> FIRST_SHIFT;
-    second_base = alloc_boot_pages(nr_second, 1);
-    second = mfn_to_virt(second_base);
-    for ( i = 0; i < nr_second; i++ )
-    {
-        clear_page(mfn_to_virt(mfn_add(second_base, i)));
-        pte = mfn_to_xen_entry(mfn_add(second_base, i), MT_NORMAL);
-        pte.pt.table = 1;
-        write_pte(&xen_first[first_table_offset(FRAMETABLE_VIRT_START)+i], pte);
-    }
-    create_mappings(second, 0, mfn_x(base_mfn), frametable_size >> PAGE_SHIFT,
-                    mapping_size);
-#else
-    create_mappings(xen_second, FRAMETABLE_VIRT_START, mfn_x(base_mfn),
-                    frametable_size >> PAGE_SHIFT, mapping_size);
-#endif
+    rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn,
+                          frametable_size >> PAGE_SHIFT,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the frametable mappings.\n");
 
     memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info));
     memset(&frame_table[nr_pdxs], -1,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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Date: Sat, 11 Jun 2022 17:55:02 +0000

commit be464973e4565fd9b4999a6eb9db9f469616f07b
Author:     Luca Fancellu <luca.fancellu@arm.com>
AuthorDate: Wed Jun 8 16:59:55 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 16:59:55 2022 +0200

    tools/libxl: optimize domain creation skipping domain cpupool move
    
    Commit 92ea9c54fc81 ("arm/dom0less: assign dom0less guests to cpupools")
    introduced a way to start a domain directly on a certain cpupool,
    adding a "cpupool_id" member to struct xen_domctl_createdomain.
    
    This was done to be able to start dom0less guests in different pools than
    cpupool0, but the toolstack can benefit from it because it can now use
    the struct member directly instead of creating the guest in cpupool0
    and then moving it to the target cpupool.
    
    Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
---
 tools/libs/light/libxl_create.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
index 69ec405858..2339f09e95 100644
--- a/tools/libs/light/libxl_create.c
+++ b/tools/libs/light/libxl_create.c
@@ -633,6 +633,7 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config,
             .max_maptrack_frames = b_info->max_maptrack_frames,
             .grant_opts = XEN_DOMCTL_GRANT_version(b_info->max_grant_version),
             .vmtrace_size = ROUNDUP(b_info->vmtrace_buf_kb << 10, XC_PAGE_SHIFT),
+            .cpupool_id = info->poolid,
         };
 
         if (info->type != LIBXL_DOMAIN_TYPE_PV) {
@@ -757,13 +758,6 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config,
      */
     assert(libxl_domid_valid_guest(*domid));
 
-    ret = xc_cpupool_movedomain(ctx->xch, info->poolid, *domid);
-    if (ret < 0) {
-        LOGED(ERROR, *domid, "domain move fail");
-        rc = ERROR_FAIL;
-        goto out;
-    }
-
     dom_path = libxl__xs_get_dompath(gc, *domid);
     if (!dom_path) {
         rc = ERROR_FAIL;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] build: xen/include: use if_changed
Message-Id: <E1o05KK-0000Wz-79@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:55:12 +0000

commit 28e13c7f4382f5dce6b2fb2ccef2098f22c04694
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Wed Jun 8 17:00:29 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:00:29 2022 +0200

    build: xen/include: use if_changed
    
    Use "define" for the headers*_chk commands. That allow us to keep
    writing "#include" in the Makefile without having to replace that by
    "$(pound)include" which would be a bit less obvious about the command
    line purpose.
    
    Adding several .PRECIOUS as without them `make` deletes the
    intermediate targets. This is an issue because the macro $(if_changed,)
    check if the target exist in order to decide whether to recreate the
    target.
    
    Removing the call to `mkdir` from the commands. Those aren't needed
    anymore because a rune in Rules.mk creates the directory for each
    $(targets).
    
    Remove "export PYTHON" as it is already exported.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 108 ++++++++++++++++++++++++++++++++++++---------------
 1 file changed, 76 insertions(+), 32 deletions(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 03baf10efb..6d9bcc19b0 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -45,38 +45,65 @@ public-$(CONFIG_ARM) := $(wildcard $(srcdir)/public/arch-arm/*.h $(srcdir)/publi
 .PHONY: all
 all: $(addprefix $(obj)/,$(headers-y))
 
-$(obj)/compat/%.h: $(obj)/compat/%.i $(srcdir)/Makefile $(srctree)/tools/compat-build-header.py
-	$(PYTHON) $(srctree)/tools/compat-build-header.py <$< $(patsubst $(obj)/%,%,$@) >>$@.new; \
-	mv -f $@.new $@
-
-$(obj)/compat/%.i: $(obj)/compat/%.c $(srcdir)/Makefile
-	$(CPP) $(filter-out -Wa$(comma)% -include %/include/xen/config.h,$(XEN_CFLAGS)) $(cppflags-y) -o $@ $<
-
-$(obj)/compat/%.c: $(src)/public/%.h $(srcdir)/xlat.lst $(srcdir)/Makefile $(srctree)/tools/compat-build-source.py
-	mkdir -p $(@D)
-	$(PYTHON) $(srctree)/tools/compat-build-source.py $(srcdir)/xlat.lst <$< >$@.new
-	mv -f $@.new $@
-
-$(obj)/compat/.xlat/%.h: $(obj)/compat/%.h $(obj)/compat/.xlat/%.lst $(srctree)/tools/get-fields.sh $(srcdir)/Makefile
-	export PYTHON=$(PYTHON); \
-	while read what name; do \
-		$(SHELL) $(srctree)/tools/get-fields.sh "$$what" compat_$$name $< || exit $$?; \
-	done <$(patsubst $(obj)/compat/%,$(obj)/compat/.xlat/%,$(basename $<)).lst >$@.new
-	mv -f $@.new $@
+quiet_cmd_compat_h = GEN     $@
+cmd_compat_h = \
+    $(PYTHON) $(srctree)/tools/compat-build-header.py <$< $(patsubst $(obj)/%,%,$@) >>$@.new; \
+    mv -f $@.new $@
+
+quiet_cmd_compat_i = CPP     $@
+cmd_compat_i = $(CPP) $(filter-out -Wa$(comma)% -include %/include/xen/config.h,$(XEN_CFLAGS)) $(cppflags-y) -o $@ $<
+
+quiet_cmd_compat_c = GEN     $@
+cmd_compat_c = \
+   $(PYTHON) $(srctree)/tools/compat-build-source.py $(srcdir)/xlat.lst <$< >$@.new; \
+   mv -f $@.new $@
+
+quiet_cmd_xlat_headers = GEN     $@
+cmd_xlat_headers = \
+    while read what name; do \
+        $(SHELL) $(srctree)/tools/get-fields.sh "$$what" compat_$$name $< || exit $$?; \
+    done <$(patsubst $(obj)/compat/%,$(obj)/compat/.xlat/%,$(basename $<)).lst >$@.new; \
+    mv -f $@.new $@
+
+targets += $(headers-y)
+$(obj)/compat/%.h: $(obj)/compat/%.i $(srctree)/tools/compat-build-header.py FORCE
+	$(call if_changed,compat_h)
+
+.PRECIOUS: $(obj)/compat/%.i
+targets += $(patsubst %.h, %.i, $(headers-y))
+$(obj)/compat/%.i: $(obj)/compat/%.c FORCE
+	$(call if_changed,compat_i)
+
+.PRECIOUS: $(obj)/compat/%.c
+targets += $(patsubst %.h, %.c, $(headers-y))
+$(obj)/compat/%.c: $(src)/public/%.h $(srcdir)/xlat.lst $(srctree)/tools/compat-build-source.py FORCE
+	$(call if_changed,compat_c)
+
+targets += $(patsubst compat/%, compat/.xlat/%, $(headers-y))
+$(obj)/compat/.xlat/%.h: $(obj)/compat/%.h $(obj)/compat/.xlat/%.lst $(srctree)/tools/get-fields.sh FORCE
+	$(call if_changed,xlat_headers)
+
+quiet_cmd_xlat_lst = GEN     $@
+cmd_xlat_lst = \
+	grep -v '^[[:blank:]]*$(pound)' $< | sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,[[:blank:]]+$*\.h[[:blank:]]*$$,,p' >$@.new; \
+	$(call move-if-changed,$@.new,$@)
 
 .PRECIOUS: $(obj)/compat/.xlat/%.lst
-$(obj)/compat/.xlat/%.lst: $(srcdir)/xlat.lst $(srcdir)/Makefile
-	mkdir -p $(@D)
-	grep -v '^[[:blank:]]*#' $< | sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,[[:blank:]]+$*\.h[[:blank:]]*$$,,p' >$@.new
-	$(call move-if-changed,$@.new,$@)
+targets += $(patsubst compat/%.h, compat/.xlat/%.lst, $(headers-y))
+$(obj)/compat/.xlat/%.lst: $(srcdir)/xlat.lst FORCE
+	$(call if_changed,xlat_lst)
 
 xlat-y := $(shell sed -ne 's,@arch@,$(compat-arch-y),g' -re 's,^[?!][[:blank:]]+[^[:blank:]]+[[:blank:]]+,,p' $(srcdir)/xlat.lst | uniq)
 xlat-y := $(filter $(patsubst compat/%,%,$(headers-y)),$(xlat-y))
 
-$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf $(srcdir)/Makefile
-	cat $(filter %.h,$^) >$@.new
+quiet_cmd_xlat_h = GEN     $@
+cmd_xlat_h = \
+	cat $(filter %.h,$^) >$@.new; \
 	mv -f $@.new $@
 
+$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf FORCE
+	$(call if_changed,xlat_h)
+
 ifeq ($(XEN_TARGET_ARCH),$(XEN_COMPILE_ARCH))
 
 all: $(obj)/headers.chk $(obj)/headers99.chk $(obj)/headers++.chk
@@ -102,27 +129,31 @@ PUBLIC_C99_HEADERS := $(call public-filter-headers,public-c99-headers)
 $(src)/public/io/9pfs.h-prereq := string
 $(src)/public/io/pvcalls.h-prereq := string
 
-$(obj)/headers.chk: $(PUBLIC_ANSI_HEADERS) $(srcdir)/Makefile
+quiet_cmd_header_chk = CHK     $@
+cmd_header_chk = \
 	for i in $(filter %.h,$^); do \
 	    $(CC) -x c -ansi -Wall -Werror -include stdint.h \
 	          -S -o /dev/null $$i || exit 1; \
 	    echo $$i; \
-	done >$@.new
+	done >$@.new; \
 	mv $@.new $@
 
-$(obj)/headers99.chk: $(PUBLIC_C99_HEADERS) $(srcdir)/Makefile
-	rm -f $@.new
+quiet_cmd_headers99_chk = CHK     $@
+define cmd_headers99_chk
+	rm -f $@.new; \
 	$(foreach i, $(filter %.h,$^),                                        \
 	    echo "#include "\"$(i)\"                                          \
 	    | $(CC) -x c -std=c99 -Wall -Werror                               \
 	      -include stdint.h                                               \
 	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include $(j).h) \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;)
+	    || exit $$?; echo $(i) >> $@.new;) \
 	mv $@.new $@
+endef
 
-$(obj)/headers++.chk: $(PUBLIC_HEADERS) $(srcdir)/Makefile
-	rm -f $@.new
+quiet_cmd_headerscxx_chk = CHK     $@
+define cmd_headerscxx_chk
+	rm -f $@.new; \
 	if ! $(CXX) -v >/dev/null 2>&1; then                                  \
 	    touch $@.new;                                                     \
 	    exit 0;                                                           \
@@ -133,8 +164,21 @@ $(obj)/headers++.chk: $(PUBLIC_HEADERS) $(srcdir)/Makefile
 	      -include stdint.h -include $(srcdir)/public/xen.h               \
 	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include c$(j)) \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;)
+	    || exit $$?; echo $(i) >> $@.new;) \
 	mv $@.new $@
+endef
+
+targets += headers.chk
+$(obj)/headers.chk: $(PUBLIC_ANSI_HEADERS) FORCE
+	$(call if_changed,header_chk)
+
+targets += headers99.chk
+$(obj)/headers99.chk: $(PUBLIC_C99_HEADERS) FORCE
+	$(call if_changed,headers99_chk)
+
+targets += headers++.chk
+$(obj)/headers++.chk: $(PUBLIC_HEADERS) FORCE
+	$(call if_changed,headerscxx_chk)
 
 endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] IOMMU/x86: restrict IO-APIC mappings for PV Dom0
Message-Id: <E1o05KU-0000XO-AE@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:55:22 +0000

commit 7158e80c887d8b451c8525b7fe32049742814e69
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 8 17:02:19 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:02:19 2022 +0200

    IOMMU/x86: restrict IO-APIC mappings for PV Dom0
    
    While already the case for PVH, there's no reason to treat PV
    differently here, though of course the addresses get taken from another
    source in this case. Except that, to match CPU side mappings, by default
    we permit r/o ones. This then also means we now deal consistently with
    IO-APICs whose MMIO is or is not covered by E820 reserved regions.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/drivers/passthrough/x86/iommu.c | 59 +++++++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 19 deletions(-)

diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 616b66e755..0ba95473c9 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -13,6 +13,7 @@
  */
 
 #include <xen/sched.h>
+#include <xen/iocap.h>
 #include <xen/iommu.h>
 #include <xen/paging.h>
 #include <xen/guest_access.h>
@@ -275,12 +276,12 @@ void iommu_identity_map_teardown(struct domain *d)
     }
 }
 
-static bool __hwdom_init hwdom_iommu_map(const struct domain *d,
-                                         unsigned long pfn,
-                                         unsigned long max_pfn)
+static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
+                                                 unsigned long pfn,
+                                                 unsigned long max_pfn)
 {
     mfn_t mfn = _mfn(pfn);
-    unsigned int i, type;
+    unsigned int i, type, perms = IOMMUF_readable | IOMMUF_writable;
 
     /*
      * Set up 1:1 mapping for dom0. Default to include only conventional RAM
@@ -289,44 +290,60 @@ static bool __hwdom_init hwdom_iommu_map(const struct domain *d,
      * that fall in unusable ranges for PV Dom0.
      */
     if ( (pfn > max_pfn && !mfn_valid(mfn)) || xen_in_range(pfn) )
-        return false;
+        return 0;
 
     switch ( type = page_get_ram_type(mfn) )
     {
     case RAM_TYPE_UNUSABLE:
-        return false;
+        return 0;
 
     case RAM_TYPE_CONVENTIONAL:
         if ( iommu_hwdom_strict )
-            return false;
+            return 0;
         break;
 
     default:
         if ( type & RAM_TYPE_RESERVED )
         {
             if ( !iommu_hwdom_inclusive && !iommu_hwdom_reserved )
-                return false;
+                perms = 0;
         }
-        else if ( is_hvm_domain(d) || !iommu_hwdom_inclusive || pfn > max_pfn )
-            return false;
+        else if ( is_hvm_domain(d) )
+            return 0;
+        else if ( !iommu_hwdom_inclusive || pfn > max_pfn )
+            perms = 0;
     }
 
     /* Check that it doesn't overlap with the Interrupt Address Range. */
     if ( pfn >= 0xfee00 && pfn <= 0xfeeff )
-        return false;
+        return 0;
     /* ... or the IO-APIC */
-    for ( i = 0; has_vioapic(d) && i < d->arch.hvm.nr_vioapics; i++ )
-        if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )
-            return false;
+    if ( has_vioapic(d) )
+    {
+        for ( i = 0; i < d->arch.hvm.nr_vioapics; i++ )
+            if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )
+                return 0;
+    }
+    else if ( is_pv_domain(d) )
+    {
+        /*
+         * Be consistent with CPU mappings: Dom0 is permitted to establish r/o
+         * ones there (also for e.g. HPET in certain cases), so it should also
+         * have such established for IOMMUs.
+         */
+        if ( iomem_access_permitted(d, pfn, pfn) &&
+             rangeset_contains_singleton(mmio_ro_ranges, pfn) )
+            perms = IOMMUF_readable;
+    }
     /*
      * ... or the PCIe MCFG regions.
      * TODO: runtime added MMCFG regions are not checked to make sure they
      * don't overlap with already mapped regions, thus preventing trapping.
      */
     if ( has_vpci(d) && vpci_is_mmcfg_address(d, pfn_to_paddr(pfn)) )
-        return false;
+        return 0;
 
-    return true;
+    return perms;
 }
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
@@ -368,15 +385,19 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
     for ( ; i < top; i++ )
     {
         unsigned long pfn = pdx_to_pfn(i);
+        unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
         int rc;
 
-        if ( !hwdom_iommu_map(d, pfn, max_pfn) )
+        if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
-            rc = p2m_add_identity_entry(d, pfn, p2m_access_rw, 0);
+            rc = p2m_add_identity_entry(d, pfn,
+                                        perms & IOMMUF_writable ? p2m_access_rw
+                                                                : p2m_access_r,
+                                        0);
         else
             rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
-                           IOMMUF_readable | IOMMUF_writable, &flush_flags);
+                           perms, &flush_flags);
 
         if ( rc )
             printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] IOMMU/x86: perform PV Dom0 mappings in batches
Message-Id: <E1o05Ke-0000Xw-DJ@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:55:32 +0000

commit f3185c165d28901c3222becfc8be547263c53745
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 8 17:03:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 8 17:03:32 2022 +0200

    IOMMU/x86: perform PV Dom0 mappings in batches
    
    For large page mappings to be easily usable (i.e. in particular without
    un-shattering of smaller page mappings) and for mapping operations to
    then also be more efficient, pass batches of Dom0 memory to iommu_map().
    In dom0_construct_pv() and its helpers (covering strict mode) this
    additionally requires establishing the type of those pages (albeit with
    zero type references).
    
    The earlier establishing of PGT_writable_page | PGT_validated requires
    the existing places where this gets done (through get_page_and_type())
    to be updated: For pages which actually have a mapping, the type
    refcount needs to be 1.
    
    There is actually a related bug that gets fixed here as a side effect:
    Typically the last L1 table would get marked as such only after
    get_page_and_type(..., PGT_writable_page). While this is fine as far as
    refcounting goes, the page did remain mapped in the IOMMU in this case
    (when "iommu=dom0-strict").
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/pv/dom0_build.c        | 84 +++++++++++++++++++++++++++++++++----
 xen/drivers/passthrough/x86/iommu.c | 41 +++++++++++++-----
 2 files changed, 108 insertions(+), 17 deletions(-)

diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index e501979a86..04a4ea3c18 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -46,7 +46,8 @@ void __init dom0_update_physmap(bool compat, unsigned long pfn,
 static __init void mark_pv_pt_pages_rdonly(struct domain *d,
                                            l4_pgentry_t *l4start,
                                            unsigned long vpt_start,
-                                           unsigned long nr_pt_pages)
+                                           unsigned long nr_pt_pages,
+                                           unsigned int *flush_flags)
 {
     unsigned long count;
     struct page_info *page;
@@ -71,6 +72,14 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
         ASSERT((page->u.inuse.type_info & PGT_type_mask) <= PGT_root_page_table);
         ASSERT(!(page->u.inuse.type_info & ~(PGT_type_mask | PGT_pae_xen_l2)));
 
+        /*
+         * Page table pages need to be removed from the IOMMU again in case
+         * iommu_memory_setup() ended up mapping them.
+         */
+        if ( need_iommu_pt_sync(d) &&
+             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, flush_flags) )
+            BUG();
+
         /* Read-only mapping + PGC_allocated + page-table page. */
         page->count_info         = PGC_allocated | 3;
         page->u.inuse.type_info |= PGT_validated | 1;
@@ -107,11 +116,43 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
     unmap_domain_page(pl3e);
 }
 
+static void __init iommu_memory_setup(struct domain *d, const char *what,
+                                      struct page_info *page, unsigned long nr,
+                                      unsigned int *flush_flags)
+{
+    int rc;
+    mfn_t mfn = page_to_mfn(page);
+
+    if ( !need_iommu_pt_sync(d) )
+        return;
+
+    rc = iommu_map(d, _dfn(mfn_x(mfn)), mfn, nr,
+                   IOMMUF_readable | IOMMUF_writable, flush_flags);
+    if ( rc )
+    {
+        printk(XENLOG_ERR "pre-mapping %s MFN [%lx,%lx) into IOMMU failed: %d\n",
+               what, mfn_x(mfn), mfn_x(mfn) + nr, rc);
+        return;
+    }
+
+    /*
+     * For successfully established IOMMU mappings the type of the page(s)
+     * needs to match (for _get_page_type() to unmap upon type change). Set
+     * the page(s) to writable with no type ref.
+     */
+    for ( ; nr--; ++page )
+    {
+        ASSERT(!page->u.inuse.type_info);
+        page->u.inuse.type_info = PGT_writable_page | PGT_validated;
+    }
+}
+
 static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                     unsigned long v_start, unsigned long v_end,
                                     unsigned long vphysmap_start,
                                     unsigned long vphysmap_end,
-                                    unsigned long nr_pages)
+                                    unsigned long nr_pages,
+                                    unsigned int *flush_flags)
 {
     struct page_info *page = NULL;
     l4_pgentry_t *pl4e, *l4start = map_domain_page(_mfn(pgtbl_pfn));
@@ -177,6 +218,10 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L3_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
+                iommu_memory_setup(d, "P2M 1G", page,
+                                   SUPERPAGE_PAGES * SUPERPAGE_PAGES,
+                                   flush_flags);
+
                 *pl3e = l3e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L3_PAGETABLE_SHIFT;
                 continue;
@@ -203,6 +248,9 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L2_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
+                iommu_memory_setup(d, "P2M 2M", page, SUPERPAGE_PAGES,
+                                   flush_flags);
+
                 *pl2e = l2e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L2_PAGETABLE_SHIFT;
                 continue;
@@ -311,6 +359,7 @@ int __init dom0_construct_pv(struct domain *d,
     unsigned long initrd_pfn = -1, initrd_mfn = 0;
     unsigned long count;
     struct page_info *page = NULL;
+    unsigned int flush_flags = 0;
     start_info_t *si;
     struct vcpu *v = d->vcpu[0];
     void *image_base = bootstrap_map(image);
@@ -573,6 +622,9 @@ int __init dom0_construct_pv(struct domain *d,
                     BUG();
         }
         initrd->mod_end = 0;
+
+        iommu_memory_setup(d, "initrd", mfn_to_page(_mfn(initrd_mfn)),
+                           PFN_UP(initrd_len), &flush_flags);
     }
 
     printk("PHYSICAL MEMORY ARRANGEMENT:\n"
@@ -606,6 +658,13 @@ int __init dom0_construct_pv(struct domain *d,
 
     process_pending_softirqs();
 
+    /*
+     * Map the full range here and then punch holes for page tables
+     * alongside marking them as such in mark_pv_pt_pages_rdonly().
+     */
+    iommu_memory_setup(d, "init-alloc", mfn_to_page(_mfn(alloc_spfn)),
+                       alloc_epfn - alloc_spfn, &flush_flags);
+
     mpt_alloc = (vpt_start - v_start) + pfn_to_paddr(alloc_spfn);
     if ( vinitrd_start )
         mpt_alloc -= PAGE_ALIGN(initrd_len);
@@ -690,7 +749,8 @@ int __init dom0_construct_pv(struct domain *d,
         l1tab++;
 
         page = mfn_to_page(_mfn(mfn));
-        if ( !page->u.inuse.type_info &&
+        if ( (!page->u.inuse.type_info ||
+              page->u.inuse.type_info == (PGT_writable_page | PGT_validated)) &&
              !get_page_and_type(page, d, PGT_writable_page) )
             BUG();
     }
@@ -719,7 +779,7 @@ int __init dom0_construct_pv(struct domain *d,
     }
 
     /* Pages that are part of page tables must be read only. */
-    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages);
+    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages, &flush_flags);
 
     /* Mask all upcalls... */
     for ( i = 0; i < XEN_LEGACY_MAX_VCPUS; i++ )
@@ -794,7 +854,7 @@ int __init dom0_construct_pv(struct domain *d,
     {
         pfn = pagetable_get_pfn(v->arch.guest_table);
         setup_pv_physmap(d, pfn, v_start, v_end, vphysmap_start, vphysmap_end,
-                         nr_pages);
+                         nr_pages, &flush_flags);
     }
 
     /* Write the phys->machine and machine->phys table entries. */
@@ -825,7 +885,9 @@ int __init dom0_construct_pv(struct domain *d,
         if ( get_gpfn_from_mfn(mfn) >= count )
         {
             BUG_ON(compat);
-            if ( !page->u.inuse.type_info &&
+            if ( (!page->u.inuse.type_info ||
+                  page->u.inuse.type_info == (PGT_writable_page |
+                                              PGT_validated)) &&
                  !get_page_and_type(page, d, PGT_writable_page) )
                 BUG();
 
@@ -841,8 +903,12 @@ int __init dom0_construct_pv(struct domain *d,
 #endif
     while ( pfn < nr_pages )
     {
-        if ( (page = alloc_chunk(d, nr_pages - domain_tot_pages(d))) == NULL )
+        count = domain_tot_pages(d);
+        if ( (page = alloc_chunk(d, nr_pages - count)) == NULL )
             panic("Not enough RAM for DOM0 reservation\n");
+
+        iommu_memory_setup(d, "chunk", page, domain_tot_pages(d) - count,
+                           &flush_flags);
         while ( pfn < domain_tot_pages(d) )
         {
             mfn = mfn_x(page_to_mfn(page));
@@ -857,6 +923,10 @@ int __init dom0_construct_pv(struct domain *d,
         }
     }
 
+    /* Use while() to avoid compiler warning. */
+    while ( iommu_iotlb_flush_all(d, flush_flags) )
+        break;
+
     if ( initrd_len != 0 )
     {
         si->mod_start = vinitrd_start ?: initrd_pfn;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 0ba95473c9..11a4f244e4 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -348,8 +348,8 @@ static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 {
-    unsigned long i, top, max_pfn;
-    unsigned int flush_flags = 0;
+    unsigned long i, top, max_pfn, start, count;
+    unsigned int flush_flags = 0, start_perms = 0;
 
     BUG_ON(!is_hardware_domain(d));
 
@@ -380,9 +380,9 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
      * First Mb will get mapped in one go by pvh_populate_p2m(). Avoid
      * setting up potentially conflicting mappings here.
      */
-    i = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
+    start = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
 
-    for ( ; i < top; i++ )
+    for ( i = start, count = 0; i < top; )
     {
         unsigned long pfn = pdx_to_pfn(i);
         unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
@@ -391,20 +391,41 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
         if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
+        {
             rc = p2m_add_identity_entry(d, pfn,
                                         perms & IOMMUF_writable ? p2m_access_rw
                                                                 : p2m_access_r,
                                         0);
+            if ( rc )
+                printk(XENLOG_WARNING
+                       "%pd: identity mapping of %lx failed: %d\n",
+                       d, pfn, rc);
+        }
+        else if ( pfn != start + count || perms != start_perms )
+        {
+        commit:
+            rc = iommu_map(d, _dfn(start), _mfn(start), count, start_perms,
+                           &flush_flags);
+            if ( rc )
+                printk(XENLOG_WARNING
+                       "%pd: IOMMU identity mapping of [%lx,%lx) failed: %d\n",
+                       d, pfn, pfn + count, rc);
+            SWAP(start, pfn);
+            start_perms = perms;
+            count = 1;
+        }
         else
-            rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
-                           perms, &flush_flags);
+        {
+            ++count;
+            rc = 0;
+        }
 
-        if ( rc )
-            printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
-                   d, !paging_mode_translate(d) ? "IOMMU " : "", pfn, rc);
 
-        if (!(i & 0xfffff))
+        if ( !(++i & 0xfffff) )
             process_pending_softirqs();
+
+        if ( i == top && count )
+            goto commit;
     }
 
     /* Use if to avoid compiler warning */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] SUPPORT.md: extend security support for x86 hosts to 12 TiB of memory
Message-Id: <E1o05Ko-0000YQ-GN@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:55:42 +0000

commit 8dac2928c2c1160c00dea65f9beb07656d249f3c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:54:01 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:54:01 2022 +0200

    SUPPORT.md: extend security support for x86 hosts to 12 TiB of memory
    
    c49ee0329ff3 ("SUPPORT.md: limit security support for hosts with very
    much memory"), as a result of XSA-385, restricted security support to
    8 TiB of host memory. While subsequently further restricted for Arm,
    extend this to 12 TiB on x86, putting in place a guest restriction to
    8 TiB (or yet less for Arm) in exchange.
    
    A 12 TiB x86 host was certified successfully for use with Xen 4.14 as
    per https://www.suse.com/nbswebapp/yesBulletin.jsp?bulletinNumber=150753.
    This in particular included running as many guests (2 TiB each) as
    possible in parallel, to actually prove that all the memory can be used
    like this. It may be relevant to note that the Optane memory there was
    used in memory-only mode, with DRAM acting as cache.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: George Dunlap <george.dunlap@citrix.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 SUPPORT.md | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/SUPPORT.md b/SUPPORT.md
index ee2cd319e2..70e98964cb 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -50,7 +50,7 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075.
 
 ### Physical Memory
 
-    Status, x86: Supported up to 8 TiB. Hosts with more memory are supported, but not security supported.
+    Status, x86: Supported up to 12 TiB. Hosts with more memory are supported, but not security supported.
     Status, Arm32: Supported up to 12 GiB
     Status, Arm64: Supported up to 2 TiB
 
@@ -121,6 +121,14 @@ ARM only has one guest type at the moment
 
     Status: Supported
 
+## Guest Limits
+
+### Memory
+
+    Status, x86: Supported up to 8 TiB. Guests with more memory, but less than 16 TiB, are supported, but not security supported.
+    Status, Arm32: Supported up to 12 GiB
+    Status, Arm64: Supported up to 1 TiB
+
 ## Hypervisor file system
 
 ### Build info
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] IOMMU: fold flush-all hook into "flush one"
Message-Id: <E1o05Ky-0000Yt-Ke@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:55:52 +0000

commit 79faa321f2f31d7794604007a290fb6c8fc05035
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:54:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:54:30 2022 +0200

    IOMMU: fold flush-all hook into "flush one"
    
    Having a separate flush-all hook has always been puzzling me some. We
    will want to be able to force a full flush via accumulated flush flags
    from the map/unmap functions. Introduce a respective new flag and fold
    all flush handling to use the single remaining hook.
    
    Note that because of the respective comments in SMMU and IPMMU-VMSA
    code, I've folded the two prior hook functions into one. For SMMU-v3,
    which lacks a comment towards incapable hardware, I've left both
    functions in place on the assumption that selective and full flushes
    will eventually want separating.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> # IPMMU-VMSA, SMMU-V2
    Reviewed-by: Rahul Singh <rahul.singh@arm.com> # SMMUv3
    Acked-by: Julien Grall <jgrall@amazon.com> # Arm
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
---
 xen/drivers/passthrough/amd/iommu.h         |  1 -
 xen/drivers/passthrough/amd/iommu_map.c     | 18 +++++++-----------
 xen/drivers/passthrough/amd/pci_amd_iommu.c |  1 -
 xen/drivers/passthrough/arm/ipmmu-vmsa.c    | 19 +++++++------------
 xen/drivers/passthrough/arm/smmu-v3.c       |  1 -
 xen/drivers/passthrough/arm/smmu.c          | 19 +++++++------------
 xen/drivers/passthrough/iommu.c             |  9 +++------
 xen/drivers/passthrough/vtd/iommu.c         | 18 ++++++++++--------
 xen/include/xen/iommu.h                     |  3 ++-
 9 files changed, 36 insertions(+), 53 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index a05dd112bc..8bc3c35b1b 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -258,7 +258,6 @@ int cf_check amd_iommu_get_reserved_device_memory(
 int __must_check cf_check amd_iommu_flush_iotlb_pages(
     struct domain *d, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags);
-int __must_check cf_check amd_iommu_flush_iotlb_all(struct domain *d);
 void amd_iommu_print_entries(const struct amd_iommu *iommu, unsigned int dev_id,
                              dfn_t dfn);
 
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index 9dbd44812d..28da5cc85e 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -506,15 +506,18 @@ int cf_check amd_iommu_flush_iotlb_pages(
 {
     unsigned long dfn_l = dfn_x(dfn);
 
-    ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-    ASSERT(flush_flags);
+    if ( !(flush_flags & IOMMU_FLUSHF_all) )
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
 
     /* Unless a PTE was modified, no flush is required */
     if ( !(flush_flags & IOMMU_FLUSHF_modified) )
         return 0;
 
-    /* If the range wraps then just flush everything */
-    if ( dfn_l + page_count < dfn_l )
+    /* If so requested or if the range wraps then just flush everything. */
+    if ( (flush_flags & IOMMU_FLUSHF_all) || dfn_l + page_count < dfn_l )
     {
         amd_iommu_flush_all_pages(d);
         return 0;
@@ -540,13 +543,6 @@ int cf_check amd_iommu_flush_iotlb_pages(
     return 0;
 }
 
-int cf_check amd_iommu_flush_iotlb_all(struct domain *d)
-{
-    amd_iommu_flush_all_pages(d);
-
-    return 0;
-}
-
 int amd_iommu_reserve_domain_unity_map(struct domain *d,
                                        const struct ivrs_unity_map *map,
                                        unsigned int flag)
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 4bf87e8c03..fd91f1367f 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -759,7 +759,6 @@ static const struct iommu_ops __initconst_cf_clobber _iommu_ops = {
     .map_page = amd_iommu_map_page,
     .unmap_page = amd_iommu_unmap_page,
     .iotlb_flush = amd_iommu_flush_iotlb_pages,
-    .iotlb_flush_all = amd_iommu_flush_iotlb_all,
     .reassign_device = reassign_device,
     .get_device_group_id = amd_iommu_group_id,
     .enable_x2apic = iov_enable_xt,
diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
index 5a7b332bcc..091f09b217 100644
--- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c
+++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c
@@ -1000,13 +1000,19 @@ out:
 }
 
 /* Xen IOMMU ops */
-static int __must_check ipmmu_iotlb_flush_all(struct domain *d)
+static int __must_check ipmmu_iotlb_flush(struct domain *d, dfn_t dfn,
+                                          unsigned long page_count,
+                                          unsigned int flush_flags)
 {
     struct ipmmu_vmsa_xen_domain *xen_domain = dom_iommu(d)->arch.priv;
 
+    ASSERT(flush_flags);
+
     if ( !xen_domain || !xen_domain->root_domain )
         return 0;
 
+    /* The hardware doesn't support selective TLB flush. */
+
     spin_lock(&xen_domain->lock);
     ipmmu_tlb_invalidate(xen_domain->root_domain);
     spin_unlock(&xen_domain->lock);
@@ -1014,16 +1020,6 @@ static int __must_check ipmmu_iotlb_flush_all(struct domain *d)
     return 0;
 }
 
-static int __must_check ipmmu_iotlb_flush(struct domain *d, dfn_t dfn,
-                                          unsigned long page_count,
-                                          unsigned int flush_flags)
-{
-    ASSERT(flush_flags);
-
-    /* The hardware doesn't support selective TLB flush. */
-    return ipmmu_iotlb_flush_all(d);
-}
-
 static struct ipmmu_vmsa_domain *ipmmu_get_cache_domain(struct domain *d,
                                                         struct device *dev)
 {
@@ -1360,7 +1356,6 @@ static const struct iommu_ops ipmmu_iommu_ops =
     .hwdom_init      = arch_iommu_hwdom_init,
     .teardown        = ipmmu_iommu_domain_teardown,
     .iotlb_flush     = ipmmu_iotlb_flush,
-    .iotlb_flush_all = ipmmu_iotlb_flush_all,
     .assign_device   = ipmmu_assign_device,
     .reassign_device = ipmmu_reassign_device,
     .map_page        = arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index 2822ffe05f..1e857f915a 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -3416,7 +3416,6 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
 	.hwdom_init		= arch_iommu_hwdom_init,
 	.teardown		= arm_smmu_iommu_xen_domain_teardown,
 	.iotlb_flush		= arm_smmu_iotlb_flush,
-	.iotlb_flush_all	= arm_smmu_iotlb_flush_all,
 	.assign_device		= arm_smmu_assign_dev,
 	.reassign_device	= arm_smmu_reassign_dev,
 	.map_page		= arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
index c21c4f3ac0..69511683b4 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -2648,11 +2648,17 @@ static int force_stage = 2;
  */
 static u32 platform_features = ARM_SMMU_FEAT_COHERENT_WALK;
 
-static int __must_check arm_smmu_iotlb_flush_all(struct domain *d)
+static int __must_check arm_smmu_iotlb_flush(struct domain *d, dfn_t dfn,
+					     unsigned long page_count,
+					     unsigned int flush_flags)
 {
 	struct arm_smmu_xen_domain *smmu_domain = dom_iommu(d)->arch.priv;
 	struct iommu_domain *cfg;
 
+	ASSERT(flush_flags);
+
+	/* ARM SMMU v1 doesn't have flush by VMA and VMID */
+
 	spin_lock(&smmu_domain->lock);
 	list_for_each_entry(cfg, &smmu_domain->contexts, list) {
 		/*
@@ -2669,16 +2675,6 @@ static int __must_check arm_smmu_iotlb_flush_all(struct domain *d)
 	return 0;
 }
 
-static int __must_check arm_smmu_iotlb_flush(struct domain *d, dfn_t dfn,
-					     unsigned long page_count,
-					     unsigned int flush_flags)
-{
-	ASSERT(flush_flags);
-
-	/* ARM SMMU v1 doesn't have flush by VMA and VMID */
-	return arm_smmu_iotlb_flush_all(d);
-}
-
 static struct iommu_domain *arm_smmu_get_domain(struct domain *d,
 						struct device *dev)
 {
@@ -2863,7 +2859,6 @@ static const struct iommu_ops arm_smmu_iommu_ops = {
     .add_device = arm_smmu_dt_add_device_generic,
     .teardown = arm_smmu_iommu_domain_teardown,
     .iotlb_flush = arm_smmu_iotlb_flush,
-    .iotlb_flush_all = arm_smmu_iotlb_flush_all,
     .assign_device = arm_smmu_assign_dev,
     .reassign_device = arm_smmu_reassign_dev,
     .map_page = arm_iommu_map_page,
diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 9393d987c7..75df3aa8dd 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -478,15 +478,12 @@ int iommu_iotlb_flush_all(struct domain *d, unsigned int flush_flags)
     const struct domain_iommu *hd = dom_iommu(d);
     int rc;
 
-    if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush_all ||
+    if ( !is_iommu_enabled(d) || !hd->platform_ops->iotlb_flush ||
          !flush_flags )
         return 0;
 
-    /*
-     * The operation does a full flush so we don't need to pass the
-     * flush_flags in.
-     */
-    rc = iommu_call(hd->platform_ops, iotlb_flush_all, d);
+    rc = iommu_call(hd->platform_ops, iotlb_flush, d, INVALID_DFN, 0,
+                    flush_flags | IOMMU_FLUSHF_all);
     if ( unlikely(rc) )
     {
         if ( !d->is_shutting_down && printk_ratelimit() )
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 6d9513ef41..2acacc3679 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -772,18 +772,21 @@ static int __must_check cf_check iommu_flush_iotlb_pages(
     struct domain *d, dfn_t dfn, unsigned long page_count,
     unsigned int flush_flags)
 {
-    ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-    ASSERT(flush_flags);
+    if ( flush_flags & IOMMU_FLUSHF_all )
+    {
+        dfn = INVALID_DFN;
+        page_count = 0;
+    }
+    else
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
 
     return iommu_flush_iotlb(d, dfn, flush_flags & IOMMU_FLUSHF_modified,
                              page_count);
 }
 
-static int __must_check cf_check iommu_flush_iotlb_all(struct domain *d)
-{
-    return iommu_flush_iotlb(d, INVALID_DFN, 0, 0);
-}
-
 /* clear one page's page table */
 static int dma_pte_clear_one(struct domain *domain, daddr_t addr,
                              unsigned int order,
@@ -3145,7 +3148,6 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .resume = vtd_resume,
     .crash_shutdown = vtd_crash_shutdown,
     .iotlb_flush = iommu_flush_iotlb_pages,
-    .iotlb_flush_all = iommu_flush_iotlb_all,
     .get_reserved_device_memory = intel_iommu_get_reserved_device_memory,
     .dump_page_tables = vtd_dump_page_tables,
 };
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index e0f82712ed..79529adf1f 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -147,9 +147,11 @@ enum
 {
     _IOMMU_FLUSHF_added,
     _IOMMU_FLUSHF_modified,
+    _IOMMU_FLUSHF_all,
 };
 #define IOMMU_FLUSHF_added (1u << _IOMMU_FLUSHF_added)
 #define IOMMU_FLUSHF_modified (1u << _IOMMU_FLUSHF_modified)
+#define IOMMU_FLUSHF_all (1u << _IOMMU_FLUSHF_all)
 
 int __must_check iommu_map(struct domain *d, dfn_t dfn, mfn_t mfn,
                            unsigned long page_count, unsigned int flags,
@@ -281,7 +283,6 @@ struct iommu_ops {
     int __must_check (*iotlb_flush)(struct domain *d, dfn_t dfn,
                                     unsigned long page_count,
                                     unsigned int flush_flags);
-    int __must_check (*iotlb_flush_all)(struct domain *d);
     int (*get_reserved_device_memory)(iommu_grdm_t *, void *);
     void (*dump_page_tables)(struct domain *d);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] VT-d: fold iommu_flush_iotlb{,_pages}()
Message-Id: <E1o05L8-0000Zd-Ns@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:02 +0000

commit 59fbdf8a3667ce42c1cf70c94c3bcd0451afd4d8
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 9 10:56:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 10:56:08 2022 +0200

    VT-d: fold iommu_flush_iotlb{,_pages}()
    
    With iommu_flush_iotlb_all() gone, iommu_flush_iotlb_pages() is merely a
    wrapper around the not otherwise called iommu_flush_iotlb(). Fold both
    functions.
    
    No functional change intended.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/drivers/passthrough/vtd/iommu.c | 40 +++++++++++++++----------------------
 1 file changed, 16 insertions(+), 24 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 2acacc3679..f1e91b3d18 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -719,9 +719,9 @@ static int __must_check iommu_flush_all(void)
     return rc;
 }
 
-static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
-                                          bool_t dma_old_pte_present,
-                                          unsigned long page_count)
+static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
+                                                   unsigned long page_count,
+                                                   unsigned int flush_flags)
 {
     struct domain_iommu *hd = dom_iommu(d);
     struct acpi_drhd_unit *drhd;
@@ -730,6 +730,17 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
     int iommu_domid;
     int ret = 0;
 
+    if ( flush_flags & IOMMU_FLUSHF_all )
+    {
+        dfn = INVALID_DFN;
+        page_count = 0;
+    }
+    else
+    {
+        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
+        ASSERT(flush_flags);
+    }
+
     /*
      * No need pcideves_lock here because we have flush
      * when assign/deassign device
@@ -756,7 +767,7 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
             rc = iommu_flush_iotlb_psi(iommu, iommu_domid,
                                        dfn_to_daddr(dfn),
                                        get_order_from_pages(page_count),
-                                       !dma_old_pte_present,
+                                       !(flush_flags & IOMMU_FLUSHF_modified),
                                        flush_dev_iotlb);
 
         if ( rc > 0 )
@@ -768,25 +779,6 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn,
     return ret;
 }
 
-static int __must_check cf_check iommu_flush_iotlb_pages(
-    struct domain *d, dfn_t dfn, unsigned long page_count,
-    unsigned int flush_flags)
-{
-    if ( flush_flags & IOMMU_FLUSHF_all )
-    {
-        dfn = INVALID_DFN;
-        page_count = 0;
-    }
-    else
-    {
-        ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN));
-        ASSERT(flush_flags);
-    }
-
-    return iommu_flush_iotlb(d, dfn, flush_flags & IOMMU_FLUSHF_modified,
-                             page_count);
-}
-
 /* clear one page's page table */
 static int dma_pte_clear_one(struct domain *domain, daddr_t addr,
                              unsigned int order,
@@ -3147,7 +3139,7 @@ static const struct iommu_ops __initconst_cf_clobber vtd_ops = {
     .suspend = vtd_suspend,
     .resume = vtd_resume,
     .crash_shutdown = vtd_crash_shutdown,
-    .iotlb_flush = iommu_flush_iotlb_pages,
+    .iotlb_flush = iommu_flush_iotlb,
     .get_reserved_device_memory = intel_iommu_get_reserved_device_memory,
     .dump_page_tables = vtd_dump_page_tables,
 };
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/pv: Clean up _get_page_type()
Message-Id: <E1o05LI-0000ae-Qv@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:12 +0000

commit 9186e96b199e4f7e52e033b238f9fe869afb69c7
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:20:36 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:20:36 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 04d5ec705d..6434900aa7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2935,16 +2935,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2952,8 +2953,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2964,8 +2972,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2977,7 +2985,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -3008,7 +3016,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -3027,18 +3042,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3087,6 +3130,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1o05LS-0000b7-U0@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:22 +0000

commit 8cc5036bc385112a82f1faff27a0970e6440dfed
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:21:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:21:04 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 6434900aa7..34bb9dddab 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2962,56 +2962,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_NO_ASSIST
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3092,6 +3048,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_NO_ASSIST
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3120,13 +3126,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1o05Ld-0000bY-0x@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:33 +0000

commit 1be8707c75bf4ba68447c74e1618b521dd432499
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:21:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:21:38 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/page.h | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h
index 447491cd09..b585235d06 100644
--- a/xen/arch/x86/include/asm/page.h
+++ b/xen/arch/x86/include/asm/page.h
@@ -331,6 +331,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -349,10 +357,10 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_WT      (__PAGE_HYPERVISOR | _PAGE_PWT)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_HYPERVISOR_WC      (__PAGE_HYPERVISOR | _PAGE_PAT)
+#define __PAGE_HYPERVISOR_WT      (__PAGE_HYPERVISOR | _PAGE_WT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
+#define __PAGE_HYPERVISOR_WC      (__PAGE_HYPERVISOR | _PAGE_WC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86: Don't change the cacheability of the directmap
Message-Id: <E1o05Ln-0000c2-4D@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:43 +0000

commit ae09597da34aee6bc5b76475c5eea6994457e854
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:22:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:22:08 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
---
 xen/arch/x86/include/asm/mm.h | 23 +++++-------
 xen/arch/x86/mm.c             | 85 ++++---------------------------------------
 2 files changed, 17 insertions(+), 91 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index f2f7b6902c..605c101528 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted (see below for caveats) */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 34bb9dddab..2b5f5b553d 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -808,29 +808,6 @@ bool is_memory_hole(mfn_t start, mfn_t end)
     return true;
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-                 mfn <  PFN_UP(xen_phys_start + (unsigned long)__2M_rwdata_end -
-                               XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1038,47 +1015,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2496,24 +2440,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1o05Lx-0000cV-7L@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:56:53 +0000

commit 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:22:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:22:38 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/flushtlb.c          | 60 ++++++++++++++++++++++++++--------------
 xen/arch/x86/include/asm/cache.h |  1 +
 xen/common/grant_table.c         |  4 +--
 3 files changed, 42 insertions(+), 23 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c5a1de443..471b3e31c4 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -235,7 +235,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -245,12 +245,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input("ds; clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,7 +260,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
-void cache_writeback(const void *addr, unsigned int size)
+void cache_flush(const void *addr, unsigned int size)
 {
     /*
      * This function may be called before current_cpu_data is established.
@@ -274,6 +269,38 @@ void cache_writeback(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -296,24 +323,15 @@ void cache_writeback(const void *addr, unsigned int size)
 #else
 # define INPUT(addr) "a" (addr), BASE_INPUT(addr)
 #endif
-        /*
-         * Note regarding the "ds" prefix use: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2("ds; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
 #undef INPUT
 #undef BASE_INPUT
 #undef CLWB_ENCODING
     }
 
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
+    asm volatile ("sfence" ::: "memory");
 }
 
 unsigned int guest_flush_tlb_flags(const struct domain *d)
diff --git a/xen/arch/x86/include/asm/cache.h b/xen/arch/x86/include/asm/cache.h
index 424dc5b7b9..e4770efb22 100644
--- a/xen/arch/x86/include/asm/cache.h
+++ b/xen/arch/x86/include/asm/cache.h
@@ -13,6 +13,7 @@
 
 #ifndef __ASSEMBLY__
 
+void cache_flush(const void *addr, unsigned int size);
 void cache_writeback(const void *addr, unsigned int size);
 
 #endif
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index febbe12eab..3918e6de6b 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3447,7 +3447,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3541,7 +3541,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1o05M7-0000dF-CA@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:03 +0000

commit 062868a5a8b428b85db589fa9a6d6e43969ffeb9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:23:07 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:23:07 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/cpu/amd.c                 |  8 ++++++++
 xen/arch/x86/flushtlb.c                | 13 ++++++++++++-
 xen/arch/x86/include/asm/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 4999f8be2b..94b9e31016 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -812,6 +812,14 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 471b3e31c4..18748b2bc8 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -260,6 +260,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -269,6 +276,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -284,7 +293,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index 7413febd7a..ff3157d52d 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -47,6 +47,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
 #define X86_BUG_NULL_SEG          X86_BUG( 1) /* NULL-ing a selector preserves the base and limit. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1o05MH-0000fI-FP@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:13 +0000

commit c1c9cae3a9633054b177c5de21ad7268162b2f2c
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 14:23:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 14:23:37 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/mm.h |  6 +++++-
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 605c101528..07b59c982b 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 2b5f5b553d..94f6ae9ae7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -1025,6 +1025,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2482,6 +2491,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3055,6 +3077,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1o05MR-0000fn-Ib@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:23 +0000

commit c2095ac76be0f4a1940346c9ffb49fb967345060
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:21:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:21:06 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 94f6ae9ae7..4f749fd888 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2956,7 +2956,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] Revert "IOMMU/x86: perform PV Dom0 mappings in batches"
Message-Id: <E1o05Mb-0000gG-Lj@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:33 +0000

commit 81a739a99300ea325caedf696741c9814c5318f6
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:22:00 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:22:00 2022 +0200

    Revert "IOMMU/x86: perform PV Dom0 mappings in batches"
    
    This reverts commit f3185c165d28901c3222becfc8be547263c53745.
    That change require preemption checking to first be in place in
    iommu_{,un}map().
---
 xen/arch/x86/pv/dom0_build.c        | 84 ++++---------------------------------
 xen/drivers/passthrough/x86/iommu.c | 41 +++++-------------
 2 files changed, 17 insertions(+), 108 deletions(-)

diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 04a4ea3c18..e501979a86 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -46,8 +46,7 @@ void __init dom0_update_physmap(bool compat, unsigned long pfn,
 static __init void mark_pv_pt_pages_rdonly(struct domain *d,
                                            l4_pgentry_t *l4start,
                                            unsigned long vpt_start,
-                                           unsigned long nr_pt_pages,
-                                           unsigned int *flush_flags)
+                                           unsigned long nr_pt_pages)
 {
     unsigned long count;
     struct page_info *page;
@@ -72,14 +71,6 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
         ASSERT((page->u.inuse.type_info & PGT_type_mask) <= PGT_root_page_table);
         ASSERT(!(page->u.inuse.type_info & ~(PGT_type_mask | PGT_pae_xen_l2)));
 
-        /*
-         * Page table pages need to be removed from the IOMMU again in case
-         * iommu_memory_setup() ended up mapping them.
-         */
-        if ( need_iommu_pt_sync(d) &&
-             iommu_unmap(d, _dfn(mfn_x(page_to_mfn(page))), 1, flush_flags) )
-            BUG();
-
         /* Read-only mapping + PGC_allocated + page-table page. */
         page->count_info         = PGC_allocated | 3;
         page->u.inuse.type_info |= PGT_validated | 1;
@@ -116,43 +107,11 @@ static __init void mark_pv_pt_pages_rdonly(struct domain *d,
     unmap_domain_page(pl3e);
 }
 
-static void __init iommu_memory_setup(struct domain *d, const char *what,
-                                      struct page_info *page, unsigned long nr,
-                                      unsigned int *flush_flags)
-{
-    int rc;
-    mfn_t mfn = page_to_mfn(page);
-
-    if ( !need_iommu_pt_sync(d) )
-        return;
-
-    rc = iommu_map(d, _dfn(mfn_x(mfn)), mfn, nr,
-                   IOMMUF_readable | IOMMUF_writable, flush_flags);
-    if ( rc )
-    {
-        printk(XENLOG_ERR "pre-mapping %s MFN [%lx,%lx) into IOMMU failed: %d\n",
-               what, mfn_x(mfn), mfn_x(mfn) + nr, rc);
-        return;
-    }
-
-    /*
-     * For successfully established IOMMU mappings the type of the page(s)
-     * needs to match (for _get_page_type() to unmap upon type change). Set
-     * the page(s) to writable with no type ref.
-     */
-    for ( ; nr--; ++page )
-    {
-        ASSERT(!page->u.inuse.type_info);
-        page->u.inuse.type_info = PGT_writable_page | PGT_validated;
-    }
-}
-
 static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                     unsigned long v_start, unsigned long v_end,
                                     unsigned long vphysmap_start,
                                     unsigned long vphysmap_end,
-                                    unsigned long nr_pages,
-                                    unsigned int *flush_flags)
+                                    unsigned long nr_pages)
 {
     struct page_info *page = NULL;
     l4_pgentry_t *pl4e, *l4start = map_domain_page(_mfn(pgtbl_pfn));
@@ -218,10 +177,6 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L3_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
-                iommu_memory_setup(d, "P2M 1G", page,
-                                   SUPERPAGE_PAGES * SUPERPAGE_PAGES,
-                                   flush_flags);
-
                 *pl3e = l3e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L3_PAGETABLE_SHIFT;
                 continue;
@@ -248,9 +203,6 @@ static __init void setup_pv_physmap(struct domain *d, unsigned long pgtbl_pfn,
                                              L2_PAGETABLE_SHIFT - PAGE_SHIFT,
                                              MEMF_no_scrub)) != NULL )
             {
-                iommu_memory_setup(d, "P2M 2M", page, SUPERPAGE_PAGES,
-                                   flush_flags);
-
                 *pl2e = l2e_from_page(page, L1_PROT|_PAGE_DIRTY|_PAGE_PSE);
                 vphysmap_start += 1UL << L2_PAGETABLE_SHIFT;
                 continue;
@@ -359,7 +311,6 @@ int __init dom0_construct_pv(struct domain *d,
     unsigned long initrd_pfn = -1, initrd_mfn = 0;
     unsigned long count;
     struct page_info *page = NULL;
-    unsigned int flush_flags = 0;
     start_info_t *si;
     struct vcpu *v = d->vcpu[0];
     void *image_base = bootstrap_map(image);
@@ -622,9 +573,6 @@ int __init dom0_construct_pv(struct domain *d,
                     BUG();
         }
         initrd->mod_end = 0;
-
-        iommu_memory_setup(d, "initrd", mfn_to_page(_mfn(initrd_mfn)),
-                           PFN_UP(initrd_len), &flush_flags);
     }
 
     printk("PHYSICAL MEMORY ARRANGEMENT:\n"
@@ -658,13 +606,6 @@ int __init dom0_construct_pv(struct domain *d,
 
     process_pending_softirqs();
 
-    /*
-     * Map the full range here and then punch holes for page tables
-     * alongside marking them as such in mark_pv_pt_pages_rdonly().
-     */
-    iommu_memory_setup(d, "init-alloc", mfn_to_page(_mfn(alloc_spfn)),
-                       alloc_epfn - alloc_spfn, &flush_flags);
-
     mpt_alloc = (vpt_start - v_start) + pfn_to_paddr(alloc_spfn);
     if ( vinitrd_start )
         mpt_alloc -= PAGE_ALIGN(initrd_len);
@@ -749,8 +690,7 @@ int __init dom0_construct_pv(struct domain *d,
         l1tab++;
 
         page = mfn_to_page(_mfn(mfn));
-        if ( (!page->u.inuse.type_info ||
-              page->u.inuse.type_info == (PGT_writable_page | PGT_validated)) &&
+        if ( !page->u.inuse.type_info &&
              !get_page_and_type(page, d, PGT_writable_page) )
             BUG();
     }
@@ -779,7 +719,7 @@ int __init dom0_construct_pv(struct domain *d,
     }
 
     /* Pages that are part of page tables must be read only. */
-    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages, &flush_flags);
+    mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages);
 
     /* Mask all upcalls... */
     for ( i = 0; i < XEN_LEGACY_MAX_VCPUS; i++ )
@@ -854,7 +794,7 @@ int __init dom0_construct_pv(struct domain *d,
     {
         pfn = pagetable_get_pfn(v->arch.guest_table);
         setup_pv_physmap(d, pfn, v_start, v_end, vphysmap_start, vphysmap_end,
-                         nr_pages, &flush_flags);
+                         nr_pages);
     }
 
     /* Write the phys->machine and machine->phys table entries. */
@@ -885,9 +825,7 @@ int __init dom0_construct_pv(struct domain *d,
         if ( get_gpfn_from_mfn(mfn) >= count )
         {
             BUG_ON(compat);
-            if ( (!page->u.inuse.type_info ||
-                  page->u.inuse.type_info == (PGT_writable_page |
-                                              PGT_validated)) &&
+            if ( !page->u.inuse.type_info &&
                  !get_page_and_type(page, d, PGT_writable_page) )
                 BUG();
 
@@ -903,12 +841,8 @@ int __init dom0_construct_pv(struct domain *d,
 #endif
     while ( pfn < nr_pages )
     {
-        count = domain_tot_pages(d);
-        if ( (page = alloc_chunk(d, nr_pages - count)) == NULL )
+        if ( (page = alloc_chunk(d, nr_pages - domain_tot_pages(d))) == NULL )
             panic("Not enough RAM for DOM0 reservation\n");
-
-        iommu_memory_setup(d, "chunk", page, domain_tot_pages(d) - count,
-                           &flush_flags);
         while ( pfn < domain_tot_pages(d) )
         {
             mfn = mfn_x(page_to_mfn(page));
@@ -923,10 +857,6 @@ int __init dom0_construct_pv(struct domain *d,
         }
     }
 
-    /* Use while() to avoid compiler warning. */
-    while ( iommu_iotlb_flush_all(d, flush_flags) )
-        break;
-
     if ( initrd_len != 0 )
     {
         si->mod_start = vinitrd_start ?: initrd_pfn;
diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index 11a4f244e4..0ba95473c9 100644
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -348,8 +348,8 @@ static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d,
 
 void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
 {
-    unsigned long i, top, max_pfn, start, count;
-    unsigned int flush_flags = 0, start_perms = 0;
+    unsigned long i, top, max_pfn;
+    unsigned int flush_flags = 0;
 
     BUG_ON(!is_hardware_domain(d));
 
@@ -380,9 +380,9 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
      * First Mb will get mapped in one go by pvh_populate_p2m(). Avoid
      * setting up potentially conflicting mappings here.
      */
-    start = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
+    i = paging_mode_translate(d) ? PFN_DOWN(MB(1)) : 0;
 
-    for ( i = start, count = 0; i < top; )
+    for ( ; i < top; i++ )
     {
         unsigned long pfn = pdx_to_pfn(i);
         unsigned int perms = hwdom_iommu_map(d, pfn, max_pfn);
@@ -391,41 +391,20 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
         if ( !perms )
             rc = 0;
         else if ( paging_mode_translate(d) )
-        {
             rc = p2m_add_identity_entry(d, pfn,
                                         perms & IOMMUF_writable ? p2m_access_rw
                                                                 : p2m_access_r,
                                         0);
-            if ( rc )
-                printk(XENLOG_WARNING
-                       "%pd: identity mapping of %lx failed: %d\n",
-                       d, pfn, rc);
-        }
-        else if ( pfn != start + count || perms != start_perms )
-        {
-        commit:
-            rc = iommu_map(d, _dfn(start), _mfn(start), count, start_perms,
-                           &flush_flags);
-            if ( rc )
-                printk(XENLOG_WARNING
-                       "%pd: IOMMU identity mapping of [%lx,%lx) failed: %d\n",
-                       d, pfn, pfn + count, rc);
-            SWAP(start, pfn);
-            start_perms = perms;
-            count = 1;
-        }
         else
-        {
-            ++count;
-            rc = 0;
-        }
+            rc = iommu_map(d, _dfn(pfn), _mfn(pfn), 1ul << PAGE_ORDER_4K,
+                           perms, &flush_flags);
 
+        if ( rc )
+            printk(XENLOG_WARNING "%pd: identity %smapping of %lx failed: %d\n",
+                   d, !paging_mode_translate(d) ? "IOMMU " : "", pfn, rc);
 
-        if ( !(++i & 0xfffff) )
+        if (!(i & 0xfffff))
             process_pending_softirqs();
-
-        if ( i == top && count )
-            goto commit;
     }
 
     /* Use if to avoid compiler warning */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/mm: further simplify cleanup_page_mappings()
Message-Id: <E1o05Ml-0000gr-Oo@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:43 +0000

commit 2730650c9cd65c1cb2412b480ee1f51748bc1445
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:23:31 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:23:31 2022 +0200

    x86/mm: further simplify cleanup_page_mappings()
    
    With the removal of update_xen_mappings() there's no need anymore for a
    2nd error code variable to transiently hold the IOMMU unmap return
    value.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/mm.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4f749fd888..ac74ae389c 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2470,12 +2470,7 @@ static int cleanup_page_mappings(struct page_info *page)
         struct domain *d = page_get_owner(page);
 
         if ( d && unlikely(need_iommu_pt_sync(d)) && is_pv_domain(d) )
-        {
-            int rc2 = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
-
-            if ( !rc )
-                rc = rc2;
-        }
+            rc = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
 
         if ( likely(!is_special_page(page)) )
         {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86emul/test: encourage compiler to use more embedded broadcast
Message-Id: <E1o05Mv-0000hM-Rk@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 17:57:53 +0000

commit b8bc4588b32e8a40354defac29ceb9c90e570af8
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:24:21 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:24:21 2022 +0200

    x86emul/test: encourage compiler to use more embedded broadcast
    
    For one it was an oversight to leave dup_{hi,lo}() undefined for 512-bit
    vector size. And then in FMA testing we can also arrange for the
    compiler to (hopefully) recognize broadcasting potential. Plus we can
    replace the broadcast(1) use in the addsub() surrogate with inline
    assembly explicitly using embedded broadcast (even gcc12 still doesn't
    support broadcast for any of the addsub/subadd builtins).
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 tools/tests/x86_emulator/simd-fma.c | 26 +++++++++++++++++++++++++-
 tools/tests/x86_emulator/simd.c     |  7 +++++++
 tools/tests/x86_emulator/simd.h     |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/tools/tests/x86_emulator/simd-fma.c b/tools/tests/x86_emulator/simd-fma.c
index 11a9dd6a27..d2ccefac9b 100644
--- a/tools/tests/x86_emulator/simd-fma.c
+++ b/tools/tests/x86_emulator/simd-fma.c
@@ -56,13 +56,27 @@ ENTRY(fma_test);
 #endif
 
 #if defined(fmaddsub) && !defined(addsub)
-# define addsub(x, y) fmaddsub(x, broadcast(1), y)
+# ifdef __AVX512F__
+#  define addsub(x, y) ({ \
+    vec_t t_; \
+    typeof(t_[0]) one_ = 1; \
+    asm ( "vfmaddsub231p" ELEM_SFX " %2%{1to%c4%}, %1, %0" \
+          : "=v" (t_) \
+          : "v" (x), "m" (one_), "0" (y), "i" (ELEM_COUNT) ); \
+    t_; \
+})
+# else
+#  define addsub(x, y) fmaddsub(x, broadcast(1), y)
+# endif
 #endif
 
 int fma_test(void)
 {
     unsigned int i;
     vec_t x, y, z, src, inv, one;
+#ifdef __AVX512F__
+    typeof(one[0]) one_ = 1;
+#endif
 
     for ( i = 0; i < ELEM_COUNT; ++i )
     {
@@ -71,6 +85,10 @@ int fma_test(void)
         one[i] = 1;
     }
 
+#ifdef __AVX512F__
+# define one one_
+#endif
+
     x = (src + one) * inv;
     y = (src - one) * inv;
     touch(src);
@@ -93,22 +111,28 @@ int fma_test(void)
     x = src + inv;
     y = src - inv;
     touch(inv);
+    touch(one);
     z = src * one + inv;
     if ( !eq(x, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = -src * one - inv;
     if ( !eq(-x, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = src * one - inv;
     if ( !eq(y, z) ) return __LINE__;
 
     touch(inv);
+    touch(one);
     z = -src * one + inv;
     if ( !eq(-y, z) ) return __LINE__;
     touch(inv);
 
+#undef one
+
 #if defined(addsub) && defined(fmaddsub)
     x = addsub(src * inv, one);
     y = addsub(src * inv, -one);
diff --git a/tools/tests/x86_emulator/simd.c b/tools/tests/x86_emulator/simd.c
index 198f7b933e..c805f1cc1e 100644
--- a/tools/tests/x86_emulator/simd.c
+++ b/tools/tests/x86_emulator/simd.c
@@ -912,6 +912,13 @@ static inline vec_t movlhps(vec_t x, vec_t y) {
 })
 #  endif
 # endif
+#elif VEC_SIZE == 64
+# if FLOAT_SIZE == 4
+#  define dup_hi(x) B(movshdup, _mask, x, undef(), ~0)
+#  define dup_lo(x) B(movsldup, _mask, x, undef(), ~0)
+# elif FLOAT_SIZE == 8
+#  define dup_lo(x) B(movddup, _mask, x, undef(), ~0)
+# endif
 #endif
 #if VEC_SIZE == 16 && defined(__SSSE3__) && !defined(__AVX512VL__)
 # if INT_SIZE == 1
diff --git a/tools/tests/x86_emulator/simd.h b/tools/tests/x86_emulator/simd.h
index 685d78d84b..936952ab52 100644
--- a/tools/tests/x86_emulator/simd.h
+++ b/tools/tests/x86_emulator/simd.h
@@ -49,8 +49,10 @@ float
 # define ELEM_SIZE FLOAT_SIZE
 # if FLOAT_SIZE == 4
 #  define MODE SF
+#  define ELEM_SFX "s"
 # elif FLOAT_SIZE == 8
 #  define MODE DF
+#  define ELEM_SFX "d"
 # endif
 #endif
 #ifndef VEC_SIZE
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/pv: Clean up _get_page_type()
Message-Id: <E1o06gL-0005ow-Tn@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:01 +0000

commit b152dfbc3ad71a788996440b18174d995c3bffc9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:19 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:19 2022 +0200

    x86/pv: Clean up _get_page_type()
    
    Various fixes for clarity, ahead of making complicated changes.
    
     * Split the overflow check out of the if/else chain for type handling, as
       it's somewhat unrelated.
     * Comment the main if/else chain to explain what is going on.  Adjust one
       ASSERT() and state the bit layout for validate-locked and partial states.
     * Correct the comment about TLB flushing, as it's backwards.  The problem
       case is when writeable mappings are retained to a page becoming read-only,
       as it allows the guest to bypass Xen's safety checks for updates.
     * Reduce the scope of 'y'.  It is an artefact of the cmpxchg loop and not
       valid for use by subsequent logic.  Switch to using ACCESS_ONCE() to treat
       all reads as explicitly volatile.  The only thing preventing the validated
       wait-loop being infinite is the compiler barrier hidden in cpu_relax().
     * Replace one page_get_owner(page) with the already-calculated 'd' already in
       scope.
    
    No functional change.
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 9186e96b199e4f7e52e033b238f9fe869afb69c7
    master date: 2022-06-09 14:20:36 +0200
---
 xen/arch/x86/mm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 61 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4ee2de1105..79ad7fdd2b 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2906,16 +2906,17 @@ static int _put_page_type(struct page_info *page, unsigned int flags,
 static int _get_page_type(struct page_info *page, unsigned long type,
                           bool preemptible)
 {
-    unsigned long nx, x, y = page->u.inuse.type_info;
+    unsigned long nx, x;
     int rc = 0;
 
     ASSERT(!(type & ~(PGT_type_mask | PGT_pae_xen_l2)));
     ASSERT(!in_irq());
 
-    for ( ; ; )
+    for ( unsigned long y = ACCESS_ONCE(page->u.inuse.type_info); ; )
     {
         x  = y;
         nx = x + 1;
+
         if ( unlikely((nx & PGT_count_mask) == 0) )
         {
             gdprintk(XENLOG_WARNING,
@@ -2923,8 +2924,15 @@ static int _get_page_type(struct page_info *page, unsigned long type,
                      mfn_x(page_to_mfn(page)));
             return -EINVAL;
         }
-        else if ( unlikely((x & PGT_count_mask) == 0) )
+
+        if ( unlikely((x & PGT_count_mask) == 0) )
         {
+            /*
+             * Typeref 0 -> 1.
+             *
+             * Type changes are permitted when the typeref is 0.  If the type
+             * actually changes, the page needs re-validating.
+             */
             struct domain *d = page_get_owner(page);
 
             if ( d && shadow_mode_enabled(d) )
@@ -2935,8 +2943,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             {
                 /*
                  * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with mappings of a frame
-                 * which is about to become writeable to the guest.
+                 * vital that no other CPUs are left with writeable mappings
+                 * to a frame which is intending to become pgtable/segdesc.
                  */
                 cpumask_t *mask = this_cpu(scratch_cpumask);
 
@@ -2948,7 +2956,7 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
                 if ( unlikely(!cpumask_empty(mask)) &&
                      /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(page_get_owner(page)) ||
+                     (!shadow_mode_enabled(d) ||
                       ((nx & PGT_type_mask) == PGT_writable_page)) )
                 {
                     perfc_incr(need_flush_tlb_flush);
@@ -2979,7 +2987,14 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
         {
-            /* Don't log failure if it could be a recursive-mapping attempt. */
+            /*
+             * else, we're trying to take a new reference, of the wrong type.
+             *
+             * This (being able to prohibit use of the wrong type) is what the
+             * typeref system exists for, but skip printing the failure if it
+             * looks like a recursive mapping, as subsequent logic might
+             * ultimately permit the attempt.
+             */
             if ( ((x & PGT_type_mask) == PGT_l2_page_table) &&
                  (type == PGT_l1_page_table) )
                 return -EINVAL;
@@ -2998,18 +3013,46 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
         else if ( unlikely(!(x & PGT_validated)) )
         {
+            /*
+             * else, the count is non-zero, and we're grabbing the right type;
+             * but the page hasn't been validated yet.
+             *
+             * The page is in one of two states (depending on PGT_partial),
+             * and should have exactly one reference.
+             */
+            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+
             if ( !(x & PGT_partial) )
             {
-                /* Someone else is updating validation of this page. Wait... */
+                /*
+                 * The page has been left in the "validate locked" state
+                 * (i.e. PGT_[type] | 1) which means that a concurrent caller
+                 * of _get_page_type() is in the middle of validation.
+                 *
+                 * Spin waiting for the concurrent user to complete (partial
+                 * or fully validated), then restart our attempt to acquire a
+                 * type reference.
+                 */
                 do {
                     if ( preemptible && hypercall_preempt_check() )
                         return -EINTR;
                     cpu_relax();
-                } while ( (y = page->u.inuse.type_info) == x );
+                } while ( (y = ACCESS_ONCE(page->u.inuse.type_info)) == x );
                 continue;
             }
-            /* Type ref count was left at 1 when PGT_partial got set. */
-            ASSERT((x & PGT_count_mask) == 1);
+
+            /*
+             * The page has been left in the "partial" state
+             * (i.e., PGT_[type] | PGT_partial | 1).
+             *
+             * Rather than bumping the type count, we need to try to grab the
+             * validation lock; if we succeed, we need to validate the page,
+             * then drop the general ref associated with the PGT_partial bit.
+             *
+             * We grab the validation lock by setting nx to (PGT_[type] | 1)
+             * (i.e., non-zero type count, neither PGT_validated nor
+             * PGT_partial set).
+             */
             nx = x & ~PGT_partial;
         }
 
@@ -3058,6 +3101,13 @@ static int _get_page_type(struct page_info *page, unsigned long type,
     }
 
  out:
+    /*
+     * Did we drop the PGT_partial bit when acquiring the typeref?  If so,
+     * drop the general reference that went along with it.
+     *
+     * N.B. validate_page() may have have re-set PGT_partial, not reflected in
+     * nx, but will have taken an extra ref when doing so.
+     */
     if ( (x & PGT_partial) && !(nx & PGT_partial) )
         put_page(page);
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
Message-Id: <E1o06gW-0005r8-1J@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:12 +0000

commit 8dab3f79b122e69cbcdebca72cdc14f004ee2193
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:37 2022 +0200

    x86/pv: Fix ABAC cmpxchg() race in _get_page_type()
    
    _get_page_type() suffers from a race condition where it incorrectly assumes
    that because 'x' was read and a subsequent a cmpxchg() succeeds, the type
    cannot have changed in-between.  Consider:
    
    CPU A:
      1. Creates an L2e referencing pg
         `-> _get_page_type(pg, PGT_l1_page_table), sees count 0, type PGT_writable_page
      2.     Issues flush_tlb_mask()
    CPU B:
      3. Creates a writeable mapping of pg
         `-> _get_page_type(pg, PGT_writable_page), count increases to 1
      4. Writes into new mapping, creating a TLB entry for pg
      5. Removes the writeable mapping of pg
         `-> _put_page_type(pg), count goes back down to 0
    CPU A:
      7.     Issues cmpxchg(), setting count 1, type PGT_l1_page_table
    
    CPU B now has a writeable mapping to pg, which Xen believes is a pagetable and
    suitably protected (i.e. read-only).  The TLB flush in step 2 must be deferred
    until after the guest is prohibited from creating new writeable mappings,
    which is after step 7.
    
    Defer all safety actions until after the cmpxchg() has successfully taken the
    intended typeref, because that is what prevents concurrent users from using
    the old type.
    
    Also remove the early validation for writeable and shared pages.  This removes
    race conditions where one half of a parallel mapping attempt can return
    successfully before:
     * The IOMMU pagetables are in sync with the new page type
     * Writeable mappings to shared pages have been torn down
    
    This is part of XSA-401 / CVE-2022-26362.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: 8cc5036bc385112a82f1faff27a0970e6440dfed
    master date: 2022-06-09 14:21:04 +0200
---
 xen/arch/x86/mm.c | 116 +++++++++++++++++++++++++++++++-----------------------
 1 file changed, 67 insertions(+), 49 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 79ad7fdd2b..c6429b0f74 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2933,56 +2933,12 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * Type changes are permitted when the typeref is 0.  If the type
              * actually changes, the page needs re-validating.
              */
-            struct domain *d = page_get_owner(page);
-
-            if ( d && shadow_mode_enabled(d) )
-               shadow_prepare_page_type_change(d, page, type);
 
             ASSERT(!(x & PGT_pae_xen_l2));
             if ( (x & PGT_type_mask) != type )
             {
-                /*
-                 * On type change we check to flush stale TLB entries. It is
-                 * vital that no other CPUs are left with writeable mappings
-                 * to a frame which is intending to become pgtable/segdesc.
-                 */
-                cpumask_t *mask = this_cpu(scratch_cpumask);
-
-                BUG_ON(in_irq());
-                cpumask_copy(mask, d->dirty_cpumask);
-
-                /* Don't flush if the timestamp is old enough */
-                tlbflush_filter(mask, page->tlbflush_timestamp);
-
-                if ( unlikely(!cpumask_empty(mask)) &&
-                     /* Shadow mode: track only writable pages. */
-                     (!shadow_mode_enabled(d) ||
-                      ((nx & PGT_type_mask) == PGT_writable_page)) )
-                {
-                    perfc_incr(need_flush_tlb_flush);
-                    /*
-                     * If page was a page table make sure the flush is
-                     * performed using an IPI in order to avoid changing the
-                     * type of a page table page under the feet of
-                     * spurious_page_fault().
-                     */
-                    flush_mask(mask,
-                               (x & PGT_type_mask) &&
-                               (x & PGT_type_mask) <= PGT_root_page_table
-                               ? FLUSH_TLB | FLUSH_FORCE_IPI
-                               : FLUSH_TLB);
-                }
-
-                /* We lose existing type and validity. */
                 nx &= ~(PGT_type_mask | PGT_validated);
                 nx |= type;
-
-                /*
-                 * No special validation needed for writable pages.
-                 * Page tables and GDT/LDT need to be scanned for validity.
-                 */
-                if ( type == PGT_writable_page || type == PGT_shared_page )
-                    nx |= PGT_validated;
             }
         }
         else if ( unlikely((x & (PGT_type_mask|PGT_pae_xen_l2)) != type) )
@@ -3063,6 +3019,56 @@ static int _get_page_type(struct page_info *page, unsigned long type,
             return -EINTR;
     }
 
+    /*
+     * One typeref has been taken and is now globally visible.
+     *
+     * The page is either in the "validate locked" state (PGT_[type] | 1) or
+     * fully validated (PGT_[type] | PGT_validated | >0).
+     */
+
+    if ( unlikely((x & PGT_count_mask) == 0) )
+    {
+        struct domain *d = page_get_owner(page);
+
+        if ( d && shadow_mode_enabled(d) )
+            shadow_prepare_page_type_change(d, page, type);
+
+        if ( (x & PGT_type_mask) != type )
+        {
+            /*
+             * On type change we check to flush stale TLB entries. It is
+             * vital that no other CPUs are left with writeable mappings
+             * to a frame which is intending to become pgtable/segdesc.
+             */
+            cpumask_t *mask = this_cpu(scratch_cpumask);
+
+            BUG_ON(in_irq());
+            cpumask_copy(mask, d->dirty_cpumask);
+
+            /* Don't flush if the timestamp is old enough */
+            tlbflush_filter(mask, page->tlbflush_timestamp);
+
+            if ( unlikely(!cpumask_empty(mask)) &&
+                 /* Shadow mode: track only writable pages. */
+                 (!shadow_mode_enabled(d) ||
+                  ((nx & PGT_type_mask) == PGT_writable_page)) )
+            {
+                perfc_incr(need_flush_tlb_flush);
+                /*
+                 * If page was a page table make sure the flush is
+                 * performed using an IPI in order to avoid changing the
+                 * type of a page table page under the feet of
+                 * spurious_page_fault().
+                 */
+                flush_mask(mask,
+                           (x & PGT_type_mask) &&
+                           (x & PGT_type_mask) <= PGT_root_page_table
+                           ? FLUSH_TLB | FLUSH_FORCE_IPI
+                           : FLUSH_TLB);
+            }
+        }
+    }
+
     if ( unlikely(((x & PGT_type_mask) == PGT_writable_page) !=
                   (type == PGT_writable_page)) )
     {
@@ -3091,13 +3097,25 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
-        if ( !(x & PGT_partial) )
+        /*
+         * No special validation needed for writable or shared pages.  Page
+         * tables and GDT/LDT need to have their contents audited.
+         *
+         * per validate_page(), non-atomic updates are fine here.
+         */
+        if ( type == PGT_writable_page || type == PGT_shared_page )
+            page->u.inuse.type_info |= PGT_validated;
+        else
         {
-            page->nr_validated_ptes = 0;
-            page->partial_flags = 0;
-            page->linear_pt_count = 0;
+            if ( !(x & PGT_partial) )
+            {
+                page->nr_validated_ptes = 0;
+                page->partial_flags = 0;
+                page->linear_pt_count = 0;
+            }
+
+            rc = validate_page(page, type, preemptible);
         }
-        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/page: Introduce _PAGE_* constants for memory types
Message-Id: <E1o06gg-0005rl-4L@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:22 +0000

commit 9cfd796ae05421ded8e4f70b2c55352491cfa841
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:27:53 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:27:53 2022 +0200

    x86/page: Introduce _PAGE_* constants for memory types
    
    ... rather than opencoding the PAT/PCD/PWT attributes in __PAGE_HYPERVISOR_*
    constants.  These are going to be needed by forthcoming logic.
    
    No functional change.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 1be8707c75bf4ba68447c74e1618b521dd432499
    master date: 2022-06-09 14:21:38 +0200
---
 xen/include/asm-x86/page.h | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
index 1d080cffbe..2e542050f6 100644
--- a/xen/include/asm-x86/page.h
+++ b/xen/include/asm-x86/page.h
@@ -331,6 +331,14 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 
 #define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 
+/* Memory types, encoded under Xen's choice of MSR_PAT. */
+#define _PAGE_WB         (                                0)
+#define _PAGE_WT         (                        _PAGE_PWT)
+#define _PAGE_UCM        (            _PAGE_PCD            )
+#define _PAGE_UC         (            _PAGE_PCD | _PAGE_PWT)
+#define _PAGE_WC         (_PAGE_PAT                        )
+#define _PAGE_WP         (_PAGE_PAT |             _PAGE_PWT)
+
 /*
  * Debug option: Ensure that granted mappings are not implicitly unmapped.
  * WARNING: This will need to be disabled to run OSes that use the spare PTE
@@ -349,8 +357,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
 #define __PAGE_HYPERVISOR_RX      (_PAGE_PRESENT | _PAGE_ACCESSED)
 #define __PAGE_HYPERVISOR         (__PAGE_HYPERVISOR_RX | \
                                    _PAGE_DIRTY | _PAGE_RW)
-#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_PCD)
-#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_HYPERVISOR_UCMINUS (__PAGE_HYPERVISOR | _PAGE_UCM)
+#define __PAGE_HYPERVISOR_UC      (__PAGE_HYPERVISOR | _PAGE_UC)
 #define __PAGE_HYPERVISOR_SHSTK   (__PAGE_HYPERVISOR_RO | _PAGE_DIRTY)
 
 #define MAP_SMALL_PAGES _PAGE_AVAIL0 /* don't use superpages mappings */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86: Don't change the cacheability of the directmap
Message-Id: <E1o06gq-0005sM-7b@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:32 +0000

commit 74193f4292d9cfc2874866e941d9939d8f33fcef
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:28:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:28:23 2022 +0200

    x86: Don't change the cacheability of the directmap
    
    Changeset 55f97f49b7ce ("x86: Change cache attributes of Xen 1:1 page mappings
    in response to guest mapping requests") attempted to keep the cacheability
    consistent between different mappings of the same page.
    
    The reason wasn't described in the changelog, but it is understood to be in
    regards to a concern over machine check exceptions, owing to errata when using
    mixed cacheabilities.  It did this primarily by updating Xen's mapping of the
    page in the direct map when the guest mapped a page with reduced cacheability.
    
    Unfortunately, the logic didn't actually prevent mixed cacheability from
    occurring:
     * A guest could map a page normally, and then map the same page with
       different cacheability; nothing prevented this.
     * The cacheability of the directmap was always latest-takes-precedence in
       terms of guest requests.
     * Grant-mapped frames with lesser cacheability didn't adjust the page's
       cacheattr settings.
     * The map_domain_page() function still unconditionally created WB mappings,
       irrespective of the page's cacheattr settings.
    
    Additionally, update_xen_mappings() had a bug where the alias calculation was
    wrong for mfn's which were .init content, which should have been treated as
    fully guest pages, not Xen pages.
    
    Worse yet, the logic introduced a vulnerability whereby necessary
    pagetable/segdesc adjustments made by Xen in the validation logic could become
    non-coherent between the cache and main memory.  The CPU could subsequently
    operate on the stale value in the cache, rather than the safe value in main
    memory.
    
    The directmap contains primarily mappings of RAM.  PAT/MTRR conflict
    resolution is asymmetric, and generally for MTRR=WB ranges, PAT of lesser
    cacheability resolves to being coherent.  The special case is WC mappings,
    which are non-coherent against MTRR=WB regions (except for fully-coherent
    CPUs).
    
    Xen must not have any WC cacheability in the directmap, to prevent Xen's
    actions from creating non-coherency.  (Guest actions creating non-coherency is
    dealt with in subsequent patches.)  As all memory types for MTRR=WB ranges
    inter-operate coherently, so leave Xen's directmap mappings as WB.
    
    Only PV guests with access to devices can use reduced-cacheability mappings to
    begin with, and they're trusted not to mount DoSs against the system anyway.
    
    Drop PGC_cacheattr_{base,mask} entirely, and the logic to manipulate them.
    Shift the later PGC_* constants up, to gain 3 extra bits in the main reference
    count.  Retain the check in get_page_from_l1e() for special_pages() because a
    guest has no business using reduced cacheability on these.
    
    This reverts changeset 55f97f49b7ce6c3520c555d19caac6cf3f9a5df0
    
    This is CVE-2022-26363, part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    master commit: ae09597da34aee6bc5b76475c5eea6994457e854
    master date: 2022-06-09 14:22:08 +0200
---
 xen/arch/x86/mm.c        | 84 ++++--------------------------------------------
 xen/include/asm-x86/mm.h | 23 ++++++-------
 2 files changed, 17 insertions(+), 90 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index c6429b0f74..ab32d13a1a 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -783,28 +783,6 @@ bool is_iomem_page(mfn_t mfn)
     return (page_get_owner(page) == dom_io);
 }
 
-static int update_xen_mappings(unsigned long mfn, unsigned int cacheattr)
-{
-    int err = 0;
-    bool alias = mfn >= PFN_DOWN(xen_phys_start) &&
-         mfn < PFN_UP(xen_phys_start + xen_virt_end - XEN_VIRT_START);
-    unsigned long xen_va =
-        XEN_VIRT_START + ((mfn - PFN_DOWN(xen_phys_start)) << PAGE_SHIFT);
-
-    if ( boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) )
-        return 0;
-
-    if ( unlikely(alias) && cacheattr )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, 0);
-    if ( !err )
-        err = map_pages_to_xen((unsigned long)mfn_to_virt(mfn), _mfn(mfn), 1,
-                     PAGE_HYPERVISOR | cacheattr_to_pte_flags(cacheattr));
-    if ( unlikely(alias) && !cacheattr && !err )
-        err = map_pages_to_xen(xen_va, _mfn(mfn), 1, PAGE_HYPERVISOR);
-
-    return err;
-}
-
 #ifndef NDEBUG
 struct mmio_emul_range_ctxt {
     const struct domain *d;
@@ -1009,47 +987,14 @@ get_page_from_l1e(
         goto could_not_pin;
     }
 
-    if ( pte_flags_to_cacheattr(l1f) !=
-         ((page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base) )
+    if ( (l1f & PAGE_CACHE_ATTRS) != _PAGE_WB && is_special_page(page) )
     {
-        unsigned long x, nx, y = page->count_info;
-        unsigned long cacheattr = pte_flags_to_cacheattr(l1f);
-        int err;
-
-        if ( is_special_page(page) )
-        {
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-            gdprintk(XENLOG_WARNING,
-                     "Attempt to change cache attributes of Xen heap page\n");
-            return -EACCES;
-        }
-
-        do {
-            x  = y;
-            nx = (x & ~PGC_cacheattr_mask) | (cacheattr << PGC_cacheattr_base);
-        } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-        err = update_xen_mappings(mfn, cacheattr);
-        if ( unlikely(err) )
-        {
-            cacheattr = y & PGC_cacheattr_mask;
-            do {
-                x  = y;
-                nx = (x & ~PGC_cacheattr_mask) | cacheattr;
-            } while ( (y = cmpxchg(&page->count_info, x, nx)) != x );
-
-            if ( write )
-                put_page_type(page);
-            put_page(page);
-
-            gdprintk(XENLOG_WARNING, "Error updating mappings for mfn %" PRI_mfn
-                     " (pfn %" PRI_pfn ", from L1 entry %" PRIpte ") for d%d\n",
-                     mfn, get_gpfn_from_mfn(mfn),
-                     l1e_get_intpte(l1e), l1e_owner->domain_id);
-            return err;
-        }
+        if ( write )
+            put_page_type(page);
+        put_page(page);
+        gdprintk(XENLOG_WARNING,
+                 "Attempt to change cache attributes of Xen heap page\n");
+        return -EACCES;
     }
 
     return 0;
@@ -2467,24 +2412,9 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
  */
 static int cleanup_page_mappings(struct page_info *page)
 {
-    unsigned int cacheattr =
-        (page->count_info & PGC_cacheattr_mask) >> PGC_cacheattr_base;
     int rc = 0;
     unsigned long mfn = mfn_x(page_to_mfn(page));
 
-    /*
-     * If we've modified xen mappings as a result of guest cache
-     * attributes, restore them to the "normal" state.
-     */
-    if ( unlikely(cacheattr) )
-    {
-        page->count_info &= ~PGC_cacheattr_mask;
-
-        BUG_ON(is_special_page(page));
-
-        rc = update_xen_mappings(mfn, 0);
-    }
-
     /*
      * If this may be in a PV domain's IOMMU, remove it.
      *
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index cb90527499..8a9a43bb0a 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -69,25 +69,22 @@
  /* Set when is using a page as a page table */
 #define _PGC_page_table   PG_shift(3)
 #define PGC_page_table    PG_mask(1, 3)
- /* 3-bit PAT/PCD/PWT cache-attribute hint. */
-#define PGC_cacheattr_base PG_shift(6)
-#define PGC_cacheattr_mask PG_mask(7, 6)
  /* Page is broken? */
-#define _PGC_broken       PG_shift(7)
-#define PGC_broken        PG_mask(1, 7)
+#define _PGC_broken       PG_shift(4)
+#define PGC_broken        PG_mask(1, 4)
  /* Mutually-exclusive page states: { inuse, offlining, offlined, free }. */
-#define PGC_state         PG_mask(3, 9)
-#define PGC_state_inuse   PG_mask(0, 9)
-#define PGC_state_offlining PG_mask(1, 9)
-#define PGC_state_offlined PG_mask(2, 9)
-#define PGC_state_free    PG_mask(3, 9)
+#define PGC_state           PG_mask(3, 6)
+#define PGC_state_inuse     PG_mask(0, 6)
+#define PGC_state_offlining PG_mask(1, 6)
+#define PGC_state_offlined  PG_mask(2, 6)
+#define PGC_state_free      PG_mask(3, 6)
 #define page_state_is(pg, st) (((pg)->count_info&PGC_state) == PGC_state_##st)
 /* Page is not reference counted (see below for caveats) */
-#define _PGC_extra        PG_shift(10)
-#define PGC_extra         PG_mask(1, 10)
+#define _PGC_extra        PG_shift(7)
+#define PGC_extra         PG_mask(1, 7)
 
 /* Count of references to this frame. */
-#define PGC_count_width   PG_shift(10)
+#define PGC_count_width   PG_shift(7)
 #define PGC_count_mask    ((1UL<<PGC_count_width)-1)
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86: Split cache_flush() out of cache_writeback()
Message-Id: <E1o06h0-0005sv-As@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:42 +0000

commit 8eafa2d871ae51d461256e4a14175e24df330c70
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:28:48 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:28:48 2022 +0200

    x86: Split cache_flush() out of cache_writeback()
    
    Subsequent changes will want a fully flushing version.
    
    Use the new helper rather than opencoding it in flush_area_local().  This
    resolves an outstanding issue where the conditional sfence is on the wrong
    side of the clflushopt loop.  clflushopt is ordered with respect to older
    stores, not to younger stores.
    
    Rename gnttab_cache_flush()'s helper to avoid colliding in name.
    grant_table.c can see the prototype from cache.h so the build fails
    otherwise.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 9a67ffee3371506e1cbfdfff5b90658d4828f6a2
    master date: 2022-06-09 14:22:38 +0200
---
 xen/arch/x86/flushtlb.c               | 84 +++++++++++++++++++++++++++++++----
 xen/common/grant_table.c              |  4 +-
 xen/drivers/passthrough/vtd/extern.h  |  1 -
 xen/drivers/passthrough/vtd/iommu.c   | 53 ++--------------------
 xen/drivers/passthrough/vtd/x86/vtd.c |  5 ---
 xen/include/asm-x86/cache.h           |  7 +++
 6 files changed, 88 insertions(+), 66 deletions(-)

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 25798df50f..0c912b8669 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -234,7 +234,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     if ( flags & FLUSH_CACHE )
     {
         const struct cpuinfo_x86 *c = &current_cpu_data;
-        unsigned long i, sz = 0;
+        unsigned long sz = 0;
 
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
@@ -244,13 +244,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {
-            alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
-            for ( i = 0; i < sz; i += c->x86_clflush_size )
-                alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";"
-                                  " clflush %0",
-                                  "data16 clflush %0",      /* clflushopt */
-                                  X86_FEATURE_CLFLUSHOPT,
-                                  "m" (((const char *)va)[i]));
+            cache_flush(va, sz);
             flags &= ~FLUSH_CACHE;
         }
         else
@@ -265,6 +259,80 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+void cache_flush(const void *addr, unsigned int size)
+{
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    const void *end = addr + size;
+
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+        /*
+         * Note regarding the "ds" prefix use: it's faster to do a clflush
+         * + prefix than a clflush + nop, and hence the prefix is added instead
+         * of letting the alternative framework fill the gap by appending nops.
+         */
+        alternative_io("ds; clflush %[p]",
+                       "data16 clflush %[p]", /* clflushopt */
+                       X86_FEATURE_CLFLUSHOPT,
+                       /* no outputs */,
+                       [p] "m" (*(const char *)(addr)));
+    }
+
+    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+}
+
+void cache_writeback(const void *addr, unsigned int size)
+{
+    unsigned int clflush_size;
+    const void *end = addr + size;
+
+    /* Fall back to CLFLUSH{,OPT} when CLWB isn't available. */
+    if ( !boot_cpu_has(X86_FEATURE_CLWB) )
+        return cache_flush(addr, size);
+
+    /*
+     * This function may be called before current_cpu_data is established.
+     * Hence a fallback is needed to prevent the loop below becoming infinite.
+     */
+    clflush_size = current_cpu_data.x86_clflush_size ?: 16;
+    addr -= (unsigned long)addr & (clflush_size - 1);
+    for ( ; addr < end; addr += clflush_size )
+    {
+/*
+ * The arguments to a macro must not include preprocessor directives. Doing so
+ * results in undefined behavior, so we have to create some defines here in
+ * order to avoid it.
+ */
+#if defined(HAVE_AS_CLWB)
+# define CLWB_ENCODING "clwb %[p]"
+#elif defined(HAVE_AS_XSAVEOPT)
+# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
+#else
+# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
+#endif
+
+#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
+#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
+# define INPUT BASE_INPUT
+#else
+# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
+#endif
+
+        asm volatile (CLWB_ENCODING :: INPUT(addr));
+
+#undef INPUT
+#undef BASE_INPUT
+#undef CLWB_ENCODING
+    }
+
+    asm volatile ("sfence" ::: "memory");
+}
+
 unsigned int guest_flush_tlb_flags(const struct domain *d)
 {
     bool shadow = paging_mode_shadow(d);
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 66f8ce7174..4c742cd8fe 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -3431,7 +3431,7 @@ gnttab_swap_grant_ref(XEN_GUEST_HANDLE_PARAM(gnttab_swap_grant_ref_t) uop,
     return 0;
 }
 
-static int cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
+static int _cache_flush(const gnttab_cache_flush_t *cflush, grant_ref_t *cur_ref)
 {
     struct domain *d, *owner;
     struct page_info *page;
@@ -3525,7 +3525,7 @@ gnttab_cache_flush(XEN_GUEST_HANDLE_PARAM(gnttab_cache_flush_t) uop,
             return -EFAULT;
         for ( ; ; )
         {
-            int ret = cache_flush(&op, cur_ref);
+            int ret = _cache_flush(&op, cur_ref);
 
             if ( ret < 0 )
                 return ret;
diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h
index 01e010a10d..4010792997 100644
--- a/xen/drivers/passthrough/vtd/extern.h
+++ b/xen/drivers/passthrough/vtd/extern.h
@@ -76,7 +76,6 @@ int __must_check qinval_device_iotlb_sync(struct vtd_iommu *iommu,
                                           struct pci_dev *pdev,
                                           u16 did, u16 size, u64 addr);
 
-unsigned int get_cache_line_size(void);
 void flush_all_cache(void);
 
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node);
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index 8975c1de61..bc377c9bcf 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -31,6 +31,7 @@
 #include <xen/pci.h>
 #include <xen/pci_regs.h>
 #include <xen/keyhandler.h>
+#include <asm/cache.h>
 #include <asm/msi.h>
 #include <asm/nops.h>
 #include <asm/irq.h>
@@ -206,54 +207,6 @@ static void check_cleanup_domid_map(const struct domain *d,
     }
 }
 
-static void sync_cache(const void *addr, unsigned int size)
-{
-    static unsigned long clflush_size = 0;
-    const void *end = addr + size;
-
-    if ( clflush_size == 0 )
-        clflush_size = get_cache_line_size();
-
-    addr -= (unsigned long)addr & (clflush_size - 1);
-    for ( ; addr < end; addr += clflush_size )
-/*
- * The arguments to a macro must not include preprocessor directives. Doing so
- * results in undefined behavior, so we have to create some defines here in
- * order to avoid it.
- */
-#if defined(HAVE_AS_CLWB)
-# define CLWB_ENCODING "clwb %[p]"
-#elif defined(HAVE_AS_XSAVEOPT)
-# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */
-#else
-# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */
-#endif
-
-#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr))
-#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT)
-# define INPUT BASE_INPUT
-#else
-# define INPUT(addr) "a" (addr), BASE_INPUT(addr)
-#endif
-        /*
-         * Note regarding the use of NOP_DS_PREFIX: it's faster to do a clflush
-         * + prefix than a clflush + nop, and hence the prefix is added instead
-         * of letting the alternative framework fill the gap by appending nops.
-         */
-        alternative_io_2(".byte " __stringify(NOP_DS_PREFIX) "; clflush %[p]",
-                         "data16 clflush %[p]", /* clflushopt */
-                         X86_FEATURE_CLFLUSHOPT,
-                         CLWB_ENCODING,
-                         X86_FEATURE_CLWB, /* no outputs */,
-                         INPUT(addr));
-#undef INPUT
-#undef BASE_INPUT
-#undef CLWB_ENCODING
-
-    alternative_2("", "sfence", X86_FEATURE_CLFLUSHOPT,
-                      "sfence", X86_FEATURE_CLWB);
-}
-
 /* Allocate page table, return its machine address */
 uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
 {
@@ -273,7 +226,7 @@ uint64_t alloc_pgtable_maddr(unsigned long npages, nodeid_t node)
         clear_page(vaddr);
 
         if ( (iommu_ops.init ? &iommu_ops : &vtd_ops)->sync_cache )
-            sync_cache(vaddr, PAGE_SIZE);
+            cache_writeback(vaddr, PAGE_SIZE);
         unmap_domain_page(vaddr);
         cur_pg++;
     }
@@ -1305,7 +1258,7 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
     iommu->nr_pt_levels = agaw_to_level(agaw);
 
     if ( !ecap_coherent(iommu->ecap) )
-        vtd_ops.sync_cache = sync_cache;
+        vtd_ops.sync_cache = cache_writeback;
 
     /* allocate domain id bitmap */
     iommu->domid_bitmap = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_dom));
diff --git a/xen/drivers/passthrough/vtd/x86/vtd.c b/xen/drivers/passthrough/vtd/x86/vtd.c
index 6681dccd69..55f0faa521 100644
--- a/xen/drivers/passthrough/vtd/x86/vtd.c
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c
@@ -47,11 +47,6 @@ void unmap_vtd_domain_page(const void *va)
     unmap_domain_page(va);
 }
 
-unsigned int get_cache_line_size(void)
-{
-    return ((cpuid_ebx(1) >> 8) & 0xff) * 8;
-}
-
 void flush_all_cache()
 {
     wbinvd();
diff --git a/xen/include/asm-x86/cache.h b/xen/include/asm-x86/cache.h
index 1f7173d8c7..e4770efb22 100644
--- a/xen/include/asm-x86/cache.h
+++ b/xen/include/asm-x86/cache.h
@@ -11,4 +11,11 @@
 
 #define __read_mostly __section(".data.read_mostly")
 
+#ifndef __ASSEMBLY__
+
+void cache_flush(const void *addr, unsigned int size);
+void cache_writeback(const void *addr, unsigned int size);
+
+#endif
+
 #endif
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/amd: Work around CLFLUSH ordering on older parts
Message-Id: <E1o06hA-0005tc-E1@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:22:52 +0000

commit c4815be949aae6583a9a22897beb96b095b4f1a2
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:29:13 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:29:13 2022 +0200

    x86/amd: Work around CLFLUSH ordering on older parts
    
    On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakely ordered with everything,
    including reads and writes to the address, and LFENCE/SFENCE instructions.
    
    This creates a multitude of problematic corner cases, laid out in the manual.
    Arrange to use MFENCE on both sides of the CLFLUSH to force proper ordering.
    
    This is part of XSA-402.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: 062868a5a8b428b85db589fa9a6d6e43969ffeb9
    master date: 2022-06-09 14:23:07 +0200
---
 xen/arch/x86/cpu/amd.c            |  8 ++++++++
 xen/arch/x86/flushtlb.c           | 13 ++++++++++++-
 xen/include/asm-x86/cpufeatures.h |  1 +
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index a8e37dbb1f..b3b9a0df5f 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -812,6 +812,14 @@ static void init_amd(struct cpuinfo_x86 *c)
 	if (!cpu_has_lfence_dispatch)
 		__set_bit(X86_FEATURE_MFENCE_RDTSC, c->x86_capability);
 
+	/*
+	 * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with
+	 * everything, including reads and writes to address, and
+	 * LFENCE/SFENCE instructions.
+	 */
+	if (!cpu_has_clflushopt)
+		setup_force_cpu_cap(X86_BUG_CLFLUSH_MFENCE);
+
 	switch(c->x86)
 	{
 	case 0xf ... 0x11:
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 0c912b8669..dcbb406401 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -259,6 +259,13 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
     return flags;
 }
 
+/*
+ * On pre-CLFLUSHOPT AMD CPUs, CLFLUSH is weakly ordered with everything,
+ * including reads and writes to address, and LFENCE/SFENCE instructions.
+ *
+ * This function only works safely after alternatives have run.  Luckily, at
+ * the time of writing, we don't flush the caches that early.
+ */
 void cache_flush(const void *addr, unsigned int size)
 {
     /*
@@ -268,6 +275,8 @@ void cache_flush(const void *addr, unsigned int size)
     unsigned int clflush_size = current_cpu_data.x86_clflush_size ?: 16;
     const void *end = addr + size;
 
+    alternative("", "mfence", X86_BUG_CLFLUSH_MFENCE);
+
     addr -= (unsigned long)addr & (clflush_size - 1);
     for ( ; addr < end; addr += clflush_size )
     {
@@ -283,7 +292,9 @@ void cache_flush(const void *addr, unsigned int size)
                        [p] "m" (*(const char *)(addr)));
     }
 
-    alternative("", "sfence", X86_FEATURE_CLFLUSHOPT);
+    alternative_2("",
+                  "sfence", X86_FEATURE_CLFLUSHOPT,
+                  "mfence", X86_BUG_CLFLUSH_MFENCE);
 }
 
 void cache_writeback(const void *addr, unsigned int size)
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 7413febd7a..ff3157d52d 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -47,6 +47,7 @@ XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch
 
 #define X86_BUG_FPU_PTRS          X86_BUG( 0) /* (F)X{SAVE,RSTOR} doesn't save/restore FOP/FIP/FDP. */
 #define X86_BUG_NULL_SEG          X86_BUG( 1) /* NULL-ing a selector preserves the base and limit. */
+#define X86_BUG_CLFLUSH_MFENCE    X86_BUG( 2) /* MFENCE needed to serialise CLFLUSH */
 
 /* Total number of capability words, inc synth and bug words. */
 #define NCAPINTS (FSCAPINTS + X86_NR_SYNTH + X86_NR_BUG) /* N 32-bit words worth of info */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/pv: Track and flush non-coherent mappings of RAM
Message-Id: <E1o06hK-0005uM-HJ@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:23:02 +0000

commit dc020d8d1ba420e2dd0e7a40f5045db897f3c4f4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 9 15:29:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 9 15:29:38 2022 +0200

    x86/pv: Track and flush non-coherent mappings of RAM
    
    There are legitimate uses of WC mappings of RAM, e.g. for DMA buffers with
    devices that make non-coherent writes.  The Linux sound subsystem makes
    extensive use of this technique.
    
    For such usecases, the guest's DMA buffer is mapped and consistently used as
    WC, and Xen doesn't interact with the buffer.
    
    However, a mischevious guest can use WC mappings to deliberately create
    non-coherency between the cache and RAM, and use this to trick Xen into
    validating a pagetable which isn't actually safe.
    
    Allocate a new PGT_non_coherent to track the non-coherency of mappings.  Set
    it whenever a non-coherent writeable mapping is created.  If the page is used
    as anything other than PGT_writable_page, force a cache flush before
    validation.  Also force a cache flush before the page is returned to the heap.
    
    This is CVE-2022-26364, part of XSA-402.
    
    Reported-by: Jann Horn <jannh@google.com>
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: George Dunlap <george.dunlap@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    master commit: c1c9cae3a9633054b177c5de21ad7268162b2f2c
    master date: 2022-06-09 14:23:37 +0200
---
 xen/arch/x86/mm.c             | 38 ++++++++++++++++++++++++++++++++++++++
 xen/arch/x86/pv/grant_table.c | 21 +++++++++++++++++++++
 xen/include/asm-x86/mm.h      |  6 +++++-
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ab32d13a1a..bab9624fab 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -997,6 +997,15 @@ get_page_from_l1e(
         return -EACCES;
     }
 
+    /*
+     * Track writeable non-coherent mappings to RAM pages, to trigger a cache
+     * flush later if the target is used as anything but a PGT_writeable page.
+     * We care about all writeable mappings, including foreign mappings.
+     */
+    if ( !boot_cpu_has(X86_FEATURE_XEN_SELFSNOOP) &&
+         (l1f & (PAGE_CACHE_ATTRS | _PAGE_RW)) == (_PAGE_WC | _PAGE_RW) )
+        set_bit(_PGT_non_coherent, &page->u.inuse.type_info);
+
     return 0;
 
  could_not_pin:
@@ -2454,6 +2463,19 @@ static int cleanup_page_mappings(struct page_info *page)
         }
     }
 
+    /*
+     * Flush the cache if there were previously non-coherent writeable
+     * mappings of this page.  This forces the page to be coherent before it
+     * is freed back to the heap.
+     */
+    if ( __test_and_clear_bit(_PGT_non_coherent, &page->u.inuse.type_info) )
+    {
+        void *addr = __map_domain_page(page);
+
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
+    }
+
     return rc;
 }
 
@@ -3027,6 +3049,22 @@ static int _get_page_type(struct page_info *page, unsigned long type,
 
     if ( unlikely(!(nx & PGT_validated)) )
     {
+        /*
+         * Flush the cache if there were previously non-coherent mappings of
+         * this page, and we're trying to use it as anything other than a
+         * writeable page.  This forces the page to be coherent before we
+         * validate its contents for safety.
+         */
+        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
+        {
+            void *addr = __map_domain_page(page);
+
+            cache_flush(addr, PAGE_SIZE);
+            unmap_domain_page(addr);
+
+            page->u.inuse.type_info &= ~PGT_non_coherent;
+        }
+
         /*
          * No special validation needed for writable or shared pages.  Page
          * tables and GDT/LDT need to have their contents audited.
diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c
index 0325618c98..81c72e61ed 100644
--- a/xen/arch/x86/pv/grant_table.c
+++ b/xen/arch/x86/pv/grant_table.c
@@ -109,7 +109,17 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
 
     ol1e = *pl1e;
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * We always create mappings in this path.  However, our caller,
+         * map_grant_ref(), only passes potentially non-zero cache_flags for
+         * MMIO frames, so this path doesn't create non-coherent mappings of
+         * RAM frames and there's no need to calculate PGT_non_coherent.
+         */
+        ASSERT(!cache_flags || is_iomem_page(frame));
+
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
@@ -294,7 +304,18 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
                  l1e_get_flags(ol1e), addr, grant_pte_flags);
 
     if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
+    {
+        /*
+         * Generally, replace_grant_pv_mapping() is used to destroy mappings
+         * (n1le = l1e_empty()), but it can be a present mapping on the
+         * GNTABOP_unmap_and_replace path.
+         *
+         * In such cases, the PTE is fully transplanted from its old location
+         * via steal_linear_addr(), so we need not perform PGT_non_coherent
+         * checking here.
+         */
         rc = GNTST_okay;
+    }
 
  out_unlock:
     page_unlock(page);
diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h
index 8a9a43bb0a..7464167ae1 100644
--- a/xen/include/asm-x86/mm.h
+++ b/xen/include/asm-x86/mm.h
@@ -53,8 +53,12 @@
 #define _PGT_partial      PG_shift(8)
 #define PGT_partial       PG_mask(1, 8)
 
+/* Has this page been mapped writeable with a non-coherent memory type? */
+#define _PGT_non_coherent PG_shift(9)
+#define PGT_non_coherent  PG_mask(1, 9)
+
  /* Count of uses of this frame as its current type. */
-#define PGT_count_width   PG_shift(8)
+#define PGT_count_width   PG_shift(9)
 #define PGT_count_mask    ((1UL<<PGT_count_width)-1)
 
 /* Are the 'type mask' bits identical? */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/mm: account for PGT_pae_xen_l2 in recently added assertion
Message-Id: <E1o06hU-0005ux-Kb@xenbits.xenproject.org>
Date: Sat, 11 Jun 2022 19:23:12 +0000

commit 0b4e62847c5af1a59eea8d17093feccd550d1c26
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Fri Jun 10 10:28:28 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Fri Jun 10 10:28:28 2022 +0200

    x86/mm: account for PGT_pae_xen_l2 in recently added assertion
    
    While PGT_pae_xen_l2 will be zapped once the type refcount of an L2 page
    reaches zero, it'll be retained as long as the type refcount is non-
    zero. Hence any checking against the requested type needs to either zap
    the bit from the type or include it in the used mask.
    
    Fixes: 9186e96b199e ("x86/pv: Clean up _get_page_type()")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
    master commit: c2095ac76be0f4a1940346c9ffb49fb967345060
    master date: 2022-06-10 10:21:06 +0200
---
 xen/arch/x86/mm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index bab9624fab..c1b9a3bb10 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -2928,7 +2928,8 @@ static int _get_page_type(struct page_info *page, unsigned long type,
              * The page is in one of two states (depending on PGT_partial),
              * and should have exactly one reference.
              */
-            ASSERT((x & (PGT_type_mask | PGT_count_mask)) == (type | 1));
+            ASSERT((x & (PGT_type_mask | PGT_pae_xen_l2 | PGT_count_mask)) ==
+                   (type | 1));
 
             if ( !(x & PGT_partial) )
             {
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: traps: Fix reference to invalid erratum ID
Message-Id: <E1o0Jcb-000310-Os@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:01 +0000

commit a6f7ed5fc7d5fb5001ef82db99d34bc8a85fc2b6
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Fri Jun 10 10:33:56 2022 +0200
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Fri Jun 10 16:29:19 2022 -0700

    xen/arm: traps: Fix reference to invalid erratum ID
    
    The correct erratum ID should be 834220.
    
    Fixes: 0a7ba2936457 ("xen/arm: arm64: Add Cortex-A57 erratum 834220 workaround")
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 43f30747cf..e989e742fd 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1856,7 +1856,7 @@ static inline bool hpfar_is_valid(bool s1ptw, uint8_t fsc)
      *  1. the stage 2 fault happen during a stage 1 page table walk
      *  (the bit ESR_EL2.S1PTW is set)
      *  2. the fault was due to a translation fault and the processor
-     *  does not carry erratum #8342220
+     *  does not carry erratum #834220
      *
      * Note that technically HPFAR is valid for other cases, but they
      * are currently not supported by Xen.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: gicv2: Rename gicv2_map_hwdown_extra_mappings
Message-Id: <E1o0Jcl-00031c-S4@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:11 +0000

commit e051b5cd1043cc1aad506faace824e6aacc887bf
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Fri Jun 10 10:33:57 2022 +0200
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Fri Jun 10 16:29:19 2022 -0700

    xen/arm: gicv2: Rename gicv2_map_hwdown_extra_mappings
    
    ... to gicv2_map_hwdom_extra_mappings as the former clearly contains
    a typo.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    [stefano: remove fixes tag]
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/gic-v2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 2cc2f6bc18..bd773bcc67 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -679,7 +679,7 @@ static void gicv2_irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_m
     spin_unlock(&gicv2.lock);
 }
 
-static int gicv2_map_hwdown_extra_mappings(struct domain *d)
+static int gicv2_map_hwdom_extra_mappings(struct domain *d)
 {
     const struct v2m_data *v2m_data;
 
@@ -1352,7 +1352,7 @@ const static struct gic_hw_operations gicv2_ops = {
     .make_hwdom_madt     = gicv2_make_hwdom_madt,
     .get_hwdom_extra_madt_size = gicv2_get_hwdom_extra_madt_size,
 #endif
-    .map_hwdom_extra_mappings = gicv2_map_hwdown_extra_mappings,
+    .map_hwdom_extra_mappings = gicv2_map_hwdom_extra_mappings,
     .iomem_deny_access   = gicv2_iomem_deny_access,
     .do_LPI              = gicv2_do_LPI,
 };
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: add Persistent Map (PMAP) infrastructure
Message-Id: <E1o0Jcv-00032W-Vr@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:21 +0000

commit 4f17357b52f6ea9e76ff2375a6c61e8f43f65723
Author:     Wei Liu <wei.liu2@citrix.com>
AuthorDate: Sat Jun 11 12:20:33 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: add Persistent Map (PMAP) infrastructure
    
    The basic idea is like Persistent Kernel Map (PKMAP) in Linux. We
    pre-populate all the relevant page tables before the system is fully
    set up.
    
    We will need it on Arm in order to rework the arm64 version of
    xenheap_setup_mappings() as we may need to use pages allocated from
    the boot allocator before they are effectively mapped.
    
    This infrastructure is not lock-protected therefore can only be used
    before smpboot. After smpboot, map_domain_page() has to be used.
    
    This is based on the x86 version [1] that was originally implemented
    by Wei Liu.
    
    The PMAP infrastructure is implemented in common code with some
    arch helpers to set/clear the page-table entries and convertion
    between a fixmap slot to a virtual address...
    
    As mfn_to_xen_entry() now needs to be exported, take the opportunity
    to swich the parameter attr from unsigned to unsigned int.
    
    [1] <e92da4ad6015b6089737fcccba3ec1d6424649a5.1588278317.git.hongyxia@amazon.com>
    
    Signed-off-by: Wei Liu <wei.liu2@citrix.com>
    Signed-off-by: Hongyan Xia <hongyxia@amazon.com>
    [julien: Adapted for Arm]
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/Kconfig              |  1 +
 xen/arch/arm/include/asm/fixmap.h | 24 +++++++++++++
 xen/arch/arm/include/asm/lpae.h   |  8 +++++
 xen/arch/arm/include/asm/pmap.h   | 29 ++++++++++++++++
 xen/arch/arm/mm.c                 |  7 +---
 xen/common/Kconfig                |  3 ++
 xen/common/Makefile               |  1 +
 xen/common/pmap.c                 | 72 +++++++++++++++++++++++++++++++++++++++
 xen/include/xen/pmap.h            | 16 +++++++++
 9 files changed, 155 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index ecfa6822e4..a89a67802a 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -14,6 +14,7 @@ config ARM
 	select HAS_DEVICE_TREE
 	select HAS_PASSTHROUGH
 	select HAS_PDX
+	select HAS_PMAP
 	select IOMMU_FORCE_PT_SHARE
 
 config ARCH_DEFCONFIG
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
index 1cee51e52a..365a2385a0 100644
--- a/xen/arch/arm/include/asm/fixmap.h
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -5,20 +5,44 @@
 #define __ASM_FIXMAP_H
 
 #include <xen/acpi.h>
+#include <xen/pmap.h>
 
 /* Fixmap slots */
 #define FIXMAP_CONSOLE  0  /* The primary UART */
 #define FIXMAP_MISC     1  /* Ephemeral mappings of hardware */
 #define FIXMAP_ACPI_BEGIN  2  /* Start mappings of ACPI tables */
 #define FIXMAP_ACPI_END    (FIXMAP_ACPI_BEGIN + NUM_FIXMAP_ACPI_PAGES - 1)  /* End mappings of ACPI tables */
+#define FIXMAP_PMAP_BEGIN (FIXMAP_ACPI_END + 1) /* Start of PMAP */
+#define FIXMAP_PMAP_END (FIXMAP_PMAP_BEGIN + NUM_FIX_PMAP - 1) /* End of PMAP */
+
+#define FIXMAP_LAST FIXMAP_PMAP_END
+
+#define FIXADDR_START FIXMAP_ADDR(0)
+#define FIXADDR_TOP FIXMAP_ADDR(FIXMAP_LAST)
 
 #ifndef __ASSEMBLY__
 
+/*
+ * Direct access to xen_fixmap[] should only happen when {set,
+ * clear}_fixmap() is unusable (e.g. where we would end up to
+ * recursively call the helpers).
+ */
+extern lpae_t xen_fixmap[XEN_PT_LPAE_ENTRIES];
+
 /* Map a page in a fixmap entry */
 extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
 /* Remove a mapping from a fixmap entry */
 extern void clear_fixmap(unsigned map);
 
+#define fix_to_virt(slot) ((void *)FIXMAP_ADDR(slot))
+
+static inline unsigned int virt_to_fix(vaddr_t vaddr)
+{
+    BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
+
+    return ((vaddr - FIXADDR_START) >> PAGE_SHIFT);
+}
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_FIXMAP_H */
diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h
index aecb320dec..fc19cbd847 100644
--- a/xen/arch/arm/include/asm/lpae.h
+++ b/xen/arch/arm/include/asm/lpae.h
@@ -4,6 +4,7 @@
 #ifndef __ASSEMBLY__
 
 #include <xen/page-defs.h>
+#include <xen/mm-frame.h>
 
 /*
  * WARNING!  Unlike the x86 pagetable code, where l1 is the lowest level and
@@ -168,6 +169,13 @@ static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
         third_table_offset(addr)            \
     }
 
+/*
+ * Standard entry type that we'll use to build Xen's own pagetables.
+ * We put the same permissions at every level, because they're ignored
+ * by the walker in non-leaf entries.
+ */
+lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr);
+
 #endif /* __ASSEMBLY__ */
 
 /*
diff --git a/xen/arch/arm/include/asm/pmap.h b/xen/arch/arm/include/asm/pmap.h
new file mode 100644
index 0000000000..e094d13dd2
--- /dev/null
+++ b/xen/arch/arm/include/asm/pmap.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_PMAP_H__
+#define __ASM_PMAP_H__
+
+#include <xen/mm.h>
+
+#include <asm/fixmap.h>
+
+static inline void arch_pmap_map(unsigned int slot, mfn_t mfn)
+{
+    lpae_t *entry = &xen_fixmap[slot];
+    lpae_t pte;
+
+    ASSERT(!lpae_is_valid(*entry));
+
+    pte = mfn_to_xen_entry(mfn, PAGE_HYPERVISOR_RW);
+    pte.pt.table = 1;
+    write_pte(entry, pte);
+}
+
+static inline void arch_pmap_unmap(unsigned int slot)
+{
+    lpae_t pte = {};
+
+    write_pte(&xen_fixmap[slot], pte);
+
+    flush_xen_tlb_range_va_local(FIXMAP_ADDR(slot), PAGE_SIZE);
+}
+
+#endif /* __ASM_PMAP_H__ */
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 52b2a03940..bd1348a997 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -305,12 +305,7 @@ void dump_hyp_walk(vaddr_t addr)
     dump_pt_walk(ttbr, addr, HYP_PT_ROOT_LEVEL, 1);
 }
 
-/*
- * Standard entry type that we'll use to build Xen's own pagetables.
- * We put the same permissions at every level, because they're ignored
- * by the walker in non-leaf entries.
- */
-static inline lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned attr)
+lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr)
 {
     lpae_t e = (lpae_t) {
         .pt = {
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index d921c74d61..5b6b2406c0 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -49,6 +49,9 @@ config HAS_KEXEC
 config HAS_PDX
 	bool
 
+config HAS_PMAP
+	bool
+
 config HAS_SCHED_GRANULARITY
 	bool
 
diff --git a/xen/common/Makefile b/xen/common/Makefile
index b1e076c30b..3baf83d527 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -29,6 +29,7 @@ obj-y += notifier.o
 obj-y += page_alloc.o
 obj-$(CONFIG_HAS_PDX) += pdx.o
 obj-$(CONFIG_PERF_COUNTERS) += perfc.o
+obj-bin-$(CONFIG_HAS_PMAP) += pmap.init.o
 obj-y += preempt.o
 obj-y += random.o
 obj-y += rangeset.o
diff --git a/xen/common/pmap.c b/xen/common/pmap.c
new file mode 100644
index 0000000000..14517198aa
--- /dev/null
+++ b/xen/common/pmap.c
@@ -0,0 +1,72 @@
+#include <xen/bitops.h>
+#include <xen/init.h>
+#include <xen/irq.h>
+#include <xen/pmap.h>
+
+#include <asm/pmap.h>
+#include <asm/fixmap.h>
+
+/*
+ * Simple mapping infrastructure to map / unmap pages in fixed map.
+ * This is used to set the page table before the map domain page infrastructure
+ * is initialized.
+ *
+ * This structure is not protected by any locks, so it must not be used after
+ * smp bring-up.
+ */
+
+/* Bitmap to track which slot is used */
+static __initdata DECLARE_BITMAP(inuse, NUM_FIX_PMAP);
+
+void *__init pmap_map(mfn_t mfn)
+{
+    unsigned int idx;
+    unsigned int slot;
+
+    ASSERT(system_state < SYS_STATE_smp_boot);
+    ASSERT(!in_irq());
+
+    idx = find_first_zero_bit(inuse, NUM_FIX_PMAP);
+    if ( idx == NUM_FIX_PMAP )
+        panic("Out of PMAP slots\n");
+
+    __set_bit(idx, inuse);
+
+    slot = idx + FIXMAP_PMAP_BEGIN;
+    ASSERT(slot >= FIXMAP_PMAP_BEGIN && slot <= FIXMAP_PMAP_END);
+
+    /*
+     * We cannot use set_fixmap() here. We use PMAP when the domain map
+     * page infrastructure is not yet initialized, so map_pages_to_xen() called
+     * by set_fixmap() needs to map pages on demand, which then calls pmap()
+     * again, resulting in a loop. Modify the PTEs directly instead. The same
+     * is true for pmap_unmap().
+     */
+    arch_pmap_map(slot, mfn);
+
+    return fix_to_virt(slot);
+}
+
+void __init pmap_unmap(const void *p)
+{
+    unsigned int idx;
+    unsigned int slot = virt_to_fix((unsigned long)p);
+
+    ASSERT(system_state < SYS_STATE_smp_boot);
+    ASSERT(slot >= FIXMAP_PMAP_BEGIN && slot <= FIXMAP_PMAP_END);
+    ASSERT(!in_irq());
+
+    idx = slot - FIXMAP_PMAP_BEGIN;
+
+    __clear_bit(idx, inuse);
+    arch_pmap_unmap(slot);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/xen/pmap.h b/xen/include/xen/pmap.h
new file mode 100644
index 0000000000..93e61b1087
--- /dev/null
+++ b/xen/include/xen/pmap.h
@@ -0,0 +1,16 @@
+#ifndef __XEN_PMAP_H__
+#define __XEN_PMAP_H__
+
+/* Large enough for mapping 5 levels of page tables with some headroom */
+#define NUM_FIX_PMAP 8
+
+#ifndef __ASSEMBLY__
+
+#include <xen/mm-frame.h>
+
+void *pmap_map(mfn_t mfn);
+void pmap_unmap(const void *p);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __XEN_PMAP_H__ */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Clean-up the includes and order them
Message-Id: <E1o0Jd6-000335-2j@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:32 +0000

commit 53098ba58101f64b61c314ab8c5c95db798563e7
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:21:09 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Clean-up the includes and order them
    
    The numbers of includes in mm.c has been growing quite a lot. However
    some of them (e.g. xen/device_tree.h, xen/softirq.h) doesn't look
    to be directly used by the file or other will be included by
    larger headers (e.g asm/flushtlb.h will be included by xen/mm.h).
    
    So trim down the number of includes. Take the opportunity to order
    them with the xen headers first, then asm headers and last public
    headers.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 27 ++++++++++-----------------
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index bd1348a997..d40dd4e6c9 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -17,33 +17,26 @@
  * GNU General Public License for more details.
  */
 
-#include <xen/compile.h>
-#include <xen/types.h>
-#include <xen/device_tree.h>
-#include <xen/init.h>
-#include <xen/mm.h>
-#include <xen/preempt.h>
+#include <xen/domain_page.h>
 #include <xen/errno.h>
 #include <xen/grant_table.h>
-#include <xen/softirq.h>
-#include <xen/event.h>
 #include <xen/guest_access.h>
-#include <xen/domain_page.h>
-#include <xen/err.h>
-#include <asm/page.h>
-#include <asm/current.h>
-#include <asm/flushtlb.h>
-#include <public/memory.h>
+#include <xen/init.h>
+#include <xen/libfdt/libfdt.h>
+#include <xen/mm.h>
+#include <xen/pfn.h>
 #include <xen/sched.h>
+#include <xen/sizes.h>
+#include <xen/types.h>
 #include <xen/vmap.h>
+
 #include <xsm/xsm.h>
-#include <xen/pfn.h>
-#include <xen/sizes.h>
-#include <xen/libfdt/libfdt.h>
 
 #include <asm/fixmap.h>
 #include <asm/setup.h>
 
+#include <public/memory.h>
+
 /* Override macros from asm/page.h to make them work with mfn_t */
 #undef virt_to_mfn
 #define virt_to_mfn(va) _mfn(__virt_to_mfn(va))
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Use the PMAP helpers in xen_{,un}map_table()
Message-Id: <E1o0JdG-00033f-5u@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:42 +0000

commit de5fdb562c3c31639becb4548540fcf58afbc485
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:21:17 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Use the PMAP helpers in xen_{,un}map_table()
    
    During early boot, it is not possible to use xen_{,un}map_table()
    if the page tables are not residing the Xen binary.
    
    This is a blocker to switch some of the helpers to use xen_pt_update()
    as we may need to allocate extra page tables and access them before
    the domheap has been initialized (see setup_xenheap_mappings()).
    
    xen_{,un}map_table() are now updated to use the PMAP helpers for early
    boot map/unmap. Note that the special case for page-tables residing
    in Xen binary has been dropped because it is "complex" and was
    only added as a workaround in 8d4f1b8878e0 ("xen/arm: mm: Allow
    generic xen page-tables helpers to be called early").
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 33 +++++++++------------------------
 1 file changed, 9 insertions(+), 24 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index d40dd4e6c9..b019e4b35b 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -25,6 +25,7 @@
 #include <xen/libfdt/libfdt.h>
 #include <xen/mm.h>
 #include <xen/pfn.h>
+#include <xen/pmap.h>
 #include <xen/sched.h>
 #include <xen/sizes.h>
 #include <xen/types.h>
@@ -980,27 +981,11 @@ void *ioremap(paddr_t pa, size_t len)
 static lpae_t *xen_map_table(mfn_t mfn)
 {
     /*
-     * We may require to map the page table before map_domain_page() is
-     * useable. The requirements here is it must be useable as soon as
-     * page-tables are allocated dynamically via alloc_boot_pages().
-     *
-     * We need to do the check on physical address rather than virtual
-     * address to avoid truncation on Arm32. Therefore is_kernel() cannot
-     * be used.
+     * During early boot, map_domain_page() may be unusable. Use the
+     * PMAP to map temporarily a page-table.
      */
     if ( system_state == SYS_STATE_early_boot )
-    {
-        if ( is_xen_fixed_mfn(mfn) )
-        {
-            /*
-             * It is fine to demote the type because the size of Xen
-             * will always fit in vaddr_t.
-             */
-            vaddr_t offset = mfn_to_maddr(mfn) - virt_to_maddr(&_start);
-
-            return (lpae_t *)(XEN_VIRT_START + offset);
-        }
-    }
+        return pmap_map(mfn);
 
     return map_domain_page(mfn);
 }
@@ -1009,12 +994,12 @@ static void xen_unmap_table(const lpae_t *table)
 {
     /*
      * During early boot, xen_map_table() will not use map_domain_page()
-     * for page-tables residing in Xen binary. So skip the unmap part.
+     * but the PMAP.
      */
-    if ( system_state == SYS_STATE_early_boot && is_kernel(table) )
-        return;
-
-    unmap_domain_page(table);
+    if ( system_state == SYS_STATE_early_boot )
+        pmap_unmap(table);
+    else
+        unmap_domain_page(table);
 }
 
 static int create_xen_table(lpae_t *entry)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm32: setup: Move out the code to populate the boot allocator
Message-Id: <E1o0JdQ-00034K-91@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:11:52 +0000

commit 38ed4a4876383d8acd4365dafb6454feba01a4e5
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:24:49 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm32: setup: Move out the code to populate the boot allocator
    
    In a follow-up patch, we will want to populate the boot allocator
    separately for arm64. The code will end up to be very similar to the one
    on arm32. So move out the code in a new helper populate_boot_allocator().
    
    For now the code is still protected by CONFIG_ARM_32 to avoid any build
    failure on arm64.
    
    Take the opportunity to replace mfn_add(xen_mfn_start, xenheap_pages) with
    xenheap_mfn_end as they are equivalent.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/setup.c | 90 +++++++++++++++++++++++++++++-----------------------
 1 file changed, 51 insertions(+), 39 deletions(-)

diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 65fdaa0900..5ab257f916 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -646,10 +646,58 @@ static void __init init_staticmem_pages(void)
 }
 
 #ifdef CONFIG_ARM_32
+/*
+ * Populate the boot allocator. All the RAM but the following regions
+ * will be added:
+ *  - Modules (e.g., Xen, Kernel)
+ *  - Reserved regions
+ *  - Xenheap
+ */
+static void __init populate_boot_allocator(void)
+{
+    unsigned int i;
+    const struct meminfo *banks = &bootinfo.mem;
+
+    for ( i = 0; i < banks->nr_banks; i++ )
+    {
+        const struct membank *bank = &banks->bank[i];
+        paddr_t bank_end = bank->start + bank->size;
+        paddr_t s, e;
+
+        s = bank->start;
+        while ( s < bank_end )
+        {
+            paddr_t n = bank_end;
+
+            e = next_module(s, &n);
+
+            if ( e == ~(paddr_t)0 )
+                e = n = bank_end;
+
+            /*
+             * Module in a RAM bank other than the one which we are
+             * not dealing with here.
+             */
+            if ( e > bank_end )
+                e = bank_end;
+
+            /* Avoid the xenheap */
+            if ( s < mfn_to_maddr(xenheap_mfn_end) &&
+                 mfn_to_maddr(xenheap_mfn_start) < e )
+            {
+                e = mfn_to_maddr(xenheap_mfn_start);
+                n = mfn_to_maddr(xenheap_mfn_end);
+            }
+
+            fw_unreserved_regions(s, e, init_boot_pages, 0);
+            s = n;
+        }
+    }
+}
+
 static void __init setup_mm(void)
 {
-    paddr_t ram_start, ram_end, ram_size;
-    paddr_t s, e;
+    paddr_t ram_start, ram_end, ram_size, e;
     unsigned long ram_pages;
     unsigned long heap_pages, xenheap_pages, domheap_pages;
     unsigned int i;
@@ -727,43 +775,7 @@ static void __init setup_mm(void)
     setup_xenheap_mappings((e >> PAGE_SHIFT) - xenheap_pages, xenheap_pages);
 
     /* Add non-xenheap memory */
-    for ( i = 0; i < bootinfo.mem.nr_banks; i++ )
-    {
-        paddr_t bank_start = bootinfo.mem.bank[i].start;
-        paddr_t bank_end = bank_start + bootinfo.mem.bank[i].size;
-
-        s = bank_start;
-        while ( s < bank_end )
-        {
-            paddr_t n = bank_end;
-
-            e = next_module(s, &n);
-
-            if ( e == ~(paddr_t)0 )
-            {
-                e = n = ram_end;
-            }
-
-            /*
-             * Module in a RAM bank other than the one which we are
-             * not dealing with here.
-             */
-            if ( e > bank_end )
-                e = bank_end;
-
-            /* Avoid the xenheap */
-            if ( s < mfn_to_maddr(mfn_add(xenheap_mfn_start, xenheap_pages))
-                 && mfn_to_maddr(xenheap_mfn_start) < e )
-            {
-                e = mfn_to_maddr(xenheap_mfn_start);
-                n = mfn_to_maddr(mfn_add(xenheap_mfn_start, xenheap_pages));
-            }
-
-            fw_unreserved_regions(s, e, init_boot_pages, 0);
-
-            s = n;
-        }
-    }
+    populate_boot_allocator();
 
     /* Frame table covers all of RAM region, including holes */
     setup_frametable_mappings(ram_start, ram_end);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm64: mm: Add memory to the boot allocator first
Message-Id: <E1o0Jda-00035A-Br@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:12:02 +0000

commit 942eb0a831b0e2ca9d7cab4be67dc61eba59298a
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 11 12:25:32 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm64: mm: Add memory to the boot allocator first
    
    Currently, memory is added to the boot allocator after the xenheap
    mappings are done. This will break if the first mapping is more than
    512GB of RAM.
    
    In addition to that, a follow-up patch will rework setup_xenheap_mappings()
    to use smaller mappings (e.g. 2MB, 4KB). So it will be necessary to have
    memory in the boot allocator earlier.
    
    Only free memory (e.g. not reserved or modules) can be added to the boot
    allocator. It might be possible that some regions (including the first
    one) will have no free memory.
    
    So we need to add all the free memory to the boot allocator first
    and then add do the mappings.
    
    Populating the boot allocator is nearly the same between arm32 and
    arm64. The only difference is on the former we need to exclude the
    xenheap for the boot allocator. Gate the difference with CONFIG_ARM_32
    so the code be re-used on arm64.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/setup.c | 55 +++++++++++++++++++++++-----------------------------
 1 file changed, 24 insertions(+), 31 deletions(-)

diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 5ab257f916..6016471d37 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -645,13 +645,12 @@ static void __init init_staticmem_pages(void)
 #endif
 }
 
-#ifdef CONFIG_ARM_32
 /*
  * Populate the boot allocator. All the RAM but the following regions
  * will be added:
  *  - Modules (e.g., Xen, Kernel)
  *  - Reserved regions
- *  - Xenheap
+ *  - Xenheap (arm32 only)
  */
 static void __init populate_boot_allocator(void)
 {
@@ -681,6 +680,7 @@ static void __init populate_boot_allocator(void)
             if ( e > bank_end )
                 e = bank_end;
 
+#ifdef CONFIG_ARM_32
             /* Avoid the xenheap */
             if ( s < mfn_to_maddr(xenheap_mfn_end) &&
                  mfn_to_maddr(xenheap_mfn_start) < e )
@@ -688,6 +688,7 @@ static void __init populate_boot_allocator(void)
                 e = mfn_to_maddr(xenheap_mfn_start);
                 n = mfn_to_maddr(xenheap_mfn_end);
             }
+#endif
 
             fw_unreserved_regions(s, e, init_boot_pages, 0);
             s = n;
@@ -695,6 +696,7 @@ static void __init populate_boot_allocator(void)
     }
 }
 
+#ifdef CONFIG_ARM_32
 static void __init setup_mm(void)
 {
     paddr_t ram_start, ram_end, ram_size, e;
@@ -790,45 +792,36 @@ static void __init setup_mm(void)
 #else /* CONFIG_ARM_64 */
 static void __init setup_mm(void)
 {
+    const struct meminfo *banks = &bootinfo.mem;
     paddr_t ram_start = ~0;
     paddr_t ram_end = 0;
     paddr_t ram_size = 0;
-    int bank;
+    unsigned int i;
 
     init_pdx();
 
-    total_pages = 0;
-    for ( bank = 0 ; bank < bootinfo.mem.nr_banks; bank++ )
-    {
-        paddr_t bank_start = bootinfo.mem.bank[bank].start;
-        paddr_t bank_size = bootinfo.mem.bank[bank].size;
-        paddr_t bank_end = bank_start + bank_size;
-        paddr_t s, e;
-
-        ram_size = ram_size + bank_size;
-        ram_start = min(ram_start,bank_start);
-        ram_end = max(ram_end,bank_end);
-
-        setup_xenheap_mappings(bank_start>>PAGE_SHIFT, bank_size>>PAGE_SHIFT);
-
-        s = bank_start;
-        while ( s < bank_end )
-        {
-            paddr_t n = bank_end;
+    /*
+     * We need some memory to allocate the page-tables used for the xenheap
+     * mappings. But some regions may contain memory already allocated
+     * for other uses (e.g. modules, reserved-memory...).
+     *
+     * For simplicity, add all the free regions in the boot allocator.
+     */
+    populate_boot_allocator();
 
-            e = next_module(s, &n);
+    total_pages = 0;
 
-            if ( e == ~(paddr_t)0 )
-            {
-                e = n = bank_end;
-            }
+    for ( i = 0; i < banks->nr_banks; i++ )
+    {
+        const struct membank *bank = &banks->bank[i];
+        paddr_t bank_end = bank->start + bank->size;
 
-            if ( e > bank_end )
-                e = bank_end;
+        ram_size = ram_size + bank->size;
+        ram_start = min(ram_start, bank->start);
+        ram_end = max(ram_end, bank_end);
 
-            fw_unreserved_regions(s, e, init_boot_pages, 0);
-            s = n;
-        }
+        setup_xenheap_mappings(PFN_DOWN(bank->start),
+                               PFN_DOWN(bank->size));
     }
 
     total_pages += ram_size >> PAGE_SHIFT;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Rework setup_xenheap_mappings()
Message-Id: <E1o0Jdk-00037T-Fn@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:12:12 +0000

commit 26a470875b7e6f52a2c172a26c1f9ee432ad8893
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Sat Jun 11 12:26:18 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Rework setup_xenheap_mappings()
    
    The current implementation of setup_xenheap_mappings() is using 1GB
    mappings. This can lead to unexpected result because the mapping
    may alias a non-cachable region (such as device or reserved regions).
    For more details see B2.8 in ARM DDI 0487H.a.
    
    map_pages_to_xen() was recently reworked to allow superpage mappings,
    support contiguous mapping and deal with the use of page-tables before
    they are mapped.
    
    Most of the code in setup_xenheap_mappings() is now replaced with a
    single call to map_pages_to_xen().
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
---
 xen/arch/arm/mm.c | 87 ++++++++++++-------------------------------------------
 1 file changed, 18 insertions(+), 69 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index b019e4b35b..65af44f422 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -138,17 +138,6 @@ static DEFINE_PAGE_TABLE(cpu0_pgtable);
 static DEFINE_PAGE_TABLES(cpu0_dommap, DOMHEAP_SECOND_PAGES);
 #endif
 
-#ifdef CONFIG_ARM_64
-/* The first page of the first level mapping of the xenheap. The
- * subsequent xenheap first level pages are dynamically allocated, but
- * we need this one to bootstrap ourselves. */
-static DEFINE_PAGE_TABLE(xenheap_first_first);
-/* The zeroeth level slot which uses xenheap_first_first. Used because
- * setup_xenheap_mappings otherwise relies on mfn_to_virt which isn't
- * valid for a non-xenheap mapping. */
-static __initdata int xenheap_first_first_slot = -1;
-#endif
-
 /* Common pagetable leaves */
 /* Second level page tables.
  *
@@ -831,77 +820,37 @@ void __init setup_xenheap_mappings(unsigned long base_mfn,
 void __init setup_xenheap_mappings(unsigned long base_mfn,
                                    unsigned long nr_mfns)
 {
-    lpae_t *first, pte;
-    unsigned long mfn, end_mfn;
-    vaddr_t vaddr;
-
-    /* Align to previous 1GB boundary */
-    mfn = base_mfn & ~((FIRST_SIZE>>PAGE_SHIFT)-1);
+    int rc;
 
     /* First call sets the xenheap physical and virtual offset. */
     if ( mfn_eq(xenheap_mfn_start, INVALID_MFN) )
     {
+        unsigned long mfn_gb = base_mfn & ~((FIRST_SIZE >> PAGE_SHIFT) - 1);
+
         xenheap_mfn_start = _mfn(base_mfn);
         xenheap_base_pdx = mfn_to_pdx(_mfn(base_mfn));
+        /*
+         * The base address may not be aligned to the first level
+         * size (e.g. 1GB when using 4KB pages). This would prevent
+         * superpage mappings for all the regions because the virtual
+         * address and machine address should both be suitably aligned.
+         *
+         * Prevent that by offsetting the start of the xenheap virtual
+         * address.
+         */
         xenheap_virt_start = DIRECTMAP_VIRT_START +
-            (base_mfn - mfn) * PAGE_SIZE;
+            (base_mfn - mfn_gb) * PAGE_SIZE;
     }
 
     if ( base_mfn < mfn_x(xenheap_mfn_start) )
         panic("cannot add xenheap mapping at %lx below heap start %lx\n",
               base_mfn, mfn_x(xenheap_mfn_start));
 
-    end_mfn = base_mfn + nr_mfns;
-
-    /*
-     * Virtual address aligned to previous 1GB to match physical
-     * address alignment done above.
-     */
-    vaddr = (vaddr_t)__mfn_to_virt(base_mfn) & FIRST_MASK;
-
-    while ( mfn < end_mfn )
-    {
-        int slot = zeroeth_table_offset(vaddr);
-        lpae_t *p = &xen_pgtable[slot];
-
-        if ( p->pt.valid )
-        {
-            /* mfn_to_virt is not valid on the 1st 1st mfn, since it
-             * is not within the xenheap. */
-            first = slot == xenheap_first_first_slot ?
-                xenheap_first_first : mfn_to_virt(lpae_get_mfn(*p));
-        }
-        else if ( xenheap_first_first_slot == -1)
-        {
-            /* Use xenheap_first_first to bootstrap the mappings */
-            first = xenheap_first_first;
-
-            pte = pte_of_xenaddr((vaddr_t)xenheap_first_first);
-            pte.pt.table = 1;
-            write_pte(p, pte);
-
-            xenheap_first_first_slot = slot;
-        }
-        else
-        {
-            mfn_t first_mfn = alloc_boot_pages(1, 1);
-
-            clear_page(mfn_to_virt(first_mfn));
-            pte = mfn_to_xen_entry(first_mfn, MT_NORMAL);
-            pte.pt.table = 1;
-            write_pte(p, pte);
-            first = mfn_to_virt(first_mfn);
-        }
-
-        pte = mfn_to_xen_entry(_mfn(mfn), MT_NORMAL);
-        /* TODO: Set pte.pt.contig when appropriate. */
-        write_pte(&first[first_table_offset(vaddr)], pte);
-
-        mfn += FIRST_SIZE>>PAGE_SHIFT;
-        vaddr += FIRST_SIZE;
-    }
-
-    flush_xen_tlb_local();
+    rc = map_pages_to_xen((vaddr_t)__mfn_to_virt(base_mfn),
+                          _mfn(base_mfn), nr_mfns,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the xenheap mappings.\n");
 }
 #endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: mm: Re-implement setup_frame_table_mappings() with map_pages_to_xen()
Message-Id: <E1o0Jdu-00037y-JB@xenbits.xenproject.org>
Date: Sun, 12 Jun 2022 09:12:22 +0000

commit c9a707df83aad17a6fcf2e8330ab3b5bead6fb8b
Author:     Julien Grall <julien.grall@arm.com>
AuthorDate: Sat Jun 11 12:27:41 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 11 12:29:06 2022 +0100

    xen/arm: mm: Re-implement setup_frame_table_mappings() with map_pages_to_xen()
    
    Now that map_pages_to_xen() has been extended to support 2MB mappings,
    we can replace the create_mappings() call by map_pages_to_xen() call.
    
    This has the advantage to remove the differences between 32-bit and
    64-bit code.
    
    Lastly remove create_mappings() as there is no more callers.
    
    Signed-off-by: Julien Grall <julien.grall@arm.com>
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
    Tested-by: Luca Fancellu <luca.fancellu@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/mm.c | 64 ++++++-------------------------------------------------
 1 file changed, 6 insertions(+), 58 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 65af44f422..be37176a47 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -369,40 +369,6 @@ void clear_fixmap(unsigned map)
     BUG_ON(res != 0);
 }
 
-/* Create Xen's mappings of memory.
- * Mapping_size must be either 2MB or 32MB.
- * Base and virt must be mapping_size aligned.
- * Size must be a multiple of mapping_size.
- * second must be a contiguous set of second level page tables
- * covering the region starting at virt_offset. */
-static void __init create_mappings(lpae_t *second,
-                                   unsigned long virt_offset,
-                                   unsigned long base_mfn,
-                                   unsigned long nr_mfns,
-                                   unsigned int mapping_size)
-{
-    unsigned long i, count;
-    const unsigned long granularity = mapping_size >> PAGE_SHIFT;
-    lpae_t pte, *p;
-
-    ASSERT((mapping_size == MB(2)) || (mapping_size == MB(32)));
-    ASSERT(!((virt_offset >> PAGE_SHIFT) % granularity));
-    ASSERT(!(base_mfn % granularity));
-    ASSERT(!(nr_mfns % granularity));
-
-    count = nr_mfns / XEN_PT_LPAE_ENTRIES;
-    p = second + second_linear_offset(virt_offset);
-    pte = mfn_to_xen_entry(_mfn(base_mfn), MT_NORMAL);
-    if ( granularity == 16 * XEN_PT_LPAE_ENTRIES )
-        pte.pt.contig = 1;  /* These maps are in 16-entry contiguous chunks. */
-    for ( i = 0; i < count; i++ )
-    {
-        write_pte(p + i, pte);
-        pte.pt.base += 1 << XEN_PT_LPAE_SHIFT;
-    }
-    flush_xen_tlb_local();
-}
-
 #ifdef CONFIG_DOMAIN_PAGE
 void *map_domain_page_global(mfn_t mfn)
 {
@@ -862,36 +828,18 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe)
     unsigned long frametable_size = nr_pdxs * sizeof(struct page_info);
     mfn_t base_mfn;
     const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) : MB(32);
-#ifdef CONFIG_ARM_64
-    lpae_t *second, pte;
-    unsigned long nr_second;
-    mfn_t second_base;
-    int i;
-#endif
+    int rc;
 
     frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps));
     /* Round up to 2M or 32M boundary, as appropriate. */
     frametable_size = ROUNDUP(frametable_size, mapping_size);
     base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12));
 
-#ifdef CONFIG_ARM_64
-    /* Compute the number of second level pages. */
-    nr_second = ROUNDUP(frametable_size, FIRST_SIZE) >> FIRST_SHIFT;
-    second_base = alloc_boot_pages(nr_second, 1);
-    second = mfn_to_virt(second_base);
-    for ( i = 0; i < nr_second; i++ )
-    {
-        clear_page(mfn_to_virt(mfn_add(second_base, i)));
-        pte = mfn_to_xen_entry(mfn_add(second_base, i), MT_NORMAL);
-        pte.pt.table = 1;
-        write_pte(&xen_first[first_table_offset(FRAMETABLE_VIRT_START)+i], pte);
-    }
-    create_mappings(second, 0, mfn_x(base_mfn), frametable_size >> PAGE_SHIFT,
-                    mapping_size);
-#else
-    create_mappings(xen_second, FRAMETABLE_VIRT_START, mfn_x(base_mfn),
-                    frametable_size >> PAGE_SHIFT, mapping_size);
-#endif
+    rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn,
+                          frametable_size >> PAGE_SHIFT,
+                          PAGE_HYPERVISOR_RW | _PAGE_BLOCK);
+    if ( rc )
+        panic("Unable to setup the frametable mappings.\n");
 
     memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info));
     memset(&frame_table[nr_pdxs], -1,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] add more MISRA C rules to docs/misra/rules.rst
Message-Id: <E1o1FrI-00038H-3c@xenbits.xenproject.org>
Date: Tue, 14 Jun 2022 23:22:04 +0000

commit 162dea4e768b835114c736cfd3fa1fc3742d39c5
Author:     Stefano Stabellini <sstabellini@kernel.org>
AuthorDate: Fri Jun 10 14:27:55 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 14 16:14:14 2022 -0700

    add more MISRA C rules to docs/misra/rules.rst
    
    Add the new MISRA C rules agreed by the MISRA C working group to
    docs/misra/rules.rst.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misra/rules.rst | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 6ccff07765..8a659d8d47 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -89,6 +89,29 @@ existing codebase are work-in-progress.
        (xen/include/public/) are allowed to retain longer identifiers
        for backward compatibility.
 
+   * - `Rule 5.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_02.c>`_
+     - Required
+     - Identifiers declared in the same scope and name space shall be
+       distinct
+     - The Xen characters limit for identifiers is 40. Public headers
+       (xen/include/public/) are allowed to retain longer identifiers
+       for backward compatibility.
+
+   * - `Rule 5.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_03.c>`_
+     - Required
+     - An identifier declared in an inner scope shall not hide an
+       identifier declared in an outer scope
+     - Using macros as macro parameters at invocation time is allowed
+       even if both macros use identically named local variables, e.g.
+       max(var0, min(var1, var2))
+
+   * - `Rule 5.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_04.c>`_
+     - Required
+     - Macro identifiers shall be distinct
+     - The Xen characters limit for macro identifiers is 40. Public
+       headers (xen/include/public/) are allowed to retain longer
+       identifiers for backward compatibility.
+
    * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
      - Required
      - Single-bit named bit fields shall not be of a signed type
@@ -123,8 +146,75 @@ existing codebase are work-in-progress.
        declarations of objects and functions that have internal linkage
      -
 
+   * - `Rule 8.10 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_10.c>`_
+     - Required
+     - An inline function shall be declared with the static storage class
+     - gnu_inline (without static) is allowed.
+
    * - `Rule 8.12 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_12.c>`_
      - Required
      - Within an enumerator list the value of an implicitly-specified
        enumeration constant shall be unique
      -
+
+   * - `Rule 9.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_09_01.c>`_
+     - Mandatory
+     - The value of an object with automatic storage duration shall not
+       be read before it has been set
+     - Rule clarification: do not use variables before they are
+       initialized. An explicit initializer is not necessarily required.
+       Try reducing the scope of the variable. If an explicit
+       initializer is added, consider initializing the variable to a
+       poison value.
+
+   * - `Rule 9.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_09_02.c>`_
+     - Required
+     - The initializer for an aggregate or union shall be enclosed in
+       braces
+     -
+
+   * - `Rule 13.6 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_13_06.c>`_
+     - Mandatory
+     - The operand of the sizeof operator shall not contain any
+       expression which has potential side effects
+     -
+
+   * - `Rule 14.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_14_01.c>`_
+     - Required
+     - A loop counter shall not have essentially floating type
+     -
+
+   * - `Rule 16.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_16_07.c>`_
+     - Required
+     - A switch-expression shall not have essentially Boolean type
+     -
+
+   * - `Rule 17.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_17_03.c>`_
+     - Mandatory
+     - A function shall not be declared implicitly
+     -
+
+   * - `Rule 17.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_17_04.c>`_
+     - Mandatory
+     - All exit paths from a function with non-void return type shall
+       have an explicit return statement with an expression
+     -
+
+   * - `Rule 20.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_07.c>`_
+     - Required
+     - Expressions resulting from the expansion of macro parameters
+       shall be enclosed in parentheses
+     -
+
+   * - `Rule 20.13 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_13.c>`_
+     - Required
+     - A line whose first token is # shall be a valid preprocessing
+       directive
+     -
+
+   * - `Rule 20.14 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_14.c>`_
+     - Required
+     - All #else #elif and #endif preprocessor directives shall reside
+       in the same file as the #if #ifdef or #ifndef directive to which
+       they are related
+     -
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] IOMMU/x86: work around bogus gcc12 warning in hvm_gsi_eoi()
Message-Id: <E1o1OSW-0004EF-Di@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 08:33:04 +0000

commit 80ad8db8a4d9bb24952f0aea788ce6f47566fa76
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 15 10:19:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:19:32 2022 +0200

    IOMMU/x86: work around bogus gcc12 warning in hvm_gsi_eoi()
    
    As per [1] the expansion of the pirq_dpci() macro causes a -Waddress
    controlled warning (enabled implicitly in our builds, if not by default)
    tying the middle part of the involved conditional expression to the
    surrounding boolean context. Work around this by introducing a local
    inline function in the affected source file.
    
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    
    [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102967
---
 xen/drivers/passthrough/x86/hvm.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c
index 0f94203af8..35b4938ab2 100644
--- a/xen/drivers/passthrough/x86/hvm.c
+++ b/xen/drivers/passthrough/x86/hvm.c
@@ -25,6 +25,18 @@
 #include <asm/hvm/support.h>
 #include <asm/io_apic.h>
 
+/*
+ * Gcc12 takes issue with pirq_dpci() being used in boolean context (see gcc
+ * bug 102967). While we can't replace the macro definition in the header by an
+ * inline function, we can do so here.
+ */
+static inline struct hvm_pirq_dpci *_pirq_dpci(struct pirq *pirq)
+{
+    return pirq_dpci(pirq);
+}
+#undef pirq_dpci
+#define pirq_dpci(pirq) _pirq_dpci(pirq)
+
 static DEFINE_PER_CPU(struct list_head, dpci_list);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/hvm: widen condition for is_hvm_pv_evtchn_domain() and report fix in CPUID
Message-Id: <E1o1OSg-0004Eg-H9@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 08:33:14 +0000

commit e2d2b9fd7a2b349a1a9a75b482981cfd2d2407a8
Author:     Jane Malalane <jane.malalane@citrix.com>
AuthorDate: Wed Jun 15 10:21:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:21:08 2022 +0200

    x86/hvm: widen condition for is_hvm_pv_evtchn_domain() and report fix in CPUID
    
    Have is_hvm_pv_evtchn_domain() return true for vector callbacks for
    evtchn delivery set up on a per-vCPU basis via
    HVMOP_set_evtchn_upcall_vector.
    
    Assume that if vCPU0 uses HVMOP_set_evtchn_upcall_vector, all
    remaining vCPUs will too and thus remove is_hvm_pv_evtchn_vcpu() and
    replace sole caller with is_hvm_pv_evtchn_domain().
    
    is_hvm_pv_evtchn_domain() returning true is a condition for setting up
    physical IRQ to event channel mappings. Therefore, also add a CPUID
    bit so that guests know whether the check in is_hvm_pv_evtchn_domain()
    will fail when using HVMOP_set_evtchn_upcall_vector. This matters for
    guests that route PIRQs over event channels since
    is_hvm_pv_evtchn_domain() is a condition in physdev_map_pirq().
    
    The naming of the CPUID bit is quite generic about upcall support
    being available. That's done so that the define name doesn't become
    overly long.
    
    A guest that doesn't care about physical interrupts routed over event
    channels can just test for the availability of the hypercall directly
    (HVMOP_set_evtchn_upcall_vector) without checking the CPUID bit.
    
    Signed-off-by: Jane Malalane <jane.malalane@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/hvm/irq.c              | 2 +-
 xen/arch/x86/include/asm/domain.h   | 9 +++++++--
 xen/arch/x86/traps.c                | 6 ++++++
 xen/include/public/arch-x86/cpuid.h | 5 +++++
 4 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c
index 5a7f39b54f..19252448cb 100644
--- a/xen/arch/x86/hvm/irq.c
+++ b/xen/arch/x86/hvm/irq.c
@@ -325,7 +325,7 @@ void hvm_assert_evtchn_irq(struct vcpu *v)
 
         vlapic_set_irq(vcpu_vlapic(v), vector, 0);
     }
-    else if ( is_hvm_pv_evtchn_vcpu(v) )
+    else if ( is_hvm_pv_evtchn_domain(v->domain) )
         vcpu_kick(v);
     else if ( v->vcpu_id == 0 )
         hvm_set_callback_irq_level(v);
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
index 3aa0919fa6..75389e962a 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -14,9 +14,14 @@
 
 #define has_32bit_shinfo(d)    ((d)->arch.has_32bit_shinfo)
 
+/*
+ * Set to true if either the global vector-type callback or per-vCPU
+ * LAPIC vectors are used. Assume all vCPUs will use
+ * HVMOP_set_evtchn_upcall_vector as long as the initial vCPU does.
+ */
 #define is_hvm_pv_evtchn_domain(d) (is_hvm_domain(d) && \
-        (d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector)
-#define is_hvm_pv_evtchn_vcpu(v) (is_hvm_pv_evtchn_domain(v->domain))
+        ((d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector || \
+         (d)->vcpu[0]->arch.hvm.evtchn_upcall_vector))
 #define is_domain_direct_mapped(d) ((void)(d), 0)
 
 #define VCPU_TRAP_NONE         0
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 0a5e42595c..bb3dfcc90f 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1152,6 +1152,12 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf,
         res->a |= XEN_HVM_CPUID_DOMID_PRESENT;
         res->c = d->domain_id;
 
+        /*
+         * Per-vCPU event channel upcalls are implemented and work
+         * correctly with PIRQs routed over event channels.
+         */
+        res->a |= XEN_HVM_CPUID_UPCALL_VECTOR;
+
         break;
 
     case 5: /* PV-specific parameters */
diff --git a/xen/include/public/arch-x86/cpuid.h b/xen/include/public/arch-x86/cpuid.h
index f2b2b3632c..c49eefeaf8 100644
--- a/xen/include/public/arch-x86/cpuid.h
+++ b/xen/include/public/arch-x86/cpuid.h
@@ -109,6 +109,11 @@
  * field from 8 to 15 bits, allowing to target APIC IDs up 32768.
  */
 #define XEN_HVM_CPUID_EXT_DEST_ID      (1u << 5)
+/*
+ * Per-vCPU event channel upcalls work correctly with physical IRQs
+ * bound to event channels.
+ */
+#define XEN_HVM_CPUID_UPCALL_VECTOR    (1u << 6)
 
 /*
  * Leaf 6 (0x40000x05)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenstore: simplify loop handling connection I/O
Message-Id: <E1o1OSq-0004FD-Ls@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 08:33:24 +0000

commit e8e6e42279a5723239c5c40ba4c7f579a979465d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Wed Jun 15 10:22:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:22:38 2022 +0200

    tools/xenstore: simplify loop handling connection I/O
    
    The loop handling input and output of connections of xenstored is
    open coding list_for_each_entry_safe() in an incredibly complicated
    way.
    
    Use list_for_each_entry_safe() instead, making it much more clear how
    the code is working.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 tools/xenstore/xenstored_core.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c
index 6e4022e5da..fa733e714e 100644
--- a/tools/xenstore/xenstored_core.c
+++ b/tools/xenstore/xenstored_core.c
@@ -2368,16 +2368,8 @@ int main(int argc, char *argv[])
 			}
 		}
 
-		next = list_entry(connections.next, typeof(*conn), list);
-		if (&next->list != &connections)
-			talloc_increase_ref_count(next);
-		while (&next->list != &connections) {
-			conn = next;
-
-			next = list_entry(conn->list.next,
-					  typeof(*conn), list);
-			if (&next->list != &connections)
-				talloc_increase_ref_count(next);
+		list_for_each_entry_safe(conn, next, &connections, list) {
+			talloc_increase_ref_count(conn);
 
 			if (conn_can_read(conn))
 				handle_input(conn);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] build: fix exporting for make 3.82
Message-Id: <E1o1OT0-0004G3-Or@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 08:33:34 +0000

commit 95b0d7bbddfbd797f37f7a09f0586c4bbd22291b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 15 10:23:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:23:16 2022 +0200

    build: fix exporting for make 3.82
    
    GNU make 3.82 apparently has a quirk where exporting an undefined
    variable prevents its value from subsequently being updated. This
    situation can arise due to our adding of -rR to MAKEFLAGS, which takes
    effect also on make simply re-invoking itself. Once these flags are in
    effect, CC (in particular) is empty (undefined), and would be defined
    only via Config.mk including StdGNU.mk or alike. With the quirk, CC
    remains empty, yet with an empty CC the compiler minimum version check
    fails, breaking the build.
    
    Move the exporting of the various tool stack component variables past
    where they gain their (final) values.
    
    See also be63d9d47f57 ("build: tweak variable exporting for make 3.82").
    
    Fixes: 15a0578ca4b0 ("build: shuffle main Makefile")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
---
 xen/Makefile | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/Makefile b/xen/Makefile
index 82f5310b12..ede4f15b18 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -44,8 +44,6 @@ export ARCH SRCARCH
 # Allow someone to change their config file
 export KCONFIG_CONFIG ?= .config
 
-export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE
-
 export TARGET := xen
 
 .PHONY: dist
@@ -244,6 +242,7 @@ export TARGET_ARCH     := $(shell echo $(XEN_TARGET_ARCH) | \
                                 -e s'/riscv.*/riscv/g')
 
 export CONFIG_SHELL := $(SHELL)
+export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE
 export YACC = $(if $(BISON),$(BISON),bison)
 export LEX = $(if $(FLEX),$(FLEX),flex)
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] build: remove auto.conf prerequisite from compat/xlat.h target
Message-Id: <E1o1OTA-0004Gk-Rf@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 08:33:44 +0000

commit 8c1d9760b1d847d983529eae2b360b38648841b5
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Wed Jun 15 10:24:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:24:06 2022 +0200

    build: remove auto.conf prerequisite from compat/xlat.h target
    
    Now that the command line generating "xlat.h" is check on rebuild, the
    header will be regenerated whenever the list of xlat headers changes
    due to change in ".config". We don't need to force a regeneration for
    every changes in ".config".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 6d9bcc19b0..617599df7e 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -101,7 +101,7 @@ cmd_xlat_h = \
 	cat $(filter %.h,$^) >$@.new; \
 	mv -f $@.new $@
 
-$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf FORCE
+$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) FORCE
 	$(call if_changed,xlat_h)
 
 ifeq ($(XEN_TARGET_ARCH),$(XEN_COMPILE_ARCH))
--
generated by git-patchbot for /home/xen/git/xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Wed Jun 15 13:56:33 2022
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen staging] Merge tag 'v7.0.0' into 'staging'
Message-Id: <E1o1TVS-00075m-Eg@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 13:56:26 +0000

=== This changeset includes merge from high-traffic branch ===
Commits on that branch are not reported individually.

commit d10fec9f7ac61de6ef1fb494d0f99309fce46a97
Merge: 823a3f11fb8f04c3c3cc0f95f968fef1bfc6534f a68d6d311c2d1fd9d2fa9a0768ea2353e8a79b42
Author:     Anthony PERARD <anthony.perard@gmail.com>
AuthorDate: Wed Jun 15 14:38:25 2022 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Wed Jun 15 14:38:25 2022 +0100

    Merge tag 'v7.0.0' into 'staging'
 .cirrus.yml                                        |    1 -
 .gitattributes                                     |    1 +
 .github/lockdown.yml                               |   34 -
 .github/workflows/lockdown.yml                     |   30 +
 .gitignore                                         |    1 +
 .gitlab-ci.d/buildtest-template.yml                |    2 +-
 .gitlab-ci.d/buildtest.yml                         |  217 +-
 .gitlab-ci.d/cirrus.yml                            |   46 +-
 .gitlab-ci.d/cirrus/build.yml                      |    1 +
 .gitlab-ci.d/cirrus/freebsd-12.vars                |   11 +-
 .gitlab-ci.d/cirrus/freebsd-13.vars                |   11 +-
 .gitlab-ci.d/cirrus/kvm-build.yml                  |   31 +
 .gitlab-ci.d/cirrus/macos-11.vars                  |   11 +-
 .gitlab-ci.d/container-cross.yml                   |   23 +-
 .gitlab-ci.d/containers.yml                        |    5 -
 .gitlab-ci.d/crossbuild-template.yml               |    2 +-
 .gitlab-ci.d/crossbuilds.yml                       |   19 +
 .gitlab-ci.d/custom-runners.yml                    |  228 +-
 .../custom-runners/centos-stream-8-x86_64.yml      |   28 +
 .../custom-runners/ubuntu-20.04-aarch32.yml        |   23 +
 .../custom-runners/ubuntu-20.04-aarch64.yml        |  118 +
 .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml |  130 +
 .gitlab-ci.d/edk2.yml                              |    6 +-
 .gitlab-ci.d/edk2/Dockerfile                       |    6 +-
 .gitlab-ci.d/opensbi.yml                           |    2 -
 .gitlab-ci.d/qemu-project.yml                      |    1 +
 .gitlab-ci.d/static_checks.yml                     |    4 +-
 .gitlab-ci.d/windows.yml                           |   96 +
 .gitmodules                                        |    3 +
 .mailmap                                           |   15 +-
 .travis.yml                                        |   41 +-
 Kconfig.host                                       |    4 +
 MAINTAINERS                                        |  514 ++-
 Makefile                                           |   32 +-
 README.rst                                         |   14 +-
 VERSION                                            |    2 +-
 accel/hvf/hvf-accel-ops.c                          |   31 +-
 accel/kvm/kvm-accel-ops.c                          |   12 +
 accel/kvm/kvm-all.c                                |   58 +-
 accel/kvm/meson.build                              |    1 -
 accel/kvm/sev-stub.c                               |   22 -
 accel/meson.build                                  |   12 +-
 accel/qtest/qtest.c                                |    1 -
 accel/stubs/hax-stub.c                             |    2 +
 accel/stubs/kvm-stub.c                             |   12 +-
 accel/stubs/meson.build                            |   11 +-
 accel/tcg/atomic_common.c.inc                      |   45 +-
 accel/tcg/atomic_template.h                        |   61 +-
 accel/tcg/cpu-exec.c                               |  138 +-
 accel/tcg/cputlb.c                                 |  495 +--
 accel/tcg/hmp.c                                    |   22 +-
 accel/tcg/ldst_common.c.inc                        |  307 ++
 accel/tcg/meson.build                              |    2 +-
 accel/tcg/plugin-gen.c                             |  196 +-
 accel/tcg/tcg-accel-ops-icount.c                   |    1 +
 accel/tcg/tcg-accel-ops-mttcg.c                    |    3 +-
 accel/tcg/tcg-accel-ops-rr.c                       |    7 +-
 accel/tcg/tcg-accel-ops.c                          |    1 +
 accel/tcg/translate-all.c                          |  148 +-
 accel/tcg/translator.c                             |   39 +
 accel/tcg/user-exec.c                              | 1177 ++-----
 audio/alsaaudio.c                                  |    5 +-
 audio/audio.c                                      |  224 +-
 audio/audio.h                                      |    4 +-
 audio/audio_int.h                                  |   27 +-
 audio/audio_legacy.c                               |    6 +-
 audio/audio_template.h                             |   29 +-
 audio/coreaudio.c                                  |  681 ----
 audio/coreaudio.m                                  |  687 ++++
 audio/dbusaudio.c                                  |  654 ++++
 audio/dsoundaudio.c                                |   43 +-
 audio/jackaudio.c                                  |   15 +-
 audio/meson.build                                  |   29 +-
 audio/mixeng.c                                     |    8 +-
 audio/noaudio.c                                    |    1 +
 audio/ossaudio.c                                   |   21 +-
 audio/paaudio.c                                    |   55 +-
 audio/sdlaudio.c                                   |   23 +-
 audio/trace-events                                 |    5 +
 audio/wavaudio.c                                   |    1 +
 backends/cryptodev.c                               |    2 +-
 backends/dbus-vmstate1.xml                         |   52 +
 backends/hostmem-epc.c                             |   82 +
 backends/hostmem-file.c                            |    1 +
 backends/hostmem.c                                 |    1 +
 backends/meson.build                               |    1 +
 backends/tpm/meson.build                           |   14 +-
 backends/tpm/tpm_emulator.c                        |    5 +-
 backends/tpm/tpm_passthrough.c                     |    2 +-
 block.c                                            |  773 ++++-
 block/aio_task.c                                   |    2 +
 block/amend.c                                      |   28 +
 block/backup-top.c                                 |  253 --
 block/backup-top.h                                 |   42 -
 block/backup.c                                     |  124 +-
 block/blkdebug.c                                   |   12 +-
 block/blklogwrites.c                               |   16 +-
 block/blkreplay.c                                  |    8 +-
 block/blkverify.c                                  |   11 +-
 block/block-backend.c                              |  431 ++-
 block/block-copy.c                                 |  277 +-
 block/bochs.c                                      |    4 +-
 block/cloop.c                                      |    4 +-
 block/commit.c                                     |    8 +-
 block/copy-before-write.c                          |  514 +++
 block/copy-before-write.h                          |   46 +
 block/copy-on-read.c                               |   19 +-
 block/coroutines.h                                 |   84 +-
 block/create.c                                     |    2 +
 block/crypto.c                                     |   77 +-
 block/curl.c                                       |  106 +-
 block/dirty-bitmap.c                               |   20 +-
 block/dmg.c                                        |    5 +-
 block/export/export.c                              |    2 +-
 block/export/fuse.c                                |   82 +-
 block/export/vhost-user-blk-server.c               |    5 +
 block/file-posix.c                                 |  130 +-
 block/file-win32.c                                 |  109 +-
 block/filter-compress.c                            |   15 +-
 block/gluster.c                                    |   36 +-
 block/io.c                                         |  268 +-
 block/io_uring.c                                   |   19 +-
 block/iscsi.c                                      |   65 +-
 block/linux-aio.c                                  |   54 +-
 block/meson.build                                  |   65 +-
 block/mirror.c                                     |  116 +-
 block/monitor/bitmap-qmp-cmds.c                    |   11 +-
 block/monitor/block-hmp-cmds.c                     |   14 +-
 block/nbd.c                                        |  552 ++-
 block/nfs.c                                        |   18 +-
 block/null.c                                       |   18 +-
 block/nvme.c                                       |  156 +-
 block/parallels-ext.c                              |    3 +-
 block/parallels.c                                  |    3 +-
 block/preallocate.c                                |   29 +-
 block/qcow.c                                       |   17 +-
 block/qcow2-cache.c                                |    1 +
 block/qcow2-cluster.c                              |   94 +-
 block/qcow2-refcount.c                             |  347 +-
 block/qcow2-snapshot.c                             |    1 +
 block/qcow2.c                                      |  142 +-
 block/qcow2.h                                      |    9 +-
 block/qed-l2-cache.c                               |    1 +
 block/qed-table.c                                  |    1 +
 block/qed.c                                        |   10 +-
 block/quorum.c                                     |   12 +-
 block/raw-format.c                                 |   58 +-
 block/rbd.c                                        |  196 +-
 block/replication.c                                |    4 +-
 block/reqlist.c                                    |   85 +
 block/snapshot-access.c                            |  132 +
 block/snapshot.c                                   |   28 +
 block/ssh.c                                        |   50 +-
 block/stream.c                                     |   48 +-
 block/throttle.c                                   |   18 +-
 block/trace-events                                 |   18 +-
 block/vdi.c                                        |    9 +-
 block/vhdx-log.c                                   |    1 +
 block/vhdx.c                                       |    1 +
 block/vmdk.c                                       |   39 +-
 block/vpc.c                                        |   12 +-
 block/vvfat.c                                      |   61 +-
 block/win32-aio.c                                  |    5 +-
 blockdev-nbd.c                                     |    6 -
 blockdev.c                                         |   85 +-
 blockjob.c                                         |   52 +-
 bsd-user/arm/signal.c                              |  221 ++
 bsd-user/arm/target.h                              |   21 +
 bsd-user/arm/target_arch.h                         |   28 +
 bsd-user/arm/target_arch_cpu.c                     |   39 +
 bsd-user/arm/target_arch_cpu.h                     |  213 ++
 bsd-user/arm/target_arch_elf.h                     |  128 +
 bsd-user/arm/target_arch_reg.h                     |   60 +
 bsd-user/arm/target_arch_signal.h                  |   88 +
 bsd-user/arm/target_arch_sigtramp.h                |   49 +
 bsd-user/arm/target_arch_sysarch.h                 |    6 +-
 bsd-user/arm/target_arch_thread.h                  |   80 +
 bsd-user/arm/target_arch_vmparam.h                 |   48 +
 bsd-user/arm/target_syscall.h                      |   27 +-
 bsd-user/bsd-file.h                                |   30 +
 bsd-user/bsd-mman.h                                |  121 -
 bsd-user/bsdload.c                                 |  104 +-
 bsd-user/elfcore.c                                 |   10 +
 bsd-user/elfload.c                                 | 1469 ++------
 bsd-user/errno_defs.h                              |   17 +-
 bsd-user/freebsd/host-os.h                         |   25 +
 bsd-user/freebsd/meson.build                       |    4 +
 bsd-user/freebsd/os-sys.c                          |   27 +
 bsd-user/freebsd/os-syscall.c                      |   92 +
 bsd-user/freebsd/strace.list                       |   11 -
 bsd-user/freebsd/target_os_elf.h                   |  137 +
 bsd-user/freebsd/target_os_siginfo.h               |  158 +
 bsd-user/freebsd/target_os_signal.h                |   81 +
 bsd-user/freebsd/target_os_stack.h                 |  181 +
 bsd-user/freebsd/target_os_thread.h                |   25 +
 bsd-user/freebsd/target_os_ucontext.h              |   44 +
 bsd-user/freebsd/target_os_user.h                  |  329 ++
 bsd-user/freebsd/target_os_vmparam.h               |   38 +
 bsd-user/host/arm/host-signal.h                    |   35 +
 bsd-user/host/i386/host-signal.h                   |   37 +
 bsd-user/host/x86_64/host-signal.h                 |   37 +
 bsd-user/i386/signal.c                             |   68 +
 bsd-user/i386/target.h                             |   21 +
 bsd-user/i386/target_arch.h                        |   31 +
 bsd-user/i386/target_arch_cpu.c                    |   71 +
 bsd-user/i386/target_arch_cpu.h                    |  198 ++
 bsd-user/i386/target_arch_elf.h                    |   35 +
 bsd-user/i386/target_arch_reg.h                    |   82 +
 bsd-user/i386/target_arch_signal.h                 |   91 +
 bsd-user/i386/target_arch_sigtramp.h               |   29 +
 bsd-user/i386/target_arch_thread.h                 |   47 +
 bsd-user/i386/target_arch_vmparam.h                |   46 +
 bsd-user/include/special-errno.h                   |   24 +
 bsd-user/main.c                                    |  864 ++---
 bsd-user/meson.build                               |   14 +-
 bsd-user/mips/target_arch_sysarch.h                |   69 -
 bsd-user/mips/target_syscall.h                     |   52 -
 bsd-user/mips64/target_arch_sysarch.h              |   69 -
 bsd-user/mips64/target_syscall.h                   |   53 -
 bsd-user/mmap.c                                    |  546 ++-
 bsd-user/netbsd/host-os.h                          |   25 +
 bsd-user/netbsd/target_os_elf.h                    |  146 +
 bsd-user/netbsd/target_os_siginfo.h                |   82 +
 bsd-user/netbsd/target_os_signal.h                 |   69 +
 bsd-user/netbsd/target_os_stack.h                  |   56 +
 bsd-user/netbsd/target_os_thread.h                 |   25 +
 bsd-user/openbsd/host-os.h                         |   25 +
 bsd-user/openbsd/target_os_elf.h                   |  146 +
 bsd-user/openbsd/target_os_siginfo.h               |   82 +
 bsd-user/openbsd/target_os_signal.h                |   69 +
 bsd-user/openbsd/target_os_stack.h                 |   56 +
 bsd-user/openbsd/target_os_thread.h                |   25 +
 bsd-user/qemu.h                                    |  162 +-
 bsd-user/signal-common.h                           |   75 +
 bsd-user/signal.c                                  | 1026 +++++-
 bsd-user/sparc/target_arch_sysarch.h               |   52 -
 bsd-user/sparc/target_syscall.h                    |   36 -
 bsd-user/sparc64/target_arch_sysarch.h             |   52 -
 bsd-user/sparc64/target_syscall.h                  |   37 -
 bsd-user/strace.c                                  |   97 +
 bsd-user/syscall.c                                 |  577 ----
 bsd-user/syscall_defs.h                            |  303 +-
 bsd-user/trace-events                              |   11 +
 bsd-user/trace.h                                   |    1 +
 bsd-user/x86_64/signal.c                           |   68 +
 bsd-user/x86_64/target.h                           |   21 +
 bsd-user/x86_64/target_arch.h                      |   31 +
 bsd-user/x86_64/target_arch_cpu.c                  |   71 +
 bsd-user/x86_64/target_arch_cpu.h                  |  177 +
 bsd-user/x86_64/target_arch_elf.h                  |   35 +
 bsd-user/x86_64/target_arch_reg.h                  |   92 +
 bsd-user/x86_64/target_arch_signal.h               |   99 +
 bsd-user/x86_64/target_arch_sigtramp.h             |   29 +
 bsd-user/x86_64/target_arch_thread.h               |   38 +
 bsd-user/x86_64/target_arch_vmparam.h              |   46 +
 chardev/char-mux.c                                 |    9 +-
 chardev/char-socket.c                              |   95 +-
 chardev/char-udp.c                                 |    4 +-
 chardev/char.c                                     |    7 +-
 chardev/meson.build                                |    2 +-
 common-user/host/aarch64/safe-syscall.inc.S        |   88 +
 common-user/host/arm/safe-syscall.inc.S            |  108 +
 common-user/host/i386/safe-syscall.inc.S           |  127 +
 common-user/host/loongarch64/safe-syscall.inc.S    |   90 +
 common-user/host/mips/safe-syscall.inc.S           |  149 +
 common-user/host/ppc64/safe-syscall.inc.S          |   94 +
 common-user/host/riscv/safe-syscall.inc.S          |   79 +
 common-user/host/s390x/safe-syscall.inc.S          |   98 +
 common-user/host/sparc64/safe-syscall.inc.S        |   90 +
 common-user/host/x86_64/safe-syscall.inc.S         |  106 +
 common-user/meson.build                            |    6 +
 common-user/safe-syscall-error.c                   |   25 +
 common-user/safe-syscall.S                         |   27 +
 configs/devices/i386-softmmu/default.mak           |    1 +
 configs/devices/mips-softmmu/common.mak            |    7 +-
 configs/targets/aarch64-linux-user.mak             |    2 +-
 configs/targets/aarch64-softmmu.mak                |    2 +-
 configs/targets/aarch64_be-linux-user.mak          |    2 +-
 configs/targets/arm-bsd-user.mak                   |    2 +
 configs/targets/arm-linux-user.mak                 |    2 +-
 configs/targets/arm-softmmu.mak                    |    2 +-
 configs/targets/armeb-linux-user.mak               |    2 +-
 configs/targets/i386-softmmu.mak                   |    1 +
 configs/targets/or1k-softmmu.mak                   |    1 +
 configs/targets/ppc64abi32-linux-user.mak          |    8 -
 configs/targets/x86_64-softmmu.mak                 |    1 +
 configure                                          | 2839 +++------------
 contrib/elf2dmp/download.c                         |   22 +-
 contrib/elf2dmp/meson.build                        |    2 +-
 contrib/elf2dmp/pdb.c                              |    4 +
 contrib/gitdm/aliases                              |    4 +-
 contrib/ivshmem-client/meson.build                 |    2 +-
 contrib/ivshmem-server/meson.build                 |    2 +-
 contrib/plugins/Makefile                           |    1 +
 contrib/plugins/cache.c                            |  378 +-
 contrib/plugins/drcov.c                            |  163 +
 contrib/plugins/hotblocks.c                        |   14 +-
 contrib/plugins/hotpages.c                         |   30 +-
 contrib/plugins/howvec.c                           |   27 +-
 contrib/plugins/hwprofile.c                        |   39 +-
 contrib/plugins/lockstep.c                         |   31 +-
 contrib/rdmacm-mux/meson.build                     |    2 +-
 contrib/vhost-user-gpu/meson.build                 |    4 +-
 contrib/vhost-user-gpu/vhost-user-gpu.c            |    2 +-
 cpu.c                                              |   73 +-
 cpus-common.c                                      |    4 +-
 crypto/cipher-afalg.c                              |    4 +-
 crypto/hash-afalg.c                                |    4 +-
 crypto/meson.build                                 |    6 +-
 crypto/tlssession.c                                |    6 +
 disas/nios2.c                                      |   73 +-
 disas/riscv.c                                      |  162 +-
 docs/COLO-FT.txt                                   |  106 +-
 docs/about/build-platforms.rst                     |   35 +
 docs/about/deprecated.rst                          |  228 +-
 docs/about/index.rst                               |    3 +-
 docs/about/removed-features.rst                    |  205 +-
 docs/amd-memory-encryption.txt                     |  148 -
 docs/block-replication.txt                         |   58 +-
 docs/can.txt                                       |  198 --
 docs/conf.py                                       |   22 +-
 docs/confidential-guest-support.txt                |   49 -
 docs/devel/build-system.rst                        |  174 +-
 docs/devel/ci-definitions.rst.inc                  |  121 +
 docs/devel/ci-jobs.rst.inc                         |   65 +
 docs/devel/ci-runners.rst.inc                      |  117 +
 docs/devel/ci.rst                                  |  160 +-
 docs/devel/clocks.rst                              |   23 +
 docs/devel/code-of-conduct.rst                     |    4 +-
 docs/devel/fuzzing.rst                             |    9 +-
 docs/devel/index-api.rst                           |   15 +
 docs/devel/index-build.rst                         |   19 +
 docs/devel/index-internals.rst                     |   21 +
 docs/devel/index-process.rst                       |   17 +
 docs/devel/index-tcg.rst                           |   16 +
 docs/devel/index.rst                               |   46 +-
 docs/devel/kconfig.rst                             |   10 +-
 docs/devel/loads-stores.rst                        |   52 +-
 docs/devel/memory.rst                              |   14 +-
 docs/devel/migration.rst                           |   12 +-
 docs/devel/modules.rst                             |    2 +-
 docs/devel/multi-process.rst                       |   28 +-
 docs/devel/multi-thread-tcg.rst                    |    2 +-
 docs/devel/qapi-code-gen.rst                       |  253 +-
 docs/devel/qgraph.rst                              |  172 +-
 docs/devel/stable-process.rst                      |    2 +
 docs/devel/style.rst                               |   22 +-
 docs/devel/submitting-a-patch.rst                  |  562 +++
 docs/devel/submitting-a-pull-request.rst           |   77 +
 docs/devel/tcg-icount.rst                          |    3 -
 docs/devel/tcg-plugins.rst                         |  184 +-
 docs/devel/testing.rst                             |  423 ++-
 docs/devel/tracing.rst                             |   87 +-
 docs/devel/trivial-patches.rst                     |   52 +
 docs/devel/ui.rst                                  |    4 +-
 docs/devel/writing-monitor-commands.rst            |  751 ++++
 docs/devel/writing-qmp-commands.rst                |  622 ----
 docs/hyperv.txt                                    |   41 +-
 docs/image-fuzzer.txt                              |    6 +-
 docs/index.rst                                     |    1 +
 docs/interop/bitmaps.rst                           |  285 +-
 docs/interop/dbus-display.rst                      |   31 +
 docs/interop/dbus-vmstate.rst                      |   52 +-
 docs/interop/dbus.rst                              |    2 +
 docs/interop/firmware.json                         |   54 +-
 docs/interop/index.rst                             |    5 +-
 docs/interop/live-block-operations.rst             |   49 +-
 docs/interop/nbd.txt                               |    6 +-
 docs/interop/qcow2.txt                             |    8 +-
 docs/interop/vhost-user.rst                        |   20 +
 docs/interop/virtio-balloon-stats.rst              |  111 +
 docs/meson.build                                   |   22 +-
 docs/multiseat.txt                                 |    2 +-
 docs/nvdimm.txt                                    |    2 +-
 docs/papr-pef.txt                                  |   30 -
 docs/pcie_sriov.txt                                |  115 +
 docs/qemu_logo.pdf                                 |  Bin 9117 -> 0 bytes
 docs/specs/acpi_cpu_hotplug.rst                    |  235 ++
 docs/specs/acpi_cpu_hotplug.txt                    |  160 -
 docs/specs/acpi_erst.rst                           |  200 ++
 docs/specs/acpi_mem_hotplug.rst                    |  128 +
 docs/specs/acpi_mem_hotplug.txt                    |   94 -
 docs/specs/acpi_nvdimm.rst                         |  228 ++
 docs/specs/acpi_nvdimm.txt                         |  188 -
 docs/specs/acpi_pci_hotplug.rst                    |   48 +
 docs/specs/acpi_pci_hotplug.txt                    |   45 -
 docs/specs/index.rst                               |    9 +-
 docs/specs/pci-ids.txt                             |    1 +
 docs/specs/ppc-spapr-hcalls.rst                    |   99 +
 docs/specs/ppc-spapr-hcalls.txt                    |   78 -
 docs/specs/ppc-spapr-hotplug.rst                   |  510 +++
 docs/specs/ppc-spapr-hotplug.txt                   |  409 ---
 docs/specs/ppc-spapr-uv-hcalls.rst                 |   89 +
 docs/specs/ppc-spapr-uv-hcalls.txt                 |   76 -
 docs/specs/sev-guest-firmware.rst                  |  125 +
 docs/sphinx-static/custom.js                       |    9 +
 docs/sphinx/dbusdoc.py                             |  166 +
 docs/sphinx/dbusdomain.py                          |  406 +++
 docs/sphinx/dbusparser.py                          |  373 ++
 docs/sphinx/depfile.py                             |   19 +-
 docs/sphinx/fakedbusdoc.py                         |   25 +
 docs/sphinx/qapidoc.py                             |   22 +-
 docs/system/arm/aspeed.rst                         |   25 +-
 docs/system/arm/cpu-features.rst                   |    4 -
 docs/system/arm/emulation.rst                      |    3 +
 docs/system/arm/nuvoton.rst                        |    2 +
 docs/system/arm/orangepi.rst                       |   10 +-
 docs/system/arm/virt.rst                           |    9 +
 docs/system/arm/xlnx-versal-virt.rst               |   49 +
 docs/system/authz.rst                              |   26 +-
 docs/system/confidential-guest-support.rst         |   44 +
 docs/system/cpu-models-x86.rst.inc                 |    6 +-
 docs/system/device-emulation.rst                   |    2 +
 docs/system/device-url-syntax.rst.inc              |    2 +-
 docs/system/devices/can.rst                        |  188 +
 docs/system/devices/nvme.rst                       |   26 +-
 docs/system/devices/vhost-user-rng.rst             |   39 +
 docs/system/gdb.rst                                |   28 +-
 docs/system/guest-loader.rst                       |    2 +-
 docs/system/i386/amd-memory-encryption.rst         |  206 ++
 docs/system/i386/cpu.rst                           |    1 +
 docs/system/i386/kvm-pv.rst                        |  100 +
 docs/system/i386/sgx.rst                           |  188 +
 docs/system/images.rst                             |    2 +-
 docs/system/index.rst                              |    4 +-
 docs/system/multi-process.rst                      |    2 +-
 docs/system/ppc/powernv.rst                        |   69 +-
 docs/system/ppc/ppce500.rst                        |    2 +-
 docs/system/ppc/pseries.rst                        |  263 +-
 docs/system/qemu-block-drivers.rst                 |    4 +
 docs/system/qemu-block-drivers.rst.inc             |   36 +-
 docs/system/qemu-cpu-models.rst                    |   10 +-
 docs/system/qemu-manpage.rst                       |   10 +-
 docs/system/riscv/shakti-c.rst                     |    2 +-
 docs/system/riscv/sifive_u.rst                     |   50 +-
 docs/system/riscv/virt.rst                         |   32 +-
 docs/system/target-i386.rst                        |   11 +-
 docs/system/tls.rst                                |    2 +-
 docs/throttle.txt                                  |    8 +-
 docs/tools/index.rst                               |    3 +-
 docs/tools/qemu-img.rst                            |   25 +-
 docs/tools/qemu-nbd.rst                            |   28 +-
 docs/tools/qemu-pr-helper.rst                      |    1 +
 docs/tools/qemu-storage-daemon.rst                 |   26 +-
 docs/tools/qemu-trace-stap.rst                     |   25 +-
 docs/tools/virtiofsd.rst                           |   42 +-
 docs/u2f.txt                                       |    2 +-
 docs/user/index.rst                                |    3 +-
 docs/user/main.rst                                 |    1 -
 docs/virtio-balloon-stats.txt                      |  109 -
 dtc                                                |    2 +-
 dump/dump.c                                        |   31 +-
 ebpf/meson.build                                   |    2 +-
 fpu/softfloat-parts.c.inc                          |   82 +-
 fpu/softfloat-specialize.c.inc                     |   13 +-
 fpu/softfloat.c                                    |  133 +-
 fsdev/9p-marshal.c                                 |    4 +-
 fsdev/9p-marshal.h                                 |    3 +
 fsdev/file-op-9p.h                                 |   11 +-
 fsdev/meson.build                                  |    1 +
 fsdev/p9array.h                                    |  164 +
 fsdev/virtfs-proxy-helper.c                        |    2 +-
 gdb-xml/arm-m-profile-mve.xml                      |   19 +
 gdb-xml/arm-neon.xml                               |    2 -
 gdb-xml/arm-vfp-sysregs.xml                        |   17 +
 gdb-xml/arm-vfp.xml                                |    2 -
 gdb-xml/arm-vfp3.xml                               |    2 -
 gdbstub.c                                          |  101 +-
 hmp-commands-info.hx                               |   61 +-
 hmp-commands.hx                                    |   41 +-
 hw/9pfs/9p-local.c                                 |   27 +-
 hw/9pfs/9p-proxy.c                                 |   40 +-
 hw/9pfs/9p-synth.c                                 |   28 +-
 hw/9pfs/9p-synth.h                                 |    5 +
 hw/9pfs/9p-util-darwin.c                           |   97 +
 hw/9pfs/9p-util-linux.c                            |   70 +
 hw/9pfs/9p-util.c                                  |   64 -
 hw/9pfs/9p-util.h                                  |   78 +
 hw/9pfs/9p.c                                       |  213 +-
 hw/9pfs/9p.h                                       |   12 +-
 hw/9pfs/codir.c                                    |   43 +-
 hw/9pfs/coth.h                                     |    4 +-
 hw/9pfs/meson.build                                |    3 +-
 hw/Kconfig                                         |    2 +
 hw/acpi/Kconfig                                    |   20 +
 hw/acpi/acpi-cpu-hotplug-stub.c                    |   50 +
 hw/acpi/acpi-mem-hotplug-stub.c                    |   35 +
 hw/acpi/acpi-nvdimm-stub.c                         |    8 +
 hw/acpi/acpi-pci-hotplug-stub.c                    |   43 +
 hw/acpi/acpi-x86-stub.c                            |    3 +-
 hw/acpi/aml-build.c                                |  334 +-
 hw/acpi/core.c                                     |    4 +-
 hw/acpi/cpu.c                                      |   19 +-
 hw/acpi/erst.c                                     | 1046 ++++++
 hw/acpi/ghes.c                                     |   10 +-
 hw/acpi/hmat.c                                     |   16 +-
 hw/acpi/ich9.c                                     |   23 +-
 hw/acpi/memory_hotplug.c                           |   14 +-
 hw/acpi/meson.build                                |   20 +-
 hw/acpi/nvdimm.c                                   |   76 +-
 hw/acpi/pci.c                                      |   18 +-
 hw/acpi/pcihp.c                                    |   66 +-
 hw/acpi/piix4.c                                    |   21 +-
 hw/acpi/tco.c                                      |    1 -
 hw/acpi/trace-events                               |   15 +
 hw/acpi/viot.c                                     |  114 +
 hw/acpi/viot.h                                     |   13 +
 hw/acpi/vmgenid.c                                  |   13 +-
 hw/adc/aspeed_adc.c                                |  427 +++
 hw/adc/meson.build                                 |    1 +
 hw/adc/trace-events                                |    3 +
 hw/arm/Kconfig                                     |   22 +-
 hw/arm/allwinner-h3.c                              |    9 +-
 hw/arm/armsse.c                                    |   20 +-
 hw/arm/armv7m.c                                    |  278 +-
 hw/arm/aspeed.c                                    |  480 ++-
 hw/arm/aspeed_ast2600.c                            |   73 +-
 hw/arm/aspeed_soc.c                                |   25 +-
 hw/arm/boot.c                                      |  132 +-
 hw/arm/cubieboard.c                                |    2 +-
 hw/arm/digic_boards.c                              |    1 -
 hw/arm/exynos4210.c                                |    3 +
 hw/arm/exynos4_boards.c                            |    1 -
 hw/arm/fsl-imx6ul.c                                |   14 +-
 hw/arm/fsl-imx7.c                                  |   15 +-
 hw/arm/highbank.c                                  |   73 +-
 hw/arm/imx25_pdk.c                                 |    5 +-
 hw/arm/integratorcp.c                              |    2 +-
 hw/arm/kzm.c                                       |    1 -
 hw/arm/mcimx6ul-evk.c                              |    4 +-
 hw/arm/mcimx7d-sabre.c                             |    4 +-
 hw/arm/mps2-tz.c                                   |   98 +-
 hw/arm/mps2.c                                      |   29 +-
 hw/arm/msf2-soc.c                                  |   68 +-
 hw/arm/msf2-som.c                                  |    9 +-
 hw/arm/musicpal.c                                  |  380 +-
 hw/arm/netduino2.c                                 |   12 +-
 hw/arm/netduinoplus2.c                             |   12 +-
 hw/arm/npcm7xx.c                                   |   15 +-
 hw/arm/npcm7xx_boards.c                            |  122 +-
 hw/arm/nrf51_soc.c                                 |   20 +-
 hw/arm/nseries.c                                   |    1 +
 hw/arm/omap1.c                                     |    3 +-
 hw/arm/orangepi.c                                  |    7 +-
 hw/arm/pxa2xx.c                                    |    2 +-
 hw/arm/raspi.c                                     |    7 +-
 hw/arm/realview.c                                  |    3 +-
 hw/arm/sabrelite.c                                 |    5 +-
 hw/arm/sbsa-ref.c                                  |   10 +-
 hw/arm/smmu-common.c                               |    3 +-
 hw/arm/smmuv3.c                                    |   20 +-
 hw/arm/stellaris.c                                 |  411 +--
 hw/arm/stm32f100_soc.c                             |   47 +-
 hw/arm/stm32f205_soc.c                             |   47 +-
 hw/arm/stm32f405_soc.c                             |   31 +-
 hw/arm/stm32vldiscovery.c                          |   13 +-
 hw/arm/strongarm.c                                 |    2 +-
 hw/arm/versatilepb.c                               |    4 +-
 hw/arm/vexpress.c                                  |    8 +-
 hw/arm/virt-acpi-build.c                           |  674 ++--
 hw/arm/virt.c                                      |  392 ++-
 hw/arm/xilinx_zynq.c                               |   20 +-
 hw/arm/xlnx-versal-virt.c                          |  129 +-
 hw/arm/xlnx-versal.c                               |  254 +-
 hw/arm/xlnx-zcu102.c                               |   37 +-
 hw/arm/xlnx-zynqmp.c                               |  200 +-
 hw/audio/Kconfig                                   |    3 -
 hw/audio/cs4231a.c                                 |    2 +-
 hw/audio/gus.c                                     |    2 +-
 hw/audio/intel-hda.c                               |   24 +-
 hw/audio/pcspk.c                                   |    1 -
 hw/audio/sb16.c                                    |    2 +-
 hw/avr/atmega.c                                    |    2 +-
 hw/block/block.c                                   |    3 +-
 hw/block/dataplane/virtio-blk.c                    |   16 +-
 hw/block/dataplane/xen-block.c                     |    1 +
 hw/block/fdc-isa.c                                 |   13 +-
 hw/block/fdc.c                                     |    3 +-
 hw/block/m25p80.c                                  |    3 +
 hw/block/pflash_cfi01.c                            |    2 +-
 hw/block/swim.c                                    |    3 +-
 hw/block/vhost-user-blk.c                          |    5 +-
 hw/block/virtio-blk.c                              |   19 +-
 hw/char/Kconfig                                    |    3 +
 hw/char/cadence_uart.c                             |   61 +-
 hw/char/escc.c                                     |  288 +-
 hw/char/exynos4210_uart.c                          |    2 +-
 hw/char/goldfish_tty.c                             |    2 +-
 hw/char/ibex_uart.c                                |    1 +
 hw/char/mchp_pfsoc_mmuart.c                        |  116 +-
 hw/char/meson.build                                |    2 +-
 hw/char/parallel.c                                 |    4 +-
 hw/char/pl011.c                                    |    6 +
 hw/char/riscv_htif.c                               |   35 +-
 hw/char/serial-isa.c                               |    2 +-
 hw/char/sh_serial.c                                |  236 +-
 hw/char/shakti_uart.c                              |    1 +
 hw/char/sifive_uart.c                              |    1 +
 hw/char/stm32f2xx_usart.c                          |    3 +-
 hw/char/trace-events                               |    6 +
 hw/char/virtio-serial-bus.c                        |   10 +-
 hw/core/bus.c                                      |   13 +-
 hw/core/clock-vmstate.c                            |   41 +-
 hw/core/clock.c                                    |   31 +-
 hw/core/cpu-common.c                               |   17 +-
 hw/core/generic-loader.c                           |    7 +-
 hw/core/gpio.c                                     |  198 ++
 hw/core/guest-loader.c                             |    2 +-
 hw/core/hotplug-stubs.c                            |   34 +
 hw/core/irq.c                                      |    2 +-
 hw/core/loader.c                                   |  224 +-
 hw/core/machine-hmp-cmds.c                         |   38 +-
 hw/core/machine-qmp-cmds.c                         |   40 +
 hw/core/machine-smp.c                              |  195 ++
 hw/core/machine.c                                  |  155 +-
 hw/core/meson.build                                |   35 +-
 hw/core/numa.c                                     |    6 +
 hw/core/ptimer.c                                   |    1 -
 hw/core/qdev-hotplug.c                             |   73 +
 hw/core/qdev-properties-system.c                   |   49 +-
 hw/core/qdev-properties.c                          |    6 +-
 hw/core/qdev.c                                     |  245 +-
 hw/core/register.c                                 |   12 +
 hw/core/reset.c                                    |    2 +-
 hw/core/sysbus.c                                   |   10 +-
 hw/core/trace-events                               |    1 +
 hw/display/Kconfig                                 |    2 +-
 hw/display/artist.c                                |  463 ++-
 hw/display/ati.c                                   |    4 +-
 hw/display/bcm2835_fb.c                            |    2 +-
 hw/display/cirrus_vga.c                            |   59 +-
 hw/display/cirrus_vga_isa.c                        |    4 +-
 hw/display/edid-generate.c                         |   73 +-
 hw/display/i2c-ddc.c                               |    2 +-
 hw/display/macfb.c                                 |  433 ++-
 hw/display/meson.build                             |    5 +-
 hw/display/omap_dss.c                              |    1 +
 hw/display/pxa2xx_lcd.c                            |    2 +-
 hw/display/qxl-render.c                            |    9 +-
 hw/display/qxl.c                                   |   27 +-
 hw/display/qxl.h                                   |    2 +-
 hw/display/tc6393xb.c                              |    2 +-
 hw/display/trace-events                            |   18 +-
 hw/display/vga-isa-mm.c                            |  114 -
 hw/display/vga-isa.c                               |    5 +-
 hw/display/vga-mmio.c                              |  142 +
 hw/display/vga-pci.c                               |    8 +-
 hw/display/vga.c                                   |   17 +-
 hw/display/vga_int.h                               |    2 +-
 hw/display/vhost-user-gpu.c                        |    2 +-
 hw/display/virtio-gpu-base.c                       |    5 +-
 hw/display/virtio-gpu-udmabuf-stubs.c              |   28 +
 hw/display/virtio-gpu-udmabuf.c                    |   25 +-
 hw/display/virtio-gpu-virgl.c                      |    3 +-
 hw/display/virtio-gpu.c                            |   52 +-
 hw/display/virtio-vga.c                            |   17 +-
 hw/display/vmware_vga.c                            |   34 +-
 hw/display/xenfb.c                                 |    4 +-
 hw/display/xlnx_dp.c                               |    6 +-
 hw/dma/bcm2835_dma.c                               |    2 +-
 hw/dma/pl330.c                                     |   30 +-
 hw/dma/rc4030.c                                    |    4 +-
 hw/dma/sifive_pdma.c                               |  240 +-
 hw/dma/sparc32_dma.c                               |   16 +-
 hw/dma/xlnx-zdma.c                                 |   25 +-
 hw/dma/xlnx-zynq-devcfg.c                          |    6 +-
 hw/dma/xlnx_csu_dma.c                              |   50 +-
 hw/dma/xlnx_dpdma.c                                |   10 +-
 hw/gpio/aspeed_gpio.c                              |  185 +-
 hw/gpio/bcm2835_gpio.c                             |    3 +-
 hw/gpio/imx_gpio.c                                 |    1 -
 hw/gpio/omap_gpio.c                                |    1 +
 hw/hppa/hppa_hardware.h                            |    5 +-
 hw/hppa/machine.c                                  |   35 +-
 hw/hyperv/vmbus.c                                  |   10 +-
 hw/i2c/Kconfig                                     |    5 +
 hw/i2c/aspeed_i2c.c                                |  101 +-
 hw/i2c/core.c                                      |    6 +-
 hw/i2c/i2c_mux_pca954x.c                           |   79 +-
 hw/i2c/pmbus_device.c                              |  112 +-
 hw/i386/Kconfig                                    |    6 +
 hw/i386/acpi-build.c                               |  427 ++-
 hw/i386/acpi-common.c                              |  160 +-
 hw/i386/acpi-microvm.c                             |   34 +-
 hw/i386/amd_iommu.c                                |   70 +-
 hw/i386/fw_cfg.c                                   |   12 +-
 hw/i386/intel_iommu.c                              |   99 +-
 hw/i386/intel_iommu_internal.h                     |    3 +
 hw/i386/kvm/i8254.c                                |    7 +-
 hw/i386/meson.build                                |    4 +-
 hw/i386/microvm-dt.c                               |  348 ++
 hw/i386/microvm-dt.h                               |    8 +
 hw/i386/microvm.c                                  |   12 +-
 hw/i386/multiboot.c                                |   10 +-
 hw/i386/multiboot.h                                |    4 +-
 hw/i386/pc.c                                       |  210 +-
 hw/i386/pc_piix.c                                  |   42 +-
 hw/i386/pc_q35.c                                   |   41 +-
 hw/i386/pc_sysfw.c                                 |    2 +-
 hw/i386/pc_sysfw_ovmf.c                            |   18 +-
 hw/i386/sgx-epc.c                                  |  188 +
 hw/i386/sgx-stub.c                                 |   38 +
 hw/i386/sgx.c                                      |  327 ++
 hw/i386/trace-events                               |    6 +-
 hw/i386/vmmouse.c                                  |    5 +
 hw/i386/x86-iommu-stub.c                           |    5 -
 hw/i386/x86-iommu.c                                |   31 +-
 hw/i386/x86.c                                      |   77 +-
 hw/i386/xen/xen-hvm.c                              |   22 +-
 hw/i386/xen/xen-mapcache.c                         |   22 +-
 hw/ide/ahci.c                                      |   22 +-
 hw/ide/cmd646.c                                    |    2 +-
 hw/ide/core.c                                      |   17 +-
 hw/ide/isa.c                                       |    4 +-
 hw/ide/macio.c                                     |    4 +-
 hw/ide/microdrive.c                                |    2 +-
 hw/ide/mmio.c                                      |    2 +-
 hw/ide/piix.c                                      |    2 +-
 hw/ide/qdev.c                                      |    4 +-
 hw/ide/sii3112.c                                   |    2 +-
 hw/ide/via.c                                       |    9 +-
 hw/input/hid.c                                     |    2 +
 hw/input/lasips2.c                                 |   10 +-
 hw/input/pckbd.c                                   |   28 +-
 hw/input/ps2.c                                     |  275 +-
 hw/input/pxa2xx_keypad.c                           |    2 +-
 hw/input/tsc2005.c                                 |    3 +-
 hw/input/tsc210x.c                                 |    9 +-
 hw/intc/Kconfig                                    |   13 +-
 hw/intc/arm_gic.c                                  |   11 +
 hw/intc/arm_gicv3.c                                |   41 +-
 hw/intc/arm_gicv3_common.c                         |   78 +-
 hw/intc/arm_gicv3_cpuif.c                          |   37 +-
 hw/intc/arm_gicv3_cpuif_common.c                   |   22 +
 hw/intc/arm_gicv3_dist.c                           |  214 +-
 hw/intc/arm_gicv3_its.c                            | 1481 ++++++++
 hw/intc/arm_gicv3_its_common.c                     |    5 +-
 hw/intc/arm_gicv3_its_kvm.c                        |    2 +-
 hw/intc/arm_gicv3_kvm.c                            |   10 +-
 hw/intc/arm_gicv3_redist.c                         |  308 +-
 hw/intc/armv7m_nvic.c                              |  274 +-
 hw/intc/bcm2835_ic.c                               |    2 +-
 hw/intc/bcm2836_control.c                          |    2 +-
 hw/intc/gicv3_internal.h                           |  254 +-
 hw/intc/goldfish_pic.c                             |    2 +-
 hw/intc/i8259_common.c                             |    6 +-
 hw/intc/ibex_plic.c                                |  312 --
 hw/intc/ioapic_common.c                            |    2 +-
 hw/intc/m68k_irqc.c                                |    2 +-
 hw/intc/meson.build                                |   19 +-
 hw/intc/openpic.c                                  |   92 +-
 hw/intc/openpic_kvm.c                              |    1 +
 hw/intc/pnv_xive.c                                 |   58 +-
 hw/intc/pnv_xive2.c                                | 2128 ++++++++++++
 hw/intc/pnv_xive2_regs.h                           |  442 +++
 hw/intc/riscv_aclint.c                             |  460 +++
 hw/intc/riscv_aplic.c                              |  978 ++++++
 hw/intc/riscv_imsic.c                              |  448 +++
 hw/intc/sh_intc.c                                  |  547 ++-
 hw/intc/sifive_clint.c                             |  266 --
 hw/intc/sifive_plic.c                              |  365 +-
 hw/intc/spapr_xive.c                               |   30 +-
 hw/intc/spapr_xive_kvm.c                           |   26 +-
 hw/intc/trace-events                               |   47 +-
 hw/intc/xics.c                                     |    2 +-
 hw/intc/xive.c                                     |  132 +-
 hw/intc/xive2.c                                    | 1019 ++++++
 hw/ipack/ipack.c                                   |   10 +-
 hw/ipack/tpci200.c                                 |    4 +-
 hw/ipmi/ipmi.c                                     |    4 +-
 hw/ipmi/isa_ipmi_bt.c                              |    2 +-
 hw/ipmi/isa_ipmi_kcs.c                             |    2 +-
 hw/isa/isa-bus.c                                   |   39 +-
 hw/isa/lpc_ich9.c                                  |   13 +
 hw/isa/piix4.c                                     |   56 +-
 hw/isa/vt82c686.c                                  |   75 +-
 hw/m68k/q800.c                                     |  252 +-
 hw/m68k/virt.c                                     |   40 +-
 hw/mem/Kconfig                                     |    3 +
 hw/mem/meson.build                                 |    2 +-
 hw/mem/nvdimm.c                                    |   18 +-
 hw/mem/pc-dimm.c                                   |   30 +-
 hw/microblaze/petalogix_ml605_mmu.c                |    2 +-
 hw/mips/Kconfig                                    |    2 +-
 hw/mips/bootloader.c                               |    6 +-
 hw/mips/boston.c                                   |  372 +-
 hw/mips/fuloong2e.c                                |    2 +-
 hw/mips/gt64xxx_pci.c                              |   80 +-
 hw/mips/jazz.c                                     |   10 +-
 hw/mips/malta.c                                    |   10 +-
 hw/mips/mipssim.c                                  |    2 +-
 hw/misc/applesmc.c                                 |    2 +-
 hw/misc/armv7m_ras.c                               |   93 +
 hw/misc/aspeed_i3c.c                               |  384 +++
 hw/misc/aspeed_sbc.c                               |  141 +
 hw/misc/aspeed_scu.c                               |   40 +-
 hw/misc/aspeed_sdmc.c                              |    2 +
 hw/misc/auxbus.c                                   |    2 +-
 hw/misc/bcm2835_mbox.c                             |    3 +-
 hw/misc/bcm2835_powermgt.c                         |    2 +-
 hw/misc/bcm2835_property.c                         |    5 +-
 hw/misc/bcm2835_rng.c                              |    2 +-
 hw/misc/imx6_src.c                                 |    2 +-
 hw/misc/ivshmem.c                                  |   11 +-
 hw/misc/mac_via.c                                  |  637 ++--
 hw/misc/macio/cuda.c                               |   14 +-
 hw/misc/macio/mac_dbdma.c                          |   10 +-
 hw/misc/macio/macio.c                              |    4 +-
 hw/misc/macio/pmu.c                                |   47 +-
 hw/misc/meson.build                                |   11 +-
 hw/misc/mos6522.c                                  |  226 +-
 hw/misc/npcm7xx_clk.c                              |    4 +-
 hw/misc/pca9552.c                                  |    2 +-
 hw/misc/pvpanic-isa.c                              |    6 +-
 hw/misc/pvpanic-pci.c                              |    6 +-
 hw/misc/pvpanic.c                                  |    5 +-
 hw/misc/sga.c                                      |    2 +
 hw/misc/sifive_u_otp.c                             |   22 +-
 hw/misc/trace-events                               |   19 +-
 hw/misc/virt_ctrl.c                                |    2 +-
 hw/misc/xlnx-versal-pmc-iou-slcr.c                 | 1446 ++++++++
 hw/misc/xlnx-zynqmp-apu-ctrl.c                     |  253 ++
 hw/misc/xlnx-zynqmp-crf.c                          |  266 ++
 hw/misc/zynq_slcr.c                                |   31 +-
 hw/net/allwinner-sun8i-emac.c                      |   18 +-
 hw/net/can/can_kvaser_pci.c                        |    1 -
 hw/net/can/can_mioe3680_pci.c                      |    1 -
 hw/net/can/can_pcm3680_pci.c                       |    1 -
 hw/net/can/can_sja1000.c                           |    2 -
 hw/net/can/ctucan_core.c                           |    2 -
 hw/net/can/ctucan_pci.c                            |    1 -
 hw/net/e1000e_core.c                               |    5 +
 hw/net/eepro100.c                                  |   49 +-
 hw/net/fsl_etsec/etsec.c                           |    2 +-
 hw/net/ftgmac100.c                                 |   25 +-
 hw/net/imx_fec.c                                   |   32 +-
 hw/net/meson.build                                 |    1 +
 hw/net/mv88w8618_eth.c                             |  403 +++
 hw/net/ne2000-isa.c                                |    2 +-
 hw/net/npcm7xx_emc.c                               |   38 +-
 hw/net/rocker/rocker.h                             |    2 +-
 hw/net/rtl8139.c                                   |    2 +-
 hw/net/trace-events                                |    1 +
 hw/net/tulip.c                                     |   36 +-
 hw/net/vhost_net-stub.c                            |    4 +-
 hw/net/vhost_net.c                                 |   60 +-
 hw/net/virtio-net.c                                |  295 +-
 hw/net/vmxnet3.c                                   |    4 +-
 hw/nubus/mac-nubus-bridge.c                        |   34 +-
 hw/nubus/nubus-bridge.c                            |   23 +-
 hw/nubus/nubus-bus.c                               |  120 +-
 hw/nubus/nubus-device.c                            |  227 +-
 hw/nubus/trace-events                              |    7 +
 hw/nubus/trace.h                                   |    1 +
 hw/nvme/ctrl.c                                     |  492 ++-
 hw/nvme/dif.c                                      |  300 +-
 hw/nvme/dif.h                                      |  191 ++
 hw/nvme/ns.c                                       |  121 +-
 hw/nvme/nvme.h                                     |   72 +-
 hw/nvme/subsys.c                                   |   13 +-
 hw/nvme/trace-events                               |   15 +-
 hw/nvram/Kconfig                                   |   19 +
 hw/nvram/eeprom_at24c.c                            |    9 +-
 hw/nvram/fw_cfg.c                                  |   17 +-
 hw/nvram/meson.build                               |   14 +-
 hw/nvram/spapr_nvram.c                             |    2 +-
 hw/nvram/xlnx-bbram.c                              |  545 +++
 hw/nvram/xlnx-efuse-crc.c                          |  119 +
 hw/nvram/xlnx-efuse.c                              |  283 ++
 hw/nvram/xlnx-versal-efuse-cache.c                 |  114 +
 hw/nvram/xlnx-versal-efuse-ctrl.c                  |  793 +++++
 hw/nvram/xlnx-zynqmp-efuse.c                       |  861 +++++
 hw/openrisc/meson.build                            |    2 +-
 hw/openrisc/openrisc_sim.c                         |  308 +-
 hw/pci-bridge/pci_expander_bridge.c                |    8 +-
 hw/pci-bridge/xio3130_downstream.c                 |    5 +-
 hw/pci-bridge/xio3130_upstream.c                   |    2 +-
 hw/pci-host/i440fx.c                               |    8 -
 hw/pci-host/mv64361.c                              |    1 +
 hw/pci-host/pnv_phb3.c                             |   56 +-
 hw/pci-host/pnv_phb3_msi.c                         |    9 +-
 hw/pci-host/pnv_phb3_pbcq.c                        |   11 +
 hw/pci-host/pnv_phb4.c                             |  612 +++-
 hw/pci-host/pnv_phb4_pec.c                         |  415 +--
 hw/pci-host/raven.c                                |    4 +-
 hw/pci-host/sh_pci.c                               |   10 +-
 hw/pci-host/trace-events                           |    2 +
 hw/pci-host/versatile.c                            |    6 +-
 hw/pci/meson.build                                 |    1 +
 hw/pci/pci.c                                       |  196 +-
 hw/pci/pci_bridge.c                                |    4 +-
 hw/pci/pci_host.c                                  |   12 +-
 hw/pci/pcie.c                                      |  101 +-
 hw/pci/pcie_aer.c                                  |    4 +-
 hw/pci/pcie_sriov.c                                |  302 ++
 hw/pci/trace-events                                |   13 +-
 hw/ppc/e500.c                                      |    4 +-
 hw/ppc/mac.h                                       |    3 -
 hw/ppc/mac_newworld.c                              |    3 +-
 hw/ppc/mac_oldworld.c                              |    3 +-
 hw/ppc/mpc8544_guts.c                              |    9 +-
 hw/ppc/pegasos2.c                                  |  169 +-
 hw/ppc/pnv.c                                       |  483 ++-
 hw/ppc/pnv_core.c                                  |    6 +-
 hw/ppc/pnv_homer.c                                 |   64 +
 hw/ppc/pnv_occ.c                                   |   16 +
 hw/ppc/pnv_pnor.c                                  |    2 +-
 hw/ppc/pnv_psi.c                                   |   38 +-
 hw/ppc/pnv_xscom.c                                 |    6 +
 hw/ppc/ppc.c                                       |  318 +-
 hw/ppc/ppc405.h                                    |   14 +-
 hw/ppc/ppc405_boards.c                             |  249 +-
 hw/ppc/ppc405_uc.c                                 |  245 +-
 hw/ppc/ppc4xx_devs.c                               |   41 +-
 hw/ppc/ppc4xx_pci.c                                |   19 +-
 hw/ppc/ppc_booke.c                                 |    4 +-
 hw/ppc/prep.c                                      |   10 +-
 hw/ppc/prep_systemio.c                             |    2 +-
 hw/ppc/spapr.c                                     |  182 +-
 hw/ppc/spapr_caps.c                                |   36 +-
 hw/ppc/spapr_cpu_core.c                            |   16 +-
 hw/ppc/spapr_drc.c                                 |   63 +-
 hw/ppc/spapr_events.c                              |   22 +-
 hw/ppc/spapr_hcall.c                               |  340 ++
 hw/ppc/spapr_iommu.c                               |    2 +-
 hw/ppc/spapr_numa.c                                |  416 ++-
 hw/ppc/spapr_nvdimm.c                              |  392 +++
 hw/ppc/spapr_pci.c                                 |   34 +-
 hw/ppc/spapr_pci_nvlink2.c                         |   17 +-
 hw/ppc/spapr_pci_vfio.c                            |    4 +-
 hw/ppc/spapr_rtas.c                                |   25 +-
 hw/ppc/spapr_rtc.c                                 |    8 +-
 hw/ppc/spapr_softmmu.c                             |   18 +-
 hw/ppc/spapr_vio.c                                 |    8 +-
 hw/ppc/spapr_vof.c                                 |    2 -
 hw/ppc/trace-events                                |   52 +-
 hw/ppc/vof.c                                       |    1 -
 hw/rdma/rdma_rm.c                                  |  104 +-
 hw/rdma/rdma_rm.h                                  |    2 +-
 hw/rdma/rdma_utils.c                               |   14 +-
 hw/rdma/rdma_utils.h                               |    2 +-
 hw/rdma/trace-events                               |    2 +-
 hw/rdma/vmw/pvrdma_dev_ring.c                      |    2 +-
 hw/rdma/vmw/pvrdma_main.c                          |   31 +-
 hw/rdma/vmw/pvrdma_qp_ops.c                        |    6 +-
 hw/remote/mpqemu-link.c                            |    3 -
 hw/remote/proxy-memory-listener.c                  |    2 +
 hw/remote/proxy.c                                  |   11 +-
 hw/riscv/Kconfig                                   |   20 +-
 hw/riscv/boot.c                                    |   54 +-
 hw/riscv/microchip_pfsoc.c                         |   67 +-
 hw/riscv/opentitan.c                               |   63 +-
 hw/riscv/shakti_c.c                                |   29 +-
 hw/riscv/sifive_e.c                                |   34 +-
 hw/riscv/sifive_u.c                                |  106 +-
 hw/riscv/spike.c                                   |   68 +-
 hw/riscv/virt.c                                    | 1266 +++++--
 hw/rtc/Kconfig                                     |    2 +
 hw/rtc/allwinner-rtc.c                             |    2 +-
 hw/rtc/aspeed_rtc.c                                |    2 +-
 hw/rtc/ds1338.c                                    |    2 +-
 hw/rtc/exynos4210_rtc.c                            |    2 +-
 hw/rtc/goldfish_rtc.c                              |    2 +-
 hw/rtc/m41t80.c                                    |    2 +-
 hw/rtc/m48t59-isa.c                                |    9 +-
 hw/rtc/m48t59.c                                    |    2 +-
 hw/rtc/mc146818rtc.c                               |   20 +-
 hw/rtc/pl031.c                                     |   13 +-
 hw/rtc/twl92230.c                                  |    2 +-
 hw/rtc/xlnx-zynqmp-rtc.c                           |    2 +-
 hw/s390x/ap-bridge.c                               |    2 +-
 hw/s390x/css-bridge.c                              |    2 +-
 hw/s390x/css.c                                     |   38 +-
 hw/s390x/event-facility.c                          |    4 +-
 hw/s390x/ipl.c                                     |   37 +-
 hw/s390x/s390-pci-bus.c                            |   20 +-
 hw/s390x/s390-pci-inst.c                           |   23 +-
 hw/s390x/s390-pci-vfio.c                           |    1 +
 hw/s390x/s390-skeys-kvm.c                          |    4 +-
 hw/s390x/s390-skeys.c                              |  206 +-
 hw/s390x/s390-virtio-ccw.c                         |   35 +-
 hw/s390x/sclp.c                                    |    4 +-
 hw/s390x/tod-kvm.c                                 |    2 +-
 hw/s390x/tod-tcg.c                                 |    4 +-
 hw/s390x/tod.c                                     |    2 +-
 hw/s390x/virtio-ccw.c                              |    3 +-
 hw/scsi/esp-pci.c                                  |    4 +-
 hw/scsi/esp.c                                      |  100 +-
 hw/scsi/lsi53c895a.c                               |    7 +-
 hw/scsi/megasas.c                                  |  148 +-
 hw/scsi/mptsas.c                                   |   19 +-
 hw/scsi/scsi-bus.c                                 |   19 +-
 hw/scsi/scsi-disk.c                                |    6 +-
 hw/scsi/spapr_vscsi.c                              |    3 +-
 hw/scsi/trace-events                               |   12 +-
 hw/scsi/vhost-scsi.c                               |   17 +-
 hw/scsi/virtio-scsi-dataplane.c                    |   60 +-
 hw/scsi/virtio-scsi.c                              |    6 +-
 hw/scsi/vmw_pvscsi.c                               |   23 +-
 hw/sd/allwinner-sdhost.c                           |   20 +-
 hw/sd/aspeed_sdhci.c                               |    7 +-
 hw/sd/bcm2835_sdhost.c                             |    6 +-
 hw/sd/cadence_sdhci.c                              |    2 +-
 hw/sd/meson.build                                  |    1 +
 hw/sd/npcm7xx_sdhci.c                              |  182 +
 hw/sd/pl181.c                                      |    3 +-
 hw/sd/pxa2xx_mmci.c                                |    4 +-
 hw/sd/sd.c                                         |   52 +-
 hw/sd/sdhci.c                                      |   65 +-
 hw/sd/ssi-sd.c                                     |   32 +-
 hw/sd/trace-events                                 |    4 +
 hw/sensor/Kconfig                                  |   17 +
 hw/sensor/dps310.c                                 |  225 ++
 hw/sensor/isl_pmbus_vr.c                           |  279 ++
 hw/sensor/lsm303dlhc_mag.c                         |  556 +++
 hw/sensor/meson.build                              |    3 +
 hw/sh4/r2d.c                                       |   73 +-
 hw/sh4/sh7750.c                                    |  639 ++--
 hw/sh4/sh7750_regnames.c                           |  148 +-
 hw/sh4/sh7750_regs.h                               | 1600 ++++-----
 hw/sh4/shix.c                                      |   12 +-
 hw/sh4/trace-events                                |    3 +
 hw/sh4/trace.h                                     |    1 +
 hw/smbios/smbios.c                                 |   88 +-
 hw/sparc/leon3.c                                   |    2 +-
 hw/sparc/sun4m.c                                   |    2 +-
 hw/sparc64/niagara.c                               |    2 +-
 hw/sparc64/sparc64.c                               |    4 +-
 hw/ssi/aspeed_smc.c                                | 1159 ++++---
 hw/ssi/meson.build                                 |    1 +
 hw/ssi/ssi.c                                       |    2 +-
 hw/ssi/xlnx-versal-ospi.c                          | 1852 ++++++++++
 hw/timer/Kconfig                                   |    6 +
 hw/timer/a9gtimer.c                                |   21 +
 hw/timer/arm_timer.c                               |    2 +-
 hw/timer/armv7m_systick.c                          |  118 +-
 hw/timer/etraxfs_timer.c                           |   34 +-
 hw/timer/ibex_timer.c                              |   42 +-
 hw/timer/meson.build                               |    2 +
 hw/timer/sh_timer.c                                |  151 +-
 hw/timer/sifive_pwm.c                              |  468 +++
 hw/timer/slavio_timer.c                            |    2 +-
 hw/timer/stellaris-gptm.c                          |  332 ++
 hw/timer/trace-events                              |   11 +
 hw/tpm/tpm_crb.c                                   |    1 +
 hw/tpm/tpm_ppi.c                                   |   11 +-
 hw/tpm/tpm_ppi.h                                   |    4 +-
 hw/tpm/tpm_tis_isa.c                               |    2 +-
 hw/usb/bus.c                                       |   26 +-
 hw/usb/desc-msos.c                                 |   10 +-
 hw/usb/desc.c                                      |   15 +-
 hw/usb/desc.h                                      |    3 +-
 hw/usb/dev-audio.c                                 |    4 +-
 hw/usb/dev-hid.c                                   |    6 +-
 hw/usb/dev-mtp.c                                   |    6 +-
 hw/usb/dev-smartcard-reader.c                      |    3 +-
 hw/usb/dev-storage-bot.c                           |    3 +-
 hw/usb/dev-storage-classic.c                       |    4 +-
 hw/usb/dev-uas.c                                   |    4 +-
 hw/usb/dev-wacom.c                                 |   72 +-
 hw/usb/hcd-dwc2.c                                  |    8 +-
 hw/usb/hcd-ehci.c                                  |    6 +-
 hw/usb/hcd-ohci.c                                  |  325 +-
 hw/usb/hcd-uhci.c                                  |   14 +-
 hw/usb/hcd-uhci.h                                  |    3 +-
 hw/usb/hcd-xhci.c                                  |   28 +-
 hw/usb/host-libusb.c                               |    4 +-
 hw/usb/libhw.c                                     |    3 +-
 hw/usb/quirks-ftdi-ids.h                           |    4 +-
 hw/usb/redirect.c                                  |   17 +-
 hw/usb/trace-events                                |    2 +-
 hw/usb/u2f-emulated.c                              |    2 +-
 hw/usb/vt82c686-uhci-pci.c                         |   15 +
 hw/vfio/ccw.c                                      |    4 +-
 hw/vfio/common.c                                   |    9 +
 hw/vfio/igd.c                                      |    4 +-
 hw/vfio/migration.c                                |    6 +-
 hw/vfio/pci-quirks.c                               |    2 +-
 hw/vfio/pci.c                                      |   38 +-
 hw/vfio/platform.c                                 |    6 +-
 hw/vfio/spapr.c                                    |    1 +
 hw/virtio/Kconfig                                  |    5 +
 hw/virtio/meson.build                              |    6 +-
 hw/virtio/trace-events                             |    6 +-
 hw/virtio/vhost-backend.c                          |   34 +-
 hw/virtio/vhost-iova-tree.c                        |  110 +
 hw/virtio/vhost-iova-tree.h                        |   27 +
 hw/virtio/vhost-shadow-virtqueue.c                 |  636 ++++
 hw/virtio/vhost-shadow-virtqueue.h                 |   87 +
 hw/virtio/vhost-user-i2c.c                         |   11 +-
 hw/virtio/vhost-user-rng-pci.c                     |   79 +
 hw/virtio/vhost-user-rng.c                         |  289 ++
 hw/virtio/vhost-user-vsock.c                       |    4 +-
 hw/virtio/vhost-user.c                             |  607 ++--
 hw/virtio/vhost-vdpa.c                             |  767 ++++-
 hw/virtio/vhost-vsock-common.c                     |   41 +-
 hw/virtio/vhost-vsock.c                            |   35 +-
 hw/virtio/vhost.c                                  |  155 +-
 hw/virtio/virtio-balloon.c                         |   48 +-
 hw/virtio/virtio-bus.c                             |   26 +-
 hw/virtio/virtio-crypto.c                          |    2 +-
 hw/virtio/virtio-iommu-pci.c                       |   16 +-
 hw/virtio/virtio-iommu.c                           |  132 +-
 hw/virtio/virtio-mem-pci.c                         |    5 +-
 hw/virtio/virtio-mem.c                             |  233 +-
 hw/virtio/virtio-mmio.c                            |   16 +-
 hw/virtio/virtio-pci.c                             |   22 +-
 hw/virtio/virtio-pmem.c                            |    2 +-
 hw/virtio/virtio.c                                 |  127 +-
 hw/watchdog/sbsa_gwdt.c                            |    3 +-
 hw/watchdog/trace-events                           |    4 +
 hw/watchdog/watchdog.c                             |   14 -
 hw/watchdog/wdt_aspeed.c                           |   34 +-
 hw/watchdog/wdt_diag288.c                          |    3 +-
 hw/watchdog/wdt_i6300esb.c                         |    3 +-
 hw/watchdog/wdt_ib700.c                            |    3 +-
 hw/watchdog/wdt_imx2.c                             |    4 +-
 hw/xen/xen-bus.c                                   |    8 +-
 hw/xen/xen-legacy-backend.c                        |    5 +-
 hw/xen/xen_pt.c                                    |    6 +-
 hw/xen/xen_pt.h                                    |    2 +-
 hw/xtensa/xtfpga.c                                 |    2 +-
 include/block/aio.h                                |    4 +-
 include/block/block-common.h                       |  419 +++
 include/block/block-copy.h                         |    8 +-
 include/block/block-global-state.h                 |  253 ++
 include/block/block-io.h                           |  368 ++
 include/block/block.h                              |  874 +----
 include/block/block_int-common.h                   | 1246 +++++++
 include/block/block_int-global-state.h             |  329 ++
 include/block/block_int-io.h                       |  194 ++
 include/block/block_int.h                          | 1419 +-------
 include/block/blockjob.h                           |   25 +-
 include/block/blockjob_int.h                       |   28 +
 include/block/dirty-bitmap.h                       |    4 +-
 include/block/nbd.h                                |    3 +-
 include/block/nvme.h                               |  126 +-
 include/block/raw-aio.h                            |    6 +-
 include/block/reqlist.h                            |   75 +
 include/block/snapshot.h                           |   13 +-
 include/chardev/char-fe.h                          |    2 +-
 include/chardev/char-socket.h                      |   86 +
 include/chardev/char.h                             |   34 +-
 include/disas/dis-asm.h                            |    6 +-
 include/elf.h                                      |    2 +
 include/exec/cpu-all.h                             |   21 +-
 include/exec/cpu-common.h                          |   50 +
 include/exec/cpu_ldst.h                            |  335 +-
 include/exec/exec-all.h                            |   81 +-
 include/exec/gdbstub.h                             |   25 +-
 include/exec/gen-icount.h                          |   48 +-
 include/exec/helper-gen.h                          |    2 -
 include/exec/helper-head.h                         |   19 +-
 include/exec/helper-proto.h                        |    1 -
 include/exec/helper-tcg.h                          |    1 -
 include/exec/memattrs.h                            |    9 +
 include/exec/memop.h                               |   29 +-
 include/exec/memopidx.h                            |   55 +
 include/exec/memory.h                              |   84 +-
 include/exec/plugin-gen.h                          |   12 +-
 include/exec/poison.h                              |    2 -
 include/exec/ram_addr.h                            |   13 +-
 include/exec/ramblock.h                            |    2 +
 include/exec/ramlist.h                             |    2 +-
 include/exec/translate-all.h                       |    1 +
 include/exec/translator.h                          |   44 +-
 include/fpu/softfloat-macros.h                     |   82 -
 include/fpu/softfloat-types.h                      |   23 +-
 include/fpu/softfloat.h                            |   24 +-
 include/glib-compat.h                              |   43 +-
 include/hw/acpi/acpi-defs.h                        |  529 +--
 include/hw/acpi/acpi.h                             |    2 +
 include/hw/acpi/acpi_dev_interface.h               |    3 +-
 include/hw/acpi/aml-build.h                        |   52 +-
 include/hw/acpi/erst.h                             |   24 +
 include/hw/acpi/generic_event_device.h             |    2 -
 include/hw/acpi/ich9.h                             |    1 +
 include/hw/acpi/pcihp.h                            |    2 -
 include/hw/adc/aspeed_adc.h                        |   55 +
 include/hw/arm/armv7m.h                            |   24 +
 include/hw/arm/aspeed.h                            |    1 +
 include/hw/arm/aspeed_soc.h                        |   11 +
 include/hw/arm/boot.h                              |   14 +-
 include/hw/arm/fsl-imx7.h                          |    5 +
 include/hw/arm/msf2-soc.h                          |    8 +-
 include/hw/arm/npcm7xx.h                           |    2 +
 include/hw/arm/nrf51_soc.h                         |    2 +
 include/hw/arm/stm32f100_soc.h                     |    8 +
 include/hw/arm/stm32f205_soc.h                     |    8 +
 include/hw/arm/stm32f405_soc.h                     |    3 +
 include/hw/arm/virt.h                              |   13 +-
 include/hw/arm/xlnx-versal.h                       |   46 +-
 include/hw/arm/xlnx-zynqmp.h                       |   18 +
 include/hw/boards.h                                |   51 +-
 include/hw/char/goldfish_tty.h                     |    2 +-
 include/hw/char/mchp_pfsoc_mmuart.h                |   17 +-
 include/hw/char/riscv_htif.h                       |    5 +-
 include/hw/clock.h                                 |   34 +-
 include/hw/core/cpu.h                              |   51 +-
 include/hw/core/tcg-cpu-ops.h                      |   90 +-
 include/hw/display/macfb.h                         |   42 +
 include/hw/display/vga.h                           |    6 +-
 include/hw/dma/xlnx-zdma.h                         |    2 +-
 include/hw/dma/xlnx_csu_dma.h                      |   26 +-
 include/hw/elf_ops.h                               |   40 +-
 include/hw/firmware/smbios.h                       |   10 +-
 include/hw/gpio/aspeed_gpio.h                      |    5 +-
 include/hw/hw.h                                    |    2 +-
 include/hw/i2c/aspeed_i2c.h                        |    8 +-
 include/hw/i2c/pmbus_device.h                      |   25 +-
 include/hw/i386/hostmem-epc.h                      |   28 +
 include/hw/i386/intel_iommu.h                      |    1 +
 include/hw/i386/ioapic_internal.h                  |    1 -
 include/hw/i386/microvm.h                          |    5 +-
 include/hw/i386/pc.h                               |   32 +-
 include/hw/i386/sgx-epc.h                          |   70 +
 include/hw/i386/x86-iommu.h                        |   12 -
 include/hw/i386/x86.h                              |    9 +-
 include/hw/ide/internal.h                          |    4 +-
 include/hw/input/i8042.h                           |   15 +
 include/hw/intc/arm_gicv3_common.h                 |   27 +-
 include/hw/intc/arm_gicv3_its_common.h             |   26 +-
 include/hw/intc/armv7m_nvic.h                      |    8 -
 include/hw/intc/goldfish_pic.h                     |    2 +-
 include/hw/intc/ibex_plic.h                        |   65 -
 include/hw/intc/m68k_irqc.h                        |    2 +-
 include/hw/intc/riscv_aclint.h                     |   80 +
 include/hw/intc/riscv_aplic.h                      |   79 +
 include/hw/intc/riscv_imsic.h                      |   68 +
 include/hw/intc/sifive_clint.h                     |   60 -
 include/hw/intc/sifive_plic.h                      |    4 +
 include/hw/ipack/ipack.h                           |    8 +-
 include/hw/isa/i8259_internal.h                    |    3 -
 include/hw/isa/isa.h                               |    3 -
 include/hw/isa/vt82c686.h                          |    4 +
 include/hw/loader.h                                |   78 +-
 include/hw/m68k/mcf.h                              |    1 +
 include/hw/mem/nvdimm.h                            |    2 +
 include/hw/mem/pc-dimm.h                           |    1 +
 include/hw/mips/mips.h                             |    3 -
 include/hw/misc/armv7m_ras.h                       |   37 +
 include/hw/misc/aspeed_i3c.h                       |   48 +
 include/hw/misc/aspeed_sbc.h                       |   32 +
 include/hw/misc/aspeed_scu.h                       |    2 +
 include/hw/misc/mac_via.h                          |  120 +-
 include/hw/misc/macio/pmu.h                        |    2 -
 include/hw/misc/mos6522.h                          |   46 +-
 include/hw/misc/pvpanic.h                          |    8 -
 include/hw/misc/virt_ctrl.h                        |    2 +-
 include/hw/misc/xlnx-versal-pmc-iou-slcr.h         |   78 +
 include/hw/misc/xlnx-zynqmp-apu-ctrl.h             |   93 +
 include/hw/misc/xlnx-zynqmp-crf.h                  |  211 ++
 include/hw/net/mv88w8618_eth.h                     |   12 +
 include/hw/nubus/mac-nubus-bridge.h                |   13 +-
 include/hw/nubus/nubus.h                           |   49 +-
 include/hw/nvram/xlnx-bbram.h                      |   54 +
 include/hw/nvram/xlnx-efuse.h                      |  132 +
 include/hw/nvram/xlnx-versal-efuse.h               |   68 +
 include/hw/nvram/xlnx-zynqmp-efuse.h               |   44 +
 include/hw/pci-bridge/xio3130_downstream.h         |   15 +
 include/hw/pci-host/i440fx.h                       |    1 -
 include/hw/pci-host/pnv_phb3.h                     |    7 +-
 include/hw/pci-host/pnv_phb4.h                     |  106 +-
 include/hw/pci-host/pnv_phb4_regs.h                |    3 +
 include/hw/pci/pci.h                               |  108 +-
 include/hw/pci/pci_bridge.h                        |    8 +
 include/hw/pci/pci_regs.h                          |    1 +
 include/hw/pci/pcie.h                              |    7 +
 include/hw/pci/pcie_sriov.h                        |   77 +
 include/hw/ppc/openpic.h                           |   25 +-
 include/hw/ppc/pnv.h                               |   81 +-
 include/hw/ppc/pnv_core.h                          |    2 +-
 include/hw/ppc/pnv_homer.h                         |    3 +
 include/hw/ppc/pnv_occ.h                           |    2 +
 include/hw/ppc/pnv_xive.h                          |   71 +
 include/hw/ppc/pnv_xscom.h                         |   15 +
 include/hw/ppc/ppc.h                               |    4 +
 include/hw/ppc/spapr.h                             |  113 +-
 include/hw/ppc/spapr_cpu_core.h                    |    5 +
 include/hw/ppc/spapr_numa.h                        |    1 +
 include/hw/ppc/spapr_nvdimm.h                      |    1 +
 include/hw/ppc/spapr_ovec.h                        |    1 +
 include/hw/ppc/spapr_vio.h                         |   30 +-
 include/hw/ppc/vof.h                               |    5 +
 include/hw/ppc/xive.h                              |   58 +-
 include/hw/ppc/xive2.h                             |  109 +
 include/hw/ppc/xive2_regs.h                        |  210 ++
 include/hw/qdev-core.h                             |   78 +-
 include/hw/qdev-properties.h                       |    1 +
 include/hw/rdma/rdma.h                             |    2 +-
 include/hw/register.h                              |    8 +
 include/hw/registerfields.h                        |   56 +-
 include/hw/riscv/boot.h                            |    5 +-
 include/hw/riscv/microchip_pfsoc.h                 |    1 -
 include/hw/riscv/opentitan.h                       |   10 +-
 include/hw/riscv/sifive_u.h                        |   15 +-
 include/hw/riscv/spike.h                           |    1 +
 include/hw/riscv/virt.h                            |   44 +-
 include/hw/rtc/mc146818rtc.h                       |    1 +
 include/hw/s390x/css.h                             |    3 +-
 include/hw/s390x/ioinst.h                          |    2 +-
 include/hw/s390x/s390-pci-bus.h                    |    8 +-
 include/hw/s390x/s390-pci-clp.h                    |    3 +-
 include/hw/s390x/storage-keys.h                    |   65 +-
 include/hw/scsi/esp.h                              |   11 +-
 include/hw/scsi/scsi.h                             |   34 +-
 include/hw/sd/npcm7xx_sdhci.h                      |   65 +
 include/hw/sensor/isl_pmbus_vr.h                   |   52 +
 include/hw/sh4/sh.h                                |   19 +-
 include/hw/sh4/sh_intc.h                           |    2 +-
 include/hw/southbridge/piix.h                      |    2 -
 include/hw/ssi/aspeed_smc.h                        |   86 +-
 include/hw/ssi/xlnx-versal-ospi.h                  |  111 +
 include/hw/timer/armv7m_systick.h                  |   36 +-
 include/hw/timer/ibex_timer.h                      |    3 +-
 include/hw/timer/sifive_pwm.h                      |   62 +
 include/hw/timer/stellaris-gptm.h                  |   51 +
 include/hw/tricore/triboard.h                      |    1 -
 include/hw/usb/msd.h                               |    2 +-
 include/hw/virtio/vhost-backend.h                  |    6 -
 include/hw/virtio/vhost-user-i2c.h                 |    3 +
 include/hw/virtio/vhost-user-rng.h                 |   33 +
 include/hw/virtio/vhost-user.h                     |    3 +-
 include/hw/virtio/vhost-vdpa.h                     |   12 +
 include/hw/virtio/vhost-vsock-common.h             |    5 +
 include/hw/virtio/vhost-vsock.h                    |    3 -
 include/hw/virtio/vhost.h                          |    8 +-
 include/hw/virtio/virtio-blk.h                     |    2 +-
 include/hw/virtio/virtio-bus.h                     |    4 +-
 include/hw/virtio/virtio-gpu-bswap.h               |    1 -
 include/hw/virtio/virtio-gpu.h                     |    9 +-
 include/hw/virtio/virtio-iommu.h                   |    3 +-
 include/hw/virtio/virtio-mem.h                     |   15 +-
 include/hw/virtio/virtio-net.h                     |    7 +-
 include/hw/virtio/virtio.h                         |    7 +-
 include/hw/watchdog/wdt_aspeed.h                   |    1 +
 include/hw/xen/xen-bus-helper.h                    |    4 +-
 include/hw/xen/xen-bus.h                           |    4 +-
 include/hw/xen/xen_common.h                        |    2 +-
 include/hw/xen/xen_pvdev.h                         |    2 +-
 include/libdecnumber/decNumber.h                   |    4 +
 include/libdecnumber/decNumberLocal.h              |    2 +-
 include/migration/blocker.h                        |   16 +
 include/migration/colo.h                           |    1 +
 include/migration/vmstate.h                        |    2 -
 include/monitor/hmp-target.h                       |    4 +-
 include/monitor/hmp.h                              |    6 +-
 include/monitor/monitor.h                          |    6 +-
 include/monitor/qdev.h                             |   27 +-
 include/net/net.h                                  |    7 +
 include/net/vhost_net.h                            |    7 +-
 include/qapi/compat-policy.h                       |    7 +
 include/qapi/error.h                               |   20 +-
 include/qapi/qmp/dispatch.h                        |    6 +-
 include/qapi/qmp/qjson.h                           |    8 +-
 include/qapi/qobject-input-visitor.h               |    4 -
 include/qapi/qobject-output-visitor.h              |    4 -
 include/qapi/type-helpers.h                        |   14 +
 include/qapi/util.h                                |    8 +-
 include/qapi/visitor-impl.h                        |    9 +-
 include/qapi/visitor.h                             |   26 +-
 include/qemu-common.h                              |   29 +-
 include/qemu/buffer.h                              |    2 +-
 include/qemu/cacheinfo.h                           |   21 +
 include/qemu/compiler.h                            |   20 +-
 include/qemu/coroutine-tls.h                       |  165 +
 include/qemu/coroutine.h                           |   10 +
 include/qemu/cpuid.h                               |   20 +-
 include/qemu/cutils.h                              |    5 +
 include/qemu/dbus.h                                |   24 +
 include/qemu/error-report.h                        |   26 +-
 include/qemu/event_notifier.h                      |    1 +
 include/qemu/hbitmap.h                             |   12 +
 include/qemu/host-utils.h                          |  165 +-
 include/qemu/hw-version.h                          |   27 +
 include/qemu/int128.h                              |   91 +-
 include/qemu/iova-tree.h                           |   46 +-
 include/qemu/job.h                                 |   51 +-
 include/qemu/log-for-trace.h                       |    2 +-
 include/qemu/log.h                                 |    2 +-
 include/qemu/madvise.h                             |   95 +
 include/qemu/main-loop.h                           |   56 +
 include/qemu/memalign.h                            |   61 +
 include/qemu/mmap-alloc.h                          |   23 +
 include/qemu/module.h                              |    6 +-
 include/qemu/mprotect.h                            |   14 +
 include/qemu/option.h                              |    2 +
 include/qemu/osdep.h                               |  170 +-
 include/qemu/plugin.h                              |   33 +-
 include/qemu/qemu-plugin.h                         |   47 +
 include/qemu/qemu-print.h                          |    8 +-
 include/qemu/range.h                               |    4 +-
 include/qemu/rcu.h                                 |    7 +-
 include/qemu/readline.h                            |    2 +-
 include/qemu/timer.h                               |    2 +-
 include/qemu/transactions.h                        |    3 +
 include/qemu/typedefs.h                            |    4 +
 include/qemu/vfio-helpers.h                        |    2 +-
 include/qemu/vhost-user-server.h                   |    5 +
 include/qemu/xattr.h                               |    4 +-
 include/qom/object.h                               |   18 +-
 include/standard-headers/asm-x86/kvm_para.h        |    1 +
 include/standard-headers/drm/drm_fourcc.h          |  132 +-
 include/standard-headers/linux/ethtool.h           |   32 +
 include/standard-headers/linux/fuse.h              |   68 +-
 include/standard-headers/linux/pci_regs.h          |  148 +-
 include/standard-headers/linux/pvpanic.h           |    9 +
 include/standard-headers/linux/virtio_gpio.h       |   72 +
 include/standard-headers/linux/virtio_gpu.h        |   18 +-
 include/standard-headers/linux/virtio_i2c.h        |   47 +
 include/standard-headers/linux/virtio_ids.h        |   24 +
 include/standard-headers/linux/virtio_iommu.h      |    8 +-
 include/standard-headers/linux/virtio_mem.h        |    9 +-
 include/standard-headers/linux/virtio_pcidev.h     |   65 +
 include/standard-headers/linux/virtio_scmi.h       |   24 +
 include/standard-headers/linux/virtio_vsock.h      |    3 +-
 include/sysemu/accel-ops.h                         |    3 +
 include/sysemu/arch_init.h                         |   15 +-
 include/sysemu/block-backend-common.h              |  102 +
 include/sysemu/block-backend-global-state.h        |  116 +
 include/sysemu/block-backend-io.h                  |  161 +
 include/sysemu/block-backend.h                     |  263 +-
 include/sysemu/blockdev.h                          |   17 +-
 include/sysemu/cpus.h                              |    2 -
 include/sysemu/device_tree.h                       |    1 +
 include/sysemu/dma.h                               |  115 +-
 include/sysemu/hax.h                               |   18 +-
 include/sysemu/hvf_int.h                           |   12 +-
 include/sysemu/hw_accel.h                          |    5 -
 include/sysemu/kvm.h                               |   45 +-
 include/sysemu/kvm_int.h                           |    2 +-
 include/sysemu/memory_mapping.h                    |    5 +-
 include/sysemu/nvmm.h                              |    7 +-
 include/sysemu/os-posix.h                          |    1 +
 include/sysemu/os-win32.h                          |    8 +
 include/sysemu/rtc.h                               |   58 +
 include/sysemu/sev.h                               |   28 -
 include/sysemu/sysemu.h                            |    1 -
 include/sysemu/watchdog.h                          |    1 -
 include/tcg/tcg-ldst.h                             |   79 +
 include/tcg/tcg-op-gvec.h                          |   22 +
 include/tcg/tcg-op.h                               |    6 +-
 include/tcg/tcg-opc.h                              |    3 +
 include/tcg/tcg.h                                  |  218 +-
 include/trace-tcg.h                                |    6 -
 include/ui/clipboard.h                             |   88 +-
 include/ui/console.h                               |   85 +-
 include/ui/dbus-display.h                          |   17 +
 include/ui/dbus-module.h                           |   11 +
 include/ui/egl-context.h                           |    6 +-
 include/ui/egl-helpers.h                           |    3 +
 include/ui/gtk.h                                   |   17 +-
 include/ui/qemu-spice.h                            |    6 +
 include/ui/sdl2.h                                  |   18 +-
 include/ui/spice-display.h                         |    5 +-
 include/user/safe-syscall.h                        |  140 +
 io/channel-command.c                               |    6 +-
 io/channel-file.c                                  |    3 +-
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 qom/qom-qmp-cmds.c                                 |    2 +-
 replay/replay-char.c                               |    4 +-
 replay/replay-events.c                             |   10 +-
 roms/Makefile                                      |    5 +-
 roms/Makefile.edk2                                 |   37 +-
 roms/SLOF                                          |    2 +-
 roms/edk2                                          |    2 +-
 roms/edk2-build.sh                                 |    2 +-
 roms/openbios                                      |    2 +-
 roms/opensbi                                       |    2 +-
 roms/seabios                                       |    2 +-
 roms/seabios-hppa                                  |    2 +-
 roms/skiboot                                       |    2 +-
 scripts/analyze-migration.py                       |    6 +-
 scripts/block-coroutine-wrapper.py                 |   12 +-
 scripts/checkpatch.pl                              |   13 +-
 .../ci/org.centos/stream/8/build-environment.yml   |   51 +
 scripts/ci/org.centos/stream/8/x86_64/configure    |  206 ++
 scripts/ci/org.centos/stream/8/x86_64/test-avocado |   70 +
 scripts/ci/org.centos/stream/README                |   17 +
 scripts/ci/setup/build-environment.yml             |   63 +
 scripts/ci/setup/gitlab-runner.yml                 |   38 +
 scripts/cocci-macro-file.h                         |    6 +-
 scripts/coccinelle/use-g_new-etc.cocci             |   75 +
 scripts/coverity-scan/coverity-scan.docker         |    1 -
 scripts/coverity-scan/model.c                      |    3 +-
 scripts/coverity-scan/run-coverity-scan            |    4 +-
 scripts/cpu-x86-uarch-abi.py                       |    7 +-
 scripts/device-crash-test                          |   36 +-
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 scripts/kvm/vmxcap                                 |    1 +
 scripts/make-config-poison.sh                      |   16 +
 scripts/make-release                               |    7 +-
 scripts/meson-buildoptions.py                      |  165 +
 scripts/meson-buildoptions.sh                      |  370 ++
 scripts/meson.build                                |    2 +-
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 scripts/mtest2make.py                              |  129 +-
 scripts/nsis.py                                    |   17 +-
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 scripts/qapi/commands.py                           |  116 +-
 scripts/qapi/common.py                             |   83 +-
 scripts/qapi/events.py                             |   15 +-
 scripts/qapi/expr.py                               |  120 +-
 scripts/qapi/gen.py                                |   54 +-
 scripts/qapi/introspect.py                         |   56 +-
 scripts/qapi/main.py                               |   14 +-
 scripts/qapi/mypy.ini                              |    5 -
 scripts/qapi/parser.py                             |  152 +-
 scripts/qapi/pylintrc                              |   20 +-
 scripts/qapi/schema.py                             |  192 +-
 scripts/qapi/types.py                              |   66 +-
 scripts/qapi/visit.py                              |   43 +-
 scripts/qemu-binfmt-conf.sh                        |   24 +-
 scripts/qmp/qemu-ga-client                         |    2 +-
 scripts/qmp/qmp-shell                              |    2 +-
 scripts/qmp/qmp-shell-wrap                         |   11 +
 scripts/qmp/qom-fuse                               |    2 +-
 scripts/qmp/qom-get                                |    2 +-
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 scripts/show-fixed-bugs.sh                         |   91 -
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 scripts/simplebench/bench_block_job.py             |    3 +-
 scripts/simplebench/img_bench_templater.py         |   95 +
 scripts/simplebench/table_templater.py             |   62 +
 scripts/switch-timer-api                           |  178 -
 scripts/tap-driver.pl                              |  379 --
 scripts/tap-merge.pl                               |  111 -
 scripts/tracetool/__init__.py                      |   41 +-
 scripts/tracetool/format/tcg_h.py                  |   83 -
 scripts/tracetool/format/tcg_helper_c.py           |   79 -
 scripts/tracetool/format/tcg_helper_h.py           |   48 -
 scripts/tracetool/format/tcg_helper_wrapper_h.py   |   70 -
 scripts/tracetool/format/ust_events_h.py           |    4 +-
 scripts/tracetool/vcpu.py                          |   14 +-
 scripts/update-linux-headers.sh                    |   19 +-
 scsi/qemu-pr-helper.c                              |   11 +-
 semihosting/arm-compat-semi.c                      |  128 +-
 semihosting/config.c                               |    6 +-
 softmmu/arch_init.c                                |   67 +-
 softmmu/bootdevice.c                               |    4 +-
 softmmu/cpu-timers.c                               |    1 -
 softmmu/cpus.c                                     |   56 +-
 softmmu/device_tree.c                              |   49 +-
 softmmu/dma-helpers.c                              |   59 +-
 softmmu/globals.c                                  |    2 -
 softmmu/memory.c                                   |  302 +-
 softmmu/memory_mapping.c                           |   67 +-
 softmmu/meson.build                                |   29 +-
 softmmu/physmem.c                                  |  156 +-
 softmmu/qdev-monitor.c                             |  170 +-
 softmmu/qemu-seccomp.c                             |  282 +-
 softmmu/qtest.c                                    |    5 +-
 softmmu/rtc.c                                      |    2 +-
 softmmu/runstate.c                                 |    3 +-
 softmmu/trace-events                               |    2 +
 softmmu/vl.c                                       |  153 +-
 storage-daemon/qemu-storage-daemon.c               |   80 +-
 stubs/arch_type.c                                  |    4 -
 stubs/iothread-lock-block.c                        |    8 +
 stubs/meson.build                                  |   15 +-
 stubs/pci-host-piix.c                              |    7 -
 stubs/qdev.c                                       |    7 +
 stubs/qmp-quit.c                                   |    8 +
 stubs/usb-dev-stub.c                               |    8 +
 stubs/virtio-gpu-udmabuf.c                         |   27 -
 subprojects/libvhost-user/libvhost-user.c          |   86 +-
 subprojects/libvhost-user/libvhost-user.h          |    2 +
 target/alpha/cpu-qom.h                             |    3 +-
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 target/arm/cpu64.c                                 |  579 ++--
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 target/arm/debug_helper.c                          |   23 +
 target/arm/gdbstub.c                               |  188 +-
 target/arm/gdbstub64.c                             |  140 +
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 target/arm/helper-mve.h                            |  425 +++
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 target/arm/hvf/hvf.c                               | 1349 ++++++++
 target/arm/hvf/meson.build                         |    3 +
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 target/arm/hvf_arm.h                               |   18 +
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 target/arm/machine.c                               |   23 +
 target/arm/meson.build                             |    2 +
 target/arm/mte_helper.c                            |    7 +-
 target/arm/mve.decode                              |  471 ++-
 target/arm/mve_helper.c                            | 1918 ++++++++++-
 target/arm/op_helper.c                             |   16 +
 target/arm/pauth_helper.c                          |    2 +-
 target/arm/psci.c                                  |   70 +-
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 target/arm/syndrome.h                              |   17 +
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 target/arm/tlb_helper.c                            |  105 +-
 target/arm/translate-a32.h                         |    9 +-
 target/arm/translate-a64.c                         |  261 +-
 target/arm/translate-m-nocp.c                      |    8 +-
 target/arm/translate-mve.c                         | 1466 +++++++-
 target/arm/translate-neon.c                        |   25 +-
 target/arm/translate-sve.c                         |   78 +-
 target/arm/translate-vfp.c                         |   43 +-
 target/arm/translate.c                             |  236 +-
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 target/arm/vec_internal.h                          |   11 +
 target/avr/cpu-qom.h                               |    4 +-
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 target/hexagon/gen_dectree_import.c                |   13 +
 target/hexagon/gen_helper_funcs.py                 |  115 +-
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 target/hexagon/gen_semantics.c                     |   33 +
 target/hexagon/gen_tcg.h                           |   15 +-
 target/hexagon/gen_tcg_funcs.py                    |  272 +-
 target/hexagon/gen_tcg_hvx.h                       |  903 +++++
 target/hexagon/genptr.c                            |  241 +-
 target/hexagon/helper.h                            |   18 +
 target/hexagon/hex_arch_types.h                    |    5 +
 target/hexagon/hex_common.py                       |   15 +
 target/hexagon/hex_regs.h                          |    1 +
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 target/hexagon/imported/allext_macros.def          |   25 +
 target/hexagon/imported/allextenc.def              |   20 +
 target/hexagon/imported/allidefs.def               |    1 +
 target/hexagon/imported/encode.def                 |    1 +
 target/hexagon/imported/macros.def                 |   88 +
 target/hexagon/imported/mmvec/encode_ext.def       |  794 +++++
 target/hexagon/imported/mmvec/ext.idef             | 2606 ++++++++++++++
 target/hexagon/imported/mmvec/macros.def           |  842 +++++
 target/hexagon/insn.h                              |    3 +
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 target/hexagon/macros.h                            |   38 +-
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 target/hexagon/mmvec/decode_ext_mmvec.c            |  236 ++
 target/hexagon/mmvec/decode_ext_mmvec.h            |   24 +
 target/hexagon/mmvec/macros.h                      |  350 ++
 target/hexagon/mmvec/mmvec.h                       |   82 +
 target/hexagon/mmvec/system_ext_mmvec.c            |   47 +
 target/hexagon/mmvec/system_ext_mmvec.h            |   25 +
 target/hexagon/op_helper.c                         |  326 +-
 target/hexagon/translate.c                         |  320 +-
 target/hexagon/translate.h                         |   62 +
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 target/i386/helper.c                               |    9 +-
 target/i386/helper.h                               |    1 -
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 target/i386/hvf/vmx.h                              |   19 +-
 target/i386/hvf/x86.c                              |    6 +-
 target/i386/hvf/x86.h                              |   34 -
 target/i386/hvf/x86_emu.c                          |  110 +-
 target/i386/hvf/x86_emu.h                          |   22 +-
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 target/i386/hvf/x86hvf.h                           |    2 -
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 target/i386/kvm/kvm-cpu.c                          |   20 +-
 target/i386/kvm/kvm.c                              |  437 ++-
 target/i386/kvm/kvm_i386.h                         |    3 +
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 target/i386/kvm/sev-stub.c                         |   22 +
 target/i386/machine.c                              |  139 +-
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 target/i386/ops_sse_header.h                       |    3 +
 target/i386/sev-stub.c                             |   83 -
 target/i386/sev-sysemu-stub.c                      |   70 +
 target/i386/sev.c                                  |  401 ++-
 target/i386/sev.h                                  |   62 +
 target/i386/sev_i386.h                             |   41 -
 target/i386/svm.h                                  |    8 +
 target/i386/tcg/fpu_helper.c                       |   13 +
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 target/i386/tcg/sysemu/seg_helper.c                |   63 +
 target/i386/tcg/sysemu/svm_helper.c                |  122 +-
 target/i386/tcg/tcg-cpu.c                          |    9 +-
 target/i386/tcg/translate.c                        |   88 +-
 target/i386/tcg/user/excp_helper.c                 |   23 +-
 target/i386/whpx/whpx-accel-ops.c                  |   10 +-
 target/i386/whpx/whpx-all.c                        |   55 +-
 target/i386/xsave_helper.c                         |   28 +
 target/m68k/cpu-qom.h                              |    3 +-
 target/m68k/cpu.c                                  |    4 +-
 target/m68k/cpu.h                                  |   17 +-
 target/m68k/helper.c                               |    6 +-
 target/m68k/helper.h                               |    1 +
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 target/m68k/op_helper.c                            |   25 +-
 target/m68k/translate.c                            |   46 +-
 target/microblaze/cpu-qom.h                        |    3 +-
 target/microblaze/cpu.c                            |    5 +-
 target/microblaze/cpu.h                            |   28 +-
 target/microblaze/helper.c                         |   26 +-
 target/microblaze/mmu.c                            |    1 +
 target/microblaze/mmu.h                            |    2 +
 target/microblaze/op_helper.c                      |    1 +
 target/microblaze/translate.c                      |   34 +-
 target/mips/cpu-defs.c.inc                         |    8 +-
 target/mips/cpu-param.h                            |    2 +-
 target/mips/cpu-qom.h                              |    3 +-
 target/mips/cpu.c                                  |   15 +-
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 target/mips/helper.h                               |   18 +-
 target/mips/internal.h                             |   26 +-
 target/mips/tcg/exception.c                        |   19 +-
 target/mips/tcg/ldst_helper.c                      |  122 +-
 target/mips/tcg/meson.build                        |    9 +-
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 target/mips/tcg/mips16e_translate.c.inc            |    6 +-
 target/mips/tcg/mips32r6.decode                    |   36 -
 target/mips/tcg/mips64r6.decode                    |   27 -
 target/mips/tcg/msa.decode                         |  247 +-
 target/mips/tcg/msa_helper.c                       |  459 +--
 target/mips/tcg/msa_translate.c                    | 2638 ++++----------
 target/mips/tcg/nanomips_translate.c.inc           |   34 +-
 target/mips/tcg/op_helper.c                        |  118 -
 target/mips/tcg/rel6.decode                        |   49 +
 target/mips/tcg/rel6_translate.c                   |   20 +-
 target/mips/tcg/sysemu/special_helper.c            |    1 +
 target/mips/tcg/sysemu/tlb_helper.c                |   18 +
 target/mips/tcg/tcg-internal.h                     |   16 +-
 target/mips/tcg/translate.c                        |  446 +--
 target/mips/tcg/translate.h                        |   29 +
 target/mips/tcg/tx79.decode                        |   14 +-
 target/mips/tcg/tx79_translate.c                   |   70 +-
 target/mips/tcg/user/meson.build                   |    3 -
 target/mips/tcg/user/tlb_helper.c                  |   64 -
 target/mips/tcg/vr54xx.decode                      |   27 +
 target/mips/tcg/vr54xx_helper.c                    |  142 +
 target/mips/tcg/vr54xx_helper.h.inc                |   24 +
 target/mips/tcg/vr54xx_translate.c                 |   72 +
 target/nios2/cpu.c                                 |   27 +-
 target/nios2/cpu.h                                 |   24 +-
 target/nios2/helper.c                              |    7 +-
 target/nios2/helper.h                              |    6 +-
 target/nios2/meson.build                           |    3 +-
 target/nios2/mmu.c                                 |  257 +-
 target/nios2/mmu.h                                 |    3 +-
 target/nios2/nios2-semi.c                          |    4 +-
 target/nios2/op_helper.c                           |   29 -
 target/nios2/trace-events                          |   10 +
 target/nios2/translate.c                           |   99 +-
 target/openrisc/cpu.c                              |    4 +-
 target/openrisc/cpu.h                              |   31 +-
 target/openrisc/interrupt.c                        |    3 +-
 target/openrisc/machine.c                          |    1 -
 target/openrisc/meson.build                        |    8 +-
 target/openrisc/mmu.c                              |   10 +-
 target/openrisc/translate.c                        |   20 +-
 target/ppc/arch_dump.c                             |    2 +-
 target/ppc/cpu-models.c                            |   57 +-
 target/ppc/cpu-models.h                            |   24 +-
 target/ppc/cpu-qom.h                               |   37 +-
 target/ppc/cpu.c                                   |   32 +-
 target/ppc/cpu.h                                   |  257 +-
 target/ppc/cpu_init.c                              | 3114 ++++-------------
 target/ppc/dfp_helper.c                            |  168 +-
 target/ppc/excp_helper.c                           | 1812 +++++++---
 target/ppc/fpu_helper.c                            |  970 +++---
 target/ppc/gdbstub.c                               |   40 +-
 target/ppc/helper.h                                |  323 +-
 target/ppc/helper_regs.c                           |  452 ++-
 target/ppc/insn32.decode                           |  579 ++++
 target/ppc/insn64.decode                           |  104 +
 target/ppc/int_helper.c                            |  730 ++--
 target/ppc/internal.h                              |   56 +-
 target/ppc/machine.c                               |  145 +-
 target/ppc/mem_helper.c                            |    1 -
 target/ppc/meson.build                             |    9 +-
 target/ppc/mfrom_table.c.inc                       |   78 -
 target/ppc/mfrom_table_gen.c                       |   34 -
 target/ppc/misc_helper.c                           |   50 +-
 target/ppc/mmu-hash32.c                            |   48 +-
 target/ppc/mmu-hash32.h                            |    9 -
 target/ppc/mmu-hash64.c                            |    4 +-
 target/ppc/mmu-hash64.h                            |    5 +
 target/ppc/mmu-radix64.c                           |   99 +-
 target/ppc/mmu-radix64.h                           |    1 +
 target/ppc/mmu_common.c                            | 1549 +++++++++
 target/ppc/mmu_helper.c                            | 1923 +----------
 target/ppc/monitor.c                               |    9 +-
 target/ppc/power8-pmu-regs.c.inc                   |  325 ++
 target/ppc/power8-pmu.c                            |  351 ++
 target/ppc/power8-pmu.h                            |   24 +
 target/ppc/spr_common.h                            |  209 ++
 target/ppc/spr_tcg.h                               |  136 -
 target/ppc/timebase_helper.c                       |   30 +-
 target/ppc/trace-events                            |    8 +
 target/ppc/translate.c                             | 1546 ++-------
 target/ppc/translate/branch-impl.c.inc             |   33 +
 target/ppc/translate/dfp-impl.c.inc                |  419 ++-
 target/ppc/translate/dfp-ops.c.inc                 |  165 -
 target/ppc/translate/fixedpoint-impl.c.inc         |  239 +-
 target/ppc/translate/fp-impl.c.inc                 |  463 +--
 target/ppc/translate/fp-ops.c.inc                  |   29 -
 target/ppc/translate/vector-impl.c.inc             |   56 -
 target/ppc/translate/vmx-impl.c.inc                | 1917 ++++++++++-
 target/ppc/translate/vmx-ops.c.inc                 |   69 +-
 target/ppc/translate/vsx-impl.c.inc                | 1576 ++++++---
 target/ppc/translate/vsx-ops.c.inc                 |   76 -
 target/ppc/user_only_helper.c                      |   15 +-
 target/riscv/XVentanaCondOps.decode                |   25 +
 target/riscv/bitmanip_helper.c                     |   65 +-
 target/riscv/cpu.c                                 |  503 ++-
 target/riscv/cpu.h                                 |  404 ++-
 target/riscv/cpu_bits.h                            |  275 +-
 target/riscv/cpu_helper.c                          |  594 +++-
 target/riscv/csr.c                                 | 2096 +++++++++--
 target/riscv/fpu_helper.c                          |  295 +-
 target/riscv/gdbstub.c                             |  271 +-
 target/riscv/helper.h                              |  491 ++-
 target/riscv/insn16.decode                         |   27 +-
 target/riscv/insn32.decode                         |  480 +--
 target/riscv/insn_trans/trans_privileged.c.inc     |   19 +-
 target/riscv/insn_trans/trans_rva.c.inc            |   71 +-
 target/riscv/insn_trans/trans_rvb.c.inc            |  516 +--
 target/riscv/insn_trans/trans_rvd.c.inc            |  377 +-
 target/riscv/insn_trans/trans_rvf.c.inc            |  424 ++-
 target/riscv/insn_trans/trans_rvh.c.inc            |  266 +-
 target/riscv/insn_trans/trans_rvi.c.inc            |  941 +++--
 target/riscv/insn_trans/trans_rvm.c.inc            |  375 +-
 target/riscv/insn_trans/trans_rvv.c.inc            | 2828 +++++++++------
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 target/riscv/kvm.c                                 |  535 +++
 target/riscv/kvm_riscv.h                           |   25 +
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 target/riscv/machine.c                             |  173 +-
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 target/riscv/sbi_ecall_interface.h                 |   72 +
 target/riscv/translate.c                           | 1300 ++++---
 target/riscv/vector_helper.c                       | 3623 ++++++++++----------
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 tests/acceptance/x86_cpu_model_versions.py         |  358 --
 tests/avocado/README.rst                           |   10 +
 tests/avocado/avocado_qemu/__init__.py             |  642 ++++
 tests/avocado/boot_linux.py                        |  140 +
 tests/avocado/boot_linux_console.py                | 1266 +++++++
 tests/avocado/boot_xen.py                          |  116 +
 tests/avocado/cpu_queries.py                       |   34 +
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 tests/avocado/hotplug_cpu.py                       |   37 +
 tests/avocado/info_usernet.py                      |   29 +
 tests/avocado/intel_iommu.py                       |  119 +
 tests/avocado/linux_initrd.py                      |   89 +
 tests/avocado/linux_ssh_mips_malta.py              |  213 ++
 tests/avocado/load_bflt.py                         |   54 +
 tests/avocado/machine_arm_canona1100.py            |   35 +
 tests/avocado/machine_arm_integratorcp.py          |   99 +
 tests/avocado/machine_arm_n8x0.py                  |   49 +
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 tests/avocado/machine_mips_malta.py                |  120 +
 tests/avocado/machine_rx_gdbsim.py                 |   73 +
 tests/avocado/machine_s390_ccw_virtio.py           |  272 ++
 tests/avocado/machine_sparc64_sun4u.py             |   36 +
 tests/avocado/machine_sparc_leon3.py               |   37 +
 tests/avocado/migration.py                         |   81 +
 tests/avocado/multiprocess.py                      |   95 +
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 tests/avocado/replay_kernel.py                     |  528 +++
 tests/avocado/replay_linux.py                      |  116 +
 tests/avocado/reverse_debugging.py                 |  210 ++
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 tests/avocado/virtio_check_params.py               |  144 +
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 tests/avocado/x86_cpu_model_versions.py            |  358 ++
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 tests/qapi-schema/union-bad-discriminator.json     |   15 +
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 tests/qapi-schema/union-base-any.err               |    2 +
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 tests/qapi-schema/union-base-any.out               |    0
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 tests/qapi-schema/union-base-no-discriminator.err  |    2 +-
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 tests/qapi-schema/union-branch-invalid-dict.json   |    4 +
 tests/qapi-schema/union-clash-branches.err         |    2 -
 tests/qapi-schema/union-clash-branches.json        |    7 -
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 tests/qapi-schema/union-clash-member.json          |   15 +
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 .../qapi-schema/union-discriminator-bad-name.json  |   10 +
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 tests/qapi-schema/union-inline-invalid-dict.json   |   11 +
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 tests/qemu-iotests/check                           |   26 +-
 tests/qemu-iotests/common.filter                   |   76 +-
 tests/qemu-iotests/common.qemu                     |    7 +-
 tests/qemu-iotests/common.rc                       |   79 +-
 tests/qemu-iotests/common.tls                      |   31 +-
 tests/qemu-iotests/iotests.py                      |  495 ++-
 tests/qemu-iotests/linters.py                      |  105 +
 tests/qemu-iotests/meson.build                     |   33 +-
 tests/qemu-iotests/mypy.ini                        |   12 +
 tests/qemu-iotests/pylintrc                        |   22 +-
 tests/qemu-iotests/socket_scm_helper.c             |  136 -
 tests/qemu-iotests/testenv.py                      |   77 +-
 tests/qemu-iotests/testrunner.py                   |  187 +-
 tests/qemu-iotests/tests/block-status-cache        |  135 +
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 .../qemu-iotests/tests/graph-changes-while-io.out  |    5 +
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 tests/qemu-iotests/tests/image-fleecing.out        |  358 ++
 .../tests/migrate-bitmaps-postcopy-test            |   16 +-
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 tests/qemu-iotests/tests/migration-permissions     |  101 +
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 .../tests/mirror-ready-cancel-error.out            |    5 +
 tests/qemu-iotests/tests/mirror-top-perms          |   27 +-
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 tests/qemu-iotests/tests/parallels-read-bitmap     |    6 +-
 tests/qemu-iotests/tests/qsd-jobs.out              |    2 +-
 .../qemu-iotests/tests/remove-bitmap-from-backing  |   17 +-
 tests/qemu-iotests/tests/stream-error-on-reset     |  140 +
 tests/qemu-iotests/tests/stream-error-on-reset.out |    5 +
 tests/qtest/acpi-utils.c                           |   14 +
 tests/qtest/am53c974-test.c                        |   66 +
 tests/qtest/arm-cpu-features.c                     |   42 +-
 tests/qtest/bios-tables-test.c                     |  249 +-
 tests/qtest/boot-order-test.c                      |    5 +
 tests/qtest/boot-serial-test.c                     |   15 +-
 tests/qtest/cdrom-test.c                           |   70 +-
 tests/qtest/dbus-display-test.c                    |  257 ++
 tests/qtest/dbus-vmstate1.xml                      |   12 -
 tests/qtest/device-plug-test.c                     |   37 +-
 tests/qtest/drive_del-test.c                       |   35 +-
 tests/qtest/e1000e-test.c                          |    4 +-
 tests/qtest/endianness-test.c                      |    5 +-
 tests/qtest/erst-test.c                            |  164 +
 tests/qtest/fdc-test.c                             |    2 +-
 tests/qtest/fuzz-lsi53c895a-test.c                 |   52 +
 tests/qtest/fuzz-megasas-test.c                    |   30 +
 tests/qtest/fuzz-sdcard-test.c                     |   76 +
 tests/qtest/fuzz-xlnx-dp-test.c                    |   33 +
 tests/qtest/fuzz/generic_fuzz.c                    |   55 +-
 tests/qtest/fuzz/meson.build                       |    6 +-
 tests/qtest/hd-geo-test.c                          |   24 +-


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen staging] main loop: Big hammer to fix logfile disk DoS in Xen setups
Message-Id: <E1o1TYz-0007O8-3W@xenbits.xenproject.org>
Date: Wed, 15 Jun 2022 14:00:05 +0000

commit 9a5e4bc76058766962ab3ff13f42c1d39a8e08d3
Author:     Ian Jackson <ian.jackson@eu.citrix.com>
AuthorDate: Thu May 26 16:21:56 2016 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Wed Jun 15 14:38:48 2022 +0100

    main loop: Big hammer to fix logfile disk DoS in Xen setups
    
    Each time round the main loop, we now fstat stderr.  If it is too big,
    we dup2 /dev/null onto it.  This is not a very pretty patch but it is
    very simple, easy to see that it's correct, and has a low risk of
    collateral damage.
    
    There is no limit by default but can be adjusted by setting a new
    environment variable.
    
    This fixes CVE-2014-3672.
    
    Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
    Tested-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
    
    Set the default to 0 so that it won't affect non-xen installation. The
    limit will be set by Xen toolstack.
    
    Signed-off-by: Wei Liu <wei.liu2@citrix.com>
    Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
    (cherry picked from commit 44a072f0de0d57c95c2212bbce02888832b7b74f)
    (cherry picked from commit 269381bb635692856aa8789a3f322e543e0c648d)
---
 util/main-loop.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/util/main-loop.c b/util/main-loop.c
index b7b0ce4ca0..214b7153e3 100644
--- a/util/main-loop.c
+++ b/util/main-loop.c
@@ -184,6 +184,50 @@ int qemu_init_main_loop(Error **errp)
     return 0;
 }
 
+static void check_cve_2014_3672_xen(void)
+{
+    static unsigned long limit = ~0UL;
+    const int fd = 2;
+    struct stat stab;
+
+    if (limit == ~0UL) {
+        const char *s = getenv("XEN_QEMU_CONSOLE_LIMIT");
+        /* XEN_QEMU_CONSOLE_LIMIT=0 means no limit */
+        limit = s ? strtoul(s,0,0) : 0;
+    }
+    if (limit == 0)
+        return;
+
+    int r = fstat(fd, &stab);
+    if (r) {
+        perror("fstat stderr (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    if (!S_ISREG(stab.st_mode))
+        return;
+    if (stab.st_size <= limit)
+        return;
+
+    /* oh dear */
+    fprintf(stderr,"\r\n"
+            "Closing stderr due to CVE-2014-3672 limit. "
+            " Set XEN_QEMU_CONSOLE_LIMIT to number of bytes to override,"
+            " or 0 for no limit.\n");
+    fflush(stderr);
+
+    int nfd = open("/dev/null", O_WRONLY);
+    if (nfd < 0) {
+        perror("open /dev/null (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    r = dup2(nfd, fd);
+    if (r != fd) {
+        perror("dup2 /dev/null (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    close(nfd);
+}
+
 static int max_priority;
 
 #ifndef _WIN32
@@ -242,6 +286,8 @@ static int os_host_main_loop_wait(int64_t timeout)
 
     g_main_context_acquire(context);
 
+    check_cve_2014_3672_xen();
+
     glib_pollfds_fill(&timeout);
 
     qemu_mutex_unlock_iothread();
@@ -414,6 +460,8 @@ static int os_host_main_loop_wait(int64_t timeout)
 
     g_main_context_acquire(context);
 
+    check_cve_2014_3672_xen();
+
     /* XXX: need to suppress polling by better using win32 events */
     ret = 0;
     for (pe = first_polling_entry; pe != NULL; pe = pe->next) {
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Thu Jun 16 00:17:22 2022
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen master] Merge tag 'v7.0.0' into 'staging'
Message-Id: <E1o1dCF-0006Ix-KD@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:17:15 +0000

=== This changeset includes merge from high-traffic branch ===
Commits on that branch are not reported individually.

commit d10fec9f7ac61de6ef1fb494d0f99309fce46a97
Merge: 823a3f11fb8f04c3c3cc0f95f968fef1bfc6534f a68d6d311c2d1fd9d2fa9a0768ea2353e8a79b42
Author:     Anthony PERARD <anthony.perard@gmail.com>
AuthorDate: Wed Jun 15 14:38:25 2022 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Wed Jun 15 14:38:25 2022 +0100

    Merge tag 'v7.0.0' into 'staging'
 .cirrus.yml                                        |    1 -
 .gitattributes                                     |    1 +
 .github/lockdown.yml                               |   34 -
 .github/workflows/lockdown.yml                     |   30 +
 .gitignore                                         |    1 +
 .gitlab-ci.d/buildtest-template.yml                |    2 +-
 .gitlab-ci.d/buildtest.yml                         |  217 +-
 .gitlab-ci.d/cirrus.yml                            |   46 +-
 .gitlab-ci.d/cirrus/build.yml                      |    1 +
 .gitlab-ci.d/cirrus/freebsd-12.vars                |   11 +-
 .gitlab-ci.d/cirrus/freebsd-13.vars                |   11 +-
 .gitlab-ci.d/cirrus/kvm-build.yml                  |   31 +
 .gitlab-ci.d/cirrus/macos-11.vars                  |   11 +-
 .gitlab-ci.d/container-cross.yml                   |   23 +-
 .gitlab-ci.d/containers.yml                        |    5 -
 .gitlab-ci.d/crossbuild-template.yml               |    2 +-
 .gitlab-ci.d/crossbuilds.yml                       |   19 +
 .gitlab-ci.d/custom-runners.yml                    |  228 +-
 .../custom-runners/centos-stream-8-x86_64.yml      |   28 +
 .../custom-runners/ubuntu-20.04-aarch32.yml        |   23 +
 .../custom-runners/ubuntu-20.04-aarch64.yml        |  118 +
 .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml |  130 +
 .gitlab-ci.d/edk2.yml                              |    6 +-
 .gitlab-ci.d/edk2/Dockerfile                       |    6 +-
 .gitlab-ci.d/opensbi.yml                           |    2 -
 .gitlab-ci.d/qemu-project.yml                      |    1 +
 .gitlab-ci.d/static_checks.yml                     |    4 +-
 .gitlab-ci.d/windows.yml                           |   96 +
 .gitmodules                                        |    3 +
 .mailmap                                           |   15 +-
 .travis.yml                                        |   41 +-
 Kconfig.host                                       |    4 +
 MAINTAINERS                                        |  514 ++-
 Makefile                                           |   32 +-
 README.rst                                         |   14 +-
 VERSION                                            |    2 +-
 accel/hvf/hvf-accel-ops.c                          |   31 +-
 accel/kvm/kvm-accel-ops.c                          |   12 +
 accel/kvm/kvm-all.c                                |   58 +-
 accel/kvm/meson.build                              |    1 -
 accel/kvm/sev-stub.c                               |   22 -
 accel/meson.build                                  |   12 +-
 accel/qtest/qtest.c                                |    1 -
 accel/stubs/hax-stub.c                             |    2 +
 accel/stubs/kvm-stub.c                             |   12 +-
 accel/stubs/meson.build                            |   11 +-
 accel/tcg/atomic_common.c.inc                      |   45 +-
 accel/tcg/atomic_template.h                        |   61 +-
 accel/tcg/cpu-exec.c                               |  138 +-
 accel/tcg/cputlb.c                                 |  495 +--
 accel/tcg/hmp.c                                    |   22 +-
 accel/tcg/ldst_common.c.inc                        |  307 ++
 accel/tcg/meson.build                              |    2 +-
 accel/tcg/plugin-gen.c                             |  196 +-
 accel/tcg/tcg-accel-ops-icount.c                   |    1 +
 accel/tcg/tcg-accel-ops-mttcg.c                    |    3 +-
 accel/tcg/tcg-accel-ops-rr.c                       |    7 +-
 accel/tcg/tcg-accel-ops.c                          |    1 +
 accel/tcg/translate-all.c                          |  148 +-
 accel/tcg/translator.c                             |   39 +
 accel/tcg/user-exec.c                              | 1177 ++-----
 audio/alsaaudio.c                                  |    5 +-
 audio/audio.c                                      |  224 +-
 audio/audio.h                                      |    4 +-
 audio/audio_int.h                                  |   27 +-
 audio/audio_legacy.c                               |    6 +-
 audio/audio_template.h                             |   29 +-
 audio/coreaudio.c                                  |  681 ----
 audio/coreaudio.m                                  |  687 ++++
 audio/dbusaudio.c                                  |  654 ++++
 audio/dsoundaudio.c                                |   43 +-
 audio/jackaudio.c                                  |   15 +-
 audio/meson.build                                  |   29 +-
 audio/mixeng.c                                     |    8 +-
 audio/noaudio.c                                    |    1 +
 audio/ossaudio.c                                   |   21 +-
 audio/paaudio.c                                    |   55 +-
 audio/sdlaudio.c                                   |   23 +-
 audio/trace-events                                 |    5 +
 audio/wavaudio.c                                   |    1 +
 backends/cryptodev.c                               |    2 +-
 backends/dbus-vmstate1.xml                         |   52 +
 backends/hostmem-epc.c                             |   82 +
 backends/hostmem-file.c                            |    1 +
 backends/hostmem.c                                 |    1 +
 backends/meson.build                               |    1 +
 backends/tpm/meson.build                           |   14 +-
 backends/tpm/tpm_emulator.c                        |    5 +-
 backends/tpm/tpm_passthrough.c                     |    2 +-
 block.c                                            |  773 ++++-
 block/aio_task.c                                   |    2 +
 block/amend.c                                      |   28 +
 block/backup-top.c                                 |  253 --
 block/backup-top.h                                 |   42 -
 block/backup.c                                     |  124 +-
 block/blkdebug.c                                   |   12 +-
 block/blklogwrites.c                               |   16 +-
 block/blkreplay.c                                  |    8 +-
 block/blkverify.c                                  |   11 +-
 block/block-backend.c                              |  431 ++-
 block/block-copy.c                                 |  277 +-
 block/bochs.c                                      |    4 +-
 block/cloop.c                                      |    4 +-
 block/commit.c                                     |    8 +-
 block/copy-before-write.c                          |  514 +++
 block/copy-before-write.h                          |   46 +
 block/copy-on-read.c                               |   19 +-
 block/coroutines.h                                 |   84 +-
 block/create.c                                     |    2 +
 block/crypto.c                                     |   77 +-
 block/curl.c                                       |  106 +-
 block/dirty-bitmap.c                               |   20 +-
 block/dmg.c                                        |    5 +-
 block/export/export.c                              |    2 +-
 block/export/fuse.c                                |   82 +-
 block/export/vhost-user-blk-server.c               |    5 +
 block/file-posix.c                                 |  130 +-
 block/file-win32.c                                 |  109 +-
 block/filter-compress.c                            |   15 +-
 block/gluster.c                                    |   36 +-
 block/io.c                                         |  268 +-
 block/io_uring.c                                   |   19 +-
 block/iscsi.c                                      |   65 +-
 block/linux-aio.c                                  |   54 +-
 block/meson.build                                  |   65 +-
 block/mirror.c                                     |  116 +-
 block/monitor/bitmap-qmp-cmds.c                    |   11 +-
 block/monitor/block-hmp-cmds.c                     |   14 +-
 block/nbd.c                                        |  552 ++-
 block/nfs.c                                        |   18 +-
 block/null.c                                       |   18 +-
 block/nvme.c                                       |  156 +-
 block/parallels-ext.c                              |    3 +-
 block/parallels.c                                  |    3 +-
 block/preallocate.c                                |   29 +-
 block/qcow.c                                       |   17 +-
 block/qcow2-cache.c                                |    1 +
 block/qcow2-cluster.c                              |   94 +-
 block/qcow2-refcount.c                             |  347 +-
 block/qcow2-snapshot.c                             |    1 +
 block/qcow2.c                                      |  142 +-
 block/qcow2.h                                      |    9 +-
 block/qed-l2-cache.c                               |    1 +
 block/qed-table.c                                  |    1 +
 block/qed.c                                        |   10 +-
 block/quorum.c                                     |   12 +-
 block/raw-format.c                                 |   58 +-
 block/rbd.c                                        |  196 +-
 block/replication.c                                |    4 +-
 block/reqlist.c                                    |   85 +
 block/snapshot-access.c                            |  132 +
 block/snapshot.c                                   |   28 +
 block/ssh.c                                        |   50 +-
 block/stream.c                                     |   48 +-
 block/throttle.c                                   |   18 +-
 block/trace-events                                 |   18 +-
 block/vdi.c                                        |    9 +-
 block/vhdx-log.c                                   |    1 +
 block/vhdx.c                                       |    1 +
 block/vmdk.c                                       |   39 +-
 block/vpc.c                                        |   12 +-
 block/vvfat.c                                      |   61 +-
 block/win32-aio.c                                  |    5 +-
 blockdev-nbd.c                                     |    6 -
 blockdev.c                                         |   85 +-
 blockjob.c                                         |   52 +-
 bsd-user/arm/signal.c                              |  221 ++
 bsd-user/arm/target.h                              |   21 +
 bsd-user/arm/target_arch.h                         |   28 +
 bsd-user/arm/target_arch_cpu.c                     |   39 +
 bsd-user/arm/target_arch_cpu.h                     |  213 ++
 bsd-user/arm/target_arch_elf.h                     |  128 +
 bsd-user/arm/target_arch_reg.h                     |   60 +
 bsd-user/arm/target_arch_signal.h                  |   88 +
 bsd-user/arm/target_arch_sigtramp.h                |   49 +
 bsd-user/arm/target_arch_sysarch.h                 |    6 +-
 bsd-user/arm/target_arch_thread.h                  |   80 +
 bsd-user/arm/target_arch_vmparam.h                 |   48 +
 bsd-user/arm/target_syscall.h                      |   27 +-
 bsd-user/bsd-file.h                                |   30 +
 bsd-user/bsd-mman.h                                |  121 -
 bsd-user/bsdload.c                                 |  104 +-
 bsd-user/elfcore.c                                 |   10 +
 bsd-user/elfload.c                                 | 1469 ++------
 bsd-user/errno_defs.h                              |   17 +-
 bsd-user/freebsd/host-os.h                         |   25 +
 bsd-user/freebsd/meson.build                       |    4 +
 bsd-user/freebsd/os-sys.c                          |   27 +
 bsd-user/freebsd/os-syscall.c                      |   92 +
 bsd-user/freebsd/strace.list                       |   11 -
 bsd-user/freebsd/target_os_elf.h                   |  137 +
 bsd-user/freebsd/target_os_siginfo.h               |  158 +
 bsd-user/freebsd/target_os_signal.h                |   81 +
 bsd-user/freebsd/target_os_stack.h                 |  181 +
 bsd-user/freebsd/target_os_thread.h                |   25 +
 bsd-user/freebsd/target_os_ucontext.h              |   44 +
 bsd-user/freebsd/target_os_user.h                  |  329 ++
 bsd-user/freebsd/target_os_vmparam.h               |   38 +
 bsd-user/host/arm/host-signal.h                    |   35 +
 bsd-user/host/i386/host-signal.h                   |   37 +
 bsd-user/host/x86_64/host-signal.h                 |   37 +
 bsd-user/i386/signal.c                             |   68 +
 bsd-user/i386/target.h                             |   21 +
 bsd-user/i386/target_arch.h                        |   31 +
 bsd-user/i386/target_arch_cpu.c                    |   71 +
 bsd-user/i386/target_arch_cpu.h                    |  198 ++
 bsd-user/i386/target_arch_elf.h                    |   35 +
 bsd-user/i386/target_arch_reg.h                    |   82 +
 bsd-user/i386/target_arch_signal.h                 |   91 +
 bsd-user/i386/target_arch_sigtramp.h               |   29 +
 bsd-user/i386/target_arch_thread.h                 |   47 +
 bsd-user/i386/target_arch_vmparam.h                |   46 +
 bsd-user/include/special-errno.h                   |   24 +
 bsd-user/main.c                                    |  864 ++---
 bsd-user/meson.build                               |   14 +-
 bsd-user/mips/target_arch_sysarch.h                |   69 -
 bsd-user/mips/target_syscall.h                     |   52 -
 bsd-user/mips64/target_arch_sysarch.h              |   69 -
 bsd-user/mips64/target_syscall.h                   |   53 -
 bsd-user/mmap.c                                    |  546 ++-
 bsd-user/netbsd/host-os.h                          |   25 +
 bsd-user/netbsd/target_os_elf.h                    |  146 +
 bsd-user/netbsd/target_os_siginfo.h                |   82 +
 bsd-user/netbsd/target_os_signal.h                 |   69 +
 bsd-user/netbsd/target_os_stack.h                  |   56 +
 bsd-user/netbsd/target_os_thread.h                 |   25 +
 bsd-user/openbsd/host-os.h                         |   25 +
 bsd-user/openbsd/target_os_elf.h                   |  146 +
 bsd-user/openbsd/target_os_siginfo.h               |   82 +
 bsd-user/openbsd/target_os_signal.h                |   69 +
 bsd-user/openbsd/target_os_stack.h                 |   56 +
 bsd-user/openbsd/target_os_thread.h                |   25 +
 bsd-user/qemu.h                                    |  162 +-
 bsd-user/signal-common.h                           |   75 +
 bsd-user/signal.c                                  | 1026 +++++-
 bsd-user/sparc/target_arch_sysarch.h               |   52 -
 bsd-user/sparc/target_syscall.h                    |   36 -
 bsd-user/sparc64/target_arch_sysarch.h             |   52 -
 bsd-user/sparc64/target_syscall.h                  |   37 -
 bsd-user/strace.c                                  |   97 +
 bsd-user/syscall.c                                 |  577 ----
 bsd-user/syscall_defs.h                            |  303 +-
 bsd-user/trace-events                              |   11 +
 bsd-user/trace.h                                   |    1 +
 bsd-user/x86_64/signal.c                           |   68 +
 bsd-user/x86_64/target.h                           |   21 +
 bsd-user/x86_64/target_arch.h                      |   31 +
 bsd-user/x86_64/target_arch_cpu.c                  |   71 +
 bsd-user/x86_64/target_arch_cpu.h                  |  177 +
 bsd-user/x86_64/target_arch_elf.h                  |   35 +
 bsd-user/x86_64/target_arch_reg.h                  |   92 +
 bsd-user/x86_64/target_arch_signal.h               |   99 +
 bsd-user/x86_64/target_arch_sigtramp.h             |   29 +
 bsd-user/x86_64/target_arch_thread.h               |   38 +
 bsd-user/x86_64/target_arch_vmparam.h              |   46 +
 chardev/char-mux.c                                 |    9 +-
 chardev/char-socket.c                              |   95 +-
 chardev/char-udp.c                                 |    4 +-
 chardev/char.c                                     |    7 +-
 chardev/meson.build                                |    2 +-
 common-user/host/aarch64/safe-syscall.inc.S        |   88 +
 common-user/host/arm/safe-syscall.inc.S            |  108 +
 common-user/host/i386/safe-syscall.inc.S           |  127 +
 common-user/host/loongarch64/safe-syscall.inc.S    |   90 +
 common-user/host/mips/safe-syscall.inc.S           |  149 +
 common-user/host/ppc64/safe-syscall.inc.S          |   94 +
 common-user/host/riscv/safe-syscall.inc.S          |   79 +
 common-user/host/s390x/safe-syscall.inc.S          |   98 +
 common-user/host/sparc64/safe-syscall.inc.S        |   90 +
 common-user/host/x86_64/safe-syscall.inc.S         |  106 +
 common-user/meson.build                            |    6 +
 common-user/safe-syscall-error.c                   |   25 +
 common-user/safe-syscall.S                         |   27 +
 configs/devices/i386-softmmu/default.mak           |    1 +
 configs/devices/mips-softmmu/common.mak            |    7 +-
 configs/targets/aarch64-linux-user.mak             |    2 +-
 configs/targets/aarch64-softmmu.mak                |    2 +-
 configs/targets/aarch64_be-linux-user.mak          |    2 +-
 configs/targets/arm-bsd-user.mak                   |    2 +
 configs/targets/arm-linux-user.mak                 |    2 +-
 configs/targets/arm-softmmu.mak                    |    2 +-
 configs/targets/armeb-linux-user.mak               |    2 +-
 configs/targets/i386-softmmu.mak                   |    1 +
 configs/targets/or1k-softmmu.mak                   |    1 +
 configs/targets/ppc64abi32-linux-user.mak          |    8 -
 configs/targets/x86_64-softmmu.mak                 |    1 +
 configure                                          | 2839 +++------------
 contrib/elf2dmp/download.c                         |   22 +-
 contrib/elf2dmp/meson.build                        |    2 +-
 contrib/elf2dmp/pdb.c                              |    4 +
 contrib/gitdm/aliases                              |    4 +-
 contrib/ivshmem-client/meson.build                 |    2 +-
 contrib/ivshmem-server/meson.build                 |    2 +-
 contrib/plugins/Makefile                           |    1 +
 contrib/plugins/cache.c                            |  378 +-
 contrib/plugins/drcov.c                            |  163 +
 contrib/plugins/hotblocks.c                        |   14 +-
 contrib/plugins/hotpages.c                         |   30 +-
 contrib/plugins/howvec.c                           |   27 +-
 contrib/plugins/hwprofile.c                        |   39 +-
 contrib/plugins/lockstep.c                         |   31 +-
 contrib/rdmacm-mux/meson.build                     |    2 +-
 contrib/vhost-user-gpu/meson.build                 |    4 +-
 contrib/vhost-user-gpu/vhost-user-gpu.c            |    2 +-
 cpu.c                                              |   73 +-
 cpus-common.c                                      |    4 +-
 crypto/cipher-afalg.c                              |    4 +-
 crypto/hash-afalg.c                                |    4 +-
 crypto/meson.build                                 |    6 +-
 crypto/tlssession.c                                |    6 +
 disas/nios2.c                                      |   73 +-
 disas/riscv.c                                      |  162 +-
 docs/COLO-FT.txt                                   |  106 +-
 docs/about/build-platforms.rst                     |   35 +
 docs/about/deprecated.rst                          |  228 +-
 docs/about/index.rst                               |    3 +-
 docs/about/removed-features.rst                    |  205 +-
 docs/amd-memory-encryption.txt                     |  148 -
 docs/block-replication.txt                         |   58 +-
 docs/can.txt                                       |  198 --
 docs/conf.py                                       |   22 +-
 docs/confidential-guest-support.txt                |   49 -
 docs/devel/build-system.rst                        |  174 +-
 docs/devel/ci-definitions.rst.inc                  |  121 +
 docs/devel/ci-jobs.rst.inc                         |   65 +
 docs/devel/ci-runners.rst.inc                      |  117 +
 docs/devel/ci.rst                                  |  160 +-
 docs/devel/clocks.rst                              |   23 +
 docs/devel/code-of-conduct.rst                     |    4 +-
 docs/devel/fuzzing.rst                             |    9 +-
 docs/devel/index-api.rst                           |   15 +
 docs/devel/index-build.rst                         |   19 +
 docs/devel/index-internals.rst                     |   21 +
 docs/devel/index-process.rst                       |   17 +
 docs/devel/index-tcg.rst                           |   16 +
 docs/devel/index.rst                               |   46 +-
 docs/devel/kconfig.rst                             |   10 +-
 docs/devel/loads-stores.rst                        |   52 +-
 docs/devel/memory.rst                              |   14 +-
 docs/devel/migration.rst                           |   12 +-
 docs/devel/modules.rst                             |    2 +-
 docs/devel/multi-process.rst                       |   28 +-
 docs/devel/multi-thread-tcg.rst                    |    2 +-
 docs/devel/qapi-code-gen.rst                       |  253 +-
 docs/devel/qgraph.rst                              |  172 +-
 docs/devel/stable-process.rst                      |    2 +
 docs/devel/style.rst                               |   22 +-
 docs/devel/submitting-a-patch.rst                  |  562 +++
 docs/devel/submitting-a-pull-request.rst           |   77 +
 docs/devel/tcg-icount.rst                          |    3 -
 docs/devel/tcg-plugins.rst                         |  184 +-
 docs/devel/testing.rst                             |  423 ++-
 docs/devel/tracing.rst                             |   87 +-
 docs/devel/trivial-patches.rst                     |   52 +
 docs/devel/ui.rst                                  |    4 +-
 docs/devel/writing-monitor-commands.rst            |  751 ++++
 docs/devel/writing-qmp-commands.rst                |  622 ----
 docs/hyperv.txt                                    |   41 +-
 docs/image-fuzzer.txt                              |    6 +-
 docs/index.rst                                     |    1 +
 docs/interop/bitmaps.rst                           |  285 +-
 docs/interop/dbus-display.rst                      |   31 +
 docs/interop/dbus-vmstate.rst                      |   52 +-
 docs/interop/dbus.rst                              |    2 +
 docs/interop/firmware.json                         |   54 +-
 docs/interop/index.rst                             |    5 +-
 docs/interop/live-block-operations.rst             |   49 +-
 docs/interop/nbd.txt                               |    6 +-
 docs/interop/qcow2.txt                             |    8 +-
 docs/interop/vhost-user.rst                        |   20 +
 docs/interop/virtio-balloon-stats.rst              |  111 +
 docs/meson.build                                   |   22 +-
 docs/multiseat.txt                                 |    2 +-
 docs/nvdimm.txt                                    |    2 +-
 docs/papr-pef.txt                                  |   30 -
 docs/pcie_sriov.txt                                |  115 +
 docs/qemu_logo.pdf                                 |  Bin 9117 -> 0 bytes
 docs/specs/acpi_cpu_hotplug.rst                    |  235 ++
 docs/specs/acpi_cpu_hotplug.txt                    |  160 -
 docs/specs/acpi_erst.rst                           |  200 ++
 docs/specs/acpi_mem_hotplug.rst                    |  128 +
 docs/specs/acpi_mem_hotplug.txt                    |   94 -
 docs/specs/acpi_nvdimm.rst                         |  228 ++
 docs/specs/acpi_nvdimm.txt                         |  188 -
 docs/specs/acpi_pci_hotplug.rst                    |   48 +
 docs/specs/acpi_pci_hotplug.txt                    |   45 -
 docs/specs/index.rst                               |    9 +-
 docs/specs/pci-ids.txt                             |    1 +
 docs/specs/ppc-spapr-hcalls.rst                    |   99 +
 docs/specs/ppc-spapr-hcalls.txt                    |   78 -
 docs/specs/ppc-spapr-hotplug.rst                   |  510 +++
 docs/specs/ppc-spapr-hotplug.txt                   |  409 ---
 docs/specs/ppc-spapr-uv-hcalls.rst                 |   89 +
 docs/specs/ppc-spapr-uv-hcalls.txt                 |   76 -
 docs/specs/sev-guest-firmware.rst                  |  125 +
 docs/sphinx-static/custom.js                       |    9 +
 docs/sphinx/dbusdoc.py                             |  166 +
 docs/sphinx/dbusdomain.py                          |  406 +++
 docs/sphinx/dbusparser.py                          |  373 ++
 docs/sphinx/depfile.py                             |   19 +-
 docs/sphinx/fakedbusdoc.py                         |   25 +
 docs/sphinx/qapidoc.py                             |   22 +-
 docs/system/arm/aspeed.rst                         |   25 +-
 docs/system/arm/cpu-features.rst                   |    4 -
 docs/system/arm/emulation.rst                      |    3 +
 docs/system/arm/nuvoton.rst                        |    2 +
 docs/system/arm/orangepi.rst                       |   10 +-
 docs/system/arm/virt.rst                           |    9 +
 docs/system/arm/xlnx-versal-virt.rst               |   49 +
 docs/system/authz.rst                              |   26 +-
 docs/system/confidential-guest-support.rst         |   44 +
 docs/system/cpu-models-x86.rst.inc                 |    6 +-
 docs/system/device-emulation.rst                   |    2 +
 docs/system/device-url-syntax.rst.inc              |    2 +-
 docs/system/devices/can.rst                        |  188 +
 docs/system/devices/nvme.rst                       |   26 +-
 docs/system/devices/vhost-user-rng.rst             |   39 +
 docs/system/gdb.rst                                |   28 +-
 docs/system/guest-loader.rst                       |    2 +-
 docs/system/i386/amd-memory-encryption.rst         |  206 ++
 docs/system/i386/cpu.rst                           |    1 +
 docs/system/i386/kvm-pv.rst                        |  100 +
 docs/system/i386/sgx.rst                           |  188 +
 docs/system/images.rst                             |    2 +-
 docs/system/index.rst                              |    4 +-
 docs/system/multi-process.rst                      |    2 +-
 docs/system/ppc/powernv.rst                        |   69 +-
 docs/system/ppc/ppce500.rst                        |    2 +-
 docs/system/ppc/pseries.rst                        |  263 +-
 docs/system/qemu-block-drivers.rst                 |    4 +
 docs/system/qemu-block-drivers.rst.inc             |   36 +-
 docs/system/qemu-cpu-models.rst                    |   10 +-
 docs/system/qemu-manpage.rst                       |   10 +-
 docs/system/riscv/shakti-c.rst                     |    2 +-
 docs/system/riscv/sifive_u.rst                     |   50 +-
 docs/system/riscv/virt.rst                         |   32 +-
 docs/system/target-i386.rst                        |   11 +-
 docs/system/tls.rst                                |    2 +-
 docs/throttle.txt                                  |    8 +-
 docs/tools/index.rst                               |    3 +-
 docs/tools/qemu-img.rst                            |   25 +-
 docs/tools/qemu-nbd.rst                            |   28 +-
 docs/tools/qemu-pr-helper.rst                      |    1 +
 docs/tools/qemu-storage-daemon.rst                 |   26 +-
 docs/tools/qemu-trace-stap.rst                     |   25 +-
 docs/tools/virtiofsd.rst                           |   42 +-
 docs/u2f.txt                                       |    2 +-
 docs/user/index.rst                                |    3 +-
 docs/user/main.rst                                 |    1 -
 docs/virtio-balloon-stats.txt                      |  109 -
 dtc                                                |    2 +-
 dump/dump.c                                        |   31 +-
 ebpf/meson.build                                   |    2 +-
 fpu/softfloat-parts.c.inc                          |   82 +-
 fpu/softfloat-specialize.c.inc                     |   13 +-
 fpu/softfloat.c                                    |  133 +-
 fsdev/9p-marshal.c                                 |    4 +-
 fsdev/9p-marshal.h                                 |    3 +
 fsdev/file-op-9p.h                                 |   11 +-
 fsdev/meson.build                                  |    1 +
 fsdev/p9array.h                                    |  164 +
 fsdev/virtfs-proxy-helper.c                        |    2 +-
 gdb-xml/arm-m-profile-mve.xml                      |   19 +
 gdb-xml/arm-neon.xml                               |    2 -
 gdb-xml/arm-vfp-sysregs.xml                        |   17 +
 gdb-xml/arm-vfp.xml                                |    2 -
 gdb-xml/arm-vfp3.xml                               |    2 -
 gdbstub.c                                          |  101 +-
 hmp-commands-info.hx                               |   61 +-
 hmp-commands.hx                                    |   41 +-
 hw/9pfs/9p-local.c                                 |   27 +-
 hw/9pfs/9p-proxy.c                                 |   40 +-
 hw/9pfs/9p-synth.c                                 |   28 +-
 hw/9pfs/9p-synth.h                                 |    5 +
 hw/9pfs/9p-util-darwin.c                           |   97 +
 hw/9pfs/9p-util-linux.c                            |   70 +
 hw/9pfs/9p-util.c                                  |   64 -
 hw/9pfs/9p-util.h                                  |   78 +
 hw/9pfs/9p.c                                       |  213 +-
 hw/9pfs/9p.h                                       |   12 +-
 hw/9pfs/codir.c                                    |   43 +-
 hw/9pfs/coth.h                                     |    4 +-
 hw/9pfs/meson.build                                |    3 +-
 hw/Kconfig                                         |    2 +
 hw/acpi/Kconfig                                    |   20 +
 hw/acpi/acpi-cpu-hotplug-stub.c                    |   50 +
 hw/acpi/acpi-mem-hotplug-stub.c                    |   35 +
 hw/acpi/acpi-nvdimm-stub.c                         |    8 +
 hw/acpi/acpi-pci-hotplug-stub.c                    |   43 +
 hw/acpi/acpi-x86-stub.c                            |    3 +-
 hw/acpi/aml-build.c                                |  334 +-
 hw/acpi/core.c                                     |    4 +-
 hw/acpi/cpu.c                                      |   19 +-
 hw/acpi/erst.c                                     | 1046 ++++++
 hw/acpi/ghes.c                                     |   10 +-
 hw/acpi/hmat.c                                     |   16 +-
 hw/acpi/ich9.c                                     |   23 +-
 hw/acpi/memory_hotplug.c                           |   14 +-
 hw/acpi/meson.build                                |   20 +-
 hw/acpi/nvdimm.c                                   |   76 +-
 hw/acpi/pci.c                                      |   18 +-
 hw/acpi/pcihp.c                                    |   66 +-
 hw/acpi/piix4.c                                    |   21 +-
 hw/acpi/tco.c                                      |    1 -
 hw/acpi/trace-events                               |   15 +
 hw/acpi/viot.c                                     |  114 +
 hw/acpi/viot.h                                     |   13 +
 hw/acpi/vmgenid.c                                  |   13 +-
 hw/adc/aspeed_adc.c                                |  427 +++
 hw/adc/meson.build                                 |    1 +
 hw/adc/trace-events                                |    3 +
 hw/arm/Kconfig                                     |   22 +-
 hw/arm/allwinner-h3.c                              |    9 +-
 hw/arm/armsse.c                                    |   20 +-
 hw/arm/armv7m.c                                    |  278 +-
 hw/arm/aspeed.c                                    |  480 ++-
 hw/arm/aspeed_ast2600.c                            |   73 +-
 hw/arm/aspeed_soc.c                                |   25 +-
 hw/arm/boot.c                                      |  132 +-
 hw/arm/cubieboard.c                                |    2 +-
 hw/arm/digic_boards.c                              |    1 -
 hw/arm/exynos4210.c                                |    3 +
 hw/arm/exynos4_boards.c                            |    1 -
 hw/arm/fsl-imx6ul.c                                |   14 +-
 hw/arm/fsl-imx7.c                                  |   15 +-
 hw/arm/highbank.c                                  |   73 +-
 hw/arm/imx25_pdk.c                                 |    5 +-
 hw/arm/integratorcp.c                              |    2 +-
 hw/arm/kzm.c                                       |    1 -
 hw/arm/mcimx6ul-evk.c                              |    4 +-
 hw/arm/mcimx7d-sabre.c                             |    4 +-
 hw/arm/mps2-tz.c                                   |   98 +-
 hw/arm/mps2.c                                      |   29 +-
 hw/arm/msf2-soc.c                                  |   68 +-
 hw/arm/msf2-som.c                                  |    9 +-
 hw/arm/musicpal.c                                  |  380 +-
 hw/arm/netduino2.c                                 |   12 +-
 hw/arm/netduinoplus2.c                             |   12 +-
 hw/arm/npcm7xx.c                                   |   15 +-
 hw/arm/npcm7xx_boards.c                            |  122 +-
 hw/arm/nrf51_soc.c                                 |   20 +-
 hw/arm/nseries.c                                   |    1 +
 hw/arm/omap1.c                                     |    3 +-
 hw/arm/orangepi.c                                  |    7 +-
 hw/arm/pxa2xx.c                                    |    2 +-
 hw/arm/raspi.c                                     |    7 +-
 hw/arm/realview.c                                  |    3 +-
 hw/arm/sabrelite.c                                 |    5 +-
 hw/arm/sbsa-ref.c                                  |   10 +-
 hw/arm/smmu-common.c                               |    3 +-
 hw/arm/smmuv3.c                                    |   20 +-
 hw/arm/stellaris.c                                 |  411 +--
 hw/arm/stm32f100_soc.c                             |   47 +-
 hw/arm/stm32f205_soc.c                             |   47 +-
 hw/arm/stm32f405_soc.c                             |   31 +-
 hw/arm/stm32vldiscovery.c                          |   13 +-
 hw/arm/strongarm.c                                 |    2 +-
 hw/arm/versatilepb.c                               |    4 +-
 hw/arm/vexpress.c                                  |    8 +-
 hw/arm/virt-acpi-build.c                           |  674 ++--
 hw/arm/virt.c                                      |  392 ++-
 hw/arm/xilinx_zynq.c                               |   20 +-
 hw/arm/xlnx-versal-virt.c                          |  129 +-
 hw/arm/xlnx-versal.c                               |  254 +-
 hw/arm/xlnx-zcu102.c                               |   37 +-
 hw/arm/xlnx-zynqmp.c                               |  200 +-
 hw/audio/Kconfig                                   |    3 -
 hw/audio/cs4231a.c                                 |    2 +-
 hw/audio/gus.c                                     |    2 +-
 hw/audio/intel-hda.c                               |   24 +-
 hw/audio/pcspk.c                                   |    1 -
 hw/audio/sb16.c                                    |    2 +-
 hw/avr/atmega.c                                    |    2 +-
 hw/block/block.c                                   |    3 +-
 hw/block/dataplane/virtio-blk.c                    |   16 +-
 hw/block/dataplane/xen-block.c                     |    1 +
 hw/block/fdc-isa.c                                 |   13 +-
 hw/block/fdc.c                                     |    3 +-
 hw/block/m25p80.c                                  |    3 +
 hw/block/pflash_cfi01.c                            |    2 +-
 hw/block/swim.c                                    |    3 +-
 hw/block/vhost-user-blk.c                          |    5 +-
 hw/block/virtio-blk.c                              |   19 +-
 hw/char/Kconfig                                    |    3 +
 hw/char/cadence_uart.c                             |   61 +-
 hw/char/escc.c                                     |  288 +-
 hw/char/exynos4210_uart.c                          |    2 +-
 hw/char/goldfish_tty.c                             |    2 +-
 hw/char/ibex_uart.c                                |    1 +
 hw/char/mchp_pfsoc_mmuart.c                        |  116 +-
 hw/char/meson.build                                |    2 +-
 hw/char/parallel.c                                 |    4 +-
 hw/char/pl011.c                                    |    6 +
 hw/char/riscv_htif.c                               |   35 +-
 hw/char/serial-isa.c                               |    2 +-
 hw/char/sh_serial.c                                |  236 +-
 hw/char/shakti_uart.c                              |    1 +
 hw/char/sifive_uart.c                              |    1 +
 hw/char/stm32f2xx_usart.c                          |    3 +-
 hw/char/trace-events                               |    6 +
 hw/char/virtio-serial-bus.c                        |   10 +-
 hw/core/bus.c                                      |   13 +-
 hw/core/clock-vmstate.c                            |   41 +-
 hw/core/clock.c                                    |   31 +-
 hw/core/cpu-common.c                               |   17 +-
 hw/core/generic-loader.c                           |    7 +-
 hw/core/gpio.c                                     |  198 ++
 hw/core/guest-loader.c                             |    2 +-
 hw/core/hotplug-stubs.c                            |   34 +
 hw/core/irq.c                                      |    2 +-
 hw/core/loader.c                                   |  224 +-
 hw/core/machine-hmp-cmds.c                         |   38 +-
 hw/core/machine-qmp-cmds.c                         |   40 +
 hw/core/machine-smp.c                              |  195 ++
 hw/core/machine.c                                  |  155 +-
 hw/core/meson.build                                |   35 +-
 hw/core/numa.c                                     |    6 +
 hw/core/ptimer.c                                   |    1 -
 hw/core/qdev-hotplug.c                             |   73 +
 hw/core/qdev-properties-system.c                   |   49 +-
 hw/core/qdev-properties.c                          |    6 +-
 hw/core/qdev.c                                     |  245 +-
 hw/core/register.c                                 |   12 +
 hw/core/reset.c                                    |    2 +-
 hw/core/sysbus.c                                   |   10 +-
 hw/core/trace-events                               |    1 +
 hw/display/Kconfig                                 |    2 +-
 hw/display/artist.c                                |  463 ++-
 hw/display/ati.c                                   |    4 +-
 hw/display/bcm2835_fb.c                            |    2 +-
 hw/display/cirrus_vga.c                            |   59 +-
 hw/display/cirrus_vga_isa.c                        |    4 +-
 hw/display/edid-generate.c                         |   73 +-
 hw/display/i2c-ddc.c                               |    2 +-
 hw/display/macfb.c                                 |  433 ++-
 hw/display/meson.build                             |    5 +-
 hw/display/omap_dss.c                              |    1 +
 hw/display/pxa2xx_lcd.c                            |    2 +-
 hw/display/qxl-render.c                            |    9 +-
 hw/display/qxl.c                                   |   27 +-
 hw/display/qxl.h                                   |    2 +-
 hw/display/tc6393xb.c                              |    2 +-
 hw/display/trace-events                            |   18 +-
 hw/display/vga-isa-mm.c                            |  114 -
 hw/display/vga-isa.c                               |    5 +-
 hw/display/vga-mmio.c                              |  142 +
 hw/display/vga-pci.c                               |    8 +-
 hw/display/vga.c                                   |   17 +-
 hw/display/vga_int.h                               |    2 +-
 hw/display/vhost-user-gpu.c                        |    2 +-
 hw/display/virtio-gpu-base.c                       |    5 +-
 hw/display/virtio-gpu-udmabuf-stubs.c              |   28 +
 hw/display/virtio-gpu-udmabuf.c                    |   25 +-
 hw/display/virtio-gpu-virgl.c                      |    3 +-
 hw/display/virtio-gpu.c                            |   52 +-
 hw/display/virtio-vga.c                            |   17 +-
 hw/display/vmware_vga.c                            |   34 +-
 hw/display/xenfb.c                                 |    4 +-
 hw/display/xlnx_dp.c                               |    6 +-
 hw/dma/bcm2835_dma.c                               |    2 +-
 hw/dma/pl330.c                                     |   30 +-
 hw/dma/rc4030.c                                    |    4 +-
 hw/dma/sifive_pdma.c                               |  240 +-
 hw/dma/sparc32_dma.c                               |   16 +-
 hw/dma/xlnx-zdma.c                                 |   25 +-
 hw/dma/xlnx-zynq-devcfg.c                          |    6 +-
 hw/dma/xlnx_csu_dma.c                              |   50 +-
 hw/dma/xlnx_dpdma.c                                |   10 +-
 hw/gpio/aspeed_gpio.c                              |  185 +-
 hw/gpio/bcm2835_gpio.c                             |    3 +-
 hw/gpio/imx_gpio.c                                 |    1 -
 hw/gpio/omap_gpio.c                                |    1 +
 hw/hppa/hppa_hardware.h                            |    5 +-
 hw/hppa/machine.c                                  |   35 +-
 hw/hyperv/vmbus.c                                  |   10 +-
 hw/i2c/Kconfig                                     |    5 +
 hw/i2c/aspeed_i2c.c                                |  101 +-
 hw/i2c/core.c                                      |    6 +-
 hw/i2c/i2c_mux_pca954x.c                           |   79 +-
 hw/i2c/pmbus_device.c                              |  112 +-
 hw/i386/Kconfig                                    |    6 +
 hw/i386/acpi-build.c                               |  427 ++-
 hw/i386/acpi-common.c                              |  160 +-
 hw/i386/acpi-microvm.c                             |   34 +-
 hw/i386/amd_iommu.c                                |   70 +-
 hw/i386/fw_cfg.c                                   |   12 +-
 hw/i386/intel_iommu.c                              |   99 +-
 hw/i386/intel_iommu_internal.h                     |    3 +
 hw/i386/kvm/i8254.c                                |    7 +-
 hw/i386/meson.build                                |    4 +-
 hw/i386/microvm-dt.c                               |  348 ++
 hw/i386/microvm-dt.h                               |    8 +
 hw/i386/microvm.c                                  |   12 +-
 hw/i386/multiboot.c                                |   10 +-
 hw/i386/multiboot.h                                |    4 +-
 hw/i386/pc.c                                       |  210 +-
 hw/i386/pc_piix.c                                  |   42 +-
 hw/i386/pc_q35.c                                   |   41 +-
 hw/i386/pc_sysfw.c                                 |    2 +-
 hw/i386/pc_sysfw_ovmf.c                            |   18 +-
 hw/i386/sgx-epc.c                                  |  188 +
 hw/i386/sgx-stub.c                                 |   38 +
 hw/i386/sgx.c                                      |  327 ++
 hw/i386/trace-events                               |    6 +-
 hw/i386/vmmouse.c                                  |    5 +
 hw/i386/x86-iommu-stub.c                           |    5 -
 hw/i386/x86-iommu.c                                |   31 +-
 hw/i386/x86.c                                      |   77 +-
 hw/i386/xen/xen-hvm.c                              |   22 +-
 hw/i386/xen/xen-mapcache.c                         |   22 +-
 hw/ide/ahci.c                                      |   22 +-
 hw/ide/cmd646.c                                    |    2 +-
 hw/ide/core.c                                      |   17 +-
 hw/ide/isa.c                                       |    4 +-
 hw/ide/macio.c                                     |    4 +-
 hw/ide/microdrive.c                                |    2 +-
 hw/ide/mmio.c                                      |    2 +-
 hw/ide/piix.c                                      |    2 +-
 hw/ide/qdev.c                                      |    4 +-
 hw/ide/sii3112.c                                   |    2 +-
 hw/ide/via.c                                       |    9 +-
 hw/input/hid.c                                     |    2 +
 hw/input/lasips2.c                                 |   10 +-
 hw/input/pckbd.c                                   |   28 +-
 hw/input/ps2.c                                     |  275 +-
 hw/input/pxa2xx_keypad.c                           |    2 +-
 hw/input/tsc2005.c                                 |    3 +-
 hw/input/tsc210x.c                                 |    9 +-
 hw/intc/Kconfig                                    |   13 +-
 hw/intc/arm_gic.c                                  |   11 +
 hw/intc/arm_gicv3.c                                |   41 +-
 hw/intc/arm_gicv3_common.c                         |   78 +-
 hw/intc/arm_gicv3_cpuif.c                          |   37 +-
 hw/intc/arm_gicv3_cpuif_common.c                   |   22 +
 hw/intc/arm_gicv3_dist.c                           |  214 +-
 hw/intc/arm_gicv3_its.c                            | 1481 ++++++++
 hw/intc/arm_gicv3_its_common.c                     |    5 +-
 hw/intc/arm_gicv3_its_kvm.c                        |    2 +-
 hw/intc/arm_gicv3_kvm.c                            |   10 +-
 hw/intc/arm_gicv3_redist.c                         |  308 +-
 hw/intc/armv7m_nvic.c                              |  274 +-
 hw/intc/bcm2835_ic.c                               |    2 +-
 hw/intc/bcm2836_control.c                          |    2 +-
 hw/intc/gicv3_internal.h                           |  254 +-
 hw/intc/goldfish_pic.c                             |    2 +-
 hw/intc/i8259_common.c                             |    6 +-
 hw/intc/ibex_plic.c                                |  312 --
 hw/intc/ioapic_common.c                            |    2 +-
 hw/intc/m68k_irqc.c                                |    2 +-
 hw/intc/meson.build                                |   19 +-
 hw/intc/openpic.c                                  |   92 +-
 hw/intc/openpic_kvm.c                              |    1 +
 hw/intc/pnv_xive.c                                 |   58 +-
 hw/intc/pnv_xive2.c                                | 2128 ++++++++++++
 hw/intc/pnv_xive2_regs.h                           |  442 +++
 hw/intc/riscv_aclint.c                             |  460 +++
 hw/intc/riscv_aplic.c                              |  978 ++++++
 hw/intc/riscv_imsic.c                              |  448 +++
 hw/intc/sh_intc.c                                  |  547 ++-
 hw/intc/sifive_clint.c                             |  266 --
 hw/intc/sifive_plic.c                              |  365 +-
 hw/intc/spapr_xive.c                               |   30 +-
 hw/intc/spapr_xive_kvm.c                           |   26 +-
 hw/intc/trace-events                               |   47 +-
 hw/intc/xics.c                                     |    2 +-
 hw/intc/xive.c                                     |  132 +-
 hw/intc/xive2.c                                    | 1019 ++++++
 hw/ipack/ipack.c                                   |   10 +-
 hw/ipack/tpci200.c                                 |    4 +-
 hw/ipmi/ipmi.c                                     |    4 +-
 hw/ipmi/isa_ipmi_bt.c                              |    2 +-
 hw/ipmi/isa_ipmi_kcs.c                             |    2 +-
 hw/isa/isa-bus.c                                   |   39 +-
 hw/isa/lpc_ich9.c                                  |   13 +
 hw/isa/piix4.c                                     |   56 +-
 hw/isa/vt82c686.c                                  |   75 +-
 hw/m68k/q800.c                                     |  252 +-
 hw/m68k/virt.c                                     |   40 +-
 hw/mem/Kconfig                                     |    3 +
 hw/mem/meson.build                                 |    2 +-
 hw/mem/nvdimm.c                                    |   18 +-
 hw/mem/pc-dimm.c                                   |   30 +-
 hw/microblaze/petalogix_ml605_mmu.c                |    2 +-
 hw/mips/Kconfig                                    |    2 +-
 hw/mips/bootloader.c                               |    6 +-
 hw/mips/boston.c                                   |  372 +-
 hw/mips/fuloong2e.c                                |    2 +-
 hw/mips/gt64xxx_pci.c                              |   80 +-
 hw/mips/jazz.c                                     |   10 +-
 hw/mips/malta.c                                    |   10 +-
 hw/mips/mipssim.c                                  |    2 +-
 hw/misc/applesmc.c                                 |    2 +-
 hw/misc/armv7m_ras.c                               |   93 +
 hw/misc/aspeed_i3c.c                               |  384 +++
 hw/misc/aspeed_sbc.c                               |  141 +
 hw/misc/aspeed_scu.c                               |   40 +-
 hw/misc/aspeed_sdmc.c                              |    2 +
 hw/misc/auxbus.c                                   |    2 +-
 hw/misc/bcm2835_mbox.c                             |    3 +-
 hw/misc/bcm2835_powermgt.c                         |    2 +-
 hw/misc/bcm2835_property.c                         |    5 +-
 hw/misc/bcm2835_rng.c                              |    2 +-
 hw/misc/imx6_src.c                                 |    2 +-
 hw/misc/ivshmem.c                                  |   11 +-
 hw/misc/mac_via.c                                  |  637 ++--
 hw/misc/macio/cuda.c                               |   14 +-
 hw/misc/macio/mac_dbdma.c                          |   10 +-
 hw/misc/macio/macio.c                              |    4 +-
 hw/misc/macio/pmu.c                                |   47 +-
 hw/misc/meson.build                                |   11 +-
 hw/misc/mos6522.c                                  |  226 +-
 hw/misc/npcm7xx_clk.c                              |    4 +-
 hw/misc/pca9552.c                                  |    2 +-
 hw/misc/pvpanic-isa.c                              |    6 +-
 hw/misc/pvpanic-pci.c                              |    6 +-
 hw/misc/pvpanic.c                                  |    5 +-
 hw/misc/sga.c                                      |    2 +
 hw/misc/sifive_u_otp.c                             |   22 +-
 hw/misc/trace-events                               |   19 +-
 hw/misc/virt_ctrl.c                                |    2 +-
 hw/misc/xlnx-versal-pmc-iou-slcr.c                 | 1446 ++++++++
 hw/misc/xlnx-zynqmp-apu-ctrl.c                     |  253 ++
 hw/misc/xlnx-zynqmp-crf.c                          |  266 ++
 hw/misc/zynq_slcr.c                                |   31 +-
 hw/net/allwinner-sun8i-emac.c                      |   18 +-
 hw/net/can/can_kvaser_pci.c                        |    1 -
 hw/net/can/can_mioe3680_pci.c                      |    1 -
 hw/net/can/can_pcm3680_pci.c                       |    1 -
 hw/net/can/can_sja1000.c                           |    2 -
 hw/net/can/ctucan_core.c                           |    2 -
 hw/net/can/ctucan_pci.c                            |    1 -
 hw/net/e1000e_core.c                               |    5 +
 hw/net/eepro100.c                                  |   49 +-
 hw/net/fsl_etsec/etsec.c                           |    2 +-
 hw/net/ftgmac100.c                                 |   25 +-
 hw/net/imx_fec.c                                   |   32 +-
 hw/net/meson.build                                 |    1 +
 hw/net/mv88w8618_eth.c                             |  403 +++
 hw/net/ne2000-isa.c                                |    2 +-
 hw/net/npcm7xx_emc.c                               |   38 +-
 hw/net/rocker/rocker.h                             |    2 +-
 hw/net/rtl8139.c                                   |    2 +-
 hw/net/trace-events                                |    1 +
 hw/net/tulip.c                                     |   36 +-
 hw/net/vhost_net-stub.c                            |    4 +-
 hw/net/vhost_net.c                                 |   60 +-
 hw/net/virtio-net.c                                |  295 +-
 hw/net/vmxnet3.c                                   |    4 +-
 hw/nubus/mac-nubus-bridge.c                        |   34 +-
 hw/nubus/nubus-bridge.c                            |   23 +-
 hw/nubus/nubus-bus.c                               |  120 +-
 hw/nubus/nubus-device.c                            |  227 +-
 hw/nubus/trace-events                              |    7 +
 hw/nubus/trace.h                                   |    1 +
 hw/nvme/ctrl.c                                     |  492 ++-
 hw/nvme/dif.c                                      |  300 +-
 hw/nvme/dif.h                                      |  191 ++
 hw/nvme/ns.c                                       |  121 +-
 hw/nvme/nvme.h                                     |   72 +-
 hw/nvme/subsys.c                                   |   13 +-
 hw/nvme/trace-events                               |   15 +-
 hw/nvram/Kconfig                                   |   19 +
 hw/nvram/eeprom_at24c.c                            |    9 +-
 hw/nvram/fw_cfg.c                                  |   17 +-
 hw/nvram/meson.build                               |   14 +-
 hw/nvram/spapr_nvram.c                             |    2 +-
 hw/nvram/xlnx-bbram.c                              |  545 +++
 hw/nvram/xlnx-efuse-crc.c                          |  119 +
 hw/nvram/xlnx-efuse.c                              |  283 ++
 hw/nvram/xlnx-versal-efuse-cache.c                 |  114 +
 hw/nvram/xlnx-versal-efuse-ctrl.c                  |  793 +++++
 hw/nvram/xlnx-zynqmp-efuse.c                       |  861 +++++
 hw/openrisc/meson.build                            |    2 +-
 hw/openrisc/openrisc_sim.c                         |  308 +-
 hw/pci-bridge/pci_expander_bridge.c                |    8 +-
 hw/pci-bridge/xio3130_downstream.c                 |    5 +-
 hw/pci-bridge/xio3130_upstream.c                   |    2 +-
 hw/pci-host/i440fx.c                               |    8 -
 hw/pci-host/mv64361.c                              |    1 +
 hw/pci-host/pnv_phb3.c                             |   56 +-
 hw/pci-host/pnv_phb3_msi.c                         |    9 +-
 hw/pci-host/pnv_phb3_pbcq.c                        |   11 +
 hw/pci-host/pnv_phb4.c                             |  612 +++-
 hw/pci-host/pnv_phb4_pec.c                         |  415 +--
 hw/pci-host/raven.c                                |    4 +-
 hw/pci-host/sh_pci.c                               |   10 +-
 hw/pci-host/trace-events                           |    2 +
 hw/pci-host/versatile.c                            |    6 +-
 hw/pci/meson.build                                 |    1 +
 hw/pci/pci.c                                       |  196 +-
 hw/pci/pci_bridge.c                                |    4 +-
 hw/pci/pci_host.c                                  |   12 +-
 hw/pci/pcie.c                                      |  101 +-
 hw/pci/pcie_aer.c                                  |    4 +-
 hw/pci/pcie_sriov.c                                |  302 ++
 hw/pci/trace-events                                |   13 +-
 hw/ppc/e500.c                                      |    4 +-
 hw/ppc/mac.h                                       |    3 -
 hw/ppc/mac_newworld.c                              |    3 +-
 hw/ppc/mac_oldworld.c                              |    3 +-
 hw/ppc/mpc8544_guts.c                              |    9 +-
 hw/ppc/pegasos2.c                                  |  169 +-
 hw/ppc/pnv.c                                       |  483 ++-
 hw/ppc/pnv_core.c                                  |    6 +-
 hw/ppc/pnv_homer.c                                 |   64 +
 hw/ppc/pnv_occ.c                                   |   16 +
 hw/ppc/pnv_pnor.c                                  |    2 +-
 hw/ppc/pnv_psi.c                                   |   38 +-
 hw/ppc/pnv_xscom.c                                 |    6 +
 hw/ppc/ppc.c                                       |  318 +-
 hw/ppc/ppc405.h                                    |   14 +-
 hw/ppc/ppc405_boards.c                             |  249 +-
 hw/ppc/ppc405_uc.c                                 |  245 +-
 hw/ppc/ppc4xx_devs.c                               |   41 +-
 hw/ppc/ppc4xx_pci.c                                |   19 +-
 hw/ppc/ppc_booke.c                                 |    4 +-
 hw/ppc/prep.c                                      |   10 +-
 hw/ppc/prep_systemio.c                             |    2 +-
 hw/ppc/spapr.c                                     |  182 +-
 hw/ppc/spapr_caps.c                                |   36 +-
 hw/ppc/spapr_cpu_core.c                            |   16 +-
 hw/ppc/spapr_drc.c                                 |   63 +-
 hw/ppc/spapr_events.c                              |   22 +-
 hw/ppc/spapr_hcall.c                               |  340 ++
 hw/ppc/spapr_iommu.c                               |    2 +-
 hw/ppc/spapr_numa.c                                |  416 ++-
 hw/ppc/spapr_nvdimm.c                              |  392 +++
 hw/ppc/spapr_pci.c                                 |   34 +-
 hw/ppc/spapr_pci_nvlink2.c                         |   17 +-
 hw/ppc/spapr_pci_vfio.c                            |    4 +-
 hw/ppc/spapr_rtas.c                                |   25 +-
 hw/ppc/spapr_rtc.c                                 |    8 +-
 hw/ppc/spapr_softmmu.c                             |   18 +-
 hw/ppc/spapr_vio.c                                 |    8 +-
 hw/ppc/spapr_vof.c                                 |    2 -
 hw/ppc/trace-events                                |   52 +-
 hw/ppc/vof.c                                       |    1 -
 hw/rdma/rdma_rm.c                                  |  104 +-
 hw/rdma/rdma_rm.h                                  |    2 +-
 hw/rdma/rdma_utils.c                               |   14 +-
 hw/rdma/rdma_utils.h                               |    2 +-
 hw/rdma/trace-events                               |    2 +-
 hw/rdma/vmw/pvrdma_dev_ring.c                      |    2 +-
 hw/rdma/vmw/pvrdma_main.c                          |   31 +-
 hw/rdma/vmw/pvrdma_qp_ops.c                        |    6 +-
 hw/remote/mpqemu-link.c                            |    3 -
 hw/remote/proxy-memory-listener.c                  |    2 +
 hw/remote/proxy.c                                  |   11 +-
 hw/riscv/Kconfig                                   |   20 +-
 hw/riscv/boot.c                                    |   54 +-
 hw/riscv/microchip_pfsoc.c                         |   67 +-
 hw/riscv/opentitan.c                               |   63 +-
 hw/riscv/shakti_c.c                                |   29 +-
 hw/riscv/sifive_e.c                                |   34 +-
 hw/riscv/sifive_u.c                                |  106 +-
 hw/riscv/spike.c                                   |   68 +-
 hw/riscv/virt.c                                    | 1266 +++++--
 hw/rtc/Kconfig                                     |    2 +
 hw/rtc/allwinner-rtc.c                             |    2 +-
 hw/rtc/aspeed_rtc.c                                |    2 +-
 hw/rtc/ds1338.c                                    |    2 +-
 hw/rtc/exynos4210_rtc.c                            |    2 +-
 hw/rtc/goldfish_rtc.c                              |    2 +-
 hw/rtc/m41t80.c                                    |    2 +-
 hw/rtc/m48t59-isa.c                                |    9 +-
 hw/rtc/m48t59.c                                    |    2 +-
 hw/rtc/mc146818rtc.c                               |   20 +-
 hw/rtc/pl031.c                                     |   13 +-
 hw/rtc/twl92230.c                                  |    2 +-
 hw/rtc/xlnx-zynqmp-rtc.c                           |    2 +-
 hw/s390x/ap-bridge.c                               |    2 +-
 hw/s390x/css-bridge.c                              |    2 +-
 hw/s390x/css.c                                     |   38 +-
 hw/s390x/event-facility.c                          |    4 +-
 hw/s390x/ipl.c                                     |   37 +-
 hw/s390x/s390-pci-bus.c                            |   20 +-
 hw/s390x/s390-pci-inst.c                           |   23 +-
 hw/s390x/s390-pci-vfio.c                           |    1 +
 hw/s390x/s390-skeys-kvm.c                          |    4 +-
 hw/s390x/s390-skeys.c                              |  206 +-
 hw/s390x/s390-virtio-ccw.c                         |   35 +-
 hw/s390x/sclp.c                                    |    4 +-
 hw/s390x/tod-kvm.c                                 |    2 +-
 hw/s390x/tod-tcg.c                                 |    4 +-
 hw/s390x/tod.c                                     |    2 +-
 hw/s390x/virtio-ccw.c                              |    3 +-
 hw/scsi/esp-pci.c                                  |    4 +-
 hw/scsi/esp.c                                      |  100 +-
 hw/scsi/lsi53c895a.c                               |    7 +-
 hw/scsi/megasas.c                                  |  148 +-
 hw/scsi/mptsas.c                                   |   19 +-
 hw/scsi/scsi-bus.c                                 |   19 +-
 hw/scsi/scsi-disk.c                                |    6 +-
 hw/scsi/spapr_vscsi.c                              |    3 +-
 hw/scsi/trace-events                               |   12 +-
 hw/scsi/vhost-scsi.c                               |   17 +-
 hw/scsi/virtio-scsi-dataplane.c                    |   60 +-
 hw/scsi/virtio-scsi.c                              |    6 +-
 hw/scsi/vmw_pvscsi.c                               |   23 +-
 hw/sd/allwinner-sdhost.c                           |   20 +-
 hw/sd/aspeed_sdhci.c                               |    7 +-
 hw/sd/bcm2835_sdhost.c                             |    6 +-
 hw/sd/cadence_sdhci.c                              |    2 +-
 hw/sd/meson.build                                  |    1 +
 hw/sd/npcm7xx_sdhci.c                              |  182 +
 hw/sd/pl181.c                                      |    3 +-
 hw/sd/pxa2xx_mmci.c                                |    4 +-
 hw/sd/sd.c                                         |   52 +-
 hw/sd/sdhci.c                                      |   65 +-
 hw/sd/ssi-sd.c                                     |   32 +-
 hw/sd/trace-events                                 |    4 +
 hw/sensor/Kconfig                                  |   17 +
 hw/sensor/dps310.c                                 |  225 ++
 hw/sensor/isl_pmbus_vr.c                           |  279 ++
 hw/sensor/lsm303dlhc_mag.c                         |  556 +++
 hw/sensor/meson.build                              |    3 +
 hw/sh4/r2d.c                                       |   73 +-
 hw/sh4/sh7750.c                                    |  639 ++--
 hw/sh4/sh7750_regnames.c                           |  148 +-
 hw/sh4/sh7750_regs.h                               | 1600 ++++-----
 hw/sh4/shix.c                                      |   12 +-
 hw/sh4/trace-events                                |    3 +
 hw/sh4/trace.h                                     |    1 +
 hw/smbios/smbios.c                                 |   88 +-
 hw/sparc/leon3.c                                   |    2 +-
 hw/sparc/sun4m.c                                   |    2 +-
 hw/sparc64/niagara.c                               |    2 +-
 hw/sparc64/sparc64.c                               |    4 +-
 hw/ssi/aspeed_smc.c                                | 1159 ++++---
 hw/ssi/meson.build                                 |    1 +
 hw/ssi/ssi.c                                       |    2 +-
 hw/ssi/xlnx-versal-ospi.c                          | 1852 ++++++++++
 hw/timer/Kconfig                                   |    6 +
 hw/timer/a9gtimer.c                                |   21 +
 hw/timer/arm_timer.c                               |    2 +-
 hw/timer/armv7m_systick.c                          |  118 +-
 hw/timer/etraxfs_timer.c                           |   34 +-
 hw/timer/ibex_timer.c                              |   42 +-
 hw/timer/meson.build                               |    2 +
 hw/timer/sh_timer.c                                |  151 +-
 hw/timer/sifive_pwm.c                              |  468 +++
 hw/timer/slavio_timer.c                            |    2 +-
 hw/timer/stellaris-gptm.c                          |  332 ++
 hw/timer/trace-events                              |   11 +
 hw/tpm/tpm_crb.c                                   |    1 +
 hw/tpm/tpm_ppi.c                                   |   11 +-
 hw/tpm/tpm_ppi.h                                   |    4 +-
 hw/tpm/tpm_tis_isa.c                               |    2 +-
 hw/usb/bus.c                                       |   26 +-
 hw/usb/desc-msos.c                                 |   10 +-
 hw/usb/desc.c                                      |   15 +-
 hw/usb/desc.h                                      |    3 +-
 hw/usb/dev-audio.c                                 |    4 +-
 hw/usb/dev-hid.c                                   |    6 +-
 hw/usb/dev-mtp.c                                   |    6 +-
 hw/usb/dev-smartcard-reader.c                      |    3 +-
 hw/usb/dev-storage-bot.c                           |    3 +-
 hw/usb/dev-storage-classic.c                       |    4 +-
 hw/usb/dev-uas.c                                   |    4 +-
 hw/usb/dev-wacom.c                                 |   72 +-
 hw/usb/hcd-dwc2.c                                  |    8 +-
 hw/usb/hcd-ehci.c                                  |    6 +-
 hw/usb/hcd-ohci.c                                  |  325 +-
 hw/usb/hcd-uhci.c                                  |   14 +-
 hw/usb/hcd-uhci.h                                  |    3 +-
 hw/usb/hcd-xhci.c                                  |   28 +-
 hw/usb/host-libusb.c                               |    4 +-
 hw/usb/libhw.c                                     |    3 +-
 hw/usb/quirks-ftdi-ids.h                           |    4 +-
 hw/usb/redirect.c                                  |   17 +-
 hw/usb/trace-events                                |    2 +-
 hw/usb/u2f-emulated.c                              |    2 +-
 hw/usb/vt82c686-uhci-pci.c                         |   15 +
 hw/vfio/ccw.c                                      |    4 +-
 hw/vfio/common.c                                   |    9 +
 hw/vfio/igd.c                                      |    4 +-
 hw/vfio/migration.c                                |    6 +-
 hw/vfio/pci-quirks.c                               |    2 +-
 hw/vfio/pci.c                                      |   38 +-
 hw/vfio/platform.c                                 |    6 +-
 hw/vfio/spapr.c                                    |    1 +
 hw/virtio/Kconfig                                  |    5 +
 hw/virtio/meson.build                              |    6 +-
 hw/virtio/trace-events                             |    6 +-
 hw/virtio/vhost-backend.c                          |   34 +-
 hw/virtio/vhost-iova-tree.c                        |  110 +
 hw/virtio/vhost-iova-tree.h                        |   27 +
 hw/virtio/vhost-shadow-virtqueue.c                 |  636 ++++
 hw/virtio/vhost-shadow-virtqueue.h                 |   87 +
 hw/virtio/vhost-user-i2c.c                         |   11 +-
 hw/virtio/vhost-user-rng-pci.c                     |   79 +
 hw/virtio/vhost-user-rng.c                         |  289 ++
 hw/virtio/vhost-user-vsock.c                       |    4 +-
 hw/virtio/vhost-user.c                             |  607 ++--
 hw/virtio/vhost-vdpa.c                             |  767 ++++-
 hw/virtio/vhost-vsock-common.c                     |   41 +-
 hw/virtio/vhost-vsock.c                            |   35 +-
 hw/virtio/vhost.c                                  |  155 +-
 hw/virtio/virtio-balloon.c                         |   48 +-
 hw/virtio/virtio-bus.c                             |   26 +-
 hw/virtio/virtio-crypto.c                          |    2 +-
 hw/virtio/virtio-iommu-pci.c                       |   16 +-
 hw/virtio/virtio-iommu.c                           |  132 +-
 hw/virtio/virtio-mem-pci.c                         |    5 +-
 hw/virtio/virtio-mem.c                             |  233 +-
 hw/virtio/virtio-mmio.c                            |   16 +-
 hw/virtio/virtio-pci.c                             |   22 +-
 hw/virtio/virtio-pmem.c                            |    2 +-
 hw/virtio/virtio.c                                 |  127 +-
 hw/watchdog/sbsa_gwdt.c                            |    3 +-
 hw/watchdog/trace-events                           |    4 +
 hw/watchdog/watchdog.c                             |   14 -
 hw/watchdog/wdt_aspeed.c                           |   34 +-
 hw/watchdog/wdt_diag288.c                          |    3 +-
 hw/watchdog/wdt_i6300esb.c                         |    3 +-
 hw/watchdog/wdt_ib700.c                            |    3 +-
 hw/watchdog/wdt_imx2.c                             |    4 +-
 hw/xen/xen-bus.c                                   |    8 +-
 hw/xen/xen-legacy-backend.c                        |    5 +-
 hw/xen/xen_pt.c                                    |    6 +-
 hw/xen/xen_pt.h                                    |    2 +-
 hw/xtensa/xtfpga.c                                 |    2 +-
 include/block/aio.h                                |    4 +-
 include/block/block-common.h                       |  419 +++
 include/block/block-copy.h                         |    8 +-
 include/block/block-global-state.h                 |  253 ++
 include/block/block-io.h                           |  368 ++
 include/block/block.h                              |  874 +----
 include/block/block_int-common.h                   | 1246 +++++++
 include/block/block_int-global-state.h             |  329 ++
 include/block/block_int-io.h                       |  194 ++
 include/block/block_int.h                          | 1419 +-------
 include/block/blockjob.h                           |   25 +-
 include/block/blockjob_int.h                       |   28 +
 include/block/dirty-bitmap.h                       |    4 +-
 include/block/nbd.h                                |    3 +-
 include/block/nvme.h                               |  126 +-
 include/block/raw-aio.h                            |    6 +-
 include/block/reqlist.h                            |   75 +
 include/block/snapshot.h                           |   13 +-
 include/chardev/char-fe.h                          |    2 +-
 include/chardev/char-socket.h                      |   86 +
 include/chardev/char.h                             |   34 +-
 include/disas/dis-asm.h                            |    6 +-
 include/elf.h                                      |    2 +
 include/exec/cpu-all.h                             |   21 +-
 include/exec/cpu-common.h                          |   50 +
 include/exec/cpu_ldst.h                            |  335 +-
 include/exec/exec-all.h                            |   81 +-
 include/exec/gdbstub.h                             |   25 +-
 include/exec/gen-icount.h                          |   48 +-
 include/exec/helper-gen.h                          |    2 -
 include/exec/helper-head.h                         |   19 +-
 include/exec/helper-proto.h                        |    1 -
 include/exec/helper-tcg.h                          |    1 -
 include/exec/memattrs.h                            |    9 +
 include/exec/memop.h                               |   29 +-
 include/exec/memopidx.h                            |   55 +
 include/exec/memory.h                              |   84 +-
 include/exec/plugin-gen.h                          |   12 +-
 include/exec/poison.h                              |    2 -
 include/exec/ram_addr.h                            |   13 +-
 include/exec/ramblock.h                            |    2 +
 include/exec/ramlist.h                             |    2 +-
 include/exec/translate-all.h                       |    1 +
 include/exec/translator.h                          |   44 +-
 include/fpu/softfloat-macros.h                     |   82 -
 include/fpu/softfloat-types.h                      |   23 +-
 include/fpu/softfloat.h                            |   24 +-
 include/glib-compat.h                              |   43 +-
 include/hw/acpi/acpi-defs.h                        |  529 +--
 include/hw/acpi/acpi.h                             |    2 +
 include/hw/acpi/acpi_dev_interface.h               |    3 +-
 include/hw/acpi/aml-build.h                        |   52 +-
 include/hw/acpi/erst.h                             |   24 +
 include/hw/acpi/generic_event_device.h             |    2 -
 include/hw/acpi/ich9.h                             |    1 +
 include/hw/acpi/pcihp.h                            |    2 -
 include/hw/adc/aspeed_adc.h                        |   55 +
 include/hw/arm/armv7m.h                            |   24 +
 include/hw/arm/aspeed.h                            |    1 +
 include/hw/arm/aspeed_soc.h                        |   11 +
 include/hw/arm/boot.h                              |   14 +-
 include/hw/arm/fsl-imx7.h                          |    5 +
 include/hw/arm/msf2-soc.h                          |    8 +-
 include/hw/arm/npcm7xx.h                           |    2 +
 include/hw/arm/nrf51_soc.h                         |    2 +
 include/hw/arm/stm32f100_soc.h                     |    8 +
 include/hw/arm/stm32f205_soc.h                     |    8 +
 include/hw/arm/stm32f405_soc.h                     |    3 +
 include/hw/arm/virt.h                              |   13 +-
 include/hw/arm/xlnx-versal.h                       |   46 +-
 include/hw/arm/xlnx-zynqmp.h                       |   18 +
 include/hw/boards.h                                |   51 +-
 include/hw/char/goldfish_tty.h                     |    2 +-
 include/hw/char/mchp_pfsoc_mmuart.h                |   17 +-
 include/hw/char/riscv_htif.h                       |    5 +-
 include/hw/clock.h                                 |   34 +-
 include/hw/core/cpu.h                              |   51 +-
 include/hw/core/tcg-cpu-ops.h                      |   90 +-
 include/hw/display/macfb.h                         |   42 +
 include/hw/display/vga.h                           |    6 +-
 include/hw/dma/xlnx-zdma.h                         |    2 +-
 include/hw/dma/xlnx_csu_dma.h                      |   26 +-
 include/hw/elf_ops.h                               |   40 +-
 include/hw/firmware/smbios.h                       |   10 +-
 include/hw/gpio/aspeed_gpio.h                      |    5 +-
 include/hw/hw.h                                    |    2 +-
 include/hw/i2c/aspeed_i2c.h                        |    8 +-
 include/hw/i2c/pmbus_device.h                      |   25 +-
 include/hw/i386/hostmem-epc.h                      |   28 +
 include/hw/i386/intel_iommu.h                      |    1 +
 include/hw/i386/ioapic_internal.h                  |    1 -
 include/hw/i386/microvm.h                          |    5 +-
 include/hw/i386/pc.h                               |   32 +-
 include/hw/i386/sgx-epc.h                          |   70 +
 include/hw/i386/x86-iommu.h                        |   12 -
 include/hw/i386/x86.h                              |    9 +-
 include/hw/ide/internal.h                          |    4 +-
 include/hw/input/i8042.h                           |   15 +
 include/hw/intc/arm_gicv3_common.h                 |   27 +-
 include/hw/intc/arm_gicv3_its_common.h             |   26 +-
 include/hw/intc/armv7m_nvic.h                      |    8 -
 include/hw/intc/goldfish_pic.h                     |    2 +-
 include/hw/intc/ibex_plic.h                        |   65 -
 include/hw/intc/m68k_irqc.h                        |    2 +-
 include/hw/intc/riscv_aclint.h                     |   80 +
 include/hw/intc/riscv_aplic.h                      |   79 +
 include/hw/intc/riscv_imsic.h                      |   68 +
 include/hw/intc/sifive_clint.h                     |   60 -
 include/hw/intc/sifive_plic.h                      |    4 +
 include/hw/ipack/ipack.h                           |    8 +-
 include/hw/isa/i8259_internal.h                    |    3 -
 include/hw/isa/isa.h                               |    3 -
 include/hw/isa/vt82c686.h                          |    4 +
 include/hw/loader.h                                |   78 +-
 include/hw/m68k/mcf.h                              |    1 +
 include/hw/mem/nvdimm.h                            |    2 +
 include/hw/mem/pc-dimm.h                           |    1 +
 include/hw/mips/mips.h                             |    3 -
 include/hw/misc/armv7m_ras.h                       |   37 +
 include/hw/misc/aspeed_i3c.h                       |   48 +
 include/hw/misc/aspeed_sbc.h                       |   32 +
 include/hw/misc/aspeed_scu.h                       |    2 +
 include/hw/misc/mac_via.h                          |  120 +-
 include/hw/misc/macio/pmu.h                        |    2 -
 include/hw/misc/mos6522.h                          |   46 +-
 include/hw/misc/pvpanic.h                          |    8 -
 include/hw/misc/virt_ctrl.h                        |    2 +-
 include/hw/misc/xlnx-versal-pmc-iou-slcr.h         |   78 +
 include/hw/misc/xlnx-zynqmp-apu-ctrl.h             |   93 +
 include/hw/misc/xlnx-zynqmp-crf.h                  |  211 ++
 include/hw/net/mv88w8618_eth.h                     |   12 +
 include/hw/nubus/mac-nubus-bridge.h                |   13 +-
 include/hw/nubus/nubus.h                           |   49 +-
 include/hw/nvram/xlnx-bbram.h                      |   54 +
 include/hw/nvram/xlnx-efuse.h                      |  132 +
 include/hw/nvram/xlnx-versal-efuse.h               |   68 +
 include/hw/nvram/xlnx-zynqmp-efuse.h               |   44 +
 include/hw/pci-bridge/xio3130_downstream.h         |   15 +
 include/hw/pci-host/i440fx.h                       |    1 -
 include/hw/pci-host/pnv_phb3.h                     |    7 +-
 include/hw/pci-host/pnv_phb4.h                     |  106 +-
 include/hw/pci-host/pnv_phb4_regs.h                |    3 +
 include/hw/pci/pci.h                               |  108 +-
 include/hw/pci/pci_bridge.h                        |    8 +
 include/hw/pci/pci_regs.h                          |    1 +
 include/hw/pci/pcie.h                              |    7 +
 include/hw/pci/pcie_sriov.h                        |   77 +
 include/hw/ppc/openpic.h                           |   25 +-
 include/hw/ppc/pnv.h                               |   81 +-
 include/hw/ppc/pnv_core.h                          |    2 +-
 include/hw/ppc/pnv_homer.h                         |    3 +
 include/hw/ppc/pnv_occ.h                           |    2 +
 include/hw/ppc/pnv_xive.h                          |   71 +
 include/hw/ppc/pnv_xscom.h                         |   15 +
 include/hw/ppc/ppc.h                               |    4 +
 include/hw/ppc/spapr.h                             |  113 +-
 include/hw/ppc/spapr_cpu_core.h                    |    5 +
 include/hw/ppc/spapr_numa.h                        |    1 +
 include/hw/ppc/spapr_nvdimm.h                      |    1 +
 include/hw/ppc/spapr_ovec.h                        |    1 +
 include/hw/ppc/spapr_vio.h                         |   30 +-
 include/hw/ppc/vof.h                               |    5 +
 include/hw/ppc/xive.h                              |   58 +-
 include/hw/ppc/xive2.h                             |  109 +
 include/hw/ppc/xive2_regs.h                        |  210 ++
 include/hw/qdev-core.h                             |   78 +-
 include/hw/qdev-properties.h                       |    1 +
 include/hw/rdma/rdma.h                             |    2 +-
 include/hw/register.h                              |    8 +
 include/hw/registerfields.h                        |   56 +-
 include/hw/riscv/boot.h                            |    5 +-
 include/hw/riscv/microchip_pfsoc.h                 |    1 -
 include/hw/riscv/opentitan.h                       |   10 +-
 include/hw/riscv/sifive_u.h                        |   15 +-
 include/hw/riscv/spike.h                           |    1 +
 include/hw/riscv/virt.h                            |   44 +-
 include/hw/rtc/mc146818rtc.h                       |    1 +
 include/hw/s390x/css.h                             |    3 +-
 include/hw/s390x/ioinst.h                          |    2 +-
 include/hw/s390x/s390-pci-bus.h                    |    8 +-
 include/hw/s390x/s390-pci-clp.h                    |    3 +-
 include/hw/s390x/storage-keys.h                    |   65 +-
 include/hw/scsi/esp.h                              |   11 +-
 include/hw/scsi/scsi.h                             |   34 +-
 include/hw/sd/npcm7xx_sdhci.h                      |   65 +
 include/hw/sensor/isl_pmbus_vr.h                   |   52 +
 include/hw/sh4/sh.h                                |   19 +-
 include/hw/sh4/sh_intc.h                           |    2 +-
 include/hw/southbridge/piix.h                      |    2 -
 include/hw/ssi/aspeed_smc.h                        |   86 +-
 include/hw/ssi/xlnx-versal-ospi.h                  |  111 +
 include/hw/timer/armv7m_systick.h                  |   36 +-
 include/hw/timer/ibex_timer.h                      |    3 +-
 include/hw/timer/sifive_pwm.h                      |   62 +
 include/hw/timer/stellaris-gptm.h                  |   51 +
 include/hw/tricore/triboard.h                      |    1 -
 include/hw/usb/msd.h                               |    2 +-
 include/hw/virtio/vhost-backend.h                  |    6 -
 include/hw/virtio/vhost-user-i2c.h                 |    3 +
 include/hw/virtio/vhost-user-rng.h                 |   33 +
 include/hw/virtio/vhost-user.h                     |    3 +-
 include/hw/virtio/vhost-vdpa.h                     |   12 +
 include/hw/virtio/vhost-vsock-common.h             |    5 +
 include/hw/virtio/vhost-vsock.h                    |    3 -
 include/hw/virtio/vhost.h                          |    8 +-
 include/hw/virtio/virtio-blk.h                     |    2 +-
 include/hw/virtio/virtio-bus.h                     |    4 +-
 include/hw/virtio/virtio-gpu-bswap.h               |    1 -
 include/hw/virtio/virtio-gpu.h                     |    9 +-
 include/hw/virtio/virtio-iommu.h                   |    3 +-
 include/hw/virtio/virtio-mem.h                     |   15 +-
 include/hw/virtio/virtio-net.h                     |    7 +-
 include/hw/virtio/virtio.h                         |    7 +-
 include/hw/watchdog/wdt_aspeed.h                   |    1 +
 include/hw/xen/xen-bus-helper.h                    |    4 +-
 include/hw/xen/xen-bus.h                           |    4 +-
 include/hw/xen/xen_common.h                        |    2 +-
 include/hw/xen/xen_pvdev.h                         |    2 +-
 include/libdecnumber/decNumber.h                   |    4 +
 include/libdecnumber/decNumberLocal.h              |    2 +-
 include/migration/blocker.h                        |   16 +
 include/migration/colo.h                           |    1 +
 include/migration/vmstate.h                        |    2 -
 include/monitor/hmp-target.h                       |    4 +-
 include/monitor/hmp.h                              |    6 +-
 include/monitor/monitor.h                          |    6 +-
 include/monitor/qdev.h                             |   27 +-
 include/net/net.h                                  |    7 +
 include/net/vhost_net.h                            |    7 +-
 include/qapi/compat-policy.h                       |    7 +
 include/qapi/error.h                               |   20 +-
 include/qapi/qmp/dispatch.h                        |    6 +-
 include/qapi/qmp/qjson.h                           |    8 +-
 include/qapi/qobject-input-visitor.h               |    4 -
 include/qapi/qobject-output-visitor.h              |    4 -
 include/qapi/type-helpers.h                        |   14 +
 include/qapi/util.h                                |    8 +-
 include/qapi/visitor-impl.h                        |    9 +-
 include/qapi/visitor.h                             |   26 +-
 include/qemu-common.h                              |   29 +-
 include/qemu/buffer.h                              |    2 +-
 include/qemu/cacheinfo.h                           |   21 +
 include/qemu/compiler.h                            |   20 +-
 include/qemu/coroutine-tls.h                       |  165 +
 include/qemu/coroutine.h                           |   10 +
 include/qemu/cpuid.h                               |   20 +-
 include/qemu/cutils.h                              |    5 +
 include/qemu/dbus.h                                |   24 +
 include/qemu/error-report.h                        |   26 +-
 include/qemu/event_notifier.h                      |    1 +
 include/qemu/hbitmap.h                             |   12 +
 include/qemu/host-utils.h                          |  165 +-
 include/qemu/hw-version.h                          |   27 +
 include/qemu/int128.h                              |   91 +-
 include/qemu/iova-tree.h                           |   46 +-
 include/qemu/job.h                                 |   51 +-
 include/qemu/log-for-trace.h                       |    2 +-
 include/qemu/log.h                                 |    2 +-
 include/qemu/madvise.h                             |   95 +
 include/qemu/main-loop.h                           |   56 +
 include/qemu/memalign.h                            |   61 +
 include/qemu/mmap-alloc.h                          |   23 +
 include/qemu/module.h                              |    6 +-
 include/qemu/mprotect.h                            |   14 +
 include/qemu/option.h                              |    2 +
 include/qemu/osdep.h                               |  170 +-
 include/qemu/plugin.h                              |   33 +-
 include/qemu/qemu-plugin.h                         |   47 +
 include/qemu/qemu-print.h                          |    8 +-
 include/qemu/range.h                               |    4 +-
 include/qemu/rcu.h                                 |    7 +-
 include/qemu/readline.h                            |    2 +-
 include/qemu/timer.h                               |    2 +-
 include/qemu/transactions.h                        |    3 +
 include/qemu/typedefs.h                            |    4 +
 include/qemu/vfio-helpers.h                        |    2 +-
 include/qemu/vhost-user-server.h                   |    5 +
 include/qemu/xattr.h                               |    4 +-
 include/qom/object.h                               |   18 +-
 include/standard-headers/asm-x86/kvm_para.h        |    1 +
 include/standard-headers/drm/drm_fourcc.h          |  132 +-
 include/standard-headers/linux/ethtool.h           |   32 +
 include/standard-headers/linux/fuse.h              |   68 +-
 include/standard-headers/linux/pci_regs.h          |  148 +-
 include/standard-headers/linux/pvpanic.h           |    9 +
 include/standard-headers/linux/virtio_gpio.h       |   72 +
 include/standard-headers/linux/virtio_gpu.h        |   18 +-
 include/standard-headers/linux/virtio_i2c.h        |   47 +
 include/standard-headers/linux/virtio_ids.h        |   24 +
 include/standard-headers/linux/virtio_iommu.h      |    8 +-
 include/standard-headers/linux/virtio_mem.h        |    9 +-
 include/standard-headers/linux/virtio_pcidev.h     |   65 +
 include/standard-headers/linux/virtio_scmi.h       |   24 +
 include/standard-headers/linux/virtio_vsock.h      |    3 +-
 include/sysemu/accel-ops.h                         |    3 +
 include/sysemu/arch_init.h                         |   15 +-
 include/sysemu/block-backend-common.h              |  102 +
 include/sysemu/block-backend-global-state.h        |  116 +
 include/sysemu/block-backend-io.h                  |  161 +
 include/sysemu/block-backend.h                     |  263 +-
 include/sysemu/blockdev.h                          |   17 +-
 include/sysemu/cpus.h                              |    2 -
 include/sysemu/device_tree.h                       |    1 +
 include/sysemu/dma.h                               |  115 +-
 include/sysemu/hax.h                               |   18 +-
 include/sysemu/hvf_int.h                           |   12 +-
 include/sysemu/hw_accel.h                          |    5 -
 include/sysemu/kvm.h                               |   45 +-
 include/sysemu/kvm_int.h                           |    2 +-
 include/sysemu/memory_mapping.h                    |    5 +-
 include/sysemu/nvmm.h                              |    7 +-
 include/sysemu/os-posix.h                          |    1 +
 include/sysemu/os-win32.h                          |    8 +
 include/sysemu/rtc.h                               |   58 +
 include/sysemu/sev.h                               |   28 -
 include/sysemu/sysemu.h                            |    1 -
 include/sysemu/watchdog.h                          |    1 -
 include/tcg/tcg-ldst.h                             |   79 +
 include/tcg/tcg-op-gvec.h                          |   22 +
 include/tcg/tcg-op.h                               |    6 +-
 include/tcg/tcg-opc.h                              |    3 +
 include/tcg/tcg.h                                  |  218 +-
 include/trace-tcg.h                                |    6 -
 include/ui/clipboard.h                             |   88 +-
 include/ui/console.h                               |   85 +-
 include/ui/dbus-display.h                          |   17 +
 include/ui/dbus-module.h                           |   11 +
 include/ui/egl-context.h                           |    6 +-
 include/ui/egl-helpers.h                           |    3 +
 include/ui/gtk.h                                   |   17 +-
 include/ui/qemu-spice.h                            |    6 +
 include/ui/sdl2.h                                  |   18 +-
 include/ui/spice-display.h                         |    5 +-
 include/user/safe-syscall.h                        |  140 +
 io/channel-command.c                               |    6 +-
 io/channel-file.c                                  |    3 +-
 io/channel-socket.c                                |    9 +-
 io/channel-websock.c                               |    2 +-
 io/dns-resolver.c                                  |    2 +-
 iothread.c                                         |   28 +-
 job.c                                              |  105 +-
 libdecnumber/decContext.c                          |    7 +-
 libdecnumber/decNumber.c                           |  131 +
 linux-headers/asm-arm64/unistd.h                   |    1 +
 linux-headers/asm-generic/unistd.h                 |   25 +-
 linux-headers/asm-mips/unistd_n32.h                |    3 +
 linux-headers/asm-mips/unistd_n64.h                |    3 +
 linux-headers/asm-mips/unistd_o32.h                |    3 +
 linux-headers/asm-powerpc/unistd_32.h              |    3 +
 linux-headers/asm-powerpc/unistd_64.h              |    3 +
 linux-headers/asm-riscv/bitsperlong.h              |   14 +
 linux-headers/asm-riscv/kvm.h                      |  128 +
 linux-headers/asm-riscv/mman.h                     |    1 +
 linux-headers/asm-riscv/unistd.h                   |   44 +
 linux-headers/asm-s390/unistd_32.h                 |    3 +
 linux-headers/asm-s390/unistd_64.h                 |    3 +
 linux-headers/asm-x86/kvm.h                        |   24 +-
 linux-headers/asm-x86/unistd_32.h                  |    4 +
 linux-headers/asm-x86/unistd_64.h                  |    4 +
 linux-headers/asm-x86/unistd_x32.h                 |    4 +
 linux-headers/linux/kvm.h                          |   61 +-
 linux-user/aarch64/cpu_loop.c                      |   76 +-
 linux-user/aarch64/signal.c                        |   39 +-
 linux-user/aarch64/target_prctl.h                  |  160 +
 linux-user/aarch64/target_resource.h               |    1 +
 linux-user/aarch64/target_signal.h                 |   20 +-
 linux-user/aarch64/target_structs.h                |   59 +-
 linux-user/aarch64/target_syscall.h                |   24 -
 linux-user/alpha/cpu_loop.c                        |   82 +-
 linux-user/alpha/signal.c                          |   43 +-
 linux-user/alpha/target_prctl.h                    |    1 +
 linux-user/alpha/target_resource.h                 |   21 +
 linux-user/alpha/target_signal.h                   |    2 +-
 linux-user/alpha/target_syscall.h                  |    1 -
 linux-user/arm/cpu_loop.c                          |  251 +-
 linux-user/arm/signal.c                            |  483 +--
 linux-user/arm/target_prctl.h                      |    1 +
 linux-user/arm/target_resource.h                   |    1 +
 linux-user/arm/target_signal.h                     |   20 +-
 linux-user/arm/target_structs.h                    |   60 +-
 linux-user/arm/target_syscall.h                    |    1 -
 linux-user/cpu_loop-common.h                       |    1 +
 linux-user/cris/cpu_loop.c                         |   28 +-
 linux-user/cris/signal.c                           |   34 +-
 linux-user/cris/target_prctl.h                     |    1 +
 linux-user/cris/target_resource.h                  |    1 +
 linux-user/cris/target_signal.h                    |   20 +-
 linux-user/cris/target_structs.h                   |   59 +-
 linux-user/cris/target_syscall.h                   |    1 -
 linux-user/elfload.c                               |  134 +-
 linux-user/exit.c                                  |    2 +
 linux-user/fd-trans.c                              |  191 +-
 linux-user/flatload.c                              |    3 +
 linux-user/generic/signal.h                        |   15 +
 linux-user/generic/target_errno_defs.h             |   17 -
 linux-user/generic/target_prctl_unalign.h          |   27 +
 linux-user/generic/target_resource.h               |   38 +
 linux-user/generic/target_structs.h                |   58 +
 linux-user/hexagon/cpu_loop.c                      |   31 +-
 linux-user/hexagon/signal.c                        |   22 +-
 linux-user/hexagon/target_prctl.h                  |    1 +
 linux-user/hexagon/target_resource.h               |    1 +
 linux-user/hexagon/target_signal.h                 |   13 +-
 linux-user/hexagon/target_structs.h                |   55 +-
 linux-user/host/aarch64/hostdep.h                  |   38 -
 linux-user/host/aarch64/safe-syscall.inc.S         |   75 -
 linux-user/host/arm/hostdep.h                      |   38 -
 linux-user/host/arm/safe-syscall.inc.S             |   90 -
 linux-user/host/i386/hostdep.h                     |   38 -
 linux-user/host/i386/safe-syscall.inc.S            |  100 -
 linux-user/host/ia64/hostdep.h                     |   15 -
 linux-user/host/mips/hostdep.h                     |   15 -
 linux-user/host/ppc/hostdep.h                      |   15 -
 linux-user/host/ppc64/hostdep.h                    |   38 -
 linux-user/host/ppc64/safe-syscall.inc.S           |   96 -
 linux-user/host/riscv32/hostdep.h                  |   11 -
 linux-user/host/riscv64/hostdep.h                  |   34 -
 linux-user/host/riscv64/safe-syscall.inc.S         |   77 -
 linux-user/host/s390/hostdep.h                     |   15 -
 linux-user/host/s390x/hostdep.h                    |   38 -
 linux-user/host/s390x/safe-syscall.inc.S           |   90 -
 linux-user/host/sparc/hostdep.h                    |   15 -
 linux-user/host/sparc64/hostdep.h                  |   15 -
 linux-user/host/x32/hostdep.h                      |   15 -
 linux-user/host/x86_64/hostdep.h                   |   38 -
 linux-user/host/x86_64/safe-syscall.inc.S          |   91 -
 linux-user/hppa/cpu_loop.c                         |   55 +-
 linux-user/hppa/signal.c                           |    5 +-
 linux-user/hppa/target_prctl.h                     |    1 +
 linux-user/hppa/target_resource.h                  |    1 +
 linux-user/hppa/target_signal.h                    |   15 +-
 linux-user/hppa/target_syscall.h                   |    1 -
 linux-user/i386/cpu_loop.c                         |   94 +-
 linux-user/i386/signal.c                           |   74 +-
 linux-user/i386/target_prctl.h                     |    1 +
 linux-user/i386/target_resource.h                  |    1 +
 linux-user/i386/target_signal.h                    |   20 +-
 linux-user/i386/target_structs.h                   |   59 +-
 linux-user/i386/target_syscall.h                   |    1 -
 linux-user/include/host/aarch64/host-signal.h      |   87 +
 linux-user/include/host/alpha/host-signal.h        |   55 +
 linux-user/include/host/arm/host-signal.h          |   43 +
 linux-user/include/host/i386/host-signal.h         |   38 +
 linux-user/include/host/loongarch64/host-signal.h  |   93 +
 linux-user/include/host/mips/host-signal.h         |   75 +
 linux-user/include/host/ppc64/host-signal.h        |   41 +
 linux-user/include/host/riscv/host-signal.h        |   71 +
 linux-user/include/host/s390/host-signal.h         |  106 +
 linux-user/include/host/s390x/host-signal.h        |    1 +
 linux-user/include/host/sparc64/host-signal.h      |   64 +
 linux-user/include/host/x32/host-signal.h          |    1 +
 linux-user/include/host/x86_64/host-signal.h       |   37 +
 linux-user/include/special-errno.h                 |   32 +
 linux-user/ioctls.h                                |    4 +
 linux-user/linux_loop.h                            |    2 +
 linux-user/linuxload.c                             |    2 +
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 target/arm/hvf_arm.h                               |   18 +
 target/arm/internals.h                             |  123 +-
 target/arm/kvm-consts.h                            |   14 +-
 target/arm/kvm.c                                   |   25 +-
 target/arm/kvm64.c                                 |   37 +-
 target/arm/kvm_arm.h                               |    6 +-
 target/arm/m_helper.c                              |   26 +-
 target/arm/machine.c                               |   23 +
 target/arm/meson.build                             |    2 +
 target/arm/mte_helper.c                            |    7 +-
 target/arm/mve.decode                              |  471 ++-
 target/arm/mve_helper.c                            | 1918 ++++++++++-
 target/arm/op_helper.c                             |   16 +
 target/arm/pauth_helper.c                          |    2 +-
 target/arm/psci.c                                  |   70 +-
 target/arm/sve.decode                              |    5 +-
 target/arm/sve_helper.c                            |   12 +-
 target/arm/syndrome.h                              |   17 +
 target/arm/t32.decode                              |    1 +
 target/arm/tlb_helper.c                            |  105 +-
 target/arm/translate-a32.h                         |    9 +-
 target/arm/translate-a64.c                         |  261 +-
 target/arm/translate-m-nocp.c                      |    8 +-
 target/arm/translate-mve.c                         | 1466 +++++++-
 target/arm/translate-neon.c                        |   25 +-
 target/arm/translate-sve.c                         |   78 +-
 target/arm/translate-vfp.c                         |   43 +-
 target/arm/translate.c                             |  236 +-
 target/arm/translate.h                             |   10 +
 target/arm/vec_helper.c                            |   14 +-
 target/arm/vec_internal.h                          |   11 +
 target/avr/cpu-qom.h                               |    4 +-
 target/avr/cpu.c                                   |    3 -
 target/avr/cpu.h                                   |   15 +-
 target/avr/helper.c                                |    1 +
 target/avr/translate.c                             |   27 +-
 target/cris/cpu-qom.h                              |    3 +-
 target/cris/cpu.c                                  |    8 +-
 target/cris/cpu.h                                  |   25 +-
 target/cris/helper.c                               |   32 +-
 target/cris/meson.build                            |    7 +-
 target/cris/translate.c                            |   18 +-
 target/hexagon/README                              |   81 +-
 target/hexagon/arch.c                              |    6 +-
 target/hexagon/attribs_def.h.inc                   |   23 +
 target/hexagon/cpu.c                               |  103 +-
 target/hexagon/cpu.h                               |   71 +-
 target/hexagon/decode.c                            |   28 +-
 target/hexagon/fma_emu.h                           |    6 +-
 target/hexagon/gen_dectree_import.c                |   13 +
 target/hexagon/gen_helper_funcs.py                 |  115 +-
 target/hexagon/gen_helper_protos.py                |   19 +-
 target/hexagon/gen_semantics.c                     |   33 +
 target/hexagon/gen_tcg.h                           |   15 +-
 target/hexagon/gen_tcg_funcs.py                    |  272 +-
 target/hexagon/gen_tcg_hvx.h                       |  903 +++++
 target/hexagon/genptr.c                            |  241 +-
 target/hexagon/helper.h                            |   18 +
 target/hexagon/hex_arch_types.h                    |    5 +
 target/hexagon/hex_common.py                       |   15 +
 target/hexagon/hex_regs.h                          |    1 +
 target/hexagon/imported/allext.idef                |   25 +
 target/hexagon/imported/allext_macros.def          |   25 +
 target/hexagon/imported/allextenc.def              |   20 +
 target/hexagon/imported/allidefs.def               |    1 +
 target/hexagon/imported/encode.def                 |    1 +
 target/hexagon/imported/macros.def                 |   88 +
 target/hexagon/imported/mmvec/encode_ext.def       |  794 +++++
 target/hexagon/imported/mmvec/ext.idef             | 2606 ++++++++++++++
 target/hexagon/imported/mmvec/macros.def           |  842 +++++
 target/hexagon/insn.h                              |    3 +
 target/hexagon/internal.h                          |    5 +
 target/hexagon/macros.h                            |   38 +-
 target/hexagon/meson.build                         |   18 +-
 target/hexagon/mmvec/decode_ext_mmvec.c            |  236 ++
 target/hexagon/mmvec/decode_ext_mmvec.h            |   24 +
 target/hexagon/mmvec/macros.h                      |  350 ++
 target/hexagon/mmvec/mmvec.h                       |   82 +
 target/hexagon/mmvec/system_ext_mmvec.c            |   47 +
 target/hexagon/mmvec/system_ext_mmvec.h            |   25 +
 target/hexagon/op_helper.c                         |  326 +-
 target/hexagon/translate.c                         |  320 +-
 target/hexagon/translate.h                         |   62 +
 target/hppa/cpu-qom.h                              |    3 +-
 target/hppa/cpu.c                                  |   14 +-
 target/hppa/cpu.h                                  |   31 +-
 target/hppa/helper.c                               |    2 +-
 target/hppa/helper.h                               |    3 +
 target/hppa/insns.decode                           |    1 +
 target/hppa/int_helper.c                           |   26 +-
 target/hppa/mem_helper.c                           |   16 +-
 target/hppa/meson.build                            |    6 +-
 target/hppa/op_helper.c                            |   35 +-
 target/hppa/translate.c                            |   74 +-
 target/i386/cpu-dump.c                             |    4 +-
 target/i386/cpu-qom.h                              |    3 +-
 target/i386/cpu-sysemu.c                           |    4 +-
 target/i386/cpu.c                                  |  350 +-
 target/i386/cpu.h                                  |  125 +-
 target/i386/hax/hax-accel-ops.c                    |    4 +-
 target/i386/hax/hax-all.c                          |   11 +-
 target/i386/hax/hax-mem.c                          |    1 +
 target/i386/helper.c                               |    9 +-
 target/i386/helper.h                               |    1 -
 target/i386/hvf/hvf.c                              |   12 +
 target/i386/hvf/vmx.h                              |   19 +-
 target/i386/hvf/x86.c                              |    6 +-
 target/i386/hvf/x86.h                              |   34 -
 target/i386/hvf/x86_emu.c                          |  110 +-
 target/i386/hvf/x86_emu.h                          |   22 +-
 target/i386/hvf/x86_mmu.c                          |    2 +-
 target/i386/hvf/x86_task.c                         |    4 +-
 target/i386/hvf/x86hvf.c                           |    6 +-
 target/i386/hvf/x86hvf.h                           |    2 -
 target/i386/kvm/hyperv-proto.h                     |    1 +
 target/i386/kvm/kvm-cpu.c                          |   20 +-
 target/i386/kvm/kvm.c                              |  437 ++-
 target/i386/kvm/kvm_i386.h                         |    3 +
 target/i386/kvm/meson.build                        |    8 +-
 target/i386/kvm/sev-stub.c                         |   22 +
 target/i386/machine.c                              |  139 +-
 target/i386/meson.build                            |    4 +-
 target/i386/monitor.c                              |   98 +-
 target/i386/nvmm/nvmm-accel-ops.c                  |    4 +-
 target/i386/nvmm/nvmm-all.c                        |   34 +-
 target/i386/ops_sse_header.h                       |    3 +
 target/i386/sev-stub.c                             |   83 -
 target/i386/sev-sysemu-stub.c                      |   70 +
 target/i386/sev.c                                  |  401 ++-
 target/i386/sev.h                                  |   62 +
 target/i386/sev_i386.h                             |   41 -
 target/i386/svm.h                                  |    8 +
 target/i386/tcg/fpu_helper.c                       |   13 +
 target/i386/tcg/helper-tcg.h                       |    8 +
 target/i386/tcg/int_helper.c                       |    1 +
 target/i386/tcg/mem_helper.c                       |    4 +-
 target/i386/tcg/misc_helper.c                      |    9 +-
 target/i386/tcg/seg_helper.c                       |  126 +-
 target/i386/tcg/sysemu/excp_helper.c               |   43 +-
 target/i386/tcg/sysemu/misc_helper.c               |   12 +-
 target/i386/tcg/sysemu/seg_helper.c                |   63 +
 target/i386/tcg/sysemu/svm_helper.c                |  122 +-
 target/i386/tcg/tcg-cpu.c                          |    9 +-
 target/i386/tcg/translate.c                        |   88 +-
 target/i386/tcg/user/excp_helper.c                 |   23 +-
 target/i386/whpx/whpx-accel-ops.c                  |   10 +-
 target/i386/whpx/whpx-all.c                        |   55 +-
 target/i386/xsave_helper.c                         |   28 +
 target/m68k/cpu-qom.h                              |    3 +-
 target/m68k/cpu.c                                  |    4 +-
 target/m68k/cpu.h                                  |   17 +-
 target/m68k/helper.c                               |    6 +-
 target/m68k/helper.h                               |    1 +
 target/m68k/m68k-semi.c                            |    4 +-
 target/m68k/op_helper.c                            |   25 +-
 target/m68k/translate.c                            |   46 +-
 target/microblaze/cpu-qom.h                        |    3 +-
 target/microblaze/cpu.c                            |    5 +-
 target/microblaze/cpu.h                            |   28 +-
 target/microblaze/helper.c                         |   26 +-
 target/microblaze/mmu.c                            |    1 +
 target/microblaze/mmu.h                            |    2 +
 target/microblaze/op_helper.c                      |    1 +
 target/microblaze/translate.c                      |   34 +-
 target/mips/cpu-defs.c.inc                         |    8 +-
 target/mips/cpu-param.h                            |    2 +-
 target/mips/cpu-qom.h                              |    3 +-
 target/mips/cpu.c                                  |   15 +-
 target/mips/cpu.h                                  |   22 +-
 target/mips/helper.h                               |   18 +-
 target/mips/internal.h                             |   26 +-
 target/mips/tcg/exception.c                        |   19 +-
 target/mips/tcg/ldst_helper.c                      |  122 +-
 target/mips/tcg/meson.build                        |    9 +-
 target/mips/tcg/micromips_translate.c.inc          |   22 +-
 target/mips/tcg/mips16e_translate.c.inc            |    6 +-
 target/mips/tcg/mips32r6.decode                    |   36 -
 target/mips/tcg/mips64r6.decode                    |   27 -
 target/mips/tcg/msa.decode                         |  247 +-
 target/mips/tcg/msa_helper.c                       |  459 +--
 target/mips/tcg/msa_translate.c                    | 2638 ++++----------
 target/mips/tcg/nanomips_translate.c.inc           |   34 +-
 target/mips/tcg/op_helper.c                        |  118 -
 target/mips/tcg/rel6.decode                        |   49 +
 target/mips/tcg/rel6_translate.c                   |   20 +-
 target/mips/tcg/sysemu/special_helper.c            |    1 +
 target/mips/tcg/sysemu/tlb_helper.c                |   18 +
 target/mips/tcg/tcg-internal.h                     |   16 +-
 target/mips/tcg/translate.c                        |  446 +--
 target/mips/tcg/translate.h                        |   29 +
 target/mips/tcg/tx79.decode                        |   14 +-
 target/mips/tcg/tx79_translate.c                   |   70 +-
 target/mips/tcg/user/meson.build                   |    3 -
 target/mips/tcg/user/tlb_helper.c                  |   64 -
 target/mips/tcg/vr54xx.decode                      |   27 +
 target/mips/tcg/vr54xx_helper.c                    |  142 +
 target/mips/tcg/vr54xx_helper.h.inc                |   24 +
 target/mips/tcg/vr54xx_translate.c                 |   72 +
 target/nios2/cpu.c                                 |   27 +-
 target/nios2/cpu.h                                 |   24 +-
 target/nios2/helper.c                              |    7 +-
 target/nios2/helper.h                              |    6 +-
 target/nios2/meson.build                           |    3 +-
 target/nios2/mmu.c                                 |  257 +-
 target/nios2/mmu.h                                 |    3 +-
 target/nios2/nios2-semi.c                          |    4 +-
 target/nios2/op_helper.c                           |   29 -
 target/nios2/trace-events                          |   10 +
 target/nios2/translate.c                           |   99 +-
 target/openrisc/cpu.c                              |    4 +-
 target/openrisc/cpu.h                              |   31 +-
 target/openrisc/interrupt.c                        |    3 +-
 target/openrisc/machine.c                          |    1 -
 target/openrisc/meson.build                        |    8 +-
 target/openrisc/mmu.c                              |   10 +-
 target/openrisc/translate.c                        |   20 +-
 target/ppc/arch_dump.c                             |    2 +-
 target/ppc/cpu-models.c                            |   57 +-
 target/ppc/cpu-models.h                            |   24 +-
 target/ppc/cpu-qom.h                               |   37 +-
 target/ppc/cpu.c                                   |   32 +-
 target/ppc/cpu.h                                   |  257 +-
 target/ppc/cpu_init.c                              | 3114 ++++-------------
 target/ppc/dfp_helper.c                            |  168 +-
 target/ppc/excp_helper.c                           | 1812 +++++++---
 target/ppc/fpu_helper.c                            |  970 +++---
 target/ppc/gdbstub.c                               |   40 +-
 target/ppc/helper.h                                |  323 +-
 target/ppc/helper_regs.c                           |  452 ++-
 target/ppc/insn32.decode                           |  579 ++++
 target/ppc/insn64.decode                           |  104 +
 target/ppc/int_helper.c                            |  730 ++--
 target/ppc/internal.h                              |   56 +-
 target/ppc/machine.c                               |  145 +-
 target/ppc/mem_helper.c                            |    1 -
 target/ppc/meson.build                             |    9 +-
 target/ppc/mfrom_table.c.inc                       |   78 -
 target/ppc/mfrom_table_gen.c                       |   34 -
 target/ppc/misc_helper.c                           |   50 +-
 target/ppc/mmu-hash32.c                            |   48 +-
 target/ppc/mmu-hash32.h                            |    9 -
 target/ppc/mmu-hash64.c                            |    4 +-
 target/ppc/mmu-hash64.h                            |    5 +
 target/ppc/mmu-radix64.c                           |   99 +-
 target/ppc/mmu-radix64.h                           |    1 +
 target/ppc/mmu_common.c                            | 1549 +++++++++
 target/ppc/mmu_helper.c                            | 1923 +----------
 target/ppc/monitor.c                               |    9 +-
 target/ppc/power8-pmu-regs.c.inc                   |  325 ++
 target/ppc/power8-pmu.c                            |  351 ++
 target/ppc/power8-pmu.h                            |   24 +
 target/ppc/spr_common.h                            |  209 ++
 target/ppc/spr_tcg.h                               |  136 -
 target/ppc/timebase_helper.c                       |   30 +-
 target/ppc/trace-events                            |    8 +
 target/ppc/translate.c                             | 1546 ++-------
 target/ppc/translate/branch-impl.c.inc             |   33 +
 target/ppc/translate/dfp-impl.c.inc                |  419 ++-
 target/ppc/translate/dfp-ops.c.inc                 |  165 -
 target/ppc/translate/fixedpoint-impl.c.inc         |  239 +-
 target/ppc/translate/fp-impl.c.inc                 |  463 +--
 target/ppc/translate/fp-ops.c.inc                  |   29 -
 target/ppc/translate/vector-impl.c.inc             |   56 -
 target/ppc/translate/vmx-impl.c.inc                | 1917 ++++++++++-
 target/ppc/translate/vmx-ops.c.inc                 |   69 +-
 target/ppc/translate/vsx-impl.c.inc                | 1576 ++++++---
 target/ppc/translate/vsx-ops.c.inc                 |   76 -
 target/ppc/user_only_helper.c                      |   15 +-
 target/riscv/XVentanaCondOps.decode                |   25 +
 target/riscv/bitmanip_helper.c                     |   65 +-
 target/riscv/cpu.c                                 |  503 ++-
 target/riscv/cpu.h                                 |  404 ++-
 target/riscv/cpu_bits.h                            |  275 +-
 target/riscv/cpu_helper.c                          |  594 +++-
 target/riscv/csr.c                                 | 2096 +++++++++--
 target/riscv/fpu_helper.c                          |  295 +-
 target/riscv/gdbstub.c                             |  271 +-
 target/riscv/helper.h                              |  491 ++-
 target/riscv/insn16.decode                         |   27 +-
 target/riscv/insn32.decode                         |  480 +--
 target/riscv/insn_trans/trans_privileged.c.inc     |   19 +-
 target/riscv/insn_trans/trans_rva.c.inc            |   71 +-
 target/riscv/insn_trans/trans_rvb.c.inc            |  516 +--
 target/riscv/insn_trans/trans_rvd.c.inc            |  377 +-
 target/riscv/insn_trans/trans_rvf.c.inc            |  424 ++-
 target/riscv/insn_trans/trans_rvh.c.inc            |  266 +-
 target/riscv/insn_trans/trans_rvi.c.inc            |  941 +++--
 target/riscv/insn_trans/trans_rvm.c.inc            |  375 +-
 target/riscv/insn_trans/trans_rvv.c.inc            | 2828 +++++++++------
 target/riscv/insn_trans/trans_rvzfh.c.inc          |  679 ++++
 target/riscv/insn_trans/trans_svinval.c.inc        |   75 +
 .../riscv/insn_trans/trans_xventanacondops.c.inc   |   39 +
 target/riscv/internals.h                           |   66 +-
 target/riscv/kvm-stub.c                            |   30 +
 target/riscv/kvm.c                                 |  535 +++
 target/riscv/kvm_riscv.h                           |   25 +
 target/riscv/m128_helper.c                         |  109 +
 target/riscv/machine.c                             |  173 +-
 target/riscv/meson.build                           |    3 +
 target/riscv/monitor.c                             |    4 +-
 target/riscv/op_helper.c                           |   70 +-
 target/riscv/pmp.c                                 |   12 +-
 target/riscv/pmp.h                                 |    2 +
 target/riscv/sbi_ecall_interface.h                 |   72 +
 target/riscv/translate.c                           | 1300 ++++---
 target/riscv/vector_helper.c                       | 3623 ++++++++++----------
 target/rx/cpu-qom.h                                |    5 +-
 target/rx/cpu.c                                    |    2 +-
 target/rx/cpu.h                                    |   15 +-
 target/rx/helper.c                                 |    4 +
 target/rx/helper.h                                 |    1 -
 target/rx/op_helper.c                              |    8 -
 target/rx/translate.c                              |   12 +-
 target/s390x/cpu-dump.c                            |    3 +-
 target/s390x/cpu-qom.h                             |    7 +-
 target/s390x/cpu-sysemu.c                          |    3 +-
 target/s390x/cpu.c                                 |    7 +-
 target/s390x/cpu.h                                 |   23 +-
 target/s390x/cpu_models.c                          |   11 +-
 target/s390x/gen-features.c                        |   14 +-
 target/s390x/helper.h                              |    7 +-
 target/s390x/ioinst.c                              |    2 +-
 target/s390x/kvm/kvm.c                             |    4 +
 target/s390x/mmu_helper.c                          |   70 +-
 target/s390x/s390x-internal.h                      |   19 +-
 target/s390x/sigp.c                                |   30 +-
 target/s390x/tcg/cc_helper.c                       |   46 +-
 target/s390x/tcg/excp_helper.c                     |   59 +-
 target/s390x/tcg/insn-data.def                     |   96 +-
 target/s390x/tcg/mem_helper.c                      |  127 +-
 target/s390x/tcg/misc_helper.c                     |   15 +-
 target/s390x/tcg/translate.c                       |  160 +-
 target/s390x/tcg/translate_vx.c.inc                |   20 +-
 target/sh4/README.sh4                              |  150 -
 target/sh4/cpu-qom.h                               |    3 +-
 target/sh4/cpu.c                                   |    4 +-
 target/sh4/cpu.h                                   |   28 +-
 target/sh4/helper.c                                |   14 +-
 target/sh4/helper.h                                |    1 -
 target/sh4/op_helper.c                             |   10 +-
 target/sh4/translate.c                             |   82 +-
 target/sparc/cpu-qom.h                             |    3 +-
 target/sparc/cpu.c                                 |    8 +-
 target/sparc/cpu.h                                 |   12 +-
 target/sparc/helper.c                              |    1 +
 target/sparc/ldst_helper.c                         |   39 +-
 target/sparc/machine.c                             |    4 -
 target/sparc/meson.build                           |    2 +-
 target/sparc/mmu_helper.c                          |  116 +-
 target/sparc/translate.c                           |   63 +-
 target/tricore/cpu-qom.h                           |    3 +-
 target/tricore/cpu.h                               |   12 +-
 target/tricore/helper.c                            |    2 +-
 target/tricore/helper.h                            |    1 -
 target/tricore/op_helper.c                         |    7 -
 target/tricore/translate.c                         |   18 +-
 target/xtensa/cores.list                           |    9 +
 target/xtensa/cpu-qom.h                            |    3 +-
 target/xtensa/cpu.c                                |    4 +-
 target/xtensa/cpu.h                                |   21 +-
 target/xtensa/dbg_helper.c                         |    1 +
 target/xtensa/exc_helper.c                         |    8 +-
 target/xtensa/fpu_helper.c                         |    1 +
 target/xtensa/helper.c                             |   23 +-
 target/xtensa/import_core.sh                       |    3 +
 target/xtensa/meson.build                          |    4 +-
 target/xtensa/mmu_helper.c                         |    3 +-
 target/xtensa/translate.c                          |   34 +-
 target/xtensa/win_helper.c                         |    1 +
 tcg/README                                         |    6 +
 tcg/aarch64/tcg-target.c.inc                       |  115 +-
 tcg/aarch64/tcg-target.h                           |    5 +-
 tcg/arm/tcg-target.c.inc                           |  914 ++---
 tcg/arm/tcg-target.h                               |   34 +-
 tcg/i386/tcg-target-con-set.h                      |    1 +
 tcg/i386/tcg-target.c.inc                          |  529 ++-
 tcg/i386/tcg-target.h                              |   19 +-
 tcg/i386/tcg-target.opc.h                          |    3 +
 tcg/loongarch64/tcg-insn-defs.c.inc                |  979 ++++++
 tcg/loongarch64/tcg-target-con-set.h               |   31 +
 tcg/loongarch64/tcg-target-con-str.h               |   28 +
 tcg/loongarch64/tcg-target.c.inc                   | 1744 ++++++++++
 tcg/loongarch64/tcg-target.h                       |  178 +
 tcg/mips/tcg-target.c.inc                          |  520 ++-
 tcg/mips/tcg-target.h                              |   14 +-
 tcg/optimize.c                                     | 2653 ++++++++------
 tcg/ppc/tcg-target.c.inc                           |  178 +-
 tcg/ppc/tcg-target.h                               |    5 +-
 tcg/region.c                                       |   95 +-
 tcg/riscv/tcg-target.c.inc                         |   99 +-
 tcg/riscv/tcg-target.h                             |    2 -
 tcg/s390/tcg-target-con-set.h                      |   29 -
 tcg/s390/tcg-target-con-str.h                      |   28 -
 tcg/s390/tcg-target.c.inc                          | 2587 --------------
 tcg/s390/tcg-target.h                              |  165 -
 tcg/s390x/tcg-target-con-set.h                     |   36 +
 tcg/s390x/tcg-target-con-str.h                     |   29 +
 tcg/s390x/tcg-target.c.inc                         | 3484 +++++++++++++++++++
 tcg/s390x/tcg-target.h                             |  187 +
 tcg/s390x/tcg-target.opc.h                         |   15 +
 tcg/sparc/tcg-target.c.inc                         |  448 ++-
 tcg/tcg-ldst.c.inc                                 |    2 +-
 tcg/tcg-op-gvec.c                                  |  146 +
 tcg/tcg-op-vec.c                                   |   64 +-
 tcg/tcg-op.c                                       |   64 +-
 tcg/tcg.c                                          |  118 +-
 tcg/tci.c                                          |   51 +-
 tcg/tci/tcg-target.c.inc                           |    7 +-
 tests/Makefile.include                             |   58 +-
 tests/acceptance/README.rst                        |   10 -
 tests/acceptance/avocado_qemu/__init__.py          |  564 ---
 tests/acceptance/boot_linux.py                     |  138 -
 tests/acceptance/boot_linux_console.py             | 1221 -------
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 tests/qemu-iotests/109.out                         |   60 +-
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 tests/qemu-iotests/115                             |    2 +-
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 tests/qemu-iotests/165                             |    3 +-
 tests/qemu-iotests/172.out                         |   26 -
 tests/qemu-iotests/173                             |    2 +-
 tests/qemu-iotests/176                             |    2 +-
 tests/qemu-iotests/182                             |    2 +-
 tests/qemu-iotests/185                             |  190 +-
 tests/qemu-iotests/185.out                         |   48 +
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 tests/qemu-iotests/216                             |    8 +-
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 tests/qemu-iotests/222.out                         |   67 -
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 tests/qemu-iotests/229                             |    2 +-
 tests/qemu-iotests/231                             |    2 +-
 tests/qemu-iotests/233                             |   99 +-
 tests/qemu-iotests/233.out                         |   58 +-
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 tests/qemu-iotests/237                             |    3 +-
 tests/qemu-iotests/237.out                         |   12 +-
 tests/qemu-iotests/241                             |    6 +-
 tests/qemu-iotests/241.out                         |    6 +
 tests/qemu-iotests/242                             |   10 +-
 tests/qemu-iotests/242.out                         |   10 +-
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 tests/qemu-iotests/257.out                         |  224 ++
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 tests/qemu-iotests/260                             |    3 +-
 tests/qemu-iotests/261                             |    2 +-
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 tests/qemu-iotests/274                             |   20 +-
 tests/qemu-iotests/274.out                         |   68 +-
 tests/qemu-iotests/280                             |    2 +-
 tests/qemu-iotests/280.out                         |    2 -
 tests/qemu-iotests/281                             |  104 +-
 tests/qemu-iotests/281.out                         |    4 +-
 tests/qemu-iotests/283                             |   38 +-
 tests/qemu-iotests/283.out                         |    6 +-
 tests/qemu-iotests/287                             |   10 +-
 tests/qemu-iotests/290                             |    2 +-
 tests/qemu-iotests/296                             |   20 +-
 tests/qemu-iotests/296.out                         |   27 +-
 tests/qemu-iotests/297                             |  118 +-
 tests/qemu-iotests/300                             |   14 +-
 tests/qemu-iotests/302                             |    4 +-
 tests/qemu-iotests/302.out                         |    7 +-
 tests/qemu-iotests/303                             |   28 +-
 tests/qemu-iotests/303.out                         |   30 +-
 tests/qemu-iotests/308                             |   27 +-
 tests/qemu-iotests/308.out                         |    2 +-
 tests/qemu-iotests/310                             |   33 +-
 tests/qemu-iotests/check                           |   26 +-
 tests/qemu-iotests/common.filter                   |   76 +-
 tests/qemu-iotests/common.qemu                     |    7 +-
 tests/qemu-iotests/common.rc                       |   79 +-
 tests/qemu-iotests/common.tls                      |   31 +-
 tests/qemu-iotests/iotests.py                      |  495 ++-
 tests/qemu-iotests/linters.py                      |  105 +
 tests/qemu-iotests/meson.build                     |   33 +-
 tests/qemu-iotests/mypy.ini                        |   12 +
 tests/qemu-iotests/pylintrc                        |   22 +-
 tests/qemu-iotests/socket_scm_helper.c             |  136 -
 tests/qemu-iotests/testenv.py                      |   77 +-
 tests/qemu-iotests/testrunner.py                   |  187 +-
 tests/qemu-iotests/tests/block-status-cache        |  135 +
 tests/qemu-iotests/tests/block-status-cache.out    |    5 +
 tests/qemu-iotests/tests/graph-changes-while-io    |   90 +
 .../qemu-iotests/tests/graph-changes-while-io.out  |    5 +
 tests/qemu-iotests/tests/image-fleecing            |  302 ++
 tests/qemu-iotests/tests/image-fleecing.out        |  358 ++
 .../tests/migrate-bitmaps-postcopy-test            |   16 +-
 tests/qemu-iotests/tests/migrate-bitmaps-test      |   90 +-
 tests/qemu-iotests/tests/migrate-during-backup     |   97 +
 tests/qemu-iotests/tests/migrate-during-backup.out |    5 +
 tests/qemu-iotests/tests/migration-permissions     |  101 +
 tests/qemu-iotests/tests/migration-permissions.out |    5 +
 tests/qemu-iotests/tests/mirror-ready-cancel-error |  146 +
 .../tests/mirror-ready-cancel-error.out            |    5 +
 tests/qemu-iotests/tests/mirror-top-perms          |   27 +-
 tests/qemu-iotests/tests/nbd-reconnect-on-open     |   71 +
 tests/qemu-iotests/tests/nbd-reconnect-on-open.out |   11 +
 tests/qemu-iotests/tests/parallels-read-bitmap     |    6 +-
 tests/qemu-iotests/tests/qsd-jobs.out              |    2 +-
 .../qemu-iotests/tests/remove-bitmap-from-backing  |   17 +-
 tests/qemu-iotests/tests/stream-error-on-reset     |  140 +
 tests/qemu-iotests/tests/stream-error-on-reset.out |    5 +
 tests/qtest/acpi-utils.c                           |   14 +
 tests/qtest/am53c974-test.c                        |   66 +
 tests/qtest/arm-cpu-features.c                     |   42 +-
 tests/qtest/bios-tables-test.c                     |  249 +-
 tests/qtest/boot-order-test.c                      |    5 +
 tests/qtest/boot-serial-test.c                     |   15 +-
 tests/qtest/cdrom-test.c                           |   70 +-
 tests/qtest/dbus-display-test.c                    |  257 ++
 tests/qtest/dbus-vmstate1.xml                      |   12 -
 tests/qtest/device-plug-test.c                     |   37 +-
 tests/qtest/drive_del-test.c                       |   35 +-
 tests/qtest/e1000e-test.c                          |    4 +-
 tests/qtest/endianness-test.c                      |    5 +-
 tests/qtest/erst-test.c                            |  164 +
 tests/qtest/fdc-test.c                             |    2 +-
 tests/qtest/fuzz-lsi53c895a-test.c                 |   52 +
 tests/qtest/fuzz-megasas-test.c                    |   30 +
 tests/qtest/fuzz-sdcard-test.c                     |   76 +
 tests/qtest/fuzz-xlnx-dp-test.c                    |   33 +
 tests/qtest/fuzz/generic_fuzz.c                    |   55 +-
 tests/qtest/fuzz/meson.build                       |    6 +-
 tests/qtest/hd-geo-test.c                          |   24 +-


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen master] main loop: Big hammer to fix logfile disk DoS in Xen setups
Message-Id: <E1o1dH6-00077R-9L@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:22:16 +0000

commit 9a5e4bc76058766962ab3ff13f42c1d39a8e08d3
Author:     Ian Jackson <ian.jackson@eu.citrix.com>
AuthorDate: Thu May 26 16:21:56 2016 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Wed Jun 15 14:38:48 2022 +0100

    main loop: Big hammer to fix logfile disk DoS in Xen setups
    
    Each time round the main loop, we now fstat stderr.  If it is too big,
    we dup2 /dev/null onto it.  This is not a very pretty patch but it is
    very simple, easy to see that it's correct, and has a low risk of
    collateral damage.
    
    There is no limit by default but can be adjusted by setting a new
    environment variable.
    
    This fixes CVE-2014-3672.
    
    Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
    Tested-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
    
    Set the default to 0 so that it won't affect non-xen installation. The
    limit will be set by Xen toolstack.
    
    Signed-off-by: Wei Liu <wei.liu2@citrix.com>
    Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
    Acked-by: Anthony PERARD <anthony.perard@citrix.com>
    (cherry picked from commit 44a072f0de0d57c95c2212bbce02888832b7b74f)
    (cherry picked from commit 269381bb635692856aa8789a3f322e543e0c648d)
---
 util/main-loop.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/util/main-loop.c b/util/main-loop.c
index b7b0ce4ca0..214b7153e3 100644
--- a/util/main-loop.c
+++ b/util/main-loop.c
@@ -184,6 +184,50 @@ int qemu_init_main_loop(Error **errp)
     return 0;
 }
 
+static void check_cve_2014_3672_xen(void)
+{
+    static unsigned long limit = ~0UL;
+    const int fd = 2;
+    struct stat stab;
+
+    if (limit == ~0UL) {
+        const char *s = getenv("XEN_QEMU_CONSOLE_LIMIT");
+        /* XEN_QEMU_CONSOLE_LIMIT=0 means no limit */
+        limit = s ? strtoul(s,0,0) : 0;
+    }
+    if (limit == 0)
+        return;
+
+    int r = fstat(fd, &stab);
+    if (r) {
+        perror("fstat stderr (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    if (!S_ISREG(stab.st_mode))
+        return;
+    if (stab.st_size <= limit)
+        return;
+
+    /* oh dear */
+    fprintf(stderr,"\r\n"
+            "Closing stderr due to CVE-2014-3672 limit. "
+            " Set XEN_QEMU_CONSOLE_LIMIT to number of bytes to override,"
+            " or 0 for no limit.\n");
+    fflush(stderr);
+
+    int nfd = open("/dev/null", O_WRONLY);
+    if (nfd < 0) {
+        perror("open /dev/null (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    r = dup2(nfd, fd);
+    if (r != fd) {
+        perror("dup2 /dev/null (for CVE-2014-3672 check)");
+        exit(-1);
+    }
+    close(nfd);
+}
+
 static int max_priority;
 
 #ifndef _WIN32
@@ -242,6 +286,8 @@ static int os_host_main_loop_wait(int64_t timeout)
 
     g_main_context_acquire(context);
 
+    check_cve_2014_3672_xen();
+
     glib_pollfds_fill(&timeout);
 
     qemu_mutex_unlock_iothread();
@@ -414,6 +460,8 @@ static int os_host_main_loop_wait(int64_t timeout)
 
     g_main_context_acquire(context);
 
+    check_cve_2014_3672_xen();
+
     /* XXX: need to suppress polling by better using win32 events */
     ret = 0;
     for (pe = first_polling_entry; pe != NULL; pe = pe->next) {
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Sync sysregs and cpuinfo with Linux 5.18-rc3
Message-Id: <E1o1ddg-0002Kk-79@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:45:36 +0000

commit d9094358f821cd24ac9d9799b7fe66cc3d614f80
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:11 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:13 2022 -0700

    xen/arm: Sync sysregs and cpuinfo with Linux 5.18-rc3
    
    Sync existing ID registers sanitization with the status of Linux kernel
    version 5.18-rc3 and add sanitization of ISAR2 registers.
    
    Sync sysregs.h bit shift defintions with the status of Linux kernel
    version 5.18-rc3.
    
    Changes in this patch are splitted in a number of patches in Linux
    kernel and, as the previous synchronisation point was not clear, the
    changes are done in one patch with a status possible to compare easily
    by diffing Xen files to Linux kernel files.
    
    Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git b2d229d4ddb1
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/arm64/cpufeature.c          | 18 ++++++--
 xen/arch/arm/include/asm/arm64/sysregs.h | 76 +++++++++++++++++++++++++++-----
 2 files changed, 80 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/arm64/cpufeature.c b/xen/arch/arm/arm64/cpufeature.c
index 6e5d30dc7b..d9039d37b2 100644
--- a/xen/arch/arm/arm64/cpufeature.c
+++ b/xen/arch/arm/arm64/cpufeature.c
@@ -143,6 +143,16 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
 	ARM64_FTR_END,
 };
 
+static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_CLEARBHB_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
+		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_APA3_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
+	ARM64_FTR_END,
+};
+
 static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_CSV3_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_CSV2_SHIFT, 4, 0),
@@ -158,8 +168,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
 	S_ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR0_FP_SHIFT, 4, ID_AA64PFR0_FP_NI),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL3_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL2_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_SHIFT, 4, ID_AA64PFR0_EL1_64BIT_ONLY),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL0_SHIFT, 4, ID_AA64PFR0_EL0_64BIT_ONLY),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_SHIFT, 4, ID_AA64PFR0_ELx_64BIT_ONLY),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL0_SHIFT, 4, ID_AA64PFR0_ELx_64BIT_ONLY),
 	ARM64_FTR_END,
 };
 
@@ -197,7 +207,7 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_FGT_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_EXS_SHIFT, 4, 0),
 	/*
@@ -243,6 +253,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64mmfr1[] = {
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_AFP_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_ETS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_TWED_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_XNX_SHIFT, 4, 0),
@@ -588,6 +599,7 @@ void update_system_features(const struct cpuinfo_arm *new)
 
 	SANITIZE_ID_REG(isa64, 0, aa64isar0);
 	SANITIZE_ID_REG(isa64, 1, aa64isar1);
+	SANITIZE_ID_REG(isa64, 2, aa64isar2);
 
 	SANITIZE_ID_REG(zfr64, 0, aa64zfr0);
 
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index eac08ed33f..54670084c3 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -144,6 +144,30 @@
 
 /* id_aa64isar2 */
 #define ID_AA64ISAR2_CLEARBHB_SHIFT 28
+#define ID_AA64ISAR2_APA3_SHIFT     12
+#define ID_AA64ISAR2_GPA3_SHIFT     8
+#define ID_AA64ISAR2_RPRES_SHIFT    4
+#define ID_AA64ISAR2_WFXT_SHIFT     0
+
+#define ID_AA64ISAR2_RPRES_8BIT     0x0
+#define ID_AA64ISAR2_RPRES_12BIT    0x1
+/*
+ * Value 0x1 has been removed from the architecture, and is
+ * reserved, but has not yet been removed from the ARM ARM
+ * as of ARM DDI 0487G.b.
+ */
+#define ID_AA64ISAR2_WFXT_NI        0x0
+#define ID_AA64ISAR2_WFXT_SUPPORTED 0x2
+
+#define ID_AA64ISAR2_APA3_NI                  0x0
+#define ID_AA64ISAR2_APA3_ARCHITECTED         0x1
+#define ID_AA64ISAR2_APA3_ARCH_EPAC           0x2
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2          0x3
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2_FPAC     0x4
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2_FPAC_CMB 0x5
+
+#define ID_AA64ISAR2_GPA3_NI             0x0
+#define ID_AA64ISAR2_GPA3_ARCHITECTED    0x1
 
 /* id_aa64pfr0 */
 #define ID_AA64PFR0_CSV3_SHIFT       60
@@ -165,14 +189,13 @@
 #define ID_AA64PFR0_AMU              0x1
 #define ID_AA64PFR0_SVE              0x1
 #define ID_AA64PFR0_RAS_V1           0x1
+#define ID_AA64PFR0_RAS_V1P1         0x2
 #define ID_AA64PFR0_FP_NI            0xf
 #define ID_AA64PFR0_FP_SUPPORTED     0x0
 #define ID_AA64PFR0_ASIMD_NI         0xf
 #define ID_AA64PFR0_ASIMD_SUPPORTED  0x0
-#define ID_AA64PFR0_EL1_64BIT_ONLY   0x1
-#define ID_AA64PFR0_EL1_32BIT_64BIT  0x2
-#define ID_AA64PFR0_EL0_64BIT_ONLY   0x1
-#define ID_AA64PFR0_EL0_32BIT_64BIT  0x2
+#define ID_AA64PFR0_ELx_64BIT_ONLY   0x1
+#define ID_AA64PFR0_ELx_32BIT_64BIT  0x2
 
 /* id_aa64pfr1 */
 #define ID_AA64PFR1_MPAMFRAC_SHIFT   16
@@ -189,6 +212,7 @@
 #define ID_AA64PFR1_MTE_NI           0x0
 #define ID_AA64PFR1_MTE_EL0          0x1
 #define ID_AA64PFR1_MTE              0x2
+#define ID_AA64PFR1_MTE_ASYMM        0x3
 
 /* id_aa64zfr0 */
 #define ID_AA64ZFR0_F64MM_SHIFT      56
@@ -228,17 +252,37 @@
 #define ID_AA64MMFR0_ASID_SHIFT      4
 #define ID_AA64MMFR0_PARANGE_SHIFT   0
 
-#define ID_AA64MMFR0_TGRAN4_NI         0xf
-#define ID_AA64MMFR0_TGRAN4_SUPPORTED  0x0
-#define ID_AA64MMFR0_TGRAN64_NI        0xf
-#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
-#define ID_AA64MMFR0_TGRAN16_NI        0x0
-#define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
+#define ID_AA64MMFR0_ASID_8          0x0
+#define ID_AA64MMFR0_ASID_16         0x2
+
+#define ID_AA64MMFR0_TGRAN4_NI             0xf
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN  0x0
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX  0x7
+#define ID_AA64MMFR0_TGRAN64_NI            0xf
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN 0x0
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX 0x7
+#define ID_AA64MMFR0_TGRAN16_NI            0x0
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN 0x1
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX 0xf
+
+#define ID_AA64MMFR0_PARANGE_32        0x0
+#define ID_AA64MMFR0_PARANGE_36        0x1
+#define ID_AA64MMFR0_PARANGE_40        0x2
+#define ID_AA64MMFR0_PARANGE_42        0x3
+#define ID_AA64MMFR0_PARANGE_44        0x4
 #define ID_AA64MMFR0_PARANGE_48        0x5
 #define ID_AA64MMFR0_PARANGE_52        0x6
 
+#define ARM64_MIN_PARANGE_BITS     32
+
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT 0x0
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE    0x1
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN     0x2
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MAX     0x7
+
 /* id_aa64mmfr1 */
 #define ID_AA64MMFR1_ECBHB_SHIFT     60
+#define ID_AA64MMFR1_AFP_SHIFT       44
 #define ID_AA64MMFR1_ETS_SHIFT       36
 #define ID_AA64MMFR1_TWED_SHIFT      32
 #define ID_AA64MMFR1_XNX_SHIFT       28
@@ -271,6 +315,9 @@
 #define ID_AA64MMFR2_CNP_SHIFT       0
 
 /* id_aa64dfr0 */
+#define ID_AA64DFR0_MTPMU_SHIFT      48
+#define ID_AA64DFR0_TRBE_SHIFT       44
+#define ID_AA64DFR0_TRACE_FILT_SHIFT 40
 #define ID_AA64DFR0_DOUBLELOCK_SHIFT 36
 #define ID_AA64DFR0_PMSVER_SHIFT     32
 #define ID_AA64DFR0_CTX_CMPS_SHIFT   28
@@ -284,11 +331,18 @@
 #define ID_AA64DFR0_PMUVER_8_1       0x4
 #define ID_AA64DFR0_PMUVER_8_4       0x5
 #define ID_AA64DFR0_PMUVER_8_5       0x6
+#define ID_AA64DFR0_PMUVER_8_7       0x7
 #define ID_AA64DFR0_PMUVER_IMP_DEF   0xf
 
+#define ID_AA64DFR0_PMSVER_8_2      0x1
+#define ID_AA64DFR0_PMSVER_8_3      0x2
+
 #define ID_DFR0_PERFMON_SHIFT        24
 
-#define ID_DFR0_PERFMON_8_1          0x4
+#define ID_DFR0_PERFMON_8_0         0x3
+#define ID_DFR0_PERFMON_8_1         0x4
+#define ID_DFR0_PERFMON_8_4         0x5
+#define ID_DFR0_PERFMON_8_5         0x6
 
 #define ID_ISAR4_SWP_FRAC_SHIFT        28
 #define ID_ISAR4_PSR_M_SHIFT           24
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Add sb instruction support
Message-Id: <E1o1dds-0002N2-Ct@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:45:48 +0000

commit fabbe7e0feae3bb2a93eba272e19bbb2baa12813
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:12 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:40 2022 -0700

    xen/arm: Add sb instruction support
    
    This patch is adding sb instruction support when it is supported by a
    CPU on arm64.
    A new cpu feature capability system is introduced to enable alternative
    code using sb instruction when it is supported by the processor. This is
    decided based on the isa64 system register value and use a new hardware
    capability ARM_HAS_SB.
    
    The sb instruction is encoded using its hexadecimal value to avoid
    recursive macro and support old compilers not having support for sb
    instruction.
    
    Arm32 instruction support is added but it is not enabled at the moment
    due to the lack of hardware supporting it.
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/cpufeature.c             | 28 ++++++++++++++++++++++++++++
 xen/arch/arm/include/asm/cpufeature.h |  6 +++++-
 xen/arch/arm/include/asm/macros.h     | 19 ++++++++++++++++++-
 xen/arch/arm/setup.c                  |  3 +++
 xen/arch/arm/smpboot.c                |  1 +
 5 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c
index a58965f7b9..62d5e1770a 100644
--- a/xen/arch/arm/cpufeature.c
+++ b/xen/arch/arm/cpufeature.c
@@ -26,6 +26,24 @@ DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS);
 
 struct cpuinfo_arm __read_mostly guest_cpuinfo;
 
+#ifdef CONFIG_ARM_64
+static bool has_sb_instruction(const struct arm_cpu_capabilities *entry)
+{
+    return system_cpuinfo.isa64.sb;
+}
+#endif
+
+static const struct arm_cpu_capabilities arm_features[] = {
+#ifdef CONFIG_ARM_64
+    {
+        .desc = "Speculation barrier instruction (SB)",
+        .capability = ARM_HAS_SB,
+        .matches = has_sb_instruction,
+    },
+#endif
+    {},
+};
+
 void update_cpu_capabilities(const struct arm_cpu_capabilities *caps,
                              const char *info)
 {
@@ -70,6 +88,16 @@ void __init enable_cpu_capabilities(const struct arm_cpu_capabilities *caps)
     }
 }
 
+void check_local_cpu_features(void)
+{
+    update_cpu_capabilities(arm_features, "enabled support for");
+}
+
+void __init enable_cpu_features(void)
+{
+    enable_cpu_capabilities(arm_features);
+}
+
 /*
  * Run through the enabled capabilities and enable() them on the calling CPU.
  * If enabling of any capability fails the error is returned. After enabling a
diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
index f7368766c0..24c01d2b9d 100644
--- a/xen/arch/arm/include/asm/cpufeature.h
+++ b/xen/arch/arm/include/asm/cpufeature.h
@@ -67,8 +67,9 @@
 #define ARM_WORKAROUND_BHB_LOOP_24 13
 #define ARM_WORKAROUND_BHB_LOOP_32 14
 #define ARM_WORKAROUND_BHB_SMCC_3 15
+#define ARM_HAS_SB 16
 
-#define ARM_NCAPS           16
+#define ARM_NCAPS           17
 
 #ifndef __ASSEMBLY__
 
@@ -78,6 +79,9 @@
 
 extern DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS);
 
+void check_local_cpu_features(void);
+void enable_cpu_features(void);
+
 static inline bool cpus_have_cap(unsigned int num)
 {
     if ( num >= ARM_NCAPS )
diff --git a/xen/arch/arm/include/asm/macros.h b/xen/arch/arm/include/asm/macros.h
index 1aa373760f..dc791245df 100644
--- a/xen/arch/arm/include/asm/macros.h
+++ b/xen/arch/arm/include/asm/macros.h
@@ -5,13 +5,30 @@
 # error "This file should only be included in assembly file"
 #endif
 
+#include <asm/alternative.h>
+
     /*
      * Speculative barrier
-     * XXX: Add support for the 'sb' instruction
      */
     .macro sb
+alternative_if_not ARM_HAS_SB
     dsb nsh
     isb
+alternative_else
+    /*
+     * SB encoding in hexadecimal to prevent recursive macro.
+     * extra nop is required to keep same number of instructions on both sides
+     * of the alternative.
+     */
+#if defined(CONFIG_ARM_32)
+    .inst 0xf57ff070
+#elif defined(CONFIG_ARM_64)
+    .inst 0xd50330ff
+#else
+#   error "missing sb encoding for ARM variant"
+#endif
+    nop
+alternative_endif
     .endm
 
 #if defined (CONFIG_ARM_32)
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 6016471d37..577c54e6fb 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -964,6 +964,8 @@ void __init start_xen(unsigned long boot_phys_offset,
      */
     check_local_cpu_errata();
 
+    check_local_cpu_features();
+
     init_xen_time();
 
     gic_init();
@@ -1033,6 +1035,7 @@ void __init start_xen(unsigned long boot_phys_offset,
      */
     apply_alternatives_all();
     enable_errata_workarounds();
+    enable_cpu_features();
 
     /* Create initial domain 0. */
     if ( !is_dom0less_mode() )
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 22fede6600..3f62f3a44f 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -395,6 +395,7 @@ void start_secondary(void)
     local_abort_enable();
 
     check_local_cpu_errata();
+    check_local_cpu_features();
 
     printk(XENLOG_DEBUG "CPU %u booted.\n", smp_processor_id());
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] arm: add ISAR2, MMFR0 and MMFR1 fields in cpufeature
Message-Id: <E1o1de4-0002P1-8q@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:46:00 +0000

commit 9ebd9550f6bbec7f3ae474ebaad5a6f119402b6c
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:13 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:47 2022 -0700

    arm: add ISAR2, MMFR0 and MMFR1 fields in cpufeature
    
    Complete AA64ISAR2 and AA64MMFR[0-1] with more fields.
    While there add a comment for MMFR bitfields as for other registers in
    the cpuinfo structure definition.
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/cpufeature.h | 28 +++++++++++++++++++++++-----
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
index 24c01d2b9d..c86a2e7f29 100644
--- a/xen/arch/arm/include/asm/cpufeature.h
+++ b/xen/arch/arm/include/asm/cpufeature.h
@@ -234,6 +234,7 @@ struct cpuinfo_arm {
     union {
         register_t bits[3];
         struct {
+            /* MMFR0 */
             unsigned long pa_range:4;
             unsigned long asid_bits:4;
             unsigned long bigend:4;
@@ -242,18 +243,31 @@ struct cpuinfo_arm {
             unsigned long tgranule_16K:4;
             unsigned long tgranule_64K:4;
             unsigned long tgranule_4K:4;
-            unsigned long __res0:32;
-
+            unsigned long tgranule_16k_2:4;
+            unsigned long tgranule_64k_2:4;
+            unsigned long tgranule_4k_2:4;
+            unsigned long exs:4;
+            unsigned long __res0:8;
+            unsigned long fgt:4;
+            unsigned long ecv:4;
+
+            /* MMFR1 */
             unsigned long hafdbs:4;
             unsigned long vmid_bits:4;
             unsigned long vh:4;
             unsigned long hpds:4;
             unsigned long lo:4;
             unsigned long pan:4;
-            unsigned long __res1:8;
-            unsigned long __res2:28;
+            unsigned long specsei:4;
+            unsigned long xnx:4;
+            unsigned long twed:4;
+            unsigned long ets:4;
+            unsigned long __res1:4;
+            unsigned long afp:4;
+            unsigned long __res2:12;
             unsigned long ecbhb:4;
 
+            /* MMFR2 */
             unsigned long __res3:64;
         };
     } mm64;
@@ -297,7 +311,11 @@ struct cpuinfo_arm {
             unsigned long __res2:8;
 
             /* ISAR2 */
-            unsigned long __res3:28;
+            unsigned long wfxt:4;
+            unsigned long rpres:4;
+            unsigned long gpa3:4;
+            unsigned long apa3:4;
+            unsigned long __res3:12;
             unsigned long clearbhb:4;
 
             unsigned long __res4:32;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] arm: Define kconfig symbols used by arm64 cpufeatures
Message-Id: <E1o1deG-0002Qy-4i@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 00:46:12 +0000

commit 3c2a14ea81c77ae7973c1e436a32436a7e6d017b
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:14 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:56 2022 -0700

    arm: Define kconfig symbols used by arm64 cpufeatures
    
    Define kconfig symbols which are used by arm64 cpufeatures to prevent
    using undefined symbols and rely on IS_ENABLED returning false.
    All the features related to those symbols are unsupported by Xen:
    - pointer authentication
    - sve
    - memory tagging
    - branch target identification
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/Kconfig | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index a89a67802a..5900aa2efe 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -98,6 +98,34 @@ config HARDEN_BRANCH_PREDICTOR
 
 	  If unsure, say Y.
 
+config ARM64_PTR_AUTH
+	def_bool n
+	depends on ARM64
+	help
+	  Pointer authentication support.
+	  This feature is not supported in Xen.
+
+config ARM64_SVE
+	def_bool n
+	depends on ARM64
+	help
+	  Scalar Vector Extension support.
+	  This feature is not supported in Xen.
+
+config ARM64_MTE
+	def_bool n
+	depends on ARM64
+	help
+	  Memory Tagging Extension support.
+	  This feature is not supported in Xen.
+
+config ARM64_BTI
+	def_bool n
+	depends on ARM64
+	help
+	  Branch Target Identification support.
+	  This feature is not supported in Xen.
+
 config TEE
 	bool "Enable TEE mediators support (UNSUPPORTED)" if UNSUPPORTED
 	default n
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen staging] migration: Fix operator type
Message-Id: <E1o1nEK-00020L-GN@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 11:00:04 +0000

commit b746458e1ce1bec85e58b458386f8b7a0bedfaa6
Author:     Dr. David Alan Gilbert <dgilbert@redhat.com>
AuthorDate: Wed Apr 6 11:25:15 2022 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Thu Jun 16 11:58:37 2022 +0100

    migration: Fix operator type
    
    Clang spotted an & that should have been an &&; fix it.
    
    Reported by: David Binderman / https://gitlab.com/dcb
    Fixes: 65dacaa04fa ("migration: introduce save_normal_page()")
    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/963
    Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    Message-Id: <20220406102515.96320-1-dgilbert@redhat.com>
    Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Peter Xu <peterx@redhat.com>
    Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    (cherry picked from commit f912ec5b2d65644116ff496b58d7c9145c19e4c0)
---
 migration/ram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/migration/ram.c b/migration/ram.c
index 3532f64ecb..0ef4bd63eb 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -1289,7 +1289,7 @@ static int save_normal_page(RAMState *rs, RAMBlock *block, ram_addr_t offset,
                                          offset | RAM_SAVE_FLAG_PAGE));
     if (async) {
         qemu_put_buffer_async(rs->f, buf, TARGET_PAGE_SIZE,
-                              migrate_release_ram() &
+                              migrate_release_ram() &&
                               migration_in_postcopy());
     } else {
         qemu_put_buffer(rs->f, buf, TARGET_PAGE_SIZE);
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o1nZc-0003FP-1O@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 11:22:04 +0000

commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misc/xen-command-line.pandoc        |  5 ++---
 xen/arch/x86/domain.c                    | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S             |  2 +-
 xen/arch/x86/include/asm/cpufeatures.h   |  3 +--
 xen/arch/x86/include/asm/domain.h        |  3 +++
 xen/arch/x86/include/asm/spec_ctrl.h     |  2 ++
 xen/arch/x86/include/asm/spec_ctrl_asm.h | 16 ++++++++++++++--
 xen/arch/x86/spec_ctrl.c                 | 30 ++++++++++++++++++------------
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 0d1d98d715..266a11ab58 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2282,9 +2282,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index a72cc9552a..9eddeaa20b 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -864,6 +864,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -2018,14 +2020,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2089,6 +2092,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index ff3157d52d..bd45a144ee 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
index 75389e962a..ad01ee68e1 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -324,6 +324,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h
index f760295236..751355f471 100644
--- a/xen/arch/x86/include/asm/spec_ctrl.h
+++ b/xen/arch/x86/include/asm/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h b/xen/arch/x86/include/asm/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/arch/x86/include/asm/spec_ctrl_asm.h
+++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1408e4c7ab..92eb4ecd3d 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static int8_t __initdata opt_rsb_pv = -1;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __ro_after_init opt_md_clear_pv = -1;
+static int8_t __ro_after_init opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -933,6 +933,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1197,21 +1204,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o1nZm-0003Fo-4l@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 11:22:14 +0000

commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/include/asm/msr-index.h |  6 ++++++
 xen/arch/x86/spec_ctrl.c             | 11 ++++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 6c250bfcad..ea47f68d05 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -71,6 +71,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 #define  ARCH_CAPS_RRSBA                    (_AC(1, ULL) << 19)
 #define  ARCH_CAPS_BHI_NO                   (_AC(1, ULL) << 20)
 
@@ -90,6 +95,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 92eb4ecd3d..2ec3126cf0 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o1nZw-0003GN-7u@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 11:22:24 +0000

commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 266a11ab58..a92b7d228c 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2259,7 +2259,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2338,8 +2338,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 2ec3126cf0..1f275ad1fb 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __ro_after_init opt_fb_clear_mmio;
 
 static int __init cf_check parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init cf_check parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -942,7 +947,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1196,6 +1203,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1209,18 +1228,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1285,14 +1306,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o1p1c-00086N-Ma@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:04 +0000

commit 0e80f9f61168d4e4f008da75762cee0118f802ed
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:20:31 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 1d08fb7e9a..d5cb09f865 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2258,9 +2258,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index ef1812dc14..1fe6644a71 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -863,6 +863,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -2017,14 +2019,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2088,6 +2091,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index c19464da70..21730aa030 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static int8_t __initdata opt_rsb_pv = -1;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -932,6 +932,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1196,21 +1203,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index ff3157d52d..bd45a144ee 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 92d54de0b9..2398a1d99d 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -319,6 +319,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index f760295236..751355f471 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o1p1m-00087J-QT@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:14 +0000

commit a83108736db0ddaa5855f5abda6dcc8ae4fe25e9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:20:31 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 21730aa030..d285538bde 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 31964b88af..72bc32ba04 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -66,6 +66,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -83,6 +88,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.16] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o1p1w-00087p-VP@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:24 +0000

commit 2e82446cb252f6c8ac697e81f4155872c69afde4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:21:07 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index d5cb09f865..a642e43476 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2235,7 +2235,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2314,8 +2314,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index d285538bde..099113ba41 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -941,7 +946,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1195,6 +1202,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1208,18 +1227,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1284,14 +1305,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
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Subject: [xen staging-4.15] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o1p27-00088w-D1@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:35 +0000

commit 1a377949cee5f13c18fa3d0e1a6c51404f223a9a
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 1cab26fef6..e4c820e170 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2194,9 +2194,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index b212729880..4a61e951fa 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -861,6 +861,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1994,14 +1996,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2065,6 +2068,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1e226102d3..b4efc940aa 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -903,6 +903,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1148,21 +1155,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 09f619459b..9eaab7a2a1 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 7213d184b0..d0df7f83aa 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -319,6 +319,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index 9caecddfec..68f6c46c47 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o1p2H-00089V-GA@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:45 +0000

commit 680c6f4d6bbeaddfc8c686b4186f260794118e54
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index b4efc940aa..38e0cc2847 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 947778105f..1e743461e9 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -59,6 +59,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -76,6 +81,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o1p2R-0008AK-JJ@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:55:55 +0000

commit a3faf632606e54437146dbcac2c9bbb89b9a4007
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index e4c820e170..e17a835ed2 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2171,7 +2171,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2250,8 +2250,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e0cc2847..83b856fa91 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -912,7 +917,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1147,6 +1154,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1160,18 +1179,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1236,14 +1257,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o1p2c-0008CE-0w@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:06 +0000

commit 878e684e154cc0d54ad649aaef2699cd71ee5501
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:24:59 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 5467ae7168..ad85785e14 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2129,9 +2129,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3da81ebf1d..5ea5ef6ba0 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -651,6 +651,8 @@ int arch_domain_create(struct domain *d,
 
     domain_cpu_policy_changed(d);
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1763,14 +1765,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -1834,6 +1837,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1e226102d3..b4efc940aa 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -903,6 +903,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1148,21 +1155,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 09f619459b..9eaab7a2a1 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 0db551bff3..4ee76bba45 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -308,6 +308,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index 9caecddfec..68f6c46c47 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o1p2m-0008E7-47@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:16 +0000

commit 9f078482838c20df73fb3152a18accfc8d7105bf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:25:01 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index b4efc940aa..38e0cc2847 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 7a39d94b9a..c8670eab8e 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -56,6 +56,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -73,6 +78,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.14] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o1p2w-0008Ee-78@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:26 +0000

commit c5f774eaeeca195ef85b47713f0b21220c4b41e6
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:25:01 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index ad85785e14..d1d5852cdd 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2106,7 +2106,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2185,8 +2185,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e0cc2847..83b856fa91 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -912,7 +917,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1147,6 +1154,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1160,18 +1179,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1236,14 +1257,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o1p36-0008Fj-KN@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:36 +0000

commit a84bc5bde583ffe1b9b697a4b1d2006c5614afff
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  1 +
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 18 ++++++++++++++----
 8 files changed, 51 insertions(+), 23 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index eead69ada2..e8bdf30fa4 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2058,9 +2058,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 820cb0f905..fe95b25a03 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -651,6 +651,8 @@ int arch_domain_create(struct domain *d,
 
     domain_cpu_policy_changed(d);
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1746,14 +1748,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = next->dirty_cpu;
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -1816,6 +1819,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 27c8c5ca49..62ed0d854d 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -81,6 +81,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         SPEC_CTRL_EXIT_TO_HVM   /* Req: a=spec_ctrl %rsp=regs/cpuinfo, Clob: cd */
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 7447d4a8e5..38e1f10982 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -35,8 +35,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -878,6 +878,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1078,21 +1085,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index a8222e978c..bcba926bda 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 
 /* Bug words follow the synthetic words. */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 309b56e2d6..71d1ca243b 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -295,6 +295,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index b252bb8631..157a2c67d8 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index c60093b090..4a3777cc52 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -141,6 +141,19 @@
     wrmsr
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -242,15 +255,12 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /* Use when exiting to HVM guest context. */
 #define SPEC_CTRL_EXIT_TO_HVM                                           \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_HVM;             \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_HVM
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o1p3G-0008G9-P9@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:46 +0000

commit 413b08328a57b931a689be278cc72b428c378d3b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 9 +++++++--
 xen/include/asm-x86/msr-index.h | 5 +++++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e1f10982..fd36927ba1 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -318,7 +318,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
     printk("Speculative mitigation facilities:\n");
 
     /* Hardware features which pertain to speculative mitigations. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBRS/IBPB" : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_STIBP)) ? " STIBP"     : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_L1D_FLUSH)) ? " L1D_FLUSH" : "",
@@ -333,7 +333,12 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                ? " SSB_NO"    : "",
            (caps & ARCH_CAPS_MDS_NO)                ? " MDS_NO"    : "",
            (caps & ARCH_CAPS_TSX_CTRL)              ? " TSX_CTRL"  : "",
-           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "");
+           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)          ? " SBDR_SSDP_NO" : "",
+           (caps & ARCH_CAPS_FBSDP_NO)              ? " FBSDP_NO"  : "",
+           (caps & ARCH_CAPS_PSDP_NO)               ? " PSDP_NO"   : "",
+           (caps & ARCH_CAPS_FB_CLEAR)              ? " FB_CLEAR"  : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)         ? " FB_CLEAR_CTRL" : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index ba9e90af21..2a80660d84 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -55,6 +55,11 @@
 #define ARCH_CAPS_IF_PSCHANGE_MC_NO	(_AC(1, ULL) << 6)
 #define ARCH_CAPS_TSX_CTRL		(_AC(1, ULL) << 7)
 #define ARCH_CAPS_TAA_NO		(_AC(1, ULL) << 8)
+#define ARCH_CAPS_SBDR_SSDP_NO		(_AC(1, ULL) << 13)
+#define ARCH_CAPS_FBSDP_NO		(_AC(1, ULL) << 14)
+#define ARCH_CAPS_PSDP_NO		(_AC(1, ULL) << 15)
+#define ARCH_CAPS_FB_CLEAR		(_AC(1, ULL) << 17)
+#define ARCH_CAPS_FB_CLEAR_CTRL		(_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD			0x0000010b
 #define FLUSH_CMD_L1D			(_AC(1, ULL) << 0)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.13] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o1p3Q-0008GZ-S4@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 12:56:56 +0000

commit 87ff11354f0dc0d6e77e1695e6c1e14aa1382cdc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 ++++++++---
 xen/arch/x86/spec_ctrl.c          | 49 ++++++++++++++++++++++++++++++---------
 2 files changed, 49 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index e8bdf30fa4..022cb01da7 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2035,7 +2035,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2114,8 +2114,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index fd36927ba1..d4ba941206 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination.
 
 static int8_t __initdata opt_srb_lock = -1;
 uint64_t __read_mostly default_xen_mcu_opt_ctrl;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -367,7 +371,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -887,7 +892,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1077,6 +1084,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1090,18 +1109,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1170,12 +1191,18 @@ void __init init_speculation_mitigations(void)
          * On some SRBDS-affected hardware, it may be safe to relax srb-lock
          * by default.
          *
-         * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only way
-         * to access the Fill Buffer.  If TSX isn't available (inc. SKU
-         * reasons on some models), or TSX is explicitly disabled, then there
-         * is no need for the extra overhead to protect RDRAND/RDSEED.
+         * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale
+         * RNG data becomes available to other contexts.  To recover the data,
+         * an attacker needs to use:
+         *  - SBDS (MDS or TAA to sample the cores fill buffer)
+         *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+         *  - DRPW (Architecturally latch stale fill buffer data)
+         *
+         * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and
+         * there is no unprivileged MMIO access, the RNG data doesn't need
+         * protecting.
          */
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && opt_tsx == 0)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
Message-Id: <E1o1pcO-0001kh-Kn@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 13:33:04 +0000

commit 4ccfee0a08ed258a5f86e3fdef2c01472f40a614
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 10 16:04:03 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 14:23:37 2022 +0100

    x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
    
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/running-average-power-limit-energy-reporting.html
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/msr-index.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index ea47f68d05..bcb424a320 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -51,6 +51,9 @@
 #define  PPIN_ENABLE                        (_AC(1, ULL) <<  1)
 #define MSR_PPIN                            0x0000004f
 
+#define MSR_MISC_PACKAGE_CTRL               0x000000bc
+#define  PGK_CTRL_ENERGY_FILTER_EN          (_AC(1, ULL) <<  0)
+
 #define MSR_CORE_CAPABILITIES               0x000000cf
 #define  CORE_CAPS_SPLITLOCK_DETECT         (_AC(1, ULL) <<  5)
 
@@ -71,6 +74,9 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_MISC_PACKAGE_CTRL        (_AC(1, ULL) << 10)
+#define  ARCH_CAPS_ENERGY_FILTERING         (_AC(1, ULL) << 11)
+#define  ARCH_CAPS_DOITM                    (_AC(1, ULL) << 12)
 #define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
 #define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
 #define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
@@ -155,6 +161,9 @@
 #define  PASID_PASID_MASK                   0x000fffff
 #define  PASID_VALID                        (_AC(1, ULL) << 31)
 
+#define MSR_UARCH_MISC_CTRL                 0x00001b01
+#define  UARCH_CTRL_DOITM                   (_AC(1, ULL) <<  0)
+
 #define MSR_EFER                            0xc0000080 /* Extended Feature Enable Register */
 #define  EFER_SCE                           (_AC(1, ULL) <<  0) /* SYSCALL Enable */
 #define  EFER_LME                           (_AC(1, ULL) <<  8) /* Long Mode Enable */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] ehci-dbgp: fix selecting n-th ehci controller
Message-Id: <E1o1pcY-0001lB-PX@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 13:33:14 +0000

commit d6d0cb659fda64430d4649f8680c5cead32da8fd
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 16:30:10 2022 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 14:23:37 2022 +0100

    ehci-dbgp: fix selecting n-th ehci controller
    
    The ehci<n> number was parsed but ignored.
    
    Fixes: 322ecbe4ac85 ("console: add EHCI debug port based serial console")
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/char/ehci-dbgp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c
index 16c8ff394d..92c588ec0a 100644
--- a/xen/drivers/char/ehci-dbgp.c
+++ b/xen/drivers/char/ehci-dbgp.c
@@ -1480,7 +1480,7 @@ void __init ehci_dbgp_init(void)
         unsigned int num = 0;
 
         if ( opt_dbgp[4] )
-            simple_strtoul(opt_dbgp + 4, &e, 10);
+            num = simple_strtoul(opt_dbgp + 4, &e, 10);
 
         dbgp->cap = find_dbgp(dbgp, num);
         if ( !dbgp->cap )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [qemu-xen master] migration: Fix operator type
Message-Id: <E1o1xHW-0007Qn-8e@xenbits.xenproject.org>
Date: Thu, 16 Jun 2022 21:44:02 +0000

commit b746458e1ce1bec85e58b458386f8b7a0bedfaa6
Author:     Dr. David Alan Gilbert <dgilbert@redhat.com>
AuthorDate: Wed Apr 6 11:25:15 2022 +0100
Commit:     Anthony PERARD <anthony.perard@gmail.com>
CommitDate: Thu Jun 16 11:58:37 2022 +0100

    migration: Fix operator type
    
    Clang spotted an & that should have been an &&; fix it.
    
    Reported by: David Binderman / https://gitlab.com/dcb
    Fixes: 65dacaa04fa ("migration: introduce save_normal_page()")
    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/963
    Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    Message-Id: <20220406102515.96320-1-dgilbert@redhat.com>
    Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Peter Xu <peterx@redhat.com>
    Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    (cherry picked from commit f912ec5b2d65644116ff496b58d7c9145c19e4c0)
---
 migration/ram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/migration/ram.c b/migration/ram.c
index 3532f64ecb..0ef4bd63eb 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -1289,7 +1289,7 @@ static int save_normal_page(RAMState *rs, RAMBlock *block, ram_addr_t offset,
                                          offset | RAM_SAVE_FLAG_PAGE));
     if (async) {
         qemu_put_buffer_async(rs->f, buf, TARGET_PAGE_SIZE,
-                              migrate_release_ram() &
+                              migrate_release_ram() &&
                               migration_in_postcopy());
     } else {
         qemu_put_buffer(rs->f, buf, TARGET_PAGE_SIZE);
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o26te-0004f8-DO@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:00:02 +0000

commit 878e684e154cc0d54ad649aaef2699cd71ee5501
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:24:59 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 5467ae7168..ad85785e14 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2129,9 +2129,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 3da81ebf1d..5ea5ef6ba0 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -651,6 +651,8 @@ int arch_domain_create(struct domain *d,
 
     domain_cpu_policy_changed(d);
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1763,14 +1765,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -1834,6 +1837,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1e226102d3..b4efc940aa 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -903,6 +903,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1148,21 +1155,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 09f619459b..9eaab7a2a1 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 0db551bff3..4ee76bba45 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -308,6 +308,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index 9caecddfec..68f6c46c47 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o26to-0004gW-HV@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:00:12 +0000

commit 9f078482838c20df73fb3152a18accfc8d7105bf
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:25:01 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index b4efc940aa..38e0cc2847 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 7a39d94b9a..c8670eab8e 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -56,6 +56,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -73,6 +78,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.14] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o26ty-0004hF-Kh@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:00:22 +0000

commit c5f774eaeeca195ef85b47713f0b21220c4b41e6
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:25:01 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index ad85785e14..d1d5852cdd 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2106,7 +2106,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2185,8 +2185,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e0cc2847..83b856fa91 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -912,7 +917,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1147,6 +1154,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1160,18 +1179,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1236,14 +1257,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenstore: Cleanup makefile
Message-Id: <E1o27Pc-0006NH-JR@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:04 +0000

commit 75262697925a63dfc8251769edcbbd082e9ebdb4
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:03 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/xenstore: Cleanup makefile
    
    Regroup *FLAGS together, use $(LDLIBS).
    
    Remove $(LDLIBS_xenstored) which was the wrong name name as it doesn't
    decribe how to link to a potential libxenstored.so, instead add the
    value to $(LDLIBS) of xenstored.
    
    Add SYSTEMD_LIBS into $(LDLIBS) instead of $(LDFLAGS).
    
    Remove the "-I." from $(CFLAGS), it shouldn't be needed.
    
    Removed $(CFLAGS-y) and $(LDFLAGS-y). $(CFLAGS-y) is already included
    in $(CFLAGS) and both aren't used anyway.
    
    Rename ALL_TARGETS to TARGETS.
    Only add programmes we want to build in $(TARGETS), not phony-targets
    (replace "clients").
    
    Store all `xenstored` objs into $(XENSTORED_OBJS-y).
    
    Replace one $< by $^ even if there's only one dependency,
    (xenstore-control).
    
    clean: "init-xenstore-domain" isn't built here any more, so stop
    trying to remove it, remove $(TARGETS). Also regroup all files to be
    removed in one command, using $(RM).
    
    Drop $(MAJOR) and $(MINOR), they aren't used anymore.
    
    Drop ".SECONDARY:", it doesn't appear there's intermediate files that
    would be deleted anymore.
    
    Drop "tarball:" target.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/xenstore/Makefile | 91 +++++++++++++++++++++++--------------------------
 1 file changed, 43 insertions(+), 48 deletions(-)

diff --git a/tools/xenstore/Makefile b/tools/xenstore/Makefile
index c86278fdb1..830052c65f 100644
--- a/tools/xenstore/Makefile
+++ b/tools/xenstore/Makefile
@@ -1,11 +1,7 @@
 XEN_ROOT=$(CURDIR)/../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-MAJOR = 3.0
-MINOR = 3
-
 CFLAGS += -Werror
-CFLAGS += -I.
 # Include configure output (config.h)
 CFLAGS += -include $(XEN_ROOT)/tools/config.h
 CFLAGS += -I./include
@@ -16,71 +12,77 @@ CFLAGS += $(CFLAGS_libxentoolcore)
 CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
 CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
 
-CFLAGS  += $(CFLAGS-y)
-LDFLAGS += $(LDFLAGS-y)
+ifdef CONFIG_STUBDOM
+CFLAGS += -DNO_SOCKETS=1
+endif
 
-CLIENTS := xenstore-exists xenstore-list xenstore-read xenstore-rm xenstore-chmod
-CLIENTS += xenstore-write xenstore-ls xenstore-watch
+XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
+XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
+XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
 
-XENSTORED_OBJS = xenstored_core.o xenstored_watch.o xenstored_domain.o
-XENSTORED_OBJS += xenstored_transaction.o xenstored_control.o
-XENSTORED_OBJS += xs_lib.o talloc.o utils.o tdb.o hashtable.o
+XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
 
-XENSTORED_OBJS_$(CONFIG_Linux) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_NetBSD) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_FreeBSD) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_MiniOS) = xenstored_minios.o
+$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
 
-XENSTORED_OBJS += $(XENSTORED_OBJS_y)
-LDLIBS_xenstored += -lrt
+xenstored: LDLIBS += $(LDLIBS_libxenevtchn)
+xenstored: LDLIBS += $(LDLIBS_libxengnttab)
+xenstored: LDLIBS += $(LDLIBS_libxenctrl)
+xenstored: LDLIBS += -lrt
+xenstored: LDLIBS += $(SOCKET_LIBS)
 
-ALL_TARGETS = clients
-ifeq ($(XENSTORE_XENSTORED),y)
-ALL_TARGETS += xs_tdb_dump xenstored
+ifeq ($(CONFIG_SYSTEMD),y)
+$(XENSTORED_OBJS-y): CFLAGS += $(SYSTEMD_CFLAGS)
+xenstored: LDLIBS += $(SYSTEMD_LIBS)
 endif
 
-ifdef CONFIG_STUBDOM
-CFLAGS += -DNO_SOCKETS=1
+xenstore: LDLIBS += $(LDLIBS_libxenstore)
+xenstore: LDLIBS += $(LDLIBS_libxentoolcore)
+xenstore: LDLIBS += $(SOCKET_LIBS)
+
+xenstore-control: LDLIBS += $(LDLIBS_libxenstore)
+xenstore-control: LDLIBS += $(LDLIBS_libxenctrl)
+xenstore-control: LDLIBS += $(LDLIBS_libxenguest)
+xenstore-control: LDLIBS += $(LDLIBS_libxentoolcore)
+xenstore-control: LDLIBS += $(SOCKET_LIBS)
+
+CLIENTS := xenstore-exists xenstore-list xenstore-read xenstore-rm xenstore-chmod
+CLIENTS += xenstore-write xenstore-ls xenstore-watch
+
+TARGETS := xenstore $(CLIENTS) xenstore-control
+ifeq ($(XENSTORE_XENSTORED),y)
+TARGETS += xs_tdb_dump xenstored
 endif
 
 .PHONY: all
-all: $(ALL_TARGETS)
+all: $(TARGETS)
 
 .PHONY: clients
 clients: xenstore $(CLIENTS) xenstore-control
 
-ifeq ($(CONFIG_SYSTEMD),y)
-$(XENSTORED_OBJS): CFLAGS += $(SYSTEMD_CFLAGS)
-xenstored: LDFLAGS += $(SYSTEMD_LIBS)
-endif
-
-$(XENSTORED_OBJS): CFLAGS += $(CFLAGS_libxengnttab)
-
-xenstored: $(XENSTORED_OBJS)
-	$(CC) $^ $(LDFLAGS) $(LDLIBS_libxenevtchn) $(LDLIBS_libxengnttab) $(LDLIBS_libxenctrl) $(LDLIBS_xenstored) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+xenstored: $(XENSTORED_OBJS-y)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
-xenstored.a: $(XENSTORED_OBJS)
+xenstored.a: $(XENSTORED_OBJS-y)
 	$(AR) cr $@ $^
 
 $(CLIENTS): xenstore
 	ln -f xenstore $@
 
 xenstore: xenstore_client.o xs_lib.o
-	$(CC) $^ $(LDFLAGS) $(LDLIBS_libxenstore) $(LDLIBS_libxentoolcore) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
 xenstore-control: xenstore_control.o
-	$(CC) $< $(LDFLAGS) $(LDLIBS_libxenstore) $(LDLIBS_libxenctrl) $(LDLIBS_libxenguest) $(LDLIBS_libxentoolcore) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
 xs_tdb_dump: xs_tdb_dump.o utils.o tdb.o talloc.o
-	$(CC) $^ $(LDFLAGS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ -o $@ $(APPEND_LDFLAGS)
 
 .PHONY: clean
 clean:
-	rm -f *.a *.o
-	rm -f xenstored
-	rm -f xs_tdb_dump xenstore-control init-xenstore-domain
-	rm -f xenstore $(CLIENTS)
-	$(RM) $(DEPS_RM)
+	$(RM) *.a *.o $(TARGETS) $(DEPS_RM)
 
 .PHONY: distclean
 distclean: clean
@@ -89,10 +91,6 @@ distclean: clean
 TAGS:
 	etags `find . -name '*.[ch]'`
 
-.PHONY: tarball
-tarball: clean
-	cd .. && tar -c -j -v -h -f xenstore.tar.bz2 xenstore/
-
 .PHONY: install
 install: all
 	$(INSTALL_DIR) $(DESTDIR)$(bindir)
@@ -135,6 +133,3 @@ clients-install: clients
 	done
 
 -include $(DEPS_INCLUDE)
-
-# never delete any intermediate files.
-.SECONDARY:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs: rename LDUSELIBS to LDLIBS and use it instead of APPEND_LDFLAGS
Message-Id: <E1o27Pm-0006Ns-Mg@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:14 +0000

commit 128b7e64483cf6125212b6c24fc86524e184308f
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:06 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: rename LDUSELIBS to LDLIBS and use it instead of APPEND_LDFLAGS
    
    LDLIBS is more appropriate and intended to be used to add library
    dependencies. APPEND_LDFLAGS wasn't intended to be changed by the
    build system.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile |  2 +-
 tools/libs/hypfs/Makefile |  2 +-
 tools/libs/libs.mk        |  4 ++--
 tools/libs/light/Makefile | 18 +++++++++---------
 tools/libs/stat/Makefile  |  2 +-
 tools/libs/store/Makefile |  2 +-
 6 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index ab580e1b64..2005d8a67d 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -102,7 +102,7 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-libxenguest.so.$(MAJOR).$(MINOR): APPEND_LDFLAGS += $(ZLIB_LIBS) -lz
+libxenguest.so.$(MAJOR).$(MINOR): LDLIBS += $(ZLIB_LIBS) -lz
 
 .PHONY: cleanlocal
 cleanlocal:
diff --git a/tools/libs/hypfs/Makefile b/tools/libs/hypfs/Makefile
index 39feca87e8..efa955bd50 100644
--- a/tools/libs/hypfs/Makefile
+++ b/tools/libs/hypfs/Makefile
@@ -4,7 +4,7 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 0
 
-APPEND_LDFLAGS += -lz
+LDLIBS += -lz
 
 SRCS-y                 += core.c
 
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index b3d784c57f..3118cb4194 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -18,7 +18,7 @@ CFLAGS   += -Werror -Wmissing-prototypes
 CFLAGS   += $(CFLAGS_xeninclude)
 CFLAGS   += $(foreach lib, $(USELIBS_$(LIBNAME)), $(CFLAGS_libxen$(lib)))
 
-LDUSELIBS = $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
+LDLIBS += $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
 
 LIB_OBJS := $(SRCS-y:.c=.o)
 PIC_OBJS := $(SRCS-y:.c=.opic)
@@ -88,7 +88,7 @@ lib$(LIB_FILE_NAME).so.$(MAJOR): lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR)
 	$(SYMLINK_SHLIB) $< $@
 
 lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR): $(PIC_OBJS) libxen$(LIBNAME).map
-	$(CC) $(LDFLAGS) $(PTHREAD_LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,lib$(LIB_FILE_NAME).so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $(PIC_OBJS) $(LDUSELIBS) $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $(PTHREAD_LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,lib$(LIB_FILE_NAME).so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $(PIC_OBJS) $(LDLIBS) $(APPEND_LDFLAGS)
 
 # If abi-dumper is available, write out the ABI analysis
 ifneq ($(ABI_DUMPER),)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 453bea0067..7c0a5dca85 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -166,14 +166,14 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-LDUSELIBS-y += $(PTYFUNCS_LIBS)
-LDUSELIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS)
-LDUSELIBS-$(CONFIG_Linux) += -luuid
-LDUSELIBS-$(CONFIG_Linux) += -lrt
-LDUSELIBS-$(CONFIG_ARM) += -lfdt
-LDUSELIBS-y += $(PTHREAD_LIBS)
-LDUSELIBS-y += -lyajl
-LDUSELIBS += $(LDUSELIBS-y)
+LDLIBS-y += $(PTYFUNCS_LIBS)
+LDLIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS)
+LDLIBS-$(CONFIG_Linux) += -luuid
+LDLIBS-$(CONFIG_Linux) += -lrt
+LDLIBS-$(CONFIG_ARM) += -lfdt
+LDLIBS-y += $(PTHREAD_LIBS)
+LDLIBS-y += -lyajl
+LDLIBS += $(LDLIBS-y)
 
 $(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
 $(ACPI_OBJS) $(ACPI_PIC_OBJS): CFLAGS += -I. -DLIBACPI_STDUTILS=\"$(CURDIR)/libxl_x86_acpi.h\"
@@ -228,7 +228,7 @@ $(XEN_INCLUDE)/_%.h: _%.h
 	$(call move-if-changed,_$*.h,$(XEN_INCLUDE)/_$*.h)
 
 libxenlight_test.so: $(PIC_OBJS) $(LIBXL_TEST_OBJS)
-	$(CC) $(LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,libxenlight.so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $^ $(LDUSELIBS) $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,libxenlight.so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $^ $(LDLIBS) $(APPEND_LDFLAGS)
 
 test_%: test_%.o test_common.o libxenlight_test.so
 	$(CC) $(LDFLAGS) -o $@ $^ $(filter-out %libxenlight.so, $(LDLIBS_libxenlight)) $(LDLIBS_libxentoollog) $(LDLIBS_libxentoolcore) -lyajl $(APPEND_LDFLAGS)
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 5840213376..6cd0af5239 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -26,7 +26,7 @@ SRCS-$(CONFIG_FreeBSD) += xenstat_freebsd.c
 
 LDLIBS-y += -lyajl
 LDLIBS-$(CONFIG_SunOS) += -lkstat
-APPEND_LDFLAGS += $(LDLIBS-y)
+LDLIBS += $(LDLIBS-y)
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 8e33db6a66..18ae1fe94d 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -5,7 +5,7 @@ MAJOR = 4
 MINOR = 0
 
 ifeq ($(CONFIG_Linux),y)
-APPEND_LDFLAGS += -ldl
+LDLIBS += -ldl
 endif
 
 SRCS-y   += xs_lib.c
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs: Remove need for *installlocal targets
Message-Id: <E1o27Pw-0006OR-Pt@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:24 +0000

commit b978a348eb8c47109ad98319fbd3cd4415d65fe8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:07 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: Remove need for *installlocal targets
    
    There is no need for an extra "installlocal" target, we can use
    double-colon rules instead.
    
    "install-headers" in "libs/store" was introduced for the same reason
    that "installlocal" exist, so it is replaced as well.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/libs.mk        |  4 ++--
 tools/libs/light/Makefile | 10 ++--------
 tools/libs/stat/Makefile  |  8 ++++----
 tools/libs/store/Makefile | 10 ++--------
 4 files changed, 10 insertions(+), 22 deletions(-)

diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index 3118cb4194..a173f59a8b 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -100,7 +100,7 @@ endif
 endif
 
 .PHONY: install
-install: all
+install:: all
 	$(INSTALL_DIR) $(DESTDIR)$(libdir)
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)
 	$(INSTALL_SHLIB) lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) $(DESTDIR)$(libdir)
@@ -111,7 +111,7 @@ install: all
 	$(INSTALL_DATA) $(PKG_CONFIG) $(DESTDIR)$(PKG_INSTALLDIR)
 
 .PHONY: uninstall
-uninstall:
+uninstall::
 	rm -f $(DESTDIR)$(PKG_INSTALLDIR)/$(LIB_FILE_NAME).pc
 	for i in $(LIBHEADER); do rm -f $(DESTDIR)$(includedir)/$$i; done
 	rm -f $(DESTDIR)$(libdir)/lib$(LIB_FILE_NAME).so
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 7c0a5dca85..769e2a83e2 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -239,17 +239,11 @@ libxl-save-helper: $(SAVE_HELPER_OBJS) libxenlight.so
 testidl: testidl.o libxenlight.so
 	$(CC) $(LDFLAGS) -o $@ testidl.o $(LDLIBS_libxenlight) $(LDLIBS_libxentoollog) $(LDLIBS_libxentoolcore) $(APPEND_LDFLAGS)
 
-install: installlocal $(LIBHEADERS)
-
-.PHONY: installlocal
-installlocal: libxl-save-helper
+install:: $(LIBHEADERS) libxl-save-helper
 	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
 	$(INSTALL_PROG) libxl-save-helper $(DESTDIR)$(LIBEXEC_BIN)
 
-uninstall: uninstalllocal
-
-.PHONY: uninstalllocal
-uninstalllocal:
+uninstall::
 	rm -f $(DESTDIR)$(LIBEXEC_BIN)/libxl-save-helper
 
 clean: cleanlocal
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 6cd0af5239..1aef25a9bb 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -78,8 +78,8 @@ uninstall-python-bindings:
 ifeq ($(XENSTAT_PYTHON_BINDINGS),y)
 .PHONY: all
 all: python-bindings
-install: install-python-bindings
-uninstall: uninstall-python-bindings
+install:: install-python-bindings
+uninstall:: uninstall-python-bindings
 endif
 
 # Perl bindings
@@ -111,8 +111,8 @@ ifeq ($(XENSTAT_PERL_BINDINGS),y)
 all: perl-bindings
 
 .PHONY: install
-install: install-perl-bindings
-uninstall: uninstall-perl-bindings
+install:: install-perl-bindings
+uninstall:: uninstall-perl-bindings
 endif
 
 clean: cleanlocal
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 18ae1fe94d..b94060be8d 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -30,10 +30,7 @@ xs.opic: CFLAGS += -DUSE_DLSYM
 endif
 
 .PHONY: install
-install: install-headers
-
-.PHONY: install-headers
-install-headers:
+install::
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)/xenstore-compat
 	$(INSTALL_DATA) $(XEN_INCLUDE)/xenstore-compat/xs.h $(DESTDIR)$(includedir)/xenstore-compat/xs.h
@@ -42,10 +39,7 @@ install-headers:
 	ln -sf xenstore-compat/xs_lib.h $(DESTDIR)$(includedir)/xs_lib.h
 
 .PHONY: uninstall
-uninstall: uninstall-headers
-
-.PHONY: uninstall-headers
-uninstall-headers:
+uninstall::
 	rm -f $(DESTDIR)$(includedir)/xs_lib.h
 	rm -f $(DESTDIR)$(includedir)/xs.h
 	rm -f $(DESTDIR)$(includedir)/xenstore-compat/xs_lib.h
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs,tools/include: Clean "clean" targets
Message-Id: <E1o27Q6-0006Pc-TI@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:34 +0000

commit a03b3552d4771e8135b8beca8547ccb93349791c
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:08 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs,tools/include: Clean "clean" targets
    
    There is no need for an extra "cleanlocal" target, we can use
    double-colon rules instead.
    
    Generated headers are now in tools/include/, so remove those file
    there.
    
    Remove -f flag as it's already in $(RM).
    
    libs.mk:
      - don't try to remove "*.rpm" anymore.
    
    libs/light:
      - "_paths.*.tmp" isn't created anymore.
      - clean "libxenlight_test.so" and "libxl_test_*.opic".
    
    libs/stat:
      - don't remove $(DEPS_RM) from here as it is already done in
        "libs.mk".
    
    libs/util:
      - fix clean of version-script file.
    
    include/xen-foreign:
      - remove __pycache__
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/include/Makefile             |  1 +
 tools/include/xen-foreign/Makefile |  1 +
 tools/libs/ctrl/Makefile           |  5 +----
 tools/libs/guest/Makefile          |  3 +--
 tools/libs/libs.mk                 |  4 ++--
 tools/libs/light/Makefile          | 19 ++++++++-----------
 tools/libs/stat/Makefile           |  8 ++------
 tools/libs/util/Makefile           |  7 ++-----
 tools/libs/vchan/Makefile          |  5 +----
 9 files changed, 19 insertions(+), 34 deletions(-)

diff --git a/tools/include/Makefile b/tools/include/Makefile
index d965987f55..3a03a0b0fa 100644
--- a/tools/include/Makefile
+++ b/tools/include/Makefile
@@ -82,6 +82,7 @@ uninstall:
 clean:
 	rm -rf xen xen-xsm acpi
 	$(MAKE) -C xen-foreign clean
+	rm -f _*.h
 
 .PHONY: dist
 dist: install
diff --git a/tools/include/xen-foreign/Makefile b/tools/include/xen-foreign/Makefile
index 6ce51daf5e..b538d0ea94 100644
--- a/tools/include/xen-foreign/Makefile
+++ b/tools/include/xen-foreign/Makefile
@@ -13,6 +13,7 @@ clean:
 	rm -f $(headers)
 	rm -f checker checker.c
 	rm -f *.pyc *.o *~
+	rm -rf __pycache__
 
 distclean: clean
 
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index ef7362327f..f58c4ef1aa 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -54,8 +54,5 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenctrl.map
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 2005d8a67d..56483c545f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -104,6 +104,5 @@ include $(XEN_ROOT)/tools/libs/libs.mk
 
 libxenguest.so.$(MAJOR).$(MINOR): LDLIBS += $(ZLIB_LIBS) -lz
 
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenguest.map
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index a173f59a8b..c2eaefc928 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -124,8 +124,8 @@ TAGS:
 	etags -t *.c *.h
 
 .PHONY: clean
-clean:
-	rm -rf *.rpm $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
+clean::
+	rm -rf $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
 	rm -f lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) lib$(LIB_FILE_NAME).so.$(MAJOR)
 	rm -f headers.chk headers.lst
 	rm -f $(PKG_CONFIG)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 769e2a83e2..0c04a5b5cb 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -246,15 +246,12 @@ install:: $(LIBHEADERS) libxl-save-helper
 uninstall::
 	rm -f $(DESTDIR)$(LIBEXEC_BIN)/libxl-save-helper
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	$(RM) -f _*.h *.o $(CLIENTS)
-	$(RM) -f _*.c *.pyc _paths.*.tmp _*.api-for-check
-	$(RM) -f testidl.c.new testidl.c *.api-ok
-	$(RM) -f $(TEST_PROGS)
-	$(RM) -rf __pycache__
-	$(RM) -f libxenlight.map
-	$(RM) -f $(AUTOSRCS) $(AUTOINCS)
+clean::
+	$(RM) _*.h *.o $(CLIENTS)
+	$(RM) _*.c *.pyc _*.api-for-check
+	$(RM) testidl.c.new testidl.c *.api-ok
+	$(RM) $(TEST_PROGS) libxenlight_test.so libxl_test_*.opic
+	$(RM) -r __pycache__
+	$(RM) libxenlight.map
+	$(RM) $(AUTOSRCS) $(AUTOINCS)
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) clean
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 1aef25a9bb..39a671d7ed 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -115,9 +115,5 @@ install:: install-perl-bindings
 uninstall:: uninstall-perl-bindings
 endif
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	rm -f $(BINDINGS) $(BINDINGSRC) $(DEPS_RM)
-	rm -f libxenstat.map
+clean::
+	$(RM) libxenstat.map $(BINDINGS) $(BINDINGSRC)
diff --git a/tools/libs/util/Makefile b/tools/libs/util/Makefile
index 72fecb4c49..7a658e9446 100644
--- a/tools/libs/util/Makefile
+++ b/tools/libs/util/Makefile
@@ -49,8 +49,5 @@ $(LIB_OBJS) $(PIC_OBJS): $(AUTOINCS)
 	@rm -f $*.[ch]
 	$(FLEX) --header-file=$*.h --outfile=$*.c $<
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	$(RM) -f libxlutil.map
+clean::
+	$(RM) libxenutil.map
diff --git a/tools/libs/vchan/Makefile b/tools/libs/vchan/Makefile
index 83a45d2817..4ccb4dd1f6 100644
--- a/tools/libs/vchan/Makefile
+++ b/tools/libs/vchan/Makefile
@@ -12,8 +12,5 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenvchan.map
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs: Rename $(SRCS-y) to $(OBJS-y)
Message-Id: <E1o27QH-0006QS-0E@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:45 +0000

commit 5e7d75f2cb9c30c1c3f5c525f17db3be81d062f8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:09 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: Rename $(SRCS-y) to $(OBJS-y)
    
    The only thing done thing done with $(SRCS-y) is to replace ".c" by
    ".o". It is more useful to collect which object we want to build as
    make will figure out how to build it and from which source file.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/call/Makefile          |  12 +--
 tools/libs/ctrl/Makefile          |  74 ++++++++---------
 tools/libs/devicemodel/Makefile   |  12 +--
 tools/libs/evtchn/Makefile        |  12 +--
 tools/libs/foreignmemory/Makefile |  12 +--
 tools/libs/gnttab/Makefile        |  14 ++--
 tools/libs/guest/Makefile         |  86 ++++++++++----------
 tools/libs/hypfs/Makefile         |   2 +-
 tools/libs/libs.mk                |   7 +-
 tools/libs/light/Makefile         | 162 +++++++++++++++++++-------------------
 tools/libs/stat/Makefile          |  12 +--
 tools/libs/store/Makefile         |   4 +-
 tools/libs/toolcore/Makefile      |   2 +-
 tools/libs/toollog/Makefile       |   4 +-
 tools/libs/util/Makefile          |  16 ++--
 tools/libs/vchan/Makefile         |   4 +-
 16 files changed, 217 insertions(+), 218 deletions(-)

diff --git a/tools/libs/call/Makefile b/tools/libs/call/Makefile
index 93d404b79e..e5cb7c937c 100644
--- a/tools/libs/call/Makefile
+++ b/tools/libs/call/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 3
 
-SRCS-y                 += core.c buffer.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o buffer.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index f58c4ef1aa..5fd06949f1 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -1,43 +1,43 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y       += xc_altp2m.c
-SRCS-y       += xc_cpupool.c
-SRCS-y       += xc_domain.c
-SRCS-y       += xc_evtchn.c
-SRCS-y       += xc_gnttab.c
-SRCS-y       += xc_misc.c
-SRCS-y       += xc_flask.c
-SRCS-y       += xc_physdev.c
-SRCS-y       += xc_private.c
-SRCS-y       += xc_csched.c
-SRCS-y       += xc_csched2.c
-SRCS-y       += xc_arinc653.c
-SRCS-y       += xc_rt.c
-SRCS-y       += xc_tbuf.c
-SRCS-y       += xc_pm.c
-SRCS-y       += xc_cpu_hotplug.c
-SRCS-y       += xc_vm_event.c
-SRCS-y       += xc_vmtrace.c
-SRCS-y       += xc_monitor.c
-SRCS-y       += xc_mem_paging.c
-SRCS-y       += xc_mem_access.c
-SRCS-y       += xc_memshr.c
-SRCS-y       += xc_hcall_buf.c
-SRCS-y       += xc_foreign_memory.c
-SRCS-y       += xc_kexec.c
-SRCS-y       += xc_resource.c
-SRCS-$(CONFIG_X86) += xc_psr.c
-SRCS-$(CONFIG_X86) += xc_pagetab.c
-SRCS-$(CONFIG_Linux) += xc_linux.c
-SRCS-$(CONFIG_FreeBSD) += xc_freebsd.c
-SRCS-$(CONFIG_SunOS) += xc_solaris.c
-SRCS-$(CONFIG_NetBSD) += xc_netbsd.c
-SRCS-$(CONFIG_NetBSDRump) += xc_netbsd.c
-SRCS-$(CONFIG_MiniOS) += xc_minios.c
-SRCS-y       += xc_evtchn_compat.c
-SRCS-y       += xc_gnttab_compat.c
-SRCS-y       += xc_devicemodel_compat.c
+OBJS-y       += xc_altp2m.o
+OBJS-y       += xc_cpupool.o
+OBJS-y       += xc_domain.o
+OBJS-y       += xc_evtchn.o
+OBJS-y       += xc_gnttab.o
+OBJS-y       += xc_misc.o
+OBJS-y       += xc_flask.o
+OBJS-y       += xc_physdev.o
+OBJS-y       += xc_private.o
+OBJS-y       += xc_csched.o
+OBJS-y       += xc_csched2.o
+OBJS-y       += xc_arinc653.o
+OBJS-y       += xc_rt.o
+OBJS-y       += xc_tbuf.o
+OBJS-y       += xc_pm.o
+OBJS-y       += xc_cpu_hotplug.o
+OBJS-y       += xc_vm_event.o
+OBJS-y       += xc_vmtrace.o
+OBJS-y       += xc_monitor.o
+OBJS-y       += xc_mem_paging.o
+OBJS-y       += xc_mem_access.o
+OBJS-y       += xc_memshr.o
+OBJS-y       += xc_hcall_buf.o
+OBJS-y       += xc_foreign_memory.o
+OBJS-y       += xc_kexec.o
+OBJS-y       += xc_resource.o
+OBJS-$(CONFIG_X86) += xc_psr.o
+OBJS-$(CONFIG_X86) += xc_pagetab.o
+OBJS-$(CONFIG_Linux) += xc_linux.o
+OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
+OBJS-$(CONFIG_SunOS) += xc_solaris.o
+OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
+OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
+OBJS-$(CONFIG_MiniOS) += xc_minios.o
+OBJS-y       += xc_evtchn_compat.o
+OBJS-y       += xc_gnttab_compat.o
+OBJS-y       += xc_devicemodel_compat.o
 
 CFLAGS   += -D__XEN_TOOLS__
 CFLAGS	+= $(PTHREAD_CFLAGS)
diff --git a/tools/libs/devicemodel/Makefile b/tools/libs/devicemodel/Makefile
index 3e50ff6d90..a0a2d24f99 100644
--- a/tools/libs/devicemodel/Makefile
+++ b/tools/libs/devicemodel/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += common.c
-SRCS-$(CONFIG_FreeBSD) += common.c
-SRCS-$(CONFIG_SunOS)   += compat.c
-SRCS-$(CONFIG_NetBSD)  += compat.c
-SRCS-$(CONFIG_MiniOS)  += compat.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += common.o
+OBJS-$(CONFIG_FreeBSD) += common.o
+OBJS-$(CONFIG_SunOS)   += compat.o
+OBJS-$(CONFIG_NetBSD)  += compat.o
+OBJS-$(CONFIG_MiniOS)  += compat.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/evtchn/Makefile b/tools/libs/evtchn/Makefile
index b8c37b5b97..8208ecf650 100644
--- a/tools/libs/evtchn/Makefile
+++ b/tools/libs/evtchn/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/foreignmemory/Makefile b/tools/libs/foreignmemory/Makefile
index 0eb9a3a712..4427435932 100644
--- a/tools/libs/foreignmemory/Makefile
+++ b/tools/libs/foreignmemory/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += compat.c solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/gnttab/Makefile b/tools/libs/gnttab/Makefile
index ae390ce60f..7d7aeeadff 100644
--- a/tools/libs/gnttab/Makefile
+++ b/tools/libs/gnttab/Makefile
@@ -4,13 +4,13 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-SRCS-GNTTAB            += gnttab_core.c
-SRCS-GNTSHR            += gntshr_core.c
+OBJS-GNTTAB            += gnttab_core.o
+OBJS-GNTSHR            += gntshr_core.o
 
-SRCS-$(CONFIG_Linux)   += $(SRCS-GNTTAB) $(SRCS-GNTSHR) linux.c
-SRCS-$(CONFIG_MiniOS)  += $(SRCS-GNTTAB) gntshr_unimp.c minios.c
-SRCS-$(CONFIG_FreeBSD) += $(SRCS-GNTTAB) $(SRCS-GNTSHR) freebsd.c
-SRCS-$(CONFIG_NetBSD)  += $(SRCS-GNTTAB) $(SRCS-GNTSHR) netbsd.c
-SRCS-$(CONFIG_SunOS)   += gnttab_unimp.c gntshr_unimp.c
+OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
+OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
+OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
+OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
+OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 56483c545f..17eb0ebf4b 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -6,69 +6,69 @@ ifeq ($(CONFIG_LIBXC_MINIOS),y)
 override CONFIG_MIGRATE := n
 endif
 
-SRCS-y += xg_private.c
-SRCS-y += xg_domain.c
-SRCS-y += xg_suspend.c
-SRCS-y += xg_resume.c
+OBJS-y += xg_private.o
+OBJS-y += xg_domain.o
+OBJS-y += xg_suspend.o
+OBJS-y += xg_resume.o
 ifeq ($(CONFIG_MIGRATE),y)
-SRCS-y += xg_sr_common.c
-SRCS-$(CONFIG_X86) += xg_sr_common_x86.c
-SRCS-$(CONFIG_X86) += xg_sr_common_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_restore_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.c
-SRCS-$(CONFIG_X86) += xg_sr_save_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_save_x86_hvm.c
-SRCS-y += xg_sr_restore.c
-SRCS-y += xg_sr_save.c
-SRCS-y += xg_offline_page.c
+OBJS-y += xg_sr_common.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
+OBJS-y += xg_sr_restore.o
+OBJS-y += xg_sr_save.o
+OBJS-y += xg_offline_page.o
 else
-SRCS-y += xg_nomigrate.c
+OBJS-y += xg_nomigrate.o
 endif
-SRCS-y       += xg_core.c
-SRCS-$(CONFIG_X86) += xg_core_x86.c
-SRCS-$(CONFIG_ARM) += xg_core_arm.c
+OBJS-y       += xg_core.o
+OBJS-$(CONFIG_X86) += xg_core_x86.o
+OBJS-$(CONFIG_ARM) += xg_core_arm.o
 
 CFLAGS += -I$(XEN_libxenctrl)
 
 vpath %.c ../../../xen/common/libelf
 CFLAGS += -I../../../xen/common/libelf
 
-ELF_SRCS-y += libelf-tools.c libelf-loader.c
-ELF_SRCS-y += libelf-dominfo.c
+ELF_OBJS-y += libelf-tools.o libelf-loader.o
+ELF_OBJS-y += libelf-dominfo.o
 
-SRCS-y += $(ELF_SRCS-y)
+OBJS-y += $(ELF_OBJS-y)
 
-$(patsubst %.c,%.o,$(ELF_SRCS-y)): CFLAGS += -Wno-pointer-sign
-$(patsubst %.c,%.opic,$(ELF_SRCS-y)): CFLAGS += -Wno-pointer-sign
+$(ELF_OBJS-y): CFLAGS += -Wno-pointer-sign
+$(ELF_OBJS-y:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
 
-SRCS-y                 += cpuid.c msr.c policy.c
+OBJS-y                 += cpuid.o msr.o policy.o
 endif
 
 # new domain builder
-SRCS-y                 += xg_dom_core.c
-SRCS-y                 += xg_dom_boot.c
-SRCS-y                 += xg_dom_elfloader.c
-SRCS-$(CONFIG_X86)     += xg_dom_bzimageloader.c
-SRCS-$(CONFIG_X86)     += xg_dom_decompress_lz4.c
-SRCS-$(CONFIG_X86)     += xg_dom_hvmloader.c
-SRCS-$(CONFIG_ARM)     += xg_dom_armzimageloader.c
-SRCS-y                 += xg_dom_binloader.c
-SRCS-y                 += xg_dom_compat_linux.c
-
-SRCS-$(CONFIG_X86)     += xg_dom_x86.c
-SRCS-$(CONFIG_X86)     += xg_cpuid_x86.c
-SRCS-$(CONFIG_ARM)     += xg_dom_arm.c
+OBJS-y                 += xg_dom_core.o
+OBJS-y                 += xg_dom_boot.o
+OBJS-y                 += xg_dom_elfloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
+OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
+OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
+OBJS-y                 += xg_dom_binloader.o
+OBJS-y                 += xg_dom_compat_linux.o
+
+OBJS-$(CONFIG_X86)     += xg_dom_x86.o
+OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
+OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
 
 ifeq ($(CONFIG_LIBXC_MINIOS),y)
-SRCS-y                 += xg_dom_decompress_unsafe.c
-SRCS-y                 += xg_dom_decompress_unsafe_bzip2.c
-SRCS-y                 += xg_dom_decompress_unsafe_lzma.c
-SRCS-y                 += xg_dom_decompress_unsafe_lzo1x.c
-SRCS-y                 += xg_dom_decompress_unsafe_xz.c
-SRCS-y                 += xg_dom_decompress_unsafe_zstd.c
+OBJS-y                 += xg_dom_decompress_unsafe.o
+OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
+OBJS-y                 += xg_dom_decompress_unsafe_xz.o
+OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
 endif
 
 CFLAGS   += -Werror -Wmissing-prototypes
diff --git a/tools/libs/hypfs/Makefile b/tools/libs/hypfs/Makefile
index efa955bd50..630e1e6f3e 100644
--- a/tools/libs/hypfs/Makefile
+++ b/tools/libs/hypfs/Makefile
@@ -6,6 +6,6 @@ MINOR    = 0
 
 LDLIBS += -lz
 
-SRCS-y                 += core.c
+OBJS-y += core.o
 
 include ../libs.mk
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index c2eaefc928..58d8166b09 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -20,8 +20,7 @@ CFLAGS   += $(foreach lib, $(USELIBS_$(LIBNAME)), $(CFLAGS_libxen$(lib)))
 
 LDLIBS += $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
 
-LIB_OBJS := $(SRCS-y:.c=.o)
-PIC_OBJS := $(SRCS-y:.c=.opic)
+PIC_OBJS := $(OBJS-y:.o=.opic)
 
 LIB_FILE_NAME = $(FILENAME_$(LIBNAME))
 LIB := lib$(LIB_FILE_NAME).a
@@ -79,7 +78,7 @@ headers.lst: FORCE
 libxen$(LIBNAME).map:
 	echo 'VERS_$(MAJOR).$(MINOR) { global: *; };' >$@
 
-lib$(LIB_FILE_NAME).a: $(LIB_OBJS)
+lib$(LIB_FILE_NAME).a: $(OBJS-y)
 	$(AR) rc $@ $^
 
 lib$(LIB_FILE_NAME).so: lib$(LIB_FILE_NAME).so.$(MAJOR)
@@ -125,7 +124,7 @@ TAGS:
 
 .PHONY: clean
 clean::
-	rm -rf $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
+	rm -rf $(LIB) *~ $(DEPS_RM) $(OBJS-y) $(PIC_OBJS)
 	rm -f lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) lib$(LIB_FILE_NAME).so.$(MAJOR)
 	rm -f headers.chk headers.lst
 	rm -f $(PKG_CONFIG)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 0c04a5b5cb..13545654c2 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -1,31 +1,31 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y += osdeps.c
-SRCS-y += libxl_paths.c
-SRCS-y += libxl_bootloader.c
-SRCS-y += flexarray.c
+OBJS-y += osdeps.o
+OBJS-y += libxl_paths.o
+OBJS-y += libxl_bootloader.o
+OBJS-y += flexarray.o
 ifeq ($(CONFIG_LIBNL),y)
-SRCS-y += libxl_netbuffer.c
+OBJS-y += libxl_netbuffer.o
 else
-SRCS-y += libxl_nonetbuffer.c
+OBJS-y += libxl_nonetbuffer.o
 endif
 ifeq ($(CONFIG_X86),y)
-SRCS-y += libxl_convert_callout.c
+OBJS-y += libxl_convert_callout.o
 else
-SRCS-y += libxl_no_convert_callout.c
+OBJS-y += libxl_no_convert_callout.o
 endif
-SRCS-y += libxl_remus.c
-SRCS-y += libxl_checkpoint_device.c
-SRCS-y += libxl_remus_disk_drbd.c
+OBJS-y += libxl_remus.o
+OBJS-y += libxl_checkpoint_device.o
+OBJS-y += libxl_remus_disk_drbd.o
 ifeq ($(CONFIG_LIBNL),y)
-SRCS-y += libxl_colo_restore.c
-SRCS-y += libxl_colo_save.c
-SRCS-y += libxl_colo_qdisk.c
-SRCS-y += libxl_colo_proxy.c
-SRCS-y += libxl_colo_nic.c
+OBJS-y += libxl_colo_restore.o
+OBJS-y += libxl_colo_save.o
+OBJS-y += libxl_colo_qdisk.o
+OBJS-y += libxl_colo_proxy.o
+OBJS-y += libxl_colo_nic.o
 else
-SRCS-y += libxl_no_colo.c
+OBJS-y += libxl_no_colo.o
 endif
 
 ACPI_PATH  = $(XEN_ROOT)/tools/libacpi
@@ -40,82 +40,82 @@ vpath static_tables.c $(ACPI_PATH)/
 acpi:
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) DSDT_FILES="$(DSDT_FILES-y)"
 
-SRCS-$(CONFIG_X86) += $(ACPI_OBJS:.o=.c)
+OBJS-$(CONFIG_X86) += $(ACPI_OBJS)
 
 CFLAGS += -Wno-format-zero-length -Wmissing-declarations \
 	-Wno-declaration-after-statement -Wformat-nonliteral
 
 CFLAGS-$(CONFIG_X86) += -DCONFIG_PCI_SUPP_LEGACY_IRQ
 
-SRCS-$(CONFIG_X86) += libxl_cpuid.c
-SRCS-$(CONFIG_X86) += libxl_x86.c
-SRCS-$(CONFIG_X86) += libxl_psr.c
-SRCS-$(CONFIG_X86) += libxl_x86_acpi.c
-SRCS-$(CONFIG_ARM) += libxl_nocpuid.c
-SRCS-$(CONFIG_ARM) += libxl_arm.c
-SRCS-$(CONFIG_ARM) += libxl_libfdt_compat.c
+OBJS-$(CONFIG_X86) += libxl_cpuid.o
+OBJS-$(CONFIG_X86) += libxl_x86.o
+OBJS-$(CONFIG_X86) += libxl_psr.o
+OBJS-$(CONFIG_X86) += libxl_x86_acpi.o
+OBJS-$(CONFIG_ARM) += libxl_nocpuid.o
+OBJS-$(CONFIG_ARM) += libxl_arm.o
+OBJS-$(CONFIG_ARM) += libxl_libfdt_compat.o
 ifeq ($(CONFIG_ARM_64),y)
 DSDT_FILES-y = dsdt_anycpu_arm.c
-SRCS-y += libxl_arm_acpi.c
-SRCS-y += $(DSDT_FILES-y)
+OBJS-y += libxl_arm_acpi.o
+OBJS-y += $(DSDT_FILES-y:.c=.o)
 dsdt_anycpu_arm.c:
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) DSDT_FILES="$(DSDT_FILES-y)"
 else
-SRCS-$(CONFIG_ARM) += libxl_arm_no_acpi.c
+OBJS-$(CONFIG_ARM) += libxl_arm_no_acpi.o
 endif
 
-SRCS-OS-$(CONFIG_NetBSD) = libxl_netbsd.c
-SRCS-OS-$(CONFIG_Linux) = libxl_linux.c libxl_setresuid.c
-SRCS-OS-$(CONFIG_FreeBSD) = libxl_freebsd.c libxl_setresuid.c
-ifeq ($(SRCS-OS-y),)
+OBJS-OS-$(CONFIG_NetBSD) = libxl_netbsd.o
+OBJS-OS-$(CONFIG_Linux) = libxl_linux.o libxl_setresuid.o
+OBJS-OS-$(CONFIG_FreeBSD) = libxl_freebsd.o libxl_setresuid.o
+ifeq ($(OBJS-OS-y),)
 $(error Your Operating System is not supported by libxenlight, \
 please check libxl_linux.c and libxl_netbsd.c to see how to get it ported)
 endif
-SRCS-y += $(SRCS-OS-y)
-
-SRCS-y += libxl.c
-SRCS-y += libxl_create.c
-SRCS-y += libxl_dm.c
-SRCS-y += libxl_pci.c
-SRCS-y += libxl_dom.c
-SRCS-y += libxl_exec.c
-SRCS-y += libxl_xshelp.c
-SRCS-y += libxl_device.c
-SRCS-y += libxl_internal.c
-SRCS-y += libxl_utils.c
-SRCS-y += libxl_uuid.c
-SRCS-y += libxl_json.c
-SRCS-y += libxl_aoutils.c
-SRCS-y += libxl_numa.c
-SRCS-y += libxl_vnuma.c
-SRCS-y += libxl_stream_read.c
-SRCS-y += libxl_stream_write.c
-SRCS-y += libxl_save_callout.c
-SRCS-y += _libxl_save_msgs_callout.c
-SRCS-y += libxl_qmp.c
-SRCS-y += libxl_event.c
-SRCS-y += libxl_fork.c
-SRCS-y += libxl_dom_suspend.c
-SRCS-y += libxl_dom_save.c
-SRCS-y += libxl_usb.c
-SRCS-y += libxl_vtpm.c
-SRCS-y += libxl_nic.c
-SRCS-y += libxl_disk.c
-SRCS-y += libxl_console.c
-SRCS-y += libxl_cpupool.c
-SRCS-y += libxl_mem.c
-SRCS-y += libxl_sched.c
-SRCS-y += libxl_tmem.c
-SRCS-y += libxl_9pfs.c
-SRCS-y += libxl_domain.c
-SRCS-y += libxl_vdispl.c
-SRCS-y += libxl_pvcalls.c
-SRCS-y += libxl_vsnd.c
-SRCS-y += libxl_vkb.c
-SRCS-y += libxl_genid.c
-SRCS-y += _libxl_types.c
-SRCS-y += libxl_flask.c
-SRCS-y += _libxl_types_internal.c
+OBJS-y += $(OBJS-OS-y)
+
+OBJS-y += libxl.o
+OBJS-y += libxl_create.o
+OBJS-y += libxl_dm.o
+OBJS-y += libxl_pci.o
+OBJS-y += libxl_dom.o
+OBJS-y += libxl_exec.o
+OBJS-y += libxl_xshelp.o
+OBJS-y += libxl_device.o
+OBJS-y += libxl_internal.o
+OBJS-y += libxl_utils.o
+OBJS-y += libxl_uuid.o
+OBJS-y += libxl_json.o
+OBJS-y += libxl_aoutils.o
+OBJS-y += libxl_numa.o
+OBJS-y += libxl_vnuma.o
+OBJS-y += libxl_stream_read.o
+OBJS-y += libxl_stream_write.o
+OBJS-y += libxl_save_callout.o
+OBJS-y += _libxl_save_msgs_callout.o
+OBJS-y += libxl_qmp.o
+OBJS-y += libxl_event.o
+OBJS-y += libxl_fork.o
+OBJS-y += libxl_dom_suspend.o
+OBJS-y += libxl_dom_save.o
+OBJS-y += libxl_usb.o
+OBJS-y += libxl_vtpm.o
+OBJS-y += libxl_nic.o
+OBJS-y += libxl_disk.o
+OBJS-y += libxl_console.o
+OBJS-y += libxl_cpupool.o
+OBJS-y += libxl_mem.o
+OBJS-y += libxl_sched.o
+OBJS-y += libxl_tmem.o
+OBJS-y += libxl_9pfs.o
+OBJS-y += libxl_domain.o
+OBJS-y += libxl_vdispl.o
+OBJS-y += libxl_pvcalls.o
+OBJS-y += libxl_vsnd.o
+OBJS-y += libxl_vkb.o
+OBJS-y += libxl_genid.o
+OBJS-y += _libxl_types.o
+OBJS-y += libxl_flask.o
+OBJS-y += _libxl_types_internal.o
 
 ifeq ($(CONFIG_LIBNL),y)
 CFLAGS_LIBXL += $(LIBNL3_CFLAGS)
@@ -175,7 +175,7 @@ LDLIBS-y += $(PTHREAD_LIBS)
 LDLIBS-y += -lyajl
 LDLIBS += $(LDLIBS-y)
 
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
 $(ACPI_OBJS) $(ACPI_PIC_OBJS): CFLAGS += -I. -DLIBACPI_STDUTILS=\"$(CURDIR)/libxl_x86_acpi.h\"
 $(TEST_PROG_OBJS) _libxl.api-for-check: CFLAGS += $(CFLAGS_libxentoollog) $(CFLAGS_libxentoolcore)
 libxl_dom.o libxl_dom.opic: CFLAGS += -I$(XEN_ROOT)/tools  # include libacpi/x86.h
@@ -189,7 +189,7 @@ testidl.c: libxl_types.idl gentest.py $(XEN_INCLUDE)/libxl.h $(AUTOINCS)
 
 all: $(CLIENTS) $(TEST_PROGS) $(AUTOSRCS) $(AUTOINCS)
 
-$(LIB_OBJS) $(PIC_OBJS) $(SAVE_HELPER_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS): $(AUTOINCS) libxl.api-ok
+$(OBJS-y) $(PIC_OBJS) $(SAVE_HELPER_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS): $(AUTOINCS) libxl.api-ok
 
 libxl.api-ok: check-libxl-api-rules _libxl.api-for-check
 	$(PERL) $^
@@ -212,8 +212,8 @@ $(XEN_INCLUDE)/libxl_json.h: $(XEN_INCLUDE)/_libxl_types_json.h
 libxl_internal.h: _libxl_types_internal.h _libxl_types_private.h _libxl_types_internal_private.h
 libxl_internal_json.h: _libxl_types_internal_json.h
 
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS) $(SAVE_HELPER_OBJS): $(XEN_INCLUDE)/libxl.h
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): libxl_internal.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS) $(SAVE_HELPER_OBJS): $(XEN_INCLUDE)/libxl.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS): libxl_internal.h
 
 _libxl_type%.h _libxl_type%_json.h _libxl_type%_private.h _libxl_type%.c: libxl_type%.idl gentypes.py idl.py
 	$(eval stem = $(notdir $*))
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 39a671d7ed..998435d494 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -17,12 +17,12 @@ include $(XEN_ROOT)/tools/Rules.mk
 
 CFLAGS += -include $(XEN_ROOT)/tools/config.h
 
-SRCS-y += xenstat.c
-SRCS-y += xenstat_qmp.c
-SRCS-$(CONFIG_Linux) += xenstat_linux.c
-SRCS-$(CONFIG_SunOS) += xenstat_solaris.c
-SRCS-$(CONFIG_NetBSD) += xenstat_netbsd.c
-SRCS-$(CONFIG_FreeBSD) += xenstat_freebsd.c
+OBJS-y += xenstat.o
+OBJS-y += xenstat_qmp.o
+OBJS-$(CONFIG_Linux) += xenstat_linux.o
+OBJS-$(CONFIG_SunOS) += xenstat_solaris.o
+OBJS-$(CONFIG_NetBSD) += xenstat_netbsd.o
+OBJS-$(CONFIG_FreeBSD) += xenstat_freebsd.o
 
 LDLIBS-y += -lyajl
 LDLIBS-$(CONFIG_SunOS) += -lkstat
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index b94060be8d..778da51f95 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -8,8 +8,8 @@ ifeq ($(CONFIG_Linux),y)
 LDLIBS += -ldl
 endif
 
-SRCS-y   += xs_lib.c
-SRCS-y   += xs.c
+OBJS-y   += xs_lib.o
+OBJS-y   += xs.o
 
 LIBHEADER = xenstore.h xenstore_lib.h
 
diff --git a/tools/libs/toolcore/Makefile b/tools/libs/toolcore/Makefile
index 9c013b2879..ce417ea648 100644
--- a/tools/libs/toolcore/Makefile
+++ b/tools/libs/toolcore/Makefile
@@ -6,7 +6,7 @@ MINOR	= 0
 
 LIBHEADER := xentoolcore.h
 
-SRCS-y	+= handlereg.c
+OBJS-y	+= handlereg.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/toollog/Makefile b/tools/libs/toollog/Makefile
index dce1b2de85..c09aa02ba5 100644
--- a/tools/libs/toollog/Makefile
+++ b/tools/libs/toollog/Makefile
@@ -4,7 +4,7 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR	= 1
 MINOR	= 0
 
-SRCS-y	+= xtl_core.c
-SRCS-y	+= xtl_logger_stdio.c
+OBJS-y	+= xtl_core.o
+OBJS-y	+= xtl_logger_stdio.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/util/Makefile b/tools/libs/util/Makefile
index 7a658e9446..ffe507b379 100644
--- a/tools/libs/util/Makefile
+++ b/tools/libs/util/Makefile
@@ -1,13 +1,13 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y += libxlu_cfg_y.c
-SRCS-y += libxlu_cfg_l.c
-SRCS-y += libxlu_cfg.c
-SRCS-y += libxlu_disk_l.c
-SRCS-y += libxlu_disk.c
-SRCS-y += libxlu_vif.c
-SRCS-y += libxlu_pci.c
+OBJS-y += libxlu_cfg_y.o
+OBJS-y += libxlu_cfg_l.o
+OBJS-y += libxlu_cfg.o
+OBJS-y += libxlu_disk_l.o
+OBJS-y += libxlu_disk.o
+OBJS-y += libxlu_vif.o
+OBJS-y += libxlu_pci.o
 
 CFLAGS += -Wno-format-zero-length -Wmissing-declarations \
 	-Wno-declaration-after-statement -Wformat-nonliteral
@@ -39,7 +39,7 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-$(LIB_OBJS) $(PIC_OBJS): $(AUTOINCS)
+$(OBJS-y) $(PIC_OBJS): $(AUTOINCS)
 
 %.c %.h:: %.y
 	@rm -f $*.[ch]
diff --git a/tools/libs/vchan/Makefile b/tools/libs/vchan/Makefile
index 4ccb4dd1f6..ac2bff66f5 100644
--- a/tools/libs/vchan/Makefile
+++ b/tools/libs/vchan/Makefile
@@ -5,8 +5,8 @@ CFLAGS += $(CFLAGS_libxenctrl)
 
 LIBHEADER := libxenvchan.h
 
-SRCS-y += init.c
-SRCS-y += io.c
+OBJS-y += init.o
+OBJS-y += io.o
 
 NO_HEADERS_CHK := y
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs/guest: rename ELF_OBJS to LIBELF_OBJS
Message-Id: <E1o27QR-0006Qu-3U@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:33:55 +0000

commit 58be08a0e5e42d919d70e27ff31b29138255b564
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:10 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/guest: rename ELF_OBJS to LIBELF_OBJS
    
    It seems a better name. Later, we will introduce LIBX86_OBJS to
    collect lib/x86/* objects.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 17eb0ebf4b..7707d4300f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -33,13 +33,12 @@ CFLAGS += -I$(XEN_libxenctrl)
 vpath %.c ../../../xen/common/libelf
 CFLAGS += -I../../../xen/common/libelf
 
-ELF_OBJS-y += libelf-tools.o libelf-loader.o
-ELF_OBJS-y += libelf-dominfo.o
+LIBELF_OBJS += libelf-tools.o libelf-loader.o
+LIBELF_OBJS += libelf-dominfo.o
 
-OBJS-y += $(ELF_OBJS-y)
+OBJS-y += $(LIBELF_OBJS)
 
-$(ELF_OBJS-y): CFLAGS += -Wno-pointer-sign
-$(ELF_OBJS-y:.o=.opic): CFLAGS += -Wno-pointer-sign
+$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs/guest: rework CFLAGS
Message-Id: <E1o27Qb-0006RS-6h@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:05 +0000

commit 74c01e32adbaa183bd6189da7ff2b62ac5bb3b68
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:11 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/guest: rework CFLAGS
    
    Remove '-Werror -Wmissing-progress -I./include $(CFLAGS_xeninclude)',
    those flags are already added via "libs.mk".
    
    Flag "-I." isn't needed, we just need to fix the #include of
    "xg_core.h" as this header isn't expected to be installed.
    
    Make use of "-iquote" instead of '-I' for double-quote included
    headers.
    
    Also, regroup the CFLAGS into the same place in the makefile.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile          | 20 +++++++++-----------
 tools/libs/guest/xg_offline_page.c |  2 +-
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 7707d4300f..4f2373101f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -28,18 +28,13 @@ OBJS-y       += xg_core.o
 OBJS-$(CONFIG_X86) += xg_core_x86.o
 OBJS-$(CONFIG_ARM) += xg_core_arm.o
 
-CFLAGS += -I$(XEN_libxenctrl)
-
 vpath %.c ../../../xen/common/libelf
-CFLAGS += -I../../../xen/common/libelf
 
 LIBELF_OBJS += libelf-tools.o libelf-loader.o
 LIBELF_OBJS += libelf-dominfo.o
 
 OBJS-y += $(LIBELF_OBJS)
 
-$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
-
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
 
@@ -70,10 +65,12 @@ OBJS-y                 += xg_dom_decompress_unsafe_xz.o
 OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
 endif
 
-CFLAGS   += -Werror -Wmissing-prototypes
-CFLAGS   += -I. -I./include $(CFLAGS_xeninclude)
-CFLAGS   += -D__XEN_TOOLS__
-CFLAGS   += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -D__XEN_TOOLS__
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -iquote ../../../xen/common/libelf
+
+# To be able to include xc_private.h
+CFLAGS += -iquote $(XEN_libxenctrl)
 
 # Needed for posix_fadvise64() in xc_linux.c
 CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
@@ -92,8 +89,9 @@ ZLIB_CFLAGS :=
 ZLIB_LIBS :=
 endif
 
-xg_dom_bzimageloader.o: CFLAGS += $(ZLIB_CFLAGS)
-xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
+xg_dom_bzimageloader.o xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
+
+$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 LIBHEADER := xenguest.h
 
diff --git a/tools/libs/guest/xg_offline_page.c b/tools/libs/guest/xg_offline_page.c
index cfe0e2d537..c594fdba41 100644
--- a/tools/libs/guest/xg_offline_page.c
+++ b/tools/libs/guest/xg_offline_page.c
@@ -25,7 +25,7 @@
 #include <stdlib.h>
 #include <unistd.h>
 #include <sys/time.h>
-#include <xg_core.h>
+#include "xg_core.h"
 
 #include "xc_private.h"
 #include "xg_private.h"
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs/store: use of -iquote instead of -I
Message-Id: <E1o27Ql-0006Tk-9g@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:15 +0000

commit 4541f1642777f9ac2d5c292467208e7d923a9a4b
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:12 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/store: use of -iquote instead of -I
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/store/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 778da51f95..2334c953bb 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -22,7 +22,7 @@ CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
 CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
 
 vpath xs_lib.c $(XEN_ROOT)/tools/xenstore
-CFLAGS += -I $(XEN_ROOT)/tools/xenstore
+CFLAGS += -iquote $(XEN_ROOT)/tools/xenstore
 
 xs.opic: CFLAGS += -DUSE_PTHREAD
 ifeq ($(CONFIG_Linux),y)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs/stat: Fix and rework python-bindings build
Message-Id: <E1o27Qv-0006UX-Do@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:25 +0000

commit 1e983961452bec4df691e1c6521e06de8567486a
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:13 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/stat: Fix and rework python-bindings build
    
    Fix the dependency on the library, $(SHLIB) variable doesn't exist
    anymore.
    
    Rework dependency on the include file, we can let `swig` generate the
    dependency for us with the use of "-M*" flags.
    
    The xenstat.h file has moved so we need to fix the include location.
    
    Rather than relaying on the VCS to create an empty directory for us,
    we can create one before generating the *.c file for the bindings.
    
    Make use of generic variable names to build a shared library from a
    source file: CFLAGS, LDFLAGS, and LDLIBS.
    
    Fix python's specific *flags by using python-config, and add them to
    generic flags variables: CFLAGS, LDLIBS.
    
    To build a shared library, we need to build the source file with
    "-fPIC", which was drop by 6d0ec05390 (tools: split libxenstat into
    new tools/libs/stat directory).
    
    The source file generated by swig seems to be missing a prototype for
    the "init" function, so we need "-Wno-missing-prototypes" in order to
    build it.
    
    Add some targets to .PHONY.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/stat/Makefile                    | 27 +++++++++++++++++++--------
 tools/libs/stat/bindings/swig/python/.empty |  1 -
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 998435d494..b8d75810fc 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -49,23 +49,34 @@ install-bindings: install-perl-bindings install-python-bindings
 .PHONY: uninstall-bindings
 uninstall-bindings: uninstall-perl-bindings uninstall-python-bindings
 
-$(BINDINGS): $(SHLIB) $(SHLIB_LINKS) include/xenstat.h
+$(BINDINGS): libxenstat.so
 
-SWIG_FLAGS=-module xenstat -Iinclude -I.
+SWIG_FLAGS = -module xenstat -I$(XEN_INCLUDE)
+SWIG_FLAGS += -MMD -MP -MF .$(if $(filter-out .,$(@D)),$(subst /,@,$(@D))@)$(@F).d
 
 # Python bindings
-PYTHON_VERSION=$(PYTHON:python%=%)
-PYTHON_FLAGS=-I/usr/include/python$(PYTHON_VERSION) -lpython$(PYTHON_VERSION)
 $(PYMOD): $(PYSRC)
 $(PYSRC): bindings/swig/xenstat.i
-	swig -python $(SWIG_FLAGS) -outdir $(@D) -o $(PYSRC) $<
-
+	mkdir -p $(@D)
+	swig -python $(SWIG_FLAGS) -outdir $(@D) -o $@ $<
+
+$(PYLIB): CFLAGS += $(shell $(PYTHON)-config --includes)
+$(PYLIB): CFLAGS += -fPIC
+$(PYLIB): CFLAGS += -Wno-missing-prototypes
+$(PYLIB): LDFLAGS += $(SHLIB_LDFLAGS)
+$(PYLIB): LDLIBS := $(shell $(PYTHON)-config --libs)
+$(PYLIB): LDLIBS += $(LDLIBS_libxenstat)
 $(PYLIB): $(PYSRC)
-	$(CC) $(CFLAGS) $(LDFLAGS) $(PYTHON_FLAGS) $(SHLIB_LDFLAGS) -lxenstat -o $@ $< $(APPEND_LDFLAGS)
+	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $< $(LDLIBS) $(APPEND_LDFLAGS)
 
+.PHONY: python-bindings
 python-bindings: $(PYLIB) $(PYMOD)
 
-pythonlibdir=$(prefix)/lib/python$(PYTHON_VERSION)/site-packages
+pythonlibdir = $(shell $(PYTHON) -c \
+	       'import distutils.sysconfig as cfg; \
+	        print(cfg.get_python_lib(False, False, prefix="$(prefix)"))')
+
+.PHONY: install-python-bindings
 install-python-bindings: $(PYLIB) $(PYMOD)
 	$(INSTALL_PROG) $(PYLIB) $(DESTDIR)$(pythonlibdir)/_xenstat.so
 	$(INSTALL_PROG) $(PYMOD) $(DESTDIR)$(pythonlibdir)/xenstat.py
diff --git a/tools/libs/stat/bindings/swig/python/.empty b/tools/libs/stat/bindings/swig/python/.empty
deleted file mode 100644
index 2a8dd4274d..0000000000
--- a/tools/libs/stat/bindings/swig/python/.empty
+++ /dev/null
@@ -1 +0,0 @@
-This directory is empty; this file is included to prevent version control systems from removing the directory.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
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Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] libs/stat: Fix and rework perl-binding build
Message-Id: <E1o27R5-0006VL-Gi@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:35 +0000

commit 9ae030da5cf3bd7151d2d2d7125c768bfcffff97
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:14 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/stat: Fix and rework perl-binding build
    
    For PERL_FLAGS, use make's shell rather than a backquote.
    
    Rather than relying on the VCS to create an empty directory for us,
    we can create one before generating the *.c file for the bindings.
    
    Make use of generic variable names to build a shared library from a
    source file: CFLAGS, LDFLAGS, and LDLIBS.
    
    To build a shared library, we need to build the source file with
    "-fPIC", which was drop by 6d0ec05390 (tools: split libxenstat into
    new tools/libs/stat directory).
    
    The source file generated by swig seems to be missing many prototype for
    many functions, so we need "-Wno-missing-prototypes" in order to
    build it. Also, one of the prototype is deemed malformed, so we also
    need "-Wno-strict-prototypes".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/stat/Makefile                  | 15 +++++++++++----
 tools/libs/stat/bindings/swig/perl/.empty |  1 -
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index b8d75810fc..7eaf50e91e 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -94,13 +94,20 @@ uninstall:: uninstall-python-bindings
 endif
 
 # Perl bindings
-PERL_FLAGS=`perl -MConfig -e 'print "$$Config{ccflags} -I$$Config{archlib}/CORE";'`
+PERL_FLAGS = $(shell $(PERL) -MConfig -e 'print "$$Config{ccflags} -I$$Config{archlib}/CORE";')
 $(PERLMOD): $(PERLSRC)
 $(PERLSRC): bindings/swig/xenstat.i
-	swig -perl $(SWIG_FLAGS) -outdir $(@D) -o $(PERLSRC) $<
-
+	mkdir -p $(@D)
+	swig -perl $(SWIG_FLAGS) -outdir $(@D) -o $@ $<
+
+$(PERLLIB): CFLAGS += -fPIC
+$(PERLLIB): CFLAGS += -Wno-strict-prototypes
+$(PERLLIB): CFLAGS += -Wno-missing-prototypes
+$(PERLLIB): LDFLAGS += $(PERL_FLAGS)
+$(PERLLIB): LDFLAGS += $(SHLIB_LDFLAGS)
+$(PERLLIB): LDLIBS := $(LDLIBS_libxenstat)
 $(PERLLIB): $(PERLSRC)
-	$(CC) $(CFLAGS) $(LDFLAGS) $(PERL_FLAGS) $(SHLIB_LDFLAGS) -lxenstat -o $@ $< $(APPEND_LDFLAGS)
+	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $< $(LDLIBS) $(APPEND_LDFLAGS)
 
 .PHONY: perl-bindings
 perl-bindings: $(PERLLIB) $(PERLMOD)
diff --git a/tools/libs/stat/bindings/swig/perl/.empty b/tools/libs/stat/bindings/swig/perl/.empty
deleted file mode 100644
index 2a8dd4274d..0000000000
--- a/tools/libs/stat/bindings/swig/perl/.empty
+++ /dev/null
@@ -1 +0,0 @@
-This directory is empty; this file is included to prevent version control systems from removing the directory.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] stubdom: introduce xenlibs.mk
Message-Id: <E1o27RF-0006WN-Kw@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:45 +0000

commit 1489a2a084d588701af086b473aeb98e9c4ebaa2
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:16 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: introduce xenlibs.mk
    
    This new makefile will be used to build libraries that provides
    "Makefile.common".
    
    At some point, we will be converting Makefile in tools/ to "subdirmk"
    and stubdom build will not be able to use those new makefiles, so we
    will put the necessary information for stubdom to build the xen
    libraries into a new Makefile.common and xenlibs.mk will use it.
    We only need to build static libraries and don't need anything else.
    
    The check for the presence of "Makefile.common" will go aways once
    there is one for all libraries used by stubdom build.
    
    Also remove DESTDIR= from "clean" targets, we don't do installation in
    this recipe so the value of DESTDIR doesn't matter.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile   |  9 +++++++--
 stubdom/xenlibs.mk | 13 +++++++++++++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 5fb5dbc341..fba4c977ef 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -346,6 +346,7 @@ define do_links
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
   ln -sf $(dir $<)*.[ch] .; \
+  [ -e $(dir $<)Makefile.common ] && ln -sf $(dir $<)Makefile.common . ||:; \
   ln -sf $(dir $<)Makefile .
   touch $@
 endef
@@ -355,10 +356,14 @@ define BUILD_lib
  libxen$(1): libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: $$(LIBDEPS_$(1)) $$(LIBDEP_$(1))
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: mk-headers-$$(XEN_TARGET_ARCH) $$(NEWLIB_STAMPFILE) .phony
-	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y -C $$(@D) $$(@F)
+	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y $$(if $$(wildcard $$(@D)/Makefile.common),-f $(CURDIR)/xenlibs.mk) -C $$(@D) $$(@F)
 
  clean-libxen$(1):
-	[ ! -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ] || $$(MAKE) DESTDIR= -C libs-$$(XEN_TARGET_ARCH)/$(1) clean
+	if [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile.common ]; then \
+	    $$(MAKE) -f $(CURDIR)/xenlibs.mk -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
+	elif [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ]; then \
+	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
+	fi
 
  libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile
 	$$(do_links)
diff --git a/stubdom/xenlibs.mk b/stubdom/xenlibs.mk
new file mode 100644
index 0000000000..5c8742ccf9
--- /dev/null
+++ b/stubdom/xenlibs.mk
@@ -0,0 +1,13 @@
+include $(XEN_ROOT)/tools/Rules.mk
+
+include Makefile.common
+
+LIBNAME := $(notdir $(CURDIR))
+FILENAME_$(LIBNAME) ?= xen$(LIBNAME)
+LIB_FILE_NAME = $(FILENAME_$(LIBNAME))
+
+lib$(LIB_FILE_NAME).a: $(OBJS-y)
+	$(AR) rc $@ $^
+
+clean::
+	rm -f $(OBJS-y) lib$(LIB_FILE_NAME).a
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/libs: create Makefile.common to be used by stubdom build system
Message-Id: <E1o27RP-0006X9-O4@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:34:55 +0000

commit cfa5e1d250a35554dace3487fcdc47023a1498c3
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:17 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/libs: create Makefile.common to be used by stubdom build system
    
    This new "Makefile.common" is intended to be used by both tools/ and
    stubdom/ build system without stubdom needed to use tools/ build
    system.
    
    It should contain the necessary list of objects and CFLAGS needed to
    build a static library.
    
    Change stubdom/ to check Makefile.common, for the linkfarm.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 stubdom/Makefile                         |  2 +-
 tools/libs/call/Makefile                 |  7 +--
 tools/libs/call/Makefile.common          |  6 +++
 tools/libs/ctrl/Makefile                 | 45 +---------------
 tools/libs/ctrl/Makefile.common          | 44 ++++++++++++++++
 tools/libs/devicemodel/Makefile          |  7 +--
 tools/libs/devicemodel/Makefile.common   |  6 +++
 tools/libs/evtchn/Makefile               |  7 +--
 tools/libs/evtchn/Makefile.common        |  6 +++
 tools/libs/foreignmemory/Makefile        |  7 +--
 tools/libs/foreignmemory/Makefile.common |  6 +++
 tools/libs/gnttab/Makefile               |  9 +---
 tools/libs/gnttab/Makefile.common        |  8 +++
 tools/libs/guest/Makefile                | 90 +-------------------------------
 tools/libs/guest/Makefile.common         | 84 +++++++++++++++++++++++++++++
 tools/libs/toolcore/Makefile             |  2 +-
 tools/libs/toolcore/Makefile.common      |  1 +
 tools/libs/toollog/Makefile              |  3 +-
 tools/libs/toollog/Makefile.common       |  2 +
 19 files changed, 174 insertions(+), 168 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index fba4c977ef..fbc63a5063 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -365,7 +365,7 @@ define BUILD_lib
 	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
 	fi
 
- libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile
+ libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile.common
 	$$(do_links)
 endef
 
diff --git a/tools/libs/call/Makefile b/tools/libs/call/Makefile
index e5cb7c937c..103f5ad360 100644
--- a/tools/libs/call/Makefile
+++ b/tools/libs/call/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 3
 
-OBJS-y                 += core.o buffer.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/call/Makefile.common b/tools/libs/call/Makefile.common
new file mode 100644
index 0000000000..85e608f8ad
--- /dev/null
+++ b/tools/libs/call/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o buffer.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index 5fd06949f1..93442ab389 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -1,50 +1,7 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-OBJS-y       += xc_altp2m.o
-OBJS-y       += xc_cpupool.o
-OBJS-y       += xc_domain.o
-OBJS-y       += xc_evtchn.o
-OBJS-y       += xc_gnttab.o
-OBJS-y       += xc_misc.o
-OBJS-y       += xc_flask.o
-OBJS-y       += xc_physdev.o
-OBJS-y       += xc_private.o
-OBJS-y       += xc_csched.o
-OBJS-y       += xc_csched2.o
-OBJS-y       += xc_arinc653.o
-OBJS-y       += xc_rt.o
-OBJS-y       += xc_tbuf.o
-OBJS-y       += xc_pm.o
-OBJS-y       += xc_cpu_hotplug.o
-OBJS-y       += xc_vm_event.o
-OBJS-y       += xc_vmtrace.o
-OBJS-y       += xc_monitor.o
-OBJS-y       += xc_mem_paging.o
-OBJS-y       += xc_mem_access.o
-OBJS-y       += xc_memshr.o
-OBJS-y       += xc_hcall_buf.o
-OBJS-y       += xc_foreign_memory.o
-OBJS-y       += xc_kexec.o
-OBJS-y       += xc_resource.o
-OBJS-$(CONFIG_X86) += xc_psr.o
-OBJS-$(CONFIG_X86) += xc_pagetab.o
-OBJS-$(CONFIG_Linux) += xc_linux.o
-OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
-OBJS-$(CONFIG_SunOS) += xc_solaris.o
-OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
-OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
-OBJS-$(CONFIG_MiniOS) += xc_minios.o
-OBJS-y       += xc_evtchn_compat.o
-OBJS-y       += xc_gnttab_compat.o
-OBJS-y       += xc_devicemodel_compat.o
-
-CFLAGS   += -D__XEN_TOOLS__
-CFLAGS	+= $(PTHREAD_CFLAGS)
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-
-# Needed for posix_fadvise64() in xc_linux.c
-CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
+include Makefile.common
 
 LIBHEADER := xenctrl.h xenctrl_compat.h
 PKG_CONFIG := xencontrol.pc
diff --git a/tools/libs/ctrl/Makefile.common b/tools/libs/ctrl/Makefile.common
new file mode 100644
index 0000000000..0a09c28fd3
--- /dev/null
+++ b/tools/libs/ctrl/Makefile.common
@@ -0,0 +1,44 @@
+OBJS-y       += xc_altp2m.o
+OBJS-y       += xc_cpupool.o
+OBJS-y       += xc_domain.o
+OBJS-y       += xc_evtchn.o
+OBJS-y       += xc_gnttab.o
+OBJS-y       += xc_misc.o
+OBJS-y       += xc_flask.o
+OBJS-y       += xc_physdev.o
+OBJS-y       += xc_private.o
+OBJS-y       += xc_csched.o
+OBJS-y       += xc_csched2.o
+OBJS-y       += xc_arinc653.o
+OBJS-y       += xc_rt.o
+OBJS-y       += xc_tbuf.o
+OBJS-y       += xc_pm.o
+OBJS-y       += xc_cpu_hotplug.o
+OBJS-y       += xc_vm_event.o
+OBJS-y       += xc_vmtrace.o
+OBJS-y       += xc_monitor.o
+OBJS-y       += xc_mem_paging.o
+OBJS-y       += xc_mem_access.o
+OBJS-y       += xc_memshr.o
+OBJS-y       += xc_hcall_buf.o
+OBJS-y       += xc_foreign_memory.o
+OBJS-y       += xc_kexec.o
+OBJS-y       += xc_resource.o
+OBJS-$(CONFIG_X86) += xc_psr.o
+OBJS-$(CONFIG_X86) += xc_pagetab.o
+OBJS-$(CONFIG_Linux) += xc_linux.o
+OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
+OBJS-$(CONFIG_SunOS) += xc_solaris.o
+OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
+OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
+OBJS-$(CONFIG_MiniOS) += xc_minios.o
+OBJS-y       += xc_evtchn_compat.o
+OBJS-y       += xc_gnttab_compat.o
+OBJS-y       += xc_devicemodel_compat.o
+
+CFLAGS   += -D__XEN_TOOLS__
+CFLAGS	+= $(PTHREAD_CFLAGS)
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+
+# Needed for posix_fadvise64() in xc_linux.c
+CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
diff --git a/tools/libs/devicemodel/Makefile b/tools/libs/devicemodel/Makefile
index a0a2d24f99..b70dd774e4 100644
--- a/tools/libs/devicemodel/Makefile
+++ b/tools/libs/devicemodel/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += common.o
-OBJS-$(CONFIG_FreeBSD) += common.o
-OBJS-$(CONFIG_SunOS)   += compat.o
-OBJS-$(CONFIG_NetBSD)  += compat.o
-OBJS-$(CONFIG_MiniOS)  += compat.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/devicemodel/Makefile.common b/tools/libs/devicemodel/Makefile.common
new file mode 100644
index 0000000000..a7bf7c35bb
--- /dev/null
+++ b/tools/libs/devicemodel/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += common.o
+OBJS-$(CONFIG_FreeBSD) += common.o
+OBJS-$(CONFIG_SunOS)   += compat.o
+OBJS-$(CONFIG_NetBSD)  += compat.o
+OBJS-$(CONFIG_MiniOS)  += compat.o
diff --git a/tools/libs/evtchn/Makefile b/tools/libs/evtchn/Makefile
index 8208ecf650..3dad3840c6 100644
--- a/tools/libs/evtchn/Makefile
+++ b/tools/libs/evtchn/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/evtchn/Makefile.common b/tools/libs/evtchn/Makefile.common
new file mode 100644
index 0000000000..20629f521a
--- /dev/null
+++ b/tools/libs/evtchn/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/foreignmemory/Makefile b/tools/libs/foreignmemory/Makefile
index 4427435932..b70dd774e4 100644
--- a/tools/libs/foreignmemory/Makefile
+++ b/tools/libs/foreignmemory/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/foreignmemory/Makefile.common b/tools/libs/foreignmemory/Makefile.common
new file mode 100644
index 0000000000..ff3b1d4f3e
--- /dev/null
+++ b/tools/libs/foreignmemory/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/gnttab/Makefile b/tools/libs/gnttab/Makefile
index 7d7aeeadff..3dad3840c6 100644
--- a/tools/libs/gnttab/Makefile
+++ b/tools/libs/gnttab/Makefile
@@ -4,13 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-OBJS-GNTTAB            += gnttab_core.o
-OBJS-GNTSHR            += gntshr_core.o
-
-OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
-OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
-OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
-OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
-OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/gnttab/Makefile.common b/tools/libs/gnttab/Makefile.common
new file mode 100644
index 0000000000..759e36e1cb
--- /dev/null
+++ b/tools/libs/gnttab/Makefile.common
@@ -0,0 +1,8 @@
+OBJS-GNTTAB            += gnttab_core.o
+OBJS-GNTSHR            += gntshr_core.o
+
+OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
+OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
+OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
+OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
+OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 4f2373101f..19d3ff2fdb 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -1,97 +1,11 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-ifeq ($(CONFIG_LIBXC_MINIOS),y)
-# Save/restore of a domain is currently incompatible with a stubdom environment
-override CONFIG_MIGRATE := n
-endif
-
-OBJS-y += xg_private.o
-OBJS-y += xg_domain.o
-OBJS-y += xg_suspend.o
-OBJS-y += xg_resume.o
-ifeq ($(CONFIG_MIGRATE),y)
-OBJS-y += xg_sr_common.o
-OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
-OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
-OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
-OBJS-y += xg_sr_restore.o
-OBJS-y += xg_sr_save.o
-OBJS-y += xg_offline_page.o
-else
-OBJS-y += xg_nomigrate.o
-endif
-OBJS-y       += xg_core.o
-OBJS-$(CONFIG_X86) += xg_core_x86.o
-OBJS-$(CONFIG_ARM) += xg_core_arm.o
-
-vpath %.c ../../../xen/common/libelf
-
-LIBELF_OBJS += libelf-tools.o libelf-loader.o
-LIBELF_OBJS += libelf-dominfo.o
-
-OBJS-y += $(LIBELF_OBJS)
-
-ifeq ($(CONFIG_X86),y) # Add libx86 to the build
-vpath %.c ../../../xen/lib/x86
-
-OBJS-y                 += cpuid.o msr.o policy.o
-endif
-
-# new domain builder
-OBJS-y                 += xg_dom_core.o
-OBJS-y                 += xg_dom_boot.o
-OBJS-y                 += xg_dom_elfloader.o
-OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
-OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
-OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
-OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
-OBJS-y                 += xg_dom_binloader.o
-OBJS-y                 += xg_dom_compat_linux.o
-
-OBJS-$(CONFIG_X86)     += xg_dom_x86.o
-OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
-OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
-
-ifeq ($(CONFIG_LIBXC_MINIOS),y)
-OBJS-y                 += xg_dom_decompress_unsafe.o
-OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
-OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
-OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
-OBJS-y                 += xg_dom_decompress_unsafe_xz.o
-OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
-endif
-
-CFLAGS += -D__XEN_TOOLS__
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-CFLAGS += -iquote ../../../xen/common/libelf
-
-# To be able to include xc_private.h
-CFLAGS += -iquote $(XEN_libxenctrl)
-
-# Needed for posix_fadvise64() in xc_linux.c
-CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
-
-CFLAGS	+= $(PTHREAD_CFLAGS)
-CFLAGS	+= $(CFLAGS_libxentoollog)
-CFLAGS	+= $(CFLAGS_libxenevtchn)
-CFLAGS	+= $(CFLAGS_libxendevicemodel)
-
-# libxenguest includes xc_private.h, so needs this despite not using
-# this functionality directly.
-CFLAGS += $(CFLAGS_libxencall) $(CFLAGS_libxenforeignmemory)
-
-ifeq ($(CONFIG_MiniOS),y)
-ZLIB_CFLAGS :=
-ZLIB_LIBS :=
-endif
+include Makefile.common
 
 xg_dom_bzimageloader.o xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
 
-$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
+$(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 LIBHEADER := xenguest.h
 
diff --git a/tools/libs/guest/Makefile.common b/tools/libs/guest/Makefile.common
new file mode 100644
index 0000000000..a026a2f662
--- /dev/null
+++ b/tools/libs/guest/Makefile.common
@@ -0,0 +1,84 @@
+ifeq ($(CONFIG_LIBXC_MINIOS),y)
+# Save/restore of a domain is currently incompatible with a stubdom environment
+override CONFIG_MIGRATE := n
+endif
+
+OBJS-y += xg_private.o
+OBJS-y += xg_domain.o
+OBJS-y += xg_suspend.o
+OBJS-y += xg_resume.o
+ifeq ($(CONFIG_MIGRATE),y)
+OBJS-y += xg_sr_common.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
+OBJS-y += xg_sr_restore.o
+OBJS-y += xg_sr_save.o
+OBJS-y += xg_offline_page.o
+else
+OBJS-y += xg_nomigrate.o
+endif
+OBJS-y       += xg_core.o
+OBJS-$(CONFIG_X86) += xg_core_x86.o
+OBJS-$(CONFIG_ARM) += xg_core_arm.o
+
+vpath %.c ../../../xen/common/libelf
+
+LIBELF_OBJS += libelf-tools.o libelf-loader.o
+LIBELF_OBJS += libelf-dominfo.o
+
+OBJS-y += $(LIBELF_OBJS)
+
+ifeq ($(CONFIG_X86),y) # Add libx86 to the build
+vpath %.c ../../../xen/lib/x86
+
+OBJS-y                 += cpuid.o msr.o policy.o
+endif
+
+# new domain builder
+OBJS-y                 += xg_dom_core.o
+OBJS-y                 += xg_dom_boot.o
+OBJS-y                 += xg_dom_elfloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
+OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
+OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
+OBJS-y                 += xg_dom_binloader.o
+OBJS-y                 += xg_dom_compat_linux.o
+
+OBJS-$(CONFIG_X86)     += xg_dom_x86.o
+OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
+OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
+
+ifeq ($(CONFIG_LIBXC_MINIOS),y)
+OBJS-y                 += xg_dom_decompress_unsafe.o
+OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
+OBJS-y                 += xg_dom_decompress_unsafe_xz.o
+OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
+endif
+
+CFLAGS += -D__XEN_TOOLS__
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -iquote ../../../xen/common/libelf
+
+# To be able to include xc_private.h
+CFLAGS += -iquote $(XEN_libxenctrl)
+
+# Needed for posix_fadvise64() in xc_linux.c
+CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
+
+CFLAGS	+= $(PTHREAD_CFLAGS)
+CFLAGS	+= $(CFLAGS_libxentoollog)
+CFLAGS	+= $(CFLAGS_libxenevtchn)
+CFLAGS	+= $(CFLAGS_libxendevicemodel)
+
+# libxenguest includes xc_private.h, so needs this despite not using
+# this functionality directly.
+CFLAGS += $(CFLAGS_libxencall) $(CFLAGS_libxenforeignmemory)
+
+$(LIBELF_OBJS): CFLAGS += -Wno-pointer-sign
diff --git a/tools/libs/toolcore/Makefile b/tools/libs/toolcore/Makefile
index ce417ea648..0d92b68b3b 100644
--- a/tools/libs/toolcore/Makefile
+++ b/tools/libs/toolcore/Makefile
@@ -6,7 +6,7 @@ MINOR	= 0
 
 LIBHEADER := xentoolcore.h
 
-OBJS-y	+= handlereg.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/toolcore/Makefile.common b/tools/libs/toolcore/Makefile.common
new file mode 100644
index 0000000000..9ade6c12bf
--- /dev/null
+++ b/tools/libs/toolcore/Makefile.common
@@ -0,0 +1 @@
+OBJS-y	+= handlereg.o
diff --git a/tools/libs/toollog/Makefile b/tools/libs/toollog/Makefile
index c09aa02ba5..2361b8cbf1 100644
--- a/tools/libs/toollog/Makefile
+++ b/tools/libs/toollog/Makefile
@@ -4,7 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR	= 1
 MINOR	= 0
 
-OBJS-y	+= xtl_core.o
-OBJS-y	+= xtl_logger_stdio.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/toollog/Makefile.common b/tools/libs/toollog/Makefile.common
new file mode 100644
index 0000000000..c053ac6a73
--- /dev/null
+++ b/tools/libs/toollog/Makefile.common
@@ -0,0 +1,2 @@
+OBJS-y	+= xtl_core.o
+OBJS-y	+= xtl_logger_stdio.o
--
generated by git-patchbot for /home/xen/git/xen.git#staging


From xen-changelog-bounces@lists.xenproject.org Fri Jun 17 08:35:06 2022
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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenstore: introduce Makefile.common to be used by stubdom
Message-Id: <E1o27RZ-0006YD-Qv@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:35:05 +0000

commit ce4dfcb6ffc2bef1e53dba119e4fcba3cc4c6eea
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:18 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/xenstore: introduce Makefile.common to be used by stubdom
    
    Also change stubdom to depends on Makefile.common.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 stubdom/Makefile               |  4 ++--
 tools/xenstore/Makefile        | 33 +++------------------------------
 tools/xenstore/Makefile.common | 33 +++++++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+), 32 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index fbc63a5063..6b804824ba 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -371,10 +371,10 @@ endef
 
 $(foreach lib,$(STUB_LIBS),$(eval $(call BUILD_lib,$(lib))))
 
-xenstore/stamp: $(XEN_ROOT)/tools/xenstore/Makefile
+xenstore/stamp: $(XEN_ROOT)/tools/xenstore/Makefile.common
 	$(do_links)
 
-xenstorepvh/stamp: $(XEN_ROOT)/tools/xenstore/Makefile
+xenstorepvh/stamp: $(XEN_ROOT)/tools/xenstore/Makefile.common
 	$(do_links)
 
 LINK_DIRS := xenstore xenstorepvh $(foreach dir,$(STUB_LIBS),libs-$(XEN_TARGET_ARCH)/$(dir))
diff --git a/tools/xenstore/Makefile b/tools/xenstore/Makefile
index 830052c65f..1b66190cc5 100644
--- a/tools/xenstore/Makefile
+++ b/tools/xenstore/Makefile
@@ -1,31 +1,7 @@
 XEN_ROOT=$(CURDIR)/../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-CFLAGS += -Werror
-# Include configure output (config.h)
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-CFLAGS += -I./include
-CFLAGS += $(CFLAGS_libxenevtchn)
-CFLAGS += $(CFLAGS_libxenctrl)
-CFLAGS += $(CFLAGS_libxenguest)
-CFLAGS += $(CFLAGS_libxentoolcore)
-CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
-CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
-
-ifdef CONFIG_STUBDOM
-CFLAGS += -DNO_SOCKETS=1
-endif
-
-XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
-XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
-XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
-
-XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
-
-$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
+include Makefile.common
 
 xenstored: LDLIBS += $(LDLIBS_libxenevtchn)
 xenstored: LDLIBS += $(LDLIBS_libxengnttab)
@@ -65,9 +41,6 @@ clients: xenstore $(CLIENTS) xenstore-control
 xenstored: $(XENSTORED_OBJS-y)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
-xenstored.a: $(XENSTORED_OBJS-y)
-	$(AR) cr $@ $^
-
 $(CLIENTS): xenstore
 	ln -f xenstore $@
 
@@ -81,8 +54,8 @@ xs_tdb_dump: xs_tdb_dump.o utils.o tdb.o talloc.o
 	$(CC) $(LDFLAGS) $^ -o $@ $(APPEND_LDFLAGS)
 
 .PHONY: clean
-clean:
-	$(RM) *.a *.o $(TARGETS) $(DEPS_RM)
+clean::
+	$(RM) $(TARGETS) $(DEPS_RM)
 
 .PHONY: distclean
 distclean: clean
diff --git a/tools/xenstore/Makefile.common b/tools/xenstore/Makefile.common
new file mode 100644
index 0000000000..21b78b0538
--- /dev/null
+++ b/tools/xenstore/Makefile.common
@@ -0,0 +1,33 @@
+# Makefile shared with stubdom
+
+XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
+XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
+XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
+
+XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
+
+CFLAGS += -Werror
+# Include configure output (config.h)
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -I./include
+CFLAGS += $(CFLAGS_libxenevtchn)
+CFLAGS += $(CFLAGS_libxenctrl)
+CFLAGS += $(CFLAGS_libxenguest)
+CFLAGS += $(CFLAGS_libxentoolcore)
+CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
+CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
+
+ifdef CONFIG_STUBDOM
+CFLAGS += -DNO_SOCKETS=1
+endif
+
+$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
+
+xenstored.a: $(XENSTORED_OBJS-y)
+	$(AR) cr $@ $^
+
+clean::
+	$(RM) *.a *.o
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] stubdom: build xenstore*-stubdom using new Makefile.common
Message-Id: <E1o27Rj-0006Z1-Tn@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:35:15 +0000

commit b5965be94c6e692336c4181b5d2a02a0df85bfc8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:19 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: build xenstore*-stubdom using new Makefile.common
    
    Makefile.common have everything needed by stubdom, when used with
    xenlibs.mk, so we don't need "Makefile" anymore.
    
    Also, remove DESTDIR for "xenstore" related targets, "xenlibs.mk"
    doesn't use DESTDIR so its value doesn't matter.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 6b804824ba..1fa075b9ad 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -346,8 +346,7 @@ define do_links
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
   ln -sf $(dir $<)*.[ch] .; \
-  [ -e $(dir $<)Makefile.common ] && ln -sf $(dir $<)Makefile.common . ||:; \
-  ln -sf $(dir $<)Makefile .
+  ln -sf $(dir $<)Makefile.common .
   touch $@
 endef
 
@@ -356,13 +355,11 @@ define BUILD_lib
  libxen$(1): libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: $$(LIBDEPS_$(1)) $$(LIBDEP_$(1))
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: mk-headers-$$(XEN_TARGET_ARCH) $$(NEWLIB_STAMPFILE) .phony
-	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y $$(if $$(wildcard $$(@D)/Makefile.common),-f $(CURDIR)/xenlibs.mk) -C $$(@D) $$(@F)
+	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y -f $(CURDIR)/xenlibs.mk -C $$(@D) $$(@F)
 
  clean-libxen$(1):
 	if [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile.common ]; then \
 	    $$(MAKE) -f $(CURDIR)/xenlibs.mk -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
-	elif [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ]; then \
-	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
 	fi
 
  libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile.common
@@ -494,7 +491,7 @@ xenstore-minios-config.mk: $(CURDIR)/xenstore-minios.cfg
 
 .PHONY: xenstore
 xenstore: $(CROSS_ROOT) xenstore-minios-config.mk
-	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstore-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) DESTDIR= -C $@ xenstored.a CONFIG_STUBDOM=y
+	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstore-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) -f $(CURDIR)/xenlibs.mk -C $@ xenstored.a CONFIG_STUBDOM=y
 
 #############
 # xenstorepvh
@@ -505,7 +502,7 @@ xenstorepvh-minios-config.mk: $(CURDIR)/xenstorepvh-minios.cfg
 
 .PHONY: xenstorepvh
 xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config.mk
-	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstorepvh-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) DESTDIR= -C $@ xenstored.a CONFIG_STUBDOM=y
+	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstorepvh-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) -f $(CURDIR)/xenlibs.mk -C $@ xenstored.a CONFIG_STUBDOM=y
 
 ########
 # minios
@@ -657,8 +654,8 @@ clean:
 	rm -f *-minios-config.mk
 	rm -fr pkg-config
 	-[ ! -d ioemu ] || $(MAKE) DESTDIR= -C ioemu clean
-	-[ ! -d xenstore ] || $(MAKE) DESTDIR= -C xenstore clean
-	-[ ! -d xenstorepvh ] || $(MAKE) DESTDIR= -C xenstorepvh clean
+	-[ ! -d xenstore ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean
+	-[ ! -d xenstorepvh ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh clean
 
 # clean the cross-compilation result
 .PHONY: crossclean
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] stubdom: xenlibs linkfarm, ignore non-regular files
Message-Id: <E1o27Ru-0006Zq-0S@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:35:26 +0000

commit 41156021e27a926feec267ecba206c78bca33417
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:20 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: xenlibs linkfarm, ignore non-regular files
    
    When we will convert tools/ build system, their will be a need to
    replace some use of "vpath". This will done making symbolic links.
    Those symlinks are not wanted by stubdom build system when making a
    linkfarm for the Xen libraries. To avoid them, we will use `find`
    instead of plain shell globbing.
    
    For example, there will be a link to "xen/lib/x86/cpuid.o" in
    "tools/libs/guest/".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 1fa075b9ad..b312f710cd 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -345,7 +345,7 @@ define do_links
   mkdir -p $(dir $@)include
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
-  ln -sf $(dir $<)*.[ch] .; \
+  find $(dir $<) -maxdepth 1 -type f -name '*.[ch]' -exec ln -sf {} . \; ; \
   ln -sf $(dir $<)Makefile.common .
   touch $@
 endef
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/ocaml: fix build dependency target
Message-Id: <E1o27S4-0006ar-3R@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:35:36 +0000

commit 0c5304d14a1c0b8016b942675041da36227713f0
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:21 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/ocaml: fix build dependency target
    
    They are two competiting spelling for the variable holding the path to
    "tools/ocaml", $(TOPLEVEL) and $(OCAML_TOPLEVEL). The "Makefile.rules"
    which is included in all ocaml Makefiles have one rule which make use
    of that variable which is then sometime unset. When building
    "ocaml/xenstored", make isn't capable of generating ".ocamldep.make"
    because $(TOPLEVEL) isn't defined in this case.
    
    This can fail with an error like this when paths.ml have been
    regenerated:
        Error: Files define.cmx and paths.cmx
           make inconsistent assumptions over interface Paths
    
    This patch fix ".ocamldep.make" rule by always spelling the variable
    $(OCAML_TOPLEVEL).
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Christian Lindig <christian.lindig@citrix.com>
---
 tools/ocaml/Makefile.rules           | 2 +-
 tools/ocaml/libs/eventchn/Makefile   | 8 ++++----
 tools/ocaml/libs/mmap/Makefile       | 8 ++++----
 tools/ocaml/libs/xb/Makefile         | 8 ++++----
 tools/ocaml/libs/xc/Makefile         | 8 ++++----
 tools/ocaml/libs/xentoollog/Makefile | 8 ++++----
 tools/ocaml/libs/xl/Makefile         | 8 ++++----
 tools/ocaml/libs/xs/Makefile         | 8 ++++----
 8 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/tools/ocaml/Makefile.rules b/tools/ocaml/Makefile.rules
index abfbc64ce0..7e4db457a1 100644
--- a/tools/ocaml/Makefile.rules
+++ b/tools/ocaml/Makefile.rules
@@ -44,7 +44,7 @@ META: META.in
 
 ALL_OCAML_OBJ_SOURCES=$(addsuffix .ml, $(ALL_OCAML_OBJS))
 
-.ocamldep.make: $(ALL_OCAML_OBJ_SOURCES) Makefile $(TOPLEVEL)/Makefile.rules
+.ocamldep.make: $(ALL_OCAML_OBJ_SOURCES) Makefile $(OCAML_TOPLEVEL)/Makefile.rules
 	$(call quiet-command, $(OCAMLDEP) $(ALL_OCAML_OBJ_SOURCES) *.mli $o,MLDEP,)
 
 clean: $(CLEAN_HOOKS)
diff --git a/tools/ocaml/libs/eventchn/Makefile b/tools/ocaml/libs/eventchn/Makefile
index 154efd4a8e..7362a28d9e 100644
--- a/tools/ocaml/libs/eventchn/Makefile
+++ b/tools/ocaml/libs/eventchn/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += $(CFLAGS_libxenevtchn) $(CFLAGS_xeninclude)
 
@@ -31,5 +31,5 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xeneventchn
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
diff --git a/tools/ocaml/libs/mmap/Makefile b/tools/ocaml/libs/mmap/Makefile
index df45819df5..a621537135 100644
--- a/tools/ocaml/libs/mmap/Makefile
+++ b/tools/ocaml/libs/mmap/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 OBJS = xenmmap
 INTF = $(foreach obj, $(OBJS),$(obj).cmi)
@@ -26,5 +26,5 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenmmap
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
diff --git a/tools/ocaml/libs/xb/Makefile b/tools/ocaml/libs/xb/Makefile
index be4499147e..ff4428af6d 100644
--- a/tools/ocaml/libs/xb/Makefile
+++ b/tools/ocaml/libs/xb/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += -I../mmap
 CFLAGS += $(CFLAGS_libxenctrl) # For xen_mb()
@@ -49,4 +49,4 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenbus
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xc/Makefile b/tools/ocaml/libs/xc/Makefile
index b6da4fdbaf..67acc46bee 100644
--- a/tools/ocaml/libs/xc/Makefile
+++ b/tools/ocaml/libs/xc/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += -I../mmap $(CFLAGS_libxenctrl) $(CFLAGS_libxenguest)
 CFLAGS += $(APPEND_CFLAGS)
@@ -38,4 +38,4 @@ xenctrl_abi_check.h: abi-check xenctrl_stubs.c xenctrl.ml
 
 GENERATED_FILES += xenctrl_abi_check.h
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xentoollog/Makefile b/tools/ocaml/libs/xentoollog/Makefile
index 593f9e9e9d..9ede2fd124 100644
--- a/tools/ocaml/libs/xentoollog/Makefile
+++ b/tools/ocaml/libs/xentoollog/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 # allow mixed declarations and code
 CFLAGS += -Wno-declaration-after-statement
@@ -62,4 +62,4 @@ install: $(LIBS) META
 uninstall:
 	ocamlfind remove -destdir $(OCAMLDESTDIR) xentoollog
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xl/Makefile b/tools/ocaml/libs/xl/Makefile
index cbe1569cc5..7c1c4edced 100644
--- a/tools/ocaml/libs/xl/Makefile
+++ b/tools/ocaml/libs/xl/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 # ignore unused generated functions and allow mixed declarations and code
 CFLAGS += -Wno-unused -Wno-declaration-after-statement
@@ -68,4 +68,4 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenlight
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xs/Makefile b/tools/ocaml/libs/xs/Makefile
index 572efb76c4..e934bbb550 100644
--- a/tools/ocaml/libs/xs/Makefile
+++ b/tools/ocaml/libs/xs/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 OCAMLINCLUDE += -I ../xb/
 OCAMLOPTFLAGS += -for-pack Xenstore
@@ -43,7 +43,7 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenstore
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
 genpath-target = $(call buildmakevars2module,paths.ml)
 $(eval $(genpath-target))
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: reuse x86 EFI stub functions for Arm
Message-Id: <E1o27aG-000774-PS@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:04 +0000

commit 7f96859b0d00dd7f6e6fefa66706268cc2761a3d
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:09 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: reuse x86 EFI stub functions for Arm
    
    x86 is using compiler feature testing to decide EFI build
    enable or not. When EFI build is disabled, x86 will use an
    efi/stub.c file to replace efi/runtime.c for build objects.
    Following this idea, we introduce a stub file for Arm, but
    use CONFIG_ARM_EFI to decide EFI build enable or not.
    
    And the most functions in x86 EFI stub.c can be reused for
    other architectures, like Arm. So we move them to common
    and keep the x86 specific function in x86/efi/stub.c.
    
    To avoid the symbol link conflict error when linking common
    stub files to x86/efi. We add a regular file check in efi
    stub files' link script. Depends on this check we can bypass
    the link behaviors for existed stub files in x86/efi.
    
    As there is no Arm specific EFI stub function for Arm in
    current stage, Arm still can use the existed symbol link
    method for EFI stub files.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/arm/Kconfig         |  4 ++++
 xen/arch/arm/Makefile        |  2 +-
 xen/arch/arm/efi/Makefile    |  8 ++++++++
 xen/arch/x86/efi/stub.c      | 32 +-------------------------------
 xen/common/efi/efi-common.mk |  3 ++-
 xen/common/efi/stub.c        | 32 ++++++++++++++++++++++++++++++++
 6 files changed, 48 insertions(+), 33 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 5900aa2efe..be9eff0141 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -6,6 +6,7 @@ config ARM_64
 	def_bool y
 	depends on !ARM_32
 	select 64BIT
+	select ARM_EFI
 	select HAS_FAST_MULTIPLY
 
 config ARM
@@ -34,6 +35,9 @@ config ACPI
 	  Advanced Configuration and Power Interface (ACPI) support for Xen is
 	  an alternative to device tree on ARM64.
 
+config ARM_EFI
+	bool
+
 config GICV3
 	bool "GICv3 driver"
 	depends on ARM_64 && !NEW_VGIC
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 1d862351d1..bb7a6151c1 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -1,6 +1,5 @@
 obj-$(CONFIG_ARM_32) += arm32/
 obj-$(CONFIG_ARM_64) += arm64/
-obj-$(CONFIG_ARM_64) += efi/
 obj-$(CONFIG_ACPI) += acpi/
 obj-$(CONFIG_HAS_PCI) += pci/
 ifneq ($(CONFIG_NO_PLAT),y)
@@ -20,6 +19,7 @@ obj-y += domain.o
 obj-y += domain_build.init.o
 obj-y += domctl.o
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+obj-y += efi/
 obj-y += gic.o
 obj-y += gic-v2.o
 obj-$(CONFIG_GICV3) += gic-v3.o
diff --git a/xen/arch/arm/efi/Makefile b/xen/arch/arm/efi/Makefile
index 4313c39066..dffe72e589 100644
--- a/xen/arch/arm/efi/Makefile
+++ b/xen/arch/arm/efi/Makefile
@@ -1,4 +1,12 @@
 include $(srctree)/common/efi/efi-common.mk
 
+ifeq ($(CONFIG_ARM_EFI),y)
 obj-y += $(EFIOBJ-y)
 obj-$(CONFIG_ACPI) +=  efi-dom0.init.o
+else
+# Add stub.o to EFIOBJ-y to re-use the clean-files in
+# efi-common.mk. Otherwise the link of stub.c in arm/efi
+# will not be cleaned in "make clean".
+EFIOBJ-y += stub.o
+obj-y += stub.o
+endif
diff --git a/xen/arch/x86/efi/stub.c b/xen/arch/x86/efi/stub.c
index 9984932626..f2365bc041 100644
--- a/xen/arch/x86/efi/stub.c
+++ b/xen/arch/x86/efi/stub.c
@@ -1,7 +1,5 @@
 #include <xen/efi.h>
-#include <xen/errno.h>
 #include <xen/init.h>
-#include <xen/lib.h>
 #include <asm/asm_defns.h>
 #include <asm/efibind.h>
 #include <asm/page.h>
@@ -10,6 +8,7 @@
 #include <efi/eficon.h>
 #include <efi/efidevp.h>
 #include <efi/efiapi.h>
+#include "../../../common/efi/stub.c"
 
 /*
  * Here we are in EFI stub. EFI calls are not supported due to lack
@@ -45,11 +44,6 @@ void __init noreturn efi_multiboot2(EFI_HANDLE ImageHandle,
     unreachable();
 }
 
-bool efi_enabled(unsigned int feature)
-{
-    return false;
-}
-
 void __init efi_init_memory(void) { }
 
 bool efi_boot_mem_unused(unsigned long *start, unsigned long *end)
@@ -62,32 +56,8 @@ bool efi_boot_mem_unused(unsigned long *start, unsigned long *end)
 
 void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e) { }
 
-bool efi_rs_using_pgtables(void)
-{
-    return false;
-}
-
-unsigned long efi_get_time(void)
-{
-    BUG();
-    return 0;
-}
-
-void efi_halt_system(void) { }
-void efi_reset_system(bool warm) { }
-
-int efi_get_info(uint32_t idx, union xenpf_efi_info *info)
-{
-    return -ENOSYS;
-}
-
 int efi_compat_get_info(uint32_t idx, union compat_pf_efi_info *)
     __attribute__((__alias__("efi_get_info")));
 
-int efi_runtime_call(struct xenpf_efi_runtime_call *op)
-{
-    return -ENOSYS;
-}
-
 int efi_compat_runtime_call(struct compat_pf_efi_runtime_call *)
     __attribute__((__alias__("efi_runtime_call")));
diff --git a/xen/common/efi/efi-common.mk b/xen/common/efi/efi-common.mk
index 4298ceaee7..ec2c34f198 100644
--- a/xen/common/efi/efi-common.mk
+++ b/xen/common/efi/efi-common.mk
@@ -9,7 +9,8 @@ CFLAGS-y += -iquote $(srcdir)
 # e.g.: It transforms "dir/foo/bar" into successively
 #       "dir foo bar", ".. .. ..", "../../.."
 $(obj)/%.c: $(srctree)/common/efi/%.c FORCE
-	$(Q)ln -nfs $(subst $(space),/,$(patsubst %,..,$(subst /, ,$(obj))))/source/common/efi/$(<F) $@
+	$(Q)test -f $@ || \
+	    ln -nfs $(subst $(space),/,$(patsubst %,..,$(subst /, ,$(obj))))/source/common/efi/$(<F) $@
 
 clean-files += $(patsubst %.o, %.c, $(EFIOBJ-y:.init.o=.o) $(EFIOBJ-))
 
diff --git a/xen/common/efi/stub.c b/xen/common/efi/stub.c
new file mode 100644
index 0000000000..15694632c2
--- /dev/null
+++ b/xen/common/efi/stub.c
@@ -0,0 +1,32 @@
+#include <xen/efi.h>
+#include <xen/errno.h>
+#include <xen/lib.h>
+
+bool efi_enabled(unsigned int feature)
+{
+    return false;
+}
+
+bool efi_rs_using_pgtables(void)
+{
+    return false;
+}
+
+unsigned long efi_get_time(void)
+{
+    BUG();
+    return 0;
+}
+
+void efi_halt_system(void) { }
+void efi_reset_system(bool warm) { }
+
+int efi_get_info(uint32_t idx, union xenpf_efi_info *info)
+{
+    return -ENOSYS;
+}
+
+int efi_runtime_call(struct xenpf_efi_runtime_call *op)
+{
+    return -ENOSYS;
+}
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Keep memory nodes in device tree when Xen boots from EFI
Message-Id: <E1o27aQ-00079H-SX@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:14 +0000

commit 53701ecb8f8b124b62ff50925032468c2df3745e
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:10 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/arm: Keep memory nodes in device tree when Xen boots from EFI
    
    In current code, when Xen is booting from EFI, it will delete
    all memory nodes in device tree. This would work well in current
    stage, because Xen can get memory map from EFI system table.
    However, EFI system table cannot completely replace memory nodes
    of device tree. EFI system table doesn't contain memory NUMA
    information. Xen depends on ACPI SRAT or device tree memory nodes
    to parse memory blocks' NUMA mapping. So in EFI + DTB boot, Xen
    doesn't have any method to get numa-node-id for memory blocks any
    more. This makes device tree based NUMA support become impossible
    for Xen in EFI + DTB boot.
    
    So in this patch, we will keep memory nodes in device tree for
    NUMA code to parse memory numa-node-id later.
    
    As a side effect, if we still parse boot memory information in
    early_scan_node, bootmem.info will calculate memory ranges in
    memory nodes twice. So we have to prevent early_scan_node to
    parse memory nodes in EFI boot.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/bootfdt.c      |  8 +++++++-
 xen/arch/arm/efi/efi-boot.h | 25 -------------------------
 2 files changed, 7 insertions(+), 26 deletions(-)

diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c
index 29671c8df0..ec81a45de9 100644
--- a/xen/arch/arm/bootfdt.c
+++ b/xen/arch/arm/bootfdt.c
@@ -11,6 +11,7 @@
 #include <xen/lib.h>
 #include <xen/kernel.h>
 #include <xen/init.h>
+#include <xen/efi.h>
 #include <xen/device_tree.h>
 #include <xen/libfdt/libfdt.h>
 #include <xen/sort.h>
@@ -367,7 +368,12 @@ static int __init early_scan_node(const void *fdt,
 {
     int rc = 0;
 
-    if ( device_tree_node_matches(fdt, node, "memory") )
+    /*
+     * If Xen has been booted via UEFI, the memory banks are
+     * populated. So we should skip the parsing.
+     */
+    if ( !efi_enabled(EFI_BOOT) &&
+         device_tree_node_matches(fdt, node, "memory") )
         rc = process_memory_node(fdt, node, name, depth,
                                  address_cells, size_cells, &bootinfo.mem);
     else if ( depth == 1 && !dt_node_cmp(name, "reserved-memory") )
diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h
index e452b687d8..59d93c24a1 100644
--- a/xen/arch/arm/efi/efi-boot.h
+++ b/xen/arch/arm/efi/efi-boot.h
@@ -231,33 +231,8 @@ EFI_STATUS __init fdt_add_uefi_nodes(EFI_SYSTEM_TABLE *sys_table,
     int status;
     u32 fdt_val32;
     u64 fdt_val64;
-    int prev;
     int num_rsv;
 
-    /*
-     * Delete any memory nodes present.  The EFI memory map is the only
-     * memory description provided to Xen.
-     */
-    prev = 0;
-    for (;;)
-    {
-        const char *type;
-        int len;
-
-        node = fdt_next_node(fdt, prev, NULL);
-        if ( node < 0 )
-            break;
-
-        type = fdt_getprop(fdt, node, "device_type", &len);
-        if ( type && strncmp(type, "memory", len) == 0 )
-        {
-            fdt_del_node(fdt, node);
-            continue;
-        }
-
-        prev = node;
-    }
-
    /*
     * Delete all memory reserve map entries. When booting via UEFI,
     * kernel will use the UEFI memory map to find reserved regions.
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: introduce an arch helper for default dma zone status
Message-Id: <E1o27aa-00079m-Vg@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:24 +0000

commit 15e64b8a099eb9d37485fdc2046ac769cc6a1628
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:11 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: introduce an arch helper for default dma zone status
    
    In current code, when Xen is running in a multiple nodes
    NUMA system, it will set dma_bitsize in end_boot_allocator
    to reserve some low address memory as DMA zone.
    
    There are some x86 implications in the implementation.
    Because on x86, memory starts from 0. On a multiple-nodes
    NUMA system, if a single node contains the majority or all
    of the DMA memory, x86 prefers to give out memory from
    non-local allocations rather than exhausting the DMA memory
    ranges. Hence x86 uses dma_bitsize to set aside some largely
    arbitrary amount of memory for DMA zone. The allocations
    from DMA zone would happen only after exhausting all other
    nodes' memory.
    
    But the implications are not shared across all architectures.
    For example, Arm cannot guarantee the availability of memory
    below a certain boundary for DMA limited-capability devices
    either. But currently, Arm doesn't need a reserved DMA zone
    in Xen. Because there is no DMA device in Xen. And for guests,
    Xen Arm only allows Dom0 to have DMA operations without IOMMU.
    Xen will try to allocate memory under 4GB or memory range that
    is limited by dma_bitsize for Dom0 in boot time. For DomU, even
    Xen can passthrough devices to DomU without IOMMU, but Xen Arm
    doesn't guarantee their DMA operations. So, Xen Arm doesn't
    need a reserved DMA zone to provide DMA memory for guests.
    
    In this patch, we introduce an arch_want_default_dmazone helper
    for different architectures to determine whether they need to
    set dma_bitsize for DMA zone reservation or not.
    
    At the same time, when x86 Xen is built with CONFIG_PV=n could
    probably leverage this new helper to actually not trigger DMA
    zone reservation.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/arm/include/asm/numa.h | 1 +
 xen/arch/x86/include/asm/numa.h | 1 +
 xen/common/page_alloc.c         | 2 +-
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h
index 31a6de4e23..e4c4d89192 100644
--- a/xen/arch/arm/include/asm/numa.h
+++ b/xen/arch/arm/include/asm/numa.h
@@ -24,6 +24,7 @@ extern mfn_t first_valid_mfn;
 #define node_spanned_pages(nid) (max_page - mfn_x(first_valid_mfn))
 #define node_start_pfn(nid) (mfn_x(first_valid_mfn))
 #define __node_distance(a, b) (20)
+#define arch_want_default_dmazone() (false)
 
 #endif /* __ARCH_ARM_NUMA_H */
 /*
diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h
index bada2c0bb9..5d8385f2e1 100644
--- a/xen/arch/x86/include/asm/numa.h
+++ b/xen/arch/x86/include/asm/numa.h
@@ -74,6 +74,7 @@ static inline __attribute__((pure)) nodeid_t phys_to_nid(paddr_t addr)
 #define node_spanned_pages(nid)	(NODE_DATA(nid)->node_spanned_pages)
 #define node_end_pfn(nid)       (NODE_DATA(nid)->node_start_pfn + \
 				 NODE_DATA(nid)->node_spanned_pages)
+#define arch_want_default_dmazone() (num_online_nodes() > 1)
 
 extern int valid_numa_range(u64 start, u64 end, nodeid_t node);
 
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index ea59cd1a4a..000ae6b972 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -1889,7 +1889,7 @@ void __init end_boot_allocator(void)
     }
     nr_bootmem_regions = 0;
 
-    if ( !dma_bitsize && (num_online_nodes() > 1) )
+    if ( !dma_bitsize && arch_want_default_dmazone() )
         dma_bitsize = arch_get_dma_bitsize();
 
     printk("Domain heap initialised");
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: decouple NUMA from ACPI in Kconfig
Message-Id: <E1o27al-0007AJ-2U@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:35 +0000

commit 1f0a8e28ba00890199e23de3d9d77a6c9593d363
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:12 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: decouple NUMA from ACPI in Kconfig
    
    In current Xen code only implements x86 ACPI-based NUMA support.
    So in Xen Kconfig system, NUMA equals to ACPI_NUMA. x86 selects
    NUMA by default, and CONFIG_ACPI_NUMA is hardcode in config.h.
    
    In a follow-up patch, we will introduce support for NUMA using
    the device tree. That means we will have two NUMA implementations,
    so in this patch we decouple NUMA from ACPI based NUMA in Kconfig.
    Make NUMA as a common feature, that device tree based NUMA also
    can select it.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/Kconfig              | 2 +-
 xen/arch/x86/include/asm/config.h | 1 -
 xen/common/Kconfig                | 3 +++
 xen/drivers/acpi/Kconfig          | 3 ++-
 xen/drivers/acpi/Makefile         | 2 +-
 5 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index 06d6fbc864..1e31edc99f 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -6,6 +6,7 @@ config X86
 	def_bool y
 	select ACPI
 	select ACPI_LEGACY_TABLES_LOOKUP
+	select ACPI_NUMA
 	select ALTERNATIVE_CALL
 	select ARCH_SUPPORTS_INT128
 	select CORE_PARKING
@@ -26,7 +27,6 @@ config X86
 	select HAS_UBSAN
 	select HAS_VPCI if HVM
 	select NEEDS_LIBELF
-	select NUMA
 
 config ARCH_DEFCONFIG
 	string
diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h
index de20642524..07bcd15831 100644
--- a/xen/arch/x86/include/asm/config.h
+++ b/xen/arch/x86/include/asm/config.h
@@ -31,7 +31,6 @@
 /* Intel P4 currently has largest cache line (L2 line size is 128 bytes). */
 #define CONFIG_X86_L1_CACHE_SHIFT 7
 
-#define CONFIG_ACPI_NUMA 1
 #define CONFIG_ACPI_SRAT 1
 #define CONFIG_ACPI_CSTATE 1
 
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 5b6b2406c0..41a67891bc 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -73,6 +73,9 @@ config MEM_ACCESS
 config NEEDS_LIBELF
 	bool
 
+config NUMA
+	bool
+
 config STATIC_MEMORY
 	bool "Static Allocation Support (UNSUPPORTED)" if UNSUPPORTED
 	depends on ARM
diff --git a/xen/drivers/acpi/Kconfig b/xen/drivers/acpi/Kconfig
index b64d3731fb..e3f3d8f4b1 100644
--- a/xen/drivers/acpi/Kconfig
+++ b/xen/drivers/acpi/Kconfig
@@ -5,5 +5,6 @@ config ACPI
 config ACPI_LEGACY_TABLES_LOOKUP
 	bool
 
-config NUMA
+config ACPI_NUMA
 	bool
+	select NUMA
diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
index 4f8e97228e..2fc5230253 100644
--- a/xen/drivers/acpi/Makefile
+++ b/xen/drivers/acpi/Makefile
@@ -3,7 +3,7 @@ obj-y += utilities/
 obj-$(CONFIG_X86) += apei/
 
 obj-bin-y += tables.init.o
-obj-$(CONFIG_NUMA) += numa.o
+obj-$(CONFIG_ACPI_NUMA) += numa.o
 obj-y += osl.o
 obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: use !CONFIG_NUMA to keep fake NUMA API
Message-Id: <E1o27av-0007An-5e@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:45 +0000

commit e8f1c8118f7693be20eab2abcb86d16d12729ba0
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:13 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/arm: use !CONFIG_NUMA to keep fake NUMA API
    
    We have introduced CONFIG_NUMA in a previous patch. And this
    option is enabled only on x86 at the current stage. In a follow
    up patch, we will enable this option for Arm. But we still
    want users to be able to disable the CONFIG_NUMA via Kconfig. In
    this case, keep the fake NUMA API, will make Arm code still
    able to work with NUMA aware memory allocation and scheduler.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/numa.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h
index e4c4d89192..268a9db055 100644
--- a/xen/arch/arm/include/asm/numa.h
+++ b/xen/arch/arm/include/asm/numa.h
@@ -5,6 +5,8 @@
 
 typedef u8 nodeid_t;
 
+#ifndef CONFIG_NUMA
+
 /* Fake one node for now. See also node_online_map. */
 #define cpu_to_node(cpu) 0
 #define node_to_cpumask(node)   (cpu_online_map)
@@ -24,6 +26,9 @@ extern mfn_t first_valid_mfn;
 #define node_spanned_pages(nid) (max_page - mfn_x(first_valid_mfn))
 #define node_start_pfn(nid) (mfn_x(first_valid_mfn))
 #define __node_distance(a, b) (20)
+
+#endif
+
 #define arch_want_default_dmazone() (false)
 
 #endif /* __ARCH_ARM_NUMA_H */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/x86: use paddr_t for addresses in NUMA node structure
Message-Id: <E1o27b5-0007BH-8q@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:44:55 +0000

commit 94a03b2254a81f00cbb8f9977cdd9e3cce32fc08
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:14 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: use paddr_t for addresses in NUMA node structure
    
    NUMA node structure "struct node" is using u64 as node memory
    range. In order to make other architectures can reuse this
    NUMA node relative code, we replace the u64 to paddr_t. And
    use pfn_to_paddr and paddr_to_pfn to replace explicit shift
    operations. The relate PRIx64 in print messages have been
    replaced by PRIpaddr at the same time. And some being-phased-out
    types like u64 in the lines we have touched also have been
    converted to uint64_t or unsigned long.
    
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/numa.h |  8 ++++----
 xen/arch/x86/numa.c             | 32 +++++++++++++++-----------------
 xen/arch/x86/srat.c             | 25 +++++++++++++------------
 3 files changed, 32 insertions(+), 33 deletions(-)

diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h
index 5d8385f2e1..c32ccffde3 100644
--- a/xen/arch/x86/include/asm/numa.h
+++ b/xen/arch/x86/include/asm/numa.h
@@ -18,7 +18,7 @@ extern cpumask_t     node_to_cpumask[];
 #define node_to_cpumask(node)    (node_to_cpumask[node])
 
 struct node { 
-	u64 start,end; 
+	paddr_t start, end;
 };
 
 extern int compute_hash_shift(struct node *nodes, int numnodes,
@@ -38,7 +38,7 @@ extern void numa_set_node(int cpu, nodeid_t node);
 extern nodeid_t setup_node(unsigned int pxm);
 extern void srat_detect_node(int cpu);
 
-extern void setup_node_bootmem(nodeid_t nodeid, u64 start, u64 end);
+extern void setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end);
 extern nodeid_t apicid_to_node[];
 extern void init_cpu_to_node(void);
 
@@ -76,9 +76,9 @@ static inline __attribute__((pure)) nodeid_t phys_to_nid(paddr_t addr)
 				 NODE_DATA(nid)->node_spanned_pages)
 #define arch_want_default_dmazone() (num_online_nodes() > 1)
 
-extern int valid_numa_range(u64 start, u64 end, nodeid_t node);
+extern int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node);
 
-void srat_parse_regions(u64 addr);
+void srat_parse_regions(paddr_t addr);
 extern u8 __node_distance(nodeid_t a, nodeid_t b);
 unsigned int arch_get_dma_bitsize(void);
 
diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c
index 680b7d9002..627ae8aa95 100644
--- a/xen/arch/x86/numa.c
+++ b/xen/arch/x86/numa.c
@@ -162,12 +162,10 @@ int __init compute_hash_shift(struct node *nodes, int numnodes,
     return shift;
 }
 /* initialize NODE_DATA given nodeid and start/end */
-void __init setup_node_bootmem(nodeid_t nodeid, u64 start, u64 end)
-{ 
-    unsigned long start_pfn, end_pfn;
-
-    start_pfn = start >> PAGE_SHIFT;
-    end_pfn = end >> PAGE_SHIFT;
+void __init setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end)
+{
+    unsigned long start_pfn = paddr_to_pfn(start);
+    unsigned long end_pfn = paddr_to_pfn(end);
 
     NODE_DATA(nodeid)->node_start_pfn = start_pfn;
     NODE_DATA(nodeid)->node_spanned_pages = end_pfn - start_pfn;
@@ -198,11 +196,12 @@ void __init numa_init_array(void)
 static int numa_fake __initdata = 0;
 
 /* Numa emulation */
-static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
+static int __init numa_emulation(unsigned long start_pfn,
+                                 unsigned long end_pfn)
 {
     int i;
     struct node nodes[MAX_NUMNODES];
-    u64 sz = ((end_pfn - start_pfn)<<PAGE_SHIFT) / numa_fake;
+    uint64_t sz = pfn_to_paddr(end_pfn - start_pfn) / numa_fake;
 
     /* Kludge needed for the hash function */
     if ( hweight64(sz) > 1 )
@@ -218,9 +217,9 @@ static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
     memset(&nodes,0,sizeof(nodes));
     for ( i = 0; i < numa_fake; i++ )
     {
-        nodes[i].start = (start_pfn<<PAGE_SHIFT) + i*sz;
+        nodes[i].start = pfn_to_paddr(start_pfn) + i * sz;
         if ( i == numa_fake - 1 )
-            sz = (end_pfn<<PAGE_SHIFT) - nodes[i].start;
+            sz = pfn_to_paddr(end_pfn) - nodes[i].start;
         nodes[i].end = nodes[i].start + sz;
         printk(KERN_INFO "Faking node %d at %"PRIx64"-%"PRIx64" (%"PRIu64"MB)\n",
                i,
@@ -246,6 +245,8 @@ static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
 void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 { 
     int i;
+    paddr_t start = pfn_to_paddr(start_pfn);
+    paddr_t end = pfn_to_paddr(end_pfn);
 
 #ifdef CONFIG_NUMA_EMU
     if ( numa_fake && !numa_emulation(start_pfn, end_pfn) )
@@ -253,17 +254,15 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 #endif
 
 #ifdef CONFIG_ACPI_NUMA
-    if ( !numa_off && !acpi_scan_nodes((u64)start_pfn << PAGE_SHIFT,
-         (u64)end_pfn << PAGE_SHIFT) )
+    if ( !numa_off && !acpi_scan_nodes(start, end) )
         return;
 #endif
 
     printk(KERN_INFO "%s\n",
            numa_off ? "NUMA turned off" : "No NUMA configuration found");
 
-    printk(KERN_INFO "Faking a node at %016"PRIx64"-%016"PRIx64"\n",
-           (u64)start_pfn << PAGE_SHIFT,
-           (u64)end_pfn << PAGE_SHIFT);
+    printk(KERN_INFO "Faking a node at %"PRIpaddr"-%"PRIpaddr"\n",
+           start, end);
     /* setup dummy node covering all memory */
     memnode_shift = BITS_PER_LONG - 1;
     memnodemap = _memnodemap;
@@ -276,8 +275,7 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
     for ( i = 0; i < nr_cpu_ids; i++ )
         numa_set_node(i, 0);
     cpumask_copy(&node_to_cpumask[0], cpumask_of(0));
-    setup_node_bootmem(0, (u64)start_pfn << PAGE_SHIFT,
-                    (u64)end_pfn << PAGE_SHIFT);
+    setup_node_bootmem(0, start, end);
 }
 
 void numa_add_cpu(int cpu)
diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index cfe24c7e78..8ffe43bdfe 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -104,7 +104,7 @@ nodeid_t setup_node(unsigned pxm)
 	return node;
 }
 
-int valid_numa_range(u64 start, u64 end, nodeid_t node)
+int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node)
 {
 	int i;
 
@@ -119,7 +119,7 @@ int valid_numa_range(u64 start, u64 end, nodeid_t node)
 	return 0;
 }
 
-static __init int conflicting_memblks(u64 start, u64 end)
+static __init int conflicting_memblks(paddr_t start, paddr_t end)
 {
 	int i;
 
@@ -135,7 +135,7 @@ static __init int conflicting_memblks(u64 start, u64 end)
 	return -1;
 }
 
-static __init void cutoff_node(int i, u64 start, u64 end)
+static __init void cutoff_node(int i, paddr_t start, paddr_t end)
 {
 	struct node *nd = &nodes[i];
 	if (nd->start < start) {
@@ -275,7 +275,7 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa)
 void __init
 acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 {
-	u64 start, end;
+	paddr_t start, end;
 	unsigned pxm;
 	nodeid_t node;
 	int i;
@@ -318,7 +318,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		bool mismatch = !(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
 		                !test_bit(i, memblk_hotplug);
 
-		printk("%sSRAT: PXM %u (%"PRIx64"-%"PRIx64") overlaps with itself (%"PRIx64"-%"PRIx64")\n",
+		printk("%sSRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with itself (%"PRIpaddr"-%"PRIpaddr")\n",
 		       mismatch ? KERN_ERR : KERN_WARNING, pxm, start, end,
 		       node_memblk_range[i].start, node_memblk_range[i].end);
 		if (mismatch) {
@@ -327,7 +327,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		}
 	} else {
 		printk(KERN_ERR
-		       "SRAT: PXM %u (%"PRIx64"-%"PRIx64") overlaps with PXM %u (%"PRIx64"-%"PRIx64")\n",
+		       "SRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with PXM %u (%"PRIpaddr"-%"PRIpaddr")\n",
 		       pxm, start, end, node_to_pxm(memblk_nodeid[i]),
 		       node_memblk_range[i].start, node_memblk_range[i].end);
 		bad_srat();
@@ -346,7 +346,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 				nd->end = end;
 		}
 	}
-	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIx64"-%"PRIx64"%s\n",
+	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIpaddr"-%"PRIpaddr"%s\n",
 	       node, pxm, start, end,
 	       ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE ? " (hotplug)" : "");
 
@@ -369,7 +369,7 @@ static int __init nodes_cover_memory(void)
 
 	for (i = 0; i < e820.nr_map; i++) {
 		int j, found;
-		unsigned long long start, end;
+		paddr_t start, end;
 
 		if (e820.map[i].type != E820_RAM) {
 			continue;
@@ -396,7 +396,7 @@ static int __init nodes_cover_memory(void)
 
 		if (start < end) {
 			printk(KERN_ERR "SRAT: No PXM for e820 range: "
-				"%016Lx - %016Lx\n", start, end);
+				"%"PRIpaddr" - %"PRIpaddr"\n", start, end);
 			return 0;
 		}
 	}
@@ -432,7 +432,7 @@ static int __init cf_check srat_parse_region(
 	return 0;
 }
 
-void __init srat_parse_regions(u64 addr)
+void __init srat_parse_regions(paddr_t addr)
 {
 	u64 mask;
 	unsigned int i;
@@ -457,7 +457,7 @@ void __init srat_parse_regions(u64 addr)
 }
 
 /* Use the information discovered above to actually set up the nodes. */
-int __init acpi_scan_nodes(u64 start, u64 end)
+int __init acpi_scan_nodes(paddr_t start, paddr_t end)
 {
 	int i;
 	nodemask_t all_nodes_parsed;
@@ -489,7 +489,8 @@ int __init acpi_scan_nodes(u64 start, u64 end)
 	/* Finally register nodes */
 	for_each_node_mask(i, all_nodes_parsed)
 	{
-		u64 size = nodes[i].end - nodes[i].start;
+		uint64_t size = nodes[i].end - nodes[i].start;
+
 		if ( size == 0 )
 			printk(KERN_WARNING "SRAT: Node %u has no memory. "
 			       "BIOS Bug or mis-configured hardware?\n", i);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/x86: add detection of memory interleaves for different nodes
Message-Id: <E1o27bF-0007By-Cd@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:45:05 +0000

commit b660e19d0f7f3324d61462fc6d9ef6ee98914f2d
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:15 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: add detection of memory interleaves for different nodes
    
    One NUMA node may contain several memory blocks. In current Xen
    code, Xen will maintain a node memory range for each node to cover
    all its memory blocks. But here comes the problem, in the gap of
    one node's two memory blocks, if there are some memory blocks don't
    belong to this node (remote memory blocks). This node's memory range
    will be expanded to cover these remote memory blocks.
    
    One node's memory range contains other nodes' memory, this is
    obviously not very reasonable. This means current NUMA code only
    can support node has no interleaved memory blocks. However, on a
    physical machine, the addresses of multiple nodes can be interleaved.
    
    So in this patch, we add code to detect memory interleaves of
    different nodes. NUMA initialization will be failed and error
    messages will be printed when Xen detect such hardware configuration.
    
    As we have checked the node's range before, for a non-empty node,
    the "nd->end == end && nd->start == start" check is unnecesary.
    So we remove it from conflicting_memblks as well.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/srat.c | 139 ++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 101 insertions(+), 38 deletions(-)

diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index 8ffe43bdfe..3d02520a5a 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -42,6 +42,12 @@ static struct node node_memblk_range[NR_NODE_MEMBLKS];
 static nodeid_t memblk_nodeid[NR_NODE_MEMBLKS];
 static __initdata DECLARE_BITMAP(memblk_hotplug, NR_NODE_MEMBLKS);
 
+enum conflicts {
+	NO_CONFLICT,
+	OVERLAP,
+	INTERLEAVE,
+};
+
 static inline bool node_found(unsigned idx, unsigned pxm)
 {
 	return ((pxm2node[idx].pxm == pxm) &&
@@ -119,20 +125,45 @@ int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node)
 	return 0;
 }
 
-static __init int conflicting_memblks(paddr_t start, paddr_t end)
+static
+enum conflicts __init conflicting_memblks(nodeid_t nid, paddr_t start,
+					  paddr_t end, paddr_t nd_start,
+					  paddr_t nd_end, unsigned int *mblkid)
 {
-	int i;
+	unsigned int i;
 
+	/*
+	 * Scan all recorded nodes' memory blocks to check conflicts:
+	 * Overlap or interleave.
+	 */
 	for (i = 0; i < num_node_memblks; i++) {
 		struct node *nd = &node_memblk_range[i];
+
+		*mblkid = i;
+
+		/* Skip 0 bytes node memory block. */
 		if (nd->start == nd->end)
 			continue;
+		/*
+		 * Use memblk range to check memblk overlaps, include the
+		 * self-overlap case. As nd's range is non-empty, the special
+		 * case "nd->end == end && nd->start == start" also can be covered.
+		 */
 		if (nd->end > start && nd->start < end)
-			return i;
-		if (nd->end == end && nd->start == start)
-			return i;
+			return OVERLAP;
+
+		/*
+		 * Use node memory range to check whether new range contains
+		 * memory from other nodes - interleave check. We just need
+		 * to check full contains situation. Because overlaps have
+		 * been checked above.
+		 */
+	        if (nid != memblk_nodeid[i] &&
+		    nd->start >= nd_start && nd->end <= nd_end)
+			return INTERLEAVE;
 	}
-	return -1;
+
+	return NO_CONFLICT;
 }
 
 static __init void cutoff_node(int i, paddr_t start, paddr_t end)
@@ -275,10 +306,12 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa)
 void __init
 acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 {
+	struct node *nd;
+	paddr_t nd_start, nd_end;
 	paddr_t start, end;
 	unsigned pxm;
 	nodeid_t node;
-	int i;
+	unsigned int i;
 
 	if (srat_disabled())
 		return;
@@ -310,44 +343,74 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		bad_srat();
 		return;
 	}
+
+	/*
+	 * For the node that already has some memory blocks, we will
+	 * expand the node memory range temporarily to check memory
+	 * interleaves with other nodes. We will not use this node
+	 * temp memory range to check overlaps, because it will mask
+	 * the overlaps in same node.
+	 *
+	 * Node with 0 bytes memory doesn't need this expandsion.
+	 */
+	nd_start = start;
+	nd_end = end;
+	nd = &nodes[node];
+	if (nd->start != nd->end) {
+		if (nd_start > nd->start)
+			nd_start = nd->start;
+
+		if (nd_end < nd->end)
+			nd_end = nd->end;
+	}
+
 	/* It is fine to add this area to the nodes data it will be used later*/
-	i = conflicting_memblks(start, end);
-	if (i < 0)
-		/* everything fine */;
-	else if (memblk_nodeid[i] == node) {
-		bool mismatch = !(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
-		                !test_bit(i, memblk_hotplug);
-
-		printk("%sSRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with itself (%"PRIpaddr"-%"PRIpaddr")\n",
-		       mismatch ? KERN_ERR : KERN_WARNING, pxm, start, end,
-		       node_memblk_range[i].start, node_memblk_range[i].end);
-		if (mismatch) {
-			bad_srat();
-			return;
+	switch (conflicting_memblks(node, start, end, nd_start, nd_end, &i)) {
+	case OVERLAP:
+		if (memblk_nodeid[i] == node) {
+			bool mismatch = !(ma->flags &
+					  ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
+			                !test_bit(i, memblk_hotplug);
+
+			printk("%sSRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with itself [%"PRIpaddr", %"PRIpaddr"]\n",
+			       mismatch ? KERN_ERR : KERN_WARNING, pxm, start,
+			       end - 1, node_memblk_range[i].start,
+			       node_memblk_range[i].end - 1);
+			if (mismatch) {
+				bad_srat();
+				return;
+			}
+			break;
 		}
-	} else {
+
+		printk(KERN_ERR
+		       "SRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with PXM %u [%"PRIpaddr", %"PRIpaddr"]\n",
+		       pxm, start, end - 1, node_to_pxm(memblk_nodeid[i]),
+		       node_memblk_range[i].start,
+		       node_memblk_range[i].end - 1);
+		bad_srat();
+		return;
+
+	case INTERLEAVE:
 		printk(KERN_ERR
-		       "SRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with PXM %u (%"PRIpaddr"-%"PRIpaddr")\n",
-		       pxm, start, end, node_to_pxm(memblk_nodeid[i]),
-		       node_memblk_range[i].start, node_memblk_range[i].end);
+		       "SRAT： PXM %u: [%"PRIpaddr", %"PRIpaddr"] interleaves with PXM %u memblk [%"PRIpaddr", %"PRIpaddr"]\n",
+		       pxm, nd_start, nd_end - 1, node_to_pxm(memblk_nodeid[i]),
+		       node_memblk_range[i].start, node_memblk_range[i].end - 1);
 		bad_srat();
 		return;
+
+	case NO_CONFLICT:
+		break;
 	}
+
 	if (!(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE)) {
-		struct node *nd = &nodes[node];
-
-		if (!node_test_and_set(node, memory_nodes_parsed)) {
-			nd->start = start;
-			nd->end = end;
-		} else {
-			if (start < nd->start)
-				nd->start = start;
-			if (nd->end < end)
-				nd->end = end;
-		}
+		node_set(node, memory_nodes_parsed);
+		nd->start = nd_start;
+		nd->end = nd_end;
 	}
-	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIpaddr"-%"PRIpaddr"%s\n",
-	       node, pxm, start, end,
+
+	printk(KERN_INFO "SRAT: Node %u PXM %u [%"PRIpaddr", %"PRIpaddr"]%s\n",
+	       node, pxm, start, end - 1,
 	       ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE ? " (hotplug)" : "");
 
 	node_memblk_range[num_node_memblks].start = start;
@@ -396,7 +459,7 @@ static int __init nodes_cover_memory(void)
 
 		if (start < end) {
 			printk(KERN_ERR "SRAT: No PXM for e820 range: "
-				"%"PRIpaddr" - %"PRIpaddr"\n", start, end);
+				"[%"PRIpaddr", %"PRIpaddr"]\n", start, end - 1);
 			return 0;
 		}
 	}
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/x86: use INFO level for node's without memory log message
Message-Id: <E1o27bP-0007Cb-Fd@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 08:45:15 +0000

commit c9040f25be317ab2f7647605397d79313e3f303e
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:16 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: use INFO level for node's without memory log message
    
    In previous code, Xen was using KERN_WARNING for log message
    when Xen found a node without memory. Xen will print this
    warning message, and said that this may be an BIOS Bug or
    mis-configured hardware. But actually, this warning is bogus,
    because in an NUMA setting, nodes can only have processors,
    and with 0 bytes memory. So it is unreasonable to warn about
    BIOS or hardware corruption based on the detection of node
    with 0 bytes memory.
    
    So in this patch, we remove the warning messages, but just
    keep an info message to info users that there is one or more
    nodes with 0 bytes memory in the system.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/srat.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index 3d02520a5a..b62a152911 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -555,8 +555,7 @@ int __init acpi_scan_nodes(paddr_t start, paddr_t end)
 		uint64_t size = nodes[i].end - nodes[i].start;
 
 		if ( size == 0 )
-			printk(KERN_WARNING "SRAT: Node %u has no memory. "
-			       "BIOS Bug or mis-configured hardware?\n", i);
+			printk(KERN_INFO "SRAT: node %u has no memory\n", i);
 
 		setup_node_bootmem(i, nodes[i].start, nodes[i].end);
 	}
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o28Az-0000Xa-It@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 09:22:01 +0000

commit 1a377949cee5f13c18fa3d0e1a6c51404f223a9a
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 1cab26fef6..e4c820e170 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2194,9 +2194,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index b212729880..4a61e951fa 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -861,6 +861,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1994,14 +1996,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2065,6 +2068,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1e226102d3..b4efc940aa 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -903,6 +903,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1148,21 +1155,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index 09f619459b..9eaab7a2a1 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 7213d184b0..d0df7f83aa 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -319,6 +319,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index 9caecddfec..68f6c46c47 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o28B9-0000Y3-MQ@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 09:22:11 +0000

commit 680c6f4d6bbeaddfc8c686b4186f260794118e54
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index b4efc940aa..38e0cc2847 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 947778105f..1e743461e9 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -59,6 +59,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -76,6 +81,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o28BJ-0000YX-RM@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 09:22:21 +0000

commit a3faf632606e54437146dbcac2c9bbb89b9a4007
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:22:23 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index e4c820e170..e17a835ed2 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2171,7 +2171,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2250,8 +2250,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e0cc2847..83b856fa91 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -912,7 +917,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1147,6 +1154,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1160,18 +1179,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1236,14 +1257,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o29hp-0005Hj-U6@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 11:00:01 +0000

commit 0e80f9f61168d4e4f008da75762cee0118f802ed
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:20:31 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  2 +-
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 16 ++++++++++++++--
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 1d08fb7e9a..d5cb09f865 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2258,9 +2258,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index ef1812dc14..1fe6644a71 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -863,6 +863,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -2017,14 +2019,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2088,6 +2091,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index c19464da70..21730aa030 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static int8_t __initdata opt_rsb_pv = -1;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -932,6 +932,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1196,21 +1203,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index ff3157d52d..bd45a144ee 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 92d54de0b9..2398a1d99d 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -319,6 +319,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index f760295236..751355f471 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o29i0-0005Iu-1K@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 11:00:12 +0000

commit a83108736db0ddaa5855f5abda6dcc8ae4fe25e9
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:20:31 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 11 ++++++++---
 xen/include/asm-x86/msr-index.h |  6 ++++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 21730aa030..d285538bde 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 31964b88af..72bc32ba04 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -66,6 +66,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD                       0x0000010b
 #define  FLUSH_CMD_L1D                      (_AC(1, ULL) <<  0)
@@ -83,6 +88,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.16] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o29iA-0005JW-4j@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 11:00:22 +0000

commit 2e82446cb252f6c8ac697e81f4155872c69afde4
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:21:07 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index d5cb09f865..a642e43476 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2235,7 +2235,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2314,8 +2314,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index d285538bde..099113ba41 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -941,7 +946,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1195,6 +1202,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1208,18 +1227,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1284,14 +1305,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.16


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o2BKU-0001yK-95@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 12:44:02 +0000

commit a84bc5bde583ffe1b9b697a4b1d2006c5614afff
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6)
---
 docs/misc/xen-command-line.pandoc   |  5 ++---
 xen/arch/x86/domain.c               | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S        |  1 +
 xen/arch/x86/spec_ctrl.c            | 30 ++++++++++++++++++------------
 xen/include/asm-x86/cpufeatures.h   |  3 +--
 xen/include/asm-x86/domain.h        |  3 +++
 xen/include/asm-x86/spec_ctrl.h     |  2 ++
 xen/include/asm-x86/spec_ctrl_asm.h | 18 ++++++++++++++----
 8 files changed, 51 insertions(+), 23 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index eead69ada2..e8bdf30fa4 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2058,9 +2058,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 820cb0f905..fe95b25a03 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -651,6 +651,8 @@ int arch_domain_create(struct domain *d,
 
     domain_cpu_policy_changed(d);
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -1746,14 +1748,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = next->dirty_cpu;
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -1816,6 +1819,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 27c8c5ca49..62ed0d854d 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -81,6 +81,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         SPEC_CTRL_EXIT_TO_HVM   /* Req: a=spec_ctrl %rsp=regs/cpuinfo, Clob: cd */
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 7447d4a8e5..38e1f10982 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -35,8 +35,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static bool __initdata opt_rsb_pv = true;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __read_mostly opt_md_clear_pv = -1;
+static int8_t __read_mostly opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -878,6 +878,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1078,21 +1085,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
diff --git a/xen/include/asm-x86/cpufeatures.h b/xen/include/asm-x86/cpufeatures.h
index a8222e978c..bcba926bda 100644
--- a/xen/include/asm-x86/cpufeatures.h
+++ b/xen/include/asm-x86/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 
 /* Bug words follow the synthetic words. */
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 309b56e2d6..71d1ca243b 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -295,6 +295,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h
index b252bb8631..157a2c67d8 100644
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/include/asm-x86/spec_ctrl_asm.h b/xen/include/asm-x86/spec_ctrl_asm.h
index c60093b090..4a3777cc52 100644
--- a/xen/include/asm-x86/spec_ctrl_asm.h
+++ b/xen/include/asm-x86/spec_ctrl_asm.h
@@ -141,6 +141,19 @@
     wrmsr
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -242,15 +255,12 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /* Use when exiting to HVM guest context. */
 #define SPEC_CTRL_EXIT_TO_HVM                                           \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_HVM;             \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_HVM
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o2BKe-00020L-Cg@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 12:44:12 +0000

commit 413b08328a57b931a689be278cc72b428c378d3b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec)
---
 xen/arch/x86/spec_ctrl.c        | 9 +++++++--
 xen/include/asm-x86/msr-index.h | 5 +++++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 38e1f10982..fd36927ba1 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -318,7 +318,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
     printk("Speculative mitigation facilities:\n");
 
     /* Hardware features which pertain to speculative mitigations. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBRS/IBPB" : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_STIBP)) ? " STIBP"     : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_L1D_FLUSH)) ? " L1D_FLUSH" : "",
@@ -333,7 +333,12 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                ? " SSB_NO"    : "",
            (caps & ARCH_CAPS_MDS_NO)                ? " MDS_NO"    : "",
            (caps & ARCH_CAPS_TSX_CTRL)              ? " TSX_CTRL"  : "",
-           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "");
+           (caps & ARCH_CAPS_TAA_NO)                ? " TAA_NO"    : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)          ? " SBDR_SSDP_NO" : "",
+           (caps & ARCH_CAPS_FBSDP_NO)              ? " FBSDP_NO"  : "",
+           (caps & ARCH_CAPS_PSDP_NO)               ? " PSDP_NO"   : "",
+           (caps & ARCH_CAPS_FB_CLEAR)              ? " FB_CLEAR"  : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)         ? " FB_CLEAR_CTRL" : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index ba9e90af21..2a80660d84 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -55,6 +55,11 @@
 #define ARCH_CAPS_IF_PSCHANGE_MC_NO	(_AC(1, ULL) << 6)
 #define ARCH_CAPS_TSX_CTRL		(_AC(1, ULL) << 7)
 #define ARCH_CAPS_TAA_NO		(_AC(1, ULL) << 8)
+#define ARCH_CAPS_SBDR_SSDP_NO		(_AC(1, ULL) << 13)
+#define ARCH_CAPS_FBSDP_NO		(_AC(1, ULL) << 14)
+#define ARCH_CAPS_PSDP_NO		(_AC(1, ULL) << 15)
+#define ARCH_CAPS_FB_CLEAR		(_AC(1, ULL) << 17)
+#define ARCH_CAPS_FB_CLEAR_CTRL		(_AC(1, ULL) << 18)
 
 #define MSR_FLUSH_CMD			0x0000010b
 #define FLUSH_CMD_L1D			(_AC(1, ULL) << 0)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.13] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o2BKo-00020q-GU@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 12:44:22 +0000

commit 87ff11354f0dc0d6e77e1695e6c1e14aa1382cdc
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 13:40:24 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
    (cherry picked from commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e)
---
 docs/misc/xen-command-line.pandoc | 14 ++++++++---
 xen/arch/x86/spec_ctrl.c          | 49 ++++++++++++++++++++++++++++++---------
 2 files changed, 49 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index e8bdf30fa4..022cb01da7 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2035,7 +2035,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2114,8 +2114,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index fd36927ba1..d4ba941206 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination.
 
 static int8_t __initdata opt_srb_lock = -1;
 uint64_t __read_mostly default_xen_mcu_opt_ctrl;
+static bool __initdata opt_unpriv_mmio;
+static bool __read_mostly opt_fb_clear_mmio;
 
 static int __init parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -367,7 +371,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -887,7 +892,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1077,6 +1084,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1090,18 +1109,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1170,12 +1191,18 @@ void __init init_speculation_mitigations(void)
          * On some SRBDS-affected hardware, it may be safe to relax srb-lock
          * by default.
          *
-         * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only way
-         * to access the Fill Buffer.  If TSX isn't available (inc. SKU
-         * reasons on some models), or TSX is explicitly disabled, then there
-         * is no need for the extra overhead to protect RDRAND/RDSEED.
+         * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale
+         * RNG data becomes available to other contexts.  To recover the data,
+         * an attacker needs to use:
+         *  - SBDS (MDS or TAA to sample the cores fill buffer)
+         *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+         *  - DRPW (Architecturally latch stale fill buffer data)
+         *
+         * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and
+         * there is no unprivileged MMIO access, the RNG data doesn't need
+         * protecting.
          */
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && opt_tsx == 0)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.13


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] add more MISRA C rules to docs/misra/rules.rst
Message-Id: <E1o2BvF-0003tD-OK@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:01 +0000

commit 162dea4e768b835114c736cfd3fa1fc3742d39c5
Author:     Stefano Stabellini <sstabellini@kernel.org>
AuthorDate: Fri Jun 10 14:27:55 2022 -0700
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Tue Jun 14 16:14:14 2022 -0700

    add more MISRA C rules to docs/misra/rules.rst
    
    Add the new MISRA C rules agreed by the MISRA C working group to
    docs/misra/rules.rst.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misra/rules.rst | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst
index 6ccff07765..8a659d8d47 100644
--- a/docs/misra/rules.rst
+++ b/docs/misra/rules.rst
@@ -89,6 +89,29 @@ existing codebase are work-in-progress.
        (xen/include/public/) are allowed to retain longer identifiers
        for backward compatibility.
 
+   * - `Rule 5.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_02.c>`_
+     - Required
+     - Identifiers declared in the same scope and name space shall be
+       distinct
+     - The Xen characters limit for identifiers is 40. Public headers
+       (xen/include/public/) are allowed to retain longer identifiers
+       for backward compatibility.
+
+   * - `Rule 5.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_03.c>`_
+     - Required
+     - An identifier declared in an inner scope shall not hide an
+       identifier declared in an outer scope
+     - Using macros as macro parameters at invocation time is allowed
+       even if both macros use identically named local variables, e.g.
+       max(var0, min(var1, var2))
+
+   * - `Rule 5.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_05_04.c>`_
+     - Required
+     - Macro identifiers shall be distinct
+     - The Xen characters limit for macro identifiers is 40. Public
+       headers (xen/include/public/) are allowed to retain longer
+       identifiers for backward compatibility.
+
    * - `Rule 6.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_06_02.c>`_
      - Required
      - Single-bit named bit fields shall not be of a signed type
@@ -123,8 +146,75 @@ existing codebase are work-in-progress.
        declarations of objects and functions that have internal linkage
      -
 
+   * - `Rule 8.10 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_10.c>`_
+     - Required
+     - An inline function shall be declared with the static storage class
+     - gnu_inline (without static) is allowed.
+
    * - `Rule 8.12 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_08_12.c>`_
      - Required
      - Within an enumerator list the value of an implicitly-specified
        enumeration constant shall be unique
      -
+
+   * - `Rule 9.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_09_01.c>`_
+     - Mandatory
+     - The value of an object with automatic storage duration shall not
+       be read before it has been set
+     - Rule clarification: do not use variables before they are
+       initialized. An explicit initializer is not necessarily required.
+       Try reducing the scope of the variable. If an explicit
+       initializer is added, consider initializing the variable to a
+       poison value.
+
+   * - `Rule 9.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_09_02.c>`_
+     - Required
+     - The initializer for an aggregate or union shall be enclosed in
+       braces
+     -
+
+   * - `Rule 13.6 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_13_06.c>`_
+     - Mandatory
+     - The operand of the sizeof operator shall not contain any
+       expression which has potential side effects
+     -
+
+   * - `Rule 14.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_14_01.c>`_
+     - Required
+     - A loop counter shall not have essentially floating type
+     -
+
+   * - `Rule 16.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_16_07.c>`_
+     - Required
+     - A switch-expression shall not have essentially Boolean type
+     -
+
+   * - `Rule 17.3 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_17_03.c>`_
+     - Mandatory
+     - A function shall not be declared implicitly
+     -
+
+   * - `Rule 17.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_17_04.c>`_
+     - Mandatory
+     - All exit paths from a function with non-void return type shall
+       have an explicit return statement with an expression
+     -
+
+   * - `Rule 20.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_07.c>`_
+     - Required
+     - Expressions resulting from the expansion of macro parameters
+       shall be enclosed in parentheses
+     -
+
+   * - `Rule 20.13 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_13.c>`_
+     - Required
+     - A line whose first token is # shall be a valid preprocessing
+       directive
+     -
+
+   * - `Rule 20.14 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/R_20_14.c>`_
+     - Required
+     - All #else #elif and #endif preprocessor directives shall reside
+       in the same file as the #if #ifdef or #ifndef directive to which
+       they are related
+     -
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] IOMMU/x86: work around bogus gcc12 warning in hvm_gsi_eoi()
Message-Id: <E1o2BvP-0003te-RR@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:11 +0000

commit 80ad8db8a4d9bb24952f0aea788ce6f47566fa76
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 15 10:19:32 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:19:32 2022 +0200

    IOMMU/x86: work around bogus gcc12 warning in hvm_gsi_eoi()
    
    As per [1] the expansion of the pirq_dpci() macro causes a -Waddress
    controlled warning (enabled implicitly in our builds, if not by default)
    tying the middle part of the involved conditional expression to the
    surrounding boolean context. Work around this by introducing a local
    inline function in the affected source file.
    
    Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
    
    [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102967
---
 xen/drivers/passthrough/x86/hvm.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x86/hvm.c
index 0f94203af8..35b4938ab2 100644
--- a/xen/drivers/passthrough/x86/hvm.c
+++ b/xen/drivers/passthrough/x86/hvm.c
@@ -25,6 +25,18 @@
 #include <asm/hvm/support.h>
 #include <asm/io_apic.h>
 
+/*
+ * Gcc12 takes issue with pirq_dpci() being used in boolean context (see gcc
+ * bug 102967). While we can't replace the macro definition in the header by an
+ * inline function, we can do so here.
+ */
+static inline struct hvm_pirq_dpci *_pirq_dpci(struct pirq *pirq)
+{
+    return pirq_dpci(pirq);
+}
+#undef pirq_dpci
+#define pirq_dpci(pirq) _pirq_dpci(pirq)
+
 static DEFINE_PER_CPU(struct list_head, dpci_list);
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/hvm: widen condition for is_hvm_pv_evtchn_domain() and report fix in CPUID
Message-Id: <E1o2Bva-0003uA-0A@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:22 +0000

commit e2d2b9fd7a2b349a1a9a75b482981cfd2d2407a8
Author:     Jane Malalane <jane.malalane@citrix.com>
AuthorDate: Wed Jun 15 10:21:08 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:21:08 2022 +0200

    x86/hvm: widen condition for is_hvm_pv_evtchn_domain() and report fix in CPUID
    
    Have is_hvm_pv_evtchn_domain() return true for vector callbacks for
    evtchn delivery set up on a per-vCPU basis via
    HVMOP_set_evtchn_upcall_vector.
    
    Assume that if vCPU0 uses HVMOP_set_evtchn_upcall_vector, all
    remaining vCPUs will too and thus remove is_hvm_pv_evtchn_vcpu() and
    replace sole caller with is_hvm_pv_evtchn_domain().
    
    is_hvm_pv_evtchn_domain() returning true is a condition for setting up
    physical IRQ to event channel mappings. Therefore, also add a CPUID
    bit so that guests know whether the check in is_hvm_pv_evtchn_domain()
    will fail when using HVMOP_set_evtchn_upcall_vector. This matters for
    guests that route PIRQs over event channels since
    is_hvm_pv_evtchn_domain() is a condition in physdev_map_pirq().
    
    The naming of the CPUID bit is quite generic about upcall support
    being available. That's done so that the define name doesn't become
    overly long.
    
    A guest that doesn't care about physical interrupts routed over event
    channels can just test for the availability of the hypercall directly
    (HVMOP_set_evtchn_upcall_vector) without checking the CPUID bit.
    
    Signed-off-by: Jane Malalane <jane.malalane@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/hvm/irq.c              | 2 +-
 xen/arch/x86/include/asm/domain.h   | 9 +++++++--
 xen/arch/x86/traps.c                | 6 ++++++
 xen/include/public/arch-x86/cpuid.h | 5 +++++
 4 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c
index 5a7f39b54f..19252448cb 100644
--- a/xen/arch/x86/hvm/irq.c
+++ b/xen/arch/x86/hvm/irq.c
@@ -325,7 +325,7 @@ void hvm_assert_evtchn_irq(struct vcpu *v)
 
         vlapic_set_irq(vcpu_vlapic(v), vector, 0);
     }
-    else if ( is_hvm_pv_evtchn_vcpu(v) )
+    else if ( is_hvm_pv_evtchn_domain(v->domain) )
         vcpu_kick(v);
     else if ( v->vcpu_id == 0 )
         hvm_set_callback_irq_level(v);
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
index 3aa0919fa6..75389e962a 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -14,9 +14,14 @@
 
 #define has_32bit_shinfo(d)    ((d)->arch.has_32bit_shinfo)
 
+/*
+ * Set to true if either the global vector-type callback or per-vCPU
+ * LAPIC vectors are used. Assume all vCPUs will use
+ * HVMOP_set_evtchn_upcall_vector as long as the initial vCPU does.
+ */
 #define is_hvm_pv_evtchn_domain(d) (is_hvm_domain(d) && \
-        (d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector)
-#define is_hvm_pv_evtchn_vcpu(v) (is_hvm_pv_evtchn_domain(v->domain))
+        ((d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector || \
+         (d)->vcpu[0]->arch.hvm.evtchn_upcall_vector))
 #define is_domain_direct_mapped(d) ((void)(d), 0)
 
 #define VCPU_TRAP_NONE         0
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 0a5e42595c..bb3dfcc90f 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1152,6 +1152,12 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf,
         res->a |= XEN_HVM_CPUID_DOMID_PRESENT;
         res->c = d->domain_id;
 
+        /*
+         * Per-vCPU event channel upcalls are implemented and work
+         * correctly with PIRQs routed over event channels.
+         */
+        res->a |= XEN_HVM_CPUID_UPCALL_VECTOR;
+
         break;
 
     case 5: /* PV-specific parameters */
diff --git a/xen/include/public/arch-x86/cpuid.h b/xen/include/public/arch-x86/cpuid.h
index f2b2b3632c..c49eefeaf8 100644
--- a/xen/include/public/arch-x86/cpuid.h
+++ b/xen/include/public/arch-x86/cpuid.h
@@ -109,6 +109,11 @@
  * field from 8 to 15 bits, allowing to target APIC IDs up 32768.
  */
 #define XEN_HVM_CPUID_EXT_DEST_ID      (1u << 5)
+/*
+ * Per-vCPU event channel upcalls work correctly with physical IRQs
+ * bound to event channels.
+ */
+#define XEN_HVM_CPUID_UPCALL_VECTOR    (1u << 6)
 
 /*
  * Leaf 6 (0x40000x05)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenstore: simplify loop handling connection I/O
Message-Id: <E1o2Bvk-0003ub-3S@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:32 +0000

commit e8e6e42279a5723239c5c40ba4c7f579a979465d
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Wed Jun 15 10:22:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:22:38 2022 +0200

    tools/xenstore: simplify loop handling connection I/O
    
    The loop handling input and output of connections of xenstored is
    open coding list_for_each_entry_safe() in an incredibly complicated
    way.
    
    Use list_for_each_entry_safe() instead, making it much more clear how
    the code is working.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 tools/xenstore/xenstored_core.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c
index 6e4022e5da..fa733e714e 100644
--- a/tools/xenstore/xenstored_core.c
+++ b/tools/xenstore/xenstored_core.c
@@ -2368,16 +2368,8 @@ int main(int argc, char *argv[])
 			}
 		}
 
-		next = list_entry(connections.next, typeof(*conn), list);
-		if (&next->list != &connections)
-			talloc_increase_ref_count(next);
-		while (&next->list != &connections) {
-			conn = next;
-
-			next = list_entry(conn->list.next,
-					  typeof(*conn), list);
-			if (&next->list != &connections)
-				talloc_increase_ref_count(next);
+		list_for_each_entry_safe(conn, next, &connections, list) {
+			talloc_increase_ref_count(conn);
 
 			if (conn_can_read(conn))
 				handle_input(conn);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] build: fix exporting for make 3.82
Message-Id: <E1o2Bvu-0003v2-6R@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:42 +0000

commit 95b0d7bbddfbd797f37f7a09f0586c4bbd22291b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Wed Jun 15 10:23:16 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:23:16 2022 +0200

    build: fix exporting for make 3.82
    
    GNU make 3.82 apparently has a quirk where exporting an undefined
    variable prevents its value from subsequently being updated. This
    situation can arise due to our adding of -rR to MAKEFLAGS, which takes
    effect also on make simply re-invoking itself. Once these flags are in
    effect, CC (in particular) is empty (undefined), and would be defined
    only via Config.mk including StdGNU.mk or alike. With the quirk, CC
    remains empty, yet with an empty CC the compiler minimum version check
    fails, breaking the build.
    
    Move the exporting of the various tool stack component variables past
    where they gain their (final) values.
    
    See also be63d9d47f57 ("build: tweak variable exporting for make 3.82").
    
    Fixes: 15a0578ca4b0 ("build: shuffle main Makefile")
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
---
 xen/Makefile | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/Makefile b/xen/Makefile
index 82f5310b12..ede4f15b18 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -44,8 +44,6 @@ export ARCH SRCARCH
 # Allow someone to change their config file
 export KCONFIG_CONFIG ?= .config
 
-export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE
-
 export TARGET := xen
 
 .PHONY: dist
@@ -244,6 +242,7 @@ export TARGET_ARCH     := $(shell echo $(XEN_TARGET_ARCH) | \
                                 -e s'/riscv.*/riscv/g')
 
 export CONFIG_SHELL := $(SHELL)
+export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE
 export YACC = $(if $(BISON),$(BISON),bison)
 export LEX = $(if $(FLEX),$(FLEX),flex)
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] build: remove auto.conf prerequisite from compat/xlat.h target
Message-Id: <E1o2Bw4-0003vR-9H@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:22:52 +0000

commit 8c1d9760b1d847d983529eae2b360b38648841b5
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Wed Jun 15 10:24:06 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Wed Jun 15 10:24:06 2022 +0200

    build: remove auto.conf prerequisite from compat/xlat.h target
    
    Now that the command line generating "xlat.h" is check on rebuild, the
    header will be regenerated whenever the list of xlat headers changes
    due to change in ".config". We don't need to force a regeneration for
    every changes in ".config".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 6d9bcc19b0..617599df7e 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -101,7 +101,7 @@ cmd_xlat_h = \
 	cat $(filter %.h,$^) >$@.new; \
 	mv -f $@.new $@
 
-$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) $(obj)/config/auto.conf FORCE
+$(obj)/compat/xlat.h: $(addprefix $(obj)/compat/.xlat/,$(xlat-y)) FORCE
 	$(call if_changed,xlat_h)
 
 ifeq ($(XEN_TARGET_ARCH),$(XEN_COMPILE_ARCH))
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Sync sysregs and cpuinfo with Linux 5.18-rc3
Message-Id: <E1o2BwE-0003wA-CV@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:23:02 +0000

commit d9094358f821cd24ac9d9799b7fe66cc3d614f80
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:11 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:13 2022 -0700

    xen/arm: Sync sysregs and cpuinfo with Linux 5.18-rc3
    
    Sync existing ID registers sanitization with the status of Linux kernel
    version 5.18-rc3 and add sanitization of ISAR2 registers.
    
    Sync sysregs.h bit shift defintions with the status of Linux kernel
    version 5.18-rc3.
    
    Changes in this patch are splitted in a number of patches in Linux
    kernel and, as the previous synchronisation point was not clear, the
    changes are done in one patch with a status possible to compare easily
    by diffing Xen files to Linux kernel files.
    
    Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git b2d229d4ddb1
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/arm64/cpufeature.c          | 18 ++++++--
 xen/arch/arm/include/asm/arm64/sysregs.h | 76 +++++++++++++++++++++++++++-----
 2 files changed, 80 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/arm64/cpufeature.c b/xen/arch/arm/arm64/cpufeature.c
index 6e5d30dc7b..d9039d37b2 100644
--- a/xen/arch/arm/arm64/cpufeature.c
+++ b/xen/arch/arm/arm64/cpufeature.c
@@ -143,6 +143,16 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
 	ARM64_FTR_END,
 };
 
+static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_CLEARBHB_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
+		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_APA3_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
+	ARM64_FTR_END,
+};
+
 static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_CSV3_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_CSV2_SHIFT, 4, 0),
@@ -158,8 +168,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
 	S_ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR0_FP_SHIFT, 4, ID_AA64PFR0_FP_NI),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL3_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL2_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_SHIFT, 4, ID_AA64PFR0_EL1_64BIT_ONLY),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL0_SHIFT, 4, ID_AA64PFR0_EL0_64BIT_ONLY),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_SHIFT, 4, ID_AA64PFR0_ELx_64BIT_ONLY),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL0_SHIFT, 4, ID_AA64PFR0_ELx_64BIT_ONLY),
 	ARM64_FTR_END,
 };
 
@@ -197,7 +207,7 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_FGT_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_EXS_SHIFT, 4, 0),
 	/*
@@ -243,6 +253,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64mmfr1[] = {
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_AFP_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_ETS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_TWED_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR1_XNX_SHIFT, 4, 0),
@@ -588,6 +599,7 @@ void update_system_features(const struct cpuinfo_arm *new)
 
 	SANITIZE_ID_REG(isa64, 0, aa64isar0);
 	SANITIZE_ID_REG(isa64, 1, aa64isar1);
+	SANITIZE_ID_REG(isa64, 2, aa64isar2);
 
 	SANITIZE_ID_REG(zfr64, 0, aa64zfr0);
 
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index eac08ed33f..54670084c3 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -144,6 +144,30 @@
 
 /* id_aa64isar2 */
 #define ID_AA64ISAR2_CLEARBHB_SHIFT 28
+#define ID_AA64ISAR2_APA3_SHIFT     12
+#define ID_AA64ISAR2_GPA3_SHIFT     8
+#define ID_AA64ISAR2_RPRES_SHIFT    4
+#define ID_AA64ISAR2_WFXT_SHIFT     0
+
+#define ID_AA64ISAR2_RPRES_8BIT     0x0
+#define ID_AA64ISAR2_RPRES_12BIT    0x1
+/*
+ * Value 0x1 has been removed from the architecture, and is
+ * reserved, but has not yet been removed from the ARM ARM
+ * as of ARM DDI 0487G.b.
+ */
+#define ID_AA64ISAR2_WFXT_NI        0x0
+#define ID_AA64ISAR2_WFXT_SUPPORTED 0x2
+
+#define ID_AA64ISAR2_APA3_NI                  0x0
+#define ID_AA64ISAR2_APA3_ARCHITECTED         0x1
+#define ID_AA64ISAR2_APA3_ARCH_EPAC           0x2
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2          0x3
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2_FPAC     0x4
+#define ID_AA64ISAR2_APA3_ARCH_EPAC2_FPAC_CMB 0x5
+
+#define ID_AA64ISAR2_GPA3_NI             0x0
+#define ID_AA64ISAR2_GPA3_ARCHITECTED    0x1
 
 /* id_aa64pfr0 */
 #define ID_AA64PFR0_CSV3_SHIFT       60
@@ -165,14 +189,13 @@
 #define ID_AA64PFR0_AMU              0x1
 #define ID_AA64PFR0_SVE              0x1
 #define ID_AA64PFR0_RAS_V1           0x1
+#define ID_AA64PFR0_RAS_V1P1         0x2
 #define ID_AA64PFR0_FP_NI            0xf
 #define ID_AA64PFR0_FP_SUPPORTED     0x0
 #define ID_AA64PFR0_ASIMD_NI         0xf
 #define ID_AA64PFR0_ASIMD_SUPPORTED  0x0
-#define ID_AA64PFR0_EL1_64BIT_ONLY   0x1
-#define ID_AA64PFR0_EL1_32BIT_64BIT  0x2
-#define ID_AA64PFR0_EL0_64BIT_ONLY   0x1
-#define ID_AA64PFR0_EL0_32BIT_64BIT  0x2
+#define ID_AA64PFR0_ELx_64BIT_ONLY   0x1
+#define ID_AA64PFR0_ELx_32BIT_64BIT  0x2
 
 /* id_aa64pfr1 */
 #define ID_AA64PFR1_MPAMFRAC_SHIFT   16
@@ -189,6 +212,7 @@
 #define ID_AA64PFR1_MTE_NI           0x0
 #define ID_AA64PFR1_MTE_EL0          0x1
 #define ID_AA64PFR1_MTE              0x2
+#define ID_AA64PFR1_MTE_ASYMM        0x3
 
 /* id_aa64zfr0 */
 #define ID_AA64ZFR0_F64MM_SHIFT      56
@@ -228,17 +252,37 @@
 #define ID_AA64MMFR0_ASID_SHIFT      4
 #define ID_AA64MMFR0_PARANGE_SHIFT   0
 
-#define ID_AA64MMFR0_TGRAN4_NI         0xf
-#define ID_AA64MMFR0_TGRAN4_SUPPORTED  0x0
-#define ID_AA64MMFR0_TGRAN64_NI        0xf
-#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
-#define ID_AA64MMFR0_TGRAN16_NI        0x0
-#define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
+#define ID_AA64MMFR0_ASID_8          0x0
+#define ID_AA64MMFR0_ASID_16         0x2
+
+#define ID_AA64MMFR0_TGRAN4_NI             0xf
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN  0x0
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX  0x7
+#define ID_AA64MMFR0_TGRAN64_NI            0xf
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN 0x0
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX 0x7
+#define ID_AA64MMFR0_TGRAN16_NI            0x0
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN 0x1
+#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX 0xf
+
+#define ID_AA64MMFR0_PARANGE_32        0x0
+#define ID_AA64MMFR0_PARANGE_36        0x1
+#define ID_AA64MMFR0_PARANGE_40        0x2
+#define ID_AA64MMFR0_PARANGE_42        0x3
+#define ID_AA64MMFR0_PARANGE_44        0x4
 #define ID_AA64MMFR0_PARANGE_48        0x5
 #define ID_AA64MMFR0_PARANGE_52        0x6
 
+#define ARM64_MIN_PARANGE_BITS     32
+
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT 0x0
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE    0x1
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN     0x2
+#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MAX     0x7
+
 /* id_aa64mmfr1 */
 #define ID_AA64MMFR1_ECBHB_SHIFT     60
+#define ID_AA64MMFR1_AFP_SHIFT       44
 #define ID_AA64MMFR1_ETS_SHIFT       36
 #define ID_AA64MMFR1_TWED_SHIFT      32
 #define ID_AA64MMFR1_XNX_SHIFT       28
@@ -271,6 +315,9 @@
 #define ID_AA64MMFR2_CNP_SHIFT       0
 
 /* id_aa64dfr0 */
+#define ID_AA64DFR0_MTPMU_SHIFT      48
+#define ID_AA64DFR0_TRBE_SHIFT       44
+#define ID_AA64DFR0_TRACE_FILT_SHIFT 40
 #define ID_AA64DFR0_DOUBLELOCK_SHIFT 36
 #define ID_AA64DFR0_PMSVER_SHIFT     32
 #define ID_AA64DFR0_CTX_CMPS_SHIFT   28
@@ -284,11 +331,18 @@
 #define ID_AA64DFR0_PMUVER_8_1       0x4
 #define ID_AA64DFR0_PMUVER_8_4       0x5
 #define ID_AA64DFR0_PMUVER_8_5       0x6
+#define ID_AA64DFR0_PMUVER_8_7       0x7
 #define ID_AA64DFR0_PMUVER_IMP_DEF   0xf
 
+#define ID_AA64DFR0_PMSVER_8_2      0x1
+#define ID_AA64DFR0_PMSVER_8_3      0x2
+
 #define ID_DFR0_PERFMON_SHIFT        24
 
-#define ID_DFR0_PERFMON_8_1          0x4
+#define ID_DFR0_PERFMON_8_0         0x3
+#define ID_DFR0_PERFMON_8_1         0x4
+#define ID_DFR0_PERFMON_8_4         0x5
+#define ID_DFR0_PERFMON_8_5         0x6
 
 #define ID_ISAR4_SWP_FRAC_SHIFT        28
 #define ID_ISAR4_PSR_M_SHIFT           24
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Add sb instruction support
Message-Id: <E1o2BwO-0003wi-Fr@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:23:12 +0000

commit fabbe7e0feae3bb2a93eba272e19bbb2baa12813
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:12 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:40 2022 -0700

    xen/arm: Add sb instruction support
    
    This patch is adding sb instruction support when it is supported by a
    CPU on arm64.
    A new cpu feature capability system is introduced to enable alternative
    code using sb instruction when it is supported by the processor. This is
    decided based on the isa64 system register value and use a new hardware
    capability ARM_HAS_SB.
    
    The sb instruction is encoded using its hexadecimal value to avoid
    recursive macro and support old compilers not having support for sb
    instruction.
    
    Arm32 instruction support is added but it is not enabled at the moment
    due to the lack of hardware supporting it.
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/cpufeature.c             | 28 ++++++++++++++++++++++++++++
 xen/arch/arm/include/asm/cpufeature.h |  6 +++++-
 xen/arch/arm/include/asm/macros.h     | 19 ++++++++++++++++++-
 xen/arch/arm/setup.c                  |  3 +++
 xen/arch/arm/smpboot.c                |  1 +
 5 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c
index a58965f7b9..62d5e1770a 100644
--- a/xen/arch/arm/cpufeature.c
+++ b/xen/arch/arm/cpufeature.c
@@ -26,6 +26,24 @@ DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS);
 
 struct cpuinfo_arm __read_mostly guest_cpuinfo;
 
+#ifdef CONFIG_ARM_64
+static bool has_sb_instruction(const struct arm_cpu_capabilities *entry)
+{
+    return system_cpuinfo.isa64.sb;
+}
+#endif
+
+static const struct arm_cpu_capabilities arm_features[] = {
+#ifdef CONFIG_ARM_64
+    {
+        .desc = "Speculation barrier instruction (SB)",
+        .capability = ARM_HAS_SB,
+        .matches = has_sb_instruction,
+    },
+#endif
+    {},
+};
+
 void update_cpu_capabilities(const struct arm_cpu_capabilities *caps,
                              const char *info)
 {
@@ -70,6 +88,16 @@ void __init enable_cpu_capabilities(const struct arm_cpu_capabilities *caps)
     }
 }
 
+void check_local_cpu_features(void)
+{
+    update_cpu_capabilities(arm_features, "enabled support for");
+}
+
+void __init enable_cpu_features(void)
+{
+    enable_cpu_capabilities(arm_features);
+}
+
 /*
  * Run through the enabled capabilities and enable() them on the calling CPU.
  * If enabling of any capability fails the error is returned. After enabling a
diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
index f7368766c0..24c01d2b9d 100644
--- a/xen/arch/arm/include/asm/cpufeature.h
+++ b/xen/arch/arm/include/asm/cpufeature.h
@@ -67,8 +67,9 @@
 #define ARM_WORKAROUND_BHB_LOOP_24 13
 #define ARM_WORKAROUND_BHB_LOOP_32 14
 #define ARM_WORKAROUND_BHB_SMCC_3 15
+#define ARM_HAS_SB 16
 
-#define ARM_NCAPS           16
+#define ARM_NCAPS           17
 
 #ifndef __ASSEMBLY__
 
@@ -78,6 +79,9 @@
 
 extern DECLARE_BITMAP(cpu_hwcaps, ARM_NCAPS);
 
+void check_local_cpu_features(void);
+void enable_cpu_features(void);
+
 static inline bool cpus_have_cap(unsigned int num)
 {
     if ( num >= ARM_NCAPS )
diff --git a/xen/arch/arm/include/asm/macros.h b/xen/arch/arm/include/asm/macros.h
index 1aa373760f..dc791245df 100644
--- a/xen/arch/arm/include/asm/macros.h
+++ b/xen/arch/arm/include/asm/macros.h
@@ -5,13 +5,30 @@
 # error "This file should only be included in assembly file"
 #endif
 
+#include <asm/alternative.h>
+
     /*
      * Speculative barrier
-     * XXX: Add support for the 'sb' instruction
      */
     .macro sb
+alternative_if_not ARM_HAS_SB
     dsb nsh
     isb
+alternative_else
+    /*
+     * SB encoding in hexadecimal to prevent recursive macro.
+     * extra nop is required to keep same number of instructions on both sides
+     * of the alternative.
+     */
+#if defined(CONFIG_ARM_32)
+    .inst 0xf57ff070
+#elif defined(CONFIG_ARM_64)
+    .inst 0xd50330ff
+#else
+#   error "missing sb encoding for ARM variant"
+#endif
+    nop
+alternative_endif
     .endm
 
 #if defined (CONFIG_ARM_32)
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 6016471d37..577c54e6fb 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -964,6 +964,8 @@ void __init start_xen(unsigned long boot_phys_offset,
      */
     check_local_cpu_errata();
 
+    check_local_cpu_features();
+
     init_xen_time();
 
     gic_init();
@@ -1033,6 +1035,7 @@ void __init start_xen(unsigned long boot_phys_offset,
      */
     apply_alternatives_all();
     enable_errata_workarounds();
+    enable_cpu_features();
 
     /* Create initial domain 0. */
     if ( !is_dom0less_mode() )
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 22fede6600..3f62f3a44f 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -395,6 +395,7 @@ void start_secondary(void)
     local_abort_enable();
 
     check_local_cpu_errata();
+    check_local_cpu_features();
 
     printk(XENLOG_DEBUG "CPU %u booted.\n", smp_processor_id());
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] arm: add ISAR2, MMFR0 and MMFR1 fields in cpufeature
Message-Id: <E1o2BwY-0003xB-KC@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:23:22 +0000

commit 9ebd9550f6bbec7f3ae474ebaad5a6f119402b6c
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:13 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:47 2022 -0700

    arm: add ISAR2, MMFR0 and MMFR1 fields in cpufeature
    
    Complete AA64ISAR2 and AA64MMFR[0-1] with more fields.
    While there add a comment for MMFR bitfields as for other registers in
    the cpuinfo structure definition.
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/cpufeature.h | 28 +++++++++++++++++++++++-----
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
index 24c01d2b9d..c86a2e7f29 100644
--- a/xen/arch/arm/include/asm/cpufeature.h
+++ b/xen/arch/arm/include/asm/cpufeature.h
@@ -234,6 +234,7 @@ struct cpuinfo_arm {
     union {
         register_t bits[3];
         struct {
+            /* MMFR0 */
             unsigned long pa_range:4;
             unsigned long asid_bits:4;
             unsigned long bigend:4;
@@ -242,18 +243,31 @@ struct cpuinfo_arm {
             unsigned long tgranule_16K:4;
             unsigned long tgranule_64K:4;
             unsigned long tgranule_4K:4;
-            unsigned long __res0:32;
-
+            unsigned long tgranule_16k_2:4;
+            unsigned long tgranule_64k_2:4;
+            unsigned long tgranule_4k_2:4;
+            unsigned long exs:4;
+            unsigned long __res0:8;
+            unsigned long fgt:4;
+            unsigned long ecv:4;
+
+            /* MMFR1 */
             unsigned long hafdbs:4;
             unsigned long vmid_bits:4;
             unsigned long vh:4;
             unsigned long hpds:4;
             unsigned long lo:4;
             unsigned long pan:4;
-            unsigned long __res1:8;
-            unsigned long __res2:28;
+            unsigned long specsei:4;
+            unsigned long xnx:4;
+            unsigned long twed:4;
+            unsigned long ets:4;
+            unsigned long __res1:4;
+            unsigned long afp:4;
+            unsigned long __res2:12;
             unsigned long ecbhb:4;
 
+            /* MMFR2 */
             unsigned long __res3:64;
         };
     } mm64;
@@ -297,7 +311,11 @@ struct cpuinfo_arm {
             unsigned long __res2:8;
 
             /* ISAR2 */
-            unsigned long __res3:28;
+            unsigned long wfxt:4;
+            unsigned long rpres:4;
+            unsigned long gpa3:4;
+            unsigned long apa3:4;
+            unsigned long __res3:12;
             unsigned long clearbhb:4;
 
             unsigned long __res4:32;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] arm: Define kconfig symbols used by arm64 cpufeatures
Message-Id: <E1o2Bwi-0003xn-Mw@xenbits.xenproject.org>
Date: Fri, 17 Jun 2022 13:23:32 +0000

commit 3c2a14ea81c77ae7973c1e436a32436a7e6d017b
Author:     Bertrand Marquis <bertrand.marquis@arm.com>
AuthorDate: Mon Jun 13 13:53:14 2022 +0100
Commit:     Stefano Stabellini <stefano.stabellini@xilinx.com>
CommitDate: Wed Jun 15 17:33:56 2022 -0700

    arm: Define kconfig symbols used by arm64 cpufeatures
    
    Define kconfig symbols which are used by arm64 cpufeatures to prevent
    using undefined symbols and rely on IS_ENABLED returning false.
    All the features related to those symbols are unsupported by Xen:
    - pointer authentication
    - sve
    - memory tagging
    - branch target identification
    
    Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/Kconfig | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index a89a67802a..5900aa2efe 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -98,6 +98,34 @@ config HARDEN_BRANCH_PREDICTOR
 
 	  If unsure, say Y.
 
+config ARM64_PTR_AUTH
+	def_bool n
+	depends on ARM64
+	help
+	  Pointer authentication support.
+	  This feature is not supported in Xen.
+
+config ARM64_SVE
+	def_bool n
+	depends on ARM64
+	help
+	  Scalar Vector Extension support.
+	  This feature is not supported in Xen.
+
+config ARM64_MTE
+	def_bool n
+	depends on ARM64
+	help
+	  Memory Tagging Extension support.
+	  This feature is not supported in Xen.
+
+config ARM64_BTI
+	def_bool n
+	depends on ARM64
+	help
+	  Branch Target Identification support.
+	  This feature is not supported in Xen.
+
 config TEE
 	bool "Enable TEE mediators support (UNSUPPORTED)" if UNSUPPORTED
 	default n
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/spec-ctrl: Make VERW flushing runtime conditional
Message-Id: <E1o2QJW-0006UR-Kh@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:02 +0000

commit e06b95c1d44ab80da255219fc9f1e2fc423edcb6
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 16:19:01 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Make VERW flushing runtime conditional
    
    Currently, VERW flushing to mitigate MDS is boot time conditional per domain
    type.  However, to provide mitigations for DRPW (CVE-2022-21166), we need to
    conditionally use VERW based on the trustworthiness of the guest, and the
    devices passed through.
    
    Remove the PV/HVM alternatives and instead issue a VERW on the return-to-guest
    path depending on the SCF_verw bit in cpuinfo spec_ctrl_flags.
    
    Introduce spec_ctrl_init_domain() and d->arch.verw to calculate the VERW
    disposition at domain creation time, and context switch the SCF_verw bit.
    
    For now, VERW flushing is used and controlled exactly as before, but later
    patches will add per-domain cases too.
    
    No change in behaviour.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misc/xen-command-line.pandoc        |  5 ++---
 xen/arch/x86/domain.c                    | 12 ++++++++++--
 xen/arch/x86/hvm/vmx/entry.S             |  2 +-
 xen/arch/x86/include/asm/cpufeatures.h   |  3 +--
 xen/arch/x86/include/asm/domain.h        |  3 +++
 xen/arch/x86/include/asm/spec_ctrl.h     |  2 ++
 xen/arch/x86/include/asm/spec_ctrl_asm.h | 16 ++++++++++++++--
 xen/arch/x86/spec_ctrl.c                 | 30 ++++++++++++++++++------------
 8 files changed, 51 insertions(+), 22 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 0d1d98d715..266a11ab58 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2282,9 +2282,8 @@ in place for guests to use.
 Use of a positive boolean value for either of these options is invalid.
 
 The booleans `pv=`, `hvm=`, `msr-sc=`, `rsb=` and `md-clear=` offer fine
-grained control over the alternative blocks used by Xen.  These impact Xen's
-ability to protect itself, and Xen's ability to virtualise support for guests
-to use.
+grained control over the primitives by Xen.  These impact Xen's ability to
+protect itself, and Xen's ability to virtualise support for guests to use.
 
 * `pv=` and `hvm=` offer control over all suboptions for PV and HVM guests
   respectively.
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index a72cc9552a..9eddeaa20b 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -864,6 +864,8 @@ int arch_domain_create(struct domain *d,
 
     d->arch.msr_relaxed = config->arch.misc_flags & XEN_X86_MSR_RELAXED;
 
+    spec_ctrl_init_domain(d);
+
     return 0;
 
  fail:
@@ -2018,14 +2020,15 @@ static void __context_switch(void)
 void context_switch(struct vcpu *prev, struct vcpu *next)
 {
     unsigned int cpu = smp_processor_id();
+    struct cpu_info *info = get_cpu_info();
     const struct domain *prevd = prev->domain, *nextd = next->domain;
     unsigned int dirty_cpu = read_atomic(&next->dirty_cpu);
 
     ASSERT(prev != next);
     ASSERT(local_irq_is_enabled());
 
-    get_cpu_info()->use_pv_cr3 = false;
-    get_cpu_info()->xen_cr3 = 0;
+    info->use_pv_cr3 = false;
+    info->xen_cr3 = 0;
 
     if ( unlikely(dirty_cpu != cpu) && dirty_cpu != VCPU_CPU_CLEAN )
     {
@@ -2089,6 +2092,11 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
                 *last_id = next_id;
             }
         }
+
+        /* Update the top-of-stack block with the VERW disposition. */
+        info->spec_ctrl_flags &= ~SCF_verw;
+        if ( nextd->arch.verw )
+            info->spec_ctrl_flags |= SCF_verw;
     }
 
     sched_context_switched(prev, next);
diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 49651f3c43..5f5de45a13 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -87,7 +87,7 @@ UNLIKELY_END(realmode)
 
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_VMX   Req: %rsp=regs/cpuinfo              Clob:    */
-        ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)), X86_FEATURE_SC_VERW_HVM
+        DO_SPEC_CTRL_COND_VERW
 
         mov  VCPU_hvm_guest_cr2(%rbx),%rax
 
diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index ff3157d52d..bd45a144ee 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -35,8 +35,7 @@ XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
 XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
-XEN_CPUFEATURE(SC_VERW_PV,        X86_SYNTH(23)) /* VERW used by Xen for PV */
-XEN_CPUFEATURE(SC_VERW_HVM,       X86_SYNTH(24)) /* VERW used by Xen for HVM */
+/* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
 XEN_CPUFEATURE(XEN_SHSTK,         X86_SYNTH(26)) /* Xen uses CET Shadow Stacks */
 XEN_CPUFEATURE(XEN_IBT,           X86_SYNTH(27)) /* Xen uses CET Indirect Branch Tracking */
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
index 75389e962a..ad01ee68e1 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -324,6 +324,9 @@ struct arch_domain
     uint32_t pci_cf8;
     uint8_t cmos_idx;
 
+    /* Use VERW on return-to-guest for its flushing side effect. */
+    bool verw;
+
     union {
         struct pv_domain pv;
         struct hvm_domain hvm;
diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h
index f760295236..751355f471 100644
--- a/xen/arch/x86/include/asm/spec_ctrl.h
+++ b/xen/arch/x86/include/asm/spec_ctrl.h
@@ -24,6 +24,7 @@
 #define SCF_use_shadow (1 << 0)
 #define SCF_ist_wrmsr  (1 << 1)
 #define SCF_ist_rsb    (1 << 2)
+#define SCF_verw       (1 << 3)
 
 #ifndef __ASSEMBLY__
 
@@ -32,6 +33,7 @@
 #include <asm/msr-index.h>
 
 void init_speculation_mitigations(void);
+void spec_ctrl_init_domain(struct domain *d);
 
 extern bool opt_ibpb;
 extern bool opt_ssbd;
diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h b/xen/arch/x86/include/asm/spec_ctrl_asm.h
index 02b3b18ce6..5a590bac44 100644
--- a/xen/arch/x86/include/asm/spec_ctrl_asm.h
+++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h
@@ -136,6 +136,19 @@
 #endif
 .endm
 
+.macro DO_SPEC_CTRL_COND_VERW
+/*
+ * Requires %rsp=cpuinfo
+ *
+ * Issue a VERW for its flushing side effect, if indicated.  This is a Spectre
+ * v1 gadget, but the IRET/VMEntry is serialising.
+ */
+    testb $SCF_verw, CPUINFO_spec_ctrl_flags(%rsp)
+    jz .L\@_verw_skip
+    verw CPUINFO_verw_sel(%rsp)
+.L\@_verw_skip:
+.endm
+
 .macro DO_SPEC_CTRL_ENTRY maybexen:req
 /*
  * Requires %rsp=regs (also cpuinfo if !maybexen)
@@ -231,8 +244,7 @@
 #define SPEC_CTRL_EXIT_TO_PV                                            \
     ALTERNATIVE "",                                                     \
         DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV;              \
-    ALTERNATIVE "", __stringify(verw CPUINFO_verw_sel(%rsp)),           \
-        X86_FEATURE_SC_VERW_PV
+    DO_SPEC_CTRL_COND_VERW
 
 /*
  * Use in IST interrupt/exception context.  May interrupt Xen or PV context.
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1408e4c7ab..92eb4ecd3d 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -36,8 +36,8 @@ static bool __initdata opt_msr_sc_pv = true;
 static bool __initdata opt_msr_sc_hvm = true;
 static int8_t __initdata opt_rsb_pv = -1;
 static bool __initdata opt_rsb_hvm = true;
-static int8_t __initdata opt_md_clear_pv = -1;
-static int8_t __initdata opt_md_clear_hvm = -1;
+static int8_t __ro_after_init opt_md_clear_pv = -1;
+static int8_t __ro_after_init opt_md_clear_hvm = -1;
 
 /* Cmdline controls for Xen's speculative settings. */
 static enum ind_thunk {
@@ -933,6 +933,13 @@ static __init void mds_calculations(uint64_t caps)
     }
 }
 
+void spec_ctrl_init_domain(struct domain *d)
+{
+    bool pv = is_pv_domain(d);
+
+    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+}
+
 void __init init_speculation_mitigations(void)
 {
     enum ind_thunk thunk = THUNK_DEFAULT;
@@ -1197,21 +1204,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The PV blocks need using all the
-     * time, and the Idle blocks need using if either PV or HVM defences are
-     * used.
+     * Enable MDS defences as applicable.  The Idle blocks need using if
+     * either PV or HVM defences are used.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
-     * equivelent semantics to avoid needing to perform both flushes on the
-     * HVM path.  The HVM blocks don't need activating if our hypervisor told
-     * us it was handling L1D_FLUSH, or we are using L1D_FLUSH ourselves.
+     * equivalent semantics to avoid needing to perform both flushes on the
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     *
+     * After calculating the appropriate idle setting, simplify
+     * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
+     * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_PV);
     if ( opt_md_clear_pv || opt_md_clear_hvm )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
-    if ( opt_md_clear_hvm && !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush )
-        setup_force_cpu_cap(X86_FEATURE_SC_VERW_HVM);
+    opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
     /*
      * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/spec-ctrl: Enumeration for MMIO Stale Data controls
Message-Id: <E1o2QJg-0006WR-PL@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:12 +0000

commit 2ebe8fe9b7e0d36e9ec3cfe4552b2b197ef0dcec
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Sep 20 18:47:49 2021 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Enumeration for MMIO Stale Data controls
    
    The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
    data movement primitives.
    
    FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
    flushing side effect.  This is only enumerated on parts where VERW had
    previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
    being fixed in hardware.
    
    FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
    clearing side effect of VERW can be turned off for performance reasons.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/include/asm/msr-index.h |  6 ++++++
 xen/arch/x86/spec_ctrl.c             | 11 ++++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 6c250bfcad..ea47f68d05 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -71,6 +71,11 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
+#define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
+#define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
+#define  ARCH_CAPS_FB_CLEAR                 (_AC(1, ULL) << 17)
+#define  ARCH_CAPS_FB_CLEAR_CTRL            (_AC(1, ULL) << 18)
 #define  ARCH_CAPS_RRSBA                    (_AC(1, ULL) << 19)
 #define  ARCH_CAPS_BHI_NO                   (_AC(1, ULL) << 20)
 
@@ -90,6 +95,7 @@
 #define  MCU_OPT_CTRL_RNGDS_MITG_DIS        (_AC(1, ULL) <<  0)
 #define  MCU_OPT_CTRL_RTM_ALLOW             (_AC(1, ULL) <<  1)
 #define  MCU_OPT_CTRL_RTM_LOCKED            (_AC(1, ULL) <<  2)
+#define  MCU_OPT_CTRL_FB_CLEAR_DIS          (_AC(1, ULL) <<  3)
 
 #define MSR_RTIT_OUTPUT_BASE                0x00000560
 #define MSR_RTIT_OUTPUT_MASK                0x00000561
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 92eb4ecd3d..2ec3126cf0 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
      * Hardware read-only information, stating immunity to certain issues, or
      * suggestions of which mitigation to use.
      */
-    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (caps & ARCH_CAPS_RDCL_NO)                        ? " RDCL_NO"        : "",
            (caps & ARCH_CAPS_IBRS_ALL)                       ? " IBRS_ALL"       : "",
            (caps & ARCH_CAPS_RSBA)                           ? " RSBA"           : "",
@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (caps & ARCH_CAPS_SSB_NO)                         ? " SSB_NO"         : "",
            (caps & ARCH_CAPS_MDS_NO)                         ? " MDS_NO"         : "",
            (caps & ARCH_CAPS_TAA_NO)                         ? " TAA_NO"         : "",
+           (caps & ARCH_CAPS_SBDR_SSDP_NO)                   ? " SBDR_SSDP_NO"   : "",
+           (caps & ARCH_CAPS_FBSDP_NO)                       ? " FBSDP_NO"       : "",
+           (caps & ARCH_CAPS_PSDP_NO)                        ? " PSDP_NO"        : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS))    ? " IBRS_ALWAYS"    : "",
            (e8b  & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS))   ? " STIBP_ALWAYS"   : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_FAST))      ? " IBRS_FAST"      : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
 
     /* Hardware features which need driving to mitigate issues. */
-    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
+    printk("  Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
            (e8b  & cpufeat_mask(X86_FEATURE_IBPB)) ||
            (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB))          ? " IBPB"           : "",
            (e8b  & cpufeat_mask(X86_FEATURE_IBRS)) ||
@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR))       ? " MD_CLEAR"       : "",
            (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL))     ? " SRBDS_CTRL"     : "",
            (e8b  & cpufeat_mask(X86_FEATURE_VIRT_SSBD))      ? " VIRT_SSBD"      : "",
-           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "");
+           (caps & ARCH_CAPS_TSX_CTRL)                       ? " TSX_CTRL"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR)                       ? " FB_CLEAR"       : "",
+           (caps & ARCH_CAPS_FB_CLEAR_CTRL)                  ? " FB_CLEAR_CTRL"  : "");
 
     /* Compiled-in support which pertains to mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
Message-Id: <E1o2QJq-0006Ww-Sn@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:22 +0000

commit 8c24b70fedcb52633b2370f834d8a2be3f7fa38e
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 13 19:18:32 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 12:10:37 2022 +0100

    x86/spec-ctrl: Add spec-ctrl=unpriv-mmio
    
    Per Xen's support statement, PCI passthrough should be to trusted domains
    because the overall system security depends on factors outside of Xen's
    control.
    
    As such, Xen, in a supported configuration, is not vulnerable to DRPW/SBDR.
    
    However, users who have risk assessed their configuration may be happy with
    the risk of DoS, but unhappy with the risk of cross-domain data leakage.  Such
    users should enable this option.
    
    On CPUs vulnerable to MDS, the existing mitigations are the best we can do to
    mitigate MMIO cross-domain data leakage.
    
    On CPUs fixed to MDS but vulnerable MMIO stale data leakage, this option:
    
     * On CPUs susceptible to FBSDP, mitigates cross-domain fill buffer leakage
       using FB_CLEAR.
     * On CPUs susceptible to SBDR, mitigates RNG data recovery by engaging the
       srb-lock, previously used to mitigate SRBDS.
    
    Both mitigations require microcode from IPU 2022.1, May 2022.
    
    This is part of XSA-404.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misc/xen-command-line.pandoc | 14 +++++++++---
 xen/arch/x86/spec_ctrl.c          | 48 ++++++++++++++++++++++++++++++---------
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 266a11ab58..a92b7d228c 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2259,7 +2259,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
 >              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock}=<bool> ]`
+>              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2338,8 +2338,16 @@ Xen will enable this mitigation.
 On hardware supporting SRBDS_CTRL, the `srb-lock=` option can be used to force
 or prevent Xen from protect the Special Register Buffer from leaking stale
 data. By default, Xen will enable this mitigation, except on parts where MDS
-is fixed and TAA is fixed/mitigated (in which case, there is believed to be no
-way for an attacker to obtain the stale data).
+is fixed and TAA is fixed/mitigated and there are no unprivileged MMIO
+mappings (in which case, there is believed to be no way for an attacker to
+obtain stale data).
+
+The `unpriv-mmio=` boolean indicates whether the system has (or will have)
+less than fully privileged domains granted access to MMIO devices.  By
+default, this option is disabled.  If enabled, Xen will use the `FB_CLEAR`
+and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode
+release to mitigate cross-domain leakage of data via the MMIO Stale Data
+vulnerabilities.
 
 ### sync_console
 > `= <boolean>`
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 2ec3126cf0..1f275ad1fb 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -67,6 +67,8 @@ static bool __initdata cpu_has_bug_msbds_only; /* => minimal HT impact. */
 static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. */
 
 static int8_t __initdata opt_srb_lock = -1;
+static bool __initdata opt_unpriv_mmio;
+static bool __ro_after_init opt_fb_clear_mmio;
 
 static int __init cf_check parse_spec_ctrl(const char *s)
 {
@@ -184,6 +186,8 @@ static int __init cf_check parse_spec_ctrl(const char *s)
             opt_branch_harden = val;
         else if ( (val = parse_boolean("srb-lock", s, ss)) >= 0 )
             opt_srb_lock = val;
+        else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 )
+            opt_unpriv_mmio = val;
         else
             rc = -EINVAL;
 
@@ -392,7 +396,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            opt_srb_lock                              ? " SRB_LOCK+" : " SRB_LOCK-",
            opt_ibpb                                  ? " IBPB"  : "",
            opt_l1d_flush                             ? " L1D_FLUSH" : "",
-           opt_md_clear_pv || opt_md_clear_hvm       ? " VERW"  : "",
+           opt_md_clear_pv || opt_md_clear_hvm ||
+           opt_fb_clear_mmio                         ? " VERW"  : "",
            opt_branch_harden                         ? " BRANCH_HARDEN" : "");
 
     /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */
@@ -942,7 +947,9 @@ void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
 
-    d->arch.verw = pv ? opt_md_clear_pv : opt_md_clear_hvm;
+    d->arch.verw =
+        (pv ? opt_md_clear_pv : opt_md_clear_hvm) ||
+        (opt_fb_clear_mmio && is_iommu_enabled(d));
 }
 
 void __init init_speculation_mitigations(void)
@@ -1196,6 +1203,18 @@ void __init init_speculation_mitigations(void)
 
     mds_calculations(caps);
 
+    /*
+     * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have
+     * reintroduced the VERW fill buffer flushing side effect because of a
+     * susceptibility to FBSDP.
+     *
+     * If unprivileged guests have (or will have) MMIO mappings, we can
+     * mitigate cross-domain leakage of fill buffer data by issuing VERW on
+     * the return-to-guest path.
+     */
+    if ( opt_unpriv_mmio )
+        opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR;
+
     /*
      * By default, enable PV and HVM mitigations on MDS-vulnerable hardware.
      * This will only be a token effort for MLPDS/MFBDS when HT is enabled,
@@ -1209,18 +1228,20 @@ void __init init_speculation_mitigations(void)
                             boot_cpu_has(X86_FEATURE_MD_CLEAR));
 
     /*
-     * Enable MDS defences as applicable.  The Idle blocks need using if
-     * either PV or HVM defences are used.
+     * Enable MDS/MMIO defences as applicable.  The Idle blocks need using if
+     * either the PV or HVM MDS defences are used, or if we may give MMIO
+     * access to untrusted guests.
      *
      * HVM is more complicated.  The MD_CLEAR microcode extends L1D_FLUSH with
      * equivalent semantics to avoid needing to perform both flushes on the
-     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH.
+     * HVM path.  Therefore, we don't need VERW in addition to L1D_FLUSH (for
+     * MDS mitigations.  L1D_FLUSH is not safe for MMIO mitigations.)
      *
      * After calculating the appropriate idle setting, simplify
      * opt_md_clear_hvm to mean just "should we VERW on the way into HVM
      * guests", so spec_ctrl_init_domain() can calculate suitable settings.
      */
-    if ( opt_md_clear_pv || opt_md_clear_hvm )
+    if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio )
         setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE);
     opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush;
 
@@ -1285,14 +1306,19 @@ void __init init_speculation_mitigations(void)
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
      * default.
      *
-     * On parts which enumerate MDS_NO and not TAA_NO, TSX is the only known
-     * way to access the Fill Buffer.  If TSX isn't available (inc. SKU
-     * reasons on some models), or TSX is explicitly disabled, then there is
-     * no need for the extra overhead to protect RDRAND/RDSEED.
+     * All parts with SRBDS_CTRL suffer SSDP, the mechanism by which stale RNG
+     * data becomes available to other contexts.  To recover the data, an
+     * attacker needs to use:
+     *  - SBDS (MDS or TAA to sample the cores fill buffer)
+     *  - SBDR (Architecturally retrieve stale transaction buffer contents)
+     *  - DRPW (Architecturally latch stale fill buffer data)
+     *
+     * On MDS_NO parts, and with TAA_NO or TSX unavailable/disabled, and there
+     * is no unprivileged MMIO access, the RNG data doesn't need protecting.
      */
     if ( cpu_has_srbds_ctrl )
     {
-        if ( opt_srb_lock == -1 &&
+        if ( opt_srb_lock == -1 && !opt_unpriv_mmio &&
              (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO &&
              (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) )
             opt_srb_lock = 0;
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
Message-Id: <E1o2QK0-0006XN-W5@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:32 +0000

commit 4ccfee0a08ed258a5f86e3fdef2c01472f40a614
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Fri Jun 10 16:04:03 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 14:23:37 2022 +0100

    x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
    
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html
    https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/running-average-power-limit-energy-reporting.html
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/msr-index.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index ea47f68d05..bcb424a320 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -51,6 +51,9 @@
 #define  PPIN_ENABLE                        (_AC(1, ULL) <<  1)
 #define MSR_PPIN                            0x0000004f
 
+#define MSR_MISC_PACKAGE_CTRL               0x000000bc
+#define  PGK_CTRL_ENERGY_FILTER_EN          (_AC(1, ULL) <<  0)
+
 #define MSR_CORE_CAPABILITIES               0x000000cf
 #define  CORE_CAPS_SPLITLOCK_DETECT         (_AC(1, ULL) <<  5)
 
@@ -71,6 +74,9 @@
 #define  ARCH_CAPS_IF_PSCHANGE_MC_NO        (_AC(1, ULL) <<  6)
 #define  ARCH_CAPS_TSX_CTRL                 (_AC(1, ULL) <<  7)
 #define  ARCH_CAPS_TAA_NO                   (_AC(1, ULL) <<  8)
+#define  ARCH_CAPS_MISC_PACKAGE_CTRL        (_AC(1, ULL) << 10)
+#define  ARCH_CAPS_ENERGY_FILTERING         (_AC(1, ULL) << 11)
+#define  ARCH_CAPS_DOITM                    (_AC(1, ULL) << 12)
 #define  ARCH_CAPS_SBDR_SSDP_NO             (_AC(1, ULL) << 13)
 #define  ARCH_CAPS_FBSDP_NO                 (_AC(1, ULL) << 14)
 #define  ARCH_CAPS_PSDP_NO                  (_AC(1, ULL) << 15)
@@ -155,6 +161,9 @@
 #define  PASID_PASID_MASK                   0x000fffff
 #define  PASID_VALID                        (_AC(1, ULL) << 31)
 
+#define MSR_UARCH_MISC_CTRL                 0x00001b01
+#define  UARCH_CTRL_DOITM                   (_AC(1, ULL) <<  0)
+
 #define MSR_EFER                            0xc0000080 /* Extended Feature Enable Register */
 #define  EFER_SCE                           (_AC(1, ULL) <<  0) /* SYSCALL Enable */
 #define  EFER_LME                           (_AC(1, ULL) <<  8) /* Long Mode Enable */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] ehci-dbgp: fix selecting n-th ehci controller
Message-Id: <E1o2QKB-0006Xs-33@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:43 +0000

commit d6d0cb659fda64430d4649f8680c5cead32da8fd
Author:     Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
AuthorDate: Tue Jun 7 16:30:10 2022 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 16 14:23:37 2022 +0100

    ehci-dbgp: fix selecting n-th ehci controller
    
    The ehci<n> number was parsed but ignored.
    
    Fixes: 322ecbe4ac85 ("console: add EHCI debug port based serial console")
    Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/char/ehci-dbgp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c
index 16c8ff394d..92c588ec0a 100644
--- a/xen/drivers/char/ehci-dbgp.c
+++ b/xen/drivers/char/ehci-dbgp.c
@@ -1480,7 +1480,7 @@ void __init ehci_dbgp_init(void)
         unsigned int num = 0;
 
         if ( opt_dbgp[4] )
-            simple_strtoul(opt_dbgp + 4, &e, 10);
+            num = simple_strtoul(opt_dbgp + 4, &e, 10);
 
         dbgp->cap = find_dbgp(dbgp, num);
         if ( !dbgp->cap )
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenstore: Cleanup makefile
Message-Id: <E1o2QKL-0006YO-6C@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:44:53 +0000

commit 75262697925a63dfc8251769edcbbd082e9ebdb4
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:03 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/xenstore: Cleanup makefile
    
    Regroup *FLAGS together, use $(LDLIBS).
    
    Remove $(LDLIBS_xenstored) which was the wrong name name as it doesn't
    decribe how to link to a potential libxenstored.so, instead add the
    value to $(LDLIBS) of xenstored.
    
    Add SYSTEMD_LIBS into $(LDLIBS) instead of $(LDFLAGS).
    
    Remove the "-I." from $(CFLAGS), it shouldn't be needed.
    
    Removed $(CFLAGS-y) and $(LDFLAGS-y). $(CFLAGS-y) is already included
    in $(CFLAGS) and both aren't used anyway.
    
    Rename ALL_TARGETS to TARGETS.
    Only add programmes we want to build in $(TARGETS), not phony-targets
    (replace "clients").
    
    Store all `xenstored` objs into $(XENSTORED_OBJS-y).
    
    Replace one $< by $^ even if there's only one dependency,
    (xenstore-control).
    
    clean: "init-xenstore-domain" isn't built here any more, so stop
    trying to remove it, remove $(TARGETS). Also regroup all files to be
    removed in one command, using $(RM).
    
    Drop $(MAJOR) and $(MINOR), they aren't used anymore.
    
    Drop ".SECONDARY:", it doesn't appear there's intermediate files that
    would be deleted anymore.
    
    Drop "tarball:" target.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/xenstore/Makefile | 91 +++++++++++++++++++++++--------------------------
 1 file changed, 43 insertions(+), 48 deletions(-)

diff --git a/tools/xenstore/Makefile b/tools/xenstore/Makefile
index c86278fdb1..830052c65f 100644
--- a/tools/xenstore/Makefile
+++ b/tools/xenstore/Makefile
@@ -1,11 +1,7 @@
 XEN_ROOT=$(CURDIR)/../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-MAJOR = 3.0
-MINOR = 3
-
 CFLAGS += -Werror
-CFLAGS += -I.
 # Include configure output (config.h)
 CFLAGS += -include $(XEN_ROOT)/tools/config.h
 CFLAGS += -I./include
@@ -16,71 +12,77 @@ CFLAGS += $(CFLAGS_libxentoolcore)
 CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
 CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
 
-CFLAGS  += $(CFLAGS-y)
-LDFLAGS += $(LDFLAGS-y)
+ifdef CONFIG_STUBDOM
+CFLAGS += -DNO_SOCKETS=1
+endif
 
-CLIENTS := xenstore-exists xenstore-list xenstore-read xenstore-rm xenstore-chmod
-CLIENTS += xenstore-write xenstore-ls xenstore-watch
+XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
+XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
+XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
 
-XENSTORED_OBJS = xenstored_core.o xenstored_watch.o xenstored_domain.o
-XENSTORED_OBJS += xenstored_transaction.o xenstored_control.o
-XENSTORED_OBJS += xs_lib.o talloc.o utils.o tdb.o hashtable.o
+XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
 
-XENSTORED_OBJS_$(CONFIG_Linux) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_NetBSD) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_FreeBSD) = xenstored_posix.o
-XENSTORED_OBJS_$(CONFIG_MiniOS) = xenstored_minios.o
+$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
 
-XENSTORED_OBJS += $(XENSTORED_OBJS_y)
-LDLIBS_xenstored += -lrt
+xenstored: LDLIBS += $(LDLIBS_libxenevtchn)
+xenstored: LDLIBS += $(LDLIBS_libxengnttab)
+xenstored: LDLIBS += $(LDLIBS_libxenctrl)
+xenstored: LDLIBS += -lrt
+xenstored: LDLIBS += $(SOCKET_LIBS)
 
-ALL_TARGETS = clients
-ifeq ($(XENSTORE_XENSTORED),y)
-ALL_TARGETS += xs_tdb_dump xenstored
+ifeq ($(CONFIG_SYSTEMD),y)
+$(XENSTORED_OBJS-y): CFLAGS += $(SYSTEMD_CFLAGS)
+xenstored: LDLIBS += $(SYSTEMD_LIBS)
 endif
 
-ifdef CONFIG_STUBDOM
-CFLAGS += -DNO_SOCKETS=1
+xenstore: LDLIBS += $(LDLIBS_libxenstore)
+xenstore: LDLIBS += $(LDLIBS_libxentoolcore)
+xenstore: LDLIBS += $(SOCKET_LIBS)
+
+xenstore-control: LDLIBS += $(LDLIBS_libxenstore)
+xenstore-control: LDLIBS += $(LDLIBS_libxenctrl)
+xenstore-control: LDLIBS += $(LDLIBS_libxenguest)
+xenstore-control: LDLIBS += $(LDLIBS_libxentoolcore)
+xenstore-control: LDLIBS += $(SOCKET_LIBS)
+
+CLIENTS := xenstore-exists xenstore-list xenstore-read xenstore-rm xenstore-chmod
+CLIENTS += xenstore-write xenstore-ls xenstore-watch
+
+TARGETS := xenstore $(CLIENTS) xenstore-control
+ifeq ($(XENSTORE_XENSTORED),y)
+TARGETS += xs_tdb_dump xenstored
 endif
 
 .PHONY: all
-all: $(ALL_TARGETS)
+all: $(TARGETS)
 
 .PHONY: clients
 clients: xenstore $(CLIENTS) xenstore-control
 
-ifeq ($(CONFIG_SYSTEMD),y)
-$(XENSTORED_OBJS): CFLAGS += $(SYSTEMD_CFLAGS)
-xenstored: LDFLAGS += $(SYSTEMD_LIBS)
-endif
-
-$(XENSTORED_OBJS): CFLAGS += $(CFLAGS_libxengnttab)
-
-xenstored: $(XENSTORED_OBJS)
-	$(CC) $^ $(LDFLAGS) $(LDLIBS_libxenevtchn) $(LDLIBS_libxengnttab) $(LDLIBS_libxenctrl) $(LDLIBS_xenstored) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+xenstored: $(XENSTORED_OBJS-y)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
-xenstored.a: $(XENSTORED_OBJS)
+xenstored.a: $(XENSTORED_OBJS-y)
 	$(AR) cr $@ $^
 
 $(CLIENTS): xenstore
 	ln -f xenstore $@
 
 xenstore: xenstore_client.o xs_lib.o
-	$(CC) $^ $(LDFLAGS) $(LDLIBS_libxenstore) $(LDLIBS_libxentoolcore) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
 xenstore-control: xenstore_control.o
-	$(CC) $< $(LDFLAGS) $(LDLIBS_libxenstore) $(LDLIBS_libxenctrl) $(LDLIBS_libxenguest) $(LDLIBS_libxentoolcore) $(SOCKET_LIBS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
 xs_tdb_dump: xs_tdb_dump.o utils.o tdb.o talloc.o
-	$(CC) $^ $(LDFLAGS) -o $@ $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $^ -o $@ $(APPEND_LDFLAGS)
 
 .PHONY: clean
 clean:
-	rm -f *.a *.o
-	rm -f xenstored
-	rm -f xs_tdb_dump xenstore-control init-xenstore-domain
-	rm -f xenstore $(CLIENTS)
-	$(RM) $(DEPS_RM)
+	$(RM) *.a *.o $(TARGETS) $(DEPS_RM)
 
 .PHONY: distclean
 distclean: clean
@@ -89,10 +91,6 @@ distclean: clean
 TAGS:
 	etags `find . -name '*.[ch]'`
 
-.PHONY: tarball
-tarball: clean
-	cd .. && tar -c -j -v -h -f xenstore.tar.bz2 xenstore/
-
 .PHONY: install
 install: all
 	$(INSTALL_DIR) $(DESTDIR)$(bindir)
@@ -135,6 +133,3 @@ clients-install: clients
 	done
 
 -include $(DEPS_INCLUDE)
-
-# never delete any intermediate files.
-.SECONDARY:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs: rename LDUSELIBS to LDLIBS and use it instead of APPEND_LDFLAGS
Message-Id: <E1o2QKV-0006Z9-98@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:03 +0000

commit 128b7e64483cf6125212b6c24fc86524e184308f
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:06 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: rename LDUSELIBS to LDLIBS and use it instead of APPEND_LDFLAGS
    
    LDLIBS is more appropriate and intended to be used to add library
    dependencies. APPEND_LDFLAGS wasn't intended to be changed by the
    build system.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile |  2 +-
 tools/libs/hypfs/Makefile |  2 +-
 tools/libs/libs.mk        |  4 ++--
 tools/libs/light/Makefile | 18 +++++++++---------
 tools/libs/stat/Makefile  |  2 +-
 tools/libs/store/Makefile |  2 +-
 6 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index ab580e1b64..2005d8a67d 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -102,7 +102,7 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-libxenguest.so.$(MAJOR).$(MINOR): APPEND_LDFLAGS += $(ZLIB_LIBS) -lz
+libxenguest.so.$(MAJOR).$(MINOR): LDLIBS += $(ZLIB_LIBS) -lz
 
 .PHONY: cleanlocal
 cleanlocal:
diff --git a/tools/libs/hypfs/Makefile b/tools/libs/hypfs/Makefile
index 39feca87e8..efa955bd50 100644
--- a/tools/libs/hypfs/Makefile
+++ b/tools/libs/hypfs/Makefile
@@ -4,7 +4,7 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 0
 
-APPEND_LDFLAGS += -lz
+LDLIBS += -lz
 
 SRCS-y                 += core.c
 
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index b3d784c57f..3118cb4194 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -18,7 +18,7 @@ CFLAGS   += -Werror -Wmissing-prototypes
 CFLAGS   += $(CFLAGS_xeninclude)
 CFLAGS   += $(foreach lib, $(USELIBS_$(LIBNAME)), $(CFLAGS_libxen$(lib)))
 
-LDUSELIBS = $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
+LDLIBS += $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
 
 LIB_OBJS := $(SRCS-y:.c=.o)
 PIC_OBJS := $(SRCS-y:.c=.opic)
@@ -88,7 +88,7 @@ lib$(LIB_FILE_NAME).so.$(MAJOR): lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR)
 	$(SYMLINK_SHLIB) $< $@
 
 lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR): $(PIC_OBJS) libxen$(LIBNAME).map
-	$(CC) $(LDFLAGS) $(PTHREAD_LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,lib$(LIB_FILE_NAME).so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $(PIC_OBJS) $(LDUSELIBS) $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) $(PTHREAD_LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,lib$(LIB_FILE_NAME).so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $(PIC_OBJS) $(LDLIBS) $(APPEND_LDFLAGS)
 
 # If abi-dumper is available, write out the ABI analysis
 ifneq ($(ABI_DUMPER),)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 453bea0067..7c0a5dca85 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -166,14 +166,14 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-LDUSELIBS-y += $(PTYFUNCS_LIBS)
-LDUSELIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS)
-LDUSELIBS-$(CONFIG_Linux) += -luuid
-LDUSELIBS-$(CONFIG_Linux) += -lrt
-LDUSELIBS-$(CONFIG_ARM) += -lfdt
-LDUSELIBS-y += $(PTHREAD_LIBS)
-LDUSELIBS-y += -lyajl
-LDUSELIBS += $(LDUSELIBS-y)
+LDLIBS-y += $(PTYFUNCS_LIBS)
+LDLIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS)
+LDLIBS-$(CONFIG_Linux) += -luuid
+LDLIBS-$(CONFIG_Linux) += -lrt
+LDLIBS-$(CONFIG_ARM) += -lfdt
+LDLIBS-y += $(PTHREAD_LIBS)
+LDLIBS-y += -lyajl
+LDLIBS += $(LDLIBS-y)
 
 $(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
 $(ACPI_OBJS) $(ACPI_PIC_OBJS): CFLAGS += -I. -DLIBACPI_STDUTILS=\"$(CURDIR)/libxl_x86_acpi.h\"
@@ -228,7 +228,7 @@ $(XEN_INCLUDE)/_%.h: _%.h
 	$(call move-if-changed,_$*.h,$(XEN_INCLUDE)/_$*.h)
 
 libxenlight_test.so: $(PIC_OBJS) $(LIBXL_TEST_OBJS)
-	$(CC) $(LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,libxenlight.so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $^ $(LDUSELIBS) $(APPEND_LDFLAGS)
+	$(CC) $(LDFLAGS) -Wl,$(SONAME_LDFLAG) -Wl,libxenlight.so.$(MAJOR) $(SHLIB_LDFLAGS) -o $@ $^ $(LDLIBS) $(APPEND_LDFLAGS)
 
 test_%: test_%.o test_common.o libxenlight_test.so
 	$(CC) $(LDFLAGS) -o $@ $^ $(filter-out %libxenlight.so, $(LDLIBS_libxenlight)) $(LDLIBS_libxentoollog) $(LDLIBS_libxentoolcore) -lyajl $(APPEND_LDFLAGS)
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 5840213376..6cd0af5239 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -26,7 +26,7 @@ SRCS-$(CONFIG_FreeBSD) += xenstat_freebsd.c
 
 LDLIBS-y += -lyajl
 LDLIBS-$(CONFIG_SunOS) += -lkstat
-APPEND_LDFLAGS += $(LDLIBS-y)
+LDLIBS += $(LDLIBS-y)
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 8e33db6a66..18ae1fe94d 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -5,7 +5,7 @@ MAJOR = 4
 MINOR = 0
 
 ifeq ($(CONFIG_Linux),y)
-APPEND_LDFLAGS += -ldl
+LDLIBS += -ldl
 endif
 
 SRCS-y   += xs_lib.c
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs: Remove need for *installlocal targets
Message-Id: <E1o2QKf-0006ZZ-CC@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:13 +0000

commit b978a348eb8c47109ad98319fbd3cd4415d65fe8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:07 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: Remove need for *installlocal targets
    
    There is no need for an extra "installlocal" target, we can use
    double-colon rules instead.
    
    "install-headers" in "libs/store" was introduced for the same reason
    that "installlocal" exist, so it is replaced as well.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/libs.mk        |  4 ++--
 tools/libs/light/Makefile | 10 ++--------
 tools/libs/stat/Makefile  |  8 ++++----
 tools/libs/store/Makefile | 10 ++--------
 4 files changed, 10 insertions(+), 22 deletions(-)

diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index 3118cb4194..a173f59a8b 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -100,7 +100,7 @@ endif
 endif
 
 .PHONY: install
-install: all
+install:: all
 	$(INSTALL_DIR) $(DESTDIR)$(libdir)
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)
 	$(INSTALL_SHLIB) lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) $(DESTDIR)$(libdir)
@@ -111,7 +111,7 @@ install: all
 	$(INSTALL_DATA) $(PKG_CONFIG) $(DESTDIR)$(PKG_INSTALLDIR)
 
 .PHONY: uninstall
-uninstall:
+uninstall::
 	rm -f $(DESTDIR)$(PKG_INSTALLDIR)/$(LIB_FILE_NAME).pc
 	for i in $(LIBHEADER); do rm -f $(DESTDIR)$(includedir)/$$i; done
 	rm -f $(DESTDIR)$(libdir)/lib$(LIB_FILE_NAME).so
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 7c0a5dca85..769e2a83e2 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -239,17 +239,11 @@ libxl-save-helper: $(SAVE_HELPER_OBJS) libxenlight.so
 testidl: testidl.o libxenlight.so
 	$(CC) $(LDFLAGS) -o $@ testidl.o $(LDLIBS_libxenlight) $(LDLIBS_libxentoollog) $(LDLIBS_libxentoolcore) $(APPEND_LDFLAGS)
 
-install: installlocal $(LIBHEADERS)
-
-.PHONY: installlocal
-installlocal: libxl-save-helper
+install:: $(LIBHEADERS) libxl-save-helper
 	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
 	$(INSTALL_PROG) libxl-save-helper $(DESTDIR)$(LIBEXEC_BIN)
 
-uninstall: uninstalllocal
-
-.PHONY: uninstalllocal
-uninstalllocal:
+uninstall::
 	rm -f $(DESTDIR)$(LIBEXEC_BIN)/libxl-save-helper
 
 clean: cleanlocal
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 6cd0af5239..1aef25a9bb 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -78,8 +78,8 @@ uninstall-python-bindings:
 ifeq ($(XENSTAT_PYTHON_BINDINGS),y)
 .PHONY: all
 all: python-bindings
-install: install-python-bindings
-uninstall: uninstall-python-bindings
+install:: install-python-bindings
+uninstall:: uninstall-python-bindings
 endif
 
 # Perl bindings
@@ -111,8 +111,8 @@ ifeq ($(XENSTAT_PERL_BINDINGS),y)
 all: perl-bindings
 
 .PHONY: install
-install: install-perl-bindings
-uninstall: uninstall-perl-bindings
+install:: install-perl-bindings
+uninstall:: uninstall-perl-bindings
 endif
 
 clean: cleanlocal
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 18ae1fe94d..b94060be8d 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -30,10 +30,7 @@ xs.opic: CFLAGS += -DUSE_DLSYM
 endif
 
 .PHONY: install
-install: install-headers
-
-.PHONY: install-headers
-install-headers:
+install::
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)
 	$(INSTALL_DIR) $(DESTDIR)$(includedir)/xenstore-compat
 	$(INSTALL_DATA) $(XEN_INCLUDE)/xenstore-compat/xs.h $(DESTDIR)$(includedir)/xenstore-compat/xs.h
@@ -42,10 +39,7 @@ install-headers:
 	ln -sf xenstore-compat/xs_lib.h $(DESTDIR)$(includedir)/xs_lib.h
 
 .PHONY: uninstall
-uninstall: uninstall-headers
-
-.PHONY: uninstall-headers
-uninstall-headers:
+uninstall::
 	rm -f $(DESTDIR)$(includedir)/xs_lib.h
 	rm -f $(DESTDIR)$(includedir)/xs.h
 	rm -f $(DESTDIR)$(includedir)/xenstore-compat/xs_lib.h
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs,tools/include: Clean "clean" targets
Message-Id: <E1o2QKp-0006Zy-FJ@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:23 +0000

commit a03b3552d4771e8135b8beca8547ccb93349791c
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:08 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs,tools/include: Clean "clean" targets
    
    There is no need for an extra "cleanlocal" target, we can use
    double-colon rules instead.
    
    Generated headers are now in tools/include/, so remove those file
    there.
    
    Remove -f flag as it's already in $(RM).
    
    libs.mk:
      - don't try to remove "*.rpm" anymore.
    
    libs/light:
      - "_paths.*.tmp" isn't created anymore.
      - clean "libxenlight_test.so" and "libxl_test_*.opic".
    
    libs/stat:
      - don't remove $(DEPS_RM) from here as it is already done in
        "libs.mk".
    
    libs/util:
      - fix clean of version-script file.
    
    include/xen-foreign:
      - remove __pycache__
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/include/Makefile             |  1 +
 tools/include/xen-foreign/Makefile |  1 +
 tools/libs/ctrl/Makefile           |  5 +----
 tools/libs/guest/Makefile          |  3 +--
 tools/libs/libs.mk                 |  4 ++--
 tools/libs/light/Makefile          | 19 ++++++++-----------
 tools/libs/stat/Makefile           |  8 ++------
 tools/libs/util/Makefile           |  7 ++-----
 tools/libs/vchan/Makefile          |  5 +----
 9 files changed, 19 insertions(+), 34 deletions(-)

diff --git a/tools/include/Makefile b/tools/include/Makefile
index d965987f55..3a03a0b0fa 100644
--- a/tools/include/Makefile
+++ b/tools/include/Makefile
@@ -82,6 +82,7 @@ uninstall:
 clean:
 	rm -rf xen xen-xsm acpi
 	$(MAKE) -C xen-foreign clean
+	rm -f _*.h
 
 .PHONY: dist
 dist: install
diff --git a/tools/include/xen-foreign/Makefile b/tools/include/xen-foreign/Makefile
index 6ce51daf5e..b538d0ea94 100644
--- a/tools/include/xen-foreign/Makefile
+++ b/tools/include/xen-foreign/Makefile
@@ -13,6 +13,7 @@ clean:
 	rm -f $(headers)
 	rm -f checker checker.c
 	rm -f *.pyc *.o *~
+	rm -rf __pycache__
 
 distclean: clean
 
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index ef7362327f..f58c4ef1aa 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -54,8 +54,5 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenctrl.map
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 2005d8a67d..56483c545f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -104,6 +104,5 @@ include $(XEN_ROOT)/tools/libs/libs.mk
 
 libxenguest.so.$(MAJOR).$(MINOR): LDLIBS += $(ZLIB_LIBS) -lz
 
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenguest.map
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index a173f59a8b..c2eaefc928 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -124,8 +124,8 @@ TAGS:
 	etags -t *.c *.h
 
 .PHONY: clean
-clean:
-	rm -rf *.rpm $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
+clean::
+	rm -rf $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
 	rm -f lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) lib$(LIB_FILE_NAME).so.$(MAJOR)
 	rm -f headers.chk headers.lst
 	rm -f $(PKG_CONFIG)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 769e2a83e2..0c04a5b5cb 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -246,15 +246,12 @@ install:: $(LIBHEADERS) libxl-save-helper
 uninstall::
 	rm -f $(DESTDIR)$(LIBEXEC_BIN)/libxl-save-helper
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	$(RM) -f _*.h *.o $(CLIENTS)
-	$(RM) -f _*.c *.pyc _paths.*.tmp _*.api-for-check
-	$(RM) -f testidl.c.new testidl.c *.api-ok
-	$(RM) -f $(TEST_PROGS)
-	$(RM) -rf __pycache__
-	$(RM) -f libxenlight.map
-	$(RM) -f $(AUTOSRCS) $(AUTOINCS)
+clean::
+	$(RM) _*.h *.o $(CLIENTS)
+	$(RM) _*.c *.pyc _*.api-for-check
+	$(RM) testidl.c.new testidl.c *.api-ok
+	$(RM) $(TEST_PROGS) libxenlight_test.so libxl_test_*.opic
+	$(RM) -r __pycache__
+	$(RM) libxenlight.map
+	$(RM) $(AUTOSRCS) $(AUTOINCS)
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) clean
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 1aef25a9bb..39a671d7ed 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -115,9 +115,5 @@ install:: install-perl-bindings
 uninstall:: uninstall-perl-bindings
 endif
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	rm -f $(BINDINGS) $(BINDINGSRC) $(DEPS_RM)
-	rm -f libxenstat.map
+clean::
+	$(RM) libxenstat.map $(BINDINGS) $(BINDINGSRC)
diff --git a/tools/libs/util/Makefile b/tools/libs/util/Makefile
index 72fecb4c49..7a658e9446 100644
--- a/tools/libs/util/Makefile
+++ b/tools/libs/util/Makefile
@@ -49,8 +49,5 @@ $(LIB_OBJS) $(PIC_OBJS): $(AUTOINCS)
 	@rm -f $*.[ch]
 	$(FLEX) --header-file=$*.h --outfile=$*.c $<
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
-	$(RM) -f libxlutil.map
+clean::
+	$(RM) libxenutil.map
diff --git a/tools/libs/vchan/Makefile b/tools/libs/vchan/Makefile
index 83a45d2817..4ccb4dd1f6 100644
--- a/tools/libs/vchan/Makefile
+++ b/tools/libs/vchan/Makefile
@@ -12,8 +12,5 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-clean: cleanlocal
-
-.PHONY: cleanlocal
-cleanlocal:
+clean::
 	rm -f libxenvchan.map
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs: Rename $(SRCS-y) to $(OBJS-y)
Message-Id: <E1o2QKz-0006aN-Ih@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:33 +0000

commit 5e7d75f2cb9c30c1c3f5c525f17db3be81d062f8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:09 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs: Rename $(SRCS-y) to $(OBJS-y)
    
    The only thing done thing done with $(SRCS-y) is to replace ".c" by
    ".o". It is more useful to collect which object we want to build as
    make will figure out how to build it and from which source file.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/call/Makefile          |  12 +--
 tools/libs/ctrl/Makefile          |  74 ++++++++---------
 tools/libs/devicemodel/Makefile   |  12 +--
 tools/libs/evtchn/Makefile        |  12 +--
 tools/libs/foreignmemory/Makefile |  12 +--
 tools/libs/gnttab/Makefile        |  14 ++--
 tools/libs/guest/Makefile         |  86 ++++++++++----------
 tools/libs/hypfs/Makefile         |   2 +-
 tools/libs/libs.mk                |   7 +-
 tools/libs/light/Makefile         | 162 +++++++++++++++++++-------------------
 tools/libs/stat/Makefile          |  12 +--
 tools/libs/store/Makefile         |   4 +-
 tools/libs/toolcore/Makefile      |   2 +-
 tools/libs/toollog/Makefile       |   4 +-
 tools/libs/util/Makefile          |  16 ++--
 tools/libs/vchan/Makefile         |   4 +-
 16 files changed, 217 insertions(+), 218 deletions(-)

diff --git a/tools/libs/call/Makefile b/tools/libs/call/Makefile
index 93d404b79e..e5cb7c937c 100644
--- a/tools/libs/call/Makefile
+++ b/tools/libs/call/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 3
 
-SRCS-y                 += core.c buffer.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o buffer.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index f58c4ef1aa..5fd06949f1 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -1,43 +1,43 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y       += xc_altp2m.c
-SRCS-y       += xc_cpupool.c
-SRCS-y       += xc_domain.c
-SRCS-y       += xc_evtchn.c
-SRCS-y       += xc_gnttab.c
-SRCS-y       += xc_misc.c
-SRCS-y       += xc_flask.c
-SRCS-y       += xc_physdev.c
-SRCS-y       += xc_private.c
-SRCS-y       += xc_csched.c
-SRCS-y       += xc_csched2.c
-SRCS-y       += xc_arinc653.c
-SRCS-y       += xc_rt.c
-SRCS-y       += xc_tbuf.c
-SRCS-y       += xc_pm.c
-SRCS-y       += xc_cpu_hotplug.c
-SRCS-y       += xc_vm_event.c
-SRCS-y       += xc_vmtrace.c
-SRCS-y       += xc_monitor.c
-SRCS-y       += xc_mem_paging.c
-SRCS-y       += xc_mem_access.c
-SRCS-y       += xc_memshr.c
-SRCS-y       += xc_hcall_buf.c
-SRCS-y       += xc_foreign_memory.c
-SRCS-y       += xc_kexec.c
-SRCS-y       += xc_resource.c
-SRCS-$(CONFIG_X86) += xc_psr.c
-SRCS-$(CONFIG_X86) += xc_pagetab.c
-SRCS-$(CONFIG_Linux) += xc_linux.c
-SRCS-$(CONFIG_FreeBSD) += xc_freebsd.c
-SRCS-$(CONFIG_SunOS) += xc_solaris.c
-SRCS-$(CONFIG_NetBSD) += xc_netbsd.c
-SRCS-$(CONFIG_NetBSDRump) += xc_netbsd.c
-SRCS-$(CONFIG_MiniOS) += xc_minios.c
-SRCS-y       += xc_evtchn_compat.c
-SRCS-y       += xc_gnttab_compat.c
-SRCS-y       += xc_devicemodel_compat.c
+OBJS-y       += xc_altp2m.o
+OBJS-y       += xc_cpupool.o
+OBJS-y       += xc_domain.o
+OBJS-y       += xc_evtchn.o
+OBJS-y       += xc_gnttab.o
+OBJS-y       += xc_misc.o
+OBJS-y       += xc_flask.o
+OBJS-y       += xc_physdev.o
+OBJS-y       += xc_private.o
+OBJS-y       += xc_csched.o
+OBJS-y       += xc_csched2.o
+OBJS-y       += xc_arinc653.o
+OBJS-y       += xc_rt.o
+OBJS-y       += xc_tbuf.o
+OBJS-y       += xc_pm.o
+OBJS-y       += xc_cpu_hotplug.o
+OBJS-y       += xc_vm_event.o
+OBJS-y       += xc_vmtrace.o
+OBJS-y       += xc_monitor.o
+OBJS-y       += xc_mem_paging.o
+OBJS-y       += xc_mem_access.o
+OBJS-y       += xc_memshr.o
+OBJS-y       += xc_hcall_buf.o
+OBJS-y       += xc_foreign_memory.o
+OBJS-y       += xc_kexec.o
+OBJS-y       += xc_resource.o
+OBJS-$(CONFIG_X86) += xc_psr.o
+OBJS-$(CONFIG_X86) += xc_pagetab.o
+OBJS-$(CONFIG_Linux) += xc_linux.o
+OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
+OBJS-$(CONFIG_SunOS) += xc_solaris.o
+OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
+OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
+OBJS-$(CONFIG_MiniOS) += xc_minios.o
+OBJS-y       += xc_evtchn_compat.o
+OBJS-y       += xc_gnttab_compat.o
+OBJS-y       += xc_devicemodel_compat.o
 
 CFLAGS   += -D__XEN_TOOLS__
 CFLAGS	+= $(PTHREAD_CFLAGS)
diff --git a/tools/libs/devicemodel/Makefile b/tools/libs/devicemodel/Makefile
index 3e50ff6d90..a0a2d24f99 100644
--- a/tools/libs/devicemodel/Makefile
+++ b/tools/libs/devicemodel/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += common.c
-SRCS-$(CONFIG_FreeBSD) += common.c
-SRCS-$(CONFIG_SunOS)   += compat.c
-SRCS-$(CONFIG_NetBSD)  += compat.c
-SRCS-$(CONFIG_MiniOS)  += compat.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += common.o
+OBJS-$(CONFIG_FreeBSD) += common.o
+OBJS-$(CONFIG_SunOS)   += compat.o
+OBJS-$(CONFIG_NetBSD)  += compat.o
+OBJS-$(CONFIG_MiniOS)  += compat.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/evtchn/Makefile b/tools/libs/evtchn/Makefile
index b8c37b5b97..8208ecf650 100644
--- a/tools/libs/evtchn/Makefile
+++ b/tools/libs/evtchn/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/foreignmemory/Makefile b/tools/libs/foreignmemory/Makefile
index 0eb9a3a712..4427435932 100644
--- a/tools/libs/foreignmemory/Makefile
+++ b/tools/libs/foreignmemory/Makefile
@@ -4,11 +4,11 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-SRCS-y                 += core.c
-SRCS-$(CONFIG_Linux)   += linux.c
-SRCS-$(CONFIG_FreeBSD) += freebsd.c
-SRCS-$(CONFIG_SunOS)   += compat.c solaris.c
-SRCS-$(CONFIG_NetBSD)  += netbsd.c
-SRCS-$(CONFIG_MiniOS)  += minios.c
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/gnttab/Makefile b/tools/libs/gnttab/Makefile
index ae390ce60f..7d7aeeadff 100644
--- a/tools/libs/gnttab/Makefile
+++ b/tools/libs/gnttab/Makefile
@@ -4,13 +4,13 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-SRCS-GNTTAB            += gnttab_core.c
-SRCS-GNTSHR            += gntshr_core.c
+OBJS-GNTTAB            += gnttab_core.o
+OBJS-GNTSHR            += gntshr_core.o
 
-SRCS-$(CONFIG_Linux)   += $(SRCS-GNTTAB) $(SRCS-GNTSHR) linux.c
-SRCS-$(CONFIG_MiniOS)  += $(SRCS-GNTTAB) gntshr_unimp.c minios.c
-SRCS-$(CONFIG_FreeBSD) += $(SRCS-GNTTAB) $(SRCS-GNTSHR) freebsd.c
-SRCS-$(CONFIG_NetBSD)  += $(SRCS-GNTTAB) $(SRCS-GNTSHR) netbsd.c
-SRCS-$(CONFIG_SunOS)   += gnttab_unimp.c gntshr_unimp.c
+OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
+OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
+OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
+OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
+OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 56483c545f..17eb0ebf4b 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -6,69 +6,69 @@ ifeq ($(CONFIG_LIBXC_MINIOS),y)
 override CONFIG_MIGRATE := n
 endif
 
-SRCS-y += xg_private.c
-SRCS-y += xg_domain.c
-SRCS-y += xg_suspend.c
-SRCS-y += xg_resume.c
+OBJS-y += xg_private.o
+OBJS-y += xg_domain.o
+OBJS-y += xg_suspend.o
+OBJS-y += xg_resume.o
 ifeq ($(CONFIG_MIGRATE),y)
-SRCS-y += xg_sr_common.c
-SRCS-$(CONFIG_X86) += xg_sr_common_x86.c
-SRCS-$(CONFIG_X86) += xg_sr_common_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_restore_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.c
-SRCS-$(CONFIG_X86) += xg_sr_save_x86_pv.c
-SRCS-$(CONFIG_X86) += xg_sr_save_x86_hvm.c
-SRCS-y += xg_sr_restore.c
-SRCS-y += xg_sr_save.c
-SRCS-y += xg_offline_page.c
+OBJS-y += xg_sr_common.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
+OBJS-y += xg_sr_restore.o
+OBJS-y += xg_sr_save.o
+OBJS-y += xg_offline_page.o
 else
-SRCS-y += xg_nomigrate.c
+OBJS-y += xg_nomigrate.o
 endif
-SRCS-y       += xg_core.c
-SRCS-$(CONFIG_X86) += xg_core_x86.c
-SRCS-$(CONFIG_ARM) += xg_core_arm.c
+OBJS-y       += xg_core.o
+OBJS-$(CONFIG_X86) += xg_core_x86.o
+OBJS-$(CONFIG_ARM) += xg_core_arm.o
 
 CFLAGS += -I$(XEN_libxenctrl)
 
 vpath %.c ../../../xen/common/libelf
 CFLAGS += -I../../../xen/common/libelf
 
-ELF_SRCS-y += libelf-tools.c libelf-loader.c
-ELF_SRCS-y += libelf-dominfo.c
+ELF_OBJS-y += libelf-tools.o libelf-loader.o
+ELF_OBJS-y += libelf-dominfo.o
 
-SRCS-y += $(ELF_SRCS-y)
+OBJS-y += $(ELF_OBJS-y)
 
-$(patsubst %.c,%.o,$(ELF_SRCS-y)): CFLAGS += -Wno-pointer-sign
-$(patsubst %.c,%.opic,$(ELF_SRCS-y)): CFLAGS += -Wno-pointer-sign
+$(ELF_OBJS-y): CFLAGS += -Wno-pointer-sign
+$(ELF_OBJS-y:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
 
-SRCS-y                 += cpuid.c msr.c policy.c
+OBJS-y                 += cpuid.o msr.o policy.o
 endif
 
 # new domain builder
-SRCS-y                 += xg_dom_core.c
-SRCS-y                 += xg_dom_boot.c
-SRCS-y                 += xg_dom_elfloader.c
-SRCS-$(CONFIG_X86)     += xg_dom_bzimageloader.c
-SRCS-$(CONFIG_X86)     += xg_dom_decompress_lz4.c
-SRCS-$(CONFIG_X86)     += xg_dom_hvmloader.c
-SRCS-$(CONFIG_ARM)     += xg_dom_armzimageloader.c
-SRCS-y                 += xg_dom_binloader.c
-SRCS-y                 += xg_dom_compat_linux.c
-
-SRCS-$(CONFIG_X86)     += xg_dom_x86.c
-SRCS-$(CONFIG_X86)     += xg_cpuid_x86.c
-SRCS-$(CONFIG_ARM)     += xg_dom_arm.c
+OBJS-y                 += xg_dom_core.o
+OBJS-y                 += xg_dom_boot.o
+OBJS-y                 += xg_dom_elfloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
+OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
+OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
+OBJS-y                 += xg_dom_binloader.o
+OBJS-y                 += xg_dom_compat_linux.o
+
+OBJS-$(CONFIG_X86)     += xg_dom_x86.o
+OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
+OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
 
 ifeq ($(CONFIG_LIBXC_MINIOS),y)
-SRCS-y                 += xg_dom_decompress_unsafe.c
-SRCS-y                 += xg_dom_decompress_unsafe_bzip2.c
-SRCS-y                 += xg_dom_decompress_unsafe_lzma.c
-SRCS-y                 += xg_dom_decompress_unsafe_lzo1x.c
-SRCS-y                 += xg_dom_decompress_unsafe_xz.c
-SRCS-y                 += xg_dom_decompress_unsafe_zstd.c
+OBJS-y                 += xg_dom_decompress_unsafe.o
+OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
+OBJS-y                 += xg_dom_decompress_unsafe_xz.o
+OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
 endif
 
 CFLAGS   += -Werror -Wmissing-prototypes
diff --git a/tools/libs/hypfs/Makefile b/tools/libs/hypfs/Makefile
index efa955bd50..630e1e6f3e 100644
--- a/tools/libs/hypfs/Makefile
+++ b/tools/libs/hypfs/Makefile
@@ -6,6 +6,6 @@ MINOR    = 0
 
 LDLIBS += -lz
 
-SRCS-y                 += core.c
+OBJS-y += core.o
 
 include ../libs.mk
diff --git a/tools/libs/libs.mk b/tools/libs/libs.mk
index c2eaefc928..58d8166b09 100644
--- a/tools/libs/libs.mk
+++ b/tools/libs/libs.mk
@@ -20,8 +20,7 @@ CFLAGS   += $(foreach lib, $(USELIBS_$(LIBNAME)), $(CFLAGS_libxen$(lib)))
 
 LDLIBS += $(foreach lib, $(USELIBS_$(LIBNAME)), $(LDLIBS_libxen$(lib)))
 
-LIB_OBJS := $(SRCS-y:.c=.o)
-PIC_OBJS := $(SRCS-y:.c=.opic)
+PIC_OBJS := $(OBJS-y:.o=.opic)
 
 LIB_FILE_NAME = $(FILENAME_$(LIBNAME))
 LIB := lib$(LIB_FILE_NAME).a
@@ -79,7 +78,7 @@ headers.lst: FORCE
 libxen$(LIBNAME).map:
 	echo 'VERS_$(MAJOR).$(MINOR) { global: *; };' >$@
 
-lib$(LIB_FILE_NAME).a: $(LIB_OBJS)
+lib$(LIB_FILE_NAME).a: $(OBJS-y)
 	$(AR) rc $@ $^
 
 lib$(LIB_FILE_NAME).so: lib$(LIB_FILE_NAME).so.$(MAJOR)
@@ -125,7 +124,7 @@ TAGS:
 
 .PHONY: clean
 clean::
-	rm -rf $(LIB) *~ $(DEPS_RM) $(LIB_OBJS) $(PIC_OBJS)
+	rm -rf $(LIB) *~ $(DEPS_RM) $(OBJS-y) $(PIC_OBJS)
 	rm -f lib$(LIB_FILE_NAME).so.$(MAJOR).$(MINOR) lib$(LIB_FILE_NAME).so.$(MAJOR)
 	rm -f headers.chk headers.lst
 	rm -f $(PKG_CONFIG)
diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 0c04a5b5cb..13545654c2 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -1,31 +1,31 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y += osdeps.c
-SRCS-y += libxl_paths.c
-SRCS-y += libxl_bootloader.c
-SRCS-y += flexarray.c
+OBJS-y += osdeps.o
+OBJS-y += libxl_paths.o
+OBJS-y += libxl_bootloader.o
+OBJS-y += flexarray.o
 ifeq ($(CONFIG_LIBNL),y)
-SRCS-y += libxl_netbuffer.c
+OBJS-y += libxl_netbuffer.o
 else
-SRCS-y += libxl_nonetbuffer.c
+OBJS-y += libxl_nonetbuffer.o
 endif
 ifeq ($(CONFIG_X86),y)
-SRCS-y += libxl_convert_callout.c
+OBJS-y += libxl_convert_callout.o
 else
-SRCS-y += libxl_no_convert_callout.c
+OBJS-y += libxl_no_convert_callout.o
 endif
-SRCS-y += libxl_remus.c
-SRCS-y += libxl_checkpoint_device.c
-SRCS-y += libxl_remus_disk_drbd.c
+OBJS-y += libxl_remus.o
+OBJS-y += libxl_checkpoint_device.o
+OBJS-y += libxl_remus_disk_drbd.o
 ifeq ($(CONFIG_LIBNL),y)
-SRCS-y += libxl_colo_restore.c
-SRCS-y += libxl_colo_save.c
-SRCS-y += libxl_colo_qdisk.c
-SRCS-y += libxl_colo_proxy.c
-SRCS-y += libxl_colo_nic.c
+OBJS-y += libxl_colo_restore.o
+OBJS-y += libxl_colo_save.o
+OBJS-y += libxl_colo_qdisk.o
+OBJS-y += libxl_colo_proxy.o
+OBJS-y += libxl_colo_nic.o
 else
-SRCS-y += libxl_no_colo.c
+OBJS-y += libxl_no_colo.o
 endif
 
 ACPI_PATH  = $(XEN_ROOT)/tools/libacpi
@@ -40,82 +40,82 @@ vpath static_tables.c $(ACPI_PATH)/
 acpi:
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) DSDT_FILES="$(DSDT_FILES-y)"
 
-SRCS-$(CONFIG_X86) += $(ACPI_OBJS:.o=.c)
+OBJS-$(CONFIG_X86) += $(ACPI_OBJS)
 
 CFLAGS += -Wno-format-zero-length -Wmissing-declarations \
 	-Wno-declaration-after-statement -Wformat-nonliteral
 
 CFLAGS-$(CONFIG_X86) += -DCONFIG_PCI_SUPP_LEGACY_IRQ
 
-SRCS-$(CONFIG_X86) += libxl_cpuid.c
-SRCS-$(CONFIG_X86) += libxl_x86.c
-SRCS-$(CONFIG_X86) += libxl_psr.c
-SRCS-$(CONFIG_X86) += libxl_x86_acpi.c
-SRCS-$(CONFIG_ARM) += libxl_nocpuid.c
-SRCS-$(CONFIG_ARM) += libxl_arm.c
-SRCS-$(CONFIG_ARM) += libxl_libfdt_compat.c
+OBJS-$(CONFIG_X86) += libxl_cpuid.o
+OBJS-$(CONFIG_X86) += libxl_x86.o
+OBJS-$(CONFIG_X86) += libxl_psr.o
+OBJS-$(CONFIG_X86) += libxl_x86_acpi.o
+OBJS-$(CONFIG_ARM) += libxl_nocpuid.o
+OBJS-$(CONFIG_ARM) += libxl_arm.o
+OBJS-$(CONFIG_ARM) += libxl_libfdt_compat.o
 ifeq ($(CONFIG_ARM_64),y)
 DSDT_FILES-y = dsdt_anycpu_arm.c
-SRCS-y += libxl_arm_acpi.c
-SRCS-y += $(DSDT_FILES-y)
+OBJS-y += libxl_arm_acpi.o
+OBJS-y += $(DSDT_FILES-y:.c=.o)
 dsdt_anycpu_arm.c:
 	$(MAKE) -C $(ACPI_PATH) ACPI_BUILD_DIR=$(CURDIR) DSDT_FILES="$(DSDT_FILES-y)"
 else
-SRCS-$(CONFIG_ARM) += libxl_arm_no_acpi.c
+OBJS-$(CONFIG_ARM) += libxl_arm_no_acpi.o
 endif
 
-SRCS-OS-$(CONFIG_NetBSD) = libxl_netbsd.c
-SRCS-OS-$(CONFIG_Linux) = libxl_linux.c libxl_setresuid.c
-SRCS-OS-$(CONFIG_FreeBSD) = libxl_freebsd.c libxl_setresuid.c
-ifeq ($(SRCS-OS-y),)
+OBJS-OS-$(CONFIG_NetBSD) = libxl_netbsd.o
+OBJS-OS-$(CONFIG_Linux) = libxl_linux.o libxl_setresuid.o
+OBJS-OS-$(CONFIG_FreeBSD) = libxl_freebsd.o libxl_setresuid.o
+ifeq ($(OBJS-OS-y),)
 $(error Your Operating System is not supported by libxenlight, \
 please check libxl_linux.c and libxl_netbsd.c to see how to get it ported)
 endif
-SRCS-y += $(SRCS-OS-y)
-
-SRCS-y += libxl.c
-SRCS-y += libxl_create.c
-SRCS-y += libxl_dm.c
-SRCS-y += libxl_pci.c
-SRCS-y += libxl_dom.c
-SRCS-y += libxl_exec.c
-SRCS-y += libxl_xshelp.c
-SRCS-y += libxl_device.c
-SRCS-y += libxl_internal.c
-SRCS-y += libxl_utils.c
-SRCS-y += libxl_uuid.c
-SRCS-y += libxl_json.c
-SRCS-y += libxl_aoutils.c
-SRCS-y += libxl_numa.c
-SRCS-y += libxl_vnuma.c
-SRCS-y += libxl_stream_read.c
-SRCS-y += libxl_stream_write.c
-SRCS-y += libxl_save_callout.c
-SRCS-y += _libxl_save_msgs_callout.c
-SRCS-y += libxl_qmp.c
-SRCS-y += libxl_event.c
-SRCS-y += libxl_fork.c
-SRCS-y += libxl_dom_suspend.c
-SRCS-y += libxl_dom_save.c
-SRCS-y += libxl_usb.c
-SRCS-y += libxl_vtpm.c
-SRCS-y += libxl_nic.c
-SRCS-y += libxl_disk.c
-SRCS-y += libxl_console.c
-SRCS-y += libxl_cpupool.c
-SRCS-y += libxl_mem.c
-SRCS-y += libxl_sched.c
-SRCS-y += libxl_tmem.c
-SRCS-y += libxl_9pfs.c
-SRCS-y += libxl_domain.c
-SRCS-y += libxl_vdispl.c
-SRCS-y += libxl_pvcalls.c
-SRCS-y += libxl_vsnd.c
-SRCS-y += libxl_vkb.c
-SRCS-y += libxl_genid.c
-SRCS-y += _libxl_types.c
-SRCS-y += libxl_flask.c
-SRCS-y += _libxl_types_internal.c
+OBJS-y += $(OBJS-OS-y)
+
+OBJS-y += libxl.o
+OBJS-y += libxl_create.o
+OBJS-y += libxl_dm.o
+OBJS-y += libxl_pci.o
+OBJS-y += libxl_dom.o
+OBJS-y += libxl_exec.o
+OBJS-y += libxl_xshelp.o
+OBJS-y += libxl_device.o
+OBJS-y += libxl_internal.o
+OBJS-y += libxl_utils.o
+OBJS-y += libxl_uuid.o
+OBJS-y += libxl_json.o
+OBJS-y += libxl_aoutils.o
+OBJS-y += libxl_numa.o
+OBJS-y += libxl_vnuma.o
+OBJS-y += libxl_stream_read.o
+OBJS-y += libxl_stream_write.o
+OBJS-y += libxl_save_callout.o
+OBJS-y += _libxl_save_msgs_callout.o
+OBJS-y += libxl_qmp.o
+OBJS-y += libxl_event.o
+OBJS-y += libxl_fork.o
+OBJS-y += libxl_dom_suspend.o
+OBJS-y += libxl_dom_save.o
+OBJS-y += libxl_usb.o
+OBJS-y += libxl_vtpm.o
+OBJS-y += libxl_nic.o
+OBJS-y += libxl_disk.o
+OBJS-y += libxl_console.o
+OBJS-y += libxl_cpupool.o
+OBJS-y += libxl_mem.o
+OBJS-y += libxl_sched.o
+OBJS-y += libxl_tmem.o
+OBJS-y += libxl_9pfs.o
+OBJS-y += libxl_domain.o
+OBJS-y += libxl_vdispl.o
+OBJS-y += libxl_pvcalls.o
+OBJS-y += libxl_vsnd.o
+OBJS-y += libxl_vkb.o
+OBJS-y += libxl_genid.o
+OBJS-y += _libxl_types.o
+OBJS-y += libxl_flask.o
+OBJS-y += _libxl_types_internal.o
 
 ifeq ($(CONFIG_LIBNL),y)
 CFLAGS_LIBXL += $(LIBNL3_CFLAGS)
@@ -175,7 +175,7 @@ LDLIBS-y += $(PTHREAD_LIBS)
 LDLIBS-y += -lyajl
 LDLIBS += $(LDLIBS-y)
 
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS): CFLAGS += $(CFLAGS_LIBXL) -include $(XEN_ROOT)/tools/config.h
 $(ACPI_OBJS) $(ACPI_PIC_OBJS): CFLAGS += -I. -DLIBACPI_STDUTILS=\"$(CURDIR)/libxl_x86_acpi.h\"
 $(TEST_PROG_OBJS) _libxl.api-for-check: CFLAGS += $(CFLAGS_libxentoollog) $(CFLAGS_libxentoolcore)
 libxl_dom.o libxl_dom.opic: CFLAGS += -I$(XEN_ROOT)/tools  # include libacpi/x86.h
@@ -189,7 +189,7 @@ testidl.c: libxl_types.idl gentest.py $(XEN_INCLUDE)/libxl.h $(AUTOINCS)
 
 all: $(CLIENTS) $(TEST_PROGS) $(AUTOSRCS) $(AUTOINCS)
 
-$(LIB_OBJS) $(PIC_OBJS) $(SAVE_HELPER_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS): $(AUTOINCS) libxl.api-ok
+$(OBJS-y) $(PIC_OBJS) $(SAVE_HELPER_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS): $(AUTOINCS) libxl.api-ok
 
 libxl.api-ok: check-libxl-api-rules _libxl.api-for-check
 	$(PERL) $^
@@ -212,8 +212,8 @@ $(XEN_INCLUDE)/libxl_json.h: $(XEN_INCLUDE)/_libxl_types_json.h
 libxl_internal.h: _libxl_types_internal.h _libxl_types_private.h _libxl_types_internal_private.h
 libxl_internal_json.h: _libxl_types_internal_json.h
 
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS) $(SAVE_HELPER_OBJS): $(XEN_INCLUDE)/libxl.h
-$(LIB_OBJS) $(PIC_OBJS) $(LIBXL_TEST_OBJS): libxl_internal.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS) $(TEST_PROG_OBJS) $(SAVE_HELPER_OBJS): $(XEN_INCLUDE)/libxl.h
+$(OBJS-y) $(PIC_OBJS) $(LIBXL_TEST_OBJS): libxl_internal.h
 
 _libxl_type%.h _libxl_type%_json.h _libxl_type%_private.h _libxl_type%.c: libxl_type%.idl gentypes.py idl.py
 	$(eval stem = $(notdir $*))
diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 39a671d7ed..998435d494 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -17,12 +17,12 @@ include $(XEN_ROOT)/tools/Rules.mk
 
 CFLAGS += -include $(XEN_ROOT)/tools/config.h
 
-SRCS-y += xenstat.c
-SRCS-y += xenstat_qmp.c
-SRCS-$(CONFIG_Linux) += xenstat_linux.c
-SRCS-$(CONFIG_SunOS) += xenstat_solaris.c
-SRCS-$(CONFIG_NetBSD) += xenstat_netbsd.c
-SRCS-$(CONFIG_FreeBSD) += xenstat_freebsd.c
+OBJS-y += xenstat.o
+OBJS-y += xenstat_qmp.o
+OBJS-$(CONFIG_Linux) += xenstat_linux.o
+OBJS-$(CONFIG_SunOS) += xenstat_solaris.o
+OBJS-$(CONFIG_NetBSD) += xenstat_netbsd.o
+OBJS-$(CONFIG_FreeBSD) += xenstat_freebsd.o
 
 LDLIBS-y += -lyajl
 LDLIBS-$(CONFIG_SunOS) += -lkstat
diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index b94060be8d..778da51f95 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -8,8 +8,8 @@ ifeq ($(CONFIG_Linux),y)
 LDLIBS += -ldl
 endif
 
-SRCS-y   += xs_lib.c
-SRCS-y   += xs.c
+OBJS-y   += xs_lib.o
+OBJS-y   += xs.o
 
 LIBHEADER = xenstore.h xenstore_lib.h
 
diff --git a/tools/libs/toolcore/Makefile b/tools/libs/toolcore/Makefile
index 9c013b2879..ce417ea648 100644
--- a/tools/libs/toolcore/Makefile
+++ b/tools/libs/toolcore/Makefile
@@ -6,7 +6,7 @@ MINOR	= 0
 
 LIBHEADER := xentoolcore.h
 
-SRCS-y	+= handlereg.c
+OBJS-y	+= handlereg.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/toollog/Makefile b/tools/libs/toollog/Makefile
index dce1b2de85..c09aa02ba5 100644
--- a/tools/libs/toollog/Makefile
+++ b/tools/libs/toollog/Makefile
@@ -4,7 +4,7 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR	= 1
 MINOR	= 0
 
-SRCS-y	+= xtl_core.c
-SRCS-y	+= xtl_logger_stdio.c
+OBJS-y	+= xtl_core.o
+OBJS-y	+= xtl_logger_stdio.o
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/util/Makefile b/tools/libs/util/Makefile
index 7a658e9446..ffe507b379 100644
--- a/tools/libs/util/Makefile
+++ b/tools/libs/util/Makefile
@@ -1,13 +1,13 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-SRCS-y += libxlu_cfg_y.c
-SRCS-y += libxlu_cfg_l.c
-SRCS-y += libxlu_cfg.c
-SRCS-y += libxlu_disk_l.c
-SRCS-y += libxlu_disk.c
-SRCS-y += libxlu_vif.c
-SRCS-y += libxlu_pci.c
+OBJS-y += libxlu_cfg_y.o
+OBJS-y += libxlu_cfg_l.o
+OBJS-y += libxlu_cfg.o
+OBJS-y += libxlu_disk_l.o
+OBJS-y += libxlu_disk.o
+OBJS-y += libxlu_vif.o
+OBJS-y += libxlu_pci.o
 
 CFLAGS += -Wno-format-zero-length -Wmissing-declarations \
 	-Wno-declaration-after-statement -Wformat-nonliteral
@@ -39,7 +39,7 @@ NO_HEADERS_CHK := y
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
-$(LIB_OBJS) $(PIC_OBJS): $(AUTOINCS)
+$(OBJS-y) $(PIC_OBJS): $(AUTOINCS)
 
 %.c %.h:: %.y
 	@rm -f $*.[ch]
diff --git a/tools/libs/vchan/Makefile b/tools/libs/vchan/Makefile
index 4ccb4dd1f6..ac2bff66f5 100644
--- a/tools/libs/vchan/Makefile
+++ b/tools/libs/vchan/Makefile
@@ -5,8 +5,8 @@ CFLAGS += $(CFLAGS_libxenctrl)
 
 LIBHEADER := libxenvchan.h
 
-SRCS-y += init.c
-SRCS-y += io.c
+OBJS-y += init.o
+OBJS-y += io.o
 
 NO_HEADERS_CHK := y
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs/guest: rename ELF_OBJS to LIBELF_OBJS
Message-Id: <E1o2QL9-0006am-Li@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:43 +0000

commit 58be08a0e5e42d919d70e27ff31b29138255b564
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:10 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/guest: rename ELF_OBJS to LIBELF_OBJS
    
    It seems a better name. Later, we will introduce LIBX86_OBJS to
    collect lib/x86/* objects.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 17eb0ebf4b..7707d4300f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -33,13 +33,12 @@ CFLAGS += -I$(XEN_libxenctrl)
 vpath %.c ../../../xen/common/libelf
 CFLAGS += -I../../../xen/common/libelf
 
-ELF_OBJS-y += libelf-tools.o libelf-loader.o
-ELF_OBJS-y += libelf-dominfo.o
+LIBELF_OBJS += libelf-tools.o libelf-loader.o
+LIBELF_OBJS += libelf-dominfo.o
 
-OBJS-y += $(ELF_OBJS-y)
+OBJS-y += $(LIBELF_OBJS)
 
-$(ELF_OBJS-y): CFLAGS += -Wno-pointer-sign
-$(ELF_OBJS-y:.o=.opic): CFLAGS += -Wno-pointer-sign
+$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs/guest: rework CFLAGS
Message-Id: <E1o2QLJ-0006bF-Ol@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:45:53 +0000

commit 74c01e32adbaa183bd6189da7ff2b62ac5bb3b68
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:11 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/guest: rework CFLAGS
    
    Remove '-Werror -Wmissing-progress -I./include $(CFLAGS_xeninclude)',
    those flags are already added via "libs.mk".
    
    Flag "-I." isn't needed, we just need to fix the #include of
    "xg_core.h" as this header isn't expected to be installed.
    
    Make use of "-iquote" instead of '-I' for double-quote included
    headers.
    
    Also, regroup the CFLAGS into the same place in the makefile.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/guest/Makefile          | 20 +++++++++-----------
 tools/libs/guest/xg_offline_page.c |  2 +-
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 7707d4300f..4f2373101f 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -28,18 +28,13 @@ OBJS-y       += xg_core.o
 OBJS-$(CONFIG_X86) += xg_core_x86.o
 OBJS-$(CONFIG_ARM) += xg_core_arm.o
 
-CFLAGS += -I$(XEN_libxenctrl)
-
 vpath %.c ../../../xen/common/libelf
-CFLAGS += -I../../../xen/common/libelf
 
 LIBELF_OBJS += libelf-tools.o libelf-loader.o
 LIBELF_OBJS += libelf-dominfo.o
 
 OBJS-y += $(LIBELF_OBJS)
 
-$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
-
 ifeq ($(CONFIG_X86),y) # Add libx86 to the build
 vpath %.c ../../../xen/lib/x86
 
@@ -70,10 +65,12 @@ OBJS-y                 += xg_dom_decompress_unsafe_xz.o
 OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
 endif
 
-CFLAGS   += -Werror -Wmissing-prototypes
-CFLAGS   += -I. -I./include $(CFLAGS_xeninclude)
-CFLAGS   += -D__XEN_TOOLS__
-CFLAGS   += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -D__XEN_TOOLS__
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -iquote ../../../xen/common/libelf
+
+# To be able to include xc_private.h
+CFLAGS += -iquote $(XEN_libxenctrl)
 
 # Needed for posix_fadvise64() in xc_linux.c
 CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
@@ -92,8 +89,9 @@ ZLIB_CFLAGS :=
 ZLIB_LIBS :=
 endif
 
-xg_dom_bzimageloader.o: CFLAGS += $(ZLIB_CFLAGS)
-xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
+xg_dom_bzimageloader.o xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
+
+$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 LIBHEADER := xenguest.h
 
diff --git a/tools/libs/guest/xg_offline_page.c b/tools/libs/guest/xg_offline_page.c
index cfe0e2d537..c594fdba41 100644
--- a/tools/libs/guest/xg_offline_page.c
+++ b/tools/libs/guest/xg_offline_page.c
@@ -25,7 +25,7 @@
 #include <stdlib.h>
 #include <unistd.h>
 #include <sys/time.h>
-#include <xg_core.h>
+#include "xg_core.h"
 
 #include "xc_private.h"
 #include "xg_private.h"
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs/store: use of -iquote instead of -I
Message-Id: <E1o2QLT-0006bz-Rd@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:03 +0000

commit 4541f1642777f9ac2d5c292467208e7d923a9a4b
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:12 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/store: use of -iquote instead of -I
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/store/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile
index 778da51f95..2334c953bb 100644
--- a/tools/libs/store/Makefile
+++ b/tools/libs/store/Makefile
@@ -22,7 +22,7 @@ CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
 CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
 
 vpath xs_lib.c $(XEN_ROOT)/tools/xenstore
-CFLAGS += -I $(XEN_ROOT)/tools/xenstore
+CFLAGS += -iquote $(XEN_ROOT)/tools/xenstore
 
 xs.opic: CFLAGS += -DUSE_PTHREAD
 ifeq ($(CONFIG_Linux),y)
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs/stat: Fix and rework python-bindings build
Message-Id: <E1o2QLd-0006cR-UV@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:13 +0000

commit 1e983961452bec4df691e1c6521e06de8567486a
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:13 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/stat: Fix and rework python-bindings build
    
    Fix the dependency on the library, $(SHLIB) variable doesn't exist
    anymore.
    
    Rework dependency on the include file, we can let `swig` generate the
    dependency for us with the use of "-M*" flags.
    
    The xenstat.h file has moved so we need to fix the include location.
    
    Rather than relaying on the VCS to create an empty directory for us,
    we can create one before generating the *.c file for the bindings.
    
    Make use of generic variable names to build a shared library from a
    source file: CFLAGS, LDFLAGS, and LDLIBS.
    
    Fix python's specific *flags by using python-config, and add them to
    generic flags variables: CFLAGS, LDLIBS.
    
    To build a shared library, we need to build the source file with
    "-fPIC", which was drop by 6d0ec05390 (tools: split libxenstat into
    new tools/libs/stat directory).
    
    The source file generated by swig seems to be missing a prototype for
    the "init" function, so we need "-Wno-missing-prototypes" in order to
    build it.
    
    Add some targets to .PHONY.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/stat/Makefile                    | 27 +++++++++++++++++++--------
 tools/libs/stat/bindings/swig/python/.empty |  1 -
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index 998435d494..b8d75810fc 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -49,23 +49,34 @@ install-bindings: install-perl-bindings install-python-bindings
 .PHONY: uninstall-bindings
 uninstall-bindings: uninstall-perl-bindings uninstall-python-bindings
 
-$(BINDINGS): $(SHLIB) $(SHLIB_LINKS) include/xenstat.h
+$(BINDINGS): libxenstat.so
 
-SWIG_FLAGS=-module xenstat -Iinclude -I.
+SWIG_FLAGS = -module xenstat -I$(XEN_INCLUDE)
+SWIG_FLAGS += -MMD -MP -MF .$(if $(filter-out .,$(@D)),$(subst /,@,$(@D))@)$(@F).d
 
 # Python bindings
-PYTHON_VERSION=$(PYTHON:python%=%)
-PYTHON_FLAGS=-I/usr/include/python$(PYTHON_VERSION) -lpython$(PYTHON_VERSION)
 $(PYMOD): $(PYSRC)
 $(PYSRC): bindings/swig/xenstat.i
-	swig -python $(SWIG_FLAGS) -outdir $(@D) -o $(PYSRC) $<
-
+	mkdir -p $(@D)
+	swig -python $(SWIG_FLAGS) -outdir $(@D) -o $@ $<
+
+$(PYLIB): CFLAGS += $(shell $(PYTHON)-config --includes)
+$(PYLIB): CFLAGS += -fPIC
+$(PYLIB): CFLAGS += -Wno-missing-prototypes
+$(PYLIB): LDFLAGS += $(SHLIB_LDFLAGS)
+$(PYLIB): LDLIBS := $(shell $(PYTHON)-config --libs)
+$(PYLIB): LDLIBS += $(LDLIBS_libxenstat)
 $(PYLIB): $(PYSRC)
-	$(CC) $(CFLAGS) $(LDFLAGS) $(PYTHON_FLAGS) $(SHLIB_LDFLAGS) -lxenstat -o $@ $< $(APPEND_LDFLAGS)
+	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $< $(LDLIBS) $(APPEND_LDFLAGS)
 
+.PHONY: python-bindings
 python-bindings: $(PYLIB) $(PYMOD)
 
-pythonlibdir=$(prefix)/lib/python$(PYTHON_VERSION)/site-packages
+pythonlibdir = $(shell $(PYTHON) -c \
+	       'import distutils.sysconfig as cfg; \
+	        print(cfg.get_python_lib(False, False, prefix="$(prefix)"))')
+
+.PHONY: install-python-bindings
 install-python-bindings: $(PYLIB) $(PYMOD)
 	$(INSTALL_PROG) $(PYLIB) $(DESTDIR)$(pythonlibdir)/_xenstat.so
 	$(INSTALL_PROG) $(PYMOD) $(DESTDIR)$(pythonlibdir)/xenstat.py
diff --git a/tools/libs/stat/bindings/swig/python/.empty b/tools/libs/stat/bindings/swig/python/.empty
deleted file mode 100644
index 2a8dd4274d..0000000000
--- a/tools/libs/stat/bindings/swig/python/.empty
+++ /dev/null
@@ -1 +0,0 @@
-This directory is empty; this file is included to prevent version control systems from removing the directory.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] libs/stat: Fix and rework perl-binding build
Message-Id: <E1o2QLo-0006cq-1A@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:24 +0000

commit 9ae030da5cf3bd7151d2d2d7125c768bfcffff97
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:14 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    libs/stat: Fix and rework perl-binding build
    
    For PERL_FLAGS, use make's shell rather than a backquote.
    
    Rather than relying on the VCS to create an empty directory for us,
    we can create one before generating the *.c file for the bindings.
    
    Make use of generic variable names to build a shared library from a
    source file: CFLAGS, LDFLAGS, and LDLIBS.
    
    To build a shared library, we need to build the source file with
    "-fPIC", which was drop by 6d0ec05390 (tools: split libxenstat into
    new tools/libs/stat directory).
    
    The source file generated by swig seems to be missing many prototype for
    many functions, so we need "-Wno-missing-prototypes" in order to
    build it. Also, one of the prototype is deemed malformed, so we also
    need "-Wno-strict-prototypes".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/libs/stat/Makefile                  | 15 +++++++++++----
 tools/libs/stat/bindings/swig/perl/.empty |  1 -
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/tools/libs/stat/Makefile b/tools/libs/stat/Makefile
index b8d75810fc..7eaf50e91e 100644
--- a/tools/libs/stat/Makefile
+++ b/tools/libs/stat/Makefile
@@ -94,13 +94,20 @@ uninstall:: uninstall-python-bindings
 endif
 
 # Perl bindings
-PERL_FLAGS=`perl -MConfig -e 'print "$$Config{ccflags} -I$$Config{archlib}/CORE";'`
+PERL_FLAGS = $(shell $(PERL) -MConfig -e 'print "$$Config{ccflags} -I$$Config{archlib}/CORE";')
 $(PERLMOD): $(PERLSRC)
 $(PERLSRC): bindings/swig/xenstat.i
-	swig -perl $(SWIG_FLAGS) -outdir $(@D) -o $(PERLSRC) $<
-
+	mkdir -p $(@D)
+	swig -perl $(SWIG_FLAGS) -outdir $(@D) -o $@ $<
+
+$(PERLLIB): CFLAGS += -fPIC
+$(PERLLIB): CFLAGS += -Wno-strict-prototypes
+$(PERLLIB): CFLAGS += -Wno-missing-prototypes
+$(PERLLIB): LDFLAGS += $(PERL_FLAGS)
+$(PERLLIB): LDFLAGS += $(SHLIB_LDFLAGS)
+$(PERLLIB): LDLIBS := $(LDLIBS_libxenstat)
 $(PERLLIB): $(PERLSRC)
-	$(CC) $(CFLAGS) $(LDFLAGS) $(PERL_FLAGS) $(SHLIB_LDFLAGS) -lxenstat -o $@ $< $(APPEND_LDFLAGS)
+	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $< $(LDLIBS) $(APPEND_LDFLAGS)
 
 .PHONY: perl-bindings
 perl-bindings: $(PERLLIB) $(PERLMOD)
diff --git a/tools/libs/stat/bindings/swig/perl/.empty b/tools/libs/stat/bindings/swig/perl/.empty
deleted file mode 100644
index 2a8dd4274d..0000000000
--- a/tools/libs/stat/bindings/swig/perl/.empty
+++ /dev/null
@@ -1 +0,0 @@
-This directory is empty; this file is included to prevent version control systems from removing the directory.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] stubdom: introduce xenlibs.mk
Message-Id: <E1o2QLy-0006dF-47@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:34 +0000

commit 1489a2a084d588701af086b473aeb98e9c4ebaa2
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:16 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: introduce xenlibs.mk
    
    This new makefile will be used to build libraries that provides
    "Makefile.common".
    
    At some point, we will be converting Makefile in tools/ to "subdirmk"
    and stubdom build will not be able to use those new makefiles, so we
    will put the necessary information for stubdom to build the xen
    libraries into a new Makefile.common and xenlibs.mk will use it.
    We only need to build static libraries and don't need anything else.
    
    The check for the presence of "Makefile.common" will go aways once
    there is one for all libraries used by stubdom build.
    
    Also remove DESTDIR= from "clean" targets, we don't do installation in
    this recipe so the value of DESTDIR doesn't matter.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile   |  9 +++++++--
 stubdom/xenlibs.mk | 13 +++++++++++++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 5fb5dbc341..fba4c977ef 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -346,6 +346,7 @@ define do_links
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
   ln -sf $(dir $<)*.[ch] .; \
+  [ -e $(dir $<)Makefile.common ] && ln -sf $(dir $<)Makefile.common . ||:; \
   ln -sf $(dir $<)Makefile .
   touch $@
 endef
@@ -355,10 +356,14 @@ define BUILD_lib
  libxen$(1): libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: $$(LIBDEPS_$(1)) $$(LIBDEP_$(1))
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: mk-headers-$$(XEN_TARGET_ARCH) $$(NEWLIB_STAMPFILE) .phony
-	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y -C $$(@D) $$(@F)
+	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y $$(if $$(wildcard $$(@D)/Makefile.common),-f $(CURDIR)/xenlibs.mk) -C $$(@D) $$(@F)
 
  clean-libxen$(1):
-	[ ! -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ] || $$(MAKE) DESTDIR= -C libs-$$(XEN_TARGET_ARCH)/$(1) clean
+	if [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile.common ]; then \
+	    $$(MAKE) -f $(CURDIR)/xenlibs.mk -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
+	elif [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ]; then \
+	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
+	fi
 
  libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile
 	$$(do_links)
diff --git a/stubdom/xenlibs.mk b/stubdom/xenlibs.mk
new file mode 100644
index 0000000000..5c8742ccf9
--- /dev/null
+++ b/stubdom/xenlibs.mk
@@ -0,0 +1,13 @@
+include $(XEN_ROOT)/tools/Rules.mk
+
+include Makefile.common
+
+LIBNAME := $(notdir $(CURDIR))
+FILENAME_$(LIBNAME) ?= xen$(LIBNAME)
+LIB_FILE_NAME = $(FILENAME_$(LIBNAME))
+
+lib$(LIB_FILE_NAME).a: $(OBJS-y)
+	$(AR) rc $@ $^
+
+clean::
+	rm -f $(OBJS-y) lib$(LIB_FILE_NAME).a
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/libs: create Makefile.common to be used by stubdom build system
Message-Id: <E1o2QM8-0006dk-7L@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:44 +0000

commit cfa5e1d250a35554dace3487fcdc47023a1498c3
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:17 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/libs: create Makefile.common to be used by stubdom build system
    
    This new "Makefile.common" is intended to be used by both tools/ and
    stubdom/ build system without stubdom needed to use tools/ build
    system.
    
    It should contain the necessary list of objects and CFLAGS needed to
    build a static library.
    
    Change stubdom/ to check Makefile.common, for the linkfarm.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 stubdom/Makefile                         |  2 +-
 tools/libs/call/Makefile                 |  7 +--
 tools/libs/call/Makefile.common          |  6 +++
 tools/libs/ctrl/Makefile                 | 45 +---------------
 tools/libs/ctrl/Makefile.common          | 44 ++++++++++++++++
 tools/libs/devicemodel/Makefile          |  7 +--
 tools/libs/devicemodel/Makefile.common   |  6 +++
 tools/libs/evtchn/Makefile               |  7 +--
 tools/libs/evtchn/Makefile.common        |  6 +++
 tools/libs/foreignmemory/Makefile        |  7 +--
 tools/libs/foreignmemory/Makefile.common |  6 +++
 tools/libs/gnttab/Makefile               |  9 +---
 tools/libs/gnttab/Makefile.common        |  8 +++
 tools/libs/guest/Makefile                | 90 +-------------------------------
 tools/libs/guest/Makefile.common         | 84 +++++++++++++++++++++++++++++
 tools/libs/toolcore/Makefile             |  2 +-
 tools/libs/toolcore/Makefile.common      |  1 +
 tools/libs/toollog/Makefile              |  3 +-
 tools/libs/toollog/Makefile.common       |  2 +
 19 files changed, 174 insertions(+), 168 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index fba4c977ef..fbc63a5063 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -365,7 +365,7 @@ define BUILD_lib
 	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
 	fi
 
- libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile
+ libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile.common
 	$$(do_links)
 endef
 
diff --git a/tools/libs/call/Makefile b/tools/libs/call/Makefile
index e5cb7c937c..103f5ad360 100644
--- a/tools/libs/call/Makefile
+++ b/tools/libs/call/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 3
 
-OBJS-y                 += core.o buffer.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/call/Makefile.common b/tools/libs/call/Makefile.common
new file mode 100644
index 0000000000..85e608f8ad
--- /dev/null
+++ b/tools/libs/call/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o buffer.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/ctrl/Makefile b/tools/libs/ctrl/Makefile
index 5fd06949f1..93442ab389 100644
--- a/tools/libs/ctrl/Makefile
+++ b/tools/libs/ctrl/Makefile
@@ -1,50 +1,7 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-OBJS-y       += xc_altp2m.o
-OBJS-y       += xc_cpupool.o
-OBJS-y       += xc_domain.o
-OBJS-y       += xc_evtchn.o
-OBJS-y       += xc_gnttab.o
-OBJS-y       += xc_misc.o
-OBJS-y       += xc_flask.o
-OBJS-y       += xc_physdev.o
-OBJS-y       += xc_private.o
-OBJS-y       += xc_csched.o
-OBJS-y       += xc_csched2.o
-OBJS-y       += xc_arinc653.o
-OBJS-y       += xc_rt.o
-OBJS-y       += xc_tbuf.o
-OBJS-y       += xc_pm.o
-OBJS-y       += xc_cpu_hotplug.o
-OBJS-y       += xc_vm_event.o
-OBJS-y       += xc_vmtrace.o
-OBJS-y       += xc_monitor.o
-OBJS-y       += xc_mem_paging.o
-OBJS-y       += xc_mem_access.o
-OBJS-y       += xc_memshr.o
-OBJS-y       += xc_hcall_buf.o
-OBJS-y       += xc_foreign_memory.o
-OBJS-y       += xc_kexec.o
-OBJS-y       += xc_resource.o
-OBJS-$(CONFIG_X86) += xc_psr.o
-OBJS-$(CONFIG_X86) += xc_pagetab.o
-OBJS-$(CONFIG_Linux) += xc_linux.o
-OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
-OBJS-$(CONFIG_SunOS) += xc_solaris.o
-OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
-OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
-OBJS-$(CONFIG_MiniOS) += xc_minios.o
-OBJS-y       += xc_evtchn_compat.o
-OBJS-y       += xc_gnttab_compat.o
-OBJS-y       += xc_devicemodel_compat.o
-
-CFLAGS   += -D__XEN_TOOLS__
-CFLAGS	+= $(PTHREAD_CFLAGS)
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-
-# Needed for posix_fadvise64() in xc_linux.c
-CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
+include Makefile.common
 
 LIBHEADER := xenctrl.h xenctrl_compat.h
 PKG_CONFIG := xencontrol.pc
diff --git a/tools/libs/ctrl/Makefile.common b/tools/libs/ctrl/Makefile.common
new file mode 100644
index 0000000000..0a09c28fd3
--- /dev/null
+++ b/tools/libs/ctrl/Makefile.common
@@ -0,0 +1,44 @@
+OBJS-y       += xc_altp2m.o
+OBJS-y       += xc_cpupool.o
+OBJS-y       += xc_domain.o
+OBJS-y       += xc_evtchn.o
+OBJS-y       += xc_gnttab.o
+OBJS-y       += xc_misc.o
+OBJS-y       += xc_flask.o
+OBJS-y       += xc_physdev.o
+OBJS-y       += xc_private.o
+OBJS-y       += xc_csched.o
+OBJS-y       += xc_csched2.o
+OBJS-y       += xc_arinc653.o
+OBJS-y       += xc_rt.o
+OBJS-y       += xc_tbuf.o
+OBJS-y       += xc_pm.o
+OBJS-y       += xc_cpu_hotplug.o
+OBJS-y       += xc_vm_event.o
+OBJS-y       += xc_vmtrace.o
+OBJS-y       += xc_monitor.o
+OBJS-y       += xc_mem_paging.o
+OBJS-y       += xc_mem_access.o
+OBJS-y       += xc_memshr.o
+OBJS-y       += xc_hcall_buf.o
+OBJS-y       += xc_foreign_memory.o
+OBJS-y       += xc_kexec.o
+OBJS-y       += xc_resource.o
+OBJS-$(CONFIG_X86) += xc_psr.o
+OBJS-$(CONFIG_X86) += xc_pagetab.o
+OBJS-$(CONFIG_Linux) += xc_linux.o
+OBJS-$(CONFIG_FreeBSD) += xc_freebsd.o
+OBJS-$(CONFIG_SunOS) += xc_solaris.o
+OBJS-$(CONFIG_NetBSD) += xc_netbsd.o
+OBJS-$(CONFIG_NetBSDRump) += xc_netbsd.o
+OBJS-$(CONFIG_MiniOS) += xc_minios.o
+OBJS-y       += xc_evtchn_compat.o
+OBJS-y       += xc_gnttab_compat.o
+OBJS-y       += xc_devicemodel_compat.o
+
+CFLAGS   += -D__XEN_TOOLS__
+CFLAGS	+= $(PTHREAD_CFLAGS)
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+
+# Needed for posix_fadvise64() in xc_linux.c
+CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
diff --git a/tools/libs/devicemodel/Makefile b/tools/libs/devicemodel/Makefile
index a0a2d24f99..b70dd774e4 100644
--- a/tools/libs/devicemodel/Makefile
+++ b/tools/libs/devicemodel/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += common.o
-OBJS-$(CONFIG_FreeBSD) += common.o
-OBJS-$(CONFIG_SunOS)   += compat.o
-OBJS-$(CONFIG_NetBSD)  += compat.o
-OBJS-$(CONFIG_MiniOS)  += compat.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/devicemodel/Makefile.common b/tools/libs/devicemodel/Makefile.common
new file mode 100644
index 0000000000..a7bf7c35bb
--- /dev/null
+++ b/tools/libs/devicemodel/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += common.o
+OBJS-$(CONFIG_FreeBSD) += common.o
+OBJS-$(CONFIG_SunOS)   += compat.o
+OBJS-$(CONFIG_NetBSD)  += compat.o
+OBJS-$(CONFIG_MiniOS)  += compat.o
diff --git a/tools/libs/evtchn/Makefile b/tools/libs/evtchn/Makefile
index 8208ecf650..3dad3840c6 100644
--- a/tools/libs/evtchn/Makefile
+++ b/tools/libs/evtchn/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/evtchn/Makefile.common b/tools/libs/evtchn/Makefile.common
new file mode 100644
index 0000000000..20629f521a
--- /dev/null
+++ b/tools/libs/evtchn/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/foreignmemory/Makefile b/tools/libs/foreignmemory/Makefile
index 4427435932..b70dd774e4 100644
--- a/tools/libs/foreignmemory/Makefile
+++ b/tools/libs/foreignmemory/Makefile
@@ -4,11 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 4
 
-OBJS-y                 += core.o
-OBJS-$(CONFIG_Linux)   += linux.o
-OBJS-$(CONFIG_FreeBSD) += freebsd.o
-OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
-OBJS-$(CONFIG_NetBSD)  += netbsd.o
-OBJS-$(CONFIG_MiniOS)  += minios.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/foreignmemory/Makefile.common b/tools/libs/foreignmemory/Makefile.common
new file mode 100644
index 0000000000..ff3b1d4f3e
--- /dev/null
+++ b/tools/libs/foreignmemory/Makefile.common
@@ -0,0 +1,6 @@
+OBJS-y                 += core.o
+OBJS-$(CONFIG_Linux)   += linux.o
+OBJS-$(CONFIG_FreeBSD) += freebsd.o
+OBJS-$(CONFIG_SunOS)   += compat.o solaris.o
+OBJS-$(CONFIG_NetBSD)  += netbsd.o
+OBJS-$(CONFIG_MiniOS)  += minios.o
diff --git a/tools/libs/gnttab/Makefile b/tools/libs/gnttab/Makefile
index 7d7aeeadff..3dad3840c6 100644
--- a/tools/libs/gnttab/Makefile
+++ b/tools/libs/gnttab/Makefile
@@ -4,13 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR    = 1
 MINOR    = 2
 
-OBJS-GNTTAB            += gnttab_core.o
-OBJS-GNTSHR            += gntshr_core.o
-
-OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
-OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
-OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
-OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
-OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/gnttab/Makefile.common b/tools/libs/gnttab/Makefile.common
new file mode 100644
index 0000000000..759e36e1cb
--- /dev/null
+++ b/tools/libs/gnttab/Makefile.common
@@ -0,0 +1,8 @@
+OBJS-GNTTAB            += gnttab_core.o
+OBJS-GNTSHR            += gntshr_core.o
+
+OBJS-$(CONFIG_Linux)   += $(OBJS-GNTTAB) $(OBJS-GNTSHR) linux.o
+OBJS-$(CONFIG_MiniOS)  += $(OBJS-GNTTAB) gntshr_unimp.o minios.o
+OBJS-$(CONFIG_FreeBSD) += $(OBJS-GNTTAB) $(OBJS-GNTSHR) freebsd.o
+OBJS-$(CONFIG_NetBSD)  += $(OBJS-GNTTAB) $(OBJS-GNTSHR) netbsd.o
+OBJS-$(CONFIG_SunOS)   += gnttab_unimp.o gntshr_unimp.o
diff --git a/tools/libs/guest/Makefile b/tools/libs/guest/Makefile
index 4f2373101f..19d3ff2fdb 100644
--- a/tools/libs/guest/Makefile
+++ b/tools/libs/guest/Makefile
@@ -1,97 +1,11 @@
 XEN_ROOT = $(CURDIR)/../../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-ifeq ($(CONFIG_LIBXC_MINIOS),y)
-# Save/restore of a domain is currently incompatible with a stubdom environment
-override CONFIG_MIGRATE := n
-endif
-
-OBJS-y += xg_private.o
-OBJS-y += xg_domain.o
-OBJS-y += xg_suspend.o
-OBJS-y += xg_resume.o
-ifeq ($(CONFIG_MIGRATE),y)
-OBJS-y += xg_sr_common.o
-OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
-OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
-OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
-OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
-OBJS-y += xg_sr_restore.o
-OBJS-y += xg_sr_save.o
-OBJS-y += xg_offline_page.o
-else
-OBJS-y += xg_nomigrate.o
-endif
-OBJS-y       += xg_core.o
-OBJS-$(CONFIG_X86) += xg_core_x86.o
-OBJS-$(CONFIG_ARM) += xg_core_arm.o
-
-vpath %.c ../../../xen/common/libelf
-
-LIBELF_OBJS += libelf-tools.o libelf-loader.o
-LIBELF_OBJS += libelf-dominfo.o
-
-OBJS-y += $(LIBELF_OBJS)
-
-ifeq ($(CONFIG_X86),y) # Add libx86 to the build
-vpath %.c ../../../xen/lib/x86
-
-OBJS-y                 += cpuid.o msr.o policy.o
-endif
-
-# new domain builder
-OBJS-y                 += xg_dom_core.o
-OBJS-y                 += xg_dom_boot.o
-OBJS-y                 += xg_dom_elfloader.o
-OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
-OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
-OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
-OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
-OBJS-y                 += xg_dom_binloader.o
-OBJS-y                 += xg_dom_compat_linux.o
-
-OBJS-$(CONFIG_X86)     += xg_dom_x86.o
-OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
-OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
-
-ifeq ($(CONFIG_LIBXC_MINIOS),y)
-OBJS-y                 += xg_dom_decompress_unsafe.o
-OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
-OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
-OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
-OBJS-y                 += xg_dom_decompress_unsafe_xz.o
-OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
-endif
-
-CFLAGS += -D__XEN_TOOLS__
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-CFLAGS += -iquote ../../../xen/common/libelf
-
-# To be able to include xc_private.h
-CFLAGS += -iquote $(XEN_libxenctrl)
-
-# Needed for posix_fadvise64() in xc_linux.c
-CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
-
-CFLAGS	+= $(PTHREAD_CFLAGS)
-CFLAGS	+= $(CFLAGS_libxentoollog)
-CFLAGS	+= $(CFLAGS_libxenevtchn)
-CFLAGS	+= $(CFLAGS_libxendevicemodel)
-
-# libxenguest includes xc_private.h, so needs this despite not using
-# this functionality directly.
-CFLAGS += $(CFLAGS_libxencall) $(CFLAGS_libxenforeignmemory)
-
-ifeq ($(CONFIG_MiniOS),y)
-ZLIB_CFLAGS :=
-ZLIB_LIBS :=
-endif
+include Makefile.common
 
 xg_dom_bzimageloader.o xg_dom_bzimageloader.opic: CFLAGS += $(ZLIB_CFLAGS)
 
-$(LIBELF_OBJS) $(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
+$(LIBELF_OBJS:.o=.opic): CFLAGS += -Wno-pointer-sign
 
 LIBHEADER := xenguest.h
 
diff --git a/tools/libs/guest/Makefile.common b/tools/libs/guest/Makefile.common
new file mode 100644
index 0000000000..a026a2f662
--- /dev/null
+++ b/tools/libs/guest/Makefile.common
@@ -0,0 +1,84 @@
+ifeq ($(CONFIG_LIBXC_MINIOS),y)
+# Save/restore of a domain is currently incompatible with a stubdom environment
+override CONFIG_MIGRATE := n
+endif
+
+OBJS-y += xg_private.o
+OBJS-y += xg_domain.o
+OBJS-y += xg_suspend.o
+OBJS-y += xg_resume.o
+ifeq ($(CONFIG_MIGRATE),y)
+OBJS-y += xg_sr_common.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86.o
+OBJS-$(CONFIG_X86) += xg_sr_common_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_restore_x86_hvm.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_pv.o
+OBJS-$(CONFIG_X86) += xg_sr_save_x86_hvm.o
+OBJS-y += xg_sr_restore.o
+OBJS-y += xg_sr_save.o
+OBJS-y += xg_offline_page.o
+else
+OBJS-y += xg_nomigrate.o
+endif
+OBJS-y       += xg_core.o
+OBJS-$(CONFIG_X86) += xg_core_x86.o
+OBJS-$(CONFIG_ARM) += xg_core_arm.o
+
+vpath %.c ../../../xen/common/libelf
+
+LIBELF_OBJS += libelf-tools.o libelf-loader.o
+LIBELF_OBJS += libelf-dominfo.o
+
+OBJS-y += $(LIBELF_OBJS)
+
+ifeq ($(CONFIG_X86),y) # Add libx86 to the build
+vpath %.c ../../../xen/lib/x86
+
+OBJS-y                 += cpuid.o msr.o policy.o
+endif
+
+# new domain builder
+OBJS-y                 += xg_dom_core.o
+OBJS-y                 += xg_dom_boot.o
+OBJS-y                 += xg_dom_elfloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_bzimageloader.o
+OBJS-$(CONFIG_X86)     += xg_dom_decompress_lz4.o
+OBJS-$(CONFIG_X86)     += xg_dom_hvmloader.o
+OBJS-$(CONFIG_ARM)     += xg_dom_armzimageloader.o
+OBJS-y                 += xg_dom_binloader.o
+OBJS-y                 += xg_dom_compat_linux.o
+
+OBJS-$(CONFIG_X86)     += xg_dom_x86.o
+OBJS-$(CONFIG_X86)     += xg_cpuid_x86.o
+OBJS-$(CONFIG_ARM)     += xg_dom_arm.o
+
+ifeq ($(CONFIG_LIBXC_MINIOS),y)
+OBJS-y                 += xg_dom_decompress_unsafe.o
+OBJS-y                 += xg_dom_decompress_unsafe_bzip2.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzma.o
+OBJS-y                 += xg_dom_decompress_unsafe_lzo1x.o
+OBJS-y                 += xg_dom_decompress_unsafe_xz.o
+OBJS-y                 += xg_dom_decompress_unsafe_zstd.o
+endif
+
+CFLAGS += -D__XEN_TOOLS__
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -iquote ../../../xen/common/libelf
+
+# To be able to include xc_private.h
+CFLAGS += -iquote $(XEN_libxenctrl)
+
+# Needed for posix_fadvise64() in xc_linux.c
+CFLAGS-$(CONFIG_Linux) += -D_GNU_SOURCE
+
+CFLAGS	+= $(PTHREAD_CFLAGS)
+CFLAGS	+= $(CFLAGS_libxentoollog)
+CFLAGS	+= $(CFLAGS_libxenevtchn)
+CFLAGS	+= $(CFLAGS_libxendevicemodel)
+
+# libxenguest includes xc_private.h, so needs this despite not using
+# this functionality directly.
+CFLAGS += $(CFLAGS_libxencall) $(CFLAGS_libxenforeignmemory)
+
+$(LIBELF_OBJS): CFLAGS += -Wno-pointer-sign
diff --git a/tools/libs/toolcore/Makefile b/tools/libs/toolcore/Makefile
index ce417ea648..0d92b68b3b 100644
--- a/tools/libs/toolcore/Makefile
+++ b/tools/libs/toolcore/Makefile
@@ -6,7 +6,7 @@ MINOR	= 0
 
 LIBHEADER := xentoolcore.h
 
-OBJS-y	+= handlereg.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
 
diff --git a/tools/libs/toolcore/Makefile.common b/tools/libs/toolcore/Makefile.common
new file mode 100644
index 0000000000..9ade6c12bf
--- /dev/null
+++ b/tools/libs/toolcore/Makefile.common
@@ -0,0 +1 @@
+OBJS-y	+= handlereg.o
diff --git a/tools/libs/toollog/Makefile b/tools/libs/toollog/Makefile
index c09aa02ba5..2361b8cbf1 100644
--- a/tools/libs/toollog/Makefile
+++ b/tools/libs/toollog/Makefile
@@ -4,7 +4,6 @@ include $(XEN_ROOT)/tools/Rules.mk
 MAJOR	= 1
 MINOR	= 0
 
-OBJS-y	+= xtl_core.o
-OBJS-y	+= xtl_logger_stdio.o
+include Makefile.common
 
 include $(XEN_ROOT)/tools/libs/libs.mk
diff --git a/tools/libs/toollog/Makefile.common b/tools/libs/toollog/Makefile.common
new file mode 100644
index 0000000000..c053ac6a73
--- /dev/null
+++ b/tools/libs/toollog/Makefile.common
@@ -0,0 +1,2 @@
+OBJS-y	+= xtl_core.o
+OBJS-y	+= xtl_logger_stdio.o
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenstore: introduce Makefile.common to be used by stubdom
Message-Id: <E1o2QMI-0006eC-AF@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:46:54 +0000

commit ce4dfcb6ffc2bef1e53dba119e4fcba3cc4c6eea
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:18 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/xenstore: introduce Makefile.common to be used by stubdom
    
    Also change stubdom to depends on Makefile.common.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 stubdom/Makefile               |  4 ++--
 tools/xenstore/Makefile        | 33 +++------------------------------
 tools/xenstore/Makefile.common | 33 +++++++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+), 32 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index fbc63a5063..6b804824ba 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -371,10 +371,10 @@ endef
 
 $(foreach lib,$(STUB_LIBS),$(eval $(call BUILD_lib,$(lib))))
 
-xenstore/stamp: $(XEN_ROOT)/tools/xenstore/Makefile
+xenstore/stamp: $(XEN_ROOT)/tools/xenstore/Makefile.common
 	$(do_links)
 
-xenstorepvh/stamp: $(XEN_ROOT)/tools/xenstore/Makefile
+xenstorepvh/stamp: $(XEN_ROOT)/tools/xenstore/Makefile.common
 	$(do_links)
 
 LINK_DIRS := xenstore xenstorepvh $(foreach dir,$(STUB_LIBS),libs-$(XEN_TARGET_ARCH)/$(dir))
diff --git a/tools/xenstore/Makefile b/tools/xenstore/Makefile
index 830052c65f..1b66190cc5 100644
--- a/tools/xenstore/Makefile
+++ b/tools/xenstore/Makefile
@@ -1,31 +1,7 @@
 XEN_ROOT=$(CURDIR)/../..
 include $(XEN_ROOT)/tools/Rules.mk
 
-CFLAGS += -Werror
-# Include configure output (config.h)
-CFLAGS += -include $(XEN_ROOT)/tools/config.h
-CFLAGS += -I./include
-CFLAGS += $(CFLAGS_libxenevtchn)
-CFLAGS += $(CFLAGS_libxenctrl)
-CFLAGS += $(CFLAGS_libxenguest)
-CFLAGS += $(CFLAGS_libxentoolcore)
-CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
-CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
-
-ifdef CONFIG_STUBDOM
-CFLAGS += -DNO_SOCKETS=1
-endif
-
-XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
-XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
-XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
-
-XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
-XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
-
-$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
+include Makefile.common
 
 xenstored: LDLIBS += $(LDLIBS_libxenevtchn)
 xenstored: LDLIBS += $(LDLIBS_libxengnttab)
@@ -65,9 +41,6 @@ clients: xenstore $(CLIENTS) xenstore-control
 xenstored: $(XENSTORED_OBJS-y)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@ $(APPEND_LDFLAGS)
 
-xenstored.a: $(XENSTORED_OBJS-y)
-	$(AR) cr $@ $^
-
 $(CLIENTS): xenstore
 	ln -f xenstore $@
 
@@ -81,8 +54,8 @@ xs_tdb_dump: xs_tdb_dump.o utils.o tdb.o talloc.o
 	$(CC) $(LDFLAGS) $^ -o $@ $(APPEND_LDFLAGS)
 
 .PHONY: clean
-clean:
-	$(RM) *.a *.o $(TARGETS) $(DEPS_RM)
+clean::
+	$(RM) $(TARGETS) $(DEPS_RM)
 
 .PHONY: distclean
 distclean: clean
diff --git a/tools/xenstore/Makefile.common b/tools/xenstore/Makefile.common
new file mode 100644
index 0000000000..21b78b0538
--- /dev/null
+++ b/tools/xenstore/Makefile.common
@@ -0,0 +1,33 @@
+# Makefile shared with stubdom
+
+XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o
+XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o
+XENSTORED_OBJS-y += xs_lib.o talloc.o utils.o tdb.o hashtable.o
+
+XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_FreeBSD) += xenstored_posix.o
+XENSTORED_OBJS-$(CONFIG_MiniOS) += xenstored_minios.o
+
+CFLAGS += -Werror
+# Include configure output (config.h)
+CFLAGS += -include $(XEN_ROOT)/tools/config.h
+CFLAGS += -I./include
+CFLAGS += $(CFLAGS_libxenevtchn)
+CFLAGS += $(CFLAGS_libxenctrl)
+CFLAGS += $(CFLAGS_libxenguest)
+CFLAGS += $(CFLAGS_libxentoolcore)
+CFLAGS += -DXEN_LIB_STORED="\"$(XEN_LIB_STORED)\""
+CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\""
+
+ifdef CONFIG_STUBDOM
+CFLAGS += -DNO_SOCKETS=1
+endif
+
+$(XENSTORED_OBJS-y): CFLAGS += $(CFLAGS_libxengnttab)
+
+xenstored.a: $(XENSTORED_OBJS-y)
+	$(AR) cr $@ $^
+
+clean::
+	$(RM) *.a *.o
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] stubdom: build xenstore*-stubdom using new Makefile.common
Message-Id: <E1o2QMS-0006eu-D0@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:04 +0000

commit b5965be94c6e692336c4181b5d2a02a0df85bfc8
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:19 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: build xenstore*-stubdom using new Makefile.common
    
    Makefile.common have everything needed by stubdom, when used with
    xenlibs.mk, so we don't need "Makefile" anymore.
    
    Also, remove DESTDIR for "xenstore" related targets, "xenlibs.mk"
    doesn't use DESTDIR so its value doesn't matter.
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 6b804824ba..1fa075b9ad 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -346,8 +346,7 @@ define do_links
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
   ln -sf $(dir $<)*.[ch] .; \
-  [ -e $(dir $<)Makefile.common ] && ln -sf $(dir $<)Makefile.common . ||:; \
-  ln -sf $(dir $<)Makefile .
+  ln -sf $(dir $<)Makefile.common .
   touch $@
 endef
 
@@ -356,13 +355,11 @@ define BUILD_lib
  libxen$(1): libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: $$(LIBDEPS_$(1)) $$(LIBDEP_$(1))
  libs-$$(XEN_TARGET_ARCH)/$(1)/libxen$(1).a: mk-headers-$$(XEN_TARGET_ARCH) $$(NEWLIB_STAMPFILE) .phony
-	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y $$(if $$(wildcard $$(@D)/Makefile.common),-f $(CURDIR)/xenlibs.mk) -C $$(@D) $$(@F)
+	CPPFLAGS="$$(TARGET_CPPFLAGS)" CFLAGS="$$(TARGET_CFLAGS)" $$(MAKE) CONFIG_LIBXC_MINIOS=y -f $(CURDIR)/xenlibs.mk -C $$(@D) $$(@F)
 
  clean-libxen$(1):
 	if [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile.common ]; then \
 	    $$(MAKE) -f $(CURDIR)/xenlibs.mk -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
-	elif [ -e libs-$$(XEN_TARGET_ARCH)/$(1)/Makefile ]; then \
-	    $$(MAKE) -C libs-$$(XEN_TARGET_ARCH)/$(1) clean; \
 	fi
 
  libs-$$(XEN_TARGET_ARCH)/$(1)/stamp: $$(XEN_ROOT)/tools/libs/$(1)/Makefile.common
@@ -494,7 +491,7 @@ xenstore-minios-config.mk: $(CURDIR)/xenstore-minios.cfg
 
 .PHONY: xenstore
 xenstore: $(CROSS_ROOT) xenstore-minios-config.mk
-	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstore-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) DESTDIR= -C $@ xenstored.a CONFIG_STUBDOM=y
+	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstore-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) -f $(CURDIR)/xenlibs.mk -C $@ xenstored.a CONFIG_STUBDOM=y
 
 #############
 # xenstorepvh
@@ -505,7 +502,7 @@ xenstorepvh-minios-config.mk: $(CURDIR)/xenstorepvh-minios.cfg
 
 .PHONY: xenstorepvh
 xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config.mk
-	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstorepvh-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) DESTDIR= -C $@ xenstored.a CONFIG_STUBDOM=y
+	CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat xenstorepvh-minios-config.mk)" CFLAGS="$(TARGET_CFLAGS)" $(MAKE) -f $(CURDIR)/xenlibs.mk -C $@ xenstored.a CONFIG_STUBDOM=y
 
 ########
 # minios
@@ -657,8 +654,8 @@ clean:
 	rm -f *-minios-config.mk
 	rm -fr pkg-config
 	-[ ! -d ioemu ] || $(MAKE) DESTDIR= -C ioemu clean
-	-[ ! -d xenstore ] || $(MAKE) DESTDIR= -C xenstore clean
-	-[ ! -d xenstorepvh ] || $(MAKE) DESTDIR= -C xenstorepvh clean
+	-[ ! -d xenstore ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean
+	-[ ! -d xenstorepvh ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh clean
 
 # clean the cross-compilation result
 .PHONY: crossclean
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] stubdom: xenlibs linkfarm, ignore non-regular files
Message-Id: <E1o2QMc-0006fO-Fq@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:14 +0000

commit 41156021e27a926feec267ecba206c78bca33417
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:20 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    stubdom: xenlibs linkfarm, ignore non-regular files
    
    When we will convert tools/ build system, their will be a need to
    replace some use of "vpath". This will done making symbolic links.
    Those symlinks are not wanted by stubdom build system when making a
    linkfarm for the Xen libraries. To avoid them, we will use `find`
    instead of plain shell globbing.
    
    For example, there will be a link to "xen/lib/x86/cpuid.o" in
    "tools/libs/guest/".
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 stubdom/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/stubdom/Makefile b/stubdom/Makefile
index 1fa075b9ad..b312f710cd 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -345,7 +345,7 @@ define do_links
   mkdir -p $(dir $@)include
   cd $(dir $@); \
   ln -sf $(dir $<)include/*.h include/; \
-  ln -sf $(dir $<)*.[ch] .; \
+  find $(dir $<) -maxdepth 1 -type f -name '*.[ch]' -exec ln -sf {} . \; ; \
   ln -sf $(dir $<)Makefile.common .
   touch $@
 endef
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/ocaml: fix build dependency target
Message-Id: <E1o2QMm-0006fw-Io@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:24 +0000

commit 0c5304d14a1c0b8016b942675041da36227713f0
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Fri Feb 25 15:13:21 2022 +0000
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 16 16:58:50 2022 +0100

    tools/ocaml: fix build dependency target
    
    They are two competiting spelling for the variable holding the path to
    "tools/ocaml", $(TOPLEVEL) and $(OCAML_TOPLEVEL). The "Makefile.rules"
    which is included in all ocaml Makefiles have one rule which make use
    of that variable which is then sometime unset. When building
    "ocaml/xenstored", make isn't capable of generating ".ocamldep.make"
    because $(TOPLEVEL) isn't defined in this case.
    
    This can fail with an error like this when paths.ml have been
    regenerated:
        Error: Files define.cmx and paths.cmx
           make inconsistent assumptions over interface Paths
    
    This patch fix ".ocamldep.make" rule by always spelling the variable
    $(OCAML_TOPLEVEL).
    
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Acked-by: Christian Lindig <christian.lindig@citrix.com>
---
 tools/ocaml/Makefile.rules           | 2 +-
 tools/ocaml/libs/eventchn/Makefile   | 8 ++++----
 tools/ocaml/libs/mmap/Makefile       | 8 ++++----
 tools/ocaml/libs/xb/Makefile         | 8 ++++----
 tools/ocaml/libs/xc/Makefile         | 8 ++++----
 tools/ocaml/libs/xentoollog/Makefile | 8 ++++----
 tools/ocaml/libs/xl/Makefile         | 8 ++++----
 tools/ocaml/libs/xs/Makefile         | 8 ++++----
 8 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/tools/ocaml/Makefile.rules b/tools/ocaml/Makefile.rules
index abfbc64ce0..7e4db457a1 100644
--- a/tools/ocaml/Makefile.rules
+++ b/tools/ocaml/Makefile.rules
@@ -44,7 +44,7 @@ META: META.in
 
 ALL_OCAML_OBJ_SOURCES=$(addsuffix .ml, $(ALL_OCAML_OBJS))
 
-.ocamldep.make: $(ALL_OCAML_OBJ_SOURCES) Makefile $(TOPLEVEL)/Makefile.rules
+.ocamldep.make: $(ALL_OCAML_OBJ_SOURCES) Makefile $(OCAML_TOPLEVEL)/Makefile.rules
 	$(call quiet-command, $(OCAMLDEP) $(ALL_OCAML_OBJ_SOURCES) *.mli $o,MLDEP,)
 
 clean: $(CLEAN_HOOKS)
diff --git a/tools/ocaml/libs/eventchn/Makefile b/tools/ocaml/libs/eventchn/Makefile
index 154efd4a8e..7362a28d9e 100644
--- a/tools/ocaml/libs/eventchn/Makefile
+++ b/tools/ocaml/libs/eventchn/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += $(CFLAGS_libxenevtchn) $(CFLAGS_xeninclude)
 
@@ -31,5 +31,5 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xeneventchn
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
diff --git a/tools/ocaml/libs/mmap/Makefile b/tools/ocaml/libs/mmap/Makefile
index df45819df5..a621537135 100644
--- a/tools/ocaml/libs/mmap/Makefile
+++ b/tools/ocaml/libs/mmap/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 OBJS = xenmmap
 INTF = $(foreach obj, $(OBJS),$(obj).cmi)
@@ -26,5 +26,5 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenmmap
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
diff --git a/tools/ocaml/libs/xb/Makefile b/tools/ocaml/libs/xb/Makefile
index be4499147e..ff4428af6d 100644
--- a/tools/ocaml/libs/xb/Makefile
+++ b/tools/ocaml/libs/xb/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += -I../mmap
 CFLAGS += $(CFLAGS_libxenctrl) # For xen_mb()
@@ -49,4 +49,4 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenbus
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xc/Makefile b/tools/ocaml/libs/xc/Makefile
index b6da4fdbaf..67acc46bee 100644
--- a/tools/ocaml/libs/xc/Makefile
+++ b/tools/ocaml/libs/xc/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 CFLAGS += -I../mmap $(CFLAGS_libxenctrl) $(CFLAGS_libxenguest)
 CFLAGS += $(APPEND_CFLAGS)
@@ -38,4 +38,4 @@ xenctrl_abi_check.h: abi-check xenctrl_stubs.c xenctrl.ml
 
 GENERATED_FILES += xenctrl_abi_check.h
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xentoollog/Makefile b/tools/ocaml/libs/xentoollog/Makefile
index 593f9e9e9d..9ede2fd124 100644
--- a/tools/ocaml/libs/xentoollog/Makefile
+++ b/tools/ocaml/libs/xentoollog/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 # allow mixed declarations and code
 CFLAGS += -Wno-declaration-after-statement
@@ -62,4 +62,4 @@ install: $(LIBS) META
 uninstall:
 	ocamlfind remove -destdir $(OCAMLDESTDIR) xentoollog
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xl/Makefile b/tools/ocaml/libs/xl/Makefile
index cbe1569cc5..7c1c4edced 100644
--- a/tools/ocaml/libs/xl/Makefile
+++ b/tools/ocaml/libs/xl/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 # ignore unused generated functions and allow mixed declarations and code
 CFLAGS += -Wno-unused -Wno-declaration-after-statement
@@ -68,4 +68,4 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenlight
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
diff --git a/tools/ocaml/libs/xs/Makefile b/tools/ocaml/libs/xs/Makefile
index 572efb76c4..e934bbb550 100644
--- a/tools/ocaml/libs/xs/Makefile
+++ b/tools/ocaml/libs/xs/Makefile
@@ -1,6 +1,6 @@
-TOPLEVEL=$(CURDIR)/../..
-XEN_ROOT=$(TOPLEVEL)/../..
-include $(TOPLEVEL)/common.make
+OCAML_TOPLEVEL=$(CURDIR)/../..
+XEN_ROOT=$(OCAML_TOPLEVEL)/../..
+include $(OCAML_TOPLEVEL)/common.make
 
 OCAMLINCLUDE += -I ../xb/
 OCAMLOPTFLAGS += -for-pack Xenstore
@@ -43,7 +43,7 @@ install: $(LIBS) META
 uninstall:
 	$(OCAMLFIND) remove -destdir $(OCAMLDESTDIR) xenstore
 
-include $(TOPLEVEL)/Makefile.rules
+include $(OCAML_TOPLEVEL)/Makefile.rules
 
 genpath-target = $(call buildmakevars2module,paths.ml)
 $(eval $(genpath-target))
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: reuse x86 EFI stub functions for Arm
Message-Id: <E1o2QMw-0006gL-Mt@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:34 +0000

commit 7f96859b0d00dd7f6e6fefa66706268cc2761a3d
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:09 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: reuse x86 EFI stub functions for Arm
    
    x86 is using compiler feature testing to decide EFI build
    enable or not. When EFI build is disabled, x86 will use an
    efi/stub.c file to replace efi/runtime.c for build objects.
    Following this idea, we introduce a stub file for Arm, but
    use CONFIG_ARM_EFI to decide EFI build enable or not.
    
    And the most functions in x86 EFI stub.c can be reused for
    other architectures, like Arm. So we move them to common
    and keep the x86 specific function in x86/efi/stub.c.
    
    To avoid the symbol link conflict error when linking common
    stub files to x86/efi. We add a regular file check in efi
    stub files' link script. Depends on this check we can bypass
    the link behaviors for existed stub files in x86/efi.
    
    As there is no Arm specific EFI stub function for Arm in
    current stage, Arm still can use the existed symbol link
    method for EFI stub files.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/arm/Kconfig         |  4 ++++
 xen/arch/arm/Makefile        |  2 +-
 xen/arch/arm/efi/Makefile    |  8 ++++++++
 xen/arch/x86/efi/stub.c      | 32 +-------------------------------
 xen/common/efi/efi-common.mk |  3 ++-
 xen/common/efi/stub.c        | 32 ++++++++++++++++++++++++++++++++
 6 files changed, 48 insertions(+), 33 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 5900aa2efe..be9eff0141 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -6,6 +6,7 @@ config ARM_64
 	def_bool y
 	depends on !ARM_32
 	select 64BIT
+	select ARM_EFI
 	select HAS_FAST_MULTIPLY
 
 config ARM
@@ -34,6 +35,9 @@ config ACPI
 	  Advanced Configuration and Power Interface (ACPI) support for Xen is
 	  an alternative to device tree on ARM64.
 
+config ARM_EFI
+	bool
+
 config GICV3
 	bool "GICv3 driver"
 	depends on ARM_64 && !NEW_VGIC
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 1d862351d1..bb7a6151c1 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -1,6 +1,5 @@
 obj-$(CONFIG_ARM_32) += arm32/
 obj-$(CONFIG_ARM_64) += arm64/
-obj-$(CONFIG_ARM_64) += efi/
 obj-$(CONFIG_ACPI) += acpi/
 obj-$(CONFIG_HAS_PCI) += pci/
 ifneq ($(CONFIG_NO_PLAT),y)
@@ -20,6 +19,7 @@ obj-y += domain.o
 obj-y += domain_build.init.o
 obj-y += domctl.o
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+obj-y += efi/
 obj-y += gic.o
 obj-y += gic-v2.o
 obj-$(CONFIG_GICV3) += gic-v3.o
diff --git a/xen/arch/arm/efi/Makefile b/xen/arch/arm/efi/Makefile
index 4313c39066..dffe72e589 100644
--- a/xen/arch/arm/efi/Makefile
+++ b/xen/arch/arm/efi/Makefile
@@ -1,4 +1,12 @@
 include $(srctree)/common/efi/efi-common.mk
 
+ifeq ($(CONFIG_ARM_EFI),y)
 obj-y += $(EFIOBJ-y)
 obj-$(CONFIG_ACPI) +=  efi-dom0.init.o
+else
+# Add stub.o to EFIOBJ-y to re-use the clean-files in
+# efi-common.mk. Otherwise the link of stub.c in arm/efi
+# will not be cleaned in "make clean".
+EFIOBJ-y += stub.o
+obj-y += stub.o
+endif
diff --git a/xen/arch/x86/efi/stub.c b/xen/arch/x86/efi/stub.c
index 9984932626..f2365bc041 100644
--- a/xen/arch/x86/efi/stub.c
+++ b/xen/arch/x86/efi/stub.c
@@ -1,7 +1,5 @@
 #include <xen/efi.h>
-#include <xen/errno.h>
 #include <xen/init.h>
-#include <xen/lib.h>
 #include <asm/asm_defns.h>
 #include <asm/efibind.h>
 #include <asm/page.h>
@@ -10,6 +8,7 @@
 #include <efi/eficon.h>
 #include <efi/efidevp.h>
 #include <efi/efiapi.h>
+#include "../../../common/efi/stub.c"
 
 /*
  * Here we are in EFI stub. EFI calls are not supported due to lack
@@ -45,11 +44,6 @@ void __init noreturn efi_multiboot2(EFI_HANDLE ImageHandle,
     unreachable();
 }
 
-bool efi_enabled(unsigned int feature)
-{
-    return false;
-}
-
 void __init efi_init_memory(void) { }
 
 bool efi_boot_mem_unused(unsigned long *start, unsigned long *end)
@@ -62,32 +56,8 @@ bool efi_boot_mem_unused(unsigned long *start, unsigned long *end)
 
 void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t l4e) { }
 
-bool efi_rs_using_pgtables(void)
-{
-    return false;
-}
-
-unsigned long efi_get_time(void)
-{
-    BUG();
-    return 0;
-}
-
-void efi_halt_system(void) { }
-void efi_reset_system(bool warm) { }
-
-int efi_get_info(uint32_t idx, union xenpf_efi_info *info)
-{
-    return -ENOSYS;
-}
-
 int efi_compat_get_info(uint32_t idx, union compat_pf_efi_info *)
     __attribute__((__alias__("efi_get_info")));
 
-int efi_runtime_call(struct xenpf_efi_runtime_call *op)
-{
-    return -ENOSYS;
-}
-
 int efi_compat_runtime_call(struct compat_pf_efi_runtime_call *)
     __attribute__((__alias__("efi_runtime_call")));
diff --git a/xen/common/efi/efi-common.mk b/xen/common/efi/efi-common.mk
index 4298ceaee7..ec2c34f198 100644
--- a/xen/common/efi/efi-common.mk
+++ b/xen/common/efi/efi-common.mk
@@ -9,7 +9,8 @@ CFLAGS-y += -iquote $(srcdir)
 # e.g.: It transforms "dir/foo/bar" into successively
 #       "dir foo bar", ".. .. ..", "../../.."
 $(obj)/%.c: $(srctree)/common/efi/%.c FORCE
-	$(Q)ln -nfs $(subst $(space),/,$(patsubst %,..,$(subst /, ,$(obj))))/source/common/efi/$(<F) $@
+	$(Q)test -f $@ || \
+	    ln -nfs $(subst $(space),/,$(patsubst %,..,$(subst /, ,$(obj))))/source/common/efi/$(<F) $@
 
 clean-files += $(patsubst %.o, %.c, $(EFIOBJ-y:.init.o=.o) $(EFIOBJ-))
 
diff --git a/xen/common/efi/stub.c b/xen/common/efi/stub.c
new file mode 100644
index 0000000000..15694632c2
--- /dev/null
+++ b/xen/common/efi/stub.c
@@ -0,0 +1,32 @@
+#include <xen/efi.h>
+#include <xen/errno.h>
+#include <xen/lib.h>
+
+bool efi_enabled(unsigned int feature)
+{
+    return false;
+}
+
+bool efi_rs_using_pgtables(void)
+{
+    return false;
+}
+
+unsigned long efi_get_time(void)
+{
+    BUG();
+    return 0;
+}
+
+void efi_halt_system(void) { }
+void efi_reset_system(bool warm) { }
+
+int efi_get_info(uint32_t idx, union xenpf_efi_info *info)
+{
+    return -ENOSYS;
+}
+
+int efi_runtime_call(struct xenpf_efi_runtime_call *op)
+{
+    return -ENOSYS;
+}
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Keep memory nodes in device tree when Xen boots from EFI
Message-Id: <E1o2QN6-0006h6-Po@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:44 +0000

commit 53701ecb8f8b124b62ff50925032468c2df3745e
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:10 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/arm: Keep memory nodes in device tree when Xen boots from EFI
    
    In current code, when Xen is booting from EFI, it will delete
    all memory nodes in device tree. This would work well in current
    stage, because Xen can get memory map from EFI system table.
    However, EFI system table cannot completely replace memory nodes
    of device tree. EFI system table doesn't contain memory NUMA
    information. Xen depends on ACPI SRAT or device tree memory nodes
    to parse memory blocks' NUMA mapping. So in EFI + DTB boot, Xen
    doesn't have any method to get numa-node-id for memory blocks any
    more. This makes device tree based NUMA support become impossible
    for Xen in EFI + DTB boot.
    
    So in this patch, we will keep memory nodes in device tree for
    NUMA code to parse memory numa-node-id later.
    
    As a side effect, if we still parse boot memory information in
    early_scan_node, bootmem.info will calculate memory ranges in
    memory nodes twice. So we have to prevent early_scan_node to
    parse memory nodes in EFI boot.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/bootfdt.c      |  8 +++++++-
 xen/arch/arm/efi/efi-boot.h | 25 -------------------------
 2 files changed, 7 insertions(+), 26 deletions(-)

diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c
index 29671c8df0..ec81a45de9 100644
--- a/xen/arch/arm/bootfdt.c
+++ b/xen/arch/arm/bootfdt.c
@@ -11,6 +11,7 @@
 #include <xen/lib.h>
 #include <xen/kernel.h>
 #include <xen/init.h>
+#include <xen/efi.h>
 #include <xen/device_tree.h>
 #include <xen/libfdt/libfdt.h>
 #include <xen/sort.h>
@@ -367,7 +368,12 @@ static int __init early_scan_node(const void *fdt,
 {
     int rc = 0;
 
-    if ( device_tree_node_matches(fdt, node, "memory") )
+    /*
+     * If Xen has been booted via UEFI, the memory banks are
+     * populated. So we should skip the parsing.
+     */
+    if ( !efi_enabled(EFI_BOOT) &&
+         device_tree_node_matches(fdt, node, "memory") )
         rc = process_memory_node(fdt, node, name, depth,
                                  address_cells, size_cells, &bootinfo.mem);
     else if ( depth == 1 && !dt_node_cmp(name, "reserved-memory") )
diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h
index e452b687d8..59d93c24a1 100644
--- a/xen/arch/arm/efi/efi-boot.h
+++ b/xen/arch/arm/efi/efi-boot.h
@@ -231,33 +231,8 @@ EFI_STATUS __init fdt_add_uefi_nodes(EFI_SYSTEM_TABLE *sys_table,
     int status;
     u32 fdt_val32;
     u64 fdt_val64;
-    int prev;
     int num_rsv;
 
-    /*
-     * Delete any memory nodes present.  The EFI memory map is the only
-     * memory description provided to Xen.
-     */
-    prev = 0;
-    for (;;)
-    {
-        const char *type;
-        int len;
-
-        node = fdt_next_node(fdt, prev, NULL);
-        if ( node < 0 )
-            break;
-
-        type = fdt_getprop(fdt, node, "device_type", &len);
-        if ( type && strncmp(type, "memory", len) == 0 )
-        {
-            fdt_del_node(fdt, node);
-            continue;
-        }
-
-        prev = node;
-    }
-
    /*
     * Delete all memory reserve map entries. When booting via UEFI,
     * kernel will use the UEFI memory map to find reserved regions.
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: introduce an arch helper for default dma zone status
Message-Id: <E1o2QNG-0006ht-Si@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:47:54 +0000

commit 15e64b8a099eb9d37485fdc2046ac769cc6a1628
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:11 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: introduce an arch helper for default dma zone status
    
    In current code, when Xen is running in a multiple nodes
    NUMA system, it will set dma_bitsize in end_boot_allocator
    to reserve some low address memory as DMA zone.
    
    There are some x86 implications in the implementation.
    Because on x86, memory starts from 0. On a multiple-nodes
    NUMA system, if a single node contains the majority or all
    of the DMA memory, x86 prefers to give out memory from
    non-local allocations rather than exhausting the DMA memory
    ranges. Hence x86 uses dma_bitsize to set aside some largely
    arbitrary amount of memory for DMA zone. The allocations
    from DMA zone would happen only after exhausting all other
    nodes' memory.
    
    But the implications are not shared across all architectures.
    For example, Arm cannot guarantee the availability of memory
    below a certain boundary for DMA limited-capability devices
    either. But currently, Arm doesn't need a reserved DMA zone
    in Xen. Because there is no DMA device in Xen. And for guests,
    Xen Arm only allows Dom0 to have DMA operations without IOMMU.
    Xen will try to allocate memory under 4GB or memory range that
    is limited by dma_bitsize for Dom0 in boot time. For DomU, even
    Xen can passthrough devices to DomU without IOMMU, but Xen Arm
    doesn't guarantee their DMA operations. So, Xen Arm doesn't
    need a reserved DMA zone to provide DMA memory for guests.
    
    In this patch, we introduce an arch_want_default_dmazone helper
    for different architectures to determine whether they need to
    set dma_bitsize for DMA zone reservation or not.
    
    At the same time, when x86 Xen is built with CONFIG_PV=n could
    probably leverage this new helper to actually not trigger DMA
    zone reservation.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/arm/include/asm/numa.h | 1 +
 xen/arch/x86/include/asm/numa.h | 1 +
 xen/common/page_alloc.c         | 2 +-
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h
index 31a6de4e23..e4c4d89192 100644
--- a/xen/arch/arm/include/asm/numa.h
+++ b/xen/arch/arm/include/asm/numa.h
@@ -24,6 +24,7 @@ extern mfn_t first_valid_mfn;
 #define node_spanned_pages(nid) (max_page - mfn_x(first_valid_mfn))
 #define node_start_pfn(nid) (mfn_x(first_valid_mfn))
 #define __node_distance(a, b) (20)
+#define arch_want_default_dmazone() (false)
 
 #endif /* __ARCH_ARM_NUMA_H */
 /*
diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h
index bada2c0bb9..5d8385f2e1 100644
--- a/xen/arch/x86/include/asm/numa.h
+++ b/xen/arch/x86/include/asm/numa.h
@@ -74,6 +74,7 @@ static inline __attribute__((pure)) nodeid_t phys_to_nid(paddr_t addr)
 #define node_spanned_pages(nid)	(NODE_DATA(nid)->node_spanned_pages)
 #define node_end_pfn(nid)       (NODE_DATA(nid)->node_start_pfn + \
 				 NODE_DATA(nid)->node_spanned_pages)
+#define arch_want_default_dmazone() (num_online_nodes() > 1)
 
 extern int valid_numa_range(u64 start, u64 end, nodeid_t node);
 
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index ea59cd1a4a..000ae6b972 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -1889,7 +1889,7 @@ void __init end_boot_allocator(void)
     }
     nr_bootmem_regions = 0;
 
-    if ( !dma_bitsize && (num_online_nodes() > 1) )
+    if ( !dma_bitsize && arch_want_default_dmazone() )
         dma_bitsize = arch_get_dma_bitsize();
 
     printk("Domain heap initialised");
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: decouple NUMA from ACPI in Kconfig
Message-Id: <E1o2QNQ-0006iv-Vl@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:48:04 +0000

commit 1f0a8e28ba00890199e23de3d9d77a6c9593d363
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:12 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen: decouple NUMA from ACPI in Kconfig
    
    In current Xen code only implements x86 ACPI-based NUMA support.
    So in Xen Kconfig system, NUMA equals to ACPI_NUMA. x86 selects
    NUMA by default, and CONFIG_ACPI_NUMA is hardcode in config.h.
    
    In a follow-up patch, we will introduce support for NUMA using
    the device tree. That means we will have two NUMA implementations,
    so in this patch we decouple NUMA from ACPI based NUMA in Kconfig.
    Make NUMA as a common feature, that device tree based NUMA also
    can select it.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/Kconfig              | 2 +-
 xen/arch/x86/include/asm/config.h | 1 -
 xen/common/Kconfig                | 3 +++
 xen/drivers/acpi/Kconfig          | 3 ++-
 xen/drivers/acpi/Makefile         | 2 +-
 5 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index 06d6fbc864..1e31edc99f 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -6,6 +6,7 @@ config X86
 	def_bool y
 	select ACPI
 	select ACPI_LEGACY_TABLES_LOOKUP
+	select ACPI_NUMA
 	select ALTERNATIVE_CALL
 	select ARCH_SUPPORTS_INT128
 	select CORE_PARKING
@@ -26,7 +27,6 @@ config X86
 	select HAS_UBSAN
 	select HAS_VPCI if HVM
 	select NEEDS_LIBELF
-	select NUMA
 
 config ARCH_DEFCONFIG
 	string
diff --git a/xen/arch/x86/include/asm/config.h b/xen/arch/x86/include/asm/config.h
index de20642524..07bcd15831 100644
--- a/xen/arch/x86/include/asm/config.h
+++ b/xen/arch/x86/include/asm/config.h
@@ -31,7 +31,6 @@
 /* Intel P4 currently has largest cache line (L2 line size is 128 bytes). */
 #define CONFIG_X86_L1_CACHE_SHIFT 7
 
-#define CONFIG_ACPI_NUMA 1
 #define CONFIG_ACPI_SRAT 1
 #define CONFIG_ACPI_CSTATE 1
 
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 5b6b2406c0..41a67891bc 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -73,6 +73,9 @@ config MEM_ACCESS
 config NEEDS_LIBELF
 	bool
 
+config NUMA
+	bool
+
 config STATIC_MEMORY
 	bool "Static Allocation Support (UNSUPPORTED)" if UNSUPPORTED
 	depends on ARM
diff --git a/xen/drivers/acpi/Kconfig b/xen/drivers/acpi/Kconfig
index b64d3731fb..e3f3d8f4b1 100644
--- a/xen/drivers/acpi/Kconfig
+++ b/xen/drivers/acpi/Kconfig
@@ -5,5 +5,6 @@ config ACPI
 config ACPI_LEGACY_TABLES_LOOKUP
 	bool
 
-config NUMA
+config ACPI_NUMA
 	bool
+	select NUMA
diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
index 4f8e97228e..2fc5230253 100644
--- a/xen/drivers/acpi/Makefile
+++ b/xen/drivers/acpi/Makefile
@@ -3,7 +3,7 @@ obj-y += utilities/
 obj-$(CONFIG_X86) += apei/
 
 obj-bin-y += tables.init.o
-obj-$(CONFIG_NUMA) += numa.o
+obj-$(CONFIG_ACPI_NUMA) += numa.o
 obj-y += osl.o
 obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: use !CONFIG_NUMA to keep fake NUMA API
Message-Id: <E1o2QNb-0006jp-2K@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:48:15 +0000

commit e8f1c8118f7693be20eab2abcb86d16d12729ba0
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:13 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/arm: use !CONFIG_NUMA to keep fake NUMA API
    
    We have introduced CONFIG_NUMA in a previous patch. And this
    option is enabled only on x86 at the current stage. In a follow
    up patch, we will enable this option for Arm. But we still
    want users to be able to disable the CONFIG_NUMA via Kconfig. In
    this case, keep the fake NUMA API, will make Arm code still
    able to work with NUMA aware memory allocation and scheduler.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/include/asm/numa.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h
index e4c4d89192..268a9db055 100644
--- a/xen/arch/arm/include/asm/numa.h
+++ b/xen/arch/arm/include/asm/numa.h
@@ -5,6 +5,8 @@
 
 typedef u8 nodeid_t;
 
+#ifndef CONFIG_NUMA
+
 /* Fake one node for now. See also node_online_map. */
 #define cpu_to_node(cpu) 0
 #define node_to_cpumask(node)   (cpu_online_map)
@@ -24,6 +26,9 @@ extern mfn_t first_valid_mfn;
 #define node_spanned_pages(nid) (max_page - mfn_x(first_valid_mfn))
 #define node_start_pfn(nid) (mfn_x(first_valid_mfn))
 #define __node_distance(a, b) (20)
+
+#endif
+
 #define arch_want_default_dmazone() (false)
 
 #endif /* __ARCH_ARM_NUMA_H */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/x86: use paddr_t for addresses in NUMA node structure
Message-Id: <E1o2QNl-0006kd-59@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:48:25 +0000

commit 94a03b2254a81f00cbb8f9977cdd9e3cce32fc08
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:14 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: use paddr_t for addresses in NUMA node structure
    
    NUMA node structure "struct node" is using u64 as node memory
    range. In order to make other architectures can reuse this
    NUMA node relative code, we replace the u64 to paddr_t. And
    use pfn_to_paddr and paddr_to_pfn to replace explicit shift
    operations. The relate PRIx64 in print messages have been
    replaced by PRIpaddr at the same time. And some being-phased-out
    types like u64 in the lines we have touched also have been
    converted to uint64_t or unsigned long.
    
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/include/asm/numa.h |  8 ++++----
 xen/arch/x86/numa.c             | 32 +++++++++++++++-----------------
 xen/arch/x86/srat.c             | 25 +++++++++++++------------
 3 files changed, 32 insertions(+), 33 deletions(-)

diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h
index 5d8385f2e1..c32ccffde3 100644
--- a/xen/arch/x86/include/asm/numa.h
+++ b/xen/arch/x86/include/asm/numa.h
@@ -18,7 +18,7 @@ extern cpumask_t     node_to_cpumask[];
 #define node_to_cpumask(node)    (node_to_cpumask[node])
 
 struct node { 
-	u64 start,end; 
+	paddr_t start, end;
 };
 
 extern int compute_hash_shift(struct node *nodes, int numnodes,
@@ -38,7 +38,7 @@ extern void numa_set_node(int cpu, nodeid_t node);
 extern nodeid_t setup_node(unsigned int pxm);
 extern void srat_detect_node(int cpu);
 
-extern void setup_node_bootmem(nodeid_t nodeid, u64 start, u64 end);
+extern void setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end);
 extern nodeid_t apicid_to_node[];
 extern void init_cpu_to_node(void);
 
@@ -76,9 +76,9 @@ static inline __attribute__((pure)) nodeid_t phys_to_nid(paddr_t addr)
 				 NODE_DATA(nid)->node_spanned_pages)
 #define arch_want_default_dmazone() (num_online_nodes() > 1)
 
-extern int valid_numa_range(u64 start, u64 end, nodeid_t node);
+extern int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node);
 
-void srat_parse_regions(u64 addr);
+void srat_parse_regions(paddr_t addr);
 extern u8 __node_distance(nodeid_t a, nodeid_t b);
 unsigned int arch_get_dma_bitsize(void);
 
diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c
index 680b7d9002..627ae8aa95 100644
--- a/xen/arch/x86/numa.c
+++ b/xen/arch/x86/numa.c
@@ -162,12 +162,10 @@ int __init compute_hash_shift(struct node *nodes, int numnodes,
     return shift;
 }
 /* initialize NODE_DATA given nodeid and start/end */
-void __init setup_node_bootmem(nodeid_t nodeid, u64 start, u64 end)
-{ 
-    unsigned long start_pfn, end_pfn;
-
-    start_pfn = start >> PAGE_SHIFT;
-    end_pfn = end >> PAGE_SHIFT;
+void __init setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end)
+{
+    unsigned long start_pfn = paddr_to_pfn(start);
+    unsigned long end_pfn = paddr_to_pfn(end);
 
     NODE_DATA(nodeid)->node_start_pfn = start_pfn;
     NODE_DATA(nodeid)->node_spanned_pages = end_pfn - start_pfn;
@@ -198,11 +196,12 @@ void __init numa_init_array(void)
 static int numa_fake __initdata = 0;
 
 /* Numa emulation */
-static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
+static int __init numa_emulation(unsigned long start_pfn,
+                                 unsigned long end_pfn)
 {
     int i;
     struct node nodes[MAX_NUMNODES];
-    u64 sz = ((end_pfn - start_pfn)<<PAGE_SHIFT) / numa_fake;
+    uint64_t sz = pfn_to_paddr(end_pfn - start_pfn) / numa_fake;
 
     /* Kludge needed for the hash function */
     if ( hweight64(sz) > 1 )
@@ -218,9 +217,9 @@ static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
     memset(&nodes,0,sizeof(nodes));
     for ( i = 0; i < numa_fake; i++ )
     {
-        nodes[i].start = (start_pfn<<PAGE_SHIFT) + i*sz;
+        nodes[i].start = pfn_to_paddr(start_pfn) + i * sz;
         if ( i == numa_fake - 1 )
-            sz = (end_pfn<<PAGE_SHIFT) - nodes[i].start;
+            sz = pfn_to_paddr(end_pfn) - nodes[i].start;
         nodes[i].end = nodes[i].start + sz;
         printk(KERN_INFO "Faking node %d at %"PRIx64"-%"PRIx64" (%"PRIu64"MB)\n",
                i,
@@ -246,6 +245,8 @@ static int __init numa_emulation(u64 start_pfn, u64 end_pfn)
 void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 { 
     int i;
+    paddr_t start = pfn_to_paddr(start_pfn);
+    paddr_t end = pfn_to_paddr(end_pfn);
 
 #ifdef CONFIG_NUMA_EMU
     if ( numa_fake && !numa_emulation(start_pfn, end_pfn) )
@@ -253,17 +254,15 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 #endif
 
 #ifdef CONFIG_ACPI_NUMA
-    if ( !numa_off && !acpi_scan_nodes((u64)start_pfn << PAGE_SHIFT,
-         (u64)end_pfn << PAGE_SHIFT) )
+    if ( !numa_off && !acpi_scan_nodes(start, end) )
         return;
 #endif
 
     printk(KERN_INFO "%s\n",
            numa_off ? "NUMA turned off" : "No NUMA configuration found");
 
-    printk(KERN_INFO "Faking a node at %016"PRIx64"-%016"PRIx64"\n",
-           (u64)start_pfn << PAGE_SHIFT,
-           (u64)end_pfn << PAGE_SHIFT);
+    printk(KERN_INFO "Faking a node at %"PRIpaddr"-%"PRIpaddr"\n",
+           start, end);
     /* setup dummy node covering all memory */
     memnode_shift = BITS_PER_LONG - 1;
     memnodemap = _memnodemap;
@@ -276,8 +275,7 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
     for ( i = 0; i < nr_cpu_ids; i++ )
         numa_set_node(i, 0);
     cpumask_copy(&node_to_cpumask[0], cpumask_of(0));
-    setup_node_bootmem(0, (u64)start_pfn << PAGE_SHIFT,
-                    (u64)end_pfn << PAGE_SHIFT);
+    setup_node_bootmem(0, start, end);
 }
 
 void numa_add_cpu(int cpu)
diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index cfe24c7e78..8ffe43bdfe 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -104,7 +104,7 @@ nodeid_t setup_node(unsigned pxm)
 	return node;
 }
 
-int valid_numa_range(u64 start, u64 end, nodeid_t node)
+int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node)
 {
 	int i;
 
@@ -119,7 +119,7 @@ int valid_numa_range(u64 start, u64 end, nodeid_t node)
 	return 0;
 }
 
-static __init int conflicting_memblks(u64 start, u64 end)
+static __init int conflicting_memblks(paddr_t start, paddr_t end)
 {
 	int i;
 
@@ -135,7 +135,7 @@ static __init int conflicting_memblks(u64 start, u64 end)
 	return -1;
 }
 
-static __init void cutoff_node(int i, u64 start, u64 end)
+static __init void cutoff_node(int i, paddr_t start, paddr_t end)
 {
 	struct node *nd = &nodes[i];
 	if (nd->start < start) {
@@ -275,7 +275,7 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa)
 void __init
 acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 {
-	u64 start, end;
+	paddr_t start, end;
 	unsigned pxm;
 	nodeid_t node;
 	int i;
@@ -318,7 +318,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		bool mismatch = !(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
 		                !test_bit(i, memblk_hotplug);
 
-		printk("%sSRAT: PXM %u (%"PRIx64"-%"PRIx64") overlaps with itself (%"PRIx64"-%"PRIx64")\n",
+		printk("%sSRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with itself (%"PRIpaddr"-%"PRIpaddr")\n",
 		       mismatch ? KERN_ERR : KERN_WARNING, pxm, start, end,
 		       node_memblk_range[i].start, node_memblk_range[i].end);
 		if (mismatch) {
@@ -327,7 +327,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		}
 	} else {
 		printk(KERN_ERR
-		       "SRAT: PXM %u (%"PRIx64"-%"PRIx64") overlaps with PXM %u (%"PRIx64"-%"PRIx64")\n",
+		       "SRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with PXM %u (%"PRIpaddr"-%"PRIpaddr")\n",
 		       pxm, start, end, node_to_pxm(memblk_nodeid[i]),
 		       node_memblk_range[i].start, node_memblk_range[i].end);
 		bad_srat();
@@ -346,7 +346,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 				nd->end = end;
 		}
 	}
-	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIx64"-%"PRIx64"%s\n",
+	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIpaddr"-%"PRIpaddr"%s\n",
 	       node, pxm, start, end,
 	       ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE ? " (hotplug)" : "");
 
@@ -369,7 +369,7 @@ static int __init nodes_cover_memory(void)
 
 	for (i = 0; i < e820.nr_map; i++) {
 		int j, found;
-		unsigned long long start, end;
+		paddr_t start, end;
 
 		if (e820.map[i].type != E820_RAM) {
 			continue;
@@ -396,7 +396,7 @@ static int __init nodes_cover_memory(void)
 
 		if (start < end) {
 			printk(KERN_ERR "SRAT: No PXM for e820 range: "
-				"%016Lx - %016Lx\n", start, end);
+				"%"PRIpaddr" - %"PRIpaddr"\n", start, end);
 			return 0;
 		}
 	}
@@ -432,7 +432,7 @@ static int __init cf_check srat_parse_region(
 	return 0;
 }
 
-void __init srat_parse_regions(u64 addr)
+void __init srat_parse_regions(paddr_t addr)
 {
 	u64 mask;
 	unsigned int i;
@@ -457,7 +457,7 @@ void __init srat_parse_regions(u64 addr)
 }
 
 /* Use the information discovered above to actually set up the nodes. */
-int __init acpi_scan_nodes(u64 start, u64 end)
+int __init acpi_scan_nodes(paddr_t start, paddr_t end)
 {
 	int i;
 	nodemask_t all_nodes_parsed;
@@ -489,7 +489,8 @@ int __init acpi_scan_nodes(u64 start, u64 end)
 	/* Finally register nodes */
 	for_each_node_mask(i, all_nodes_parsed)
 	{
-		u64 size = nodes[i].end - nodes[i].start;
+		uint64_t size = nodes[i].end - nodes[i].start;
+
 		if ( size == 0 )
 			printk(KERN_WARNING "SRAT: Node %u has no memory. "
 			       "BIOS Bug or mis-configured hardware?\n", i);
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/x86: add detection of memory interleaves for different nodes
Message-Id: <E1o2QNv-0006li-7l@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:48:35 +0000

commit b660e19d0f7f3324d61462fc6d9ef6ee98914f2d
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:15 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: add detection of memory interleaves for different nodes
    
    One NUMA node may contain several memory blocks. In current Xen
    code, Xen will maintain a node memory range for each node to cover
    all its memory blocks. But here comes the problem, in the gap of
    one node's two memory blocks, if there are some memory blocks don't
    belong to this node (remote memory blocks). This node's memory range
    will be expanded to cover these remote memory blocks.
    
    One node's memory range contains other nodes' memory, this is
    obviously not very reasonable. This means current NUMA code only
    can support node has no interleaved memory blocks. However, on a
    physical machine, the addresses of multiple nodes can be interleaved.
    
    So in this patch, we add code to detect memory interleaves of
    different nodes. NUMA initialization will be failed and error
    messages will be printed when Xen detect such hardware configuration.
    
    As we have checked the node's range before, for a non-empty node,
    the "nd->end == end && nd->start == start" check is unnecesary.
    So we remove it from conflicting_memblks as well.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Tested-by: Jiamei Xie <jiamei.xie@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/srat.c | 139 ++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 101 insertions(+), 38 deletions(-)

diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index 8ffe43bdfe..3d02520a5a 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -42,6 +42,12 @@ static struct node node_memblk_range[NR_NODE_MEMBLKS];
 static nodeid_t memblk_nodeid[NR_NODE_MEMBLKS];
 static __initdata DECLARE_BITMAP(memblk_hotplug, NR_NODE_MEMBLKS);
 
+enum conflicts {
+	NO_CONFLICT,
+	OVERLAP,
+	INTERLEAVE,
+};
+
 static inline bool node_found(unsigned idx, unsigned pxm)
 {
 	return ((pxm2node[idx].pxm == pxm) &&
@@ -119,20 +125,45 @@ int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node)
 	return 0;
 }
 
-static __init int conflicting_memblks(paddr_t start, paddr_t end)
+static
+enum conflicts __init conflicting_memblks(nodeid_t nid, paddr_t start,
+					  paddr_t end, paddr_t nd_start,
+					  paddr_t nd_end, unsigned int *mblkid)
 {
-	int i;
+	unsigned int i;
 
+	/*
+	 * Scan all recorded nodes' memory blocks to check conflicts:
+	 * Overlap or interleave.
+	 */
 	for (i = 0; i < num_node_memblks; i++) {
 		struct node *nd = &node_memblk_range[i];
+
+		*mblkid = i;
+
+		/* Skip 0 bytes node memory block. */
 		if (nd->start == nd->end)
 			continue;
+		/*
+		 * Use memblk range to check memblk overlaps, include the
+		 * self-overlap case. As nd's range is non-empty, the special
+		 * case "nd->end == end && nd->start == start" also can be covered.
+		 */
 		if (nd->end > start && nd->start < end)
-			return i;
-		if (nd->end == end && nd->start == start)
-			return i;
+			return OVERLAP;
+
+		/*
+		 * Use node memory range to check whether new range contains
+		 * memory from other nodes - interleave check. We just need
+		 * to check full contains situation. Because overlaps have
+		 * been checked above.
+		 */
+	        if (nid != memblk_nodeid[i] &&
+		    nd->start >= nd_start && nd->end <= nd_end)
+			return INTERLEAVE;
 	}
-	return -1;
+
+	return NO_CONFLICT;
 }
 
 static __init void cutoff_node(int i, paddr_t start, paddr_t end)
@@ -275,10 +306,12 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa)
 void __init
 acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 {
+	struct node *nd;
+	paddr_t nd_start, nd_end;
 	paddr_t start, end;
 	unsigned pxm;
 	nodeid_t node;
-	int i;
+	unsigned int i;
 
 	if (srat_disabled())
 		return;
@@ -310,44 +343,74 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma)
 		bad_srat();
 		return;
 	}
+
+	/*
+	 * For the node that already has some memory blocks, we will
+	 * expand the node memory range temporarily to check memory
+	 * interleaves with other nodes. We will not use this node
+	 * temp memory range to check overlaps, because it will mask
+	 * the overlaps in same node.
+	 *
+	 * Node with 0 bytes memory doesn't need this expandsion.
+	 */
+	nd_start = start;
+	nd_end = end;
+	nd = &nodes[node];
+	if (nd->start != nd->end) {
+		if (nd_start > nd->start)
+			nd_start = nd->start;
+
+		if (nd_end < nd->end)
+			nd_end = nd->end;
+	}
+
 	/* It is fine to add this area to the nodes data it will be used later*/
-	i = conflicting_memblks(start, end);
-	if (i < 0)
-		/* everything fine */;
-	else if (memblk_nodeid[i] == node) {
-		bool mismatch = !(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
-		                !test_bit(i, memblk_hotplug);
-
-		printk("%sSRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with itself (%"PRIpaddr"-%"PRIpaddr")\n",
-		       mismatch ? KERN_ERR : KERN_WARNING, pxm, start, end,
-		       node_memblk_range[i].start, node_memblk_range[i].end);
-		if (mismatch) {
-			bad_srat();
-			return;
+	switch (conflicting_memblks(node, start, end, nd_start, nd_end, &i)) {
+	case OVERLAP:
+		if (memblk_nodeid[i] == node) {
+			bool mismatch = !(ma->flags &
+					  ACPI_SRAT_MEM_HOT_PLUGGABLE) !=
+			                !test_bit(i, memblk_hotplug);
+
+			printk("%sSRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with itself [%"PRIpaddr", %"PRIpaddr"]\n",
+			       mismatch ? KERN_ERR : KERN_WARNING, pxm, start,
+			       end - 1, node_memblk_range[i].start,
+			       node_memblk_range[i].end - 1);
+			if (mismatch) {
+				bad_srat();
+				return;
+			}
+			break;
 		}
-	} else {
+
+		printk(KERN_ERR
+		       "SRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with PXM %u [%"PRIpaddr", %"PRIpaddr"]\n",
+		       pxm, start, end - 1, node_to_pxm(memblk_nodeid[i]),
+		       node_memblk_range[i].start,
+		       node_memblk_range[i].end - 1);
+		bad_srat();
+		return;
+
+	case INTERLEAVE:
 		printk(KERN_ERR
-		       "SRAT: PXM %u (%"PRIpaddr"-%"PRIpaddr") overlaps with PXM %u (%"PRIpaddr"-%"PRIpaddr")\n",
-		       pxm, start, end, node_to_pxm(memblk_nodeid[i]),
-		       node_memblk_range[i].start, node_memblk_range[i].end);
+		       "SRAT： PXM %u: [%"PRIpaddr", %"PRIpaddr"] interleaves with PXM %u memblk [%"PRIpaddr", %"PRIpaddr"]\n",
+		       pxm, nd_start, nd_end - 1, node_to_pxm(memblk_nodeid[i]),
+		       node_memblk_range[i].start, node_memblk_range[i].end - 1);
 		bad_srat();
 		return;
+
+	case NO_CONFLICT:
+		break;
 	}
+
 	if (!(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE)) {
-		struct node *nd = &nodes[node];
-
-		if (!node_test_and_set(node, memory_nodes_parsed)) {
-			nd->start = start;
-			nd->end = end;
-		} else {
-			if (start < nd->start)
-				nd->start = start;
-			if (nd->end < end)
-				nd->end = end;
-		}
+		node_set(node, memory_nodes_parsed);
+		nd->start = nd_start;
+		nd->end = nd_end;
 	}
-	printk(KERN_INFO "SRAT: Node %u PXM %u %"PRIpaddr"-%"PRIpaddr"%s\n",
-	       node, pxm, start, end,
+
+	printk(KERN_INFO "SRAT: Node %u PXM %u [%"PRIpaddr", %"PRIpaddr"]%s\n",
+	       node, pxm, start, end - 1,
 	       ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE ? " (hotplug)" : "");
 
 	node_memblk_range[num_node_memblks].start = start;
@@ -396,7 +459,7 @@ static int __init nodes_cover_memory(void)
 
 		if (start < end) {
 			printk(KERN_ERR "SRAT: No PXM for e820 range: "
-				"%"PRIpaddr" - %"PRIpaddr"\n", start, end);
+				"[%"PRIpaddr", %"PRIpaddr"]\n", start, end - 1);
 			return 0;
 		}
 	}
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/x86: use INFO level for node's without memory log message
Message-Id: <E1o2QO5-0006md-BR@xenbits.xenproject.org>
Date: Sat, 18 Jun 2022 04:48:45 +0000

commit c9040f25be317ab2f7647605397d79313e3f303e
Author:     Wei Chen <wei.chen@arm.com>
AuthorDate: Fri Jun 10 13:53:16 2022 +0800
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Fri Jun 17 09:36:12 2022 +0100

    xen/x86: use INFO level for node's without memory log message
    
    In previous code, Xen was using KERN_WARNING for log message
    when Xen found a node without memory. Xen will print this
    warning message, and said that this may be an BIOS Bug or
    mis-configured hardware. But actually, this warning is bogus,
    because in an NUMA setting, nodes can only have processors,
    and with 0 bytes memory. So it is unreasonable to warn about
    BIOS or hardware corruption based on the detection of node
    with 0 bytes memory.
    
    So in this patch, we remove the warning messages, but just
    keep an info message to info users that there is one or more
    nodes with 0 bytes memory in the system.
    
    Signed-off-by: Wei Chen <wei.chen@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/srat.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c
index 3d02520a5a..b62a152911 100644
--- a/xen/arch/x86/srat.c
+++ b/xen/arch/x86/srat.c
@@ -555,8 +555,7 @@ int __init acpi_scan_nodes(paddr_t start, paddr_t end)
 		uint64_t size = nodes[i].end - nodes[i].start;
 
 		if ( size == 0 )
-			printk(KERN_WARNING "SRAT: Node %u has no memory. "
-			       "BIOS Bug or mis-configured hardware?\n", i);
+			printk(KERN_INFO "SRAT: node %u has no memory\n", i);
 
 		setup_node_bootmem(i, nodes[i].start, nodes[i].end);
 	}
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/include: drop leading underscore from xen_list header
Message-Id: <E1o3HBH-0001xR-W3@xenbits.xenproject.org>
Date: Mon, 20 Jun 2022 13:11:03 +0000

commit 9d067857d1ff6805608aac4d9c0ea1c848b2e637
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 20 14:35:00 2022 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 20 14:05:29 2022 +0100

    tools/include: drop leading underscore from xen_list header
    
    A leading underscore is used to indicate auto generated headers, and
    the clean use of 'rm -f _*.h' will remove those.  _xen_list.h also
    uses a leading underscore, but is checked in the repo and as such
    cannot be removed as part of the clean rule.
    
    Fix this by dropping the leading underscore, so that the header is not
    removed.
    
    Fixes: a03b3552d4 ('libs,tools/include: Clean "clean" targets')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/include/Makefile               |   4 +-
 tools/include/_xen_list.h            | 509 -----------------------------------
 tools/include/libxl.h                |   2 +-
 tools/include/xen_list.h             | 509 +++++++++++++++++++++++++++++++++++
 tools/include/xentoolcore_internal.h |   2 +-
 tools/libs/evtchn/minios.c           |   2 +-
 tools/libs/light/libxl_qmp.c         |   2 +-
 7 files changed, 515 insertions(+), 515 deletions(-)

diff --git a/tools/include/Makefile b/tools/include/Makefile
index 3a03a0b0fa..b488f7ca9f 100644
--- a/tools/include/Makefile
+++ b/tools/include/Makefile
@@ -70,13 +70,13 @@ install: all
 	$(INSTALL_DATA) xen/io/*.h $(DESTDIR)$(includedir)/xen/io
 	$(INSTALL_DATA) xen/sys/*.h $(DESTDIR)$(includedir)/xen/sys
 	$(INSTALL_DATA) xen/xsm/*.h $(DESTDIR)$(includedir)/xen/xsm
-	$(INSTALL_DATA) _xen_list.h $(DESTDIR)$(includedir)
+	$(INSTALL_DATA) xen_list.h $(DESTDIR)$(includedir)
 
 .PHONY: uninstall
 uninstall:
 	echo "[FIXME] uninstall headers"
 	rm -rf $(DESTDIR)$(includedir)/xen
-	rm -f $(DESTDIR)$(includedir)/_xen_list.h
+	rm -f $(DESTDIR)$(includedir)/xen_list.h
 
 .PHONY: clean
 clean:
diff --git a/tools/include/_xen_list.h b/tools/include/_xen_list.h
deleted file mode 100644
index ce246f95c9..0000000000
--- a/tools/include/_xen_list.h
+++ /dev/null
@@ -1,509 +0,0 @@
-/*-
- * Copyright (c) 1991, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)queue.h	8.5 (Berkeley) 8/20/94
- * $FreeBSD$
- */
-
-#ifndef XEN__SYS_QUEUE_H_
-#define	XEN__SYS_QUEUE_H_
-
-/* #include <sys/cdefs.h> */
-
-/*
- * This file defines four types of data structures: singly-linked lists,
- * singly-linked tail queues, lists and tail queues.
- *
- * A singly-linked list is headed by a single forward pointer. The elements
- * are singly linked for minimum space and pointer manipulation overhead at
- * the expense of O(n) removal for arbitrary elements. New elements can be
- * added to the list after an existing element or at the head of the list.
- * Elements being removed from the head of the list should use the explicit
- * macro for this purpose for optimum efficiency. A singly-linked list may
- * only be traversed in the forward direction.  Singly-linked lists are ideal
- * for applications with large datasets and few or no removals or for
- * implementing a LIFO queue.
- *
- * A singly-linked tail queue is headed by a pair of pointers, one to the
- * head of the list and the other to the tail of the list. The elements are
- * singly linked for minimum space and pointer manipulation overhead at the
- * expense of O(n) removal for arbitrary elements. New elements can be added
- * to the list after an existing element, at the head of the list, or at the
- * end of the list. Elements being removed from the head of the tail queue
- * should use the explicit macro for this purpose for optimum efficiency.
- * A singly-linked tail queue may only be traversed in the forward direction.
- * Singly-linked tail queues are ideal for applications with large datasets
- * and few or no removals or for implementing a FIFO queue.
- *
- * A list is headed by a single forward pointer (or an array of forward
- * pointers for a hash table header). The elements are doubly linked
- * so that an arbitrary element can be removed without a need to
- * traverse the list. New elements can be added to the list before
- * or after an existing element or at the head of the list. A list
- * may only be traversed in the forward direction.
- *
- * A tail queue is headed by a pair of pointers, one to the head of the
- * list and the other to the tail of the list. The elements are doubly
- * linked so that an arbitrary element can be removed without a need to
- * traverse the list. New elements can be added to the list before or
- * after an existing element, at the head of the list, or at the end of
- * the list. A tail queue may be traversed in either direction.
- *
- * For details on the use of these macros, see the queue(3) manual page.
- *
- *
- *				XEN_SLIST	XEN_LIST	XEN_STAILQ	XEN_TAILQ
- * _HEAD			+	+	+	+
- * _HEAD_INITIALIZER		+	+	+	+
- * _ENTRY			+	+	+	+
- * _INIT			+	+	+	+
- * _EMPTY			+	+	+	+
- * _FIRST			+	+	+	+
- * _NEXT			+	+	+	+
- * _PREV			-	-	-	+
- * _LAST			-	-	+	+
- * _FOREACH			+	+	+	+
- * _FOREACH_SAFE		+	+	+	+
- * _FOREACH_REVERSE		-	-	-	+
- * _FOREACH_REVERSE_SAFE	-	-	-	+
- * _INSERT_HEAD			+	+	+	+
- * _INSERT_BEFORE		-	+	-	+
- * _INSERT_AFTER		+	+	+	+
- * _INSERT_TAIL			-	-	+	+
- * _CONCAT			-	-	+	+
- * _REMOVE_AFTER		+	-	+	-
- * _REMOVE_HEAD			+	-	+	-
- * _REMOVE			+	+	+	+
- * _SWAP			+	+	+	+
- *
- */
-
-/*
- * Singly-linked List declarations.
- */
-#define	XEN_SLIST_HEAD(name, type)					\
-struct name {								\
-	type *slh_first;	/* first element */			\
-}
-
-#define	XEN_SLIST_HEAD_INITIALIZER(head)				\
-	{ 0 }
-
-#define	XEN_SLIST_ENTRY(type)						\
-struct {								\
-	type *sle_next;	/* next element */				\
-}
-
-/*
- * Singly-linked List functions.
- */
-#define	XEN_SLIST_EMPTY(head)	((head)->slh_first == 0)
-
-#define	XEN_SLIST_FIRST(head)	((head)->slh_first)
-
-#define	XEN_SLIST_FOREACH(var, head, field)				\
-	for ((var) = XEN_SLIST_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_SLIST_NEXT((var), field))
-
-#define	XEN_SLIST_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_SLIST_FIRST((head));				\
-	    (var) && ((tvar) = XEN_SLIST_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_SLIST_FOREACH_PREVPTR(var, varp, head, field)		\
-	for ((varp) = &XEN_SLIST_FIRST((head));				\
-	    ((var) = *(varp)) != 0;					\
-	    (varp) = &XEN_SLIST_NEXT((var), field))
-
-#define	XEN_SLIST_INIT(head) do {					\
-	XEN_SLIST_FIRST((head)) = 0;					\
-} while (0)
-
-#define	XEN_SLIST_INSERT_AFTER(slistelm, elm, field) do {		\
-	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_NEXT((slistelm), field);\
-	XEN_SLIST_NEXT((slistelm), field) = (elm);			\
-} while (0)
-
-#define	XEN_SLIST_INSERT_HEAD(head, elm, field) do {			\
-	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_FIRST((head));		\
-	XEN_SLIST_FIRST((head)) = (elm);				\
-} while (0)
-
-#define	XEN_SLIST_NEXT(elm, field)	((elm)->field.sle_next)
-
-#define	XEN_SLIST_REMOVE(head, elm, type, field) do {			\
-	if (XEN_SLIST_FIRST((head)) == (elm)) {				\
-		XEN_SLIST_REMOVE_HEAD((head), field);			\
-	}								\
-	else {								\
-		type *curelm = XEN_SLIST_FIRST((head));			\
-		while (XEN_SLIST_NEXT(curelm, field) != (elm))		\
-			curelm = XEN_SLIST_NEXT(curelm, field);		\
-		XEN_SLIST_REMOVE_AFTER(curelm, field);			\
-	}								\
-} while (0)
-
-#define XEN_SLIST_REMOVE_AFTER(elm, field) do {				\
-	XEN_SLIST_NEXT(elm, field) =					\
-	    XEN_SLIST_NEXT(XEN_SLIST_NEXT(elm, field), field);		\
-} while (0)
-
-#define	XEN_SLIST_REMOVE_HEAD(head, field) do {				\
-	XEN_SLIST_FIRST((head)) = XEN_SLIST_NEXT(XEN_SLIST_FIRST((head)), field);\
-} while (0)
-
-#define XEN_SLIST_SWAP(head1, head2, type) do {				\
-	type *swap_first = XEN_SLIST_FIRST(head1);			\
-	XEN_SLIST_FIRST(head1) = XEN_SLIST_FIRST(head2);		\
-	XEN_SLIST_FIRST(head2) = swap_first;				\
-} while (0)
-
-/*
- * Singly-linked Tail queue declarations.
- */
-#define	XEN_STAILQ_HEAD(name, type)					\
-struct name {								\
-	type *stqh_first;/* first element */				\
-	type **stqh_last;/* addr of last next element */		\
-}
-
-#define	XEN_STAILQ_HEAD_INITIALIZER(head)				\
-	{ 0, &(head).stqh_first }
-
-#define	XEN_STAILQ_ENTRY(type)						\
-struct {								\
-	type *stqe_next;	/* next element */			\
-}
-
-/*
- * Singly-linked Tail queue functions.
- */
-#define	XEN_STAILQ_CONCAT(head1, head2) do {				\
-	if (!XEN_STAILQ_EMPTY((head2))) {				\
-		*(head1)->stqh_last = (head2)->stqh_first;		\
-		(head1)->stqh_last = (head2)->stqh_last;		\
-		XEN_STAILQ_INIT((head2));				\
-	}								\
-} while (0)
-
-#define	XEN_STAILQ_EMPTY(head)	((head)->stqh_first == 0)
-
-#define	XEN_STAILQ_FIRST(head)	((head)->stqh_first)
-
-#define	XEN_STAILQ_FOREACH(var, head, field)				\
-	for((var) = XEN_STAILQ_FIRST((head));				\
-	   (var);							\
-	   (var) = XEN_STAILQ_NEXT((var), field))
-
-
-#define	XEN_STAILQ_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_STAILQ_FIRST((head));				\
-	    (var) && ((tvar) = XEN_STAILQ_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_STAILQ_INIT(head) do {					\
-	XEN_STAILQ_FIRST((head)) = 0;					\
-	(head)->stqh_last = &XEN_STAILQ_FIRST((head));			\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_AFTER(head, tqelm, elm, field) do {		\
-	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_NEXT((tqelm), field)) == 0)\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-	XEN_STAILQ_NEXT((tqelm), field) = (elm);			\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_FIRST((head))) == 0)\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-	XEN_STAILQ_FIRST((head)) = (elm);				\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_TAIL(head, elm, field) do {			\
-	XEN_STAILQ_NEXT((elm), field) = 0;				\
-	*(head)->stqh_last = (elm);					\
-	(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define	XEN_STAILQ_LAST(head, type, field)				\
-	(XEN_STAILQ_EMPTY((head)) ?					\
-		0 :							\
-	        ((type *)(void *)					\
-		((char *)((head)->stqh_last) - offsetof(type, field))))
-
-#define	XEN_STAILQ_NEXT(elm, field)	((elm)->field.stqe_next)
-
-#define	XEN_STAILQ_REMOVE(head, elm, type, field) do {			\
-	if (XEN_STAILQ_FIRST((head)) == (elm)) {			\
-		XEN_STAILQ_REMOVE_HEAD((head), field);			\
-	}								\
-	else {								\
-		type *curelm = XEN_STAILQ_FIRST((head));		\
-		while (XEN_STAILQ_NEXT(curelm, field) != (elm))		\
-			curelm = XEN_STAILQ_NEXT(curelm, field);	\
-		XEN_STAILQ_REMOVE_AFTER(head, curelm, field);		\
-	}								\
-} while (0)
-
-#define XEN_STAILQ_REMOVE_AFTER(head, elm, field) do {			\
-	if ((XEN_STAILQ_NEXT(elm, field) =				\
-	     XEN_STAILQ_NEXT(XEN_STAILQ_NEXT(elm, field), field)) == 0)	\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_STAILQ_REMOVE_HEAD(head, field) do {			\
-	if ((XEN_STAILQ_FIRST((head)) =					\
-	     XEN_STAILQ_NEXT(XEN_STAILQ_FIRST((head)), field)) == 0)	\
-		(head)->stqh_last = &XEN_STAILQ_FIRST((head));		\
-} while (0)
-
-#define XEN_STAILQ_SWAP(head1, head2, type) do {			\
-	type *swap_first = XEN_STAILQ_FIRST(head1);			\
-	type **swap_last = (head1)->stqh_last;				\
-	XEN_STAILQ_FIRST(head1) = XEN_STAILQ_FIRST(head2);		\
-	(head1)->stqh_last = (head2)->stqh_last;			\
-	XEN_STAILQ_FIRST(head2) = swap_first;				\
-	(head2)->stqh_last = swap_last;					\
-	if (XEN_STAILQ_EMPTY(head1))					\
-		(head1)->stqh_last = &XEN_STAILQ_FIRST(head1);		\
-	if (XEN_STAILQ_EMPTY(head2))					\
-		(head2)->stqh_last = &XEN_STAILQ_FIRST(head2);		\
-} while (0)
-
-
-/*
- * List declarations.
- */
-#define	XEN_LIST_HEAD(name, type)					\
-struct name {								\
-	type *lh_first;	/* first element */				\
-}
-
-#define	XEN_LIST_HEAD_INITIALIZER(head)					\
-	{ 0 }
-
-#define	XEN_LIST_ENTRY(type)						\
-struct {								\
-	type *le_next;	/* next element */				\
-	type **le_prev;	/* address of previous next element */		\
-}
-
-/*
- * List functions.
- */
-
-#define	XEN_LIST_EMPTY(head)	((head)->lh_first == 0)
-
-#define	XEN_LIST_FIRST(head)	((head)->lh_first)
-
-#define	XEN_LIST_FOREACH(var, head, field)				\
-	for ((var) = XEN_LIST_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_LIST_NEXT((var), field))
-
-#define	XEN_LIST_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_LIST_FIRST((head));				\
-	    (var) && ((tvar) = XEN_LIST_NEXT((var), field), 1);		\
-	    (var) = (tvar))
-
-#define	XEN_LIST_INIT(head) do {					\
-	XEN_LIST_FIRST((head)) = 0;					\
-} while (0)
-
-#define	XEN_LIST_INSERT_AFTER(listelm, elm, field) do {			\
-	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_NEXT((listelm), field)) != 0)\
-		XEN_LIST_NEXT((listelm), field)->field.le_prev =	\
-		    &XEN_LIST_NEXT((elm), field);			\
-	XEN_LIST_NEXT((listelm), field) = (elm);			\
-	(elm)->field.le_prev = &XEN_LIST_NEXT((listelm), field);	\
-} while (0)
-
-#define	XEN_LIST_INSERT_BEFORE(listelm, elm, field) do {		\
-	(elm)->field.le_prev = (listelm)->field.le_prev;		\
-	XEN_LIST_NEXT((elm), field) = (listelm);			\
-	*(listelm)->field.le_prev = (elm);				\
-	(listelm)->field.le_prev = &XEN_LIST_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_LIST_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_FIRST((head))) != 0)\
-		XEN_LIST_FIRST((head))->field.le_prev = &XEN_LIST_NEXT((elm), field);\
-	XEN_LIST_FIRST((head)) = (elm);					\
-	(elm)->field.le_prev = &XEN_LIST_FIRST((head));			\
-} while (0)
-
-#define	XEN_LIST_NEXT(elm, field)	((elm)->field.le_next)
-
-#define	XEN_LIST_REMOVE(elm, field) do {				\
-	if (XEN_LIST_NEXT((elm), field) != 0)				\
-		XEN_LIST_NEXT((elm), field)->field.le_prev =		\
-		    (elm)->field.le_prev;				\
-	*(elm)->field.le_prev = XEN_LIST_NEXT((elm), field);		\
-} while (0)
-
-#define XEN_LIST_SWAP(head1, head2, type, field) do {			\
-	type *swap_tmp = XEN_LIST_FIRST((head1));			\
-	XEN_LIST_FIRST((head1)) = XEN_LIST_FIRST((head2));		\
-	XEN_LIST_FIRST((head2)) = swap_tmp;				\
-	if ((swap_tmp = XEN_LIST_FIRST((head1))) != 0)			\
-		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head1));	\
-	if ((swap_tmp = XEN_LIST_FIRST((head2))) != 0)			\
-		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head2));	\
-} while (0)
-
-/*
- * Tail queue declarations.
- */
-#define	XEN_TAILQ_HEAD(name, type)					\
-struct name {								\
-	type *tqh_first;	/* first element */			\
-	type **tqh_last;	/* addr of last next element */		\
-}
-
-#define	XEN_TAILQ_HEAD_INITIALIZER(head)				\
-	{ 0, &(head).tqh_first }
-
-#define	XEN_TAILQ_ENTRY(type)						\
-struct {								\
-	type *tqe_next;	/* next element */				\
-	type **tqe_prev;	/* address of previous next element */	\
-}
-
-/*
- * Tail queue functions.
- */
-
-#define	XEN_TAILQ_CONCAT(head1, head2, field) do {			\
-	if (!XEN_TAILQ_EMPTY(head2)) {					\
-		*(head1)->tqh_last = (head2)->tqh_first;		\
-		(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last;	\
-		(head1)->tqh_last = (head2)->tqh_last;			\
-		XEN_TAILQ_INIT((head2));				\
-	}								\
-} while (0)
-
-#define	XEN_TAILQ_EMPTY(head)	((head)->tqh_first == 0)
-
-#define	XEN_TAILQ_FIRST(head)	((head)->tqh_first)
-
-#define	XEN_TAILQ_FOREACH(var, head, field)				\
-	for ((var) = XEN_TAILQ_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_TAILQ_NEXT((var), field))
-
-#define	XEN_TAILQ_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_TAILQ_FIRST((head));				\
-	    (var) && ((tvar) = XEN_TAILQ_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
-	for ((var) = XEN_TAILQ_LAST((head), headname);			\
-	    (var);							\
-	    (var) = XEN_TAILQ_PREV((var), headname, field))
-
-#define	XEN_TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar)	\
-	for ((var) = XEN_TAILQ_LAST((head), headname);			\
-	    (var) && ((tvar) = XEN_TAILQ_PREV((var), headname, field), 1);\
-	    (var) = (tvar))
-
-#define	XEN_TAILQ_INIT(head) do {					\
-	XEN_TAILQ_FIRST((head)) = 0;					\
-	(head)->tqh_last = &XEN_TAILQ_FIRST((head));			\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
-	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_NEXT((listelm), field)) != 0)\
-		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
-		    &XEN_TAILQ_NEXT((elm), field);			\
-	else {								\
-		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
-	}								\
-	XEN_TAILQ_NEXT((listelm), field) = (elm);			\
-	(elm)->field.tqe_prev = &XEN_TAILQ_NEXT((listelm), field);	\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_BEFORE(listelm, elm, field) do {		\
-	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
-	XEN_TAILQ_NEXT((elm), field) = (listelm);			\
-	*(listelm)->field.tqe_prev = (elm);				\
-	(listelm)->field.tqe_prev = &XEN_TAILQ_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_FIRST((head))) != 0)\
-		XEN_TAILQ_FIRST((head))->field.tqe_prev =		\
-		    &XEN_TAILQ_NEXT((elm), field);			\
-	else								\
-		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
-	XEN_TAILQ_FIRST((head)) = (elm);				\
-	(elm)->field.tqe_prev = &XEN_TAILQ_FIRST((head));		\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_TAIL(head, elm, field) do {			\
-	XEN_TAILQ_NEXT((elm), field) = 0;				\
-	(elm)->field.tqe_prev = (head)->tqh_last;			\
-	*(head)->tqh_last = (elm);					\
-	(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define	XEN_TAILQ_LAST(head, headname)					\
-	(*(((struct headname *)((head)->tqh_last))->tqh_last))
-
-#define	XEN_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
-
-#define	XEN_TAILQ_PREV(elm, headname, field)				\
-	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
-
-#define	XEN_TAILQ_REMOVE(head, elm, field) do {				\
-	if ((XEN_TAILQ_NEXT((elm), field)) != 0)			\
-		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
-		    (elm)->field.tqe_prev;				\
-	else {								\
-		(head)->tqh_last = (elm)->field.tqe_prev;		\
-	}								\
-	*(elm)->field.tqe_prev = XEN_TAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define XEN_TAILQ_SWAP(head1, head2, type, field) do {			\
-	type *swap_first = (head1)->tqh_first;				\
-	type **swap_last = (head1)->tqh_last;				\
-	(head1)->tqh_first = (head2)->tqh_first;			\
-	(head1)->tqh_last = (head2)->tqh_last;				\
-	(head2)->tqh_first = swap_first;				\
-	(head2)->tqh_last = swap_last;					\
-	if ((swap_first = (head1)->tqh_first) != 0)			\
-		swap_first->field.tqe_prev = &(head1)->tqh_first;	\
-	else								\
-		(head1)->tqh_last = &(head1)->tqh_first;		\
-	if ((swap_first = (head2)->tqh_first) != 0)			\
-		swap_first->field.tqe_prev = &(head2)->tqh_first;	\
-	else								\
-		(head2)->tqh_last = &(head2)->tqh_first;		\
-} while (0)
-
-#endif /* !XEN__SYS_QUEUE_H_ */
diff --git a/tools/include/libxl.h b/tools/include/libxl.h
index 51a9b6cfac..7ce978e83c 100644
--- a/tools/include/libxl.h
+++ b/tools/include/libxl.h
@@ -747,7 +747,7 @@
 typedef struct libxl__ctx libxl_ctx;
 
 #include <libxl_uuid.h>
-#include <_xen_list.h>
+#include <xen_list.h>
 
 /* API compatibility. */
 #ifdef LIBXL_API_VERSION
diff --git a/tools/include/xen_list.h b/tools/include/xen_list.h
new file mode 100644
index 0000000000..ce246f95c9
--- /dev/null
+++ b/tools/include/xen_list.h
@@ -0,0 +1,509 @@
+/*-
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)queue.h	8.5 (Berkeley) 8/20/94
+ * $FreeBSD$
+ */
+
+#ifndef XEN__SYS_QUEUE_H_
+#define	XEN__SYS_QUEUE_H_
+
+/* #include <sys/cdefs.h> */
+
+/*
+ * This file defines four types of data structures: singly-linked lists,
+ * singly-linked tail queues, lists and tail queues.
+ *
+ * A singly-linked list is headed by a single forward pointer. The elements
+ * are singly linked for minimum space and pointer manipulation overhead at
+ * the expense of O(n) removal for arbitrary elements. New elements can be
+ * added to the list after an existing element or at the head of the list.
+ * Elements being removed from the head of the list should use the explicit
+ * macro for this purpose for optimum efficiency. A singly-linked list may
+ * only be traversed in the forward direction.  Singly-linked lists are ideal
+ * for applications with large datasets and few or no removals or for
+ * implementing a LIFO queue.
+ *
+ * A singly-linked tail queue is headed by a pair of pointers, one to the
+ * head of the list and the other to the tail of the list. The elements are
+ * singly linked for minimum space and pointer manipulation overhead at the
+ * expense of O(n) removal for arbitrary elements. New elements can be added
+ * to the list after an existing element, at the head of the list, or at the
+ * end of the list. Elements being removed from the head of the tail queue
+ * should use the explicit macro for this purpose for optimum efficiency.
+ * A singly-linked tail queue may only be traversed in the forward direction.
+ * Singly-linked tail queues are ideal for applications with large datasets
+ * and few or no removals or for implementing a FIFO queue.
+ *
+ * A list is headed by a single forward pointer (or an array of forward
+ * pointers for a hash table header). The elements are doubly linked
+ * so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before
+ * or after an existing element or at the head of the list. A list
+ * may only be traversed in the forward direction.
+ *
+ * A tail queue is headed by a pair of pointers, one to the head of the
+ * list and the other to the tail of the list. The elements are doubly
+ * linked so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before or
+ * after an existing element, at the head of the list, or at the end of
+ * the list. A tail queue may be traversed in either direction.
+ *
+ * For details on the use of these macros, see the queue(3) manual page.
+ *
+ *
+ *				XEN_SLIST	XEN_LIST	XEN_STAILQ	XEN_TAILQ
+ * _HEAD			+	+	+	+
+ * _HEAD_INITIALIZER		+	+	+	+
+ * _ENTRY			+	+	+	+
+ * _INIT			+	+	+	+
+ * _EMPTY			+	+	+	+
+ * _FIRST			+	+	+	+
+ * _NEXT			+	+	+	+
+ * _PREV			-	-	-	+
+ * _LAST			-	-	+	+
+ * _FOREACH			+	+	+	+
+ * _FOREACH_SAFE		+	+	+	+
+ * _FOREACH_REVERSE		-	-	-	+
+ * _FOREACH_REVERSE_SAFE	-	-	-	+
+ * _INSERT_HEAD			+	+	+	+
+ * _INSERT_BEFORE		-	+	-	+
+ * _INSERT_AFTER		+	+	+	+
+ * _INSERT_TAIL			-	-	+	+
+ * _CONCAT			-	-	+	+
+ * _REMOVE_AFTER		+	-	+	-
+ * _REMOVE_HEAD			+	-	+	-
+ * _REMOVE			+	+	+	+
+ * _SWAP			+	+	+	+
+ *
+ */
+
+/*
+ * Singly-linked List declarations.
+ */
+#define	XEN_SLIST_HEAD(name, type)					\
+struct name {								\
+	type *slh_first;	/* first element */			\
+}
+
+#define	XEN_SLIST_HEAD_INITIALIZER(head)				\
+	{ 0 }
+
+#define	XEN_SLIST_ENTRY(type)						\
+struct {								\
+	type *sle_next;	/* next element */				\
+}
+
+/*
+ * Singly-linked List functions.
+ */
+#define	XEN_SLIST_EMPTY(head)	((head)->slh_first == 0)
+
+#define	XEN_SLIST_FIRST(head)	((head)->slh_first)
+
+#define	XEN_SLIST_FOREACH(var, head, field)				\
+	for ((var) = XEN_SLIST_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_SLIST_NEXT((var), field))
+
+#define	XEN_SLIST_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_SLIST_FIRST((head));				\
+	    (var) && ((tvar) = XEN_SLIST_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_SLIST_FOREACH_PREVPTR(var, varp, head, field)		\
+	for ((varp) = &XEN_SLIST_FIRST((head));				\
+	    ((var) = *(varp)) != 0;					\
+	    (varp) = &XEN_SLIST_NEXT((var), field))
+
+#define	XEN_SLIST_INIT(head) do {					\
+	XEN_SLIST_FIRST((head)) = 0;					\
+} while (0)
+
+#define	XEN_SLIST_INSERT_AFTER(slistelm, elm, field) do {		\
+	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_NEXT((slistelm), field);\
+	XEN_SLIST_NEXT((slistelm), field) = (elm);			\
+} while (0)
+
+#define	XEN_SLIST_INSERT_HEAD(head, elm, field) do {			\
+	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_FIRST((head));		\
+	XEN_SLIST_FIRST((head)) = (elm);				\
+} while (0)
+
+#define	XEN_SLIST_NEXT(elm, field)	((elm)->field.sle_next)
+
+#define	XEN_SLIST_REMOVE(head, elm, type, field) do {			\
+	if (XEN_SLIST_FIRST((head)) == (elm)) {				\
+		XEN_SLIST_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		type *curelm = XEN_SLIST_FIRST((head));			\
+		while (XEN_SLIST_NEXT(curelm, field) != (elm))		\
+			curelm = XEN_SLIST_NEXT(curelm, field);		\
+		XEN_SLIST_REMOVE_AFTER(curelm, field);			\
+	}								\
+} while (0)
+
+#define XEN_SLIST_REMOVE_AFTER(elm, field) do {				\
+	XEN_SLIST_NEXT(elm, field) =					\
+	    XEN_SLIST_NEXT(XEN_SLIST_NEXT(elm, field), field);		\
+} while (0)
+
+#define	XEN_SLIST_REMOVE_HEAD(head, field) do {				\
+	XEN_SLIST_FIRST((head)) = XEN_SLIST_NEXT(XEN_SLIST_FIRST((head)), field);\
+} while (0)
+
+#define XEN_SLIST_SWAP(head1, head2, type) do {				\
+	type *swap_first = XEN_SLIST_FIRST(head1);			\
+	XEN_SLIST_FIRST(head1) = XEN_SLIST_FIRST(head2);		\
+	XEN_SLIST_FIRST(head2) = swap_first;				\
+} while (0)
+
+/*
+ * Singly-linked Tail queue declarations.
+ */
+#define	XEN_STAILQ_HEAD(name, type)					\
+struct name {								\
+	type *stqh_first;/* first element */				\
+	type **stqh_last;/* addr of last next element */		\
+}
+
+#define	XEN_STAILQ_HEAD_INITIALIZER(head)				\
+	{ 0, &(head).stqh_first }
+
+#define	XEN_STAILQ_ENTRY(type)						\
+struct {								\
+	type *stqe_next;	/* next element */			\
+}
+
+/*
+ * Singly-linked Tail queue functions.
+ */
+#define	XEN_STAILQ_CONCAT(head1, head2) do {				\
+	if (!XEN_STAILQ_EMPTY((head2))) {				\
+		*(head1)->stqh_last = (head2)->stqh_first;		\
+		(head1)->stqh_last = (head2)->stqh_last;		\
+		XEN_STAILQ_INIT((head2));				\
+	}								\
+} while (0)
+
+#define	XEN_STAILQ_EMPTY(head)	((head)->stqh_first == 0)
+
+#define	XEN_STAILQ_FIRST(head)	((head)->stqh_first)
+
+#define	XEN_STAILQ_FOREACH(var, head, field)				\
+	for((var) = XEN_STAILQ_FIRST((head));				\
+	   (var);							\
+	   (var) = XEN_STAILQ_NEXT((var), field))
+
+
+#define	XEN_STAILQ_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_STAILQ_FIRST((head));				\
+	    (var) && ((tvar) = XEN_STAILQ_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_STAILQ_INIT(head) do {					\
+	XEN_STAILQ_FIRST((head)) = 0;					\
+	(head)->stqh_last = &XEN_STAILQ_FIRST((head));			\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_AFTER(head, tqelm, elm, field) do {		\
+	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_NEXT((tqelm), field)) == 0)\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+	XEN_STAILQ_NEXT((tqelm), field) = (elm);			\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_FIRST((head))) == 0)\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+	XEN_STAILQ_FIRST((head)) = (elm);				\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_TAIL(head, elm, field) do {			\
+	XEN_STAILQ_NEXT((elm), field) = 0;				\
+	*(head)->stqh_last = (elm);					\
+	(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define	XEN_STAILQ_LAST(head, type, field)				\
+	(XEN_STAILQ_EMPTY((head)) ?					\
+		0 :							\
+	        ((type *)(void *)					\
+		((char *)((head)->stqh_last) - offsetof(type, field))))
+
+#define	XEN_STAILQ_NEXT(elm, field)	((elm)->field.stqe_next)
+
+#define	XEN_STAILQ_REMOVE(head, elm, type, field) do {			\
+	if (XEN_STAILQ_FIRST((head)) == (elm)) {			\
+		XEN_STAILQ_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		type *curelm = XEN_STAILQ_FIRST((head));		\
+		while (XEN_STAILQ_NEXT(curelm, field) != (elm))		\
+			curelm = XEN_STAILQ_NEXT(curelm, field);	\
+		XEN_STAILQ_REMOVE_AFTER(head, curelm, field);		\
+	}								\
+} while (0)
+
+#define XEN_STAILQ_REMOVE_AFTER(head, elm, field) do {			\
+	if ((XEN_STAILQ_NEXT(elm, field) =				\
+	     XEN_STAILQ_NEXT(XEN_STAILQ_NEXT(elm, field), field)) == 0)	\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_STAILQ_REMOVE_HEAD(head, field) do {			\
+	if ((XEN_STAILQ_FIRST((head)) =					\
+	     XEN_STAILQ_NEXT(XEN_STAILQ_FIRST((head)), field)) == 0)	\
+		(head)->stqh_last = &XEN_STAILQ_FIRST((head));		\
+} while (0)
+
+#define XEN_STAILQ_SWAP(head1, head2, type) do {			\
+	type *swap_first = XEN_STAILQ_FIRST(head1);			\
+	type **swap_last = (head1)->stqh_last;				\
+	XEN_STAILQ_FIRST(head1) = XEN_STAILQ_FIRST(head2);		\
+	(head1)->stqh_last = (head2)->stqh_last;			\
+	XEN_STAILQ_FIRST(head2) = swap_first;				\
+	(head2)->stqh_last = swap_last;					\
+	if (XEN_STAILQ_EMPTY(head1))					\
+		(head1)->stqh_last = &XEN_STAILQ_FIRST(head1);		\
+	if (XEN_STAILQ_EMPTY(head2))					\
+		(head2)->stqh_last = &XEN_STAILQ_FIRST(head2);		\
+} while (0)
+
+
+/*
+ * List declarations.
+ */
+#define	XEN_LIST_HEAD(name, type)					\
+struct name {								\
+	type *lh_first;	/* first element */				\
+}
+
+#define	XEN_LIST_HEAD_INITIALIZER(head)					\
+	{ 0 }
+
+#define	XEN_LIST_ENTRY(type)						\
+struct {								\
+	type *le_next;	/* next element */				\
+	type **le_prev;	/* address of previous next element */		\
+}
+
+/*
+ * List functions.
+ */
+
+#define	XEN_LIST_EMPTY(head)	((head)->lh_first == 0)
+
+#define	XEN_LIST_FIRST(head)	((head)->lh_first)
+
+#define	XEN_LIST_FOREACH(var, head, field)				\
+	for ((var) = XEN_LIST_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_LIST_NEXT((var), field))
+
+#define	XEN_LIST_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_LIST_FIRST((head));				\
+	    (var) && ((tvar) = XEN_LIST_NEXT((var), field), 1);		\
+	    (var) = (tvar))
+
+#define	XEN_LIST_INIT(head) do {					\
+	XEN_LIST_FIRST((head)) = 0;					\
+} while (0)
+
+#define	XEN_LIST_INSERT_AFTER(listelm, elm, field) do {			\
+	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_NEXT((listelm), field)) != 0)\
+		XEN_LIST_NEXT((listelm), field)->field.le_prev =	\
+		    &XEN_LIST_NEXT((elm), field);			\
+	XEN_LIST_NEXT((listelm), field) = (elm);			\
+	(elm)->field.le_prev = &XEN_LIST_NEXT((listelm), field);	\
+} while (0)
+
+#define	XEN_LIST_INSERT_BEFORE(listelm, elm, field) do {		\
+	(elm)->field.le_prev = (listelm)->field.le_prev;		\
+	XEN_LIST_NEXT((elm), field) = (listelm);			\
+	*(listelm)->field.le_prev = (elm);				\
+	(listelm)->field.le_prev = &XEN_LIST_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_LIST_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_FIRST((head))) != 0)\
+		XEN_LIST_FIRST((head))->field.le_prev = &XEN_LIST_NEXT((elm), field);\
+	XEN_LIST_FIRST((head)) = (elm);					\
+	(elm)->field.le_prev = &XEN_LIST_FIRST((head));			\
+} while (0)
+
+#define	XEN_LIST_NEXT(elm, field)	((elm)->field.le_next)
+
+#define	XEN_LIST_REMOVE(elm, field) do {				\
+	if (XEN_LIST_NEXT((elm), field) != 0)				\
+		XEN_LIST_NEXT((elm), field)->field.le_prev =		\
+		    (elm)->field.le_prev;				\
+	*(elm)->field.le_prev = XEN_LIST_NEXT((elm), field);		\
+} while (0)
+
+#define XEN_LIST_SWAP(head1, head2, type, field) do {			\
+	type *swap_tmp = XEN_LIST_FIRST((head1));			\
+	XEN_LIST_FIRST((head1)) = XEN_LIST_FIRST((head2));		\
+	XEN_LIST_FIRST((head2)) = swap_tmp;				\
+	if ((swap_tmp = XEN_LIST_FIRST((head1))) != 0)			\
+		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head1));	\
+	if ((swap_tmp = XEN_LIST_FIRST((head2))) != 0)			\
+		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head2));	\
+} while (0)
+
+/*
+ * Tail queue declarations.
+ */
+#define	XEN_TAILQ_HEAD(name, type)					\
+struct name {								\
+	type *tqh_first;	/* first element */			\
+	type **tqh_last;	/* addr of last next element */		\
+}
+
+#define	XEN_TAILQ_HEAD_INITIALIZER(head)				\
+	{ 0, &(head).tqh_first }
+
+#define	XEN_TAILQ_ENTRY(type)						\
+struct {								\
+	type *tqe_next;	/* next element */				\
+	type **tqe_prev;	/* address of previous next element */	\
+}
+
+/*
+ * Tail queue functions.
+ */
+
+#define	XEN_TAILQ_CONCAT(head1, head2, field) do {			\
+	if (!XEN_TAILQ_EMPTY(head2)) {					\
+		*(head1)->tqh_last = (head2)->tqh_first;		\
+		(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last;	\
+		(head1)->tqh_last = (head2)->tqh_last;			\
+		XEN_TAILQ_INIT((head2));				\
+	}								\
+} while (0)
+
+#define	XEN_TAILQ_EMPTY(head)	((head)->tqh_first == 0)
+
+#define	XEN_TAILQ_FIRST(head)	((head)->tqh_first)
+
+#define	XEN_TAILQ_FOREACH(var, head, field)				\
+	for ((var) = XEN_TAILQ_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_TAILQ_NEXT((var), field))
+
+#define	XEN_TAILQ_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_TAILQ_FIRST((head));				\
+	    (var) && ((tvar) = XEN_TAILQ_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
+	for ((var) = XEN_TAILQ_LAST((head), headname);			\
+	    (var);							\
+	    (var) = XEN_TAILQ_PREV((var), headname, field))
+
+#define	XEN_TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar)	\
+	for ((var) = XEN_TAILQ_LAST((head), headname);			\
+	    (var) && ((tvar) = XEN_TAILQ_PREV((var), headname, field), 1);\
+	    (var) = (tvar))
+
+#define	XEN_TAILQ_INIT(head) do {					\
+	XEN_TAILQ_FIRST((head)) = 0;					\
+	(head)->tqh_last = &XEN_TAILQ_FIRST((head));			\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
+	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_NEXT((listelm), field)) != 0)\
+		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
+		    &XEN_TAILQ_NEXT((elm), field);			\
+	else {								\
+		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
+	}								\
+	XEN_TAILQ_NEXT((listelm), field) = (elm);			\
+	(elm)->field.tqe_prev = &XEN_TAILQ_NEXT((listelm), field);	\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_BEFORE(listelm, elm, field) do {		\
+	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
+	XEN_TAILQ_NEXT((elm), field) = (listelm);			\
+	*(listelm)->field.tqe_prev = (elm);				\
+	(listelm)->field.tqe_prev = &XEN_TAILQ_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_FIRST((head))) != 0)\
+		XEN_TAILQ_FIRST((head))->field.tqe_prev =		\
+		    &XEN_TAILQ_NEXT((elm), field);			\
+	else								\
+		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
+	XEN_TAILQ_FIRST((head)) = (elm);				\
+	(elm)->field.tqe_prev = &XEN_TAILQ_FIRST((head));		\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_TAIL(head, elm, field) do {			\
+	XEN_TAILQ_NEXT((elm), field) = 0;				\
+	(elm)->field.tqe_prev = (head)->tqh_last;			\
+	*(head)->tqh_last = (elm);					\
+	(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define	XEN_TAILQ_LAST(head, headname)					\
+	(*(((struct headname *)((head)->tqh_last))->tqh_last))
+
+#define	XEN_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
+
+#define	XEN_TAILQ_PREV(elm, headname, field)				\
+	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
+
+#define	XEN_TAILQ_REMOVE(head, elm, field) do {				\
+	if ((XEN_TAILQ_NEXT((elm), field)) != 0)			\
+		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
+		    (elm)->field.tqe_prev;				\
+	else {								\
+		(head)->tqh_last = (elm)->field.tqe_prev;		\
+	}								\
+	*(elm)->field.tqe_prev = XEN_TAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define XEN_TAILQ_SWAP(head1, head2, type, field) do {			\
+	type *swap_first = (head1)->tqh_first;				\
+	type **swap_last = (head1)->tqh_last;				\
+	(head1)->tqh_first = (head2)->tqh_first;			\
+	(head1)->tqh_last = (head2)->tqh_last;				\
+	(head2)->tqh_first = swap_first;				\
+	(head2)->tqh_last = swap_last;					\
+	if ((swap_first = (head1)->tqh_first) != 0)			\
+		swap_first->field.tqe_prev = &(head1)->tqh_first;	\
+	else								\
+		(head1)->tqh_last = &(head1)->tqh_first;		\
+	if ((swap_first = (head2)->tqh_first) != 0)			\
+		swap_first->field.tqe_prev = &(head2)->tqh_first;	\
+	else								\
+		(head2)->tqh_last = &(head2)->tqh_first;		\
+} while (0)
+
+#endif /* !XEN__SYS_QUEUE_H_ */
diff --git a/tools/include/xentoolcore_internal.h b/tools/include/xentoolcore_internal.h
index deccefd612..1be014434d 100644
--- a/tools/include/xentoolcore_internal.h
+++ b/tools/include/xentoolcore_internal.h
@@ -27,7 +27,7 @@
 #include <stddef.h>
 
 #include "xentoolcore.h"
-#include "_xen_list.h"
+#include "xen_list.h"
 
 /*---------- active handle registration ----------*/
 
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index 8ff46de884..28743cb055 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -20,7 +20,7 @@
  * Split off from xc_minios.c
  */
 
-#include "_xen_list.h"
+#include "xen_list.h"
 #include <mini-os/types.h>
 #include <mini-os/os.h>
 #include <mini-os/lib.h>
diff --git a/tools/libs/light/libxl_qmp.c b/tools/libs/light/libxl_qmp.c
index 8faa102e4d..6b0cd607d8 100644
--- a/tools/libs/light/libxl_qmp.c
+++ b/tools/libs/light/libxl_qmp.c
@@ -63,7 +63,7 @@
 
 #include <yajl/yajl_gen.h>
 
-#include "_xen_list.h"
+#include "xen_list.h"
 #include "libxl_internal.h"
 
 /* #define DEBUG_RECEIVED */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/include: drop leading underscore from xen_list header
Message-Id: <E1o3bMX-0002i1-Ls@xenbits.xenproject.org>
Date: Tue, 21 Jun 2022 10:44:01 +0000

commit 9d067857d1ff6805608aac4d9c0ea1c848b2e637
Author:     Roger Pau Monné <roger.pau@citrix.com>
AuthorDate: Mon Jun 20 14:35:00 2022 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Mon Jun 20 14:05:29 2022 +0100

    tools/include: drop leading underscore from xen_list header
    
    A leading underscore is used to indicate auto generated headers, and
    the clean use of 'rm -f _*.h' will remove those.  _xen_list.h also
    uses a leading underscore, but is checked in the repo and as such
    cannot be removed as part of the clean rule.
    
    Fix this by dropping the leading underscore, so that the header is not
    removed.
    
    Fixes: a03b3552d4 ('libs,tools/include: Clean "clean" targets')
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/include/Makefile               |   4 +-
 tools/include/_xen_list.h            | 509 -----------------------------------
 tools/include/libxl.h                |   2 +-
 tools/include/xen_list.h             | 509 +++++++++++++++++++++++++++++++++++
 tools/include/xentoolcore_internal.h |   2 +-
 tools/libs/evtchn/minios.c           |   2 +-
 tools/libs/light/libxl_qmp.c         |   2 +-
 7 files changed, 515 insertions(+), 515 deletions(-)

diff --git a/tools/include/Makefile b/tools/include/Makefile
index 3a03a0b0fa..b488f7ca9f 100644
--- a/tools/include/Makefile
+++ b/tools/include/Makefile
@@ -70,13 +70,13 @@ install: all
 	$(INSTALL_DATA) xen/io/*.h $(DESTDIR)$(includedir)/xen/io
 	$(INSTALL_DATA) xen/sys/*.h $(DESTDIR)$(includedir)/xen/sys
 	$(INSTALL_DATA) xen/xsm/*.h $(DESTDIR)$(includedir)/xen/xsm
-	$(INSTALL_DATA) _xen_list.h $(DESTDIR)$(includedir)
+	$(INSTALL_DATA) xen_list.h $(DESTDIR)$(includedir)
 
 .PHONY: uninstall
 uninstall:
 	echo "[FIXME] uninstall headers"
 	rm -rf $(DESTDIR)$(includedir)/xen
-	rm -f $(DESTDIR)$(includedir)/_xen_list.h
+	rm -f $(DESTDIR)$(includedir)/xen_list.h
 
 .PHONY: clean
 clean:
diff --git a/tools/include/_xen_list.h b/tools/include/_xen_list.h
deleted file mode 100644
index ce246f95c9..0000000000
--- a/tools/include/_xen_list.h
+++ /dev/null
@@ -1,509 +0,0 @@
-/*-
- * Copyright (c) 1991, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)queue.h	8.5 (Berkeley) 8/20/94
- * $FreeBSD$
- */
-
-#ifndef XEN__SYS_QUEUE_H_
-#define	XEN__SYS_QUEUE_H_
-
-/* #include <sys/cdefs.h> */
-
-/*
- * This file defines four types of data structures: singly-linked lists,
- * singly-linked tail queues, lists and tail queues.
- *
- * A singly-linked list is headed by a single forward pointer. The elements
- * are singly linked for minimum space and pointer manipulation overhead at
- * the expense of O(n) removal for arbitrary elements. New elements can be
- * added to the list after an existing element or at the head of the list.
- * Elements being removed from the head of the list should use the explicit
- * macro for this purpose for optimum efficiency. A singly-linked list may
- * only be traversed in the forward direction.  Singly-linked lists are ideal
- * for applications with large datasets and few or no removals or for
- * implementing a LIFO queue.
- *
- * A singly-linked tail queue is headed by a pair of pointers, one to the
- * head of the list and the other to the tail of the list. The elements are
- * singly linked for minimum space and pointer manipulation overhead at the
- * expense of O(n) removal for arbitrary elements. New elements can be added
- * to the list after an existing element, at the head of the list, or at the
- * end of the list. Elements being removed from the head of the tail queue
- * should use the explicit macro for this purpose for optimum efficiency.
- * A singly-linked tail queue may only be traversed in the forward direction.
- * Singly-linked tail queues are ideal for applications with large datasets
- * and few or no removals or for implementing a FIFO queue.
- *
- * A list is headed by a single forward pointer (or an array of forward
- * pointers for a hash table header). The elements are doubly linked
- * so that an arbitrary element can be removed without a need to
- * traverse the list. New elements can be added to the list before
- * or after an existing element or at the head of the list. A list
- * may only be traversed in the forward direction.
- *
- * A tail queue is headed by a pair of pointers, one to the head of the
- * list and the other to the tail of the list. The elements are doubly
- * linked so that an arbitrary element can be removed without a need to
- * traverse the list. New elements can be added to the list before or
- * after an existing element, at the head of the list, or at the end of
- * the list. A tail queue may be traversed in either direction.
- *
- * For details on the use of these macros, see the queue(3) manual page.
- *
- *
- *				XEN_SLIST	XEN_LIST	XEN_STAILQ	XEN_TAILQ
- * _HEAD			+	+	+	+
- * _HEAD_INITIALIZER		+	+	+	+
- * _ENTRY			+	+	+	+
- * _INIT			+	+	+	+
- * _EMPTY			+	+	+	+
- * _FIRST			+	+	+	+
- * _NEXT			+	+	+	+
- * _PREV			-	-	-	+
- * _LAST			-	-	+	+
- * _FOREACH			+	+	+	+
- * _FOREACH_SAFE		+	+	+	+
- * _FOREACH_REVERSE		-	-	-	+
- * _FOREACH_REVERSE_SAFE	-	-	-	+
- * _INSERT_HEAD			+	+	+	+
- * _INSERT_BEFORE		-	+	-	+
- * _INSERT_AFTER		+	+	+	+
- * _INSERT_TAIL			-	-	+	+
- * _CONCAT			-	-	+	+
- * _REMOVE_AFTER		+	-	+	-
- * _REMOVE_HEAD			+	-	+	-
- * _REMOVE			+	+	+	+
- * _SWAP			+	+	+	+
- *
- */
-
-/*
- * Singly-linked List declarations.
- */
-#define	XEN_SLIST_HEAD(name, type)					\
-struct name {								\
-	type *slh_first;	/* first element */			\
-}
-
-#define	XEN_SLIST_HEAD_INITIALIZER(head)				\
-	{ 0 }
-
-#define	XEN_SLIST_ENTRY(type)						\
-struct {								\
-	type *sle_next;	/* next element */				\
-}
-
-/*
- * Singly-linked List functions.
- */
-#define	XEN_SLIST_EMPTY(head)	((head)->slh_first == 0)
-
-#define	XEN_SLIST_FIRST(head)	((head)->slh_first)
-
-#define	XEN_SLIST_FOREACH(var, head, field)				\
-	for ((var) = XEN_SLIST_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_SLIST_NEXT((var), field))
-
-#define	XEN_SLIST_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_SLIST_FIRST((head));				\
-	    (var) && ((tvar) = XEN_SLIST_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_SLIST_FOREACH_PREVPTR(var, varp, head, field)		\
-	for ((varp) = &XEN_SLIST_FIRST((head));				\
-	    ((var) = *(varp)) != 0;					\
-	    (varp) = &XEN_SLIST_NEXT((var), field))
-
-#define	XEN_SLIST_INIT(head) do {					\
-	XEN_SLIST_FIRST((head)) = 0;					\
-} while (0)
-
-#define	XEN_SLIST_INSERT_AFTER(slistelm, elm, field) do {		\
-	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_NEXT((slistelm), field);\
-	XEN_SLIST_NEXT((slistelm), field) = (elm);			\
-} while (0)
-
-#define	XEN_SLIST_INSERT_HEAD(head, elm, field) do {			\
-	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_FIRST((head));		\
-	XEN_SLIST_FIRST((head)) = (elm);				\
-} while (0)
-
-#define	XEN_SLIST_NEXT(elm, field)	((elm)->field.sle_next)
-
-#define	XEN_SLIST_REMOVE(head, elm, type, field) do {			\
-	if (XEN_SLIST_FIRST((head)) == (elm)) {				\
-		XEN_SLIST_REMOVE_HEAD((head), field);			\
-	}								\
-	else {								\
-		type *curelm = XEN_SLIST_FIRST((head));			\
-		while (XEN_SLIST_NEXT(curelm, field) != (elm))		\
-			curelm = XEN_SLIST_NEXT(curelm, field);		\
-		XEN_SLIST_REMOVE_AFTER(curelm, field);			\
-	}								\
-} while (0)
-
-#define XEN_SLIST_REMOVE_AFTER(elm, field) do {				\
-	XEN_SLIST_NEXT(elm, field) =					\
-	    XEN_SLIST_NEXT(XEN_SLIST_NEXT(elm, field), field);		\
-} while (0)
-
-#define	XEN_SLIST_REMOVE_HEAD(head, field) do {				\
-	XEN_SLIST_FIRST((head)) = XEN_SLIST_NEXT(XEN_SLIST_FIRST((head)), field);\
-} while (0)
-
-#define XEN_SLIST_SWAP(head1, head2, type) do {				\
-	type *swap_first = XEN_SLIST_FIRST(head1);			\
-	XEN_SLIST_FIRST(head1) = XEN_SLIST_FIRST(head2);		\
-	XEN_SLIST_FIRST(head2) = swap_first;				\
-} while (0)
-
-/*
- * Singly-linked Tail queue declarations.
- */
-#define	XEN_STAILQ_HEAD(name, type)					\
-struct name {								\
-	type *stqh_first;/* first element */				\
-	type **stqh_last;/* addr of last next element */		\
-}
-
-#define	XEN_STAILQ_HEAD_INITIALIZER(head)				\
-	{ 0, &(head).stqh_first }
-
-#define	XEN_STAILQ_ENTRY(type)						\
-struct {								\
-	type *stqe_next;	/* next element */			\
-}
-
-/*
- * Singly-linked Tail queue functions.
- */
-#define	XEN_STAILQ_CONCAT(head1, head2) do {				\
-	if (!XEN_STAILQ_EMPTY((head2))) {				\
-		*(head1)->stqh_last = (head2)->stqh_first;		\
-		(head1)->stqh_last = (head2)->stqh_last;		\
-		XEN_STAILQ_INIT((head2));				\
-	}								\
-} while (0)
-
-#define	XEN_STAILQ_EMPTY(head)	((head)->stqh_first == 0)
-
-#define	XEN_STAILQ_FIRST(head)	((head)->stqh_first)
-
-#define	XEN_STAILQ_FOREACH(var, head, field)				\
-	for((var) = XEN_STAILQ_FIRST((head));				\
-	   (var);							\
-	   (var) = XEN_STAILQ_NEXT((var), field))
-
-
-#define	XEN_STAILQ_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_STAILQ_FIRST((head));				\
-	    (var) && ((tvar) = XEN_STAILQ_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_STAILQ_INIT(head) do {					\
-	XEN_STAILQ_FIRST((head)) = 0;					\
-	(head)->stqh_last = &XEN_STAILQ_FIRST((head));			\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_AFTER(head, tqelm, elm, field) do {		\
-	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_NEXT((tqelm), field)) == 0)\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-	XEN_STAILQ_NEXT((tqelm), field) = (elm);			\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_FIRST((head))) == 0)\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-	XEN_STAILQ_FIRST((head)) = (elm);				\
-} while (0)
-
-#define	XEN_STAILQ_INSERT_TAIL(head, elm, field) do {			\
-	XEN_STAILQ_NEXT((elm), field) = 0;				\
-	*(head)->stqh_last = (elm);					\
-	(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define	XEN_STAILQ_LAST(head, type, field)				\
-	(XEN_STAILQ_EMPTY((head)) ?					\
-		0 :							\
-	        ((type *)(void *)					\
-		((char *)((head)->stqh_last) - offsetof(type, field))))
-
-#define	XEN_STAILQ_NEXT(elm, field)	((elm)->field.stqe_next)
-
-#define	XEN_STAILQ_REMOVE(head, elm, type, field) do {			\
-	if (XEN_STAILQ_FIRST((head)) == (elm)) {			\
-		XEN_STAILQ_REMOVE_HEAD((head), field);			\
-	}								\
-	else {								\
-		type *curelm = XEN_STAILQ_FIRST((head));		\
-		while (XEN_STAILQ_NEXT(curelm, field) != (elm))		\
-			curelm = XEN_STAILQ_NEXT(curelm, field);	\
-		XEN_STAILQ_REMOVE_AFTER(head, curelm, field);		\
-	}								\
-} while (0)
-
-#define XEN_STAILQ_REMOVE_AFTER(head, elm, field) do {			\
-	if ((XEN_STAILQ_NEXT(elm, field) =				\
-	     XEN_STAILQ_NEXT(XEN_STAILQ_NEXT(elm, field), field)) == 0)	\
-		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_STAILQ_REMOVE_HEAD(head, field) do {			\
-	if ((XEN_STAILQ_FIRST((head)) =					\
-	     XEN_STAILQ_NEXT(XEN_STAILQ_FIRST((head)), field)) == 0)	\
-		(head)->stqh_last = &XEN_STAILQ_FIRST((head));		\
-} while (0)
-
-#define XEN_STAILQ_SWAP(head1, head2, type) do {			\
-	type *swap_first = XEN_STAILQ_FIRST(head1);			\
-	type **swap_last = (head1)->stqh_last;				\
-	XEN_STAILQ_FIRST(head1) = XEN_STAILQ_FIRST(head2);		\
-	(head1)->stqh_last = (head2)->stqh_last;			\
-	XEN_STAILQ_FIRST(head2) = swap_first;				\
-	(head2)->stqh_last = swap_last;					\
-	if (XEN_STAILQ_EMPTY(head1))					\
-		(head1)->stqh_last = &XEN_STAILQ_FIRST(head1);		\
-	if (XEN_STAILQ_EMPTY(head2))					\
-		(head2)->stqh_last = &XEN_STAILQ_FIRST(head2);		\
-} while (0)
-
-
-/*
- * List declarations.
- */
-#define	XEN_LIST_HEAD(name, type)					\
-struct name {								\
-	type *lh_first;	/* first element */				\
-}
-
-#define	XEN_LIST_HEAD_INITIALIZER(head)					\
-	{ 0 }
-
-#define	XEN_LIST_ENTRY(type)						\
-struct {								\
-	type *le_next;	/* next element */				\
-	type **le_prev;	/* address of previous next element */		\
-}
-
-/*
- * List functions.
- */
-
-#define	XEN_LIST_EMPTY(head)	((head)->lh_first == 0)
-
-#define	XEN_LIST_FIRST(head)	((head)->lh_first)
-
-#define	XEN_LIST_FOREACH(var, head, field)				\
-	for ((var) = XEN_LIST_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_LIST_NEXT((var), field))
-
-#define	XEN_LIST_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_LIST_FIRST((head));				\
-	    (var) && ((tvar) = XEN_LIST_NEXT((var), field), 1);		\
-	    (var) = (tvar))
-
-#define	XEN_LIST_INIT(head) do {					\
-	XEN_LIST_FIRST((head)) = 0;					\
-} while (0)
-
-#define	XEN_LIST_INSERT_AFTER(listelm, elm, field) do {			\
-	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_NEXT((listelm), field)) != 0)\
-		XEN_LIST_NEXT((listelm), field)->field.le_prev =	\
-		    &XEN_LIST_NEXT((elm), field);			\
-	XEN_LIST_NEXT((listelm), field) = (elm);			\
-	(elm)->field.le_prev = &XEN_LIST_NEXT((listelm), field);	\
-} while (0)
-
-#define	XEN_LIST_INSERT_BEFORE(listelm, elm, field) do {		\
-	(elm)->field.le_prev = (listelm)->field.le_prev;		\
-	XEN_LIST_NEXT((elm), field) = (listelm);			\
-	*(listelm)->field.le_prev = (elm);				\
-	(listelm)->field.le_prev = &XEN_LIST_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_LIST_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_FIRST((head))) != 0)\
-		XEN_LIST_FIRST((head))->field.le_prev = &XEN_LIST_NEXT((elm), field);\
-	XEN_LIST_FIRST((head)) = (elm);					\
-	(elm)->field.le_prev = &XEN_LIST_FIRST((head));			\
-} while (0)
-
-#define	XEN_LIST_NEXT(elm, field)	((elm)->field.le_next)
-
-#define	XEN_LIST_REMOVE(elm, field) do {				\
-	if (XEN_LIST_NEXT((elm), field) != 0)				\
-		XEN_LIST_NEXT((elm), field)->field.le_prev =		\
-		    (elm)->field.le_prev;				\
-	*(elm)->field.le_prev = XEN_LIST_NEXT((elm), field);		\
-} while (0)
-
-#define XEN_LIST_SWAP(head1, head2, type, field) do {			\
-	type *swap_tmp = XEN_LIST_FIRST((head1));			\
-	XEN_LIST_FIRST((head1)) = XEN_LIST_FIRST((head2));		\
-	XEN_LIST_FIRST((head2)) = swap_tmp;				\
-	if ((swap_tmp = XEN_LIST_FIRST((head1))) != 0)			\
-		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head1));	\
-	if ((swap_tmp = XEN_LIST_FIRST((head2))) != 0)			\
-		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head2));	\
-} while (0)
-
-/*
- * Tail queue declarations.
- */
-#define	XEN_TAILQ_HEAD(name, type)					\
-struct name {								\
-	type *tqh_first;	/* first element */			\
-	type **tqh_last;	/* addr of last next element */		\
-}
-
-#define	XEN_TAILQ_HEAD_INITIALIZER(head)				\
-	{ 0, &(head).tqh_first }
-
-#define	XEN_TAILQ_ENTRY(type)						\
-struct {								\
-	type *tqe_next;	/* next element */				\
-	type **tqe_prev;	/* address of previous next element */	\
-}
-
-/*
- * Tail queue functions.
- */
-
-#define	XEN_TAILQ_CONCAT(head1, head2, field) do {			\
-	if (!XEN_TAILQ_EMPTY(head2)) {					\
-		*(head1)->tqh_last = (head2)->tqh_first;		\
-		(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last;	\
-		(head1)->tqh_last = (head2)->tqh_last;			\
-		XEN_TAILQ_INIT((head2));				\
-	}								\
-} while (0)
-
-#define	XEN_TAILQ_EMPTY(head)	((head)->tqh_first == 0)
-
-#define	XEN_TAILQ_FIRST(head)	((head)->tqh_first)
-
-#define	XEN_TAILQ_FOREACH(var, head, field)				\
-	for ((var) = XEN_TAILQ_FIRST((head));				\
-	    (var);							\
-	    (var) = XEN_TAILQ_NEXT((var), field))
-
-#define	XEN_TAILQ_FOREACH_SAFE(var, head, field, tvar)			\
-	for ((var) = XEN_TAILQ_FIRST((head));				\
-	    (var) && ((tvar) = XEN_TAILQ_NEXT((var), field), 1);	\
-	    (var) = (tvar))
-
-#define	XEN_TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
-	for ((var) = XEN_TAILQ_LAST((head), headname);			\
-	    (var);							\
-	    (var) = XEN_TAILQ_PREV((var), headname, field))
-
-#define	XEN_TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar)	\
-	for ((var) = XEN_TAILQ_LAST((head), headname);			\
-	    (var) && ((tvar) = XEN_TAILQ_PREV((var), headname, field), 1);\
-	    (var) = (tvar))
-
-#define	XEN_TAILQ_INIT(head) do {					\
-	XEN_TAILQ_FIRST((head)) = 0;					\
-	(head)->tqh_last = &XEN_TAILQ_FIRST((head));			\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
-	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_NEXT((listelm), field)) != 0)\
-		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
-		    &XEN_TAILQ_NEXT((elm), field);			\
-	else {								\
-		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
-	}								\
-	XEN_TAILQ_NEXT((listelm), field) = (elm);			\
-	(elm)->field.tqe_prev = &XEN_TAILQ_NEXT((listelm), field);	\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_BEFORE(listelm, elm, field) do {		\
-	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
-	XEN_TAILQ_NEXT((elm), field) = (listelm);			\
-	*(listelm)->field.tqe_prev = (elm);				\
-	(listelm)->field.tqe_prev = &XEN_TAILQ_NEXT((elm), field);	\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_HEAD(head, elm, field) do {			\
-	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_FIRST((head))) != 0)\
-		XEN_TAILQ_FIRST((head))->field.tqe_prev =		\
-		    &XEN_TAILQ_NEXT((elm), field);			\
-	else								\
-		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
-	XEN_TAILQ_FIRST((head)) = (elm);				\
-	(elm)->field.tqe_prev = &XEN_TAILQ_FIRST((head));		\
-} while (0)
-
-#define	XEN_TAILQ_INSERT_TAIL(head, elm, field) do {			\
-	XEN_TAILQ_NEXT((elm), field) = 0;				\
-	(elm)->field.tqe_prev = (head)->tqh_last;			\
-	*(head)->tqh_last = (elm);					\
-	(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define	XEN_TAILQ_LAST(head, headname)					\
-	(*(((struct headname *)((head)->tqh_last))->tqh_last))
-
-#define	XEN_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
-
-#define	XEN_TAILQ_PREV(elm, headname, field)				\
-	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
-
-#define	XEN_TAILQ_REMOVE(head, elm, field) do {				\
-	if ((XEN_TAILQ_NEXT((elm), field)) != 0)			\
-		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
-		    (elm)->field.tqe_prev;				\
-	else {								\
-		(head)->tqh_last = (elm)->field.tqe_prev;		\
-	}								\
-	*(elm)->field.tqe_prev = XEN_TAILQ_NEXT((elm), field);		\
-} while (0)
-
-#define XEN_TAILQ_SWAP(head1, head2, type, field) do {			\
-	type *swap_first = (head1)->tqh_first;				\
-	type **swap_last = (head1)->tqh_last;				\
-	(head1)->tqh_first = (head2)->tqh_first;			\
-	(head1)->tqh_last = (head2)->tqh_last;				\
-	(head2)->tqh_first = swap_first;				\
-	(head2)->tqh_last = swap_last;					\
-	if ((swap_first = (head1)->tqh_first) != 0)			\
-		swap_first->field.tqe_prev = &(head1)->tqh_first;	\
-	else								\
-		(head1)->tqh_last = &(head1)->tqh_first;		\
-	if ((swap_first = (head2)->tqh_first) != 0)			\
-		swap_first->field.tqe_prev = &(head2)->tqh_first;	\
-	else								\
-		(head2)->tqh_last = &(head2)->tqh_first;		\
-} while (0)
-
-#endif /* !XEN__SYS_QUEUE_H_ */
diff --git a/tools/include/libxl.h b/tools/include/libxl.h
index 51a9b6cfac..7ce978e83c 100644
--- a/tools/include/libxl.h
+++ b/tools/include/libxl.h
@@ -747,7 +747,7 @@
 typedef struct libxl__ctx libxl_ctx;
 
 #include <libxl_uuid.h>
-#include <_xen_list.h>
+#include <xen_list.h>
 
 /* API compatibility. */
 #ifdef LIBXL_API_VERSION
diff --git a/tools/include/xen_list.h b/tools/include/xen_list.h
new file mode 100644
index 0000000000..ce246f95c9
--- /dev/null
+++ b/tools/include/xen_list.h
@@ -0,0 +1,509 @@
+/*-
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)queue.h	8.5 (Berkeley) 8/20/94
+ * $FreeBSD$
+ */
+
+#ifndef XEN__SYS_QUEUE_H_
+#define	XEN__SYS_QUEUE_H_
+
+/* #include <sys/cdefs.h> */
+
+/*
+ * This file defines four types of data structures: singly-linked lists,
+ * singly-linked tail queues, lists and tail queues.
+ *
+ * A singly-linked list is headed by a single forward pointer. The elements
+ * are singly linked for minimum space and pointer manipulation overhead at
+ * the expense of O(n) removal for arbitrary elements. New elements can be
+ * added to the list after an existing element or at the head of the list.
+ * Elements being removed from the head of the list should use the explicit
+ * macro for this purpose for optimum efficiency. A singly-linked list may
+ * only be traversed in the forward direction.  Singly-linked lists are ideal
+ * for applications with large datasets and few or no removals or for
+ * implementing a LIFO queue.
+ *
+ * A singly-linked tail queue is headed by a pair of pointers, one to the
+ * head of the list and the other to the tail of the list. The elements are
+ * singly linked for minimum space and pointer manipulation overhead at the
+ * expense of O(n) removal for arbitrary elements. New elements can be added
+ * to the list after an existing element, at the head of the list, or at the
+ * end of the list. Elements being removed from the head of the tail queue
+ * should use the explicit macro for this purpose for optimum efficiency.
+ * A singly-linked tail queue may only be traversed in the forward direction.
+ * Singly-linked tail queues are ideal for applications with large datasets
+ * and few or no removals or for implementing a FIFO queue.
+ *
+ * A list is headed by a single forward pointer (or an array of forward
+ * pointers for a hash table header). The elements are doubly linked
+ * so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before
+ * or after an existing element or at the head of the list. A list
+ * may only be traversed in the forward direction.
+ *
+ * A tail queue is headed by a pair of pointers, one to the head of the
+ * list and the other to the tail of the list. The elements are doubly
+ * linked so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before or
+ * after an existing element, at the head of the list, or at the end of
+ * the list. A tail queue may be traversed in either direction.
+ *
+ * For details on the use of these macros, see the queue(3) manual page.
+ *
+ *
+ *				XEN_SLIST	XEN_LIST	XEN_STAILQ	XEN_TAILQ
+ * _HEAD			+	+	+	+
+ * _HEAD_INITIALIZER		+	+	+	+
+ * _ENTRY			+	+	+	+
+ * _INIT			+	+	+	+
+ * _EMPTY			+	+	+	+
+ * _FIRST			+	+	+	+
+ * _NEXT			+	+	+	+
+ * _PREV			-	-	-	+
+ * _LAST			-	-	+	+
+ * _FOREACH			+	+	+	+
+ * _FOREACH_SAFE		+	+	+	+
+ * _FOREACH_REVERSE		-	-	-	+
+ * _FOREACH_REVERSE_SAFE	-	-	-	+
+ * _INSERT_HEAD			+	+	+	+
+ * _INSERT_BEFORE		-	+	-	+
+ * _INSERT_AFTER		+	+	+	+
+ * _INSERT_TAIL			-	-	+	+
+ * _CONCAT			-	-	+	+
+ * _REMOVE_AFTER		+	-	+	-
+ * _REMOVE_HEAD			+	-	+	-
+ * _REMOVE			+	+	+	+
+ * _SWAP			+	+	+	+
+ *
+ */
+
+/*
+ * Singly-linked List declarations.
+ */
+#define	XEN_SLIST_HEAD(name, type)					\
+struct name {								\
+	type *slh_first;	/* first element */			\
+}
+
+#define	XEN_SLIST_HEAD_INITIALIZER(head)				\
+	{ 0 }
+
+#define	XEN_SLIST_ENTRY(type)						\
+struct {								\
+	type *sle_next;	/* next element */				\
+}
+
+/*
+ * Singly-linked List functions.
+ */
+#define	XEN_SLIST_EMPTY(head)	((head)->slh_first == 0)
+
+#define	XEN_SLIST_FIRST(head)	((head)->slh_first)
+
+#define	XEN_SLIST_FOREACH(var, head, field)				\
+	for ((var) = XEN_SLIST_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_SLIST_NEXT((var), field))
+
+#define	XEN_SLIST_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_SLIST_FIRST((head));				\
+	    (var) && ((tvar) = XEN_SLIST_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_SLIST_FOREACH_PREVPTR(var, varp, head, field)		\
+	for ((varp) = &XEN_SLIST_FIRST((head));				\
+	    ((var) = *(varp)) != 0;					\
+	    (varp) = &XEN_SLIST_NEXT((var), field))
+
+#define	XEN_SLIST_INIT(head) do {					\
+	XEN_SLIST_FIRST((head)) = 0;					\
+} while (0)
+
+#define	XEN_SLIST_INSERT_AFTER(slistelm, elm, field) do {		\
+	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_NEXT((slistelm), field);\
+	XEN_SLIST_NEXT((slistelm), field) = (elm);			\
+} while (0)
+
+#define	XEN_SLIST_INSERT_HEAD(head, elm, field) do {			\
+	XEN_SLIST_NEXT((elm), field) = XEN_SLIST_FIRST((head));		\
+	XEN_SLIST_FIRST((head)) = (elm);				\
+} while (0)
+
+#define	XEN_SLIST_NEXT(elm, field)	((elm)->field.sle_next)
+
+#define	XEN_SLIST_REMOVE(head, elm, type, field) do {			\
+	if (XEN_SLIST_FIRST((head)) == (elm)) {				\
+		XEN_SLIST_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		type *curelm = XEN_SLIST_FIRST((head));			\
+		while (XEN_SLIST_NEXT(curelm, field) != (elm))		\
+			curelm = XEN_SLIST_NEXT(curelm, field);		\
+		XEN_SLIST_REMOVE_AFTER(curelm, field);			\
+	}								\
+} while (0)
+
+#define XEN_SLIST_REMOVE_AFTER(elm, field) do {				\
+	XEN_SLIST_NEXT(elm, field) =					\
+	    XEN_SLIST_NEXT(XEN_SLIST_NEXT(elm, field), field);		\
+} while (0)
+
+#define	XEN_SLIST_REMOVE_HEAD(head, field) do {				\
+	XEN_SLIST_FIRST((head)) = XEN_SLIST_NEXT(XEN_SLIST_FIRST((head)), field);\
+} while (0)
+
+#define XEN_SLIST_SWAP(head1, head2, type) do {				\
+	type *swap_first = XEN_SLIST_FIRST(head1);			\
+	XEN_SLIST_FIRST(head1) = XEN_SLIST_FIRST(head2);		\
+	XEN_SLIST_FIRST(head2) = swap_first;				\
+} while (0)
+
+/*
+ * Singly-linked Tail queue declarations.
+ */
+#define	XEN_STAILQ_HEAD(name, type)					\
+struct name {								\
+	type *stqh_first;/* first element */				\
+	type **stqh_last;/* addr of last next element */		\
+}
+
+#define	XEN_STAILQ_HEAD_INITIALIZER(head)				\
+	{ 0, &(head).stqh_first }
+
+#define	XEN_STAILQ_ENTRY(type)						\
+struct {								\
+	type *stqe_next;	/* next element */			\
+}
+
+/*
+ * Singly-linked Tail queue functions.
+ */
+#define	XEN_STAILQ_CONCAT(head1, head2) do {				\
+	if (!XEN_STAILQ_EMPTY((head2))) {				\
+		*(head1)->stqh_last = (head2)->stqh_first;		\
+		(head1)->stqh_last = (head2)->stqh_last;		\
+		XEN_STAILQ_INIT((head2));				\
+	}								\
+} while (0)
+
+#define	XEN_STAILQ_EMPTY(head)	((head)->stqh_first == 0)
+
+#define	XEN_STAILQ_FIRST(head)	((head)->stqh_first)
+
+#define	XEN_STAILQ_FOREACH(var, head, field)				\
+	for((var) = XEN_STAILQ_FIRST((head));				\
+	   (var);							\
+	   (var) = XEN_STAILQ_NEXT((var), field))
+
+
+#define	XEN_STAILQ_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_STAILQ_FIRST((head));				\
+	    (var) && ((tvar) = XEN_STAILQ_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_STAILQ_INIT(head) do {					\
+	XEN_STAILQ_FIRST((head)) = 0;					\
+	(head)->stqh_last = &XEN_STAILQ_FIRST((head));			\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_AFTER(head, tqelm, elm, field) do {		\
+	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_NEXT((tqelm), field)) == 0)\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+	XEN_STAILQ_NEXT((tqelm), field) = (elm);			\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_STAILQ_NEXT((elm), field) = XEN_STAILQ_FIRST((head))) == 0)\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+	XEN_STAILQ_FIRST((head)) = (elm);				\
+} while (0)
+
+#define	XEN_STAILQ_INSERT_TAIL(head, elm, field) do {			\
+	XEN_STAILQ_NEXT((elm), field) = 0;				\
+	*(head)->stqh_last = (elm);					\
+	(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define	XEN_STAILQ_LAST(head, type, field)				\
+	(XEN_STAILQ_EMPTY((head)) ?					\
+		0 :							\
+	        ((type *)(void *)					\
+		((char *)((head)->stqh_last) - offsetof(type, field))))
+
+#define	XEN_STAILQ_NEXT(elm, field)	((elm)->field.stqe_next)
+
+#define	XEN_STAILQ_REMOVE(head, elm, type, field) do {			\
+	if (XEN_STAILQ_FIRST((head)) == (elm)) {			\
+		XEN_STAILQ_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		type *curelm = XEN_STAILQ_FIRST((head));		\
+		while (XEN_STAILQ_NEXT(curelm, field) != (elm))		\
+			curelm = XEN_STAILQ_NEXT(curelm, field);	\
+		XEN_STAILQ_REMOVE_AFTER(head, curelm, field);		\
+	}								\
+} while (0)
+
+#define XEN_STAILQ_REMOVE_AFTER(head, elm, field) do {			\
+	if ((XEN_STAILQ_NEXT(elm, field) =				\
+	     XEN_STAILQ_NEXT(XEN_STAILQ_NEXT(elm, field), field)) == 0)	\
+		(head)->stqh_last = &XEN_STAILQ_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_STAILQ_REMOVE_HEAD(head, field) do {			\
+	if ((XEN_STAILQ_FIRST((head)) =					\
+	     XEN_STAILQ_NEXT(XEN_STAILQ_FIRST((head)), field)) == 0)	\
+		(head)->stqh_last = &XEN_STAILQ_FIRST((head));		\
+} while (0)
+
+#define XEN_STAILQ_SWAP(head1, head2, type) do {			\
+	type *swap_first = XEN_STAILQ_FIRST(head1);			\
+	type **swap_last = (head1)->stqh_last;				\
+	XEN_STAILQ_FIRST(head1) = XEN_STAILQ_FIRST(head2);		\
+	(head1)->stqh_last = (head2)->stqh_last;			\
+	XEN_STAILQ_FIRST(head2) = swap_first;				\
+	(head2)->stqh_last = swap_last;					\
+	if (XEN_STAILQ_EMPTY(head1))					\
+		(head1)->stqh_last = &XEN_STAILQ_FIRST(head1);		\
+	if (XEN_STAILQ_EMPTY(head2))					\
+		(head2)->stqh_last = &XEN_STAILQ_FIRST(head2);		\
+} while (0)
+
+
+/*
+ * List declarations.
+ */
+#define	XEN_LIST_HEAD(name, type)					\
+struct name {								\
+	type *lh_first;	/* first element */				\
+}
+
+#define	XEN_LIST_HEAD_INITIALIZER(head)					\
+	{ 0 }
+
+#define	XEN_LIST_ENTRY(type)						\
+struct {								\
+	type *le_next;	/* next element */				\
+	type **le_prev;	/* address of previous next element */		\
+}
+
+/*
+ * List functions.
+ */
+
+#define	XEN_LIST_EMPTY(head)	((head)->lh_first == 0)
+
+#define	XEN_LIST_FIRST(head)	((head)->lh_first)
+
+#define	XEN_LIST_FOREACH(var, head, field)				\
+	for ((var) = XEN_LIST_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_LIST_NEXT((var), field))
+
+#define	XEN_LIST_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_LIST_FIRST((head));				\
+	    (var) && ((tvar) = XEN_LIST_NEXT((var), field), 1);		\
+	    (var) = (tvar))
+
+#define	XEN_LIST_INIT(head) do {					\
+	XEN_LIST_FIRST((head)) = 0;					\
+} while (0)
+
+#define	XEN_LIST_INSERT_AFTER(listelm, elm, field) do {			\
+	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_NEXT((listelm), field)) != 0)\
+		XEN_LIST_NEXT((listelm), field)->field.le_prev =	\
+		    &XEN_LIST_NEXT((elm), field);			\
+	XEN_LIST_NEXT((listelm), field) = (elm);			\
+	(elm)->field.le_prev = &XEN_LIST_NEXT((listelm), field);	\
+} while (0)
+
+#define	XEN_LIST_INSERT_BEFORE(listelm, elm, field) do {		\
+	(elm)->field.le_prev = (listelm)->field.le_prev;		\
+	XEN_LIST_NEXT((elm), field) = (listelm);			\
+	*(listelm)->field.le_prev = (elm);				\
+	(listelm)->field.le_prev = &XEN_LIST_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_LIST_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_LIST_NEXT((elm), field) = XEN_LIST_FIRST((head))) != 0)\
+		XEN_LIST_FIRST((head))->field.le_prev = &XEN_LIST_NEXT((elm), field);\
+	XEN_LIST_FIRST((head)) = (elm);					\
+	(elm)->field.le_prev = &XEN_LIST_FIRST((head));			\
+} while (0)
+
+#define	XEN_LIST_NEXT(elm, field)	((elm)->field.le_next)
+
+#define	XEN_LIST_REMOVE(elm, field) do {				\
+	if (XEN_LIST_NEXT((elm), field) != 0)				\
+		XEN_LIST_NEXT((elm), field)->field.le_prev =		\
+		    (elm)->field.le_prev;				\
+	*(elm)->field.le_prev = XEN_LIST_NEXT((elm), field);		\
+} while (0)
+
+#define XEN_LIST_SWAP(head1, head2, type, field) do {			\
+	type *swap_tmp = XEN_LIST_FIRST((head1));			\
+	XEN_LIST_FIRST((head1)) = XEN_LIST_FIRST((head2));		\
+	XEN_LIST_FIRST((head2)) = swap_tmp;				\
+	if ((swap_tmp = XEN_LIST_FIRST((head1))) != 0)			\
+		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head1));	\
+	if ((swap_tmp = XEN_LIST_FIRST((head2))) != 0)			\
+		swap_tmp->field.le_prev = &XEN_LIST_FIRST((head2));	\
+} while (0)
+
+/*
+ * Tail queue declarations.
+ */
+#define	XEN_TAILQ_HEAD(name, type)					\
+struct name {								\
+	type *tqh_first;	/* first element */			\
+	type **tqh_last;	/* addr of last next element */		\
+}
+
+#define	XEN_TAILQ_HEAD_INITIALIZER(head)				\
+	{ 0, &(head).tqh_first }
+
+#define	XEN_TAILQ_ENTRY(type)						\
+struct {								\
+	type *tqe_next;	/* next element */				\
+	type **tqe_prev;	/* address of previous next element */	\
+}
+
+/*
+ * Tail queue functions.
+ */
+
+#define	XEN_TAILQ_CONCAT(head1, head2, field) do {			\
+	if (!XEN_TAILQ_EMPTY(head2)) {					\
+		*(head1)->tqh_last = (head2)->tqh_first;		\
+		(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last;	\
+		(head1)->tqh_last = (head2)->tqh_last;			\
+		XEN_TAILQ_INIT((head2));				\
+	}								\
+} while (0)
+
+#define	XEN_TAILQ_EMPTY(head)	((head)->tqh_first == 0)
+
+#define	XEN_TAILQ_FIRST(head)	((head)->tqh_first)
+
+#define	XEN_TAILQ_FOREACH(var, head, field)				\
+	for ((var) = XEN_TAILQ_FIRST((head));				\
+	    (var);							\
+	    (var) = XEN_TAILQ_NEXT((var), field))
+
+#define	XEN_TAILQ_FOREACH_SAFE(var, head, field, tvar)			\
+	for ((var) = XEN_TAILQ_FIRST((head));				\
+	    (var) && ((tvar) = XEN_TAILQ_NEXT((var), field), 1);	\
+	    (var) = (tvar))
+
+#define	XEN_TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
+	for ((var) = XEN_TAILQ_LAST((head), headname);			\
+	    (var);							\
+	    (var) = XEN_TAILQ_PREV((var), headname, field))
+
+#define	XEN_TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar)	\
+	for ((var) = XEN_TAILQ_LAST((head), headname);			\
+	    (var) && ((tvar) = XEN_TAILQ_PREV((var), headname, field), 1);\
+	    (var) = (tvar))
+
+#define	XEN_TAILQ_INIT(head) do {					\
+	XEN_TAILQ_FIRST((head)) = 0;					\
+	(head)->tqh_last = &XEN_TAILQ_FIRST((head));			\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
+	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_NEXT((listelm), field)) != 0)\
+		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
+		    &XEN_TAILQ_NEXT((elm), field);			\
+	else {								\
+		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
+	}								\
+	XEN_TAILQ_NEXT((listelm), field) = (elm);			\
+	(elm)->field.tqe_prev = &XEN_TAILQ_NEXT((listelm), field);	\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_BEFORE(listelm, elm, field) do {		\
+	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
+	XEN_TAILQ_NEXT((elm), field) = (listelm);			\
+	*(listelm)->field.tqe_prev = (elm);				\
+	(listelm)->field.tqe_prev = &XEN_TAILQ_NEXT((elm), field);	\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((XEN_TAILQ_NEXT((elm), field) = XEN_TAILQ_FIRST((head))) != 0)\
+		XEN_TAILQ_FIRST((head))->field.tqe_prev =		\
+		    &XEN_TAILQ_NEXT((elm), field);			\
+	else								\
+		(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);	\
+	XEN_TAILQ_FIRST((head)) = (elm);				\
+	(elm)->field.tqe_prev = &XEN_TAILQ_FIRST((head));		\
+} while (0)
+
+#define	XEN_TAILQ_INSERT_TAIL(head, elm, field) do {			\
+	XEN_TAILQ_NEXT((elm), field) = 0;				\
+	(elm)->field.tqe_prev = (head)->tqh_last;			\
+	*(head)->tqh_last = (elm);					\
+	(head)->tqh_last = &XEN_TAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define	XEN_TAILQ_LAST(head, headname)					\
+	(*(((struct headname *)((head)->tqh_last))->tqh_last))
+
+#define	XEN_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
+
+#define	XEN_TAILQ_PREV(elm, headname, field)				\
+	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
+
+#define	XEN_TAILQ_REMOVE(head, elm, field) do {				\
+	if ((XEN_TAILQ_NEXT((elm), field)) != 0)			\
+		XEN_TAILQ_NEXT((elm), field)->field.tqe_prev =		\
+		    (elm)->field.tqe_prev;				\
+	else {								\
+		(head)->tqh_last = (elm)->field.tqe_prev;		\
+	}								\
+	*(elm)->field.tqe_prev = XEN_TAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define XEN_TAILQ_SWAP(head1, head2, type, field) do {			\
+	type *swap_first = (head1)->tqh_first;				\
+	type **swap_last = (head1)->tqh_last;				\
+	(head1)->tqh_first = (head2)->tqh_first;			\
+	(head1)->tqh_last = (head2)->tqh_last;				\
+	(head2)->tqh_first = swap_first;				\
+	(head2)->tqh_last = swap_last;					\
+	if ((swap_first = (head1)->tqh_first) != 0)			\
+		swap_first->field.tqe_prev = &(head1)->tqh_first;	\
+	else								\
+		(head1)->tqh_last = &(head1)->tqh_first;		\
+	if ((swap_first = (head2)->tqh_first) != 0)			\
+		swap_first->field.tqe_prev = &(head2)->tqh_first;	\
+	else								\
+		(head2)->tqh_last = &(head2)->tqh_first;		\
+} while (0)
+
+#endif /* !XEN__SYS_QUEUE_H_ */
diff --git a/tools/include/xentoolcore_internal.h b/tools/include/xentoolcore_internal.h
index deccefd612..1be014434d 100644
--- a/tools/include/xentoolcore_internal.h
+++ b/tools/include/xentoolcore_internal.h
@@ -27,7 +27,7 @@
 #include <stddef.h>
 
 #include "xentoolcore.h"
-#include "_xen_list.h"
+#include "xen_list.h"
 
 /*---------- active handle registration ----------*/
 
diff --git a/tools/libs/evtchn/minios.c b/tools/libs/evtchn/minios.c
index 8ff46de884..28743cb055 100644
--- a/tools/libs/evtchn/minios.c
+++ b/tools/libs/evtchn/minios.c
@@ -20,7 +20,7 @@
  * Split off from xc_minios.c
  */
 
-#include "_xen_list.h"
+#include "xen_list.h"
 #include <mini-os/types.h>
 #include <mini-os/os.h>
 #include <mini-os/lib.h>
diff --git a/tools/libs/light/libxl_qmp.c b/tools/libs/light/libxl_qmp.c
index 8faa102e4d..6b0cd607d8 100644
--- a/tools/libs/light/libxl_qmp.c
+++ b/tools/libs/light/libxl_qmp.c
@@ -63,7 +63,7 @@
 
 #include <yajl/yajl_gen.h>
 
-#include "_xen_list.h"
+#include "xen_list.h"
 #include "libxl_internal.h"
 
 /* #define DEBUG_RECEIVED */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/mm: Add an early PGT_validated exit in _get_page_type()
Message-Id: <E1o3xfU-0005SW-9U@xenbits.xenproject.org>
Date: Wed, 22 Jun 2022 10:33:04 +0000

commit 15d93068e3484cb14006e935734a1e6088f228fd
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 16 12:08:02 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 22 11:26:36 2022 +0100

    x86/mm: Add an early PGT_validated exit in _get_page_type()
    
    This is a continuation of the cleanup and commenting in:
      9186e96b199e ("x86/pv: Clean up _get_page_type()")
      8cc5036bc385 ("x86/pv: Fix ABAC cmpxchg() race in _get_page_type()")
    
    With the re-arranged and newly commented logic, it's now obvious that the
    second half of _get_page_type() only has work to do for page validation.
    
    Introduce an early exit for PGT_validated.  This makes the fastpath marginally
    faster, and simplifies the subsequent logic as it no longer needs to exclude
    the fully validated case.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/mm.c | 70 +++++++++++++++++++++++++++++++------------------------
 1 file changed, 39 insertions(+), 31 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ac74ae389c..57751d2ed7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3002,6 +3002,17 @@ static int _get_page_type(struct page_info *page, unsigned long type,
      * fully validated (PGT_[type] | PGT_validated | >0).
      */
 
+    /* If the page is fully validated, we're done. */
+    if ( likely(nx & PGT_validated) )
+        return 0;
+
+    /*
+     * The page is in the "validate locked" state.  We have exclusive access,
+     * and any concurrent callers are waiting in the cmpxchg() loop above.
+     *
+     * Exclusive access ends when PGT_validated or PGT_partial get set.
+     */
+
     if ( unlikely((x & PGT_count_mask) == 0) )
     {
         struct domain *d = page_get_owner(page);
@@ -3071,43 +3082,40 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
     }
 
-    if ( unlikely(!(nx & PGT_validated)) )
+    /*
+     * Flush the cache if there were previously non-coherent mappings of
+     * this page, and we're trying to use it as anything other than a
+     * writeable page.  This forces the page to be coherent before we
+     * validate its contents for safety.
+     */
+    if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
     {
-        /*
-         * Flush the cache if there were previously non-coherent mappings of
-         * this page, and we're trying to use it as anything other than a
-         * writeable page.  This forces the page to be coherent before we
-         * validate its contents for safety.
-         */
-        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
-        {
-            void *addr = __map_domain_page(page);
+        void *addr = __map_domain_page(page);
 
-            cache_flush(addr, PAGE_SIZE);
-            unmap_domain_page(addr);
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
 
-            page->u.inuse.type_info &= ~PGT_non_coherent;
-        }
+        page->u.inuse.type_info &= ~PGT_non_coherent;
+    }
 
-        /*
-         * No special validation needed for writable or shared pages.  Page
-         * tables and GDT/LDT need to have their contents audited.
-         *
-         * per validate_page(), non-atomic updates are fine here.
-         */
-        if ( type == PGT_writable_page || type == PGT_shared_page )
-            page->u.inuse.type_info |= PGT_validated;
-        else
+    /*
+     * No special validation needed for writable or shared pages.  Page
+     * tables and GDT/LDT need to have their contents audited.
+     *
+     * per validate_page(), non-atomic updates are fine here.
+     */
+    if ( type == PGT_writable_page || type == PGT_shared_page )
+        page->u.inuse.type_info |= PGT_validated;
+    else
+    {
+        if ( !(x & PGT_partial) )
         {
-            if ( !(x & PGT_partial) )
-            {
-                page->nr_validated_ptes = 0;
-                page->partial_flags = 0;
-                page->linear_pt_count = 0;
-            }
-
-            rc = validate_page(page, type, preemptible);
+            page->nr_validated_ptes = 0;
+            page->partial_flags = 0;
+            page->linear_pt_count = 0;
         }
+
+        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: smpboot: Allocate the CPU sibling/core maps while preparing the CPU
Message-Id: <E1o44ZD-0007xg-UV@xenbits.xenproject.org>
Date: Wed, 22 Jun 2022 17:55:03 +0000

commit 65f684b728f779e170335e9e0cbbf82f7e1c7e5b
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 22 18:51:17 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 22 18:52:24 2022 +0100

    xen/arm: smpboot: Allocate the CPU sibling/core maps while preparing the CPU
    
    Commit 5047cd1d5dea "xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in
    xmalloc()" extended the checks in _xmalloc() to catch any use of the
    helpers from context with interrupts disabled.
    
    Unfortunately, the rule is not followed when allocating the CPU
    sibling/core maps.
    
    (XEN) Xen call trace:
    (XEN)    [<00238a5c>] _xmalloc+0xfc/0x314 (PC)
    (XEN)    [<00000000>] 00000000 (LR)
    (XEN)    [<00238c8c>] _xzalloc+0x18/0x4c
    (XEN)    [<00288cb4>] smpboot.c#setup_cpu_sibling_map+0x38/0x138
    (XEN)    [<00289024>] start_secondary+0x1b4/0x270
    (XEN)    [<40010170>] 40010170
    (XEN)
    (XEN)
    (XEN) ****************************************
    (XEN) Panic on CPU 2:
    (XEN) Assertion '!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1)' failed at common/xmalloc_tlsf.c:601
    (XEN) ****************************************
    
    This is happening because zalloc_cpumask_var() may allocate memory
    if NR_CPUS is > 2 * sizeof(unsigned long).
    
    Avoid the problem by allocating the CPU sibling/core maps while
    preparing the CPU.
    
    This also has the benefit to remove a panic() in the secondary CPU
    code.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/smpboot.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 3f62f3a44f..9e92279563 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -83,15 +83,17 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask);
 static bool __read_mostly opt_hmp_unsafe = false;
 boolean_param("hmp-unsafe", opt_hmp_unsafe);
 
-static void setup_cpu_sibling_map(int cpu)
+static int setup_cpu_sibling_map(int cpu)
 {
     if ( !zalloc_cpumask_var(&per_cpu(cpu_sibling_mask, cpu)) ||
          !zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) )
-        panic("No memory for CPU sibling/core maps\n");
+        return -ENOMEM;
 
     /* A CPU is a sibling with itself and is always on its own core. */
     cpumask_set_cpu(cpu, per_cpu(cpu_sibling_mask, cpu));
     cpumask_set_cpu(cpu, per_cpu(cpu_core_mask, cpu));
+
+    return 0;
 }
 
 static void remove_cpu_sibling_map(int cpu)
@@ -298,9 +300,14 @@ unsigned int __init smp_get_max_cpus(void)
 void __init
 smp_prepare_cpus(void)
 {
+    int rc;
+
     cpumask_copy(&cpu_present_map, &cpu_possible_map);
 
-    setup_cpu_sibling_map(0);
+    rc = setup_cpu_sibling_map(0);
+    if ( rc )
+        panic("Unable to allocate CPU sibling/core maps\n");
+
 }
 
 /* Boot the current CPU */
@@ -369,8 +376,6 @@ void start_secondary(void)
 
     set_current(idle_vcpu[cpuid]);
 
-    setup_cpu_sibling_map(cpuid);
-
     /* Run local notifiers */
     notify_cpu_starting(cpuid);
     /*
@@ -539,9 +544,19 @@ static int cpu_smpboot_callback(struct notifier_block *nfb,
                                 void *hcpu)
 {
     unsigned int cpu = (unsigned long)hcpu;
+    unsigned int rc = 0;
 
     switch ( action )
     {
+    case CPU_UP_PREPARE:
+        rc = setup_cpu_sibling_map(cpu);
+        if ( rc )
+            printk(XENLOG_ERR
+                   "Unable to allocate CPU sibling/core map  for CPU%u\n",
+                   cpu);
+
+        break;
+
     case CPU_DEAD:
         remove_cpu_sibling_map(cpu);
         break;
@@ -549,7 +564,7 @@ static int cpu_smpboot_callback(struct notifier_block *nfb,
         break;
     }
 
-    return NOTIFY_DONE;
+    return !rc ? NOTIFY_DONE : notifier_from_errno(rc);
 }
 
 static struct notifier_block cpu_smpboot_nfb = {
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86/mm: Add an early PGT_validated exit in _get_page_type()
Message-Id: <E1o4BN7-0003bD-F8@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 01:11:01 +0000

commit 15d93068e3484cb14006e935734a1e6088f228fd
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Thu Jun 16 12:08:02 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Jun 22 11:26:36 2022 +0100

    x86/mm: Add an early PGT_validated exit in _get_page_type()
    
    This is a continuation of the cleanup and commenting in:
      9186e96b199e ("x86/pv: Clean up _get_page_type()")
      8cc5036bc385 ("x86/pv: Fix ABAC cmpxchg() race in _get_page_type()")
    
    With the re-arranged and newly commented logic, it's now obvious that the
    second half of _get_page_type() only has work to do for page validation.
    
    Introduce an early exit for PGT_validated.  This makes the fastpath marginally
    faster, and simplifies the subsequent logic as it no longer needs to exclude
    the fully validated case.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/mm.c | 70 +++++++++++++++++++++++++++++++------------------------
 1 file changed, 39 insertions(+), 31 deletions(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ac74ae389c..57751d2ed7 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -3002,6 +3002,17 @@ static int _get_page_type(struct page_info *page, unsigned long type,
      * fully validated (PGT_[type] | PGT_validated | >0).
      */
 
+    /* If the page is fully validated, we're done. */
+    if ( likely(nx & PGT_validated) )
+        return 0;
+
+    /*
+     * The page is in the "validate locked" state.  We have exclusive access,
+     * and any concurrent callers are waiting in the cmpxchg() loop above.
+     *
+     * Exclusive access ends when PGT_validated or PGT_partial get set.
+     */
+
     if ( unlikely((x & PGT_count_mask) == 0) )
     {
         struct domain *d = page_get_owner(page);
@@ -3071,43 +3082,40 @@ static int _get_page_type(struct page_info *page, unsigned long type,
         }
     }
 
-    if ( unlikely(!(nx & PGT_validated)) )
+    /*
+     * Flush the cache if there were previously non-coherent mappings of
+     * this page, and we're trying to use it as anything other than a
+     * writeable page.  This forces the page to be coherent before we
+     * validate its contents for safety.
+     */
+    if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
     {
-        /*
-         * Flush the cache if there were previously non-coherent mappings of
-         * this page, and we're trying to use it as anything other than a
-         * writeable page.  This forces the page to be coherent before we
-         * validate its contents for safety.
-         */
-        if ( (nx & PGT_non_coherent) && type != PGT_writable_page )
-        {
-            void *addr = __map_domain_page(page);
+        void *addr = __map_domain_page(page);
 
-            cache_flush(addr, PAGE_SIZE);
-            unmap_domain_page(addr);
+        cache_flush(addr, PAGE_SIZE);
+        unmap_domain_page(addr);
 
-            page->u.inuse.type_info &= ~PGT_non_coherent;
-        }
+        page->u.inuse.type_info &= ~PGT_non_coherent;
+    }
 
-        /*
-         * No special validation needed for writable or shared pages.  Page
-         * tables and GDT/LDT need to have their contents audited.
-         *
-         * per validate_page(), non-atomic updates are fine here.
-         */
-        if ( type == PGT_writable_page || type == PGT_shared_page )
-            page->u.inuse.type_info |= PGT_validated;
-        else
+    /*
+     * No special validation needed for writable or shared pages.  Page
+     * tables and GDT/LDT need to have their contents audited.
+     *
+     * per validate_page(), non-atomic updates are fine here.
+     */
+    if ( type == PGT_writable_page || type == PGT_shared_page )
+        page->u.inuse.type_info |= PGT_validated;
+    else
+    {
+        if ( !(x & PGT_partial) )
         {
-            if ( !(x & PGT_partial) )
-            {
-                page->nr_validated_ptes = 0;
-                page->partial_flags = 0;
-                page->linear_pt_count = 0;
-            }
-
-            rc = validate_page(page, type, preemptible);
+            page->nr_validated_ptes = 0;
+            page->partial_flags = 0;
+            page->linear_pt_count = 0;
         }
+
+        rc = validate_page(page, type, preemptible);
     }
 
  out:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86emul/test: improve failure location identification for FMA sub-test
Message-Id: <E1o4HVU-0007Bd-Pe@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 07:44:04 +0000

commit 21b4d45bbfd0e901bb77dd8a732bb14702ccec5e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 23 09:38:58 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:38:58 2022 +0200

    x86emul/test: improve failure location identification for FMA sub-test
    
    When some FMA set of insns is included in the base instruction set (XOP,
    AVX512F, and AVX512-FP16 at present), simd_test() simply invokes
    fma_test(), negating its return value. In case of a failure this would
    yield a value close to 4G, which doesn't lend itself to easy
    identification of the failing test case. Recognize the case in
    simd_check_regs() and emit alternative output identifying FMA.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 tools/tests/x86_emulator/test_x86_emulator.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c
index ac250c11c4..31586f8057 100644
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -259,7 +259,10 @@ static bool simd_check_regs(const struct cpu_user_regs *regs)
 {
     if ( !regs->eax )
         return true;
-    printf("[line %u] ", (unsigned int)regs->eax);
+    if ( (int)regs->eax > 0 )
+        printf("[line %u] ", (unsigned int)regs->eax);
+    else
+        printf("[FMA line %u] ", (unsigned int)-regs->eax);
     return false;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] maintainers: add me as reviewer for Mini-OS
Message-Id: <E1o4HVe-0007Df-SW@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 07:44:14 +0000

commit f4e6748993f25b060c6357937a5ff454e131a62f
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Thu Jun 23 09:39:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:39:23 2022 +0200

    maintainers: add me as reviewer for Mini-OS
    
    I'm the main contributor for Mini-OS since several years now.
    
    Add myself as reviewer.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a0b0d88ea4..8a99526784 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -419,6 +419,7 @@ F:	xen/test/livepatch/*
 MINI-OS
 M:	Samuel Thibault <samuel.thibault@ens-lyon.org>
 R:	Wei Liu <wl@xen.org>
+R:	Juergen Gross <jgross@suse.com>
 S:	Supported
 L:	minios-devel@lists.xenproject.org
 T:	git https://xenbits.xenproject.org/git-http/mini-os.git
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] build,include: rework shell script for headers++.chk
Message-Id: <E1o4HVp-0007EH-0G@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 07:44:25 +0000

commit 61ac7919a6a38a24d26fd1b57a2511beb0724e99
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Thu Jun 23 09:40:12 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:40:12 2022 +0200

    build,include: rework shell script for headers++.chk
    
    The command line generated for headers++.chk by make is quite long,
    and in some environment it is too long. This issue have been seen in
    Yocto build environment.
    
    Error messages:
        make[9]: execvp: /bin/sh: Argument list too long
        make[9]: *** [include/Makefile:181: include/headers++.chk] Error 127
    
    Rework so that we do the foreach loop in shell rather that make to
    reduce the command line size by a lot. We also need a way to get
    headers prerequisite for some public headers so we use a switch "case"
    in shell to be able to do some simple pattern matching. Variables
    alone in POSIX shell don't allow to work with associative array or
    variables with "/".
    
    Also rework headers99.chk as it has a similar implementation, even if
    with only two headers to check the command line isn't too long at the
    moment.
    
    Fixes: 28e13c7f43 ("build: xen/include: use if_changed")
    Reported-by: Bertrand Marquis <Bertrand.Marquis@arm.com>
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Tested-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 37 +++++++++++++++++++++++++++++--------
 1 file changed, 29 insertions(+), 8 deletions(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 617599df7e..510f65c92a 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -141,13 +141,24 @@ cmd_header_chk = \
 quiet_cmd_headers99_chk = CHK     $@
 define cmd_headers99_chk
 	rm -f $@.new; \
-	$(foreach i, $(filter %.h,$^),                                        \
-	    echo "#include "\"$(i)\"                                          \
+	get_prereq() {                                                        \
+	    case $$1 in                                                       \
+	    $(foreach i, $(filter %.h,$^),                                    \
+	    $(if $($(patsubst $(srctree)/%,%,$(i))-prereq),                   \
+	        $(i)$(close)                                                  \
+	        echo "$(foreach j, $($(patsubst $(srctree)/%,%,$(i))-prereq), \
+	                -include $(j).h)";;))                                 \
+	    *) ;;                                                             \
+	    esac;                                                             \
+	};                                                                    \
+	for i in $(filter %.h,$^); do                                         \
+	    echo "#include "\"$$i\"                                           \
 	    | $(CC) -x c -std=c99 -Wall -Werror                               \
 	      -include stdint.h                                               \
-	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include $(j).h) \
+	      $$(get_prereq $$i)                                              \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;) \
+	    || exit $$?; echo $$i >> $@.new;                                  \
+	done;                                                                 \
 	mv $@.new $@
 endef
 
@@ -158,13 +169,23 @@ define cmd_headerscxx_chk
 	    touch $@.new;                                                     \
 	    exit 0;                                                           \
 	fi;                                                                   \
-	$(foreach i, $(filter %.h,$^),                                        \
-	    echo "#include "\"$(i)\"                                          \
+	get_prereq() {                                                        \
+	    case $$1 in                                                       \
+	    $(foreach i, $(filter %.h,$^),                                    \
+	    $(if $($(patsubst $(srctree)/%,%,$(i))-prereq),                   \
+	        $(i)$(close)                                                  \
+	        echo "$(foreach j, $($(patsubst $(srctree)/%,%,$(i))-prereq), \
+	                -include c$(j))";;))                                  \
+	    *) ;;                                                             \
+	    esac;                                                             \
+	};                                                                    \
+	for i in $(filter %.h,$^); do                                         \
+	    echo "#include "\"$$i\"                                           \
 	    | $(CXX) -x c++ -std=gnu++98 -Wall -Werror -D__XEN_TOOLS__        \
 	      -include stdint.h -include $(srcdir)/public/xen.h               \
-	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include c$(j)) \
+	      $$(get_prereq $$i)                                              \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;) \
+	    || exit $$?; echo $$i >> $@.new; done;                            \
 	mv $@.new $@
 endef
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: smpboot: Allocate the CPU sibling/core maps while preparing the CPU
Message-Id: <E1o4K8z-0006me-UX@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 10:33:01 +0000

commit 65f684b728f779e170335e9e0cbbf82f7e1c7e5b
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Wed Jun 22 18:51:17 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Wed Jun 22 18:52:24 2022 +0100

    xen/arm: smpboot: Allocate the CPU sibling/core maps while preparing the CPU
    
    Commit 5047cd1d5dea "xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in
    xmalloc()" extended the checks in _xmalloc() to catch any use of the
    helpers from context with interrupts disabled.
    
    Unfortunately, the rule is not followed when allocating the CPU
    sibling/core maps.
    
    (XEN) Xen call trace:
    (XEN)    [<00238a5c>] _xmalloc+0xfc/0x314 (PC)
    (XEN)    [<00000000>] 00000000 (LR)
    (XEN)    [<00238c8c>] _xzalloc+0x18/0x4c
    (XEN)    [<00288cb4>] smpboot.c#setup_cpu_sibling_map+0x38/0x138
    (XEN)    [<00289024>] start_secondary+0x1b4/0x270
    (XEN)    [<40010170>] 40010170
    (XEN)
    (XEN)
    (XEN) ****************************************
    (XEN) Panic on CPU 2:
    (XEN) Assertion '!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1)' failed at common/xmalloc_tlsf.c:601
    (XEN) ****************************************
    
    This is happening because zalloc_cpumask_var() may allocate memory
    if NR_CPUS is > 2 * sizeof(unsigned long).
    
    Avoid the problem by allocating the CPU sibling/core maps while
    preparing the CPU.
    
    This also has the benefit to remove a panic() in the secondary CPU
    code.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/smpboot.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 3f62f3a44f..9e92279563 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -83,15 +83,17 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask);
 static bool __read_mostly opt_hmp_unsafe = false;
 boolean_param("hmp-unsafe", opt_hmp_unsafe);
 
-static void setup_cpu_sibling_map(int cpu)
+static int setup_cpu_sibling_map(int cpu)
 {
     if ( !zalloc_cpumask_var(&per_cpu(cpu_sibling_mask, cpu)) ||
          !zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) )
-        panic("No memory for CPU sibling/core maps\n");
+        return -ENOMEM;
 
     /* A CPU is a sibling with itself and is always on its own core. */
     cpumask_set_cpu(cpu, per_cpu(cpu_sibling_mask, cpu));
     cpumask_set_cpu(cpu, per_cpu(cpu_core_mask, cpu));
+
+    return 0;
 }
 
 static void remove_cpu_sibling_map(int cpu)
@@ -298,9 +300,14 @@ unsigned int __init smp_get_max_cpus(void)
 void __init
 smp_prepare_cpus(void)
 {
+    int rc;
+
     cpumask_copy(&cpu_present_map, &cpu_possible_map);
 
-    setup_cpu_sibling_map(0);
+    rc = setup_cpu_sibling_map(0);
+    if ( rc )
+        panic("Unable to allocate CPU sibling/core maps\n");
+
 }
 
 /* Boot the current CPU */
@@ -369,8 +376,6 @@ void start_secondary(void)
 
     set_current(idle_vcpu[cpuid]);
 
-    setup_cpu_sibling_map(cpuid);
-
     /* Run local notifiers */
     notify_cpu_starting(cpuid);
     /*
@@ -539,9 +544,19 @@ static int cpu_smpboot_callback(struct notifier_block *nfb,
                                 void *hcpu)
 {
     unsigned int cpu = (unsigned long)hcpu;
+    unsigned int rc = 0;
 
     switch ( action )
     {
+    case CPU_UP_PREPARE:
+        rc = setup_cpu_sibling_map(cpu);
+        if ( rc )
+            printk(XENLOG_ERR
+                   "Unable to allocate CPU sibling/core map  for CPU%u\n",
+                   cpu);
+
+        break;
+
     case CPU_DEAD:
         remove_cpu_sibling_map(cpu);
         break;
@@ -549,7 +564,7 @@ static int cpu_smpboot_callback(struct notifier_block *nfb,
         break;
     }
 
-    return NOTIFY_DONE;
+    return !rc ? NOTIFY_DONE : notifier_from_errno(rc);
 }
 
 static struct notifier_block cpu_smpboot_nfb = {
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenstored: Harden corrupt()
Message-Id: <E1o4MMS-000630-AG@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 12:55:04 +0000

commit db3382dd4f468c763512d6bf91c96773395058fb
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Thu Jun 23 13:43:23 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 13:44:10 2022 +0100

    tools/xenstored: Harden corrupt()
    
    At the moment, corrupt() is neither checking for allocation failure
    nor freeing the allocated memory.
    
    Harden the code by printing ENOMEM if the allocation failed and
    free 'str' after the last use.
    
    This is not considered to be a security issue because corrupt() should
    only be called when Xenstored thinks the database is corrupted. Note
    that the trigger (i.e. a guest reliably provoking the call) would be
    a security issue.
    
    Fixes: 06d17943f0cd ("Added a basic integrity checker, and some basic ability to recover from store")
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/xenstore/xenstored_core.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c
index fa733e714e..8867f93431 100644
--- a/tools/xenstore/xenstored_core.c
+++ b/tools/xenstore/xenstored_core.c
@@ -2065,7 +2065,10 @@ void corrupt(struct connection *conn, const char *fmt, ...)
 	va_end(arglist);
 
 	log("corruption detected by connection %i: err %s: %s",
-	    conn ? (int)conn->id : -1, strerror(saved_errno), str);
+	    conn ? (int)conn->id : -1, strerror(saved_errno),
+	    str ?: "ENOMEM");
+
+	talloc_free(str);
 
 	check_store();
 }
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/common: device_tree: Fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o4Ryq-0003CE-9y@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 18:55:04 +0000

commit 7e1ed5e9341c2820c40d1a58aa35545d604311c3
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:57 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:44:48 2022 +0100

    xen/common: device_tree: Fix MISRA C 2012 Rule 8.7 violation
    
    The function __dt_n_size_cells() is referenced only in device_tree.c.
    Change the linkage of the function from external to internal by adding
    the storage-class specifier static to the function definition.
    
    This patch aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/common/device_tree.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/device_tree.c b/xen/common/device_tree.c
index 0e8798bd24..6c9712ab7b 100644
--- a/xen/common/device_tree.c
+++ b/xen/common/device_tree.c
@@ -496,7 +496,7 @@ static int __dt_n_addr_cells(const struct dt_device_node *np, bool_t parent)
     return DT_ROOT_NODE_ADDR_CELLS_DEFAULT;
 }
 
-int __dt_n_size_cells(const struct dt_device_node *np, bool_t parent)
+static int __dt_n_size_cells(const struct dt_device_node *np, bool_t parent)
 {
     const __be32 *ip;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: shutdown: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4Rz0-0003Co-El@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 18:55:14 +0000

commit f8af00d1a6abe46dca31c197d30cb5118d54cd54
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:12 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:26 2022 +0100

    xen/arm: shutdown: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/shutdown.h> so that the declarations of the functions
    machine_halt() and machine_restart(), which have external linkage, are visible
    before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/shutdown.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/shutdown.c b/xen/arch/arm/shutdown.c
index 3dc6819d56..5550f50f61 100644
--- a/xen/arch/arm/shutdown.c
+++ b/xen/arch/arm/shutdown.c
@@ -2,6 +2,7 @@
 #include <xen/cpu.h>
 #include <xen/delay.h>
 #include <xen/lib.h>
+#include <xen/shutdown.h>
 #include <xen/smp.h>
 #include <asm/platform.h>
 #include <asm/psci.h>
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/lib: list-sort: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4RzA-0003DI-HZ@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 18:55:24 +0000

commit ab6c273ebc2f238c7ecb5e8c985570cf1d8a28af
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:13 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:26 2022 +0100

    xen/lib: list-sort: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/list_sort.h> so that the declaration of the function
    list_sort(), which has external linkage, is visible before the function
    definition.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/lib/list-sort.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/lib/list-sort.c b/xen/lib/list-sort.c
index f8d8bbf281..de1af2ef8b 100644
--- a/xen/lib/list-sort.c
+++ b/xen/lib/list-sort.c
@@ -16,6 +16,7 @@
  */
 
 #include <xen/list.h>
+#include <xen/list_sort.h>
 
 #define MAX_LIST_LENGTH_BITS 20
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/common: gunzip: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4RzK-0003ED-Ka@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 18:55:34 +0000

commit 21a41a6164305bbc66ff1e42ffc11301712f6d65
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:14 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:27 2022 +0100

    xen/common: gunzip: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/gunzip.h> so that the declarations of functions gzip_check()
    and perform_gunzip(), which have external linkage, are visible before the
    function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/common/gunzip.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/common/gunzip.c b/xen/common/gunzip.c
index b9ecc17e44..aa16fec4bb 100644
--- a/xen/common/gunzip.c
+++ b/xen/common/gunzip.c
@@ -1,4 +1,5 @@
 #include <xen/errno.h>
+#include <xen/gunzip.h>
 #include <xen/init.h>
 #include <xen/lib.h>
 #include <xen/mm.h>
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: vtimer: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4S3g-0003We-K8@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 19:00:04 +0000

commit 6b2372e2969fed0e265cbdbc13b08de2634ea210
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 21 18:44:01 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:54:49 2022 +0100

    xen/arm: vtimer: Fix MISRA C 2012 Rule 8.4 violation
    
    Include vtimer.h so that the declarations of vtimer functions with external
    linkage are visible before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/vtimer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 5bb5970f58..5f26463354 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -29,6 +29,7 @@
 #include <asm/time.h>
 #include <asm/vgic.h>
 #include <asm/vreg.h>
+#include <asm/vtimer.h>
 #include <asm/regs.h>
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: vtimer: Remove duplicate header
Message-Id: <E1o4S3q-0003Xq-Nx@xenbits.xenproject.org>
Date: Thu, 23 Jun 2022 19:00:14 +0000

commit 7c1f724dd95cf627f72c96d310b6b7d487bc2281
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 21 18:44:02 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:54:49 2022 +0100

    xen/arm: vtimer: Remove duplicate header
    
    The header file <asm/regs.h> is already included above and can be removed here.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/vtimer.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 5f26463354..6b78fea77d 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -30,7 +30,6 @@
 #include <asm/vgic.h>
 #include <asm/vreg.h>
 #include <asm/vtimer.h>
-#include <asm/regs.h>
 
 /*
  * Check if regs is allowed access, user_gate is tail end of a
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86emul/test: improve failure location identification for FMA sub-test
Message-Id: <E1o4d2w-0004lv-1B@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 06:44:02 +0000

commit 21b4d45bbfd0e901bb77dd8a732bb14702ccec5e
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Thu Jun 23 09:38:58 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:38:58 2022 +0200

    x86emul/test: improve failure location identification for FMA sub-test
    
    When some FMA set of insns is included in the base instruction set (XOP,
    AVX512F, and AVX512-FP16 at present), simd_test() simply invokes
    fma_test(), negating its return value. In case of a failure this would
    yield a value close to 4G, which doesn't lend itself to easy
    identification of the failing test case. Recognize the case in
    simd_check_regs() and emit alternative output identifying FMA.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 tools/tests/x86_emulator/test_x86_emulator.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c
index ac250c11c4..31586f8057 100644
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -259,7 +259,10 @@ static bool simd_check_regs(const struct cpu_user_regs *regs)
 {
     if ( !regs->eax )
         return true;
-    printf("[line %u] ", (unsigned int)regs->eax);
+    if ( (int)regs->eax > 0 )
+        printf("[line %u] ", (unsigned int)regs->eax);
+    else
+        printf("[FMA line %u] ", (unsigned int)-regs->eax);
     return false;
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] maintainers: add me as reviewer for Mini-OS
Message-Id: <E1o4d36-0004nt-4K@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 06:44:12 +0000

commit f4e6748993f25b060c6357937a5ff454e131a62f
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Thu Jun 23 09:39:23 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:39:23 2022 +0200

    maintainers: add me as reviewer for Mini-OS
    
    I'm the main contributor for Mini-OS since several years now.
    
    Add myself as reviewer.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a0b0d88ea4..8a99526784 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -419,6 +419,7 @@ F:	xen/test/livepatch/*
 MINI-OS
 M:	Samuel Thibault <samuel.thibault@ens-lyon.org>
 R:	Wei Liu <wl@xen.org>
+R:	Juergen Gross <jgross@suse.com>
 S:	Supported
 L:	minios-devel@lists.xenproject.org
 T:	git https://xenbits.xenproject.org/git-http/mini-os.git
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] build,include: rework shell script for headers++.chk
Message-Id: <E1o4d3G-0004oO-7G@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 06:44:22 +0000

commit 61ac7919a6a38a24d26fd1b57a2511beb0724e99
Author:     Anthony PERARD <anthony.perard@citrix.com>
AuthorDate: Thu Jun 23 09:40:12 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Jun 23 09:40:12 2022 +0200

    build,include: rework shell script for headers++.chk
    
    The command line generated for headers++.chk by make is quite long,
    and in some environment it is too long. This issue have been seen in
    Yocto build environment.
    
    Error messages:
        make[9]: execvp: /bin/sh: Argument list too long
        make[9]: *** [include/Makefile:181: include/headers++.chk] Error 127
    
    Rework so that we do the foreach loop in shell rather that make to
    reduce the command line size by a lot. We also need a way to get
    headers prerequisite for some public headers so we use a switch "case"
    in shell to be able to do some simple pattern matching. Variables
    alone in POSIX shell don't allow to work with associative array or
    variables with "/".
    
    Also rework headers99.chk as it has a similar implementation, even if
    with only two headers to check the command line isn't too long at the
    moment.
    
    Fixes: 28e13c7f43 ("build: xen/include: use if_changed")
    Reported-by: Bertrand Marquis <Bertrand.Marquis@arm.com>
    Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Tested-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/Makefile | 37 +++++++++++++++++++++++++++++--------
 1 file changed, 29 insertions(+), 8 deletions(-)

diff --git a/xen/include/Makefile b/xen/include/Makefile
index 617599df7e..510f65c92a 100644
--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -141,13 +141,24 @@ cmd_header_chk = \
 quiet_cmd_headers99_chk = CHK     $@
 define cmd_headers99_chk
 	rm -f $@.new; \
-	$(foreach i, $(filter %.h,$^),                                        \
-	    echo "#include "\"$(i)\"                                          \
+	get_prereq() {                                                        \
+	    case $$1 in                                                       \
+	    $(foreach i, $(filter %.h,$^),                                    \
+	    $(if $($(patsubst $(srctree)/%,%,$(i))-prereq),                   \
+	        $(i)$(close)                                                  \
+	        echo "$(foreach j, $($(patsubst $(srctree)/%,%,$(i))-prereq), \
+	                -include $(j).h)";;))                                 \
+	    *) ;;                                                             \
+	    esac;                                                             \
+	};                                                                    \
+	for i in $(filter %.h,$^); do                                         \
+	    echo "#include "\"$$i\"                                           \
 	    | $(CC) -x c -std=c99 -Wall -Werror                               \
 	      -include stdint.h                                               \
-	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include $(j).h) \
+	      $$(get_prereq $$i)                                              \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;) \
+	    || exit $$?; echo $$i >> $@.new;                                  \
+	done;                                                                 \
 	mv $@.new $@
 endef
 
@@ -158,13 +169,23 @@ define cmd_headerscxx_chk
 	    touch $@.new;                                                     \
 	    exit 0;                                                           \
 	fi;                                                                   \
-	$(foreach i, $(filter %.h,$^),                                        \
-	    echo "#include "\"$(i)\"                                          \
+	get_prereq() {                                                        \
+	    case $$1 in                                                       \
+	    $(foreach i, $(filter %.h,$^),                                    \
+	    $(if $($(patsubst $(srctree)/%,%,$(i))-prereq),                   \
+	        $(i)$(close)                                                  \
+	        echo "$(foreach j, $($(patsubst $(srctree)/%,%,$(i))-prereq), \
+	                -include c$(j))";;))                                  \
+	    *) ;;                                                             \
+	    esac;                                                             \
+	};                                                                    \
+	for i in $(filter %.h,$^); do                                         \
+	    echo "#include "\"$$i\"                                           \
 	    | $(CXX) -x c++ -std=gnu++98 -Wall -Werror -D__XEN_TOOLS__        \
 	      -include stdint.h -include $(srcdir)/public/xen.h               \
-	      $(foreach j, $($(patsubst $(srctree)/%,%,$i)-prereq), -include c$(j)) \
+	      $$(get_prereq $$i)                                              \
 	      -S -o /dev/null -                                               \
-	    || exit $$?; echo $(i) >> $@.new;) \
+	    || exit $$?; echo $$i >> $@.new; done;                            \
 	mv $@.new $@
 endef
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenstored: Harden corrupt()
Message-Id: <E1o4d3Q-0004ot-AQ@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 06:44:32 +0000

commit db3382dd4f468c763512d6bf91c96773395058fb
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Thu Jun 23 13:43:23 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 13:44:10 2022 +0100

    tools/xenstored: Harden corrupt()
    
    At the moment, corrupt() is neither checking for allocation failure
    nor freeing the allocated memory.
    
    Harden the code by printing ENOMEM if the allocation failed and
    free 'str' after the last use.
    
    This is not considered to be a security issue because corrupt() should
    only be called when Xenstored thinks the database is corrupted. Note
    that the trigger (i.e. a guest reliably provoking the call) would be
    a security issue.
    
    Fixes: 06d17943f0cd ("Added a basic integrity checker, and some basic ability to recover from store")
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 tools/xenstore/xenstored_core.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c
index fa733e714e..8867f93431 100644
--- a/tools/xenstore/xenstored_core.c
+++ b/tools/xenstore/xenstored_core.c
@@ -2065,7 +2065,10 @@ void corrupt(struct connection *conn, const char *fmt, ...)
 	va_end(arglist);
 
 	log("corruption detected by connection %i: err %s: %s",
-	    conn ? (int)conn->id : -1, strerror(saved_errno), str);
+	    conn ? (int)conn->id : -1, strerror(saved_errno),
+	    str ?: "ENOMEM");
+
+	talloc_free(str);
 
 	check_store();
 }
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/common: device_tree: Fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o4nlm-0004zM-84@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:02 +0000

commit 7e1ed5e9341c2820c40d1a58aa35545d604311c3
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:57 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:44:48 2022 +0100

    xen/common: device_tree: Fix MISRA C 2012 Rule 8.7 violation
    
    The function __dt_n_size_cells() is referenced only in device_tree.c.
    Change the linkage of the function from external to internal by adding
    the storage-class specifier static to the function definition.
    
    This patch aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/common/device_tree.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/device_tree.c b/xen/common/device_tree.c
index 0e8798bd24..6c9712ab7b 100644
--- a/xen/common/device_tree.c
+++ b/xen/common/device_tree.c
@@ -496,7 +496,7 @@ static int __dt_n_addr_cells(const struct dt_device_node *np, bool_t parent)
     return DT_ROOT_NODE_ADDR_CELLS_DEFAULT;
 }
 
-int __dt_n_size_cells(const struct dt_device_node *np, bool_t parent)
+static int __dt_n_size_cells(const struct dt_device_node *np, bool_t parent)
 {
     const __be32 *ip;
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: shutdown: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4nlw-000507-D1@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:12 +0000

commit f8af00d1a6abe46dca31c197d30cb5118d54cd54
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:12 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:26 2022 +0100

    xen/arm: shutdown: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/shutdown.h> so that the declarations of the functions
    machine_halt() and machine_restart(), which have external linkage, are visible
    before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/shutdown.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/shutdown.c b/xen/arch/arm/shutdown.c
index 3dc6819d56..5550f50f61 100644
--- a/xen/arch/arm/shutdown.c
+++ b/xen/arch/arm/shutdown.c
@@ -2,6 +2,7 @@
 #include <xen/cpu.h>
 #include <xen/delay.h>
 #include <xen/lib.h>
+#include <xen/shutdown.h>
 #include <xen/smp.h>
 #include <asm/platform.h>
 #include <asm/psci.h>
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/lib: list-sort: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4nm6-00050f-HB@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:22 +0000

commit ab6c273ebc2f238c7ecb5e8c985570cf1d8a28af
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:13 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:26 2022 +0100

    xen/lib: list-sort: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/list_sort.h> so that the declaration of the function
    list_sort(), which has external linkage, is visible before the function
    definition.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/lib/list-sort.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/lib/list-sort.c b/xen/lib/list-sort.c
index f8d8bbf281..de1af2ef8b 100644
--- a/xen/lib/list-sort.c
+++ b/xen/lib/list-sort.c
@@ -16,6 +16,7 @@
  */
 
 #include <xen/list.h>
+#include <xen/list_sort.h>
 
 #define MAX_LIST_LENGTH_BITS 20
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/common: gunzip: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4nmG-000518-KR@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:32 +0000

commit 21a41a6164305bbc66ff1e42ffc11301712f6d65
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Wed Jun 22 18:15:14 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:46:27 2022 +0100

    xen/common: gunzip: Fix MISRA C 2012 Rule 8.4 violation
    
    Include header <xen/gunzip.h> so that the declarations of functions gzip_check()
    and perform_gunzip(), which have external linkage, are visible before the
    function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/common/gunzip.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/common/gunzip.c b/xen/common/gunzip.c
index b9ecc17e44..aa16fec4bb 100644
--- a/xen/common/gunzip.c
+++ b/xen/common/gunzip.c
@@ -1,4 +1,5 @@
 #include <xen/errno.h>
+#include <xen/gunzip.h>
 #include <xen/init.h>
 #include <xen/lib.h>
 #include <xen/mm.h>
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: vtimer: Fix MISRA C 2012 Rule 8.4 violation
Message-Id: <E1o4nmQ-00051e-NG@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:42 +0000

commit 6b2372e2969fed0e265cbdbc13b08de2634ea210
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 21 18:44:01 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:54:49 2022 +0100

    xen/arm: vtimer: Fix MISRA C 2012 Rule 8.4 violation
    
    Include vtimer.h so that the declarations of vtimer functions with external
    linkage are visible before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/vtimer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 5bb5970f58..5f26463354 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -29,6 +29,7 @@
 #include <asm/time.h>
 #include <asm/vgic.h>
 #include <asm/vreg.h>
+#include <asm/vtimer.h>
 #include <asm/regs.h>
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: vtimer: Remove duplicate header
Message-Id: <E1o4nma-000524-QA@xenbits.xenproject.org>
Date: Fri, 24 Jun 2022 18:11:52 +0000

commit 7c1f724dd95cf627f72c96d310b6b7d487bc2281
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 21 18:44:02 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 23 19:54:49 2022 +0100

    xen/arm: vtimer: Remove duplicate header
    
    The header file <asm/regs.h> is already included above and can be removed here.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
 xen/arch/arm/vtimer.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 5f26463354..6b78fea77d 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -30,7 +30,6 @@
 #include <asm/vgic.h>
 #include <asm/vreg.h>
 #include <asm/vtimer.h>
-#include <asm/regs.h>
 
 /*
  * Check if regs is allowed access, user_gate is tail end of a
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: irq: Initialize the per-CPU IRQs while preparing the CPU
Message-Id: <E1o57Bg-0005pM-Ki@xenbits.xenproject.org>
Date: Sat, 25 Jun 2022 14:55:04 +0000

commit 0544c4ee4b48f7e2715e69ff3e73c3d5545b0526
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 25 15:52:39 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 25 15:53:05 2022 +0100

    xen/arm: irq: Initialize the per-CPU IRQs while preparing the CPU
    
    Commit 5047cd1d5dea "xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in
    xmalloc()" extended the checks in _xmalloc() to catch any use of the
    helpers from context with interrupts disabled.
    
    Unfortunately, the rule is not followed when initializing the per-CPU
    IRQs:
    
    (XEN) Xen call trace:
    (XEN)    [<002389f4>] _xmalloc+0xfc/0x314 (PC)
    (XEN)    [<00000000>] 00000000 (LR)
    (XEN)    [<0021a7c4>] init_one_irq_desc+0x48/0xd0
    (XEN)    [<002807a8>] irq.c#init_local_irq_data+0x48/0xa4
    (XEN)    [<00280834>] init_secondary_IRQ+0x10/0x2c
    (XEN)    [<00288fa4>] start_secondary+0x194/0x274
    (XEN)    [<40010170>] 40010170
    (XEN)
    (XEN)
    (XEN) ****************************************
    (XEN) Panic on CPU 2:
    (XEN) Assertion '!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1)' failed at common/xmalloc_tlsf.c:601
    (XEN) ****************************************
    
    This is happening because zalloc_cpumask_var() may allocate memory
    if NR_CPUS is > 2 * sizeof(unsigned long).
    
    Avoid the problem by initializing the per-CPU IRQs while preparing the
    CPU.
    
    This also has the benefit to remove a BUG_ON() in the secondary CPU
    code.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Tested-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/include/asm/irq.h |  1 -
 xen/arch/arm/irq.c             | 35 ++++++++++++++++++++++++++++-------
 xen/arch/arm/smpboot.c         |  2 --
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h
index e45d574598..245f49dcba 100644
--- a/xen/arch/arm/include/asm/irq.h
+++ b/xen/arch/arm/include/asm/irq.h
@@ -73,7 +73,6 @@ static inline bool is_lpi(unsigned int irq)
 bool is_assignable_irq(unsigned int irq);
 
 void init_IRQ(void);
-void init_secondary_IRQ(void);
 
 int route_irq_to_guest(struct domain *d, unsigned int virq,
                        unsigned int irq, const char *devname);
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index b761d90c40..5268c01434 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -17,6 +17,7 @@
  * GNU General Public License for more details.
  */
 
+#include <xen/cpu.h>
 #include <xen/lib.h>
 #include <xen/spinlock.h>
 #include <xen/irq.h>
@@ -100,7 +101,7 @@ static int __init init_irq_data(void)
     return 0;
 }
 
-static int init_local_irq_data(void)
+static int init_local_irq_data(unsigned int cpu)
 {
     int irq;
 
@@ -108,7 +109,7 @@ static int init_local_irq_data(void)
 
     for ( irq = 0; irq < NR_LOCAL_IRQS; irq++ )
     {
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct irq_desc *desc = &per_cpu(local_irq_desc, cpu)[irq];
         int rc = init_one_irq_desc(desc);
 
         if ( rc )
@@ -131,6 +132,29 @@ static int init_local_irq_data(void)
     return 0;
 }
 
+static int cpu_callback(struct notifier_block *nfb, unsigned long action,
+                        void *hcpu)
+{
+    unsigned int cpu = (unsigned long)hcpu;
+    int rc = 0;
+
+    switch ( action )
+    {
+    case CPU_UP_PREPARE:
+        rc = init_local_irq_data(cpu);
+        if ( rc )
+            printk(XENLOG_ERR "Unable to allocate local IRQ for CPU%u\n",
+                   cpu);
+        break;
+    }
+
+    return !rc ? NOTIFY_DONE : notifier_from_errno(rc);
+}
+
+static struct notifier_block cpu_nfb = {
+    .notifier_call = cpu_callback,
+};
+
 void __init init_IRQ(void)
 {
     int irq;
@@ -140,13 +164,10 @@ void __init init_IRQ(void)
         local_irqs_type[irq] = IRQ_TYPE_INVALID;
     spin_unlock(&local_irqs_type_lock);
 
-    BUG_ON(init_local_irq_data() < 0);
+    BUG_ON(init_local_irq_data(smp_processor_id()) < 0);
     BUG_ON(init_irq_data() < 0);
-}
 
-void init_secondary_IRQ(void)
-{
-    BUG_ON(init_local_irq_data() < 0);
+    register_cpu_notifier(&cpu_nfb);
 }
 
 static inline struct irq_guest *irq_get_guest_info(struct irq_desc *desc)
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 9e92279563..f7bda3a18b 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -372,8 +372,6 @@ void start_secondary(void)
 
     gic_init_secondary_cpu();
 
-    init_secondary_IRQ();
-
     set_current(idle_vcpu[cpuid]);
 
     /* Run local notifiers */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: irq: Initialize the per-CPU IRQs while preparing the CPU
Message-Id: <E1o5IQQ-0001Y2-00@xenbits.xenproject.org>
Date: Sun, 26 Jun 2022 02:55:02 +0000

commit 0544c4ee4b48f7e2715e69ff3e73c3d5545b0526
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Sat Jun 25 15:52:39 2022 +0100
Commit:     Julien Grall <julien@xen.org>
CommitDate: Sat Jun 25 15:53:05 2022 +0100

    xen/arm: irq: Initialize the per-CPU IRQs while preparing the CPU
    
    Commit 5047cd1d5dea "xen/common: Use enhanced ASSERT_ALLOC_CONTEXT in
    xmalloc()" extended the checks in _xmalloc() to catch any use of the
    helpers from context with interrupts disabled.
    
    Unfortunately, the rule is not followed when initializing the per-CPU
    IRQs:
    
    (XEN) Xen call trace:
    (XEN)    [<002389f4>] _xmalloc+0xfc/0x314 (PC)
    (XEN)    [<00000000>] 00000000 (LR)
    (XEN)    [<0021a7c4>] init_one_irq_desc+0x48/0xd0
    (XEN)    [<002807a8>] irq.c#init_local_irq_data+0x48/0xa4
    (XEN)    [<00280834>] init_secondary_IRQ+0x10/0x2c
    (XEN)    [<00288fa4>] start_secondary+0x194/0x274
    (XEN)    [<40010170>] 40010170
    (XEN)
    (XEN)
    (XEN) ****************************************
    (XEN) Panic on CPU 2:
    (XEN) Assertion '!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1)' failed at common/xmalloc_tlsf.c:601
    (XEN) ****************************************
    
    This is happening because zalloc_cpumask_var() may allocate memory
    if NR_CPUS is > 2 * sizeof(unsigned long).
    
    Avoid the problem by initializing the per-CPU IRQs while preparing the
    CPU.
    
    This also has the benefit to remove a BUG_ON() in the secondary CPU
    code.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
    Tested-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/include/asm/irq.h |  1 -
 xen/arch/arm/irq.c             | 35 ++++++++++++++++++++++++++++-------
 xen/arch/arm/smpboot.c         |  2 --
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h
index e45d574598..245f49dcba 100644
--- a/xen/arch/arm/include/asm/irq.h
+++ b/xen/arch/arm/include/asm/irq.h
@@ -73,7 +73,6 @@ static inline bool is_lpi(unsigned int irq)
 bool is_assignable_irq(unsigned int irq);
 
 void init_IRQ(void);
-void init_secondary_IRQ(void);
 
 int route_irq_to_guest(struct domain *d, unsigned int virq,
                        unsigned int irq, const char *devname);
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index b761d90c40..5268c01434 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -17,6 +17,7 @@
  * GNU General Public License for more details.
  */
 
+#include <xen/cpu.h>
 #include <xen/lib.h>
 #include <xen/spinlock.h>
 #include <xen/irq.h>
@@ -100,7 +101,7 @@ static int __init init_irq_data(void)
     return 0;
 }
 
-static int init_local_irq_data(void)
+static int init_local_irq_data(unsigned int cpu)
 {
     int irq;
 
@@ -108,7 +109,7 @@ static int init_local_irq_data(void)
 
     for ( irq = 0; irq < NR_LOCAL_IRQS; irq++ )
     {
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct irq_desc *desc = &per_cpu(local_irq_desc, cpu)[irq];
         int rc = init_one_irq_desc(desc);
 
         if ( rc )
@@ -131,6 +132,29 @@ static int init_local_irq_data(void)
     return 0;
 }
 
+static int cpu_callback(struct notifier_block *nfb, unsigned long action,
+                        void *hcpu)
+{
+    unsigned int cpu = (unsigned long)hcpu;
+    int rc = 0;
+
+    switch ( action )
+    {
+    case CPU_UP_PREPARE:
+        rc = init_local_irq_data(cpu);
+        if ( rc )
+            printk(XENLOG_ERR "Unable to allocate local IRQ for CPU%u\n",
+                   cpu);
+        break;
+    }
+
+    return !rc ? NOTIFY_DONE : notifier_from_errno(rc);
+}
+
+static struct notifier_block cpu_nfb = {
+    .notifier_call = cpu_callback,
+};
+
 void __init init_IRQ(void)
 {
     int irq;
@@ -140,13 +164,10 @@ void __init init_IRQ(void)
         local_irqs_type[irq] = IRQ_TYPE_INVALID;
     spin_unlock(&local_irqs_type_lock);
 
-    BUG_ON(init_local_irq_data() < 0);
+    BUG_ON(init_local_irq_data(smp_processor_id()) < 0);
     BUG_ON(init_irq_data() < 0);
-}
 
-void init_secondary_IRQ(void)
-{
-    BUG_ON(init_local_irq_data() < 0);
+    register_cpu_notifier(&cpu_nfb);
 }
 
 static inline struct irq_guest *irq_get_guest_info(struct irq_desc *desc)
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 9e92279563..f7bda3a18b 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -372,8 +372,6 @@ void start_secondary(void)
 
     gic_init_secondary_cpu();
 
-    init_secondary_IRQ();
-
     set_current(idle_vcpu[cpuid]);
 
     /* Run local notifiers */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging-4.15] update Xen version to 4.15.3
Message-Id: <E1o5ogm-0001JX-MP@xenbits.xenproject.org>
Date: Mon, 27 Jun 2022 13:22:04 +0000

commit cc3329fbfbb5af1c4fdb8a7a4e3a87c12264661c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Mon Jun 27 15:16:56 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 27 15:16:56 2022 +0200

    update Xen version to 4.15.3
---
 Config.mk    | 6 +++---
 xen/Makefile | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Config.mk b/Config.mk
index 2593e5aa78..96d89b2f7d 100644
--- a/Config.mk
+++ b/Config.mk
@@ -244,15 +244,15 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git
 MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git
 endif
 OVMF_UPSTREAM_REVISION ?= a3741780fe3535e19e02efa869a7cac481891129
-QEMU_UPSTREAM_REVISION ?= qemu-xen-4.15.2
-MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.15.2
+QEMU_UPSTREAM_REVISION ?= qemu-xen-4.15.3
+MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.15.3
 
 SEABIOS_UPSTREAM_REVISION ?= rel-1.14.0
 
 ETHERBOOT_NICS ?= rtl8139 8086100e
 
 
-QEMU_TRADITIONAL_REVISION ?= xen-4.15.2
+QEMU_TRADITIONAL_REVISION ?= xen-4.15.3
 
 # Specify which qemu-dm to use. This may be `ioemu' to use the old
 # Mercurial in-tree version, or a local directory, or a git URL.
diff --git a/xen/Makefile b/xen/Makefile
index 85358930a8..e9a88325c4 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -2,7 +2,7 @@
 # All other places this is stored (eg. compile.h) should be autogenerated.
 export XEN_VERSION       = 4
 export XEN_SUBVERSION    = 15
-export XEN_EXTRAVERSION ?= .3-pre$(XEN_VENDORVERSION)
+export XEN_EXTRAVERSION ?= .3$(XEN_VENDORVERSION)
 export XEN_FULLVERSION   = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION)
 -include xen-version
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen stable-4.15] update Xen version to 4.15.3
Message-Id: <E1o64bq-0005bJ-74@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 06:22:02 +0000

commit cc3329fbfbb5af1c4fdb8a7a4e3a87c12264661c
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Mon Jun 27 15:16:56 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Mon Jun 27 15:16:56 2022 +0200

    update Xen version to 4.15.3
---
 Config.mk    | 6 +++---
 xen/Makefile | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Config.mk b/Config.mk
index 2593e5aa78..96d89b2f7d 100644
--- a/Config.mk
+++ b/Config.mk
@@ -244,15 +244,15 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git
 MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git
 endif
 OVMF_UPSTREAM_REVISION ?= a3741780fe3535e19e02efa869a7cac481891129
-QEMU_UPSTREAM_REVISION ?= qemu-xen-4.15.2
-MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.15.2
+QEMU_UPSTREAM_REVISION ?= qemu-xen-4.15.3
+MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.15.3
 
 SEABIOS_UPSTREAM_REVISION ?= rel-1.14.0
 
 ETHERBOOT_NICS ?= rtl8139 8086100e
 
 
-QEMU_TRADITIONAL_REVISION ?= xen-4.15.2
+QEMU_TRADITIONAL_REVISION ?= xen-4.15.3
 
 # Specify which qemu-dm to use. This may be `ioemu' to use the old
 # Mercurial in-tree version, or a local directory, or a git URL.
diff --git a/xen/Makefile b/xen/Makefile
index 85358930a8..e9a88325c4 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -2,7 +2,7 @@
 # All other places this is stored (eg. compile.h) should be autogenerated.
 export XEN_VERSION       = 4
 export XEN_SUBVERSION    = 15
-export XEN_EXTRAVERSION ?= .3-pre$(XEN_VENDORVERSION)
+export XEN_EXTRAVERSION ?= .3$(XEN_VENDORVERSION)
 export XEN_FULLVERSION   = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION)
 -include xen-version
 
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.15


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86: correct asm() constraints when dealing with immediate selector values
Message-Id: <E1o6Cro-0008KX-8N@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:04 +0000

commit 026007376e9807da94930c38500acbd62605545b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 28 17:00:29 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:00:29 2022 +0200

    x86: correct asm() constraints when dealing with immediate selector values
    
    asm() constraints need to fit both the intended insn(s) which the
    respective operands are going to be used with as well as the actual kind
    of value specified. "m" (alone) together with a constant, however, leads
    to gcc saying
    
    error: memory input <N> is not directly addressable
    
    while clang complains
    
    error: invalid lvalue in asm input for constraint 'm'
    
    And rightly so - in order to access a memory operand, an address needs
    to be specified to the insn. In some cases it might be possible for a
    compiler to synthesize a memory operand holding the requested constant,
    but I think any solution there would have sharp edges.
    
    If "m" alone doesn't work with constants, it is at best pointless (and
    perhaps misleading or even risky - the compiler might decide to actually
    pick "m" and not try very hard to find a suitable register) to specify
    it alongside "r". And indeed clang does, oddly enough despite its
    objection to "m" alone. Which means there the change also improves the
    generated code.
    
    While there also switch the two operand case to using named operands.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/cpu/amd.c      | 2 +-
 xen/arch/x86/x86_64/traps.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 94b9e31016..f1d11a1cb7 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -736,7 +736,7 @@ void __init detect_zen2_null_seg_behaviour(void)
 	uint64_t base;
 
 	wrmsrl(MSR_FS_BASE, 1);
-	asm volatile ( "mov %0, %%fs" :: "rm" (0) );
+	asm volatile ( "mov %0, %%fs" :: "r" (0) );
 	rdmsrl(MSR_FS_BASE, base);
 
 	if (base == 0)
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index 9d7f1f818b..f8cb8d9a94 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -274,7 +274,8 @@ void do_double_fault(struct cpu_user_regs *regs)
 
     console_force_unlock();
 
-    asm ( "lsll %1, %0" : "=r" (cpu) : "rm" (PER_CPU_SELECTOR) );
+    asm ( "lsll %[sel], %[limit]" : [limit] "=r" (cpu)
+                                  : [sel] "r" (PER_CPU_SELECTOR) );
 
     /* Find information saved during fault and dump it to the console. */
     printk("*** DOUBLE FAULT ***\n");
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: move do_vcpu_op() to arch specific code
Message-Id: <E1o6Cry-0008L3-C3@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:14 +0000

commit 8a96c0ea79999a0f9a11c93a7009660efa624219
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 28 17:02:42 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:02:42 2022 +0200

    xen: move do_vcpu_op() to arch specific code
    
    The entry point used for the vcpu_op hypercall on Arm is different
    from the one on x86 today, as some of the common sub-ops are not
    supported on Arm. The Arm specific handler filters out the not
    supported sub-ops and then calls the common handler. This leads to the
    weird call hierarchy:
    
      do_arm_vcpu_op()
        do_vcpu_op()
          arch_do_vcpu_op()
    
    Clean this up by renaming do_vcpu_op() to common_vcpu_op() and
    arch_do_vcpu_op() in each architecture to do_vcpu_op(). This way one
    of above calls can be avoided without restricting any potential
    future use of common sub-ops for Arm.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Roger Pau Monné <roger.pau@cirtrix.com>
---
 xen/arch/arm/domain.c                | 15 ++++++++-------
 xen/arch/arm/include/asm/hypercall.h |  2 --
 xen/arch/arm/traps.c                 |  2 +-
 xen/arch/x86/domain.c                | 12 ++++++++----
 xen/arch/x86/include/asm/hypercall.h |  2 +-
 xen/arch/x86/x86_64/domain.c         | 18 +++++++++++++-----
 xen/common/compat/domain.c           | 15 ++++++---------
 xen/common/domain.c                  | 12 ++++--------
 xen/include/xen/hypercall.h          |  2 +-
 9 files changed, 42 insertions(+), 38 deletions(-)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 8110c1df86..2f8eaab7b5 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -1079,23 +1079,24 @@ void arch_dump_domain_info(struct domain *d)
 }
 
 
-long do_arm_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+long do_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
+
     switch ( cmd )
     {
         case VCPUOP_register_vcpu_info:
         case VCPUOP_register_runstate_memory_area:
-            return do_vcpu_op(cmd, vcpuid, arg);
+            return common_vcpu_op(cmd, v, arg);
         default:
             return -EINVAL;
     }
 }
 
-long arch_do_vcpu_op(int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
-{
-    return -ENOSYS;
-}
-
 void arch_dump_vcpu_info(struct vcpu *v)
 {
     gic_dump_info(v);
diff --git a/xen/arch/arm/include/asm/hypercall.h b/xen/arch/arm/include/asm/hypercall.h
index a6fdfed8de..8182895358 100644
--- a/xen/arch/arm/include/asm/hypercall.h
+++ b/xen/arch/arm/include/asm/hypercall.h
@@ -8,8 +8,6 @@
 #include <public/domctl.h> /* for arch_do_domctl */
 int do_arm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg);
 
-long do_arm_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg);
-
 long subarch_do_domctl(struct xen_domctl *domctl, struct domain *d,
                        XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index e989e742fd..785f2121d1 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1380,7 +1380,7 @@ static arm_hypercall_t arm_hypercall_table[] = {
 #endif
     HYPERCALL(multicall, 2),
     HYPERCALL(platform_op, 1),
-    HYPERCALL_ARM(vcpu_op, 3),
+    HYPERCALL(vcpu_op, 3),
     HYPERCALL(vm_assist, 2),
 #ifdef CONFIG_ARGO
     HYPERCALL(argo_op, 5),
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 9eddeaa20b..0d2944fe14 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1491,11 +1491,15 @@ int arch_vcpu_reset(struct vcpu *v)
     return 0;
 }
 
-long
-arch_do_vcpu_op(
-    int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
+long cf_check do_vcpu_op(int cmd, unsigned int vcpuid,
+                         XEN_GUEST_HANDLE_PARAM(void) arg)
 {
     long rc = 0;
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
 
     switch ( cmd )
     {
@@ -1547,7 +1551,7 @@ arch_do_vcpu_op(
     }
 
     default:
-        rc = -ENOSYS;
+        rc = common_vcpu_op(cmd, v, arg);
         break;
     }
 
diff --git a/xen/arch/x86/include/asm/hypercall.h b/xen/arch/x86/include/asm/hypercall.h
index 401e77d1e9..1c57236dc7 100644
--- a/xen/arch/x86/include/asm/hypercall.h
+++ b/xen/arch/x86/include/asm/hypercall.h
@@ -149,7 +149,7 @@ compat_physdev_op(
     XEN_GUEST_HANDLE_PARAM(void) arg);
 
 extern int
-arch_compat_vcpu_op(
+compat_common_vcpu_op(
     int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg);
 
 extern int cf_check compat_mmuext_op(
diff --git a/xen/arch/x86/x86_64/domain.c b/xen/arch/x86/x86_64/domain.c
index c46dccc25a..9c559aa3ea 100644
--- a/xen/arch/x86/x86_64/domain.c
+++ b/xen/arch/x86/x86_64/domain.c
@@ -12,11 +12,15 @@
 CHECK_vcpu_get_physid;
 #undef xen_vcpu_get_physid
 
-int
-arch_compat_vcpu_op(
-    int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
+int cf_check
+compat_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    int rc = -ENOSYS;
+    int rc;
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
 
     switch ( cmd )
     {
@@ -55,7 +59,11 @@ arch_compat_vcpu_op(
     }
 
     case VCPUOP_get_physid:
-        rc = arch_do_vcpu_op(cmd, v, arg);
+        rc = do_vcpu_op(cmd, vcpuid, arg);
+        break;
+
+    default:
+        rc = compat_common_vcpu_op(cmd, v, arg);
         break;
     }
 
diff --git a/xen/common/compat/domain.c b/xen/common/compat/domain.c
index afae27eeba..1119534679 100644
--- a/xen/common/compat/domain.c
+++ b/xen/common/compat/domain.c
@@ -38,15 +38,12 @@ CHECK_vcpu_hvm_context;
 
 #endif
 
-int cf_check compat_vcpu_op(
-    int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+int compat_common_vcpu_op(int cmd, struct vcpu *v,
+                          XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    struct domain *d = current->domain;
-    struct vcpu *v;
     int rc = 0;
-
-    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
-        return -ENOENT;
+    struct domain *d = current->domain;
+    unsigned int vcpuid = v->vcpu_id;
 
     switch ( cmd )
     {
@@ -103,7 +100,7 @@ int cf_check compat_vcpu_op(
     case VCPUOP_stop_singleshot_timer:
     case VCPUOP_register_vcpu_info:
     case VCPUOP_send_nmi:
-        rc = do_vcpu_op(cmd, vcpuid, arg);
+        rc = common_vcpu_op(cmd, v, arg);
         break;
 
     case VCPUOP_get_runstate_info:
@@ -134,7 +131,7 @@ int cf_check compat_vcpu_op(
     }
 
     default:
-        rc = arch_compat_vcpu_op(cmd, v, arg);
+        rc = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 7570eae91a..b9f80bd2bb 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1569,15 +1569,11 @@ int default_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-long cf_check do_vcpu_op(
-    int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+long common_vcpu_op(int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    struct domain *d = current->domain;
-    struct vcpu *v;
     long rc = 0;
-
-    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
-        return -ENOENT;
+    struct domain *d = v->domain;
+    unsigned int vcpuid = v->vcpu_id;
 
     switch ( cmd )
     {
@@ -1749,7 +1745,7 @@ long cf_check do_vcpu_op(
     }
 
     default:
-        rc = arch_do_vcpu_op(cmd, v, arg);
+        rc = -ENOSYS;
         break;
     }
 
diff --git a/xen/include/xen/hypercall.h b/xen/include/xen/hypercall.h
index a1b6575976..81aae7a662 100644
--- a/xen/include/xen/hypercall.h
+++ b/xen/include/xen/hypercall.h
@@ -110,7 +110,7 @@ do_vcpu_op(
 
 struct vcpu;
 extern long
-arch_do_vcpu_op(int cmd,
+common_vcpu_op(int cmd,
     struct vcpu *v,
     XEN_GUEST_HANDLE_PARAM(void) arg);
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] tools/xenstore: modify feature bit specification in xenstore-ring.txt
Message-Id: <E1o6Cs8-0008Lc-FG@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:24 +0000

commit 53e5d2166ac2a05ab8ce4a2fe650277b3fa168b2
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 28 17:06:14 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:06:14 2022 +0200

    tools/xenstore: modify feature bit specification in xenstore-ring.txt
    
    Instead of specifying the feature bits in xenstore-ring.txt as a mask
    value use bit numbers. This will make the specification easier to read
    when adding more features.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 docs/misc/xenstore-ring.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/docs/misc/xenstore-ring.txt b/docs/misc/xenstore-ring.txt
index f3d6ca4264..2792d13530 100644
--- a/docs/misc/xenstore-ring.txt
+++ b/docs/misc/xenstore-ring.txt
@@ -62,12 +62,13 @@ the server feature bitmap. The server features are offered to the guest;
 it is up to the guest whether to use them or not. The guest should ignore
 any unknown feature bits.
 
-The following features are defined:
+The following features are defined (bit number 0 is equivalent to a mask
+value of 1):
 
-Mask    Description
+Bit     Description
 -----------------------------------------------------------------
-1       Ring reconnection (see the ring reconnection feature below)
-2       Connection error indicator (see connection error feature below)
+0       Ring reconnection (see the ring reconnection feature below)
+1       Connection error indicator (see connection error feature below)
 
 The "Connection state" field is used to request a ring close and reconnect.
 The "Connection state" field only contains valid data if the server has
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] page_alloc: fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o6CsI-0008M5-IC@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:34 +0000

commit 56ff13f640b400f5e68e0450b7b24f6deae13b63
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:06:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:06:37 2022 +0200

    page_alloc: fix MISRA C 2012 Rule 8.7 violation
    
    The variables page_offlined_list and page_broken_list are referenced only
    in page_alloc.c.
    Change their linkage from external to internal by adding the storage-class
    specifier static to their definitions.
    
    This patch also aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/page_alloc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 000ae6b972..fe0e15429a 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -235,9 +235,9 @@ static unsigned int dma_bitsize;
 integer_param("dma_bits", dma_bitsize);
 
 /* Offlined page list, protected by heap_lock. */
-PAGE_LIST_HEAD(page_offlined_list);
+static PAGE_LIST_HEAD(page_offlined_list);
 /* Broken page list, protected by heap_lock. */
-PAGE_LIST_HEAD(page_broken_list);
+static PAGE_LIST_HEAD(page_broken_list);
 
 /*************************
  * BOOT-TIME ALLOCATOR
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
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Subject: [xen staging] iommu: fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o6CsS-0008MX-LD@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:44 +0000

commit 1fd3698175d2de5c0b91c28902cfe0dac6c332a9
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:07:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:07:11 2022 +0200

    iommu: fix MISRA C 2012 Rule 8.7 violation
    
    The variable iommu_crash_disable is referenced only in one translation unit.
    Change its linkage from external to internal by adding the storage-class
    specifier static to its definition.
    
    This patch also aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 75df3aa8dd..77f64e6174 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -29,7 +29,7 @@ bool_t __initdata iommu_enable = 1;
 bool_t __read_mostly iommu_enabled;
 bool_t __read_mostly force_iommu;
 bool_t __read_mostly iommu_verbose;
-bool_t __read_mostly iommu_crash_disable;
+static bool_t __read_mostly iommu_crash_disable;
 
 #define IOMMU_quarantine_none         0 /* aka false */
 #define IOMMU_quarantine_basic        1 /* aka true */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] arm64/traps: fix MISRA C 2012 Rule 8.4 violations
Message-Id: <E1o6Csc-0008N5-P1@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:11:54 +0000

commit 2c62623c59b5f08e31264b8055a03f0f9e164910
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:07:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:07:38 2022 +0200

    arm64/traps: fix MISRA C 2012 Rule 8.4 violations
    
    Add a function prototype for do_bad_mode() in <asm/arm64/traps.h> and include
    header <asm/traps.h> in traps.c, so that the declarations of the functions
    do_bad_mode() and finalize_instr_emulation(), which have external linkage,
    are visible before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/arm64/traps.c             | 1 +
 xen/arch/arm/include/asm/arm64/traps.h | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/xen/arch/arm/arm64/traps.c b/xen/arch/arm/arm64/traps.c
index 3f8858acec..a995ad7c2c 100644
--- a/xen/arch/arm/arm64/traps.c
+++ b/xen/arch/arm/arm64/traps.c
@@ -22,6 +22,7 @@
 #include <asm/hsr.h>
 #include <asm/system.h>
 #include <asm/processor.h>
+#include <asm/traps.h>
 
 #include <public/xen.h>
 
diff --git a/xen/arch/arm/include/asm/arm64/traps.h b/xen/arch/arm/include/asm/arm64/traps.h
index 2379b578cb..a347cb13d6 100644
--- a/xen/arch/arm/include/asm/arm64/traps.h
+++ b/xen/arch/arm/include/asm/arm64/traps.h
@@ -6,6 +6,8 @@ void inject_undef64_exception(struct cpu_user_regs *regs, int instr_len);
 void do_sysreg(struct cpu_user_regs *regs,
                const union hsr hsr);
 
+void do_bad_mode(struct cpu_user_regs *regs, int reason);
+
 #endif /* __ASM_ARM64_TRAPS__ */
 /*
  * Local variables:
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: Use unsigned int instead of plain unsigned
Message-Id: <E1o6DD6-0000uT-Oc@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:04 +0000

commit 05fb789e83b1404c786d63350df4cc25b1898292
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:22:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:22:30 2022 +0200

    xen/arm: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/domain_build.c             |  2 +-
 xen/arch/arm/guestcopy.c                | 13 +++++++------
 xen/arch/arm/include/asm/arm32/bitops.h |  8 ++++----
 xen/arch/arm/include/asm/fixmap.h       |  4 ++--
 xen/arch/arm/include/asm/guest_access.h |  8 ++++----
 xen/arch/arm/include/asm/mm.h           |  2 +-
 xen/arch/arm/irq.c                      |  2 +-
 xen/arch/arm/kernel.c                   |  2 +-
 xen/arch/arm/mm.c                       |  4 ++--
 9 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 7ddd16c26d..3fd1186b53 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1007,7 +1007,7 @@ static void __init set_interrupt(gic_interrupt_t interrupt,
  */
 static int __init fdt_property_interrupts(const struct kernel_info *kinfo,
                                           gic_interrupt_t *intr,
-                                          unsigned num_irq)
+                                          unsigned int num_irq)
 {
     int res;
 
diff --git a/xen/arch/arm/guestcopy.c b/xen/arch/arm/guestcopy.c
index 32681606d8..abb6236e27 100644
--- a/xen/arch/arm/guestcopy.c
+++ b/xen/arch/arm/guestcopy.c
@@ -56,7 +56,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
                                 copy_info_t info, unsigned int flags)
 {
     /* XXX needs to handle faults */
-    unsigned offset = addr & ~PAGE_MASK;
+    unsigned int offset = addr & ~PAGE_MASK;
 
     BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t));
     BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t));
@@ -64,7 +64,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
     while ( len )
     {
         void *p;
-        unsigned size = min(len, (unsigned)PAGE_SIZE - offset);
+        unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset);
         struct page_info *page;
 
         page = translate_get_page(info, addr, flags & COPY_linear,
@@ -106,26 +106,27 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
     return 0;
 }
 
-unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len)
+unsigned long raw_copy_to_guest(void *to, const void *from, unsigned int len)
 {
     return copy_guest((void *)from, (vaddr_t)to, len,
                       GVA_INFO(current), COPY_to_guest | COPY_linear);
 }
 
 unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
-                                             unsigned len)
+                                             unsigned int len)
 {
     return copy_guest((void *)from, (vaddr_t)to, len, GVA_INFO(current),
                       COPY_to_guest | COPY_flush_dcache | COPY_linear);
 }
 
-unsigned long raw_clear_guest(void *to, unsigned len)
+unsigned long raw_clear_guest(void *to, unsigned int len)
 {
     return copy_guest(NULL, (vaddr_t)to, len, GVA_INFO(current),
                       COPY_to_guest | COPY_linear);
 }
 
-unsigned long raw_copy_from_guest(void *to, const void __user *from, unsigned len)
+unsigned long raw_copy_from_guest(void *to, const void __user *from,
+                                  unsigned int len)
 {
     return copy_guest(to, (vaddr_t)from, len, GVA_INFO(current),
                       COPY_from_guest | COPY_linear);
diff --git a/xen/arch/arm/include/asm/arm32/bitops.h b/xen/arch/arm/include/asm/arm32/bitops.h
index 57938a5874..d0309d47c1 100644
--- a/xen/arch/arm/include/asm/arm32/bitops.h
+++ b/xen/arch/arm/include/asm/arm32/bitops.h
@@ -6,17 +6,17 @@
 /*
  * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
  */
-extern int _find_first_zero_bit_le(const void * p, unsigned size);
+extern int _find_first_zero_bit_le(const void * p, unsigned int size);
 extern int _find_next_zero_bit_le(const void * p, int size, int offset);
-extern int _find_first_bit_le(const unsigned long *p, unsigned size);
+extern int _find_first_bit_le(const unsigned long *p, unsigned int size);
 extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
 
 /*
  * Big endian assembly bitops.  nr = 0 -> byte 3 bit 0.
  */
-extern int _find_first_zero_bit_be(const void * p, unsigned size);
+extern int _find_first_zero_bit_be(const void * p, unsigned int size);
 extern int _find_next_zero_bit_be(const void * p, int size, int offset);
-extern int _find_first_bit_be(const unsigned long *p, unsigned size);
+extern int _find_first_bit_be(const unsigned long *p, unsigned int size);
 extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 
 #ifndef __ARMEB__
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
index 365a2385a0..d0c9a52c8c 100644
--- a/xen/arch/arm/include/asm/fixmap.h
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -30,9 +30,9 @@
 extern lpae_t xen_fixmap[XEN_PT_LPAE_ENTRIES];
 
 /* Map a page in a fixmap entry */
-extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
+extern void set_fixmap(unsigned int map, mfn_t mfn, unsigned int attributes);
 /* Remove a mapping from a fixmap entry */
-extern void clear_fixmap(unsigned map);
+extern void clear_fixmap(unsigned int map);
 
 #define fix_to_virt(slot) ((void *)FIXMAP_ADDR(slot))
 
diff --git a/xen/arch/arm/include/asm/guest_access.h b/xen/arch/arm/include/asm/guest_access.h
index 53766386d3..4421e43611 100644
--- a/xen/arch/arm/include/asm/guest_access.h
+++ b/xen/arch/arm/include/asm/guest_access.h
@@ -4,11 +4,11 @@
 #include <xen/errno.h>
 #include <xen/sched.h>
 
-unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len);
+unsigned long raw_copy_to_guest(void *to, const void *from, unsigned int len);
 unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
-                                             unsigned len);
-unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len);
-unsigned long raw_clear_guest(void *to, unsigned len);
+                                             unsigned int len);
+unsigned long raw_copy_from_guest(void *to, const void *from, unsigned int len);
+unsigned long raw_clear_guest(void *to, unsigned int len);
 
 /* Copy data to guest physical address, then clean the region. */
 unsigned long copy_to_guest_phys_flush_dcache(struct domain *d,
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 045a8ba4bb..c4bc3cd1e5 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -192,7 +192,7 @@ extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns
 /* Map a frame table to cover physical addresses ps through pe */
 extern void setup_frametable_mappings(paddr_t ps, paddr_t pe);
 /* map a physical range in virtual memory */
-void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned attributes);
+void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes);
 
 static inline void __iomem *ioremap_nocache(paddr_t start, size_t len)
 {
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 5268c01434..fd0c15fffd 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -631,7 +631,7 @@ void pirq_set_affinity(struct domain *d, int pirq, const cpumask_t *mask)
     BUG();
 }
 
-static bool irq_validate_new_type(unsigned int curr, unsigned new)
+static bool irq_validate_new_type(unsigned int curr, unsigned int new)
 {
     return (curr == IRQ_TYPE_INVALID || curr == new );
 }
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 25ded1c056..2556a45c38 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -256,7 +256,7 @@ static __init int kernel_decompress(struct bootmodule *mod)
     char *output, *input;
     char magic[2];
     int rc;
-    unsigned kernel_order_out;
+    unsigned int kernel_order_out;
     paddr_t output_size;
     struct page_info *pages;
     mfn_t mfn;
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index be37176a47..009b8cd9ef 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -352,7 +352,7 @@ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr)
 }
 
 /* Map a 4k page in a fixmap entry */
-void set_fixmap(unsigned map, mfn_t mfn, unsigned int flags)
+void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags)
 {
     int res;
 
@@ -361,7 +361,7 @@ void set_fixmap(unsigned map, mfn_t mfn, unsigned int flags)
 }
 
 /* Remove a mapping from a fixmap entry */
-void clear_fixmap(unsigned map)
+void clear_fixmap(unsigned int map)
 {
     int res;
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/domain: Use unsigned int instead of plain unsigned
Message-Id: <E1o6DDG-0000ux-S5@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:14 +0000

commit 056cb4c360a029de00a742c17854e18b2adf70d3
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:23:09 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:23:09 2022 +0200

    xen/domain: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/domain.c      | 2 +-
 xen/include/xen/domain.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index b9f80bd2bb..3b1169d79b 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1446,7 +1446,7 @@ int vcpu_reset(struct vcpu *v)
  * of memory, and it sets a pending event to make sure that a pending
  * event doesn't get missed.
  */
-int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned offset)
+int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned int offset)
 {
     struct domain *d = v->domain;
     void *mapping;
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index 1c3c88a14d..628b14b086 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -65,7 +65,7 @@ void cf_check free_pirq_struct(void *);
 int  arch_vcpu_create(struct vcpu *v);
 void arch_vcpu_destroy(struct vcpu *v);
 
-int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned offset);
+int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned int offset);
 void unmap_vcpu_info(struct vcpu *v);
 
 int arch_domain_create(struct domain *d,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] include/xen: Use unsigned int instead of plain unsigned
Message-Id: <E1o6DDQ-0000vZ-VF@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:24 +0000

commit 586868cb352a9de5ad0f2d91136b2bca3d4fb88f
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:23:46 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:23:46 2022 +0200

    include/xen: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/xen/perfc.h | 2 +-
 xen/include/xen/sched.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/perfc.h b/xen/include/xen/perfc.h
index bb010b0aae..7c5ce537bd 100644
--- a/xen/include/xen/perfc.h
+++ b/xen/include/xen/perfc.h
@@ -49,7 +49,7 @@ enum perfcounter {
 #undef PERFSTATUS
 #undef PERFSTATUS_ARRAY
 
-typedef unsigned perfc_t;
+typedef unsigned int perfc_t;
 #define PRIperfc ""
 
 DECLARE_PER_CPU(perfc_t[NUM_PERFCOUNTERS], perfcounters);
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 463d41ffb6..b9515eb497 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -519,7 +519,7 @@ struct domain
     /* hvm_print_line() and guest_console_write() logging. */
 #define DOMAIN_PBUF_SIZE 200
     char       *pbuf;
-    unsigned    pbuf_idx;
+    unsigned int pbuf_idx;
     spinlock_t  pbuf_lock;
 
     /* OProfile support. */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] include/public: Use uint32_t instead of unsigned (int)
Message-Id: <E1o6DDb-0000wX-2F@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:35 +0000

commit 63e165e8916c7bed2a9527615e9de7de25a2143a
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:25:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:25:11 2022 +0200

    include/public: Use uint32_t instead of unsigned (int)
    
    Public interfaces shall make use of types that indicate size and
    signedness. Take the opportunity to also modify places where explicit
    unsigned int is used.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/public/physdev.h |  4 ++--
 xen/include/public/sysctl.h  | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/xen/include/public/physdev.h b/xen/include/public/physdev.h
index d271766ad0..f8d1905e30 100644
--- a/xen/include/public/physdev.h
+++ b/xen/include/public/physdev.h
@@ -211,8 +211,8 @@ struct physdev_manage_pci_ext {
     /* IN */
     uint8_t bus;
     uint8_t devfn;
-    unsigned is_extfn;
-    unsigned is_virtfn;
+    uint32_t is_extfn;
+    uint32_t is_virtfn;
     struct {
         uint8_t bus;
         uint8_t devfn;
diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h
index b0a4af8789..60c8711483 100644
--- a/xen/include/public/sysctl.h
+++ b/xen/include/public/sysctl.h
@@ -624,7 +624,7 @@ struct xen_sysctl_arinc653_schedule {
         /* If a domain has multiple VCPUs, vcpu_id specifies which one
          * this schedule entry applies to. It should be set to 0 if
          * there is only one VCPU for the domain. */
-        unsigned int vcpu_id;
+        uint32_t vcpu_id;
         /* runtime specifies the amount of time that should be allocated
          * to this VCPU per major frame. It is specified in nanoseconds */
         uint64_aligned_t runtime;
@@ -644,18 +644,18 @@ struct xen_sysctl_credit_schedule {
     /* Length of timeslice in milliseconds */
 #define XEN_SYSCTL_CSCHED_TSLICE_MAX 1000
 #define XEN_SYSCTL_CSCHED_TSLICE_MIN 1
-    unsigned tslice_ms;
-    unsigned ratelimit_us;
+    uint32_t tslice_ms;
+    uint32_t ratelimit_us;
     /*
      * How long we consider a vCPU to be cache-hot on the
      * CPU where it has run (max 100ms, in microseconds)
     */
 #define XEN_SYSCTL_CSCHED_MGR_DLY_MAX_US (100 * 1000)
-    unsigned vcpu_migr_delay_us;
+    uint32_t vcpu_migr_delay_us;
 };
 
 struct xen_sysctl_credit2_schedule {
-    unsigned ratelimit_us;
+    uint32_t ratelimit_us;
 };
 
 /* XEN_SYSCTL_scheduler_op */
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xsm/flask: Use unsigned int instead of plain unsigned
Message-Id: <E1o6DDl-0000xM-6C@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:45 +0000

commit e8dca8e70189830344ee3ad5b6bc82fe55e4c143
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:25:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:25:50 2022 +0200

    xsm/flask: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/xsm/flask/ss/avtab.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/xsm/flask/ss/avtab.c b/xen/xsm/flask/ss/avtab.c
index 017f5183de..9761d028d8 100644
--- a/xen/xsm/flask/ss/avtab.c
+++ b/xen/xsm/flask/ss/avtab.c
@@ -349,7 +349,7 @@ int avtab_read_item(struct avtab *a, void *fp, struct policydb *pol,
     struct avtab_key key;
     struct avtab_datum datum;
     int i, rc;
-    unsigned set;
+    unsigned int set;
 
     memset(&key, 0, sizeof(struct avtab_key));
     memset(&datum, 0, sizeof(struct avtab_datum));
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] acpi: drop the unneeded casts to unsigned
Message-Id: <E1o6DDv-0000xz-9Y@xenbits.xenproject.org>
Date: Tue, 28 Jun 2022 15:33:55 +0000

commit 8c99264c6746541ddbfd7afec533e6ad1c8c41a5
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:26:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:26:04 2022 +0200

    acpi: drop the unneeded casts to unsigned
    
    ... and make use of PRIu format specifiers when applicable.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/acpi/tables/tbfadt.c  | 6 +++---
 xen/drivers/acpi/tables/tbutils.c | 1 -
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/xen/drivers/acpi/tables/tbfadt.c b/xen/drivers/acpi/tables/tbfadt.c
index f11fd5a900..d8fcc50dec 100644
--- a/xen/drivers/acpi/tables/tbfadt.c
+++ b/xen/drivers/acpi/tables/tbfadt.c
@@ -233,9 +233,9 @@ void __init acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 lengt
 	 */
 	if (length > sizeof(struct acpi_table_fadt)) {
 		ACPI_WARNING((AE_INFO,
-			      "FADT (revision %u) is longer than ACPI 5.0 version,"
-			      " truncating length %u to %zu",
-			      table->revision, (unsigned)length,
+			      "FADT (revision %"PRIu8") is longer than ACPI 5.0 version,"
+			      " truncating length %"PRIu32" to %zu",
+			      table->revision, length,
 			      sizeof(struct acpi_table_fadt)));
 	}
 
diff --git a/xen/drivers/acpi/tables/tbutils.c b/xen/drivers/acpi/tables/tbutils.c
index d135a50ff9..11412c47de 100644
--- a/xen/drivers/acpi/tables/tbutils.c
+++ b/xen/drivers/acpi/tables/tbutils.c
@@ -481,7 +481,6 @@ acpi_tb_parse_root_table(acpi_physical_address rsdp_address, u8 flags)
 			if (ACPI_FAILURE(status)) {
 				ACPI_WARNING((AE_INFO,
 					      "Truncating %u table entries!",
-					      (unsigned)
 					      (acpi_gbl_root_table_list.size -
 					       acpi_gbl_root_table_list.
 					       count)));
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen/arm: smmu-v3: Fix MISRA C 2012 Rule 1.3 violations
Message-Id: <E1o6LoK-0007YH-2Y@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 00:44:04 +0000

commit 93aa071f66b78a2abbf134aeb96b02f066e6091d
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 18:08:51 2022 +0300
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 28 17:41:27 2022 -0700

    xen/arm: smmu-v3: Fix MISRA C 2012 Rule 1.3 violations
    
    The expression 1 << 31 produces undefined behaviour because the type of integer
    constant 1 is (signed) int and the result of shifting 1 by 31 bits is not
    representable in the (signed) int type.
    Change the type of 1 to unsigned int by adding the U suffix.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Rahul Singh <rahul.singh@arm.com>
---
 xen/drivers/passthrough/arm/smmu-v3.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index 1e857f915a..f2562acc38 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -338,7 +338,7 @@ static int platform_get_irq_byname_optional(struct device *dev,
 #define CR2_E2H				(1 << 0)
 
 #define ARM_SMMU_GBPA			0x44
-#define GBPA_UPDATE			(1 << 31)
+#define GBPA_UPDATE			(1U << 31)
 #define GBPA_ABORT			(1 << 20)
 
 #define ARM_SMMU_IRQ_CTRL		0x50
@@ -410,7 +410,7 @@ static int platform_get_irq_byname_optional(struct device *dev,
 
 #define Q_IDX(llq, p)			((p) & ((1 << (llq)->max_n_shift) - 1))
 #define Q_WRP(llq, p)			((p) & (1 << (llq)->max_n_shift))
-#define Q_OVERFLOW_FLAG			(1 << 31)
+#define Q_OVERFLOW_FLAG			(1U << 31)
 #define Q_OVF(p)			((p) & Q_OVERFLOW_FLAG)
 #define Q_ENT(q, p)			((q)->base +			\
 					 Q_IDX(&((q)->llq), p) *	\
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] x86: correct asm() constraints when dealing with immediate selector values
Message-Id: <E1o6TIn-00075F-Ri@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:01 +0000

commit 026007376e9807da94930c38500acbd62605545b
Author:     Jan Beulich <jbeulich@suse.com>
AuthorDate: Tue Jun 28 17:00:29 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:00:29 2022 +0200

    x86: correct asm() constraints when dealing with immediate selector values
    
    asm() constraints need to fit both the intended insn(s) which the
    respective operands are going to be used with as well as the actual kind
    of value specified. "m" (alone) together with a constant, however, leads
    to gcc saying
    
    error: memory input <N> is not directly addressable
    
    while clang complains
    
    error: invalid lvalue in asm input for constraint 'm'
    
    And rightly so - in order to access a memory operand, an address needs
    to be specified to the insn. In some cases it might be possible for a
    compiler to synthesize a memory operand holding the requested constant,
    but I think any solution there would have sharp edges.
    
    If "m" alone doesn't work with constants, it is at best pointless (and
    perhaps misleading or even risky - the compiler might decide to actually
    pick "m" and not try very hard to find a suitable register) to specify
    it alongside "r". And indeed clang does, oddly enough despite its
    objection to "m" alone. Which means there the change also improves the
    generated code.
    
    While there also switch the two operand case to using named operands.
    
    Signed-off-by: Jan Beulich <jbeulich@suse.com>
    Acked-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/cpu/amd.c      | 2 +-
 xen/arch/x86/x86_64/traps.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 94b9e31016..f1d11a1cb7 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -736,7 +736,7 @@ void __init detect_zen2_null_seg_behaviour(void)
 	uint64_t base;
 
 	wrmsrl(MSR_FS_BASE, 1);
-	asm volatile ( "mov %0, %%fs" :: "rm" (0) );
+	asm volatile ( "mov %0, %%fs" :: "r" (0) );
 	rdmsrl(MSR_FS_BASE, base);
 
 	if (base == 0)
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index 9d7f1f818b..f8cb8d9a94 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -274,7 +274,8 @@ void do_double_fault(struct cpu_user_regs *regs)
 
     console_force_unlock();
 
-    asm ( "lsll %1, %0" : "=r" (cpu) : "rm" (PER_CPU_SELECTOR) );
+    asm ( "lsll %[sel], %[limit]" : [limit] "=r" (cpu)
+                                  : [sel] "r" (PER_CPU_SELECTOR) );
 
     /* Find information saved during fault and dump it to the console. */
     printk("*** DOUBLE FAULT ***\n");
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen: move do_vcpu_op() to arch specific code
Message-Id: <E1o6TIx-00077H-VV@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:11 +0000

commit 8a96c0ea79999a0f9a11c93a7009660efa624219
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 28 17:02:42 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:02:42 2022 +0200

    xen: move do_vcpu_op() to arch specific code
    
    The entry point used for the vcpu_op hypercall on Arm is different
    from the one on x86 today, as some of the common sub-ops are not
    supported on Arm. The Arm specific handler filters out the not
    supported sub-ops and then calls the common handler. This leads to the
    weird call hierarchy:
    
      do_arm_vcpu_op()
        do_vcpu_op()
          arch_do_vcpu_op()
    
    Clean this up by renaming do_vcpu_op() to common_vcpu_op() and
    arch_do_vcpu_op() in each architecture to do_vcpu_op(). This way one
    of above calls can be avoided without restricting any potential
    future use of common sub-ops for Arm.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
    Acked-by: Roger Pau Monné <roger.pau@cirtrix.com>
---
 xen/arch/arm/domain.c                | 15 ++++++++-------
 xen/arch/arm/include/asm/hypercall.h |  2 --
 xen/arch/arm/traps.c                 |  2 +-
 xen/arch/x86/domain.c                | 12 ++++++++----
 xen/arch/x86/include/asm/hypercall.h |  2 +-
 xen/arch/x86/x86_64/domain.c         | 18 +++++++++++++-----
 xen/common/compat/domain.c           | 15 ++++++---------
 xen/common/domain.c                  | 12 ++++--------
 xen/include/xen/hypercall.h          |  2 +-
 9 files changed, 42 insertions(+), 38 deletions(-)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 8110c1df86..2f8eaab7b5 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -1079,23 +1079,24 @@ void arch_dump_domain_info(struct domain *d)
 }
 
 
-long do_arm_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+long do_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
+
     switch ( cmd )
     {
         case VCPUOP_register_vcpu_info:
         case VCPUOP_register_runstate_memory_area:
-            return do_vcpu_op(cmd, vcpuid, arg);
+            return common_vcpu_op(cmd, v, arg);
         default:
             return -EINVAL;
     }
 }
 
-long arch_do_vcpu_op(int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
-{
-    return -ENOSYS;
-}
-
 void arch_dump_vcpu_info(struct vcpu *v)
 {
     gic_dump_info(v);
diff --git a/xen/arch/arm/include/asm/hypercall.h b/xen/arch/arm/include/asm/hypercall.h
index a6fdfed8de..8182895358 100644
--- a/xen/arch/arm/include/asm/hypercall.h
+++ b/xen/arch/arm/include/asm/hypercall.h
@@ -8,8 +8,6 @@
 #include <public/domctl.h> /* for arch_do_domctl */
 int do_arm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg);
 
-long do_arm_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg);
-
 long subarch_do_domctl(struct xen_domctl *domctl, struct domain *d,
                        XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
 
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index e989e742fd..785f2121d1 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1380,7 +1380,7 @@ static arm_hypercall_t arm_hypercall_table[] = {
 #endif
     HYPERCALL(multicall, 2),
     HYPERCALL(platform_op, 1),
-    HYPERCALL_ARM(vcpu_op, 3),
+    HYPERCALL(vcpu_op, 3),
     HYPERCALL(vm_assist, 2),
 #ifdef CONFIG_ARGO
     HYPERCALL(argo_op, 5),
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 9eddeaa20b..0d2944fe14 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1491,11 +1491,15 @@ int arch_vcpu_reset(struct vcpu *v)
     return 0;
 }
 
-long
-arch_do_vcpu_op(
-    int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
+long cf_check do_vcpu_op(int cmd, unsigned int vcpuid,
+                         XEN_GUEST_HANDLE_PARAM(void) arg)
 {
     long rc = 0;
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
 
     switch ( cmd )
     {
@@ -1547,7 +1551,7 @@ arch_do_vcpu_op(
     }
 
     default:
-        rc = -ENOSYS;
+        rc = common_vcpu_op(cmd, v, arg);
         break;
     }
 
diff --git a/xen/arch/x86/include/asm/hypercall.h b/xen/arch/x86/include/asm/hypercall.h
index 401e77d1e9..1c57236dc7 100644
--- a/xen/arch/x86/include/asm/hypercall.h
+++ b/xen/arch/x86/include/asm/hypercall.h
@@ -149,7 +149,7 @@ compat_physdev_op(
     XEN_GUEST_HANDLE_PARAM(void) arg);
 
 extern int
-arch_compat_vcpu_op(
+compat_common_vcpu_op(
     int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg);
 
 extern int cf_check compat_mmuext_op(
diff --git a/xen/arch/x86/x86_64/domain.c b/xen/arch/x86/x86_64/domain.c
index c46dccc25a..9c559aa3ea 100644
--- a/xen/arch/x86/x86_64/domain.c
+++ b/xen/arch/x86/x86_64/domain.c
@@ -12,11 +12,15 @@
 CHECK_vcpu_get_physid;
 #undef xen_vcpu_get_physid
 
-int
-arch_compat_vcpu_op(
-    int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
+int cf_check
+compat_vcpu_op(int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    int rc = -ENOSYS;
+    int rc;
+    struct domain *d = current->domain;
+    struct vcpu *v;
+
+    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
+        return -ENOENT;
 
     switch ( cmd )
     {
@@ -55,7 +59,11 @@ arch_compat_vcpu_op(
     }
 
     case VCPUOP_get_physid:
-        rc = arch_do_vcpu_op(cmd, v, arg);
+        rc = do_vcpu_op(cmd, vcpuid, arg);
+        break;
+
+    default:
+        rc = compat_common_vcpu_op(cmd, v, arg);
         break;
     }
 
diff --git a/xen/common/compat/domain.c b/xen/common/compat/domain.c
index afae27eeba..1119534679 100644
--- a/xen/common/compat/domain.c
+++ b/xen/common/compat/domain.c
@@ -38,15 +38,12 @@ CHECK_vcpu_hvm_context;
 
 #endif
 
-int cf_check compat_vcpu_op(
-    int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+int compat_common_vcpu_op(int cmd, struct vcpu *v,
+                          XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    struct domain *d = current->domain;
-    struct vcpu *v;
     int rc = 0;
-
-    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
-        return -ENOENT;
+    struct domain *d = current->domain;
+    unsigned int vcpuid = v->vcpu_id;
 
     switch ( cmd )
     {
@@ -103,7 +100,7 @@ int cf_check compat_vcpu_op(
     case VCPUOP_stop_singleshot_timer:
     case VCPUOP_register_vcpu_info:
     case VCPUOP_send_nmi:
-        rc = do_vcpu_op(cmd, vcpuid, arg);
+        rc = common_vcpu_op(cmd, v, arg);
         break;
 
     case VCPUOP_get_runstate_info:
@@ -134,7 +131,7 @@ int cf_check compat_vcpu_op(
     }
 
     default:
-        rc = arch_compat_vcpu_op(cmd, v, arg);
+        rc = -ENOSYS;
         break;
     }
 
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 7570eae91a..b9f80bd2bb 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1569,15 +1569,11 @@ int default_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-long cf_check do_vcpu_op(
-    int cmd, unsigned int vcpuid, XEN_GUEST_HANDLE_PARAM(void) arg)
+long common_vcpu_op(int cmd, struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg)
 {
-    struct domain *d = current->domain;
-    struct vcpu *v;
     long rc = 0;
-
-    if ( (v = domain_vcpu(d, vcpuid)) == NULL )
-        return -ENOENT;
+    struct domain *d = v->domain;
+    unsigned int vcpuid = v->vcpu_id;
 
     switch ( cmd )
     {
@@ -1749,7 +1745,7 @@ long cf_check do_vcpu_op(
     }
 
     default:
-        rc = arch_do_vcpu_op(cmd, v, arg);
+        rc = -ENOSYS;
         break;
     }
 
diff --git a/xen/include/xen/hypercall.h b/xen/include/xen/hypercall.h
index a1b6575976..81aae7a662 100644
--- a/xen/include/xen/hypercall.h
+++ b/xen/include/xen/hypercall.h
@@ -110,7 +110,7 @@ do_vcpu_op(
 
 struct vcpu;
 extern long
-arch_do_vcpu_op(int cmd,
+common_vcpu_op(int cmd,
     struct vcpu *v,
     XEN_GUEST_HANDLE_PARAM(void) arg);
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] tools/xenstore: modify feature bit specification in xenstore-ring.txt
Message-Id: <E1o6TJ8-00077i-2Z@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:22 +0000

commit 53e5d2166ac2a05ab8ce4a2fe650277b3fa168b2
Author:     Juergen Gross <jgross@suse.com>
AuthorDate: Tue Jun 28 17:06:14 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:06:14 2022 +0200

    tools/xenstore: modify feature bit specification in xenstore-ring.txt
    
    Instead of specifying the feature bits in xenstore-ring.txt as a mask
    value use bit numbers. This will make the specification easier to read
    when adding more features.
    
    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Julien Grall <jgrall@amazon.com>
---
 docs/misc/xenstore-ring.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/docs/misc/xenstore-ring.txt b/docs/misc/xenstore-ring.txt
index f3d6ca4264..2792d13530 100644
--- a/docs/misc/xenstore-ring.txt
+++ b/docs/misc/xenstore-ring.txt
@@ -62,12 +62,13 @@ the server feature bitmap. The server features are offered to the guest;
 it is up to the guest whether to use them or not. The guest should ignore
 any unknown feature bits.
 
-The following features are defined:
+The following features are defined (bit number 0 is equivalent to a mask
+value of 1):
 
-Mask    Description
+Bit     Description
 -----------------------------------------------------------------
-1       Ring reconnection (see the ring reconnection feature below)
-2       Connection error indicator (see connection error feature below)
+0       Ring reconnection (see the ring reconnection feature below)
+1       Connection error indicator (see connection error feature below)
 
 The "Connection state" field is used to request a ring close and reconnect.
 The "Connection state" field only contains valid data if the server has
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] page_alloc: fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o6TJI-000789-5T@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:32 +0000

commit 56ff13f640b400f5e68e0450b7b24f6deae13b63
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:06:37 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:06:37 2022 +0200

    page_alloc: fix MISRA C 2012 Rule 8.7 violation
    
    The variables page_offlined_list and page_broken_list are referenced only
    in page_alloc.c.
    Change their linkage from external to internal by adding the storage-class
    specifier static to their definitions.
    
    This patch also aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/page_alloc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 000ae6b972..fe0e15429a 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -235,9 +235,9 @@ static unsigned int dma_bitsize;
 integer_param("dma_bits", dma_bitsize);
 
 /* Offlined page list, protected by heap_lock. */
-PAGE_LIST_HEAD(page_offlined_list);
+static PAGE_LIST_HEAD(page_offlined_list);
 /* Broken page list, protected by heap_lock. */
-PAGE_LIST_HEAD(page_broken_list);
+static PAGE_LIST_HEAD(page_broken_list);
 
 /*************************
  * BOOT-TIME ALLOCATOR
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] iommu: fix MISRA C 2012 Rule 8.7 violation
Message-Id: <E1o6TJS-00078d-8c@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:42 +0000

commit 1fd3698175d2de5c0b91c28902cfe0dac6c332a9
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:07:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:07:11 2022 +0200

    iommu: fix MISRA C 2012 Rule 8.7 violation
    
    The variable iommu_crash_disable is referenced only in one translation unit.
    Change its linkage from external to internal by adding the storage-class
    specifier static to its definition.
    
    This patch also aims to resolve indirectly a MISRA C 2012 Rule 8.4 violation
    warning.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/passthrough/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c
index 75df3aa8dd..77f64e6174 100644
--- a/xen/drivers/passthrough/iommu.c
+++ b/xen/drivers/passthrough/iommu.c
@@ -29,7 +29,7 @@ bool_t __initdata iommu_enable = 1;
 bool_t __read_mostly iommu_enabled;
 bool_t __read_mostly force_iommu;
 bool_t __read_mostly iommu_verbose;
-bool_t __read_mostly iommu_crash_disable;
+static bool_t __read_mostly iommu_crash_disable;
 
 #define IOMMU_quarantine_none         0 /* aka false */
 #define IOMMU_quarantine_basic        1 /* aka true */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] arm64/traps: fix MISRA C 2012 Rule 8.4 violations
Message-Id: <E1o6TJc-000799-Bj@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:44:52 +0000

commit 2c62623c59b5f08e31264b8055a03f0f9e164910
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 17:07:38 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:07:38 2022 +0200

    arm64/traps: fix MISRA C 2012 Rule 8.4 violations
    
    Add a function prototype for do_bad_mode() in <asm/arm64/traps.h> and include
    header <asm/traps.h> in traps.c, so that the declarations of the functions
    do_bad_mode() and finalize_instr_emulation(), which have external linkage,
    are visible before the function definitions.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
 xen/arch/arm/arm64/traps.c             | 1 +
 xen/arch/arm/include/asm/arm64/traps.h | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/xen/arch/arm/arm64/traps.c b/xen/arch/arm/arm64/traps.c
index 3f8858acec..a995ad7c2c 100644
--- a/xen/arch/arm/arm64/traps.c
+++ b/xen/arch/arm/arm64/traps.c
@@ -22,6 +22,7 @@
 #include <asm/hsr.h>
 #include <asm/system.h>
 #include <asm/processor.h>
+#include <asm/traps.h>
 
 #include <public/xen.h>
 
diff --git a/xen/arch/arm/include/asm/arm64/traps.h b/xen/arch/arm/include/asm/arm64/traps.h
index 2379b578cb..a347cb13d6 100644
--- a/xen/arch/arm/include/asm/arm64/traps.h
+++ b/xen/arch/arm/include/asm/arm64/traps.h
@@ -6,6 +6,8 @@ void inject_undef64_exception(struct cpu_user_regs *regs, int instr_len);
 void do_sysreg(struct cpu_user_regs *regs,
                const union hsr hsr);
 
+void do_bad_mode(struct cpu_user_regs *regs, int reason);
+
 #endif /* __ASM_ARM64_TRAPS__ */
 /*
  * Local variables:
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: Use unsigned int instead of plain unsigned
Message-Id: <E1o6TJm-00079u-F3@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:02 +0000

commit 05fb789e83b1404c786d63350df4cc25b1898292
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:22:30 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:22:30 2022 +0200

    xen/arm: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/domain_build.c             |  2 +-
 xen/arch/arm/guestcopy.c                | 13 +++++++------
 xen/arch/arm/include/asm/arm32/bitops.h |  8 ++++----
 xen/arch/arm/include/asm/fixmap.h       |  4 ++--
 xen/arch/arm/include/asm/guest_access.h |  8 ++++----
 xen/arch/arm/include/asm/mm.h           |  2 +-
 xen/arch/arm/irq.c                      |  2 +-
 xen/arch/arm/kernel.c                   |  2 +-
 xen/arch/arm/mm.c                       |  4 ++--
 9 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 7ddd16c26d..3fd1186b53 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1007,7 +1007,7 @@ static void __init set_interrupt(gic_interrupt_t interrupt,
  */
 static int __init fdt_property_interrupts(const struct kernel_info *kinfo,
                                           gic_interrupt_t *intr,
-                                          unsigned num_irq)
+                                          unsigned int num_irq)
 {
     int res;
 
diff --git a/xen/arch/arm/guestcopy.c b/xen/arch/arm/guestcopy.c
index 32681606d8..abb6236e27 100644
--- a/xen/arch/arm/guestcopy.c
+++ b/xen/arch/arm/guestcopy.c
@@ -56,7 +56,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
                                 copy_info_t info, unsigned int flags)
 {
     /* XXX needs to handle faults */
-    unsigned offset = addr & ~PAGE_MASK;
+    unsigned int offset = addr & ~PAGE_MASK;
 
     BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t));
     BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t));
@@ -64,7 +64,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
     while ( len )
     {
         void *p;
-        unsigned size = min(len, (unsigned)PAGE_SIZE - offset);
+        unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset);
         struct page_info *page;
 
         page = translate_get_page(info, addr, flags & COPY_linear,
@@ -106,26 +106,27 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len,
     return 0;
 }
 
-unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len)
+unsigned long raw_copy_to_guest(void *to, const void *from, unsigned int len)
 {
     return copy_guest((void *)from, (vaddr_t)to, len,
                       GVA_INFO(current), COPY_to_guest | COPY_linear);
 }
 
 unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
-                                             unsigned len)
+                                             unsigned int len)
 {
     return copy_guest((void *)from, (vaddr_t)to, len, GVA_INFO(current),
                       COPY_to_guest | COPY_flush_dcache | COPY_linear);
 }
 
-unsigned long raw_clear_guest(void *to, unsigned len)
+unsigned long raw_clear_guest(void *to, unsigned int len)
 {
     return copy_guest(NULL, (vaddr_t)to, len, GVA_INFO(current),
                       COPY_to_guest | COPY_linear);
 }
 
-unsigned long raw_copy_from_guest(void *to, const void __user *from, unsigned len)
+unsigned long raw_copy_from_guest(void *to, const void __user *from,
+                                  unsigned int len)
 {
     return copy_guest(to, (vaddr_t)from, len, GVA_INFO(current),
                       COPY_from_guest | COPY_linear);
diff --git a/xen/arch/arm/include/asm/arm32/bitops.h b/xen/arch/arm/include/asm/arm32/bitops.h
index 57938a5874..d0309d47c1 100644
--- a/xen/arch/arm/include/asm/arm32/bitops.h
+++ b/xen/arch/arm/include/asm/arm32/bitops.h
@@ -6,17 +6,17 @@
 /*
  * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
  */
-extern int _find_first_zero_bit_le(const void * p, unsigned size);
+extern int _find_first_zero_bit_le(const void * p, unsigned int size);
 extern int _find_next_zero_bit_le(const void * p, int size, int offset);
-extern int _find_first_bit_le(const unsigned long *p, unsigned size);
+extern int _find_first_bit_le(const unsigned long *p, unsigned int size);
 extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
 
 /*
  * Big endian assembly bitops.  nr = 0 -> byte 3 bit 0.
  */
-extern int _find_first_zero_bit_be(const void * p, unsigned size);
+extern int _find_first_zero_bit_be(const void * p, unsigned int size);
 extern int _find_next_zero_bit_be(const void * p, int size, int offset);
-extern int _find_first_bit_be(const unsigned long *p, unsigned size);
+extern int _find_first_bit_be(const unsigned long *p, unsigned int size);
 extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 
 #ifndef __ARMEB__
diff --git a/xen/arch/arm/include/asm/fixmap.h b/xen/arch/arm/include/asm/fixmap.h
index 365a2385a0..d0c9a52c8c 100644
--- a/xen/arch/arm/include/asm/fixmap.h
+++ b/xen/arch/arm/include/asm/fixmap.h
@@ -30,9 +30,9 @@
 extern lpae_t xen_fixmap[XEN_PT_LPAE_ENTRIES];
 
 /* Map a page in a fixmap entry */
-extern void set_fixmap(unsigned map, mfn_t mfn, unsigned attributes);
+extern void set_fixmap(unsigned int map, mfn_t mfn, unsigned int attributes);
 /* Remove a mapping from a fixmap entry */
-extern void clear_fixmap(unsigned map);
+extern void clear_fixmap(unsigned int map);
 
 #define fix_to_virt(slot) ((void *)FIXMAP_ADDR(slot))
 
diff --git a/xen/arch/arm/include/asm/guest_access.h b/xen/arch/arm/include/asm/guest_access.h
index 53766386d3..4421e43611 100644
--- a/xen/arch/arm/include/asm/guest_access.h
+++ b/xen/arch/arm/include/asm/guest_access.h
@@ -4,11 +4,11 @@
 #include <xen/errno.h>
 #include <xen/sched.h>
 
-unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len);
+unsigned long raw_copy_to_guest(void *to, const void *from, unsigned int len);
 unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from,
-                                             unsigned len);
-unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len);
-unsigned long raw_clear_guest(void *to, unsigned len);
+                                             unsigned int len);
+unsigned long raw_copy_from_guest(void *to, const void *from, unsigned int len);
+unsigned long raw_clear_guest(void *to, unsigned int len);
 
 /* Copy data to guest physical address, then clean the region. */
 unsigned long copy_to_guest_phys_flush_dcache(struct domain *d,
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index 045a8ba4bb..c4bc3cd1e5 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -192,7 +192,7 @@ extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns
 /* Map a frame table to cover physical addresses ps through pe */
 extern void setup_frametable_mappings(paddr_t ps, paddr_t pe);
 /* map a physical range in virtual memory */
-void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned attributes);
+void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int attributes);
 
 static inline void __iomem *ioremap_nocache(paddr_t start, size_t len)
 {
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 5268c01434..fd0c15fffd 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -631,7 +631,7 @@ void pirq_set_affinity(struct domain *d, int pirq, const cpumask_t *mask)
     BUG();
 }
 
-static bool irq_validate_new_type(unsigned int curr, unsigned new)
+static bool irq_validate_new_type(unsigned int curr, unsigned int new)
 {
     return (curr == IRQ_TYPE_INVALID || curr == new );
 }
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 25ded1c056..2556a45c38 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -256,7 +256,7 @@ static __init int kernel_decompress(struct bootmodule *mod)
     char *output, *input;
     char magic[2];
     int rc;
-    unsigned kernel_order_out;
+    unsigned int kernel_order_out;
     paddr_t output_size;
     struct page_info *pages;
     mfn_t mfn;
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index be37176a47..009b8cd9ef 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -352,7 +352,7 @@ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr)
 }
 
 /* Map a 4k page in a fixmap entry */
-void set_fixmap(unsigned map, mfn_t mfn, unsigned int flags)
+void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags)
 {
     int res;
 
@@ -361,7 +361,7 @@ void set_fixmap(unsigned map, mfn_t mfn, unsigned int flags)
 }
 
 /* Remove a mapping from a fixmap entry */
-void clear_fixmap(unsigned map)
+void clear_fixmap(unsigned int map)
 {
     int res;
 
--
generated by git-patchbot for /home/xen/git/xen.git#master


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Subject: [xen master] xen/domain: Use unsigned int instead of plain unsigned
Message-Id: <E1o6TJw-0007AK-IJ@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:12 +0000

commit 056cb4c360a029de00a742c17854e18b2adf70d3
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:23:09 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:23:09 2022 +0200

    xen/domain: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/common/domain.c      | 2 +-
 xen/include/xen/domain.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index b9f80bd2bb..3b1169d79b 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -1446,7 +1446,7 @@ int vcpu_reset(struct vcpu *v)
  * of memory, and it sets a pending event to make sure that a pending
  * event doesn't get missed.
  */
-int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned offset)
+int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned int offset)
 {
     struct domain *d = v->domain;
     void *mapping;
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index 1c3c88a14d..628b14b086 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -65,7 +65,7 @@ void cf_check free_pirq_struct(void *);
 int  arch_vcpu_create(struct vcpu *v);
 void arch_vcpu_destroy(struct vcpu *v);
 
-int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned offset);
+int map_vcpu_info(struct vcpu *v, unsigned long gfn, unsigned int offset);
 void unmap_vcpu_info(struct vcpu *v);
 
 int arch_domain_create(struct domain *d,
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] include/xen: Use unsigned int instead of plain unsigned
Message-Id: <E1o6TK6-0007Al-LE@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:22 +0000

commit 586868cb352a9de5ad0f2d91136b2bca3d4fb88f
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:23:46 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:23:46 2022 +0200

    include/xen: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/xen/perfc.h | 2 +-
 xen/include/xen/sched.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/perfc.h b/xen/include/xen/perfc.h
index bb010b0aae..7c5ce537bd 100644
--- a/xen/include/xen/perfc.h
+++ b/xen/include/xen/perfc.h
@@ -49,7 +49,7 @@ enum perfcounter {
 #undef PERFSTATUS
 #undef PERFSTATUS_ARRAY
 
-typedef unsigned perfc_t;
+typedef unsigned int perfc_t;
 #define PRIperfc ""
 
 DECLARE_PER_CPU(perfc_t[NUM_PERFCOUNTERS], perfcounters);
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 463d41ffb6..b9515eb497 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -519,7 +519,7 @@ struct domain
     /* hvm_print_line() and guest_console_write() logging. */
 #define DOMAIN_PBUF_SIZE 200
     char       *pbuf;
-    unsigned    pbuf_idx;
+    unsigned int pbuf_idx;
     spinlock_t  pbuf_lock;
 
     /* OProfile support. */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] include/public: Use uint32_t instead of unsigned (int)
Message-Id: <E1o6TKG-0007BB-O5@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:32 +0000

commit 63e165e8916c7bed2a9527615e9de7de25a2143a
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:25:11 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:25:11 2022 +0200

    include/public: Use uint32_t instead of unsigned (int)
    
    Public interfaces shall make use of types that indicate size and
    signedness. Take the opportunity to also modify places where explicit
    unsigned int is used.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/include/public/physdev.h |  4 ++--
 xen/include/public/sysctl.h  | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/xen/include/public/physdev.h b/xen/include/public/physdev.h
index d271766ad0..f8d1905e30 100644
--- a/xen/include/public/physdev.h
+++ b/xen/include/public/physdev.h
@@ -211,8 +211,8 @@ struct physdev_manage_pci_ext {
     /* IN */
     uint8_t bus;
     uint8_t devfn;
-    unsigned is_extfn;
-    unsigned is_virtfn;
+    uint32_t is_extfn;
+    uint32_t is_virtfn;
     struct {
         uint8_t bus;
         uint8_t devfn;
diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h
index b0a4af8789..60c8711483 100644
--- a/xen/include/public/sysctl.h
+++ b/xen/include/public/sysctl.h
@@ -624,7 +624,7 @@ struct xen_sysctl_arinc653_schedule {
         /* If a domain has multiple VCPUs, vcpu_id specifies which one
          * this schedule entry applies to. It should be set to 0 if
          * there is only one VCPU for the domain. */
-        unsigned int vcpu_id;
+        uint32_t vcpu_id;
         /* runtime specifies the amount of time that should be allocated
          * to this VCPU per major frame. It is specified in nanoseconds */
         uint64_aligned_t runtime;
@@ -644,18 +644,18 @@ struct xen_sysctl_credit_schedule {
     /* Length of timeslice in milliseconds */
 #define XEN_SYSCTL_CSCHED_TSLICE_MAX 1000
 #define XEN_SYSCTL_CSCHED_TSLICE_MIN 1
-    unsigned tslice_ms;
-    unsigned ratelimit_us;
+    uint32_t tslice_ms;
+    uint32_t ratelimit_us;
     /*
      * How long we consider a vCPU to be cache-hot on the
      * CPU where it has run (max 100ms, in microseconds)
     */
 #define XEN_SYSCTL_CSCHED_MGR_DLY_MAX_US (100 * 1000)
-    unsigned vcpu_migr_delay_us;
+    uint32_t vcpu_migr_delay_us;
 };
 
 struct xen_sysctl_credit2_schedule {
-    unsigned ratelimit_us;
+    uint32_t ratelimit_us;
 };
 
 /* XEN_SYSCTL_scheduler_op */
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xsm/flask: Use unsigned int instead of plain unsigned
Message-Id: <E1o6TKQ-0007Ba-Qn@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:42 +0000

commit e8dca8e70189830344ee3ad5b6bc82fe55e4c143
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:25:50 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:25:50 2022 +0200

    xsm/flask: Use unsigned int instead of plain unsigned
    
    This is just for the style and consistency reasons as the former is
    being used more often than the latter.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/xsm/flask/ss/avtab.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/xsm/flask/ss/avtab.c b/xen/xsm/flask/ss/avtab.c
index 017f5183de..9761d028d8 100644
--- a/xen/xsm/flask/ss/avtab.c
+++ b/xen/xsm/flask/ss/avtab.c
@@ -349,7 +349,7 @@ int avtab_read_item(struct avtab *a, void *fp, struct policydb *pol,
     struct avtab_key key;
     struct avtab_datum datum;
     int i, rc;
-    unsigned set;
+    unsigned int set;
 
     memset(&key, 0, sizeof(struct avtab_key));
     memset(&datum, 0, sizeof(struct avtab_datum));
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] acpi: drop the unneeded casts to unsigned
Message-Id: <E1o6TKa-0007C0-TZ@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 08:45:52 +0000

commit 8c99264c6746541ddbfd7afec533e6ad1c8c41a5
Author:     Michal Orzel <michal.orzel@arm.com>
AuthorDate: Tue Jun 28 17:26:04 2022 +0200
Commit:     Jan Beulich <jbeulich@suse.com>
CommitDate: Tue Jun 28 17:26:04 2022 +0200

    acpi: drop the unneeded casts to unsigned
    
    ... and make use of PRIu format specifiers when applicable.
    
    Signed-off-by: Michal Orzel <michal.orzel@arm.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
 xen/drivers/acpi/tables/tbfadt.c  | 6 +++---
 xen/drivers/acpi/tables/tbutils.c | 1 -
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/xen/drivers/acpi/tables/tbfadt.c b/xen/drivers/acpi/tables/tbfadt.c
index f11fd5a900..d8fcc50dec 100644
--- a/xen/drivers/acpi/tables/tbfadt.c
+++ b/xen/drivers/acpi/tables/tbfadt.c
@@ -233,9 +233,9 @@ void __init acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 lengt
 	 */
 	if (length > sizeof(struct acpi_table_fadt)) {
 		ACPI_WARNING((AE_INFO,
-			      "FADT (revision %u) is longer than ACPI 5.0 version,"
-			      " truncating length %u to %zu",
-			      table->revision, (unsigned)length,
+			      "FADT (revision %"PRIu8") is longer than ACPI 5.0 version,"
+			      " truncating length %"PRIu32" to %zu",
+			      table->revision, length,
 			      sizeof(struct acpi_table_fadt)));
 	}
 
diff --git a/xen/drivers/acpi/tables/tbutils.c b/xen/drivers/acpi/tables/tbutils.c
index d135a50ff9..11412c47de 100644
--- a/xen/drivers/acpi/tables/tbutils.c
+++ b/xen/drivers/acpi/tables/tbutils.c
@@ -481,7 +481,6 @@ acpi_tb_parse_root_table(acpi_physical_address rsdp_address, u8 flags)
 			if (ACPI_FAILURE(status)) {
 				ACPI_WARNING((AE_INFO,
 					      "Truncating %u table entries!",
-					      (unsigned)
 					      (acpi_gbl_root_table_list.size -
 					       acpi_gbl_root_table_list.
 					       count)));
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen master] xen/arm: smmu-v3: Fix MISRA C 2012 Rule 1.3 violations
Message-Id: <E1o6eiD-0006PH-MN@xenbits.xenproject.org>
Date: Wed, 29 Jun 2022 20:55:01 +0000

commit 93aa071f66b78a2abbf134aeb96b02f066e6091d
Author:     Xenia Ragiadakou <burzalodowa@gmail.com>
AuthorDate: Tue Jun 28 18:08:51 2022 +0300
Commit:     Stefano Stabellini <stefano.stabellini@amd.com>
CommitDate: Tue Jun 28 17:41:27 2022 -0700

    xen/arm: smmu-v3: Fix MISRA C 2012 Rule 1.3 violations
    
    The expression 1 << 31 produces undefined behaviour because the type of integer
    constant 1 is (signed) int and the result of shifting 1 by 31 bits is not
    representable in the (signed) int type.
    Change the type of 1 to unsigned int by adding the U suffix.
    
    Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
    Reviewed-by: Rahul Singh <rahul.singh@arm.com>
---
 xen/drivers/passthrough/arm/smmu-v3.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index 1e857f915a..f2562acc38 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -338,7 +338,7 @@ static int platform_get_irq_byname_optional(struct device *dev,
 #define CR2_E2H				(1 << 0)
 
 #define ARM_SMMU_GBPA			0x44
-#define GBPA_UPDATE			(1 << 31)
+#define GBPA_UPDATE			(1U << 31)
 #define GBPA_ABORT			(1 << 20)
 
 #define ARM_SMMU_IRQ_CTRL		0x50
@@ -410,7 +410,7 @@ static int platform_get_irq_byname_optional(struct device *dev,
 
 #define Q_IDX(llq, p)			((p) & ((1 << (llq)->max_n_shift) - 1))
 #define Q_WRP(llq, p)			((p) & (1 << (llq)->max_n_shift))
-#define Q_OVERFLOW_FLAG			(1 << 31)
+#define Q_OVERFLOW_FLAG			(1U << 31)
 #define Q_OVF(p)			((p) & Q_OVERFLOW_FLAG)
 #define Q_ENT(q, p)			((q)->base +			\
 					 Q_IDX(&((q)->llq), p) *	\
--
generated by git-patchbot for /home/xen/git/xen.git#master


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Only adjust MSR_SPEC_CTRL for idle with legacy IBRS
Message-Id: <E1o6y2K-0005TB-KY@xenbits.xenproject.org>
Date: Thu, 30 Jun 2022 17:33:04 +0000

commit ffc7694e0c99eea158c32aa164b7d1e1bb1dc46b
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Mon Jun 27 11:54:27 2022 +0100
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 30 18:07:13 2022 +0100

    x86/spec-ctrl: Only adjust MSR_SPEC_CTRL for idle with legacy IBRS
    
    Back at the time of the original Spectre-v2 fixes, it was recommended to clear
    MSR_SPEC_CTRL when going idle.  This is because of the side effects on the
    sibling thread caused by the microcode IBRS and STIBP implementations which
    were retrofitted to existing CPUs.
    
    However, there are no relevant cross-thread impacts for the hardware
    IBRS/STIBP implementations, so this logic should not be used on Intel CPUs
    supporting eIBRS, or any AMD CPUs; doing so only adds unnecessary latency to
    the idle path.
    
    Furthermore, there's no point playing with MSR_SPEC_CTRL in the idle paths if
    SMT is disabled for other reasons.
    
    Fixes: 8d03080d2a33 ("x86/spec-ctrl: Cease using thunk=lfence on AMD")
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/include/asm/cpufeatures.h |  2 +-
 xen/arch/x86/include/asm/spec_ctrl.h   |  5 +++--
 xen/arch/x86/spec_ctrl.c               | 10 ++++++++--
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index bd45a144ee..493d338a08 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -33,7 +33,7 @@ XEN_CPUFEATURE(SC_MSR_HVM,        X86_SYNTH(17)) /* MSR_SPEC_CTRL used by Xen fo
 XEN_CPUFEATURE(SC_RSB_PV,         X86_SYNTH(18)) /* RSB overwrite needed for PV */
 XEN_CPUFEATURE(SC_RSB_HVM,        X86_SYNTH(19)) /* RSB overwrite needed for HVM */
 XEN_CPUFEATURE(XEN_SELFSNOOP,     X86_SYNTH(20)) /* SELFSNOOP gets used by Xen itself */
-XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */
+XEN_CPUFEATURE(SC_MSR_IDLE,       X86_SYNTH(21)) /* Clear MSR_SPEC_CTRL on idle */
 XEN_CPUFEATURE(XEN_LBR,           X86_SYNTH(22)) /* Xen uses MSR_DEBUGCTL.LBR */
 /* Bits 23,24 unused. */
 XEN_CPUFEATURE(SC_VERW_IDLE,      X86_SYNTH(25)) /* VERW used by Xen for idle */
diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h
index 751355f471..7e83e0179f 100644
--- a/xen/arch/x86/include/asm/spec_ctrl.h
+++ b/xen/arch/x86/include/asm/spec_ctrl.h
@@ -78,7 +78,8 @@ static always_inline void spec_ctrl_enter_idle(struct cpu_info *info)
     uint32_t val = 0;
 
     /*
-     * Branch Target Injection:
+     * It is recommended in some cases to clear MSR_SPEC_CTRL when going idle,
+     * to avoid impacting sibling threads.
      *
      * Latch the new shadow value, then enable shadowing, then update the MSR.
      * There are no SMP issues here; only local processor ordering concerns.
@@ -114,7 +115,7 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info)
     uint32_t val = info->xen_spec_ctrl;
 
     /*
-     * Branch Target Injection:
+     * Restore MSR_SPEC_CTRL on exit from idle.
      *
      * Disable shadowing before updating the MSR.  There are no SMP issues
      * here; only local processor ordering concerns.
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 1f275ad1fb..57f4fcb213 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -1151,8 +1151,14 @@ void __init init_speculation_mitigations(void)
     /* (Re)init BSP state now that default_spec_ctrl_flags has been calculated. */
     init_shadow_spec_ctrl_state();
 
-    /* If Xen is using any MSR_SPEC_CTRL settings, adjust the idle path. */
-    if ( default_xen_spec_ctrl )
+    /*
+     * For microcoded IBRS only (i.e. Intel, pre eIBRS), it is recommended to
+     * clear MSR_SPEC_CTRL before going idle, to avoid impacting sibling
+     * threads.  Activate this if SMT is enabled, and Xen is using a non-zero
+     * MSR_SPEC_CTRL setting.
+     */
+    if ( boot_cpu_has(X86_FEATURE_IBRSB) && !(caps & ARCH_CAPS_IBRS_ALL) &&
+         hw_smt_enabled && default_xen_spec_ctrl )
         setup_force_cpu_cap(X86_FEATURE_SC_MSR_IDLE);
 
     xpti_init_default(caps);
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/spec-ctrl: Knobs for STIBP and PSFD, and follow hardware STIBP hint
Message-Id: <E1o6y2U-0005Tm-Nv@xenbits.xenproject.org>
Date: Thu, 30 Jun 2022 17:33:14 +0000

commit fef244b179c06fcdfa581f7d57fa6e578c49ff50
Author:     Andrew Cooper <andrew.cooper3@citrix.com>
AuthorDate: Wed Mar 16 13:07:40 2022 +0000
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 30 18:07:13 2022 +0100

    x86/spec-ctrl: Knobs for STIBP and PSFD, and follow hardware STIBP hint
    
    STIBP and PSFD are slightly weird bits, because they're both implied by other
    bits in MSR_SPEC_CTRL.  Add fine grain controls for them, and take the
    implications into account when setting IBRS/SSBD.
    
    Rearrange the IBPB text/variables/logic to keep all the MSR_SPEC_CTRL bits
    together, for consistency.
    
    However, AMD have a hardware hint CPUID bit recommending that STIBP be set
    unilaterally.  This is advertised on Zen3, so follow the recommendation.
    Furthermore, in such cases, set STIBP behind the guest's back for now.  This
    has negligible overhead for the guest, but saves a WRMSR on vmentry.  This is
    the only default change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
---
 docs/misc/xen-command-line.pandoc | 21 ++++++++++---
 xen/arch/x86/hvm/svm/vmcb.c       |  9 ++++++
 xen/arch/x86/spec_ctrl.c          | 65 +++++++++++++++++++++++++++++++++------
 3 files changed, 81 insertions(+), 14 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index a92b7d228c..da18172e50 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2258,8 +2258,9 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
 
 ### spec-ctrl (x86)
 > `= List of [ <bool>, xen=<bool>, {pv,hvm,msr-sc,rsb,md-clear}=<bool>,
->              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,eager-fpu,
->              l1d-flush,branch-harden,srb-lock,unpriv-mmio}=<bool> ]`
+>              bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd,
+>              eager-fpu,l1d-flush,branch-harden,srb-lock,
+>              unpriv-mmio}=<bool> ]`
 
 Controls for speculative execution sidechannel mitigations.  By default, Xen
 will pick the most appropriate mitigations based on compiled in support,
@@ -2309,9 +2310,10 @@ On hardware supporting IBRS (Indirect Branch Restricted Speculation), the
 If Xen is not using IBRS itself, functionality is still set up so IBRS can be
 virtualised for guests.
 
-On hardware supporting IBPB (Indirect Branch Prediction Barrier), the `ibpb=`
-option can be used to force (the default) or prevent Xen from issuing branch
-prediction barriers on vcpu context switches.
+On hardware supporting STIBP (Single Thread Indirect Branch Predictors), the
+`stibp=` option can be used to force or prevent Xen using the feature itself.
+By default, Xen will use STIBP when IBRS is in use (IBRS implies STIBP), and
+when hardware hints recommend using it as a blanket setting.
 
 On hardware supporting SSBD (Speculative Store Bypass Disable), the `ssbd=`
 option can be used to force or prevent Xen using the feature itself.  On AMD
@@ -2319,6 +2321,15 @@ hardware, this is a global option applied at boot, and not virtualised for
 guest use.  On Intel hardware, the feature is virtualised for guests,
 independently of Xen's choice of setting.
 
+On hardware supporting PSFD (Predictive Store Forwarding Disable), the `psfd=`
+option can be used to force or prevent Xen using the feature itself.  By
+default, Xen will not use PSFD.  PSFD is implied by SSBD, and SSBD is off by
+default.
+
+On hardware supporting IBPB (Indirect Branch Prediction Barrier), the `ibpb=`
+option can be used to force (the default) or prevent Xen from issuing branch
+prediction barriers on vcpu context switches.
+
 On all hardware, the `eager-fpu=` option can be used to force or prevent Xen
 from using fully eager FPU context switches.  This is currently implemented as
 a global control.  By default, Xen will choose to use fully eager context
diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 9583096577..0fc57dfd71 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -29,6 +29,7 @@
 #include <asm/hvm/support.h>
 #include <asm/hvm/svm/svm.h>
 #include <asm/hvm/svm/svmdebug.h>
+#include <asm/spec_ctrl.h>
 
 struct vmcb_struct *alloc_vmcb(void)
 {
@@ -176,6 +177,14 @@ static int construct_vmcb(struct vcpu *v)
             vmcb->_pause_filter_thresh = SVM_PAUSETHRESH_INIT;
     }
 
+    /*
+     * When default_xen_spec_ctrl simply SPEC_CTRL_STIBP, default this behind
+     * the back of the VM too.  Our SMT topology isn't accurate, the overhead
+     * is neglegable, and doing this saves a WRMSR on the vmentry path.
+     */
+    if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP )
+        v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP;
+
     return 0;
 }
 
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 57f4fcb213..7a4550db83 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -48,9 +48,13 @@ static enum ind_thunk {
     THUNK_LFENCE,
     THUNK_JMP,
 } opt_thunk __initdata = THUNK_DEFAULT;
+
 static int8_t __initdata opt_ibrs = -1;
+int8_t __initdata opt_stibp = -1;
+bool __ro_after_init opt_ssbd;
+int8_t __initdata opt_psfd = -1;
+
 bool __read_mostly opt_ibpb = true;
-bool __read_mostly opt_ssbd = false;
 int8_t __read_mostly opt_eager_fpu = -1;
 int8_t __read_mostly opt_l1d_flush = -1;
 static bool __initdata opt_branch_harden = true;
@@ -172,12 +176,20 @@ static int __init cf_check parse_spec_ctrl(const char *s)
             else
                 rc = -EINVAL;
         }
+
+        /* Bits in MSR_SPEC_CTRL. */
         else if ( (val = parse_boolean("ibrs", s, ss)) >= 0 )
             opt_ibrs = val;
-        else if ( (val = parse_boolean("ibpb", s, ss)) >= 0 )
-            opt_ibpb = val;
+        else if ( (val = parse_boolean("stibp", s, ss)) >= 0 )
+            opt_stibp = val;
         else if ( (val = parse_boolean("ssbd", s, ss)) >= 0 )
             opt_ssbd = val;
+        else if ( (val = parse_boolean("psfd", s, ss)) >= 0 )
+            opt_psfd = val;
+
+        /* Misc settings. */
+        else if ( (val = parse_boolean("ibpb", s, ss)) >= 0 )
+            opt_ibpb = val;
         else if ( (val = parse_boolean("eager-fpu", s, ss)) >= 0 )
             opt_eager_fpu = val;
         else if ( (val = parse_boolean("l1d-flush", s, ss)) >= 0 )
@@ -376,7 +388,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
                "\n");
 
     /* Settings for Xen's protection, irrespective of guests. */
-    printk("  Xen settings: BTI-Thunk %s, SPEC_CTRL: %s%s%s%s, Other:%s%s%s%s%s\n",
+    printk("  Xen settings: BTI-Thunk %s, SPEC_CTRL: %s%s%s%s%s, Other:%s%s%s%s%s\n",
            thunk == THUNK_NONE      ? "N/A" :
            thunk == THUNK_RETPOLINE ? "RETPOLINE" :
            thunk == THUNK_LFENCE    ? "LFENCE" :
@@ -390,6 +402,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (!boot_cpu_has(X86_FEATURE_SSBD) &&
             !boot_cpu_has(X86_FEATURE_AMD_SSBD))     ? "" :
            (default_xen_spec_ctrl & SPEC_CTRL_SSBD)  ? " SSBD+" : " SSBD-",
+           (!boot_cpu_has(X86_FEATURE_PSFD) &&
+            !boot_cpu_has(X86_FEATURE_INTEL_PSFD))   ? "" :
+           (default_xen_spec_ctrl & SPEC_CTRL_PSFD)  ? " PSFD+" : " PSFD-",
            !(caps & ARCH_CAPS_TSX_CTRL)              ? "" :
            (opt_tsx & 1)                             ? " TSX+" : " TSX-",
            !cpu_has_srbds_ctrl                       ? "" :
@@ -980,10 +995,7 @@ void __init init_speculation_mitigations(void)
         if ( !has_spec_ctrl )
             printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n");
         else if ( opt_ibrs == -1 )
-        {
             opt_ibrs = ibrs = true;
-            default_xen_spec_ctrl |= SPEC_CTRL_IBRS | SPEC_CTRL_STIBP;
-        }
 
         if ( opt_thunk == THUNK_DEFAULT || opt_thunk == THUNK_RETPOLINE )
             thunk = THUNK_JMP;
@@ -1087,14 +1099,49 @@ void __init init_speculation_mitigations(void)
             setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM);
     }
 
-    /* If we have IBRS available, see whether we should use it. */
+    /* Figure out default_xen_spec_ctrl. */
     if ( has_spec_ctrl && ibrs )
+    {
+        /* IBRS implies STIBP.  */
+        if ( opt_stibp == -1 )
+            opt_stibp = 1;
+
         default_xen_spec_ctrl |= SPEC_CTRL_IBRS;
+    }
+
+    /*
+     * Use STIBP by default if the hardware hint is set.  Otherwise, leave it
+     * off as it a severe performance pentalty on pre-eIBRS Intel hardware
+     * where it was retrofitted in microcode.
+     */
+    if ( opt_stibp == -1 )
+        opt_stibp = !!boot_cpu_has(X86_FEATURE_STIBP_ALWAYS);
+
+    if ( opt_stibp && (boot_cpu_has(X86_FEATURE_STIBP) ||
+                       boot_cpu_has(X86_FEATURE_AMD_STIBP)) )
+        default_xen_spec_ctrl |= SPEC_CTRL_STIBP;
 
-    /* If we have SSBD available, see whether we should use it. */
     if ( opt_ssbd && (boot_cpu_has(X86_FEATURE_SSBD) ||
                       boot_cpu_has(X86_FEATURE_AMD_SSBD)) )
+    {
+        /* SSBD implies PSFD */
+        if ( opt_psfd == -1 )
+            opt_psfd = 1;
+
         default_xen_spec_ctrl |= SPEC_CTRL_SSBD;
+    }
+
+    /*
+     * Don't use PSFD by default.  AMD designed the predictor to
+     * auto-clear on privilege change.  PSFD is implied by SSBD, which is
+     * off by default.
+     */
+    if ( opt_psfd == -1 )
+        opt_psfd = 0;
+
+    if ( opt_psfd && (boot_cpu_has(X86_FEATURE_PSFD) ||
+                      boot_cpu_has(X86_FEATURE_INTEL_PSFD)) )
+        default_xen_spec_ctrl |= SPEC_CTRL_PSFD;
 
     /*
      * PV guests can create RSB entries for any linear address they control,
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] x86/ept: fix shattering of special pages
Message-Id: <E1o6y2e-0005UM-RQ@xenbits.xenproject.org>
Date: Thu, 30 Jun 2022 17:33:24 +0000

commit 60d1adfa18793f4ddb70c8e901562d8d3e9be3dc
Author:     Roger Pau Monne <roger.pau@citrix.com>
AuthorDate: Thu Jun 30 18:34:49 2022 +0200
Commit:     Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Thu Jun 30 18:07:13 2022 +0100

    x86/ept: fix shattering of special pages
    
    The current logic in epte_get_entry_emt() will split any page marked
    as special with order greater than zero, without checking whether the
    super page is all special.
    
    Fix this by only splitting the page only if it's not all marked as
    special, in order to prevent unneeded super page shuttering.
    
    The unconditional special super page shattering has caused a
    performance regression on some XenServer GPU pass through workloads.
    
    Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
---
 xen/arch/x86/mm/p2m-ept.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
index b04ca6dbe8..b4919bad51 100644
--- a/xen/arch/x86/mm/p2m-ept.c
+++ b/xen/arch/x86/mm/p2m-ept.c
@@ -491,7 +491,7 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
 {
     int gmtrr_mtype, hmtrr_mtype;
     struct vcpu *v = current;
-    unsigned long i;
+    unsigned long i, special_pgs;
 
     *ipat = false;
 
@@ -525,15 +525,17 @@ int epte_get_entry_emt(struct domain *d, gfn_t gfn, mfn_t mfn,
         return MTRR_TYPE_WRBACK;
     }
 
-    for ( i = 0; i < (1ul << order); i++ )
-    {
+    for ( special_pgs = i = 0; i < (1ul << order); i++ )
         if ( is_special_page(mfn_to_page(mfn_add(mfn, i))) )
-        {
-            if ( order )
-                return -1;
-            *ipat = true;
-            return MTRR_TYPE_WRBACK;
-        }
+            special_pgs++;
+
+    if ( special_pgs )
+    {
+        if ( special_pgs != (1ul << order) )
+            return -1;
+
+        *ipat = true;
+        return MTRR_TYPE_WRBACK;
     }
 
     switch ( type )
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] public/io: xs_wire: Allow Xenstore to report EPERM
Message-Id: <E1o6z92-00012p-Qm@xenbits.xenproject.org>
Date: Thu, 30 Jun 2022 18:44:04 +0000

commit 8d578128393b9ee144b2c2deb4e0369556443686
Author:     Julien Grall <jgrall@amazon.com>
AuthorDate: Thu Jun 30 19:37:34 2022 +0100
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 30 19:37:54 2022 +0100

    public/io: xs_wire: Allow Xenstore to report EPERM
    
    C Xenstored is using EPERM when the client is not allowed to change
    the owner (see GET_PERMS). However, the xenstore protocol doesn't
    describe EPERM so EINVAL will be sent to the client.
    
    When writing test, it would be useful to differentiate between EINVAL
    (e.g. parsing error) and EPERM (i.e. no permission). So extend
    xsd_errors[] to support return EPERM.
    
    Looking at previous time xsd_errors was extended (8b2c441a1b), it was
    considered to be safe to add a new error because at least Linux driver
    and libxenstore treat an unknown error code as EINVAL.
    
    This statement doesn't cover other possible OSes, however I am not
    aware of any breakage.
    
    Signed-off-by: Julien Grall <jgrall@amazon.com>
    Reviewed-by: Juergen Gross <jgross@suse.com>
---
 xen/include/public/io/xs_wire.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/include/public/io/xs_wire.h b/xen/include/public/io/xs_wire.h
index c1ec7c73e3..b477bd0cd2 100644
--- a/xen/include/public/io/xs_wire.h
+++ b/xen/include/public/io/xs_wire.h
@@ -90,7 +90,8 @@ __attribute__((unused))
     XSD_ERROR(EBUSY),
     XSD_ERROR(EAGAIN),
     XSD_ERROR(EISCONN),
-    XSD_ERROR(E2BIG)
+    XSD_ERROR(E2BIG),
+    XSD_ERROR(EPERM),
 };
 #endif
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging


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From: patchbot@xen.org
To: xen-changelog@lists.xenproject.org
Reply-To: xen-devel@lists.xenproject.org
Subject: [xen staging] xen: arm: Don't use stop_cpu() in halt_this_cpu()
Message-Id: <E1o6z9C-000150-Tq@xenbits.xenproject.org>
Date: Thu, 30 Jun 2022 18:44:14 +0000

commit ee11f092b515bf3c926eaad053d12d3f2b6e593e
Author:     Dmytro Semenets <dmytro_semenets@epam.com>
AuthorDate: Thu Jun 23 10:44:28 2022 +0300
Commit:     Julien Grall <jgrall@amazon.com>
CommitDate: Thu Jun 30 19:41:34 2022 +0100

    xen: arm: Don't use stop_cpu() in halt_this_cpu()
    
    When shutting down (or rebooting) the platform, Xen will call stop_cpu()
    on all the CPUs but one. The last CPU will then request the system to
    shutdown/restart.
    
    On platform using PSCI, stop_cpu() will call PSCI CPU off. Per the spec
    (section 5.5.2 DEN0022D.b), the call could return DENIED if the Trusted
    OS is resident on the CPU that is about to be turned off.
    
    As Xen doesn't migrate off the trusted OS (which BTW may not be
    migratable), it would be possible to hit the panic().
    
    In the ideal situation, Xen should migrate the trusted OS or make sure
    the CPU off is not called. However, when shutting down (or rebooting)
    the platform, it is pointless to try to turn off all the CPUs (per
    section 5.10.2, it is only required to put the core in a known state).
    
    So solve the problem by open-coding stop_cpu() in halt_this_cpu() and
    not call PSCI CPU off.
    
    Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
    Acked-by: Julien Grall <jgrall@amazon.com>
---
 xen/arch/arm/shutdown.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/shutdown.c b/xen/arch/arm/shutdown.c
index 5550f50f61..0606cb84b3 100644
--- a/xen/arch/arm/shutdown.c
+++ b/xen/arch/arm/shutdown.c
@@ -9,7 +9,12 @@
 
 static void noreturn halt_this_cpu(void *arg)
 {
-    stop_cpu();
+    local_irq_disable();
+    /* Make sure the write happens before we sleep forever */
+    dsb(sy);
+    isb();
+    while ( 1 )
+        wfi();
 }
 
 void machine_halt(void)
--
generated by git-patchbot for /home/xen/git/xen.git#staging


