From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517084.802133 (Exim 4.92) (envelope-from ) id 1piP0N-0001tW-K6; Sat, 01 Apr 2023 00:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517084.802133; Sat, 01 Apr 2023 00:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0N-0001tO-HL; Sat, 01 Apr 2023 00:22:03 +0000 Received: by outflank-mailman (input) for mailman id 517084; Sat, 01 Apr 2023 00:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0L-0001tI-PK for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0L-0007BE-O9 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP0L-0007HJ-Li for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CBdF5mmQo4EHBgWkwaJZSIxvOgH+/XItFBaMS4n+yPA=; b=6pVK601Jd1n53S4wJ52m15GrVG mzXe0YW6sURMl94dWdoT7s6ZwizHuomr29u1hp+5AD27nzec5iJew1MuLvVKDvh24+NemJrEdZsFV ifKNaYDg9e3wbeUq05UeAeH0EnFIkJPXFs/17ZgS/bxSYKsGUHOV0s2IF5shegd7WcUI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] AMD/IOMMU: without XT, x2APIC needs to be forced into physical mode Message-Id: Date: Sat, 01 Apr 2023 00:22:01 +0000 commit 3c85fb7b65d6a8b0fa993bc1cb67eea9b4a64aca Author: Jan Beulich AuthorDate: Fri Mar 31 08:28:56 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:28:56 2023 +0200 AMD/IOMMU: without XT, x2APIC needs to be forced into physical mode An earlier change with the same title (commit 1ba66a870eba) altered only the path where x2apic_phys was already set to false (perhaps from the command line). The same of course needs applying when the variable wasn't modified yet from its initial value. Reported-by: Elliott Mitchell Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper master commit: 0d2686f6b66b4b1b3c72c3525083b0ce02830054 master date: 2023-03-21 09:23:25 +0100 --- xen/arch/x86/genapic/x2apic.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index 7dfc793514..d512c50fc5 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -236,11 +236,11 @@ const struct genapic *__init apic_x2apic_probe(void) if ( x2apic_phys < 0 ) { /* - * Force physical mode if there's no interrupt remapping support: The - * ID in clustered mode requires a 32 bit destination field due to + * Force physical mode if there's no (full) interrupt remapping support: + * The ID in clustered mode requires a 32 bit destination field due to * the usage of the high 16 bits to hold the cluster ID. */ - x2apic_phys = !iommu_intremap || + x2apic_phys = iommu_intremap != iommu_intremap_full || (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) || (IS_ENABLED(CONFIG_X2APIC_PHYSICAL) && !(acpi_gbl_FADT.flags & ACPI_FADT_APIC_CLUSTER)); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517085.802136 (Exim 4.92) (envelope-from ) id 1piP0X-0001vX-Li; Sat, 01 Apr 2023 00:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517085.802136; Sat, 01 Apr 2023 00:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0X-0001vP-It; Sat, 01 Apr 2023 00:22:13 +0000 Received: by outflank-mailman (input) for mailman id 517085; Sat, 01 Apr 2023 00:22:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0V-0001v7-TM for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0V-0007BL-SF for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP0V-0007I7-Qq for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BfT+2yXoYMNyfQ0eYI1w72EB65udAB8eyLmYj1ma4oE=; b=UaFovb/3bxX7DOKcns7ZQT+RiI ZpdzEjS6Z5qvrITxTrY5ruffDIKkU02YKp/Y4DUsAZlaqGkVFoly6eShutZ6tMjqHwAcX5j5NTJW/ 81ui/3mMOkErAl+b3+SR3pcxrB3aPQGG/svW+goWk1d4n6uYyZhFkwboZEEgyAsBB3nM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] VT-d: fix iommu=no-igfx if the IOMMU scope contains fake device(s) Message-Id: Date: Sat, 01 Apr 2023 00:22:11 +0000 commit 33b1c8cd86bd6c311131b8dff32bd45581e2fbc1 Author: Marek Marczykowski-Górecki AuthorDate: Fri Mar 31 08:29:55 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:29:55 2023 +0200 VT-d: fix iommu=no-igfx if the IOMMU scope contains fake device(s) If the scope for IGD's IOMMU contains additional device that doesn't actually exist, iommu=no-igfx would not disable that IOMMU. In this particular case (Thinkpad x230) it included 00:02.1, but there is no such device on this platform. Consider only existing devices for the "gfx only" check as well as the establishing of IGD DRHD address (underlying is_igd_drhd(), which is used to determine applicability of two workarounds). Fixes: 2d7f191b392e ("VT-d: generalize and correct "iommu=no-igfx" handling") Signed-off-by: Marek Marczykowski-Górecki Signed-off-by: Jan Beulich Reviewed-by: Kevin Tian master commit: 49de6749baa8d0addc3048defd4ef3e85cb135e9 master date: 2023-03-23 09:16:41 +0100 --- xen/drivers/passthrough/vtd/dmar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index 78d4526446..4936c20952 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -389,7 +389,7 @@ static int __init acpi_parse_dev_scope( printk(VTDPREFIX " endpoint: %pp\n", &PCI_SBDF(seg, bus, path->dev, path->fn)); - if ( drhd ) + if ( drhd && pci_device_detect(seg, bus, path->dev, path->fn) ) { if ( pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), PCI_CLASS_DEVICE + 1) != 0x03 -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517086.802141 (Exim 4.92) (envelope-from ) id 1piP0h-0001yr-PB; Sat, 01 Apr 2023 00:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517086.802141; Sat, 01 Apr 2023 00:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0h-0001yi-MD; Sat, 01 Apr 2023 00:22:23 +0000 Received: by outflank-mailman (input) for mailman id 517086; Sat, 01 Apr 2023 00:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0g-0001yY-7L for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0g-0007BS-1D for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP0f-0007IX-Uf for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7U1Hxs/gbhIFiMTmFdSfB80uGpTy+PHpznYBERSkMYE=; b=G2WvVB9x/kZhF9ky69IpSBJTTB OaoRD8uPeGm8diHvknJ7O/C2D5zSyemotMoOOp/AV1SIRgEshxzuM+Y8Bfv3EYlewS2ZHv9CCQnVI 2QYz02MVdDKrizHYNS9HmwrhXBzZlZacgZz0xtMh94cCeLKN06f6lDOqUqA/WZTr2h8Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/shadow: fix and improve sh_page_has_multiple_shadows() Message-Id: Date: Sat, 01 Apr 2023 00:22:21 +0000 commit 6f2d89d68175e74aca9c67761aa87ffc8f5ffed1 Author: Jan Beulich AuthorDate: Fri Mar 31 08:30:41 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:30:41 2023 +0200 x86/shadow: fix and improve sh_page_has_multiple_shadows() While no caller currently invokes the function without first making sure there is at least one shadow [1], we'd better eliminate UB here: find_first_set_bit() requires input to be non-zero to return a well- defined result. Further, using find_first_set_bit() isn't very efficient in the first place for the intended purpose. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper [1] The function has exactly two uses, and both are from OOS code, which is HVM-only. For HVM (but not for PV) sh_mfn_is_a_page_table(), guarding the call to sh_unsync(), guarantees at least one shadow. Hence even if sh_page_has_multiple_shadows() returned a bogus value when invoked for a PV domain, the subsequent is_hvm_vcpu() and oos_active checks (the former being redundant with the latter) will compensate. (Arguably that oos_active check should come first, for both clarity and efficiency reasons.) master commit: 2896224a4e294652c33f487b603d20bd30955f21 master date: 2023-03-24 11:07:08 +0100 --- xen/arch/x86/mm/shadow/private.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index 85bb26c7ea..c2bb1ed3c3 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -324,7 +324,7 @@ static inline int sh_page_has_multiple_shadows(struct page_info *pg) return 0; shadows = pg->shadow_flags & SHF_page_type_mask; /* More than one type bit set in shadow-flags? */ - return ( (shadows & ~(1UL << find_first_set_bit(shadows))) != 0 ); + return shadows && (shadows & (shadows - 1)); } #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:32 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517087.802144 (Exim 4.92) (envelope-from ) id 1piP0q-00021g-QV; Sat, 01 Apr 2023 00:22:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517087.802144; Sat, 01 Apr 2023 00:22:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0q-00021a-Ne; Sat, 01 Apr 2023 00:22:32 +0000 Received: by outflank-mailman (input) for mailman id 517087; Sat, 01 Apr 2023 00:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0q-00021D-5n for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP0q-0007Bd-4r for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP0q-0007Iw-3l for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3YZE5kL/AMMdAWxnv/oKZNKimow7Vbh8um7hhW/xKiY=; b=u1OkeZwbos0//eFYHlwytDRTlE t5EjUww/Ogymtb21yG4ZSSDA1+D/WPDmpotkVySUPJiyNcFI6D4M5p+WBWSWHk1RCW08M3X059rlc elGNYllIkfv8bnBYLBo2Mvyf00TsranwfyJyrwGTRi80Q7xeyVcalkLglh0ULUaevWJM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/nospec: Fix evaluate_nospec() code generation under Clang Message-Id: Date: Sat, 01 Apr 2023 00:22:32 +0000 commit 00aa5c93d14c6561a69fe204cbe29f7519830782 Author: Andrew Cooper AuthorDate: Fri Mar 31 08:31:20 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:31:20 2023 +0200 x86/nospec: Fix evaluate_nospec() code generation under Clang It turns out that evaluate_nospec() code generation is not safe under Clang. Given: void eval_nospec_test(int x) { if ( evaluate_nospec(x) ) asm volatile ("nop #true" ::: "memory"); else asm volatile ("nop #false" ::: "memory"); } Clang emits: : 0f ae e8 lfence 85 ff test %edi,%edi 74 02 je 90 nop c3 ret 90 nop c3 ret which is not safe because the lfence has been hoisted above the conditional jump. Clang concludes that both barrier_nospec_true()'s have identical side effects and can safely be merged. Clang can be persuaded that the side effects are different if there are different comments in the asm blocks. This is fragile, but no more fragile that other aspects of this construct. Introduce barrier_nospec_false() with a separate internal comment to prevent Clang merging it with barrier_nospec_true() despite the otherwise-identical content. The generated code now becomes: : 85 ff test %edi,%edi 74 05 je 0f ae e8 lfence 90 nop c3 ret 0f ae e8 lfence 90 nop c3 ret which has the correct number of lfence's, and in the correct place. Link: https://github.com/llvm/llvm-project/issues/55084 Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: bc3c133841435829ba5c0a48427e2a77633502ab master date: 2023-03-24 12:16:31 +0000 --- xen/arch/x86/include/asm/nospec.h | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/nospec.h b/xen/arch/x86/include/asm/nospec.h index 5312ae4c6f..7150e76b87 100644 --- a/xen/arch/x86/include/asm/nospec.h +++ b/xen/arch/x86/include/asm/nospec.h @@ -10,15 +10,26 @@ static always_inline bool barrier_nospec_true(void) { #ifdef CONFIG_SPECULATIVE_HARDEN_BRANCH - alternative("lfence", "", X86_FEATURE_SC_NO_BRANCH_HARDEN); + alternative("lfence #nospec-true", "", X86_FEATURE_SC_NO_BRANCH_HARDEN); #endif return true; } +static always_inline bool barrier_nospec_false(void) +{ +#ifdef CONFIG_SPECULATIVE_HARDEN_BRANCH + alternative("lfence #nospec-false", "", X86_FEATURE_SC_NO_BRANCH_HARDEN); +#endif + return false; +} + /* Allow to protect evaluation of conditionals with respect to speculation */ static always_inline bool evaluate_nospec(bool condition) { - return condition ? barrier_nospec_true() : !barrier_nospec_true(); + if ( condition ) + return barrier_nospec_true(); + else + return barrier_nospec_false(); } /* Allow to block speculative execution in generic code */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517088.802149 (Exim 4.92) (envelope-from ) id 1piP10-00024V-S0; Sat, 01 Apr 2023 00:22:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517088.802149; Sat, 01 Apr 2023 00:22:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP10-00024N-PN; Sat, 01 Apr 2023 00:22:42 +0000 Received: by outflank-mailman (input) for mailman id 517088; Sat, 01 Apr 2023 00:22:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP10-00024F-9K for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP10-0007Bm-8R for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP10-0007JN-7R for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=T9RJ+4EsHQuqM75TREinfRhd9gP6tCwP8deEzIbKZyA=; b=Md/RlBcrGd0r9IYjNj23SniUvH jntjOxubHEQxhBXhhdHIWwtRo04c5VdUF71D0LVlTp6EgpqaMizZJhKYhIyg4Xkl2PLsueWkePJnR YR+U17wm+7brGqO9OgX8WVjh6vsqQPH1hmjl/mIncuvbNIBhr5eD4yrlpqPW9vSWwudU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/shadow: Fix build with no PG_log_dirty Message-Id: Date: Sat, 01 Apr 2023 00:22:42 +0000 commit 11c8ef59b9024849c0fc224354904615d5579628 Author: Andrew Cooper AuthorDate: Fri Mar 31 08:32:11 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:32:11 2023 +0200 x86/shadow: Fix build with no PG_log_dirty Gitlab Randconfig found: arch/x86/mm/shadow/common.c: In function 'shadow_prealloc': arch/x86/mm/shadow/common.c:1023:18: error: implicit declaration of function 'paging_logdirty_levels'; did you mean 'paging_log_dirty_init'? [-Werror=implicit-function-declaration] 1023 | count += paging_logdirty_levels(); | ^~~~~~~~~~~~~~~~~~~~~~ | paging_log_dirty_init arch/x86/mm/shadow/common.c:1023:18: error: nested extern declaration of 'paging_logdirty_levels' [-Werror=nested-externs] The '#if PG_log_dirty' expression is currently SHADOW_PAGING && !HVM && PV_SHIM_EXCLUSIVE. Move the declaration outside. Fixes: 33fb3a661223 ("x86/shadow: account for log-dirty mode when pre-allocating") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich master commit: 6d14cb105b1c54ad7b4228d858ae85aa8a672bbd master date: 2023-03-24 12:16:31 +0000 --- xen/arch/x86/include/asm/paging.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 635ccc83b1..6f7000d5f4 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -152,6 +152,10 @@ struct paging_mode { /***************************************************************************** * Log dirty code */ +#define paging_logdirty_levels() \ + (DIV_ROUND_UP(PADDR_BITS - PAGE_SHIFT - (PAGE_SHIFT + 3), \ + PAGE_SHIFT - ilog2(sizeof(mfn_t))) + 1) + #if PG_log_dirty /* get the dirty bitmap for a specific range of pfns */ @@ -190,10 +194,6 @@ bool paging_mfn_is_dirty(const struct domain *d, mfn_t gmfn); #define L4_LOGDIRTY_IDX(pfn) ((pfn_x(pfn) >> (PAGE_SHIFT + 3 + PAGETABLE_ORDER * 2)) & \ (LOGDIRTY_NODE_ENTRIES-1)) -#define paging_logdirty_levels() \ - (DIV_ROUND_UP(PADDR_BITS - PAGE_SHIFT - (PAGE_SHIFT + 3), \ - PAGE_SHIFT - ilog2(sizeof(mfn_t))) + 1) - #ifdef CONFIG_HVM /* VRAM dirty tracking support */ struct sh_dirty_vram { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:22:52 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:22:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517089.802155 (Exim 4.92) (envelope-from ) id 1piP1A-000278-UF; Sat, 01 Apr 2023 00:22:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517089.802155; Sat, 01 Apr 2023 00:22:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1A-00026w-Qs; Sat, 01 Apr 2023 00:22:52 +0000 Received: by outflank-mailman (input) for mailman id 517089; Sat, 01 Apr 2023 00:22:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1A-00026k-Cw for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1A-0007Bt-Bx for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP1A-0007Jo-B5 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:22:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vgBPQXYXjwdBXLGh9Yhr9NJdvZuRrr3c1i5N41snMzo=; b=u9iwXFmrL4flWa6MP87TPjcyHy bq3AJ+ELELuGMmqJvU7yXzJaaZjHrUDSaRepg8FqvkP9SL62iawb03CvsMplKQ1433yRcY2ysO2vQ d9mWlMkjrsGllFd9qgg/jbXg+dq3eG7LD7OPOxCDY7mamO8aBHAvTSS8LABExFB6adEA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/vmx: Don't spuriously crash the domain when INIT is received Message-Id: Date: Sat, 01 Apr 2023 00:22:52 +0000 commit f6a3e93b3788aa009e9b86d9cb14c243b958daa9 Author: Andrew Cooper AuthorDate: Fri Mar 31 08:32:57 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:32:57 2023 +0200 x86/vmx: Don't spuriously crash the domain when INIT is received In VMX operation, the handling of INIT IPIs is changed. Instead of the CPU resetting, the next VMEntry fails with EXIT_REASON_INIT. From the TXT spec, the intent of this behaviour is so that an entity which cares can scrub secrets from RAM before participating in an orderly shutdown. Right now, Xen's behaviour is that when an INIT arrives, the HVM VM which schedules next is killed (citing an unknown VMExit), *and* we ignore the INIT and continue blindly onwards anyway. This patch addresses only the first of these two problems by ignoring the INIT and continuing without crashing the VM in question. The second wants addressing too, just as soon as we've figured out something better to do... Discovered as collateral damage from when an AP triple faults on S3 resume on Intel TigerLake platforms. Link: https://github.com/QubesOS/qubes-issues/issues/7283 Signed-off-by: Andrew Cooper Reviewed-by: Kevin Tian master commit: b1f11273d5a774cc88a3685c96c2e7cf6385e3b6 master date: 2023-03-24 22:49:58 +0000 --- xen/arch/x86/hvm/vmx/vmx.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index a8fb4365ad..64dbd50197 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -4038,6 +4038,10 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) case EXIT_REASON_MCE_DURING_VMENTRY: do_machine_check(regs); break; + + case EXIT_REASON_INIT: + printk(XENLOG_ERR "Error: INIT received - ignoring\n"); + return; /* Renter the guest without further processing */ } /* Now enable interrupts so it's safe to take locks. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:23:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:23:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517090.802156 (Exim 4.92) (envelope-from ) id 1piP1K-00029p-VQ; Sat, 01 Apr 2023 00:23:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517090.802156; Sat, 01 Apr 2023 00:23:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1K-00029i-SQ; Sat, 01 Apr 2023 00:23:02 +0000 Received: by outflank-mailman (input) for mailman id 517090; Sat, 01 Apr 2023 00:23:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1K-00029c-HD for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1K-0007Ca-G9 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP1K-0007KP-EQ for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YOkeYzO1Cj5Il5+tgHU28OW496Kl/6RzJUAuIavaWn4=; b=uol6fsI460YqOL0y3Rmkf85wyg unS4aHwJc1QCByUFAq5rIFshQtEmt48W42DGqc3MszTq1pQHPGZoTcCIQaUX5Q35x23plCYeKOl+I t1g96jISIc7286c0n7BOPKglys+CpLS3Dx3HztkFH6KloMQlRnmkxrnEKUO2RspWs8oA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/ucode: Fix error paths control_thread_fn() Message-Id: Date: Sat, 01 Apr 2023 00:23:02 +0000 commit 7f55774489d2f12a23f2ac0f516b62e2709cea99 Author: Andrew Cooper AuthorDate: Fri Mar 31 08:33:28 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:33:28 2023 +0200 x86/ucode: Fix error paths control_thread_fn() These two early exits skipped re-enabling the watchdog, restoring the NMI callback, and clearing the nmi_patch global pointer. Always execute the tail of the function on the way out. Fixes: 8dd4dfa92d62 ("x86/microcode: Synchronize late microcode loading") Signed-off-by: Andrew Cooper Reviewed-by: Sergey Dyasli Reviewed-by: Jan Beulich master commit: fc2e1f3aad602a66c14b8285a1bd38a82f8fd02d master date: 2023-03-28 11:57:56 +0100 --- xen/arch/x86/cpu/microcode/core.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index 2497630bbe..c760723e4f 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -490,10 +490,7 @@ static int control_thread_fn(const struct microcode_patch *patch) ret = wait_for_condition(wait_cpu_callin, num_online_cpus(), MICROCODE_CALLIN_TIMEOUT_US); if ( ret ) - { - set_state(LOADING_EXIT); - return ret; - } + goto out; /* Control thread loads ucode first while others are in NMI handler. */ ret = alternative_call(ucode_ops.apply_microcode, patch); @@ -505,8 +502,7 @@ static int control_thread_fn(const struct microcode_patch *patch) { printk(XENLOG_ERR "Late loading aborted: CPU%u failed to update ucode\n", cpu); - set_state(LOADING_EXIT); - return ret; + goto out; } /* Let primary threads load the given ucode update */ @@ -537,6 +533,7 @@ static int control_thread_fn(const struct microcode_patch *patch) } } + out: /* Mark loading is done to unblock other threads */ set_state(LOADING_EXIT); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:23:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:23:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517091.802161 (Exim 4.92) (envelope-from ) id 1piP1V-0002CY-15; Sat, 01 Apr 2023 00:23:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517091.802161; Sat, 01 Apr 2023 00:23:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1U-0002CQ-Ub; Sat, 01 Apr 2023 00:23:12 +0000 Received: by outflank-mailman (input) for mailman id 517091; Sat, 01 Apr 2023 00:23:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1U-0002CK-KV for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1U-0007Ck-Jc for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP1U-0007L2-If for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ifsIdgm2aK3Jrsovc6wzERb49zEuYiUMx9c9GxD6P+g=; b=pknWnGK20ZCNjXo2DqK2hqKdQP IVrPltBZkwFvZgy28mnLCLPbQF8NwT2iPAGaDqGjOiBZxp+X3yFJzCiBJR+z8Pb5sUziJwtCWBcOn jmWzDEeA8ez2tVVKyt7Apfr+60A2hMOieruEpJxDfQmmg9wfgd0ph6oZBm6QAkzx1+kM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] include: don't mention stub headers more than once in a make rule Message-Id: Date: Sat, 01 Apr 2023 00:23:12 +0000 commit 350693582427887387f21a6eeedaa0ac48aecc3f Author: Jan Beulich AuthorDate: Fri Mar 31 08:34:04 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:34:04 2023 +0200 include: don't mention stub headers more than once in a make rule When !GRANT_TABLE and !PV_SHIM headers-n contains grant_table.h twice, causing make to complain "target '...' given more than once in the same rule" for the rule generating the stub headers. We don't need duplicate entries in headers-n anywhere, so zap them (by using $(sort ...)) right where the final value of the variable is constructed. Fixes: 6bec713f871f ("include/compat: produce stubs for headers not otherwise generated") Signed-off-by: Jan Beulich Reviewed-by: Anthony PERARD master commit: 231ab79704cbb5b9be7700287c3b185225d34f1b master date: 2023-03-28 14:20:16 +0200 --- xen/include/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/Makefile b/xen/include/Makefile index cfd7851614..e19f9464fd 100644 --- a/xen/include/Makefile +++ b/xen/include/Makefile @@ -34,7 +34,7 @@ headers-$(CONFIG_TRACEBUFFER) += compat/trace.h headers-$(CONFIG_XENOPROF) += compat/xenoprof.h headers-$(CONFIG_XSM_FLASK) += compat/xsm/flask_op.h -headers-n := $(filter-out $(headers-y),$(headers-n) $(headers-)) +headers-n := $(sort $(filter-out $(headers-y),$(headers-n) $(headers-))) cppflags-y := -include public/xen-compat.h -DXEN_GENERATING_COMPAT_HEADERS cppflags-$(CONFIG_X86) += -m32 -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:23:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:23:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517095.802175 (Exim 4.92) (envelope-from ) id 1piP1f-0002WI-C6; Sat, 01 Apr 2023 00:23:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517095.802175; Sat, 01 Apr 2023 00:23:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1f-0002WA-8w; Sat, 01 Apr 2023 00:23:23 +0000 Received: by outflank-mailman (input) for mailman id 517095; Sat, 01 Apr 2023 00:23:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1e-0002Vq-O4 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1e-0007Cx-N9 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP1e-0007LR-MB for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=52LwUXM63vVisPVsGaj4VCkyYVNQ7AVNGybH8VB1jFU=; b=c5q83iezckQFx8cQX8dX8SIJ1M 7xDV7e+gNmWDTcgHlLV16NdmDKGGK4Vn2TfOGZtDegSwOvsQRXOiX4G5hY1DrX1BFkSY64HeHP+DO 6qcODE52VBAvFJ10aG2TlRn6HsIq5Ju0WJzvZl58WpypznTXunjIzNcgz+VYR7ct1m2I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] vpci/msix: handle accesses adjacent to the MSI-X table Message-Id: Date: Sat, 01 Apr 2023 00:23:22 +0000 commit 85100ed78ca18f188b1ca495f132db7df705f1a4 Author: Roger Pau Monné AuthorDate: Fri Mar 31 08:34:26 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:34:26 2023 +0200 vpci/msix: handle accesses adjacent to the MSI-X table The handling of the MSI-X table accesses by Xen requires that any pages part of the MSI-X related tables are not mapped into the domain physmap. As a result, any device registers in the same pages as the start or the end of the MSIX or PBA tables is not currently accessible, as the accesses are just dropped. Note the spec forbids such placing of registers, as the MSIX and PBA tables must be 4K isolated from any other registers: "If a Base Address register that maps address space for the MSI-X Table or MSI-X PBA also maps other usable address space that is not associated with MSI-X structures, locations (e.g., for CSRs) used in the other address space must not share any naturally aligned 4-KB address range with one where either MSI-X structure resides." Yet the 'Intel Wi-Fi 6 AX201' device on one of my boxes has registers in the same page as the MSIX tables, and thus won't work on a PVH dom0 without this fix. In order to cope with the behavior passthrough any accesses that fall on the same page as the MSIX tables (but don't fall in between) to the underlying hardware. Such forwarding also takes care of the PBA accesses, so it allows to remove the code doing this handling in msix_{read,write}. Note that as a result accesses to the PBA array are no longer limited to 4 and 8 byte sizes, there's no access size restriction for PBA accesses documented in the specification. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich vpci/msix: restore PBA access length and alignment restrictions Accesses to the PBA array have the same length and alignment limitations as accesses to the MSI-X table: "For all accesses to MSI-X Table and MSI-X PBA fields, software must use aligned full DWORD or aligned full QWORD transactions; otherwise, the result is undefined." Introduce such length and alignment checks into the handling of PBA accesses for vPCI. This was a mistake of mine for not reading the specification correctly. Note that accesses must now be aligned, and hence there's no longer a need to check that the end of the access falls into the PBA region as both the access and the region addresses must be aligned. Fixes: b177892d2d ('vpci/msix: handle accesses adjacent to the MSI-X table') Reported-by: Jan Beulich Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: b177892d2d0e8a31122c218989f43130aeba5282 master date: 2023-03-28 14:20:35 +0200 master commit: 7a502b4fbc339e9d3d3d45fb37f09da06bc3081c master date: 2023-03-29 14:56:33 +0200 --- xen/drivers/vpci/msix.c | 353 +++++++++++++++++++++++++++++++++++------------- xen/drivers/vpci/vpci.c | 7 +- xen/include/xen/vpci.h | 8 +- 3 files changed, 273 insertions(+), 95 deletions(-) diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index bea0cc7aed..cafddcf305 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -27,6 +27,11 @@ ((addr) >= vmsix_table_addr(vpci, nr) && \ (addr) < vmsix_table_addr(vpci, nr) + vmsix_table_size(vpci, nr)) +#define VMSIX_ADDR_SAME_PAGE(addr, vpci, nr) \ + (PFN_DOWN(addr) >= PFN_DOWN(vmsix_table_addr(vpci, nr)) && \ + PFN_DOWN(addr) <= PFN_DOWN(vmsix_table_addr(vpci, nr) + \ + vmsix_table_size(vpci, nr) - 1)) + static uint32_t cf_check control_read( const struct pci_dev *pdev, unsigned int reg, void *data) { @@ -149,7 +154,7 @@ static struct vpci_msix *msix_find(const struct domain *d, unsigned long addr) for ( i = 0; i < ARRAY_SIZE(msix->tables); i++ ) if ( bars[msix->tables[i] & PCI_MSIX_BIRMASK].enabled && - VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, i) ) + VMSIX_ADDR_SAME_PAGE(addr, msix->pdev->vpci, i) ) return msix; } @@ -182,36 +187,172 @@ static struct vpci_msix_entry *get_entry(struct vpci_msix *msix, return &msix->entries[(addr - start) / PCI_MSIX_ENTRY_SIZE]; } -static void __iomem *get_pba(struct vpci *vpci) +static void __iomem *get_table(struct vpci *vpci, unsigned int slot) { struct vpci_msix *msix = vpci->msix; + paddr_t addr = 0; + + ASSERT(spin_is_locked(&vpci->lock)); + + if ( likely(msix->table[slot]) ) + return msix->table[slot]; + + switch ( slot ) + { + case VPCI_MSIX_TBL_TAIL: + addr = vmsix_table_size(vpci, VPCI_MSIX_TABLE); + fallthrough; + case VPCI_MSIX_TBL_HEAD: + addr += vmsix_table_addr(vpci, VPCI_MSIX_TABLE); + break; + + case VPCI_MSIX_PBA_TAIL: + addr = vmsix_table_size(vpci, VPCI_MSIX_PBA); + fallthrough; + case VPCI_MSIX_PBA_HEAD: + addr += vmsix_table_addr(vpci, VPCI_MSIX_PBA); + break; + + default: + ASSERT_UNREACHABLE(); + return NULL; + } + + msix->table[slot] = ioremap(round_pgdown(addr), PAGE_SIZE); + + return msix->table[slot]; +} + +unsigned int get_slot(const struct vpci *vpci, unsigned long addr) +{ + unsigned long pfn = PFN_DOWN(addr); + /* - * PBA will only be unmapped when the device is deassigned, so access it - * without holding the vpci lock. + * The logic below relies on having the tables identity mapped to the guest + * address space, or for the `addr` parameter to be translated into its + * host physical memory address equivalent. */ - void __iomem *pba = read_atomic(&msix->pba); - if ( likely(pba) ) - return pba; + if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_TABLE)) ) + return VPCI_MSIX_TBL_HEAD; + if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_TABLE) + + vmsix_table_size(vpci, VPCI_MSIX_TABLE) - 1) ) + return VPCI_MSIX_TBL_TAIL; + if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_PBA)) ) + return VPCI_MSIX_PBA_HEAD; + if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_PBA) + + vmsix_table_size(vpci, VPCI_MSIX_PBA) - 1) ) + return VPCI_MSIX_PBA_TAIL; + + ASSERT_UNREACHABLE(); + return -1; +} + +static bool adjacent_handle(const struct vpci_msix *msix, unsigned long addr) +{ + unsigned int i; + + if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) + return true; + + if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_TABLE) ) + return false; + + for ( i = 0; i < ARRAY_SIZE(msix->tables); i++ ) + if ( VMSIX_ADDR_SAME_PAGE(addr, msix->pdev->vpci, i) ) + return true; + + return false; +} - pba = ioremap(vmsix_table_addr(vpci, VPCI_MSIX_PBA), - vmsix_table_size(vpci, VPCI_MSIX_PBA)); - if ( !pba ) - return read_atomic(&msix->pba); +static int adjacent_read(const struct domain *d, const struct vpci_msix *msix, + unsigned long addr, unsigned int len, + unsigned long *data) +{ + const void __iomem *mem; + struct vpci *vpci = msix->pdev->vpci; + unsigned int slot; + + *data = ~0ul; + + if ( !adjacent_handle(msix, addr + len - 1) ) + return X86EMUL_OKAY; + + if ( VMSIX_ADDR_IN_RANGE(addr, vpci, VPCI_MSIX_PBA) && + !access_allowed(msix->pdev, addr, len) ) + /* PBA accesses must be aligned and 4 or 8 bytes in size. */ + return X86EMUL_OKAY; + + slot = get_slot(vpci, addr); + if ( slot >= ARRAY_SIZE(msix->table) ) + return X86EMUL_OKAY; + + if ( unlikely(!IS_ALIGNED(addr, len)) ) + { + unsigned int i; + + gprintk(XENLOG_DEBUG, "%pp: unaligned read to MSI-X related page\n", + &msix->pdev->sbdf); + + /* + * Split unaligned accesses into byte sized ones. Shouldn't happen in + * the first place, but devices shouldn't have registers in the same 4K + * page as the MSIX tables either. + * + * It's unclear whether this could cause issues if a guest expects + * registers to be accessed atomically, it better use an aligned access + * if it has such expectations. + */ + for ( i = 0; i < len; i++ ) + { + unsigned long partial = ~0ul; + int rc = adjacent_read(d, msix, addr + i, 1, &partial); + + if ( rc != X86EMUL_OKAY ) + return rc; + + *data &= ~(0xfful << (i * 8)); + *data |= (partial & 0xff) << (i * 8); + } + + return X86EMUL_OKAY; + } spin_lock(&vpci->lock); - if ( !msix->pba ) + mem = get_table(vpci, slot); + if ( !mem ) { - write_atomic(&msix->pba, pba); spin_unlock(&vpci->lock); + gprintk(XENLOG_WARNING, + "%pp: unable to map MSI-X page, returning all bits set\n", + &msix->pdev->sbdf); + return X86EMUL_OKAY; } - else + + switch ( len ) { - spin_unlock(&vpci->lock); - iounmap(pba); + case 1: + *data = readb(mem + PAGE_OFFSET(addr)); + break; + + case 2: + *data = readw(mem + PAGE_OFFSET(addr)); + break; + + case 4: + *data = readl(mem + PAGE_OFFSET(addr)); + break; + + case 8: + *data = readq(mem + PAGE_OFFSET(addr)); + break; + + default: + ASSERT_UNREACHABLE(); } + spin_unlock(&vpci->lock); - return read_atomic(&msix->pba); + return X86EMUL_OKAY; } static int cf_check msix_read( @@ -227,47 +368,11 @@ static int cf_check msix_read( if ( !msix ) return X86EMUL_RETRY; - if ( !access_allowed(msix->pdev, addr, len) ) - return X86EMUL_OKAY; - - if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) - { - struct vpci *vpci = msix->pdev->vpci; - unsigned int idx = addr - vmsix_table_addr(vpci, VPCI_MSIX_PBA); - const void __iomem *pba = get_pba(vpci); - - /* - * Access to PBA. - * - * TODO: note that this relies on having the PBA identity mapped to the - * guest address space. If this changes the address will need to be - * translated. - */ - if ( !pba ) - { - gprintk(XENLOG_WARNING, - "%pp: unable to map MSI-X PBA, report all pending\n", - &msix->pdev->sbdf); - return X86EMUL_OKAY; - } - - switch ( len ) - { - case 4: - *data = readl(pba + idx); - break; - - case 8: - *data = readq(pba + idx); - break; - - default: - ASSERT_UNREACHABLE(); - break; - } + if ( adjacent_handle(msix, addr) ) + return adjacent_read(d, msix, addr, len, data); + if ( !access_allowed(msix->pdev, addr, len) ) return X86EMUL_OKAY; - } spin_lock(&msix->pdev->vpci->lock); entry = get_entry(msix, addr); @@ -303,56 +408,102 @@ static int cf_check msix_read( return X86EMUL_OKAY; } -static int cf_check msix_write( - struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data) +static int adjacent_write(const struct domain *d, const struct vpci_msix *msix, + unsigned long addr, unsigned int len, + unsigned long data) { - const struct domain *d = v->domain; - struct vpci_msix *msix = msix_find(d, addr); - struct vpci_msix_entry *entry; - unsigned int offset; + void __iomem *mem; + struct vpci *vpci = msix->pdev->vpci; + unsigned int slot; - if ( !msix ) - return X86EMUL_RETRY; + if ( !adjacent_handle(msix, addr + len - 1) ) + return X86EMUL_OKAY; - if ( !access_allowed(msix->pdev, addr, len) ) + /* + * Only check start and end of the access because the size of the PBA is + * assumed to be equal or bigger (8 bytes) than the length of any access + * handled here. + */ + if ( VMSIX_ADDR_IN_RANGE(addr, vpci, VPCI_MSIX_PBA) && + (!access_allowed(msix->pdev, addr, len) || !is_hardware_domain(d)) ) + /* Ignore writes to PBA for DomUs, it's undefined behavior. */ return X86EMUL_OKAY; - if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) + slot = get_slot(vpci, addr); + if ( slot >= ARRAY_SIZE(msix->table) ) + return X86EMUL_OKAY; + + if ( unlikely(!IS_ALIGNED(addr, len)) ) { - struct vpci *vpci = msix->pdev->vpci; - unsigned int idx = addr - vmsix_table_addr(vpci, VPCI_MSIX_PBA); - const void __iomem *pba = get_pba(vpci); + unsigned int i; - if ( !is_hardware_domain(d) ) - /* Ignore writes to PBA for DomUs, it's behavior is undefined. */ - return X86EMUL_OKAY; + gprintk(XENLOG_DEBUG, "%pp: unaligned write to MSI-X related page\n", + &msix->pdev->sbdf); - if ( !pba ) + for ( i = 0; i < len; i++ ) { - /* Unable to map the PBA, ignore write. */ - gprintk(XENLOG_WARNING, - "%pp: unable to map MSI-X PBA, write ignored\n", - &msix->pdev->sbdf); - return X86EMUL_OKAY; + int rc = adjacent_write(d, msix, addr + i, 1, data >> (i * 8)); + + if ( rc != X86EMUL_OKAY ) + return rc; } - switch ( len ) - { - case 4: - writel(data, pba + idx); - break; + return X86EMUL_OKAY; + } - case 8: - writeq(data, pba + idx); - break; + spin_lock(&vpci->lock); + mem = get_table(vpci, slot); + if ( !mem ) + { + spin_unlock(&vpci->lock); + gprintk(XENLOG_WARNING, + "%pp: unable to map MSI-X page, dropping write\n", + &msix->pdev->sbdf); + return X86EMUL_OKAY; + } - default: - ASSERT_UNREACHABLE(); - break; - } + switch ( len ) + { + case 1: + writeb(data, mem + PAGE_OFFSET(addr)); + break; - return X86EMUL_OKAY; + case 2: + writew(data, mem + PAGE_OFFSET(addr)); + break; + + case 4: + writel(data, mem + PAGE_OFFSET(addr)); + break; + + case 8: + writeq(data, mem + PAGE_OFFSET(addr)); + break; + + default: + ASSERT_UNREACHABLE(); } + spin_unlock(&vpci->lock); + + return X86EMUL_OKAY; +} + +static int cf_check msix_write( + struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data) +{ + const struct domain *d = v->domain; + struct vpci_msix *msix = msix_find(d, addr); + struct vpci_msix_entry *entry; + unsigned int offset; + + if ( !msix ) + return X86EMUL_RETRY; + + if ( adjacent_handle(msix, addr) ) + return adjacent_write(d, msix, addr, len, data); + + if ( !access_allowed(msix->pdev, addr, len) ) + return X86EMUL_OKAY; spin_lock(&msix->pdev->vpci->lock); entry = get_entry(msix, addr); @@ -482,6 +633,26 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) } } + if ( is_hardware_domain(d) ) + { + /* + * For dom0 only: remove any hypervisor mappings of the MSIX or PBA + * related areas, as dom0 is capable of moving the position of the BARs + * in the host address space. + * + * We rely on being called with the vPCI lock held once the domain is + * running, so the maps are not in use. + */ + for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->table); i++ ) + if ( pdev->vpci->msix->table[i] ) + { + /* If there are any maps, the domain must be running. */ + ASSERT(spin_is_locked(&pdev->vpci->lock)); + iounmap(pdev->vpci->msix->table[i]); + pdev->vpci->msix->table[i] = NULL; + } + } + return 0; } diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 6d48d496bb..652807a4a4 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -54,9 +54,12 @@ void vpci_remove_device(struct pci_dev *pdev) spin_unlock(&pdev->vpci->lock); if ( pdev->vpci->msix ) { + unsigned int i; + list_del(&pdev->vpci->msix->next); - if ( pdev->vpci->msix->pba ) - iounmap(pdev->vpci->msix->pba); + for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->table); i++ ) + if ( pdev->vpci->msix->table[i] ) + iounmap(pdev->vpci->msix->table[i]); } xfree(pdev->vpci->msix); xfree(pdev->vpci->msi); diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index d8acfeba8a..0b8a2a3c74 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -133,8 +133,12 @@ struct vpci { bool enabled : 1; /* Masked? */ bool masked : 1; - /* PBA map */ - void __iomem *pba; + /* Partial table map. */ +#define VPCI_MSIX_TBL_HEAD 0 +#define VPCI_MSIX_TBL_TAIL 1 +#define VPCI_MSIX_PBA_HEAD 2 +#define VPCI_MSIX_PBA_TAIL 3 + void __iomem *table[4]; /* Entries. */ struct vpci_msix_entry { uint64_t addr; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 00:23:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 00:23:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517096.802179 (Exim 4.92) (envelope-from ) id 1piP1p-0002dU-FD; Sat, 01 Apr 2023 00:23:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517096.802179; Sat, 01 Apr 2023 00:23:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1p-0002dN-CI; Sat, 01 Apr 2023 00:23:33 +0000 Received: by outflank-mailman (input) for mailman id 517096; Sat, 01 Apr 2023 00:23:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1o-0002cv-Rj for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1piP1o-0007D5-Qj for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1piP1o-0007Lx-Pl for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 00:23:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=H3hm0hNTLLKGg1k2l2PI9ddgqoY768IUyt6cC5aK6dY=; b=js/tGcZ4AdoayVsy8XvmUAuxhX nT3sog22hB5d+mTjeAhY+MO9CsQKAFFACGtaS3wKe4BnDYdd4iTum5igIkd7DSzcRJ0yl+Zx0CxIU cr1KuqG+TaweVgotLfDnZDygsjXqs8ILK5Al745RES31D6F6Xsuv6srWVU+F2TxAPvwQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] ns16550: correct name/value pair parsing for PCI port/bridge Message-Id: Date: Sat, 01 Apr 2023 00:23:32 +0000 commit 7758cd57e002c5096b2296ede67c59fca68724d7 Author: Jan Beulich AuthorDate: Fri Mar 31 08:35:15 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:35:15 2023 +0200 ns16550: correct name/value pair parsing for PCI port/bridge First of all these were inverted: "bridge=" caused the port coordinates to be established, while "port=" controlled the bridge coordinates. And then the error messages being identical also wasn't helpful. While correcting this also move both case blocks close together. Fixes: 97fd49a7e074 ("ns16550: add support for UART parameters to be specifed with name-value pairs") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper master commit: e692b22230b411d762ac9e278a398e28df474eae master date: 2023-03-29 14:55:37 +0200 --- xen/drivers/char/ns16550.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index ce013fb6a5..97b3d8d269 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1631,13 +1631,6 @@ static bool __init parse_namevalue_pairs(char *str, struct ns16550 *uart) break; #ifdef CONFIG_HAS_PCI - case bridge_bdf: - if ( !parse_pci(param_value, NULL, &uart->ps_bdf[0], - &uart->ps_bdf[1], &uart->ps_bdf[2]) ) - PARSE_ERR_RET("Bad port PCI coordinates\n"); - uart->ps_bdf_enable = true; - break; - case device: if ( strncmp(param_value, "pci", 3) == 0 ) { @@ -1652,9 +1645,16 @@ static bool __init parse_namevalue_pairs(char *str, struct ns16550 *uart) break; case port_bdf: + if ( !parse_pci(param_value, NULL, &uart->ps_bdf[0], + &uart->ps_bdf[1], &uart->ps_bdf[2]) ) + PARSE_ERR_RET("Bad port PCI coordinates\n"); + uart->ps_bdf_enable = true; + break; + + case bridge_bdf: if ( !parse_pci(param_value, NULL, &uart->pb_bdf[0], &uart->pb_bdf[1], &uart->pb_bdf[2]) ) - PARSE_ERR_RET("Bad port PCI coordinates\n"); + PARSE_ERR_RET("Bad bridge PCI coordinates\n"); uart->pb_bdf_enable = true; break; #endif -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 14:55:11 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 14:55:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517163.802262 (Exim 4.92) (envelope-from ) id 1picdD-0004u4-FE; Sat, 01 Apr 2023 14:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517163.802262; Sat, 01 Apr 2023 14:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdD-0004tw-Bi; Sat, 01 Apr 2023 14:55:03 +0000 Received: by outflank-mailman (input) for mailman id 517163; Sat, 01 Apr 2023 14:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdB-0004to-Td for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdB-0006FR-SX for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1picdB-0001E9-RR for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=+p1gKa6hl+1R28nGxULk6ojxM6nH7c9qh3B17uininY=; b=ptCfp3PLG5dWk9766+pxb0FFjb PJPOLx7aOXRILd8k43ixJEh2QkDgNlFbtYwAVzMuBfJblNV/5ou6TSVpQmBz7vDpOtFQw+C0k83Kw 9HxY9vekvuEdRgZeWVXuEH2FkXPq+x4Ku+Tzqkpd+Msley0ZPEMAOAvPLNiEKvrgUC3s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: pull permission check ahead for REP INS/OUTS Message-Id: Date: Sat, 01 Apr 2023 14:55:01 +0000 commit f41c88a6fca59f99a2eb5e7ed3d90ab7bca08b1b Author: Jan Beulich AuthorDate: Thu Mar 30 13:07:16 2023 +0200 Commit: Jan Beulich CommitDate: Thu Mar 30 13:07:16 2023 +0200 x86emul: pull permission check ahead for REP INS/OUTS Based on observations on a fair range of hardware from both primary vendors even zero-iteration-count instances of these insns perform the port related permission checking first. Fixes: fe300600464c ("x86: Fix emulation of REP prefix") Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/x86/x86_emulate/x86_emulate.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index e38f98b547..94dd72585a 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -4249,14 +4249,15 @@ x86_emulate( goto imul; case 0x6c ... 0x6d: /* ins %dx,%es:%edi */ { - unsigned long nr_reps = get_rep_prefix(false, true); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - dst.mem.seg = x86_seg_es; - dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(false, true); + dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); + dst.mem.seg = x86_seg_es; /* Try the presumably most efficient approach first. */ if ( !ops->rep_ins ) nr_reps = 1; @@ -4290,13 +4291,14 @@ x86_emulate( } case 0x6e ... 0x6f: /* outs %esi,%dx */ { - unsigned long nr_reps = get_rep_prefix(true, false); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(true, false); + ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); /* Try the presumably most efficient approach first. */ if ( !ops->rep_outs ) nr_reps = 1; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 14:55:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 14:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517164.802266 (Exim 4.92) (envelope-from ) id 1picdN-0004xH-Gb; Sat, 01 Apr 2023 14:55:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517164.802266; Sat, 01 Apr 2023 14:55:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdN-0004xB-DL; Sat, 01 Apr 2023 14:55:13 +0000 Received: by outflank-mailman (input) for mailman id 517164; Sat, 01 Apr 2023 14:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdM-0004wC-32 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1picdM-0006Fl-22 for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1picdL-0001Ed-VE for xen-changelog@lists.xenproject.org; Sat, 01 Apr 2023 14:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HXJ9hfeVtt1Zis3QMAvn7Hv4abp1c/y8sxpZjWTceSQ=; b=AfKqMulMqPapis2VHBjPfh2lgL jR8aKpk4kg9CuWgKtJOGJiNf0nC4/NDjdBKh80htqOZZ0YKe0rNPvkIJqFKffKxvOjGZjUJJO4X4o 6h+b6xDLTVVreU9PjvIwiypWZHLifDIRaCFCyOPpwaUGMU6swyFQusgWQ9QpoI0EsBUo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/ocaml/mmap: Drop the len parameter from Xenmmap.write Message-Id: Date: Sat, 01 Apr 2023 14:55:11 +0000 commit 12c5eea3ca6fa2674726d62cc9f369f81861d23f Author: Andrew Cooper AuthorDate: Mon Feb 6 20:06:45 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Mar 30 16:26:24 2023 +0100 tools/ocaml/mmap: Drop the len parameter from Xenmmap.write Strings in Ocaml carry their own length. Absolutely nothing good can come from having caml_string_length(data) be different to len. Use the appropriate accessor, String_val(), but retain the workaround for the Ocaml -safe-string constness bug in the same way as we've done elsewhere in Xen. Signed-off-by: Andrew Cooper Acked-by: Christian Lindig --- tools/ocaml/libs/mmap/xenmmap.ml | 4 ++-- tools/ocaml/libs/mmap/xenmmap.mli | 2 +- tools/ocaml/libs/mmap/xenmmap_stubs.c | 11 +++++------ 3 files changed, 8 insertions(+), 9 deletions(-) diff --git a/tools/ocaml/libs/mmap/xenmmap.ml b/tools/ocaml/libs/mmap/xenmmap.ml index fd6735649f..746ca6e21c 100644 --- a/tools/ocaml/libs/mmap/xenmmap.ml +++ b/tools/ocaml/libs/mmap/xenmmap.ml @@ -25,7 +25,7 @@ external mmap: Unix.file_descr -> mmap_prot_flag -> mmap_map_flag external unmap: mmap_interface -> unit = "stub_mmap_final" (* read: interface -> start -> length -> data *) external read: mmap_interface -> int -> int -> string = "stub_mmap_read" -(* write: interface -> data -> start -> length -> unit *) -external write: mmap_interface -> string -> int -> int -> unit = "stub_mmap_write" +(* write: interface -> data -> start -> unit *) +external write: mmap_interface -> string -> int -> unit = "stub_mmap_write" (* getpagesize: unit -> size of page *) external getpagesize: unit -> int = "stub_mmap_getpagesize" diff --git a/tools/ocaml/libs/mmap/xenmmap.mli b/tools/ocaml/libs/mmap/xenmmap.mli index d097b68a8f..5d6aa19ca6 100644 --- a/tools/ocaml/libs/mmap/xenmmap.mli +++ b/tools/ocaml/libs/mmap/xenmmap.mli @@ -22,7 +22,7 @@ external mmap : Unix.file_descr -> mmap_prot_flag -> mmap_map_flag -> int -> int -> mmap_interface = "stub_mmap_init" external unmap : mmap_interface -> unit = "stub_mmap_final" external read : mmap_interface -> int -> int -> string = "stub_mmap_read" -external write : mmap_interface -> string -> int -> int -> unit +external write : mmap_interface -> string -> int -> unit = "stub_mmap_write" external getpagesize : unit -> int = "stub_mmap_getpagesize" diff --git a/tools/ocaml/libs/mmap/xenmmap_stubs.c b/tools/ocaml/libs/mmap/xenmmap_stubs.c index c85b1fcce7..c15a565aaa 100644 --- a/tools/ocaml/libs/mmap/xenmmap_stubs.c +++ b/tools/ocaml/libs/mmap/xenmmap_stubs.c @@ -99,27 +99,26 @@ CAMLprim value stub_mmap_read(value intf, value start, value len) caml_invalid_argument("len invalid"); data = caml_alloc_string(c_len); - memcpy((char *) data, Intf_val(intf)->addr + c_start, c_len); + memcpy((char *)String_val(data), Intf_val(intf)->addr + c_start, c_len); CAMLreturn(data); } -CAMLprim value stub_mmap_write(value intf, value data, - value start, value len) +CAMLprim value stub_mmap_write(value intf, value data, value start) { - CAMLparam4(intf, data, start, len); + CAMLparam3(intf, data, start); int c_start; int c_len; c_start = Int_val(start); - c_len = Int_val(len); + c_len = caml_string_length(data); if (c_start > Intf_val(intf)->len) caml_invalid_argument("start invalid"); if (c_start + c_len > Intf_val(intf)->len) caml_invalid_argument("len invalid"); - memcpy(Intf_val(intf)->addr + c_start, (char *) data, c_len); + memcpy(Intf_val(intf)->addr + c_start, String_val(data), c_len); CAMLreturn(Val_unit); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 14:55:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 14:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517165.802270 (Exim 4.92) (envelope-from ) id 1picdX-000514-Hr; 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Sat, 01 Apr 2023 14:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7IXd9/zWyfJcoFCW48Lv3FgUWCWeA+yfwN/TAz9YbSo=; b=SABwAV6Lmt23/SSsxSX3/PTMyk DRiU3B+qE7OmNM8T2ljrWBWyJUr2LY8WC/2QYDtkcTsHfRJGOK04z8hWL/IDA0Ikoo0Vp26U81Yt6 S6lxsroEib3PWX3lhZ5HLp/DzNQ3fbsd+StmKVqWjovVAaH0QBrFgNJ+z/oeZLznK+sA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Use the correct format specifier Message-Id: Date: Sat, 01 Apr 2023 14:55:22 +0000 commit 64c21916167e6269280929fab1202537b54b13cf Author: Ayan Kumar Halder AuthorDate: Tue Mar 21 14:03:47 2023 +0000 Commit: Julien Grall CommitDate: Thu Mar 30 20:57:26 2023 +0100 xen/arm: Use the correct format specifier 1. One should use 'PRIpaddr' to display 'paddr_t' variables. However, while creating nodes in fdt, the address (if present in the node name) should be represented using 'PRIx64'. This is to be in conformance with the following rule present in https://elinux.org/Device_Tree_Linux . node names "unit-address does not have leading zeros" As 'PRIpaddr' introduces leading zeros, we cannot use it. So, we have introduced a wrapper ie domain_fdt_begin_node() which will represent physical address using 'PRIx64'. 2. One should use 'PRIx64' to display 'u64' in hex format. The current use of 'PRIpaddr' for printing PTE is buggy as this is not a physical address. Signed-off-by: Ayan Kumar Halder Reviewed-by: Stefano Stabellini Acked-by: Julien Grall --- xen/arch/arm/domain_build.c | 64 ++++++++++++++++++++++++++++----------------- xen/arch/arm/gic-v2.c | 6 ++--- xen/arch/arm/mm.c | 2 +- 3 files changed, 44 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 3195c5b6d6..4f9d4f9d88 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1288,6 +1288,39 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo, return res; } +/* + * Wrapper to convert physical address from paddr_t to uint64_t and + * invoke fdt_begin_node(). This is required as the physical address + * provided as part of node name should not contain any leading + * zeroes. Thus, one should use PRIx64 (instead of PRIpaddr) to append + * unit (which contains the physical address) with name to generate a + * node name. + */ +static int __init domain_fdt_begin_node(void *fdt, const char *name, + uint64_t unit) +{ + /* + * The size of the buffer to hold the longest possible string (i.e. + * interrupt-controller@ + a 64-bit number + \0). + */ + char buf[38]; + int ret; + + /* ePAPR 3.4 */ + ret = snprintf(buf, sizeof(buf), "%s@%"PRIx64, name, unit); + + if ( ret >= sizeof(buf) ) + { + printk(XENLOG_ERR + "Insufficient buffer. Minimum size required is %d\n", + (ret + 1)); + + return -FDT_ERR_TRUNCATED; + } + + return fdt_begin_node(fdt, buf); +} + static int __init make_memory_node(const struct domain *d, void *fdt, int addrcells, int sizecells, @@ -1296,8 +1329,6 @@ static int __init make_memory_node(const struct domain *d, unsigned int i; int res, reg_size = addrcells + sizecells; int nr_cells = 0; - /* Placeholder for memory@ + a 64-bit number + \0 */ - char buf[24]; __be32 reg[NR_MEM_BANKS * 4 /* Worst case addrcells + sizecells */]; __be32 *cells; @@ -1314,9 +1345,7 @@ static int __init make_memory_node(const struct domain *d, dt_dprintk("Create memory node\n"); - /* ePAPR 3.4 */ - snprintf(buf, sizeof(buf), "memory@%"PRIx64, mem->bank[i].start); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start); if ( res ) return res; @@ -1375,16 +1404,13 @@ static int __init make_shm_memory_node(const struct domain *d, { uint64_t start = mem->bank[i].start; uint64_t size = mem->bank[i].size; - /* Placeholder for xen-shmem@ + a 64-bit number + \0 */ - char buf[27]; const char compat[] = "xen,shared-memory-v1"; /* Worst case addrcells + sizecells */ __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; unsigned int len = (addrcells + sizecells) * sizeof(__be32); - snprintf(buf, sizeof(buf), "xen-shmem@%"PRIx64, mem->bank[i].start); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "xen-shmem", mem->bank[i].start); if ( res ) return res; @@ -2716,12 +2742,9 @@ static int __init make_gicv2_domU_node(struct kernel_info *kinfo) __be32 reg[(GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS) * 2]; __be32 *cells; const struct domain *d = kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; @@ -2771,14 +2794,10 @@ static int __init make_gicv3_domU_node(struct kernel_info *kinfo) int res = 0; __be32 *reg, *cells; const struct domain *d = kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; unsigned int i, len = 0; - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; @@ -2858,11 +2877,8 @@ static int __init make_vpl011_uart_node(struct kernel_info *kinfo) __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; struct domain *d = kinfo->d; - /* Placeholder for sbsa-uart@ + a 64-bit number + \0 */ - char buf[27]; - snprintf(buf, sizeof(buf), "sbsa-uart@%"PRIx64, d->arch.vpl011.base_addr); - res = fdt_begin_node(fdt, buf); + res = domain_fdt_begin_node(fdt, "sbsa-uart", d->arch.vpl011.base_addr); if ( res ) return res; diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 61802839cb..5d4d298b86 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1049,7 +1049,7 @@ static void __init gicv2_dt_init(void) if ( csize < SZ_8K ) { printk(XENLOG_WARNING "GICv2: WARNING: " - "The GICC size is too small: %#"PRIx64" expected %#x\n", + "The GICC size is too small: %#"PRIpaddr" expected %#x\n", csize, SZ_8K); if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) ) { @@ -1280,11 +1280,11 @@ static int __init gicv2_init(void) gicv2.map_cbase += aliased_offset; printk(XENLOG_WARNING - "GICv2: Adjusting CPU interface base to %#"PRIx64"\n", + "GICv2: Adjusting CPU interface base to %#"PRIpaddr"\n", cbase + aliased_offset); } else if ( csize == SZ_128K ) printk(XENLOG_WARNING - "GICv2: GICC size=%#"PRIx64" but not aliased\n", + "GICv2: GICC size=%#"PRIpaddr" but not aliased\n", csize); gicv2.map_hbase = ioremap_nocache(hbase, PAGE_SIZE); diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index f758cad545..b99806af99 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -263,7 +263,7 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr, pte = mapping[offsets[level]]; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/shadow: rename SHADOW_FOREACH_LE() to FOREACH_PRESENT_LE() Message-Id: Date: Sat, 01 Apr 2023 14:55:32 +0000 commit 4179f58371bc2f4105390638acd7383881040852 Author: Jan Beulich AuthorDate: Fri Mar 31 08:11:53 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:11:53 2023 +0200 x86/shadow: rename SHADOW_FOREACH_LE() to FOREACH_PRESENT_LE() These being local macros, the SHADOW prefix doesn't gain us much. What is more important to be aware of at use sites is that the supplied code is invoked for present entries only. While making the adjustment also properly use NULL for the 3rd argument at respective invocation sites. Requested-by: Andrew Cooper Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/x86/mm/shadow/multi.c | 56 +++++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index 8699de0501..8319874b42 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -777,7 +777,7 @@ static inline void increment_ptr_to_guest_entry(void *ptr) } /* All kinds of l1: touch all entries */ -#define _SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ +#define _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ do { \ int _i; \ shadow_l1e_t *_sp = map_domain_page((_sl1mfn)); \ @@ -796,25 +796,25 @@ do { \ /* 32-bit l1, on PAE or 64-bit shadows: need to walk both pages of shadow */ #if GUEST_PAGING_LEVELS == 2 && SHADOW_PAGING_LEVELS > 2 -#define SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ +#define FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ do { \ int __done = 0; \ - _SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, \ + _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, \ ({ (__done = _done); }), _code); \ _sl1mfn = sh_next_page(_sl1mfn); \ if ( !__done ) \ - _SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code); \ + _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code); \ } while (0) #else /* Everything else; l1 shadows are only one page */ -#define SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ - _SHADOW_FOREACH_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) +#define FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) \ + _FOREACH_PRESENT_L1E(_sl1mfn, _sl1e, _gl1p, _done, _code) #endif #if GUEST_PAGING_LEVELS == 2 /* 32-bit l2 on PAE/64: four pages, touch every second entry */ -#define SHADOW_FOREACH_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ +#define FOREACH_PRESENT_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ do { \ int _i, _j; \ ASSERT(shadow_mode_external(_dom)); \ @@ -839,7 +839,7 @@ do { \ #elif GUEST_PAGING_LEVELS == 3 /* PAE: touch all entries */ -#define SHADOW_FOREACH_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ +#define FOREACH_PRESENT_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ do { \ int _i; \ shadow_l2e_t *_sp = map_domain_page((_sl2mfn)); \ @@ -859,7 +859,7 @@ do { \ #else /* 64-bit l2: touch all entries except for PAE compat guests. */ -#define SHADOW_FOREACH_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ +#define FOREACH_PRESENT_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ do { \ unsigned int _i, _end = SHADOW_L2_PAGETABLE_ENTRIES; \ shadow_l2e_t *_sp = map_domain_page((_sl2mfn)); \ @@ -886,7 +886,7 @@ do { \ #if GUEST_PAGING_LEVELS == 4 /* 64-bit l3: touch all entries */ -#define SHADOW_FOREACH_L3E(_sl3mfn, _sl3e, _gl3p, _done, _code) \ +#define FOREACH_PRESENT_L3E(_sl3mfn, _sl3e, _gl3p, _done, _code) \ do { \ int _i; \ shadow_l3e_t *_sp = map_domain_page((_sl3mfn)); \ @@ -903,7 +903,7 @@ do { \ } while (0) /* 64-bit l4: avoid Xen mappings */ -#define SHADOW_FOREACH_L4E(_sl4mfn, _sl4e, _gl4p, _done, _dom, _code) \ +#define FOREACH_PRESENT_L4E(_sl4mfn, _sl4e, _gl4p, _done, _dom, _code) \ do { \ shadow_l4e_t *_sp = map_domain_page((_sl4mfn)); \ int _xen = !shadow_mode_external(_dom); \ @@ -1288,7 +1288,7 @@ void sh_destroy_l4_shadow(struct domain *d, mfn_t smfn) shadow_demote(d, gmfn, t); /* Decrement refcounts of all the old entries */ sl4mfn = smfn; - SHADOW_FOREACH_L4E(sl4mfn, sl4e, 0, 0, d, { + FOREACH_PRESENT_L4E(sl4mfn, sl4e, NULL, 0, d, { if ( shadow_l4e_get_flags(*sl4e) & _PAGE_PRESENT ) { sh_put_ref(d, shadow_l4e_get_mfn(*sl4e), @@ -1319,7 +1319,7 @@ void sh_destroy_l3_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ sl3mfn = smfn; - SHADOW_FOREACH_L3E(sl3mfn, sl3e, 0, 0, { + FOREACH_PRESENT_L3E(sl3mfn, sl3e, NULL, 0, { if ( shadow_l3e_get_flags(*sl3e) & _PAGE_PRESENT ) sh_put_ref(d, shadow_l3e_get_mfn(*sl3e), (((paddr_t)mfn_x(sl3mfn)) << PAGE_SHIFT) @@ -1351,7 +1351,7 @@ void sh_destroy_l2_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ sl2mfn = smfn; - SHADOW_FOREACH_L2E(sl2mfn, sl2e, 0, 0, d, { + FOREACH_PRESENT_L2E(sl2mfn, sl2e, NULL, 0, d, { if ( shadow_l2e_get_flags(*sl2e) & _PAGE_PRESENT ) sh_put_ref(d, shadow_l2e_get_mfn(*sl2e), (((paddr_t)mfn_x(sl2mfn)) << PAGE_SHIFT) @@ -1389,7 +1389,7 @@ void sh_destroy_l1_shadow(struct domain *d, mfn_t smfn) { /* Decrement refcounts of all the old entries */ mfn_t sl1mfn = smfn; - SHADOW_FOREACH_L1E(sl1mfn, sl1e, 0, 0, { + FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, 0, { unsigned int sl1f = shadow_l1e_get_flags(*sl1e); if ( (sl1f & _PAGE_PRESENT) && !sh_l1e_is_magic(*sl1e) ) @@ -1421,7 +1421,7 @@ void sh_destroy_l1_shadow(struct domain *d, mfn_t smfn) void sh_unhook_l2_mappings(struct domain *d, mfn_t sl2mfn, bool user_only) { shadow_l2e_t *sl2e; - SHADOW_FOREACH_L2E(sl2mfn, sl2e, 0, 0, d, { + FOREACH_PRESENT_L2E(sl2mfn, sl2e, NULL, 0, d, { if ( !user_only || (sl2e->l2 & _PAGE_USER) ) shadow_set_l2e(d, sl2e, shadow_l2e_empty(), sl2mfn); }); @@ -1432,7 +1432,7 @@ void sh_unhook_l2_mappings(struct domain *d, mfn_t sl2mfn, bool user_only) void sh_unhook_l4_mappings(struct domain *d, mfn_t sl4mfn, bool user_only) { shadow_l4e_t *sl4e; - SHADOW_FOREACH_L4E(sl4mfn, sl4e, 0, 0, d, { + FOREACH_PRESENT_L4E(sl4mfn, sl4e, NULL, 0, d, { if ( !user_only || (sl4e->l4 & _PAGE_USER) ) shadow_set_l4e(d, sl4e, shadow_l4e_empty(), sl4mfn); }); @@ -1666,7 +1666,7 @@ void sh_resync_l1(struct vcpu *v, mfn_t gl1mfn, mfn_t snpmfn) gp = map_domain_page(gl1mfn); gl1p = gp; - SHADOW_FOREACH_L1E(sl1mfn, sl1p, &gl1p, 0, { + FOREACH_PRESENT_L1E(sl1mfn, sl1p, &gl1p, 0, { guest_l1e_t gl1e = *gl1p; if ( snp[guest_index(gl1p)].l1 != gl1e.l1 ) @@ -3564,7 +3564,7 @@ int cf_check sh_rm_write_access_from_l1( mfn_t base_sl1mfn = sl1mfn; /* Because sl1mfn changes in the foreach */ #endif - SHADOW_FOREACH_L1E(sl1mfn, sl1e, 0, done, + FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { flags = shadow_l1e_get_flags(*sl1e); if ( (flags & _PAGE_PRESENT) @@ -3597,7 +3597,7 @@ int cf_check sh_rm_mappings_from_l1( int done = 0; int flags; - SHADOW_FOREACH_L1E(sl1mfn, sl1e, 0, done, + FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { flags = shadow_l1e_get_flags(*sl1e); if ( (flags & _PAGE_PRESENT) @@ -3648,7 +3648,7 @@ int cf_check sh_remove_l1_shadow(struct domain *d, mfn_t sl2mfn, mfn_t sl1mfn) int done = 0; int flags; - SHADOW_FOREACH_L2E(sl2mfn, sl2e, 0, done, d, + FOREACH_PRESENT_L2E(sl2mfn, sl2e, NULL, done, d, { flags = shadow_l2e_get_flags(*sl2e); if ( (flags & _PAGE_PRESENT) @@ -3671,7 +3671,7 @@ int cf_check sh_remove_l2_shadow(struct domain *d, mfn_t sl3mfn, mfn_t sl2mfn) int done = 0; int flags; - SHADOW_FOREACH_L3E(sl3mfn, sl3e, 0, done, + FOREACH_PRESENT_L3E(sl3mfn, sl3e, NULL, done, { flags = shadow_l3e_get_flags(*sl3e); if ( (flags & _PAGE_PRESENT) @@ -3693,7 +3693,7 @@ int cf_check sh_remove_l3_shadow(struct domain *d, mfn_t sl4mfn, mfn_t sl3mfn) int done = 0; int flags; - SHADOW_FOREACH_L4E(sl4mfn, sl4e, 0, done, d, + FOREACH_PRESENT_L4E(sl4mfn, sl4e, NULL, done, d, { flags = shadow_l4e_get_flags(*sl4e); if ( (flags & _PAGE_PRESENT) @@ -3924,7 +3924,7 @@ int cf_check sh_audit_l1_table(struct domain *d, mfn_t sl1mfn, mfn_t x) #endif gl1e = gp = map_domain_page(gl1mfn); - SHADOW_FOREACH_L1E(sl1mfn, sl1e, &gl1e, done, { + FOREACH_PRESENT_L1E(sl1mfn, sl1e, &gl1e, done, { if ( sh_l1e_is_magic(*sl1e) ) { @@ -3978,7 +3978,7 @@ int cf_check sh_audit_fl1_table(struct domain *d, mfn_t sl1mfn, mfn_t x) /* fl1 has no useful backpointer: all we can check are flags */ e = guest_l1e_from_gfn(_gfn(0), 0); gl1e = &e; /* Needed for macro */ - SHADOW_FOREACH_L1E(sl1mfn, sl1e, 0, done, { + FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { f = shadow_l1e_get_flags(*sl1e); f &= ~(_PAGE_AVAIL0|_PAGE_AVAIL1|_PAGE_AVAIL2); if ( !(f == 0 @@ -4015,7 +4015,7 @@ int cf_check sh_audit_l2_table(struct domain *d, mfn_t sl2mfn, mfn_t x) #endif gl2e = gp = map_domain_page(gl2mfn); - SHADOW_FOREACH_L2E(sl2mfn, sl2e, &gl2e, done, d, { + FOREACH_PRESENT_L2E(sl2mfn, sl2e, &gl2e, done, d, { s = sh_audit_flags(d, 2, guest_l2e_get_flags(*gl2e), shadow_l2e_get_flags(*sl2e)); @@ -4066,7 +4066,7 @@ int cf_check sh_audit_l3_table(struct domain *d, mfn_t sl3mfn, mfn_t x) #endif gl3e = gp = map_domain_page(gl3mfn); - SHADOW_FOREACH_L3E(sl3mfn, sl3e, &gl3e, done, { + FOREACH_PRESENT_L3E(sl3mfn, sl3e, &gl3e, done, { s = sh_audit_flags(d, 3, guest_l3e_get_flags(*gl3e), shadow_l3e_get_flags(*sl3e)); @@ -4115,7 +4115,7 @@ int cf_check sh_audit_l4_table(struct domain *d, mfn_t sl4mfn, mfn_t x) #endif gl4e = gp = map_domain_page(gl4mfn); - SHADOW_FOREACH_L4E(sl4mfn, sl4e, &gl4e, done, d, + FOREACH_PRESENT_L4E(sl4mfn, sl4e, &gl4e, done, d, { s = sh_audit_flags(d, 4, guest_l4e_get_flags(*gl4e), shadow_l4e_get_flags(*sl4e)); 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/shadow: drop redundant present bit checks from FOREACH_PRESENT_LE() "bodies" Message-Id: Date: Sat, 01 Apr 2023 14:55:42 +0000 commit dc7be3979ce52fb30d89ab53b72e9e19891a8d9a Author: Jan Beulich AuthorDate: Fri Mar 31 08:12:45 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:12:45 2023 +0200 x86/shadow: drop redundant present bit checks from FOREACH_PRESENT_LE() "bodies" FOREACH_PRESENT_LE(), as their names (now) say, already invoke the "body" only when the present bit is set; no need to re-do the check. While there also - stop open-coding mfn_to_maddr() in code being touched (re-indented) anyway, - stop open-coding mfn_eq() in code being touched or in adjacent code, - drop local variables when they're no longer used at least twice. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/x86/mm/shadow/multi.c | 54 ++++++++++++------------------------------ 1 file changed, 15 insertions(+), 39 deletions(-) diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index 8319874b42..ddcf34972d 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -1289,12 +1289,8 @@ void sh_destroy_l4_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ sl4mfn = smfn; FOREACH_PRESENT_L4E(sl4mfn, sl4e, NULL, 0, d, { - if ( shadow_l4e_get_flags(*sl4e) & _PAGE_PRESENT ) - { - sh_put_ref(d, shadow_l4e_get_mfn(*sl4e), - (((paddr_t)mfn_x(sl4mfn)) << PAGE_SHIFT) - | ((unsigned long)sl4e & ~PAGE_MASK)); - } + sh_put_ref(d, shadow_l4e_get_mfn(*sl4e), + mfn_to_maddr(sl4mfn) | ((unsigned long)sl4e & ~PAGE_MASK)); }); /* Put the memory back in the pool */ @@ -1320,10 +1316,8 @@ void sh_destroy_l3_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ sl3mfn = smfn; FOREACH_PRESENT_L3E(sl3mfn, sl3e, NULL, 0, { - if ( shadow_l3e_get_flags(*sl3e) & _PAGE_PRESENT ) - sh_put_ref(d, shadow_l3e_get_mfn(*sl3e), - (((paddr_t)mfn_x(sl3mfn)) << PAGE_SHIFT) - | ((unsigned long)sl3e & ~PAGE_MASK)); + sh_put_ref(d, shadow_l3e_get_mfn(*sl3e), + mfn_to_maddr(sl3mfn) | ((unsigned long)sl3e & ~PAGE_MASK)); }); /* Put the memory back in the pool */ @@ -1352,10 +1346,8 @@ void sh_destroy_l2_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ sl2mfn = smfn; FOREACH_PRESENT_L2E(sl2mfn, sl2e, NULL, 0, d, { - if ( shadow_l2e_get_flags(*sl2e) & _PAGE_PRESENT ) - sh_put_ref(d, shadow_l2e_get_mfn(*sl2e), - (((paddr_t)mfn_x(sl2mfn)) << PAGE_SHIFT) - | ((unsigned long)sl2e & ~PAGE_MASK)); + sh_put_ref(d, shadow_l2e_get_mfn(*sl2e), + mfn_to_maddr(sl2mfn) | ((unsigned long)sl2e & ~PAGE_MASK)); }); /* Put the memory back in the pool */ @@ -1390,11 +1382,10 @@ void sh_destroy_l1_shadow(struct domain *d, mfn_t smfn) /* Decrement refcounts of all the old entries */ mfn_t sl1mfn = smfn; FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, 0, { - unsigned int sl1f = shadow_l1e_get_flags(*sl1e); - - if ( (sl1f & _PAGE_PRESENT) && !sh_l1e_is_magic(*sl1e) ) + if ( !sh_l1e_is_magic(*sl1e) ) { - shadow_vram_put_mfn(shadow_l1e_get_mfn(*sl1e), sl1f, + shadow_vram_put_mfn(shadow_l1e_get_mfn(*sl1e), + shadow_l1e_get_flags(*sl1e), sl1mfn, sl1e, d); shadow_put_page_from_l1e(*sl1e, d); } @@ -3558,7 +3549,6 @@ int cf_check sh_rm_write_access_from_l1( { shadow_l1e_t *sl1e; int done = 0; - int flags; #if SHADOW_OPTIMIZATIONS & SHOPT_WRITABLE_HEURISTIC struct vcpu *curr = current; mfn_t base_sl1mfn = sl1mfn; /* Because sl1mfn changes in the foreach */ @@ -3566,10 +3556,8 @@ int cf_check sh_rm_write_access_from_l1( FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { - flags = shadow_l1e_get_flags(*sl1e); - if ( (flags & _PAGE_PRESENT) - && (flags & _PAGE_RW) - && (mfn_x(shadow_l1e_get_mfn(*sl1e)) == mfn_x(readonly_mfn)) ) + if ( (shadow_l1e_get_flags(*sl1e) & _PAGE_RW) && + mfn_eq(shadow_l1e_get_mfn(*sl1e), readonly_mfn) ) { shadow_l1e_t ro_sl1e = shadow_l1e_remove_flags(*sl1e, _PAGE_RW); @@ -3595,13 +3583,10 @@ int cf_check sh_rm_mappings_from_l1( { shadow_l1e_t *sl1e; int done = 0; - int flags; FOREACH_PRESENT_L1E(sl1mfn, sl1e, NULL, done, { - flags = shadow_l1e_get_flags(*sl1e); - if ( (flags & _PAGE_PRESENT) - && (mfn_x(shadow_l1e_get_mfn(*sl1e)) == mfn_x(target_mfn)) ) + if ( mfn_eq(shadow_l1e_get_mfn(*sl1e), target_mfn) ) { shadow_set_l1e(d, sl1e, shadow_l1e_empty(), p2m_invalid, sl1mfn); if ( sh_check_page_has_no_refs(mfn_to_page(target_mfn)) ) @@ -3646,13 +3631,10 @@ int cf_check sh_remove_l1_shadow(struct domain *d, mfn_t sl2mfn, mfn_t sl1mfn) { shadow_l2e_t *sl2e; int done = 0; - int flags; FOREACH_PRESENT_L2E(sl2mfn, sl2e, NULL, done, d, { - flags = shadow_l2e_get_flags(*sl2e); - if ( (flags & _PAGE_PRESENT) - && (mfn_x(shadow_l2e_get_mfn(*sl2e)) == mfn_x(sl1mfn)) ) + if ( mfn_eq(shadow_l2e_get_mfn(*sl2e), sl1mfn) ) { shadow_set_l2e(d, sl2e, shadow_l2e_empty(), sl2mfn); if ( mfn_to_page(sl1mfn)->u.sh.type == 0 ) @@ -3669,13 +3651,10 @@ int cf_check sh_remove_l2_shadow(struct domain *d, mfn_t sl3mfn, mfn_t sl2mfn) { shadow_l3e_t *sl3e; int done = 0; - int flags; FOREACH_PRESENT_L3E(sl3mfn, sl3e, NULL, done, { - flags = shadow_l3e_get_flags(*sl3e); - if ( (flags & _PAGE_PRESENT) - && (mfn_x(shadow_l3e_get_mfn(*sl3e)) == mfn_x(sl2mfn)) ) + if ( mfn_eq(shadow_l3e_get_mfn(*sl3e), sl2mfn) ) { shadow_set_l3e(d, sl3e, shadow_l3e_empty(), sl3mfn); if ( mfn_to_page(sl2mfn)->u.sh.type == 0 ) @@ -3691,13 +3670,10 @@ int cf_check sh_remove_l3_shadow(struct domain *d, mfn_t sl4mfn, mfn_t sl3mfn) { shadow_l4e_t *sl4e; int done = 0; - int flags; FOREACH_PRESENT_L4E(sl4mfn, sl4e, NULL, done, d, { - flags = shadow_l4e_get_flags(*sl4e); - if ( (flags & _PAGE_PRESENT) - && (mfn_x(shadow_l4e_get_mfn(*sl4e)) == mfn_x(sl3mfn)) ) + if ( mfn_eq(shadow_l4e_get_mfn(*sl4e), sl3mfn) ) { shadow_set_l4e(d, sl4e, shadow_l4e_empty(), sl4mfn); if ( mfn_to_page(sl3mfn)->u.sh.type == 0 ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 01 14:55:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 01 Apr 2023 14:55:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517168.802282 (Exim 4.92) (envelope-from ) id 1pice2-0005AS-OW; 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Sat, 01 Apr 2023 14:55:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Wwy9LgwMYBhD0At0oITVYIB2acyXMVTcCiblgyhSHlU=; b=NhRo4wHXC36Zdl2ng7ftzBmM/L 851uY5QijnnhKJQ2ZDl8F/x3GS7D86GGAPgAFPkbe9XXVu1S2rSnr2CyiVEf1vx7QCe6frfsBjnZR zCz7z9BvmC0YB9LGB+1r7RNozQvD5YtLdF+M6otUNCbZM8hTzuUxcWCEDblDheApza9A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] bump default SeaBIOS version to 1.16.2 Message-Id: Date: Sat, 01 Apr 2023 14:55:52 +0000 commit d6e0b4c41a38655ade7ecb566e8b2961282769fb Author: Jan Beulich AuthorDate: Fri Mar 31 08:13:30 2023 +0200 Commit: Jan Beulich CommitDate: Fri Mar 31 08:13:30 2023 +0200 bump default SeaBIOS version to 1.16.2 Signed-off-by: Jan Beulich Acked-by: Julien Grall --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index a90d093010..99cdcf3d09 100644 --- a/Config.mk +++ b/Config.mk @@ -225,7 +225,7 @@ MINIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/mini-os.git MINIOS_UPSTREAM_REVISION ?= 5bcb28aaeba1c2506a82fab0cdad0201cd9b54b3 SEABIOS_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/seabios.git -SEABIOS_UPSTREAM_REVISION ?= rel-1.16.1 +SEABIOS_UPSTREAM_REVISION ?= rel-1.16.2 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517627.803242 (Exim 4.92) (envelope-from ) id 1pjY0d-0003aA-KG; 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Tue, 04 Apr 2023 04:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Wip+LymxNFrS9zYKCnt6YqcOsulxCc3/v4Eb4XKnM9s=; b=2k9pVY6G9NIveGNNKXdEbs+owa oSYEEbVMK/cCU0RMgjJxfAMT81sd5xX+M9eU2MjCUEaJt2xmPOMgmVMzBXEYR5sNaT+YZfEreog+f fcJGrZCYN4gjUpyZFu0U1l04m18f1q8Ck+40aWj6O8/8BS7KO7owXMzHjaaK6eyAd7C0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: split off opcode 0f01 handling Message-Id: Date: Tue, 04 Apr 2023 04:11:02 +0000 commit 9ace97ab9b87924477bbaea0a5a1378e106951cb Author: Jan Beulich AuthorDate: Mon Apr 3 12:41:08 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:41:08 2023 +0200 x86emul: split off opcode 0f01 handling There's a fair amount of sub-cases (with some yet to be implemented), so a separate function seems warranted. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/fuzz/x86_instruction_emulator/Makefile | 23 +- tools/tests/x86_emulator/Makefile | 17 +- tools/tests/x86_emulator/x86-emulate.c | 6 +- tools/tests/x86_emulator/x86-emulate.h | 8 + xen/arch/x86/Makefile | 1 + xen/arch/x86/x86_emulate.c | 9 - xen/arch/x86/x86_emulate/0f01.c | 353 ++++++++++++ xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/private.h | 532 +++++++++++++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 822 +-------------------------- 10 files changed, 951 insertions(+), 821 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 13aa238503..08c96c1615 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -13,9 +13,11 @@ endif ln -nsf $< $@ x86_emulate: FORCE - ln -nsf $(XEN_ROOT)/xen/arch/x86/$@ + mkdir -p $@ + ln -sf $(XEN_ROOT)/xen/arch/x86/$@/*.[ch] $@/ -x86_emulate/%: x86_emulate ; +x86_emulate/%.c: x86_emulate ; +x86_emulate/%.h: x86_emulate ; %.c: $(XEN_ROOT)/tools/tests/x86_emulator/%.c FORCE ln -nsf $< $@ @@ -29,17 +31,26 @@ GCOV_FLAGS := --coverage %-cov.o: %.c $(CC) -c $(CFLAGS) $(GCOV_FLAGS) $< -o $@ +OBJS := fuzz-emul.o x86-emulate.o +OBJS += x86_emulate/0f01.o + x86-emulate.h: x86_emulate/x86_emulate.h -x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c +x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h fuzz-emul.o fuzz-emul-cov.o wrappers.o: x86-emulate.h -x86-insn-fuzzer.a: fuzz-emul.o x86-emulate.o cpuid.o +$(filter x86_emulate/%.o,$(OBJS)): x86_emulate/%.o: x86_emulate/%.c x86_emulate/private.h $(x86_emulate.h) + $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) -c -o $@ $< $(APPEND_CFLAGS) + +$(patsubst %.o,%-cov.o,$(filter x86_emulate/%.o,$(OBJS))): x86_emulate/%-cov.o: x86_emulate/%.c x86_emulate/private.h $(x86_emulate.h) + $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) $(GCOV_FLAGS) -c -o $@ $< $(APPEND_CFLAGS) + +x86-insn-fuzzer.a: $(OBJS) cpuid.o $(AR) rc $@ $^ -afl-harness: afl-harness.o fuzz-emul.o x86-emulate.o cpuid.o wrappers.o +afl-harness: afl-harness.o $(OBJS) cpuid.o wrappers.o $(CC) $(CFLAGS) $^ -o $@ -afl-harness-cov: afl-harness-cov.o fuzz-emul-cov.o x86-emulate-cov.o cpuid.o wrappers.o +afl-harness-cov: afl-harness-cov.o $(patsubst %.o,%-cov.o,$(OBJS)) cpuid.o wrappers.o $(CC) $(CFLAGS) $(GCOV_FLAGS) $^ -o $@ # Common targets diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 7b07c31bbd..72134564f8 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -29,7 +29,7 @@ OPMASK := avx512f avx512dq avx512bw ifeq ($(origin XEN_COMPILE_ARCH),override) -HOSTCFLAGS += -m32 +HOSTCFLAGS += -m32 -I.. else @@ -250,7 +250,10 @@ xop.h avx512f.h: simd-fma.c endif # 32-bit override -$(TARGET): x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o +OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o +OBJS += x86_emulate/0f01.o + +$(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ .PHONY: clean @@ -274,8 +277,10 @@ else run32 clean32: %32: % endif +.PHONY: x86_emulate x86_emulate: - [ -L $@ ] || ln -sf $(XEN_ROOT)/xen/arch/x86/$@ + mkdir -p $@ + ln -sf $(XEN_ROOT)/xen/arch/x86/$@/*.[ch] $@/ x86_emulate/%: x86_emulate ; @@ -287,13 +292,13 @@ x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ cpuid.h cpuid-autogen.h) -x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) +x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h x86_emulate/private.h $(x86.h) -x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o: %.o: %.c $(x86_emulate.h) +$(OBJS): %.o: %.c $(x86_emulate.h) $(HOSTCC) $(HOSTCFLAGS) -c -g -o $@ $< x86-emulate.o: x86_emulate/x86_emulate.c -x86-emulate.o: HOSTCFLAGS += -D__XEN_TOOLS__ +x86-emulate.o x86_emulate/%.o: HOSTCFLAGS += -D__XEN_TOOLS__ # In order for our custom .type assembler directives to reliably land after # gcc's, we need to keep it from re-ordering top-level constructs. diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index ea286d6ad8..cd81da4994 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -22,11 +22,9 @@ /* For generic assembly code: use macros to define operation/operand sizes. */ #ifdef __i386__ -# define r(name) e ## name # define __OS "l" /* Operation Suffix */ # define __OP "e" /* Operand Prefix */ #else -# define r(name) r ## name # define __OS "q" /* Operation Suffix */ # define __OP "r" /* Operand Prefix */ #endif @@ -265,12 +263,12 @@ void emul_test_put_fpu( static uint32_t pkru; -static unsigned int rdpkru(void) +unsigned int rdpkru(void) { return pkru; } -static void wrpkru(unsigned int val) +void wrpkru(unsigned int val) { pkru = val; } diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 1af986f78d..296e8e280c 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -1,3 +1,6 @@ +#ifndef X86_EMULATE_H +#define X86_EMULATE_H + #include #include #include @@ -124,6 +127,9 @@ static inline bool xcr0_mask(uint64_t mask) return cpu_has_xsave && ((xgetbv(0) & mask) == mask); } +unsigned int rdpkru(void); +void wrpkru(unsigned int val); + #define cache_line_size() (cp.basic.clflush_size * 8) #define cpu_has_fpu cp.basic.fpu #define cpu_has_mmx cp.basic.mmx @@ -201,3 +207,5 @@ void emul_test_put_fpu( struct x86_emulate_ctxt *ctxt, enum x86_emulate_fpu_type backout, const struct x86_emul_fpu_aux *aux); + +#endif /* X86_EMULATE_H */ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 5accbe4c67..08b110592d 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -9,6 +9,7 @@ obj-y += mm/ obj-$(CONFIG_XENOPROF) += oprofile/ obj-$(CONFIG_PV) += pv/ obj-y += x86_64/ +obj-y += x86_emulate/ alternative-y := alternative.init.o alternative-$(CONFIG_LIVEPATCH) := diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index 8c7d185218..ef405edbf3 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -15,7 +15,6 @@ #include #include /* current_cpu_info */ -#include #include #include /* cpu_has_amd_erratum() */ #include @@ -26,8 +25,6 @@ #undef cpuid #undef wbinvd -#define r(name) r ## name - #define cpu_has_amd_erratum(nr) \ cpu_has_amd_erratum(¤t_cpu_data, AMD_ERRATUM_##nr) @@ -56,12 +53,6 @@ #define FXSAVE_AREA current->arch.fpu_ctxt -#ifndef CONFIG_HVM -# define X86EMUL_NO_FPU -# define X86EMUL_NO_MMX -# define X86EMUL_NO_SIMD -#endif - #include "x86_emulate/x86_emulate.c" int cf_check x86emul_read_xcr( diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f01.c new file mode 100644 index 0000000000..2d655bdb92 --- /dev/null +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -0,0 +1,353 @@ +/****************************************************************************** + * 0f01.c - helper for x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * Copyright (c) 2005-2007 Keir Fraser + * Copyright (c) 2005-2007 XenSource Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#ifdef __XEN__ +#include +#endif + +#define ad_bytes (s->ad_bytes) /* for truncate_ea() */ + +int x86emul_0f01(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + enum x86_segment seg = (s->modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr; + int rc; + + switch ( s->modrm ) + { + unsigned long base, limit, cr0, cr0w, cr4; + struct segment_register sreg; + uint64_t msr_val; + + case 0xca: /* clac */ + case 0xcb: /* stac */ + vcpu_must_have(smap); + generate_exception_if(s->vex.pfx || !mode_ring0(), X86_EXC_UD); + + regs->eflags &= ~X86_EFLAGS_AC; + if ( s->modrm == 0xcb ) + regs->eflags |= X86_EFLAGS_AC; + break; + + case 0xd0: /* xgetbv */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + if ( !ops->read_cr || !ops->read_xcr || + ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), X86_EXC_UD); + rc = ops->read_xcr(regs->ecx, &msr_val, ctxt); + if ( rc != X86EMUL_OKAY ) + goto done; + regs->r(ax) = (uint32_t)msr_val; + regs->r(dx) = msr_val >> 32; + break; + + case 0xd1: /* xsetbv */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + if ( !ops->read_cr || !ops->write_xcr || + ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + rc = ops->write_xcr(regs->ecx, + regs->eax | ((uint64_t)regs->edx << 32), ctxt); + if ( rc != X86EMUL_OKAY ) + goto done; + break; + + case 0xd4: /* vmfunc */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + fail_if(!ops->vmfunc); + if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY ) + goto done; + break; + + case 0xd5: /* xend */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + generate_exception_if(!vcpu_has_rtm(), X86_EXC_UD); + generate_exception_if(vcpu_has_rtm(), X86_EXC_GP, 0); + break; + + case 0xd6: /* xtest */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(), + X86_EXC_UD); + /* Neither HLE nor RTM can be active when we get here. */ + regs->eflags |= X86_EFLAGS_ZF; + break; + + case 0xdf: /* invlpga */ + fail_if(!ops->read_msr); + if ( (rc = ops->read_msr(MSR_EFER, + &msr_val, ctxt)) != X86EMUL_OKAY ) + goto done; + /* Finding SVME set implies vcpu_has_svm(). */ + generate_exception_if(!(msr_val & EFER_SVME) || + !in_protmode(ctxt, ops), X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + fail_if(!ops->tlb_op); + if ( (rc = ops->tlb_op(x86emul_invlpga, truncate_ea(regs->r(ax)), + regs->ecx, ctxt)) != X86EMUL_OKAY ) + goto done; + break; + + case 0xe8: + switch ( s->vex.pfx ) + { + case vex_none: /* serialize */ + host_and_vcpu_must_have(serialize); + asm volatile ( ".byte 0x0f, 0x01, 0xe8" ); + break; + case vex_f2: /* xsusldtrk */ + vcpu_must_have(tsxldtrk); + /* + * We're never in a transactional region when coming here + * - nothing else to do. + */ + break; + default: + return X86EMUL_UNIMPLEMENTED; + } + break; + + case 0xe9: + switch ( s->vex.pfx ) + { + case vex_f2: /* xresldtrk */ + vcpu_must_have(tsxldtrk); + /* + * We're never in a transactional region when coming here + * - nothing else to do. + */ + break; + default: + return X86EMUL_UNIMPLEMENTED; + } + break; + + case 0xee: + switch ( s->vex.pfx ) + { + case vex_none: /* rdpkru */ + if ( !ops->read_cr || + ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_PKE), X86_EXC_UD); + generate_exception_if(regs->ecx, X86_EXC_GP, 0); + regs->r(ax) = rdpkru(); + regs->r(dx) = 0; + break; + default: + return X86EMUL_UNIMPLEMENTED; + } + break; + + case 0xef: + switch ( s->vex.pfx ) + { + case vex_none: /* wrpkru */ + if ( !ops->read_cr || + ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = 0; + generate_exception_if(!(cr4 & X86_CR4_PKE), X86_EXC_UD); + generate_exception_if(regs->ecx | regs->edx, X86_EXC_GP, 0); + wrpkru(regs->eax); + break; + default: + return X86EMUL_UNIMPLEMENTED; + } + break; + + case 0xf8: /* swapgs */ + generate_exception_if(!mode_64bit(), X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + fail_if(!ops->read_segment || !ops->read_msr || + !ops->write_segment || !ops->write_msr); + if ( (rc = ops->read_segment(x86_seg_gs, &sreg, + ctxt)) != X86EMUL_OKAY || + (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, + ctxt)) != X86EMUL_OKAY || + (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, + ctxt)) != X86EMUL_OKAY ) + goto done; + sreg.base = msr_val; + if ( (rc = ops->write_segment(x86_seg_gs, &sreg, + ctxt)) != X86EMUL_OKAY ) + { + /* Best effort unwind (i.e. no error checking). */ + ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, ctxt); + goto done; + } + break; + + case 0xf9: /* rdtscp */ + fail_if(ops->read_msr == NULL); + if ( (rc = ops->read_msr(MSR_TSC_AUX, + &msr_val, ctxt)) != X86EMUL_OKAY ) + goto done; + regs->r(cx) = (uint32_t)msr_val; + return X86EMUL_rdtsc; + + case 0xfc: /* clzero */ + { + unsigned long zero = 0; + + vcpu_must_have(clzero); + + base = ad_bytes == 8 ? regs->r(ax) : + ad_bytes == 4 ? regs->eax : regs->ax; + limit = ctxt->cpuid->basic.clflush_size * 8; + generate_exception_if(limit < sizeof(long) || + (limit & (limit - 1)), X86_EXC_UD); + base &= ~(limit - 1); + if ( ops->rep_stos ) + { + unsigned long nr_reps = limit / sizeof(zero); + + rc = ops->rep_stos(&zero, s->ea.mem.seg, base, sizeof(zero), + &nr_reps, ctxt); + if ( rc == X86EMUL_OKAY ) + { + base += nr_reps * sizeof(zero); + limit -= nr_reps * sizeof(zero); + } + else if ( rc != X86EMUL_UNHANDLEABLE ) + goto done; + } + fail_if(limit && !ops->write); + while ( limit ) + { + rc = ops->write(s->ea.mem.seg, base, &zero, sizeof(zero), ctxt); + if ( rc != X86EMUL_OKAY ) + goto done; + base += sizeof(zero); + limit -= sizeof(zero); + } + break; + } + +#define _GRP7(mod, reg) \ + (((mod) << 6) | ((reg) << 3)) ... (((mod) << 6) | ((reg) << 3) | 7) +#define GRP7_MEM(reg) _GRP7(0, reg): case _GRP7(1, reg): case _GRP7(2, reg) +#define GRP7_ALL(reg) GRP7_MEM(reg): case _GRP7(3, reg) + + case GRP7_MEM(0): /* sgdt */ + case GRP7_MEM(1): /* sidt */ + ASSERT(s->ea.type == OP_MEM); + generate_exception_if(umip_active(ctxt, ops), X86_EXC_GP, 0); + fail_if(!ops->read_segment || !ops->write); + if ( (rc = ops->read_segment(seg, &sreg, ctxt)) ) + goto done; + if ( mode_64bit() ) + s->op_bytes = 8; + else if ( s->op_bytes == 2 ) + { + sreg.base &= 0xffffff; + s->op_bytes = 4; + } + if ( (rc = ops->write(s->ea.mem.seg, s->ea.mem.off, &sreg.limit, + 2, ctxt)) != X86EMUL_OKAY || + (rc = ops->write(s->ea.mem.seg, truncate_ea(s->ea.mem.off + 2), + &sreg.base, s->op_bytes, ctxt)) != X86EMUL_OKAY ) + goto done; + break; + + case GRP7_MEM(2): /* lgdt */ + case GRP7_MEM(3): /* lidt */ + ASSERT(s->ea.type == OP_MEM); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + fail_if(ops->write_segment == NULL); + memset(&sreg, 0, sizeof(sreg)); + if ( (rc = read_ulong(s->ea.mem.seg, s->ea.mem.off, + &limit, 2, ctxt, ops)) || + (rc = read_ulong(s->ea.mem.seg, truncate_ea(s->ea.mem.off + 2), + &base, mode_64bit() ? 8 : 4, ctxt, ops)) ) + goto done; + generate_exception_if(!is_canonical_address(base), X86_EXC_GP, 0); + sreg.base = base; + sreg.limit = limit; + if ( !mode_64bit() && s->op_bytes == 2 ) + sreg.base &= 0xffffff; + if ( (rc = ops->write_segment(seg, &sreg, ctxt)) ) + goto done; + break; + + case GRP7_ALL(4): /* smsw */ + generate_exception_if(umip_active(ctxt, ops), X86_EXC_GP, 0); + if ( s->ea.type == OP_MEM ) + { + fail_if(!ops->write); + s->desc |= Mov; /* force writeback */ + s->ea.bytes = 2; + } + else + s->ea.bytes = s->op_bytes; + *dst = s->ea; + fail_if(ops->read_cr == NULL); + if ( (rc = ops->read_cr(0, &dst->val, ctxt)) ) + goto done; + break; + + case GRP7_ALL(6): /* lmsw */ + fail_if(ops->read_cr == NULL); + fail_if(ops->write_cr == NULL); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + if ( (rc = ops->read_cr(0, &cr0, ctxt)) ) + goto done; + if ( s->ea.type == OP_REG ) + cr0w = *s->ea.reg; + else if ( (rc = read_ulong(s->ea.mem.seg, s->ea.mem.off, + &cr0w, 2, ctxt, ops)) ) + goto done; + /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */ + cr0 = (cr0 & ~0xe) | (cr0w & 0xf); + if ( (rc = ops->write_cr(0, cr0, ctxt)) ) + goto done; + break; + + case GRP7_MEM(7): /* invlpg */ + ASSERT(s->ea.type == OP_MEM); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + fail_if(!ops->tlb_op); + if ( (rc = ops->tlb_op(x86emul_invlpg, s->ea.mem.off, s->ea.mem.seg, + ctxt)) != X86EMUL_OKAY ) + goto done; + break; + +#undef GRP7_ALL +#undef GRP7_MEM +#undef _GRP7 + + default: + return X86EMUL_UNIMPLEMENTED; + } + + rc = X86EMUL_OKAY; + + done: + return rc; +} diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile new file mode 100644 index 0000000000..36d75f84bd --- /dev/null +++ b/xen/arch/x86/x86_emulate/Makefile @@ -0,0 +1 @@ +obj-y += 0f01.o diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h new file mode 100644 index 0000000000..7907f30122 --- /dev/null +++ b/xen/arch/x86/x86_emulate/private.h @@ -0,0 +1,532 @@ +/****************************************************************************** + * private.h - interface between x86_emulate.c and its helpers + * + * Copyright (c) 2005-2007 Keir Fraser + * Copyright (c) 2005-2007 XenSource Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#ifdef __XEN__ + +# include +# include +# include + +# ifndef CONFIG_HVM +# define X86EMUL_NO_FPU +# define X86EMUL_NO_MMX +# define X86EMUL_NO_SIMD +# endif + +#else /* !__XEN__ */ +# include "x86-emulate.h" +#endif + +#ifdef __i386__ +# define mode_64bit() false +# define r(name) e ## name +#else +# define mode_64bit() (ctxt->addr_size == 64) +# define r(name) r ## name +#endif + +/* Operand sizes: 8-bit operands or specified/overridden size. */ +#define ByteOp (1<<0) /* 8-bit operands. */ +/* Destination operand type. */ +#define DstNone (0<<1) /* No destination operand. */ +#define DstImplicit (0<<1) /* Destination operand is implicit in the opcode. */ +#define DstBitBase (1<<1) /* Memory operand, bit string. */ +#define DstReg (2<<1) /* Register operand. */ +#define DstEax DstReg /* Register EAX (aka DstReg with no ModRM) */ +#define DstMem (3<<1) /* Memory operand. */ +#define DstMask (3<<1) +/* Source operand type. */ +#define SrcNone (0<<3) /* No source operand. */ +#define SrcImplicit (0<<3) /* Source operand is implicit in the opcode. */ +#define SrcReg (1<<3) /* Register operand. */ +#define SrcEax SrcReg /* Register EAX (aka SrcReg with no ModRM) */ +#define SrcMem (2<<3) /* Memory operand. */ +#define SrcMem16 (3<<3) /* Memory operand (16-bit). */ +#define SrcImm (4<<3) /* Immediate operand. */ +#define SrcImmByte (5<<3) /* 8-bit sign-extended immediate operand. */ +#define SrcImm16 (6<<3) /* 16-bit zero-extended immediate operand. */ +#define SrcMask (7<<3) +/* Generic ModRM decode. */ +#define ModRM (1<<6) +/* vSIB addressing mode (0f38 extension opcodes only), aliasing ModRM. */ +#define vSIB (1<<6) +/* Destination is only written; never read. */ +#define Mov (1<<7) +/* VEX/EVEX (SIMD only): 2nd source operand unused (must be all ones) */ +#define TwoOp Mov +/* All operands are implicit in the opcode. */ +#define ImplicitOps (DstImplicit|SrcImplicit) + +typedef uint8_t opcode_desc_t; + +/* Type, address-of, and value of an instruction's operand. */ +struct operand { + enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type; + unsigned int bytes; + + /* Operand value. */ + unsigned long val; + + /* Original operand value. */ + unsigned long orig_val; + + /* OP_REG: Pointer to register field. */ + unsigned long *reg; + + /* OP_MEM: Segment and offset. */ + struct { + enum x86_segment seg; + unsigned long off; + } mem; +}; + +#define REX_PREFIX 0x40 +#define REX_B 0x01 +#define REX_X 0x02 +#define REX_R 0x04 +#define REX_W 0x08 + +enum simd_opsize { + simd_none, + + /* + * Ordinary packed integers: + * - 64 bits without prefix 66 (MMX) + * - 128 bits with prefix 66 (SSEn) + * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) + */ + simd_packed_int, + + /* + * Ordinary packed/scalar floating point: + * - 128 bits without prefix or with prefix 66 (SSEn) + * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) + * - 32 bits with prefix F3 (scalar single) + * - 64 bits with prefix F2 (scalar doubgle) + */ + simd_any_fp, + + /* + * Packed floating point: + * - 128 bits without prefix or with prefix 66 (SSEn) + * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) + */ + simd_packed_fp, + + /* + * Single precision packed/scalar floating point: + * - 128 bits without prefix (SSEn) + * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) + * - 32 bits with prefix F3 (scalar) + */ + simd_single_fp, + + /* + * Scalar floating point: + * - 32 bits with low opcode bit clear (scalar single) + * - 64 bits with low opcode bit set (scalar double) + */ + simd_scalar_opc, + + /* + * Scalar floating point: + * - 32/64 bits depending on VEX.W/EVEX.W + */ + simd_scalar_vexw, + + /* + * 128 bits of integer or floating point data, with no further + * formatting information, or with it encoded by EVEX.W. + */ + simd_128, + + /* + * 256 bits of integer or floating point data, with formatting + * encoded by EVEX.W. + */ + simd_256, + + /* Operand size encoded in non-standard way. */ + simd_other +}; +typedef uint8_t simd_opsize_t; + +#define vex_none 0 + +enum vex_opcx { + vex_0f = vex_none + 1, + vex_0f38, + vex_0f3a, +}; + +enum vex_pfx { + vex_66 = vex_none + 1, + vex_f3, + vex_f2 +}; + +union vex { + uint8_t raw[2]; + struct { /* SDM names */ + uint8_t opcx:5; /* mmmmm */ + uint8_t b:1; /* B */ + uint8_t x:1; /* X */ + uint8_t r:1; /* R */ + uint8_t pfx:2; /* pp */ + uint8_t l:1; /* L */ + uint8_t reg:4; /* vvvv */ + uint8_t w:1; /* W */ + }; +}; + +union evex { + uint8_t raw[3]; + struct { /* SDM names */ + uint8_t opcx:2; /* mm */ + uint8_t mbz:2; + uint8_t R:1; /* R' */ + uint8_t b:1; /* B */ + uint8_t x:1; /* X */ + uint8_t r:1; /* R */ + uint8_t pfx:2; /* pp */ + uint8_t mbs:1; + uint8_t reg:4; /* vvvv */ + uint8_t w:1; /* W */ + uint8_t opmsk:3; /* aaa */ + uint8_t RX:1; /* V' */ + uint8_t brs:1; /* b */ + uint8_t lr:2; /* L'L */ + uint8_t z:1; /* z */ + }; +}; + +struct x86_emulate_state { + unsigned int op_bytes, ad_bytes; + + enum { + ext_none = vex_none, + ext_0f = vex_0f, + ext_0f38 = vex_0f38, + ext_0f3a = vex_0f3a, + /* + * For XOP use values such that the respective instruction field + * can be used without adjustment. + */ + ext_8f08 = 8, + ext_8f09, + ext_8f0a, + } ext; + enum { + rmw_NONE, + rmw_adc, + rmw_add, + rmw_and, + rmw_btc, + rmw_btr, + rmw_bts, + rmw_dec, + rmw_inc, + rmw_neg, + rmw_not, + rmw_or, + rmw_rcl, + rmw_rcr, + rmw_rol, + rmw_ror, + rmw_sar, + rmw_sbb, + rmw_shl, + rmw_shld, + rmw_shr, + rmw_shrd, + rmw_sub, + rmw_xadd, + rmw_xchg, + rmw_xor, + } rmw; + enum { + blk_NONE, + blk_enqcmd, +#ifndef X86EMUL_NO_FPU + blk_fld, /* FLDENV, FRSTOR */ + blk_fst, /* FNSTENV, FNSAVE */ +#endif +#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ + !defined(X86EMUL_NO_SIMD) + blk_fxrstor, + blk_fxsave, +#endif + blk_movdir, + } blk; + uint8_t modrm, modrm_mod, modrm_reg, modrm_rm; + uint8_t sib_index, sib_scale; + uint8_t rex_prefix; + bool lock_prefix; + bool not_64bit; /* Instruction not available in 64bit. */ + bool fpu_ctrl; /* Instruction is an FPU control one. */ + opcode_desc_t desc; + union vex vex; + union evex evex; + enum simd_opsize simd_size; + + /* + * Data operand effective address (usually computed from ModRM). + * Default is a memory operand relative to segment DS. + */ + struct operand ea; + + /* Immediate operand values, if any. Use otherwise unused fields. */ +#define imm1 ea.val +#define imm2 ea.orig_val + + unsigned long ip; + struct cpu_user_regs *regs; + +#ifndef NDEBUG + /* + * Track caller of x86_decode_insn() to spot missing as well as + * premature calls to x86_emulate_free_state(). + */ + void *caller; +#endif +}; + +/* + * Externally visible return codes from x86_emulate() are non-negative. + * Use negative values for internal state change indicators from helpers + * to the main function. + */ +#define X86EMUL_rdtsc (-1) + +/* + * These EFLAGS bits are restored from saved value during emulation, and + * any changes are written back to the saved value after emulation. + */ +#define EFLAGS_MASK (X86_EFLAGS_OF | X86_EFLAGS_SF | X86_EFLAGS_ZF | \ + X86_EFLAGS_AF | X86_EFLAGS_PF | X86_EFLAGS_CF) + +/* + * These EFLAGS bits are modifiable (by POPF and IRET), possibly subject + * to further CPL and IOPL constraints. + */ +#define EFLAGS_MODIFIABLE (X86_EFLAGS_ID | X86_EFLAGS_AC | X86_EFLAGS_RF | \ + X86_EFLAGS_NT | X86_EFLAGS_IOPL | X86_EFLAGS_DF | \ + X86_EFLAGS_IF | X86_EFLAGS_TF | EFLAGS_MASK) + +#define truncate_word(ea, byte_width) \ +({ unsigned long __ea = (ea); \ + unsigned int _width = (byte_width); \ + ((_width == sizeof(unsigned long)) ? __ea : \ + (__ea & ((1UL << (_width << 3)) - 1))); \ +}) +#define truncate_ea(ea) truncate_word((ea), ad_bytes) + +#define fail_if(p) \ +do { \ + rc = (p) ? X86EMUL_UNHANDLEABLE : X86EMUL_OKAY; \ + if ( rc ) goto done; \ +} while (0) + +#define EXPECT(p) \ +do { \ + if ( unlikely(!(p)) ) \ + { \ + ASSERT_UNREACHABLE(); \ + goto unhandleable; \ + } \ +} while (0) + +static inline int mkec(uint8_t e, int32_t ec, ...) +{ + return (e < 32 && ((1u << e) & X86_EXC_HAVE_EC)) ? ec : X86_EVENT_NO_EC; +} + +#define generate_exception_if(p, e, ec...) \ +({ if ( (p) ) { \ + x86_emul_hw_exception(e, mkec(e, ##ec, 0), ctxt); \ + rc = X86EMUL_EXCEPTION; \ + goto done; \ + } \ +}) + +#define generate_exception(e, ec...) generate_exception_if(true, e, ##ec) + +static inline bool +in_realmode( + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + unsigned long cr0; + int rc; + + if ( ops->read_cr == NULL ) + return 0; + + rc = ops->read_cr(0, &cr0, ctxt); + return (!rc && !(cr0 & X86_CR0_PE)); +} + +static inline bool +in_protmode( + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + return !(in_realmode(ctxt, ops) || (ctxt->regs->eflags & X86_EFLAGS_VM)); +} + +#define mode_ring0() ({ \ + int _cpl = x86emul_get_cpl(ctxt, ops); \ + fail_if(_cpl < 0); \ + (_cpl == 0); \ +}) + +#define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) +#define vcpu_has_sep() (ctxt->cpuid->basic.sep) +#define vcpu_has_cx8() (ctxt->cpuid->basic.cx8) +#define vcpu_has_cmov() (ctxt->cpuid->basic.cmov) +#define vcpu_has_clflush() (ctxt->cpuid->basic.clflush) +#define vcpu_has_mmx() (ctxt->cpuid->basic.mmx) +#define vcpu_has_fxsr() (ctxt->cpuid->basic.fxsr) +#define vcpu_has_sse() (ctxt->cpuid->basic.sse) +#define vcpu_has_sse2() (ctxt->cpuid->basic.sse2) +#define vcpu_has_sse3() (ctxt->cpuid->basic.sse3) +#define vcpu_has_pclmulqdq() (ctxt->cpuid->basic.pclmulqdq) +#define vcpu_has_ssse3() (ctxt->cpuid->basic.ssse3) +#define vcpu_has_fma() (ctxt->cpuid->basic.fma) +#define vcpu_has_cx16() (ctxt->cpuid->basic.cx16) +#define vcpu_has_sse4_1() (ctxt->cpuid->basic.sse4_1) +#define vcpu_has_sse4_2() (ctxt->cpuid->basic.sse4_2) +#define vcpu_has_movbe() (ctxt->cpuid->basic.movbe) +#define vcpu_has_popcnt() (ctxt->cpuid->basic.popcnt) +#define vcpu_has_aesni() (ctxt->cpuid->basic.aesni) +#define vcpu_has_avx() (ctxt->cpuid->basic.avx) +#define vcpu_has_f16c() (ctxt->cpuid->basic.f16c) +#define vcpu_has_rdrand() (ctxt->cpuid->basic.rdrand) + +#define vcpu_has_mmxext() (ctxt->cpuid->extd.mmxext || vcpu_has_sse()) +#define vcpu_has_3dnow_ext() (ctxt->cpuid->extd._3dnowext) +#define vcpu_has_3dnow() (ctxt->cpuid->extd._3dnow) +#define vcpu_has_lahf_lm() (ctxt->cpuid->extd.lahf_lm) +#define vcpu_has_cr8_legacy() (ctxt->cpuid->extd.cr8_legacy) +#define vcpu_has_lzcnt() (ctxt->cpuid->extd.abm) +#define vcpu_has_sse4a() (ctxt->cpuid->extd.sse4a) +#define vcpu_has_misalignsse() (ctxt->cpuid->extd.misalignsse) +#define vcpu_has_xop() (ctxt->cpuid->extd.xop) +#define vcpu_has_fma4() (ctxt->cpuid->extd.fma4) +#define vcpu_has_tbm() (ctxt->cpuid->extd.tbm) +#define vcpu_has_clzero() (ctxt->cpuid->extd.clzero) +#define vcpu_has_wbnoinvd() (ctxt->cpuid->extd.wbnoinvd) +#define vcpu_has_nscb() (ctxt->cpuid->extd.nscb) + +#define vcpu_has_bmi1() (ctxt->cpuid->feat.bmi1) +#define vcpu_has_hle() (ctxt->cpuid->feat.hle) +#define vcpu_has_avx2() (ctxt->cpuid->feat.avx2) +#define vcpu_has_bmi2() (ctxt->cpuid->feat.bmi2) +#define vcpu_has_invpcid() (ctxt->cpuid->feat.invpcid) +#define vcpu_has_rtm() (ctxt->cpuid->feat.rtm) +#define vcpu_has_mpx() (ctxt->cpuid->feat.mpx) +#define vcpu_has_avx512f() (ctxt->cpuid->feat.avx512f) +#define vcpu_has_avx512dq() (ctxt->cpuid->feat.avx512dq) +#define vcpu_has_rdseed() (ctxt->cpuid->feat.rdseed) +#define vcpu_has_adx() (ctxt->cpuid->feat.adx) +#define vcpu_has_smap() (ctxt->cpuid->feat.smap) +#define vcpu_has_avx512_ifma() (ctxt->cpuid->feat.avx512_ifma) +#define vcpu_has_clflushopt() (ctxt->cpuid->feat.clflushopt) +#define vcpu_has_clwb() (ctxt->cpuid->feat.clwb) +#define vcpu_has_avx512pf() (ctxt->cpuid->feat.avx512pf) +#define vcpu_has_avx512er() (ctxt->cpuid->feat.avx512er) +#define vcpu_has_avx512cd() (ctxt->cpuid->feat.avx512cd) +#define vcpu_has_sha() (ctxt->cpuid->feat.sha) +#define vcpu_has_avx512bw() (ctxt->cpuid->feat.avx512bw) +#define vcpu_has_avx512vl() (ctxt->cpuid->feat.avx512vl) +#define vcpu_has_avx512_vbmi() (ctxt->cpuid->feat.avx512_vbmi) +#define vcpu_has_avx512_vbmi2() (ctxt->cpuid->feat.avx512_vbmi2) +#define vcpu_has_gfni() (ctxt->cpuid->feat.gfni) +#define vcpu_has_vaes() (ctxt->cpuid->feat.vaes) +#define vcpu_has_vpclmulqdq() (ctxt->cpuid->feat.vpclmulqdq) +#define vcpu_has_avx512_vnni() (ctxt->cpuid->feat.avx512_vnni) +#define vcpu_has_avx512_bitalg() (ctxt->cpuid->feat.avx512_bitalg) +#define vcpu_has_avx512_vpopcntdq() (ctxt->cpuid->feat.avx512_vpopcntdq) +#define vcpu_has_rdpid() (ctxt->cpuid->feat.rdpid) +#define vcpu_has_movdiri() (ctxt->cpuid->feat.movdiri) +#define vcpu_has_movdir64b() (ctxt->cpuid->feat.movdir64b) +#define vcpu_has_enqcmd() (ctxt->cpuid->feat.enqcmd) +#define vcpu_has_avx512_4vnniw() (ctxt->cpuid->feat.avx512_4vnniw) +#define vcpu_has_avx512_4fmaps() (ctxt->cpuid->feat.avx512_4fmaps) +#define vcpu_has_avx512_vp2intersect() (ctxt->cpuid->feat.avx512_vp2intersect) +#define vcpu_has_serialize() (ctxt->cpuid->feat.serialize) +#define vcpu_has_tsxldtrk() (ctxt->cpuid->feat.tsxldtrk) +#define vcpu_has_avx_vnni() (ctxt->cpuid->feat.avx_vnni) +#define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16) + +#define vcpu_must_have(feat) \ + generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD) + +#ifdef __XEN__ +/* + * Note the difference between vcpu_must_have() and + * host_and_vcpu_must_have(): The latter needs to be used when + * emulation code is using the same instruction class for carrying out + * the actual operation. + */ +# define host_and_vcpu_must_have(feat) ({ \ + generate_exception_if(!cpu_has_##feat, X86_EXC_UD); \ + vcpu_must_have(feat); \ +}) +#else +/* + * For the test harness both are fine to be used interchangeably, i.e. + * features known to always be available (e.g. SSE/SSE2) to (64-bit) Xen + * may be checked for by just vcpu_must_have(). + */ +# define host_and_vcpu_must_have(feat) vcpu_must_have(feat) +#endif + +int x86emul_get_cpl(struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops); + +int x86emul_0f01(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops); + +static inline bool umip_active(struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + unsigned long cr4; + + /* Intentionally not using mode_ring0() here to avoid its fail_if(). */ + return x86emul_get_cpl(ctxt, ops) > 0 && + ops->read_cr && ops->read_cr(4, &cr4, ctxt) == X86EMUL_OKAY && + (cr4 & X86_CR4_UMIP); +} + +/* Compatibility function: read guest memory, zero-extend result to a ulong. */ +static inline int read_ulong(enum x86_segment seg, + unsigned long offset, + unsigned long *val, + unsigned int bytes, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + *val = 0; + return ops->read(seg, offset, val, bytes, ctxt); +} diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 94dd72585a..5f6749534c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -20,39 +20,7 @@ * along with this program; If not, see . */ -/* Operand sizes: 8-bit operands or specified/overridden size. */ -#define ByteOp (1<<0) /* 8-bit operands. */ -/* Destination operand type. */ -#define DstNone (0<<1) /* No destination operand. */ -#define DstImplicit (0<<1) /* Destination operand is implicit in the opcode. */ -#define DstBitBase (1<<1) /* Memory operand, bit string. */ -#define DstReg (2<<1) /* Register operand. */ -#define DstEax DstReg /* Register EAX (aka DstReg with no ModRM) */ -#define DstMem (3<<1) /* Memory operand. */ -#define DstMask (3<<1) -/* Source operand type. */ -#define SrcNone (0<<3) /* No source operand. */ -#define SrcImplicit (0<<3) /* Source operand is implicit in the opcode. */ -#define SrcReg (1<<3) /* Register operand. */ -#define SrcEax SrcReg /* Register EAX (aka SrcReg with no ModRM) */ -#define SrcMem (2<<3) /* Memory operand. */ -#define SrcMem16 (3<<3) /* Memory operand (16-bit). */ -#define SrcImm (4<<3) /* Immediate operand. */ -#define SrcImmByte (5<<3) /* 8-bit sign-extended immediate operand. */ -#define SrcImm16 (6<<3) /* 16-bit zero-extended immediate operand. */ -#define SrcMask (7<<3) -/* Generic ModRM decode. */ -#define ModRM (1<<6) -/* vSIB addressing mode (0f38 extension opcodes only), aliasing ModRM. */ -#define vSIB (1<<6) -/* Destination is only written; never read. */ -#define Mov (1<<7) -/* VEX/EVEX (SIMD only): 2nd source operand unused (must be all ones) */ -#define TwoOp Mov -/* All operands are implicit in the opcode. */ -#define ImplicitOps (DstImplicit|SrcImplicit) - -typedef uint8_t opcode_desc_t; +#include "private.h" static const opcode_desc_t opcode_table[256] = { /* 0x00 - 0x07 */ @@ -184,71 +152,6 @@ static const opcode_desc_t opcode_table[256] = { ImplicitOps, ImplicitOps, ByteOp|DstMem|SrcNone|ModRM, DstMem|SrcNone|ModRM }; -enum simd_opsize { - simd_none, - - /* - * Ordinary packed integers: - * - 64 bits without prefix 66 (MMX) - * - 128 bits with prefix 66 (SSEn) - * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) - */ - simd_packed_int, - - /* - * Ordinary packed/scalar floating point: - * - 128 bits without prefix or with prefix 66 (SSEn) - * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) - * - 32 bits with prefix F3 (scalar single) - * - 64 bits with prefix F2 (scalar doubgle) - */ - simd_any_fp, - - /* - * Packed floating point: - * - 128 bits without prefix or with prefix 66 (SSEn) - * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) - */ - simd_packed_fp, - - /* - * Single precision packed/scalar floating point: - * - 128 bits without prefix (SSEn) - * - 128/256/512 bits depending on VEX.L/EVEX.LR (AVX+) - * - 32 bits with prefix F3 (scalar) - */ - simd_single_fp, - - /* - * Scalar floating point: - * - 32 bits with low opcode bit clear (scalar single) - * - 64 bits with low opcode bit set (scalar double) - */ - simd_scalar_opc, - - /* - * Scalar floating point: - * - 32/64 bits depending on VEX.W/EVEX.W - */ - simd_scalar_vexw, - - /* - * 128 bits of integer or floating point data, with no further - * formatting information, or with it encoded by EVEX.W. - */ - simd_128, - - /* - * 256 bits of integer or floating point data, with formatting - * encoded by EVEX.W. - */ - simd_256, - - /* Operand size encoded in non-standard way. */ - simd_other -}; -typedef uint8_t simd_opsize_t; - enum disp8scale { /* Values 0 ... 4 are explicit sizes. */ d8s_bw = 5, @@ -670,45 +573,11 @@ static const struct ext8f09_table { [0xe1 ... 0xe3] = { .simd_size = simd_packed_int, .two_op = 1 }, }; -#define REX_PREFIX 0x40 -#define REX_B 0x01 -#define REX_X 0x02 -#define REX_R 0x04 -#define REX_W 0x08 - -#define vex_none 0 - -enum vex_opcx { - vex_0f = vex_none + 1, - vex_0f38, - vex_0f3a, -}; - -enum vex_pfx { - vex_66 = vex_none + 1, - vex_f3, - vex_f2 -}; - #define VEX_PREFIX_DOUBLE_MASK 0x1 #define VEX_PREFIX_SCALAR_MASK 0x2 static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; -union vex { - uint8_t raw[2]; - struct { /* SDM names */ - uint8_t opcx:5; /* mmmmm */ - uint8_t b:1; /* B */ - uint8_t x:1; /* X */ - uint8_t r:1; /* R */ - uint8_t pfx:2; /* pp */ - uint8_t l:1; /* L */ - uint8_t reg:4; /* vvvv */ - uint8_t w:1; /* W */ - }; -}; - #ifdef __x86_64__ # define PFX2 REX_PREFIX #else @@ -748,27 +617,6 @@ union vex { } \ } while (0) -union evex { - uint8_t raw[3]; - struct { /* SDM names */ - uint8_t opcx:2; /* mm */ - uint8_t mbz:2; - uint8_t R:1; /* R' */ - uint8_t b:1; /* B */ - uint8_t x:1; /* X */ - uint8_t r:1; /* R */ - uint8_t pfx:2; /* pp */ - uint8_t mbs:1; - uint8_t reg:4; /* vvvv */ - uint8_t w:1; /* W */ - uint8_t opmsk:3; /* aaa */ - uint8_t RX:1; /* V' */ - uint8_t brs:1; /* b */ - uint8_t lr:2; /* L'L */ - uint8_t z:1; /* z */ - }; -}; - #define EVEX_PFX_BYTES 4 #define init_evex(stub) ({ \ uint8_t *buf_ = get_stub(stub); \ @@ -789,118 +637,6 @@ union evex { #define repe_prefix() (vex.pfx == vex_f3) #define repne_prefix() (vex.pfx == vex_f2) -/* Type, address-of, and value of an instruction's operand. */ -struct operand { - enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type; - unsigned int bytes; - - /* Operand value. */ - unsigned long val; - - /* Original operand value. */ - unsigned long orig_val; - - /* OP_REG: Pointer to register field. */ - unsigned long *reg; - - /* OP_MEM: Segment and offset. */ - struct { - enum x86_segment seg; - unsigned long off; - } mem; -}; - -struct x86_emulate_state { - unsigned int op_bytes, ad_bytes; - - enum { - ext_none = vex_none, - ext_0f = vex_0f, - ext_0f38 = vex_0f38, - ext_0f3a = vex_0f3a, - /* - * For XOP use values such that the respective instruction field - * can be used without adjustment. - */ - ext_8f08 = 8, - ext_8f09, - ext_8f0a, - } ext; - enum { - rmw_NONE, - rmw_adc, - rmw_add, - rmw_and, - rmw_btc, - rmw_btr, - rmw_bts, - rmw_dec, - rmw_inc, - rmw_neg, - rmw_not, - rmw_or, - rmw_rcl, - rmw_rcr, - rmw_rol, - rmw_ror, - rmw_sar, - rmw_sbb, - rmw_shl, - rmw_shld, - rmw_shr, - rmw_shrd, - rmw_sub, - rmw_xadd, - rmw_xchg, - rmw_xor, - } rmw; - enum { - blk_NONE, - blk_enqcmd, -#ifndef X86EMUL_NO_FPU - blk_fld, /* FLDENV, FRSTOR */ - blk_fst, /* FNSTENV, FNSAVE */ -#endif -#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ - !defined(X86EMUL_NO_SIMD) - blk_fxrstor, - blk_fxsave, -#endif - blk_movdir, - } blk; - uint8_t modrm, modrm_mod, modrm_reg, modrm_rm; - uint8_t sib_index, sib_scale; - uint8_t rex_prefix; - bool lock_prefix; - bool not_64bit; /* Instruction not available in 64bit. */ - bool fpu_ctrl; /* Instruction is an FPU control one. */ - opcode_desc_t desc; - union vex vex; - union evex evex; - enum simd_opsize simd_size; - - /* - * Data operand effective address (usually computed from ModRM). - * Default is a memory operand relative to segment DS. - */ - struct operand ea; - - /* Immediate operand values, if any. Use otherwise unused fields. */ -#define imm1 ea.val -#define imm2 ea.orig_val - - unsigned long ip; - struct cpu_user_regs *regs; - -#ifndef NDEBUG - /* - * Track caller of x86_decode_insn() to spot missing as well as - * premature calls to x86_emulate_free_state(). - */ - void *caller; -#endif -}; - #ifdef __x86_64__ #define PTR_POISON ((void *)0x8086000000008086UL) /* non-canonical */ #else @@ -1049,21 +785,6 @@ struct x86_fxsr { #define _BYTES_PER_LONG "4" #endif -/* - * These EFLAGS bits are restored from saved value during emulation, and - * any changes are written back to the saved value after emulation. - */ -#define EFLAGS_MASK (X86_EFLAGS_OF | X86_EFLAGS_SF | X86_EFLAGS_ZF | \ - X86_EFLAGS_AF | X86_EFLAGS_PF | X86_EFLAGS_CF) - -/* - * These EFLAGS bits are modifiable (by POPF and IRET), possibly subject - * to further CPL and IOPL constraints. - */ -#define EFLAGS_MODIFIABLE (X86_EFLAGS_ID | X86_EFLAGS_AC | X86_EFLAGS_RF | \ - X86_EFLAGS_NT | X86_EFLAGS_IOPL | X86_EFLAGS_DF | \ - X86_EFLAGS_IF | X86_EFLAGS_TF | EFLAGS_MASK) - /* Before executing instruction: restore necessary bits in EFLAGS. */ #define _PRE_EFLAGS(_sav, _msk, _tmp) \ /* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \ @@ -1223,36 +944,6 @@ do{ asm volatile ( \ #define __emulate_1op_8byte(op, dst, eflags, extra...) #endif /* __i386__ */ -#define fail_if(p) \ -do { \ - rc = (p) ? X86EMUL_UNHANDLEABLE : X86EMUL_OKAY; \ - if ( rc ) goto done; \ -} while (0) - -#define EXPECT(p) \ -do { \ - if ( unlikely(!(p)) ) \ - { \ - ASSERT_UNREACHABLE(); \ - goto unhandleable; \ - } \ -} while (0) - -static inline int mkec(uint8_t e, int32_t ec, ...) -{ - return (e < 32 && ((1u << e) & EXC_HAS_EC)) ? ec : X86_EVENT_NO_EC; -} - -#define generate_exception_if(p, e, ec...) \ -({ if ( (p) ) { \ - x86_emul_hw_exception(e, mkec(e, ##ec, 0), ctxt); \ - rc = X86EMUL_EXCEPTION; \ - goto done; \ - } \ -}) - -#define generate_exception(e, ec...) generate_exception_if(true, e, ##ec) - #ifdef __XEN__ # define invoke_stub(pre, post, constraints...) do { \ stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \ @@ -1301,20 +992,6 @@ static inline int mkec(uint8_t e, int32_t ec, ...) }) #define insn_fetch_type(_type) ((_type)insn_fetch_bytes(sizeof(_type))) -#define truncate_word(ea, byte_width) \ -({ unsigned long __ea = (ea); \ - unsigned int _width = (byte_width); \ - ((_width == sizeof(unsigned long)) ? __ea : \ - (__ea & ((1UL << (_width << 3)) - 1))); \ -}) -#define truncate_ea(ea) truncate_word((ea), ad_bytes) - -#ifdef __x86_64__ -# define mode_64bit() (ctxt->addr_size == 64) -#else -# define mode_64bit() false -#endif - /* * Given byte has even parity (even number of 1s)? SDM Vol. 1 Sec. 3.4.3.1, * "Status Flags": EFLAGS.PF reflects parity of least-sig. byte of result only. @@ -1655,19 +1332,6 @@ static void __put_rep_prefix( ea__; \ }) -/* Compatibility function: read guest memory, zero-extend result to a ulong. */ -static int read_ulong( - enum x86_segment seg, - unsigned long offset, - unsigned long *val, - unsigned int bytes, - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - *val = 0; - return ops->read(seg, offset, val, bytes, ctxt); -} - /* * Unsigned multiplication with double-word result. * IN: Multiplicand=m[0], Multiplier=m[1] @@ -1792,10 +1456,8 @@ test_cc( return (!!rc ^ (condition & 1)); } -static int -get_cpl( - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) +int x86emul_get_cpl(struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) { struct segment_register reg; @@ -1814,17 +1476,12 @@ _mode_iopl( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - int cpl = get_cpl(ctxt, ops); + int cpl = x86emul_get_cpl(ctxt, ops); if ( cpl == -1 ) return -1; return cpl <= MASK_EXTR(ctxt->regs->eflags, X86_EFLAGS_IOPL); } -#define mode_ring0() ({ \ - int _cpl = get_cpl(ctxt, ops); \ - fail_if(_cpl < 0); \ - (_cpl == 0); \ -}) #define mode_iopl() ({ \ int _iopl = _mode_iopl(ctxt, ops); \ fail_if(_iopl < 0); \ @@ -1832,7 +1489,7 @@ _mode_iopl( }) #define mode_vif() ({ \ cr4 = 0; \ - if ( ops->read_cr && get_cpl(ctxt, ops) == 3 ) \ + if ( ops->read_cr && x86emul_get_cpl(ctxt, ops) == 3 ) \ { \ rc = ops->read_cr(4, &cr4, ctxt); \ if ( rc != X86EMUL_OKAY ) goto done; \ @@ -1899,29 +1556,6 @@ static int ioport_access_check( return rc; } -static bool -in_realmode( - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - unsigned long cr0; - int rc; - - if ( ops->read_cr == NULL ) - return 0; - - rc = ops->read_cr(0, &cr0, ctxt); - return (!rc && !(cr0 & X86_CR0_PE)); -} - -static bool -in_protmode( - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - return !(in_realmode(ctxt, ops) || (ctxt->regs->eflags & X86_EFLAGS_VM)); -} - static bool _amd_like(const struct cpuid_policy *cp) { @@ -1934,108 +1568,6 @@ amd_like(const struct x86_emulate_ctxt *ctxt) return _amd_like(ctxt->cpuid); } -#define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) -#define vcpu_has_sep() (ctxt->cpuid->basic.sep) -#define vcpu_has_cx8() (ctxt->cpuid->basic.cx8) -#define vcpu_has_cmov() (ctxt->cpuid->basic.cmov) -#define vcpu_has_clflush() (ctxt->cpuid->basic.clflush) -#define vcpu_has_mmx() (ctxt->cpuid->basic.mmx) -#define vcpu_has_fxsr() (ctxt->cpuid->basic.fxsr) -#define vcpu_has_sse() (ctxt->cpuid->basic.sse) -#define vcpu_has_sse2() (ctxt->cpuid->basic.sse2) -#define vcpu_has_sse3() (ctxt->cpuid->basic.sse3) -#define vcpu_has_pclmulqdq() (ctxt->cpuid->basic.pclmulqdq) -#define vcpu_has_ssse3() (ctxt->cpuid->basic.ssse3) -#define vcpu_has_fma() (ctxt->cpuid->basic.fma) -#define vcpu_has_cx16() (ctxt->cpuid->basic.cx16) -#define vcpu_has_sse4_1() (ctxt->cpuid->basic.sse4_1) -#define vcpu_has_sse4_2() (ctxt->cpuid->basic.sse4_2) -#define vcpu_has_movbe() (ctxt->cpuid->basic.movbe) -#define vcpu_has_popcnt() (ctxt->cpuid->basic.popcnt) -#define vcpu_has_aesni() (ctxt->cpuid->basic.aesni) -#define vcpu_has_avx() (ctxt->cpuid->basic.avx) -#define vcpu_has_f16c() (ctxt->cpuid->basic.f16c) -#define vcpu_has_rdrand() (ctxt->cpuid->basic.rdrand) - -#define vcpu_has_mmxext() (ctxt->cpuid->extd.mmxext || vcpu_has_sse()) -#define vcpu_has_3dnow_ext() (ctxt->cpuid->extd._3dnowext) -#define vcpu_has_3dnow() (ctxt->cpuid->extd._3dnow) -#define vcpu_has_lahf_lm() (ctxt->cpuid->extd.lahf_lm) -#define vcpu_has_cr8_legacy() (ctxt->cpuid->extd.cr8_legacy) -#define vcpu_has_lzcnt() (ctxt->cpuid->extd.abm) -#define vcpu_has_sse4a() (ctxt->cpuid->extd.sse4a) -#define vcpu_has_misalignsse() (ctxt->cpuid->extd.misalignsse) -#define vcpu_has_xop() (ctxt->cpuid->extd.xop) -#define vcpu_has_fma4() (ctxt->cpuid->extd.fma4) -#define vcpu_has_tbm() (ctxt->cpuid->extd.tbm) -#define vcpu_has_clzero() (ctxt->cpuid->extd.clzero) -#define vcpu_has_wbnoinvd() (ctxt->cpuid->extd.wbnoinvd) -#define vcpu_has_nscb() (ctxt->cpuid->extd.nscb) - -#define vcpu_has_bmi1() (ctxt->cpuid->feat.bmi1) -#define vcpu_has_hle() (ctxt->cpuid->feat.hle) -#define vcpu_has_avx2() (ctxt->cpuid->feat.avx2) -#define vcpu_has_bmi2() (ctxt->cpuid->feat.bmi2) -#define vcpu_has_invpcid() (ctxt->cpuid->feat.invpcid) -#define vcpu_has_rtm() (ctxt->cpuid->feat.rtm) -#define vcpu_has_mpx() (ctxt->cpuid->feat.mpx) -#define vcpu_has_avx512f() (ctxt->cpuid->feat.avx512f) -#define vcpu_has_avx512dq() (ctxt->cpuid->feat.avx512dq) -#define vcpu_has_rdseed() (ctxt->cpuid->feat.rdseed) -#define vcpu_has_adx() (ctxt->cpuid->feat.adx) -#define vcpu_has_smap() (ctxt->cpuid->feat.smap) -#define vcpu_has_avx512_ifma() (ctxt->cpuid->feat.avx512_ifma) -#define vcpu_has_clflushopt() (ctxt->cpuid->feat.clflushopt) -#define vcpu_has_clwb() (ctxt->cpuid->feat.clwb) -#define vcpu_has_avx512pf() (ctxt->cpuid->feat.avx512pf) -#define vcpu_has_avx512er() (ctxt->cpuid->feat.avx512er) -#define vcpu_has_avx512cd() (ctxt->cpuid->feat.avx512cd) -#define vcpu_has_sha() (ctxt->cpuid->feat.sha) -#define vcpu_has_avx512bw() (ctxt->cpuid->feat.avx512bw) -#define vcpu_has_avx512vl() (ctxt->cpuid->feat.avx512vl) -#define vcpu_has_avx512_vbmi() (ctxt->cpuid->feat.avx512_vbmi) -#define vcpu_has_avx512_vbmi2() (ctxt->cpuid->feat.avx512_vbmi2) -#define vcpu_has_gfni() (ctxt->cpuid->feat.gfni) -#define vcpu_has_vaes() (ctxt->cpuid->feat.vaes) -#define vcpu_has_vpclmulqdq() (ctxt->cpuid->feat.vpclmulqdq) -#define vcpu_has_avx512_vnni() (ctxt->cpuid->feat.avx512_vnni) -#define vcpu_has_avx512_bitalg() (ctxt->cpuid->feat.avx512_bitalg) -#define vcpu_has_avx512_vpopcntdq() (ctxt->cpuid->feat.avx512_vpopcntdq) -#define vcpu_has_rdpid() (ctxt->cpuid->feat.rdpid) -#define vcpu_has_movdiri() (ctxt->cpuid->feat.movdiri) -#define vcpu_has_movdir64b() (ctxt->cpuid->feat.movdir64b) -#define vcpu_has_enqcmd() (ctxt->cpuid->feat.enqcmd) -#define vcpu_has_avx512_4vnniw() (ctxt->cpuid->feat.avx512_4vnniw) -#define vcpu_has_avx512_4fmaps() (ctxt->cpuid->feat.avx512_4fmaps) -#define vcpu_has_avx512_vp2intersect() (ctxt->cpuid->feat.avx512_vp2intersect) -#define vcpu_has_serialize() (ctxt->cpuid->feat.serialize) -#define vcpu_has_tsxldtrk() (ctxt->cpuid->feat.tsxldtrk) -#define vcpu_has_avx_vnni() (ctxt->cpuid->feat.avx_vnni) -#define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16) - -#define vcpu_must_have(feat) \ - generate_exception_if(!vcpu_has_##feat(), EXC_UD) - -#ifdef __XEN__ -/* - * Note the difference between vcpu_must_have() and - * host_and_vcpu_must_have(): The latter needs to be used when - * emulation code is using the same instruction class for carrying out - * the actual operation. - */ -#define host_and_vcpu_must_have(feat) ({ \ - generate_exception_if(!cpu_has_##feat, EXC_UD); \ - vcpu_must_have(feat); \ -}) -#else -/* - * For the test harness both are fine to be used interchangeably, i.e. - * features known to always be available (e.g. SSE/SSE2) to (64-bit) Xen - * may be checked for by just vcpu_must_have(). - */ -#define host_and_vcpu_must_have(feat) vcpu_must_have(feat) -#endif - /* Initialise output state in x86_emulate_ctxt */ static void init_context(struct x86_emulate_ctxt *ctxt) { @@ -2082,7 +1614,7 @@ protmode_load_seg( enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; - int cpl = get_cpl(ctxt, ops); + int cpl = x86emul_get_cpl(ctxt, ops); uint32_t a_flag = 0x100; int rc, fault_type = EXC_GP; @@ -2482,17 +2014,6 @@ static bool is_branch_step(struct x86_emulate_ctxt *ctxt, (debugctl & IA32_DEBUGCTLMSR_BTF); } -static bool umip_active(struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - unsigned long cr4; - - /* Intentionally not using mode_ring0() here to avoid its fail_if(). */ - return get_cpl(ctxt, ops) > 0 && - ops->read_cr && ops->read_cr(4, &cr4, ctxt) == X86EMUL_OKAY && - (cr4 & X86_CR4_UMIP); -} - static void adjust_bnd(struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops, enum vex_pfx pfx) { @@ -5706,317 +5227,8 @@ x86_emulate( break; case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */ - { - unsigned long base, limit, cr0, cr0w; - - seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr; - - switch( modrm ) - { - case 0xca: /* clac */ - case 0xcb: /* stac */ - vcpu_must_have(smap); - generate_exception_if(vex.pfx || !mode_ring0(), EXC_UD); - - _regs.eflags &= ~X86_EFLAGS_AC; - if ( modrm == 0xcb ) - _regs.eflags |= X86_EFLAGS_AC; - break; - - case 0xd0: /* xgetbv */ - generate_exception_if(vex.pfx, EXC_UD); - if ( !ops->read_cr || !ops->read_xcr || - ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) - cr4 = 0; - generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD); - rc = ops->read_xcr(_regs.ecx, &msr_val, ctxt); - if ( rc != X86EMUL_OKAY ) - goto done; - _regs.r(ax) = (uint32_t)msr_val; - _regs.r(dx) = msr_val >> 32; - break; - - case 0xd1: /* xsetbv */ - generate_exception_if(vex.pfx, EXC_UD); - if ( !ops->read_cr || !ops->write_xcr || - ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) - cr4 = 0; - generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - rc = ops->write_xcr(_regs.ecx, - _regs.eax | ((uint64_t)_regs.edx << 32), ctxt); - if ( rc != X86EMUL_OKAY ) - goto done; - break; - - case 0xd4: /* vmfunc */ - generate_exception_if(vex.pfx, EXC_UD); - fail_if(!ops->vmfunc); - if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY ) - goto done; - break; - - case 0xd5: /* xend */ - generate_exception_if(vex.pfx, EXC_UD); - generate_exception_if(!vcpu_has_rtm(), EXC_UD); - generate_exception_if(vcpu_has_rtm(), EXC_GP, 0); - break; - - case 0xd6: /* xtest */ - generate_exception_if(vex.pfx, EXC_UD); - generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(), - EXC_UD); - /* Neither HLE nor RTM can be active when we get here. */ - _regs.eflags |= X86_EFLAGS_ZF; - break; - - case 0xdf: /* invlpga */ - fail_if(!ops->read_msr); - if ( (rc = ops->read_msr(MSR_EFER, - &msr_val, ctxt)) != X86EMUL_OKAY ) - goto done; - /* Finding SVME set implies vcpu_has_svm(). */ - generate_exception_if(!(msr_val & EFER_SVME) || - !in_protmode(ctxt, ops), EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - fail_if(!ops->tlb_op); - if ( (rc = ops->tlb_op(x86emul_invlpga, truncate_ea(_regs.r(ax)), - _regs.ecx, ctxt)) != X86EMUL_OKAY ) - goto done; - break; - - case 0xe8: - switch ( vex.pfx ) - { - case vex_none: /* serialize */ - host_and_vcpu_must_have(serialize); - asm volatile ( ".byte 0x0f, 0x01, 0xe8" ); - break; - case vex_f2: /* xsusldtrk */ - vcpu_must_have(tsxldtrk); - /* - * We're never in a transactional region when coming here - * - nothing else to do. - */ - break; - default: - goto unimplemented_insn; - } - break; - - case 0xe9: - switch ( vex.pfx ) - { - case vex_f2: /* xresldtrk */ - vcpu_must_have(tsxldtrk); - /* - * We're never in a transactional region when coming here - * - nothing else to do. - */ - break; - default: - goto unimplemented_insn; - } - break; - - case 0xee: - switch ( vex.pfx ) - { - case vex_none: /* rdpkru */ - if ( !ops->read_cr || - ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) - cr4 = 0; - generate_exception_if(!(cr4 & X86_CR4_PKE), EXC_UD); - generate_exception_if(_regs.ecx, EXC_GP, 0); - _regs.r(ax) = rdpkru(); - _regs.r(dx) = 0; - break; - default: - goto unimplemented_insn; - } - break; - - case 0xef: - switch ( vex.pfx ) - { - case vex_none: /* wrpkru */ - if ( !ops->read_cr || - ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) - cr4 = 0; - generate_exception_if(!(cr4 & X86_CR4_PKE), EXC_UD); - generate_exception_if(_regs.ecx | _regs.edx, EXC_GP, 0); - wrpkru(_regs.eax); - break; - default: - goto unimplemented_insn; - } - break; - - case 0xf8: /* swapgs */ - generate_exception_if(!mode_64bit(), EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - fail_if(!ops->read_segment || !ops->read_msr || - !ops->write_segment || !ops->write_msr); - if ( (rc = ops->read_segment(x86_seg_gs, &sreg, - ctxt)) != X86EMUL_OKAY || - (rc = ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, - ctxt)) != X86EMUL_OKAY || - (rc = ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, - ctxt)) != X86EMUL_OKAY ) - goto done; - sreg.base = msr_val; - if ( (rc = ops->write_segment(x86_seg_gs, &sreg, - ctxt)) != X86EMUL_OKAY ) - { - /* Best effort unwind (i.e. no error checking). */ - ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, ctxt); - goto done; - } - break; - - case 0xf9: /* rdtscp */ - fail_if(ops->read_msr == NULL); - if ( (rc = ops->read_msr(MSR_TSC_AUX, - &msr_val, ctxt)) != X86EMUL_OKAY ) - goto done; - _regs.r(cx) = (uint32_t)msr_val; - goto rdtsc; - - case 0xfc: /* clzero */ - { - unsigned long zero = 0; - - vcpu_must_have(clzero); - - base = ad_bytes == 8 ? _regs.r(ax) : - ad_bytes == 4 ? _regs.eax : _regs.ax; - limit = ctxt->cpuid->basic.clflush_size * 8; - generate_exception_if(limit < sizeof(long) || - (limit & (limit - 1)), EXC_UD); - base &= ~(limit - 1); - if ( ops->rep_stos ) - { - unsigned long nr_reps = limit / sizeof(zero); - - rc = ops->rep_stos(&zero, ea.mem.seg, base, sizeof(zero), - &nr_reps, ctxt); - if ( rc == X86EMUL_OKAY ) - { - base += nr_reps * sizeof(zero); - limit -= nr_reps * sizeof(zero); - } - else if ( rc != X86EMUL_UNHANDLEABLE ) - goto done; - } - fail_if(limit && !ops->write); - while ( limit ) - { - rc = ops->write(ea.mem.seg, base, &zero, sizeof(zero), ctxt); - if ( rc != X86EMUL_OKAY ) - goto done; - base += sizeof(zero); - limit -= sizeof(zero); - } - break; - } - -#define _GRP7(mod, reg) \ - (((mod) << 6) | ((reg) << 3)) ... (((mod) << 6) | ((reg) << 3) | 7) -#define GRP7_MEM(reg) _GRP7(0, reg): case _GRP7(1, reg): case _GRP7(2, reg) -#define GRP7_ALL(reg) GRP7_MEM(reg): case _GRP7(3, reg) - - case GRP7_MEM(0): /* sgdt */ - case GRP7_MEM(1): /* sidt */ - ASSERT(ea.type == OP_MEM); - generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0); - fail_if(!ops->read_segment || !ops->write); - if ( (rc = ops->read_segment(seg, &sreg, ctxt)) ) - goto done; - if ( mode_64bit() ) - op_bytes = 8; - else if ( op_bytes == 2 ) - { - sreg.base &= 0xffffff; - op_bytes = 4; - } - if ( (rc = ops->write(ea.mem.seg, ea.mem.off, &sreg.limit, - 2, ctxt)) != X86EMUL_OKAY || - (rc = ops->write(ea.mem.seg, truncate_ea(ea.mem.off + 2), - &sreg.base, op_bytes, ctxt)) != X86EMUL_OKAY ) - goto done; - break; - - case GRP7_MEM(2): /* lgdt */ - case GRP7_MEM(3): /* lidt */ - ASSERT(ea.type == OP_MEM); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - fail_if(ops->write_segment == NULL); - memset(&sreg, 0, sizeof(sreg)); - if ( (rc = read_ulong(ea.mem.seg, ea.mem.off, - &limit, 2, ctxt, ops)) || - (rc = read_ulong(ea.mem.seg, truncate_ea(ea.mem.off + 2), - &base, mode_64bit() ? 8 : 4, ctxt, ops)) ) - goto done; - generate_exception_if(!is_canonical_address(base), EXC_GP, 0); - sreg.base = base; - sreg.limit = limit; - if ( !mode_64bit() && op_bytes == 2 ) - sreg.base &= 0xffffff; - if ( (rc = ops->write_segment(seg, &sreg, ctxt)) ) - goto done; - break; - - case GRP7_ALL(4): /* smsw */ - generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0); - if ( ea.type == OP_MEM ) - { - fail_if(!ops->write); - d |= Mov; /* force writeback */ - ea.bytes = 2; - } - else - ea.bytes = op_bytes; - dst = ea; - fail_if(ops->read_cr == NULL); - if ( (rc = ops->read_cr(0, &dst.val, ctxt)) ) - goto done; - break; - - case GRP7_ALL(6): /* lmsw */ - fail_if(ops->read_cr == NULL); - fail_if(ops->write_cr == NULL); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - if ( (rc = ops->read_cr(0, &cr0, ctxt)) ) - goto done; - if ( ea.type == OP_REG ) - cr0w = *ea.reg; - else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off, - &cr0w, 2, ctxt, ops)) ) - goto done; - /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */ - cr0 = (cr0 & ~0xe) | (cr0w & 0xf); - if ( (rc = ops->write_cr(0, cr0, ctxt)) ) - goto done; - break; - - case GRP7_MEM(7): /* invlpg */ - ASSERT(ea.type == OP_MEM); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - fail_if(!ops->tlb_op); - if ( (rc = ops->tlb_op(x86emul_invlpg, ea.mem.off, ea.mem.seg, - ctxt)) != X86EMUL_OKAY ) - goto done; - break; - -#undef GRP7_ALL -#undef GRP7_MEM -#undef _GRP7 - - default: - goto unimplemented_insn; - } - break; - } + rc = x86emul_0f01(state, &_regs, &dst, ctxt, ops); + goto dispatch_from_helper; case X86EMUL_OPC(0x0f, 0x02): /* lar */ generate_exception_if(!in_protmode(ctxt, ops), EXC_UD); @@ -11337,6 +10549,24 @@ x86_emulate( unrecognized_insn: rc = X86EMUL_UNRECOGNIZED; goto done; + + dispatch_from_helper: + if ( rc == X86EMUL_OKAY ) + break; + + switch ( rc ) + { + case X86EMUL_rdtsc: + goto rdtsc; + } + + /* Internally used state change indicators may not make it here. */ + if ( rc < 0 ) + { + ASSERT_UNREACHABLE(); + rc = X86EMUL_UNHANDLEABLE; + } + goto done; } if ( state->rmw ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517628.803245 (Exim 4.92) (envelope-from ) id 1pjY0n-0003i2-NV; Tue, 04 Apr 2023 04:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517628.803245; Tue, 04 Apr 2023 04:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0n-0003hv-Ko; Tue, 04 Apr 2023 04:11:13 +0000 Received: by outflank-mailman (input) for mailman id 517628; Tue, 04 Apr 2023 04:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0m-0003gb-MU for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0m-00068U-LP for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY0m-0007R5-Jh for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=y+tgm/esdMWSoCwhvn1r0dGJ2vwqdNENL0ciGHGzjsY=; b=mvS22EisuqXc9LCPJkp2XxUFpP sg7WXpYALGNtfLhfJQfSxntuEQ3NhHv+mrNVArH9H+sPV71UF+EE8VmmGmjR40lLDR0Dgxk6SlorV L6hhFacI94fRRJFdBGd0FWVQW7FGkikGgap2Wh4qoctabs+1jgoDkHqw7Pl9aDV3oHqU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: split off opcode 0fae handling Message-Id: Date: Tue, 04 Apr 2023 04:11:12 +0000 commit 3e957de632532dc287ae4cd356fd8d7882d4f233 Author: Jan Beulich AuthorDate: Mon Apr 3 12:42:44 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:42:44 2023 +0200 x86emul: split off opcode 0fae handling There's a fair amount of sub-cases (with some yet to be implemented), so a separate function seems warranted. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- xen/arch/x86/x86_emulate/0fae.c | 222 ++++++++++++++++++++++++ xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/private.h | 77 +++++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 249 ++------------------------- 6 files changed, 315 insertions(+), 238 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 08c96c1615..22eb035a64 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -32,7 +32,7 @@ GCOV_FLAGS := --coverage $(CC) -c $(CFLAGS) $(GCOV_FLAGS) $< -o $@ OBJS := fuzz-emul.o x86-emulate.o -OBJS += x86_emulate/0f01.o +OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86-emulate.h: x86_emulate/x86_emulate.h x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 72134564f8..5663a305eb 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -251,7 +251,7 @@ xop.h avx512f.h: simd-fma.c endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o -OBJS += x86_emulate/0f01.o +OBJS += x86_emulate/0f01.o x86_emulate/0fae.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/xen/arch/x86/x86_emulate/0fae.c b/xen/arch/x86/x86_emulate/0fae.c new file mode 100644 index 0000000000..db5f419671 --- /dev/null +++ b/xen/arch/x86/x86_emulate/0fae.c @@ -0,0 +1,222 @@ +/****************************************************************************** + * 0fae.c - helper for x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#if defined(__XEN__) && \ + (!defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ + !defined(X86EMUL_NO_SIMD)) +# include +#endif + +int x86emul_0fae(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + const struct operand *src, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + enum x86_emulate_fpu_type *fpu_type) +#define fpu_type (*fpu_type) /* for get_fpu() */ +{ + unsigned long cr4; + int rc; + + if ( !s->vex.opcx && (!s->vex.pfx || s->vex.pfx == vex_66) ) + { + switch ( s->modrm_reg & 7 ) + { +#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ + !defined(X86EMUL_NO_SIMD) + case 0: /* fxsave */ + case 1: /* fxrstor */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(fxsr); + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + generate_exception_if(!is_aligned(s->ea.mem.seg, s->ea.mem.off, 16, + ctxt, ops), + X86_EXC_GP, 0); + fail_if(!ops->blk); + s->op_bytes = +#ifdef __x86_64__ + !mode_64bit() ? offsetof(struct x86_fxsr, xmm[8]) : +#endif + sizeof(struct x86_fxsr); + if ( amd_like(ctxt) ) + { + uint64_t msr_val; + + /* Assume "normal" operation in case of missing hooks. */ + if ( !ops->read_cr || + ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) + cr4 = X86_CR4_OSFXSR; + if ( !ops->read_msr || + ops->read_msr(MSR_EFER, &msr_val, ctxt) != X86EMUL_OKAY ) + msr_val = 0; + if ( !(cr4 & X86_CR4_OSFXSR) || + (mode_64bit() && mode_ring0() && (msr_val & EFER_FFXSE)) ) + s->op_bytes = offsetof(struct x86_fxsr, xmm[0]); + } + /* + * This could also be X86EMUL_FPU_mmx, but it shouldn't be + * X86EMUL_FPU_xmm, as we don't want CR4.OSFXSR checked. + */ + get_fpu(X86EMUL_FPU_fpu); + s->fpu_ctrl = true; + s->blk = s->modrm_reg & 1 ? blk_fxrstor : blk_fxsave; + if ( (rc = ops->blk(s->ea.mem.seg, s->ea.mem.off, NULL, + sizeof(struct x86_fxsr), ®s->eflags, + s, ctxt)) != X86EMUL_OKAY ) + goto done; + break; +#endif /* X86EMUL_NO_{FPU,MMX,SIMD} */ + +#ifndef X86EMUL_NO_SIMD + case 2: /* ldmxcsr */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(sse); + ldmxcsr: + generate_exception_if(src->type != OP_MEM, X86_EXC_UD); + get_fpu(s->vex.opcx ? X86EMUL_FPU_ymm : X86EMUL_FPU_xmm); + generate_exception_if(src->val & ~mxcsr_mask, X86_EXC_GP, 0); + asm volatile ( "ldmxcsr %0" :: "m" (src->val) ); + break; + + case 3: /* stmxcsr */ + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(sse); + stmxcsr: + generate_exception_if(dst->type != OP_MEM, X86_EXC_UD); + get_fpu(s->vex.opcx ? X86EMUL_FPU_ymm : X86EMUL_FPU_xmm); + asm volatile ( "stmxcsr %0" : "=m" (dst->val) ); + break; +#endif /* X86EMUL_NO_SIMD */ + + case 5: /* lfence */ + fail_if(s->modrm_mod != 3); + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(sse2); + asm volatile ( "lfence" ::: "memory" ); + break; + case 6: + if ( s->modrm_mod == 3 ) /* mfence */ + { + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(sse2); + asm volatile ( "mfence" ::: "memory" ); + break; + } + /* else clwb */ + fail_if(!s->vex.pfx); + vcpu_must_have(clwb); + fail_if(!ops->cache_op); + if ( (rc = ops->cache_op(x86emul_clwb, s->ea.mem.seg, s->ea.mem.off, + ctxt)) != X86EMUL_OKAY ) + goto done; + break; + case 7: + if ( s->modrm_mod == 3 ) /* sfence */ + { + generate_exception_if(s->vex.pfx, X86_EXC_UD); + vcpu_must_have(mmxext); + asm volatile ( "sfence" ::: "memory" ); + break; + } + /* else clflush{,opt} */ + if ( !s->vex.pfx ) + vcpu_must_have(clflush); + else + vcpu_must_have(clflushopt); + fail_if(!ops->cache_op); + if ( (rc = ops->cache_op(s->vex.pfx ? x86emul_clflushopt + : x86emul_clflush, + s->ea.mem.seg, s->ea.mem.off, + ctxt)) != X86EMUL_OKAY ) + goto done; + break; + default: + return X86EMUL_UNIMPLEMENTED; + } + } +#ifndef X86EMUL_NO_SIMD + else if ( s->vex.opcx && !s->vex.pfx ) + { + switch ( s->modrm_reg & 7 ) + { + case 2: /* vldmxcsr */ + generate_exception_if(s->vex.l || s->vex.reg != 0xf, X86_EXC_UD); + vcpu_must_have(avx); + goto ldmxcsr; + case 3: /* vstmxcsr */ + generate_exception_if(s->vex.l || s->vex.reg != 0xf, X86_EXC_UD); + vcpu_must_have(avx); + goto stmxcsr; + } + return X86EMUL_UNRECOGNIZED; + } +#endif /* !X86EMUL_NO_SIMD */ + else if ( !s->vex.opcx && s->vex.pfx == vex_f3 ) + { + enum x86_segment seg; + struct segment_register sreg; + + fail_if(s->modrm_mod != 3); + generate_exception_if((s->modrm_reg & 4) || !mode_64bit(), X86_EXC_UD); + fail_if(!ops->read_cr); + if ( (rc = ops->read_cr(4, &cr4, ctxt)) != X86EMUL_OKAY ) + goto done; + generate_exception_if(!(cr4 & X86_CR4_FSGSBASE), X86_EXC_UD); + seg = s->modrm_reg & 1 ? x86_seg_gs : x86_seg_fs; + fail_if(!ops->read_segment); + if ( (rc = ops->read_segment(seg, &sreg, ctxt)) != X86EMUL_OKAY ) + goto done; + dst->reg = decode_gpr(regs, s->modrm_rm); + if ( !(s->modrm_reg & 2) ) + { + /* rd{f,g}sbase */ + dst->type = OP_REG; + dst->bytes = (s->op_bytes == 8) ? 8 : 4; + dst->val = sreg.base; + } + else + { + /* wr{f,g}sbase */ + if ( s->op_bytes == 8 ) + { + sreg.base = *dst->reg; + generate_exception_if(!is_canonical_address(sreg.base), + X86_EXC_GP, 0); + } + else + sreg.base = (uint32_t)*dst->reg; + fail_if(!ops->write_segment); + if ( (rc = ops->write_segment(seg, &sreg, ctxt)) != X86EMUL_OKAY ) + goto done; + } + } + else + { + ASSERT_UNREACHABLE(); + return X86EMUL_UNRECOGNIZED; + } + + rc = X86EMUL_OKAY; + + done: + return rc; +} diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index 36d75f84bd..40336c071c 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -1 +1,2 @@ obj-y += 0f01.o +obj-y += 0fae.o diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 7907f30122..b571ec2d66 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -22,6 +22,7 @@ # include # include +# include # include # ifndef CONFIG_HVM @@ -308,6 +309,29 @@ struct x86_emulate_state { #endif }; +struct x86_fxsr { + uint16_t fcw; + uint16_t fsw; + uint8_t ftw, :8; + uint16_t fop; + union { + struct { + uint32_t offs; + uint16_t sel, :16; + }; + uint64_t addr; + } fip, fdp; + uint32_t mxcsr; + uint32_t mxcsr_mask; + struct { + uint8_t data[10]; + uint16_t :16, :16, :16; + } fpreg[8]; + uint64_t __attribute__ ((aligned(16))) xmm[16][2]; + uint64_t rsvd[6]; + uint64_t avl[6]; +}; + /* * Externally visible return codes from x86_emulate() are non-negative. * Use negative values for internal state change indicators from helpers @@ -397,6 +421,18 @@ in_protmode( (_cpl == 0); \ }) +static inline bool +_amd_like(const struct cpuid_policy *cp) +{ + return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); +} + +static inline bool +amd_like(const struct x86_emulate_ctxt *ctxt) +{ + return _amd_like(ctxt->cpuid); +} + #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) #define vcpu_has_sep() (ctxt->cpuid->basic.sep) #define vcpu_has_cx8() (ctxt->cpuid->basic.cx8) @@ -502,11 +538,52 @@ in_protmode( int x86emul_get_cpl(struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops); +int x86emul_get_fpu(enum x86_emulate_fpu_type type, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops); + +#define get_fpu(type) \ +do { \ + rc = x86emul_get_fpu(fpu_type = (type), ctxt, ops); \ + if ( rc ) goto done; \ +} while (0) + int x86emul_0f01(struct x86_emulate_state *s, struct cpu_user_regs *regs, struct operand *dst, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops); +int x86emul_0fae(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + const struct operand *src, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + enum x86_emulate_fpu_type *fpu_type); + +static inline bool is_aligned(enum x86_segment seg, unsigned long offs, + unsigned int size, struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + struct segment_register reg; + + /* Expecting powers of two only. */ + ASSERT(!(size & (size - 1))); + + if ( mode_64bit() && seg < x86_seg_fs ) + memset(®, 0, sizeof(reg)); + else + { + /* No alignment checking when we have no way to read segment data. */ + if ( !ops->read_segment ) + return true; + + if ( ops->read_segment(seg, ®, ctxt) != X86EMUL_OKAY ) + return false; + } + + return !((reg.base + offs) & (size - 1)); +} static inline bool umip_active(struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 5f6749534c..20d27765f2 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -695,29 +695,6 @@ typedef union { uint32_t data32[16]; } mmval_t; -struct x86_fxsr { - uint16_t fcw; - uint16_t fsw; - uint8_t ftw, :8; - uint16_t fop; - union { - struct { - uint32_t offs; - uint16_t sel, :16; - }; - uint64_t addr; - } fip, fdp; - uint32_t mxcsr; - uint32_t mxcsr_mask; - struct { - uint8_t data[10]; - uint16_t :16, :16, :16; - } fpreg[8]; - uint64_t __attribute__ ((aligned(16))) xmm[16][2]; - uint64_t rsvd[6]; - uint64_t avl[6]; -}; - /* * While proper alignment gets specified above, this doesn't get honored by * the compiler for automatic variables. Use this helper to instantiate a @@ -1063,7 +1040,7 @@ do { \ ops->write_segment(x86_seg_cs, cs, ctxt); \ }) -static int _get_fpu( +int x86emul_get_fpu( enum x86_emulate_fpu_type type, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) @@ -1102,7 +1079,7 @@ static int _get_fpu( break; } - rc = ops->get_fpu(type, ctxt); + rc = (ops->get_fpu)(type, ctxt); if ( rc == X86EMUL_OKAY ) { @@ -1146,12 +1123,6 @@ static int _get_fpu( return rc; } -#define get_fpu(type) \ -do { \ - rc = _get_fpu(fpu_type = (type), ctxt, ops); \ - if ( rc ) goto done; \ -} while (0) - static void put_fpu( enum x86_emulate_fpu_type type, bool failed_late, @@ -1556,18 +1527,6 @@ static int ioport_access_check( return rc; } -static bool -_amd_like(const struct cpuid_policy *cp) -{ - return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); -} - -static bool -amd_like(const struct x86_emulate_ctxt *ctxt) -{ - return _amd_like(ctxt->cpuid); -} - /* Initialise output state in x86_emulate_ctxt */ static void init_context(struct x86_emulate_ctxt *ctxt) { @@ -1980,30 +1939,6 @@ static unsigned int decode_disp8scale(enum disp8scale scale, } \ } while ( false ) -static bool is_aligned(enum x86_segment seg, unsigned long offs, - unsigned int size, struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - struct segment_register reg; - - /* Expecting powers of two only. */ - ASSERT(!(size & (size - 1))); - - if ( mode_64bit() && seg < x86_seg_fs ) - memset(®, 0, sizeof(reg)); - else - { - /* No alignment checking when we have no way to read segment data. */ - if ( !ops->read_segment ) - return true; - - if ( ops->read_segment(seg, ®, ctxt) != X86EMUL_OKAY ) - return false; - } - - return !((reg.base + offs) & (size - 1)); -} - static bool is_branch_step(struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { @@ -3346,7 +3281,8 @@ x86_emulate( #ifndef X86EMUL_NO_SIMD /* With a memory operand, fetch the mask register in use (if any). */ if ( ea.type == OP_MEM && evex.opmsk && - _get_fpu(fpu_type = X86EMUL_FPU_opmask, ctxt, ops) == X86EMUL_OKAY ) + x86emul_get_fpu(fpu_type = X86EMUL_FPU_opmask, + ctxt, ops) == X86EMUL_OKAY ) { uint8_t *stb = get_stub(stub); @@ -3369,7 +3305,7 @@ x86_emulate( if ( fpu_type == X86EMUL_FPU_opmask ) { - /* Squash (side) effects of the _get_fpu() above. */ + /* Squash (side) effects of the x86emul_get_fpu() above. */ x86_emul_reset_event(ctxt); put_fpu(X86EMUL_FPU_opmask, false, state, ctxt, ops); fpu_type = X86EMUL_FPU_none; @@ -7435,173 +7371,14 @@ x86_emulate( emulate_2op_SrcV_nobyte("bts", src, dst, _regs.eflags); break; - case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15 */ - switch ( modrm_reg & 7 ) - { -#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ - !defined(X86EMUL_NO_SIMD) - case 0: /* fxsave */ - case 1: /* fxrstor */ - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(fxsr); - generate_exception_if(ea.type != OP_MEM, EXC_UD); - generate_exception_if(!is_aligned(ea.mem.seg, ea.mem.off, 16, - ctxt, ops), - EXC_GP, 0); - fail_if(!ops->blk); - op_bytes = -#ifdef __x86_64__ - !mode_64bit() ? offsetof(struct x86_fxsr, xmm[8]) : -#endif - sizeof(struct x86_fxsr); - if ( amd_like(ctxt) ) - { - /* Assume "normal" operation in case of missing hooks. */ - if ( !ops->read_cr || - ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) - cr4 = X86_CR4_OSFXSR; - if ( !ops->read_msr || - ops->read_msr(MSR_EFER, &msr_val, ctxt) != X86EMUL_OKAY ) - msr_val = 0; - if ( !(cr4 & X86_CR4_OSFXSR) || - (mode_64bit() && mode_ring0() && (msr_val & EFER_FFXSE)) ) - op_bytes = offsetof(struct x86_fxsr, xmm[0]); - } - /* - * This could also be X86EMUL_FPU_mmx, but it shouldn't be - * X86EMUL_FPU_xmm, as we don't want CR4.OSFXSR checked. - */ - get_fpu(X86EMUL_FPU_fpu); - state->fpu_ctrl = true; - state->blk = modrm_reg & 1 ? blk_fxrstor : blk_fxsave; - if ( (rc = ops->blk(ea.mem.seg, ea.mem.off, NULL, - sizeof(struct x86_fxsr), &_regs.eflags, - state, ctxt)) != X86EMUL_OKAY ) - goto done; - break; -#endif /* X86EMUL_NO_{FPU,MMX,SIMD} */ - -#ifndef X86EMUL_NO_SIMD - case 2: /* ldmxcsr */ - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(sse); - ldmxcsr: - generate_exception_if(src.type != OP_MEM, EXC_UD); - get_fpu(vex.opcx ? X86EMUL_FPU_ymm : X86EMUL_FPU_xmm); - generate_exception_if(src.val & ~mxcsr_mask, EXC_GP, 0); - asm volatile ( "ldmxcsr %0" :: "m" (src.val) ); - break; - - case 3: /* stmxcsr */ - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(sse); - stmxcsr: - generate_exception_if(dst.type != OP_MEM, EXC_UD); - get_fpu(vex.opcx ? X86EMUL_FPU_ymm : X86EMUL_FPU_xmm); - asm volatile ( "stmxcsr %0" : "=m" (dst.val) ); - break; -#endif /* X86EMUL_NO_SIMD */ - - case 5: /* lfence */ - fail_if(modrm_mod != 3); - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(sse2); - asm volatile ( "lfence" ::: "memory" ); - break; - case 6: - if ( modrm_mod == 3 ) /* mfence */ - { - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(sse2); - asm volatile ( "mfence" ::: "memory" ); - break; - } - /* else clwb */ - fail_if(!vex.pfx); - vcpu_must_have(clwb); - fail_if(!ops->cache_op); - if ( (rc = ops->cache_op(x86emul_clwb, ea.mem.seg, ea.mem.off, - ctxt)) != X86EMUL_OKAY ) - goto done; - break; - case 7: - if ( modrm_mod == 3 ) /* sfence */ - { - generate_exception_if(vex.pfx, EXC_UD); - vcpu_must_have(mmxext); - asm volatile ( "sfence" ::: "memory" ); - break; - } - /* else clflush{,opt} */ - if ( !vex.pfx ) - vcpu_must_have(clflush); - else - vcpu_must_have(clflushopt); - fail_if(!ops->cache_op); - if ( (rc = ops->cache_op(vex.pfx ? x86emul_clflushopt - : x86emul_clflush, - ea.mem.seg, ea.mem.off, - ctxt)) != X86EMUL_OKAY ) - goto done; - break; - default: - goto unimplemented_insn; - } - break; - + case X86EMUL_OPC(0x0f, 0xae): /* Grp15 */ + case X86EMUL_OPC_66(0x0f, 0xae): + case X86EMUL_OPC_F3(0x0f, 0xae): #ifndef X86EMUL_NO_SIMD - - case X86EMUL_OPC_VEX(0x0f, 0xae): /* Grp15 */ - switch ( modrm_reg & 7 ) - { - case 2: /* vldmxcsr */ - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); - vcpu_must_have(avx); - goto ldmxcsr; - case 3: /* vstmxcsr */ - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); - vcpu_must_have(avx); - goto stmxcsr; - } - goto unrecognized_insn; - -#endif /* !X86EMUL_NO_SIMD */ - - case X86EMUL_OPC_F3(0x0f, 0xae): /* Grp15 */ - fail_if(modrm_mod != 3); - generate_exception_if((modrm_reg & 4) || !mode_64bit(), EXC_UD); - fail_if(!ops->read_cr); - if ( (rc = ops->read_cr(4, &cr4, ctxt)) != X86EMUL_OKAY ) - goto done; - generate_exception_if(!(cr4 & X86_CR4_FSGSBASE), EXC_UD); - seg = modrm_reg & 1 ? x86_seg_gs : x86_seg_fs; - fail_if(!ops->read_segment); - if ( (rc = ops->read_segment(seg, &sreg, ctxt)) != X86EMUL_OKAY ) - goto done; - dst.reg = decode_gpr(&_regs, modrm_rm); - if ( !(modrm_reg & 2) ) - { - /* rd{f,g}sbase */ - dst.type = OP_REG; - dst.bytes = (op_bytes == 8) ? 8 : 4; - dst.val = sreg.base; - } - else - { - /* wr{f,g}sbase */ - if ( op_bytes == 8 ) - { - sreg.base = *dst.reg; - generate_exception_if(!is_canonical_address(sreg.base), - EXC_GP, 0); - } - else - sreg.base = (uint32_t)*dst.reg; - fail_if(!ops->write_segment); - if ( (rc = ops->write_segment(seg, &sreg, ctxt)) != X86EMUL_OKAY ) - goto done; - } - break; + case X86EMUL_OPC_VEX(0x0f, 0xae): +#endif + rc = x86emul_0fae(state, &_regs, &dst, &src, ctxt, ops, &fpu_type); + goto dispatch_from_helper; case X86EMUL_OPC(0x0f, 0xaf): /* imul */ emulate_2op_SrcV_srcmem("imul", src, dst, _regs.eflags); @@ -10543,7 +10320,7 @@ x86_emulate( goto unrecognized_insn; default: - unimplemented_insn: + unimplemented_insn: __maybe_unused; rc = X86EMUL_UNIMPLEMENTED; goto done; unrecognized_insn: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517631.803249 (Exim 4.92) (envelope-from ) id 1pjY0x-0003kh-P5; Tue, 04 Apr 2023 04:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517631.803249; Tue, 04 Apr 2023 04:11:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0x-0003kZ-MR; Tue, 04 Apr 2023 04:11:23 +0000 Received: by outflank-mailman (input) for mailman id 517631; Tue, 04 Apr 2023 04:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0w-0003kN-R6 for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY0w-00068m-Q2 for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY0w-0007Rb-On for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eKZkRy/i76URnAAi3DR3XnPIkngc9rnjW9Jj/4SChgs=; b=JBdhiDrAgyJLMUAbrFbNHTsXt6 jlylb9wPGCK5lf007eNKMkNgbjAJuOEhQMSeQua5y8/hr4Cp4+L4DlAOF2SQNaN1l8rs8NvmR7ZYY Dv9BbdzdeBDkz8nUM/Z6L+tr8XPgMMJ4QTpAEYlRgGWcDyBWMgopThyapUTMHqbnYyfU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: split off opcode 0fc7 handling Message-Id: Date: Tue, 04 Apr 2023 04:11:22 +0000 commit 0bae69c96b32963b535bb569d6b41f96a7d72617 Author: Jan Beulich AuthorDate: Mon Apr 3 12:43:51 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:43:51 2023 +0200 x86emul: split off opcode 0fc7 handling There's a fair amount of sub-cases (with some yet to be implemented), so a separate function seems warranted. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- xen/arch/x86/x86_emulate/0fc7.c | 210 +++++++++++++++++++++++++++ xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/private.h | 14 ++ xen/arch/x86/x86_emulate/x86_emulate.c | 182 +---------------------- 6 files changed, 231 insertions(+), 180 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 22eb035a64..70737079dd 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -32,7 +32,7 @@ GCOV_FLAGS := --coverage $(CC) -c $(CFLAGS) $(GCOV_FLAGS) $< -o $@ OBJS := fuzz-emul.o x86-emulate.o -OBJS += x86_emulate/0f01.o x86_emulate/0fae.o +OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o x86-emulate.h: x86_emulate/x86_emulate.h x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 5663a305eb..659870e730 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -251,7 +251,7 @@ xop.h avx512f.h: simd-fma.c endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o -OBJS += x86_emulate/0f01.o x86_emulate/0fae.o +OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/xen/arch/x86/x86_emulate/0fc7.c b/xen/arch/x86/x86_emulate/0fc7.c new file mode 100644 index 0000000000..b8808e4cca --- /dev/null +++ b/xen/arch/x86/x86_emulate/0fc7.c @@ -0,0 +1,210 @@ +/****************************************************************************** + * 0fc7.c - helper for x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * Copyright (c) 2005-2007 Keir Fraser + * Copyright (c) 2005-2007 XenSource Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +/* Avoid namespace pollution. */ +#undef cmpxchg + +int x86emul_0fc7(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + mmval_t *mmvalp) +{ + int rc; + + if ( s->ea.type == OP_REG ) + { + bool __maybe_unused carry; + + switch ( s->modrm_reg & 7 ) + { + default: + return X86EMUL_UNRECOGNIZED; + + case 6: /* rdrand */ +#ifdef HAVE_AS_RDRAND + generate_exception_if(s->vex.pfx >= vex_f3, X86_EXC_UD); + host_and_vcpu_must_have(rdrand); + *dst = s->ea; + switch ( s->op_bytes ) + { + case 2: + asm ( "rdrand %w0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + default: +# ifdef __x86_64__ + asm ( "rdrand %k0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + case 8: +# endif + asm ( "rdrand %0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + } + regs->eflags &= ~EFLAGS_MASK; + if ( carry ) + regs->eflags |= X86_EFLAGS_CF; + break; +#else + return X86EMUL_UNIMPLEMENTED; +#endif + + case 7: /* rdseed / rdpid */ + if ( s->vex.pfx == vex_f3 ) /* rdpid */ + { + uint64_t msr_val; + + generate_exception_if(s->ea.type != OP_REG, X86_EXC_UD); + vcpu_must_have(rdpid); + fail_if(!ops->read_msr); + if ( (rc = ops->read_msr(MSR_TSC_AUX, &msr_val, + ctxt)) != X86EMUL_OKAY ) + goto done; + *dst = s->ea; + dst->val = msr_val; + dst->bytes = 4; + break; + } +#ifdef HAVE_AS_RDSEED + generate_exception_if(s->vex.pfx >= vex_f3, X86_EXC_UD); + host_and_vcpu_must_have(rdseed); + *dst = s->ea; + switch ( s->op_bytes ) + { + case 2: + asm ( "rdseed %w0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + default: +# ifdef __x86_64__ + asm ( "rdseed %k0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + case 8: +# endif + asm ( "rdseed %0" ASM_FLAG_OUT(, "; setc %1") + : "=r" (dst->val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); + break; + } + regs->eflags &= ~EFLAGS_MASK; + if ( carry ) + regs->eflags |= X86_EFLAGS_CF; + break; +#endif + } + } + else + { + union { + uint32_t u32[2]; + uint64_t u64[2]; + } *old, *aux; + + /* cmpxchg8b/cmpxchg16b */ + generate_exception_if((s->modrm_reg & 7) != 1, X86_EXC_UD); + fail_if(!ops->cmpxchg); + if ( s->rex_prefix & REX_W ) + { + host_and_vcpu_must_have(cx16); + generate_exception_if(!is_aligned(s->ea.mem.seg, s->ea.mem.off, 16, + ctxt, ops), + X86_EXC_GP, 0); + s->op_bytes = 16; + } + else + { + vcpu_must_have(cx8); + s->op_bytes = 8; + } + + old = container_of(&mmvalp->ymm[0], typeof(*old), u64[0]); + aux = container_of(&mmvalp->ymm[2], typeof(*aux), u64[0]); + + /* Get actual old value. */ + if ( (rc = ops->read(s->ea.mem.seg, s->ea.mem.off, old, s->op_bytes, + ctxt)) != X86EMUL_OKAY ) + goto done; + + /* Get expected value. */ + if ( s->op_bytes == 8 ) + { + aux->u32[0] = regs->eax; + aux->u32[1] = regs->edx; + } + else + { + aux->u64[0] = regs->r(ax); + aux->u64[1] = regs->r(dx); + } + + if ( memcmp(old, aux, s->op_bytes) ) + { + cmpxchgNb_failed: + /* Expected != actual: store actual to rDX:rAX and clear ZF. */ + regs->r(ax) = s->op_bytes == 8 ? old->u32[0] : old->u64[0]; + regs->r(dx) = s->op_bytes == 8 ? old->u32[1] : old->u64[1]; + regs->eflags &= ~X86_EFLAGS_ZF; + } + else + { + /* + * Expected == actual: Get proposed value, attempt atomic cmpxchg + * and set ZF if successful. + */ + if ( s->op_bytes == 8 ) + { + aux->u32[0] = regs->ebx; + aux->u32[1] = regs->ecx; + } + else + { + aux->u64[0] = regs->r(bx); + aux->u64[1] = regs->r(cx); + } + + switch ( rc = ops->cmpxchg(s->ea.mem.seg, s->ea.mem.off, old, aux, + s->op_bytes, s->lock_prefix, ctxt) ) + { + case X86EMUL_OKAY: + regs->eflags |= X86_EFLAGS_ZF; + break; + + case X86EMUL_CMPXCHG_FAILED: + rc = X86EMUL_OKAY; + goto cmpxchgNb_failed; + + default: + goto done; + } + } + } + + rc = X86EMUL_OKAY; + + done: + return rc; +} diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index 40336c071c..3d754c59c6 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -1,2 +1,3 @@ obj-y += 0f01.o obj-y += 0fae.o +obj-y += 0fc7.o diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index b571ec2d66..701ef3186c 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -309,6 +309,14 @@ struct x86_emulate_state { #endif }; +typedef union { + uint64_t mmx; + uint64_t __attribute__ ((aligned(16))) xmm[2]; + uint64_t __attribute__ ((aligned(32))) ymm[4]; + uint64_t __attribute__ ((aligned(64))) zmm[8]; + uint32_t data32[16]; +} mmval_t; + struct x86_fxsr { uint16_t fcw; uint16_t fsw; @@ -560,6 +568,12 @@ int x86emul_0fae(struct x86_emulate_state *s, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops, enum x86_emulate_fpu_type *fpu_type); +int x86emul_0fc7(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + mmval_t *mmvalp); static inline bool is_aligned(enum x86_segment seg, unsigned long offs, unsigned int size, struct x86_emulate_ctxt *ctxt, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 20d27765f2..8f7cd1b809 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -687,17 +687,9 @@ struct x87_env32 { }; #endif -typedef union { - uint64_t mmx; - uint64_t __attribute__ ((aligned(16))) xmm[2]; - uint64_t __attribute__ ((aligned(32))) ymm[4]; - uint64_t __attribute__ ((aligned(64))) zmm[8]; - uint32_t data32[16]; -} mmval_t; - /* - * While proper alignment gets specified above, this doesn't get honored by - * the compiler for automatic variables. Use this helper to instantiate a + * While proper alignment gets specified in mmval_t, this doesn't get honored + * by the compiler for automatic variables. Use this helper to instantiate a * suitably aligned variable, producing a pointer to access it. */ #define DECLARE_ALIGNED(type, var) \ @@ -7682,174 +7674,8 @@ x86_emulate( #endif /* X86EMUL_NO_SIMD */ case X86EMUL_OPC(0x0f, 0xc7): /* Grp9 */ - { - union { - uint32_t u32[2]; - uint64_t u64[2]; - } *old, *aux; - - if ( ea.type == OP_REG ) - { - bool __maybe_unused carry; - - switch ( modrm_reg & 7 ) - { - default: - goto unrecognized_insn; - - case 6: /* rdrand */ -#ifdef HAVE_AS_RDRAND - generate_exception_if(rep_prefix(), EXC_UD); - host_and_vcpu_must_have(rdrand); - dst = ea; - switch ( op_bytes ) - { - case 2: - asm ( "rdrand %w0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - default: -# ifdef __x86_64__ - asm ( "rdrand %k0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - case 8: -# endif - asm ( "rdrand %0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - } - _regs.eflags &= ~EFLAGS_MASK; - if ( carry ) - _regs.eflags |= X86_EFLAGS_CF; - break; -#else - goto unimplemented_insn; -#endif - - case 7: /* rdseed / rdpid */ - if ( repe_prefix() ) /* rdpid */ - { - generate_exception_if(ea.type != OP_REG, EXC_UD); - vcpu_must_have(rdpid); - fail_if(!ops->read_msr); - if ( (rc = ops->read_msr(MSR_TSC_AUX, &msr_val, - ctxt)) != X86EMUL_OKAY ) - goto done; - dst = ea; - dst.val = msr_val; - dst.bytes = 4; - break; - } -#ifdef HAVE_AS_RDSEED - generate_exception_if(rep_prefix(), EXC_UD); - host_and_vcpu_must_have(rdseed); - dst = ea; - switch ( op_bytes ) - { - case 2: - asm ( "rdseed %w0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - default: -# ifdef __x86_64__ - asm ( "rdseed %k0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - case 8: -# endif - asm ( "rdseed %0" ASM_FLAG_OUT(, "; setc %1") - : "=r" (dst.val), ASM_FLAG_OUT("=@ccc", "=qm") (carry) ); - break; - } - _regs.eflags &= ~EFLAGS_MASK; - if ( carry ) - _regs.eflags |= X86_EFLAGS_CF; - break; -#endif - } - break; - } - - /* cmpxchg8b/cmpxchg16b */ - generate_exception_if((modrm_reg & 7) != 1, EXC_UD); - fail_if(!ops->cmpxchg); - if ( rex_prefix & REX_W ) - { - host_and_vcpu_must_have(cx16); - generate_exception_if(!is_aligned(ea.mem.seg, ea.mem.off, 16, - ctxt, ops), - EXC_GP, 0); - op_bytes = 16; - } - else - { - vcpu_must_have(cx8); - op_bytes = 8; - } - - old = container_of(&mmvalp->ymm[0], typeof(*old), u64[0]); - aux = container_of(&mmvalp->ymm[2], typeof(*aux), u64[0]); - - /* Get actual old value. */ - if ( (rc = ops->read(ea.mem.seg, ea.mem.off, old, op_bytes, - ctxt)) != X86EMUL_OKAY ) - goto done; - - /* Get expected value. */ - if ( !(rex_prefix & REX_W) ) - { - aux->u32[0] = _regs.eax; - aux->u32[1] = _regs.edx; - } - else - { - aux->u64[0] = _regs.r(ax); - aux->u64[1] = _regs.r(dx); - } - - if ( memcmp(old, aux, op_bytes) ) - { - cmpxchgNb_failed: - /* Expected != actual: store actual to rDX:rAX and clear ZF. */ - _regs.r(ax) = !(rex_prefix & REX_W) ? old->u32[0] : old->u64[0]; - _regs.r(dx) = !(rex_prefix & REX_W) ? old->u32[1] : old->u64[1]; - _regs.eflags &= ~X86_EFLAGS_ZF; - } - else - { - /* - * Expected == actual: Get proposed value, attempt atomic cmpxchg - * and set ZF if successful. - */ - if ( !(rex_prefix & REX_W) ) - { - aux->u32[0] = _regs.ebx; - aux->u32[1] = _regs.ecx; - } - else - { - aux->u64[0] = _regs.r(bx); - aux->u64[1] = _regs.r(cx); - } - - switch ( rc = ops->cmpxchg(ea.mem.seg, ea.mem.off, old, aux, - op_bytes, lock_prefix, ctxt) ) - { - case X86EMUL_OKAY: - _regs.eflags |= X86_EFLAGS_ZF; - break; - - case X86EMUL_CMPXCHG_FAILED: - rc = X86EMUL_OKAY; - goto cmpxchgNb_failed; - - default: - goto done; - } - } - break; - } + rc = x86emul_0fc7(state, &_regs, &dst, ctxt, ops, mmvalp); + goto dispatch_from_helper; case X86EMUL_OPC(0x0f, 0xc8) ... X86EMUL_OPC(0x0f, 0xcf): /* bswap */ dst.type = OP_REG; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517632.803254 (Exim 4.92) (envelope-from ) id 1pjY17-0003pP-SX; Tue, 04 Apr 2023 04:11:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517632.803254; Tue, 04 Apr 2023 04:11:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY17-0003pI-PY; Tue, 04 Apr 2023 04:11:33 +0000 Received: by outflank-mailman (input) for mailman id 517632; Tue, 04 Apr 2023 04:11:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY16-0003p6-Vl for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY16-00068y-Ui for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY16-0007S4-TV for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I+GAkqpVOsfQgoBcNTa005Hzw8KpGuRrUdKM3wxm3c0=; b=qUIX+mOaTFU7GGIs2MxXgfPEhX zXTG0LAk6zwHW3PCQKeG2TSVD8SzBAEBkFMEIXo25ED/ChKt8vKVbhnB1URIwJEerUIkIqSP/PXWs LIbgGWj5tWzT4RenrDNeyAbvpb20vkhpjM/lfWna53APxesic7JTBkdD/PtebnB+Ihm4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: split off FPU opcode handling Message-Id: Date: Tue, 04 Apr 2023 04:11:32 +0000 commit 8f196c12eec7f90bcf31f86312b8fe5ee12b41be Author: Jan Beulich AuthorDate: Mon Apr 3 12:44:59 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:44:59 2023 +0200 x86emul: split off FPU opcode handling Some of the helper functions/macros are needed only for this, and the code is otherwise relatively independent of other parts of the emulator. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/fuzz/x86_instruction_emulator/Makefile | 1 + tools/tests/x86_emulator/Makefile | 1 + tools/tests/x86_emulator/x86-emulate.c | 6 - xen/arch/x86/x86_emulate.c | 25 -- xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/fpu.c | 491 ++++++++++++++++++++++++ xen/arch/x86/x86_emulate/private.h | 172 +++++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 552 +-------------------------- 8 files changed, 676 insertions(+), 573 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 70737079dd..265a64d787 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -33,6 +33,7 @@ GCOV_FLAGS := --coverage OBJS := fuzz-emul.o x86-emulate.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o +OBJS += x86_emulate/fpu.o x86-emulate.h: x86_emulate/x86_emulate.h x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 659870e730..dc97c3a63b 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -252,6 +252,7 @@ endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o +OBJS += x86_emulate/fpu.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index cd81da4994..02705bd775 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -29,12 +29,6 @@ # define __OP "r" /* Operand Prefix */ #endif -#define get_stub(stb) ({ \ - assert(!(stb).addr); \ - (void *)((stb).addr = (uintptr_t)(stb).buf); \ -}) -#define put_stub(stb) ((stb).addr = 0) - uint32_t mxcsr_mask = 0x0000ffbf; struct cpuid_policy cp; diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index ef405edbf3..c241ada5cb 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -9,7 +9,6 @@ * Keir Fraser */ -#include #include #include @@ -18,7 +17,6 @@ #include #include /* cpu_has_amd_erratum() */ #include -#include /* Avoid namespace pollution. */ #undef cmpxchg @@ -28,29 +26,6 @@ #define cpu_has_amd_erratum(nr) \ cpu_has_amd_erratum(¤t_cpu_data, AMD_ERRATUM_##nr) -#define get_stub(stb) ({ \ - void *ptr; \ - BUILD_BUG_ON(STUB_BUF_SIZE / 2 < MAX_INST_LEN + 1); \ - ASSERT(!(stb).ptr); \ - (stb).addr = this_cpu(stubs.addr) + STUB_BUF_SIZE / 2; \ - (stb).ptr = map_domain_page(_mfn(this_cpu(stubs.mfn))) + \ - ((stb).addr & ~PAGE_MASK); \ - ptr = memset((stb).ptr, 0xcc, STUB_BUF_SIZE / 2); \ - if ( cpu_has_xen_ibt ) \ - { \ - place_endbr64(ptr); \ - ptr += 4; \ - } \ - ptr; \ -}) -#define put_stub(stb) ({ \ - if ( (stb).ptr ) \ - { \ - unmap_domain_page((stb).ptr); \ - (stb).ptr = NULL; \ - } \ -}) - #define FXSAVE_AREA current->arch.fpu_ctxt #include "x86_emulate/x86_emulate.c" diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index 3d754c59c6..db26838ede 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -1,3 +1,4 @@ obj-y += 0f01.o obj-y += 0fae.o obj-y += 0fc7.o +obj-$(CONFIG_HVM) += fpu.o diff --git a/xen/arch/x86/x86_emulate/fpu.c b/xen/arch/x86/x86_emulate/fpu.c new file mode 100644 index 0000000000..e745840722 --- /dev/null +++ b/xen/arch/x86/x86_emulate/fpu.c @@ -0,0 +1,491 @@ +/****************************************************************************** + * x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * Copyright (c) 2005-2007 Keir Fraser + * Copyright (c) 2005-2007 XenSource Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#ifdef __XEN__ +# include +# define cpu_has_amd_erratum(nr) \ + cpu_has_amd_erratum(¤t_cpu_data, AMD_ERRATUM_##nr) +#else +# define cpu_has_amd_erratum(nr) 0 +#endif + +/* Floating point status word definitions. */ +#define FSW_ES (1U << 7) + +static inline bool fpu_check_write(void) +{ + uint16_t fsw; + + asm ( "fnstsw %0" : "=am" (fsw) ); + + return !(fsw & FSW_ES); +} + +#define emulate_fpu_insn_memdst(opc, ext, arg) \ +do { \ + /* ModRM: mod=0, reg=ext, rm=0, i.e. a (%rax) operand */ \ + *insn_bytes = 2; \ + memcpy(get_stub(stub), \ + ((uint8_t[]){ opc, ((ext) & 7) << 3, 0xc3 }), 3); \ + invoke_stub("", "", "+m" (arg) : "a" (&(arg))); \ + put_stub(stub); \ +} while (0) + +#define emulate_fpu_insn_memsrc(opc, ext, arg) \ +do { \ + /* ModRM: mod=0, reg=ext, rm=0, i.e. a (%rax) operand */ \ + memcpy(get_stub(stub), \ + ((uint8_t[]){ opc, ((ext) & 7) << 3, 0xc3 }), 3); \ + invoke_stub("", "", "=m" (dummy) : "m" (arg), "a" (&(arg))); \ + put_stub(stub); \ +} while (0) + +#define emulate_fpu_insn_stub(bytes...) \ +do { \ + unsigned int nr_ = sizeof((uint8_t[]){ bytes }); \ + memcpy(get_stub(stub), ((uint8_t[]){ bytes, 0xc3 }), nr_ + 1); \ + invoke_stub("", "", "=m" (dummy) : "i" (0)); \ + put_stub(stub); \ +} while (0) + +#define emulate_fpu_insn_stub_eflags(bytes...) \ +do { \ + unsigned int nr_ = sizeof((uint8_t[]){ bytes }); \ + unsigned long tmp_; \ + memcpy(get_stub(stub), ((uint8_t[]){ bytes, 0xc3 }), nr_ + 1); \ + invoke_stub(_PRE_EFLAGS("[eflags]", "[mask]", "[tmp]"), \ + _POST_EFLAGS("[eflags]", "[mask]", "[tmp]"), \ + [eflags] "+g" (regs->eflags), [tmp] "=&r" (tmp_) \ + : [mask] "i" (X86_EFLAGS_ZF|X86_EFLAGS_PF|X86_EFLAGS_CF)); \ + put_stub(stub); \ +} while (0) + +int x86emul_fpu(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct operand *src, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + unsigned int *insn_bytes, + enum x86_emulate_fpu_type *fpu_type, +#define fpu_type (*fpu_type) /* for get_fpu() */ + struct stub_exn *stub_exn, +#define stub_exn (*stub_exn) /* for invoke_stub() */ + mmval_t *mmvalp) +{ + uint8_t b; + int rc; + struct x86_emulate_stub stub = {}; + + switch ( b = ctxt->opcode ) + { + unsigned long dummy; + + case 0x9b: /* wait/fwait */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_wait); + emulate_fpu_insn_stub(b); + break; + + case 0xd8: /* FPU 0xd8 */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* fadd %stN,%st */ + case 0xc8 ... 0xcf: /* fmul %stN,%st */ + case 0xd0 ... 0xd7: /* fcom %stN,%st */ + case 0xd8 ... 0xdf: /* fcomp %stN,%st */ + case 0xe0 ... 0xe7: /* fsub %stN,%st */ + case 0xe8 ... 0xef: /* fsubr %stN,%st */ + case 0xf0 ... 0xf7: /* fdiv %stN,%st */ + case 0xf8 ... 0xff: /* fdivr %stN,%st */ + emulate_fpu_insn_stub(0xd8, s->modrm); + break; + default: + fpu_memsrc32: + ASSERT(s->ea.type == OP_MEM); + if ( (rc = ops->read(s->ea.mem.seg, s->ea.mem.off, &src->val, + 4, ctxt)) != X86EMUL_OKAY ) + goto done; + emulate_fpu_insn_memsrc(b, s->modrm_reg & 7, src->val); + break; + } + break; + + case 0xd9: /* FPU 0xd9 */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xfb: /* fsincos */ + fail_if(cpu_has_amd_erratum(573)); + /* fall through */ + case 0xc0 ... 0xc7: /* fld %stN */ + case 0xc8 ... 0xcf: /* fxch %stN */ + case 0xd0: /* fnop */ + case 0xd8 ... 0xdf: /* fstp %stN (alternative encoding) */ + case 0xe0: /* fchs */ + case 0xe1: /* fabs */ + case 0xe4: /* ftst */ + case 0xe5: /* fxam */ + case 0xe8: /* fld1 */ + case 0xe9: /* fldl2t */ + case 0xea: /* fldl2e */ + case 0xeb: /* fldpi */ + case 0xec: /* fldlg2 */ + case 0xed: /* fldln2 */ + case 0xee: /* fldz */ + case 0xf0: /* f2xm1 */ + case 0xf1: /* fyl2x */ + case 0xf2: /* fptan */ + case 0xf3: /* fpatan */ + case 0xf4: /* fxtract */ + case 0xf5: /* fprem1 */ + case 0xf6: /* fdecstp */ + case 0xf7: /* fincstp */ + case 0xf8: /* fprem */ + case 0xf9: /* fyl2xp1 */ + case 0xfa: /* fsqrt */ + case 0xfc: /* frndint */ + case 0xfd: /* fscale */ + case 0xfe: /* fsin */ + case 0xff: /* fcos */ + emulate_fpu_insn_stub(0xd9, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + switch ( s->modrm_reg & 7 ) + { + case 0: /* fld m32fp */ + goto fpu_memsrc32; + case 2: /* fst m32fp */ + case 3: /* fstp m32fp */ + fpu_memdst32: + *dst = s->ea; + dst->bytes = 4; + emulate_fpu_insn_memdst(b, s->modrm_reg & 7, dst->val); + break; + case 4: /* fldenv */ + /* Raise #MF now if there are pending unmasked exceptions. */ + emulate_fpu_insn_stub(0xd9, 0xd0 /* fnop */); + /* fall through */ + case 6: /* fnstenv */ + fail_if(!ops->blk); + s->blk = s->modrm_reg & 2 ? blk_fst : blk_fld; + /* + * REX is meaningless for these insns by this point - (ab)use + * the field to communicate real vs protected mode to ->blk(). + */ + s->rex_prefix = in_protmode(ctxt, ops); + if ( (rc = ops->blk(s->ea.mem.seg, s->ea.mem.off, NULL, + s->op_bytes > 2 ? sizeof(struct x87_env32) + : sizeof(struct x87_env16), + ®s->eflags, + s, ctxt)) != X86EMUL_OKAY ) + goto done; + s->fpu_ctrl = true; + break; + case 5: /* fldcw m2byte */ + s->fpu_ctrl = true; + fpu_memsrc16: + if ( (rc = ops->read(s->ea.mem.seg, s->ea.mem.off, &src->val, + 2, ctxt)) != X86EMUL_OKAY ) + goto done; + emulate_fpu_insn_memsrc(b, s->modrm_reg & 7, src->val); + break; + case 7: /* fnstcw m2byte */ + s->fpu_ctrl = true; + fpu_memdst16: + *dst = s->ea; + dst->bytes = 2; + emulate_fpu_insn_memdst(b, s->modrm_reg & 7, dst->val); + break; + default: + generate_exception(X86_EXC_UD); + } + /* + * Control instructions can't raise FPU exceptions, so we need + * to consider suppressing writes only for non-control ones. + */ + if ( dst->type == OP_MEM && !s->fpu_ctrl && !fpu_check_write() ) + dst->type = OP_NONE; + } + break; + + case 0xda: /* FPU 0xda */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* fcmovb %stN */ + case 0xc8 ... 0xcf: /* fcmove %stN */ + case 0xd0 ... 0xd7: /* fcmovbe %stN */ + case 0xd8 ... 0xdf: /* fcmovu %stN */ + vcpu_must_have(cmov); + emulate_fpu_insn_stub_eflags(0xda, s->modrm); + break; + case 0xe9: /* fucompp */ + emulate_fpu_insn_stub(0xda, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + goto fpu_memsrc32; + } + break; + + case 0xdb: /* FPU 0xdb */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* fcmovnb %stN */ + case 0xc8 ... 0xcf: /* fcmovne %stN */ + case 0xd0 ... 0xd7: /* fcmovnbe %stN */ + case 0xd8 ... 0xdf: /* fcmovnu %stN */ + case 0xe8 ... 0xef: /* fucomi %stN */ + case 0xf0 ... 0xf7: /* fcomi %stN */ + vcpu_must_have(cmov); + emulate_fpu_insn_stub_eflags(0xdb, s->modrm); + break; + case 0xe0: /* fneni - 8087 only, ignored by 287 */ + case 0xe1: /* fndisi - 8087 only, ignored by 287 */ + case 0xe2: /* fnclex */ + case 0xe3: /* fninit */ + case 0xe4: /* fnsetpm - 287 only, ignored by 387 */ + /* case 0xe5: frstpm - 287 only, #UD on 387 */ + s->fpu_ctrl = true; + emulate_fpu_insn_stub(0xdb, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + switch ( s->modrm_reg & 7 ) + { + case 0: /* fild m32i */ + goto fpu_memsrc32; + case 1: /* fisttp m32i */ + host_and_vcpu_must_have(sse3); + /* fall through */ + case 2: /* fist m32i */ + case 3: /* fistp m32i */ + goto fpu_memdst32; + case 5: /* fld m80fp */ + fpu_memsrc80: + if ( (rc = ops->read(s->ea.mem.seg, s->ea.mem.off, mmvalp, + 10, ctxt)) != X86EMUL_OKAY ) + goto done; + emulate_fpu_insn_memsrc(b, s->modrm_reg & 7, *mmvalp); + break; + case 7: /* fstp m80fp */ + fpu_memdst80: + fail_if(!ops->write); + emulate_fpu_insn_memdst(b, s->modrm_reg & 7, *mmvalp); + if ( fpu_check_write() && + (rc = ops->write(s->ea.mem.seg, s->ea.mem.off, mmvalp, + 10, ctxt)) != X86EMUL_OKAY ) + goto done; + break; + default: + generate_exception(X86_EXC_UD); + } + } + break; + + case 0xdc: /* FPU 0xdc */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* fadd %st,%stN */ + case 0xc8 ... 0xcf: /* fmul %st,%stN */ + case 0xd0 ... 0xd7: /* fcom %stN,%st (alternative encoding) */ + case 0xd8 ... 0xdf: /* fcomp %stN,%st (alternative encoding) */ + case 0xe0 ... 0xe7: /* fsubr %st,%stN */ + case 0xe8 ... 0xef: /* fsub %st,%stN */ + case 0xf0 ... 0xf7: /* fdivr %st,%stN */ + case 0xf8 ... 0xff: /* fdiv %st,%stN */ + emulate_fpu_insn_stub(0xdc, s->modrm); + break; + default: + fpu_memsrc64: + ASSERT(s->ea.type == OP_MEM); + if ( (rc = ops->read(s->ea.mem.seg, s->ea.mem.off, &src->val, + 8, ctxt)) != X86EMUL_OKAY ) + goto done; + emulate_fpu_insn_memsrc(b, s->modrm_reg & 7, src->val); + break; + } + break; + + case 0xdd: /* FPU 0xdd */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* ffree %stN */ + case 0xc8 ... 0xcf: /* fxch %stN (alternative encoding) */ + case 0xd0 ... 0xd7: /* fst %stN */ + case 0xd8 ... 0xdf: /* fstp %stN */ + case 0xe0 ... 0xe7: /* fucom %stN */ + case 0xe8 ... 0xef: /* fucomp %stN */ + emulate_fpu_insn_stub(0xdd, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + switch ( s->modrm_reg & 7 ) + { + case 0: /* fld m64fp */; + goto fpu_memsrc64; + case 1: /* fisttp m64i */ + host_and_vcpu_must_have(sse3); + /* fall through */ + case 2: /* fst m64fp */ + case 3: /* fstp m64fp */ + fpu_memdst64: + *dst = s->ea; + dst->bytes = 8; + emulate_fpu_insn_memdst(b, s->modrm_reg & 7, dst->val); + break; + case 4: /* frstor */ + /* Raise #MF now if there are pending unmasked exceptions. */ + emulate_fpu_insn_stub(0xd9, 0xd0 /* fnop */); + /* fall through */ + case 6: /* fnsave */ + fail_if(!ops->blk); + s->blk = s->modrm_reg & 2 ? blk_fst : blk_fld; + /* + * REX is meaningless for these insns by this point - (ab)use + * the field to communicate real vs protected mode to ->blk(). + */ + s->rex_prefix = in_protmode(ctxt, ops); + if ( (rc = ops->blk(s->ea.mem.seg, s->ea.mem.off, NULL, + s->op_bytes > 2 ? sizeof(struct x87_env32) + 80 + : sizeof(struct x87_env16) + 80, + ®s->eflags, + s, ctxt)) != X86EMUL_OKAY ) + goto done; + s->fpu_ctrl = true; + break; + case 7: /* fnstsw m2byte */ + s->fpu_ctrl = true; + goto fpu_memdst16; + default: + generate_exception(X86_EXC_UD); + } + /* + * Control instructions can't raise FPU exceptions, so we need + * to consider suppressing writes only for non-control ones. + */ + if ( dst->type == OP_MEM && !s->fpu_ctrl && !fpu_check_write() ) + dst->type = OP_NONE; + } + break; + + case 0xde: /* FPU 0xde */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xc0 ... 0xc7: /* faddp %stN */ + case 0xc8 ... 0xcf: /* fmulp %stN */ + case 0xd0 ... 0xd7: /* fcomp %stN (alternative encoding) */ + case 0xd9: /* fcompp */ + case 0xe0 ... 0xe7: /* fsubrp %stN */ + case 0xe8 ... 0xef: /* fsubp %stN */ + case 0xf0 ... 0xf7: /* fdivrp %stN */ + case 0xf8 ... 0xff: /* fdivp %stN */ + emulate_fpu_insn_stub(0xde, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + emulate_fpu_insn_memsrc(b, s->modrm_reg & 7, src->val); + break; + } + break; + + case 0xdf: /* FPU 0xdf */ + host_and_vcpu_must_have(fpu); + get_fpu(X86EMUL_FPU_fpu); + switch ( s->modrm ) + { + case 0xe0: + /* fnstsw %ax */ + s->fpu_ctrl = true; + dst->bytes = 2; + dst->type = OP_REG; + dst->reg = (void *)®s->ax; + emulate_fpu_insn_memdst(b, s->modrm_reg & 7, dst->val); + break; + case 0xe8 ... 0xef: /* fucomip %stN */ + case 0xf0 ... 0xf7: /* fcomip %stN */ + vcpu_must_have(cmov); + emulate_fpu_insn_stub_eflags(0xdf, s->modrm); + break; + case 0xc0 ... 0xc7: /* ffreep %stN */ + case 0xc8 ... 0xcf: /* fxch %stN (alternative encoding) */ + case 0xd0 ... 0xd7: /* fstp %stN (alternative encoding) */ + case 0xd8 ... 0xdf: /* fstp %stN (alternative encoding) */ + emulate_fpu_insn_stub(0xdf, s->modrm); + break; + default: + generate_exception_if(s->ea.type != OP_MEM, X86_EXC_UD); + switch ( s->modrm_reg & 7 ) + { + case 0: /* fild m16i */ + goto fpu_memsrc16; + case 1: /* fisttp m16i */ + host_and_vcpu_must_have(sse3); + /* fall through */ + case 2: /* fist m16i */ + case 3: /* fistp m16i */ + goto fpu_memdst16; + case 4: /* fbld m80dec */ + goto fpu_memsrc80; + case 5: /* fild m64i */ + dst->type = OP_NONE; + goto fpu_memsrc64; + case 6: /* fbstp packed bcd */ + goto fpu_memdst80; + case 7: /* fistp m64i */ + goto fpu_memdst64; + } + } + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + + rc = X86EMUL_OKAY; + + done: + put_stub(stub); + return rc; + +#ifdef __XEN__ + emulation_stub_failure: + return X86EMUL_stub_failure; +#endif +} diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 701ef3186c..5ab94fb96c 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -21,6 +21,7 @@ #ifdef __XEN__ # include +# include # include # include # include @@ -340,12 +341,57 @@ struct x86_fxsr { uint64_t avl[6]; }; +#ifndef X86EMUL_NO_FPU +struct x87_env16 { + uint16_t fcw; + uint16_t fsw; + uint16_t ftw; + union { + struct { + uint16_t fip_lo; + uint16_t fop:11, :1, fip_hi:4; + uint16_t fdp_lo; + uint16_t :12, fdp_hi:4; + } real; + struct { + uint16_t fip; + uint16_t fcs; + uint16_t fdp; + uint16_t fds; + } prot; + } mode; +}; + +struct x87_env32 { + uint32_t fcw:16, :16; + uint32_t fsw:16, :16; + uint32_t ftw:16, :16; + union { + struct { + /* some CPUs/FPUs also store the full FIP here */ + uint32_t fip_lo:16, :16; + uint32_t fop:11, :1, fip_hi:16, :4; + /* some CPUs/FPUs also store the full FDP here */ + uint32_t fdp_lo:16, :16; + uint32_t :12, fdp_hi:16, :4; + } real; + struct { + uint32_t fip; + uint32_t fcs:16, fop:11, :5; + uint32_t fdp; + uint32_t fds:16, :16; + } prot; + } mode; +}; +#endif + /* * Externally visible return codes from x86_emulate() are non-negative. * Use negative values for internal state change indicators from helpers * to the main function. */ #define X86EMUL_rdtsc (-1) +#define X86EMUL_stub_failure (-2) /* * These EFLAGS bits are restored from saved value during emulation, and @@ -543,6 +589,122 @@ amd_like(const struct x86_emulate_ctxt *ctxt) # define host_and_vcpu_must_have(feat) vcpu_must_have(feat) #endif +/* + * Instruction emulation: + * Most instructions are emulated directly via a fragment of inline assembly + * code. This allows us to save/restore EFLAGS and thus very easily pick up + * any modified flags. + */ + +#if defined(__x86_64__) +#define _LO32 "k" /* force 32-bit operand */ +#define _STK "%%rsp" /* stack pointer */ +#define _BYTES_PER_LONG "8" +#elif defined(__i386__) +#define _LO32 "" /* force 32-bit operand */ +#define _STK "%%esp" /* stack pointer */ +#define _BYTES_PER_LONG "4" +#endif + +/* Before executing instruction: restore necessary bits in EFLAGS. */ +#define _PRE_EFLAGS(_sav, _msk, _tmp) \ +/* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \ +"movl %"_LO32 _sav",%"_LO32 _tmp"; " \ +"push %"_tmp"; " \ +"push %"_tmp"; " \ +"movl %"_msk",%"_LO32 _tmp"; " \ +"andl %"_LO32 _tmp",("_STK"); " \ +"pushf; " \ +"notl %"_LO32 _tmp"; " \ +"andl %"_LO32 _tmp",("_STK"); " \ +"andl %"_LO32 _tmp",2*"_BYTES_PER_LONG"("_STK"); " \ +"pop %"_tmp"; " \ +"orl %"_LO32 _tmp",("_STK"); " \ +"popf; " \ +"pop %"_tmp"; " \ +"movl %"_LO32 _tmp",%"_LO32 _sav"; " + +/* After executing instruction: write-back necessary bits in EFLAGS. */ +#define _POST_EFLAGS(_sav, _msk, _tmp) \ +/* _sav |= EFLAGS & _msk; */ \ +"pushf; " \ +"pop %"_tmp"; " \ +"andl %"_msk",%"_LO32 _tmp"; " \ +"orl %"_LO32 _tmp",%"_LO32 _sav"; " + +#ifdef __XEN__ + +# include +# include + +# define get_stub(stb) ({ \ + void *ptr; \ + BUILD_BUG_ON(STUB_BUF_SIZE / 2 < MAX_INST_LEN + 1); \ + ASSERT(!(stb).ptr); \ + (stb).addr = this_cpu(stubs.addr) + STUB_BUF_SIZE / 2; \ + (stb).ptr = map_domain_page(_mfn(this_cpu(stubs.mfn))) + \ + ((stb).addr & ~PAGE_MASK); \ + ptr = memset((stb).ptr, 0xcc, STUB_BUF_SIZE / 2); \ + if ( cpu_has_xen_ibt ) \ + { \ + place_endbr64(ptr); \ + ptr += 4; \ + } \ + ptr; \ +}) + +# define put_stub(stb) ({ \ + if ( (stb).ptr ) \ + { \ + unmap_domain_page((stb).ptr); \ + (stb).ptr = NULL; \ + } \ +}) + + +struct stub_exn { + union stub_exception_token info; + unsigned int line; +}; + +# define invoke_stub(pre, post, constraints...) do { \ + stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \ + stub_exn.line = __LINE__; /* Utility outweighs livepatching cost */ \ + block_speculation(); /* SCSB */ \ + asm volatile ( pre "\n\tINDIRECT_CALL %[stub]\n\t" post "\n" \ + ".Lret%=:\n\t" \ + ".pushsection .fixup,\"ax\"\n" \ + ".Lfix%=:\n\t" \ + "pop %[exn]\n\t" \ + "jmp .Lret%=\n\t" \ + ".popsection\n\t" \ + _ASM_EXTABLE(.Lret%=, .Lfix%=) \ + : [exn] "+g" (stub_exn.info) ASM_CALL_CONSTRAINT, \ + constraints, \ + [stub] "r" (stub.func), \ + "m" (*(uint8_t(*)[MAX_INST_LEN + 1])stub.ptr) ); \ + if ( unlikely(~stub_exn.info.raw) ) \ + goto emulation_stub_failure; \ +} while (0) + +#else /* !__XEN__ */ + +# define get_stub(stb) ({ \ + assert(!(stb).addr); \ + (void *)((stb).addr = (uintptr_t)(stb).buf); \ +}) + +# define put_stub(stb) ((stb).addr = 0) + +struct stub_exn {}; + +# define invoke_stub(pre, post, constraints...) \ + asm volatile ( pre "\n\tcall *%[stub]\n\t" post \ + : constraints, [stub] "rm" (stub.func), \ + "m" (*(typeof(stub.buf) *)stub.addr) ) + +#endif /* __XEN__ */ + int x86emul_get_cpl(struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops); @@ -556,6 +718,16 @@ do { \ if ( rc ) goto done; \ } while (0) +int x86emul_fpu(struct x86_emulate_state *s, + struct cpu_user_regs *regs, + struct operand *dst, + struct operand *src, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops, + unsigned int *insn_bytes, + enum x86_emulate_fpu_type *fpu_type, + struct stub_exn *stub_exn, + mmval_t *mmvalp); int x86emul_0f01(struct x86_emulate_state *s, struct cpu_user_regs *regs, struct operand *dst, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 8f7cd1b809..4899180753 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -643,50 +643,6 @@ static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; #define PTR_POISON NULL /* 32-bit builds are for user-space, so NULL is OK. */ #endif -#ifndef X86EMUL_NO_FPU -struct x87_env16 { - uint16_t fcw; - uint16_t fsw; - uint16_t ftw; - union { - struct { - uint16_t fip_lo; - uint16_t fop:11, :1, fip_hi:4; - uint16_t fdp_lo; - uint16_t :12, fdp_hi:4; - } real; - struct { - uint16_t fip; - uint16_t fcs; - uint16_t fdp; - uint16_t fds; - } prot; - } mode; -}; - -struct x87_env32 { - uint32_t fcw:16, :16; - uint32_t fsw:16, :16; - uint32_t ftw:16, :16; - union { - struct { - /* some CPUs/FPUs also store the full FIP here */ - uint32_t fip_lo:16, :16; - uint32_t fop:11, :1, fip_hi:16, :4; - /* some CPUs/FPUs also store the full FDP here */ - uint32_t fdp_lo:16, :16; - uint32_t :12, fdp_hi:16, :4; - } real; - struct { - uint32_t fip; - uint32_t fcs:16, fop:11, :5; - uint32_t fdp; - uint32_t fds:16, :16; - } prot; - } mode; -}; -#endif - /* * While proper alignment gets specified in mmval_t, this doesn't get honored * by the compiler for automatic variables. Use this helper to instantiate a @@ -704,9 +660,6 @@ struct x87_env32 { # define ASM_FLAG_OUT(yes, no) no #endif -/* Floating point status word definitions. */ -#define FSW_ES (1U << 7) - /* MXCSR bit definitions. */ #define MXCSR_MM (1U << 17) @@ -737,49 +690,6 @@ struct x87_env32 { #define ECODE_IDT (1 << 1) #define ECODE_TI (1 << 2) -/* - * Instruction emulation: - * Most instructions are emulated directly via a fragment of inline assembly - * code. This allows us to save/restore EFLAGS and thus very easily pick up - * any modified flags. - */ - -#if defined(__x86_64__) -#define _LO32 "k" /* force 32-bit operand */ -#define _STK "%%rsp" /* stack pointer */ -#define _BYTES_PER_LONG "8" -#elif defined(__i386__) -#define _LO32 "" /* force 32-bit operand */ -#define _STK "%%esp" /* stack pointer */ -#define _BYTES_PER_LONG "4" -#endif - -/* Before executing instruction: restore necessary bits in EFLAGS. */ -#define _PRE_EFLAGS(_sav, _msk, _tmp) \ -/* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \ -"movl %"_LO32 _sav",%"_LO32 _tmp"; " \ -"push %"_tmp"; " \ -"push %"_tmp"; " \ -"movl %"_msk",%"_LO32 _tmp"; " \ -"andl %"_LO32 _tmp",("_STK"); " \ -"pushf; " \ -"notl %"_LO32 _tmp"; " \ -"andl %"_LO32 _tmp",("_STK"); " \ -"andl %"_LO32 _tmp",2*"_BYTES_PER_LONG"("_STK"); " \ -"pop %"_tmp"; " \ -"orl %"_LO32 _tmp",("_STK"); " \ -"popf; " \ -"pop %"_tmp"; " \ -"movl %"_LO32 _tmp",%"_LO32 _sav"; " - -/* After executing instruction: write-back necessary bits in EFLAGS. */ -#define _POST_EFLAGS(_sav, _msk, _tmp) \ -/* _sav |= EFLAGS & _msk; */ \ -"pushf; " \ -"pop %"_tmp"; " \ -"andl %"_msk",%"_LO32 _tmp"; " \ -"orl %"_LO32 _tmp",%"_LO32 _sav"; " - /* Raw emulation: instruction has two explicit operands. */ #define __emulate_2op_nobyte(_op, src, dst, sz, eflags, wsx,wsy,wdx,wdy, \ lsx,lsy,ldx,ldy, qsx,qsy,qdx,qdy, extra...) \ @@ -913,33 +823,6 @@ do{ asm volatile ( \ #define __emulate_1op_8byte(op, dst, eflags, extra...) #endif /* __i386__ */ -#ifdef __XEN__ -# define invoke_stub(pre, post, constraints...) do { \ - stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \ - stub_exn.line = __LINE__; /* Utility outweighs livepatching cost */ \ - block_speculation(); /* SCSB */ \ - asm volatile ( pre "\n\tINDIRECT_CALL %[stub]\n\t" post "\n" \ - ".Lret%=:\n\t" \ - ".pushsection .fixup,\"ax\"\n" \ - ".Lfix%=:\n\t" \ - "pop %[exn]\n\t" \ - "jmp .Lret%=\n\t" \ - ".popsection\n\t" \ - _ASM_EXTABLE(.Lret%=, .Lfix%=) \ - : [exn] "+g" (stub_exn.info) ASM_CALL_CONSTRAINT, \ - constraints, \ - [stub] "r" (stub.func), \ - "m" (*(uint8_t(*)[MAX_INST_LEN + 1])stub.ptr) ); \ - if ( unlikely(~stub_exn.info.raw) ) \ - goto emulation_stub_failure; \ -} while (0) -#else -# define invoke_stub(pre, post, constraints...) \ - asm volatile ( pre "\n\tcall *%[stub]\n\t" post \ - : constraints, [stub] "rm" (stub.func), \ - "m" (*(typeof(stub.buf) *)stub.addr) ) -#endif - #define emulate_stub(dst, src...) do { \ unsigned long tmp; \ invoke_stub(_PRE_EFLAGS("[efl]", "[msk]", "[tmp]"), \ @@ -1162,54 +1045,6 @@ static void put_fpu( ops->put_fpu(ctxt, X86EMUL_FPU_none, NULL); } -static inline bool fpu_check_write(void) -{ - uint16_t fsw; - - asm ( "fnstsw %0" : "=am" (fsw) ); - - return !(fsw & FSW_ES); -} - -#define emulate_fpu_insn_memdst(opc, ext, arg) \ -do { \ - /* ModRM: mod=0, reg=ext, rm=0, i.e. a (%rax) operand */ \ - insn_bytes = 2; \ - memcpy(get_stub(stub), \ - ((uint8_t[]){ opc, ((ext) & 7) << 3, 0xc3 }), 3); \ - invoke_stub("", "", "+m" (arg) : "a" (&(arg))); \ - put_stub(stub); \ -} while (0) - -#define emulate_fpu_insn_memsrc(opc, ext, arg) \ -do { \ - /* ModRM: mod=0, reg=ext, rm=0, i.e. a (%rax) operand */ \ - memcpy(get_stub(stub), \ - ((uint8_t[]){ opc, ((ext) & 7) << 3, 0xc3 }), 3); \ - invoke_stub("", "", "=m" (dummy) : "m" (arg), "a" (&(arg))); \ - put_stub(stub); \ -} while (0) - -#define emulate_fpu_insn_stub(bytes...) \ -do { \ - unsigned int nr_ = sizeof((uint8_t[]){ bytes }); \ - memcpy(get_stub(stub), ((uint8_t[]){ bytes, 0xc3 }), nr_ + 1); \ - invoke_stub("", "", "=m" (dummy) : "i" (0)); \ - put_stub(stub); \ -} while (0) - -#define emulate_fpu_insn_stub_eflags(bytes...) \ -do { \ - unsigned int nr_ = sizeof((uint8_t[]){ bytes }); \ - unsigned long tmp_; \ - memcpy(get_stub(stub), ((uint8_t[]){ bytes, 0xc3 }), nr_ + 1); \ - invoke_stub(_PRE_EFLAGS("[eflags]", "[mask]", "[tmp]"), \ - _POST_EFLAGS("[eflags]", "[mask]", "[tmp]"), \ - [eflags] "+g" (_regs.eflags), [tmp] "=&r" (tmp_) \ - : [mask] "i" (X86_EFLAGS_ZF|X86_EFLAGS_PF|X86_EFLAGS_CF)); \ - put_stub(stub); \ -} while (0) - static inline unsigned long get_loop_count( const struct cpu_user_regs *regs, int ad_bytes) @@ -3154,12 +2989,7 @@ x86_emulate( enum x86_emulate_fpu_type fpu_type = X86EMUL_FPU_none; struct x86_emulate_stub stub = {}; DECLARE_ALIGNED(mmval_t, mmval); -#ifdef __XEN__ - struct { - union stub_exception_token info; - unsigned int line; - } stub_exn; -#endif + struct stub_exn stub_exn = {}; ASSERT(ops->read); @@ -3952,10 +3782,10 @@ x86_emulate( #ifndef X86EMUL_NO_FPU case 0x9b: /* wait/fwait */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_wait); - emulate_fpu_insn_stub(b); - break; + case 0xd8 ... 0xdf: /* FPU */ + rc = x86emul_fpu(state, &_regs, &dst, &src, ctxt, ops, + &insn_bytes, &fpu_type, &stub_exn, mmvalp); + goto dispatch_from_helper; #endif case 0x9c: /* pushf */ @@ -4366,373 +4196,6 @@ x86_emulate( break; } -#ifndef X86EMUL_NO_FPU - case 0xd8: /* FPU 0xd8 */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* fadd %stN,%st */ - case 0xc8 ... 0xcf: /* fmul %stN,%st */ - case 0xd0 ... 0xd7: /* fcom %stN,%st */ - case 0xd8 ... 0xdf: /* fcomp %stN,%st */ - case 0xe0 ... 0xe7: /* fsub %stN,%st */ - case 0xe8 ... 0xef: /* fsubr %stN,%st */ - case 0xf0 ... 0xf7: /* fdiv %stN,%st */ - case 0xf8 ... 0xff: /* fdivr %stN,%st */ - emulate_fpu_insn_stub(0xd8, modrm); - break; - default: - fpu_memsrc32: - ASSERT(ea.type == OP_MEM); - if ( (rc = ops->read(ea.mem.seg, ea.mem.off, &src.val, - 4, ctxt)) != X86EMUL_OKAY ) - goto done; - emulate_fpu_insn_memsrc(b, modrm_reg & 7, src.val); - break; - } - break; - - case 0xd9: /* FPU 0xd9 */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xfb: /* fsincos */ - fail_if(cpu_has_amd_erratum(573)); - /* fall through */ - case 0xc0 ... 0xc7: /* fld %stN */ - case 0xc8 ... 0xcf: /* fxch %stN */ - case 0xd0: /* fnop */ - case 0xd8 ... 0xdf: /* fstp %stN (alternative encoding) */ - case 0xe0: /* fchs */ - case 0xe1: /* fabs */ - case 0xe4: /* ftst */ - case 0xe5: /* fxam */ - case 0xe8: /* fld1 */ - case 0xe9: /* fldl2t */ - case 0xea: /* fldl2e */ - case 0xeb: /* fldpi */ - case 0xec: /* fldlg2 */ - case 0xed: /* fldln2 */ - case 0xee: /* fldz */ - case 0xf0: /* f2xm1 */ - case 0xf1: /* fyl2x */ - case 0xf2: /* fptan */ - case 0xf3: /* fpatan */ - case 0xf4: /* fxtract */ - case 0xf5: /* fprem1 */ - case 0xf6: /* fdecstp */ - case 0xf7: /* fincstp */ - case 0xf8: /* fprem */ - case 0xf9: /* fyl2xp1 */ - case 0xfa: /* fsqrt */ - case 0xfc: /* frndint */ - case 0xfd: /* fscale */ - case 0xfe: /* fsin */ - case 0xff: /* fcos */ - emulate_fpu_insn_stub(0xd9, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - switch ( modrm_reg & 7 ) - { - case 0: /* fld m32fp */ - goto fpu_memsrc32; - case 2: /* fst m32fp */ - case 3: /* fstp m32fp */ - fpu_memdst32: - dst = ea; - dst.bytes = 4; - emulate_fpu_insn_memdst(b, modrm_reg & 7, dst.val); - break; - case 4: /* fldenv */ - /* Raise #MF now if there are pending unmasked exceptions. */ - emulate_fpu_insn_stub(0xd9, 0xd0 /* fnop */); - /* fall through */ - case 6: /* fnstenv */ - fail_if(!ops->blk); - state->blk = modrm_reg & 2 ? blk_fst : blk_fld; - /* - * REX is meaningless for these insns by this point - (ab)use - * the field to communicate real vs protected mode to ->blk(). - */ - /*state->*/rex_prefix = in_protmode(ctxt, ops); - if ( (rc = ops->blk(ea.mem.seg, ea.mem.off, NULL, - op_bytes > 2 ? sizeof(struct x87_env32) - : sizeof(struct x87_env16), - &_regs.eflags, - state, ctxt)) != X86EMUL_OKAY ) - goto done; - state->fpu_ctrl = true; - break; - case 5: /* fldcw m2byte */ - state->fpu_ctrl = true; - fpu_memsrc16: - if ( (rc = ops->read(ea.mem.seg, ea.mem.off, &src.val, - 2, ctxt)) != X86EMUL_OKAY ) - goto done; - emulate_fpu_insn_memsrc(b, modrm_reg & 7, src.val); - break; - case 7: /* fnstcw m2byte */ - state->fpu_ctrl = true; - fpu_memdst16: - dst = ea; - dst.bytes = 2; - emulate_fpu_insn_memdst(b, modrm_reg & 7, dst.val); - break; - default: - generate_exception(EXC_UD); - } - /* - * Control instructions can't raise FPU exceptions, so we need - * to consider suppressing writes only for non-control ones. - */ - if ( dst.type == OP_MEM && !state->fpu_ctrl && !fpu_check_write() ) - dst.type = OP_NONE; - } - break; - - case 0xda: /* FPU 0xda */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* fcmovb %stN */ - case 0xc8 ... 0xcf: /* fcmove %stN */ - case 0xd0 ... 0xd7: /* fcmovbe %stN */ - case 0xd8 ... 0xdf: /* fcmovu %stN */ - vcpu_must_have(cmov); - emulate_fpu_insn_stub_eflags(0xda, modrm); - break; - case 0xe9: /* fucompp */ - emulate_fpu_insn_stub(0xda, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - goto fpu_memsrc32; - } - break; - - case 0xdb: /* FPU 0xdb */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* fcmovnb %stN */ - case 0xc8 ... 0xcf: /* fcmovne %stN */ - case 0xd0 ... 0xd7: /* fcmovnbe %stN */ - case 0xd8 ... 0xdf: /* fcmovnu %stN */ - case 0xe8 ... 0xef: /* fucomi %stN */ - case 0xf0 ... 0xf7: /* fcomi %stN */ - vcpu_must_have(cmov); - emulate_fpu_insn_stub_eflags(0xdb, modrm); - break; - case 0xe0: /* fneni - 8087 only, ignored by 287 */ - case 0xe1: /* fndisi - 8087 only, ignored by 287 */ - case 0xe2: /* fnclex */ - case 0xe3: /* fninit */ - case 0xe4: /* fnsetpm - 287 only, ignored by 387 */ - /* case 0xe5: frstpm - 287 only, #UD on 387 */ - state->fpu_ctrl = true; - emulate_fpu_insn_stub(0xdb, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - switch ( modrm_reg & 7 ) - { - case 0: /* fild m32i */ - goto fpu_memsrc32; - case 1: /* fisttp m32i */ - host_and_vcpu_must_have(sse3); - /* fall through */ - case 2: /* fist m32i */ - case 3: /* fistp m32i */ - goto fpu_memdst32; - case 5: /* fld m80fp */ - fpu_memsrc80: - if ( (rc = ops->read(ea.mem.seg, ea.mem.off, mmvalp, - 10, ctxt)) != X86EMUL_OKAY ) - goto done; - emulate_fpu_insn_memsrc(b, modrm_reg & 7, *mmvalp); - break; - case 7: /* fstp m80fp */ - fpu_memdst80: - fail_if(!ops->write); - emulate_fpu_insn_memdst(b, modrm_reg & 7, *mmvalp); - if ( fpu_check_write() && - (rc = ops->write(ea.mem.seg, ea.mem.off, mmvalp, - 10, ctxt)) != X86EMUL_OKAY ) - goto done; - break; - default: - generate_exception(EXC_UD); - } - } - break; - - case 0xdc: /* FPU 0xdc */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* fadd %st,%stN */ - case 0xc8 ... 0xcf: /* fmul %st,%stN */ - case 0xd0 ... 0xd7: /* fcom %stN,%st (alternative encoding) */ - case 0xd8 ... 0xdf: /* fcomp %stN,%st (alternative encoding) */ - case 0xe0 ... 0xe7: /* fsubr %st,%stN */ - case 0xe8 ... 0xef: /* fsub %st,%stN */ - case 0xf0 ... 0xf7: /* fdivr %st,%stN */ - case 0xf8 ... 0xff: /* fdiv %st,%stN */ - emulate_fpu_insn_stub(0xdc, modrm); - break; - default: - fpu_memsrc64: - ASSERT(ea.type == OP_MEM); - if ( (rc = ops->read(ea.mem.seg, ea.mem.off, &src.val, - 8, ctxt)) != X86EMUL_OKAY ) - goto done; - emulate_fpu_insn_memsrc(b, modrm_reg & 7, src.val); - break; - } - break; - - case 0xdd: /* FPU 0xdd */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* ffree %stN */ - case 0xc8 ... 0xcf: /* fxch %stN (alternative encoding) */ - case 0xd0 ... 0xd7: /* fst %stN */ - case 0xd8 ... 0xdf: /* fstp %stN */ - case 0xe0 ... 0xe7: /* fucom %stN */ - case 0xe8 ... 0xef: /* fucomp %stN */ - emulate_fpu_insn_stub(0xdd, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - switch ( modrm_reg & 7 ) - { - case 0: /* fld m64fp */; - goto fpu_memsrc64; - case 1: /* fisttp m64i */ - host_and_vcpu_must_have(sse3); - /* fall through */ - case 2: /* fst m64fp */ - case 3: /* fstp m64fp */ - fpu_memdst64: - dst = ea; - dst.bytes = 8; - emulate_fpu_insn_memdst(b, modrm_reg & 7, dst.val); - break; - case 4: /* frstor */ - /* Raise #MF now if there are pending unmasked exceptions. */ - emulate_fpu_insn_stub(0xd9, 0xd0 /* fnop */); - /* fall through */ - case 6: /* fnsave */ - fail_if(!ops->blk); - state->blk = modrm_reg & 2 ? blk_fst : blk_fld; - /* - * REX is meaningless for these insns by this point - (ab)use - * the field to communicate real vs protected mode to ->blk(). - */ - /*state->*/rex_prefix = in_protmode(ctxt, ops); - if ( (rc = ops->blk(ea.mem.seg, ea.mem.off, NULL, - op_bytes > 2 ? sizeof(struct x87_env32) + 80 - : sizeof(struct x87_env16) + 80, - &_regs.eflags, - state, ctxt)) != X86EMUL_OKAY ) - goto done; - state->fpu_ctrl = true; - break; - case 7: /* fnstsw m2byte */ - state->fpu_ctrl = true; - goto fpu_memdst16; - default: - generate_exception(EXC_UD); - } - /* - * Control instructions can't raise FPU exceptions, so we need - * to consider suppressing writes only for non-control ones. - */ - if ( dst.type == OP_MEM && !state->fpu_ctrl && !fpu_check_write() ) - dst.type = OP_NONE; - } - break; - - case 0xde: /* FPU 0xde */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xc0 ... 0xc7: /* faddp %stN */ - case 0xc8 ... 0xcf: /* fmulp %stN */ - case 0xd0 ... 0xd7: /* fcomp %stN (alternative encoding) */ - case 0xd9: /* fcompp */ - case 0xe0 ... 0xe7: /* fsubrp %stN */ - case 0xe8 ... 0xef: /* fsubp %stN */ - case 0xf0 ... 0xf7: /* fdivrp %stN */ - case 0xf8 ... 0xff: /* fdivp %stN */ - emulate_fpu_insn_stub(0xde, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - emulate_fpu_insn_memsrc(b, modrm_reg & 7, src.val); - break; - } - break; - - case 0xdf: /* FPU 0xdf */ - host_and_vcpu_must_have(fpu); - get_fpu(X86EMUL_FPU_fpu); - switch ( modrm ) - { - case 0xe0: - /* fnstsw %ax */ - state->fpu_ctrl = true; - dst.bytes = 2; - dst.type = OP_REG; - dst.reg = (void *)&_regs.ax; - emulate_fpu_insn_memdst(b, modrm_reg & 7, dst.val); - break; - case 0xe8 ... 0xef: /* fucomip %stN */ - case 0xf0 ... 0xf7: /* fcomip %stN */ - vcpu_must_have(cmov); - emulate_fpu_insn_stub_eflags(0xdf, modrm); - break; - case 0xc0 ... 0xc7: /* ffreep %stN */ - case 0xc8 ... 0xcf: /* fxch %stN (alternative encoding) */ - case 0xd0 ... 0xd7: /* fstp %stN (alternative encoding) */ - case 0xd8 ... 0xdf: /* fstp %stN (alternative encoding) */ - emulate_fpu_insn_stub(0xdf, modrm); - break; - default: - generate_exception_if(ea.type != OP_MEM, EXC_UD); - switch ( modrm_reg & 7 ) - { - case 0: /* fild m16i */ - goto fpu_memsrc16; - case 1: /* fisttp m16i */ - host_and_vcpu_must_have(sse3); - /* fall through */ - case 2: /* fist m16i */ - case 3: /* fistp m16i */ - goto fpu_memdst16; - case 4: /* fbld m80dec */ - goto fpu_memsrc80; - case 5: /* fild m64i */ - dst.type = OP_NONE; - goto fpu_memsrc64; - case 6: /* fbstp packed bcd */ - goto fpu_memdst80; - case 7: /* fistp m64i */ - goto fpu_memdst64; - } - } - break; -#endif /* !X86EMUL_NO_FPU */ - case 0xe0 ... 0xe2: /* loop{,z,nz} */ { unsigned long count = get_loop_count(&_regs, ad_bytes); int do_jmp = !(_regs.eflags & X86_EFLAGS_ZF); /* loopnz */ @@ -10161,6 +9624,11 @@ x86_emulate( { case X86EMUL_rdtsc: goto rdtsc; + +#ifdef __XEN__ + case X86EMUL_stub_failure: + goto emulation_stub_failure; +#endif } /* Internally used state change indicators may not make it here. */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517633.803258 (Exim 4.92) (envelope-from ) id 1pjY1J-0003tO-0W; Tue, 04 Apr 2023 04:11:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517633.803258; Tue, 04 Apr 2023 04:11:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1I-0003tH-TR; Tue, 04 Apr 2023 04:11:44 +0000 Received: by outflank-mailman (input) for mailman id 517633; Tue, 04 Apr 2023 04:11:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1H-0003sm-4J for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1H-000699-3C for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY1H-0007Sc-27 for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=shxUncjtoqrBs7RqdyB+l54Q7e+0T8rYxuCAErhfV6A=; b=chGrpqvCBGqiXUJHe/R6p4hNts Z5+Kg8lFIipBU/fB41yR0RzMVL8webnSh53rGlvs3wWq8zwg7UxnxNwdclu9a6iLr6KbU00GE7aeI ZX/3365qbPWTYAauTgPE7EvBetkOPreRpaUjFOM9aHiRIWw6/Gw4z9JV8Q4fkHzalw5U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: split off insn decoding Message-Id: Date: Tue, 04 Apr 2023 04:11:43 +0000 commit 1939403104965b091feb7712430ec5d7645a8d30 Author: Jan Beulich AuthorDate: Mon Apr 3 12:46:08 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:46:08 2023 +0200 x86emul: split off insn decoding This is a fair chunk of code and data and can easily live separate from the main emulation function. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.c | 5 - tools/tests/x86_emulator/x86-emulate.h | 3 + xen/arch/x86/x86_emulate.c | 1 - xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/decode.c | 1749 +++++++++++++++++++++ xen/arch/x86/x86_emulate/private.h | 33 + xen/arch/x86/x86_emulate/x86_emulate.c | 2084 ++------------------------ 9 files changed, 1951 insertions(+), 1929 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 265a64d787..47e7eb04b7 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -33,7 +33,7 @@ GCOV_FLAGS := --coverage OBJS := fuzz-emul.o x86-emulate.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o -OBJS += x86_emulate/fpu.o +OBJS += x86_emulate/decode.o x86_emulate/fpu.o x86-emulate.h: x86_emulate/x86_emulate.h x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index dc97c3a63b..0b28ed08f5 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -252,7 +252,7 @@ endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o -OBJS += x86_emulate/fpu.o +OBJS += x86_emulate/decode.o x86_emulate/fpu.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 02705bd775..82e82b3171 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -3,11 +3,6 @@ #include #include -#define DEFINE_PER_CPU(type, var) type per_cpu_##var -#define this_cpu(var) per_cpu_##var - -#define ERR_PTR(val) NULL - /* See gcc bug 100680, but here don't bother making this version dependent. */ #define gcc11_wrap(x) ({ \ unsigned long x_; \ diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 296e8e280c..eff46e22c8 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -48,6 +48,9 @@ #define ASSERT assert #define ASSERT_UNREACHABLE() assert(!__LINE__) +#define DEFINE_PER_CPU(type, var) type per_cpu_##var +#define this_cpu(var) per_cpu_##var + #define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m))) #define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m)) diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index c241ada5cb..8f986186c1 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -9,7 +9,6 @@ * Keir Fraser */ -#include #include #include diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index db26838ede..223c78c0c5 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -1,4 +1,5 @@ obj-y += 0f01.o obj-y += 0fae.o obj-y += 0fc7.o +obj-y += decode.o obj-$(CONFIG_HVM) += fpu.o diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c new file mode 100644 index 0000000000..ee7cd724b1 --- /dev/null +++ b/xen/arch/x86/x86_emulate/decode.c @@ -0,0 +1,1749 @@ +/****************************************************************************** + * decode.c - helper for x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * Copyright (c) 2005-2007 Keir Fraser + * Copyright (c) 2005-2007 XenSource Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#ifdef __XEN__ +# include +#else +# define ERR_PTR(val) NULL +#endif + +#define evex_encoded() (s->evex.mbs) + +struct x86_emulate_state * +x86_decode_insn( + struct x86_emulate_ctxt *ctxt, + int (*insn_fetch)( + unsigned long offset, void *p_data, unsigned int bytes, + struct x86_emulate_ctxt *ctxt)) +{ + static DEFINE_PER_CPU(struct x86_emulate_state, state); + struct x86_emulate_state *s = &this_cpu(state); + const struct x86_emulate_ops ops = { + .insn_fetch = insn_fetch, + .read = x86emul_unhandleable_rw, + }; + int rc; + + init_context(ctxt); + + rc = x86emul_decode(s, ctxt, &ops); + if ( unlikely(rc != X86EMUL_OKAY) ) + return ERR_PTR(-rc); + +#if defined(__XEN__) && !defined(NDEBUG) + /* + * While we avoid memory allocation (by use of per-CPU data) above, + * nevertheless make sure callers properly release the state structure + * for forward compatibility. + */ + if ( s->caller ) + { + printk(XENLOG_ERR "Unreleased emulation state acquired by %ps\n", + s->caller); + dump_execution_state(); + } + s->caller = __builtin_return_address(0); +#endif + + return s; +} + +static const opcode_desc_t opcode_table[256] = { + /* 0x00 - 0x07 */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, + /* 0x08 - 0x0F */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, 0, + /* 0x10 - 0x17 */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, + /* 0x18 - 0x1F */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, + /* 0x20 - 0x27 */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, + /* 0x28 - 0x2F */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, + /* 0x30 - 0x37 */ + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, + /* 0x38 - 0x3F */ + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, + /* 0x40 - 0x4F */ + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + /* 0x50 - 0x5F */ + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, + /* 0x60 - 0x67 */ + ImplicitOps, ImplicitOps, DstReg|SrcMem|ModRM, DstReg|SrcNone|ModRM|Mov, + 0, 0, 0, 0, + /* 0x68 - 0x6F */ + DstImplicit|SrcImm|Mov, DstReg|SrcImm|ModRM|Mov, + DstImplicit|SrcImmByte|Mov, DstReg|SrcImmByte|ModRM|Mov, + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, + /* 0x70 - 0x77 */ + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + /* 0x78 - 0x7F */ + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + /* 0x80 - 0x87 */ + ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImm|ModRM, + ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImmByte|ModRM, + ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, + ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, + /* 0x88 - 0x8F */ + ByteOp|DstMem|SrcReg|ModRM|Mov, DstMem|SrcReg|ModRM|Mov, + ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov, + DstMem|SrcReg|ModRM|Mov, DstReg|SrcNone|ModRM, + DstReg|SrcMem16|ModRM|Mov, DstMem|SrcNone|ModRM|Mov, + /* 0x90 - 0x97 */ + DstImplicit|SrcEax, DstImplicit|SrcEax, + DstImplicit|SrcEax, DstImplicit|SrcEax, + DstImplicit|SrcEax, DstImplicit|SrcEax, + DstImplicit|SrcEax, DstImplicit|SrcEax, + /* 0x98 - 0x9F */ + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps, ImplicitOps, + /* 0xA0 - 0xA7 */ + ByteOp|DstEax|SrcMem|Mov, DstEax|SrcMem|Mov, + ByteOp|DstMem|SrcEax|Mov, DstMem|SrcEax|Mov, + ByteOp|ImplicitOps|Mov, ImplicitOps|Mov, + ByteOp|ImplicitOps, ImplicitOps, + /* 0xA8 - 0xAF */ + ByteOp|DstEax|SrcImm, DstEax|SrcImm, + ByteOp|DstImplicit|SrcEax|Mov, DstImplicit|SrcEax|Mov, + ByteOp|DstEax|SrcImplicit|Mov, DstEax|SrcImplicit|Mov, + ByteOp|DstImplicit|SrcEax, DstImplicit|SrcEax, + /* 0xB0 - 0xB7 */ + ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, + ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, + ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, + ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, + /* 0xB8 - 0xBF */ + DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, + DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, + /* 0xC0 - 0xC7 */ + ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImmByte|ModRM, + DstImplicit|SrcImm16, ImplicitOps, + DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov, + ByteOp|DstMem|SrcImm|ModRM|Mov, DstMem|SrcImm|ModRM|Mov, + /* 0xC8 - 0xCF */ + DstImplicit|SrcImm16, ImplicitOps, DstImplicit|SrcImm16, ImplicitOps, + ImplicitOps, DstImplicit|SrcImmByte, ImplicitOps, ImplicitOps, + /* 0xD0 - 0xD7 */ + ByteOp|DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM, + ByteOp|DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, ImplicitOps, ImplicitOps, + /* 0xD8 - 0xDF */ + ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, + ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, + ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, + DstImplicit|SrcMem16|ModRM, ImplicitOps|ModRM|Mov, + /* 0xE0 - 0xE7 */ + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + DstEax|SrcImmByte, DstEax|SrcImmByte, + DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, + /* 0xE8 - 0xEF */ + DstImplicit|SrcImm|Mov, DstImplicit|SrcImm, + ImplicitOps, DstImplicit|SrcImmByte, + DstEax|SrcImplicit, DstEax|SrcImplicit, ImplicitOps, ImplicitOps, + /* 0xF0 - 0xF7 */ + 0, ImplicitOps, 0, 0, + ImplicitOps, ImplicitOps, ByteOp|ModRM, ModRM, + /* 0xF8 - 0xFF */ + ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, + ImplicitOps, ImplicitOps, ByteOp|DstMem|SrcNone|ModRM, DstMem|SrcNone|ModRM +}; + +static const struct twobyte_table { + opcode_desc_t desc; + simd_opsize_t size:4; + disp8scale_t d8s:4; +} twobyte_table[256] = { + [0x00] = { ModRM }, + [0x01] = { ImplicitOps|ModRM }, + [0x02] = { DstReg|SrcMem16|ModRM }, + [0x03] = { DstReg|SrcMem16|ModRM }, + [0x05] = { ImplicitOps }, + [0x06] = { ImplicitOps }, + [0x07] = { ImplicitOps }, + [0x08] = { ImplicitOps }, + [0x09] = { ImplicitOps }, + [0x0b] = { ImplicitOps }, + [0x0d] = { ImplicitOps|ModRM }, + [0x0e] = { ImplicitOps }, + [0x0f] = { ModRM|SrcImmByte }, + [0x10] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl }, + [0x11] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl }, + [0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, + [0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, + [0x14 ... 0x15] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl }, + [0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, + [0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, + [0x18 ... 0x1f] = { ImplicitOps|ModRM }, + [0x20 ... 0x21] = { DstMem|SrcImplicit|ModRM }, + [0x22 ... 0x23] = { DstImplicit|SrcMem|ModRM }, + [0x28] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, + [0x29] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_fp, d8s_vl }, + [0x2a] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_dq64 }, + [0x2b] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl }, + [0x2c ... 0x2d] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, + [0x2e ... 0x2f] = { ImplicitOps|ModRM|TwoOp, simd_none, d8s_dq }, + [0x30 ... 0x35] = { ImplicitOps }, + [0x37] = { ImplicitOps }, + [0x38] = { DstReg|SrcMem|ModRM }, + [0x3a] = { DstReg|SrcImmByte|ModRM }, + [0x40 ... 0x4f] = { DstReg|SrcMem|ModRM|Mov }, + [0x50] = { DstReg|SrcImplicit|ModRM|Mov }, + [0x51] = { DstImplicit|SrcMem|ModRM|TwoOp, simd_any_fp, d8s_vl }, + [0x52 ... 0x53] = { DstImplicit|SrcMem|ModRM|TwoOp, simd_single_fp }, + [0x54 ... 0x57] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl }, + [0x58 ... 0x59] = { DstImplicit|SrcMem|ModRM, simd_any_fp, d8s_vl }, + [0x5a] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl }, + [0x5b] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, + [0x5c ... 0x5f] = { DstImplicit|SrcMem|ModRM, simd_any_fp, d8s_vl }, + [0x60 ... 0x62] = { DstImplicit|SrcMem|ModRM, simd_other, d8s_vl }, + [0x63 ... 0x67] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0x68 ... 0x6a] = { DstImplicit|SrcMem|ModRM, simd_other, d8s_vl }, + [0x6b ... 0x6d] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0x6e] = { DstImplicit|SrcMem|ModRM|Mov, simd_none, d8s_dq64 }, + [0x6f] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_int, d8s_vl }, + [0x70] = { SrcImmByte|ModRM|TwoOp, simd_other, d8s_vl }, + [0x71 ... 0x73] = { DstImplicit|SrcImmByte|ModRM, simd_none, d8s_vl }, + [0x74 ... 0x76] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0x77] = { DstImplicit|SrcNone }, + [0x78 ... 0x79] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_vl }, + [0x7a] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, + [0x7b] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_dq64 }, + [0x7c ... 0x7d] = { DstImplicit|SrcMem|ModRM, simd_other }, + [0x7e] = { DstMem|SrcImplicit|ModRM|Mov, simd_none, d8s_dq64 }, + [0x7f] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_int, d8s_vl }, + [0x80 ... 0x8f] = { DstImplicit|SrcImm }, + [0x90 ... 0x9f] = { ByteOp|DstMem|SrcNone|ModRM|Mov }, + [0xa0 ... 0xa1] = { ImplicitOps|Mov }, + [0xa2] = { ImplicitOps }, + [0xa3] = { DstBitBase|SrcReg|ModRM }, + [0xa4] = { DstMem|SrcImmByte|ModRM }, + [0xa5] = { DstMem|SrcReg|ModRM }, + [0xa6 ... 0xa7] = { ModRM }, + [0xa8 ... 0xa9] = { ImplicitOps|Mov }, + [0xaa] = { ImplicitOps }, + [0xab] = { DstBitBase|SrcReg|ModRM }, + [0xac] = { DstMem|SrcImmByte|ModRM }, + [0xad] = { DstMem|SrcReg|ModRM }, + [0xae] = { ImplicitOps|ModRM }, + [0xaf] = { DstReg|SrcMem|ModRM }, + [0xb0] = { ByteOp|DstMem|SrcReg|ModRM }, + [0xb1] = { DstMem|SrcReg|ModRM }, + [0xb2] = { DstReg|SrcMem|ModRM|Mov }, + [0xb3] = { DstBitBase|SrcReg|ModRM }, + [0xb4 ... 0xb5] = { DstReg|SrcMem|ModRM|Mov }, + [0xb6] = { ByteOp|DstReg|SrcMem|ModRM|Mov }, + [0xb7] = { DstReg|SrcMem16|ModRM|Mov }, + [0xb8] = { DstReg|SrcMem|ModRM }, + [0xb9] = { ModRM }, + [0xba] = { DstBitBase|SrcImmByte|ModRM }, + [0xbb] = { DstBitBase|SrcReg|ModRM }, + [0xbc ... 0xbd] = { DstReg|SrcMem|ModRM }, + [0xbe] = { ByteOp|DstReg|SrcMem|ModRM|Mov }, + [0xbf] = { DstReg|SrcMem16|ModRM|Mov }, + [0xc0] = { ByteOp|DstMem|SrcReg|ModRM }, + [0xc1] = { DstMem|SrcReg|ModRM }, + [0xc2] = { DstImplicit|SrcImmByte|ModRM, simd_any_fp, d8s_vl }, + [0xc3] = { DstMem|SrcReg|ModRM|Mov }, + [0xc4] = { DstImplicit|SrcImmByte|ModRM, simd_none, 1 }, + [0xc5] = { DstReg|SrcImmByte|ModRM|Mov }, + [0xc6] = { DstImplicit|SrcImmByte|ModRM, simd_packed_fp, d8s_vl }, + [0xc7] = { ImplicitOps|ModRM }, + [0xc8 ... 0xcf] = { ImplicitOps }, + [0xd0] = { DstImplicit|SrcMem|ModRM, simd_other }, + [0xd1 ... 0xd3] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, + [0xd4 ... 0xd5] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xd6] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, + [0xd7] = { DstReg|SrcImplicit|ModRM|Mov }, + [0xd8 ... 0xdf] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xe0] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xe1 ... 0xe2] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, + [0xe3 ... 0xe5] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xe6] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, + [0xe7] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_int, d8s_vl }, + [0xe8 ... 0xef] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xf0] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, + [0xf1 ... 0xf3] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, + [0xf4 ... 0xf6] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xf7] = { DstMem|SrcMem|ModRM|Mov, simd_packed_int }, + [0xf8 ... 0xfe] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, + [0xff] = { ModRM } +}; + +/* + * "two_op" and "four_op" below refer to the number of register operands + * (one of which possibly also allowing to be a memory one). The named + * operand counts do not include any immediate operands. + */ +static const struct ext0f38_table { + uint8_t simd_size:5; + uint8_t to_mem:1; + uint8_t two_op:1; + uint8_t vsib:1; + disp8scale_t d8s:4; +} ext0f38_table[256] = { + [0x00] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x01 ... 0x03] = { .simd_size = simd_packed_int }, + [0x04] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x05 ... 0x0a] = { .simd_size = simd_packed_int }, + [0x0b] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x0c ... 0x0d] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x0e ... 0x0f] = { .simd_size = simd_packed_fp }, + [0x10 ... 0x12] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x13] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x14 ... 0x16] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x17] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0x18] = { .simd_size = simd_scalar_opc, .two_op = 1, .d8s = 2 }, + [0x19] = { .simd_size = simd_scalar_opc, .two_op = 1, .d8s = 3 }, + [0x1a] = { .simd_size = simd_128, .two_op = 1, .d8s = 4 }, + [0x1b] = { .simd_size = simd_256, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x1c ... 0x1f] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0x20] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x21] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, + [0x22] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_8 }, + [0x23] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x24] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, + [0x25] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x26 ... 0x29] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x2a] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0x2b] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x2c] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x2d] = { .simd_size = simd_packed_fp, .d8s = d8s_dq }, + [0x2e ... 0x2f] = { .simd_size = simd_packed_fp, .to_mem = 1 }, + [0x30] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x31] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, + [0x32] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_8 }, + [0x33] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x34] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, + [0x35] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x36 ... 0x3f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x40] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x41] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0x42] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x43] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x44] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0x45 ... 0x47] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x4c] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x4d] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x4e] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x4f] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x50 ... 0x53] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x54 ... 0x55] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0x58] = { .simd_size = simd_other, .two_op = 1, .d8s = 2 }, + [0x59] = { .simd_size = simd_other, .two_op = 1, .d8s = 3 }, + [0x5a] = { .simd_size = simd_128, .two_op = 1, .d8s = 4 }, + [0x5b] = { .simd_size = simd_256, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x62] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_bw }, + [0x63] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_bw }, + [0x64 ... 0x66] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x68] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x70 ... 0x73] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x75 ... 0x76] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x77] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x78] = { .simd_size = simd_other, .two_op = 1 }, + [0x79] = { .simd_size = simd_other, .two_op = 1, .d8s = 1 }, + [0x7a ... 0x7c] = { .simd_size = simd_none, .two_op = 1 }, + [0x7d ... 0x7e] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x7f] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x82] = { .simd_size = simd_other }, + [0x83] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x88] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_dq }, + [0x89] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_dq }, + [0x8a] = { .simd_size = simd_packed_fp, .to_mem = 1, .two_op = 1, .d8s = d8s_dq }, + [0x8b] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_dq }, + [0x8c] = { .simd_size = simd_packed_int }, + [0x8d] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x8e] = { .simd_size = simd_packed_int, .to_mem = 1 }, + [0x8f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x90 ... 0x93] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq }, + [0x96 ... 0x98] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x99] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x9a] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x9b] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x9c] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x9d] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x9e] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x9f] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xa0 ... 0xa3] = { .simd_size = simd_other, .to_mem = 1, .vsib = 1, .d8s = d8s_dq }, + [0xa6 ... 0xa8] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xa9] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xaa] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xab] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xac] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xad] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xae] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xaf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xb4 ... 0xb5] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0xb6 ... 0xb8] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xb9] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xba] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xbb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xbc] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xbd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xbe] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0xbf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xc4] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0xc6 ... 0xc7] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq }, + [0xc8] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0xc9] = { .simd_size = simd_other }, + [0xca] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0xcb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xcc] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0xcd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0xdb] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xdc ... 0xdf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0xf0] = { .two_op = 1 }, + [0xf1] = { .to_mem = 1, .two_op = 1 }, + [0xf2 ... 0xf3] = {}, + [0xf5 ... 0xf7] = {}, + [0xf8] = { .simd_size = simd_other }, + [0xf9] = { .to_mem = 1, .two_op = 1 /* Mov */ }, +}; + +static const struct ext0f3a_table { + uint8_t simd_size:5; + uint8_t to_mem:1; + uint8_t two_op:1; + uint8_t four_op:1; + disp8scale_t d8s:4; +} ext0f3a_table[256] = { + [0x00] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, + [0x01] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x02] = { .simd_size = simd_packed_int }, + [0x03] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x04 ... 0x05] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x06] = { .simd_size = simd_packed_fp }, + [0x08 ... 0x09] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x0a ... 0x0b] = { .simd_size = simd_scalar_opc, .d8s = d8s_dq }, + [0x0c ... 0x0d] = { .simd_size = simd_packed_fp }, + [0x0e] = { .simd_size = simd_packed_int }, + [0x0f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x14] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 0 }, + [0x15] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 1 }, + [0x16] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = d8s_dq64 }, + [0x17] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 2 }, + [0x18] = { .simd_size = simd_128, .d8s = 4 }, + [0x19] = { .simd_size = simd_128, .to_mem = 1, .two_op = 1, .d8s = 4 }, + [0x1a] = { .simd_size = simd_256, .d8s = d8s_vl_by_2 }, + [0x1b] = { .simd_size = simd_256, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x1d] = { .simd_size = simd_other, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x1e ... 0x1f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x20] = { .simd_size = simd_none, .d8s = 0 }, + [0x21] = { .simd_size = simd_other, .d8s = 2 }, + [0x22] = { .simd_size = simd_none, .d8s = d8s_dq64 }, + [0x23] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x25] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x26] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x27] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x30 ... 0x33] = { .simd_size = simd_other, .two_op = 1 }, + [0x38] = { .simd_size = simd_128, .d8s = 4 }, + [0x3a] = { .simd_size = simd_256, .d8s = d8s_vl_by_2 }, + [0x39] = { .simd_size = simd_128, .to_mem = 1, .two_op = 1, .d8s = 4 }, + [0x3b] = { .simd_size = simd_256, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, + [0x3e ... 0x3f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x40 ... 0x41] = { .simd_size = simd_packed_fp }, + [0x42 ... 0x43] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x44] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x46] = { .simd_size = simd_packed_int }, + [0x48 ... 0x49] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x4a ... 0x4b] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x4c] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0x50] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x51] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x54] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, + [0x55] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x56] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x57] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0x5c ... 0x5f] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x60 ... 0x63] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0x66] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, + [0x67] = { .simd_size = simd_scalar_vexw, .two_op = 1, .d8s = d8s_dq }, + [0x68 ... 0x69] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x6a ... 0x6b] = { .simd_size = simd_scalar_opc, .four_op = 1 }, + [0x6c ... 0x6d] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x6e ... 0x6f] = { .simd_size = simd_scalar_opc, .four_op = 1 }, + [0x70 ... 0x73] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0x78 ... 0x79] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x7a ... 0x7b] = { .simd_size = simd_scalar_opc, .four_op = 1 }, + [0x7c ... 0x7d] = { .simd_size = simd_packed_fp, .four_op = 1 }, + [0x7e ... 0x7f] = { .simd_size = simd_scalar_opc, .four_op = 1 }, + [0xcc] = { .simd_size = simd_other }, + [0xce ... 0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, + [0xdf] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xf0] = {}, +}; + +static const opcode_desc_t xop_table[] = { + DstReg|SrcImmByte|ModRM, + DstReg|SrcMem|ModRM, + DstReg|SrcImm|ModRM, +}; + +static const struct ext8f08_table { + uint8_t simd_size:5; + uint8_t two_op:1; + uint8_t four_op:1; +} ext8f08_table[256] = { + [0xa2] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0x85 ... 0x87] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0x8e ... 0x8f] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0x95 ... 0x97] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0x9e ... 0x9f] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0xa3] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0xa6] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0xb6] = { .simd_size = simd_packed_int, .four_op = 1 }, + [0xc0 ... 0xc3] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xcc ... 0xcf] = { .simd_size = simd_packed_int }, + [0xec ... 0xef] = { .simd_size = simd_packed_int }, +}; + +static const struct ext8f09_table { + uint8_t simd_size:5; + uint8_t two_op:1; +} ext8f09_table[256] = { + [0x01 ... 0x02] = { .two_op = 1 }, + [0x80 ... 0x81] = { .simd_size = simd_packed_fp, .two_op = 1 }, + [0x82 ... 0x83] = { .simd_size = simd_scalar_opc, .two_op = 1 }, + [0x90 ... 0x9b] = { .simd_size = simd_packed_int }, + [0xc1 ... 0xc3] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xc6 ... 0xc7] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xcb] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xd1 ... 0xd3] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xd6 ... 0xd7] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xdb] = { .simd_size = simd_packed_int, .two_op = 1 }, + [0xe1 ... 0xe3] = { .simd_size = simd_packed_int, .two_op = 1 }, +}; + +static unsigned int decode_disp8scale(enum disp8scale scale, + const struct x86_emulate_state *s) +{ + switch ( scale ) + { + case d8s_bw: + return s->evex.w; + + default: + if ( scale < d8s_vl ) + return scale; + if ( s->evex.brs ) + { + case d8s_dq: + return 2 + s->evex.w; + } + break; + + case d8s_dq64: + return 2 + (s->op_bytes == 8); + } + + switch ( s->simd_size ) + { + case simd_any_fp: + case simd_single_fp: + if ( !(s->evex.pfx & VEX_PREFIX_SCALAR_MASK) ) + break; + /* fall through */ + case simd_scalar_opc: + case simd_scalar_vexw: + return 2 + s->evex.w; + + case simd_128: + /* These should have an explicit size specified. */ + ASSERT_UNREACHABLE(); + return 4; + + default: + break; + } + + return 4 + s->evex.lr - (scale - d8s_vl); +} + +/* Fetch next part of the instruction being emulated. */ +#define insn_fetch_bytes(_size) ({ \ + unsigned long _x = 0, _ip = s->ip; \ + s->ip += (_size); /* real hardware doesn't truncate */ \ + generate_exception_if((uint8_t)(s->ip - \ + ctxt->regs->r(ip)) > MAX_INST_LEN, \ + X86_EXC_GP, 0); \ + rc = ops->insn_fetch(_ip, &_x, _size, ctxt); \ + if ( rc ) goto done; \ + _x; \ +}) +#define insn_fetch_type(type) ((type)insn_fetch_bytes(sizeof(type))) + +static int +decode_onebyte(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + int rc = X86EMUL_OKAY; + + switch ( ctxt->opcode ) + { + case 0x06: /* push %%es */ + case 0x07: /* pop %%es */ + case 0x0e: /* push %%cs */ + case 0x16: /* push %%ss */ + case 0x17: /* pop %%ss */ + case 0x1e: /* push %%ds */ + case 0x1f: /* pop %%ds */ + case 0x27: /* daa */ + case 0x2f: /* das */ + case 0x37: /* aaa */ + case 0x3f: /* aas */ + case 0x60: /* pusha */ + case 0x61: /* popa */ + case 0x62: /* bound */ + case 0xc4: /* les */ + case 0xc5: /* lds */ + case 0xce: /* into */ + case 0xd4: /* aam */ + case 0xd5: /* aad */ + case 0xd6: /* salc */ + s->not_64bit = true; + break; + + case 0x82: /* Grp1 (x86/32 only) */ + s->not_64bit = true; + /* fall through */ + case 0x80: case 0x81: case 0x83: /* Grp1 */ + if ( (s->modrm_reg & 7) == 7 ) /* cmp */ + s->desc = (s->desc & ByteOp) | DstNone | SrcMem; + break; + + case 0x90: /* nop / pause */ + if ( s->vex.pfx == vex_f3 ) + ctxt->opcode |= X86EMUL_OPC_F3(0, 0); + break; + + case 0x9a: /* call (far, absolute) */ + case 0xea: /* jmp (far, absolute) */ + generate_exception_if(mode_64bit(), X86_EXC_UD); + + s->imm1 = insn_fetch_bytes(s->op_bytes); + s->imm2 = insn_fetch_type(uint16_t); + break; + + case 0xa0: case 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */ + case 0xa2: case 0xa3: /* mov {%al,%ax,%eax,%rax},mem.offs */ + /* Source EA is not encoded via ModRM. */ + s->ea.type = OP_MEM; + s->ea.mem.off = insn_fetch_bytes(s->ad_bytes); + break; + + case 0xb8 ... 0xbf: /* mov imm{16,32,64},r{16,32,64} */ + if ( s->op_bytes == 8 ) /* Fetch more bytes to obtain imm64. */ + s->imm1 = ((uint32_t)s->imm1 | + ((uint64_t)insn_fetch_type(uint32_t) << 32)); + break; + + case 0xc8: /* enter imm16,imm8 */ + s->imm2 = insn_fetch_type(uint8_t); + break; + + case 0xf6: case 0xf7: /* Grp3 */ + if ( !(s->modrm_reg & 6) ) /* test */ + s->desc = (s->desc & ByteOp) | DstNone | SrcMem; + break; + + case 0xff: /* Grp5 */ + switch ( s->modrm_reg & 7 ) + { + case 2: /* call (near) */ + case 4: /* jmp (near) */ + if ( mode_64bit() && (s->op_bytes == 4 || !amd_like(ctxt)) ) + s->op_bytes = 8; + s->desc = DstNone | SrcMem | Mov; + break; + + case 3: /* call (far, absolute indirect) */ + case 5: /* jmp (far, absolute indirect) */ + /* REX.W ignored on a vendor-dependent basis. */ + if ( s->op_bytes == 8 && amd_like(ctxt) ) + s->op_bytes = 4; + s->desc = DstNone | SrcMem | Mov; + break; + + case 6: /* push */ + if ( mode_64bit() && s->op_bytes == 4 ) + s->op_bytes = 8; + s->desc = DstNone | SrcMem | Mov; + break; + } + break; + } + + done: + return rc; +} + +static int +decode_twobyte(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + int rc = X86EMUL_OKAY; + + switch ( ctxt->opcode & X86EMUL_OPC_MASK ) + { + case 0x00: /* Grp6 */ + switch ( s->modrm_reg & 6 ) + { + case 0: + s->desc |= DstMem | SrcImplicit | Mov; + break; + case 2: case 4: + s->desc |= SrcMem16; + break; + } + break; + + case 0x78: + s->desc = ImplicitOps; + s->simd_size = simd_none; + switch ( s->vex.pfx ) + { + case vex_66: /* extrq $imm8, $imm8, xmm */ + case vex_f2: /* insertq $imm8, $imm8, xmm, xmm */ + s->imm1 = insn_fetch_type(uint8_t); + s->imm2 = insn_fetch_type(uint8_t); + break; + } + /* fall through */ + case 0x10 ... 0x18: + case 0x28 ... 0x2f: + case 0x50 ... 0x77: + case 0x7a ... 0x7d: + case 0x7f: + case 0xc2 ... 0xc3: + case 0xc5 ... 0xc6: + case 0xd0 ... 0xef: + case 0xf1 ... 0xfe: + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + case 0x20: case 0x22: /* mov to/from cr */ + if ( s->lock_prefix && vcpu_has_cr8_legacy() ) + { + s->modrm_reg += 8; + s->lock_prefix = false; + } + /* fall through */ + case 0x21: case 0x23: /* mov to/from dr */ + ASSERT(s->ea.type == OP_REG); /* Early operand adjustment ensures this. */ + generate_exception_if(s->lock_prefix, X86_EXC_UD); + s->op_bytes = mode_64bit() ? 8 : 4; + break; + + case 0x79: + s->desc = DstReg | SrcMem; + s->simd_size = simd_packed_int; + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + case 0x7e: + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + if ( s->vex.pfx == vex_f3 ) /* movq xmm/m64,xmm */ + { + case X86EMUL_OPC_VEX_F3(0, 0x7e): /* vmovq xmm/m64,xmm */ + case X86EMUL_OPC_EVEX_F3(0, 0x7e): /* vmovq xmm/m64,xmm */ + s->desc = DstImplicit | SrcMem | TwoOp; + s->simd_size = simd_other; + /* Avoid the s->desc clobbering of TwoOp below. */ + return X86EMUL_OKAY; + } + break; + + case X86EMUL_OPC_VEX(0, 0x90): /* kmov{w,q} */ + case X86EMUL_OPC_VEX_66(0, 0x90): /* kmov{b,d} */ + s->desc = DstReg | SrcMem | Mov; + s->simd_size = simd_other; + break; + + case X86EMUL_OPC_VEX(0, 0x91): /* kmov{w,q} */ + case X86EMUL_OPC_VEX_66(0, 0x91): /* kmov{b,d} */ + s->desc = DstMem | SrcReg | Mov; + s->simd_size = simd_other; + break; + + case 0xae: + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + /* fall through */ + case X86EMUL_OPC_VEX(0, 0xae): + switch ( s->modrm_reg & 7 ) + { + case 2: /* {,v}ldmxcsr */ + s->desc = DstImplicit | SrcMem | Mov; + s->op_bytes = 4; + break; + + case 3: /* {,v}stmxcsr */ + s->desc = DstMem | SrcImplicit | Mov; + s->op_bytes = 4; + break; + } + break; + + case 0xb2: /* lss */ + case 0xb4: /* lfs */ + case 0xb5: /* lgs */ + /* REX.W ignored on a vendor-dependent basis. */ + if ( s->op_bytes == 8 && amd_like(ctxt) ) + s->op_bytes = 4; + break; + + case 0xb8: /* jmpe / popcnt */ + if ( s->vex.pfx >= vex_f3 ) + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + /* Intentionally not handling here despite being modified by F3: + case 0xbc: bsf / tzcnt + case 0xbd: bsr / lzcnt + * They're being dealt with in the execution phase (if at all). + */ + + case 0xc4: /* pinsrw */ + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + /* fall through */ + case X86EMUL_OPC_VEX_66(0, 0xc4): /* vpinsrw */ + case X86EMUL_OPC_EVEX_66(0, 0xc4): /* vpinsrw */ + s->desc = DstImplicit | SrcMem16; + break; + + case 0xf0: + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + if ( s->vex.pfx == vex_f2 ) /* lddqu mem,xmm */ + { + /* fall through */ + case X86EMUL_OPC_VEX_F2(0, 0xf0): /* vlddqu mem,{x,y}mm */ + s->desc = DstImplicit | SrcMem | TwoOp; + s->simd_size = simd_other; + /* Avoid the s->desc clobbering of TwoOp below. */ + return X86EMUL_OKAY; + } + break; + } + + /* + * Scalar forms of most VEX-/EVEX-encoded TwoOp instructions have + * three operands. Those which do really have two operands + * should have exited earlier. + */ + if ( s->simd_size && s->vex.opcx && + (s->vex.pfx & VEX_PREFIX_SCALAR_MASK) ) + s->desc &= ~TwoOp; + + done: + return rc; +} + +static int +decode_0f38(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + switch ( ctxt->opcode & X86EMUL_OPC_MASK ) + { + case 0x00 ... 0xef: + case 0xf2 ... 0xf5: + case 0xf7 ... 0xf8: + case 0xfa ... 0xff: + s->op_bytes = 0; + /* fall through */ + case 0xf6: /* adcx / adox */ + case 0xf9: /* movdiri */ + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + case X86EMUL_OPC_EVEX_66(0, 0x2d): /* vscalefs{s,d} */ + s->simd_size = simd_scalar_vexw; + break; + + case X86EMUL_OPC_EVEX_66(0, 0x7a): /* vpbroadcastb */ + case X86EMUL_OPC_EVEX_66(0, 0x7b): /* vpbroadcastw */ + case X86EMUL_OPC_EVEX_66(0, 0x7c): /* vpbroadcast{d,q} */ + break; + + case 0xf0: /* movbe / crc32 */ + s->desc |= s->vex.pfx == vex_f2 ? ByteOp : Mov; + if ( s->vex.pfx >= vex_f3 ) + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + case 0xf1: /* movbe / crc32 */ + if ( s->vex.pfx == vex_f2 ) + s->desc = DstReg | SrcMem; + if ( s->vex.pfx >= vex_f3 ) + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + break; + + case X86EMUL_OPC_VEX(0, 0xf2): /* andn */ + case X86EMUL_OPC_VEX(0, 0xf3): /* Grp 17 */ + case X86EMUL_OPC_VEX(0, 0xf5): /* bzhi */ + case X86EMUL_OPC_VEX_F3(0, 0xf5): /* pext */ + case X86EMUL_OPC_VEX_F2(0, 0xf5): /* pdep */ + case X86EMUL_OPC_VEX_F2(0, 0xf6): /* mulx */ + case X86EMUL_OPC_VEX(0, 0xf7): /* bextr */ + case X86EMUL_OPC_VEX_66(0, 0xf7): /* shlx */ + case X86EMUL_OPC_VEX_F3(0, 0xf7): /* sarx */ + case X86EMUL_OPC_VEX_F2(0, 0xf7): /* shrx */ + break; + + default: + s->op_bytes = 0; + break; + } + + return X86EMUL_OKAY; +} + +static int +decode_0f3a(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + if ( !s->vex.opcx ) + ctxt->opcode |= MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + + switch ( ctxt->opcode & X86EMUL_OPC_MASK ) + { + case X86EMUL_OPC_66(0, 0x14) + ... X86EMUL_OPC_66(0, 0x17): /* pextr*, extractps */ + case X86EMUL_OPC_VEX_66(0, 0x14) + ... X86EMUL_OPC_VEX_66(0, 0x17): /* vpextr*, vextractps */ + case X86EMUL_OPC_EVEX_66(0, 0x14) + ... X86EMUL_OPC_EVEX_66(0, 0x17): /* vpextr*, vextractps */ + case X86EMUL_OPC_VEX_F2(0, 0xf0): /* rorx */ + break; + + case X86EMUL_OPC_66(0, 0x20): /* pinsrb */ + case X86EMUL_OPC_VEX_66(0, 0x20): /* vpinsrb */ + case X86EMUL_OPC_EVEX_66(0, 0x20): /* vpinsrb */ + s->desc = DstImplicit | SrcMem; + if ( s->modrm_mod != 3 ) + s->desc |= ByteOp; + break; + + case X86EMUL_OPC_66(0, 0x22): /* pinsr{d,q} */ + case X86EMUL_OPC_VEX_66(0, 0x22): /* vpinsr{d,q} */ + case X86EMUL_OPC_EVEX_66(0, 0x22): /* vpinsr{d,q} */ + s->desc = DstImplicit | SrcMem; + break; + + default: + s->op_bytes = 0; + break; + } + + return X86EMUL_OKAY; +} + +#define ad_bytes (s->ad_bytes) /* for truncate_ea() */ + +int x86emul_decode(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + uint8_t b, d; + unsigned int def_op_bytes, def_ad_bytes, opcode; + enum x86_segment override_seg = x86_seg_none; + bool pc_rel = false; + int rc = X86EMUL_OKAY; + + ASSERT(ops->insn_fetch); + + memset(s, 0, sizeof(*s)); + s->ea.type = OP_NONE; + s->ea.mem.seg = x86_seg_ds; + s->ea.reg = PTR_POISON; + s->regs = ctxt->regs; + s->ip = ctxt->regs->r(ip); + + s->op_bytes = def_op_bytes = ad_bytes = def_ad_bytes = + ctxt->addr_size / 8; + if ( s->op_bytes == 8 ) + { + s->op_bytes = def_op_bytes = 4; +#ifndef __x86_64__ + return X86EMUL_UNHANDLEABLE; +#endif + } + + /* Prefix bytes. */ + for ( ; ; ) + { + switch ( b = insn_fetch_type(uint8_t) ) + { + case 0x66: /* operand-size override */ + s->op_bytes = def_op_bytes ^ 6; + if ( !s->vex.pfx ) + s->vex.pfx = vex_66; + break; + case 0x67: /* address-size override */ + ad_bytes = def_ad_bytes ^ (mode_64bit() ? 12 : 6); + break; + case 0x2e: /* CS override / ignored in 64-bit mode */ + if ( !mode_64bit() ) + override_seg = x86_seg_cs; + break; + case 0x3e: /* DS override / ignored in 64-bit mode */ + if ( !mode_64bit() ) + override_seg = x86_seg_ds; + break; + case 0x26: /* ES override / ignored in 64-bit mode */ + if ( !mode_64bit() ) + override_seg = x86_seg_es; + break; + case 0x64: /* FS override */ + override_seg = x86_seg_fs; + break; + case 0x65: /* GS override */ + override_seg = x86_seg_gs; + break; + case 0x36: /* SS override / ignored in 64-bit mode */ + if ( !mode_64bit() ) + override_seg = x86_seg_ss; + break; + case 0xf0: /* LOCK */ + s->lock_prefix = true; + break; + case 0xf2: /* REPNE/REPNZ */ + s->vex.pfx = vex_f2; + break; + case 0xf3: /* REP/REPE/REPZ */ + s->vex.pfx = vex_f3; + break; + case 0x40 ... 0x4f: /* REX */ + if ( !mode_64bit() ) + goto done_prefixes; + s->rex_prefix = b; + continue; + default: + goto done_prefixes; + } + + /* Any legacy prefix after a REX prefix nullifies its effect. */ + s->rex_prefix = 0; + } + done_prefixes: + + if ( s->rex_prefix & REX_W ) + s->op_bytes = 8; + + /* Opcode byte(s). */ + d = opcode_table[b]; + if ( d == 0 && b == 0x0f ) + { + /* Two-byte opcode. */ + b = insn_fetch_type(uint8_t); + d = twobyte_table[b].desc; + switch ( b ) + { + default: + opcode = b | MASK_INSR(0x0f, X86EMUL_OPC_EXT_MASK); + s->ext = ext_0f; + s->simd_size = twobyte_table[b].size; + break; + case 0x38: + b = insn_fetch_type(uint8_t); + opcode = b | MASK_INSR(0x0f38, X86EMUL_OPC_EXT_MASK); + s->ext = ext_0f38; + break; + case 0x3a: + b = insn_fetch_type(uint8_t); + opcode = b | MASK_INSR(0x0f3a, X86EMUL_OPC_EXT_MASK); + s->ext = ext_0f3a; + break; + } + } + else + opcode = b; + + /* ModRM and SIB bytes. */ + if ( d & ModRM ) + { + s->modrm = insn_fetch_type(uint8_t); + s->modrm_mod = (s->modrm & 0xc0) >> 6; + + if ( !s->ext && ((b & ~1) == 0xc4 || (b == 0x8f && (s->modrm & 0x18)) || + b == 0x62) ) + switch ( def_ad_bytes ) + { + default: + BUG(); /* Shouldn't be possible. */ + case 2: + if ( s->regs->eflags & X86_EFLAGS_VM ) + break; + /* fall through */ + case 4: + if ( s->modrm_mod != 3 || in_realmode(ctxt, ops) ) + break; + /* fall through */ + case 8: + /* VEX / XOP / EVEX */ + generate_exception_if(s->rex_prefix || s->vex.pfx, X86_EXC_UD); + /* + * With operand size override disallowed (see above), op_bytes + * should not have changed from its default. + */ + ASSERT(s->op_bytes == def_op_bytes); + + s->vex.raw[0] = s->modrm; + if ( b == 0xc5 ) + { + opcode = X86EMUL_OPC_VEX_; + s->vex.raw[1] = s->modrm; + s->vex.opcx = vex_0f; + s->vex.x = 1; + s->vex.b = 1; + s->vex.w = 0; + } + else + { + s->vex.raw[1] = insn_fetch_type(uint8_t); + if ( mode_64bit() ) + { + if ( !s->vex.b ) + s->rex_prefix |= REX_B; + if ( !s->vex.x ) + s->rex_prefix |= REX_X; + if ( s->vex.w ) + { + s->rex_prefix |= REX_W; + s->op_bytes = 8; + } + } + else + { + /* Operand size fixed at 4 (no override via W bit). */ + s->op_bytes = 4; + s->vex.b = 1; + } + switch ( b ) + { + case 0x62: + opcode = X86EMUL_OPC_EVEX_; + s->evex.raw[0] = s->vex.raw[0]; + s->evex.raw[1] = s->vex.raw[1]; + s->evex.raw[2] = insn_fetch_type(uint8_t); + + generate_exception_if(!s->evex.mbs || s->evex.mbz, X86_EXC_UD); + generate_exception_if(!s->evex.opmsk && s->evex.z, X86_EXC_UD); + + if ( !mode_64bit() ) + s->evex.R = 1; + + s->vex.opcx = s->evex.opcx; + break; + case 0xc4: + opcode = X86EMUL_OPC_VEX_; + break; + default: + opcode = 0; + break; + } + } + if ( !s->vex.r ) + s->rex_prefix |= REX_R; + + s->ext = s->vex.opcx; + if ( b != 0x8f ) + { + b = insn_fetch_type(uint8_t); + switch ( s->ext ) + { + case vex_0f: + opcode |= MASK_INSR(0x0f, X86EMUL_OPC_EXT_MASK); + d = twobyte_table[b].desc; + s->simd_size = twobyte_table[b].size; + break; + case vex_0f38: + opcode |= MASK_INSR(0x0f38, X86EMUL_OPC_EXT_MASK); + d = twobyte_table[0x38].desc; + break; + case vex_0f3a: + opcode |= MASK_INSR(0x0f3a, X86EMUL_OPC_EXT_MASK); + d = twobyte_table[0x3a].desc; + break; + default: + rc = X86EMUL_UNRECOGNIZED; + goto done; + } + } + else if ( s->ext < ext_8f08 + ARRAY_SIZE(xop_table) ) + { + b = insn_fetch_type(uint8_t); + opcode |= MASK_INSR(0x8f08 + s->ext - ext_8f08, + X86EMUL_OPC_EXT_MASK); + d = array_access_nospec(xop_table, s->ext - ext_8f08); + } + else + { + rc = X86EMUL_UNRECOGNIZED; + goto done; + } + + opcode |= b | MASK_INSR(s->vex.pfx, X86EMUL_OPC_PFX_MASK); + + if ( !evex_encoded() ) + s->evex.lr = s->vex.l; + + if ( !(d & ModRM) ) + break; + + s->modrm = insn_fetch_type(uint8_t); + s->modrm_mod = (s->modrm & 0xc0) >> 6; + + break; + } + } + + if ( d & ModRM ) + { + unsigned int disp8scale = 0; + + d &= ~ModRM; +#undef ModRM /* Only its aliases are valid to use from here on. */ + s->modrm_reg = ((s->rex_prefix & 4) << 1) | ((s->modrm & 0x38) >> 3) | + ((evex_encoded() && !s->evex.R) << 4); + s->modrm_rm = s->modrm & 0x07; + + /* + * Early operand adjustments. Only ones affecting further processing + * prior to the x86_decode_*() calls really belong here. That would + * normally be only addition/removal of SrcImm/SrcImm16, so their + * fetching can be taken care of by the common code below. + */ + switch ( s->ext ) + { + case ext_none: + switch ( b ) + { + case 0xf6 ... 0xf7: /* Grp3 */ + switch ( s->modrm_reg & 7 ) + { + case 0 ... 1: /* test */ + d |= DstMem | SrcImm; + break; + case 2: /* not */ + case 3: /* neg */ + d |= DstMem; + break; + case 4: /* mul */ + case 5: /* imul */ + case 6: /* div */ + case 7: /* idiv */ + /* + * DstEax isn't really precise for all cases; updates to + * rDX get handled in an open coded manner. + */ + d |= DstEax | SrcMem; + break; + } + break; + } + break; + + case ext_0f: + if ( evex_encoded() ) + disp8scale = decode_disp8scale(twobyte_table[b].d8s, s); + + switch ( b ) + { + case 0x12: /* vmovsldup / vmovddup */ + if ( s->evex.pfx == vex_f2 ) + disp8scale = s->evex.lr ? 4 + s->evex.lr : 3; + /* fall through */ + case 0x16: /* vmovshdup */ + if ( s->evex.pfx == vex_f3 ) + disp8scale = 4 + s->evex.lr; + break; + + case 0x20: /* mov cr,reg */ + case 0x21: /* mov dr,reg */ + case 0x22: /* mov reg,cr */ + case 0x23: /* mov reg,dr */ + /* + * Mov to/from cr/dr ignore the encoding of Mod, and behave as + * if they were encoded as reg/reg instructions. No further + * disp/SIB bytes are fetched. + */ + s->modrm_mod = 3; + break; + + case 0x78: + case 0x79: + if ( !s->evex.pfx ) + break; + /* vcvt{,t}ps2uqq need special casing */ + if ( s->evex.pfx == vex_66 ) + { + if ( !s->evex.w && !s->evex.brs ) + --disp8scale; + break; + } + /* vcvt{,t}s{s,d}2usi need special casing: fall through */ + case 0x2c: /* vcvtts{s,d}2si need special casing */ + case 0x2d: /* vcvts{s,d}2si need special casing */ + if ( evex_encoded() ) + disp8scale = 2 + (s->evex.pfx & VEX_PREFIX_DOUBLE_MASK); + break; + + case 0x5a: /* vcvtps2pd needs special casing */ + if ( disp8scale && !s->evex.pfx && !s->evex.brs ) + --disp8scale; + break; + + case 0x7a: /* vcvttps2qq and vcvtudq2pd need special casing */ + if ( disp8scale && s->evex.pfx != vex_f2 && !s->evex.w && !s->evex.brs ) + --disp8scale; + break; + + case 0x7b: /* vcvtp{s,d}2qq need special casing */ + if ( disp8scale && s->evex.pfx == vex_66 ) + disp8scale = (s->evex.brs ? 2 : 3 + s->evex.lr) + s->evex.w; + break; + + case 0x7e: /* vmovq xmm/m64,xmm needs special casing */ + if ( disp8scale == 2 && s->evex.pfx == vex_f3 ) + disp8scale = 3; + break; + + case 0xe6: /* vcvtdq2pd needs special casing */ + if ( disp8scale && s->evex.pfx == vex_f3 && !s->evex.w && !s->evex.brs ) + --disp8scale; + break; + } + break; + + case ext_0f38: + d = ext0f38_table[b].to_mem ? DstMem | SrcReg + : DstReg | SrcMem; + if ( ext0f38_table[b].two_op ) + d |= TwoOp; + if ( ext0f38_table[b].vsib ) + d |= vSIB; + s->simd_size = ext0f38_table[b].simd_size; + if ( evex_encoded() ) + { + /* + * VPMOVUS* are identical to VPMOVS* Disp8-scaling-wise, but + * their attributes don't match those of the vex_66 encoded + * insns with the same base opcodes. Rather than adding new + * columns to the table, handle this here for now. + */ + if ( s->evex.pfx != vex_f3 || (b & 0xf8) != 0x10 ) + disp8scale = decode_disp8scale(ext0f38_table[b].d8s, s); + else + { + disp8scale = decode_disp8scale(ext0f38_table[b ^ 0x30].d8s, + s); + s->simd_size = simd_other; + } + + switch ( b ) + { + /* vp4dpwssd{,s} need special casing */ + case 0x52: case 0x53: + /* v4f{,n}madd{p,s}s need special casing */ + case 0x9a: case 0x9b: case 0xaa: case 0xab: + if ( s->evex.pfx == vex_f2 ) + { + disp8scale = 4; + s->simd_size = simd_128; + } + break; + } + } + break; + + case ext_0f3a: + /* + * Cannot update d here yet, as the immediate operand still + * needs fetching. + */ + s->simd_size = ext0f3a_table[b].simd_size; + if ( evex_encoded() ) + disp8scale = decode_disp8scale(ext0f3a_table[b].d8s, s); + break; + + case ext_8f09: + if ( ext8f09_table[b].two_op ) + d |= TwoOp; + s->simd_size = ext8f09_table[b].simd_size; + break; + + case ext_8f08: + case ext_8f0a: + /* + * Cannot update d here yet, as the immediate operand still + * needs fetching. + */ + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNIMPLEMENTED; + } + + if ( s->modrm_mod == 3 ) + { + generate_exception_if(d & vSIB, X86_EXC_UD); + s->modrm_rm |= ((s->rex_prefix & 1) << 3) | + ((evex_encoded() && !s->evex.x) << 4); + s->ea.type = OP_REG; + } + else if ( ad_bytes == 2 ) + { + /* 16-bit ModR/M decode. */ + generate_exception_if(d & vSIB, X86_EXC_UD); + s->ea.type = OP_MEM; + switch ( s->modrm_rm ) + { + case 0: + s->ea.mem.off = s->regs->bx + s->regs->si; + break; + case 1: + s->ea.mem.off = s->regs->bx + s->regs->di; + break; + case 2: + s->ea.mem.seg = x86_seg_ss; + s->ea.mem.off = s->regs->bp + s->regs->si; + break; + case 3: + s->ea.mem.seg = x86_seg_ss; + s->ea.mem.off = s->regs->bp + s->regs->di; + break; + case 4: + s->ea.mem.off = s->regs->si; + break; + case 5: + s->ea.mem.off = s->regs->di; + break; + case 6: + if ( s->modrm_mod == 0 ) + break; + s->ea.mem.seg = x86_seg_ss; + s->ea.mem.off = s->regs->bp; + break; + case 7: + s->ea.mem.off = s->regs->bx; + break; + } + switch ( s->modrm_mod ) + { + case 0: + if ( s->modrm_rm == 6 ) + s->ea.mem.off = insn_fetch_type(int16_t); + break; + case 1: + s->ea.mem.off += insn_fetch_type(int8_t) * (1 << disp8scale); + break; + case 2: + s->ea.mem.off += insn_fetch_type(int16_t); + break; + } + } + else + { + /* 32/64-bit ModR/M decode. */ + s->ea.type = OP_MEM; + if ( s->modrm_rm == 4 ) + { + uint8_t sib = insn_fetch_type(uint8_t); + uint8_t sib_base = (sib & 7) | ((s->rex_prefix << 3) & 8); + + s->sib_index = ((sib >> 3) & 7) | ((s->rex_prefix << 2) & 8); + s->sib_scale = (sib >> 6) & 3; + if ( unlikely(d & vSIB) ) + s->sib_index |= (mode_64bit() && evex_encoded() && + !s->evex.RX) << 4; + else if ( s->sib_index != 4 ) + { + s->ea.mem.off = *decode_gpr(s->regs, s->sib_index); + s->ea.mem.off <<= s->sib_scale; + } + if ( (s->modrm_mod == 0) && ((sib_base & 7) == 5) ) + s->ea.mem.off += insn_fetch_type(int32_t); + else if ( sib_base == 4 ) + { + s->ea.mem.seg = x86_seg_ss; + s->ea.mem.off += s->regs->r(sp); + if ( !s->ext && (b == 0x8f) ) + /* POP computes its EA post increment. */ + s->ea.mem.off += ((mode_64bit() && (s->op_bytes == 4)) + ? 8 : s->op_bytes); + } + else if ( sib_base == 5 ) + { + s->ea.mem.seg = x86_seg_ss; + s->ea.mem.off += s->regs->r(bp); + } + else + s->ea.mem.off += *decode_gpr(s->regs, sib_base); + } + else + { + generate_exception_if(d & vSIB, X86_EXC_UD); + s->modrm_rm |= (s->rex_prefix & 1) << 3; + s->ea.mem.off = *decode_gpr(s->regs, s->modrm_rm); + if ( (s->modrm_rm == 5) && (s->modrm_mod != 0) ) + s->ea.mem.seg = x86_seg_ss; + } + switch ( s->modrm_mod ) + { + case 0: + if ( (s->modrm_rm & 7) != 5 ) + break; + s->ea.mem.off = insn_fetch_type(int32_t); + pc_rel = mode_64bit(); + break; + case 1: + s->ea.mem.off += insn_fetch_type(int8_t) * (1 << disp8scale); + break; + case 2: + s->ea.mem.off += insn_fetch_type(int32_t); + break; + } + } + } + else + { + s->modrm_mod = 0xff; + s->modrm_reg = s->modrm_rm = s->modrm = 0; + } + + if ( override_seg != x86_seg_none ) + s->ea.mem.seg = override_seg; + + /* Fetch the immediate operand, if present. */ + switch ( d & SrcMask ) + { + unsigned int bytes; + + case SrcImm: + if ( !(d & ByteOp) ) + { + if ( mode_64bit() && !amd_like(ctxt) && + ((s->ext == ext_none && (b | 1) == 0xe9) /* call / jmp */ || + (s->ext == ext_0f && (b | 0xf) == 0x8f) /* jcc */ ) ) + s->op_bytes = 4; + bytes = s->op_bytes != 8 ? s->op_bytes : 4; + } + else + { + case SrcImmByte: + bytes = 1; + } + /* NB. Immediates are sign-extended as necessary. */ + switch ( bytes ) + { + case 1: s->imm1 = insn_fetch_type(int8_t); break; + case 2: s->imm1 = insn_fetch_type(int16_t); break; + case 4: s->imm1 = insn_fetch_type(int32_t); break; + } + break; + case SrcImm16: + s->imm1 = insn_fetch_type(uint16_t); + break; + } + + ctxt->opcode = opcode; + s->desc = d; + + switch ( s->ext ) + { + case ext_none: + rc = decode_onebyte(s, ctxt, ops); + break; + + case ext_0f: + rc = decode_twobyte(s, ctxt, ops); + break; + + case ext_0f38: + rc = decode_0f38(s, ctxt, ops); + break; + + case ext_0f3a: + d = ext0f3a_table[b].to_mem ? DstMem | SrcReg : DstReg | SrcMem; + if ( ext0f3a_table[b].two_op ) + d |= TwoOp; + else if ( ext0f3a_table[b].four_op && !mode_64bit() && s->vex.opcx ) + s->imm1 &= 0x7f; + s->desc = d; + rc = decode_0f3a(s, ctxt, ops); + break; + + case ext_8f08: + d = DstReg | SrcMem; + if ( ext8f08_table[b].two_op ) + d |= TwoOp; + else if ( ext8f08_table[b].four_op && !mode_64bit() ) + s->imm1 &= 0x7f; + s->desc = d; + s->simd_size = ext8f08_table[b].simd_size; + break; + + case ext_8f09: + case ext_8f0a: + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNIMPLEMENTED; + } + + if ( s->ea.type == OP_MEM ) + { + if ( pc_rel ) + s->ea.mem.off += s->ip; + + s->ea.mem.off = truncate_ea(s->ea.mem.off); + } + + /* + * Simple op_bytes calculations. More complicated cases produce 0 + * and are further handled during execute. + */ + switch ( s->simd_size ) + { + case simd_none: + /* + * When prefix 66 has a meaning different from operand-size override, + * operand size defaults to 4 and can't be overridden to 2. + */ + if ( s->op_bytes == 2 && + (ctxt->opcode & X86EMUL_OPC_PFX_MASK) == X86EMUL_OPC_66(0, 0) ) + s->op_bytes = 4; + break; + +#ifndef X86EMUL_NO_SIMD + case simd_packed_int: + switch ( s->vex.pfx ) + { + case vex_none: + if ( !s->vex.opcx ) + { + s->op_bytes = 8; + break; + } + /* fall through */ + case vex_66: + s->op_bytes = 16 << s->evex.lr; + break; + default: + s->op_bytes = 0; + break; + } + break; + + case simd_single_fp: + if ( s->vex.pfx & VEX_PREFIX_DOUBLE_MASK ) + { + s->op_bytes = 0; + break; + case simd_packed_fp: + if ( s->vex.pfx & VEX_PREFIX_SCALAR_MASK ) + { + s->op_bytes = 0; + break; + } + } + /* fall through */ + case simd_any_fp: + switch ( s->vex.pfx ) + { + default: + s->op_bytes = 16 << s->evex.lr; + break; + case vex_f3: + generate_exception_if(evex_encoded() && s->evex.w, X86_EXC_UD); + s->op_bytes = 4; + break; + case vex_f2: + generate_exception_if(evex_encoded() && !s->evex.w, X86_EXC_UD); + s->op_bytes = 8; + break; + } + break; + + case simd_scalar_opc: + s->op_bytes = 4 << (ctxt->opcode & 1); + break; + + case simd_scalar_vexw: + s->op_bytes = 4 << s->vex.w; + break; + + case simd_128: + /* The special cases here are MMX shift insns. */ + s->op_bytes = s->vex.opcx || s->vex.pfx ? 16 : 8; + break; + + case simd_256: + s->op_bytes = 32; + break; +#endif /* !X86EMUL_NO_SIMD */ + + default: + s->op_bytes = 0; + break; + } + + done: + return rc; +} diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 5ab94fb96c..4ce06dc2a1 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -39,9 +39,11 @@ #ifdef __i386__ # define mode_64bit() false # define r(name) e ## name +# define PTR_POISON NULL /* 32-bit builds are for user-space, so NULL is OK. */ #else # define mode_64bit() (ctxt->addr_size == 64) # define r(name) r ## name +# define PTR_POISON ((void *)0x8086000000008086UL) /* non-canonical */ #endif /* Operand sizes: 8-bit operands or specified/overridden size. */ @@ -78,6 +80,23 @@ typedef uint8_t opcode_desc_t; +enum disp8scale { + /* Values 0 ... 4 are explicit sizes. */ + d8s_bw = 5, + d8s_dq, + /* EVEX.W ignored outside of 64-bit mode */ + d8s_dq64, + /* + * All further values must strictly be last and in the order + * given so that arithmetic on the values works. + */ + d8s_vl, + d8s_vl_by_2, + d8s_vl_by_4, + d8s_vl_by_8, +}; +typedef uint8_t disp8scale_t; + /* Type, address-of, and value of an instruction's operand. */ struct operand { enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type; @@ -184,6 +203,9 @@ enum vex_pfx { vex_f2 }; +#define VEX_PREFIX_DOUBLE_MASK 0x1 +#define VEX_PREFIX_SCALAR_MASK 0x2 + union vex { uint8_t raw[2]; struct { /* SDM names */ @@ -718,6 +740,10 @@ do { \ if ( rc ) goto done; \ } while (0) +int x86emul_decode(struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops); + int x86emul_fpu(struct x86_emulate_state *s, struct cpu_user_regs *regs, struct operand *dst, @@ -747,6 +773,13 @@ int x86emul_0fc7(struct x86_emulate_state *s, const struct x86_emulate_ops *ops, mmval_t *mmvalp); +/* Initialise output state in x86_emulate_ctxt */ +static inline void init_context(struct x86_emulate_ctxt *ctxt) +{ + ctxt->retire.raw = 0; + x86_emul_reset_event(ctxt); +} + static inline bool is_aligned(enum x86_segment seg, unsigned long offs, unsigned int size, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 4899180753..ccaf6aa2dd 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -22,274 +22,6 @@ #include "private.h" -static const opcode_desc_t opcode_table[256] = { - /* 0x00 - 0x07 */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, - /* 0x08 - 0x0F */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, 0, - /* 0x10 - 0x17 */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, - /* 0x18 - 0x1F */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, ImplicitOps|Mov, ImplicitOps|Mov, - /* 0x20 - 0x27 */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, - /* 0x28 - 0x2F */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, - /* 0x30 - 0x37 */ - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, - /* 0x38 - 0x3F */ - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstEax|SrcImm, DstEax|SrcImm, 0, ImplicitOps, - /* 0x40 - 0x4F */ - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - /* 0x50 - 0x5F */ - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, - /* 0x60 - 0x67 */ - ImplicitOps, ImplicitOps, DstReg|SrcMem|ModRM, DstReg|SrcNone|ModRM|Mov, - 0, 0, 0, 0, - /* 0x68 - 0x6F */ - DstImplicit|SrcImm|Mov, DstReg|SrcImm|ModRM|Mov, - DstImplicit|SrcImmByte|Mov, DstReg|SrcImmByte|ModRM|Mov, - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps|Mov, - /* 0x70 - 0x77 */ - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - /* 0x78 - 0x7F */ - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - /* 0x80 - 0x87 */ - ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImm|ModRM, - ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImmByte|ModRM, - ByteOp|DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM, - ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, - /* 0x88 - 0x8F */ - ByteOp|DstMem|SrcReg|ModRM|Mov, DstMem|SrcReg|ModRM|Mov, - ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov, - DstMem|SrcReg|ModRM|Mov, DstReg|SrcNone|ModRM, - DstReg|SrcMem16|ModRM|Mov, DstMem|SrcNone|ModRM|Mov, - /* 0x90 - 0x97 */ - DstImplicit|SrcEax, DstImplicit|SrcEax, - DstImplicit|SrcEax, DstImplicit|SrcEax, - DstImplicit|SrcEax, DstImplicit|SrcEax, - DstImplicit|SrcEax, DstImplicit|SrcEax, - /* 0x98 - 0x9F */ - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps, ImplicitOps, - /* 0xA0 - 0xA7 */ - ByteOp|DstEax|SrcMem|Mov, DstEax|SrcMem|Mov, - ByteOp|DstMem|SrcEax|Mov, DstMem|SrcEax|Mov, - ByteOp|ImplicitOps|Mov, ImplicitOps|Mov, - ByteOp|ImplicitOps, ImplicitOps, - /* 0xA8 - 0xAF */ - ByteOp|DstEax|SrcImm, DstEax|SrcImm, - ByteOp|DstImplicit|SrcEax|Mov, DstImplicit|SrcEax|Mov, - ByteOp|DstEax|SrcImplicit|Mov, DstEax|SrcImplicit|Mov, - ByteOp|DstImplicit|SrcEax, DstImplicit|SrcEax, - /* 0xB0 - 0xB7 */ - ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, - ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, - ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, - ByteOp|DstReg|SrcImm|Mov, ByteOp|DstReg|SrcImm|Mov, - /* 0xB8 - 0xBF */ - DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, - DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, DstReg|SrcImm|Mov, - /* 0xC0 - 0xC7 */ - ByteOp|DstMem|SrcImm|ModRM, DstMem|SrcImmByte|ModRM, - DstImplicit|SrcImm16, ImplicitOps, - DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov, - ByteOp|DstMem|SrcImm|ModRM|Mov, DstMem|SrcImm|ModRM|Mov, - /* 0xC8 - 0xCF */ - DstImplicit|SrcImm16, ImplicitOps, DstImplicit|SrcImm16, ImplicitOps, - ImplicitOps, DstImplicit|SrcImmByte, ImplicitOps, ImplicitOps, - /* 0xD0 - 0xD7 */ - ByteOp|DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM, - ByteOp|DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, ImplicitOps, ImplicitOps, - /* 0xD8 - 0xDF */ - ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, - ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, - ImplicitOps|ModRM, ImplicitOps|ModRM|Mov, - DstImplicit|SrcMem16|ModRM, ImplicitOps|ModRM|Mov, - /* 0xE0 - 0xE7 */ - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - DstEax|SrcImmByte, DstEax|SrcImmByte, - DstImplicit|SrcImmByte, DstImplicit|SrcImmByte, - /* 0xE8 - 0xEF */ - DstImplicit|SrcImm|Mov, DstImplicit|SrcImm, - ImplicitOps, DstImplicit|SrcImmByte, - DstEax|SrcImplicit, DstEax|SrcImplicit, ImplicitOps, ImplicitOps, - /* 0xF0 - 0xF7 */ - 0, ImplicitOps, 0, 0, - ImplicitOps, ImplicitOps, ByteOp|ModRM, ModRM, - /* 0xF8 - 0xFF */ - ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, - ImplicitOps, ImplicitOps, ByteOp|DstMem|SrcNone|ModRM, DstMem|SrcNone|ModRM -}; - -enum disp8scale { - /* Values 0 ... 4 are explicit sizes. */ - d8s_bw = 5, - d8s_dq, - /* EVEX.W ignored outside of 64-bit mode */ - d8s_dq64, - /* - * All further values must strictly be last and in the order - * given so that arithmetic on the values works. - */ - d8s_vl, - d8s_vl_by_2, - d8s_vl_by_4, - d8s_vl_by_8, -}; -typedef uint8_t disp8scale_t; - -static const struct twobyte_table { - opcode_desc_t desc; - simd_opsize_t size:4; - disp8scale_t d8s:4; -} twobyte_table[256] = { - [0x00] = { ModRM }, - [0x01] = { ImplicitOps|ModRM }, - [0x02] = { DstReg|SrcMem16|ModRM }, - [0x03] = { DstReg|SrcMem16|ModRM }, - [0x05] = { ImplicitOps }, - [0x06] = { ImplicitOps }, - [0x07] = { ImplicitOps }, - [0x08] = { ImplicitOps }, - [0x09] = { ImplicitOps }, - [0x0b] = { ImplicitOps }, - [0x0d] = { ImplicitOps|ModRM }, - [0x0e] = { ImplicitOps }, - [0x0f] = { ModRM|SrcImmByte }, - [0x10] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl }, - [0x11] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl }, - [0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, - [0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, - [0x14 ... 0x15] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl }, - [0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 }, - [0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, - [0x18 ... 0x1f] = { ImplicitOps|ModRM }, - [0x20 ... 0x21] = { DstMem|SrcImplicit|ModRM }, - [0x22 ... 0x23] = { DstImplicit|SrcMem|ModRM }, - [0x28] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, - [0x29] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_fp, d8s_vl }, - [0x2a] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_dq64 }, - [0x2b] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl }, - [0x2c ... 0x2d] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, - [0x2e ... 0x2f] = { ImplicitOps|ModRM|TwoOp, simd_none, d8s_dq }, - [0x30 ... 0x35] = { ImplicitOps }, - [0x37] = { ImplicitOps }, - [0x38] = { DstReg|SrcMem|ModRM }, - [0x3a] = { DstReg|SrcImmByte|ModRM }, - [0x40 ... 0x4f] = { DstReg|SrcMem|ModRM|Mov }, - [0x50] = { DstReg|SrcImplicit|ModRM|Mov }, - [0x51] = { DstImplicit|SrcMem|ModRM|TwoOp, simd_any_fp, d8s_vl }, - [0x52 ... 0x53] = { DstImplicit|SrcMem|ModRM|TwoOp, simd_single_fp }, - [0x54 ... 0x57] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl }, - [0x58 ... 0x59] = { DstImplicit|SrcMem|ModRM, simd_any_fp, d8s_vl }, - [0x5a] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl }, - [0x5b] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, - [0x5c ... 0x5f] = { DstImplicit|SrcMem|ModRM, simd_any_fp, d8s_vl }, - [0x60 ... 0x62] = { DstImplicit|SrcMem|ModRM, simd_other, d8s_vl }, - [0x63 ... 0x67] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0x68 ... 0x6a] = { DstImplicit|SrcMem|ModRM, simd_other, d8s_vl }, - [0x6b ... 0x6d] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0x6e] = { DstImplicit|SrcMem|ModRM|Mov, simd_none, d8s_dq64 }, - [0x6f] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_int, d8s_vl }, - [0x70] = { SrcImmByte|ModRM|TwoOp, simd_other, d8s_vl }, - [0x71 ... 0x73] = { DstImplicit|SrcImmByte|ModRM, simd_none, d8s_vl }, - [0x74 ... 0x76] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0x77] = { DstImplicit|SrcNone }, - [0x78 ... 0x79] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_vl }, - [0x7a] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, - [0x7b] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, d8s_dq64 }, - [0x7c ... 0x7d] = { DstImplicit|SrcMem|ModRM, simd_other }, - [0x7e] = { DstMem|SrcImplicit|ModRM|Mov, simd_none, d8s_dq64 }, - [0x7f] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_int, d8s_vl }, - [0x80 ... 0x8f] = { DstImplicit|SrcImm }, - [0x90 ... 0x9f] = { ByteOp|DstMem|SrcNone|ModRM|Mov }, - [0xa0 ... 0xa1] = { ImplicitOps|Mov }, - [0xa2] = { ImplicitOps }, - [0xa3] = { DstBitBase|SrcReg|ModRM }, - [0xa4] = { DstMem|SrcImmByte|ModRM }, - [0xa5] = { DstMem|SrcReg|ModRM }, - [0xa6 ... 0xa7] = { ModRM }, - [0xa8 ... 0xa9] = { ImplicitOps|Mov }, - [0xaa] = { ImplicitOps }, - [0xab] = { DstBitBase|SrcReg|ModRM }, - [0xac] = { DstMem|SrcImmByte|ModRM }, - [0xad] = { DstMem|SrcReg|ModRM }, - [0xae] = { ImplicitOps|ModRM }, - [0xaf] = { DstReg|SrcMem|ModRM }, - [0xb0] = { ByteOp|DstMem|SrcReg|ModRM }, - [0xb1] = { DstMem|SrcReg|ModRM }, - [0xb2] = { DstReg|SrcMem|ModRM|Mov }, - [0xb3] = { DstBitBase|SrcReg|ModRM }, - [0xb4 ... 0xb5] = { DstReg|SrcMem|ModRM|Mov }, - [0xb6] = { ByteOp|DstReg|SrcMem|ModRM|Mov }, - [0xb7] = { DstReg|SrcMem16|ModRM|Mov }, - [0xb8] = { DstReg|SrcMem|ModRM }, - [0xb9] = { ModRM }, - [0xba] = { DstBitBase|SrcImmByte|ModRM }, - [0xbb] = { DstBitBase|SrcReg|ModRM }, - [0xbc ... 0xbd] = { DstReg|SrcMem|ModRM }, - [0xbe] = { ByteOp|DstReg|SrcMem|ModRM|Mov }, - [0xbf] = { DstReg|SrcMem16|ModRM|Mov }, - [0xc0] = { ByteOp|DstMem|SrcReg|ModRM }, - [0xc1] = { DstMem|SrcReg|ModRM }, - [0xc2] = { DstImplicit|SrcImmByte|ModRM, simd_any_fp, d8s_vl }, - [0xc3] = { DstMem|SrcReg|ModRM|Mov }, - [0xc4] = { DstImplicit|SrcImmByte|ModRM, simd_none, 1 }, - [0xc5] = { DstReg|SrcImmByte|ModRM|Mov }, - [0xc6] = { DstImplicit|SrcImmByte|ModRM, simd_packed_fp, d8s_vl }, - [0xc7] = { ImplicitOps|ModRM }, - [0xc8 ... 0xcf] = { ImplicitOps }, - [0xd0] = { DstImplicit|SrcMem|ModRM, simd_other }, - [0xd1 ... 0xd3] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, - [0xd4 ... 0xd5] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xd6] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 }, - [0xd7] = { DstReg|SrcImplicit|ModRM|Mov }, - [0xd8 ... 0xdf] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xe0] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xe1 ... 0xe2] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, - [0xe3 ... 0xe5] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xe6] = { DstImplicit|SrcMem|ModRM|Mov, simd_packed_fp, d8s_vl }, - [0xe7] = { DstMem|SrcImplicit|ModRM|Mov, simd_packed_int, d8s_vl }, - [0xe8 ... 0xef] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xf0] = { DstImplicit|SrcMem|ModRM|Mov, simd_other }, - [0xf1 ... 0xf3] = { DstImplicit|SrcMem|ModRM, simd_128, 4 }, - [0xf4 ... 0xf6] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xf7] = { DstMem|SrcMem|ModRM|Mov, simd_packed_int }, - [0xf8 ... 0xfe] = { DstImplicit|SrcMem|ModRM, simd_packed_int, d8s_vl }, - [0xff] = { ModRM } -}; - /* * The next two tables are indexed by high opcode extension byte (the one * that's encoded like an immediate) nibble, with each table element then @@ -325,257 +57,9 @@ static const uint16_t _3dnow_ext_table[16] = { [0xb] = (1 << 0xb) /* pswapd */, }; -/* - * "two_op" and "four_op" below refer to the number of register operands - * (one of which possibly also allowing to be a memory one). The named - * operand counts do not include any immediate operands. - */ -static const struct ext0f38_table { - uint8_t simd_size:5; - uint8_t to_mem:1; - uint8_t two_op:1; - uint8_t vsib:1; - disp8scale_t d8s:4; -} ext0f38_table[256] = { - [0x00] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x01 ... 0x03] = { .simd_size = simd_packed_int }, - [0x04] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x05 ... 0x0a] = { .simd_size = simd_packed_int }, - [0x0b] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x0c ... 0x0d] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x0e ... 0x0f] = { .simd_size = simd_packed_fp }, - [0x10 ... 0x12] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x13] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x14 ... 0x16] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x17] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0x18] = { .simd_size = simd_scalar_opc, .two_op = 1, .d8s = 2 }, - [0x19] = { .simd_size = simd_scalar_opc, .two_op = 1, .d8s = 3 }, - [0x1a] = { .simd_size = simd_128, .two_op = 1, .d8s = 4 }, - [0x1b] = { .simd_size = simd_256, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x1c ... 0x1f] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0x20] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x21] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, - [0x22] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_8 }, - [0x23] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x24] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, - [0x25] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x26 ... 0x29] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x2a] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0x2b] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x2c] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x2d] = { .simd_size = simd_packed_fp, .d8s = d8s_dq }, - [0x2e ... 0x2f] = { .simd_size = simd_packed_fp, .to_mem = 1 }, - [0x30] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x31] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, - [0x32] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_8 }, - [0x33] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x34] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_4 }, - [0x35] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x36 ... 0x3f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x40] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x41] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0x42] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x43] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x44] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0x45 ... 0x47] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x4c] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x4d] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x4e] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x4f] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x50 ... 0x53] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x54 ... 0x55] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0x58] = { .simd_size = simd_other, .two_op = 1, .d8s = 2 }, - [0x59] = { .simd_size = simd_other, .two_op = 1, .d8s = 3 }, - [0x5a] = { .simd_size = simd_128, .two_op = 1, .d8s = 4 }, - [0x5b] = { .simd_size = simd_256, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x62] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_bw }, - [0x63] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_bw }, - [0x64 ... 0x66] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x68] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x70 ... 0x73] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x75 ... 0x76] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x77] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x78] = { .simd_size = simd_other, .two_op = 1 }, - [0x79] = { .simd_size = simd_other, .two_op = 1, .d8s = 1 }, - [0x7a ... 0x7c] = { .simd_size = simd_none, .two_op = 1 }, - [0x7d ... 0x7e] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x7f] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x82] = { .simd_size = simd_other }, - [0x83] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x88] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_dq }, - [0x89] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_dq }, - [0x8a] = { .simd_size = simd_packed_fp, .to_mem = 1, .two_op = 1, .d8s = d8s_dq }, - [0x8b] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_dq }, - [0x8c] = { .simd_size = simd_packed_int }, - [0x8d] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x8e] = { .simd_size = simd_packed_int, .to_mem = 1 }, - [0x8f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x90 ... 0x93] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq }, - [0x96 ... 0x98] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x99] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x9a] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x9b] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x9c] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x9d] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x9e] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x9f] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xa0 ... 0xa3] = { .simd_size = simd_other, .to_mem = 1, .vsib = 1, .d8s = d8s_dq }, - [0xa6 ... 0xa8] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xa9] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xaa] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xab] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xac] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xad] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xae] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xaf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xb4 ... 0xb5] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0xb6 ... 0xb8] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xb9] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xba] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xbb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xbc] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xbd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xbe] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0xbf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xc4] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0xc6 ... 0xc7] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq }, - [0xc8] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0xc9] = { .simd_size = simd_other }, - [0xca] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0xcb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xcc] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0xcd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0xdb] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xdc ... 0xdf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0xf0] = { .two_op = 1 }, - [0xf1] = { .to_mem = 1, .two_op = 1 }, - [0xf2 ... 0xf3] = {}, - [0xf5 ... 0xf7] = {}, - [0xf8] = { .simd_size = simd_other }, - [0xf9] = { .to_mem = 1, .two_op = 1 /* Mov */ }, -}; - /* Shift values between src and dst sizes of pmov{s,z}x{b,w,d}{w,d,q}. */ static const uint8_t pmov_convert_delta[] = { 1, 2, 3, 1, 2, 1 }; -static const struct ext0f3a_table { - uint8_t simd_size:5; - uint8_t to_mem:1; - uint8_t two_op:1; - uint8_t four_op:1; - disp8scale_t d8s:4; -} ext0f3a_table[256] = { - [0x00] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0x01] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x02] = { .simd_size = simd_packed_int }, - [0x03] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x04 ... 0x05] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x06] = { .simd_size = simd_packed_fp }, - [0x08 ... 0x09] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x0a ... 0x0b] = { .simd_size = simd_scalar_opc, .d8s = d8s_dq }, - [0x0c ... 0x0d] = { .simd_size = simd_packed_fp }, - [0x0e] = { .simd_size = simd_packed_int }, - [0x0f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x14] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 0 }, - [0x15] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 1 }, - [0x16] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = d8s_dq64 }, - [0x17] = { .simd_size = simd_none, .to_mem = 1, .two_op = 1, .d8s = 2 }, - [0x18] = { .simd_size = simd_128, .d8s = 4 }, - [0x19] = { .simd_size = simd_128, .to_mem = 1, .two_op = 1, .d8s = 4 }, - [0x1a] = { .simd_size = simd_256, .d8s = d8s_vl_by_2 }, - [0x1b] = { .simd_size = simd_256, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x1d] = { .simd_size = simd_other, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x1e ... 0x1f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x20] = { .simd_size = simd_none, .d8s = 0 }, - [0x21] = { .simd_size = simd_other, .d8s = 2 }, - [0x22] = { .simd_size = simd_none, .d8s = d8s_dq64 }, - [0x23] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x25] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x26] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x27] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x30 ... 0x33] = { .simd_size = simd_other, .two_op = 1 }, - [0x38] = { .simd_size = simd_128, .d8s = 4 }, - [0x3a] = { .simd_size = simd_256, .d8s = d8s_vl_by_2 }, - [0x39] = { .simd_size = simd_128, .to_mem = 1, .two_op = 1, .d8s = 4 }, - [0x3b] = { .simd_size = simd_256, .to_mem = 1, .two_op = 1, .d8s = d8s_vl_by_2 }, - [0x3e ... 0x3f] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x40 ... 0x41] = { .simd_size = simd_packed_fp }, - [0x42 ... 0x43] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x44] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x46] = { .simd_size = simd_packed_int }, - [0x48 ... 0x49] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x4a ... 0x4b] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x4c] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0x50] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x51] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x54] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, - [0x55] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x56] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x57] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0x5c ... 0x5f] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x60 ... 0x63] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0x66] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0x67] = { .simd_size = simd_scalar_vexw, .two_op = 1, .d8s = d8s_dq }, - [0x68 ... 0x69] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x6a ... 0x6b] = { .simd_size = simd_scalar_opc, .four_op = 1 }, - [0x6c ... 0x6d] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x6e ... 0x6f] = { .simd_size = simd_scalar_opc, .four_op = 1 }, - [0x70 ... 0x73] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0x78 ... 0x79] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x7a ... 0x7b] = { .simd_size = simd_scalar_opc, .four_op = 1 }, - [0x7c ... 0x7d] = { .simd_size = simd_packed_fp, .four_op = 1 }, - [0x7e ... 0x7f] = { .simd_size = simd_scalar_opc, .four_op = 1 }, - [0xcc] = { .simd_size = simd_other }, - [0xce ... 0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, - [0xdf] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xf0] = {}, -}; - -static const opcode_desc_t xop_table[] = { - DstReg|SrcImmByte|ModRM, - DstReg|SrcMem|ModRM, - DstReg|SrcImm|ModRM, -}; - -static const struct ext8f08_table { - uint8_t simd_size:5; - uint8_t two_op:1; - uint8_t four_op:1; -} ext8f08_table[256] = { - [0xa2] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0x85 ... 0x87] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0x8e ... 0x8f] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0x95 ... 0x97] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0x9e ... 0x9f] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0xa3] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0xa6] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0xb6] = { .simd_size = simd_packed_int, .four_op = 1 }, - [0xc0 ... 0xc3] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xcc ... 0xcf] = { .simd_size = simd_packed_int }, - [0xec ... 0xef] = { .simd_size = simd_packed_int }, -}; - -static const struct ext8f09_table { - uint8_t simd_size:5; - uint8_t two_op:1; -} ext8f09_table[256] = { - [0x01 ... 0x02] = { .two_op = 1 }, - [0x80 ... 0x81] = { .simd_size = simd_packed_fp, .two_op = 1 }, - [0x82 ... 0x83] = { .simd_size = simd_scalar_opc, .two_op = 1 }, - [0x90 ... 0x9b] = { .simd_size = simd_packed_int }, - [0xc1 ... 0xc3] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xc6 ... 0xc7] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xcb] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xd1 ... 0xd3] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xd6 ... 0xd7] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xdb] = { .simd_size = simd_packed_int, .two_op = 1 }, - [0xe1 ... 0xe3] = { .simd_size = simd_packed_int, .two_op = 1 }, -}; - -#define VEX_PREFIX_DOUBLE_MASK 0x1 -#define VEX_PREFIX_SCALAR_MASK 0x2 - static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; #ifdef __x86_64__ @@ -637,12 +121,6 @@ static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; #define repe_prefix() (vex.pfx == vex_f3) #define repne_prefix() (vex.pfx == vex_f2) -#ifdef __x86_64__ -#define PTR_POISON ((void *)0x8086000000008086UL) /* non-canonical */ -#else -#define PTR_POISON NULL /* 32-bit builds are for user-space, so NULL is OK. */ -#endif - /* * While proper alignment gets specified in mmval_t, this doesn't get honored * by the compiler for automatic variables. Use this helper to instantiate a @@ -831,19 +309,6 @@ do{ asm volatile ( \ : [msk] "i" (EFLAGS_MASK), ## src); \ } while (0) -/* Fetch next part of the instruction being emulated. */ -#define insn_fetch_bytes(_size) \ -({ unsigned long _x = 0, _ip = state->ip; \ - state->ip += (_size); /* real hardware doesn't truncate */ \ - generate_exception_if((uint8_t)(state->ip - \ - ctxt->regs->r(ip)) > MAX_INST_LEN, \ - EXC_GP, 0); \ - rc = ops->insn_fetch(_ip, &_x, _size, ctxt); \ - if ( rc ) goto done; \ - _x; \ -}) -#define insn_fetch_type(_type) ((_type)insn_fetch_bytes(sizeof(_type))) - /* * Given byte has even parity (even number of 1s)? SDM Vol. 1 Sec. 3.4.3.1, * "Status Flags": EFLAGS.PF reflects parity of least-sig. byte of result only. @@ -1354,13 +819,6 @@ static int ioport_access_check( return rc; } -/* Initialise output state in x86_emulate_ctxt */ -static void init_context(struct x86_emulate_ctxt *ctxt) -{ - ctxt->retire.raw = 0; - x86_emul_reset_event(ctxt); -} - static int realmode_load_seg( enum x86_segment seg, @@ -1599,1371 +1057,194 @@ protmode_load_seg( } /* Force the Accessed flag in our local copy. */ - desc.b = new_desc_b; - } - - sreg->base = (((uint64_t)desc_hi.a << 32) | - ((desc.b << 0) & 0xff000000u) | - ((desc.b << 16) & 0x00ff0000u) | - ((desc.a >> 16) & 0x0000ffffu)); - sreg->attr = (((desc.b >> 8) & 0x00ffu) | - ((desc.b >> 12) & 0x0f00u)); - sreg->limit = (desc.b & 0x000f0000u) | (desc.a & 0x0000ffffu); - if ( sreg->g ) - sreg->limit = (sreg->limit << 12) | 0xfffu; - sreg->sel = sel; - return X86EMUL_OKAY; - - raise_exn: - generate_exception_if(seg != x86_seg_none, fault_type, sel & 0xfffc); - rc = X86EMUL_EXCEPTION; - done: - return rc; -} - -static int -load_seg( - enum x86_segment seg, - uint16_t sel, bool is_ret, - struct segment_register *sreg, - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - struct segment_register reg; - int rc; - - if ( !ops->write_segment ) - return X86EMUL_UNHANDLEABLE; - - if ( !sreg ) - sreg = ® - - if ( in_protmode(ctxt, ops) ) - rc = protmode_load_seg(seg, sel, is_ret, sreg, ctxt, ops); - else - rc = realmode_load_seg(seg, sel, sreg, ctxt, ops); - - if ( !rc && sreg == ® ) - rc = ops->write_segment(seg, sreg, ctxt); - - return rc; -} - -/* Map GPRs by ModRM encoding to their offset within struct cpu_user_regs. */ -const uint8_t cpu_user_regs_gpr_offsets[] = { - offsetof(struct cpu_user_regs, r(ax)), - offsetof(struct cpu_user_regs, r(cx)), - offsetof(struct cpu_user_regs, r(dx)), - offsetof(struct cpu_user_regs, r(bx)), - offsetof(struct cpu_user_regs, r(sp)), - offsetof(struct cpu_user_regs, r(bp)), - offsetof(struct cpu_user_regs, r(si)), - offsetof(struct cpu_user_regs, r(di)), -#ifdef __x86_64__ - offsetof(struct cpu_user_regs, r8), - offsetof(struct cpu_user_regs, r9), - offsetof(struct cpu_user_regs, r10), - offsetof(struct cpu_user_regs, r11), - offsetof(struct cpu_user_regs, r12), - offsetof(struct cpu_user_regs, r13), - offsetof(struct cpu_user_regs, r14), - offsetof(struct cpu_user_regs, r15), -#endif -}; - -static void *_decode_gpr( - struct cpu_user_regs *regs, unsigned int modrm_reg, bool legacy) -{ - static const uint8_t byte_reg_offsets[] = { - offsetof(struct cpu_user_regs, al), - offsetof(struct cpu_user_regs, cl), - offsetof(struct cpu_user_regs, dl), - offsetof(struct cpu_user_regs, bl), - offsetof(struct cpu_user_regs, ah), - offsetof(struct cpu_user_regs, ch), - offsetof(struct cpu_user_regs, dh), - offsetof(struct cpu_user_regs, bh), - }; - - if ( !legacy ) - return decode_gpr(regs, modrm_reg); - - /* Check that the array is a power of two. */ - BUILD_BUG_ON(ARRAY_SIZE(byte_reg_offsets) & - (ARRAY_SIZE(byte_reg_offsets) - 1)); - - ASSERT(modrm_reg < ARRAY_SIZE(byte_reg_offsets)); - - /* Note that this also acts as array_access_nospec() stand-in. */ - modrm_reg &= ARRAY_SIZE(byte_reg_offsets) - 1; - - return (void *)regs + byte_reg_offsets[modrm_reg]; -} - -static unsigned long *decode_vex_gpr( - unsigned int vex_reg, struct cpu_user_regs *regs, - const struct x86_emulate_ctxt *ctxt) -{ - return decode_gpr(regs, ~vex_reg & (mode_64bit() ? 0xf : 7)); -} - -static unsigned int decode_disp8scale(enum disp8scale scale, - const struct x86_emulate_state *state) -{ - switch ( scale ) - { - case d8s_bw: - return state->evex.w; - - default: - if ( scale < d8s_vl ) - return scale; - if ( state->evex.brs ) - { - case d8s_dq: - return 2 + state->evex.w; - } - break; - - case d8s_dq64: - return 2 + (state->op_bytes == 8); - } - - switch ( state->simd_size ) - { - case simd_any_fp: - case simd_single_fp: - if ( !(state->evex.pfx & VEX_PREFIX_SCALAR_MASK) ) - break; - /* fall through */ - case simd_scalar_opc: - case simd_scalar_vexw: - return 2 + state->evex.w; - - case simd_128: - /* These should have an explicit size specified. */ - ASSERT_UNREACHABLE(); - return 4; - - default: - break; - } - - return 4 + state->evex.lr - (scale - d8s_vl); -} - -#define avx512_vlen_check(lig) do { \ - switch ( evex.lr ) \ - { \ - default: \ - generate_exception(EXC_UD); \ - case 2: \ - break; \ - case 0: case 1: \ - if ( !(lig) ) \ - host_and_vcpu_must_have(avx512vl); \ - break; \ - } \ -} while ( false ) - -static bool is_branch_step(struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - uint64_t debugctl; - - return ops->read_msr && - ops->read_msr(MSR_IA32_DEBUGCTLMSR, &debugctl, ctxt) == X86EMUL_OKAY && - (debugctl & IA32_DEBUGCTLMSR_BTF); -} - -static void adjust_bnd(struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops, enum vex_pfx pfx) -{ - uint64_t xcr0, bndcfg; - int rc; - - if ( pfx == vex_f2 || !cpu_has_mpx || !vcpu_has_mpx() ) - return; - - if ( !ops->read_xcr || ops->read_xcr(0, &xcr0, ctxt) != X86EMUL_OKAY || - !(xcr0 & X86_XCR0_BNDREGS) || !(xcr0 & X86_XCR0_BNDCSR) ) - return; - - if ( !mode_ring0() ) - bndcfg = read_bndcfgu(); - else if ( !ops->read_msr || - ops->read_msr(MSR_IA32_BNDCFGS, &bndcfg, ctxt) != X86EMUL_OKAY ) - return; - if ( (bndcfg & IA32_BNDCFGS_ENABLE) && !(bndcfg & IA32_BNDCFGS_PRESERVE) ) - { - /* - * Using BNDMK or any other MPX instruction here is pointless, as - * we run with MPX disabled ourselves, and hence they're all no-ops. - * Therefore we have two ways to clear BNDn: Enable MPX temporarily - * (in which case executing any suitable non-prefixed branch - * instruction would do), or use XRSTOR. - */ - xstate_set_init(X86_XCR0_BNDREGS); - } - done:; -} - -int cf_check x86emul_unhandleable_rw( - enum x86_segment seg, - unsigned long offset, - void *p_data, - unsigned int bytes, - struct x86_emulate_ctxt *ctxt) -{ - return X86EMUL_UNHANDLEABLE; -} - -/* Helper definitions. */ -#define op_bytes (state->op_bytes) -#define ad_bytes (state->ad_bytes) -#define ext (state->ext) -#define modrm (state->modrm) -#define modrm_mod (state->modrm_mod) -#define modrm_reg (state->modrm_reg) -#define modrm_rm (state->modrm_rm) -#define rex_prefix (state->rex_prefix) -#define lock_prefix (state->lock_prefix) -#define vex (state->vex) -#define evex (state->evex) -#define evex_encoded() (evex.mbs) -#define ea (state->ea) - -static int -x86_decode_onebyte( - struct x86_emulate_state *state, - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - int rc = X86EMUL_OKAY; - - switch ( ctxt->opcode ) - { - case 0x06: /* push %%es */ - case 0x07: /* pop %%es */ - case 0x0e: /* push %%cs */ - case 0x16: /* push %%ss */ - case 0x17: /* pop %%ss */ - case 0x1e: /* push %%ds */ - case 0x1f: /* pop %%ds */ - case 0x27: /* daa */ - case 0x2f: /* das */ - case 0x37: /* aaa */ - case 0x3f: /* aas */ - case 0x60: /* pusha */ - case 0x61: /* popa */ - case 0x62: /* bound */ - case 0xc4: /* les */ - case 0xc5: /* lds */ - case 0xce: /* into */ - case 0xd4: /* aam */ - case 0xd5: /* aad */ - case 0xd6: /* salc */ - state->not_64bit = true; - break; - - case 0x82: /* Grp1 (x86/32 only) */ - state->not_64bit = true; - /* fall through */ - case 0x80: case 0x81: case 0x83: /* Grp1 */ - if ( (modrm_reg & 7) == 7 ) /* cmp */ - state->desc = (state->desc & ByteOp) | DstNone | SrcMem; - break; - - case 0x90: /* nop / pause */ - if ( repe_prefix() ) - ctxt->opcode |= X86EMUL_OPC_F3(0, 0); - break; - - case 0x9a: /* call (far, absolute) */ - case 0xea: /* jmp (far, absolute) */ - generate_exception_if(mode_64bit(), EXC_UD); - - imm1 = insn_fetch_bytes(op_bytes); - imm2 = insn_fetch_type(uint16_t); - break; - - case 0xa0: case 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */ - case 0xa2: case 0xa3: /* mov {%al,%ax,%eax,%rax},mem.offs */ - /* Source EA is not encoded via ModRM. */ - ea.type = OP_MEM; - ea.mem.off = insn_fetch_bytes(ad_bytes); - break; - - case 0xb8 ... 0xbf: /* mov imm{16,32,64},r{16,32,64} */ - if ( op_bytes == 8 ) /* Fetch more bytes to obtain imm64. */ - imm1 = ((uint32_t)imm1 | - ((uint64_t)insn_fetch_type(uint32_t) << 32)); - break; - - case 0xc8: /* enter imm16,imm8 */ - imm2 = insn_fetch_type(uint8_t); - break; - - case 0xf6: case 0xf7: /* Grp3 */ - if ( !(modrm_reg & 6) ) /* test */ - state->desc = (state->desc & ByteOp) | DstNone | SrcMem; - break; - - case 0xff: /* Grp5 */ - switch ( modrm_reg & 7 ) - { - case 2: /* call (near) */ - case 4: /* jmp (near) */ - if ( mode_64bit() && (op_bytes == 4 || !amd_like(ctxt)) ) - op_bytes = 8; - state->desc = DstNone | SrcMem | Mov; - break; - - case 3: /* call (far, absolute indirect) */ - case 5: /* jmp (far, absolute indirect) */ - /* REX.W ignored on a vendor-dependent basis. */ - if ( op_bytes == 8 && amd_like(ctxt) ) - op_bytes = 4; - state->desc = DstNone | SrcMem | Mov; - break; - - case 6: /* push */ - if ( mode_64bit() && op_bytes == 4 ) - op_bytes = 8; - state->desc = DstNone | SrcMem | Mov; - break; - } - break; - } - - done: - return rc; -} - -static int -x86_decode_twobyte( - struct x86_emulate_state *state, - struct x86_emulate_ctxt *ctxt, - const struct x86_emulate_ops *ops) -{ - int rc = X86EMUL_OKAY; - - switch ( ctxt->opcode & X86EMUL_OPC_MASK ) - { - case 0x00: /* Grp6 */ - switch ( modrm_reg & 6 ) - { - case 0: - state->desc |= DstMem | SrcImplicit | Mov; - break; - case 2: case 4: - state->desc |= SrcMem16; - break; - } - break; - - case 0x78: - state->desc = ImplicitOps; - state->simd_size = simd_none; - switch ( vex.pfx ) - { - case vex_66: /* extrq $imm8, $imm8, xmm */ - case vex_f2: /* insertq $imm8, $imm8, xmm, xmm */ - imm1 = insn_fetch_type(uint8_t); - imm2 = insn_fetch_type(uint8_t); - break; - } - /* fall through */ - case 0x10 ... 0x18: - case 0x28 ... 0x2f: - case 0x50 ... 0x77: - case 0x7a ... 0x7d: - case 0x7f: - case 0xc2 ... 0xc3: - case 0xc5 ... 0xc6: - case 0xd0 ... 0xef: - case 0xf1 ... 0xfe: - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); - break; - - case 0x20: case 0x22: /* mov to/from cr */ - if ( lock_prefix && vcpu_has_cr8_legacy() ) - { - modrm_reg += 8; - lock_prefix = false; - } - /* fall through */ - case 0x21: case 0x23: /* mov to/from dr */ - ASSERT(ea.type == OP_REG); /* Early operand adjustment ensures this. */ - generate_exception_if(lock_prefix, EXC_UD); - op_bytes = mode_64bit() ? 8 : 4; - break; - - case 0x79: - state->desc = DstReg | SrcMem; - state->simd_size = simd_packed_int; - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); - break; - - case 0x7e: - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); - if ( vex.pfx == vex_f3 ) /* movq xmm/m64,xmm */ - { - case X86EMUL_OPC_VEX_F3(0, 0x7e): /* vmovq xmm/m64,xmm */ - case X86EMUL_OPC_EVEX_F3(0, 0x7e): /* vmovq xmm/m64,xmm */ - state->desc = DstImplicit | SrcMem | TwoOp; - state->simd_size = simd_other; - /* Avoid the state->desc clobbering of TwoOp below. */ - return X86EMUL_OKAY; - } - break; - - case X86EMUL_OPC_VEX(0, 0x90): /* kmov{w,q} */ - case X86EMUL_OPC_VEX_66(0, 0x90): /* kmov{b,d} */ - state->desc = DstReg | SrcMem | Mov; - state->simd_size = simd_other; - break; - - case X86EMUL_OPC_VEX(0, 0x91): /* kmov{w,q} */ - case X86EMUL_OPC_VEX_66(0, 0x91): /* kmov{b,d} */ - state->desc = DstMem | SrcReg | Mov; - state->simd_size = simd_other; - break; - - case 0xae: - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); - /* fall through */ - case X86EMUL_OPC_VEX(0, 0xae): - switch ( modrm_reg & 7 ) - { - case 2: /* {,v}ldmxcsr */ - state->desc = DstImplicit | SrcMem | Mov; - op_bytes = 4; - break; - - case 3: /* {,v}stmxcsr */ - state->desc = DstMem | SrcImplicit | Mov; - op_bytes = 4; - break; - } - break; - - case 0xb2: /* lss */ - case 0xb4: /* lfs */ - case 0xb5: /* lgs */ - /* REX.W ignored on a vendor-dependent basis. */ - if ( op_bytes == 8 && amd_like(ctxt) ) - op_bytes = 4; - break; - - case 0xb8: /* jmpe / popcnt */ - if ( rep_prefix() ) - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); - break; - - /* Intentionally not handling here despite being modified by F3: - case 0xbc: bsf / tzcnt - case 0xbd: bsr / lzcnt - * They're being dealt with in the execution phase (if at all). - */ - - case 0xc4: /* pinsrw */ - ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:11:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:11:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517634.803262 (Exim 4.92) (envelope-from ) id 1pjY1T-0003xG-5G; Tue, 04 Apr 2023 04:11:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517634.803262; Tue, 04 Apr 2023 04:11:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1T-0003x9-28; Tue, 04 Apr 2023 04:11:55 +0000 Received: by outflank-mailman (input) for mailman id 517634; Tue, 04 Apr 2023 04:11:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1R-0003wi-8a for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1R-00069M-7Y for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY1R-0007T9-6R for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:11:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=O8tHKeTWABvXi/i1EgrK/SdqAjFbpAB4MfYYldQUENc=; b=uWx9sLo5T2oiST1WFoDMqeXtv5 UPedkohZBvP9diljjWKXMCWmJBFWtJ6Kds0BB9sCl4Jdz4RaDIpuVitM70lnGMlCVf96IDUIX6Nga h+7clfrMmFjUaoU/dBGIc08KJ8vG6HZhDI6XpM3fj5gET/Uj1l3yMoApfeWFTlZQWYlw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: move x86_emul_blk() to separate source file Message-Id: Date: Tue, 04 Apr 2023 04:11:53 +0000 commit c80243f94386f64f85c5d92ef0bb19dc406eefc2 Author: Jan Beulich AuthorDate: Mon Apr 3 12:47:08 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:47:08 2023 +0200 x86emul: move x86_emul_blk() to separate source file The function is already non-trivial and is expected to further grow. Code moved gets slightly adjusted in a few places, e.g. replacing EXC_* by X86_EXC_* (such that EXC_* don't need to move as well; we want these to be phased out anyway). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.c | 5 +- tools/tests/x86_emulator/x86-emulate.h | 2 + xen/arch/x86/x86_emulate.c | 2 - xen/arch/x86/x86_emulate/Makefile | 1 + xen/arch/x86/x86_emulate/blk.c | 396 +++++++++++++++++++++++++++++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 365 ------------------------------ 7 files changed, 404 insertions(+), 369 deletions(-) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 0b28ed08f5..a8c140e83c 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -252,7 +252,7 @@ endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o -OBJS += x86_emulate/decode.o x86_emulate/fpu.o +OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 82e82b3171..f6ee094397 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -35,7 +35,10 @@ static bool use_xsave; * (When debugging the emulator, care needs to be taken when inserting * printf() or alike function calls into regions using this.) */ -#define FXSAVE_AREA ((struct x86_fxsr *)fpu_save_area) +struct x86_fxsr *get_fpu_save_area(void) +{ + return (void *)fpu_save_area; +} void emul_save_fpu_state(void) { diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index eff46e22c8..0ae528a741 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -80,6 +80,8 @@ bool emul_test_init(void); void emul_save_fpu_state(void); void emul_restore_fpu_state(void); +struct x86_fxsr *get_fpu_save_area(void); + /* * In order to reasonably use the above, wrap library calls we use and which we * think might access any of the FPU state into wrappers saving/restoring state diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index 8f986186c1..5706a5c541 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -25,8 +25,6 @@ #define cpu_has_amd_erratum(nr) \ cpu_has_amd_erratum(¤t_cpu_data, AMD_ERRATUM_##nr) -#define FXSAVE_AREA current->arch.fpu_ctxt - #include "x86_emulate/x86_emulate.c" int cf_check x86emul_read_xcr( diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index 223c78c0c5..b0fa6d4621 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -1,5 +1,6 @@ obj-y += 0f01.o obj-y += 0fae.o obj-y += 0fc7.o +obj-y += blk.o obj-y += decode.o obj-$(CONFIG_HVM) += fpu.o diff --git a/xen/arch/x86/x86_emulate/blk.c b/xen/arch/x86/x86_emulate/blk.c new file mode 100644 index 0000000000..64b51fed04 --- /dev/null +++ b/xen/arch/x86/x86_emulate/blk.c @@ -0,0 +1,396 @@ +/****************************************************************************** + * blk.c - helper for x86_emulate.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ + !defined(X86EMUL_NO_SIMD) +# ifdef __XEN__ +# include +# define FXSAVE_AREA current->arch.fpu_ctxt +# else +# define FXSAVE_AREA get_fpu_save_area() +# endif +#endif + +int x86_emul_blk( + void *ptr, + void *data, + unsigned int bytes, + uint32_t *eflags, + struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt) +{ + int rc = X86EMUL_OKAY; + + switch ( s->blk ) + { + bool zf; +#ifndef X86EMUL_NO_FPU + struct { + struct x87_env32 env; + struct { + uint8_t bytes[10]; + } freg[8]; + } fpstate; +#endif + + /* + * Throughout this switch(), memory clobbers are used to compensate + * that other operands may not properly express the (full) memory + * ranges covered. + */ + case blk_enqcmd: + ASSERT(bytes == 64); + if ( ((unsigned long)ptr & 0x3f) ) + { + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + *eflags &= ~EFLAGS_MASK; +#ifdef HAVE_AS_ENQCMD + asm ( "enqcmds (%[src]), %[dst]" ASM_FLAG_OUT(, "; setz %[zf]") + : [zf] ASM_FLAG_OUT("=@ccz", "=qm") (zf) + : [src] "r" (data), [dst] "r" (ptr) : "memory" ); +#else + /* enqcmds (%rsi), %rdi */ + asm ( ".byte 0xf3, 0x0f, 0x38, 0xf8, 0x3e" + ASM_FLAG_OUT(, "; setz %[zf]") + : [zf] ASM_FLAG_OUT("=@ccz", "=qm") (zf) + : "S" (data), "D" (ptr) : "memory" ); +#endif + if ( zf ) + *eflags |= X86_EFLAGS_ZF; + break; + +#ifndef X86EMUL_NO_FPU + + case blk_fld: + ASSERT(!data); + + /* s->rex_prefix carries CR0.PE && !EFLAGS.VM setting */ + switch ( bytes ) + { + case sizeof(fpstate.env): /* 32-bit FLDENV */ + case sizeof(fpstate): /* 32-bit FRSTOR */ + memcpy(&fpstate.env, ptr, sizeof(fpstate.env)); + if ( !s->rex_prefix ) + { + /* Convert 32-bit real/vm86 to 32-bit prot format. */ + unsigned int fip = fpstate.env.mode.real.fip_lo + + (fpstate.env.mode.real.fip_hi << 16); + unsigned int fdp = fpstate.env.mode.real.fdp_lo + + (fpstate.env.mode.real.fdp_hi << 16); + unsigned int fop = fpstate.env.mode.real.fop; + + fpstate.env.mode.prot.fip = fip & 0xf; + fpstate.env.mode.prot.fcs = fip >> 4; + fpstate.env.mode.prot.fop = fop; + fpstate.env.mode.prot.fdp = fdp & 0xf; + fpstate.env.mode.prot.fds = fdp >> 4; + } + + if ( bytes == sizeof(fpstate.env) ) + ptr = NULL; + else + ptr += sizeof(fpstate.env); + break; + + case sizeof(struct x87_env16): /* 16-bit FLDENV */ + case sizeof(struct x87_env16) + sizeof(fpstate.freg): /* 16-bit FRSTOR */ + { + const struct x87_env16 *env = ptr; + + fpstate.env.fcw = env->fcw; + fpstate.env.fsw = env->fsw; + fpstate.env.ftw = env->ftw; + + if ( s->rex_prefix ) + { + /* Convert 16-bit prot to 32-bit prot format. */ + fpstate.env.mode.prot.fip = env->mode.prot.fip; + fpstate.env.mode.prot.fcs = env->mode.prot.fcs; + fpstate.env.mode.prot.fdp = env->mode.prot.fdp; + fpstate.env.mode.prot.fds = env->mode.prot.fds; + fpstate.env.mode.prot.fop = 0; /* unknown */ + } + else + { + /* Convert 16-bit real/vm86 to 32-bit prot format. */ + unsigned int fip = env->mode.real.fip_lo + + (env->mode.real.fip_hi << 16); + unsigned int fdp = env->mode.real.fdp_lo + + (env->mode.real.fdp_hi << 16); + unsigned int fop = env->mode.real.fop; + + fpstate.env.mode.prot.fip = fip & 0xf; + fpstate.env.mode.prot.fcs = fip >> 4; + fpstate.env.mode.prot.fop = fop; + fpstate.env.mode.prot.fdp = fdp & 0xf; + fpstate.env.mode.prot.fds = fdp >> 4; + } + + if ( bytes == sizeof(*env) ) + ptr = NULL; + else + ptr += sizeof(*env); + break; + } + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + + if ( ptr ) + { + memcpy(fpstate.freg, ptr, sizeof(fpstate.freg)); + asm volatile ( "frstor %0" :: "m" (fpstate) ); + } + else + asm volatile ( "fldenv %0" :: "m" (fpstate.env) ); + break; + + case blk_fst: + ASSERT(!data); + + /* Don't chance consuming uninitialized data. */ + memset(&fpstate, 0, sizeof(fpstate)); + if ( bytes > sizeof(fpstate.env) ) + asm ( "fnsave %0" : "+m" (fpstate) ); + else + asm ( "fnstenv %0" : "+m" (fpstate.env) ); + + /* s->rex_prefix carries CR0.PE && !EFLAGS.VM setting */ + switch ( bytes ) + { + case sizeof(fpstate.env): /* 32-bit FNSTENV */ + case sizeof(fpstate): /* 32-bit FNSAVE */ + if ( !s->rex_prefix ) + { + /* Convert 32-bit prot to 32-bit real/vm86 format. */ + unsigned int fip = fpstate.env.mode.prot.fip + + (fpstate.env.mode.prot.fcs << 4); + unsigned int fdp = fpstate.env.mode.prot.fdp + + (fpstate.env.mode.prot.fds << 4); + unsigned int fop = fpstate.env.mode.prot.fop; + + memset(&fpstate.env.mode, 0, sizeof(fpstate.env.mode)); + fpstate.env.mode.real.fip_lo = fip; + fpstate.env.mode.real.fip_hi = fip >> 16; + fpstate.env.mode.real.fop = fop; + fpstate.env.mode.real.fdp_lo = fdp; + fpstate.env.mode.real.fdp_hi = fdp >> 16; + } + memcpy(ptr, &fpstate.env, sizeof(fpstate.env)); + if ( bytes == sizeof(fpstate.env) ) + ptr = NULL; + else + ptr += sizeof(fpstate.env); + break; + + case sizeof(struct x87_env16): /* 16-bit FNSTENV */ + case sizeof(struct x87_env16) + sizeof(fpstate.freg): /* 16-bit FNSAVE */ + if ( s->rex_prefix ) + { + /* Convert 32-bit prot to 16-bit prot format. */ + struct x87_env16 *env = ptr; + + env->fcw = fpstate.env.fcw; + env->fsw = fpstate.env.fsw; + env->ftw = fpstate.env.ftw; + env->mode.prot.fip = fpstate.env.mode.prot.fip; + env->mode.prot.fcs = fpstate.env.mode.prot.fcs; + env->mode.prot.fdp = fpstate.env.mode.prot.fdp; + env->mode.prot.fds = fpstate.env.mode.prot.fds; + } + else + { + /* Convert 32-bit prot to 16-bit real/vm86 format. */ + unsigned int fip = fpstate.env.mode.prot.fip + + (fpstate.env.mode.prot.fcs << 4); + unsigned int fdp = fpstate.env.mode.prot.fdp + + (fpstate.env.mode.prot.fds << 4); + struct x87_env16 env = { + .fcw = fpstate.env.fcw, + .fsw = fpstate.env.fsw, + .ftw = fpstate.env.ftw, + .mode.real.fip_lo = fip, + .mode.real.fip_hi = fip >> 16, + .mode.real.fop = fpstate.env.mode.prot.fop, + .mode.real.fdp_lo = fdp, + .mode.real.fdp_hi = fdp >> 16 + }; + + memcpy(ptr, &env, sizeof(env)); + } + if ( bytes == sizeof(struct x87_env16) ) + ptr = NULL; + else + ptr += sizeof(struct x87_env16); + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + + if ( ptr ) + memcpy(ptr, fpstate.freg, sizeof(fpstate.freg)); + break; + +#endif /* X86EMUL_NO_FPU */ + +#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ + !defined(X86EMUL_NO_SIMD) + + case blk_fxrstor: + { + struct x86_fxsr *fxsr = FXSAVE_AREA; + + ASSERT(!data); + ASSERT(bytes == sizeof(*fxsr)); + ASSERT(s->op_bytes <= bytes); + + if ( s->op_bytes < sizeof(*fxsr) ) + { + if ( s->rex_prefix & REX_W ) + { + /* + * The only way to force fxsaveq on a wide range of gas + * versions. On older versions the rex64 prefix works only if + * we force an addressing mode that doesn't require extended + * registers. + */ + asm volatile ( ".byte 0x48; fxsave (%1)" + : "=m" (*fxsr) : "R" (fxsr) ); + } + else + asm volatile ( "fxsave %0" : "=m" (*fxsr) ); + } + + /* + * Don't chance the reserved or available ranges to contain any + * data FXRSTOR may actually consume in some way: Copy only the + * defined portion, and zero the rest. + */ + memcpy(fxsr, ptr, min(s->op_bytes, + (unsigned int)offsetof(struct x86_fxsr, rsvd))); + memset(fxsr->rsvd, 0, sizeof(*fxsr) - offsetof(struct x86_fxsr, rsvd)); + + generate_exception_if(fxsr->mxcsr & ~mxcsr_mask, X86_EXC_GP, 0); + + if ( s->rex_prefix & REX_W ) + { + /* See above for why operand/constraints are this way. */ + asm volatile ( ".byte 0x48; fxrstor (%1)" + :: "m" (*fxsr), "R" (fxsr) ); + } + else + asm volatile ( "fxrstor %0" :: "m" (*fxsr) ); + break; + } + + case blk_fxsave: + { + struct x86_fxsr *fxsr = FXSAVE_AREA; + + ASSERT(!data); + ASSERT(bytes == sizeof(*fxsr)); + ASSERT(s->op_bytes <= bytes); + + if ( s->op_bytes < sizeof(*fxsr) ) + /* Don't chance consuming uninitialized data. */ + memset(fxsr, 0, s->op_bytes); + else + fxsr = ptr; + + if ( s->rex_prefix & REX_W ) + { + /* See above for why operand/constraints are this way. */ + asm volatile ( ".byte 0x48; fxsave (%1)" + : "=m" (*fxsr) : "R" (fxsr) ); + } + else + asm volatile ( "fxsave %0" : "=m" (*fxsr) ); + + if ( fxsr != ptr ) /* i.e. s->op_bytes < sizeof(*fxsr) */ + memcpy(ptr, fxsr, s->op_bytes); + break; + } + +#endif /* X86EMUL_NO_{FPU,MMX,SIMD} */ + + case blk_movdir: + switch ( bytes ) + { +#ifdef __x86_64__ + case sizeof(uint32_t): +# ifdef HAVE_AS_MOVDIR + asm ( "movdiri %0, (%1)" + :: "r" (*(uint32_t *)data), "r" (ptr) : "memory" ); +# else + /* movdiri %esi, (%rdi) */ + asm ( ".byte 0x0f, 0x38, 0xf9, 0x37" + :: "S" (*(uint32_t *)data), "D" (ptr) : "memory" ); +# endif + break; +#endif + + case sizeof(unsigned long): +#ifdef HAVE_AS_MOVDIR + asm ( "movdiri %0, (%1)" + :: "r" (*(unsigned long *)data), "r" (ptr) : "memory" ); +#else + /* movdiri %rsi, (%rdi) */ + asm ( ".byte 0x48, 0x0f, 0x38, 0xf9, 0x37" + :: "S" (*(unsigned long *)data), "D" (ptr) : "memory" ); +#endif + break; + + case 64: + if ( ((unsigned long)ptr & 0x3f) ) + { + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } +#ifdef HAVE_AS_MOVDIR + asm ( "movdir64b (%0), %1" :: "r" (data), "r" (ptr) : "memory" ); +#else + /* movdir64b (%rsi), %rdi */ + asm ( ".byte 0x66, 0x0f, 0x38, 0xf8, 0x3e" + :: "S" (data), "D" (ptr) : "memory" ); +#endif + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + break; + + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } + + done: __maybe_unused; + return rc; + +} diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index ccaf6aa2dd..29d9203cdf 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -8369,371 +8369,6 @@ int x86_emul_rmw( return X86EMUL_OKAY; } -int x86_emul_blk( - void *ptr, - void *data, - unsigned int bytes, - uint32_t *eflags, - struct x86_emulate_state *state, - struct x86_emulate_ctxt *ctxt) -{ - int rc = X86EMUL_OKAY; - - switch ( state->blk ) - { - bool zf; -#ifndef X86EMUL_NO_FPU - struct { - struct x87_env32 env; - struct { - uint8_t bytes[10]; - } freg[8]; - } fpstate; -#endif - - /* - * Throughout this switch(), memory clobbers are used to compensate - * that other operands may not properly express the (full) memory - * ranges covered. - */ - case blk_enqcmd: - ASSERT(bytes == 64); - if ( ((unsigned long)ptr & 0x3f) ) - { - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } - *eflags &= ~EFLAGS_MASK; -#ifdef HAVE_AS_ENQCMD - asm ( "enqcmds (%[src]), %[dst]" ASM_FLAG_OUT(, "; setz %[zf]") - : [zf] ASM_FLAG_OUT("=@ccz", "=qm") (zf) - : [src] "r" (data), [dst] "r" (ptr) : "memory" ); -#else - /* enqcmds (%rsi), %rdi */ - asm ( ".byte 0xf3, 0x0f, 0x38, 0xf8, 0x3e" - ASM_FLAG_OUT(, "; setz %[zf]") - : [zf] ASM_FLAG_OUT("=@ccz", "=qm") (zf) - : "S" (data), "D" (ptr) : "memory" ); -#endif - if ( zf ) - *eflags |= X86_EFLAGS_ZF; - break; - -#ifndef X86EMUL_NO_FPU - - case blk_fld: - ASSERT(!data); - - /* state->rex_prefix carries CR0.PE && !EFLAGS.VM setting */ - switch ( bytes ) - { - case sizeof(fpstate.env): /* 32-bit FLDENV */ - case sizeof(fpstate): /* 32-bit FRSTOR */ - memcpy(&fpstate.env, ptr, sizeof(fpstate.env)); - if ( !state->rex_prefix ) - { - /* Convert 32-bit real/vm86 to 32-bit prot format. */ - unsigned int fip = fpstate.env.mode.real.fip_lo + - (fpstate.env.mode.real.fip_hi << 16); - unsigned int fdp = fpstate.env.mode.real.fdp_lo + - (fpstate.env.mode.real.fdp_hi << 16); - unsigned int fop = fpstate.env.mode.real.fop; - - fpstate.env.mode.prot.fip = fip & 0xf; - fpstate.env.mode.prot.fcs = fip >> 4; - fpstate.env.mode.prot.fop = fop; - fpstate.env.mode.prot.fdp = fdp & 0xf; - fpstate.env.mode.prot.fds = fdp >> 4; - } - - if ( bytes == sizeof(fpstate.env) ) - ptr = NULL; - else - ptr += sizeof(fpstate.env); - break; - - case sizeof(struct x87_env16): /* 16-bit FLDENV */ - case sizeof(struct x87_env16) + sizeof(fpstate.freg): /* 16-bit FRSTOR */ - { - const struct x87_env16 *env = ptr; - - fpstate.env.fcw = env->fcw; - fpstate.env.fsw = env->fsw; - fpstate.env.ftw = env->ftw; - - if ( state->rex_prefix ) - { - /* Convert 16-bit prot to 32-bit prot format. */ - fpstate.env.mode.prot.fip = env->mode.prot.fip; - fpstate.env.mode.prot.fcs = env->mode.prot.fcs; - fpstate.env.mode.prot.fdp = env->mode.prot.fdp; - fpstate.env.mode.prot.fds = env->mode.prot.fds; - fpstate.env.mode.prot.fop = 0; /* unknown */ - } - else - { - /* Convert 16-bit real/vm86 to 32-bit prot format. */ - unsigned int fip = env->mode.real.fip_lo + - (env->mode.real.fip_hi << 16); - unsigned int fdp = env->mode.real.fdp_lo + - (env->mode.real.fdp_hi << 16); - unsigned int fop = env->mode.real.fop; - - fpstate.env.mode.prot.fip = fip & 0xf; - fpstate.env.mode.prot.fcs = fip >> 4; - fpstate.env.mode.prot.fop = fop; - fpstate.env.mode.prot.fdp = fdp & 0xf; - fpstate.env.mode.prot.fds = fdp >> 4; - } - - if ( bytes == sizeof(*env) ) - ptr = NULL; - else - ptr += sizeof(*env); - break; - } - - default: - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } - - if ( ptr ) - { - memcpy(fpstate.freg, ptr, sizeof(fpstate.freg)); - asm volatile ( "frstor %0" :: "m" (fpstate) ); - } - else - asm volatile ( "fldenv %0" :: "m" (fpstate.env) ); - break; - - case blk_fst: - ASSERT(!data); - - /* Don't chance consuming uninitialized data. */ - memset(&fpstate, 0, sizeof(fpstate)); - if ( bytes > sizeof(fpstate.env) ) - asm ( "fnsave %0" : "+m" (fpstate) ); - else - asm ( "fnstenv %0" : "+m" (fpstate.env) ); - - /* state->rex_prefix carries CR0.PE && !EFLAGS.VM setting */ - switch ( bytes ) - { - case sizeof(fpstate.env): /* 32-bit FNSTENV */ - case sizeof(fpstate): /* 32-bit FNSAVE */ - if ( !state->rex_prefix ) - { - /* Convert 32-bit prot to 32-bit real/vm86 format. */ - unsigned int fip = fpstate.env.mode.prot.fip + - (fpstate.env.mode.prot.fcs << 4); - unsigned int fdp = fpstate.env.mode.prot.fdp + - (fpstate.env.mode.prot.fds << 4); - unsigned int fop = fpstate.env.mode.prot.fop; - - memset(&fpstate.env.mode, 0, sizeof(fpstate.env.mode)); - fpstate.env.mode.real.fip_lo = fip; - fpstate.env.mode.real.fip_hi = fip >> 16; - fpstate.env.mode.real.fop = fop; - fpstate.env.mode.real.fdp_lo = fdp; - fpstate.env.mode.real.fdp_hi = fdp >> 16; - } - memcpy(ptr, &fpstate.env, sizeof(fpstate.env)); - if ( bytes == sizeof(fpstate.env) ) - ptr = NULL; - else - ptr += sizeof(fpstate.env); - break; - - case sizeof(struct x87_env16): /* 16-bit FNSTENV */ - case sizeof(struct x87_env16) + sizeof(fpstate.freg): /* 16-bit FNSAVE */ - if ( state->rex_prefix ) - { - /* Convert 32-bit prot to 16-bit prot format. */ - struct x87_env16 *env = ptr; - - env->fcw = fpstate.env.fcw; - env->fsw = fpstate.env.fsw; - env->ftw = fpstate.env.ftw; - env->mode.prot.fip = fpstate.env.mode.prot.fip; - env->mode.prot.fcs = fpstate.env.mode.prot.fcs; - env->mode.prot.fdp = fpstate.env.mode.prot.fdp; - env->mode.prot.fds = fpstate.env.mode.prot.fds; - } - else - { - /* Convert 32-bit prot to 16-bit real/vm86 format. */ - unsigned int fip = fpstate.env.mode.prot.fip + - (fpstate.env.mode.prot.fcs << 4); - unsigned int fdp = fpstate.env.mode.prot.fdp + - (fpstate.env.mode.prot.fds << 4); - struct x87_env16 env = { - .fcw = fpstate.env.fcw, - .fsw = fpstate.env.fsw, - .ftw = fpstate.env.ftw, - .mode.real.fip_lo = fip, - .mode.real.fip_hi = fip >> 16, - .mode.real.fop = fpstate.env.mode.prot.fop, - .mode.real.fdp_lo = fdp, - .mode.real.fdp_hi = fdp >> 16 - }; - - memcpy(ptr, &env, sizeof(env)); - } - if ( bytes == sizeof(struct x87_env16) ) - ptr = NULL; - else - ptr += sizeof(struct x87_env16); - break; - - default: - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } - - if ( ptr ) - memcpy(ptr, fpstate.freg, sizeof(fpstate.freg)); - break; - -#endif /* X86EMUL_NO_FPU */ - -#if !defined(X86EMUL_NO_FPU) || !defined(X86EMUL_NO_MMX) || \ - !defined(X86EMUL_NO_SIMD) - - case blk_fxrstor: - { - struct x86_fxsr *fxsr = FXSAVE_AREA; - - ASSERT(!data); - ASSERT(bytes == sizeof(*fxsr)); - ASSERT(state->op_bytes <= bytes); - - if ( state->op_bytes < sizeof(*fxsr) ) - { - if ( state->rex_prefix & REX_W ) - { - /* - * The only way to force fxsaveq on a wide range of gas - * versions. On older versions the rex64 prefix works only if - * we force an addressing mode that doesn't require extended - * registers. - */ - asm volatile ( ".byte 0x48; fxsave (%1)" - : "=m" (*fxsr) : "R" (fxsr) ); - } - else - asm volatile ( "fxsave %0" : "=m" (*fxsr) ); - } - - /* - * Don't chance the reserved or available ranges to contain any - * data FXRSTOR may actually consume in some way: Copy only the - * defined portion, and zero the rest. - */ - memcpy(fxsr, ptr, min(state->op_bytes, - (unsigned int)offsetof(struct x86_fxsr, rsvd))); - memset(fxsr->rsvd, 0, sizeof(*fxsr) - offsetof(struct x86_fxsr, rsvd)); - - generate_exception_if(fxsr->mxcsr & ~mxcsr_mask, EXC_GP, 0); - - if ( state->rex_prefix & REX_W ) - { - /* See above for why operand/constraints are this way. */ - asm volatile ( ".byte 0x48; fxrstor (%1)" - :: "m" (*fxsr), "R" (fxsr) ); - } - else - asm volatile ( "fxrstor %0" :: "m" (*fxsr) ); - break; - } - - case blk_fxsave: - { - struct x86_fxsr *fxsr = FXSAVE_AREA; - - ASSERT(!data); - ASSERT(bytes == sizeof(*fxsr)); - ASSERT(state->op_bytes <= bytes); - - if ( state->op_bytes < sizeof(*fxsr) ) - /* Don't chance consuming uninitialized data. */ - memset(fxsr, 0, state->op_bytes); - else - fxsr = ptr; - - if ( state->rex_prefix & REX_W ) - { - /* See above for why operand/constraints are this way. */ - asm volatile ( ".byte 0x48; fxsave (%1)" - : "=m" (*fxsr) : "R" (fxsr) ); - } - else - asm volatile ( "fxsave %0" : "=m" (*fxsr) ); - - if ( fxsr != ptr ) /* i.e. state->op_bytes < sizeof(*fxsr) */ - memcpy(ptr, fxsr, state->op_bytes); - break; - } - -#endif /* X86EMUL_NO_{FPU,MMX,SIMD} */ - - case blk_movdir: - switch ( bytes ) - { -#ifdef __x86_64__ - case sizeof(uint32_t): -# ifdef HAVE_AS_MOVDIR - asm ( "movdiri %0, (%1)" - :: "r" (*(uint32_t *)data), "r" (ptr) : "memory" ); -# else - /* movdiri %esi, (%rdi) */ - asm ( ".byte 0x0f, 0x38, 0xf9, 0x37" - :: "S" (*(uint32_t *)data), "D" (ptr) : "memory" ); -# endif - break; -#endif - - case sizeof(unsigned long): -#ifdef HAVE_AS_MOVDIR - asm ( "movdiri %0, (%1)" - :: "r" (*(unsigned long *)data), "r" (ptr) : "memory" ); -#else - /* movdiri %rsi, (%rdi) */ - asm ( ".byte 0x48, 0x0f, 0x38, 0xf9, 0x37" - :: "S" (*(unsigned long *)data), "D" (ptr) : "memory" ); -#endif - break; - - case 64: - if ( ((unsigned long)ptr & 0x3f) ) - { - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } -#ifdef HAVE_AS_MOVDIR - asm ( "movdir64b (%0), %1" :: "r" (data), "r" (ptr) : "memory" ); -#else - /* movdir64b (%rsi), %rdi */ - asm ( ".byte 0x66, 0x0f, 0x38, 0xf8, 0x3e" - :: "S" (data), "D" (ptr) : "memory" ); -#endif - break; - - default: - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } - break; - - default: - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; - } - - done: - return rc; -} - static void __init __maybe_unused build_assertions(void) { /* Check the values against SReg3 encoding in opcode/ModRM bytes. */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517635.803266 (Exim 4.92) (envelope-from ) id 1pjY1d-00040Q-9u; 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Tue, 04 Apr 2023 04:12:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wOKhvWvStTq33muXt0GS3PJvpxR+3ictuT5acpTgTSo=; b=WBROp/tcJZV8zKQeXYLF4b34VL 9pf9U0BBUd9cjdCNVCwsQfJlkVjMRgNfxhAGgQ/xpvH+MzP7HNv5HlBeEv92kciysfe2xIGYWOTM/ 9tUyk9OVr1Tm49+tjTb4mfGfPnc69LZmsUPRaFf9TrJLPH7JH6CXMOa8vLK6x/tSD2lc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: move various utility functions to separate source files Message-Id: Date: Tue, 04 Apr 2023 04:12:03 +0000 commit de7d113212b0e28423b6d0e983aa164e76b415b7 Author: Jan Beulich AuthorDate: Mon Apr 3 12:48:12 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:48:12 2023 +0200 x86emul: move various utility functions to separate source files Many are needed by the hypervisor only - have one file for this purpose. Some are also needed by the harness (but not the fuzzer) - have another file for these. Code moved gets slightly adjusted in a few places, e.g. replacing "state" by "s" (like was done for other that has been split off). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/tests/x86_emulator/Makefile | 2 +- xen/arch/x86/x86_emulate.c | 124 ----------- xen/arch/x86/x86_emulate/Makefile | 2 + xen/arch/x86/x86_emulate/private.h | 7 + xen/arch/x86/x86_emulate/util-xen.c | 250 +++++++++++++++++++++ xen/arch/x86/x86_emulate/util.c | 298 +++++++++++++++++++++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 390 --------------------------------- 7 files changed, 558 insertions(+), 515 deletions(-) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index a8c140e83c..f5d88fb9f6 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -252,7 +252,7 @@ endif # 32-bit override OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o -OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o +OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o x86_emulate/util.o $(TARGET): $(OBJS) $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ diff --git a/xen/arch/x86/x86_emulate.c b/xen/arch/x86/x86_emulate.c index 5706a5c541..5f614bd691 100644 --- a/xen/arch/x86/x86_emulate.c +++ b/xen/arch/x86/x86_emulate.c @@ -15,7 +15,6 @@ #include /* current_cpu_info */ #include #include /* cpu_has_amd_erratum() */ -#include /* Avoid namespace pollution. */ #undef cmpxchg @@ -27,129 +26,6 @@ #include "x86_emulate/x86_emulate.c" -int cf_check x86emul_read_xcr( - unsigned int reg, uint64_t *val, struct x86_emulate_ctxt *ctxt) -{ - switch ( reg ) - { - case 0: - *val = current->arch.xcr0; - return X86EMUL_OKAY; - - case 1: - if ( current->domain->arch.cpuid->xstate.xgetbv1 ) - break; - /* fall through */ - default: - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); - return X86EMUL_EXCEPTION; - } - - *val = xgetbv(reg); - - return X86EMUL_OKAY; -} - -/* Note: May be called with ctxt=NULL. */ -int cf_check x86emul_write_xcr( - unsigned int reg, uint64_t val, struct x86_emulate_ctxt *ctxt) -{ - switch ( reg ) - { - case 0: - break; - - default: - gp_fault: - if ( ctxt ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); - return X86EMUL_EXCEPTION; - } - - if ( unlikely(handle_xsetbv(reg, val) != 0) ) - goto gp_fault; - - return X86EMUL_OKAY; -} - -#ifdef CONFIG_PV -/* Called with NULL ctxt in hypercall context. */ -int cf_check x86emul_read_dr( - unsigned int reg, unsigned long *val, struct x86_emulate_ctxt *ctxt) -{ - struct vcpu *curr = current; - - /* HVM support requires a bit more plumbing before it will work. */ - ASSERT(is_pv_vcpu(curr)); - - switch ( reg ) - { - case 0 ... 3: - *val = array_access_nospec(curr->arch.dr, reg); - break; - - case 4: - if ( curr->arch.pv.ctrlreg[4] & X86_CR4_DE ) - goto ud_fault; - - /* Fallthrough */ - case 6: - *val = curr->arch.dr6; - break; - - case 5: - if ( curr->arch.pv.ctrlreg[4] & X86_CR4_DE ) - goto ud_fault; - - /* Fallthrough */ - case 7: - *val = curr->arch.dr7 | curr->arch.pv.dr7_emul; - break; - - ud_fault: - default: - if ( ctxt ) - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); - - return X86EMUL_EXCEPTION; - } - - return X86EMUL_OKAY; -} - -int cf_check x86emul_write_dr( - unsigned int reg, unsigned long val, struct x86_emulate_ctxt *ctxt) -{ - struct vcpu *curr = current; - - /* HVM support requires a bit more plumbing before it will work. */ - ASSERT(is_pv_vcpu(curr)); - - switch ( set_debugreg(curr, reg, val) ) - { - case 0: - return X86EMUL_OKAY; - - case -ENODEV: - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); - return X86EMUL_EXCEPTION; - - default: - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); - return X86EMUL_EXCEPTION; - } -} -#endif /* CONFIG_PV */ - -int cf_check x86emul_cpuid( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res, - struct x86_emulate_ctxt *ctxt) -{ - guest_cpuid(current, leaf, subleaf, res); - - return X86EMUL_OKAY; -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/x86_emulate/Makefile b/xen/arch/x86/x86_emulate/Makefile index b0fa6d4621..2e20d65d78 100644 --- a/xen/arch/x86/x86_emulate/Makefile +++ b/xen/arch/x86/x86_emulate/Makefile @@ -4,3 +4,5 @@ obj-y += 0fc7.o obj-y += blk.o obj-y += decode.o obj-$(CONFIG_HVM) += fpu.o +obj-y += util.o +obj-y += util-xen.o diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 4ce06dc2a1..653a298c70 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -332,6 +332,13 @@ struct x86_emulate_state { #endif }; +static inline void check_state(const struct x86_emulate_state *s) +{ +#if defined(__XEN__) && !defined(NDEBUG) + ASSERT(s->caller); +#endif +} + typedef union { uint64_t mmx; uint64_t __attribute__ ((aligned(16))) xmm[2]; diff --git a/xen/arch/x86/x86_emulate/util-xen.c b/xen/arch/x86/x86_emulate/util-xen.c new file mode 100644 index 0000000000..04b1cb8ca0 --- /dev/null +++ b/xen/arch/x86/x86_emulate/util-xen.c @@ -0,0 +1,250 @@ +/****************************************************************************** + * util-xen.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator hypervisor- + * only utility functions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +#include +#include +#include +#include + +#ifndef NDEBUG +void x86_emulate_free_state(struct x86_emulate_state *s) +{ + check_state(s); + s->caller = NULL; +} +#endif + +unsigned int x86_insn_opsize(const struct x86_emulate_state *s) +{ + check_state(s); + + return s->op_bytes << 3; +} + +int x86_insn_modrm(const struct x86_emulate_state *s, + unsigned int *rm, unsigned int *reg) +{ + check_state(s); + + if ( unlikely(s->modrm_mod > 3) ) + { + if ( rm ) + *rm = ~0U; + if ( reg ) + *reg = ~0U; + return -EINVAL; + } + + if ( rm ) + *rm = s->modrm_rm; + if ( reg ) + *reg = s->modrm_reg; + + return s->modrm_mod; +} + +unsigned long x86_insn_operand_ea(const struct x86_emulate_state *s, + enum x86_segment *seg) +{ + *seg = s->ea.type == OP_MEM ? s->ea.mem.seg : x86_seg_none; + + check_state(s); + + return s->ea.mem.off; +} + +bool cf_check x86_insn_is_portio(const struct x86_emulate_state *s, + const struct x86_emulate_ctxt *ctxt) +{ + switch ( ctxt->opcode ) + { + case 0x6c ... 0x6f: /* INS / OUTS */ + case 0xe4 ... 0xe7: /* IN / OUT imm8 */ + case 0xec ... 0xef: /* IN / OUT %dx */ + return true; + } + + return false; +} + +bool cf_check x86_insn_is_cr_access(const struct x86_emulate_state *s, + const struct x86_emulate_ctxt *ctxt) +{ + switch ( ctxt->opcode ) + { + unsigned int ext; + + case X86EMUL_OPC(0x0f, 0x01): + if ( x86_insn_modrm(s, NULL, &ext) >= 0 + && (ext & 5) == 4 ) /* SMSW / LMSW */ + return true; + break; + + case X86EMUL_OPC(0x0f, 0x06): /* CLTS */ + case X86EMUL_OPC(0x0f, 0x20): /* MOV from CRn */ + case X86EMUL_OPC(0x0f, 0x22): /* MOV to CRn */ + return true; + } + + return false; +} + +unsigned long x86_insn_immediate(const struct x86_emulate_state *s, + unsigned int nr) +{ + check_state(s); + + switch ( nr ) + { + case 0: + return s->imm1; + case 1: + return s->imm2; + } + + return 0; +} + +int cf_check x86emul_read_xcr(unsigned int reg, uint64_t *val, + struct x86_emulate_ctxt *ctxt) +{ + switch ( reg ) + { + case 0: + *val = current->arch.xcr0; + return X86EMUL_OKAY; + + case 1: + if ( current->domain->arch.cpuid->xstate.xgetbv1 ) + break; + /* fall through */ + default: + x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + return X86EMUL_EXCEPTION; + } + + *val = xgetbv(reg); + + return X86EMUL_OKAY; +} + +/* Note: May be called with ctxt=NULL. */ +int cf_check x86emul_write_xcr(unsigned int reg, uint64_t val, + struct x86_emulate_ctxt *ctxt) +{ + switch ( reg ) + { + case 0: + break; + + default: + gp_fault: + if ( ctxt ) + x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + return X86EMUL_EXCEPTION; + } + + if ( unlikely(handle_xsetbv(reg, val) != 0) ) + goto gp_fault; + + return X86EMUL_OKAY; +} + +#ifdef CONFIG_PV + +/* Called with NULL ctxt in hypercall context. */ +int cf_check x86emul_read_dr(unsigned int reg, unsigned long *val, + struct x86_emulate_ctxt *ctxt) +{ + struct vcpu *curr = current; + + /* HVM support requires a bit more plumbing before it will work. */ + ASSERT(is_pv_vcpu(curr)); + + switch ( reg ) + { + case 0 ... 3: + *val = array_access_nospec(curr->arch.dr, reg); + break; + + case 4: + if ( curr->arch.pv.ctrlreg[4] & X86_CR4_DE ) + goto ud_fault; + + /* Fallthrough */ + case 6: + *val = curr->arch.dr6; + break; + + case 5: + if ( curr->arch.pv.ctrlreg[4] & X86_CR4_DE ) + goto ud_fault; + + /* Fallthrough */ + case 7: + *val = curr->arch.dr7 | curr->arch.pv.dr7_emul; + break; + + ud_fault: + default: + if ( ctxt ) + x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + + return X86EMUL_EXCEPTION; + } + + return X86EMUL_OKAY; +} + +int cf_check x86emul_write_dr(unsigned int reg, unsigned long val, + struct x86_emulate_ctxt *ctxt) +{ + struct vcpu *curr = current; + + /* HVM support requires a bit more plumbing before it will work. */ + ASSERT(is_pv_vcpu(curr)); + + switch ( set_debugreg(curr, reg, val) ) + { + case 0: + return X86EMUL_OKAY; + + case -ENODEV: + x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + return X86EMUL_EXCEPTION; + + default: + x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + return X86EMUL_EXCEPTION; + } +} + +#endif /* CONFIG_PV */ + +int cf_check x86emul_cpuid(uint32_t leaf, uint32_t subleaf, + struct cpuid_leaf *res, + struct x86_emulate_ctxt *ctxt) +{ + guest_cpuid(current, leaf, subleaf, res); + + return X86EMUL_OKAY; +} diff --git a/xen/arch/x86/x86_emulate/util.c b/xen/arch/x86/x86_emulate/util.c new file mode 100644 index 0000000000..090c7e07a9 --- /dev/null +++ b/xen/arch/x86/x86_emulate/util.c @@ -0,0 +1,298 @@ +/****************************************************************************** + * util.c + * + * Generic x86 (32-bit and 64-bit) instruction decoder and emulator utility + * functions. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; If not, see . + */ + +#include "private.h" + +unsigned int x86_insn_length(const struct x86_emulate_state *s, + const struct x86_emulate_ctxt *ctxt) +{ + check_state(s); + + return s->ip - ctxt->regs->r(ip); +} + +/* + * This function means to return 'true' for all supported insns with explicit + * accesses to memory. This means also insns which don't have an explicit + * memory operand (like POP), but it does not mean e.g. segment selector + * loads, where the descriptor table access is considered an implicit one. + */ +bool cf_check x86_insn_is_mem_access(const struct x86_emulate_state *s, + const struct x86_emulate_ctxt *ctxt) +{ + if ( mode_64bit() && s->not_64bit ) + return false; + + if ( s->ea.type == OP_MEM ) + { + switch ( ctxt->opcode ) + { + case 0x8d: /* LEA */ + case X86EMUL_OPC(0x0f, 0x0d): /* PREFETCH */ + case X86EMUL_OPC(0x0f, 0x18) + ... X86EMUL_OPC(0x0f, 0x1f): /* NOP space */ + case X86EMUL_OPC_66(0x0f, 0x18) + ... X86EMUL_OPC_66(0x0f, 0x1f): /* NOP space */ + case X86EMUL_OPC_F3(0x0f, 0x18) + ... X86EMUL_OPC_F3(0x0f, 0x1f): /* NOP space */ + case X86EMUL_OPC_F2(0x0f, 0x18) + ... X86EMUL_OPC_F2(0x0f, 0x1f): /* NOP space */ + case X86EMUL_OPC(0x0f, 0xb9): /* UD1 */ + case X86EMUL_OPC(0x0f, 0xff): /* UD0 */ + case X86EMUL_OPC_EVEX_66(0x0f38, 0xc6): /* V{GATH,SCATT}ERPF*D* */ + case X86EMUL_OPC_EVEX_66(0x0f38, 0xc7): /* V{GATH,SCATT}ERPF*Q* */ + return false; + + case X86EMUL_OPC(0x0f, 0x01): + return (s->modrm_reg & 7) != 7; /* INVLPG */ + + case X86EMUL_OPC(0x0f, 0xae): + return (s->modrm_reg & 7) != 7; /* CLFLUSH */ + + case X86EMUL_OPC_66(0x0f, 0xae): + return (s->modrm_reg & 7) < 6; /* CLWB, CLFLUSHOPT */ + } + + return true; + } + + switch ( ctxt->opcode ) + { + case 0x06 ... 0x07: /* PUSH / POP %es */ + case 0x0e: /* PUSH %cs */ + case 0x16 ... 0x17: /* PUSH / POP %ss */ + case 0x1e ... 0x1f: /* PUSH / POP %ds */ + case 0x50 ... 0x5f: /* PUSH / POP reg */ + case 0x60 ... 0x61: /* PUSHA / POPA */ + case 0x68: case 0x6a: /* PUSH imm */ + case 0x6c ... 0x6f: /* INS / OUTS */ + case 0x8f: /* POP r/m */ + case 0x9a: /* CALL (far, direct) */ + case 0x9c ... 0x9d: /* PUSHF / POPF */ + case 0xa4 ... 0xa7: /* MOVS / CMPS */ + case 0xaa ... 0xaf: /* STOS / LODS / SCAS */ + case 0xc2 ... 0xc3: /* RET (near) */ + case 0xc8 ... 0xc9: /* ENTER / LEAVE */ + case 0xca ... 0xcb: /* RET (far) */ + case 0xd7: /* XLAT */ + case 0xe8: /* CALL (near, direct) */ + case X86EMUL_OPC(0x0f, 0xa0): /* PUSH %fs */ + case X86EMUL_OPC(0x0f, 0xa1): /* POP %fs */ + case X86EMUL_OPC(0x0f, 0xa8): /* PUSH %gs */ + case X86EMUL_OPC(0x0f, 0xa9): /* POP %gs */ + case X86EMUL_OPC(0x0f, 0xf7): /* MASKMOVQ */ + case X86EMUL_OPC_66(0x0f, 0xf7): /* MASKMOVDQU */ + case X86EMUL_OPC_VEX_66(0x0f, 0xf7): /* VMASKMOVDQU */ + return true; + + case 0xff: + switch ( s->modrm_reg & 7 ) + { + case 2: /* CALL (near, indirect) */ + case 6: /* PUSH r/m */ + return true; + } + break; + + case X86EMUL_OPC(0x0f, 0x01): + /* Cover CLZERO. */ + return (s->modrm_rm & 7) == 4 && (s->modrm_reg & 7) == 7; + } + + return false; +} + +/* + * This function means to return 'true' for all supported insns with explicit + * writes to memory. This means also insns which don't have an explicit + * memory operand (like PUSH), but it does not mean e.g. segment selector + * loads, where the (possible) descriptor table write is considered an + * implicit access. + */ +bool cf_check x86_insn_is_mem_write(const struct x86_emulate_state *s, + const struct x86_emulate_ctxt *ctxt) +{ + if ( mode_64bit() && s->not_64bit ) + return false; + + switch ( s->desc & DstMask ) + { + case DstMem: + /* The SrcMem check is to cover {,V}MASKMOV{Q,DQU}. */ + return s->modrm_mod != 3 || (s->desc & SrcMask) == SrcMem; + + case DstBitBase: + case DstImplicit: + break; + + default: + switch ( ctxt->opcode ) + { + case 0x63: /* ARPL */ + return !mode_64bit(); + + case X86EMUL_OPC_66(0x0f38, 0xf8): /* MOVDIR64B */ + case X86EMUL_OPC_F2(0x0f38, 0xf8): /* ENQCMD */ + case X86EMUL_OPC_F3(0x0f38, 0xf8): /* ENQCMDS */ + return true; + + case X86EMUL_OPC_EVEX_F3(0x0f38, 0x10) ... + X86EMUL_OPC_EVEX_F3(0x0f38, 0x15): /* VPMOVUS* */ + case X86EMUL_OPC_EVEX_F3(0x0f38, 0x20) ... + X86EMUL_OPC_EVEX_F3(0x0f38, 0x25): /* VPMOVS* */ + case X86EMUL_OPC_EVEX_F3(0x0f38, 0x30) ... + X86EMUL_OPC_EVEX_F3(0x0f38, 0x35): /* VPMOV{D,Q,W}* */ + return s->modrm_mod != 3; + } + + return false; + } + + if ( s->modrm_mod == 3 ) + { + switch ( ctxt->opcode ) + { + case 0xff: /* Grp5 */ + break; + + case X86EMUL_OPC(0x0f, 0x01): /* CLZERO is the odd one. */ + return (s->modrm_rm & 7) == 4 && (s->modrm_reg & 7) == 7; + + default: + return false; + } + } + + switch ( ctxt->opcode ) + { + case 0x06: /* PUSH %es */ + case 0x0e: /* PUSH %cs */ + case 0x16: /* PUSH %ss */ + case 0x1e: /* PUSH %ds */ + case 0x50 ... 0x57: /* PUSH reg */ + case 0x60: /* PUSHA */ + case 0x68: case 0x6a: /* PUSH imm */ + case 0x6c: case 0x6d: /* INS */ + case 0x9a: /* CALL (far, direct) */ + case 0x9c: /* PUSHF */ + case 0xa4: case 0xa5: /* MOVS */ + case 0xaa: case 0xab: /* STOS */ + case 0xc8: /* ENTER */ + case 0xe8: /* CALL (near, direct) */ + case X86EMUL_OPC(0x0f, 0xa0): /* PUSH %fs */ + case X86EMUL_OPC(0x0f, 0xa8): /* PUSH %gs */ + case X86EMUL_OPC(0x0f, 0xab): /* BTS */ + case X86EMUL_OPC(0x0f, 0xb3): /* BTR */ + case X86EMUL_OPC(0x0f, 0xbb): /* BTC */ + return true; + + case 0xd9: + switch ( s->modrm_reg & 7 ) + { + case 2: /* FST m32fp */ + case 3: /* FSTP m32fp */ + case 6: /* FNSTENV */ + case 7: /* FNSTCW */ + return true; + } + break; + + case 0xdb: + switch ( s->modrm_reg & 7 ) + { + case 1: /* FISTTP m32i */ + case 2: /* FIST m32i */ + case 3: /* FISTP m32i */ + case 7: /* FSTP m80fp */ + return true; + } + break; + + case 0xdd: + switch ( s->modrm_reg & 7 ) + { + case 1: /* FISTTP m64i */ + case 2: /* FST m64fp */ + case 3: /* FSTP m64fp */ + case 6: /* FNSAVE */ + case 7: /* FNSTSW */ + return true; + } + break; + + case 0xdf: + switch ( s->modrm_reg & 7 ) + { + case 1: /* FISTTP m16i */ + case 2: /* FIST m16i */ + case 3: /* FISTP m16i */ + case 6: /* FBSTP */ + case 7: /* FISTP m64i */ + return true; + } + break; + + case 0xff: + switch ( s->modrm_reg & 7 ) + { + case 2: /* CALL (near, indirect) */ + case 3: /* CALL (far, indirect) */ + case 6: /* PUSH r/m */ + return true; + } + break; + + case X86EMUL_OPC(0x0f, 0x01): + switch ( s->modrm_reg & 7 ) + { + case 0: /* SGDT */ + case 1: /* SIDT */ + case 4: /* SMSW */ + return true; + } + break; + + case X86EMUL_OPC(0x0f, 0xae): + switch ( s->modrm_reg & 7 ) + { + case 0: /* FXSAVE */ + /* case 3: STMXCSR - handled above */ + case 4: /* XSAVE */ + case 6: /* XSAVEOPT */ + return true; + } + break; + + case X86EMUL_OPC(0x0f, 0xba): + return (s->modrm_reg & 7) > 4; /* BTS / BTR / BTC */ + + case X86EMUL_OPC(0x0f, 0xc7): + switch ( s->modrm_reg & 7 ) + { + case 1: /* CMPXCHG{8,16}B */ + case 4: /* XSAVEC */ + case 5: /* XSAVES */ + return true; + } + break; + } + + return false; +} diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 29d9203cdf..b84e9ee54d 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -8439,393 +8439,3 @@ int x86_emulate_wrapper( return rc; } #endif - -static inline void check_state(const struct x86_emulate_state *state) -{ -#if defined(__XEN__) && !defined(NDEBUG) - ASSERT(state->caller); -#endif -} - -#if defined(__XEN__) && !defined(NDEBUG) -void x86_emulate_free_state(struct x86_emulate_state *state) -{ - check_state(state); - state->caller = NULL; -} -#endif - -unsigned int -x86_insn_opsize(const struct x86_emulate_state *state) -{ - check_state(state); - - return state->op_bytes << 3; -} - -int -x86_insn_modrm(const struct x86_emulate_state *state, - unsigned int *rm, unsigned int *reg) -{ - check_state(state); - - if ( unlikely(state->modrm_mod > 3) ) - { - if ( rm ) - *rm = ~0U; - if ( reg ) - *reg = ~0U; - return -EINVAL; - } - - if ( rm ) - *rm = state->modrm_rm; - if ( reg ) - *reg = state->modrm_reg; - - return state->modrm_mod; -} - -unsigned long -x86_insn_operand_ea(const struct x86_emulate_state *state, - enum x86_segment *seg) -{ - *seg = state->ea.type == OP_MEM ? state->ea.mem.seg : x86_seg_none; - - check_state(state); - - return state->ea.mem.off; -} - -/* - * This function means to return 'true' for all supported insns with explicit - * accesses to memory. This means also insns which don't have an explicit - * memory operand (like POP), but it does not mean e.g. segment selector - * loads, where the descriptor table access is considered an implicit one. - */ -bool cf_check -x86_insn_is_mem_access(const struct x86_emulate_state *state, - const struct x86_emulate_ctxt *ctxt) -{ - if ( mode_64bit() && state->not_64bit ) - return false; - - if ( state->ea.type == OP_MEM ) - { - switch ( ctxt->opcode ) - { - case 0x8d: /* LEA */ - case X86EMUL_OPC(0x0f, 0x0d): /* PREFETCH */ - case X86EMUL_OPC(0x0f, 0x18) - ... X86EMUL_OPC(0x0f, 0x1f): /* NOP space */ - case X86EMUL_OPC_66(0x0f, 0x18) - ... X86EMUL_OPC_66(0x0f, 0x1f): /* NOP space */ - case X86EMUL_OPC_F3(0x0f, 0x18) - ... X86EMUL_OPC_F3(0x0f, 0x1f): /* NOP space */ - case X86EMUL_OPC_F2(0x0f, 0x18) - ... X86EMUL_OPC_F2(0x0f, 0x1f): /* NOP space */ - case X86EMUL_OPC(0x0f, 0xb9): /* UD1 */ - case X86EMUL_OPC(0x0f, 0xff): /* UD0 */ - case X86EMUL_OPC_EVEX_66(0x0f38, 0xc6): /* V{GATH,SCATT}ERPF*D* */ - case X86EMUL_OPC_EVEX_66(0x0f38, 0xc7): /* V{GATH,SCATT}ERPF*Q* */ - return false; - - case X86EMUL_OPC(0x0f, 0x01): - return (state->modrm_reg & 7) != 7; /* INVLPG */ - - case X86EMUL_OPC(0x0f, 0xae): - return (state->modrm_reg & 7) != 7; /* CLFLUSH */ - - case X86EMUL_OPC_66(0x0f, 0xae): - return (state->modrm_reg & 7) < 6; /* CLWB, CLFLUSHOPT */ - } - - return true; - } - - switch ( ctxt->opcode ) - { - case 0x06 ... 0x07: /* PUSH / POP %es */ - case 0x0e: /* PUSH %cs */ - case 0x16 ... 0x17: /* PUSH / POP %ss */ - case 0x1e ... 0x1f: /* PUSH / POP %ds */ - case 0x50 ... 0x5f: /* PUSH / POP reg */ - case 0x60 ... 0x61: /* PUSHA / POPA */ - case 0x68: case 0x6a: /* PUSH imm */ - case 0x6c ... 0x6f: /* INS / OUTS */ - case 0x8f: /* POP r/m */ - case 0x9a: /* CALL (far, direct) */ - case 0x9c ... 0x9d: /* PUSHF / POPF */ - case 0xa4 ... 0xa7: /* MOVS / CMPS */ - case 0xaa ... 0xaf: /* STOS / LODS / SCAS */ - case 0xc2 ... 0xc3: /* RET (near) */ - case 0xc8 ... 0xc9: /* ENTER / LEAVE */ - case 0xca ... 0xcb: /* RET (far) */ - case 0xd7: /* XLAT */ - case 0xe8: /* CALL (near, direct) */ - case X86EMUL_OPC(0x0f, 0xa0): /* PUSH %fs */ - case X86EMUL_OPC(0x0f, 0xa1): /* POP %fs */ - case X86EMUL_OPC(0x0f, 0xa8): /* PUSH %gs */ - case X86EMUL_OPC(0x0f, 0xa9): /* POP %gs */ - CASE_SIMD_PACKED_INT_VEX(0x0f, 0xf7): /* MASKMOV{Q,DQU} */ - /* VMASKMOVDQU */ - return true; - - case 0xff: - switch ( state->modrm_reg & 7 ) - { - case 2: /* CALL (near, indirect) */ - case 6: /* PUSH r/m */ - return true; - } - break; - - case X86EMUL_OPC(0x0f, 0x01): - /* Cover CLZERO. */ - return (state->modrm_rm & 7) == 4 && (state->modrm_reg & 7) == 7; - } - - return false; -} - -/* - * This function means to return 'true' for all supported insns with explicit - * writes to memory. This means also insns which don't have an explicit - * memory operand (like PUSH), but it does not mean e.g. segment selector - * loads, where the (possible) descriptor table write is considered an - * implicit access. - */ -bool cf_check -x86_insn_is_mem_write(const struct x86_emulate_state *state, - const struct x86_emulate_ctxt *ctxt) -{ - if ( mode_64bit() && state->not_64bit ) - return false; - - switch ( state->desc & DstMask ) - { - case DstMem: - /* The SrcMem check is to cover {,V}MASKMOV{Q,DQU}. */ - return state->modrm_mod != 3 || (state->desc & SrcMask) == SrcMem; - - case DstBitBase: - case DstImplicit: - break; - - default: - switch ( ctxt->opcode ) - { - case 0x63: /* ARPL */ - return !mode_64bit(); - - case X86EMUL_OPC_66(0x0f38, 0xf8): /* MOVDIR64B */ - case X86EMUL_OPC_F2(0x0f38, 0xf8): /* ENQCMD */ - case X86EMUL_OPC_F3(0x0f38, 0xf8): /* ENQCMDS */ - return true; - - case X86EMUL_OPC_EVEX_F3(0x0f38, 0x10) ... - X86EMUL_OPC_EVEX_F3(0x0f38, 0x15): /* VPMOVUS* */ - case X86EMUL_OPC_EVEX_F3(0x0f38, 0x20) ... - X86EMUL_OPC_EVEX_F3(0x0f38, 0x25): /* VPMOVS* */ - case X86EMUL_OPC_EVEX_F3(0x0f38, 0x30) ... - X86EMUL_OPC_EVEX_F3(0x0f38, 0x35): /* VPMOV{D,Q,W}* */ - return state->modrm_mod != 3; - } - - return false; - } - - if ( state->modrm_mod == 3 ) - { - switch ( ctxt->opcode ) - { - case 0xff: /* Grp5 */ - break; - - case X86EMUL_OPC(0x0f, 0x01): /* CLZERO is the odd one. */ - return (state->modrm_rm & 7) == 4 && (state->modrm_reg & 7) == 7; - - default: - return false; - } - } - - switch ( ctxt->opcode ) - { - case 0x06: /* PUSH %es */ - case 0x0e: /* PUSH %cs */ - case 0x16: /* PUSH %ss */ - case 0x1e: /* PUSH %ds */ - case 0x50 ... 0x57: /* PUSH reg */ - case 0x60: /* PUSHA */ - case 0x68: case 0x6a: /* PUSH imm */ - case 0x6c: case 0x6d: /* INS */ - case 0x9a: /* CALL (far, direct) */ - case 0x9c: /* PUSHF */ - case 0xa4: case 0xa5: /* MOVS */ - case 0xaa: case 0xab: /* STOS */ - case 0xc8: /* ENTER */ - case 0xe8: /* CALL (near, direct) */ - case X86EMUL_OPC(0x0f, 0xa0): /* PUSH %fs */ - case X86EMUL_OPC(0x0f, 0xa8): /* PUSH %gs */ - case X86EMUL_OPC(0x0f, 0xab): /* BTS */ - case X86EMUL_OPC(0x0f, 0xb3): /* BTR */ - case X86EMUL_OPC(0x0f, 0xbb): /* BTC */ - return true; - - case 0xd9: - switch ( state->modrm_reg & 7 ) - { - case 2: /* FST m32fp */ - case 3: /* FSTP m32fp */ - case 6: /* FNSTENV */ - case 7: /* FNSTCW */ - return true; - } - break; - - case 0xdb: - switch ( state->modrm_reg & 7 ) - { - case 1: /* FISTTP m32i */ - case 2: /* FIST m32i */ - case 3: /* FISTP m32i */ - case 7: /* FSTP m80fp */ - return true; - } - break; - - case 0xdd: - switch ( state->modrm_reg & 7 ) - { - case 1: /* FISTTP m64i */ - case 2: /* FST m64fp */ - case 3: /* FSTP m64fp */ - case 6: /* FNSAVE */ - case 7: /* FNSTSW */ - return true; - } - break; - - case 0xdf: - switch ( state->modrm_reg & 7 ) - { - case 1: /* FISTTP m16i */ - case 2: /* FIST m16i */ - case 3: /* FISTP m16i */ - case 6: /* FBSTP */ - case 7: /* FISTP m64i */ - return true; - } - break; - - case 0xff: - switch ( state->modrm_reg & 7 ) - { - case 2: /* CALL (near, indirect) */ - case 3: /* CALL (far, indirect) */ - case 6: /* PUSH r/m */ - return true; - } - break; - - case X86EMUL_OPC(0x0f, 0x01): - switch ( state->modrm_reg & 7 ) - { - case 0: /* SGDT */ - case 1: /* SIDT */ - case 4: /* SMSW */ - return true; - } - break; - - case X86EMUL_OPC(0x0f, 0xae): - switch ( state->modrm_reg & 7 ) - { - case 0: /* FXSAVE */ - /* case 3: STMXCSR - handled above */ - case 4: /* XSAVE */ - case 6: /* XSAVEOPT */ - return true; - } - break; - - case X86EMUL_OPC(0x0f, 0xba): - return (state->modrm_reg & 7) > 4; /* BTS / BTR / BTC */ - - case X86EMUL_OPC(0x0f, 0xc7): - switch ( state->modrm_reg & 7 ) - { - case 1: /* CMPXCHG{8,16}B */ - case 4: /* XSAVEC */ - case 5: /* XSAVES */ - return true; - } - break; - } - - return false; -} - -bool cf_check -x86_insn_is_portio(const struct x86_emulate_state *state, - const struct x86_emulate_ctxt *ctxt) -{ - switch ( ctxt->opcode ) - { - case 0x6c ... 0x6f: /* INS / OUTS */ - case 0xe4 ... 0xe7: /* IN / OUT imm8 */ - case 0xec ... 0xef: /* IN / OUT %dx */ - return true; - } - - return false; -} - -bool cf_check -x86_insn_is_cr_access(const struct x86_emulate_state *state, - const struct x86_emulate_ctxt *ctxt) -{ - switch ( ctxt->opcode ) - { - unsigned int ext; - - case X86EMUL_OPC(0x0f, 0x01): - if ( x86_insn_modrm(state, NULL, &ext) >= 0 - && (ext & 5) == 4 ) /* SMSW / LMSW */ - return true; - break; - - case X86EMUL_OPC(0x0f, 0x06): /* CLTS */ - case X86EMUL_OPC(0x0f, 0x20): /* MOV from CRn */ - case X86EMUL_OPC(0x0f, 0x22): /* MOV to CRn */ - return true; - } - - return false; -} - -unsigned long -x86_insn_immediate(const struct x86_emulate_state *state, unsigned int nr) -{ - check_state(state); - - switch ( nr ) - { - case 0: - return state->imm1; - case 1: - return state->imm2; - } - - return 0; -} - -unsigned int -x86_insn_length(const struct x86_emulate_state *state, - const struct x86_emulate_ctxt *ctxt) -{ - check_state(state); - - return state->ip - ctxt->regs->r(ip); -} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517636.803270 (Exim 4.92) (envelope-from ) id 1pjY1m-00044O-Cn; Tue, 04 Apr 2023 04:12:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517636.803270; Tue, 04 Apr 2023 04:12:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1m-00044G-A1; Tue, 04 Apr 2023 04:12:14 +0000 Received: by outflank-mailman (input) for mailman id 517636; Tue, 04 Apr 2023 04:12:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1l-000442-H3 for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY1l-0006AJ-Fz for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY1l-0007WW-F2 for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LtLaIgaznkdYm31TGJyxzrq1p3bzuI+td/5wfK0WkBo=; b=GTmosi2ksZQMr3WHCJgL3+g1v6 vpUiC3amsFupcEQpknp0EKkHAh4qTekTLz05eO7daqitEjgLyl5SPZrpvM6KhsKZxKD9iIB4noiDr a7RI29KV08YTr70S66fSWk0AleEY4vIyq0BVsVXaMRMmZghmNydpcKSyXUwRxF2UxCeY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: introduce CONFIG_GENERIC_BUG_FRAME Message-Id: Date: Tue, 04 Apr 2023 04:12:13 +0000 commit 60a9b07150558b212918aa8fedd532be246b03d7 Author: Oleksii Kurochko AuthorDate: Mon Apr 3 12:50:06 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:50:06 2023 +0200 xen: introduce CONFIG_GENERIC_BUG_FRAME A large part of the content of the bug.h is repeated among all architectures, so it was decided to create a new config CONFIG_GENERIC_BUG_FRAME. The version of from x86 was taken as the base version. The patch introduces the following stuff: * common bug.h header * generic implementation of do_bug_frame * new config CONFIG_GENERIC_BUG_FRAME Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Tested-by: Julien Grall Acked-by: Julien Grall --- xen/common/Kconfig | 3 + xen/common/Makefile | 1 + xen/common/bug.c | 124 ++++++++++++++++++++++++++++++++++++++ xen/include/xen/bug.h | 161 ++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 289 insertions(+) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 855c843113..3d2123a783 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -29,6 +29,9 @@ config ALTERNATIVE_CALL config ARCH_MAP_DOMAIN_PAGE bool +config GENERIC_BUG_FRAME + bool + config HAS_ALTERNATIVE bool diff --git a/xen/common/Makefile b/xen/common/Makefile index bbd75b4be6..46049eac35 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_ARGO) += argo.o obj-y += bitmap.o +obj-$(CONFIG_GENERIC_BUG_FRAME) += bug.o obj-$(CONFIG_HYPFS_CONFIG) += config_data.o obj-$(CONFIG_CORE_PARKING) += core_parking.o obj-y += cpu.o diff --git a/xen/common/bug.c b/xen/common/bug.c new file mode 100644 index 0000000000..ca166e102b --- /dev/null +++ b/xen/common/bug.c @@ -0,0 +1,124 @@ +#include +/* + * Ideally should be included in + * but an issue with compilation can occur as uses + * BUG/ASSERT/etc macros inside but they will be defined later in + * after return from inclusion of : + * + * : + * ... + * : + * ... + * -> some of included header in it uses BUG/ASSERT/etc + * ... + * ... + * #define BUG() ... + * ... + * #define ASSERT() ... + * ... + */ +#include +#include +#include +#include +#include +#include +#include + +/* + * Returns a negative value in case of an error otherwise + * BUGFRAME_{run_fn, warn, bug, assert} + */ +int do_bug_frame(struct cpu_user_regs *regs, unsigned long pc) +{ + const struct bug_frame *bug = NULL; + const struct virtual_region *region; + const char *prefix = "", *filename, *predicate; + unsigned long fixup; + unsigned int id, lineno; + + region = find_text_region(pc); + if ( !region ) + return -EINVAL; + + for ( id = 0; id < BUGFRAME_NR; id++ ) + { + const struct bug_frame *b; + size_t i; + + for ( i = 0, b = region->frame[id].bugs; + i < region->frame[id].n_bugs; b++, i++ ) + { + if ( bug_loc(b) == pc ) + { + bug = b; + goto found; + } + } + } + + found: + if ( !bug ) + return -ENOENT; + + if ( id == BUGFRAME_run_fn ) + { + void (*fn)(struct cpu_user_regs *) = bug_ptr(bug); + + fn(regs); + + /* Re-enforce consistent types, because of the casts involved. */ + if ( false ) + run_in_exception_handler(fn); + + return id; + } + + /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ + filename = bug_ptr(bug); + if ( !is_kernel(filename) && !is_patch(filename) ) + return -EINVAL; + fixup = strlen(filename); + if ( fixup > 50 ) + { + filename += fixup - 47; + prefix = "..."; + } + lineno = bug_line(bug); + + switch ( id ) + { + case BUGFRAME_warn: + printk("Xen WARN at %s%s:%d\n", prefix, filename, lineno); + show_execution_state(regs); + + break; + + case BUGFRAME_bug: + printk("Xen BUG at %s%s:%d\n", prefix, filename, lineno); + + if ( BUG_DEBUGGER_TRAP_FATAL(regs) ) + break; + + show_execution_state(regs); + panic("Xen BUG at %s%s:%d\n", prefix, filename, lineno); + + case BUGFRAME_assert: + /* ASSERT: decode the predicate string pointer. */ + predicate = bug_msg(bug); + if ( !is_kernel(predicate) && !is_patch(predicate) ) + predicate = ""; + + printk("Assertion '%s' failed at %s%s:%d\n", + predicate, prefix, filename, lineno); + + if ( BUG_DEBUGGER_TRAP_FATAL(regs) ) + break; + + show_execution_state(regs); + panic("Assertion '%s' failed at %s%s:%d\n", + predicate, prefix, filename, lineno); + } + + return id; +} diff --git a/xen/include/xen/bug.h b/xen/include/xen/bug.h new file mode 100644 index 0000000000..e8a4eea71a --- /dev/null +++ b/xen/include/xen/bug.h @@ -0,0 +1,161 @@ +#ifndef __XEN_BUG_H__ +#define __XEN_BUG_H__ + +#define BUGFRAME_run_fn 0 +#define BUGFRAME_warn 1 +#define BUGFRAME_bug 2 +#define BUGFRAME_assert 3 + +#define BUGFRAME_NR 4 + +#define BUG_DISP_WIDTH 24 +#define BUG_LINE_LO_WIDTH (31 - BUG_DISP_WIDTH) +#define BUG_LINE_HI_WIDTH (31 - BUG_DISP_WIDTH) + +#include + +#ifndef __ASSEMBLY__ + +#ifndef BUG_DEBUGGER_TRAP_FATAL +#define BUG_DEBUGGER_TRAP_FATAL(regs) 0 +#endif + +#include + +#ifndef BUG_FRAME_STRUCT + +struct bug_frame { + signed int loc_disp:BUG_DISP_WIDTH; + unsigned int line_hi:BUG_LINE_HI_WIDTH; + signed int ptr_disp:BUG_DISP_WIDTH; + unsigned int line_lo:BUG_LINE_LO_WIDTH; + signed int msg_disp[]; +}; + +#define bug_loc(b) ((unsigned long)(b) + (b)->loc_disp) + +#define bug_ptr(b) ((const void *)(b) + (b)->ptr_disp) + +#define bug_line(b) (((((b)->line_hi + ((b)->loc_disp < 0)) & \ + ((1 << BUG_LINE_HI_WIDTH) - 1)) << \ + BUG_LINE_LO_WIDTH) + \ + (((b)->line_lo + ((b)->ptr_disp < 0)) & \ + ((1 << BUG_LINE_LO_WIDTH) - 1))) + +#define bug_msg(b) ((const char *)(b) + (b)->msg_disp[1]) + +#define BUG_CHECK_LINE_WIDTH(line) \ + BUILD_BUG_ON((line) >> (BUG_LINE_LO_WIDTH + BUG_LINE_HI_WIDTH)) + +#elif !defined(BUG_CHECK_LINE_WIDTH) + +#define BUG_CHECK_LINE_WIDTH(line) ((void)(line)) + +#endif /* BUG_FRAME_STRUCT */ + + +/* + * Some architectures mark immediate instruction operands in a special way. + * In such cases the special marking may need omitting when specifying + * directive operands. Allow architectures to specify a suitable + * modifier. + */ +#ifndef BUG_ASM_CONST +#define BUG_ASM_CONST "" +#endif + +#ifndef _ASM_BUGFRAME_TEXT + +#define _ASM_BUGFRAME_TEXT(second_frame) \ + ".Lbug%=:"BUG_INSTR"\n" \ + " .pushsection .bug_frames.%"BUG_ASM_CONST"[bf_type], \"a\", %%progbits\n" \ + " .p2align 2\n" \ + ".Lfrm%=:\n" \ + " .long (.Lbug%= - .Lfrm%=) + %"BUG_ASM_CONST"[bf_line_hi]\n" \ + " .long (%"BUG_ASM_CONST"[bf_ptr] - .Lfrm%=) + %"BUG_ASM_CONST"[bf_line_lo]\n"\ + " .if " #second_frame "\n" \ + " .long 0, %"BUG_ASM_CONST"[bf_msg] - .Lfrm%=\n" \ + " .endif\n" \ + " .popsection\n" + +#define _ASM_BUGFRAME_INFO(type, line, ptr, msg) \ + [bf_type] "i" (type), \ + [bf_ptr] "i" (ptr), \ + [bf_msg] "i" (msg), \ + [bf_line_lo] "i" ((line & ((1 << BUG_LINE_LO_WIDTH) - 1)) \ + << BUG_DISP_WIDTH), \ + [bf_line_hi] "i" (((line) >> BUG_LINE_LO_WIDTH) << BUG_DISP_WIDTH) + +#endif /* _ASM_BUGFRAME_TEXT */ + +#ifndef BUG_FRAME + +#define BUG_FRAME(type, line, ptr, second_frame, msg) do { \ + BUG_CHECK_LINE_WIDTH(line); \ + BUILD_BUG_ON((type) >= BUGFRAME_NR); \ + asm volatile ( _ASM_BUGFRAME_TEXT(second_frame) \ + :: _ASM_BUGFRAME_INFO(type, line, ptr, msg) ); \ +} while ( false ) + +#endif + +#ifndef run_in_exception_handler + +/* + * TODO: untangle header dependences, break BUILD_BUG_ON() out of xen/lib.h, + * and use a real static inline here to get proper type checking of fn(). + */ +#define run_in_exception_handler(fn) do { \ + (void)((fn) == (void (*)(struct cpu_user_regs *))NULL); \ + BUG_FRAME(BUGFRAME_run_fn, 0, fn, 0, NULL); \ +} while ( false ) + +#endif /* run_in_exception_handler */ + +#ifndef WARN +#define WARN() BUG_FRAME(BUGFRAME_warn, __LINE__, __FILE__, 0, NULL) +#endif + +#ifndef BUG +#define BUG() do { \ + BUG_FRAME(BUGFRAME_bug, __LINE__, __FILE__, 0, NULL); \ + unreachable(); \ +} while ( false ) +#endif + +#ifndef assert_failed +#define assert_failed(msg) do { \ + BUG_FRAME(BUGFRAME_assert, __LINE__, __FILE__, 1, msg); \ + unreachable(); \ +} while ( false ) +#endif + +#ifdef CONFIG_GENERIC_BUG_FRAME + +struct cpu_user_regs; + +/* + * Returns a negative value in case of an error otherwise + * BUGFRAME_{run_fn, warn, bug, assert} + */ +int do_bug_frame(struct cpu_user_regs *regs, unsigned long pc); + +#endif /* CONFIG_GENERIC_BUG_FRAME */ + +extern const struct bug_frame __start_bug_frames[], + __stop_bug_frames_0[], + __stop_bug_frames_1[], + __stop_bug_frames_2[], + __stop_bug_frames_3[]; + +#endif /* !__ASSEMBLY__ */ + +#endif /* __XEN_BUG_H__ */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517637.803274 (Exim 4.92) (envelope-from ) id 1pjY1w-00047m-ED; Tue, 04 Apr 2023 04:12:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517637.803274; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1CPf/yvoSqiE8uolPiTqsFAZvt02YwWFBAH+YlqexfY=; b=zZh8fwmr9tpRaTKRWaGvLivG9l vmzSrK8jqbEIHjVMNUNYLTLYvJIgIFihGQWTskKozTOqgtZnjCqLSfyJwzB1zoaaORigJyTlJsdoO lmMebXTnob0Narkw98LNixfzDIl/UEE7I3axMr0AVw91xcFBEzkLgEz04Tuwh6UCWG/E=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: remove unused defines in Message-Id: Date: Tue, 04 Apr 2023 04:12:23 +0000 commit faafb5cb736db67a5790854c63bf3c76dd4df7e0 Author: Oleksii Kurochko AuthorDate: Mon Apr 3 12:50:56 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:50:56 2023 +0200 xen/arm: remove unused defines in The following defines BUG_DISP_WIDTH, BUG_LINE_LO_WIDTH, BUG_LINE_HI_WIDTH aren't used in ARM so could be purged as unused. Requested-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/include/asm/bug.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/xen/arch/arm/include/asm/bug.h b/xen/arch/arm/include/asm/bug.h index f4088d0913..d6c98505bf 100644 --- a/xen/arch/arm/include/asm/bug.h +++ b/xen/arch/arm/include/asm/bug.h @@ -9,10 +9,6 @@ # error "unknown ARM variant" #endif -#define BUG_DISP_WIDTH 24 -#define BUG_LINE_LO_WIDTH (31 - BUG_DISP_WIDTH) -#define BUG_LINE_HI_WIDTH (31 - BUG_DISP_WIDTH) - struct bug_frame { signed int loc_disp; /* Relative address to the bug address */ signed int file_disp; /* Relative address to the filename */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517638.803278 (Exim 4.92) (envelope-from ) id 1pjY26-0004Ab-Fq; Tue, 04 Apr 2023 04:12:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517638.803278; Tue, 04 Apr 2023 04:12:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY26-0004AS-D7; Tue, 04 Apr 2023 04:12:34 +0000 Received: by outflank-mailman (input) for mailman id 517638; Tue, 04 Apr 2023 04:12:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY25-0004AJ-OM for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY25-0006As-NV for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjY25-0007XS-Mf for xen-changelog@lists.xenproject.org; Tue, 04 Apr 2023 04:12:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7g01CLrsBK4UfixkO0kFe2tWE9WATMcyZsyPSyq3ob0=; b=BSNqH8qWIh09ia41MDnVzBiUyy Qp2nf9GG4mnreEKri8wTtYRW4nm6O7RrxzdMJCXcG3jsxsCX3xHHImcXJ5jmkj0XBnEPmo0ob2WHO 2DvKRmEDJEAq/lUVIhD/y4GP2QnDS6aBrfix6rLYWgn7Gjj2VwTEZ6opPUf+BqexUKdQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: change to Message-Id: Date: Tue, 04 Apr 2023 04:12:33 +0000 commit 71efa7b868e64d29b2a0488e015e80798f1fde8a Author: Oleksii Kurochko AuthorDate: Mon Apr 3 12:52:02 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:52:02 2023 +0200 xen: change to The idea of the patch is to change all to and keep Xen compilable with adding only minimal amount of changes: 1. It was added "#include " to ARM's "" as it uses uint_{16,32}t in 'struct bug_frame'. 2. It was added '#define BUG_FRAME_STRUCT' which means that ARM hasn't been switched to generic implementation yet. 3. It was added '#define BUG_FRAME_STRUCT' which means that x86 hasn't been switched to generic implementation yet. 4. BUGFRAME_* and _start_bug_frame[], _stop_bug_frame_*[] were removed for ARM & x86 to deal with compilation errors such as: redundant redeclaration of ... 5. Remove BUG_DISP_WIDTH, BUG_LINE_LO_WIDTH, BUG_LINE_HI_WIDTH from x86's to not to produce #undef for them and #define again with the same values as in . These #undef and #define will be anyway removed in the patch [2] 6. Remove from and as nothing from are used in <*/cpufreq.c> In the following two patches x86 and ARM archictectures will be switched fully: [1] xen/arm: switch ARM to use generic implementation of bug.h [2] xen/x86: switch x86 to use generic implemetation of bug.h Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Julien Grall --- xen/arch/arm/include/asm/bug.h | 17 ++++------------- xen/arch/arm/include/asm/div64.h | 2 +- xen/arch/arm/vgic/vgic-v2.c | 2 +- xen/arch/arm/vgic/vgic.c | 2 +- xen/arch/x86/acpi/cpufreq/cpufreq.c | 1 - xen/arch/x86/include/asm/asm_defns.h | 2 +- xen/arch/x86/include/asm/bug.h | 19 ++----------------- xen/drivers/cpufreq/cpufreq.c | 1 - xen/include/xen/lib.h | 2 +- 9 files changed, 11 insertions(+), 37 deletions(-) diff --git a/xen/arch/arm/include/asm/bug.h b/xen/arch/arm/include/asm/bug.h index d6c98505bf..cacaf014ab 100644 --- a/xen/arch/arm/include/asm/bug.h +++ b/xen/arch/arm/include/asm/bug.h @@ -1,6 +1,8 @@ #ifndef __ARM_BUG_H__ #define __ARM_BUG_H__ +#include + #if defined(CONFIG_ARM_32) # include #elif defined(CONFIG_ARM_64) @@ -9,6 +11,8 @@ # error "unknown ARM variant" #endif +#define BUG_FRAME_STRUCT + struct bug_frame { signed int loc_disp; /* Relative address to the bug address */ signed int file_disp; /* Relative address to the filename */ @@ -22,13 +26,6 @@ struct bug_frame { #define bug_line(b) ((b)->line) #define bug_msg(b) ((const char *)(b) + (b)->msg_disp) -#define BUGFRAME_run_fn 0 -#define BUGFRAME_warn 1 -#define BUGFRAME_bug 2 -#define BUGFRAME_assert 3 - -#define BUGFRAME_NR 4 - /* Many versions of GCC doesn't support the asm %c parameter which would * be preferable to this unpleasantness. We use mergeable string * sections to avoid multiple copies of the string appearing in the @@ -85,12 +82,6 @@ struct bug_frame { unreachable(); \ } while (0) -extern const struct bug_frame __start_bug_frames[], - __stop_bug_frames_0[], - __stop_bug_frames_1[], - __stop_bug_frames_2[], - __stop_bug_frames_3[]; - #endif /* __ARM_BUG_H__ */ /* * Local variables: diff --git a/xen/arch/arm/include/asm/div64.h b/xen/arch/arm/include/asm/div64.h index 1cd58bc51a..fc667a80f9 100644 --- a/xen/arch/arm/include/asm/div64.h +++ b/xen/arch/arm/include/asm/div64.h @@ -74,7 +74,7 @@ #elif __GNUC__ >= 4 -#include +#include /* * If the divisor happens to be constant, we determine the appropriate diff --git a/xen/arch/arm/vgic/vgic-v2.c b/xen/arch/arm/vgic/vgic-v2.c index 1a99d3a8b4..c90e88fddb 100644 --- a/xen/arch/arm/vgic/vgic-v2.c +++ b/xen/arch/arm/vgic/vgic-v2.c @@ -16,8 +16,8 @@ */ #include -#include #include +#include #include #include diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index f0f2ea5021..b9463a5f27 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -15,9 +15,9 @@ * along with this program. If not, see . */ +#include #include #include -#include #include #include diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c index c27cbb2304..2e0067fbe5 100644 --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h index d9431180cf..baaaccb26e 100644 --- a/xen/arch/x86/include/asm/asm_defns.h +++ b/xen/arch/x86/include/asm/asm_defns.h @@ -6,8 +6,8 @@ /* NB. Auto-generated from arch/.../asm-offsets.c */ #include #endif -#include #include +#include #include #include #include diff --git a/xen/arch/x86/include/asm/bug.h b/xen/arch/x86/include/asm/bug.h index b7265bdfbe..4b3e7b019d 100644 --- a/xen/arch/x86/include/asm/bug.h +++ b/xen/arch/x86/include/asm/bug.h @@ -1,19 +1,10 @@ #ifndef __X86_BUG_H__ #define __X86_BUG_H__ -#define BUG_DISP_WIDTH 24 -#define BUG_LINE_LO_WIDTH (31 - BUG_DISP_WIDTH) -#define BUG_LINE_HI_WIDTH (31 - BUG_DISP_WIDTH) - -#define BUGFRAME_run_fn 0 -#define BUGFRAME_warn 1 -#define BUGFRAME_bug 2 -#define BUGFRAME_assert 3 - -#define BUGFRAME_NR 4 - #ifndef __ASSEMBLY__ +#define BUG_FRAME_STRUCT + struct bug_frame { signed int loc_disp:BUG_DISP_WIDTH; unsigned int line_hi:BUG_LINE_HI_WIDTH; @@ -80,12 +71,6 @@ struct bug_frame { unreachable(); \ } while (0) -extern const struct bug_frame __start_bug_frames[], - __stop_bug_frames_0[], - __stop_bug_frames_1[], - __stop_bug_frames_2[], - __stop_bug_frames_3[]; - #else /* !__ASSEMBLY__ */ /* diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index a94520ee57..2321c7dd07 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -39,7 +39,6 @@ #include #include #include -#include #include #include diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index 05ee1e18af..e914ccade0 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -24,12 +24,12 @@ #ifndef __ASSEMBLY__ +#include #include #include #include #include #include -#include #define BUG_ON(p) do { if (unlikely(p)) BUG(); } while (0) #define WARN_ON(p) ({ \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517639.803282 (Exim 4.92) (envelope-from ) id 1pjY2G-0004DD-HP; Tue, 04 Apr 2023 04:12:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 517639.803282; Tue, 04 Apr 2023 04:12:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY2G-0004D6-Ef; Tue, 04 Apr 2023 04:12:44 +0000 Received: by outflank-mailman (input) for mailman id 517639; Tue, 04 Apr 2023 04:12:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjY2F-0004Cz-Rp for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: switch to use generic implemetation of bug.h Message-Id: Date: Tue, 04 Apr 2023 04:12:43 +0000 commit 720ebfbad3e3bee8aa18e37e08ef597f493f8bf8 Author: Oleksii Kurochko AuthorDate: Mon Apr 3 12:53:29 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 3 12:53:29 2023 +0200 xen/x86: switch to use generic implemetation of bug.h The following changes were made: * Make GENERIC_BUG_FRAME mandatory for X86 * Update asm/bug.h using generic implementation in * Update do_invalid_op using generic do_bug_frame() * Define BUG_DEBUGGER_TRAP_FATAL to debugger_trap_fatal(X86_EXC_GP,regs) * type of eip variable was changed to 'const void *' Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- xen/arch/x86/Kconfig | 1 + xen/arch/x86/include/asm/bug.h | 87 ++++++++++-------------------------------- xen/arch/x86/traps.c | 81 ++++----------------------------------- 3 files changed, 30 insertions(+), 139 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 2a5c3304e2..406445a358 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -11,6 +11,7 @@ config X86 select ARCH_MAP_DOMAIN_PAGE select ARCH_SUPPORTS_INT128 imply CORE_PARKING + select GENERIC_BUG_FRAME select HAS_ALTERNATIVE select HAS_COMPAT select HAS_CPUFREQ diff --git a/xen/arch/x86/include/asm/bug.h b/xen/arch/x86/include/asm/bug.h index 4b3e7b019d..7fe879a8cc 100644 --- a/xen/arch/x86/include/asm/bug.h +++ b/xen/arch/x86/include/asm/bug.h @@ -1,75 +1,30 @@ #ifndef __X86_BUG_H__ #define __X86_BUG_H__ -#ifndef __ASSEMBLY__ - -#define BUG_FRAME_STRUCT - -struct bug_frame { - signed int loc_disp:BUG_DISP_WIDTH; - unsigned int line_hi:BUG_LINE_HI_WIDTH; - signed int ptr_disp:BUG_DISP_WIDTH; - unsigned int line_lo:BUG_LINE_LO_WIDTH; - signed int msg_disp[]; -}; - -#define bug_loc(b) ((const void *)(b) + (b)->loc_disp) -#define bug_ptr(b) ((const void *)(b) + (b)->ptr_disp) -#define bug_line(b) (((((b)->line_hi + ((b)->loc_disp < 0)) & \ - ((1 << BUG_LINE_HI_WIDTH) - 1)) << \ - BUG_LINE_LO_WIDTH) + \ - (((b)->line_lo + ((b)->ptr_disp < 0)) & \ - ((1 << BUG_LINE_LO_WIDTH) - 1))) -#define bug_msg(b) ((const char *)(b) + (b)->msg_disp[1]) - -#define _ASM_BUGFRAME_TEXT(second_frame) \ - ".Lbug%=: ud2\n" \ - ".pushsection .bug_frames.%c[bf_type], \"a\", @progbits\n" \ - ".p2align 2\n" \ - ".Lfrm%=:\n" \ - ".long (.Lbug%= - .Lfrm%=) + %c[bf_line_hi]\n" \ - ".long (%c[bf_ptr] - .Lfrm%=) + %c[bf_line_lo]\n" \ - ".if " #second_frame "\n" \ - ".long 0, %c[bf_msg] - .Lfrm%=\n" \ - ".endif\n" \ - ".popsection\n" \ - -#define _ASM_BUGFRAME_INFO(type, line, ptr, msg) \ - [bf_type] "i" (type), \ - [bf_ptr] "i" (ptr), \ - [bf_msg] "i" (msg), \ - [bf_line_lo] "i" ((line & ((1 << BUG_LINE_LO_WIDTH) - 1)) \ - << BUG_DISP_WIDTH), \ - [bf_line_hi] "i" (((line) >> BUG_LINE_LO_WIDTH) << BUG_DISP_WIDTH) - -#define BUG_FRAME(type, line, ptr, second_frame, msg) do { \ - BUILD_BUG_ON((line) >> (BUG_LINE_LO_WIDTH + BUG_LINE_HI_WIDTH)); \ - BUILD_BUG_ON((type) >= BUGFRAME_NR); \ - asm volatile ( _ASM_BUGFRAME_TEXT(second_frame) \ - :: _ASM_BUGFRAME_INFO(type, line, ptr, msg) ); \ -} while (0) - - -#define WARN() BUG_FRAME(BUGFRAME_warn, __LINE__, __FILE__, 0, NULL) -#define BUG() do { \ - BUG_FRAME(BUGFRAME_bug, __LINE__, __FILE__, 0, NULL); \ - unreachable(); \ -} while (0) - /* - * TODO: untangle header dependences, break BUILD_BUG_ON() out of xen/lib.h, - * and use a real static inline here to get proper type checking of fn(). + * Please do not include in the header any header that might + * use BUG/ASSERT/etc maros asthey will be defined later after + * the return to from the current header: + * + * : + * ... + * : + * ... + * + * ... + * ... + * #define BUG() ... + * ... + * #define ASSERT() ... + * ... */ -#define run_in_exception_handler(fn) \ - do { \ - (void)((fn) == (void (*)(struct cpu_user_regs *))NULL); \ - BUG_FRAME(BUGFRAME_run_fn, 0, fn, 0, NULL); \ - } while ( 0 ) -#define assert_failed(msg) do { \ - BUG_FRAME(BUGFRAME_assert, __LINE__, __FILE__, 1, msg); \ - unreachable(); \ -} while (0) +#ifndef __ASSEMBLY__ + +#define BUG_DEBUGGER_TRAP_FATAL(regs) debugger_trap_fatal(X86_EXC_GP,regs) + +#define BUG_INSTR "ud2" +#define BUG_ASM_CONST "c" #else /* !__ASSEMBLY__ */ diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index cade9e12f8..c36e3f855b 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -24,6 +24,7 @@ * Gareth Hughes , May 2000 */ +#include #include #include #include @@ -1166,12 +1167,9 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, void do_invalid_op(struct cpu_user_regs *regs) { - const struct bug_frame *bug = NULL; u8 bug_insn[2]; - const char *prefix = "", *filename, *predicate, *eip = (char *)regs->rip; - unsigned long fixup; - int id = -1, lineno; - const struct virtual_region *region; + const void *eip = (const void *)regs->rip; + int id; if ( likely(guest_mode(regs)) ) { @@ -1185,83 +1183,20 @@ void do_invalid_op(struct cpu_user_regs *regs) memcmp(bug_insn, "\xf\xb", sizeof(bug_insn)) ) goto die; - region = find_text_region(regs->rip); - if ( region ) - { - for ( id = 0; id < BUGFRAME_NR; id++ ) - { - const struct bug_frame *b; - unsigned int i; - - for ( i = 0, b = region->frame[id].bugs; - i < region->frame[id].n_bugs; b++, i++ ) - { - if ( bug_loc(b) == eip ) - { - bug = b; - goto found; - } - } - } - } - - found: - if ( !bug ) + id = do_bug_frame(regs, regs->rip); + if ( id < 0 ) goto die; - eip += sizeof(bug_insn); - if ( id == BUGFRAME_run_fn ) - { - void (*fn)(struct cpu_user_regs *) = bug_ptr(bug); - - fn(regs); - fixup_exception_return(regs, (unsigned long)eip); - return; - } - /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ - filename = bug_ptr(bug); - if ( !is_kernel(filename) && !is_patch(filename) ) - goto die; - fixup = strlen(filename); - if ( fixup > 50 ) - { - filename += fixup - 47; - prefix = "..."; - } - lineno = bug_line(bug); + eip += sizeof(bug_insn); switch ( id ) { + case BUGFRAME_run_fn: case BUGFRAME_warn: - printk("Xen WARN at %s%s:%d\n", prefix, filename, lineno); - show_execution_state(regs); fixup_exception_return(regs, (unsigned long)eip); - return; - case BUGFRAME_bug: - printk("Xen BUG at %s%s:%d\n", prefix, filename, lineno); - - if ( debugger_trap_fatal(TRAP_invalid_op, regs) ) - return; - - show_execution_state(regs); - panic("Xen BUG at %s%s:%d\n", prefix, filename, lineno); - case BUGFRAME_assert: - /* ASSERT: decode the predicate string pointer. */ - predicate = bug_msg(bug); - if ( !is_kernel(predicate) && !is_patch(predicate) ) - predicate = ""; - - printk("Assertion '%s' failed at %s%s:%d\n", - predicate, prefix, filename, lineno); - - if ( debugger_trap_fatal(TRAP_invalid_op, regs) ) - return; - - show_execution_state(regs); - panic("Assertion '%s' failed at %s%s:%d\n", - predicate, prefix, filename, lineno); + return; } die: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 04 04:12:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 04 Apr 2023 04:12:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.517640.803286 (Exim 4.92) (envelope-from ) id 1pjY2Q-0004Gk-Kr; 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Tue, 04 Apr 2023 04:12:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2m0n9KSoQKkjp7VwOXM6b79Eu0smwclPbrUEEDoWJLM=; b=ZlAbQVMtJ6yDEt6vxCc/Yfxbrc QCde1ZnbG2MfKgWV9Hjmiv9f5McVBFXdt2g5E4vIbMcXZERQUU4ZSwDtk4fw4YvdB3h07v1UOErpB STnUuZ/H3uakTVQsHM24sT9M9679yF3F3JOhiGWqfrC8hqbosNBhEWXCfg/534HQPnMM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/emul: Fix test harness build with blk.c moved out of x86_emulate.c Message-Id: Date: Tue, 04 Apr 2023 04:12:53 +0000 commit bfa2e6a246225233f09a2523939e01dcf83bca4c Author: Andrew Cooper AuthorDate: Mon Apr 3 13:17:35 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Apr 3 13:33:19 2023 +0100 x86/emul: Fix test harness build with blk.c moved out of x86_emulate.c Trying to build the test harness fails with: x86_emulate/blk.c: In function 'x86_emul_blk': x86_emulate/blk.c:74:15: error: expected ':' or ')' before 'ASM_FLAG_OUT' 74 | ASM_FLAG_OUT(, "; setz %[zf]") | ^~~~~~~~~~~~ This is because ASM_FLAG_OUT() is still local to x86_emulate.c. Move it into x86-emulate.h instead so it ends up in all files including private.h. The main Xen build gets this macro from compiler.h. Fixes: c80243f94386 ("x86emul: move x86_emul_blk() to separate source file") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/tests/x86_emulator/x86-emulate.h | 6 ++++++ xen/arch/x86/x86_emulate/x86_emulate.c | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 0ae528a741..942b4cdd47 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -65,6 +65,12 @@ #define AC_(n,t) (n##t) #define _AC(n,t) AC_(n,t) +#ifdef __GCC_ASM_FLAG_OUTPUTS__ +# define ASM_FLAG_OUT(yes, no) yes +#else +# define ASM_FLAG_OUT(yes, no) no +#endif + #define hweight32 __builtin_popcount #define hweight64 __builtin_popcountll diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index b84e9ee54d..5a0ec5900a 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -132,12 +132,6 @@ static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; (void *)(((long)__##var + __alignof(type) - __alignof(__##var)) \ & -__alignof(type)) -#ifdef __GCC_ASM_FLAG_OUTPUTS__ -# define ASM_FLAG_OUT(yes, no) yes -#else -# define ASM_FLAG_OUT(yes, no) no -#endif - /* MXCSR bit definitions. */ #define MXCSR_MM (1U << 17) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 05 06:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Apr 2023 06:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518224.804512 (Exim 4.92) (envelope-from ) id 1pjwsF-0008WI-Ef; Wed, 05 Apr 2023 06:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518224.804512; Wed, 05 Apr 2023 06:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsF-0008WA-Bc; Wed, 05 Apr 2023 06:44:03 +0000 Received: by outflank-mailman (input) for mailman id 518224; Wed, 05 Apr 2023 06:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsE-0008W4-Hn for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsE-0003zT-GZ for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjwsE-0004Ns-F4 for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JHWC0EYYr4/bWhmEDLwNyIxOOJsyjMJpsFH1hvicUW4=; b=FvKCVenMT813iG+Rke2B7Em5BY 0R0/0+CrAbt6wZcmwWq6omoqpjQq81NfjDxLU0DQCU5phPni07WdT0BzHqX1un+BZBDO7qK7p2oVY pzboKp4z5dCqcvRKVyVPZ8Agj0hQUXHznx7oBUwkpVTcpmBPCI6cWcsKRvrvpSEyPWbc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul/fuzzer: re-arrange cleaning Message-Id: Date: Wed, 05 Apr 2023 06:44:02 +0000 commit 32a183ca4b2f857361ff8124d1d7a98db3407201 Author: Jan Beulich AuthorDate: Tue Apr 4 15:43:29 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 4 15:43:29 2023 +0200 x86emul/fuzzer: re-arrange cleaning The latter of the two commits referenced below converted x86_emulate from a symlinked dir to a real one, holding symlinked files. Yet even before that the split between distclean and clean was suspicious: A similar split, removing symlinks only in distclean, doesn't exist anywhere else in the tree afaics. Fixes: c808475882ef ("tools/fuzz: introduce x86 instruction emulator target") Fixes: 9ace97ab9b87 ("x86emul: split off opcode 0f01 handling") Reported-by: Andrew Cooper Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 47e7eb04b7..a022e8c8ad 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -60,11 +60,11 @@ all: x86-insn-fuzz-all .PHONY: distclean distclean: clean - rm -f x86_emulate x86-emulate.c x86-emulate.h wrappers.c cpuid.c .PHONY: clean clean: rm -f *.a *.o $(DEPS_RM) afl-harness afl-harness-cov *.gcda *.gcno *.gcov + rm -rf x86_emulate x86-emulate.c x86-emulate.h wrappers.c cpuid.c .PHONY: install install: all -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 05 06:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Apr 2023 06:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518225.804517 (Exim 4.92) (envelope-from ) id 1pjwsP-000078-Gq; Wed, 05 Apr 2023 06:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518225.804517; Wed, 05 Apr 2023 06:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsP-00006x-D7; Wed, 05 Apr 2023 06:44:13 +0000 Received: by outflank-mailman (input) for mailman id 518225; Wed, 05 Apr 2023 06:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsO-00006j-Mz for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsO-0003zb-K7 for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjwsO-0004Oc-Iz for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jbuQlpe9ercaCzXmd2DOk4G44X3iEeDAFONIWQsIaY0=; b=I5vE5DfoZWBluTM27SNe5fxQVL STpoxZ0Th7H5BsjyIHiGshg1RyK/sT9yzmFlOTcKC4sgPBRa5ZnEkH8EkQPOzgJ+HIWoEFg2uhUge 3p2wHwxCvLYvSUoq8Zm6yFuxhRkw2XVfaJRoMY8J3CCofMDiTbSnHSepKTTSfLATerq0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul/test: drop bogus .PHONY Message-Id: Date: Wed, 05 Apr 2023 06:44:12 +0000 commit 24c471b6f404ef24db8669d82ae67387067c097f Author: Jan Beulich AuthorDate: Tue Apr 4 15:43:43 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 4 15:43:43 2023 +0200 x86emul/test: drop bogus .PHONY x86_emulate is a real (directory) target. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/tests/x86_emulator/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index f5d88fb9f6..3302bce9c0 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -278,7 +278,6 @@ else run32 clean32: %32: % endif -.PHONY: x86_emulate x86_emulate: mkdir -p $@ ln -sf $(XEN_ROOT)/xen/arch/x86/$@/*.[ch] $@/ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 05 06:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Apr 2023 06:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518226.804519 (Exim 4.92) (envelope-from ) id 1pjwsZ-0000AC-H8; Wed, 05 Apr 2023 06:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518226.804519; Wed, 05 Apr 2023 06:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsZ-0000A7-EZ; Wed, 05 Apr 2023 06:44:23 +0000 Received: by outflank-mailman (input) for mailman id 518226; Wed, 05 Apr 2023 06:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsY-00009m-Qb for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsY-0003zl-Pb for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjwsY-0004Pf-Me for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CW3S9l/OBn49I3M3iE9YJfItvK1YVmzIPqaxiob5GpI=; b=sgVFAECIPA+q1pOhREknwaqK5s YNHiFeIz1moqEUPkejQMVcU5ef1oBM1S9KEC1aXqH6lkimyjSIPqjqtKs+EKBqgiogyLv+OTZrhN6 MN7geVQteAnRLKWlzt8MEQerX5qM4azsHnOgZb/5UgG5PIy5gcWsLgGO508MJtHFL6pE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/PV: ignore PAE_MODE ELF note for 64-bit Dom0 Message-Id: Date: Wed, 05 Apr 2023 06:44:22 +0000 commit d5e1795ab4ed30b77b1c00ad7c125a3aa4be494a Author: Jan Beulich AuthorDate: Tue Apr 4 15:44:11 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 4 15:44:11 2023 +0200 x86/PV: ignore PAE_MODE ELF note for 64-bit Dom0 Besides a printk() the main effect is slight corruption of the start info magic: While that's meant to be xen-3.0-x86_64, it wrongly ended up as xen-3.0-x86_64p. (The extended-CR3 VM-assist thus won't be enabled anymore either, but that's meaningless to 64-bit PV anyway.) Note that no known users exist that would have developed a dependency on the bogus magic string. In particular Linux, NetBSD, and mini-os have been checked. Fixes: 460060f83d41 ("libelf: use for x86 dom0 builder") Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Acked-by: Andrew Cooper --- xen/arch/x86/pv/dom0_build.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index a26832ad5d..c99135a552 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -459,8 +459,13 @@ int __init dom0_construct_pv(struct domain *d, compat = is_pv_32bit_domain(d); if ( elf_64bit(&elf) && machine == EM_X86_64 ) + { compatible = true; + /* Zap meaningless setting which kernels may carry by mistake. */ + parms.pae = 0; + } + if ( elf_msb(&elf) ) compatible = false; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 05 06:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Apr 2023 06:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518227.804524 (Exim 4.92) (envelope-from ) id 1pjwsj-0000Cr-J9; Wed, 05 Apr 2023 06:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518227.804524; Wed, 05 Apr 2023 06:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsj-0000Ci-GE; Wed, 05 Apr 2023 06:44:33 +0000 Received: by outflank-mailman (input) for mailman id 518227; Wed, 05 Apr 2023 06:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsi-0000CY-UE for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pjwsi-00040D-TF for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pjwsi-0004QC-SK for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 06:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8k3ogToZMFB83PXBEJ/pHmavEzx9+q9YlhsNF2WuMtE=; b=s2n7k0uGJ8lLllmfWo3GqwopXj ZvQJOomQkckf2gA+BQjnhDv/+Mf1izJmzlcXUlQPzsXNeWnw9jOxtTxcZEioPWUvpmF4HzqIBf/MR VBEZRYrPRTG3slnA/OMhsHN9Y/bAUWmPCSLNa4Kk71ttjCyOK8aAJyZfEyduoxw/Qiwo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: correct AVX512VL+VPCLMUL test descriptions Message-Id: Date: Wed, 05 Apr 2023 06:44:32 +0000 commit 658fcb7ac90a4d8b0f4736a7c8f21d0252cb492e Author: Jan Beulich AuthorDate: Tue Apr 4 15:45:18 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 4 15:45:18 2023 +0200 x86emul: correct AVX512VL+VPCLMUL test descriptions The stride values (based on 32-bit element size) were wrong for these two test, yielding misleading output (especially when comparing with the test variants also involving AVX512-VBMI2). Also insert a missing blank on a nearby, related line. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/tests/x86_emulator/test_x86_emulator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 31586f8057..3e30ec51fe 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -520,10 +520,10 @@ static const struct { SIMD(VAES (EVEX/x64), avx512bw_vaes, 64), AVX512VL(VL+VAES (x16), avx512bw_vaes, 16), AVX512VL(VL+VAES (x32), avx512bw_vaes, 32), - SIMD(VPCLMUL (VEX/x4), avx2_vpclmulqdq, 32), + SIMD(VPCLMUL (VEX/x4), avx2_vpclmulqdq, 32), SIMD(VPCLMUL (EVEX/x8), avx512bw_vpclmulqdq, 64), - AVX512VL(VL+VPCLMUL (x4), avx512bw_vpclmulqdq, 16), - AVX512VL(VL+VPCLMUL (x8), avx512bw_vpclmulqdq, 32), + AVX512VL(VL+VPCLMUL (x2), avx512bw_vpclmulqdq, 16), + AVX512VL(VL+VPCLMUL (x4), avx512bw_vpclmulqdq, 32), SIMD(AVX512_VBMI2+VPCLMUL (x8), avx512vbmi2_vpclmulqdq, 64), AVX512VL(_VBMI2+VL+VPCLMUL (x2), avx512vbmi2_vpclmulqdq, 16), AVX512VL(_VBMI2+VL+VPCLMUL (x4), avx512vbmi2_vpclmulqdq, 32), -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 05 23:22:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 05 Apr 2023 23:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518679.805454 (Exim 4.92) (envelope-from ) id 1pkCS2-0006zW-Mx; Wed, 05 Apr 2023 23:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518679.805454; Wed, 05 Apr 2023 23:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkCS2-0006zO-K3; Wed, 05 Apr 2023 23:22:02 +0000 Received: by outflank-mailman (input) for mailman id 518679; Wed, 05 Apr 2023 23:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkCS1-0006zI-Kd for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 23:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkCS1-0001Ae-I0 for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 23:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkCS1-0006qe-G5 for xen-changelog@lists.xenproject.org; Wed, 05 Apr 2023 23:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GTVdAjqwY6ZHsU55nDLhsxLvcxaXXLtOECIcPLJ/6Zo=; b=wBNp41L1HWuStqm3VroPpN8cQh yE2Z1Melzbd61nnsnwQMZjH6f7ojg7XnscD2S+aYR9wkSOXsStULVIAg4oD2N7IhJkZ1GVA1NZ/HR FcyQ2OU/rFRDw7uamfoEuf216KJ79TyorQ/NRcW83VF70T3452F5yNa1V0xH5X0XL3TI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Revert "Revert "build: Change remaining xenbits.xen.org link to HTTPS"" Message-Id: Date: Wed, 05 Apr 2023 23:22:01 +0000 commit 415f7d9404171cbc968b1ea22e7d3523ac2f3fc1 Author: Andrew Cooper AuthorDate: Tue Apr 4 17:35:52 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Apr 4 17:35:52 2023 +0100 Revert "Revert "build: Change remaining xenbits.xen.org link to HTTPS"" This reverts commit b5cc3c25a242ddb9c5b108884061b17f35c3084b, reinstating the original change as per e1d75084443f676be681fdaf47585cc9a5f5b820. We think the OSSTest failure has been addressed now. Link: https://lore.kernel.org/xen-devel/20d41dd0-19d1-47fb-92ab-4de458ddd56f@perard/ Signed-off-by: Andrew Cooper --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index 99cdcf3d09..d12d4c2b8f 100644 --- a/Config.mk +++ b/Config.mk @@ -191,7 +191,7 @@ APPEND_CFLAGS += $(foreach i, $(APPEND_INCLUDES), -I$(i)) EMBEDDED_EXTRA_CFLAGS := -fno-pie -fno-stack-protector -fno-stack-protector-all EMBEDDED_EXTRA_CFLAGS += -fno-exceptions -fno-asynchronous-unwind-tables -XEN_EXTFILES_URL ?= http://xenbits.xen.org/xen-extfiles +XEN_EXTFILES_URL ?= https://xenbits.xen.org/xen-extfiles # All the files at that location were downloaded from elsewhere on # the internet. The original download URL is preserved as a comment # near the place in the Xen Makefiles where the file is used. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518955.805998 (Exim 4.92) (envelope-from ) id 1pkVWd-0003vH-Js; Thu, 06 Apr 2023 19:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518955.805998; Thu, 06 Apr 2023 19:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWd-0003v9-GW; Thu, 06 Apr 2023 19:44:03 +0000 Received: by outflank-mailman (input) for mailman id 518955; Thu, 06 Apr 2023 19:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWc-0003v3-4w for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWc-0004aM-3V for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVWc-00082m-1v for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=otq06lDtK0Fd0h0ItVN4KUTBF6Hok3esA2FbG2AkNC0=; b=p3Arx4dJQtFUubRnEZiWaSPrLX Gbry1p/8GCAwvUWL25SRkCAX3Mopm38EvysDbiA2MIBIrp/7+yqZrhnnzi4phO+E8lPAqBfNYj7OF n2HgyNGcaMEQoA6czAI878Wgh2AdnIUNpSmefQ9D0JoCXJAy7mKWiW1YAZm391g1tUfE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Rename struct cpu_policy to struct old_cpuid_policy Message-Id: Date: Thu, 06 Apr 2023 19:44:02 +0000 commit c2ec94c370f211d73f336ccfbdb32499f1b05f82 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:31:33 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Rename struct cpu_policy to struct old_cpuid_policy We want to merge struct cpuid_policy and struct msr_policy together, and the result wants to be called struct cpu_policy. The current struct cpu_policy, being a pair of pointers, isn't terribly useful. Rename the type to struct old_cpu_policy, but it will disappear entirely once the merge is complete. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/libs/guest/xg_cpuid_x86.c | 4 ++-- tools/tests/cpu-policy/test-cpu-policy.c | 4 ++-- xen/arch/x86/domctl.c | 4 ++-- xen/arch/x86/include/asm/cpuid.h | 2 +- xen/arch/x86/sysctl.c | 4 ++-- xen/include/xen/lib/x86/cpu-policy.h | 6 +++--- xen/lib/x86/policy.c | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 4542878bbe..1b02bc987a 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -868,8 +868,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct cpu_policy h = { &host->cpuid, &host->msr }; - struct cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->cpuid, &host->msr }; + struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index d3f24fd6d2..909d6272f8 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -602,7 +602,7 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { @@ -654,7 +654,7 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 2118fcad5d..0b41b27950 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -40,8 +40,8 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct cpu_policy new = {}; - const struct cpu_policy *sys = is_pv_domain(d) + struct old_cpu_policy new = {}; + const struct old_cpu_policy *sys = is_pv_domain(d) ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 9c3637549a..49b3128f06 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -51,7 +51,7 @@ extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, pv_max_cpuid_policy, pv_def_cpuid_policy, hvm_max_cpuid_policy, hvm_def_cpuid_policy; -extern const struct cpu_policy system_policies[]; +extern const struct old_cpu_policy system_policies[]; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 16625b57f0..3f5b092df1 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -32,7 +32,7 @@ #include #include -const struct cpu_policy system_policies[6] = { +const struct old_cpu_policy system_policies[6] = { [ XEN_SYSCTL_cpu_policy_raw ] = { &raw_cpuid_policy, &raw_msr_policy, @@ -391,7 +391,7 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct cpu_policy *policy; + const struct old_cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 5a2c4c7b2d..3a5300d107 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -5,7 +5,7 @@ #include #include -struct cpu_policy +struct old_cpu_policy { struct cpuid_policy *cpuid; struct msr_policy *msr; @@ -33,8 +33,8 @@ struct cpu_policy_errors * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f6cea4e2f9..2975711d7c 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518956.806002 (Exim 4.92) (envelope-from ) id 1pkVWn-0003wv-Ku; Thu, 06 Apr 2023 19:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518956.806002; Thu, 06 Apr 2023 19:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWn-0003wo-II; Thu, 06 Apr 2023 19:44:13 +0000 Received: by outflank-mailman (input) for mailman id 518956; Thu, 06 Apr 2023 19:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWm-0003we-BA for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWm-0004ak-93 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVWm-00083N-6S for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=xVdgYCALsQVxWcPFs9X3SJtdYDqbArTav0fJB0u3KgM=; b=ogs8qH4bJ/tssUxlXXic5BLFsY 75waprAifPIqZkqRompksPMmN2PDltOyPnoU1rbvfMhmajQqdCAY7trKAHNxZGiU7ZOz3dkNmRBbt EYt+r8Y6A0hgmHL/hHjFQ+6eZ2IkOuqCY909tUKS/oEYZqdi6VuOBNCgK60xp9lNMubY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields Message-Id: Date: Thu, 06 Apr 2023 19:44:12 +0000 commit 21e3ef57e0406b6b9a783f721f29df8f91a00f99 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:48:29 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields These weren't great names to begin with, and using {leaves,msrs} matches up better with the existing nr_{leaves,msr} parameters anyway. Furthermore, by renaming these fields we can get away with using some #define trickery to avoid the struct {cpuid,msr}_policy merge needing to happen in a single changeset. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/libs/guest/xg_cpuid_x86.c | 12 ++++++------ xen/arch/x86/domctl.c | 12 ++++++------ xen/arch/x86/sysctl.c | 8 ++++---- xen/include/public/domctl.h | 4 ++-- xen/include/public/sysctl.h | 4 ++-- 5 files changed, 20 insertions(+), 20 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 1b02bc987a..5fae06e778 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -145,9 +145,9 @@ static int get_system_cpu_policy(xc_interface *xch, uint32_t index, sysctl.cmd = XEN_SYSCTL_get_cpu_policy; sysctl.u.cpu_policy.index = index; sysctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(sysctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(sysctl.u.cpu_policy.leaves, leaves); sysctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(sysctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(sysctl.u.cpu_policy.msrs, msrs); ret = do_sysctl(xch, &sysctl); @@ -183,9 +183,9 @@ static int get_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_get_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); ret = do_domctl(xch, &domctl); @@ -232,9 +232,9 @@ int xc_set_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_set_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); domctl.u.cpu_policy.err_leaf = -1; domctl.u.cpu_policy.err_subleaf = -1; domctl.u.cpu_policy.err_msr = -1; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 0b41b27950..944af63e68 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -54,10 +54,10 @@ static int update_domain_cpu_policy(struct domain *d, /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->cpuid_policy, xdpc->nr_leaves, + new.cpuid, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msr_policy, xdpc->nr_msrs, &err.msr)) ) + new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ @@ -1317,20 +1317,20 @@ long arch_do_domctl( case XEN_DOMCTL_get_cpu_policy: /* Process the CPUID leaves. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( d->arch.cpuid, - domctl->u.cpu_policy.cpuid_policy, + domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; /* Process the MSR entries. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( d->arch.msr, - domctl->u.cpu_policy.msr_policy, + domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 3f5b092df1..3ed7c69f43 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -411,11 +411,11 @@ long arch_do_sysctl( } /* Process the CPUID leaves. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( policy->cpuid, - sysctl->u.cpu_policy.cpuid_policy, + sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -427,11 +427,11 @@ long arch_do_sysctl( } /* Process the MSR entries. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( policy->msr, - sysctl->u.cpu_policy.msr_policy, + sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 7280e9f968..529801c89b 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -683,8 +683,8 @@ struct xen_domctl_cpu_policy { * 'cpuid_policy'. */ uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to * 'msr_policy' */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* IN/OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* IN/OUT */ /* * OUT, set_policy only. Written in some (but not all) error cases to diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index e8dded9fb9..2b24d6bfd0 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -1050,8 +1050,8 @@ struct xen_sysctl_cpu_policy { * 'msr_policy', or the maximum number of MSRs if * the guest handle is NULL. */ uint32_t _rsvd; /* Must be zero. */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* OUT */ }; typedef struct xen_sysctl_cpu_policy xen_sysctl_cpu_policy_t; DEFINE_XEN_GUEST_HANDLE(xen_sysctl_cpu_policy_t); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518957.806005 (Exim 4.92) (envelope-from ) id 1pkVWx-0003zM-Ma; Thu, 06 Apr 2023 19:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518957.806005; Thu, 06 Apr 2023 19:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWx-0003zF-Jx; Thu, 06 Apr 2023 19:44:23 +0000 Received: by outflank-mailman (input) for mailman id 518957; Thu, 06 Apr 2023 19:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWw-0003z6-FD for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVWw-0004au-DC for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVWw-00083w-C1 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fOk80VhlElgH8wVioJW5NYDUncUhZxY7QfnrQS6SmZo=; b=NqymQwCswQ/wff/TCcBQ1xuVNa 7EkvWOHTb/2iIF3yCXe79/GjB1EPpJtViBYpJzI5vdfPPI6vHHmUgdlII0i//q/ouyp0ioKnBcSBz x+n4lACuZM+gNGJaQooFhp0qUX6TAGftl6g+jjuf6gOBFisHRmQJ1Xhrf0HhligMovVE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Rename struct cpuid_policy to struct cpu_policy Message-Id: Date: Thu, 06 Apr 2023 19:44:22 +0000 commit 743e530380a007774017df9dc2d8cb0659040ee3 Author: Andrew Cooper AuthorDate: Tue Mar 28 18:55:19 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Rename struct cpuid_policy to struct cpu_policy Also merge lib/x86/cpuid.h entirely into lib/x86/cpu-policy.h Use a temporary define to make struct cpuid_policy still work. There's one forward declaration of struct cpuid_policy in tools/tests/x86_emulator/x86-emulate.h that isn't covered by the define, and it's easier to rename that now than to rearrange the includes. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.h | 2 +- xen/arch/x86/include/asm/cpuid.h | 1 - xen/arch/x86/x86_emulate/x86_emulate.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 463 ++++++++++++++++++++++++++++- xen/include/xen/lib/x86/cpuid.h | 475 ------------------------------ xen/lib/x86/cpuid.c | 2 +- 8 files changed, 467 insertions(+), 482 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 7d0f274c6c..79e42e8bfd 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 3302bce9c0..4c453eaee6 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -291,7 +291,7 @@ HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h x86_emulate/private.h $(x86.h) $(OBJS): %.o: %.c $(x86_emulate.h) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 942b4cdd47..02922d0c5a 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -77,7 +77,7 @@ #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) extern uint32_t mxcsr_mask; -extern struct cpuid_policy cp; +extern struct cpu_policy cp; #define MMAP_SZ 16384 bool emul_test_init(void); diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 49b3128f06..d418e8100d 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -9,7 +9,6 @@ #include #include -#include #include diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index bb7af967ff..75015104fb 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,7 +23,7 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ -#include +#include #define MAX_INST_LEN 15 diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 3a5300d107..666505964d 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -2,9 +2,342 @@ #ifndef XEN_LIB_X86_POLICIES_H #define XEN_LIB_X86_POLICIES_H -#include +#include #include +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ + +struct cpuid_leaf +{ + uint32_t a, b, c, d; +}; + +/* + * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard + * register, and are unable to cope with spilling it. This results in a + * rather cryptic error: + * error: inconsistent operand constraints in an ‘asm’ + * + * In affected situations, work around the issue by using a separate register + * to hold the the %rBX output, and xchg twice to leave %rBX preserved around + * the asm() statement. + */ +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) +# define XCHG_BX "xchg %%ebx, %[bx];" +# define BX_CON [bx] "=&r" +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ + defined(__x86_64__) && (defined(__code_model_medium__) || \ + defined(__code_model_large__)) +# define XCHG_BX "xchg %%rbx, %q[bx];" +# define BX_CON [bx] "=&r" +#else +# define XCHG_BX "" +# define BX_CON "=&b" +#endif + +static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) + : "a" (leaf) ); +} + +static inline void cpuid_count_leaf( + uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) + : "a" (leaf), "c" (subleaf) ); +} + +#undef BX_CON +#undef XCHG + +/** + * Given the vendor id from CPUID leaf 0, look up Xen's internal integer + * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. + */ +unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); + +/** + * Given Xen's internal vendor ID, return a string suitable for printing. + * Returns "Unknown" for any unrecognised ID. + */ +const char *x86_cpuid_vendor_to_str(unsigned int vendor); + +#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_CACHE (5u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) +#define CPUID_GUEST_NR_TOPO (1u + 1) +#define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) +#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) +#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ + CPUID_GUEST_NR_EXTD_AMD) + +/* + * Maximum number of leaves a struct cpu_policy turns into when serialised for + * interaction with the toolstack. (Sum of all leaves in each union, less the + * entries in basic which sub-unions hang off of.) + */ +#define CPUID_MAX_SERIALISED_LEAVES \ + (CPUID_GUEST_NR_BASIC + \ + CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ + CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ + CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ + CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ + CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) + +struct cpu_policy +{ +#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) +#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) +#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x + + /* Basic leaves: 0x000000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; + struct { + /* Leaf 0x0 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x1 - Family/model/stepping and features. */ + uint32_t raw_fms; + uint8_t :8, /* Brand ID. */ + clflush_size, /* Number of 8-byte blocks per cache line. */ + lppp, /* Logical processors per package. */ + apic_id; /* Initial APIC ID. */ + union { + uint32_t _1c; + struct { DECL_BITFIELD(1c); }; + }; + union { + uint32_t _1d; + struct { DECL_BITFIELD(1d); }; + }; + + /* Leaf 0x2 - TLB/Cache/Prefetch. */ + uint8_t l2_nr_queries; /* Documented as fixed to 1. */ + uint8_t l2_desc[15]; + + uint64_t :64, :64; /* Leaf 0x3 - PSN. */ + uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ + uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ + uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ + uint64_t :64, :64; /* Leaf 0x8 - rsvd */ + uint64_t :64, :64; /* Leaf 0x9 - DCA */ + + /* Leaf 0xa - Intel PMU. */ + uint8_t pmu_version, _pmu[15]; + + uint64_t :64, :64; /* Leaf 0xb - Topology. */ + uint64_t :64, :64; /* Leaf 0xc - rsvd */ + uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ + }; + } basic; + + /* Structured cache leaf: 0x00000004[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; + struct cpuid_cache_leaf { + uint32_t /* a */ type:5, level:3; + bool self_init:1, fully_assoc:1; + uint32_t :4, threads_per_cache:12, cores_per_package:6; + uint32_t /* b */ line_size:12, partitions:10, ways:10; + uint32_t /* c */ sets; + bool /* d */ wbinvd:1, inclusive:1, complex:1; + } subleaf[CPUID_GUEST_NR_CACHE]; + } cache; + + /* Structured feature leaf: 0x00000007[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + union { + uint32_t _7b0; + struct { DECL_BITFIELD(7b0); }; + }; + union { + uint32_t _7c0; + struct { DECL_BITFIELD(7c0); }; + }; + union { + uint32_t _7d0; + struct { DECL_BITFIELD(7d0); }; + }; + + /* Subleaf 1. */ + union { + uint32_t _7a1; + struct { DECL_BITFIELD(7a1); }; + }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; + }; + } feat; + + /* Extended topology enumeration: 0x0000000B[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; + struct cpuid_topo_leaf { + uint32_t id_shift:5, :27; + uint16_t nr_logical, :16; + uint8_t level, type, :8, :8; + uint32_t x2apic_id; + } subleaf[CPUID_GUEST_NR_TOPO]; + } topo; + + /* Xstate feature leaf: 0x0000000D[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; + + struct { + /* Subleaf 0. */ + uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; + + /* Subleaf 1. */ + union { + uint32_t Da1; + struct { DECL_BITFIELD(Da1); }; + }; + uint32_t /* b */:32, xss_low, xss_high; + }; + + /* Per-component common state. Valid for i >= 2. */ + struct { + uint32_t size, offset; + bool xss:1, align:1; + uint32_t _res_d; + } comp[CPUID_GUEST_NR_XSTATE]; + } xstate; + + /* Extended leaves: 0x800000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; + struct { + /* Leaf 0x80000000 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x80000001 - Family/model/stepping and features. */ + uint32_t raw_fms, /* b */:32; + union { + uint32_t e1c; + struct { DECL_BITFIELD(e1c); }; + }; + union { + uint32_t e1d; + struct { DECL_BITFIELD(e1d); }; + }; + + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* L1 cache/TLB. */ + uint64_t :64, :64; /* L2/3 cache/TLB. */ + + /* Leaf 0x80000007 - Advanced Power Management. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t e7d; + struct { DECL_BITFIELD(e7d); }; + }; + + /* Leaf 0x80000008 - Misc addr/feature info. */ + uint8_t maxphysaddr, maxlinaddr, :8, :8; + union { + uint32_t e8b; + struct { DECL_BITFIELD(e8b); }; + }; + uint32_t nc:8, :4, apic_id_size:4, :16; + uint32_t /* d */:32; + + uint64_t :64, :64; /* Leaf 0x80000009. */ + uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ + uint64_t :64, :64; /* Leaf 0x8000000b. */ + uint64_t :64, :64; /* Leaf 0x8000000c. */ + uint64_t :64, :64; /* Leaf 0x8000000d. */ + uint64_t :64, :64; /* Leaf 0x8000000e. */ + uint64_t :64, :64; /* Leaf 0x8000000f. */ + uint64_t :64, :64; /* Leaf 0x80000010. */ + uint64_t :64, :64; /* Leaf 0x80000011. */ + uint64_t :64, :64; /* Leaf 0x80000012. */ + uint64_t :64, :64; /* Leaf 0x80000013. */ + uint64_t :64, :64; /* Leaf 0x80000014. */ + uint64_t :64, :64; /* Leaf 0x80000015. */ + uint64_t :64, :64; /* Leaf 0x80000016. */ + uint64_t :64, :64; /* Leaf 0x80000017. */ + uint64_t :64, :64; /* Leaf 0x80000018. */ + uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ + uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ + uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ + uint64_t :64, :64; /* Leaf 0x8000001c. */ + uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ + uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ + uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ + uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ + + /* Leaf 0x80000021 - Extended Feature 2 */ + union { + uint32_t e21a; + struct { DECL_BITFIELD(e21a); }; + }; + uint32_t /* b */:32, /* c */:32, /* d */:32; + }; + } extd; + +#undef __DECL_BITFIELD +#undef _DECL_BITFIELD +#undef DECL_BITFIELD + + /* Toolstack selected Hypervisor max_leaf (if non-zero). */ + uint8_t hv_limit, hv2_limit; + + /* Value calculated from raw data above. */ + uint8_t x86_vendor; +}; + +/* Temporary */ +#define cpuid_policy cpu_policy + struct old_cpu_policy { struct cpuid_policy *cpuid; @@ -19,6 +352,134 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } +/* Fill in a featureset bitmap from a CPUID policy. */ +static inline void cpuid_policy_to_featureset( + const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +/* Fill in a CPUID policy from a featureset bitmap. */ +static inline void cpuid_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + +static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +{ + return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; +} + +static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +{ + uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; + + return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; +} + +const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); + +/** + * Recalculate the content in a CPUID policy which is derived from raw data. + */ +void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); + +/** + * Fill a CPUID policy using the native CPUID instruction. + * + * No sanitisation is performed, but synthesised values are calculated. + * Values may be influenced by a hypervisor or from masking/faulting + * configuration. + */ +void x86_cpuid_policy_fill_native(struct cpuid_policy *p); + +/** + * Clear leaf data beyond the policies max leaf/subleaf settings. + * + * Policy serialisation purposefully omits out-of-range leaves, because there + * are a large number of them due to vendor differences. However, when + * constructing new policies (e.g. levelling down), it is possible to end up + * with out-of-range leaves with stale content in them. This helper clears + * them. + */ +void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); + +#ifdef __XEN__ +#include +typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +#else +#include +typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +#endif + +/** + * Serialise a cpuid_policy object into an array of cpuid leaves. + * + * @param policy The cpuid_policy to serialise. + * @param leaves The array of leaves to serialise into. + * @param nr_entries The number of entries in 'leaves'. + * @returns -errno + * + * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the + * leaves array is too short. On success, nr_entries is updated with the + * actual number of leaves written. + */ +int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, + cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); + +/** + * Unserialise a cpuid_policy object from an array of cpuid leaves. + * + * @param policy The cpuid_policy to unserialise into. + * @param leaves The array of leaves to unserialise from. + * @param nr_entries The number of entries in 'leaves'. + * @param err_leaf Optional hint for error diagnostics. + * @param err_subleaf Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an + * incoming leaf is out of range of cpuid_policy, in which case the optional + * err_* pointers will identify the out-of-range indicies. + * + * No content validation of in-range leaves is performed. Synthesised data is + * recalculated. + */ +int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, + const cpuid_leaf_buffer_t leaves, + uint32_t nr_entries, uint32_t *err_leaf, + uint32_t *err_subleaf); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h deleted file mode 100644 index fa98b371ee..0000000000 --- a/xen/include/xen/lib/x86/cpuid.h +++ /dev/null @@ -1,475 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_CPUID_H -#define XEN_LIB_X86_CPUID_H - -#include - -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ - -struct cpuid_leaf -{ - uint32_t a, b, c, d; -}; - -/* - * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard - * register, and are unable to cope with spilling it. This results in a - * rather cryptic error: - * error: inconsistent operand constraints in an ‘asm’ - * - * In affected situations, work around the issue by using a separate register - * to hold the the %rBX output, and xchg twice to leave %rBX preserved around - * the asm() statement. - */ -#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) -# define XCHG_BX "xchg %%ebx, %[bx];" -# define BX_CON [bx] "=&r" -#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ - defined(__x86_64__) && (defined(__code_model_medium__) || \ - defined(__code_model_large__)) -# define XCHG_BX "xchg %%rbx, %q[bx];" -# define BX_CON [bx] "=&r" -#else -# define XCHG_BX "" -# define BX_CON "=&b" -#endif - -static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) - : "a" (leaf) ); -} - -static inline void cpuid_count_leaf( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) - : "a" (leaf), "c" (subleaf) ); -} - -#undef BX_CON -#undef XCHG - -/** - * Given the vendor id from CPUID leaf 0, look up Xen's internal integer - * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. - */ -unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); - -/** - * Given Xen's internal vendor ID, return a string suitable for printing. - * Returns "Unknown" for any unrecognised ID. - */ -const char *x86_cpuid_vendor_to_str(unsigned int vendor); - -#define CPUID_GUEST_NR_BASIC (0xdu + 1) -#define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (2u + 1) -#define CPUID_GUEST_NR_TOPO (1u + 1) -#define CPUID_GUEST_NR_XSTATE (62u + 1) -#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) -#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) -#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ - CPUID_GUEST_NR_EXTD_AMD) - -/* - * Maximum number of leaves a struct cpuid_policy turns into when serialised - * for interaction with the toolstack. (Sum of all leaves in each union, less - * the entries in basic which sub-unions hang off of.) - */ -#define CPUID_MAX_SERIALISED_LEAVES \ - (CPUID_GUEST_NR_BASIC + \ - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ - CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) - -struct cpuid_policy -{ -#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) -#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) -#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x - - /* Basic leaves: 0x000000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; - struct { - /* Leaf 0x0 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t raw_fms; - uint8_t :8, /* Brand ID. */ - clflush_size, /* Number of 8-byte blocks per cache line. */ - lppp, /* Logical processors per package. */ - apic_id; /* Initial APIC ID. */ - union { - uint32_t _1c; - struct { DECL_BITFIELD(1c); }; - }; - union { - uint32_t _1d; - struct { DECL_BITFIELD(1d); }; - }; - - /* Leaf 0x2 - TLB/Cache/Prefetch. */ - uint8_t l2_nr_queries; /* Documented as fixed to 1. */ - uint8_t l2_desc[15]; - - uint64_t :64, :64; /* Leaf 0x3 - PSN. */ - uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ - uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ - uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ - uint64_t :64, :64; /* Leaf 0x8 - rsvd */ - uint64_t :64, :64; /* Leaf 0x9 - DCA */ - - /* Leaf 0xa - Intel PMU. */ - uint8_t pmu_version, _pmu[15]; - - uint64_t :64, :64; /* Leaf 0xb - Topology. */ - uint64_t :64, :64; /* Leaf 0xc - rsvd */ - uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ - }; - } basic; - - /* Structured cache leaf: 0x00000004[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; - struct cpuid_cache_leaf { - uint32_t /* a */ type:5, level:3; - bool self_init:1, fully_assoc:1; - uint32_t :4, threads_per_cache:12, cores_per_package:6; - uint32_t /* b */ line_size:12, partitions:10, ways:10; - uint32_t /* c */ sets; - bool /* d */ wbinvd:1, inclusive:1, complex:1; - } subleaf[CPUID_GUEST_NR_CACHE]; - } cache; - - /* Structured feature leaf: 0x00000007[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; - struct { - /* Subleaf 0. */ - uint32_t max_subleaf; - union { - uint32_t _7b0; - struct { DECL_BITFIELD(7b0); }; - }; - union { - uint32_t _7c0; - struct { DECL_BITFIELD(7c0); }; - }; - union { - uint32_t _7d0; - struct { DECL_BITFIELD(7d0); }; - }; - - /* Subleaf 1. */ - union { - uint32_t _7a1; - struct { DECL_BITFIELD(7a1); }; - }; - union { - uint32_t _7b1; - struct { DECL_BITFIELD(7b1); }; - }; - union { - uint32_t _7c1; - struct { DECL_BITFIELD(7c1); }; - }; - union { - uint32_t _7d1; - struct { DECL_BITFIELD(7d1); }; - }; - - /* Subleaf 2. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t _7d2; - struct { DECL_BITFIELD(7d2); }; - }; - }; - } feat; - - /* Extended topology enumeration: 0x0000000B[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; - struct cpuid_topo_leaf { - uint32_t id_shift:5, :27; - uint16_t nr_logical, :16; - uint8_t level, type, :8, :8; - uint32_t x2apic_id; - } subleaf[CPUID_GUEST_NR_TOPO]; - } topo; - - /* Xstate feature leaf: 0x0000000D[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; - - struct { - /* Subleaf 0. */ - uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; - - /* Subleaf 1. */ - union { - uint32_t Da1; - struct { DECL_BITFIELD(Da1); }; - }; - uint32_t /* b */:32, xss_low, xss_high; - }; - - /* Per-component common state. Valid for i >= 2. */ - struct { - uint32_t size, offset; - bool xss:1, align:1; - uint32_t _res_d; - } comp[CPUID_GUEST_NR_XSTATE]; - } xstate; - - /* Extended leaves: 0x800000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; - struct { - /* Leaf 0x80000000 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x80000001 - Family/model/stepping and features. */ - uint32_t raw_fms, /* b */:32; - union { - uint32_t e1c; - struct { DECL_BITFIELD(e1c); }; - }; - union { - uint32_t e1d; - struct { DECL_BITFIELD(e1d); }; - }; - - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* L1 cache/TLB. */ - uint64_t :64, :64; /* L2/3 cache/TLB. */ - - /* Leaf 0x80000007 - Advanced Power Management. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t e7d; - struct { DECL_BITFIELD(e7d); }; - }; - - /* Leaf 0x80000008 - Misc addr/feature info. */ - uint8_t maxphysaddr, maxlinaddr, :8, :8; - union { - uint32_t e8b; - struct { DECL_BITFIELD(e8b); }; - }; - uint32_t nc:8, :4, apic_id_size:4, :16; - uint32_t /* d */:32; - - uint64_t :64, :64; /* Leaf 0x80000009. */ - uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ - uint64_t :64, :64; /* Leaf 0x8000000b. */ - uint64_t :64, :64; /* Leaf 0x8000000c. */ - uint64_t :64, :64; /* Leaf 0x8000000d. */ - uint64_t :64, :64; /* Leaf 0x8000000e. */ - uint64_t :64, :64; /* Leaf 0x8000000f. */ - uint64_t :64, :64; /* Leaf 0x80000010. */ - uint64_t :64, :64; /* Leaf 0x80000011. */ - uint64_t :64, :64; /* Leaf 0x80000012. */ - uint64_t :64, :64; /* Leaf 0x80000013. */ - uint64_t :64, :64; /* Leaf 0x80000014. */ - uint64_t :64, :64; /* Leaf 0x80000015. */ - uint64_t :64, :64; /* Leaf 0x80000016. */ - uint64_t :64, :64; /* Leaf 0x80000017. */ - uint64_t :64, :64; /* Leaf 0x80000018. */ - uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ - uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ - uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ - uint64_t :64, :64; /* Leaf 0x8000001c. */ - uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ - uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ - uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ - uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ - - /* Leaf 0x80000021 - Extended Feature 2 */ - union { - uint32_t e21a; - struct { DECL_BITFIELD(e21a); }; - }; - uint32_t /* b */:32, /* c */:32, /* d */:32; - }; - } extd; - -#undef __DECL_BITFIELD -#undef _DECL_BITFIELD -#undef DECL_BITFIELD - - /* Toolstack selected Hypervisor max_leaf (if non-zero). */ - uint8_t hv_limit, hv2_limit; - - /* Value calculated from raw data above. */ - uint8_t x86_vendor; -}; - -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} - -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} - -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -{ - return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; -} - -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) -{ - uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; - - return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; -} - -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); - -/** - * Recalculate the content in a CPUID policy which is derived from raw data. - */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); - -/** - * Fill a CPUID policy using the native CPUID instruction. - * - * No sanitisation is performed, but synthesised values are calculated. - * Values may be influenced by a hypervisor or from masking/faulting - * configuration. - */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); - -/** - * Clear leaf data beyond the policies max leaf/subleaf settings. - * - * Policy serialisation purposefully omits out-of-range leaves, because there - * are a large number of them due to vendor differences. However, when - * constructing new policies (e.g. levelling down), it is possible to end up - * with out-of-range leaves with stale content in them. This helper clears - * them. - */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; -#else -#include -typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; -#endif - -/** - * Serialise a cpuid_policy object into an array of cpuid leaves. - * - * @param policy The cpuid_policy to serialise. - * @param leaves The array of leaves to serialise into. - * @param nr_entries The number of entries in 'leaves'. - * @returns -errno - * - * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the - * leaves array is too short. On success, nr_entries is updated with the - * actual number of leaves written. - */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, - cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); - -/** - * Unserialise a cpuid_policy object from an array of cpuid leaves. - * - * @param policy The cpuid_policy to unserialise into. - * @param leaves The array of leaves to unserialise from. - * @param nr_entries The number of entries in 'leaves'. - * @param err_leaf Optional hint for error diagnostics. - * @param err_subleaf Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional - * err_* pointers will identify the out-of-range indicies. - * - * No content validation of in-range leaves is performed. Synthesised data is - * recalculated. - */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, - const cpuid_leaf_buffer_t leaves, - uint32_t nr_entries, uint32_t *err_leaf, - uint32_t *err_subleaf); - -#endif /* !XEN_LIB_X86_CPUID_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 8eb88314f5..e81f76c779 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518958.806010 (Exim 4.92) (envelope-from ) id 1pkVX7-00043A-Q6; Thu, 06 Apr 2023 19:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518958.806010; Thu, 06 Apr 2023 19:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVX7-000432-NR; Thu, 06 Apr 2023 19:44:33 +0000 Received: by outflank-mailman (input) for mailman id 518958; Thu, 06 Apr 2023 19:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVX6-00042w-I7 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVX6-0004b6-H6 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVX6-00085E-Fy for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6obVBgxL2LbcSQrd5R9X99Kv6M6JMx6pkAv0N1zOLE4=; b=He15cwCwJP5pvwKopZ/Kp2zpSe 45B81Bk5glpooifACagkAbIUmhp3b8IPC3GZpNDXUylVUXmpLs+CrXNEo/Q9tehpndZY/oLkxaPj9 YFFntDS6obx+6skfbcUKL3/viJukAaeBbTxy/HB5JsEmBqx0rMKlcGXqX+Bg1nQB0K8s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Merge struct msr_policy into struct cpu_policy Message-Id: Date: Thu, 06 Apr 2023 19:44:32 +0000 commit 03812da3754d550dd8cbee7289469069ea6f0073 Author: Andrew Cooper AuthorDate: Tue Mar 28 21:24:20 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 1 - xen/arch/x86/include/asm/msr.h | 3 +- xen/include/xen/lib/x86/cpu-policy.h | 81 ++++++++++++++++++++++- xen/include/xen/lib/x86/msr.h | 104 ------------------------------ xen/lib/x86/msr.c | 2 +- 5 files changed, 83 insertions(+), 108 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 79e42e8bfd..0ce3d8e166 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -10,7 +10,6 @@ #include #include -#include #include static bool debug; diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 7946b6b24c..02eddd919c 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -6,8 +6,9 @@ #include #include #include +#include -#include +#include #include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 666505964d..53fffca552 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -3,7 +3,6 @@ #define XEN_LIB_X86_POLICIES_H #include -#include #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -107,6 +106,9 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) +/* Maximum number of MSRs written when serialising a cpu_policy. */ +#define MSR_MAX_SERIALISED_ENTRIES 2 + struct cpu_policy { #define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) @@ -324,6 +326,44 @@ struct cpu_policy }; } extd; + /* + * 0x000000ce - MSR_INTEL_PLATFORM_INFO + * + * This MSR is non-architectural, but for simplicy we allow it to be read + * unconditionally. CPUID Faulting support can be fully emulated for HVM + * guests so can be offered unconditionally, while support for PV guests + * is dependent on real hardware support. + */ + union { + uint32_t raw; + struct { + uint32_t :31; + bool cpuid_faulting:1; + }; + } platform_info; + + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -337,6 +377,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy struct old_cpu_policy { @@ -438,9 +479,11 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); #ifdef __XEN__ #include typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; #else #include typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** @@ -480,6 +523,42 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); +/** + * Serialise an msr_policy object into an array. + * + * @param policy The msr_policy to serialise. + * @param msrs The array of msrs to serialise into. + * @param nr_entries The number of entries in 'msrs'. + * @returns -errno + * + * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the + * buffer array is too short. On success, nr_entries is updated with the + * actual number of msrs written. + */ +int x86_msr_copy_to_buffer(const struct msr_policy *policy, + msr_entry_buffer_t msrs, uint32_t *nr_entries); + +/** + * Unserialise an msr_policy object from an array of msrs. + * + * @param policy The msr_policy object to unserialise into. + * @param msrs The array of msrs to unserialise from. + * @param nr_entries The number of entries in 'msrs'. + * @param err_msr Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons + * based on the content in an individual 'msrs' entry, including the MSR index + * not being valid in the policy, the flags field being nonzero, or if the + * value provided would truncate when stored in the policy. In such cases, + * the optional err_* pointer will identify the problematic MSR. + * + * No content validation is performed on the data stored in the policy object. + */ +int x86_msr_copy_from_buffer(struct msr_policy *policy, + const msr_entry_buffer_t msrs, uint32_t nr_entries, + uint32_t *err_msr); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/msr.h b/xen/include/xen/lib/x86/msr.h deleted file mode 100644 index 48ba4a59c0..0000000000 --- a/xen/include/xen/lib/x86/msr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_MSR_H -#define XEN_LIB_X86_MSR_H - -/* Maximum number of MSRs written when serialising msr_policy. */ -#define MSR_MAX_SERIALISED_ENTRIES 2 - -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy -{ - /* - * 0x000000ce - MSR_INTEL_PLATFORM_INFO - * - * This MSR is non-architectural, but for simplicy we allow it to be read - * unconditionally. CPUID Faulting support can be fully emulated for HVM - * guests so can be offered unconditionally, while support for PV guests - * is dependent on real hardware support. - */ - union { - uint32_t raw; - struct { - uint32_t :31; - bool cpuid_faulting:1; - }; - } platform_info; - - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; -#else -#include -typedef xen_msr_entry_t msr_entry_buffer_t[]; -#endif - -/** - * Serialise an msr_policy object into an array. - * - * @param policy The msr_policy to serialise. - * @param msrs The array of msrs to serialise into. - * @param nr_entries The number of entries in 'msrs'. - * @returns -errno - * - * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the - * buffer array is too short. On success, nr_entries is updated with the - * actual number of msrs written. - */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, - msr_entry_buffer_t msrs, uint32_t *nr_entries); - -/** - * Unserialise an msr_policy object from an array of msrs. - * - * @param policy The msr_policy object to unserialise into. - * @param msrs The array of msrs to unserialise from. - * @param nr_entries The number of entries in 'msrs'. - * @param err_msr Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons - * based on the content in an individual 'msrs' entry, including the MSR index - * not being valid in the policy, the flags field being nonzero, or if the - * value provided would truncate when stored in the policy. In such cases, - * the optional err_* pointer will identify the problematic MSR. - * - * No content validation is performed on the data stored in the policy object. - */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, - const msr_entry_buffer_t msrs, uint32_t nr_entries, - uint32_t *err_msr); - -#endif /* !XEN_LIB_X86_MSR_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index 7d71e92a38..c4d885e7b5 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include /* * Copy a single MSR into the provided msr_entry_buffer_t buffer, performing a -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518959.806014 (Exim 4.92) (envelope-from ) id 1pkVXH-00045R-Ra; Thu, 06 Apr 2023 19:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518959.806014; Thu, 06 Apr 2023 19:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXH-00045K-Ox; Thu, 06 Apr 2023 19:44:43 +0000 Received: by outflank-mailman (input) for mailman id 518959; Thu, 06 Apr 2023 19:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXG-00045A-ON for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXG-0004bG-M9 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVXG-00086D-K2 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Hl2AvNezFTvUPnBCNPBAP6uflhcUoWgIzCWF7U9eIQs=; b=pNszc1p6Xo9LwUWtP6VhDJp3SS 0D9D+Ss8EEkj/27hbK7lM/k1ClyTP1zm4w4X+BUAnxSB1Ea5EOVMLghAAt3LK4+i39YIDaZRDnc09 a5EJKX1WzUzApFjU+1op2mds1T95B4nwYAS1gVG+8OiJobL+QBiO9xnsDGSKK3yo4tVY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Merge the system {cpuid,msr} policy objects Message-Id: Date: Thu, 06 Apr 2023 19:44:42 +0000 commit 6bc33366795d14a21a3244d0f3b63f7dccea87ef Author: Andrew Cooper AuthorDate: Wed Mar 29 07:39:44 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Merge the system {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Introduce a new cpu-policy.{h,c} to be the new location for all policy handling logic. Place the combined objects in __ro_after_init, which is new since the original logic was written. As we're trying to phase out the use of struct old_cpu_policy entirely, rework update_domain_cpu_policy() to not pointer-chase through system_policies[]. This in turn allows system_policies[] in sysctl.c to become static and reduced in scope to XEN_SYSCTL_get_cpu_policy. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/Makefile | 1 + xen/arch/x86/cpu-policy.c | 18 +++++++++ xen/arch/x86/cpu/common.c | 4 +- xen/arch/x86/cpuid.c | 66 ++++++++++++++------------------ xen/arch/x86/domctl.c | 17 ++++++--- xen/arch/x86/include/asm/cpu-policy.h | 14 +++++++ xen/arch/x86/include/asm/cpuid.h | 6 --- xen/arch/x86/include/asm/msr.h | 7 ---- xen/arch/x86/msr.c | 38 +++++++------------ xen/arch/x86/sysctl.c | 71 +++++++++++++---------------------- 10 files changed, 116 insertions(+), 126 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 08b110592d..fc9487aa40 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -19,6 +19,7 @@ obj-y += bitops.o obj-bin-y += bzimage.init.o obj-bin-y += clear_page.o obj-bin-y += copy_page.o +obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o obj-$(CONFIG_PV32) += x86_64/compat.o diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c new file mode 100644 index 0000000000..663e9a084c --- /dev/null +++ b/xen/arch/x86/cpu-policy.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#include + +#include + +struct cpu_policy __ro_after_init raw_cpu_policy; +struct cpu_policy __ro_after_init host_cpu_policy; +#ifdef CONFIG_PV +struct cpu_policy __ro_after_init pv_max_cpu_policy; +struct cpu_policy __ro_after_init pv_def_cpu_policy; +#endif +#ifdef CONFIG_HVM +struct cpu_policy __ro_after_init hvm_max_cpu_policy; +struct cpu_policy __ro_after_init hvm_def_cpu_policy; +#endif diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 5ad347534a..f11dcda57a 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -141,7 +143,7 @@ bool __init probe_cpuid_faulting(void) return false; if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) - raw_msr_policy.platform_info.cpuid_faulting = + raw_cpu_policy.platform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; if (rc || diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index b22725c492..0916bfe175 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -142,17 +143,6 @@ static void zero_leaves(struct cpuid_leaf *l, memset(&l[first], 0, sizeof(*l) * (last - first + 1)); } -struct cpuid_policy __read_mostly raw_cpuid_policy, - __read_mostly host_cpuid_policy; -#ifdef CONFIG_PV -struct cpuid_policy __read_mostly pv_max_cpuid_policy; -struct cpuid_policy __read_mostly pv_def_cpuid_policy; -#endif -#ifdef CONFIG_HVM -struct cpuid_policy __read_mostly hvm_max_cpuid_policy; -struct cpuid_policy __read_mostly hvm_def_cpuid_policy; -#endif - static void sanitise_featureset(uint32_t *fs) { /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ @@ -344,7 +334,7 @@ static void recalculate_misc(struct cpuid_policy *p) static void __init calculate_raw_policy(void) { - struct cpuid_policy *p = &raw_cpuid_policy; + struct cpuid_policy *p = &raw_cpu_policy; x86_cpuid_policy_fill_native(p); @@ -354,10 +344,10 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct cpuid_policy *p = &host_cpuid_policy; + struct cpuid_policy *p = &host_cpu_policy; unsigned int max_extd_leaf; - *p = raw_cpuid_policy; + *p = raw_cpu_policy; p->basic.max_leaf = min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); @@ -449,17 +439,17 @@ static void __init guest_common_feature_adjustments(uint32_t *fs) * of IBRS by using the AMD feature bit. An administrator may wish for * performance reasons to offer IBPB without IBRS. */ - if ( host_cpuid_policy.feat.ibrsb ) + if ( host_cpu_policy.feat.ibrsb ) __set_bit(X86_FEATURE_IBPB, fs); } static void __init calculate_pv_max_policy(void) { - struct cpuid_policy *p = &pv_max_cpuid_policy; + struct cpuid_policy *p = &pv_max_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -486,11 +476,11 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { - struct cpuid_policy *p = &pv_def_cpuid_policy; + struct cpuid_policy *p = &pv_def_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = pv_max_cpuid_policy; + *p = pv_max_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -506,12 +496,12 @@ static void __init calculate_pv_def_policy(void) static void __init calculate_hvm_max_policy(void) { - struct cpuid_policy *p = &hvm_max_cpuid_policy; + struct cpuid_policy *p = &hvm_max_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -539,7 +529,7 @@ static void __init calculate_hvm_max_policy(void) * HVM guests are able if running in protected mode. */ if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpuid_policy.basic.sep ) + raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); /* @@ -597,12 +587,12 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct cpuid_policy *p = &hvm_def_cpuid_policy; + struct cpuid_policy *p = &hvm_def_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = hvm_max_cpuid_policy; + *p = hvm_max_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -670,8 +660,8 @@ void recalculate_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; unsigned int i; @@ -746,7 +736,7 @@ void recalculate_cpuid_policy(struct domain *d) /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpuid_policy.feat._7b0 & + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); @@ -797,8 +787,8 @@ void recalculate_cpuid_policy(struct domain *d) int init_domain_cpuid_policy(struct domain *d) { struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !p ) { @@ -1102,7 +1092,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) - *res = raw_cpuid_policy.basic.raw[5]; + *res = raw_cpu_policy.basic.raw[5]; break; case 0x7: @@ -1234,14 +1224,14 @@ static void __init __maybe_unused build_assertions(void) /* Find some more clever allocation scheme if this trips. */ BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.basic) != - sizeof(raw_cpuid_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.feat) != - sizeof(raw_cpuid_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.xstate) != - sizeof(raw_cpuid_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.extd) != - sizeof(raw_cpuid_policy.extd.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); } /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 944af63e68..5800bb10bc 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -35,18 +35,25 @@ #include #include #include -#include +#include static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct old_cpu_policy new = {}; - const struct old_cpu_policy *sys = is_pv_domain(d) - ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] - : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; + struct cpu_policy *sys = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + struct old_cpu_policy old_sys = { sys, sys }; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; + if ( !sys ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + /* Start by copying the domain's existing policies. */ if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || !(new.msr = xmemdup(d->arch.msr)) ) @@ -64,7 +71,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); if ( ret ) goto out; diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h new file mode 100644 index 0000000000..eef14bb426 --- /dev/null +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef X86_CPU_POLICY_H +#define X86_CPU_POLICY_H + +struct cpu_policy; + +extern struct cpu_policy raw_cpu_policy; +extern struct cpu_policy host_cpu_policy; +extern struct cpu_policy pv_max_cpu_policy; +extern struct cpu_policy pv_def_cpu_policy; +extern struct cpu_policy hvm_max_cpu_policy; +extern struct cpu_policy hvm_def_cpu_policy; + +#endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index d418e8100d..ea05862773 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -46,12 +46,6 @@ DECLARE_PER_CPU(struct cpuidmasks, cpuidmasks); /* Default masking MSR values, calculated at boot. */ extern struct cpuidmasks cpuidmask_defaults; -extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, - pv_max_cpuid_policy, pv_def_cpuid_policy, - hvm_max_cpuid_policy, hvm_def_cpuid_policy; - -extern const struct old_cpu_policy system_policies[]; - /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 02eddd919c..022230acc0 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -292,13 +292,6 @@ static inline void wrmsr_tsc_aux(uint32_t val) uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -extern struct msr_policy raw_msr_policy, - host_msr_policy, - pv_max_msr_policy, - pv_def_msr_policy, - hvm_max_msr_policy, - hvm_def_msr_policy; - /* Container object for per-vCPU MSRs */ struct vcpu_msrs { diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 7ddf0078c3..bff26bc4e2 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -37,20 +38,9 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -struct msr_policy __read_mostly raw_msr_policy, - __read_mostly host_msr_policy; -#ifdef CONFIG_PV -struct msr_policy __read_mostly pv_max_msr_policy; -struct msr_policy __read_mostly pv_def_msr_policy; -#endif -#ifdef CONFIG_HVM -struct msr_policy __read_mostly hvm_max_msr_policy; -struct msr_policy __read_mostly hvm_def_msr_policy; -#endif - static void __init calculate_raw_policy(void) { - struct msr_policy *mp = &raw_msr_policy; + struct msr_policy *mp = &raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -61,9 +51,9 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct msr_policy *mp = &host_msr_policy; + struct msr_policy *mp = &host_cpu_policy; - *mp = raw_msr_policy; + *mp = raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ @@ -81,25 +71,25 @@ static void __init calculate_host_policy(void) static void __init calculate_pv_max_policy(void) { - struct msr_policy *mp = &pv_max_msr_policy; + struct msr_policy *mp = &pv_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) { - struct msr_policy *mp = &pv_def_msr_policy; + struct msr_policy *mp = &pv_def_cpu_policy; - *mp = pv_max_msr_policy; + *mp = pv_max_cpu_policy; } static void __init calculate_hvm_max_policy(void) { - struct msr_policy *mp = &hvm_max_msr_policy; + struct msr_policy *mp = &hvm_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; @@ -109,9 +99,9 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct msr_policy *mp = &hvm_def_msr_policy; + struct msr_policy *mp = &hvm_def_cpu_policy; - *mp = hvm_max_msr_policy; + *mp = hvm_max_cpu_policy; } void __init init_guest_msr_policy(void) @@ -135,8 +125,8 @@ void __init init_guest_msr_policy(void) int init_domain_msr_policy(struct domain *d) { struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_msr_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_msr_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !mp ) { diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 3ed7c69f43..43a241f209 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -30,38 +30,7 @@ #include #include #include -#include - -const struct old_cpu_policy system_policies[6] = { - [ XEN_SYSCTL_cpu_policy_raw ] = { - &raw_cpuid_policy, - &raw_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_host ] = { - &host_cpuid_policy, - &host_msr_policy, - }, -#ifdef CONFIG_PV - [ XEN_SYSCTL_cpu_policy_pv_max ] = { - &pv_max_cpuid_policy, - &pv_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_pv_default ] = { - &pv_def_cpuid_policy, - &pv_def_msr_policy, - }, -#endif -#ifdef CONFIG_HVM - [ XEN_SYSCTL_cpu_policy_hvm_max ] = { - &hvm_max_cpuid_policy, - &hvm_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_hvm_default ] = { - &hvm_def_cpuid_policy, - &hvm_def_msr_policy, - }, -#endif -}; +#include struct l3_cache_info { int ret; @@ -326,19 +295,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[6] = { - [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, + static const struct cpu_policy *const policy_table[6] = { + [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_featureset_host] = &host_cpu_policy, #ifdef CONFIG_PV - [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpu_policy, #endif #ifdef CONFIG_HVM - [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpu_policy, #endif }; - const struct cpuid_policy *p = NULL; + const struct cpu_policy *p = NULL; uint32_t featureset[FSCAPINTS]; unsigned int nr; @@ -391,7 +360,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct old_cpu_policy *policy; + static const struct cpu_policy *const system_policies[6] = { + [XEN_SYSCTL_cpu_policy_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_policy_host] = &host_cpu_policy, +#ifdef CONFIG_PV + [XEN_SYSCTL_cpu_policy_pv_max] = &pv_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_pv_default] = &pv_def_cpu_policy, +#endif +#ifdef CONFIG_HVM + [XEN_SYSCTL_cpu_policy_hvm_max] = &hvm_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_hvm_default] = &hvm_def_cpu_policy, +#endif + }; + const struct cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || @@ -400,11 +381,11 @@ long arch_do_sysctl( ret = -EINVAL; break; } - policy = &system_policies[ + policy = system_policies[ array_index_nospec(sysctl->u.cpu_policy.index, ARRAY_SIZE(system_policies))]; - if ( !policy->cpuid || !policy->msr ) + if ( !policy ) { ret = -EOPNOTSUPP; break; @@ -414,7 +395,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - policy->cpuid, + policy, sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -430,7 +411,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - policy->msr, + policy, sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:44:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518960.806019 (Exim 4.92) (envelope-from ) id 1pkVXR-000482-V4; Thu, 06 Apr 2023 19:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518960.806019; Thu, 06 Apr 2023 19:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXR-00047u-S1; Thu, 06 Apr 2023 19:44:53 +0000 Received: by outflank-mailman (input) for mailman id 518960; Thu, 06 Apr 2023 19:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXQ-00047n-RF for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXQ-0004cu-QH for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVXQ-00087A-PE for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kup+bUWsOyDjokZ25UahwbjBjK00oTwWvYQ6fCHS7io=; b=jLfkIMzUY7LKW6Il2DjrBclMun IcoROZvei5CFV++bE5K2jySxX6T32JT9J4uCljzCTSWGqxLWuU5H0DfhaMkQvbYGKhBpBNfAuiQ6g db/d9VNWYfT7zSCEfgEONpHdPZMZs3QoPPmDr8JR6gBNZvmGExdw3JNqVWrcXCubDoNI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Merge a domain's {cpuid,msr} policy objects Message-Id: Date: Thu, 06 Apr 2023 19:44:52 +0000 commit bd13dae34809e61e37ba1cd5de893c5c10c46256 Author: Andrew Cooper AuthorDate: Wed Mar 29 11:32:25 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Merge a domain's {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Drop the d->arch.msr pointer, and union d->arch.cpuid to give it a second name of cpu_policy in the interim. Merge init_domain_{cpuid,msr}_policy() into a single init_domain_cpu_policy(), moving the implementation into cpu-policy.c No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 49 +++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 23 ---------------- xen/arch/x86/domain.c | 15 ++++------- xen/arch/x86/domctl.c | 35 ++++++++++++------------- xen/arch/x86/include/asm/cpu-policy.h | 4 +++ xen/arch/x86/include/asm/cpuid.h | 3 --- xen/arch/x86/include/asm/domain.h | 13 +++++++--- xen/arch/x86/include/asm/msr.h | 1 - xen/arch/x86/mm/mem_sharing.c | 3 +-- xen/arch/x86/msr.c | 44 ------------------------------- 10 files changed, 86 insertions(+), 104 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 663e9a084c..e9ac1269c3 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include +#include struct cpu_policy __ro_after_init raw_cpu_policy; struct cpu_policy __ro_after_init host_cpu_policy; @@ -16,3 +19,49 @@ struct cpu_policy __ro_after_init pv_def_cpu_policy; struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif + +int init_domain_cpu_policy(struct domain *d) +{ + struct cpu_policy *p = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); + + if ( !p ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + + p = xmemdup(p); + if ( !p ) + return -ENOMEM; + + /* See comment in ctxt_switch_levelling() */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); + } + + d->arch.cpu_policy = p; + + recalculate_cpuid_policy(d); + + return 0; +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 0916bfe175..df3e503ced 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -784,29 +784,6 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } -int init_domain_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !p ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - p = xmemdup(p); - if ( !p ) - return -ENOMEM; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; -} - void __init init_dom0_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index d5847f70f8..b23e5014d1 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -66,6 +66,7 @@ #ifdef CONFIG_COMPAT #include #endif +#include #include #include #include @@ -743,8 +744,7 @@ int arch_domain_create(struct domain *d, d->arch.ctxt_switch = &idle_csw; - d->arch.cpuid = ZERO_BLOCK_PTR; /* Catch stray misuses. */ - d->arch.msr = ZERO_BLOCK_PTR; + d->arch.cpu_policy = ZERO_BLOCK_PTR; /* Catch stray misuses. */ return 0; } @@ -799,10 +799,7 @@ int arch_domain_create(struct domain *d, goto fail; paging_initialised = true; - if ( (rc = init_domain_cpuid_policy(d)) ) - goto fail; - - if ( (rc = init_domain_msr_policy(d)) ) + if ( (rc = init_domain_cpu_policy(d)) ) goto fail; d->arch.ioport_caps = @@ -873,8 +870,7 @@ int arch_domain_create(struct domain *d, iommu_domain_destroy(d); cleanup_domain_irq_mapping(d); free_xenheap_page(d->shared_info); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); if ( paging_initialised ) paging_final_teardown(d); free_perdomain_mappings(d); @@ -888,8 +884,7 @@ void arch_domain_destroy(struct domain *d) hvm_domain_destroy(d); xfree(d->arch.e820); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); free_domain_pirqs(d); if ( !is_idle_domain(d) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 5800bb10bc..81be25c677 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -40,11 +40,11 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct old_cpu_policy new = {}; + struct cpu_policy *new; struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }; + struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -54,33 +54,33 @@ static int update_domain_cpu_policy(struct domain *d, return -EOPNOTSUPP; } - /* Start by copying the domain's existing policies. */ - if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || - !(new.msr = xmemdup(d->arch.msr)) ) + /* Start by copying the domain's existing policy. */ + if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; + old_new = (struct old_cpu_policy){ new, new }; + /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->leaves, xdpc->nr_leaves, + new, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) + new, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); + x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); if ( ret ) goto out; /* - * Audit was successful. Replace existing policies, leaving the old - * policies to be freed. + * Audit was successful. Replace the existing policy, leaving the old one + * to be freed. */ - SWAP(new.cpuid, d->arch.cpuid); - SWAP(new.msr, d->arch.msr); + SWAP(new, d->arch.cpu_policy); /* TODO: Drop when x86_cpu_policies_are_compatible() is completed. */ recalculate_cpuid_policy(d); @@ -89,9 +89,8 @@ static int update_domain_cpu_policy(struct domain *d, domain_cpu_policy_changed(d); out: - /* Free whichever cpuid/msr structs are not installed in struct domain. */ - xfree(new.cpuid); - xfree(new.msr); + /* Free whichever struct is not installed in struct domain. */ + xfree(new); if ( ret ) { @@ -1327,7 +1326,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - d->arch.cpuid, + d->arch.cpu_policy, domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; @@ -1336,7 +1335,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - d->arch.msr, + d->arch.cpu_policy, domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index eef14bb426..9ba34bbf5e 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -3,6 +3,7 @@ #define X86_CPU_POLICY_H struct cpu_policy; +struct domain; extern struct cpu_policy raw_cpu_policy; extern struct cpu_policy host_cpu_policy; @@ -11,4 +12,7 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Allocate and initialise a CPU policy suitable for the domain. */ +int init_domain_cpu_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index ea05862773..7f81b998ce 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -49,9 +49,6 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Allocate and initialise a CPUID policy suitable for the domain. */ -int init_domain_cpuid_policy(struct domain *d); - /* Apply dom0-specific tweaks to the CPUID policy. */ void init_dom0_cpuid_policy(struct domain *d); diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 17780ad9db..466388a98e 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -386,9 +386,16 @@ struct arch_domain */ uint8_t x87_fip_width; - /* CPUID and MSR policy objects. */ - struct cpuid_policy *cpuid; - struct msr_policy *msr; + /* + * The domain's CPU Policy. "cpu_policy" is considered the canonical + * pointer, but the "cpuid" and "msr" aliases exist so the most + * appropriate one can be used for local code clarity. + */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + struct cpu_policy *msr; + }; struct PITState vpit; diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 022230acc0..b59a51d238 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -419,7 +419,6 @@ struct vcpu_msrs }; void init_guest_msr_policy(void); -int init_domain_msr_policy(struct domain *d); int init_vcpu_msr_policy(struct vcpu *v); /* diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 649d93dc54..5b3449db7a 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1902,8 +1902,7 @@ static int fork(struct domain *cd, struct domain *d) domain_pause(d); cd->max_pages = d->max_pages; - *cd->arch.cpuid = *d->arch.cpuid; - *cd->arch.msr = *d->arch.msr; + *cd->arch.cpu_policy = *d->arch.cpu_policy; cd->vmtrace_size = d->vmtrace_size; cd->parent = d; } diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index bff26bc4e2..93bd93feb6 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -122,50 +122,6 @@ void __init init_guest_msr_policy(void) } } -int init_domain_msr_policy(struct domain *d) -{ - struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !mp ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - mp = xmemdup(mp); - if ( !mp ) - return -ENOMEM; - - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - mp->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - mp->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - - d->arch.msr = mp; - - return 0; -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:45:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:45:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518961.806021 (Exim 4.92) (envelope-from ) id 1pkVXc-0004Aj-0b; Thu, 06 Apr 2023 19:45:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518961.806021; Thu, 06 Apr 2023 19:45:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXb-0004Ac-Tq; Thu, 06 Apr 2023 19:45:03 +0000 Received: by outflank-mailman (input) for mailman id 518961; Thu, 06 Apr 2023 19:45:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXa-0004AR-VF for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXa-0004dX-UB for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVXa-00088I-TA for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cCt8RNyq94/L6zxgSvOb18VpO5+euoJEyHE0Je8YuzU=; b=MznA+7Z7bDhvsQHkwf5B0uutQP 37y8NopKXmompB+ozbXz8gTP9DFDsufQz05ceyRNV5RCtiT2V7vU9Z40a7NxX9fqfgK6OXpxP3HJA kdHfRtNkXEtQviXh7XICO5Sxh1afeamQxkLh/EBpHAaAGUA89WYMoE3OdmhU5T6XHleM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Merge xc_cpu_policy's cpuid and msr objects Message-Id: Date: Thu, 06 Apr 2023 19:45:02 +0000 commit c9985233ca663fea20fc8807cf509d2e3fef0dca Author: Andrew Cooper AuthorDate: Wed Mar 29 12:37:33 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Merge xc_cpu_policy's cpuid and msr objects Right now, they're the same underlying type, containing disjoint information. Use a single object instead. Also take the opportunity to rename 'entries' to 'msrs' which is more descriptive, and more in line with nr_msrs being the count of MSR entries in the API. test-tsx uses xg_private.h to access the internals of xc_cpu_policy, so needs updating at the same time. Take the opportunity to improve the code clarity by passing a cpu_policy rather than an xc_cpu_policy into some functions. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/libs/guest/xg_cpuid_x86.c | 36 ++++++++++----------- tools/libs/guest/xg_private.h | 5 ++- tools/tests/tsx/test-tsx.c | 71 +++++++++++++++++++---------------------- 3 files changed, 53 insertions(+), 59 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 5fae06e778..5061fe3577 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -431,7 +431,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, xc_dominfo_t di; unsigned int i, nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; - struct cpuid_policy *p = NULL; + struct cpu_policy *p = NULL; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; uint32_t len = ARRAY_SIZE(host_featureset); @@ -692,7 +692,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; int rc; - rc = x86_cpuid_copy_from_buffer(&policy->cpuid, policy->leaves, + rc = x86_cpuid_copy_from_buffer(&policy->policy, policy->leaves, nr_leaves, &err_leaf, &err_subleaf); if ( rc ) { @@ -702,7 +702,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, return rc; } - rc = x86_msr_copy_from_buffer(&policy->msr, policy->entries, + rc = x86_msr_copy_from_buffer(&policy->policy, policy->msrs, nr_entries, &err_msr); if ( rc ) { @@ -719,18 +719,18 @@ int xc_cpu_policy_get_system(xc_interface *xch, unsigned int policy_idx, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_system_cpu_policy(xch, policy_idx, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain %u policy", policy_idx); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -744,18 +744,18 @@ int xc_cpu_policy_get_domain(xc_interface *xch, uint32_t domid, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_domain_cpu_policy(xch, domid, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain domain %u policy", domid); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -770,16 +770,16 @@ int xc_cpu_policy_set_domain(xc_interface *xch, uint32_t domid, { uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = xc_cpu_policy_serialise(xch, policy, policy->leaves, &nr_leaves, - policy->entries, &nr_entries); + policy->msrs, &nr_msrs); if ( rc ) return rc; rc = xc_set_domain_cpu_policy(xch, domid, nr_leaves, policy->leaves, - nr_entries, policy->entries, + nr_msrs, policy->msrs, &err_leaf, &err_subleaf, &err_msr); if ( rc ) { @@ -802,7 +802,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( leaves ) { - rc = x86_cpuid_copy_to_buffer(&p->cpuid, leaves, nr_leaves); + rc = x86_cpuid_copy_to_buffer(&p->policy, leaves, nr_leaves); if ( rc ) { ERROR("Failed to serialize CPUID policy"); @@ -813,7 +813,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( msrs ) { - rc = x86_msr_copy_to_buffer(&p->msr, msrs, nr_msrs); + rc = x86_msr_copy_to_buffer(&p->policy, msrs, nr_msrs); if ( rc ) { ERROR("Failed to serialize MSR policy"); @@ -831,7 +831,7 @@ int xc_cpu_policy_update_cpuid(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t nr) { unsigned int err_leaf = -1, err_subleaf = -1; - int rc = x86_cpuid_copy_from_buffer(&policy->cpuid, leaves, nr, + int rc = x86_cpuid_copy_from_buffer(&policy->policy, leaves, nr, &err_leaf, &err_subleaf); if ( rc ) @@ -850,7 +850,7 @@ int xc_cpu_policy_update_msrs(xc_interface *xch, xc_cpu_policy_t *policy, const xen_msr_entry_t *msrs, uint32_t nr) { unsigned int err_msr = -1; - int rc = x86_msr_copy_from_buffer(&policy->msr, msrs, nr, &err_msr); + int rc = x86_msr_copy_from_buffer(&policy->policy, msrs, nr, &err_msr); if ( rc ) { @@ -868,8 +868,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->cpuid, &host->msr }; - struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->policy, &host->policy }; + struct old_cpu_policy g = { &guest->policy, &guest->policy }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/libs/guest/xg_private.h b/tools/libs/guest/xg_private.h index 09e24f1227..e729a8106c 100644 --- a/tools/libs/guest/xg_private.h +++ b/tools/libs/guest/xg_private.h @@ -173,10 +173,9 @@ int pin_table(xc_interface *xch, unsigned int type, unsigned long mfn, #include struct xc_cpu_policy { - struct cpuid_policy cpuid; - struct msr_policy msr; + struct cpu_policy policy; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; - xen_msr_entry_t entries[MSR_MAX_SERIALISED_ENTRIES]; + xen_msr_entry_t msrs[MSR_MAX_SERIALISED_ENTRIES]; }; #endif /* x86 */ diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index d6d98c299b..b7e1972ce8 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -151,15 +151,15 @@ static void test_tsx_msrs(void) { printf("Testing MSR_TSX_FORCE_ABORT consistency\n"); test_tsx_msr_consistency( - MSR_TSX_FORCE_ABORT, host.cpuid.feat.tsx_force_abort); + MSR_TSX_FORCE_ABORT, host.policy.feat.tsx_force_abort); printf("Testing MSR_TSX_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_TSX_CTRL, host.msr.arch_caps.tsx_ctrl); + MSR_TSX_CTRL, host.policy.arch_caps.tsx_ctrl); printf("Testing MSR_MCU_OPT_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_MCU_OPT_CTRL, host.cpuid.feat.srbds_ctrl); + MSR_MCU_OPT_CTRL, host.policy.feat.srbds_ctrl); } /* @@ -281,7 +281,7 @@ static void test_rtm_behaviour(void) else return fail(" Got unexpected behaviour %d\n", rtm_behaviour); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { if ( rtm_behaviour == RTM_UD ) fail(" Host reports RTM, but appears unavailable\n"); @@ -293,57 +293,52 @@ static void test_rtm_behaviour(void) } } -static void dump_tsx_details(const struct xc_cpu_policy *p, const char *pref) +static void dump_tsx_details(const struct cpu_policy *p, const char *pref) { printf(" %s RTM %u, HLE %u, TSX_FORCE_ABORT %u, RTM_ALWAYS_ABORT %u, TSX_CTRL %u\n", pref, - p->cpuid.feat.rtm, - p->cpuid.feat.hle, - p->cpuid.feat.tsx_force_abort, - p->cpuid.feat.rtm_always_abort, - p->msr.arch_caps.tsx_ctrl); + p->feat.rtm, + p->feat.hle, + p->feat.tsx_force_abort, + p->feat.rtm_always_abort, + p->arch_caps.tsx_ctrl); } /* Sanity test various invariants we expect in the default/max policies. */ -static void test_guest_policies(const struct xc_cpu_policy *max, - const struct xc_cpu_policy *def) +static void test_guest_policies(const struct cpu_policy *max, + const struct cpu_policy *def) { - const struct cpuid_policy *cm = &max->cpuid; - const struct cpuid_policy *cd = &def->cpuid; - const struct msr_policy *mm = &max->msr; - const struct msr_policy *md = &def->msr; - dump_tsx_details(max, "Max:"); dump_tsx_details(def, "Def:"); - if ( ((cm->feat.raw[0].d | cd->feat.raw[0].d) & + if ( ((max->feat.raw[0].d | def->feat.raw[0].d) & (bitmaskof(X86_FEATURE_TSX_FORCE_ABORT) | bitmaskof(X86_FEATURE_RTM_ALWAYS_ABORT) | bitmaskof(X86_FEATURE_SRBDS_CTRL))) || - ((mm->arch_caps.raw | md->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) + ((max->arch_caps.raw | def->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) fail(" Xen-only TSX controls offered to guest\n"); switch ( rtm_behaviour ) { case RTM_UD: - if ( (cm->feat.raw[0].b | cd->feat.raw[0].b) & + if ( (max->feat.raw[0].b | def->feat.raw[0].b) & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests despite not being available\n"); break; case RTM_ABORT: - if ( cd->feat.raw[0].b & + if ( def->feat.raw[0].b & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests by default despite not being usable\n"); break; case RTM_OK: - if ( !cm->feat.rtm || !cd->feat.rtm ) + if ( !max->feat.rtm || !def->feat.rtm ) fail(" RTM not offered to guests despite being available\n"); break; } - if ( cd->feat.hle ) + if ( def->feat.hle ) fail(" Fail: HLE offered in default policy\n"); } @@ -352,13 +347,13 @@ static void test_def_max_policies(void) if ( xen_has_pv ) { printf("Testing PV default/max policies\n"); - test_guest_policies(&pv_max, &pv_default); + test_guest_policies(&pv_max.policy, &pv_default.policy); } if ( xen_has_hvm ) { printf("Testing HVM default/max policies\n"); - test_guest_policies(&hvm_max, &hvm_default); + test_guest_policies(&hvm_max.policy, &hvm_default.policy); } } @@ -382,23 +377,23 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); /* * Check defaults given to the guest. */ - if ( guest_policy.cpuid.feat.rtm != (rtm_behaviour == RTM_OK) ) + if ( guest_policy.policy.feat.rtm != (rtm_behaviour == RTM_OK) ) fail(" RTM %u in guest, despite rtm behaviour\n", - guest_policy.cpuid.feat.rtm); + guest_policy.policy.feat.rtm); - if ( guest_policy.cpuid.feat.hle || - guest_policy.cpuid.feat.tsx_force_abort || - guest_policy.cpuid.feat.rtm_always_abort || - guest_policy.cpuid.feat.srbds_ctrl || - guest_policy.msr.arch_caps.tsx_ctrl ) + if ( guest_policy.policy.feat.hle || + guest_policy.policy.feat.tsx_force_abort || + guest_policy.policy.feat.rtm_always_abort || + guest_policy.policy.feat.srbds_ctrl || + guest_policy.policy.arch_caps.tsx_ctrl ) fail(" Unexpected features advertised\n"); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { unsigned int _7b0; @@ -406,7 +401,7 @@ static void test_guest(struct xen_domctl_createdomain *c) * If host RTM is available, all combinations of guest flags should be * possible. Flip both HLE/RTM to check non-default settings. */ - _7b0 = (guest_policy.cpuid.feat.raw[0].b ^= + _7b0 = (guest_policy.policy.feat.raw[0].b ^= (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM))); /* Set the new policy. */ @@ -427,12 +422,12 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); - if ( guest_policy.cpuid.feat.raw[0].b != _7b0 ) + if ( guest_policy.policy.feat.raw[0].b != _7b0 ) { fail(" Expected CPUID.7[1].b 0x%08x differs from actual 0x%08x\n", - _7b0, guest_policy.cpuid.feat.raw[0].b); + _7b0, guest_policy.policy.feat.raw[0].b); goto out; } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:45:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518962.806025 (Exim 4.92) (envelope-from ) id 1pkVXm-0004FW-3k; Thu, 06 Apr 2023 19:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518962.806025; Thu, 06 Apr 2023 19:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXm-0004FI-0p; Thu, 06 Apr 2023 19:45:14 +0000 Received: by outflank-mailman (input) for mailman id 518962; Thu, 06 Apr 2023 19:45:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXl-0004ER-3I for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXl-0004dw-1r for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVXl-000899-0i for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BjLjTQLlsXXZk+FNO8g6LfGhX2jWWolQ/G5uH9gX94w=; b=VcXKcSCTQnSahhMEYCD7kFPBwU 4GZlE40V+eu++5lkek+uVlczY8SxI4UcocLE357s1IEmXY3nUsY/WdQ3/98OUMN9Cw/LMX7A8JpAd PbQShJ/7OLArGWgpfyM1bmovQRStiTtRwZ7c2ucv+S2ymrrCNiFG66BhP6VY/4zQJWNU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Drop struct old_cpu_policy Message-Id: Date: Thu, 06 Apr 2023 19:45:13 +0000 commit 66c5c99656314451ff9520f91cff5bb39fee9fed Author: Andrew Cooper AuthorDate: Wed Mar 29 12:01:33 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Drop struct old_cpu_policy With all the complicated callers of x86_cpu_policies_are_compatible() updated to use a single cpu_policy object, we can drop the final user of struct old_cpu_policy. Update x86_cpu_policies_are_compatible() to take (new) cpu_policy pointers, reducing the amount of internal pointer chasing, and update all callers to pass their cpu_policy objects directly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/libs/guest/xg_cpuid_x86.c | 4 +-- tools/tests/cpu-policy/test-cpu-policy.c | 50 ++++++++++---------------------- xen/arch/x86/domctl.c | 7 ++--- xen/include/xen/lib/x86/cpu-policy.h | 12 ++------ xen/lib/x86/policy.c | 12 ++++---- 5 files changed, 27 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 5061fe3577..259029be8b 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -868,9 +868,7 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->policy, &host->policy }; - struct old_cpu_policy g = { &guest->policy, &guest->policy }; - int rc = x86_cpu_policies_are_compatible(&h, &g, &err); + int rc = x86_cpu_policies_are_compatible(&host->policy, &guest->policy, &err); if ( !rc ) return true; diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 909d6272f8..a4ca07f339 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -98,7 +98,7 @@ static bool msrs_are_sorted(const xen_msr_entry_t *entries, unsigned int nr) static void test_cpuid_current(void) { - struct cpuid_policy p; + struct cpu_policy p; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; unsigned int nr = ARRAY_SIZE(leaves); int rc; @@ -118,7 +118,7 @@ static void test_cpuid_current(void) static void test_cpuid_serialise_success(void) { static const struct test { - struct cpuid_policy p; + struct cpu_policy p; const char *name; unsigned int nr_leaves; } tests[] = { @@ -242,7 +242,7 @@ static void test_cpuid_serialise_success(void) static void test_msr_serialise_success(void) { static const struct test { - struct msr_policy p; + struct cpu_policy p; const char *name; unsigned int nr_msrs; } tests[] = { @@ -430,7 +430,7 @@ static void test_cpuid_out_of_range_clearing(void) static const struct test { const char *name; unsigned int nr_markers; - struct cpuid_policy p; + struct cpu_policy p; } tests[] = { { .name = "basic", @@ -550,7 +550,7 @@ static void test_cpuid_out_of_range_clearing(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { const struct test *t = &tests[i]; - struct cpuid_policy *p = memdup(&t->p); + struct cpu_policy *p = memdup(&t->p); void *ptr; unsigned int nr_markers; @@ -574,23 +574,20 @@ static void test_is_compatible_success(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; } tests[] = { { .name = "Host CPUID faulting, Guest not", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, }, { .name = "Host CPUID faulting, Guest wanted", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, }, @@ -602,15 +599,8 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res != 0 || memcmp(&no_errors, &e, sizeof(no_errors)) ) @@ -624,25 +614,22 @@ static void test_is_compatible_failure(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; struct cpu_policy_errors e; } tests[] = { { .name = "Host basic.max_leaf out of range", - .guest_cpuid.basic.max_leaf = 1, + .guest.basic.max_leaf = 1, .e = { 0, -1, -1 }, }, { .name = "Host extd.max_leaf out of range", - .guest_cpuid.extd.max_leaf = 1, + .guest.extd.max_leaf = 1, .e = { 0x80000000, -1, -1 }, }, { .name = "Host no CPUID faulting, Guest wanted", - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, .e = { -1, -1, 0xce }, @@ -654,15 +641,8 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res == 0 || memcmp(&t->e, &e, sizeof(t->e)) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 81be25c677..c025285941 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -41,10 +41,9 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct cpu_policy *new; - struct cpu_policy *sys = is_pv_domain(d) + const struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -58,8 +57,6 @@ static int update_domain_cpu_policy(struct domain *d, if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; - old_new = (struct old_cpu_policy){ new, new }; - /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( new, xdpc->leaves, xdpc->nr_leaves, @@ -72,7 +69,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); + ret = x86_cpu_policies_are_compatible(sys, new, &err); if ( ret ) goto out; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 53fffca552..8b27a0725b 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -379,12 +379,6 @@ struct cpu_policy #define cpuid_policy cpu_policy #define msr_policy cpu_policy -struct old_cpu_policy -{ - struct cpuid_policy *cpuid; - struct msr_policy *msr; -}; - struct cpu_policy_errors { uint32_t leaf, subleaf; @@ -559,7 +553,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); -/* +/** * Calculate whether two policies are compatible. * * i.e. Can a VM configured with @guest run on a CPU supporting @host. @@ -573,8 +567,8 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index 2975711d7c..a9c60000af 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; @@ -15,18 +15,18 @@ int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->cpuid->basic.max_leaf > host->cpuid->basic.max_leaf ) + if ( guest->basic.max_leaf > host->basic.max_leaf ) FAIL_CPUID(0, NA); - if ( guest->cpuid->feat.max_subleaf > host->cpuid->feat.max_subleaf ) + if ( guest->feat.max_subleaf > host->feat.max_subleaf ) FAIL_CPUID(7, 0); - if ( guest->cpuid->extd.max_leaf > host->cpuid->extd.max_leaf ) + if ( guest->extd.max_leaf > host->extd.max_leaf ) FAIL_CPUID(0x80000000, NA); /* TODO: Audit more CPUID data. */ - if ( ~host->msr->platform_info.raw & guest->msr->platform_info.raw ) + if ( ~host->platform_info.raw & guest->platform_info.raw ) FAIL_MSR(MSR_INTEL_PLATFORM_INFO); #undef FAIL_MSR -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:45:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:45:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518963.806029 (Exim 4.92) (envelope-from ) id 1pkVXw-0004I8-5A; Thu, 06 Apr 2023 19:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518963.806029; Thu, 06 Apr 2023 19:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXw-0004I0-2R; Thu, 06 Apr 2023 19:45:24 +0000 Received: by outflank-mailman (input) for mailman id 518963; Thu, 06 Apr 2023 19:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXv-0004Hm-74 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVXv-0004e3-60 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVXv-0008A2-4v for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OOkWhAYMPNFmx2tw0kX1/adGdciHqdmHuAReOhPsG2w=; b=TpykgmVjUAPXLObazDAxvsMrib KikOgjquxDAC7zScOualb5qrgfZGtF9F4KvF6GttXaXXiAoGXgr2/3PSmg0RuHZx2n6xatDq2mgHT tkpwdS6FKzeDw5zcd/hXjC95kdtE3VcnWakwBk2QDcT5UXJJhWOpgRpfarcVHMbHF+D4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Out-of-inline the policy<->featureset convertors Message-Id: Date: Thu, 06 Apr 2023 19:45:23 +0000 commit 1027df4c00823f8b448e3a6861cc7b6ce61ba4e4 Author: Andrew Cooper AuthorDate: Thu Mar 30 18:21:01 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Out-of-inline the policy<->featureset convertors These are already getting over-large for being inline functions, and are only going to grow further over time. Out of line them, yielding the following net delta from bloat-o-meter: add/remove: 2/0 grow/shrink: 0/4 up/down: 276/-1877 (-1601) Switch to the newer cpu_policy terminology while doing so. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/libs/guest/xg_cpuid_x86.c | 2 +- xen/arch/x86/cpuid.c | 28 +++++++++---------- xen/arch/x86/sysctl.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 52 +++++++----------------------------- xen/lib/x86/cpuid.c | 42 +++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 259029be8b..33d366a8eb 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -565,7 +565,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - cpuid_featureset_to_policy(feat, p); + x86_cpu_featureset_to_policy(feat, p); } else { diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index df3e503ced..5eb5f18935 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -368,7 +368,7 @@ static void __init calculate_host_policy(void) p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, ARRAY_SIZE(p->extd.raw) - 1); - cpuid_featureset_to_policy(boot_cpu_data.x86_capability, p); + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); recalculate_xstate(p); recalculate_misc(p); @@ -450,7 +450,7 @@ static void __init calculate_pv_max_policy(void) unsigned int i; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_max_featuremask[i]; @@ -468,7 +468,7 @@ static void __init calculate_pv_max_policy(void) guest_common_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ @@ -481,7 +481,7 @@ static void __init calculate_pv_def_policy(void) unsigned int i; *p = pv_max_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_def_featuremask[i]; @@ -490,7 +490,7 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); } @@ -502,7 +502,7 @@ static void __init calculate_hvm_max_policy(void) const uint32_t *hvm_featuremask; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_max_featuremask : hvm_shadow_max_featuremask; @@ -581,7 +581,7 @@ static void __init calculate_hvm_max_policy(void) guest_common_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -593,7 +593,7 @@ static void __init calculate_hvm_def_policy(void) const uint32_t *hvm_featuremask; *p = hvm_max_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_def_featuremask : hvm_shadow_def_featuremask; @@ -612,7 +612,7 @@ static void __init calculate_hvm_def_policy(void) __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -682,8 +682,8 @@ void recalculate_cpuid_policy(struct domain *d) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); - cpuid_policy_to_featureset(p, fs); - cpuid_policy_to_featureset(max, max_fs); + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); if ( is_hvm_domain(d) ) { @@ -740,7 +740,7 @@ void recalculate_cpuid_policy(struct domain *d) (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); /* Pass host cacheline size through to guests. */ p->basic.clflush_size = max->basic.clflush_size; @@ -806,7 +806,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) uint32_t fs[FSCAPINTS]; unsigned int i; - cpuid_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(p, fs); for ( i = 0; i < ARRAY_SIZE(fs); ++i ) { @@ -814,7 +814,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) fs[i] &= ~dom0_disable_feat[i]; } - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); recalculate_cpuid_policy(d); } diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 43a241f209..c107f40c62 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -338,7 +338,7 @@ long arch_do_sysctl( ret = -EINVAL; if ( !ret ) - cpuid_policy_to_featureset(p, featureset); + x86_cpu_policy_to_featureset(p, featureset); /* Copy the requested featureset into place. */ if ( !ret && copy_to_guest(sysctl->u.cpu_featureset.features, diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 8b27a0725b..57b4633c86 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -387,49 +387,17 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} +/** + * Copy the featureset words out of a cpu_policy object. + */ +void x86_cpu_policy_to_featureset(const struct cpu_policy *p, + uint32_t fs[FEATURESET_NR_ENTRIES]); -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} +/** + * Copy the featureset words back into a cpu_policy object. + */ +void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], + struct cpu_policy *p); static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) { diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e81f76c779..734e90823a 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -60,6 +60,48 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor) } } +void x86_cpu_policy_to_featureset( + const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +void x86_cpu_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:45:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518964.806034 (Exim 4.92) (envelope-from ) id 1pkVY6-0004LI-6l; Thu, 06 Apr 2023 19:45:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518964.806034; Thu, 06 Apr 2023 19:45:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVY6-0004LA-40; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kZhJkqLPe2FK/AHh8YGRTvAQqayeuZDtH+bCq4uyVn4=; b=iT6AeorGW7sttAu72YhhKAUbnP posy5G3k+AoTHOIiUsQLSRe8NtBTwq3euLrrC4ssUhbz8XeEoAo0zt7e7QNLqKqXZ/PQCHt2loDP0 d38VDpekBgVSUt/a0acaF5Krx84wbUHucuSTO4AMiJaxdTkOoRuX7GCLYAkJjjJWT7DM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/boot: Move MSR policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 06 Apr 2023 19:45:33 +0000 commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be Author: Andrew Cooper AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 84 +++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/cpu-policy.h | 3 ++ xen/arch/x86/include/asm/msr.h | 1 - xen/arch/x86/msr.c | 84 ----------------------------------- xen/arch/x86/setup.c | 3 +- 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e9ac1269c3..f6a2317ed7 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index b59a51d238..458841733e 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -418,7 +418,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 93bd93feb6..802fc60baf 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -38,90 +38,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index b29229933d..51a19b9019 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include #include @@ -1991,7 +1992,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:45:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:45:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518966.806038 (Exim 4.92) (envelope-from ) id 1pkVYG-0004Oq-9w; Thu, 06 Apr 2023 19:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518966.806038; Thu, 06 Apr 2023 19:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYG-0004Oj-75; Thu, 06 Apr 2023 19:45:44 +0000 Received: by outflank-mailman (input) for mailman id 518966; Thu, 06 Apr 2023 19:45:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYF-0004OW-Ek for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 06 Apr 2023 19:45:43 +0000 commit 8eb56eb959a50bf9afd0fd590ec394e9145970a4 Author: Andrew Cooper AuthorDate: Mon Apr 3 19:06:02 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. Do some easy cleanup of includes. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 752 +++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 817 +--------------------------------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/include/asm/cpu-policy.h | 6 + xen/arch/x86/include/asm/cpuid.h | 11 +- xen/arch/x86/pv/domain.c | 1 + xen/arch/x86/setup.c | 2 - 7 files changed, 764 insertions(+), 826 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index f6a2317ed7..83186e940c 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,13 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include #include +#include +#include #include +#include #include +#include struct cpu_policy __ro_after_init raw_cpu_policy; struct cpu_policy __ro_after_init host_cpu_policy; @@ -20,10 +26,332 @@ struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif +const uint32_t known_features[] = INIT_KNOWN_FEATURES; + +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t deep_features[] = INIT_DEEP_FEATURES; + +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) +{ + const char *ss; + int val, rc = 0; + + do { + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; + const char *feat; + + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + /* Skip the 'no-' prefix for name comparisons. */ + feat = s; + if ( strncmp(s, "no-", 3) == 0 ) + feat += 3; + + /* (Re)initalise lhs and rhs for binary search. */ + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); + + while ( lhs < rhs ) + { + int res; + + mid = lhs + (rhs - lhs) / 2; + res = cmdline_strcmp(feat, mid->name); + + if ( res < 0 ) + { + rhs = mid; + continue; + } + if ( res > 0 ) + { + lhs = mid + 1; + continue; + } + + if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) + { + callback(mid->bit, val); + mid = NULL; + } + + break; + } + + /* + * Mid being NULL means that the name and boolean were successfully + * identified. Everything else is an error. + */ + if ( mid ) + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} + +static void __init cf_check _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init cf_check parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} +custom_param("cpuid", parse_xen_cpuid); + +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init cf_check _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init cf_check parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + +#define EMPTY_LEAF ((struct cpuid_leaf){}) +static void zero_leaves(struct cpuid_leaf *l, + unsigned int first, unsigned int last) +{ + memset(&l[first], 0, sizeof(*l) * (last - first + 1)); +} + +static void sanitise_featureset(uint32_t *fs) +{ + /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ + uint32_t disabled_features[ + ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; + unsigned int i; + + for ( i = 0; i < FSCAPINTS; ++i ) + { + /* Clamp to known mask. */ + fs[i] &= known_features[i]; + + /* + * Identify which features with deep dependencies have been + * disabled. + */ + disabled_features[i] = ~fs[i] & deep_features[i]; + } + + for_each_set_bit(i, (void *)disabled_features, + sizeof(disabled_features) * 8) + { + const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + unsigned int j; + + ASSERT(dfs); /* deep_features[] should guarentee this. */ + + for ( j = 0; j < FSCAPINTS; ++j ) + { + fs[j] &= ~dfs[j]; + disabled_features[j] &= ~dfs[j]; + } + } +} + +static void recalculate_xstate(struct cpu_policy *p) +{ + uint64_t xstates = XSTATE_FP_SSE; + uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; + unsigned int i, Da1 = p->xstate.Da1; + + /* + * The Da1 leaf is the only piece of information preserved in the common + * case. Everything else is derived from other feature state. + */ + memset(&p->xstate, 0, sizeof(p->xstate)); + + if ( !p->basic.xsave ) + return; + + if ( p->basic.avx ) + { + xstates |= X86_XCR0_YMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_YMM_POS] + + xstate_sizes[X86_XCR0_YMM_POS]); + } + + if ( p->feat.mpx ) + { + xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_BNDCSR_POS] + + xstate_sizes[X86_XCR0_BNDCSR_POS]); + } + + if ( p->feat.avx512f ) + { + xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_HI_ZMM_POS] + + xstate_sizes[X86_XCR0_HI_ZMM_POS]); + } + + if ( p->feat.pku ) + { + xstates |= X86_XCR0_PKRU; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_PKRU_POS] + + xstate_sizes[X86_XCR0_PKRU_POS]); + } + + p->xstate.max_size = xstate_size; + p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; + p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; + + p->xstate.Da1 = Da1; + if ( p->xstate.xsaves ) + { + p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; + p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; + } + else + xstates &= ~XSTATE_XSAVES_ONLY; + + for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + { + uint64_t curr_xstate = 1ul << i; + + if ( !(xstates & curr_xstate) ) + continue; + + p->xstate.comp[i].size = xstate_sizes[i]; + p->xstate.comp[i].offset = xstate_offsets[i]; + p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; + p->xstate.comp[i].align = curr_xstate & xstate_align; + } +} + +/* + * Misc adjustments to the policy. Mostly clobbering reserved fields and + * duplicating shared fields. Intentionally hidden fields are annotated. + */ +static void recalculate_misc(struct cpu_policy *p) +{ + p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ + p->basic.apic_id = 0; /* Dynamic. */ + + p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ + p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ + + p->basic.raw[0x8] = EMPTY_LEAF; + + /* TODO: Rework topology logic. */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + p->basic.raw[0xc] = EMPTY_LEAF; + + p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; + + /* Most of Power/RAS hidden from guests. */ + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; + + p->extd.raw[0x8].d = 0; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ + p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ + p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ + + p->extd.vendor_ebx = 0; + p->extd.vendor_ecx = 0; + p->extd.vendor_edx = 0; + + p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; + + p->extd.raw[0x5] = EMPTY_LEAF; + p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; + + p->extd.raw[0x8].a &= 0x0000ffff; + p->extd.raw[0x8].c = 0; + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + zero_leaves(p->basic.raw, 0x2, 0x3); + memset(p->cache.raw, 0, sizeof(p->cache.raw)); + zero_leaves(p->basic.raw, 0x9, 0xa); + + p->extd.vendor_ebx = p->basic.vendor_ebx; + p->extd.vendor_ecx = p->basic.vendor_ecx; + p->extd.vendor_edx = p->basic.vendor_edx; + + p->extd.raw_fms = p->basic.raw_fms; + p->extd.raw[0x1].b &= 0xff00ffff; + p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; + + p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ + p->extd.raw[0x8].c &= 0x0003f0ff; + + p->extd.raw[0x9] = EMPTY_LEAF; + + zero_leaves(p->extd.raw, 0xb, 0x18); + + /* 0x19 - TLB details. Pass through. */ + /* 0x1a - Perf hints. Pass through. */ + + p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ + p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ + p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ + p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ + p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ + p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ + break; + } +} + static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; + x86_cpuid_policy_fill_native(p); + + /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ + ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -34,9 +362,50 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { struct cpu_policy *p = &host_cpu_policy; + unsigned int max_extd_leaf; *p = raw_cpu_policy; + p->basic.max_leaf = + min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); + p->feat.max_subleaf = + min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); + + max_extd_leaf = p->extd.max_leaf; + + /* + * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be + * dispatch serialising for Spectre mitigations. Extend max_extd_leaf + * beyond what hardware supports, to include the feature leaf containing + * this information. + */ + if ( cpu_has_lfence_dispatch ) + max_extd_leaf = max(max_extd_leaf, 0x80000021); + + p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, + ARRAY_SIZE(p->extd.raw) - 1); + + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); + recalculate_xstate(p); + recalculate_misc(p); + + /* When vPMU is disabled, drop it from the host policy. */ + if ( vpmu_mode == XENPMU_MODE_OFF ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( p->extd.svm ) + { + /* Clamp to implemented features which require hardware support. */ + p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | + (1u << SVM_FEATURE_LBRV) | + (1u << SVM_FEATURE_NRIPS) | + (1u << SVM_FEATURE_PAUSEFILTER) | + (1u << SVM_FEATURE_DECODEASSISTS)); + /* Enable features which are always emulated. */ + p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | + (1u << SVM_FEATURE_TSCRATEMSR)); + } + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; @@ -51,11 +420,88 @@ static void __init calculate_host_policy(void) ARCH_CAPS_PBRSB_NO); } +static void __init guest_common_default_feature_adjustments(uint32_t *fs) +{ + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * On certain hardware, speculative or errata workarounds can result in + * TSX being placed in "force-abort" mode, where it doesn't actually + * function as expected, but is technically compatible with the ISA. + * + * Do not advertise RTM to guests by default if it won't actually work. + */ + if ( rtm_disabled ) + __clear_bit(X86_FEATURE_RTM, fs); +} + +static void __init guest_common_feature_adjustments(uint32_t *fs) +{ + /* Unconditionally claim to be able to set the hypervisor bit. */ + __set_bit(X86_FEATURE_HYPERVISOR, fs); + + /* + * If IBRS is offered to the guest, unconditionally offer STIBP. It is a + * nop on non-HT hardware, and has this behaviour to make heterogeneous + * setups easier to manage. + */ + if ( test_bit(X86_FEATURE_IBRSB, fs) ) + __set_bit(X86_FEATURE_STIBP, fs); + if ( test_bit(X86_FEATURE_IBRS, fs) ) + __set_bit(X86_FEATURE_AMD_STIBP, fs); + + /* + * On hardware which supports IBRS/IBPB, we can offer IBPB independently + * of IBRS by using the AMD feature bit. An administrator may wish for + * performance reasons to offer IBPB without IBRS. + */ + if ( host_cpu_policy.feat.ibrsb ) + __set_bit(X86_FEATURE_IBPB, fs); +} + static void __init calculate_pv_max_policy(void) { struct cpu_policy *p = &pv_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_max_featuremask[i]; + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); + + p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ p->arch_caps.raw = 0; /* Not supported yet. */ } @@ -63,15 +509,112 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { struct cpu_policy *p = &pv_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = pv_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_def_featuremask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } static void __init calculate_hvm_max_policy(void) { struct cpu_policy *p = &hvm_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_max_featuremask : hvm_shadow_max_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + /* + * Xen can provide an (x2)APIC emulation to HVM guests even if the host's + * (x2)APIC isn't enabled. + */ + __set_bit(X86_FEATURE_APIC, fs); + __set_bit(X86_FEATURE_X2APIC, fs); + + /* + * We don't support EFER.LMSLE at all. AMD has dropped the feature from + * hardware and allocated a CPUID bit to indicate its absence. + */ + __set_bit(X86_FEATURE_NO_LMSL, fs); + + /* + * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in + * long mode (and init_amd() has cleared it out of host capabilities), but + * HVM guests are able if running in protected mode. + */ + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + raw_cpu_policy.basic.sep ) + __set_bit(X86_FEATURE_SEP, fs); + + /* + * VIRT_SSBD is exposed in the default policy as a result of + * amd_virt_spec_ctrl being set, it also needs exposing in the max policy. + */ + if ( amd_virt_spec_ctrl ) + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + else if ( boot_cpu_has(X86_FEATURE_AMD_SSBD) ) + /* + * If SPEC_CTRL.SSBD is available VIRT_SPEC_CTRL.SSBD can be exposed + * and implemented using the former. Expose in the max policy only as + * the preference is for guests to use SPEC_CTRL.SSBD if available. + */ + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + /* + * With VT-x, some features are only supported by Xen if dedicated + * hardware support is also available. + */ + if ( cpu_has_vmx ) + { + if ( !cpu_has_vmx_mpx ) + __clear_bit(X86_FEATURE_MPX, fs); + + if ( !cpu_has_vmx_xsaves ) + __clear_bit(X86_FEATURE_XSAVES, fs); + } + + /* + * Xen doesn't use PKS, so the guest support for it has opted to not use + * the VMCS load/save controls for efficiency reasons. This depends on + * the exact vmentry/exit behaviour, so don't expose PKS in other + * situations until someone has cross-checked the behaviour for safety. + */ + if ( !cpu_has_vmx ) + __clear_bit(X86_FEATURE_PKS, fs); + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; @@ -82,8 +625,32 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { struct cpu_policy *p = &hvm_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = hvm_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_def_featuremask : hvm_shadow_def_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + /* + * Only expose VIRT_SSBD if AMD_SSBD is not available, and thus + * amd_virt_spec_ctrl is set. + */ + if ( amd_virt_spec_ctrl ) + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } void __init init_guest_cpu_policies(void) @@ -149,3 +716,188 @@ int init_domain_cpu_policy(struct domain *d) return 0; } + +void recalculate_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + const struct cpu_policy *max = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; + unsigned int i; + + if ( !max ) + { + ASSERT_UNREACHABLE(); + return; + } + + p->x86_vendor = x86_cpuid_lookup_vendor( + p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); + + p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); + p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); + p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, + ((p->x86_vendor & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) + ? CPUID_GUEST_NR_EXTD_AMD + : CPUID_GUEST_NR_EXTD_INTEL) - 1); + + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); + + if ( is_hvm_domain(d) ) + { + /* + * HVM domains using Shadow paging have further restrictions on their + * available paging features. + */ + if ( !hap_enabled(d) ) + { + for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) + max_fs[i] &= hvm_shadow_max_featuremask[i]; + } + + /* Hide nested-virt if it hasn't been explicitly configured. */ + if ( !nestedhvm_enabled(d) ) + { + __clear_bit(X86_FEATURE_VMX, max_fs); + __clear_bit(X86_FEATURE_SVM, max_fs); + } + } + + /* + * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits + * affect how to interpret topology information in other cpuid leaves. + */ + __set_bit(X86_FEATURE_HTT, max_fs); + __set_bit(X86_FEATURE_X2APIC, max_fs); + __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); + + /* + * 32bit PV domains can't use any Long Mode features, and cannot use + * SYSCALL on non-AMD hardware. + */ + if ( is_pv_32bit_domain(d) ) + { + __clear_bit(X86_FEATURE_LM, max_fs); + if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + __clear_bit(X86_FEATURE_SYSCALL, max_fs); + } + + /* Clamp the toolstacks choices to reality. */ + for ( i = 0; i < ARRAY_SIZE(fs); i++ ) + fs[i] &= max_fs[i]; + + if ( p->basic.max_leaf < XSTATE_CPUID ) + __clear_bit(X86_FEATURE_XSAVE, fs); + + sanitise_featureset(fs); + + /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ + fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & + (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); + + x86_cpu_featureset_to_policy(fs, p); + + /* Pass host cacheline size through to guests. */ + p->basic.clflush_size = max->basic.clflush_size; + + p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); + p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, + paging_max_paddr_bits(d)); + p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, + (p->basic.pae || p->basic.pse36) ? 36 : 32); + + p->extd.maxlinaddr = p->extd.lm ? 48 : 32; + + recalculate_xstate(p); + recalculate_misc(p); + + for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) + { + if ( p->cache.subleaf[i].type >= 1 && + p->cache.subleaf[i].type <= 3 ) + { + /* Subleaf has a valid cache type. Zero reserved fields. */ + p->cache.raw[i].a &= 0xffffc3ffu; + p->cache.raw[i].d &= 0x00000007u; + } + else + { + /* Subleaf is not valid. Zero the rest of the union. */ + zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); + break; + } + } + + if ( vpmu_mode == XENPMU_MODE_OFF || + ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.svm ) + p->extd.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.page1gb ) + p->extd.raw[0x19] = EMPTY_LEAF; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( cpu_has_arch_caps ) + p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + x86_cpu_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } +} + +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); + + /* Find some more clever allocation scheme if this trips. */ + BUILD_BUG_ON(sizeof(struct cpu_policy) > PAGE_SIZE); + + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 5eb5f18935..3f20c342fd 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -1,638 +1,14 @@ -#include -#include -#include #include -#include -#include +#include + +#include + #include #include -#include -#include -#include #include -#include -#include -#include #include -const uint32_t known_features[] = INIT_KNOWN_FEATURES; - -static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; -static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t __initconst hvm_hap_max_featuremask[] = - INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t __initconst hvm_shadow_def_featuremask[] = - INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t __initconst hvm_hap_def_featuremask[] = - INIT_HVM_HAP_DEF_FEATURES; -static const uint32_t deep_features[] = INIT_DEEP_FEATURES; - -static const struct feature_name { - const char *name; - unsigned int bit; -} feature_names[] __initconstrel = INIT_FEATURE_NAMES; - -/* - * Parse a list of cpuid feature names -> bool, calling the callback for any - * matches found. - * - * always_inline, because this is init code only and we really don't want a - * function pointer call in the middle of the loop. - */ -static int __init always_inline parse_cpuid( - const char *s, void (*callback)(unsigned int feat, bool val)) -{ - const char *ss; - int val, rc = 0; - - do { - const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; - const char *feat; - - ss = strchr(s, ','); - if ( !ss ) - ss = strchr(s, '\0'); - - /* Skip the 'no-' prefix for name comparisons. */ - feat = s; - if ( strncmp(s, "no-", 3) == 0 ) - feat += 3; - - /* (Re)initalise lhs and rhs for binary search. */ - lhs = feature_names; - rhs = feature_names + ARRAY_SIZE(feature_names); - - while ( lhs < rhs ) - { - int res; - - mid = lhs + (rhs - lhs) / 2; - res = cmdline_strcmp(feat, mid->name); - - if ( res < 0 ) - { - rhs = mid; - continue; - } - if ( res > 0 ) - { - lhs = mid + 1; - continue; - } - - if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) - { - callback(mid->bit, val); - mid = NULL; - } - - break; - } - - /* - * Mid being NULL means that the name and boolean were successfully - * identified. Everything else is an error. - */ - if ( mid ) - rc = -EINVAL; - - s = ss + 1; - } while ( *ss ); - - return rc; -} - -static void __init cf_check _parse_xen_cpuid(unsigned int feat, bool val) -{ - if ( !val ) - setup_clear_cpu_cap(feat); - else if ( feat == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); -} - -static int __init cf_check parse_xen_cpuid(const char *s) -{ - return parse_cpuid(s, _parse_xen_cpuid); -} -custom_param("cpuid", parse_xen_cpuid); - -static bool __initdata dom0_cpuid_cmdline; -static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; -static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; - -static void __init cf_check _parse_dom0_cpuid(unsigned int feat, bool val) -{ - __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); - __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); -} - -static int __init cf_check parse_dom0_cpuid(const char *s) -{ - dom0_cpuid_cmdline = true; - - return parse_cpuid(s, _parse_dom0_cpuid); -} -custom_param("dom0-cpuid", parse_dom0_cpuid); - #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void zero_leaves(struct cpuid_leaf *l, - unsigned int first, unsigned int last) -{ - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); -} - -static void sanitise_featureset(uint32_t *fs) -{ - /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ - uint32_t disabled_features[ - ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; - unsigned int i; - - for ( i = 0; i < FSCAPINTS; ++i ) - { - /* Clamp to known mask. */ - fs[i] &= known_features[i]; - - /* - * Identify which features with deep dependencies have been - * disabled. - */ - disabled_features[i] = ~fs[i] & deep_features[i]; - } - - for_each_set_bit(i, (void *)disabled_features, - sizeof(disabled_features) * 8) - { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); - unsigned int j; - - ASSERT(dfs); /* deep_features[] should guarentee this. */ - - for ( j = 0; j < FSCAPINTS; ++j ) - { - fs[j] &= ~dfs[j]; - disabled_features[j] &= ~dfs[j]; - } - } -} - -static void recalculate_xstate(struct cpuid_policy *p) -{ - uint64_t xstates = XSTATE_FP_SSE; - uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; - unsigned int i, Da1 = p->xstate.Da1; - - /* - * The Da1 leaf is the only piece of information preserved in the common - * case. Everything else is derived from other feature state. - */ - memset(&p->xstate, 0, sizeof(p->xstate)); - - if ( !p->basic.xsave ) - return; - - if ( p->basic.avx ) - { - xstates |= X86_XCR0_YMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_YMM_POS] + - xstate_sizes[X86_XCR0_YMM_POS]); - } - - if ( p->feat.mpx ) - { - xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_BNDCSR_POS] + - xstate_sizes[X86_XCR0_BNDCSR_POS]); - } - - if ( p->feat.avx512f ) - { - xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_HI_ZMM_POS] + - xstate_sizes[X86_XCR0_HI_ZMM_POS]); - } - - if ( p->feat.pku ) - { - xstates |= X86_XCR0_PKRU; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_PKRU_POS] + - xstate_sizes[X86_XCR0_PKRU_POS]); - } - - p->xstate.max_size = xstate_size; - p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; - p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; - - p->xstate.Da1 = Da1; - if ( p->xstate.xsaves ) - { - p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; - p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; - } - else - xstates &= ~XSTATE_XSAVES_ONLY; - - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) - { - uint64_t curr_xstate = 1ul << i; - - if ( !(xstates & curr_xstate) ) - continue; - - p->xstate.comp[i].size = xstate_sizes[i]; - p->xstate.comp[i].offset = xstate_offsets[i]; - p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; - p->xstate.comp[i].align = curr_xstate & xstate_align; - } -} - -/* - * Misc adjustments to the policy. Mostly clobbering reserved fields and - * duplicating shared fields. Intentionally hidden fields are annotated. - */ -static void recalculate_misc(struct cpuid_policy *p) -{ - p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ - p->basic.apic_id = 0; /* Dynamic. */ - - p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ - p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ - - p->basic.raw[0x8] = EMPTY_LEAF; - - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - - p->basic.raw[0xc] = EMPTY_LEAF; - - p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; - - /* Most of Power/RAS hidden from guests. */ - p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; - - p->extd.raw[0x8].d = 0; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ - p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ - p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ - - p->extd.vendor_ebx = 0; - p->extd.vendor_ecx = 0; - p->extd.vendor_edx = 0; - - p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; - - p->extd.raw[0x5] = EMPTY_LEAF; - p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; - - p->extd.raw[0x8].a &= 0x0000ffff; - p->extd.raw[0x8].c = 0; - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - zero_leaves(p->basic.raw, 0x2, 0x3); - memset(p->cache.raw, 0, sizeof(p->cache.raw)); - zero_leaves(p->basic.raw, 0x9, 0xa); - - p->extd.vendor_ebx = p->basic.vendor_ebx; - p->extd.vendor_ecx = p->basic.vendor_ecx; - p->extd.vendor_edx = p->basic.vendor_edx; - - p->extd.raw_fms = p->basic.raw_fms; - p->extd.raw[0x1].b &= 0xff00ffff; - p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; - - p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ - p->extd.raw[0x8].c &= 0x0003f0ff; - - p->extd.raw[0x9] = EMPTY_LEAF; - - zero_leaves(p->extd.raw, 0xb, 0x18); - - /* 0x19 - TLB details. Pass through. */ - /* 0x1a - Perf hints. Pass through. */ - - p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ - p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ - p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ - p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ - p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ - p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ - break; - } -} - -static void __init calculate_raw_policy(void) -{ - struct cpuid_policy *p = &raw_cpu_policy; - - x86_cpuid_policy_fill_native(p); - - /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ - ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); -} - -static void __init calculate_host_policy(void) -{ - struct cpuid_policy *p = &host_cpu_policy; - unsigned int max_extd_leaf; - - *p = raw_cpu_policy; - - p->basic.max_leaf = - min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); - p->feat.max_subleaf = - min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); - - max_extd_leaf = p->extd.max_leaf; - - /* - * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be - * dispatch serialising for Spectre mitigations. Extend max_extd_leaf - * beyond what hardware supports, to include the feature leaf containing - * this information. - */ - if ( cpu_has_lfence_dispatch ) - max_extd_leaf = max(max_extd_leaf, 0x80000021); - - p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, - ARRAY_SIZE(p->extd.raw) - 1); - - x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); - recalculate_xstate(p); - recalculate_misc(p); - - /* When vPMU is disabled, drop it from the host policy. */ - if ( vpmu_mode == XENPMU_MODE_OFF ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( p->extd.svm ) - { - /* Clamp to implemented features which require hardware support. */ - p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | - (1u << SVM_FEATURE_LBRV) | - (1u << SVM_FEATURE_NRIPS) | - (1u << SVM_FEATURE_PAUSEFILTER) | - (1u << SVM_FEATURE_DECODEASSISTS)); - /* Enable features which are always emulated. */ - p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | - (1u << SVM_FEATURE_TSCRATEMSR)); - } -} - -static void __init guest_common_default_feature_adjustments(uint32_t *fs) -{ - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); - - /* - * On certain hardware, speculative or errata workarounds can result in - * TSX being placed in "force-abort" mode, where it doesn't actually - * function as expected, but is technically compatible with the ISA. - * - * Do not advertise RTM to guests by default if it won't actually work. - */ - if ( rtm_disabled ) - __clear_bit(X86_FEATURE_RTM, fs); -} - -static void __init guest_common_feature_adjustments(uint32_t *fs) -{ - /* Unconditionally claim to be able to set the hypervisor bit. */ - __set_bit(X86_FEATURE_HYPERVISOR, fs); - - /* - * If IBRS is offered to the guest, unconditionally offer STIBP. It is a - * nop on non-HT hardware, and has this behaviour to make heterogeneous - * setups easier to manage. - */ - if ( test_bit(X86_FEATURE_IBRSB, fs) ) - __set_bit(X86_FEATURE_STIBP, fs); - if ( test_bit(X86_FEATURE_IBRS, fs) ) - __set_bit(X86_FEATURE_AMD_STIBP, fs); - - /* - * On hardware which supports IBRS/IBPB, we can offer IBPB independently - * of IBRS by using the AMD feature bit. An administrator may wish for - * performance reasons to offer IBPB without IBRS. - */ - if ( host_cpu_policy.feat.ibrsb ) - __set_bit(X86_FEATURE_IBPB, fs); -} - -static void __init calculate_pv_max_policy(void) -{ - struct cpuid_policy *p = &pv_max_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_max_featuremask[i]; - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) - { - __clear_bit(X86_FEATURE_IBRSB, pv_featureset); - __clear_bit(X86_FEATURE_IBRS, pv_featureset); - } - - guest_common_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); - - p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct cpuid_policy *p = &pv_def_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = pv_max_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_def_featuremask[i]; - - guest_common_feature_adjustments(pv_featureset); - guest_common_default_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_max_policy(void) -{ - struct cpuid_policy *p = &hvm_max_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_max_featuremask : hvm_shadow_max_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - /* - * Xen can provide an (x2)APIC emulation to HVM guests even if the host's - * (x2)APIC isn't enabled. - */ - __set_bit(X86_FEATURE_APIC, hvm_featureset); - __set_bit(X86_FEATURE_X2APIC, hvm_featureset); - - /* - * We don't support EFER.LMSLE at all. AMD has dropped the feature from - * hardware and allocated a CPUID bit to indicate its absence. - */ - __set_bit(X86_FEATURE_NO_LMSL, hvm_featureset); - - /* - * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in - * long mode (and init_amd() has cleared it out of host capabilities), but - * HVM guests are able if running in protected mode. - */ - if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpu_policy.basic.sep ) - __set_bit(X86_FEATURE_SEP, hvm_featureset); - - /* - * VIRT_SSBD is exposed in the default policy as a result of - * amd_virt_spec_ctrl being set, it also needs exposing in the max policy. - */ - if ( amd_virt_spec_ctrl ) - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) - { - __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); - __clear_bit(X86_FEATURE_IBRS, hvm_featureset); - } - else if ( boot_cpu_has(X86_FEATURE_AMD_SSBD) ) - /* - * If SPEC_CTRL.SSBD is available VIRT_SPEC_CTRL.SSBD can be exposed - * and implemented using the former. Expose in the max policy only as - * the preference is for guests to use SPEC_CTRL.SSBD if available. - */ - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - /* - * With VT-x, some features are only supported by Xen if dedicated - * hardware support is also available. - */ - if ( cpu_has_vmx ) - { - if ( !cpu_has_vmx_mpx ) - __clear_bit(X86_FEATURE_MPX, hvm_featureset); - - if ( !cpu_has_vmx_xsaves ) - __clear_bit(X86_FEATURE_XSAVES, hvm_featureset); - } - - /* - * Xen doesn't use PKS, so the guest support for it has opted to not use - * the VMCS load/save controls for efficiency reasons. This depends on - * the exact vmentry/exit behaviour, so don't expose PKS in other - * situations until someone has cross-checked the behaviour for safety. - */ - if ( !cpu_has_vmx ) - __clear_bit(X86_FEATURE_PKS, hvm_featureset); - - guest_common_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_def_policy(void) -{ - struct cpuid_policy *p = &hvm_def_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = hvm_max_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_def_featuremask : hvm_shadow_def_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - guest_common_feature_adjustments(hvm_featureset); - guest_common_default_feature_adjustments(hvm_featureset); - - /* - * Only expose VIRT_SSBD if AMD_SSBD is not available, and thus - * amd_virt_spec_ctrl is set. - */ - if ( amd_virt_spec_ctrl ) - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -void __init init_guest_cpuid(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} bool recheck_cpu_features(unsigned int cpu) { @@ -656,170 +32,6 @@ bool recheck_cpu_features(unsigned int cpu) return okay; } -void recalculate_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; - unsigned int i; - - if ( !max ) - { - ASSERT_UNREACHABLE(); - return; - } - - p->x86_vendor = x86_cpuid_lookup_vendor( - p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); - - p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); - p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); - p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) - ? CPUID_GUEST_NR_EXTD_AMD - : CPUID_GUEST_NR_EXTD_INTEL) - 1); - - x86_cpu_policy_to_featureset(p, fs); - x86_cpu_policy_to_featureset(max, max_fs); - - if ( is_hvm_domain(d) ) - { - /* - * HVM domains using Shadow paging have further restrictions on their - * available paging features. - */ - if ( !hap_enabled(d) ) - { - for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) - max_fs[i] &= hvm_shadow_max_featuremask[i]; - } - - /* Hide nested-virt if it hasn't been explicitly configured. */ - if ( !nestedhvm_enabled(d) ) - { - __clear_bit(X86_FEATURE_VMX, max_fs); - __clear_bit(X86_FEATURE_SVM, max_fs); - } - } - - /* - * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits - * affect how to interpret topology information in other cpuid leaves. - */ - __set_bit(X86_FEATURE_HTT, max_fs); - __set_bit(X86_FEATURE_X2APIC, max_fs); - __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); - - /* - * 32bit PV domains can't use any Long Mode features, and cannot use - * SYSCALL on non-AMD hardware. - */ - if ( is_pv_32bit_domain(d) ) - { - __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - __clear_bit(X86_FEATURE_SYSCALL, max_fs); - } - - /* Clamp the toolstacks choices to reality. */ - for ( i = 0; i < ARRAY_SIZE(fs); i++ ) - fs[i] &= max_fs[i]; - - if ( p->basic.max_leaf < XSTATE_CPUID ) - __clear_bit(X86_FEATURE_XSAVE, fs); - - sanitise_featureset(fs); - - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & - (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - - x86_cpu_featureset_to_policy(fs, p); - - /* Pass host cacheline size through to guests. */ - p->basic.clflush_size = max->basic.clflush_size; - - p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); - p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, - paging_max_paddr_bits(d)); - p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, - (p->basic.pae || p->basic.pse36) ? 36 : 32); - - p->extd.maxlinaddr = p->extd.lm ? 48 : 32; - - recalculate_xstate(p); - recalculate_misc(p); - - for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) - { - if ( p->cache.subleaf[i].type >= 1 && - p->cache.subleaf[i].type <= 3 ) - { - /* Subleaf has a valid cache type. Zero reserved fields. */ - p->cache.raw[i].a &= 0xffffc3ffu; - p->cache.raw[i].d &= 0x00000007u; - } - else - { - /* Subleaf is not valid. Zero the rest of the union. */ - zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); - break; - } - } - - if ( vpmu_mode == XENPMU_MODE_OFF || - ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.svm ) - p->extd.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.page1gb ) - p->extd.raw[0x19] = EMPTY_LEAF; -} - -void __init init_dom0_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - - /* dom0 can't migrate. Give it ITSC if available. */ - if ( cpu_has_itsc ) - p->extd.itsc = true; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( cpu_has_arch_caps ) - p->feat.arch_caps = true; - - /* Apply dom0-cpuid= command line settings, if provided. */ - if ( dom0_cpuid_cmdline ) - { - uint32_t fs[FSCAPINTS]; - unsigned int i; - - x86_cpu_policy_to_featureset(p, fs); - - for ( i = 0; i < ARRAY_SIZE(fs); ++i ) - { - fs[i] |= dom0_enable_feat [i]; - fs[i] &= ~dom0_disable_feat[i]; - } - - x86_cpu_featureset_to_policy(fs, p); - - recalculate_cpuid_policy(d); - } -} - void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { @@ -1190,27 +402,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, } } -static void __init __maybe_unused build_assertions(void) -{ - BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); - - /* Find some more clever allocation scheme if this trips. */ - BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - - BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != - sizeof(raw_cpu_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != - sizeof(raw_cpu_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != - sizeof(raw_cpu_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != - sizeof(raw_cpu_policy.extd.raw)); -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index d326fa1c01..675c523d99 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -77,7 +77,6 @@ #include #include #include -#include #include diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index 13e2a1f86d..b361537a60 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -18,4 +18,10 @@ void init_guest_cpu_policies(void); /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + +/* Clamp the CPUID policy to reality. */ +void recalculate_cpuid_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 7f81b998ce..b32ba0bbfe 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -8,14 +8,10 @@ #include #include -#include - #include extern const uint32_t known_features[FSCAPINTS]; -void init_guest_cpuid(void); - /* * Expected levelling capabilities (given cpuid vendor/family information), * and levelling capabilities actually available (given MSR probing). @@ -49,13 +45,8 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Apply dom0-specific tweaks to the CPUID policy. */ -void init_dom0_cpuid_policy(struct domain *d); - -/* Clamp the CPUID policy to reality. */ -void recalculate_cpuid_policy(struct domain *d); - struct vcpu; +struct cpuid_leaf; void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res); diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index f94f28c8e2..95492715d8 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 51a19b9019..08ade715a3 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -51,7 +51,6 @@ #include #include #include -#include #include #include #include @@ -1991,7 +1990,6 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !tboot_protect_mem_regions() ) panic("Could not protect TXT memory regions\n"); - init_guest_cpuid(); init_guest_cpu_policies(); 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/emul: Switch x86_emulate_ctxt to cpu_policy Message-Id: Date: Thu, 06 Apr 2023 19:45:53 +0000 commit 441b1b2a50ea3656954d75e06d42c96d619ea0fc Author: Andrew Cooper AuthorDate: Mon Apr 3 20:03:57 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86/emul: Switch x86_emulate_ctxt to cpu_policy As with struct domain, retain cpuid as a valid alias for local code clarity. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 2 +- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/hvm/emulate.c | 4 ++-- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 2 +- xen/arch/x86/x86_emulate/private.h | 4 ++-- xen/arch/x86/x86_emulate/x86_emulate.h | 7 +++++-- 9 files changed, 15 insertions(+), 12 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 966e46bee1..4885a68210 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -893,7 +893,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpuid = &cp, + .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 3e30ec51fe..55a1394e14 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -909,7 +909,7 @@ int main(int argc, char **argv) ctxt.regs = ®s; ctxt.force_writeback = 0; - ctxt.cpuid = &cp; + ctxt.cpu_policy = &cp; ctxt.lma = sizeof(void *) == 8; ctxt.addr_size = 8 * sizeof(void *); ctxt.sp_size = 8 * sizeof(void *); diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index f6ee094397..2692404df9 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -25,7 +25,7 @@ #endif uint32_t mxcsr_mask = 0x0000ffbf; -struct cpuid_policy cp; +struct cpu_policy cp; static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); static bool use_xsave; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 95364deb19..5691725d6c 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2771,7 +2771,7 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla) void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { - struct hvm_emulate_ctxt ctx = {{ 0 }}; + struct hvm_emulate_ctxt ctx = {}; int rc; hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); @@ -2846,7 +2846,7 @@ void hvm_emulate_init_once( hvmemul_ctxt->validate = validate; hvmemul_ctxt->ctxt.regs = regs; - hvmemul_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; } diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index e2ee1c7705..cc84af0192 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -319,7 +319,7 @@ const struct x86_emulate_ops *shadow_init_emulation( memset(sh_ctxt, 0, sizeof(*sh_ctxt)); sh_ctxt->ctxt.regs = regs; - sh_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + sh_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; sh_ctxt->ctxt.lma = hvm_long_mode_active(curr); /* Segment cache initialisation. Primed with CS. */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 5da00e24e4..ab52768271 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1327,7 +1327,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpuid = currd->arch.cpuid, + .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 5963f5ee2d..0d02c7d2ab 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -356,7 +356,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpuid = currd->arch.cpuid, + .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 653a298c70..8dee019731 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -505,7 +505,7 @@ in_protmode( }) static inline bool -_amd_like(const struct cpuid_policy *cp) +_amd_like(const struct cpu_policy *cp) { return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } @@ -513,7 +513,7 @@ _amd_like(const struct cpuid_policy *cp) static inline bool amd_like(const struct x86_emulate_ctxt *ctxt) { - return _amd_like(ctxt->cpuid); + return _amd_like(ctxt->cpu_policy); } #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 75015104fb..0139d16da7 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -565,8 +565,11 @@ struct x86_emulate_ctxt * Input-only state: */ - /* CPUID Policy for the domain. */ - const struct cpuid_policy *cpuid; + /* CPU policy for the domain. Allow aliases for local code clarity. */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + }; /* Set this if writes may have side effects. */ bool force_writeback; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518969.806046 (Exim 4.92) (envelope-from ) id 1pkVYb-0004V0-FU; Thu, 06 Apr 2023 19:46:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518969.806046; Thu, 06 Apr 2023 19:46:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYb-0004Us-CD; Thu, 06 Apr 2023 19:46:05 +0000 Received: by outflank-mailman (input) for mailman id 518969; Thu, 06 Apr 2023 19:46:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYZ-0004UV-NF for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYZ-0004eu-ME for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVYZ-0008Cn-KP for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=h4N9oJtpp3CacD08wcpBQ3r78QTwtGEfJNKV0t+7jKQ=; b=W+1fRfhal57OLhP8JkK0GE35Wm 9eqouWJxN34cYVYDFPzTMBPYFMMuxkDAah2NCeoIPXXUUHNpjWfG71UITo9Z3oA/JA8w1AnMXKdff LZso9/JGES/UygTZWnjMbvRjRW8FX/bAqakTez0edmyyvjM8z+KLymvWln+9B2kFrBok=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/fuzz: Rework afl-policy-fuzzer Message-Id: Date: Thu, 06 Apr 2023 19:46:03 +0000 commit a16dcd48c2db3f6820a15ea482551d289bd9cdec Author: Andrew Cooper AuthorDate: Mon Apr 3 17:14:14 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 tools/fuzz: Rework afl-policy-fuzzer With cpuid_policy and msr_policy merged to form cpu_policy, merge the respective fuzzing logic. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 57 +++++++++++-------------------- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 0ce3d8e166..466bdbb1d9 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -16,16 +16,19 @@ static bool debug; #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void check_cpuid(struct cpuid_policy *cp) +static void check_policy(struct cpu_policy *cp) { - struct cpuid_policy new = {}; + struct cpu_policy new = {}; size_t data_end; xen_cpuid_leaf_t *leaves = malloc(CPUID_MAX_SERIALISED_LEAVES * sizeof(xen_cpuid_leaf_t)); - unsigned int nr = CPUID_MAX_SERIALISED_LEAVES; + xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * + sizeof(xen_cpuid_leaf_t)); + unsigned int nr_leaves = CPUID_MAX_SERIALISED_LEAVES; + unsigned int nr_msrs = MSR_MAX_SERIALISED_ENTRIES; int rc; - if ( !leaves ) + if ( !leaves || !msrs ) return; /* @@ -49,12 +52,19 @@ static void check_cpuid(struct cpuid_policy *cp) x86_cpuid_policy_recalc_synth(cp); /* Serialise... */ - rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr); + rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); + assert(rc == 0); + assert(nr_leaves <= CPUID_MAX_SERIALISED_LEAVES); + + rc = x86_msr_copy_to_buffer(cp, msrs, &nr_msrs); assert(rc == 0); - assert(nr <= CPUID_MAX_SERIALISED_LEAVES); + assert(nr_msrs <= MSR_MAX_SERIALISED_ENTRIES); /* ... and deserialise. */ - rc = x86_cpuid_copy_from_buffer(&new, leaves, nr, NULL, NULL); + rc = x86_cpuid_copy_from_buffer(&new, leaves, nr_leaves, NULL, NULL); + assert(rc == 0); + + rc = x86_msr_copy_from_buffer(&new, msrs, nr_msrs, NULL); assert(rc == 0); /* The result after serialisation/deserialisaion should be identical... */ @@ -76,28 +86,6 @@ static void check_cpuid(struct cpuid_policy *cp) free(leaves); } -static void check_msr(struct msr_policy *mp) -{ - struct msr_policy new = {}; - xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * - sizeof(xen_msr_entry_t)); - unsigned int nr = MSR_MAX_SERIALISED_ENTRIES; - int rc; - - if ( !msrs ) - return; - - rc = x86_msr_copy_to_buffer(mp, msrs, &nr); - assert(rc == 0); - assert(nr <= MSR_MAX_SERIALISED_ENTRIES); - - rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); - assert(rc == 0); - assert(memcmp(mp, &new, sizeof(*mp)) == 0); - - free(msrs); -} - int main(int argc, char **argv) { FILE *fp = NULL; @@ -144,8 +132,7 @@ int main(int argc, char **argv) while ( __AFL_LOOP(1000) ) #endif { - struct cpuid_policy *cp = NULL; - struct msr_policy *mp = NULL; + struct cpu_policy *cp = NULL; if ( fp != stdin ) { @@ -160,22 +147,18 @@ int main(int argc, char **argv) } cp = calloc(1, sizeof(*cp)); - mp = calloc(1, sizeof(*mp)); - if ( !cp || !mp ) + if ( !cp ) goto skip; fread(cp, sizeof(*cp), 1, fp); - fread(mp, sizeof(*mp), 1, fp); if ( !feof(fp) ) goto skip; - check_cpuid(cp); - check_msr(mp); + check_policy(cp); skip: free(cp); - free(mp); if ( fp != stdin ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518970.806050 (Exim 4.92) (envelope-from ) id 1pkVYl-0004Xq-HG; Thu, 06 Apr 2023 19:46:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518970.806050; Thu, 06 Apr 2023 19:46:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYl-0004Xg-E3; Thu, 06 Apr 2023 19:46:15 +0000 Received: by outflank-mailman (input) for mailman id 518970; Thu, 06 Apr 2023 19:46:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYj-0004XO-Qy for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libx86: Update library API for cpu_policy Message-Id: Date: Thu, 06 Apr 2023 19:46:13 +0000 commit 1b67fccf3b02825f6a036bad06cd17963d0972d2 Author: Andrew Cooper AuthorDate: Mon Apr 3 14:18:43 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 libx86: Update library API for cpu_policy Adjust the API and comments appropriately. x86_cpu_policy_fill_native() will eventually contain MSR reads, but leave a TODO in the short term. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 4 +-- tools/tests/cpu-policy/test-cpu-policy.c | 4 +-- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/cpu-policy.c | 4 +-- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/xstate.c | 4 +-- xen/include/xen/lib/x86/cpu-policy.h | 49 ++++++++++++++++++------------- xen/lib/x86/cpuid.c | 26 ++++++++-------- xen/lib/x86/msr.c | 4 +-- 10 files changed, 55 insertions(+), 46 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 466bdbb1d9..7d8467b4b2 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -48,8 +48,8 @@ static void check_policy(struct cpu_policy *cp) * Fix up the data in the source policy which isn't expected to survive * serialisation. */ - x86_cpuid_policy_clear_out_of_range_leaves(cp); - x86_cpuid_policy_recalc_synth(cp); + x86_cpu_policy_clear_out_of_range_leaves(cp); + x86_cpu_policy_recalc_synth(cp); /* Serialise... */ rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index a4ca07f339..f1d968adfc 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -105,7 +105,7 @@ static void test_cpuid_current(void) printf("Testing CPUID on current CPU\n"); - x86_cpuid_policy_fill_native(&p); + x86_cpu_policy_fill_native(&p); rc = x86_cpuid_copy_to_buffer(&p, leaves, &nr); if ( rc != 0 ) @@ -554,7 +554,7 @@ static void test_cpuid_out_of_range_clearing(void) void *ptr; unsigned int nr_markers; - x86_cpuid_policy_clear_out_of_range_leaves(p); + x86_cpu_policy_clear_out_of_range_leaves(p); /* Count the number of 0xc2's still remaining. */ for ( ptr = p, nr_markers = 0; diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 2692404df9..7d2d57f759 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -75,7 +75,7 @@ bool emul_test_init(void) unsigned long sp; - x86_cpuid_policy_fill_native(&cp); + x86_cpu_policy_fill_native(&cp); /* * The emulator doesn't use these instructions, so can always emulate diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 83186e940c..a58bf6cad5 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -176,7 +176,7 @@ static void sanitise_featureset(uint32_t *fs) for_each_set_bit(i, (void *)disabled_features, sizeof(disabled_features) * 8) { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + const uint32_t *dfs = x86_cpu_policy_lookup_deep_deps(i); unsigned int j; ASSERT(dfs); /* deep_features[] should guarentee this. */ @@ -347,7 +347,7 @@ static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; - x86_cpuid_policy_fill_native(p); + x86_cpu_policy_fill_native(p); /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index f11dcda57a..edc4db1335 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -75,7 +75,7 @@ void __init setup_clear_cpu_cap(unsigned int cap) __builtin_return_address(0), cap); __clear_bit(cap, boot_cpu_data.x86_capability); - dfs = x86_cpuid_lookup_deep_deps(cap); + dfs = x86_cpu_policy_lookup_deep_deps(cap); if (!dfs) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index c025285941..1a8b4cff48 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -66,7 +66,7 @@ static int update_domain_cpu_policy(struct domain *d, goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new); + x86_cpu_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ ret = x86_cpu_policies_are_compatible(sys, new, &err); diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index d481e1db3e..92496f3795 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -684,7 +684,7 @@ void xstate_init(struct cpuinfo_x86 *c) int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr) { - uint64_t xcr0_max = cpuid_policy_xcr0_max(d->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(d->arch.cpuid); unsigned int i; if ( (hdr->xstate_bv & ~xcr0_accum) || @@ -708,7 +708,7 @@ int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, int handle_xsetbv(u32 index, u64 new_bv) { struct vcpu *curr = current; - uint64_t xcr0_max = cpuid_policy_xcr0_max(curr->domain->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(curr->domain->arch.cpuid); u64 mask; if ( index != XCR_XFEATURE_ENABLED_MASK ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 57b4633c86..cf7de0f29c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -399,33 +399,38 @@ void x86_cpu_policy_to_featureset(const struct cpu_policy *p, void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p); -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xcr0_max(const struct cpu_policy *p) { return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; } -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xstates(const struct cpu_policy *p) { uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); +/** + * For a specific feature, look up the dependent features. Returns NULL if + * this feature has no dependencies. Otherwise return a featureset of + * dependent features, which has been recursively flattened. + */ +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature); /** - * Recalculate the content in a CPUID policy which is derived from raw data. + * Recalculate the content in a CPU policy which is derived from raw data. */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); +void x86_cpu_policy_recalc_synth(struct cpu_policy *p); /** - * Fill a CPUID policy using the native CPUID instruction. + * Fill CPU policy using the native CPUID/RDMSR instruction. * * No sanitisation is performed, but synthesised values are calculated. * Values may be influenced by a hypervisor or from masking/faulting * configuration. */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); +void x86_cpu_policy_fill_native(struct cpu_policy *p); /** * Clear leaf data beyond the policies max leaf/subleaf settings. @@ -436,7 +441,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p); * with out-of-range leaves with stale content in them. This helper clears * them. */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p); #ifdef __XEN__ #include @@ -449,9 +454,10 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** - * Serialise a cpuid_policy object into an array of cpuid leaves. + * Serialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to serialise. + * @param policy The cpu_policy to serialise. * @param leaves The array of leaves to serialise into. * @param nr_entries The number of entries in 'leaves'. * @returns -errno @@ -460,13 +466,14 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; * leaves array is too short. On success, nr_entries is updated with the * actual number of leaves written. */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *policy, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); /** - * Unserialise a cpuid_policy object from an array of cpuid leaves. + * Unserialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to unserialise into. + * @param policy The cpu_policy to unserialise into. * @param leaves The array of leaves to unserialise from. * @param nr_entries The number of entries in 'leaves'. * @param err_leaf Optional hint for error diagnostics. @@ -474,21 +481,21 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, * @returns -errno * * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional + * incoming leaf is out of range of cpu_policy, in which case the optional * err_* pointers will identify the out-of-range indicies. * * No content validation of in-range leaves is performed. Synthesised data is * recalculated. */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, +int x86_cpuid_copy_from_buffer(struct cpu_policy *policy, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); /** - * Serialise an msr_policy object into an array. + * Serialise the MSRs of a cpu_policy object into an array. * - * @param policy The msr_policy to serialise. + * @param policy The cpu_policy to serialise. * @param msrs The array of msrs to serialise into. * @param nr_entries The number of entries in 'msrs'. * @returns -errno @@ -497,13 +504,13 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, * buffer array is too short. On success, nr_entries is updated with the * actual number of msrs written. */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, +int x86_msr_copy_to_buffer(const struct cpu_policy *policy, msr_entry_buffer_t msrs, uint32_t *nr_entries); /** - * Unserialise an msr_policy object from an array of msrs. + * Unserialise the MSRs of a cpu_policy object from an array of msrs. * - * @param policy The msr_policy object to unserialise into. + * @param policy The cpu_policy object to unserialise into. * @param msrs The array of msrs to unserialise from. * @param nr_entries The number of entries in 'msrs'. * @param err_msr Optional hint for error diagnostics. @@ -517,7 +524,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *policy, * * No content validation is performed on the data stored in the policy object. */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, +int x86_msr_copy_from_buffer(struct cpu_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 734e90823a..68aafb4049 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -102,13 +102,13 @@ void x86_cpu_featureset_to_policy( p->feat._7d1 = fs[FEATURESET_7d1]; } -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) +void x86_cpu_policy_recalc_synth(struct cpu_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); } -void x86_cpuid_policy_fill_native(struct cpuid_policy *p) +void x86_cpu_policy_fill_native(struct cpu_policy *p) { unsigned int i; @@ -199,7 +199,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]); cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]); - xstates = cpuid_policy_xstates(p); + xstates = cpu_policy_xstates(p); /* This logic will probably need adjusting when XCR0[63] gets used. */ BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); @@ -222,10 +222,12 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - x86_cpuid_policy_recalc_synth(p); + /* TODO MSRs */ + + x86_cpu_policy_recalc_synth(p); } -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p) { unsigned int i; @@ -260,7 +262,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) zero_leaves(p->topo.raw, i, ARRAY_SIZE(p->topo.raw) - 1); } - if ( p->basic.max_leaf < 0xd || !cpuid_policy_xstates(p) ) + if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); else { @@ -268,7 +270,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); /* First two leaves always valid. Rest depend on xstates. */ - i = max(2, 64 - __builtin_clzll(cpuid_policy_xstates(p))); + i = max(2, 64 - __builtin_clzll(cpu_policy_xstates(p))); zero_leaves(p->xstate.raw, i, ARRAY_SIZE(p->xstate.raw) - 1); @@ -278,7 +280,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) ARRAY_SIZE(p->extd.raw) - 1); } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature) +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature) { static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static const struct { @@ -333,7 +335,7 @@ static int copy_leaf_to_buffer(uint32_t leaf, uint32_t subleaf, return 0; } -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -383,7 +385,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, case 0xd: { - uint64_t xstates = cpuid_policy_xstates(p); + uint64_t xstates = cpu_policy_xstates(p); COPY_LEAF(leaf, 0, &p->xstate.raw[0]); COPY_LEAF(leaf, 1, &p->xstate.raw[1]); @@ -419,7 +421,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, return 0; } -int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, +int x86_cpuid_copy_from_buffer(struct cpu_policy *p, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf) @@ -522,7 +524,7 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, } } - x86_cpuid_policy_recalc_synth(p); + x86_cpu_policy_recalc_synth(p); return 0; diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index c4d885e7b5..e04b9ca013 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -23,7 +23,7 @@ static int copy_msr_to_buffer(uint32_t idx, uint64_t val, return 0; } -int x86_msr_copy_to_buffer(const struct msr_policy *p, +int x86_msr_copy_to_buffer(const struct cpu_policy *p, msr_entry_buffer_t msrs, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -48,7 +48,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p, return 0; } -int x86_msr_copy_from_buffer(struct msr_policy *p, +int x86_msr_copy_from_buffer(struct cpu_policy *p, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518971.806054 (Exim 4.92) (envelope-from ) id 1pkVYv-0004ai-KT; Thu, 06 Apr 2023 19:46:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518971.806054; Thu, 06 Apr 2023 19:46:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYv-0004ab-Ho; Thu, 06 Apr 2023 19:46:25 +0000 Received: by outflank-mailman (input) for mailman id 518971; Thu, 06 Apr 2023 19:46:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYu-0004aP-02 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVYt-0004fV-VA for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVYt-0008Dh-UB for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I6qWJOmllos4sDMi0OYcSAIWYbYJ3efwzRAy9zGk3ik=; b=6mvSAfwY5G8zON56fn9UJCy55A mEJebSUYgqQdPjcksgvxmnAkFcWuBuch4glPmTSsLJlK/NXSJA3cb5vwYL00vcU4QoJ0wcP0mYzM3 HF/Z+AWY9xt++KRn0mrdnoszldjmOUGNrWR7I1pJgQ/ALbB3S7sXoJgnDV8gu3SRiLck=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Remove temporary {cpuid,msr}_policy defines Message-Id: Date: Thu, 06 Apr 2023 19:46:23 +0000 commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce Author: Andrew Cooper AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 11:47:08 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 8 ++++---- xen/arch/x86/include/asm/msr.h | 2 +- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 14 files changed, 26 insertions(+), 32 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 301533722d..2f23f02923 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -1008,7 +1008,7 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 3f20c342fd..f311372cdf 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -36,7 +36,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b23e5014d1..91f57e3a3b 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -283,7 +283,7 @@ void update_guest_memory_policy(struct vcpu *v, void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 675c523d99..7020fdce99 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -924,7 +924,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -961,7 +961,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe, cet; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 02563e4b70..b8fe759db4 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -583,7 +583,7 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index dc93b5e930..f4f5ffc673 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1083,7 +1083,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index e055885058..ee4c41628c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -710,7 +710,7 @@ static void vmx_restore_host_msrs(void) static void vmx_save_guest_msrs(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; /* @@ -731,7 +731,7 @@ static void vmx_save_guest_msrs(struct vcpu *v) static void vmx_restore_guest_msrs(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; write_gs_shadow(v->arch.hvm.vmx.shadow_gs); @@ -784,7 +784,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void cf_check vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3521,7 +3521,7 @@ static int cf_check vmx_msr_write_intercept( unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 458841733e..1d8ea9f26f 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -290,7 +290,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 802fc60baf..2e16818bf5 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -54,8 +54,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -139,13 +138,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -326,7 +325,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -345,8 +344,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -387,7 +385,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -397,7 +395,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -409,7 +407,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -446,7 +444,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 95492715d8..5c92812dc6 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -146,7 +146,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index ab52768271..04416f1979 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -885,7 +885,7 @@ static int cf_check read_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false, warn = false; uint64_t tmp; int ret; @@ -1034,7 +1034,7 @@ static int cf_check write_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false; int ret; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index c36e3f855b..e4f8b158e1 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1036,7 +1036,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 5a0ec5900a..c69f7c65f5 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -848,7 +848,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518972.806058 (Exim 4.92) (envelope-from ) id 1pkVZ5-0004e5-MM; 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Thu, 06 Apr 2023 19:46:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eojkJTThxKBpEqIbeKiAC7+jKoEleJJYC7JWIQtjGFI=; b=dx/P0EzDrRl3T2r3C0Rp5sdJDN A5Eml2ls4aswuypGf1j4gFZkgX89GTDxgU/czT+tkAdYSExD68lhyBBVZ4mbSWxU/zbMq34Eu40jA ii2F39CruM6jfodV3IzMzxCopi9+0n363/GIlCYEWEaiTfMe+Wwlc5jTV/Y4v5JGfBaE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/libs/guest: Fix build following libx86 changes Message-Id: Date: Thu, 06 Apr 2023 19:46:34 +0000 commit 48d76e6da92f9ef76c8468e299349a2f698362fa Author: Andrew Cooper AuthorDate: Wed Apr 5 13:36:13 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 5 13:57:32 2023 +0100 tools/libs/guest: Fix build following libx86 changes I appear to have lost this hunk somewhere... Fixes: 1b67fccf3b02 ("libx86: Update library API for cpu_policy") Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné --- tools/libs/guest/xg_cpuid_x86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 33d366a8eb..bd16a87e48 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -555,7 +555,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *dfs; if ( !test_bit(b, disabled_features) || - !(dfs = x86_cpuid_lookup_deep_deps(b)) ) + !(dfs = x86_cpu_policy_lookup_deep_deps(b)) ) continue; for ( i = 0; i < ARRAY_SIZE(disabled_features); ++i ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518973.806063 (Exim 4.92) (envelope-from ) id 1pkVZF-0004gy-Ou; Thu, 06 Apr 2023 19:46:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518973.806063; Thu, 06 Apr 2023 19:46:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZF-0004gr-L1; Thu, 06 Apr 2023 19:46:45 +0000 Received: by outflank-mailman (input) for mailman id 518973; Thu, 06 Apr 2023 19:46:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZE-0004gf-6g for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZE-0004fk-5j for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVZE-0008F7-4s for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=S/ntbNS5WhVgKyCwd8hBgzj+PQBIxBq/IdzTpWhBG9Q=; b=DUUg1/gM+axKjA4rcZ7wW+lbQy BxCHaPuCGby2dk7SMOQIJyyT+1bWYdwtOWSOYUdHWlIq9KNB62d5auxKFaKPffguRKukb5ZzJfr6E KeVRAGk9L4XyaagojYs3/fUafErGauAm5tj43W3KuPtKDkwChpxdPvLzE0uh6awVC0wg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Revert "x86emul/test: drop bogus .PHONY" Message-Id: Date: Thu, 06 Apr 2023 19:46:44 +0000 commit 55c6d4e2257ca8aabb15232f696ede49642efa3c Author: Jan Beulich AuthorDate: Wed Apr 5 18:18:42 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 5 18:18:42 2023 +0200 Revert "x86emul/test: drop bogus .PHONY" This reverts commit 24c471b6f404ef24db8669d82ae67387067c097f. I wasn't thinking quite right; the line was added just recently, when the symlink-ed dir was converted to a real one. Thanks to Athony Perard for noticing the mistake. --- tools/tests/x86_emulator/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 4c453eaee6..4b1f75de05 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -278,6 +278,7 @@ else run32 clean32: %32: % endif +.PHONY: x86_emulate x86_emulate: mkdir -p $@ ln -sf $(XEN_ROOT)/xen/arch/x86/$@/*.[ch] $@/ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 06 19:46:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 06 Apr 2023 19:46:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.518974.806066 (Exim 4.92) (envelope-from ) id 1pkVZP-0004jP-Q5; Thu, 06 Apr 2023 19:46:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 518974.806066; Thu, 06 Apr 2023 19:46:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZP-0004jI-Mp; Thu, 06 Apr 2023 19:46:55 +0000 Received: by outflank-mailman (input) for mailman id 518974; Thu, 06 Apr 2023 19:46:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZO-0004jA-Cw for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkVZO-0004fp-Bw for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkVZO-0008Fv-B0 for xen-changelog@lists.xenproject.org; Thu, 06 Apr 2023 19:46:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qtulVcjH7ueeIhJGsmedhZpu0WP+HjndnZneKVTZkQE=; b=F0M+isjaIfp8AdZ8caNjdMIGBp tXwxu9hGDOTD0dWw5QNirjCtWwsyH4KCJh1+eimHMQB7+yz2ksEILIQRHCoM/lSqD8E9yYSXzR5P/ +aKi7c+Gr9WUVgKfZ87qb09EiiLy2umjpViwHjtBohLsiNMiF+GNjs2Ao2vlsZsru22k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/treewide: Drop the TRAP_* legacy names Message-Id: Date: Thu, 06 Apr 2023 19:46:54 +0000 commit 881ba20eb0222305a9d2cd090c9345992794f4f5 Author: Andrew Cooper AuthorDate: Fri Feb 17 23:45:36 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 5 20:33:49 2023 +0100 x86/treewide: Drop the TRAP_* legacy names We have two naming schemes for exceptions; X86_EXC_?? which use the archtiectural abbreviations, and TRAP_* which is a mix of terminology and nonstandard abbrevations. Switch to X86_EXC_* uniformly. No funcational change, confirmed by diffing the disassembly. Only 7 binary changes, and they're all __LINE__ being passed into printk(). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/vmce.c | 2 +- xen/arch/x86/cpuid.c | 6 +-- xen/arch/x86/crash.c | 6 +-- xen/arch/x86/domain.c | 2 +- xen/arch/x86/extable.c | 8 ++-- xen/arch/x86/hvm/emulate.c | 17 ++++---- xen/arch/x86/hvm/hvm.c | 61 ++++++++++++++------------- xen/arch/x86/hvm/io.c | 2 +- xen/arch/x86/hvm/svm/emulate.c | 2 +- xen/arch/x86/hvm/svm/intr.c | 2 +- xen/arch/x86/hvm/svm/nestedsvm.c | 32 +++++++------- xen/arch/x86/hvm/svm/svm.c | 76 +++++++++++++++++----------------- xen/arch/x86/hvm/svm/vmcb.c | 4 +- xen/arch/x86/hvm/vm_event.c | 10 ++--- xen/arch/x86/hvm/vmx/intr.c | 2 +- xen/arch/x86/hvm/vmx/realmode.c | 16 +++---- xen/arch/x86/hvm/vmx/vmcs.c | 8 ++-- xen/arch/x86/hvm/vmx/vmx.c | 75 +++++++++++++++++---------------- xen/arch/x86/hvm/vmx/vvmx.c | 28 ++++++------- xen/arch/x86/include/asm/domain.h | 2 +- xen/arch/x86/include/asm/hvm/hvm.h | 8 ++-- xen/arch/x86/include/asm/processor.h | 44 ++++---------------- xen/arch/x86/include/asm/x86-defns.h | 2 + xen/arch/x86/machine_kexec.c | 2 +- xen/arch/x86/mm.c | 2 +- xen/arch/x86/mm/mem_access.c | 2 +- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/mm/shadow/multi.c | 10 ++--- xen/arch/x86/pv/callback.c | 6 +-- xen/arch/x86/pv/emul-gate-op.c | 34 +++++++-------- xen/arch/x86/pv/emul-inv-op.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 14 +++---- xen/arch/x86/pv/emulate.c | 2 +- xen/arch/x86/pv/iret.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 4 +- xen/arch/x86/pv/traps.c | 10 ++--- xen/arch/x86/traps.c | 70 +++++++++++++++---------------- xen/arch/x86/x86_64/compat/entry.S | 12 +++--- xen/arch/x86/x86_64/entry.S | 54 ++++++++++++------------ xen/arch/x86/x86_emulate/util-xen.c | 10 ++--- xen/arch/x86/x86_emulate/x86_emulate.h | 4 +- 41 files changed, 313 insertions(+), 344 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index af30811afd..6f1a7e4de0 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -414,7 +414,7 @@ int inject_vmce(struct domain *d, int vcpu) continue; if ( (is_hvm_domain(d) || - pv_trap_callback_registered(v, TRAP_machine_check)) && + pv_trap_callback_registered(v, X86_EXC_MC)) && !test_and_set_bool(v->arch.mce_pending) ) { mce_printk(MCE_VERBOSE, "MCE: inject vMCE to %pv\n", v); diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index f311372cdf..455a09b2dd 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -219,7 +219,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, /* OSXSAVE clear in policy. Fast-forward CR4 back in. */ if ( (v->arch.pv.ctrlreg[4] & X86_CR4_OSXSAVE) || (p->basic.xsave && - regs->entry_vector == TRAP_invalid_op && + regs->entry_vector == X86_EXC_UD && guest_kernel_mode(v, regs) && (read_cr4() & X86_CR4_OSXSAVE)) ) res->c |= cpufeat_mask(X86_FEATURE_OSXSAVE); @@ -255,7 +255,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, * emulated CPUID from a faulted CPUID by whether a #UD or #GP * fault is currently being serviced. Yuck... */ - if ( cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) + if ( cpu_has_monitor && regs->entry_vector == X86_EXC_GP ) res->c |= cpufeat_mask(X86_FEATURE_MONITOR); /* @@ -280,7 +280,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, regs = guest_cpu_user_regs(); if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && - regs->entry_vector == TRAP_gp_fault ) + regs->entry_vector == X86_EXC_GP ) *res = raw_cpu_policy.basic.raw[5]; break; diff --git a/xen/arch/x86/crash.c b/xen/arch/x86/crash.c index 7850f0af24..a789416ca3 100644 --- a/xen/arch/x86/crash.c +++ b/xen/arch/x86/crash.c @@ -60,7 +60,7 @@ static int noreturn cf_check do_nmi_crash( * This update is safe from a security point of view, as this * pcpu is never going to try to sysret back to a PV vcpu. */ - set_ist(&idt_tables[cpu][TRAP_machine_check], IST_NONE); + set_ist(&idt_tables[cpu][X86_EXC_MC], IST_NONE); kexec_crash_save_cpu(); __stop_this_cpu(); @@ -130,9 +130,9 @@ static void nmi_shootdown_cpus(void) * Disable IST for MCEs to avoid stack corruption race conditions, and * change the NMI handler to a nop to avoid deviation from this codepath. */ - _set_gate_lower(&idt_tables[cpu][TRAP_nmi], + _set_gate_lower(&idt_tables[cpu][X86_EXC_NMI], SYS_DESC_irq_gate, 0, &trap_nop); - set_ist(&idt_tables[cpu][TRAP_machine_check], IST_NONE); + set_ist(&idt_tables[cpu][X86_EXC_MC], IST_NONE); set_nmi_callback(do_nmi_crash); smp_send_nmi_allbutself(); diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 91f57e3a3b..596233418a 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -113,7 +113,7 @@ void play_dead(void) local_irq_disable(); /* Change the NMI handler to a nop (see comment below). */ - _set_gate_lower(&idt_tables[cpu][TRAP_nmi], SYS_DESC_irq_gate, 0, + _set_gate_lower(&idt_tables[cpu][X86_EXC_NMI], SYS_DESC_irq_gate, 0, &trap_nop); /* diff --git a/xen/arch/x86/extable.c b/xen/arch/x86/extable.c index 6758ba1dca..c3771c2e39 100644 --- a/xen/arch/x86/extable.c +++ b/xen/arch/x86/extable.c @@ -136,15 +136,15 @@ static int __init cf_check stub_selftest(void) } tests[] __initconst = { #define endbr64 0xf3, 0x0f, 0x1e, 0xfa { .opc = { endbr64, 0x0f, 0xb9, 0xc3, 0xc3 }, /* ud1 */ - .res.fields.trapnr = TRAP_invalid_op }, + .res.fields.trapnr = X86_EXC_UD }, { .opc = { endbr64, 0x90, 0x02, 0x00, 0xc3 }, /* nop; add (%rax),%al */ .rax = 0x0123456789abcdef, - .res.fields.trapnr = TRAP_gp_fault }, + .res.fields.trapnr = X86_EXC_GP }, { .opc = { endbr64, 0x02, 0x04, 0x04, 0xc3 }, /* add (%rsp,%rax),%al */ .rax = 0xfedcba9876543210, - .res.fields.trapnr = TRAP_stack_error }, + .res.fields.trapnr = X86_EXC_SS }, { .opc = { endbr64, 0xcc, 0xc3, 0xc3, 0xc3 }, /* int3 */ - .res.fields.trapnr = TRAP_int3 }, + .res.fields.trapnr = X86_EXC_BP }, #undef endbr64 }; unsigned long addr = this_cpu(stubs.addr) + STUB_BUF_SIZE / 2; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 5691725d6c..75ee98a73b 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -910,9 +910,8 @@ static int hvmemul_virtual_to_linear( * determine the kind of exception (#GP or #TS) in that case. */ if ( is_x86_user_segment(seg) ) - x86_emul_hw_exception((seg == x86_seg_ss) - ? TRAP_stack_error - : TRAP_gp_fault, 0, &hvmemul_ctxt->ctxt); + x86_emul_hw_exception((seg == x86_seg_ss) ? X86_EXC_SS : X86_EXC_GP, + 0, &hvmemul_ctxt->ctxt); return X86EMUL_EXCEPTION; } @@ -2227,7 +2226,7 @@ static int cf_check hvmemul_write_cr( } if ( rc == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return rc; } @@ -2263,7 +2262,7 @@ static int cf_check hvmemul_read_msr( int rc = hvm_msr_read_intercept(reg, val); if ( rc == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return rc; } @@ -2276,7 +2275,7 @@ static int cf_check hvmemul_write_msr( int rc = hvm_msr_write_intercept(reg, val, true); if ( rc == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return rc; } @@ -2530,7 +2529,7 @@ static int cf_check hvmemul_tlb_op( paging_invlpg(current, addr); else { - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + x86_emul_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC, ctxt); rc = X86EMUL_EXCEPTION; } break; @@ -2548,7 +2547,7 @@ static int cf_check hvmemul_vmfunc( return X86EMUL_UNHANDLEABLE; rc = alternative_call(hvm_funcs.altp2m_vcpu_emulate_vmfunc, ctxt->regs); if ( rc == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + x86_emul_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC, ctxt); return rc; } @@ -2676,7 +2675,7 @@ static int _hvm_emulate_one(struct hvm_emulate_ctxt *hvmemul_ctxt, } if ( hvmemul_ctxt->ctxt.retire.singlestep ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); new_intr_shadow = hvmemul_ctxt->intr_shadow; diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 7020fdce99..6885ae4a9e 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -255,25 +255,25 @@ int hvm_event_needs_reinjection(uint8_t type, uint8_t vector) uint8_t hvm_combine_hw_exceptions(uint8_t vec1, uint8_t vec2) { const unsigned int contributory_exceptions = - (1 << TRAP_divide_error) | - (1 << TRAP_invalid_tss) | - (1 << TRAP_no_segment) | - (1 << TRAP_stack_error) | - (1 << TRAP_gp_fault); + (1 << X86_EXC_DE) | + (1 << X86_EXC_TS) | + (1 << X86_EXC_NP) | + (1 << X86_EXC_SS) | + (1 << X86_EXC_GP); const unsigned int page_faults = - (1 << TRAP_page_fault) | - (1 << TRAP_virtualisation); + (1 << X86_EXC_PF) | + (1 << X86_EXC_VE); /* Exception during double-fault delivery always causes a triple fault. */ - if ( vec1 == TRAP_double_fault ) + if ( vec1 == X86_EXC_DF ) { hvm_triple_fault(); - return TRAP_double_fault; /* dummy return */ + return X86_EXC_DF; /* dummy return */ } /* Exception during page-fault delivery always causes a double fault. */ if ( (1u << vec1) & page_faults ) - return TRAP_double_fault; + return X86_EXC_DF; /* Discard the first exception if it's benign or if we now have a #PF. */ if ( !((1u << vec1) & contributory_exceptions) || @@ -281,7 +281,7 @@ uint8_t hvm_combine_hw_exceptions(uint8_t vec1, uint8_t vec2) return vec2; /* Cannot combine the exceptions: double fault. */ - return TRAP_double_fault; + return X86_EXC_DF; } void hvm_set_rdtsc_exiting(struct domain *d, bool_t enable) @@ -1718,7 +1718,7 @@ void hvm_inject_event(const struct x86_event *event) struct vcpu *curr = current; const uint8_t vector = event->vector; const bool has_ec = ((event->type == X86_EVENTTYPE_HW_EXCEPTION) && - (vector < 32) && ((TRAP_HAVE_EC & (1u << vector)))); + (vector < 32) && ((X86_EXC_HAVE_EC & (1u << vector)))); ASSERT(vector == event->vector); /* Confirm no truncation. */ if ( has_ec ) @@ -1800,7 +1800,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, return -1; case NESTEDHVM_PAGEFAULT_MMIO: if ( !handle_mmio() ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return 1; case NESTEDHVM_PAGEFAULT_L0_ERROR: /* gpa is now translated to l1 guest address, update gfn. */ @@ -1817,7 +1817,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, if ( !nestedhvm_vcpu_in_guestmode(curr) && hvm_mmio_internal(gpa) ) { if ( !handle_mmio_with_translation(gla, gpa >> PAGE_SHIFT, npfec) ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = 1; goto out; } @@ -1944,7 +1944,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) ) { if ( !handle_mmio_with_translation(gla, gpa >> PAGE_SHIFT, npfec) ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = 1; goto out_put_gfn; } @@ -2052,7 +2052,7 @@ int hvm_handle_xsetbv(u32 index, u64 new_bv) rc = x86emul_write_xcr(index, new_bv, NULL); if ( rc != X86EMUL_OKAY ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return rc; } @@ -2185,7 +2185,7 @@ int hvm_mov_to_cr(unsigned int cr, unsigned int gpr) } if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return rc; @@ -2835,7 +2835,7 @@ static int task_switch_load_seg( seg_desc_t *pdesc = NULL, desc; u8 dpl, rpl; bool_t writable; - int fault_type = TRAP_invalid_tss; + int fault_type = X86_EXC_TS; struct vcpu *v = current; if ( eflags & X86_EFLAGS_VM ) @@ -2928,8 +2928,7 @@ static int task_switch_load_seg( /* Segment present in memory? */ if ( !(desc.b & _SEGMENT_P) ) { - fault_type = (seg != x86_seg_ss) ? TRAP_no_segment - : TRAP_stack_error; + fault_type = (seg != x86_seg_ss) ? X86_EXC_NP : X86_EXC_SS; goto fault; } } while ( !(desc.b & 0x100) && /* Ensure Accessed flag is set */ @@ -3026,9 +3025,9 @@ void hvm_task_switch( if ( ((tss_sel & 0xfff8) + 7) > gdt.limit ) { - hvm_inject_hw_exception((taskswitch_reason == TSW_iret) ? - TRAP_invalid_tss : TRAP_gp_fault, - tss_sel & 0xfff8); + hvm_inject_hw_exception( + (taskswitch_reason == TSW_iret) ? X86_EXC_TS : X86_EXC_GP, + tss_sel & 0xfff8); goto out; } @@ -3055,20 +3054,20 @@ void hvm_task_switch( if ( tr.type != ((taskswitch_reason == TSW_iret) ? 0xb : 0x9) ) { hvm_inject_hw_exception( - (taskswitch_reason == TSW_iret) ? TRAP_invalid_tss : TRAP_gp_fault, + (taskswitch_reason == TSW_iret) ? X86_EXC_TS : X86_EXC_GP, tss_sel & 0xfff8); goto out; } if ( !tr.p ) { - hvm_inject_hw_exception(TRAP_no_segment, tss_sel & 0xfff8); + hvm_inject_hw_exception(X86_EXC_NP, tss_sel & 0xfff8); goto out; } if ( tr.limit < (sizeof(tss)-1) ) { - hvm_inject_hw_exception(TRAP_invalid_tss, tss_sel & 0xfff8); + hvm_inject_hw_exception(X86_EXC_TS, tss_sel & 0xfff8); goto out; } @@ -3137,7 +3136,7 @@ void hvm_task_switch( rc = hvm_set_cr3(tss.cr3, false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) goto out; @@ -3221,7 +3220,7 @@ void hvm_task_switch( } if ( (tss.trace & 1) && !exn_raised ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); out: hvm_unmap_entry(optss_desc); @@ -3487,7 +3486,7 @@ int hvm_vmexit_cpuid(struct cpu_user_regs *regs, unsigned int inst_len) if ( curr->arch.msrs->misc_features_enables.cpuid_faulting && hvm_get_cpl(curr) > 0 ) { - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return 1; /* Don't advance the guest IP! */ } @@ -3864,7 +3863,7 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) if ( !should_emulate ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -3872,7 +3871,7 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) { case X86EMUL_UNHANDLEABLE: case X86EMUL_UNIMPLEMENTED: - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; case X86EMUL_EXCEPTION: hvm_inject_event(&ctxt.ctxt.event); diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index 5ae209d3b6..ae2feebd79 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -78,7 +78,7 @@ bool hvm_emulate_one_insn(hvm_emulate_validate_t *validate, const char *descr) case X86EMUL_UNRECOGNIZED: hvm_dump_emulation_state(XENLOG_G_WARNING, descr, &ctxt, rc); - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; case X86EMUL_EXCEPTION: diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 391f025516..2c95d1ce06 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -113,7 +113,7 @@ unsigned int svm_get_insn_len(struct vcpu *v, unsigned int instr_enc) hvm_dump_emulation_state(XENLOG_G_WARNING, "SVM Insn len", &ctxt, X86EMUL_UNHANDLEABLE); - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return 0; } diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index dbb0022190..c1a057ce86 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -48,7 +48,7 @@ static void svm_inject_nmi(struct vcpu *v) event.raw = 0; event.v = true; event.type = X86_EVENTTYPE_NMI; - event.vector = TRAP_nmi; + event.vector = X86_EXC_NMI; ASSERT(!vmcb->event_inj.v); vmcb->event_inj = event; diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 63ed9fc248..2003f28f66 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -193,7 +193,7 @@ static uint64_t nestedsvm_fpu_vmentry(uint64_t n1cr0, * Sync FPU state with l2 guest. */ vcr0 |= X86_CR0_TS; - n2vmcb->_exception_intercepts |= (1U << TRAP_no_device); + n2vmcb->_exception_intercepts |= (1U << X86_EXC_NM); } else if ( !(vcr0 & X86_CR0_TS) && (n2vmcb->_cr0 & X86_CR0_TS) ) { @@ -202,7 +202,7 @@ static uint64_t nestedsvm_fpu_vmentry(uint64_t n1cr0, * Sync FPU state with l2 guest. */ vcr0 &= ~X86_CR0_TS; - n2vmcb->_exception_intercepts &= ~(1U << TRAP_no_device); + n2vmcb->_exception_intercepts &= ~(1U << X86_EXC_NM); } return vcr0; @@ -218,7 +218,7 @@ static void nestedsvm_fpu_vmexit(struct vmcb_struct *n1vmcb, * Sync FPU state with l1 guest. */ n1vmcb->_cr0 |= X86_CR0_TS; - n1vmcb->_exception_intercepts |= (1U << TRAP_no_device); + n1vmcb->_exception_intercepts |= (1U << X86_EXC_NM); } else if ( !(n1cr0 & X86_CR0_TS) && (n1vmcb->_cr0 & X86_CR0_TS) ) { @@ -227,7 +227,7 @@ static void nestedsvm_fpu_vmexit(struct vmcb_struct *n1vmcb, * Sync FPU state with l1 guest. */ n1vmcb->_cr0 &= ~X86_CR0_TS; - n1vmcb->_exception_intercepts &= ~(1U << TRAP_no_device); + n1vmcb->_exception_intercepts &= ~(1U << X86_EXC_NM); } } @@ -282,7 +282,7 @@ static int nsvm_vcpu_hostrestore(struct vcpu *v, struct cpu_user_regs *regs) v->arch.hvm.guest_efer = n1vmcb->_efer; rc = hvm_set_efer(n1vmcb->_efer); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_efer failed, rc: %u\n", rc); @@ -290,7 +290,7 @@ static int nsvm_vcpu_hostrestore(struct vcpu *v, struct cpu_user_regs *regs) v->arch.hvm.guest_cr[4] = n1vmcb->_cr4; rc = hvm_set_cr4(n1vmcb->_cr4, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr4 failed, rc: %u\n", rc); @@ -301,7 +301,7 @@ static int nsvm_vcpu_hostrestore(struct vcpu *v, struct cpu_user_regs *regs) n1vmcb->rflags &= ~X86_EFLAGS_VM; rc = hvm_set_cr0(n1vmcb->_cr0 | X86_CR0_PE, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr0 failed, rc: %u\n", rc); svm->ns_cr0 = v->arch.hvm.guest_cr[0]; @@ -334,7 +334,7 @@ static int nsvm_vcpu_hostrestore(struct vcpu *v, struct cpu_user_regs *regs) } rc = hvm_set_cr3(n1vmcb->_cr3, false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc); @@ -552,7 +552,7 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) v->arch.hvm.guest_efer = ns_vmcb->_efer; rc = hvm_set_efer(ns_vmcb->_efer); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_efer failed, rc: %u\n", rc); @@ -560,7 +560,7 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) v->arch.hvm.guest_cr[4] = ns_vmcb->_cr4; rc = hvm_set_cr4(ns_vmcb->_cr4, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr4 failed, rc: %u\n", rc); @@ -570,7 +570,7 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) v->arch.hvm.guest_cr[0] = ns_vmcb->_cr0; rc = hvm_set_cr0(cr0, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr0 failed, rc: %u\n", rc); @@ -589,7 +589,7 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) /* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */ rc = hvm_set_cr3(ns_vmcb->_cr3, false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc); } @@ -605,7 +605,7 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) /* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */ rc = hvm_set_cr3(ns_vmcb->_cr3, false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); if ( rc != X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc); } @@ -783,7 +783,7 @@ nsvm_vcpu_vmrun(struct vcpu *v, struct cpu_user_regs *regs) default: gdprintk(XENLOG_ERR, "nsvm_vcpu_vmentry failed, injecting #UD\n"); - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); /* Must happen after hvm_inject_hw_exception or it doesn't work right. */ nv->nv_vmswitch_in_progress = 0; return 1; @@ -1575,7 +1575,7 @@ void svm_vmexit_do_stgi(struct cpu_user_regs *regs, struct vcpu *v) */ if ( !nestedhvm_enabled(v->domain) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -1596,7 +1596,7 @@ void svm_vmexit_do_clgi(struct cpu_user_regs *regs, struct vcpu *v) if ( !nsvm_efer_svm_enabled(v) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index b8fe759db4..8d8b250101 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -80,7 +80,7 @@ static DEFINE_SPINLOCK(osvw_lock); static void svm_crash_or_fault(struct vcpu *v) { if ( vmcb_get_cpl(v->arch.hvm.svm.vmcb) ) - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); else domain_crash(v->domain); } @@ -107,7 +107,7 @@ void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len) curr->arch.hvm.svm.vmcb->int_stat.intr_shadow = 0; if ( regs->eflags & X86_EFLAGS_TF ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); } static void cf_check svm_cpu_down(void) @@ -122,7 +122,7 @@ static void svm_fpu_enter(struct vcpu *v) vcpu_restore_fpu_lazy(v); vmcb_set_exception_intercepts( n1vmcb, - vmcb_get_exception_intercepts(n1vmcb) & ~(1U << TRAP_no_device)); + vmcb_get_exception_intercepts(n1vmcb) & ~(1U << X86_EXC_NM)); } static void cf_check svm_fpu_leave(struct vcpu *v) @@ -142,7 +142,7 @@ static void cf_check svm_fpu_leave(struct vcpu *v) { vmcb_set_exception_intercepts( n1vmcb, - vmcb_get_exception_intercepts(n1vmcb) | (1U << TRAP_no_device)); + vmcb_get_exception_intercepts(n1vmcb) | (1U << X86_EXC_NM)); vmcb_set_cr0(n1vmcb, vmcb_get_cr0(n1vmcb) | X86_CR0_TS); } } @@ -588,9 +588,9 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) if ( opt_hvm_fep || (v->domain->arch.cpuid->x86_vendor != boot_cpu_data.x86_vendor) ) - bitmap |= (1U << TRAP_invalid_op); + bitmap |= (1U << X86_EXC_UD); else - bitmap &= ~(1U << TRAP_invalid_op); + bitmap &= ~(1U << X86_EXC_UD); vmcb_set_exception_intercepts(vmcb, bitmap); @@ -1026,8 +1026,8 @@ static void noreturn cf_check svm_do_resume(void) v->arch.hvm.debug_state_latch = debug_state; vmcb_set_exception_intercepts( - vmcb, debug_state ? (intercepts | (1U << TRAP_int3)) - : (intercepts & ~(1U << TRAP_int3))); + vmcb, debug_state ? (intercepts | (1U << X86_EXC_BP)) + : (intercepts & ~(1U << X86_EXC_BP))); } if ( v->arch.hvm.svm.launch_core != smp_processor_id() ) @@ -1215,7 +1215,7 @@ static void svm_emul_swint_injection(struct x86_event *event) const struct vmcb_struct *vmcb = curr->arch.hvm.svm.vmcb; const struct cpu_user_regs *regs = guest_cpu_user_regs(); unsigned int trap = event->vector, type = event->type; - unsigned int fault = TRAP_gp_fault, ec = 0; + unsigned int fault = X86_EXC_GP, ec = 0; pagefault_info_t pfinfo; struct segment_register cs, idtr; unsigned int idte_size, idte_offset; @@ -1261,7 +1261,7 @@ static void svm_emul_swint_injection(struct x86_event *event) { if ( rc == HVMTRANS_bad_linear_to_gfn ) { - fault = TRAP_page_fault; + fault = X86_EXC_PF; ec = pfinfo.ec; event->cr2 = pfinfo.linear; } @@ -1297,7 +1297,7 @@ static void svm_emul_swint_injection(struct x86_event *event) /* Is this entry present? */ if ( !(idte.b & (1u << 15)) ) { - fault = TRAP_no_segment; + fault = X86_EXC_NP; goto raise_exception; } @@ -1338,14 +1338,14 @@ static void cf_check svm_inject_event(const struct x86_event *event) switch ( _event.vector | -(_event.type == X86_EVENTTYPE_SW_INTERRUPT) ) { - case TRAP_debug: + case X86_EXC_DB: if ( regs->eflags & X86_EFLAGS_TF ) { __restore_debug_registers(vmcb, curr); vmcb_set_dr6(vmcb, vmcb_get_dr6(vmcb) | DR_STEP); } /* fall through */ - case TRAP_int3: + case X86_EXC_BP: if ( curr->domain->debugger_attached ) { /* Debug/Int3: Trap to debugger. */ @@ -1354,7 +1354,7 @@ static void cf_check svm_inject_event(const struct x86_event *event) } break; - case TRAP_page_fault: + case X86_EXC_PF: ASSERT(_event.type == X86_EVENTTYPE_HW_EXCEPTION); curr->arch.hvm.guest_cr[2] = _event.cr2; vmcb_set_cr2(vmcb, _event.cr2); @@ -1365,7 +1365,7 @@ static void cf_check svm_inject_event(const struct x86_event *event) { _event.vector = hvm_combine_hw_exceptions( eventinj.vector, _event.vector); - if ( _event.vector == TRAP_double_fault ) + if ( _event.vector == X86_EXC_DF ) _event.error_code = 0; } @@ -1438,7 +1438,7 @@ static void cf_check svm_inject_event(const struct x86_event *event) ASSERT(!eventinj.ev || eventinj.ec == (uint16_t)eventinj.ec); vmcb->event_inj = eventinj; - if ( _event.vector == TRAP_page_fault && + if ( _event.vector == X86_EXC_PF && _event.type == X86_EVENTTYPE_HW_EXCEPTION ) HVMTRACE_LONG_2D(PF_INJECT, _event.error_code, TRC_PAR_LONG(_event.cr2)); @@ -1722,7 +1722,7 @@ static void cf_check svm_fpu_dirty_intercept(void) { /* Check if l1 guest must make FPU ready for the l2 guest */ if ( v->arch.hvm.guest_cr[0] & X86_CR0_TS ) - hvm_inject_hw_exception(TRAP_no_device, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_NM, X86_EVENT_NO_EC); else vmcb_set_cr0(n1vmcb, vmcb_get_cr0(n1vmcb) & ~X86_CR0_TS); return; @@ -2166,7 +2166,7 @@ static void svm_do_msr_access(struct cpu_user_regs *regs) if ( rc == X86EMUL_OKAY ) __update_guest_eip(regs, inst_len); else if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); } static void svm_vmexit_do_hlt(struct vmcb_struct *vmcb, @@ -2189,7 +2189,7 @@ static void svm_vmexit_do_rdtsc(struct cpu_user_regs *regs, bool rdtscp) if ( rdtscp && !currd->arch.cpuid->extd.rdtscp ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -2227,14 +2227,14 @@ svm_vmexit_do_vmrun(struct cpu_user_regs *regs, { if ( !nsvm_efer_svm_enabled(v) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } if ( !nestedsvm_vmcb_map(v, vmcbaddr) ) { gdprintk(XENLOG_ERR, "VMRUN: mapping vmcb failed, injecting #GP\n"); - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return; } @@ -2280,7 +2280,7 @@ svm_vmexit_do_vmload(struct vmcb_struct *vmcb, if ( !nsvm_efer_svm_enabled(v) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -2289,7 +2289,7 @@ svm_vmexit_do_vmload(struct vmcb_struct *vmcb, { gdprintk(XENLOG_ERR, "VMLOAD: mapping failed, injecting #GP\n"); - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return; } @@ -2315,7 +2315,7 @@ svm_vmexit_do_vmsave(struct vmcb_struct *vmcb, if ( !nsvm_efer_svm_enabled(v) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -2324,7 +2324,7 @@ svm_vmexit_do_vmsave(struct vmcb_struct *vmcb, { gdprintk(XENLOG_ERR, "VMSAVE: mapping vmcb failed, injecting #GP\n"); - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return; } @@ -2767,7 +2767,7 @@ void svm_vmexit_handler(void) if ( rc < 0 ) goto unexpected_exit_type; if ( !rc ) - hvm_inject_exception(TRAP_debug, + hvm_inject_exception(X86_EXC_DB, trap_type, insn_len, X86_EVENT_NO_EC); } else @@ -2784,7 +2784,7 @@ void svm_vmexit_handler(void) { /* AMD Vol2, 15.11: INT3, INTO, BOUND intercepts do not update RIP. */ __update_guest_eip(regs, insn_len); - current->arch.gdbsx_vcpu_event = TRAP_int3; + current->arch.gdbsx_vcpu_event = X86_EXC_BP; domain_pause_for_debugger(); } else @@ -2796,7 +2796,7 @@ void svm_vmexit_handler(void) if ( rc < 0 ) goto unexpected_exit_type; if ( !rc ) - hvm_inject_exception(TRAP_int3, + hvm_inject_exception(X86_EXC_BP, X86_EVENTTYPE_SW_EXCEPTION, insn_len, X86_EVENT_NO_EC); } @@ -2837,8 +2837,8 @@ void svm_vmexit_handler(void) } case VMEXIT_EXCEPTION_AC: - HVMTRACE_1D(TRAP, TRAP_alignment_check); - hvm_inject_hw_exception(TRAP_alignment_check, vmcb->exitinfo1); + HVMTRACE_1D(TRAP, X86_EXC_AC); + hvm_inject_hw_exception(X86_EXC_AC, vmcb->exitinfo1); break; case VMEXIT_EXCEPTION_UD: @@ -2891,8 +2891,8 @@ void svm_vmexit_handler(void) * semantics. */ case X86_EVENTTYPE_HW_EXCEPTION: - if ( vmcb->exit_int_info.vector == TRAP_int3 || - vmcb->exit_int_info.vector == TRAP_overflow ) + if ( vmcb->exit_int_info.vector == X86_EXC_BP || + vmcb->exit_int_info.vector == X86_EXC_OF ) break; /* Fallthrough */ case X86_EVENTTYPE_EXT_INTR: @@ -2956,7 +2956,7 @@ void svm_vmexit_handler(void) __update_guest_eip(regs, vmcb->ei.io.nrip - vmcb->rip); } else if ( !hvm_emulate_one_insn(x86_insn_is_portio, "port I/O") ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; case VMEXIT_CR0_READ ... VMEXIT_CR15_READ: @@ -2964,7 +2964,7 @@ void svm_vmexit_handler(void) if ( cpu_has_svm_decode && (vmcb->exitinfo1 & (1ULL << 63)) ) svm_vmexit_do_cr_access(vmcb, regs); else if ( !hvm_emulate_one_insn(x86_insn_is_cr_access, "CR access") ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; case VMEXIT_INVLPG: @@ -2974,13 +2974,13 @@ void svm_vmexit_handler(void) __update_guest_eip(regs, vmcb->nextrip - vmcb->rip); } else if ( !hvm_emulate_one_insn(is_invlpg, "invlpg") ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; case VMEXIT_INVLPGA: if ( !nsvm_efer_svm_enabled(v) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; } if ( (insn_len = svm_get_insn_len(v, INSTR_INVLPGA)) == 0 ) @@ -3021,7 +3021,7 @@ void svm_vmexit_handler(void) case VMEXIT_MWAIT: case VMEXIT_SKINIT: case VMEXIT_RDPRU: - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; case VMEXIT_VMRUN: @@ -3042,7 +3042,7 @@ void svm_vmexit_handler(void) case VMEXIT_XSETBV: if ( vmcb_get_cpl(vmcb) ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); else if ( (insn_len = svm_get_insn_len(v, INSTR_XSETBV)) && hvm_handle_xsetbv(regs->ecx, msr_fold(regs)) == X86EMUL_OKAY ) __update_guest_eip(regs, insn_len); diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index ba93375e87..5497463586 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -140,7 +140,7 @@ static int construct_vmcb(struct vcpu *v) vmcb->_exception_intercepts = HVM_TRAP_MASK | - (v->arch.fully_eager_fpu ? 0 : (1U << TRAP_no_device)); + (v->arch.fully_eager_fpu ? 0 : (1U << X86_EXC_NM)); if ( paging_mode_hap(v->domain) ) { @@ -164,7 +164,7 @@ static int construct_vmcb(struct vcpu *v) } else { - vmcb->_exception_intercepts |= (1U << TRAP_page_fault); + vmcb->_exception_intercepts |= (1U << X86_EXC_PF); } if ( cpu_has_pause_filter ) diff --git a/xen/arch/x86/hvm/vm_event.c b/xen/arch/x86/hvm/vm_event.c index 19aac19bc3..3b064bcfad 100644 --- a/xen/arch/x86/hvm/vm_event.c +++ b/xen/arch/x86/hvm/vm_event.c @@ -87,7 +87,7 @@ void hvm_vm_event_do_resume(struct vcpu *v) VM_EVENT_FLAG_SET_EMUL_INSN_DATA ) kind = EMUL_KIND_SET_CONTEXT_INSN; - hvm_emulate_one_vm_event(kind, TRAP_invalid_op, + hvm_emulate_one_vm_event(kind, X86_EXC_UD, X86_EVENT_NO_EC); v->arch.vm_event->emulate_flags = 0; @@ -96,7 +96,7 @@ void hvm_vm_event_do_resume(struct vcpu *v) if ( unlikely(w->do_write.cr0) ) { if ( hvm_set_cr0(w->cr0, false) == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); w->do_write.cr0 = 0; } @@ -104,7 +104,7 @@ void hvm_vm_event_do_resume(struct vcpu *v) if ( unlikely(w->do_write.cr4) ) { if ( hvm_set_cr4(w->cr4, false) == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); w->do_write.cr4 = 0; } @@ -112,7 +112,7 @@ void hvm_vm_event_do_resume(struct vcpu *v) if ( unlikely(w->do_write.cr3) ) { if ( hvm_set_cr3(w->cr3, w->cr3_noflush, false) == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); w->do_write.cr3 = 0; } @@ -121,7 +121,7 @@ void hvm_vm_event_do_resume(struct vcpu *v) { if ( hvm_msr_write_intercept(w->msr, w->value, false) == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); w->do_write.msr = 0; } diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c index 6a8316de0e..87fb537b7c 100644 --- a/xen/arch/x86/hvm/vmx/intr.c +++ b/xen/arch/x86/hvm/vmx/intr.c @@ -328,7 +328,7 @@ void vmx_intr_assist(void) } else if ( intack.source == hvm_intsrc_mce ) { - hvm_inject_hw_exception(TRAP_machine_check, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_MC, X86_EVENT_NO_EC); } else if ( cpu_has_vmx_virtual_intr_delivery && intack.source != hvm_intsrc_pic && diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmode.c index 4ac93e0810..ff44ddcfa6 100644 --- a/xen/arch/x86/hvm/vmx/realmode.c +++ b/xen/arch/x86/hvm/vmx/realmode.c @@ -48,21 +48,21 @@ static void realmode_deliver_exception( if ( insn_len != 0 ) { insn_len = 0; - vector = TRAP_gp_fault; + vector = X86_EXC_GP; goto again; } /* Exception or hardware interrupt. */ switch ( vector ) { - case TRAP_double_fault: + case X86_EXC_DF: hvm_triple_fault(); return; - case TRAP_gp_fault: - vector = TRAP_double_fault; + case X86_EXC_GP: + vector = X86_EXC_DF; goto again; default: - vector = TRAP_gp_fault; + vector = X86_EXC_GP; goto again; } } @@ -116,14 +116,14 @@ void vmx_realmode_emulate_one(struct hvm_emulate_ctxt *hvmemul_ctxt) if ( curr->arch.hvm.guest_cr[0] & X86_CR0_PE ) goto fail; - realmode_deliver_exception(TRAP_invalid_op, 0, hvmemul_ctxt); + realmode_deliver_exception(X86_EXC_UD, 0, hvmemul_ctxt); } if ( rc == X86EMUL_EXCEPTION ) { if ( unlikely(curr->domain->debugger_attached) && - ((hvmemul_ctxt->ctxt.event.vector == TRAP_debug) || - (hvmemul_ctxt->ctxt.event.vector == TRAP_int3)) ) + ((hvmemul_ctxt->ctxt.event.vector == X86_EXC_DB) || + (hvmemul_ctxt->ctxt.event.vector == X86_EXC_BP)) ) { domain_pause_for_debugger(); } diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index d3c75b3803..07f7a9d76b 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -1295,8 +1295,8 @@ static int construct_vmcs(struct vcpu *v) __vmwrite(VMCS_LINK_POINTER, ~0UL); v->arch.hvm.vmx.exception_bitmap = HVM_TRAP_MASK - | (paging_mode_hap(d) ? 0 : (1U << TRAP_page_fault)) - | (v->arch.fully_eager_fpu ? 0 : (1U << TRAP_no_device)); + | (paging_mode_hap(d) ? 0 : (1U << X86_EXC_PF)) + | (v->arch.fully_eager_fpu ? 0 : (1U << X86_EXC_NM)); if ( cpu_has_vmx_notify_vm_exiting ) __vmwrite(NOTIFY_WINDOW, vm_notify_window); @@ -1871,9 +1871,9 @@ void noreturn vmx_asm_do_vmentry(void); static void vmx_update_debug_state(struct vcpu *v) { if ( v->arch.hvm.debug_state_latch ) - v->arch.hvm.vmx.exception_bitmap |= 1U << TRAP_int3; + v->arch.hvm.vmx.exception_bitmap |= 1U << X86_EXC_BP; else - v->arch.hvm.vmx.exception_bitmap &= ~(1U << TRAP_int3); + v->arch.hvm.vmx.exception_bitmap &= ~(1U << X86_EXC_BP); vmx_vmcs_enter(v); vmx_update_exception_bitmap(v); diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index ee4c41628c..bfc9693f7e 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -789,9 +789,9 @@ static void cf_check vmx_cpuid_policy_changed(struct vcpu *v) if ( opt_hvm_fep || (v->domain->arch.cpuid->x86_vendor != boot_cpu_data.x86_vendor) ) - v->arch.hvm.vmx.exception_bitmap |= (1U << TRAP_invalid_op); + v->arch.hvm.vmx.exception_bitmap |= (1U << X86_EXC_UD); else - v->arch.hvm.vmx.exception_bitmap &= ~(1U << TRAP_invalid_op); + v->arch.hvm.vmx.exception_bitmap &= ~(1U << X86_EXC_UD); vmx_vmcs_enter(v); vmx_update_exception_bitmap(v); @@ -1071,7 +1071,7 @@ static int cf_check vmx_load_vmcs_ctxt(struct vcpu *v, struct hvm_hw_cpu *ctxt) static void vmx_fpu_enter(struct vcpu *v) { vcpu_restore_fpu_lazy(v); - v->arch.hvm.vmx.exception_bitmap &= ~(1u << TRAP_no_device); + v->arch.hvm.vmx.exception_bitmap &= ~(1u << X86_EXC_NM); vmx_update_exception_bitmap(v); v->arch.hvm.vmx.host_cr0 &= ~X86_CR0_TS; __vmwrite(HOST_CR0, v->arch.hvm.vmx.host_cr0); @@ -1098,7 +1098,7 @@ static void cf_check vmx_fpu_leave(struct vcpu *v) { v->arch.hvm.hw_cr[0] |= X86_CR0_TS; __vmwrite(GUEST_CR0, v->arch.hvm.hw_cr[0]); - v->arch.hvm.vmx.exception_bitmap |= (1u << TRAP_no_device); + v->arch.hvm.vmx.exception_bitmap |= (1u << X86_EXC_NM); vmx_update_exception_bitmap(v); } } @@ -1988,7 +1988,7 @@ void vmx_inject_nmi(void) nvmx_enqueue_n2_exceptions (v, INTR_INFO_VALID_MASK | MASK_INSR(X86_EVENTTYPE_NMI, INTR_INFO_INTR_TYPE_MASK) | - MASK_INSR(TRAP_nmi, INTR_INFO_VECTOR_MASK), + MASK_INSR(X86_EXC_NMI, INTR_INFO_VECTOR_MASK), X86_EVENT_NO_EC, hvm_intsrc_nmi); return; } @@ -2013,14 +2013,14 @@ static void cf_check vmx_inject_event(const struct x86_event *event) switch ( _event.vector | -(_event.type == X86_EVENTTYPE_SW_INTERRUPT) ) { - case TRAP_debug: + case X86_EXC_DB: if ( guest_cpu_user_regs()->eflags & X86_EFLAGS_TF ) { __restore_debug_registers(curr); write_debugreg(6, read_debugreg(6) | DR_STEP); } if ( !nestedhvm_vcpu_in_guestmode(curr) || - !nvmx_intercepts_exception(curr, TRAP_debug, _event.error_code) ) + !nvmx_intercepts_exception(curr, X86_EXC_DB, _event.error_code) ) { unsigned long val; @@ -2032,7 +2032,7 @@ static void cf_check vmx_inject_event(const struct x86_event *event) if ( cpu_has_monitor_trap_flag ) break; /* fall through */ - case TRAP_int3: + case X86_EXC_BP: if ( curr->domain->debugger_attached ) { /* Debug/Int3: Trap to debugger. */ @@ -2041,7 +2041,7 @@ static void cf_check vmx_inject_event(const struct x86_event *event) } break; - case TRAP_page_fault: + case X86_EXC_PF: ASSERT(_event.type == X86_EVENTTYPE_HW_EXCEPTION); curr->arch.hvm.guest_cr[2] = _event.cr2; break; @@ -2058,7 +2058,7 @@ static void cf_check vmx_inject_event(const struct x86_event *event) { _event.vector = hvm_combine_hw_exceptions( (uint8_t)intr_info, _event.vector); - if ( _event.vector == TRAP_double_fault ) + if ( _event.vector == X86_EXC_DF ) _event.error_code = 0; } @@ -2078,7 +2078,7 @@ static void cf_check vmx_inject_event(const struct x86_event *event) else __vmx_inject_exception(_event.vector, _event.type, _event.error_code); - if ( (_event.vector == TRAP_page_fault) && + if ( (_event.vector == X86_EXC_PF) && (_event.type == X86_EVENTTYPE_HW_EXCEPTION) ) HVMTRACE_LONG_2D(PF_INJECT, _event.error_code, TRC_PAR_LONG(curr->arch.hvm.guest_cr[2])); @@ -2433,7 +2433,7 @@ static bool cf_check vmx_vcpu_emulate_ve(struct vcpu *v) __vmread(GUEST_PHYSICAL_ADDRESS, &veinfo->gpa); vmx_vmcs_exit(v); - hvm_inject_hw_exception(TRAP_virtualisation, + hvm_inject_hw_exception(X86_EXC_VE, X86_EVENT_NO_EC); out: @@ -3065,7 +3065,7 @@ void update_guest_eip(void) } if ( regs->eflags & X86_EFLAGS_TF ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); } static void cf_check vmx_fpu_dirty_intercept(void) @@ -3163,7 +3163,7 @@ static int vmx_cr_access(cr_access_qual_t qual) HVMTRACE_LONG_1D(LMSW, value); if ( (rc = hvm_set_cr0(value, true)) == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return rc; } @@ -4081,9 +4081,9 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) __vmread(VM_EXIT_INTR_INFO, &intr_info); BUG_ON(!(intr_info & INTR_INFO_VALID_MASK)); vector = intr_info & INTR_INFO_VECTOR_MASK; - if ( vector == TRAP_machine_check ) + if ( vector == X86_EXC_MC ) do_machine_check(regs); - if ( (vector == TRAP_nmi) && + if ( (vector == X86_EXC_NMI) && ((intr_info & INTR_INFO_INTR_TYPE_MASK) == MASK_INSR(X86_EVENTTYPE_NMI, INTR_INFO_INTR_TYPE_MASK)) ) { @@ -4178,9 +4178,8 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) switch ( exit_reason ) { case EXIT_REASON_EXCEPTION_NMI: - if ( vector != TRAP_page_fault - && vector != TRAP_nmi - && vector != TRAP_machine_check ) + if ( vector != X86_EXC_PF && vector != X86_EXC_NMI && + vector != X86_EXC_MC ) { default: perfc_incr(realmode_exits); @@ -4229,14 +4228,14 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) */ if ( unlikely(intr_info & INTR_INFO_NMI_UNBLOCKED_BY_IRET) && !(idtv_info & INTR_INFO_VALID_MASK) && - (vector != TRAP_double_fault) ) + (vector != X86_EXC_DF) ) undo_nmis_unblocked_by_iret(); perfc_incra(cause_vector, vector); switch ( vector ) { - case TRAP_debug: + case X86_EXC_DB: /* * Updates DR6 where debugger can peek (See 3B 23.2.1, * Table 23-1, "Exit Qualification for Debug Exceptions"). @@ -4303,7 +4302,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) else domain_pause_for_debugger(); break; - case TRAP_int3: + case X86_EXC_BP: HVMTRACE_1D(TRAP, vector); if ( !v->domain->debugger_attached ) { @@ -4324,15 +4323,15 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) else { update_guest_eip(); /* Safe: INT3 */ - v->arch.gdbsx_vcpu_event = TRAP_int3; + v->arch.gdbsx_vcpu_event = X86_EXC_BP; domain_pause_for_debugger(); } break; - case TRAP_no_device: + case X86_EXC_NM: HVMTRACE_1D(TRAP, vector); vmx_fpu_dirty_intercept(); break; - case TRAP_page_fault: + case X86_EXC_PF: __vmread(EXIT_QUALIFICATION, &exit_qualification); __vmread(VM_EXIT_INTR_ERROR_CODE, &ecode); regs->error_code = ecode; @@ -4357,22 +4356,22 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) hvm_inject_page_fault(regs->error_code, exit_qualification); break; - case TRAP_alignment_check: + case X86_EXC_AC: HVMTRACE_1D(TRAP, vector); vmx_propagate_intr(intr_info); break; - case TRAP_nmi: + case X86_EXC_NMI: if ( MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) != X86_EVENTTYPE_NMI ) goto exit_and_crash; HVMTRACE_0D(NMI); /* Already handled above. */ break; - case TRAP_machine_check: + case X86_EXC_MC: HVMTRACE_0D(MCE); /* Already handled above. */ break; - case TRAP_invalid_op: + case X86_EXC_UD: HVMTRACE_1D(TRAP, vector); hvm_ud_intercept(regs); break; @@ -4453,7 +4452,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) case EXIT_REASON_RDTSCP: if ( !currd->arch.cpuid->extd.rdtscp ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; } @@ -4494,7 +4493,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) break; case X86EMUL_EXCEPTION: - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; } break; @@ -4508,7 +4507,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) break; case X86EMUL_EXCEPTION: - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; } break; @@ -4530,7 +4529,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) case EXIT_REASON_VMFUNC: if ( vmx_vmfunc_intercept(regs) != X86EMUL_OKAY ) - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); else update_guest_eip(); break; @@ -4544,7 +4543,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) * as far as vmexit. */ WARN_ON(exit_reason == EXIT_REASON_GETSEC); - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; case EXIT_REASON_TPR_BELOW_THRESHOLD: @@ -4552,7 +4551,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) case EXIT_REASON_APIC_ACCESS: if ( !vmx_handle_eoi_write() && !handle_mmio() ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); break; case EXIT_REASON_EOI_INDUCED: @@ -4592,7 +4591,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) if ( io_qual.str ) { if ( !hvm_emulate_one_insn(x86_insn_is_portio, "port I/O") ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); } else { @@ -4721,7 +4720,7 @@ void vmx_vmexit_handler(struct cpu_user_regs *regs) gprintk(XENLOG_ERR, "Unexpected vmexit: reason %lu\n", exit_reason); if ( vmx_get_cpl() ) - hvm_inject_hw_exception(TRAP_invalid_op, + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); else domain_crash(v->domain); @@ -4752,7 +4751,7 @@ out: { __vmread(VM_ENTRY_INTR_INFO, &intr_info); if ( !(intr_info & INTR_INFO_VALID_MASK) ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); /* Need to fix rIP nevertheless. */ if ( mode == 8 ) regs->rip = (long)(regs->rip << (64 - VADDR_BITS)) >> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 674cdabb07..27221fdb73 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -474,7 +474,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs, return X86EMUL_OKAY; gp_fault: - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return X86EMUL_EXCEPTION; } @@ -526,7 +526,7 @@ bool cf_check nvmx_intercepts_exception( exception_bitmap = get_vvmcs(v, EXCEPTION_BITMAP); r = exception_bitmap & (1 << vector) ? 1: 0; - if ( vector == TRAP_page_fault ) + if ( vector == X86_EXC_PF ) { pfec_match = get_vvmcs(v, PAGE_FAULT_ERROR_CODE_MATCH); pfec_mask = get_vvmcs(v, PAGE_FAULT_ERROR_CODE_MASK); @@ -1100,15 +1100,15 @@ static void load_shadow_guest_state(struct vcpu *v) rc = hvm_set_cr4(get_vvmcs(v, GUEST_CR4), true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = hvm_set_cr0(get_vvmcs(v, GUEST_CR0), true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = hvm_set_cr3(get_vvmcs(v, GUEST_CR3), false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); control = get_vvmcs(v, VM_ENTRY_CONTROLS); if ( control & VM_ENTRY_LOAD_GUEST_PAT ) @@ -1118,7 +1118,7 @@ static void load_shadow_guest_state(struct vcpu *v) rc = hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, get_vvmcs(v, GUEST_PERF_GLOBAL_CTRL), false); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); } hvm_set_tsc_offset(v, v->arch.hvm.cache_tsc_offset, 0); @@ -1314,15 +1314,15 @@ static void load_vvmcs_host_state(struct vcpu *v) rc = hvm_set_cr4(get_vvmcs(v, HOST_CR4), true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = hvm_set_cr0(get_vvmcs(v, HOST_CR0), true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); rc = hvm_set_cr3(get_vvmcs(v, HOST_CR3), false, true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); control = get_vvmcs(v, VM_EXIT_CONTROLS); if ( control & VM_EXIT_LOAD_HOST_PAT ) @@ -1332,7 +1332,7 @@ static void load_vvmcs_host_state(struct vcpu *v) rc = hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, get_vvmcs(v, HOST_PERF_GLOBAL_CTRL), true); if ( rc == X86EMUL_EXCEPTION ) - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); } hvm_set_tsc_offset(v, v->arch.hvm.cache_tsc_offset, 0); @@ -2083,13 +2083,13 @@ int nvmx_handle_vmx_insn(struct cpu_user_regs *regs, unsigned int exit_reason) (vmx_guest_x86_mode(curr) < (hvm_long_mode_active(curr) ? 8 : 2)) || (exit_reason != EXIT_REASON_VMXON && !nvmx_vcpu_in_vmx(curr)) ) { - hvm_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return X86EMUL_EXCEPTION; } if ( vmx_get_cpl() > 0 ) { - hvm_inject_hw_exception(TRAP_gp_fault, 0); + hvm_inject_hw_exception(X86_EXC_GP, 0); return X86EMUL_EXCEPTION; } @@ -2464,12 +2464,12 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs, * decided by L0 and L1 exception bitmap, if the vetor is set by * both, L0 has priority on #PF and #NM, L1 has priority on others */ - if ( vector == TRAP_page_fault ) + if ( vector == X86_EXC_PF ) { if ( paging_mode_hap(v->domain) ) nvcpu->nv_vmexit_pending = 1; } - else if ( vector == TRAP_no_device ) + else if ( vector == X86_EXC_NM ) { if ( v->fpu_dirtied ) nvcpu->nv_vmexit_pending = 1; diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 466388a98e..899ca7f70f 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -734,7 +734,7 @@ static inline void pv_inject_hw_exception(unsigned int vector, int errcode) static inline void pv_inject_page_fault(int errcode, unsigned long cr2) { const struct x86_event event = { - .vector = TRAP_page_fault, + .vector = X86_EXC_PF, .type = X86_EVENTTYPE_HW_EXCEPTION, .error_code = errcode, .cr2 = cr2, diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 43d3fc2498..258e0a1f29 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -540,7 +540,7 @@ static inline void hvm_inject_hw_exception(unsigned int vector, int errcode) static inline void hvm_inject_page_fault(int errcode, unsigned long cr2) { struct x86_event event = { - .vector = TRAP_page_fault, + .vector = X86_EXC_PF, .type = X86_EVENTTYPE_HW_EXCEPTION, .error_code = errcode, .cr2 = cr2, @@ -564,9 +564,9 @@ static inline void hvm_invlpg(struct vcpu *v, unsigned long linear) (X86_CR4_VMXE | X86_CR4_PAE | X86_CR4_MCE)) /* These exceptions must always be intercepted. */ -#define HVM_TRAP_MASK ((1U << TRAP_debug) | \ - (1U << TRAP_alignment_check) | \ - (1U << TRAP_machine_check)) +#define HVM_TRAP_MASK ((1U << X86_EXC_DB) | \ + (1U << X86_EXC_AC) | \ + (1U << X86_EXC_MC)) /* Called in boot/resume paths. Must cope with no HVM support. */ static inline int hvm_cpu_up(void) diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 678daeb484..0eaa2c3094 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -17,34 +17,6 @@ #include #include -/* - * Trap/fault mnemonics. - */ -#define TRAP_divide_error 0 -#define TRAP_debug 1 -#define TRAP_nmi 2 -#define TRAP_int3 3 -#define TRAP_overflow 4 -#define TRAP_bounds 5 -#define TRAP_invalid_op 6 -#define TRAP_no_device 7 -#define TRAP_double_fault 8 -#define TRAP_copro_seg 9 -#define TRAP_invalid_tss 10 -#define TRAP_no_segment 11 -#define TRAP_stack_error 12 -#define TRAP_gp_fault 13 -#define TRAP_page_fault 14 -#define TRAP_spurious_int 15 -#define TRAP_copro_error 16 -#define TRAP_alignment_check 17 -#define TRAP_machine_check 18 -#define TRAP_simd_error 19 -#define TRAP_virtualisation 20 -#define TRAP_nr 32 - -#define TRAP_HAVE_EC X86_EXC_HAVE_EC - /* Set for entry via SYSCALL. Informs return code to use SYSRETQ not IRETQ. */ /* NB. Same as VGCF_in_syscall. No bits in common with any other TRAP_ defn. */ #define TRAP_syscall 256 @@ -403,18 +375,18 @@ static inline void set_ist(idt_entry_t *idt, unsigned int ist) static inline void enable_each_ist(idt_entry_t *idt) { - set_ist(&idt[TRAP_double_fault], IST_DF); - set_ist(&idt[TRAP_nmi], IST_NMI); - set_ist(&idt[TRAP_machine_check], IST_MCE); - set_ist(&idt[TRAP_debug], IST_DB); + set_ist(&idt[X86_EXC_DF], IST_DF); + set_ist(&idt[X86_EXC_NMI], IST_NMI); + set_ist(&idt[X86_EXC_MC], IST_MCE); + set_ist(&idt[X86_EXC_DB], IST_DB); } static inline void disable_each_ist(idt_entry_t *idt) { - set_ist(&idt[TRAP_double_fault], IST_NONE); - set_ist(&idt[TRAP_nmi], IST_NONE); - set_ist(&idt[TRAP_machine_check], IST_NONE); - set_ist(&idt[TRAP_debug], IST_NONE); + set_ist(&idt[X86_EXC_DF], IST_NONE); + set_ist(&idt[X86_EXC_NMI], IST_NONE); + set_ist(&idt[X86_EXC_MC], IST_NONE); + set_ist(&idt[X86_EXC_DB], IST_NONE); } #define IDT_ENTRIES 256 diff --git a/xen/arch/x86/include/asm/x86-defns.h b/xen/arch/x86/include/asm/x86-defns.h index fe1caba6f8..e350227e57 100644 --- a/xen/arch/x86/include/asm/x86-defns.h +++ b/xen/arch/x86/include/asm/x86-defns.h @@ -147,6 +147,8 @@ #define X86_EXC_VC 29 /* VMM Communication */ #define X86_EXC_SX 30 /* Security Exception */ +#define X86_EXC_NUM 32 /* 32 reserved vectors */ + /* Bitmap of exceptions which have error codes. */ #define X86_EXC_HAVE_EC \ ((1u << X86_EXC_DF) | (1u << X86_EXC_TS) | (1u << X86_EXC_NP) | \ diff --git a/xen/arch/x86/machine_kexec.c b/xen/arch/x86/machine_kexec.c index 1dd0c9aad8..d50772ad6c 100644 --- a/xen/arch/x86/machine_kexec.c +++ b/xen/arch/x86/machine_kexec.c @@ -170,7 +170,7 @@ void machine_kexec(struct kexec_image *image) { if ( idt_tables[i] == NULL ) continue; - _update_gate_addr_lower(&idt_tables[i][TRAP_machine_check], &trap_nop); + _update_gate_addr_lower(&idt_tables[i][X86_EXC_MC], &trap_nop); } /* Reset CPUID masking and faulting to the host's default. */ diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 0fe14faa5f..8e6d000950 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -1232,7 +1232,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domain *l1e_owner) gprintk(XENLOG_WARNING, "Attempt to implicitly unmap %pd's grant PTE %" PRIpte "\n", l1e_owner, l1e_get_intpte(l1e)); - pv_inject_hw_exception(TRAP_gp_fault, 0); + pv_inject_hw_exception(X86_EXC_GP, 0); } #endif diff --git a/xen/arch/x86/mm/mem_access.c b/xen/arch/x86/mm/mem_access.c index f3aed9fcc9..676d922973 100644 --- a/xen/arch/x86/mm/mem_access.c +++ b/xen/arch/x86/mm/mem_access.c @@ -219,7 +219,7 @@ bool p2m_mem_access_check(paddr_t gpa, unsigned long gla, npfec.kind == npfec_kind_in_gpt ) { v->arch.vm_event->send_event = true; - hvm_emulate_one_vm_event(EMUL_KIND_NORMAL, TRAP_invalid_op, X86_EVENT_NO_EC); + hvm_emulate_one_vm_event(EMUL_KIND_NORMAL, X86_EXC_UD, X86_EVENT_NO_EC); v->arch.vm_event->send_event = false; return true; diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index cc84af0192..3a00daf9c4 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -98,7 +98,7 @@ static int hvm_translate_virtual_addr( */ if ( is_x86_user_segment(seg) ) x86_emul_hw_exception( - (seg == x86_seg_ss) ? TRAP_stack_error : TRAP_gp_fault, + (seg == x86_seg_ss) ? X86_EXC_SS : X86_EXC_GP, 0, &sh_ctxt->ctxt); return X86EMUL_EXCEPTION; } diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index ddcf34972d..f86cc5b079 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -2736,9 +2736,9 @@ static int cf_check sh_page_fault( * stream under Xen's feet. */ if ( emul_ctxt.ctxt.event.type == X86_EVENTTYPE_HW_EXCEPTION && - ((emul_ctxt.ctxt.event.vector == TRAP_page_fault) || - (((emul_ctxt.ctxt.event.vector == TRAP_gp_fault) || - (emul_ctxt.ctxt.event.vector == TRAP_stack_error)) && + ((emul_ctxt.ctxt.event.vector == X86_EXC_PF) || + (((emul_ctxt.ctxt.event.vector == X86_EXC_GP) || + (emul_ctxt.ctxt.event.vector == X86_EXC_SS)) && emul_ctxt.ctxt.event.error_code == 0)) ) hvm_inject_event(&emul_ctxt.ctxt.event); else @@ -2800,7 +2800,7 @@ static int cf_check sh_page_fault( #endif if ( emul_ctxt.ctxt.retire.singlestep ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); #if GUEST_PAGING_LEVELS == 3 /* PAE guest */ /* @@ -2841,7 +2841,7 @@ static int cf_check sh_page_fault( TRACE_SHADOW_PATH_FLAG(TRCE_SFLAG_EMULATION_LAST_FAILED); if ( emul_ctxt.ctxt.retire.singlestep ) - hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); break; /* Don't emulate again if we failed! */ } diff --git a/xen/arch/x86/pv/callback.c b/xen/arch/x86/pv/callback.c index 067ee3b795..ca3bc30e91 100644 --- a/xen/arch/x86/pv/callback.c +++ b/xen/arch/x86/pv/callback.c @@ -29,12 +29,12 @@ static int register_guest_nmi_callback(unsigned long address) { struct vcpu *curr = current; struct domain *d = curr->domain; - struct trap_info *t = &curr->arch.pv.trap_ctxt[TRAP_nmi]; + struct trap_info *t = &curr->arch.pv.trap_ctxt[X86_EXC_NMI]; if ( !is_canonical_address(address) ) return -EINVAL; - t->vector = TRAP_nmi; + t->vector = X86_EXC_NMI; t->flags = 0; t->cs = (is_pv_32bit_domain(d) ? FLAT_COMPAT_KERNEL_CS : FLAT_KERNEL_CS); @@ -54,7 +54,7 @@ static int register_guest_nmi_callback(unsigned long address) static void unregister_guest_nmi_callback(void) { struct vcpu *curr = current; - struct trap_info *t = &curr->arch.pv.trap_ctxt[TRAP_nmi]; + struct trap_info *t = &curr->arch.pv.trap_ctxt[X86_EXC_NMI]; memset(t, 0, sizeof(*t)); } diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c index 758a20ad9d..9524982e7d 100644 --- a/xen/arch/x86/pv/emul-gate-op.c +++ b/xen/arch/x86/pv/emul-gate-op.c @@ -185,12 +185,12 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) (((ar >> 13) & 3) < (regs->cs & 3)) || ((ar & _SEGMENT_TYPE) != 0xc00) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } if ( !(ar & _SEGMENT_P) ) { - pv_inject_hw_exception(TRAP_no_segment, regs->error_code); + pv_inject_hw_exception(X86_EXC_NP, regs->error_code); return; } dpl = (ar >> 13) & 3; @@ -206,7 +206,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) !(ar & _SEGMENT_P) || !(ar & _SEGMENT_CODE) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } @@ -219,7 +219,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) if ( PTR_ERR(state) == -X86EMUL_EXCEPTION ) pv_inject_event(&ctxt.ctxt.event); else - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } @@ -268,7 +268,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) (opnd_sel & ~3) != regs->error_code || dpl < (opnd_sel & 3) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } @@ -279,17 +279,17 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) ((ar >> 13) & 3) > (regs->cs & 3) : ((ar >> 13) & 3) != (regs->cs & 3)) ) { - pv_inject_hw_exception(TRAP_gp_fault, sel); + pv_inject_hw_exception(X86_EXC_GP, sel); return; } if ( !(ar & _SEGMENT_P) ) { - pv_inject_hw_exception(TRAP_no_segment, sel); + pv_inject_hw_exception(X86_EXC_NP, sel); return; } if ( off > limit ) { - pv_inject_hw_exception(TRAP_gp_fault, 0); + pv_inject_hw_exception(X86_EXC_GP, 0); return; } @@ -316,7 +316,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) /* Inner stack known only for kernel ring. */ if ( (sel & 3) != GUEST_KERNEL_RPL(v->domain) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } esp = v->arch.pv.kernel_sp; @@ -328,19 +328,19 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) (ar & _SEGMENT_CODE) || !(ar & _SEGMENT_WR) ) { - pv_inject_hw_exception(TRAP_invalid_tss, ss & ~3); + pv_inject_hw_exception(X86_EXC_TS, ss & ~3); return; } if ( !(ar & _SEGMENT_P) || !check_stack_limit(ar, limit, esp, (4 + nparm) * 4) ) { - pv_inject_hw_exception(TRAP_stack_error, ss & ~3); + pv_inject_hw_exception(X86_EXC_SS, ss & ~3); return; } stkp = (unsigned int *)(unsigned long)((unsigned int)base + esp); if ( !compat_access_ok(stkp - 4 - nparm, 16 + nparm * 4) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } push(regs->ss); @@ -356,12 +356,12 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) (ar & _SEGMENT_CODE) || !(ar & _SEGMENT_WR) || !check_stack_limit(ar, limit, esp + nparm * 4, nparm * 4) ) - return pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + return pv_inject_hw_exception(X86_EXC_GP, regs->error_code); ustkp = (unsigned int *)(unsigned long) ((unsigned int)base + regs->esp + nparm * 4); if ( !compat_access_ok(ustkp - nparm, 0 + nparm * 4) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } do @@ -387,18 +387,18 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) if ( !pv_emul_read_descriptor(ss, v, &base, &limit, &ar, 0) || ((ar >> 13) & 3) != (sel & 3) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } if ( !check_stack_limit(ar, limit, esp, 2 * 4) ) { - pv_inject_hw_exception(TRAP_stack_error, 0); + pv_inject_hw_exception(X86_EXC_SS, 0); return; } stkp = (unsigned int *)(unsigned long)((unsigned int)base + esp); if ( !compat_access_ok(stkp - 2, 2 * 4) ) { - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; } } diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c index 2c07eed9a0..32eb34e1a2 100644 --- a/xen/arch/x86/pv/emul-inv-op.c +++ b/xen/arch/x86/pv/emul-inv-op.c @@ -57,7 +57,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs) !guest_kernel_mode(current, regs) ) { regs->rip = eip; - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return EXCRET_fault_fixed; } diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 04416f1979..a30a172066 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -609,8 +609,7 @@ static int pv_emul_virt_to_linear(unsigned long base, unsigned long offset, rc = X86EMUL_EXCEPTION; if ( unlikely(rc == X86EMUL_EXCEPTION) ) - x86_emul_hw_exception(seg != x86_seg_ss ? TRAP_gp_fault - : TRAP_stack_error, + x86_emul_hw_exception(seg != x86_seg_ss ? X86_EXC_GP : X86_EXC_SS, 0, ctxt); return rc; @@ -645,7 +644,7 @@ static int cf_check rep_ins( (sreg.type & (_SEGMENT_CODE >> 8)) || !(sreg.type & (_SEGMENT_WR >> 8)) ) { - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return X86EMUL_EXCEPTION; } @@ -711,8 +710,7 @@ static int cf_check rep_outs( ((sreg.type & (_SEGMENT_CODE >> 8)) && !(sreg.type & (_SEGMENT_WR >> 8))) ) { - x86_emul_hw_exception(seg != x86_seg_ss ? TRAP_gp_fault - : TRAP_stack_error, + x86_emul_hw_exception(seg != x86_seg_ss ? X86_EXC_GP : X86_EXC_SS, 0, ctxt); return X86EMUL_EXCEPTION; } @@ -893,7 +891,7 @@ static int cf_check read_msr( if ( (ret = guest_rdmsr(curr, reg, val)) != X86EMUL_UNHANDLEABLE ) { if ( ret == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); goto done; } @@ -1041,7 +1039,7 @@ static int cf_check write_msr( if ( (ret = guest_wrmsr(curr, reg, val)) != X86EMUL_UNHANDLEABLE ) { if ( ret == X86EMUL_EXCEPTION ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return ret; } @@ -1376,7 +1374,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) { curr->arch.dr6 |= ctxt.bpmatch | DR_STATUS_RESERVED_ONE; if ( !(curr->arch.pv.trap_bounce.flags & TBF_EXCEPTION) ) - pv_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); } /* fall through */ case X86EMUL_RETRY: diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 0a7907ec5e..2eff77c577 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -86,7 +86,7 @@ void pv_emul_instruction_done(struct cpu_user_regs *regs, unsigned long rip) if ( regs->eflags & X86_EFLAGS_TF ) { current->arch.dr6 |= DR_STEP | DR_STATUS_RESERVED_ONE; - pv_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); } } diff --git a/xen/arch/x86/pv/iret.c b/xen/arch/x86/pv/iret.c index 316a23e77e..d3a1fb2c68 100644 --- a/xen/arch/x86/pv/iret.c +++ b/xen/arch/x86/pv/iret.c @@ -186,7 +186,7 @@ int compat_iret(void) regs->esp = ksp; regs->ss = v->arch.pv.kernel_ss; - ti = &v->arch.pv.trap_ctxt[TRAP_gp_fault]; + ti = &v->arch.pv.trap_ctxt[X86_EXC_GP]; if ( TI_GET_IF(ti) ) eflags &= ~X86_EFLAGS_IF; regs->eflags &= ~(X86_EFLAGS_VM|X86_EFLAGS_RF| diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 0d02c7d2ab..e17ed4e437 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -390,7 +390,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) * or a guest playing with the instruction stream under Xen's feet. */ if ( ctxt.event.type == X86_EVENTTYPE_HW_EXCEPTION && - ctxt.event.vector == TRAP_page_fault ) + ctxt.event.vector == X86_EXC_PF ) pv_inject_event(&ctxt.event); else gdprintk(XENLOG_WARNING, @@ -400,7 +400,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) /* Fallthrough */ case X86EMUL_OKAY: if ( ctxt.retire.singlestep ) - pv_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); /* Fallthrough */ case X86EMUL_RETRY: diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index 97fe54b5ee..07040ced4a 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -43,7 +43,7 @@ void pv_inject_event(const struct x86_event *event) if ( event->type == X86_EVENTTYPE_HW_EXCEPTION ) { ASSERT(vector < 32); - use_error_code = TRAP_HAVE_EC & (1u << vector); + use_error_code = X86_EXC_HAVE_EC & (1u << vector); } else { @@ -63,7 +63,7 @@ void pv_inject_event(const struct x86_event *event) tb->eip = ti->address; if ( event->type == X86_EVENTTYPE_HW_EXCEPTION && - vector == TRAP_page_fault ) + vector == X86_EXC_PF ) { curr->arch.pv.ctrlreg[2] = event->cr2; arch_set_cr2(curr, event->cr2); @@ -93,7 +93,7 @@ void pv_inject_event(const struct x86_event *event) "Unhandled: vec %u, %s[%04x]\n", vector, vector_name(vector), error_code); - if ( vector == TRAP_page_fault ) + if ( vector == X86_EXC_PF ) show_page_walk(event->cr2); } } @@ -107,7 +107,7 @@ bool set_guest_machinecheck_trapbounce(void) struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; - pv_inject_hw_exception(TRAP_machine_check, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_MC, X86_EVENT_NO_EC); tb->flags &= ~TBF_EXCEPTION; /* not needed for MCE delivery path */ return !null_trap_bounce(curr, tb); @@ -122,7 +122,7 @@ bool set_guest_nmi_trapbounce(void) struct vcpu *curr = current; struct trap_bounce *tb = &curr->arch.pv.trap_bounce; - pv_inject_hw_exception(TRAP_nmi, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_NMI, X86_EVENT_NO_EC); tb->flags &= ~TBF_EXCEPTION; /* not needed for NMI delivery path */ return !null_trap_bounce(curr, tb); diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index e4f8b158e1..58e263056a 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -806,7 +806,7 @@ void fatal_trap(const struct cpu_user_regs *regs, bool show_remote) show_execution_state(regs); - if ( trapnr == TRAP_page_fault ) + if ( trapnr == X86_EXC_PF ) show_page_walk(read_cr2()); if ( show_remote ) @@ -945,7 +945,7 @@ void do_trap(struct cpu_user_regs *regs) if ( guest_mode(regs) ) { pv_inject_hw_exception(trapnr, - (TRAP_HAVE_EC & (1u << trapnr)) + (X86_EXC_HAVE_EC & (1u << trapnr)) ? regs->error_code : X86_EVENT_NO_EC); return; } @@ -1174,7 +1174,7 @@ void do_invalid_op(struct cpu_user_regs *regs) if ( likely(guest_mode(regs)) ) { if ( pv_emulate_invalid_op(regs) ) - pv_inject_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); return; } @@ -1203,11 +1203,11 @@ void do_invalid_op(struct cpu_user_regs *regs) if ( likely(extable_fixup(regs, true)) ) return; - if ( debugger_trap_fatal(TRAP_invalid_op, regs) ) + if ( debugger_trap_fatal(X86_EXC_UD, regs) ) return; show_execution_state(regs); - panic("FATAL TRAP: vector = %d (invalid opcode)\n", TRAP_invalid_op); + panic("FATAL TRAP: vector = %d (invalid opcode)\n", X86_EXC_UD); } void do_int3(struct cpu_user_regs *regs) @@ -1219,7 +1219,7 @@ void do_int3(struct cpu_user_regs *regs) if ( likely(extable_fixup(regs, true)) ) return; - if ( !debugger_trap_fatal(TRAP_int3, regs) ) + if ( !debugger_trap_fatal(X86_EXC_BP, regs) ) printk(XENLOG_DEBUG "Hit embedded breakpoint at %p [%ps]\n", _p(regs->rip), _p(regs->rip)); @@ -1228,12 +1228,12 @@ void do_int3(struct cpu_user_regs *regs) if ( guest_kernel_mode(curr, regs) && curr->domain->debugger_attached ) { - curr->arch.gdbsx_vcpu_event = TRAP_int3; + curr->arch.gdbsx_vcpu_event = X86_EXC_BP; domain_pause_for_debugger(); return; } - pv_inject_hw_exception(TRAP_int3, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_BP, X86_EVENT_NO_EC); } #ifdef CONFIG_PV @@ -1267,7 +1267,7 @@ static int handle_ldt_mapping_fault(unsigned int offset, { uint16_t ec = (offset & ~(X86_XEC_EXT | X86_XEC_IDT)) | X86_XEC_TI; - pv_inject_hw_exception(TRAP_gp_fault, ec); + pv_inject_hw_exception(X86_EXC_GP, ec); } else /* else pass the #PF back, with adjusted %cr2. */ @@ -1555,7 +1555,7 @@ void do_page_fault(struct cpu_user_regs *regs) } fatal: - if ( debugger_trap_fatal(TRAP_page_fault, regs) ) + if ( debugger_trap_fatal(X86_EXC_PF, regs) ) return; show_execution_state(regs); @@ -1663,7 +1663,7 @@ void do_general_protection(struct cpu_user_regs *regs) } /* Pass on GPF as is. */ - pv_inject_hw_exception(TRAP_gp_fault, regs->error_code); + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); return; #endif @@ -1673,7 +1673,7 @@ void do_general_protection(struct cpu_user_regs *regs) return; hardware_gp: - if ( debugger_trap_fatal(TRAP_gp_fault, regs) ) + if ( debugger_trap_fatal(X86_EXC_GP, regs) ) return; show_execution_state(regs); @@ -1881,7 +1881,7 @@ void do_device_not_available(struct cpu_user_regs *regs) if ( curr->arch.pv.ctrlreg[0] & X86_CR0_TS ) { - pv_inject_hw_exception(TRAP_no_device, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_NM, X86_EVENT_NO_EC); curr->arch.pv.ctrlreg[0] &= ~X86_CR0_TS; } else @@ -1945,7 +1945,7 @@ void do_debug(struct cpu_user_regs *regs) return; } #endif - if ( !debugger_trap_fatal(TRAP_debug, regs) ) + if ( !debugger_trap_fatal(X86_EXC_DB, regs) ) { WARN(); regs->eflags &= ~X86_EFLAGS_TF; @@ -2013,7 +2013,7 @@ void do_debug(struct cpu_user_regs *regs) return; } - pv_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC); + pv_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); } void do_entry_CP(struct cpu_user_regs *regs) @@ -2130,25 +2130,25 @@ void __init init_idt_traps(void) * saved. The page-fault handler also needs interrupts disabled until %cr2 * has been read and saved on the stack. */ - set_intr_gate(TRAP_divide_error,÷_error); - set_intr_gate(TRAP_debug,&debug); - set_intr_gate(TRAP_nmi,&nmi); - set_swint_gate(TRAP_int3,&int3); /* usable from all privileges */ - set_swint_gate(TRAP_overflow,&overflow); /* usable from all privileges */ - set_intr_gate(TRAP_bounds,&bounds); - set_intr_gate(TRAP_invalid_op,&invalid_op); - set_intr_gate(TRAP_no_device,&device_not_available); - set_intr_gate(TRAP_double_fault,&double_fault); - set_intr_gate(TRAP_invalid_tss,&invalid_TSS); - set_intr_gate(TRAP_no_segment,&segment_not_present); - set_intr_gate(TRAP_stack_error,&stack_segment); - set_intr_gate(TRAP_gp_fault,&general_protection); - set_intr_gate(TRAP_page_fault,&early_page_fault); - set_intr_gate(TRAP_copro_error,&coprocessor_error); - set_intr_gate(TRAP_alignment_check,&alignment_check); - set_intr_gate(TRAP_machine_check,&machine_check); - set_intr_gate(TRAP_simd_error,&simd_coprocessor_error); - set_intr_gate(X86_EXC_CP, entry_CP); + set_intr_gate(X86_EXC_DE, divide_error); + set_intr_gate(X86_EXC_DB, debug); + set_intr_gate(X86_EXC_NMI, nmi); + set_swint_gate(X86_EXC_BP, int3); /* usable from all privileges */ + set_swint_gate(X86_EXC_OF, overflow); /* usable from all privileges */ + set_intr_gate(X86_EXC_BR, bounds); + set_intr_gate(X86_EXC_UD, invalid_op); + set_intr_gate(X86_EXC_NM, device_not_available); + set_intr_gate(X86_EXC_DF, double_fault); + set_intr_gate(X86_EXC_TS, invalid_TSS); + set_intr_gate(X86_EXC_NP, segment_not_present); + set_intr_gate(X86_EXC_SS, stack_segment); + set_intr_gate(X86_EXC_GP, general_protection); + set_intr_gate(X86_EXC_PF, early_page_fault); + set_intr_gate(X86_EXC_MF, coprocessor_error); + set_intr_gate(X86_EXC_AC, alignment_check); + set_intr_gate(X86_EXC_MC, machine_check); + set_intr_gate(X86_EXC_XM, simd_coprocessor_error); + set_intr_gate(X86_EXC_CP, entry_CP); /* Specify dedicated interrupt stacks for NMI, #DF, and #MC. */ enable_each_ist(idt_table); @@ -2167,7 +2167,7 @@ void __init trap_init(void) unsigned int vector; /* Replace early pagefault with real pagefault handler. */ - set_intr_gate(TRAP_page_fault, &page_fault); + set_intr_gate(X86_EXC_PF, &page_fault); pv_trap_init(); diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index b86d38d1c5..bd5abd8040 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -208,13 +208,13 @@ ENTRY(compat_syscall) leal (,%rcx,TBF_INTERRUPT),%ecx UNLIKELY_START(z, compat_syscall_gpf) movq VCPU_trap_ctxt(%rbx),%rdi - movl $TRAP_gp_fault,UREGS_entry_vector(%rsp) + movl $X86_EXC_GP, UREGS_entry_vector(%rsp) subl $2,UREGS_rip(%rsp) /* %r12 is still zero at this point. */ mov %r12d, TRAPBOUNCE_error_code(%rdx) - movl TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_eip(%rdi),%eax - movzwl TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_cs(%rdi),%esi - testb $4,TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_flags(%rdi) + movl X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_eip(%rdi),%eax + movzwl X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_cs(%rdi),%esi + testb $4, X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_flags(%rdi) setnz %cl leal TBF_EXCEPTION|TBF_EXCEPTION_ERRCODE(,%rcx,TBF_INTERRUPT),%ecx UNLIKELY_END(compat_syscall_gpf) @@ -226,9 +226,9 @@ UNLIKELY_END(compat_syscall_gpf) ENTRY(compat_sysenter) CR4_PV32_RESTORE movq VCPU_trap_ctxt(%rbx),%rcx - cmpb $TRAP_gp_fault,UREGS_entry_vector(%rsp) + cmpb $X86_EXC_GP, UREGS_entry_vector(%rsp) movzwl VCPU_sysenter_sel(%rbx),%eax - movzwl TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_cs(%rcx),%ecx + movzwl X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_cs(%rcx),%ecx cmovel %ecx,%eax testl $~3,%eax movl $FLAT_COMPAT_USER_SS,UREGS_ss(%rsp) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 7675a59ff0..8b77d7113b 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -370,10 +370,10 @@ UNLIKELY_END(sysenter_nt_set) leal (,%rcx,TBF_INTERRUPT),%ecx UNLIKELY_START(z, sysenter_gpf) movq VCPU_trap_ctxt(%rbx),%rsi - movl $TRAP_gp_fault,UREGS_entry_vector(%rsp) + movl $X86_EXC_GP, UREGS_entry_vector(%rsp) movl %eax,TRAPBOUNCE_error_code(%rdx) - movq TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_eip(%rsi),%rax - testb $4,TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_flags(%rsi) + movq X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_eip(%rsi),%rax + testb $4, X86_EXC_GP * TRAPINFO_sizeof + TRAPINFO_flags(%rsi) setnz %cl leal TBF_EXCEPTION|TBF_EXCEPTION_ERRCODE(,%rcx,TBF_INTERRUPT),%ecx UNLIKELY_END(sysenter_gpf) @@ -464,7 +464,7 @@ int80_slow_path: * IDT entry with DPL==0. */ movl $((0x80 << 3) | X86_XEC_IDT),UREGS_error_code(%rsp) - movl $TRAP_gp_fault,UREGS_entry_vector(%rsp) + movl $X86_EXC_GP, UREGS_entry_vector(%rsp) /* A GPF wouldn't have incremented the instruction pointer. */ subq $2,UREGS_rip(%rsp) /* @@ -650,7 +650,7 @@ ret_from_intr: .section .init.text, "ax", @progbits ENTRY(early_page_fault) ENDBR64 - movl $TRAP_page_fault, 4(%rsp) + movl $X86_EXC_PF, 4(%rsp) SAVE_ALL movq %rsp, %rdi call do_early_page_fault @@ -710,7 +710,7 @@ ENTRY(common_interrupt) ENTRY(page_fault) ENDBR64 - movl $TRAP_page_fault,4(%rsp) + movl $X86_EXC_PF, 4(%rsp) /* No special register assumptions. */ GLOBAL(handle_exception) ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP @@ -768,13 +768,13 @@ handle_exception_saved: jnz .Lcr4_pv32_done /* * The below effectively is - * if ( regs->entry_vector == TRAP_page_fault && + * if ( regs->entry_vector == X86_EXC_PF && * (regs->error_code & PFEC_page_present) && * !(regs->error_code & ~(PFEC_write_access|PFEC_insn_fetch)) ) * goto compat_test_all_events; */ mov $PFEC_page_present,%al - cmpb $TRAP_page_fault,UREGS_entry_vector(%rsp) + cmpb $X86_EXC_PF, UREGS_entry_vector(%rsp) jne .Lcr4_pv32_done xor UREGS_error_code(%rsp),%eax test $~(PFEC_write_access|PFEC_insn_fetch),%eax @@ -886,80 +886,80 @@ FATAL_exception_with_ints_disabled: ENTRY(divide_error) ENDBR64 pushq $0 - movl $TRAP_divide_error,4(%rsp) + movl $X86_EXC_DE, 4(%rsp) jmp handle_exception ENTRY(coprocessor_error) ENDBR64 pushq $0 - movl $TRAP_copro_error,4(%rsp) + movl $X86_EXC_MF, 4(%rsp) jmp handle_exception ENTRY(simd_coprocessor_error) ENDBR64 pushq $0 - movl $TRAP_simd_error,4(%rsp) + movl $X86_EXC_XM, 4(%rsp) jmp handle_exception ENTRY(device_not_available) ENDBR64 pushq $0 - movl $TRAP_no_device,4(%rsp) + movl $X86_EXC_NM, 4(%rsp) jmp handle_exception ENTRY(debug) ENDBR64 pushq $0 - movl $TRAP_debug,4(%rsp) + movl $X86_EXC_DB, 4(%rsp) jmp handle_ist_exception ENTRY(int3) ENDBR64 pushq $0 - movl $TRAP_int3,4(%rsp) + movl $X86_EXC_BP, 4(%rsp) jmp handle_exception ENTRY(overflow) ENDBR64 pushq $0 - movl $TRAP_overflow,4(%rsp) + movl $X86_EXC_OF, 4(%rsp) jmp handle_exception ENTRY(bounds) ENDBR64 pushq $0 - movl $TRAP_bounds,4(%rsp) + movl $X86_EXC_BR, 4(%rsp) jmp handle_exception ENTRY(invalid_op) ENDBR64 pushq $0 - movl $TRAP_invalid_op,4(%rsp) + movl $X86_EXC_UD, 4(%rsp) jmp handle_exception ENTRY(invalid_TSS) ENDBR64 - movl $TRAP_invalid_tss,4(%rsp) + movl $X86_EXC_TS, 4(%rsp) jmp handle_exception ENTRY(segment_not_present) ENDBR64 - movl $TRAP_no_segment,4(%rsp) + movl $X86_EXC_NP, 4(%rsp) jmp handle_exception ENTRY(stack_segment) ENDBR64 - movl $TRAP_stack_error,4(%rsp) + movl $X86_EXC_SS, 4(%rsp) jmp handle_exception ENTRY(general_protection) ENDBR64 - movl $TRAP_gp_fault,4(%rsp) + movl $X86_EXC_GP, 4(%rsp) jmp handle_exception ENTRY(alignment_check) ENDBR64 - movl $TRAP_alignment_check,4(%rsp) + movl $X86_EXC_AC, 4(%rsp) jmp handle_exception ENTRY(entry_CP) @@ -969,7 +969,7 @@ ENTRY(entry_CP) ENTRY(double_fault) ENDBR64 - movl $TRAP_double_fault,4(%rsp) + movl $X86_EXC_DF, 4(%rsp) /* Set AC to reduce chance of further SMAP faults */ ALTERNATIVE "", stac, X86_FEATURE_XEN_SMAP SAVE_ALL @@ -995,7 +995,7 @@ ENTRY(double_fault) ENTRY(nmi) ENDBR64 pushq $0 - movl $TRAP_nmi,4(%rsp) + movl $X86_EXC_NMI, 4(%rsp) handle_ist_exception: ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP SAVE_ALL @@ -1091,7 +1091,7 @@ handle_ist_exception: .L_ist_dispatch_done: mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14) mov %bl, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) - cmpb $TRAP_nmi,UREGS_entry_vector(%rsp) + cmpb $X86_EXC_NMI, UREGS_entry_vector(%rsp) jne ret_from_intr /* We want to get straight to the IRET on the NMI exit path. */ @@ -1124,7 +1124,7 @@ handle_ist_exception: ENTRY(machine_check) ENDBR64 pushq $0 - movl $TRAP_machine_check,4(%rsp) + movl $X86_EXC_MC, 4(%rsp) jmp handle_ist_exception /* No op trap handler. Required for kexec crash path. */ @@ -1168,7 +1168,7 @@ autogen_stubs: /* Automatically generated stubs. */ /* Reserved exceptions, heading towards do_unhandled_trap(). */ .elseif vec == X86_EXC_CSO || vec == X86_EXC_SPV || \ - vec == X86_EXC_VE || (vec > X86_EXC_CP && vec < TRAP_nr) + vec == X86_EXC_VE || (vec > X86_EXC_CP && vec < X86_EXC_NUM) 1: ENDBR64 diff --git a/xen/arch/x86/x86_emulate/util-xen.c b/xen/arch/x86/x86_emulate/util-xen.c index 04b1cb8ca0..95c15492a8 100644 --- a/xen/arch/x86/x86_emulate/util-xen.c +++ b/xen/arch/x86/x86_emulate/util-xen.c @@ -138,7 +138,7 @@ int cf_check x86emul_read_xcr(unsigned int reg, uint64_t *val, break; /* fall through */ default: - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return X86EMUL_EXCEPTION; } @@ -159,7 +159,7 @@ int cf_check x86emul_write_xcr(unsigned int reg, uint64_t val, default: gp_fault: if ( ctxt ) - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return X86EMUL_EXCEPTION; } @@ -207,7 +207,7 @@ int cf_check x86emul_read_dr(unsigned int reg, unsigned long *val, ud_fault: default: if ( ctxt ) - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + x86_emul_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC, ctxt); return X86EMUL_EXCEPTION; } @@ -229,11 +229,11 @@ int cf_check x86emul_write_dr(unsigned int reg, unsigned long val, return X86EMUL_OKAY; case -ENODEV: - x86_emul_hw_exception(TRAP_invalid_op, X86_EVENT_NO_EC, ctxt); + x86_emul_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC, ctxt); return X86EMUL_EXCEPTION; default: - x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt); + x86_emul_hw_exception(X86_EXC_GP, 0, ctxt); return X86EMUL_EXCEPTION; } } diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 0139d16da7..c713e425c0 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -90,7 +90,7 @@ struct x86_event { uint8_t type; /* X86_EVENTTYPE_* */ uint8_t insn_len; /* Instruction length */ int32_t error_code; /* X86_EVENT_NO_EC if n/a */ - unsigned long cr2; /* Only for TRAP_page_fault h/w exception */ + unsigned long cr2; /* Only for X86_EXC_PF h/w exception */ }; /* @@ -838,7 +838,7 @@ static inline void x86_emul_pagefault( { ASSERT(!ctxt->event_pending); - ctxt->event.vector = 14; /* TRAP_page_fault */ + ctxt->event.vector = X86_EXC_PF; ctxt->event.type = X86_EVENTTYPE_HW_EXCEPTION; ctxt->event.error_code = error_code; ctxt->event.cr2 = cr2; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Apr 07 09:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Apr 2023 09:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.519048.806190 (Exim 4.92) (envelope-from ) id 1pkidX-0007vy-Gk; Fri, 07 Apr 2023 09:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 519048.806190; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0XH1L5HCgBhCMafMlA7WWPCkAjILGrJI35FJxO4idaQ=; b=HywpPbRF4xstZj0iHJghZIJKlr e3rG9Y/2gk+YKEnJF2qOFR5NjBvXQ/B4DjdZR2qRkEK3LFEDIC74JoyX/c5QWReQFkw8Xyoak698J L2PyjK+mLR8JITW/wE/fE8bdrGBTxpS5Wt1QDxyFlPExy8gEim1x0KK2a2rmI4ldJt0Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/emul: Use existing X86_EXC_* constants Message-Id: Date: Fri, 07 Apr 2023 09:44:02 +0000 commit d357f5f1e67bcad0545c4a5f56c5750981ced42c Author: Andrew Cooper AuthorDate: Fri Jun 8 15:38:29 2018 +0100 Commit: Andrew Cooper CommitDate: Thu Apr 6 13:56:51 2023 +0100 x86/emul: Use existing X86_EXC_* constants ... rather than having separate definitions locally. EXC_HAS_EC in particular is missing #CP, #VC and #SX vs X86_EXC_HAVE_EC. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/x86_emulate/x86_emulate.c | 608 ++++++++++++++++----------------- 1 file changed, 294 insertions(+), 314 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index c69f7c65f5..8aa23b929c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -135,28 +135,6 @@ static const uint8_t sse_prefix[] = { 0x66, 0xf3, 0xf2 }; /* MXCSR bit definitions. */ #define MXCSR_MM (1U << 17) -/* Exception definitions. */ -#define EXC_DE 0 -#define EXC_DB 1 -#define EXC_BP 3 -#define EXC_OF 4 -#define EXC_BR 5 -#define EXC_UD 6 -#define EXC_NM 7 -#define EXC_DF 8 -#define EXC_TS 10 -#define EXC_NP 11 -#define EXC_SS 12 -#define EXC_GP 13 -#define EXC_PF 14 -#define EXC_MF 16 -#define EXC_AC 17 -#define EXC_XM 19 - -#define EXC_HAS_EC \ - ((1u << EXC_DF) | (1u << EXC_TS) | (1u << EXC_NP) | \ - (1u << EXC_SS) | (1u << EXC_GP) | (1u << EXC_PF) | (1u << EXC_AC)) - /* Segment selector error code bits. */ #define ECODE_EXT (1 << 0) #define ECODE_IDT (1 << 1) @@ -360,11 +338,11 @@ do { \ #define validate_far_branch(cs, ip) ({ \ if ( sizeof(ip) <= 4 ) { \ ASSERT(!ctxt->lma); \ - generate_exception_if((ip) > (cs)->limit, EXC_GP, 0); \ + generate_exception_if((ip) > (cs)->limit, X86_EXC_GP, 0); \ } else \ generate_exception_if(ctxt->lma && (cs)->l \ ? !is_canonical_address(ip) \ - : (ip) > (cs)->limit, EXC_GP, 0); \ + : (ip) > (cs)->limit, X86_EXC_GP, 0); \ }) #define commit_far_branch(cs, newip) ({ \ @@ -431,7 +409,7 @@ int x86emul_get_fpu( return rc; generate_exception_if(!(cr4 & ((type == X86EMUL_FPU_xmm) ? X86_CR4_OSFXSR : X86_CR4_OSXSAVE)), - EXC_UD); + X86_EXC_UD); } rc = ops->read_cr(0, &cr0, ctxt); @@ -444,13 +422,13 @@ int x86emul_get_fpu( } if ( cr0 & X86_CR0_EM ) { - generate_exception_if(type == X86EMUL_FPU_fpu, EXC_NM); - generate_exception_if(type == X86EMUL_FPU_mmx, EXC_UD); - generate_exception_if(type == X86EMUL_FPU_xmm, EXC_UD); + generate_exception_if(type == X86EMUL_FPU_fpu, X86_EXC_NM); + generate_exception_if(type == X86EMUL_FPU_mmx, X86_EXC_UD); + generate_exception_if(type == X86EMUL_FPU_xmm, X86_EXC_UD); } generate_exception_if((cr0 & X86_CR0_TS) && (type != X86EMUL_FPU_wait || (cr0 & X86_CR0_MP)), - EXC_NM); + X86_EXC_NM); } done: @@ -776,7 +754,7 @@ static int ioport_access_check( return rc == X86EMUL_DONE ? X86EMUL_OKAY : rc; /* Ensure the TSS has an io-bitmap-offset field. */ - generate_exception_if(tr.type != 0xb, EXC_GP, 0); + generate_exception_if(tr.type != 0xb, X86_EXC_GP, 0); switch ( rc = read_ulong(x86_seg_tr, 0x66, &iobmp, 2, ctxt, ops) ) { @@ -784,7 +762,7 @@ static int ioport_access_check( break; case X86EMUL_EXCEPTION: - generate_exception_if(!ctxt->event_pending, EXC_GP, 0); + generate_exception_if(!ctxt->event_pending, X86_EXC_GP, 0); /* fallthrough */ default: @@ -799,7 +777,7 @@ static int ioport_access_check( break; case X86EMUL_EXCEPTION: - generate_exception_if(!ctxt->event_pending, EXC_GP, 0); + generate_exception_if(!ctxt->event_pending, X86_EXC_GP, 0); /* fallthrough */ default: @@ -807,7 +785,7 @@ static int ioport_access_check( } generate_exception_if(iobmp & (((1 << bytes) - 1) << (first_port & 7)), - EXC_GP, 0); + X86_EXC_GP, 0); done: return rc; @@ -854,7 +832,7 @@ protmode_load_seg( uint8_t dpl, rpl; int cpl = x86emul_get_cpl(ctxt, ops); uint32_t a_flag = 0x100; - int rc, fault_type = EXC_GP; + int rc, fault_type = X86_EXC_GP; if ( cpl < 0 ) return X86EMUL_UNHANDLEABLE; @@ -982,7 +960,7 @@ protmode_load_seg( /* Segment present in memory? */ if ( !(desc.b & (1 << 15)) && seg != x86_seg_none ) { - fault_type = seg != x86_seg_ss ? EXC_NP : EXC_SS; + fault_type = seg != x86_seg_ss ? X86_EXC_NP : X86_EXC_SS; goto raise_exn; } @@ -1163,7 +1141,7 @@ static unsigned long *decode_vex_gpr( switch ( evex.lr ) \ { \ default: \ - generate_exception(EXC_UD); \ + generate_exception(X86_EXC_UD); \ case 2: \ break; \ case 0: case 1: \ @@ -1273,7 +1251,7 @@ x86_emulate( generate_exception_if((mode_vif() && (_regs.eflags & X86_EFLAGS_VIF) && (_regs.eflags & X86_EFLAGS_VIP)), - EXC_GP, 0); + X86_EXC_GP, 0); rc = x86emul_decode(&state, ctxt, ops); if ( rc != X86EMUL_OKAY ) @@ -1302,7 +1280,7 @@ x86_emulate( #define state (&state) elem_bytes = 4 << evex.w; - generate_exception_if(state->not_64bit && mode_64bit(), EXC_UD); + generate_exception_if(state->not_64bit && mode_64bit(), X86_EXC_UD); if ( ea.type == OP_REG ) ea.reg = _decode_gpr(&_regs, modrm_rm, (d & ByteOp) && !rex_prefix && !vex.opcx); @@ -1420,12 +1398,12 @@ x86_emulate( generate_exception_if(lock_prefix && (vex.opcx || ext != ext_0f || b != 0xc7 || (modrm_reg & 7) != 1 || ea.type != OP_MEM), - EXC_UD); + X86_EXC_UD); dst.type = OP_NONE; break; case DstReg: - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); dst.type = OP_REG; if ( d & ByteOp ) { @@ -1477,17 +1455,17 @@ x86_emulate( d = (d & ~DstMask) | DstMem; /* Becomes a normal DstMem operation from here on. */ case DstMem: - generate_exception_if(ea.type == OP_MEM && evex.z, EXC_UD); + generate_exception_if(ea.type == OP_MEM && evex.z, X86_EXC_UD); if ( state->simd_size ) { - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); break; } ea.bytes = (d & ByteOp) ? 1 : op_bytes; dst = ea; if ( dst.type == OP_REG ) { - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); switch ( dst.bytes ) { case 1: dst.val = *(uint8_t *)dst.reg; break; @@ -1499,7 +1477,7 @@ x86_emulate( else if ( d & Mov ) /* optimisation - avoid slow emulated read */ { /* Lock prefix is allowed only on RMW instructions. */ - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); fail_if(!ops->write); } else if ( !ops->rmw ) @@ -1730,14 +1708,14 @@ x86_emulate( case 0x62: /* bound */ { int lb, ub, idx; - generate_exception_if(src.type != OP_MEM, EXC_UD); + generate_exception_if(src.type != OP_MEM, X86_EXC_UD); if ( (rc = read_ulong(src.mem.seg, truncate_ea(src.mem.off + op_bytes), &ea.val, op_bytes, ctxt, ops)) ) goto done; ub = (op_bytes == 2) ? (int16_t)ea.val : (int32_t)ea.val; lb = (op_bytes == 2) ? (int16_t)src.val : (int32_t)src.val; idx = (op_bytes == 2) ? (int16_t)dst.val : (int32_t)dst.val; - generate_exception_if((idx < lb) || (idx > ub), EXC_BR); + generate_exception_if((idx < lb) || (idx > ub), X86_EXC_BR); dst.type = OP_NONE; break; } @@ -1760,7 +1738,7 @@ x86_emulate( /* arpl */ unsigned int src_rpl = dst.val & 3; - generate_exception_if(!in_protmode(ctxt, ops), EXC_UD); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_UD); dst = ea; dst.bytes = 2; @@ -1957,7 +1935,7 @@ x86_emulate( dst.type = OP_NONE; break; } - generate_exception_if((modrm_reg & 7) != 0, EXC_UD); + generate_exception_if((modrm_reg & 7) != 0, X86_EXC_UD); case 0x88 ... 0x8b: /* mov */ case 0xa0 ... 0xa1: /* mov mem.offs,{%al,%ax,%eax,%rax} */ case 0xa2 ... 0xa3: /* mov {%al,%ax,%eax,%rax},mem.offs */ @@ -1966,7 +1944,7 @@ x86_emulate( case 0x8c: /* mov Sreg,r/m */ seg = modrm_reg & 7; /* REX.R is ignored. */ - generate_exception_if(!is_x86_user_segment(seg), EXC_UD); + generate_exception_if(!is_x86_user_segment(seg), X86_EXC_UD); store_selector: fail_if(ops->read_segment == NULL); if ( (rc = ops->read_segment(seg, &sreg, ctxt)) != 0 ) @@ -1977,14 +1955,14 @@ x86_emulate( break; case 0x8d: /* lea */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); dst.val = ea.mem.off; break; case 0x8e: /* mov r/m,Sreg */ seg = modrm_reg & 7; /* REX.R is ignored. */ generate_exception_if(!is_x86_user_segment(seg) || - seg == x86_seg_cs, EXC_UD); + seg == x86_seg_cs, X86_EXC_UD); if ( (rc = load_seg(seg, src.val, 0, NULL, ctxt, ops)) != 0 ) goto done; if ( seg == x86_seg_ss ) @@ -1993,7 +1971,7 @@ x86_emulate( break; case 0x8f: /* pop (sole member of Grp1a) */ - generate_exception_if((modrm_reg & 7) != 0, EXC_UD); + generate_exception_if((modrm_reg & 7) != 0, X86_EXC_UD); /* 64-bit mode: POP defaults to a 64-bit operand. */ if ( mode_64bit() && (dst.bytes == 4) ) dst.bytes = 8; @@ -2074,7 +2052,7 @@ x86_emulate( if ( rc != X86EMUL_OKAY ) goto done; } - generate_exception_if(!(cr4 & X86_CR4_VME), EXC_GP, 0); + generate_exception_if(!(cr4 & X86_CR4_VME), X86_EXC_GP, 0); src.val = (_regs.flags & ~X86_EFLAGS_IF) | X86_EFLAGS_IOPL; if ( _regs.eflags & X86_EFLAGS_VIF ) src.val |= X86_EFLAGS_IF; @@ -2104,7 +2082,7 @@ x86_emulate( /* All IOPL != 3 POPFs fail, except in vm86 mode. */ generate_exception_if(!(cr4 & X86_CR4_VME) && MASK_EXTR(_regs.eflags, X86_EFLAGS_IOPL) != 3, - EXC_GP, 0); + X86_EXC_GP, 0); } /* * IOPL cannot be modified outside of CPL 0. IF cannot be @@ -2128,11 +2106,11 @@ x86_emulate( if ( (cr4 & X86_CR4_VME) && MASK_EXTR(_regs.eflags, X86_EFLAGS_IOPL) != 3 ) { - generate_exception_if(dst.val & X86_EFLAGS_TF, EXC_GP, 0); + generate_exception_if(dst.val & X86_EFLAGS_TF, X86_EXC_GP, 0); if ( dst.val & X86_EFLAGS_IF ) { generate_exception_if(_regs.eflags & X86_EFLAGS_VIP, - EXC_GP, 0); + X86_EXC_GP, 0); dst.val |= X86_EFLAGS_VIF; } else @@ -2267,7 +2245,7 @@ x86_emulate( break; case 0xc0 ... 0xc1: grp2: /* Grp2 */ - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); switch ( modrm_reg & 7 ) { @@ -2307,7 +2285,7 @@ x86_emulate( case 0xc5: /* lds */ seg = (b & 1) * 3; /* es = 0, ds = 3 */ les: - generate_exception_if(src.type != OP_MEM, EXC_UD); + generate_exception_if(src.type != OP_MEM, X86_EXC_UD); if ( (rc = read_ulong(src.mem.seg, truncate_ea(src.mem.off + src.bytes), &dst.val, 2, ctxt, ops)) != X86EMUL_OKAY ) goto done; @@ -2386,7 +2364,7 @@ x86_emulate( switch ( ctxt->opcode ) { case 0xcc: /* int3 */ - ctxt->event.vector = EXC_BP; + ctxt->event.vector = X86_EXC_BP; ctxt->event.type = X86_EVENTTYPE_SW_EXCEPTION; break; case 0xcd: /* int imm8 */ @@ -2394,11 +2372,11 @@ x86_emulate( ctxt->event.type = X86_EVENTTYPE_SW_INTERRUPT; break; case 0xce: /* into */ - ctxt->event.vector = EXC_OF; + ctxt->event.vector = X86_EXC_OF; ctxt->event.type = X86_EVENTTYPE_SW_EXCEPTION; break; case 0xf1: /* icebp */ - ctxt->event.vector = EXC_DB; + ctxt->event.vector = X86_EXC_DB; ctxt->event.type = X86_EVENTTYPE_PRI_SW_EXCEPTION; break; } @@ -2447,7 +2425,7 @@ x86_emulate( _regs.ax = (uint8_t)(_regs.al + (_regs.ah * n)); else { - generate_exception_if(!n, EXC_DE); + generate_exception_if(!n, X86_EXC_DE); _regs.al = _regs.al % n; _regs.ah = _regs.al / n; } @@ -2551,7 +2529,7 @@ x86_emulate( break; case 0xf4: /* hlt */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); ctxt->retire.hlt = true; break; @@ -2670,7 +2648,7 @@ x86_emulate( v = (uint8_t)src.val; generate_exception_if( div_dbl(u, v) || ((uint8_t)u[0] != (uint16_t)u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (uint8_t)u[0]; _regs.ah = u[1]; break; @@ -2680,7 +2658,7 @@ x86_emulate( v = (uint16_t)src.val; generate_exception_if( div_dbl(u, v) || ((uint16_t)u[0] != (uint32_t)u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (uint16_t)u[0]; _regs.dx = u[1]; break; @@ -2691,7 +2669,7 @@ x86_emulate( v = (uint32_t)src.val; generate_exception_if( div_dbl(u, v) || ((uint32_t)u[0] != u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (uint32_t)u[0]; _regs.rdx = (uint32_t)u[1]; break; @@ -2700,7 +2678,7 @@ x86_emulate( u[0] = _regs.r(ax); u[1] = _regs.r(dx); v = src.val; - generate_exception_if(div_dbl(u, v), EXC_DE); + generate_exception_if(div_dbl(u, v), X86_EXC_DE); dst.val = u[0]; _regs.r(dx) = u[1]; break; @@ -2715,7 +2693,7 @@ x86_emulate( v = (int8_t)src.val; generate_exception_if( idiv_dbl(u, v) || ((int8_t)u[0] != (int16_t)u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (int8_t)u[0]; _regs.ah = u[1]; break; @@ -2725,7 +2703,7 @@ x86_emulate( v = (int16_t)src.val; generate_exception_if( idiv_dbl(u, v) || ((int16_t)u[0] != (int32_t)u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (int16_t)u[0]; _regs.dx = u[1]; break; @@ -2736,7 +2714,7 @@ x86_emulate( v = (int32_t)src.val; generate_exception_if( idiv_dbl(u, v) || ((int32_t)u[0] != u[0]), - EXC_DE); + X86_EXC_DE); dst.val = (int32_t)u[0]; _regs.rdx = (uint32_t)u[1]; break; @@ -2745,7 +2723,7 @@ x86_emulate( u[0] = _regs.r(ax); u[1] = _regs.r(dx); v = src.val; - generate_exception_if(idiv_dbl(u, v), EXC_DE); + generate_exception_if(idiv_dbl(u, v), X86_EXC_DE); dst.val = u[0]; _regs.r(dx) = u[1]; break; @@ -2767,7 +2745,7 @@ x86_emulate( _regs.eflags &= ~X86_EFLAGS_IF; else { - generate_exception_if(!mode_vif(), EXC_GP, 0); + generate_exception_if(!mode_vif(), X86_EXC_GP, 0); _regs.eflags &= ~X86_EFLAGS_VIF; } break; @@ -2783,7 +2761,7 @@ x86_emulate( { generate_exception_if((_regs.eflags & X86_EFLAGS_VIP) || !mode_vif(), - EXC_GP, 0); + X86_EXC_GP, 0); if ( !(_regs.eflags & X86_EFLAGS_VIF) ) ctxt->retire.sti = true; _regs.eflags |= X86_EFLAGS_VIF; @@ -2799,7 +2777,7 @@ x86_emulate( break; case 0xfe: /* Grp4 */ - generate_exception_if((modrm_reg & 7) >= 2, EXC_UD); + generate_exception_if((modrm_reg & 7) >= 2, X86_EXC_UD); /* Fallthrough. */ case 0xff: /* Grp5 */ switch ( modrm_reg & 7 ) @@ -2833,7 +2811,7 @@ x86_emulate( break; case 3: /* call (far, absolute indirect) */ case 5: /* jmp (far, absolute indirect) */ - generate_exception_if(src.type != OP_MEM, EXC_UD); + generate_exception_if(src.type != OP_MEM, X86_EXC_UD); if ( (rc = read_ulong(src.mem.seg, truncate_ea(src.mem.off + op_bytes), @@ -2846,20 +2824,20 @@ x86_emulate( case 6: /* push */ goto push; case 7: - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); } break; case X86EMUL_OPC(0x0f, 0x00): /* Grp6 */ seg = (modrm_reg & 1) ? x86_seg_tr : x86_seg_ldtr; - generate_exception_if(!in_protmode(ctxt, ops), EXC_UD); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_UD); switch ( modrm_reg & 6 ) { case 0: /* sldt / str */ - generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0); + generate_exception_if(umip_active(ctxt, ops), X86_EXC_GP, 0); goto store_selector; case 2: /* lldt / ltr */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); if ( (rc = load_seg(seg, src.val, 0, NULL, ctxt, ops)) != 0 ) goto done; break; @@ -2877,7 +2855,7 @@ x86_emulate( case X86EMUL_EXCEPTION: if ( ctxt->event_pending ) { - ASSERT(ctxt->event.vector == EXC_PF); + ASSERT(ctxt->event.vector == X86_EXC_PF); default: goto done; } @@ -2887,7 +2865,7 @@ x86_emulate( } break; default: - generate_exception_if(true, EXC_UD); + generate_exception_if(true, X86_EXC_UD); break; } break; @@ -2897,7 +2875,7 @@ x86_emulate( goto dispatch_from_helper; case X86EMUL_OPC(0x0f, 0x02): /* lar */ - generate_exception_if(!in_protmode(ctxt, ops), EXC_UD); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_UD); _regs.eflags &= ~X86_EFLAGS_ZF; switch ( rc = protmode_load_seg(x86_seg_none, src.val, false, &sreg, ctxt, ops) ) @@ -2928,7 +2906,7 @@ x86_emulate( case X86EMUL_EXCEPTION: if ( ctxt->event_pending ) { - ASSERT(ctxt->event.vector == EXC_PF); + ASSERT(ctxt->event.vector == X86_EXC_PF); default: goto done; } @@ -2945,7 +2923,7 @@ x86_emulate( break; case X86EMUL_OPC(0x0f, 0x03): /* lsl */ - generate_exception_if(!in_protmode(ctxt, ops), EXC_UD); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_UD); _regs.eflags &= ~X86_EFLAGS_ZF; switch ( rc = protmode_load_seg(x86_seg_none, src.val, false, &sreg, ctxt, ops) ) @@ -2973,7 +2951,7 @@ x86_emulate( case X86EMUL_EXCEPTION: if ( ctxt->event_pending ) { - ASSERT(ctxt->event.vector == EXC_PF); + ASSERT(ctxt->event.vector == X86_EXC_PF); default: goto done; } @@ -2996,8 +2974,8 @@ x86_emulate( fail_if(ops->read_msr == NULL); if ( (rc = ops->read_msr(MSR_EFER, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if((msr_val & EFER_SCE) == 0, EXC_UD); - generate_exception_if(!amd_like(ctxt) && !mode_64bit(), EXC_UD); + generate_exception_if((msr_val & EFER_SCE) == 0, X86_EXC_UD); + generate_exception_if(!amd_like(ctxt) && !mode_64bit(), X86_EXC_UD); if ( (rc = ops->read_msr(MSR_STAR, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; @@ -3065,7 +3043,7 @@ x86_emulate( break; case X86EMUL_OPC(0x0f, 0x06): /* clts */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); fail_if((ops->read_cr == NULL) || (ops->write_cr == NULL)); if ( (rc = ops->read_cr(0, &dst.val, ctxt)) != X86EMUL_OKAY || (rc = ops->write_cr(0, dst.val & ~X86_CR0_TS, ctxt)) != X86EMUL_OKAY ) @@ -3081,10 +3059,10 @@ x86_emulate( fail_if(!ops->read_msr); if ( (rc = ops->read_msr(MSR_EFER, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if(!(msr_val & EFER_SCE), EXC_UD); - generate_exception_if(!amd_like(ctxt) && !mode_64bit(), EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - generate_exception_if(!in_protmode(ctxt, ops), EXC_GP, 0); + generate_exception_if(!(msr_val & EFER_SCE), X86_EXC_UD); + generate_exception_if(!amd_like(ctxt) && !mode_64bit(), X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_GP, 0); #ifdef __x86_64__ /* * Doing this for just Intel (rather than e.g. !amd_like()) as this is @@ -3093,7 +3071,7 @@ x86_emulate( */ generate_exception_if(ctxt->cpuid->x86_vendor == X86_VENDOR_INTEL && op_bytes == 8 && !is_canonical_address(_regs.rcx), - EXC_GP, 0); + X86_EXC_GP, 0); #endif if ( (rc = ops->read_msr(MSR_STAR, &msr_val, ctxt)) != X86EMUL_OKAY ) @@ -3152,7 +3130,7 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x08): /* invd */ case X86EMUL_OPC(0x0f, 0x09): /* wbinvd / wbnoinvd */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); fail_if(!ops->cache_op); if ( (rc = ops->cache_op(b == 0x09 ? !repe_prefix() || !vcpu_has_wbnoinvd() @@ -3167,7 +3145,7 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x0b): /* ud2 */ case X86EMUL_OPC(0x0f, 0xb9): /* ud1 */ case X86EMUL_OPC(0x0f, 0xff): /* ud0 */ - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); case X86EMUL_OPC(0x0f, 0x0d): /* GrpP (prefetch) */ case X86EMUL_OPC(0x0f, 0x18): /* Grp16 (prefetch/nop) */ @@ -3187,7 +3165,7 @@ x86_emulate( else if ( _3dnow_ext_table[(imm1 >> 4) & 0xf] & (1 << (imm1 & 0xf)) ) host_and_vcpu_must_have(3dnow_ext); else - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); get_fpu(X86EMUL_FPU_mmx); @@ -3266,7 +3244,7 @@ x86_emulate( /* fall through */ CASE_SIMD_PACKED_FP_VEX(0x0f, 0x2b): /* movntp{s,d} xmm,m128 */ /* vmovntp{s,d} {x,y}mm,mem */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); sfence = true; /* fall through */ CASE_SIMD_ALL_FP_VEX(0x0f, 0x10): /* mov{up,s}{s,d} xmm/mem,xmm */ @@ -3352,7 +3330,7 @@ x86_emulate( break; CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x2b): /* vmovntp{s,d} [xyz]mm,mem */ - generate_exception_if(ea.type != OP_MEM || evex.opmsk, EXC_UD); + generate_exception_if(ea.type != OP_MEM || evex.opmsk, X86_EXC_UD); sfence = true; /* fall through */ CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x10): /* vmovup{s,d} [xyz]mm/mem,[xyz]mm{k} */ @@ -3366,7 +3344,7 @@ x86_emulate( /* vmovs{s,d} to/from memory have only two operands. */ if ( (b & ~1) == 0x10 && ea.type == OP_MEM ) d |= TwoOp; - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); /* fall through */ CASE_SIMD_ALL_FP(_EVEX, 0x0f, 0x51): /* vsqrtp{s,d} [xyz]mm/mem,[xyz]mm{k} */ /* vsqrts{s,d} xmm/m32,xmm,xmm{k} */ @@ -3380,7 +3358,7 @@ x86_emulate( generate_exception_if((evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK) || (ea.type != OP_REG && evex.brs && (evex.pfx & VEX_PREFIX_SCALAR_MASK))), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( ea.type != OP_REG || !evex.brs ) avx512_vlen_check(evex.pfx & VEX_PREFIX_SCALAR_MASK); @@ -3408,7 +3386,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f, 0x16): /* vmovhpd m64,xmm,xmm */ CASE_SIMD_PACKED_FP_VEX(0x0f, 0x17): /* movhp{s,d} xmm,m64 */ /* vmovhp{s,d} xmm,m64 */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); /* fall through */ case X86EMUL_OPC(0x0f, 0x12): /* movlps m64,xmm */ /* movhlps xmm,xmm */ @@ -3418,7 +3396,7 @@ x86_emulate( /* movlhps xmm,xmm */ case X86EMUL_OPC_VEX(0x0f, 0x16): /* vmovhps m64,xmm,xmm */ /* vmovlhps xmm,xmm,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); if ( (d & DstMask) != DstMem ) d &= ~TwoOp; op_bytes = 8; @@ -3428,7 +3406,7 @@ x86_emulate( CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x13): /* vmovlp{s,d} xmm,m64 */ case X86EMUL_OPC_EVEX_66(0x0f, 0x16): /* vmovhpd m64,xmm,xmm */ CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x17): /* vmovhp{s,d} xmm,m64 */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX(0x0f, 0x12): /* vmovlps m64,xmm,xmm */ /* vmovhlps xmm,xmm,xmm */ @@ -3436,7 +3414,7 @@ x86_emulate( /* vmovlhps xmm,xmm,xmm */ generate_exception_if((evex.lr || evex.opmsk || evex.brs || evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK)), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( (d & DstMask) != DstMem ) d &= ~TwoOp; @@ -3463,7 +3441,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_F3(0x0f, 0x16): /* vmovshdup [xyz]mm/mem,[xyz]mm{k} */ generate_exception_if((evex.brs || evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK)), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); avx512_vlen_check(false); d |= TwoOp; @@ -3475,7 +3453,7 @@ x86_emulate( CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x14): /* vunpcklp{s,d} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x15): /* vunpckhp{s,d} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ generate_exception_if(evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK), - EXC_UD); + X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x76): /* vpermi2{d,q} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x77): /* vpermi2p{s,d} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -3502,7 +3480,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x65): /* vblendmp{s,d} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ avx512f_no_sae: host_and_vcpu_must_have(avx512f); - generate_exception_if(ea.type != OP_MEM && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_MEM && evex.brs, X86_EXC_UD); avx512_vlen_check(false); goto simd_zmm; @@ -3512,7 +3490,7 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x21): /* mov dr,reg */ case X86EMUL_OPC(0x0f, 0x22): /* mov reg,cr */ case X86EMUL_OPC(0x0f, 0x23): /* mov reg,dr */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); if ( b & 2 ) { /* Write to CR/DR. */ @@ -3580,7 +3558,7 @@ x86_emulate( CASE_SIMD_SCALAR_FP(_EVEX, 0x0f, 0x2a): /* vcvtsi2s{s,d} r/m,xmm,xmm */ CASE_SIMD_SCALAR_FP(_EVEX, 0x0f, 0x7b): /* vcvtusi2s{s,d} r/m,xmm,xmm */ generate_exception_if(evex.opmsk || (ea.type != OP_REG && evex.brs), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( !evex.brs ) avx512_vlen_check(true); @@ -3632,7 +3610,7 @@ x86_emulate( } else { - generate_exception_if(vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); @@ -3691,7 +3669,7 @@ x86_emulate( CASE_SIMD_SCALAR_FP(_EVEX, 0x0f, 0x79): /* vcvts{s,d}2usi xmm/mem,reg */ generate_exception_if((evex.reg != 0xf || !evex.RX || evex.opmsk || (ea.type != OP_REG && evex.brs)), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( !evex.brs ) avx512_vlen_check(true); @@ -3711,7 +3689,7 @@ x86_emulate( } else { - generate_exception_if(vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); } @@ -3761,7 +3739,7 @@ x86_emulate( generate_exception_if((evex.reg != 0xf || !evex.RX || evex.opmsk || (ea.type != OP_REG && evex.brs) || evex.w != evex.pfx), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( !evex.brs ) avx512_vlen_check(true); @@ -3772,7 +3750,7 @@ x86_emulate( goto vcomi; case X86EMUL_OPC(0x0f, 0x30): /* wrmsr */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); fail_if(ops->write_msr == NULL); if ( (rc = ops->write_msr(_regs.ecx, ((uint64_t)_regs.r(dx) << 32) | _regs.eax, @@ -3786,7 +3764,7 @@ x86_emulate( fail_if(ops->read_cr == NULL); if ( (rc = ops->read_cr(4, &cr4, ctxt)) ) goto done; - generate_exception_if(cr4 & X86_CR4_TSD, EXC_GP, 0); + generate_exception_if(cr4 & X86_CR4_TSD, X86_EXC_GP, 0); } fail_if(ops->read_msr == NULL); if ( (rc = ops->read_msr(MSR_IA32_TSC, @@ -3797,7 +3775,7 @@ x86_emulate( break; case X86EMUL_OPC(0x0f, 0x32): /* rdmsr */ - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); fail_if(ops->read_msr == NULL); if ( (rc = ops->read_msr(_regs.ecx, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; @@ -3807,15 +3785,15 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x34): /* sysenter */ vcpu_must_have(sep); - generate_exception_if(amd_like(ctxt) && ctxt->lma, EXC_UD); - generate_exception_if(!in_protmode(ctxt, ops), EXC_GP, 0); + generate_exception_if(amd_like(ctxt) && ctxt->lma, X86_EXC_UD); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_GP, 0); fail_if(ops->read_msr == NULL); if ( (rc = ops->read_msr(MSR_IA32_SYSENTER_CS, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if(!(msr_val & 0xfffc), EXC_GP, 0); + generate_exception_if(!(msr_val & 0xfffc), X86_EXC_GP, 0); _regs.eflags &= ~(X86_EFLAGS_VM | X86_EFLAGS_IF | X86_EFLAGS_RF); @@ -3856,20 +3834,20 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x35): /* sysexit */ vcpu_must_have(sep); - generate_exception_if(amd_like(ctxt) && ctxt->lma, EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); - generate_exception_if(!in_protmode(ctxt, ops), EXC_GP, 0); + generate_exception_if(amd_like(ctxt) && ctxt->lma, X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + generate_exception_if(!in_protmode(ctxt, ops), X86_EXC_GP, 0); fail_if(ops->read_msr == NULL); if ( (rc = ops->read_msr(MSR_IA32_SYSENTER_CS, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if(!(msr_val & 0xfffc), EXC_GP, 0); + generate_exception_if(!(msr_val & 0xfffc), X86_EXC_GP, 0); generate_exception_if(op_bytes == 8 && (!is_canonical_address(_regs.r(dx)) || !is_canonical_address(_regs.r(cx))), - EXC_GP, 0); + X86_EXC_GP, 0); cs.sel = (msr_val | 3) + /* SELECTOR_RPL_MASK */ (op_bytes == 8 ? 32 : 16); @@ -3917,7 +3895,7 @@ x86_emulate( case X86EMUL_OPC_VEX(0x0f, 0x47): /* kxor{w,q} k,k,k */ case X86EMUL_OPC_VEX_66(0x0f, 0x47): /* kxor{b,d} k,k,k */ case X86EMUL_OPC_VEX_66(0x0f, 0x4a): /* kadd{b,d} k,k,k */ - generate_exception_if(!vex.l, EXC_UD); + generate_exception_if(!vex.l, X86_EXC_UD); opmask_basic: if ( vex.w ) host_and_vcpu_must_have(avx512bw); @@ -3926,7 +3904,7 @@ x86_emulate( opmask_common: host_and_vcpu_must_have(avx512f); generate_exception_if(!vex.r || (mode_64bit() && !(vex.reg & 8)) || - ea.type != OP_REG, EXC_UD); + ea.type != OP_REG, X86_EXC_UD); vex.reg |= 8; d &= ~TwoOp; @@ -3944,16 +3922,16 @@ x86_emulate( case X86EMUL_OPC_VEX(0x0f, 0x44): /* knot{w,q} k,k */ case X86EMUL_OPC_VEX_66(0x0f, 0x44): /* knot{b,d} k,k */ - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); goto opmask_basic; case X86EMUL_OPC_VEX(0x0f, 0x4b): /* kunpck{w,d}{d,q} k,k,k */ - generate_exception_if(!vex.l, EXC_UD); + generate_exception_if(!vex.l, X86_EXC_UD); host_and_vcpu_must_have(avx512bw); goto opmask_common; case X86EMUL_OPC_VEX_66(0x0f, 0x4b): /* kunpckbw k,k,k */ - generate_exception_if(!vex.l || vex.w, EXC_UD); + generate_exception_if(!vex.l || vex.w, X86_EXC_UD); goto opmask_common; #endif /* X86EMUL_NO_SIMD */ @@ -3974,7 +3952,7 @@ x86_emulate( simd_0f_to_gpr: opc[insn_bytes - PFX_BYTES] = 0xc3; - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); if ( vex.opcx == vex_none ) { @@ -3997,7 +3975,7 @@ x86_emulate( } else { - generate_exception_if(vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, X86_EXC_UD); if ( b == 0x50 || !vex.l ) host_and_vcpu_must_have(avx); else @@ -4020,7 +3998,7 @@ x86_emulate( CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x57): /* vxorp{s,d} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ generate_exception_if((evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK) || (ea.type != OP_MEM && evex.brs)), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512dq); avx512_vlen_check(false); goto simd_zmm; @@ -4053,7 +4031,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0x5b): /* vcvtps2dq [xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_F3(0x0f, 0x5b): /* vcvttps2dq [xyz]mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX(0x0f, 0x5b): /* vcvtdq2ps [xyz]mm/mem,[xyz]mm{k} */ /* vcvtqq2ps [xyz]mm/mem,{x,y}mm{k} */ @@ -4245,7 +4223,7 @@ x86_emulate( #ifndef X86EMUL_NO_SIMD case X86EMUL_OPC_EVEX_66(0x0f, 0xf6): /* vpsadbw [xyz]mm/mem,[xyz]mm,[xyz]mm */ - generate_exception_if(evex.opmsk, EXC_UD); + generate_exception_if(evex.opmsk, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f, 0x60): /* vpunpcklbw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0x61): /* vpunpcklwd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -4283,13 +4261,13 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x1c): /* vpabsb [xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x1d): /* vpabsw [xyz]mm/mem,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = 1 << (b & 1); goto avx512f_no_sae; case X86EMUL_OPC_EVEX_66(0x0f, 0x62): /* vpunpckldq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0x6a): /* vpunpckhdq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); fault_suppression = false; op_bytes = 16 << evex.lr; goto avx512f_no_sae; @@ -4308,21 +4286,21 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x27): /* vptestm{d,q} [xyz]mm/mem,[xyz]mm,k{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x29): /* vpcmpeqq [xyz]mm/mem,[xyz]mm,k{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x37): /* vpcmpgtq [xyz]mm/mem,[xyz]mm,k{k} */ - generate_exception_if(!evex.r || !evex.R || evex.z, EXC_UD); + generate_exception_if(!evex.r || !evex.R || evex.z, X86_EXC_UD); if ( b & (ext == ext_0f38 ? 1 : 2) ) { - generate_exception_if(b != 0x27 && evex.w != (b & 1), EXC_UD); + generate_exception_if(b != 0x27 && evex.w != (b & 1), X86_EXC_UD); goto avx512f_no_sae; } host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = 1 << (ext == ext_0f ? b & 1 : evex.w); avx512_vlen_check(false); goto simd_zmm; case X86EMUL_OPC_EVEX_66(0x0f, 0x6b): /* vpackssdw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x2b): /* vpackusdw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(evex.w || evex.brs, EXC_UD); + generate_exception_if(evex.w || evex.brs, X86_EXC_UD); fault_suppression = false; goto avx512f_no_sae; @@ -4333,7 +4311,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xd4): /* vpaddq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0xf4): /* vpmuludq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x28): /* vpmuldq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); goto avx512f_no_sae; #endif /* X86EMUL_NO_SIMD */ @@ -4344,7 +4322,7 @@ x86_emulate( /* vmov{d,q} xmm,r/m */ if ( vex.opcx != vex_none ) { - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); } @@ -4385,7 +4363,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0x7e): /* vmov{d,q} xmm,r/m */ generate_exception_if((evex.lr || evex.opmsk || evex.brs || evex.reg != 0xf || !evex.RX), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); get_fpu(X86EMUL_FPU_zmm); @@ -4409,7 +4387,7 @@ x86_emulate( case X86EMUL_OPC_66(0x0f, 0xe7): /* movntdq xmm,m128 */ case X86EMUL_OPC_VEX_66(0x0f, 0xe7): /* vmovntdq {x,y}mm,mem */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); sfence = true; /* fall through */ case X86EMUL_OPC_66(0x0f, 0x6f): /* movdqa xmm/m128,xmm */ @@ -4429,7 +4407,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xe7): /* vmovntdq [xyz]mm,mem */ generate_exception_if(ea.type != OP_MEM || evex.opmsk || evex.w, - EXC_UD); + X86_EXC_UD); sfence = true; /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f, 0x6f): /* vmovdqa{32,64} [xyz]mm/mem,[xyz]mm{k} */ @@ -4437,7 +4415,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0x7f): /* vmovdqa{32,64} [xyz]mm,[xyz]mm/mem{k} */ case X86EMUL_OPC_EVEX_F3(0x0f, 0x7f): /* vmovdqu{32,64} [xyz]mm,[xyz]mm/mem{k} */ vmovdqa: - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); d |= TwoOp; op_bytes = 16 << evex.lr; goto avx512f_no_sae; @@ -4449,7 +4427,7 @@ x86_emulate( goto vmovdqa; case X86EMUL_OPC_VEX_66(0x0f, 0xd6): /* vmovq xmm,xmm/m64 */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); d |= TwoOp; /* fall through */ case X86EMUL_OPC_66(0x0f, 0xd6): /* movq xmm,xmm/m64 */ @@ -4534,11 +4512,11 @@ x86_emulate( case X86EMUL_OPC_EVEX_F3(0x0f, 0x70): /* vpshufhw $imm8,[xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_F2(0x0f, 0x70): /* vpshuflw $imm8,[xyz]mm/mem,[xyz]mm{k} */ if ( evex.pfx == vex_66 ) - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); else { host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); } d = (d & ~SrcMask) | SrcMem | TwoOp; op_bytes = 16 << evex.lr; @@ -4562,7 +4540,7 @@ x86_emulate( goto unrecognized_insn; } simd_0f_shift_imm: - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); if ( vex.opcx != vex_none ) { @@ -4622,7 +4600,7 @@ x86_emulate( { case 2: /* vpsrld $imm8,[xyz]mm/mem,[xyz]mm{k} */ case 6: /* vpslld $imm8,[xyz]mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); /* fall through */ case 0: /* vpror{d,q} $imm8,[xyz]mm/mem,[xyz]mm{k} */ case 1: /* vprol{d,q} $imm8,[xyz]mm/mem,[xyz]mm{k} */ @@ -4670,11 +4648,11 @@ x86_emulate( { case 2: /* vpsrlq $imm8,[xyz]mm/mem,[xyz]mm{k} */ case 6: /* vpsllq $imm8,[xyz]mm/mem,[xyz]mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); goto avx512f_shift_imm; case 3: /* vpsrldq $imm8,[xyz]mm/mem,[xyz]mm */ case 7: /* vpslldq $imm8,[xyz]mm/mem,[xyz]mm */ - generate_exception_if(evex.opmsk, EXC_UD); + generate_exception_if(evex.opmsk, X86_EXC_UD); goto avx512bw_shift_imm; } goto unrecognized_insn; @@ -4688,7 +4666,7 @@ x86_emulate( case X86EMUL_OPC_VEX(0x0f, 0x77): /* vzero{all,upper} */ if ( vex.opcx != vex_none ) { - generate_exception_if(vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); @@ -4756,7 +4734,7 @@ x86_emulate( } /* fall through */ case X86EMUL_OPC_F2(0x0f, 0x78): /* insertq $imm8,$imm8,xmm,xmm */ - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); host_and_vcpu_must_have(sse4a); get_fpu(X86EMUL_FPU_xmm); @@ -4771,14 +4749,14 @@ x86_emulate( case X86EMUL_OPC_66(0x0f, 0x79): /* extrq xmm,xmm */ case X86EMUL_OPC_F2(0x0f, 0x79): /* insertq xmm,xmm */ - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); host_and_vcpu_must_have(sse4a); op_bytes = 8; goto simd_0f_xmm; case X86EMUL_OPC_EVEX_66(0x0f, 0xe6): /* vcvttpd2dq [xyz]mm/mem,{x,y}mm{k} */ case X86EMUL_OPC_EVEX_F2(0x0f, 0xe6): /* vcvtpd2dq [xyz]mm/mem,{x,y}mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_F3(0x0f, 0x7a): /* vcvtudq2pd {x,y}mm/mem,[xyz]mm{k} */ /* vcvtuqq2pd [xyz]mm/mem,[xyz]mm{k} */ @@ -4801,7 +4779,7 @@ x86_emulate( else { host_and_vcpu_must_have(avx512f); - generate_exception_if(ea.type != OP_MEM && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_MEM && evex.brs, X86_EXC_UD); } if ( ea.type != OP_REG || !evex.brs ) avx512_vlen_check(false); @@ -4811,7 +4789,7 @@ x86_emulate( case X86EMUL_OPC_F2(0x0f, 0xf0): /* lddqu m128,xmm */ case X86EMUL_OPC_VEX_F2(0x0f, 0xf0): /* vlddqu mem,{x,y}mm */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_66(0x0f, 0x7c): /* haddpd xmm/m128,xmm */ case X86EMUL_OPC_F2(0x0f, 0x7c): /* haddps xmm/m128,xmm */ @@ -4830,14 +4808,14 @@ x86_emulate( case X86EMUL_OPC_F3(0x0f, 0x7e): /* movq xmm/m64,xmm */ case X86EMUL_OPC_VEX_F3(0x0f, 0x7e): /* vmovq xmm/m64,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); op_bytes = 8; goto simd_0f_int; case X86EMUL_OPC_EVEX_F3(0x0f, 0x7e): /* vmovq xmm/m64,xmm */ case X86EMUL_OPC_EVEX_66(0x0f, 0xd6): /* vmovq xmm,xmm/m64 */ generate_exception_if(evex.lr || !evex.w || evex.opmsk || evex.brs, - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); d |= TwoOp; op_bytes = 8; @@ -4859,11 +4837,11 @@ x86_emulate( case X86EMUL_OPC_VEX(0x0f, 0x91): /* kmov{w,q} k,mem */ case X86EMUL_OPC_VEX_66(0x0f, 0x91): /* kmov{b,d} k,mem */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_VEX(0x0f, 0x90): /* kmov{w,q} k/mem,k */ case X86EMUL_OPC_VEX_66(0x0f, 0x90): /* kmov{b,d} k/mem,k */ - generate_exception_if(vex.l || !vex.r, EXC_UD); + generate_exception_if(vex.l || !vex.r, X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( vex.w ) { @@ -4896,14 +4874,14 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f, 0x92): /* kmovb r32,k */ case X86EMUL_OPC_VEX_F2(0x0f, 0x92): /* kmov{d,q} reg,k */ generate_exception_if(vex.l || !vex.r || vex.reg != 0xf || - ea.type != OP_REG, EXC_UD); + ea.type != OP_REG, X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( vex.pfx == vex_f2 ) host_and_vcpu_must_have(avx512bw); else { - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); if ( vex.pfx ) host_and_vcpu_must_have(avx512dq); } @@ -4933,7 +4911,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f, 0x93): /* kmovb k,r32 */ case X86EMUL_OPC_VEX_F2(0x0f, 0x93): /* kmov{d,q} k,reg */ generate_exception_if(vex.l || vex.reg != 0xf || ea.type != OP_REG, - EXC_UD); + X86_EXC_UD); dst = ea; dst.reg = decode_gpr(&_regs, modrm_reg); @@ -4945,7 +4923,7 @@ x86_emulate( } else { - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); dst.bytes = 4; if ( vex.pfx ) host_and_vcpu_must_have(avx512dq); @@ -4978,7 +4956,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f, 0x98): /* kortest{b,d} k,k */ case X86EMUL_OPC_VEX_66(0x0f, 0x99): /* ktest{b,d} k,k */ generate_exception_if(vex.l || !vex.r || vex.reg != 0xf || - ea.type != OP_REG, EXC_UD); + ea.type != OP_REG, X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( vex.w ) host_and_vcpu_must_have(avx512bw); @@ -5025,7 +5003,7 @@ x86_emulate( goto done; generate_exception_if((msr_val & MSR_MISC_FEATURES_CPUID_FAULTING), - EXC_GP, 0); /* Faulting active? (Inc. CPL test) */ + X86_EXC_GP, 0); /* Faulting active? (Inc. CPL test) */ rc = ops->cpuid(_regs.eax, _regs.ecx, &cpuid_leaf, ctxt); if ( rc != X86EMUL_OKAY ) @@ -5037,7 +5015,7 @@ x86_emulate( break; case X86EMUL_OPC(0x0f, 0xa3): bt: /* bt */ - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); if ( ops->rmw && dst.type == OP_MEM && (rc = read_ulong(dst.mem.seg, dst.mem.off, &dst.val, @@ -5054,7 +5032,7 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0xad): /* shrd %%cl,r,r/m */ { uint8_t shift, width = dst.bytes << 3; - generate_exception_if(lock_prefix, EXC_UD); + generate_exception_if(lock_prefix, X86_EXC_UD); if ( b & 1 ) shift = _regs.cl; @@ -5202,7 +5180,7 @@ x86_emulate( case 5: goto bts; case 6: goto btr; case 7: goto btc; - default: generate_exception(EXC_UD); + default: generate_exception(X86_EXC_UD); } break; @@ -5320,7 +5298,7 @@ x86_emulate( (ea.type != OP_REG && evex.brs && (evex.pfx & VEX_PREFIX_SCALAR_MASK)) || !evex.r || !evex.R || evex.z), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( ea.type != OP_REG || !evex.brs ) avx512_vlen_check(evex.pfx & VEX_PREFIX_SCALAR_MASK); @@ -5352,7 +5330,7 @@ x86_emulate( CASE_SIMD_PACKED_INT_VEX(0x0f, 0xc4): /* pinsrw $imm8,r32/m16,{,x}mm */ /* vpinsrw $imm8,r32/m16,xmm,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); memcpy(mmvalp, &src.val, 2); ea.type = OP_MEM; state->simd_size = simd_other; @@ -5363,7 +5341,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xc4): /* vpinsrw $imm8,r32/m16,xmm,xmm */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x20): /* vpinsrb $imm8,r32/m8,xmm,xmm */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x22): /* vpinsr{d,q} $imm8,r/m,xmm,xmm */ - generate_exception_if(evex.lr || evex.opmsk || evex.brs, EXC_UD); + generate_exception_if(evex.lr || evex.opmsk || evex.brs, X86_EXC_UD); if ( b & 2 ) host_and_vcpu_must_have(avx512dq); else @@ -5380,7 +5358,7 @@ x86_emulate( CASE_SIMD_PACKED_INT_VEX(0x0f, 0xc5): /* pextrw $imm8,{,x}mm,reg */ /* vpextrw $imm8,xmm,reg */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); opc = init_prefixes(stub); opc[0] = b; /* Convert GPR destination to %rAX. */ @@ -5397,7 +5375,7 @@ x86_emulate( CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0xc6): /* vshufp{s,d} $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ generate_exception_if(evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK), - EXC_UD); + X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x03): /* valign{d,q} $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ fault_suppression = false; @@ -5405,7 +5383,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x25): /* vpternlog{d,q} $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ avx512f_imm8_no_sae: host_and_vcpu_must_have(avx512f); - generate_exception_if(ea.type != OP_MEM && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_MEM && evex.brs, X86_EXC_UD); avx512_vlen_check(false); goto simd_imm8_zmm; @@ -5442,7 +5420,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xe2): /* vpsra{d,q} xmm/m128,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0xf2): /* vpslld xmm/m128,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0xf3): /* vpsllq xmm/m128,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x0c): /* vpermilps [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x0d): /* vpermilpd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -5455,7 +5433,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xfe): /* vpaddd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x1e): /* vpabsd [xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x1f): /* vpabsq [xyz]mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w != (b & 1), EXC_UD); + generate_exception_if(evex.w != (b & 1), X86_EXC_UD); goto avx512f_no_sae; #endif /* !X86EMUL_NO_SIMD */ @@ -5472,7 +5450,7 @@ x86_emulate( case X86EMUL_OPC_F3(0x0f, 0xd6): /* movq2dq mm,xmm */ case X86EMUL_OPC_F2(0x0f, 0xd6): /* movdq2q xmm,mm */ - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); op_bytes = 8; host_and_vcpu_must_have(mmx); goto simd_0f_int; @@ -5481,7 +5459,7 @@ x86_emulate( #ifndef X86EMUL_NO_MMX case X86EMUL_OPC(0x0f, 0xe7): /* movntq mm,m64 */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); sfence = true; /* fall through */ case X86EMUL_OPC(0x0f, 0xda): /* pminub mm/m64,mm */ @@ -5504,7 +5482,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f, 0xea): /* vpminsw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f, 0xee): /* vpmaxsw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = b & 0x10 ? 1 : 2; goto avx512f_no_sae; @@ -5521,10 +5499,10 @@ x86_emulate( #endif /* !X86EMUL_NO_SIMD */ CASE_SIMD_PACKED_INT_VEX(0x0f, 0xf7): /* {,v}maskmov{q,dqu} {,x}mm,{,x}mm */ - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); if ( vex.opcx != vex_none ) { - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); d |= TwoOp; host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); @@ -5627,23 +5605,23 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f38, 0x19): /* vbroadcastsd xmm/m64,ymm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x1a): /* vbroadcastf128 m128,ymm */ - generate_exception_if(!vex.l, EXC_UD); + generate_exception_if(!vex.l, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_VEX_66(0x0f38, 0x18): /* vbroadcastss xmm/m32,{x,y}mm */ if ( ea.type != OP_MEM ) { - generate_exception_if(b & 2, EXC_UD); + generate_exception_if(b & 2, X86_EXC_UD); host_and_vcpu_must_have(avx2); } /* fall through */ case X86EMUL_OPC_VEX_66(0x0f38, 0x0c): /* vpermilps {x,y}mm/mem,{x,y}mm,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x0d): /* vpermilpd {x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_avx; case X86EMUL_OPC_VEX_66(0x0f38, 0x0e): /* vtestps {x,y}mm/mem,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x0f): /* vtestpd {x,y}mm/mem,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_66(0x0f38, 0x17): /* ptest xmm/m128,xmm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x17): /* vptest {x,y}mm/mem,{x,y}mm */ @@ -5654,7 +5632,7 @@ x86_emulate( } else { - generate_exception_if(vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); } @@ -5729,7 +5707,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x11): /* vpsravw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x12): /* vpsllvw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(!evex.w || evex.brs, EXC_UD); + generate_exception_if(!evex.w || evex.brs, X86_EXC_UD); elem_bytes = 2; goto avx512f_no_sae; @@ -5751,7 +5729,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x33): /* vpmovzxwd {x,y}mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x34): /* vpmovzxwq xmm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x35): /* vpmovzxdq {x,y}mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w && (b & 7) == 5, EXC_UD); + generate_exception_if(evex.w && (b & 7) == 5, X86_EXC_UD); } else { @@ -5770,22 +5748,22 @@ x86_emulate( case X86EMUL_OPC_EVEX_F3(0x0f38, 0x33): /* vpmovdw [xyz]mm,{x,y}mm/mem{k} */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x34): /* vpmovqw [xyz]mm,xmm/mem{k} */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x35): /* vpmovqd [xyz]mm,{x,y}mm/mem{k} */ - generate_exception_if(evex.w || (ea.type != OP_REG && evex.z), EXC_UD); + generate_exception_if(evex.w || (ea.type != OP_REG && evex.z), X86_EXC_UD); d = DstMem | SrcReg | TwoOp; } - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); op_bytes = 32 >> (pmov_convert_delta[b & 7] + 1 - evex.lr); elem_bytes = (b & 7) < 3 ? 1 : (b & 7) != 5 ? 2 : 4; goto avx512f_no_sae; case X86EMUL_OPC_VEX_66(0x0f38, 0x13): /* vcvtph2ps xmm/mem,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); host_and_vcpu_must_have(f16c); op_bytes = 8 << vex.l; goto simd_0f_ymm; case X86EMUL_OPC_EVEX_66(0x0f38, 0x13): /* vcvtph2ps {x,y}mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w || (ea.type != OP_REG && evex.brs), EXC_UD); + generate_exception_if(evex.w || (ea.type != OP_REG && evex.brs), X86_EXC_UD); host_and_vcpu_must_have(avx512f); if ( !evex.brs ) avx512_vlen_check(false); @@ -5795,19 +5773,19 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f38, 0x16): /* vpermps ymm/m256,ymm,ymm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x36): /* vpermd ymm/m256,ymm,ymm */ - generate_exception_if(!vex.l || vex.w, EXC_UD); + generate_exception_if(!vex.l || vex.w, X86_EXC_UD); goto simd_0f_avx2; case X86EMUL_OPC_EVEX_66(0x0f38, 0x16): /* vpermp{s,d} {y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x36): /* vperm{d,q} {y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ - generate_exception_if(!evex.lr, EXC_UD); + generate_exception_if(!evex.lr, X86_EXC_UD); fault_suppression = false; goto avx512f_no_sae; case X86EMUL_OPC_EVEX_66(0x0f38, 0x18): /* vbroadcastss xmm/m32,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x58): /* vpbroadcastd xmm/m32,[xyz]mm{k} */ op_bytes = elem_bytes; - generate_exception_if(evex.w || evex.brs, EXC_UD); + generate_exception_if(evex.w || evex.brs, X86_EXC_UD); avx512_broadcast: /* * For the respective code below the main switch() to work we need to @@ -5828,17 +5806,17 @@ x86_emulate( /* vbroadcastf64x4 m256,zmm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x5b): /* vbroadcasti32x8 m256,zmm{k} */ /* vbroadcasti64x4 m256,zmm{k} */ - generate_exception_if(ea.type != OP_MEM || evex.lr != 2, EXC_UD); + generate_exception_if(ea.type != OP_MEM || evex.lr != 2, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x19): /* vbroadcastsd xmm/m64,{y,z}mm{k} */ /* vbroadcastf32x2 xmm/m64,{y,z}mm{k} */ - generate_exception_if(!evex.lr, EXC_UD); + generate_exception_if(!evex.lr, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x59): /* vpbroadcastq xmm/m64,[xyz]mm{k} */ /* vbroadcasti32x2 xmm/m64,[xyz]mm{k} */ if ( b == 0x59 ) op_bytes = 8; - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); if ( !evex.w ) host_and_vcpu_must_have(avx512dq); goto avx512_broadcast; @@ -5848,7 +5826,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x5a): /* vbroadcasti32x4 m128,{y,z}mm{k} */ /* vbroadcasti64x2 m128,{y,z}mm{k} */ generate_exception_if(ea.type != OP_MEM || !evex.lr || evex.brs, - EXC_UD); + X86_EXC_UD); if ( evex.w ) host_and_vcpu_must_have(avx512dq); goto avx512_broadcast; @@ -5870,7 +5848,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_F3(0x0f38, 0x29): /* vpmov{b,w}2m [xyz]mm,k */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x39): /* vpmov{d,q}2m [xyz]mm,k */ - generate_exception_if(!evex.r || !evex.R, EXC_UD); + generate_exception_if(!evex.r || !evex.R, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x28): /* vpmovm2{b,w} k,[xyz]mm */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x38): /* vpmovm2{d,q} k,[xyz]mm */ @@ -5878,14 +5856,14 @@ x86_emulate( host_and_vcpu_must_have(avx512dq); else host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.opmsk || ea.type != OP_REG, EXC_UD); + generate_exception_if(evex.opmsk || ea.type != OP_REG, X86_EXC_UD); d |= TwoOp; op_bytes = 16 << evex.lr; goto avx512f_no_sae; case X86EMUL_OPC_66(0x0f38, 0x2a): /* movntdqa m128,xmm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x2a): /* vmovntdqa mem,{x,y}mm */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); /* Ignore the non-temporal hint for now, using movdqa instead. */ asm volatile ( "mfence" ::: "memory" ); b = 0x6f; @@ -5901,7 +5879,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x2a): /* vmovntdqa mem,[xyz]mm */ generate_exception_if(ea.type != OP_MEM || evex.opmsk || evex.w, - EXC_UD); + X86_EXC_UD); /* Ignore the non-temporal hint for now, using vmovdqa32 instead. */ asm volatile ( "mfence" ::: "memory" ); b = 0x6f; @@ -5912,7 +5890,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_F3(0x0f38, 0x3a): /* vpbroadcastmw2d k,[xyz]mm */ generate_exception_if((ea.type != OP_REG || evex.opmsk || evex.w == ((b >> 4) & 1)), - EXC_UD); + X86_EXC_UD); d |= TwoOp; /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0xc4): /* vpconflict{d,q} [xyz]mm/mem,[xyz]mm{k} */ @@ -5929,7 +5907,7 @@ x86_emulate( { typeof(vex) *pvex; - generate_exception_if(ea.type != OP_MEM || vex.w, EXC_UD); + generate_exception_if(ea.type != OP_MEM || vex.w, X86_EXC_UD); host_and_vcpu_must_have(avx); elem_bytes = 4 << (b & 1); vmaskmov: @@ -6016,7 +5994,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0xbf): /* vfnmsub231s{s,d} xmm/mem,xmm,xmm{k} */ host_and_vcpu_must_have(avx512f); simd_zmm_scalar_sae: - generate_exception_if(ea.type != OP_REG && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_REG && evex.brs, X86_EXC_UD); if ( !evex.brs ) avx512_vlen_check(true); goto simd_zmm; @@ -6030,7 +6008,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x3c): /* vpmaxsb [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x3e): /* vpmaxuw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = b & 2 ?: 1; goto avx512f_no_sae; @@ -6050,7 +6028,7 @@ x86_emulate( goto simd_0f38_common; /* fall through */ case X86EMUL_OPC_VEX_66(0x0f38, 0x41): /* vphminposuw xmm/m128,xmm,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); goto simd_0f_avx; case X86EMUL_OPC_VEX_66(0x0f38, 0x50): /* vpdpbusd [xy]mm/mem,[xy]mm,[xy]mm */ @@ -6058,7 +6036,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f38, 0x52): /* vpdpwssd [xy]mm/mem,[xy]mm,[xy]mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x53): /* vpdpwssds [xy]mm/mem,[xy]mm,[xy]mm */ host_and_vcpu_must_have(avx_vnni); - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_avx; case X86EMUL_OPC_EVEX_66(0x0f38, 0x50): /* vpdpbusd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -6066,7 +6044,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x52): /* vpdpwssd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x53): /* vpdpwssds [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512_vnni); - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); goto avx512f_no_sae; case X86EMUL_OPC_EVEX_F2(0x0f38, 0x72): /* vcvtne2ps2bf16 [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -6078,7 +6056,7 @@ x86_emulate( /* fall through */ case X86EMUL_OPC_EVEX_F3(0x0f38, 0x52): /* vdpbf16ps [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512_bf16); - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); op_bytes = 16 << evex.lr; goto avx512f_no_sae; @@ -6089,13 +6067,13 @@ x86_emulate( op_bytes = 1 << ((!(b & 0x20) * 2) + (b & 1)); /* fall through */ case X86EMUL_OPC_VEX_66(0x0f38, 0x46): /* vpsravd {x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_avx2; case X86EMUL_OPC_EVEX_66(0x0f38, 0x4d): /* vrcp14s{s,d} xmm/mem,xmm,xmm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x4f): /* vrsqrt14s{s,d} xmm/mem,xmm,xmm{k} */ host_and_vcpu_must_have(avx512f); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); avx512_vlen_check(true); goto simd_zmm; @@ -6104,19 +6082,19 @@ x86_emulate( host_and_vcpu_must_have(avx512_4vnniw); generate_exception_if((ea.type != OP_MEM || evex.w || evex.brs || evex.lr != 2), - EXC_UD); + X86_EXC_UD); op_mask = op_mask & 0xffff ? 0xf : 0; goto simd_zmm; case X86EMUL_OPC_EVEX_66(0x0f38, 0x8f): /* vpshufbitqmb [xyz]mm/mem,[xyz]mm,k{k} */ - generate_exception_if(evex.w || !evex.r || !evex.R || evex.z, EXC_UD); + generate_exception_if(evex.w || !evex.r || !evex.R || evex.z, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x54): /* vpopcnt{b,w} [xyz]mm/mem,[xyz]mm{k} */ host_and_vcpu_must_have(avx512_bitalg); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x66): /* vpblendm{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = 1 << evex.w; goto avx512f_no_sae; @@ -6125,7 +6103,7 @@ x86_emulate( goto avx512f_no_sae; case X86EMUL_OPC_VEX_66(0x0f38, 0x5a): /* vbroadcasti128 m128,ymm */ - generate_exception_if(ea.type != OP_MEM || !vex.l || vex.w, EXC_UD); + generate_exception_if(ea.type != OP_MEM || !vex.l || vex.w, X86_EXC_UD); goto simd_0f_avx2; case X86EMUL_OPC_EVEX_66(0x0f38, 0x62): /* vpexpand{b,w} [xyz]mm/mem,[xyz]mm{k} */ @@ -6138,7 +6116,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x8a): /* vcompressp{s,d} [xyz]mm,[xyz]mm/mem{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x8b): /* vpcompress{d,q} [xyz]mm,[xyz]mm/mem{k} */ host_and_vcpu_must_have(avx512f); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); avx512_vlen_check(false); /* * For the respective code below the main switch() to work we need to @@ -6160,13 +6138,13 @@ x86_emulate( case X86EMUL_OPC_EVEX_F2(0x0f38, 0x68): /* vp2intersect{d,q} [xyz]mm/mem,[xyz]mm,k+1 */ host_and_vcpu_must_have(avx512_vp2intersect); - generate_exception_if(evex.opmsk || !evex.r || !evex.R, EXC_UD); + generate_exception_if(evex.opmsk || !evex.r || !evex.R, X86_EXC_UD); op_bytes = 16 << evex.lr; goto avx512f_no_sae; case X86EMUL_OPC_EVEX_66(0x0f38, 0x70): /* vpshldvw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x72): /* vpshrdvw [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); elem_bytes = 2; /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x71): /* vpshldv{d,q} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -6181,14 +6159,14 @@ x86_emulate( host_and_vcpu_must_have(avx512_vbmi); else host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); fault_suppression = false; goto avx512f_no_sae; case X86EMUL_OPC_EVEX_66(0x0f38, 0x78): /* vpbroadcastb xmm/m8,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x79): /* vpbroadcastw xmm/m16,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.w || evex.brs, EXC_UD); + generate_exception_if(evex.w || evex.brs, X86_EXC_UD); op_bytes = elem_bytes = 1 << (b & 1); /* See the comment at the avx512_broadcast label. */ op_mask |= !(b & 1 ? !(uint32_t)op_mask : !op_mask); @@ -6197,12 +6175,12 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0x7a): /* vpbroadcastb r32,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x7b): /* vpbroadcastw r32,[xyz]mm{k} */ host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x7c): /* vpbroadcast{d,q} reg,[xyz]mm{k} */ generate_exception_if((ea.type != OP_REG || evex.brs || evex.reg != 0xf || !evex.RX), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); avx512_vlen_check(false); get_fpu(X86EMUL_FPU_zmm); @@ -6228,21 +6206,21 @@ x86_emulate( case X86EMUL_OPC_66(0x0f38, 0x82): /* invpcid reg,m128 */ vcpu_must_have(invpcid); - generate_exception_if(ea.type != OP_MEM, EXC_UD); - generate_exception_if(!mode_ring0(), EXC_GP, 0); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); if ( (rc = ops->read(ea.mem.seg, ea.mem.off, mmvalp, 16, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if(mmvalp->xmm[0] & ~0xfff, EXC_GP, 0); + generate_exception_if(mmvalp->xmm[0] & ~0xfff, X86_EXC_GP, 0); dst.val = mode_64bit() ? *dst.reg : (uint32_t)*dst.reg; switch ( dst.val ) { case X86_INVPCID_INDIV_ADDR: generate_exception_if(!is_canonical_address(mmvalp->xmm[1]), - EXC_GP, 0); + X86_EXC_GP, 0); /* fall through */ case X86_INVPCID_SINGLE_CTXT: if ( !mode_64bit() || !ops->read_cr ) @@ -6250,13 +6228,13 @@ x86_emulate( else if ( (rc = ops->read_cr(4, &cr4, ctxt)) != X86EMUL_OKAY ) goto done; generate_exception_if(!(cr4 & X86_CR4_PCIDE) && mmvalp->xmm[0], - EXC_GP, 0); + X86_EXC_GP, 0); break; case X86_INVPCID_ALL_INCL_GLOBAL: case X86_INVPCID_ALL_NON_GLOBAL: break; default: - generate_exception(EXC_GP, 0); + generate_exception(X86_EXC_GP, 0); } fail_if(!ops->tlb_op); @@ -6271,14 +6249,14 @@ x86_emulate( #ifndef X86EMUL_NO_SIMD case X86EMUL_OPC_EVEX_66(0x0f38, 0x83): /* vpmultishiftqb [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); host_and_vcpu_must_have(avx512_vbmi); fault_suppression = false; goto avx512f_no_sae; case X86EMUL_OPC_VEX_66(0x0f38, 0x8c): /* vpmaskmov{d,q} mem,{x,y}mm,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x8e): /* vpmaskmov{d,q} {x,y}mm,{x,y}mm,mem */ - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); host_and_vcpu_must_have(avx2); elem_bytes = 4 << vex.w; goto vmaskmov; @@ -6299,8 +6277,8 @@ x86_emulate( ASSERT(ea.type == OP_MEM); generate_exception_if(modrm_reg == state->sib_index || modrm_reg == mask_reg || - state->sib_index == mask_reg, EXC_UD); - generate_exception_if(!cpu_has_avx, EXC_UD); + state->sib_index == mask_reg, X86_EXC_UD); + generate_exception_if(!cpu_has_avx, X86_EXC_UD); vcpu_must_have(avx2); get_fpu(X86EMUL_FPU_ymm); @@ -6419,7 +6397,7 @@ x86_emulate( generate_exception_if((!evex.opmsk || evex.brs || evex.z || evex.reg != 0xf || modrm_reg == state->sib_index), - EXC_UD); + X86_EXC_UD); avx512_vlen_check(false); host_and_vcpu_must_have(avx512f); get_fpu(X86EMUL_FPU_zmm); @@ -6569,7 +6547,7 @@ x86_emulate( host_and_vcpu_must_have(avx512_4fmaps); generate_exception_if((ea.type != OP_MEM || evex.w || evex.brs || evex.lr != 2), - EXC_UD); + X86_EXC_UD); op_mask = op_mask & 0xffff ? 0xf : 0; goto simd_zmm; @@ -6578,7 +6556,7 @@ x86_emulate( host_and_vcpu_must_have(avx512_4fmaps); generate_exception_if((ea.type != OP_MEM || evex.w || evex.brs || evex.lr == 3), - EXC_UD); + X86_EXC_UD); op_mask = op_mask & 1 ? 0xf : 0; goto simd_zmm; @@ -6599,7 +6577,7 @@ x86_emulate( generate_exception_if((!evex.opmsk || evex.brs || evex.z || evex.reg != 0xf || modrm_reg == state->sib_index), - EXC_UD); + X86_EXC_UD); avx512_vlen_check(false); host_and_vcpu_must_have(avx512f); get_fpu(X86EMUL_FPU_zmm); @@ -6706,7 +6684,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0xb4): /* vpmadd52luq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0xb5): /* vpmadd52huq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512_ifma); - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); goto avx512f_no_sae; case X86EMUL_OPC_EVEX_66(0x0f38, 0xc6): @@ -6723,7 +6701,7 @@ x86_emulate( ASSERT(ea.type == OP_MEM); generate_exception_if((!cpu_has_avx512f || !evex.opmsk || evex.brs || evex.z || evex.reg != 0xf || evex.lr != 2), - EXC_UD); + X86_EXC_UD); switch ( modrm_reg & 7 ) { @@ -6734,7 +6712,7 @@ x86_emulate( vcpu_must_have(avx512pf); break; default: - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); } get_fpu(X86EMUL_FPU_zmm); @@ -6815,7 +6793,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0xcc): /* vrsqrt28p{s,d} zmm/mem,zmm{k} */ host_and_vcpu_must_have(avx512er); generate_exception_if((ea.type != OP_REG || !evex.brs) && evex.lr != 2, - EXC_UD); + X86_EXC_UD); goto simd_zmm; case X86EMUL_OPC_EVEX_66(0x0f38, 0xcb): /* vrcp28s{s,d} xmm/mem,xmm,xmm{k} */ @@ -6829,12 +6807,12 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f38, 0xcf): /* vgf2p8mulb {x,y}mm/mem,{x,y}mm,{x,y}mm */ host_and_vcpu_must_have(gfni); - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_avx; case X86EMUL_OPC_EVEX_66(0x0f38, 0xcf): /* vgf2p8mulb [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(gfni); - generate_exception_if(evex.w || evex.brs, EXC_UD); + generate_exception_if(evex.w || evex.brs, X86_EXC_UD); elem_bytes = 1; goto avx512f_no_sae; @@ -6853,7 +6831,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f38, 0xde): /* vaesdec [xyz]mm/mem,[xyz]mm,[xyz]mm */ case X86EMUL_OPC_EVEX_66(0x0f38, 0xdf): /* vaesdeclast [xyz]mm/mem,[xyz]mm,[xyz]mm */ host_and_vcpu_must_have(vaes); - generate_exception_if(evex.brs || evex.opmsk, EXC_UD); + generate_exception_if(evex.brs || evex.opmsk, X86_EXC_UD); goto avx512f_no_sae; #endif /* !X86EMUL_NO_SIMD */ @@ -6926,7 +6904,7 @@ x86_emulate( host_and_vcpu_must_have(bmi2); else host_and_vcpu_must_have(bmi1); - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); buf[0] = 0xc4; *pvex = vex; @@ -6960,7 +6938,7 @@ x86_emulate( goto unrecognized_insn; } - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); buf[0] = 0xc4; *pvex = vex; @@ -7013,7 +6991,7 @@ x86_emulate( case X86EMUL_OPC_VEX_F2(0x0f38, 0xf6): /* mulx r/m,r,r */ vcpu_must_have(bmi2); - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); ea.reg = decode_vex_gpr(vex.reg, &_regs, ctxt); if ( mode_64bit() && vex.w ) asm ( "mulq %3" : "=a" (*ea.reg), "=d" (dst.val) @@ -7025,10 +7003,10 @@ x86_emulate( case X86EMUL_OPC_66(0x0f38, 0xf8): /* movdir64b r,m512 */ host_and_vcpu_must_have(movdir64b); - generate_exception_if(ea.type != OP_MEM, EXC_UD); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); src.val = truncate_ea(*dst.reg); generate_exception_if(!is_aligned(x86_seg_es, src.val, 64, ctxt, ops), - EXC_GP, 0); + X86_EXC_GP, 0); fail_if(!ops->blk); state->blk = blk_movdir; BUILD_BUG_ON(sizeof(*mmvalp) < 64); @@ -7043,11 +7021,11 @@ x86_emulate( case X86EMUL_OPC_F2(0x0f38, 0xf8): /* enqcmd r,m512 */ case X86EMUL_OPC_F3(0x0f38, 0xf8): /* enqcmds r,m512 */ host_and_vcpu_must_have(enqcmd); - generate_exception_if(ea.type != OP_MEM, EXC_UD); - generate_exception_if(vex.pfx != vex_f2 && !mode_ring0(), EXC_GP, 0); + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); + generate_exception_if(vex.pfx != vex_f2 && !mode_ring0(), X86_EXC_GP, 0); src.val = truncate_ea(*dst.reg); generate_exception_if(!is_aligned(x86_seg_es, src.val, 64, ctxt, ops), - EXC_GP, 0); + X86_EXC_GP, 0); fail_if(!ops->blk); BUILD_BUG_ON(sizeof(*mmvalp) < 64); if ( (rc = ops->read(ea.mem.seg, ea.mem.off, mmvalp, 64, @@ -7055,16 +7033,16 @@ x86_emulate( goto done; if ( vex.pfx == vex_f2 ) /* enqcmd */ { - generate_exception_if(mmvalp->data32[0], EXC_GP, 0); + generate_exception_if(mmvalp->data32[0], X86_EXC_GP, 0); fail_if(!ops->read_msr); if ( (rc = ops->read_msr(MSR_PASID, &msr_val, ctxt)) != X86EMUL_OKAY ) goto done; - generate_exception_if(!(msr_val & PASID_VALID), EXC_GP, 0); + generate_exception_if(!(msr_val & PASID_VALID), X86_EXC_GP, 0); mmvalp->data32[0] = MASK_EXTR(msr_val, PASID_PASID_MASK); } else - generate_exception_if(mmvalp->data32[0] & 0x7ff00000, EXC_GP, 0); + generate_exception_if(mmvalp->data32[0] & 0x7ff00000, X86_EXC_GP, 0); state->blk = blk_enqcmd; if ( (rc = ops->blk(x86_seg_es, src.val, mmvalp, 64, &_regs.eflags, state, ctxt)) != X86EMUL_OKAY ) @@ -7074,7 +7052,7 @@ x86_emulate( case X86EMUL_OPC(0x0f38, 0xf9): /* movdiri mem,r */ host_and_vcpu_must_have(movdiri); - generate_exception_if(dst.type != OP_MEM, EXC_UD); + generate_exception_if(dst.type != OP_MEM, X86_EXC_UD); fail_if(!ops->blk); state->blk = blk_movdir; if ( (rc = ops->blk(dst.mem.seg, dst.mem.off, &src.val, op_bytes, @@ -7087,37 +7065,37 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f3a, 0x00): /* vpermq $imm8,ymm/m256,ymm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x01): /* vpermpd $imm8,ymm/m256,ymm */ - generate_exception_if(!vex.l || !vex.w, EXC_UD); + generate_exception_if(!vex.l || !vex.w, X86_EXC_UD); goto simd_0f_imm8_avx2; case X86EMUL_OPC_EVEX_66(0x0f3a, 0x00): /* vpermq $imm8,{y,z}mm/mem,{y,z}mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x01): /* vpermpd $imm8,{y,z}mm/mem,{y,z}mm{k} */ - generate_exception_if(!evex.lr || !evex.w, EXC_UD); + generate_exception_if(!evex.lr || !evex.w, X86_EXC_UD); fault_suppression = false; goto avx512f_imm8_no_sae; case X86EMUL_OPC_VEX_66(0x0f3a, 0x38): /* vinserti128 $imm8,xmm/m128,ymm,ymm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x39): /* vextracti128 $imm8,ymm,xmm/m128 */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x46): /* vperm2i128 $imm8,ymm/m256,ymm,ymm */ - generate_exception_if(!vex.l, EXC_UD); + generate_exception_if(!vex.l, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x02): /* vpblendd $imm8,{x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_imm8_avx2; case X86EMUL_OPC_VEX_66(0x0f3a, 0x06): /* vperm2f128 $imm8,ymm/m256,ymm,ymm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x18): /* vinsertf128 $imm8,xmm/m128,ymm,ymm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x19): /* vextractf128 $imm8,ymm,xmm/m128 */ - generate_exception_if(!vex.l, EXC_UD); + generate_exception_if(!vex.l, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x04): /* vpermilps $imm8,{x,y}mm/mem,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x05): /* vpermilpd $imm8,{x,y}mm/mem,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_imm8_avx; case X86EMUL_OPC_EVEX_66(0x0f3a, 0x04): /* vpermilps $imm8,[xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x05): /* vpermilpd $imm8,[xyz]mm/mem,[xyz]mm{k} */ - generate_exception_if(evex.w != (b & 1), EXC_UD); + generate_exception_if(evex.w != (b & 1), X86_EXC_UD); fault_suppression = false; goto avx512f_imm8_no_sae; @@ -7136,12 +7114,12 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x0a): /* vrndscaless $imm8,xmm/mem,xmm,xmm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x0b): /* vrndscalesd $imm8,xmm/mem,xmm,xmm{k} */ - generate_exception_if(ea.type != OP_REG && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_REG && evex.brs, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x08): /* vrndscaleps $imm8,[xyz]mm/mem,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x09): /* vrndscalepd $imm8,[xyz]mm/mem,[xyz]mm{k} */ host_and_vcpu_must_have(avx512f); - generate_exception_if(evex.w != (b & 1), EXC_UD); + generate_exception_if(evex.w != (b & 1), X86_EXC_UD); avx512_vlen_check(b & 2); goto simd_imm8_zmm; @@ -7177,7 +7155,7 @@ x86_emulate( #ifndef X86EMUL_NO_SIMD case X86EMUL_OPC_EVEX_66(0x0f3a, 0x42): /* vdbpsadbw $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(evex.w, EXC_UD); + generate_exception_if(evex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x0f): /* vpalignr $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ fault_suppression = false; @@ -7225,7 +7203,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f3a, 0x15): /* vpextrw $imm8,xmm,r/m */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x16): /* vpextr{d,q} $imm8,xmm,r/m */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x17): /* vextractps $imm8,xmm,r/m */ - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); @@ -7237,7 +7215,7 @@ x86_emulate( goto pextr; case X86EMUL_OPC_EVEX_66(0x0f, 0xc5): /* vpextrw $imm8,xmm,reg */ - generate_exception_if(ea.type != OP_REG, EXC_UD); + generate_exception_if(ea.type != OP_REG, X86_EXC_UD); /* Convert to alternative encoding: We want to use a memory operand. */ evex.opcx = ext_0f3a; b = 0x15; @@ -7251,7 +7229,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x17): /* vextractps $imm8,xmm,r/m */ generate_exception_if((evex.lr || evex.reg != 0xf || !evex.RX || evex.opmsk || evex.brs), - EXC_UD); + X86_EXC_UD); if ( !(b & 2) ) host_and_vcpu_must_have(avx512bw); else if ( !(b & 1) ) @@ -7272,13 +7250,13 @@ x86_emulate( /* vextracti64x2 $imm8,{y,z}mm,xmm/m128{k} */ if ( evex.w ) host_and_vcpu_must_have(avx512dq); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x23): /* vshuff32x4 $imm8,{y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ /* vshuff64x2 $imm8,{y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x43): /* vshufi32x4 $imm8,{y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ /* vshufi64x2 $imm8,{y,z}mm/mem,{y,z}mm,{y,z}mm{k} */ - generate_exception_if(!evex.lr, EXC_UD); + generate_exception_if(!evex.lr, X86_EXC_UD); fault_suppression = false; goto avx512f_imm8_no_sae; @@ -7292,7 +7270,7 @@ x86_emulate( /* vextracti64x4 $imm8,zmm,ymm/m256{k} */ if ( !evex.w ) host_and_vcpu_must_have(avx512dq); - generate_exception_if(evex.lr != 2 || evex.brs, EXC_UD); + generate_exception_if(evex.lr != 2 || evex.brs, X86_EXC_UD); fault_suppression = false; goto avx512f_imm8_no_sae; @@ -7306,14 +7284,14 @@ x86_emulate( { generate_exception_if((evex.w || evex.reg != 0xf || !evex.RX || (ea.type != OP_REG && (evex.z || evex.brs))), - EXC_UD); + X86_EXC_UD); host_and_vcpu_must_have(avx512f); avx512_vlen_check(false); opc = init_evex(stub); } else { - generate_exception_if(vex.w || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.w || vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(f16c); opc = init_prefixes(stub); } @@ -7395,12 +7373,12 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x1f): /* vpcmp{d,q} $imm8,[xyz]mm/mem,[xyz]mm,k{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x3e): /* vpcmpu{b,w} $imm8,[xyz]mm/mem,[xyz]mm,k{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x3f): /* vpcmp{b,w} $imm8,[xyz]mm/mem,[xyz]mm,k{k} */ - generate_exception_if(!evex.r || !evex.R || evex.z, EXC_UD); + generate_exception_if(!evex.r || !evex.R || evex.z, X86_EXC_UD); if ( !(b & 0x20) ) goto avx512f_imm8_no_sae; avx512bw_imm: host_and_vcpu_must_have(avx512bw); - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); elem_bytes = 1 << evex.w; avx512_vlen_check(false); goto simd_imm8_zmm; @@ -7416,7 +7394,7 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f3a, 0x20): /* vpinsrb $imm8,r32/m8,xmm,xmm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x22): /* vpinsr{d,q} $imm8,r/m,xmm,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); if ( !mode_64bit() ) vex.w = 0; memcpy(mmvalp, &src.val, src.bytes); @@ -7434,13 +7412,13 @@ x86_emulate( op_bytes = 4; /* fall through */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x41): /* vdppd $imm8,{x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); goto simd_0f_imm8_avx; case X86EMUL_OPC_EVEX_66(0x0f3a, 0x21): /* vinsertps $imm8,xmm/m32,xmm,xmm */ host_and_vcpu_must_have(avx512f); generate_exception_if(evex.lr || evex.w || evex.opmsk || evex.brs, - EXC_UD); + X86_EXC_UD); op_bytes = 4; goto simd_imm8_zmm; @@ -7462,7 +7440,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x27): /* vgetmants{s,d} $imm8,xmm/mem,xmm,xmm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x55): /* vfixupimms{s,d} $imm8,xmm/mem,xmm,xmm{k} */ host_and_vcpu_must_have(avx512f); - generate_exception_if(ea.type != OP_REG && evex.brs, EXC_UD); + generate_exception_if(ea.type != OP_REG && evex.brs, X86_EXC_UD); if ( !evex.brs ) avx512_vlen_check(true); goto simd_imm8_zmm; @@ -7473,7 +7451,7 @@ x86_emulate( host_and_vcpu_must_have(avx512dq); opmask_shift_imm: generate_exception_if(vex.l || !vex.r || vex.reg != 0xf || - ea.type != OP_REG, EXC_UD); + ea.type != OP_REG, X86_EXC_UD); host_and_vcpu_must_have(avx512f); get_fpu(X86EMUL_FPU_opmask); op_bytes = 1; /* Any non-zero value will do. */ @@ -7495,7 +7473,7 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x44): /* vpclmulqdq $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm */ host_and_vcpu_must_have(vpclmulqdq); - generate_exception_if(evex.brs || evex.opmsk, EXC_UD); + generate_exception_if(evex.brs || evex.opmsk, X86_EXC_UD); goto avx512f_imm8_no_sae; case X86EMUL_OPC_VEX_66(0x0f3a, 0x48): /* vpermil2ps $imm,{x,y}mm/mem,{x,y}mm,{x,y}mm,{x,y}mm */ @@ -7507,11 +7485,11 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f3a, 0x4a): /* vblendvps {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0x4b): /* vblendvpd {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_imm8_avx; case X86EMUL_OPC_VEX_66(0x0f3a, 0x4c): /* vpblendvb {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_int_imm8; case X86EMUL_OPC_VEX_66(0x0f3a, 0x5c): /* vfmaddsubps {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */ @@ -7572,7 +7550,7 @@ x86_emulate( } else { - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm); } @@ -7623,16 +7601,16 @@ x86_emulate( case X86EMUL_OPC_EVEX_66(0x0f3a, 0x66): /* vfpclassp{s,d} $imm8,[xyz]mm/mem,k{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x67): /* vfpclasss{s,d} $imm8,xmm/mem,k{k} */ host_and_vcpu_must_have(avx512dq); - generate_exception_if(!evex.r || !evex.R || evex.z, EXC_UD); + generate_exception_if(!evex.r || !evex.R || evex.z, X86_EXC_UD); if ( !(b & 1) ) goto avx512f_imm8_no_sae; - generate_exception_if(evex.brs, EXC_UD); + generate_exception_if(evex.brs, X86_EXC_UD); avx512_vlen_check(true); goto simd_imm8_zmm; case X86EMUL_OPC_EVEX_66(0x0f3a, 0x70): /* vpshldw $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x72): /* vpshrdw $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); elem_bytes = 2; /* fall through */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0x71): /* vpshld{d,q} $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -7653,13 +7631,13 @@ x86_emulate( case X86EMUL_OPC_VEX_66(0x0f3a, 0xce): /* vgf2p8affineqb $imm8,{x,y}mm/mem,{x,y}mm,{x,y}mm */ case X86EMUL_OPC_VEX_66(0x0f3a, 0xcf): /* vgf2p8affineinvqb $imm8,{x,y}mm/mem,{x,y}mm,{x,y}mm */ host_and_vcpu_must_have(gfni); - generate_exception_if(!vex.w, EXC_UD); + generate_exception_if(!vex.w, X86_EXC_UD); goto simd_0f_imm8_avx; case X86EMUL_OPC_EVEX_66(0x0f3a, 0xce): /* vgf2p8affineqb $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f3a, 0xcf): /* vgf2p8affineinvqb $imm8,[xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(gfni); - generate_exception_if(!evex.w, EXC_UD); + generate_exception_if(!evex.w, X86_EXC_UD); fault_suppression = false; goto avx512f_imm8_no_sae; @@ -7668,14 +7646,14 @@ x86_emulate( host_and_vcpu_must_have(aesni); if ( vex.opcx == vex_none ) goto simd_0f3a_common; - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); goto simd_0f_imm8_avx; #endif /* X86EMUL_NO_SIMD */ case X86EMUL_OPC_VEX_F2(0x0f3a, 0xf0): /* rorx imm,r/m,r */ vcpu_must_have(bmi2); - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); if ( ea.type == OP_REG ) src.val = *ea.reg; else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off, &src.val, op_bytes, @@ -7713,11 +7691,11 @@ x86_emulate( case X86EMUL_OPC_XOP(08, 0xed): /* vpcomuw $imm,xmm/m128,xmm,xmm */ case X86EMUL_OPC_XOP(08, 0xee): /* vpcomud $imm,xmm/m128,xmm,xmm */ case X86EMUL_OPC_XOP(08, 0xef): /* vpcomuq $imm,xmm/m128,xmm,xmm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_XOP(08, 0xa3): /* vpperm xmm/m128,xmm,xmm,xmm */ /* vpperm xmm,xmm/m128,xmm,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_XOP(08, 0xa2): /* vpcmov {x,y}mm/mem,{x,y}mm,{x,y}mm,{x,y}mm */ /* vpcmov {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */ @@ -7747,7 +7725,7 @@ x86_emulate( uint8_t *buf = get_stub(stub); typeof(vex) *pxop = container_of(buf + 1, typeof(vex), raw[0]); - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); buf[0] = 0x8f; *pxop = vex; @@ -7781,7 +7759,7 @@ x86_emulate( case 0: /* llwpcb r */ case 1: /* slwpcb r */ /* LWP is unsupported, so produce #UD unconditionally. */ - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); } goto unrecognized_insn; @@ -7789,12 +7767,12 @@ x86_emulate( case X86EMUL_OPC_XOP(09, 0x82): /* vfrczss xmm/m128,xmm */ case X86EMUL_OPC_XOP(09, 0x83): /* vfrczsd xmm/m128,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_XOP(09, 0x80): /* vfrczps {x,y}mm/mem,{x,y}mm */ case X86EMUL_OPC_XOP(09, 0x81): /* vfrczpd {x,y}mm/mem,{x,y}mm */ host_and_vcpu_must_have(xop); - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); goto simd_0f_ymm; case X86EMUL_OPC_XOP(09, 0xc1): /* vphaddbw xmm/m128,xmm */ @@ -7812,7 +7790,7 @@ x86_emulate( case X86EMUL_OPC_XOP(09, 0xe2): /* vphsubwd xmm/m128,xmm */ case X86EMUL_OPC_XOP(09, 0xe3): /* vphsubdq xmm/m128,xmm */ case X86EMUL_OPC_XOP(09, 0xe1): /* vphsubbw xmm/m128,xmm */ - generate_exception_if(vex.w, EXC_UD); + generate_exception_if(vex.w, X86_EXC_UD); /* fall through */ case X86EMUL_OPC_XOP(09, 0x90): /* vprotb xmm/m128,xmm,xmm */ /* vprotb xmm,xmm/m128,xmm */ @@ -7838,7 +7816,7 @@ x86_emulate( /* vpshad xmm,xmm/m128,xmm */ case X86EMUL_OPC_XOP(09, 0x9b): /* vpshaq xmm/m128,xmm,xmm */ /* vpshaq xmm,xmm/m128,xmm */ - generate_exception_if(vex.l, EXC_UD); + generate_exception_if(vex.l, X86_EXC_UD); host_and_vcpu_must_have(xop); goto simd_0f_ymm; @@ -7850,7 +7828,7 @@ x86_emulate( typeof(vex) *pxop = container_of(buf + 1, typeof(vex), raw[0]); host_and_vcpu_must_have(tbm); - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.l || vex.reg != 0xf, X86_EXC_UD); if ( ea.type == OP_REG ) src.val = *ea.reg; @@ -7879,7 +7857,7 @@ x86_emulate( case 0: /* lwpins $imm32,r/m,r */ case 1: /* lwpval $imm32,r/m,r */ /* LWP is unsupported, so produce #UD unconditionally. */ - generate_exception(EXC_UD); + generate_exception(X86_EXC_UD); } goto unrecognized_insn; @@ -7946,10 +7924,10 @@ x86_emulate( } else if ( state->simd_size ) { - generate_exception_if(!op_bytes, EXC_UD); + generate_exception_if(!op_bytes, X86_EXC_UD); generate_exception_if((vex.opcx && (d & TwoOp) && (vex.reg != 0xf || (evex_encoded() && !evex.RX))), - EXC_UD); + X86_EXC_UD); if ( !opc ) BUG(); @@ -7988,7 +7966,7 @@ x86_emulate( generate_exception_if(!(mxcsr & MXCSR_MM) && !is_aligned(ea.mem.seg, ea.mem.off, op_bytes, ctxt, ops), - EXC_GP, 0); + X86_EXC_GP, 0); EXPECT(elem_bytes > 0); if ( evex.brs ) @@ -8159,14 +8137,15 @@ x86_emulate( #ifdef __XEN__ emulation_stub_failure: - generate_exception_if(stub_exn.info.fields.trapnr == EXC_MF, EXC_MF); - if ( stub_exn.info.fields.trapnr == EXC_XM ) + if ( stub_exn.info.fields.trapnr == X86_EXC_MF ) + generate_exception(X86_EXC_MF); + if ( stub_exn.info.fields.trapnr == X86_EXC_XM ) { unsigned long cr4; if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) cr4 = X86_CR4_OSXMMEXCPT; - generate_exception(cr4 & X86_CR4_OSXMMEXCPT ? EXC_XM : EXC_UD); + generate_exception(cr4 & X86_CR4_OSXMMEXCPT ? X86_EXC_XM : X86_EXC_UD); } gprintk(XENLOG_WARNING, "exception %u (ec=%04x) in emulation stub (line %u)\n", @@ -8174,7 +8153,8 @@ x86_emulate( stub_exn.line); gprintk(XENLOG_INFO, " stub: %"__stringify(MAX_INST_LEN)"ph\n", stub.func); - generate_exception_if(stub_exn.info.fields.trapnr == EXC_UD, EXC_UD); + if ( stub_exn.info.fields.trapnr == X86_EXC_UD ) + generate_exception(X86_EXC_UD); domain_crash(current->domain); #endif -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Apr 07 09:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 07 Apr 2023 09:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.519049.806193 (Exim 4.92) (envelope-from ) id 1pkidh-0007yc-LT; Fri, 07 Apr 2023 09:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 519049.806193; Fri, 07 Apr 2023 09:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkidh-0007yV-J3; Fri, 07 Apr 2023 09:44:13 +0000 Received: by outflank-mailman (input) for mailman id 519049; Fri, 07 Apr 2023 09:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkidg-0007yI-H1 for xen-changelog@lists.xenproject.org; Fri, 07 Apr 2023 09:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pkidg-0007yB-Fd for xen-changelog@lists.xenproject.org; Fri, 07 Apr 2023 09:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pkidg-0002ec-Ea for xen-changelog@lists.xenproject.org; Fri, 07 Apr 2023 09:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bdDBgtmz99hQTtKE5yJ34rff+QK7hF8xCJIePOQpSIk=; b=sJJOcjo4/TD7kXy7UgaRtb61dX WOKfYSZmHCMtLgzcopQ1uSeXAdSQkdrgDqwt061g9jkxjNYrly5T5Rv4CkgpdSkMuMFJL10OnKZ0V 8JKA8XcKdd/BfOLNFjzfnQuMcnsk1lRYrmor+9T0FgnPEDSHbgZljekHndYfhv0KY9JQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Provide EXITINFO decodes for MOV CR intercepts Message-Id: Date: Fri, 07 Apr 2023 09:44:12 +0000 commit a5087069a8c40541ba81fa0e2850471c949932b3 Author: Andrew Cooper AuthorDate: Wed Mar 15 19:25:56 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Apr 6 13:56:51 2023 +0100 x86/svm: Provide EXITINFO decodes for MOV CR intercepts This removes raw number manipulation, and makes the logic easier to follow. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/hvm/svm/svm.c | 4 ++-- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 8d8b250101..1b32ef77b6 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1740,7 +1740,7 @@ static void svm_vmexit_do_cr_access( cr = vmcb->exitcode - VMEXIT_CR0_READ; dir = (cr > 15); cr &= 0xf; - gp = vmcb->exitinfo1 & 0xf; + gp = vmcb->ei.mov_cr.gpr; rc = dir ? hvm_mov_to_cr(cr, gp) : hvm_mov_from_cr(cr, gp); @@ -2961,7 +2961,7 @@ void svm_vmexit_handler(void) case VMEXIT_CR0_READ ... VMEXIT_CR15_READ: case VMEXIT_CR0_WRITE ... VMEXIT_CR15_WRITE: - if ( cpu_has_svm_decode && (vmcb->exitinfo1 & (1ULL << 63)) ) + if ( cpu_has_svm_decode && vmcb->ei.mov_cr.mov_insn ) svm_vmexit_do_cr_access(vmcb, regs); else if ( !hvm_emulate_one_insn(x86_insn_is_cr_access, "CR access") ) hvm_inject_hw_exception(X86_EXC_GP, 0); diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index b809e85507..6cd1c4cfe4 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -450,6 +450,11 @@ struct vmcb_struct { uint64_t nrip; } io; + struct { + uint64_t gpr:4; + uint64_t :59; + bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ + } mov_cr; struct { uint16_t sel; uint64_t :48; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 08 11:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 08 Apr 2023 11:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.519214.806450 (Exim 4.92) (envelope-from ) id 1pl6zD-00042U-Ct; Sat, 08 Apr 2023 11:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 519214.806450; Sat, 08 Apr 2023 11:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pl6zD-00042M-9u; Sat, 08 Apr 2023 11:44:03 +0000 Received: by outflank-mailman (input) for mailman id 519214; Sat, 08 Apr 2023 11:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pl6zC-00042G-0U for xen-changelog@lists.xenproject.org; Sat, 08 Apr 2023 11:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pl6zB-0003jD-Ur for xen-changelog@lists.xenproject.org; Sat, 08 Apr 2023 11:44:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pl6zB-0007rc-T2 for xen-changelog@lists.xenproject.org; Sat, 08 Apr 2023 11:44:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=uJdYwfucbljp3NNjBSt5cxgHC18X8YpUsTlRGYT1TfM=; b=yEpmJT3vKjx9We/ZtyEbefJXcE PvdxbQh2IG+rInpCz0Tt1vOMu24crf+YNE1BOfK0MpjnW5AZ7ZA5IZ62oXPO3vbZkVRKGntjjxZ8s 0JX2To4nZXilj12krH3rbgMfny8RPAQSl8/pbND9y//EIHy9SZLmRaAt5mHQnV9NI/JU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Provide EXITINFO decodes for Exceptions/NPF intercepts Message-Id: Date: Sat, 08 Apr 2023 11:44:01 +0000 commit ddaf7bb0cfd27369252de52e4b03410c4065bad2 Author: Andrew Cooper AuthorDate: Fri Mar 17 11:10:06 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Apr 6 15:39:12 2023 +0100 x86/svm: Provide EXITINFO decodes for Exceptions/NPF intercepts Exceptions and NPF intercepts almost have the same layout, but NPF has bits above 31 in the error code, and the name for exitinfo2 really does want distinguishing between cr2 and gpa. In nsvm_vcpu_vmexit_inject() rearrange VMEXIT_NPF to fall through instead of repeating the exitinfo1 write. Use the fallthrough pseudo keyword instead of a comment. In VMEXIT_NPF, as we're editing the printk() anyway, switch to using the newer domain_crash() form. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/hvm/svm/nestedsvm.c | 9 +++------ xen/arch/x86/hvm/svm/svm.c | 23 ++++++++++------------- xen/arch/x86/include/asm/hvm/svm/vmcb.h | 10 ++++++++++ 3 files changed, 23 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 2003f28f66..51e437e73a 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -824,14 +824,11 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, ns_vmcb->exit_int_info = ns_vmcb->event_inj; break; case VMEXIT_EXCEPTION_PF: - ns_vmcb->_cr2 = ns_vmcb->exitinfo2; - /* fall through */ + ns_vmcb->_cr2 = ns_vmcb->ei.exc.cr2; + fallthrough; case VMEXIT_NPF: - /* PF error code */ - ns_vmcb->exitinfo1 = svm->ns_vmexit.exitinfo1; - /* fault address */ ns_vmcb->exitinfo2 = svm->ns_vmexit.exitinfo2; - break; + fallthrough; case VMEXIT_EXCEPTION_NP: case VMEXIT_EXCEPTION_SS: case VMEXIT_EXCEPTION_GP: diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 1b32ef77b6..1af7e8edf4 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2808,9 +2808,9 @@ void svm_vmexit_handler(void) case VMEXIT_EXCEPTION_PF: { - unsigned long va; - va = vmcb->exitinfo2; - regs->error_code = vmcb->exitinfo1; + unsigned long va = vmcb->ei.exc.cr2; + + regs->error_code = vmcb->ei.exc.ec; HVM_DBG_LOG(DBG_LEVEL_VMMU, "eax=%lx, ebx=%lx, ecx=%lx, edx=%lx, esi=%lx, edi=%lx", regs->rax, regs->rbx, regs->rcx, @@ -2838,7 +2838,7 @@ void svm_vmexit_handler(void) case VMEXIT_EXCEPTION_AC: HVMTRACE_1D(TRAP, X86_EXC_AC); - hvm_inject_hw_exception(X86_EXC_AC, vmcb->exitinfo1); + hvm_inject_hw_exception(X86_EXC_AC, vmcb->ei.exc.ec); break; case VMEXIT_EXCEPTION_UD: @@ -3051,18 +3051,15 @@ void svm_vmexit_handler(void) case VMEXIT_NPF: if ( cpu_has_svm_decode ) v->arch.hvm.svm.cached_insn_len = vmcb->guest_ins_len & 0xf; - rc = vmcb->exitinfo1 & PFEC_page_present - ? p2m_pt_handle_deferred_changes(vmcb->exitinfo2) : 0; + rc = vmcb->ei.npf.ec & PFEC_page_present + ? p2m_pt_handle_deferred_changes(vmcb->ei.npf.gpa) : 0; if ( rc == 0 ) /* If no recal adjustments were being made - handle this fault */ - svm_do_nested_pgfault(v, regs, vmcb->exitinfo1, vmcb->exitinfo2); + svm_do_nested_pgfault(v, regs, vmcb->ei.npf.ec, vmcb->ei.npf.gpa); else if ( rc < 0 ) - { - printk(XENLOG_G_ERR - "%pv: Error %d handling NPF (gpa=%08lx ec=%04lx)\n", - v, rc, vmcb->exitinfo2, vmcb->exitinfo1); - domain_crash(v->domain); - } + domain_crash(v->domain, + "%pv: Error %d handling NPF (gpa=%08lx ec=%04lx)\n", + v, rc, vmcb->ei.npf.gpa, vmcb->ei.npf.ec); v->arch.hvm.svm.cached_insn_len = 0; break; diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 6cd1c4cfe4..8ec2ce6cdf 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -436,6 +436,12 @@ struct vmcb_struct { uint64_t exitinfo2; /* offset 0x80 */ }; union { + struct { + uint32_t ec; /* #NP, #SS, #GP, #PF, #AC */ + uint32_t :32; + + uint64_t cr2; /* #PF */ + } exc; struct { bool in:1; bool :1; @@ -455,6 +461,10 @@ struct vmcb_struct { uint64_t :59; bool mov_insn:1; /* MOV, as opposed to LMSW, CLTS, etc */ } mov_cr; + struct { + uint64_t ec; + uint64_t gpa; + } npf; struct { uint16_t sel; uint64_t :48; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 12:22:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 12:22:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520203.807527 (Exim 4.92) (envelope-from ) id 1pmZUA-0005zH-PW; Wed, 12 Apr 2023 12:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520203.807527; Wed, 12 Apr 2023 12:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUA-0005z9-Mj; Wed, 12 Apr 2023 12:22:02 +0000 Received: by outflank-mailman (input) for mailman id 520203; Wed, 12 Apr 2023 12:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUA-0005z3-DR for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUA-00005T-CH for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmZUA-0005hW-Ac for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NS10dqomwtODUB5Z5FIERNAzVVrR8L9iRcPaJhddC20=; b=pGv4WTtLqJQkDoajen/Hh53Rjn XxIqRkkk5UfWwpEbTAtRdCgJQ3ZMN4azmwR7KM836znhjHuf5vcKxtmtiuYyOv3mGlW3khv1E8q/2 ptdW+lIY8LH+Sb9e/YGcevyzk8UC3fNvHYM5uutPI0GAdILZO2R8hxDCBScL3+IQIm4s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] CI: Drop automation/configs/ Message-Id: Date: Wed, 12 Apr 2023 12:22:02 +0000 commit 4c0d792675f0843c6dd52acdae38e5c0e112b09e Author: Andrew Cooper AuthorDate: Thu Dec 29 15:39:13 2022 +0000 Commit: Andrew Cooper CommitDate: Tue Apr 11 19:40:08 2023 +0100 CI: Drop automation/configs/ Having 3 extra hypervisor builds on the end of a full build is deeply confusing to debug if one of them fails, because the .config file presented in the artefacts is not the one which caused a build failure. Also, the log tends to be truncated in the UI. PV-only is tested as part of PV-Shim in a full build anyway, so doesn't need repeating. HVM-only and neither appear frequently in randconfig, so drop all the logic here to simplify things. Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit 7b20009a812f26e74bdbde2ab96165376b3dad34) --- automation/configs/x86/hvm_only_config | 3 --- automation/configs/x86/no_hvm_pv_config | 3 --- automation/configs/x86/pv_only_config | 3 --- automation/scripts/build | 21 --------------------- 4 files changed, 30 deletions(-) diff --git a/automation/configs/x86/hvm_only_config b/automation/configs/x86/hvm_only_config deleted file mode 100644 index 9efbddd535..0000000000 --- a/automation/configs/x86/hvm_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_HVM=y -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/no_hvm_pv_config b/automation/configs/x86/no_hvm_pv_config deleted file mode 100644 index 0bf6a8e468..0000000000 --- a/automation/configs/x86/no_hvm_pv_config +++ /dev/null @@ -1,3 +0,0 @@ -# CONFIG_HVM is not set -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/pv_only_config b/automation/configs/x86/pv_only_config deleted file mode 100644 index e9d8b4a7c7..0000000000 --- a/automation/configs/x86/pv_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PV=y -# CONFIG_HVM is not set -# CONFIG_DEBUG is not set diff --git a/automation/scripts/build b/automation/scripts/build index a593419063..5dafa72ba5 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -85,24 +85,3 @@ if [[ "${XEN_TARGET_ARCH}" != "x86_32" ]]; then cp -r dist binaries/ fi fi - -if [[ "${hypervisor_only}" == "y" ]]; then - # If we are build testing a specific Kconfig exit now, there's no point in - # testing all the possible configs. - exit 0 -fi - -# Build all the configs we care about -case ${XEN_TARGET_ARCH} in - x86_64) arch=x86 ;; - *) exit 0 ;; -esac - -cfg_dir="automation/configs/${arch}" -for cfg in `ls ${cfg_dir}`; do - echo "Building $cfg" - make -j$(nproc) -C xen clean - rm -f xen/.config - make -C xen KBUILD_DEFCONFIG=../../../../${cfg_dir}/${cfg} defconfig - make -j$(nproc) -C xen -done -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 12:22:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 12:22:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520204.807531 (Exim 4.92) (envelope-from ) id 1pmZUL-000619-RJ; Wed, 12 Apr 2023 12:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520204.807531; Wed, 12 Apr 2023 12:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUL-000611-OL; Wed, 12 Apr 2023 12:22:13 +0000 Received: by outflank-mailman (input) for mailman id 520204; Wed, 12 Apr 2023 12:22:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUK-00060r-HP for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUK-00005d-GY for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmZUK-0005i2-Ey for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lZU7qEmc/aI4EgFf8+80gw+YqpX1Sux1PD0xu45uOzc=; b=ILITwTMEwPjiXD3WZLYsCgkPq7 su24MiCe6kc1E34LYgjP5/cn6nb2BkXE0bmWiyelu4dQCtecbyttiR0BlenDZaWFrQuOnJHLbVpqP bs7hA9L8EtyB9GgIhFrOITaTBPxd1BjPBlbJhgVOjv+LqmkBsZbvBaD75M7FRtMCYIx8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] automation: Switch arm32 cross builds to run on arm64 Message-Id: Date: Wed, 12 Apr 2023 12:22:12 +0000 commit e3b23da4a10fafdabce22e2eba225d9404fc646f Author: Michal Orzel AuthorDate: Tue Feb 14 16:38:38 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Apr 11 19:40:08 2023 +0100 automation: Switch arm32 cross builds to run on arm64 Due to the limited x86 CI resources slowing down the whole pipeline, switch the arm32 cross builds to be executed on arm64 which is much more capable. For that, rename the existing debian container dockerfile from unstable-arm32-gcc to unstable-arm64v8-arm32-gcc and use arm64v8/debian:unstable as an image. Note, that we cannot use the same container name as we have to keep the backwards compatibility. Take the opportunity to remove extra empty line at the end of a file. Modify the tag of .arm32-cross-build-tmpl to arm64 and update the build jobs accordingly. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit a35fccc8df93de7154dba87db6e7bcf391e9d51c) --- .../build/debian/unstable-arm32-gcc.dockerfile | 24 ---------------------- .../debian/unstable-arm64v8-arm32-gcc.dockerfile | 23 +++++++++++++++++++++ automation/gitlab-ci/build.yaml | 10 ++++----- 3 files changed, 28 insertions(+), 29 deletions(-) diff --git a/automation/build/debian/unstable-arm32-gcc.dockerfile b/automation/build/debian/unstable-arm32-gcc.dockerfile deleted file mode 100644 index b41a57f197..0000000000 --- a/automation/build/debian/unstable-arm32-gcc.dockerfile +++ /dev/null @@ -1,24 +0,0 @@ -FROM debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root -ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - flex \ - bison \ - git \ - gcc-arm-linux-gnueabihf \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - diff --git a/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile b/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile new file mode 100644 index 0000000000..11860425a6 --- /dev/null +++ b/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile @@ -0,0 +1,23 @@ +FROM arm64v8/debian:unstable +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root +ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + flex \ + bison \ + git \ + gcc-arm-linux-gnueabihf \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index bed161b471..b4caf159f9 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -123,7 +123,7 @@ variables: XEN_TARGET_ARCH: arm32 tags: - - x86_64 + - arm64 .arm32-cross-build: extends: .arm32-cross-build-tmpl @@ -505,23 +505,23 @@ alpine-3.12-clang-debug: debian-unstable-gcc-arm32: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc debian-unstable-gcc-arm32-debug: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc debian-unstable-gcc-arm32-randconfig: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc RANDCONFIG: y debian-unstable-gcc-arm32-debug-randconfig: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc RANDCONFIG: y # Arm builds -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 12:22:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 12:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520205.807537 (Exim 4.92) (envelope-from ) id 1pmZUV-00063y-Tq; Wed, 12 Apr 2023 12:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520205.807537; Wed, 12 Apr 2023 12:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUV-00063q-Q1; Wed, 12 Apr 2023 12:22:23 +0000 Received: by outflank-mailman (input) for mailman id 520205; Wed, 12 Apr 2023 12:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUU-00063f-LP for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUU-000068-KK for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmZUU-0005iV-JD for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WEjRXsfDkszATL6qLr9otQYSnmlrKbdQqvO0kEGtPQw=; b=w0BgQ6A1uiyF5gJDG6z3cI2fL3 DluzlFWHMiGVzeHnuOv1oqBNTSvG/8IZRtPhU8p+vNj3xij8o4vYgA+WNf5gxR5vnXo11QpcL4HPW d9lWayeY9d5Dfvxff3ElOEtfktFdTALzqBfeeQtVffTE2TAbOl3YGj1W0uoTV8OZZiw8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] automation: Remove CentOS 7.2 containers and builds Message-Id: Date: Wed, 12 Apr 2023 12:22:22 +0000 commit 8c414bab3092bb68ab4eaaba39b61e3804c45f0a Author: Anthony PERARD AuthorDate: Tue Feb 21 16:55:36 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Apr 11 19:40:08 2023 +0100 automation: Remove CentOS 7.2 containers and builds We already have a container which track the latest CentOS 7, no need for this one as well. Also, 7.2 have outdated root certificate which prevent connection to website which use Let's Encrypt. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit ba512629f76dfddb39ea9133ee51cdd9e392a927) --- automation/build/centos/7.2.dockerfile | 52 --------------------------------- automation/build/centos/CentOS-7.2.repo | 35 ---------------------- automation/gitlab-ci/build.yaml | 10 ------- 3 files changed, 97 deletions(-) diff --git a/automation/build/centos/7.2.dockerfile b/automation/build/centos/7.2.dockerfile deleted file mode 100644 index 4baa097e31..0000000000 --- a/automation/build/centos/7.2.dockerfile +++ /dev/null @@ -1,52 +0,0 @@ -FROM centos:7.2.1511 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -# ensure we only get bits from the vault for -# the version we want -COPY CentOS-7.2.repo /etc/yum.repos.d/CentOS-Base.repo - -# install EPEL for dev86, xz-devel and possibly other packages -RUN yum -y install https://dl.fedoraproject.org/pub/epel/epel-release-latest-7.noarch.rpm && \ - yum clean all - -RUN mkdir /build -WORKDIR /build - -# work around https://github.com/moby/moby/issues/10180 -# and install Xen depends -RUN rpm --rebuilddb && \ - yum -y install \ - yum-plugin-ovl \ - gcc \ - gcc-c++ \ - ncurses-devel \ - zlib-devel \ - openssl-devel \ - python-devel \ - libuuid-devel \ - pkgconfig \ - # gettext for Xen < 4.13 - gettext \ - flex \ - bison \ - libaio-devel \ - glib2-devel \ - yajl-devel \ - pixman-devel \ - glibc-devel \ - # glibc-devel.i686 for Xen < 4.15 - glibc-devel.i686 \ - make \ - binutils \ - git \ - wget \ - acpica-tools \ - python-markdown \ - patch \ - checkpolicy \ - dev86 \ - xz-devel \ - bzip2 \ - nasm \ - && yum clean all diff --git a/automation/build/centos/CentOS-7.2.repo b/automation/build/centos/CentOS-7.2.repo deleted file mode 100644 index 4da27faeb5..0000000000 --- a/automation/build/centos/CentOS-7.2.repo +++ /dev/null @@ -1,35 +0,0 @@ -# CentOS-Base.repo -# -# This is a replacement file that pins things to just use CentOS 7.2 -# from the CentOS Vault. -# - -[base] -name=CentOS-7.2.1511 - Base -baseurl=http://vault.centos.org/7.2.1511/os/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#released updates -[updates] -name=CentOS-7.2.1511 - Updates -baseurl=http://vault.centos.org/7.2.1511/updates/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that may be useful -[extras] -name=CentOS-7.2.1511 - Extras -baseurl=http://vault.centos.org/7.2.1511/extras/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that extend functionality of existing packages -[centosplus] -name=CentOS-7.2.1511 - Plus -baseurl=http://vault.centos.org/7.2.1511/centosplus/$basearch/ -gpgcheck=1 -gpgcheck=1 -enabled=0 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index b4caf159f9..ff6df1cfc2 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -184,16 +184,6 @@ archlinux-gcc-debug: variables: CONTAINER: archlinux:current -centos-7-2-gcc: - extends: .gcc-x86-64-build - variables: - CONTAINER: centos:7.2 - -centos-7-2-gcc-debug: - extends: .gcc-x86-64-build-debug - variables: - CONTAINER: centos:7.2 - centos-7-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 12:22:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 12:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520206.807539 (Exim 4.92) (envelope-from ) id 1pmZUf-000664-UO; Wed, 12 Apr 2023 12:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520206.807539; Wed, 12 Apr 2023 12:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUf-00065x-Rg; Wed, 12 Apr 2023 12:22:33 +0000 Received: by outflank-mailman (input) for mailman id 520206; Wed, 12 Apr 2023 12:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUe-00065p-PR for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUe-00006N-OJ for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmZUe-0005iw-Mo for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Y3ec9nWZG/QKQguq6cntIv9bi4lmAtuP3xh++mAAuNg=; b=w0cpLHN/Y6k344pGcWQn7FOLqZ K/yITJ0OWM+P2EUhCHQHiT8dThvus0YAbBQezDOTiw/GT0i021byIjlv7j9GAi3Y1io/CNa4u8puP UA2INTCRdENMbWc46yCI5PoGCjj4vWma0qaffSWmzgDBSMy0o+GBLfhNxnoJs0LYJB8o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] automation: Remove non-debug x86_32 build jobs Message-Id: Date: Wed, 12 Apr 2023 12:22:32 +0000 commit 435a1e5e8fd6fbd52cc16570dcff5982bdbec351 Author: Anthony PERARD AuthorDate: Fri Feb 24 17:29:15 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Apr 11 19:40:08 2023 +0100 automation: Remove non-debug x86_32 build jobs In the interest of having less jobs, we remove the x86_32 build jobs that do release build. Debug build is very likely to be enough to find 32bit build issues. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit 7b66792ea7f77fb9e587e1e9c530a7c869eecba1) --- automation/gitlab-ci/build.yaml | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index ff6df1cfc2..eea517aa0a 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -264,21 +264,11 @@ debian-stretch-gcc-debug: variables: CONTAINER: debian:stretch -debian-stretch-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:stretch-i386 -debian-stretch-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: @@ -324,21 +314,11 @@ debian-unstable-gcc-debug-randconfig: CONTAINER: debian:unstable RANDCONFIG: y -debian-unstable-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:unstable-i386 -debian-unstable-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 12:22:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 12:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520207.807543 (Exim 4.92) (envelope-from ) id 1pmZUp-00068N-Vu; Wed, 12 Apr 2023 12:22:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520207.807543; Wed, 12 Apr 2023 12:22:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUp-00068G-TD; Wed, 12 Apr 2023 12:22:43 +0000 Received: by outflank-mailman (input) for mailman id 520207; Wed, 12 Apr 2023 12:22:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUo-000687-SX for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmZUo-00006a-Rm for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmZUo-0005jT-Qo for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 12:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bL555FIJ4EZNs1QV6hxrfcbRXiweCIoK6YxPJ3m9g0o=; b=Qwx0U8QJK/WcT4d3TQISkZzE/T znbZt0CTjSqrUw6l02AZyweWI8t+bn0UeqU6kwXFgAW9/Y2xzvM/RlJiU0XKuBiHHk99kmFE5rcY/ bdRKbNCjcyPj99UmZ5dOypWtGQvTy4zvFjDx6GxTsZp5epqbWYF/vzeupt2ow47N56u4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] CI: Remove llvm-8 from the Debian Stretch container Message-Id: Date: Wed, 12 Apr 2023 12:22:42 +0000 commit e4a5fb9227889bec99ab212b839680f4d5b51e60 Author: Andrew Cooper AuthorDate: Fri Mar 24 17:59:56 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Apr 11 19:40:08 2023 +0100 CI: Remove llvm-8 from the Debian Stretch container For similar reasons to c/s a6b1e2b80fe20. While this container is still build-able for now, all the other problems with explicitly-versioned compilers remain. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini (cherry picked from commit 7a298375721636290a57f31bb0f7c2a5a38956a4) --- automation/build/debian/stretch-llvm-8.list | 3 --- automation/build/debian/stretch.dockerfile | 12 ------------ automation/gitlab-ci/build.yaml | 27 --------------------------- 3 files changed, 42 deletions(-) diff --git a/automation/build/debian/stretch-llvm-8.list b/automation/build/debian/stretch-llvm-8.list deleted file mode 100644 index 09fe843fb2..0000000000 --- a/automation/build/debian/stretch-llvm-8.list +++ /dev/null @@ -1,3 +0,0 @@ -# Strech LLVM 8 repos -deb http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main -deb-src http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main diff --git a/automation/build/debian/stretch.dockerfile b/automation/build/debian/stretch.dockerfile index da6aa874dd..9861acbcc3 100644 --- a/automation/build/debian/stretch.dockerfile +++ b/automation/build/debian/stretch.dockerfile @@ -53,15 +53,3 @@ RUN apt-get update && \ apt-get autoremove -y && \ apt-get clean && \ rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - -RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add - -COPY stretch-llvm-8.list /etc/apt/sources.list.d/ - -RUN apt-get update && \ - apt-get --quiet --yes install \ - clang-8 \ - lld-8 \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index eea517aa0a..802449cb96 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -27,13 +27,6 @@ CXX: clang++ clang: y -.clang-8-tmpl: - variables: &clang-8 - CC: clang-8 - CXX: clang++-8 - LD: ld.lld-8 - clang: y - .x86-64-build-tmpl: <<: *build variables: @@ -98,16 +91,6 @@ variables: <<: *clang -.clang-8-x86-64-build: - extends: .x86-64-build - variables: - <<: *clang-8 - -.clang-8-x86-64-build-debug: - extends: .x86-64-build-debug - variables: - <<: *clang-8 - .clang-x86-32-build: extends: .x86-32-build variables: @@ -244,16 +227,6 @@ debian-stretch-clang-debug: variables: CONTAINER: debian:stretch -debian-stretch-clang-8: - extends: .clang-8-x86-64-build - variables: - CONTAINER: debian:stretch - -debian-stretch-clang-8-debug: - extends: .clang-8-x86-64-build-debug - variables: - CONTAINER: debian:stretch - debian-stretch-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520232.807585 (Exim 4.92) (envelope-from ) id 1pmbx6-0005rG-0V; Wed, 12 Apr 2023 15:00:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520232.807585; Wed, 12 Apr 2023 15:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbx5-0005qo-Sy; Wed, 12 Apr 2023 15:00:03 +0000 Received: by outflank-mailman (input) for mailman id 520232; Wed, 12 Apr 2023 15:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbx4-0005bV-J2 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbx4-0003lw-Ca for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbx4-0003d6-BT for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=spfG0KfutoIKkpbM68XnDAkHAbzP2F4UOaaRdvYuMvs=; b=s2Ls15doDlTGt2jHWeec1w6rkB S58wN0NUzps2hUqB3cWhaBsE501o/rlYDA8S8M/bf4tI83cE0do9xA+MFdAoXQEiJxZrUUsZRvdpv zWGEHAY7ugXLp2KvZJTmBTOMvJpltwNCZxGjRBd8xKIxdOrwqyb0RGYl/MmrGtC0f6as=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] tools: Drop gettext as a build dependency Message-Id: Date: Wed, 12 Apr 2023 15:00:02 +0000 commit b5e3e6294ffaffef0e371315e3b4bdf4b0c4f181 Author: Andrew Cooper AuthorDate: Fri Mar 26 11:25:07 2021 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 tools: Drop gettext as a build dependency It has not been a dependency since at least 4.13. Remove its mandatory check from ./configure. Annotate the dependency in the CI dockerfiles, and drop them from CirrusCI and TravisCI. Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit e21a6a4f966a7e91cb0bb014dbe15d15cc0502ad) --- .travis.yml | 1 - README | 1 - tools/configure | 49 ------------------------------------------------- tools/configure.ac | 2 -- 4 files changed, 53 deletions(-) diff --git a/.travis.yml b/.travis.yml index 15ca9e9047..dd1cf4709a 100644 --- a/.travis.yml +++ b/.travis.yml @@ -54,7 +54,6 @@ addons: - pkg-config - flex - bison - - gettext - acpica-tools - bin86 - bcc diff --git a/README b/README index c7da4b06e2..6b726cfb68 100644 --- a/README +++ b/README @@ -60,7 +60,6 @@ provided by your OS distributor: * bridge-utils package (/sbin/brctl) * iproute package (/sbin/ip) * GNU bison and GNU flex - * GNU gettext * ACPI ASL compiler (iasl) * Libc multiarch package (e.g. libc6-dev-i386 / glibc-devel.i686). Required when building on a 64-bit platform to build diff --git a/tools/configure b/tools/configure index f3f19c1a90..cf937c9b7a 100755 --- a/tools/configure +++ b/tools/configure @@ -685,7 +685,6 @@ INSTALL_PROGRAM SET_MAKE AWK IASL -XGETTEXT BASH FLEX BISON @@ -844,7 +843,6 @@ PERL BISON FLEX BASH -XGETTEXT AS86 LD86 BCC @@ -1590,7 +1588,6 @@ Some influential environment variables: BISON Path to Bison parser generator FLEX Path to Flex lexical analyser generator BASH Path to bash shell - XGETTEXT Path to xgetttext tool AS86 Path to as86 tool LD86 Path to ld86 tool BCC Path to bcc tool @@ -4718,7 +4715,6 @@ LDFLAGS="$PREPEND_LDFLAGS $LDFLAGS $APPEND_LDFLAGS" - # Checks for programs. ac_ext=c ac_cpp='$CPP $CPPFLAGS' @@ -7826,51 +7822,6 @@ fi if ! $rump; then -# Extract the first word of "xgettext", so it can be a program name with args. -set dummy xgettext; ac_word=$2 -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -$as_echo_n "checking for $ac_word... " >&6; } -if ${ac_cv_path_XGETTEXT+:} false; then : - $as_echo_n "(cached) " >&6 -else - case $XGETTEXT in - [\\/]* | ?:[\\/]*) - ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then - ac_cv_path_XGETTEXT="$as_dir/$ac_word$ac_exec_ext" - $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done - done -IFS=$as_save_IFS - - test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT="no" - ;; -esac -fi -XGETTEXT=$ac_cv_path_XGETTEXT -if test -n "$XGETTEXT"; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: $XGETTEXT" >&5 -$as_echo "$XGETTEXT" >&6; } -else - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } -fi - - -if test x"${XGETTEXT}" = x"no" -then - as_fn_error $? "Unable to find xgettext, please install xgettext" "$LINENO" 5 -fi case "$host_cpu" in i[3456]86|x86_64|aarch64) # Extract the first word of "iasl", so it can be a program name with args. diff --git a/tools/configure.ac b/tools/configure.ac index 9d126b7a14..1808cffafb 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -298,7 +298,6 @@ AC_ARG_VAR([PERL], [Path to Perl parser]) AC_ARG_VAR([BISON], [Path to Bison parser generator]) AC_ARG_VAR([FLEX], [Path to Flex lexical analyser generator]) AC_ARG_VAR([BASH], [Path to bash shell]) -AC_ARG_VAR([XGETTEXT], [Path to xgetttext tool]) AC_ARG_VAR([AS86], [Path to as86 tool]) AC_ARG_VAR([LD86], [Path to ld86 tool]) AC_ARG_VAR([BCC], [Path to bcc tool]) @@ -381,7 +380,6 @@ AS_IF([test "$cross_compiling" != yes], [ if ! $rump; then -AX_PATH_PROG_OR_FAIL([XGETTEXT], [xgettext]) dnl as86, ld86, bcc and iasl are only required when the host system is x86*. dnl "host" here means the platform on which the hypervisor and tools is dnl going to run, not the platform on which we are building (known as -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520233.807589 (Exim 4.92) (envelope-from ) id 1pmbxG-0006O6-46; Wed, 12 Apr 2023 15:00:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520233.807589; Wed, 12 Apr 2023 15:00:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxG-0006Ny-0q; Wed, 12 Apr 2023 15:00:14 +0000 Received: by outflank-mailman (input) for mailman id 520233; Wed, 12 Apr 2023 15:00:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxE-0006ML-HN for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxE-0003m2-Ga for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbxE-0003ef-FH for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LYuQqnlpw5+oTzfHw/RRnxfroB6+qWdrLA5hkGeUOZs=; b=B6X+ZTy+rPGYwE8Mfw0XV5ajXz IYxKd0wMUwLWCC3F6AenyYT6NgWVZFlhf4bBPytPKzXaLNKuZ3RKUzp5q0TB9P8dPVnfODVdBAtoh Rgt+BSU9bQkRa+kEcnGTnnWDWfxpzNnW0hAWAajDGzSTTuY0a7uEldBJG9hPtbSMt9nQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] CI: Drop TravisCI Message-Id: Date: Wed, 12 Apr 2023 15:00:12 +0000 commit eccd4d0d75a75b6cc59f2a55488e906c7fb52991 Author: Andrew Cooper AuthorDate: Wed Apr 21 10:16:13 2021 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 CI: Drop TravisCI Travis-ci.org is shutting down shortly. The arm cross-compile testing has been broken for a long time now, and all testing has now been superseded by our Gitlab infrastructure. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Wei Liu (cherry picked from commit e0dc9b095e7c73dcf6dbfe5c87c33c4708da4d1f) CI: Drop more TravisCI remnants This was missed from previous attempts to remove Travis. Fixes: e0dc9b095e7c ("CI: Drop TravisCI") Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Stefano Stabellini Release-acked-by: Henry Wang (cherry picked from commit bad4832710c7261fad1abe2d0e8e2e1d259b3e8d) --- .travis.yml | 87 ---------------------------------------------------- MAINTAINERS | 1 - scripts/travis-build | 27 ---------------- 3 files changed, 115 deletions(-) diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index dd1cf4709a..0000000000 --- a/.travis.yml +++ /dev/null @@ -1,87 +0,0 @@ -language: c -dist: trusty -sudo: required -# don't test master, smoke and coverity branches -branches: - except: - - master - - smoke - - /^coverity-tested\/.*/ - - /^stable-.*/ -matrix: - include: - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc-5 - env: XEN_TARGET_ARCH=x86_64 debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 debug=y - - compiler: gcc-5 - env: XEN_TARGET_ARCH=x86_64 debug=y - - compiler: clang - env: XEN_TARGET_ARCH=x86_64 clang=y debug=n - - compiler: clang - env: XEN_TARGET_ARCH=x86_64 clang=y debug=y - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- debug=y - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- debug=y -addons: - apt: - sources: - - ubuntu-toolchain-r-test - packages: - - zlib1g-dev - - libncurses5-dev - - libssl-dev - - python-dev - - xorg-dev - - uuid-dev - - libyajl-dev - - libaio-dev - - libglib2.0-dev - - libpixman-1-dev - - pkg-config - - flex - - bison - - acpica-tools - - bin86 - - bcc - - libc6-dev-i386 - - libnl-3-dev - - ocaml-nox - - libfindlib-ocaml-dev - - transfig - - pandoc - - gcc-arm-linux-gnueabihf - - gcc-aarch64-linux-gnu - - gcc-5 - - g++-5 - - seabios - - checkpolicy - - ghostscript -# we must set CXX manually instead of using 'language: cpp' due to -# travis-ci/travis-ci#3871 -before_script: - - export CXX=${CC/cc/++} - - export CXX=${CXX/clang/clang++} -script: - - ./scripts/travis-build -after_script: - - cat xen/.config - - cat tools/config.log - - cat docs/config.log -notifications: - irc: - channels: - - secure: "mPIFllF6eW3F3talvccMy55Tfcid66IPkkXZYCxDKRF2DQrMyvmg4qt0xN6gGZsdfOBMNr+/YfO5PxusBCUkVdBGBzd3QhFoIDYZbJZgzVh3yNDQ+x4L7p1cZNrwJ2loMmSX6KxGKZxZX9NRStrTUkVyp0jGZB9xkwT8Rl6jXj7EQkgQ95K1Wqafx0ycLfyDQmzX9bzi/3KIBFKMGmK18AFMh+R30zK0FPUUsS4+VhepIkVqO5puU3OYePd34wRnWlt7hjU2Vj5vYmVXp3UOE+E8/Lf9IGVAhitDi+EC35b8zo2BHJ9z6xZARYPvfSqbXcXV20RycabI+e3ufZJ40eatssly5QjWH+HhKS42C4gV1psmQhkTCNCM62Ty5uf6R1hsZJQuiOZrc8ojdje8ey2MxJk4R+Xz+Igg1/kD6+WX9/Y6Y3iRuj5HL1xCYfpTbK4mC7ofw0SofW2aAGI68jHpCqJdQCDzMl6748PlDMM0eKe0MPKIEenYHcoBnOEC/jciXUDa6wduV75EEip7oq2i+m44MopcsEDTpdliH077GhKapF0ActjvBTLpyoTRSfkKm0NZol/dgwd3PGG/mY8clIoeXWRb4opk93ejPC967KmSNC68SlfwaJmFZS5T9vAgb6k7r6i9G3dmYtrLKzws8IV1CPWqLzk58+v4pRk=" diff --git a/MAINTAINERS b/MAINTAINERS index 04eb361222..e1e6ea0707 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -189,7 +189,6 @@ S: Supported F: .gitlab-ci.yml F: .travis.yml F: automation/ -F: scripts/travis-build CPU POOLS M: Juergen Gross diff --git a/scripts/travis-build b/scripts/travis-build deleted file mode 100755 index 0cb15a89e4..0000000000 --- a/scripts/travis-build +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/bash -ex - -$CC --version - -# random config or default config -if [[ "${RANDCONFIG}" == "y" ]]; then - make -C xen KCONFIG_ALLCONFIG=tools/kconfig/allrandom.config randconfig -else - make -C xen defconfig -fi - -# build up our configure options -cfgargs=() -cfgargs+=("--disable-stubdom") # more work needed into building this -cfgargs+=("--disable-rombios") -cfgargs+=("--enable-docs") -cfgargs+=("--with-system-seabios=/usr/share/seabios/bios.bin") - -if [[ "${XEN_TARGET_ARCH}" == "x86_64" ]]; then - cfgargs+=("--enable-tools") -else - cfgargs+=("--disable-tools") # we don't have the cross depends installed -fi - -./configure "${cfgargs[@]}" - -make dist -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520234.807593 (Exim 4.92) (envelope-from ) id 1pmbxQ-0006Qc-5L; Wed, 12 Apr 2023 15:00:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520234.807593; Wed, 12 Apr 2023 15:00:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxQ-0006QU-2M; Wed, 12 Apr 2023 15:00:24 +0000 Received: by outflank-mailman (input) for mailman id 520234; Wed, 12 Apr 2023 15:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxO-0006QE-Ks for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxO-0003mU-K4 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbxO-0003fc-J6 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=khpVIQ3Fkvvdm8kashlMvX3V9T7zcg7cTVFjd+O+NSQ=; b=PR5j9pm9JuHuSuBk8ghvpXX7I9 kg0CxJaQxkEzjDcQxZmveIeoWn3sJgZsKbnQZCFm5HdYZdOL17hacwJD1IrrWTgNTSqd6d1281hHJ eLYsAOYzW3RrQ90uQg1TuL9F0XLus+IXh2xzBbSlKxHFBIgFaWmpKXeyxfdxjMEMlaEk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] build: add --full to version.sh to guess $(XEN_FULLVERSION) Message-Id: Date: Wed, 12 Apr 2023 15:00:22 +0000 commit d76c89122b70f17a94109cb03de99670664f0e18 Author: Anthony PERARD AuthorDate: Thu Sep 9 15:33:06 2021 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 build: add --full to version.sh to guess $(XEN_FULLVERSION) Running $(MAKE) like that in a $(shell ) while parsing the Makefile doesn't work reliably. In some case, make will complain with "jobserver unavailable: using -j1. Add '+' to parent make rule.". Also, it isn't possible to distinguish between the output produced by the target "xenversion" and `make`'s own output. Instead of running make, this patch "improve" `version.sh` to try to guess the output of `make xenversion`. In order to have version.sh works in more scenario, it will use XEN_EXTRAVERSION and XEN_VENDORVERSION from the environment when present. As for the cases were those two variables are overridden by a make command line arguments, we export them when invoking version.sh via a new $(XEN_FULLVERSION) macro. That should hopefully get us to having ./version.sh returning the same value that `make xenversion` would. This fix GitLab CI's build job "debian-unstable-gcc-arm64". Signed-off-by: Anthony PERARD Reviewed-by: Daniel P. Smith Reviewed-by: Ian Jackson (cherry picked from commit ab4a83023eda9f04ad864877c1956b087ec6fc4f) --- tools/Rules.mk | 5 +++++ tools/flask/policy/Makefile.common | 2 +- version.sh | 18 +++++++++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/tools/Rules.mk b/tools/Rules.mk index 67747110b8..ff54a0794d 100644 --- a/tools/Rules.mk +++ b/tools/Rules.mk @@ -6,6 +6,11 @@ all: -include $(XEN_ROOT)/config/Tools.mk include $(XEN_ROOT)/Config.mk +XEN_FULLVERSION=$(shell env \ + XEN_EXTRAVERSION=$(XEN_EXTRAVERSION) \ + XEN_VENDORVERSION=$(XEN_VENDORVERSION) \ + $(SHELL) $(XEN_ROOT)/version.sh --full $(XEN_ROOT)/xen/Makefile) + export _INSTALL := $(INSTALL) INSTALL = $(XEN_ROOT)/tools/cross-install diff --git a/tools/flask/policy/Makefile.common b/tools/flask/policy/Makefile.common index bea5ba4b6a..e5ed58200e 100644 --- a/tools/flask/policy/Makefile.common +++ b/tools/flask/policy/Makefile.common @@ -35,7 +35,7 @@ OUTPUT_POLICY ?= $(BEST_POLICY_VER) # ######################################## -POLICY_FILENAME = $(FLASK_BUILD_DIR)/xenpolicy-$(shell $(MAKE) -C $(XEN_ROOT)/xen xenversion --no-print-directory) +POLICY_FILENAME = $(FLASK_BUILD_DIR)/xenpolicy-$(XEN_FULLVERSION) POLICY_LOADPATH = /boot # List of policy versions supported by the hypervisor diff --git a/version.sh b/version.sh index e894ee7e04..c6a5692c19 100755 --- a/version.sh +++ b/version.sh @@ -1,5 +1,21 @@ #!/bin/sh +opt_full=false +while [ $# -gt 1 ]; do + case "$1" in + --full) opt_full=true ;; + *) break ;; + esac + shift +done + MAJOR=`grep "export XEN_VERSION" $1 | sed 's/.*=//g' | tr -s " "` MINOR=`grep "export XEN_SUBVERSION" $1 | sed 's/.*=//g' | tr -s " "` -printf "%d.%d" $MAJOR $MINOR + +if $opt_full; then + extraversion=$(grep "export XEN_EXTRAVERSION" $1 | sed 's/^.* ?=\s\+//; s/\$([^)]*)//g; s/ //g') + : ${XEN_EXTRAVERSION:=${extraversion}${XEN_VENDORVERSION}} +else + unset XEN_EXTRAVERSION +fi +printf "%d.%d%s" $MAJOR $MINOR $XEN_EXTRAVERSION -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520235.807597 (Exim 4.92) (envelope-from ) id 1pmbxa-0006T6-6m; Wed, 12 Apr 2023 15:00:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520235.807597; Wed, 12 Apr 2023 15:00:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxa-0006Sy-45; Wed, 12 Apr 2023 15:00:34 +0000 Received: by outflank-mailman (input) for mailman id 520235; Wed, 12 Apr 2023 15:00:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxY-0006Si-OM for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxY-0003me-NT for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbxY-0003gN-MZ for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Mca1LqqJbX23eFPRYPnPLNa2ikknvEoSkaQjwlUmGHc=; b=oWkLPgONb9e1IJD9Vhl8oO2cN3 aVyJL5xIMTqG65S+2efvB+l3YLxOwjInLCfiGQMK0tmOhZnhq/yWs65UzHBgPEK9yseODKorxD6CS aGCHZObYjwZHP0PT2oE+YID96XMohXGAwV3RP1vL/kNpe8MB45Ppcs7XhoXz9m+eEYzQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] bump default SeaBIOS version to 1.16.0 Message-Id: Date: Wed, 12 Apr 2023 15:00:32 +0000 commit 62406f6fbd48eb8de2abcca5cb80ee1ffcea3bb6 Author: Jan Beulich AuthorDate: Fri May 6 14:46:52 2022 +0200 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 bump default SeaBIOS version to 1.16.0 Signed-off-by: Jan Beulich Acked-by: Julien Grall (cherry picked from commit 944e389daa133dd310d87c4eebacba9f6da76018) --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index ba5eb4ea3c..4a0f717894 100644 --- a/Config.mk +++ b/Config.mk @@ -247,7 +247,7 @@ OVMF_UPSTREAM_REVISION ?= 20d2e5a125e34fc8501026613a71549b2a1a3e54 QEMU_UPSTREAM_REVISION ?= qemu-xen-4.14.5 MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.14.5 -SEABIOS_UPSTREAM_REVISION ?= rel-1.13.0 +SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520236.807601 (Exim 4.92) (envelope-from ) id 1pmbxk-0006Vw-8T; Wed, 12 Apr 2023 15:00:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520236.807601; Wed, 12 Apr 2023 15:00:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxk-0006Vo-5a; Wed, 12 Apr 2023 15:00:44 +0000 Received: by outflank-mailman (input) for mailman id 520236; Wed, 12 Apr 2023 15:00:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxi-0006VW-Ri for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxi-0003mn-Qv for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbxi-0003hB-Pw for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0WvdNxjdRLEg7A3ops83F1MIfo8L6pPvoqgLA29uNWg=; b=A8hduDqiy6ODhXBbwKaCxk6TNZ UWJfILKbU/qx+LH/stj2i2njg0aC3jjjWrWGf5D6gUPwAJdl3R04kz0R3dLpyLezHYjr1k/0THHPH FWvQPPyRwb3OqOJjaHj1aWVQrYnWX+P+SiV+FcPAIGa6Ia3TyE7WmwdMJ48vIazGahhk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] CI: Drop automation/configs/ Message-Id: Date: Wed, 12 Apr 2023 15:00:42 +0000 commit 4fcd2f59a7b8aa3ac6a0ed688069c4000b3fa803 Author: Andrew Cooper AuthorDate: Thu Dec 29 15:39:13 2022 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 CI: Drop automation/configs/ Having 3 extra hypervisor builds on the end of a full build is deeply confusing to debug if one of them fails, because the .config file presented in the artefacts is not the one which caused a build failure. Also, the log tends to be truncated in the UI. PV-only is tested as part of PV-Shim in a full build anyway, so doesn't need repeating. HVM-only and neither appear frequently in randconfig, so drop all the logic here to simplify things. Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit 7b20009a812f26e74bdbde2ab96165376b3dad34) --- automation/configs/x86/hvm_only_config | 3 --- automation/configs/x86/no_hvm_pv_config | 3 --- automation/configs/x86/pv_only_config | 3 --- automation/scripts/build | 15 --------------- 4 files changed, 24 deletions(-) diff --git a/automation/configs/x86/hvm_only_config b/automation/configs/x86/hvm_only_config deleted file mode 100644 index 9efbddd535..0000000000 --- a/automation/configs/x86/hvm_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_HVM=y -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/no_hvm_pv_config b/automation/configs/x86/no_hvm_pv_config deleted file mode 100644 index 0bf6a8e468..0000000000 --- a/automation/configs/x86/no_hvm_pv_config +++ /dev/null @@ -1,3 +0,0 @@ -# CONFIG_HVM is not set -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/pv_only_config b/automation/configs/x86/pv_only_config deleted file mode 100644 index e9d8b4a7c7..0000000000 --- a/automation/configs/x86/pv_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PV=y -# CONFIG_HVM is not set -# CONFIG_DEBUG is not set diff --git a/automation/scripts/build b/automation/scripts/build index 0cd0f3971d..f280d62c81 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -48,18 +48,3 @@ mkdir binaries if [[ "${XEN_TARGET_ARCH}" == "x86_64" ]]; then cp xen/xen binaries/xen fi - -# Build all the configs we care about -case ${XEN_TARGET_ARCH} in - x86_64) arch=x86 ;; - *) exit 0 ;; -esac - -cfg_dir="automation/configs/${arch}" -for cfg in `ls ${cfg_dir}`; do - echo "Building $cfg" - make -j$(nproc) -C xen clean - rm -f xen/.config - make -C xen KBUILD_DEFCONFIG=../../../../${cfg_dir}/${cfg} XEN_CONFIG_EXPERT=y defconfig - make -j$(nproc) -C xen XEN_CONFIG_EXPERT=y -done -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:00:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:00:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520237.807605 (Exim 4.92) (envelope-from ) id 1pmbxu-0006YG-A4; Wed, 12 Apr 2023 15:00:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520237.807605; Wed, 12 Apr 2023 15:00:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxu-0006Y6-77; Wed, 12 Apr 2023 15:00:54 +0000 Received: by outflank-mailman (input) for mailman id 520237; Wed, 12 Apr 2023 15:00:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxs-0006Xw-VL for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbxs-0003mz-UX for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbxs-0003hz-TS for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:00:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=AHCO2KUWVTLL+4Nj1AXIXkNeIIvWGCbvymGIohE36wk=; b=UfqZU7mCpOaXkDP1ijcPdnYCf9 lvKNnwgmgQ/9UtZwUJ32WI/OvdjJaEyRRfUqGPk3ocbwpi1sctYGRfCeLmz2thbdM39qefzBOVNNI vseVqJpR7+FGZZCDPJ0SdqG0hEtW9uLLVdiMyvweoPmPtfmH25QiRiPmDTZH7ivj8BIo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] automation: Remove CentOS 7.2 containers and builds Message-Id: Date: Wed, 12 Apr 2023 15:00:52 +0000 commit ce5c9feadf779c9f8416d70ad233f0de985f8fc5 Author: Anthony PERARD AuthorDate: Tue Feb 21 16:55:36 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 automation: Remove CentOS 7.2 containers and builds We already have a container which track the latest CentOS 7, no need for this one as well. Also, 7.2 have outdated root certificate which prevent connection to website which use Let's Encrypt. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit ba512629f76dfddb39ea9133ee51cdd9e392a927) --- automation/build/centos/7.2.dockerfile | 50 --------------------------------- automation/build/centos/CentOS-7.2.repo | 35 ----------------------- automation/gitlab-ci/build.yaml | 10 ------- 3 files changed, 95 deletions(-) diff --git a/automation/build/centos/7.2.dockerfile b/automation/build/centos/7.2.dockerfile deleted file mode 100644 index c2f46b694c..0000000000 --- a/automation/build/centos/7.2.dockerfile +++ /dev/null @@ -1,50 +0,0 @@ -FROM centos:7.2.1511 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -# ensure we only get bits from the vault for -# the version we want -COPY CentOS-7.2.repo /etc/yum.repos.d/CentOS-Base.repo - -# install EPEL for dev86, xz-devel and possibly other packages -RUN yum -y install https://dl.fedoraproject.org/pub/epel/epel-release-latest-7.noarch.rpm && \ - yum clean all - -RUN mkdir /build -WORKDIR /build - -# work around https://github.com/moby/moby/issues/10180 -# and install Xen depends -RUN rpm --rebuilddb && \ - yum -y install \ - yum-plugin-ovl \ - gcc \ - gcc-c++ \ - ncurses-devel \ - zlib-devel \ - openssl-devel \ - python-devel \ - libuuid-devel \ - pkgconfig \ - gettext \ - flex \ - bison \ - libaio-devel \ - glib2-devel \ - yajl-devel \ - pixman-devel \ - glibc-devel \ - glibc-devel.i686 \ - make \ - binutils \ - git \ - wget \ - acpica-tools \ - python-markdown \ - patch \ - checkpolicy \ - dev86 \ - xz-devel \ - bzip2 \ - nasm \ - && yum clean all diff --git a/automation/build/centos/CentOS-7.2.repo b/automation/build/centos/CentOS-7.2.repo deleted file mode 100644 index 4da27faeb5..0000000000 --- a/automation/build/centos/CentOS-7.2.repo +++ /dev/null @@ -1,35 +0,0 @@ -# CentOS-Base.repo -# -# This is a replacement file that pins things to just use CentOS 7.2 -# from the CentOS Vault. -# - -[base] -name=CentOS-7.2.1511 - Base -baseurl=http://vault.centos.org/7.2.1511/os/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#released updates -[updates] -name=CentOS-7.2.1511 - Updates -baseurl=http://vault.centos.org/7.2.1511/updates/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that may be useful -[extras] -name=CentOS-7.2.1511 - Extras -baseurl=http://vault.centos.org/7.2.1511/extras/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that extend functionality of existing packages -[centosplus] -name=CentOS-7.2.1511 - Plus -baseurl=http://vault.centos.org/7.2.1511/centosplus/$basearch/ -gpgcheck=1 -gpgcheck=1 -enabled=0 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 2ca12226cd..1ecf77e092 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -156,16 +156,6 @@ archlinux-gcc-debug: variables: CONTAINER: archlinux:current -centos-7-2-gcc: - extends: .gcc-x86-64-build - variables: - CONTAINER: centos:7.2 - -centos-7-2-gcc-debug: - extends: .gcc-x86-64-build-debug - variables: - CONTAINER: centos:7.2 - centos-7-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:01:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:01:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520238.807610 (Exim 4.92) (envelope-from ) id 1pmby4-0006aZ-DW; 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Wed, 12 Apr 2023 15:01:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=obK/qbQ6B6g6kQY8CFc8jfDQtQGBxXnDjQ0usl7iNJY=; b=gzGuCVnRqiVZ5sE8O/0JCmj3e4 5MZtVEddPqnYvaDW5p43NddNh7P2D5SvemHUjsdk1RHZFX0Ao5h9XsGlfRLupY1qPbsNayJaURU9p TZ/hxlBcV+CAx5kpJjR1Wdsm7PsSUWGFDL+6CDCaMzfOSqsROdLLB8NtQE39yrR7vbZI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] automation: Remove non-debug x86_32 build jobs Message-Id: Date: Wed, 12 Apr 2023 15:01:03 +0000 commit b13f939a7651ae89b99839412b2e01b68e1db54e Author: Anthony PERARD AuthorDate: Fri Feb 24 17:29:15 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 automation: Remove non-debug x86_32 build jobs In the interest of having less jobs, we remove the x86_32 build jobs that do release build. Debug build is very likely to be enough to find 32bit build issues. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit 7b66792ea7f77fb9e587e1e9c530a7c869eecba1) --- automation/gitlab-ci/build.yaml | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 1ecf77e092..02ac74ebce 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -246,21 +246,11 @@ debian-stretch-gcc-debug: variables: CONTAINER: debian:stretch -debian-stretch-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:stretch-i386 -debian-stretch-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: @@ -298,21 +288,11 @@ debian-unstable-gcc-debug-randconfig: CONTAINER: debian:unstable RANDCONFIG: y -debian-unstable-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:unstable-i386 -debian-unstable-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 15:01:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 15:01:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520239.807613 (Exim 4.92) (envelope-from ) id 1pmbyE-0006d4-Fn; Wed, 12 Apr 2023 15:01:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520239.807613; Wed, 12 Apr 2023 15:01:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbyE-0006cw-D4; Wed, 12 Apr 2023 15:01:14 +0000 Received: by outflank-mailman (input) for mailman id 520239; Wed, 12 Apr 2023 15:01:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbyD-0006cq-5v for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:01:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmbyD-0003py-54 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:01:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmbyD-0003js-49 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 15:01:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=U6oG8uwh2Aujzcc3xZHhw+QpT2ZlbyCzGEDXZefccG0=; b=mlEhl3AO/sW3KaorDqUelDSTpW 1EXLQnm2DsUK2SRlvEzzBGkOJnlxQ65zxS+vusF9C+jLSjX0nt+ymzrDvAXrldbyuRbi9O0wuxBIA m4rLhygATbV12QbiqkyDOYk54PManKeO4z/t1MDeU08mXh1SCDbqLOdU7KS4f1Zgw9Uo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] CI: Remove llvm-8 from the Debian Stretch container Message-Id: Date: Wed, 12 Apr 2023 15:01:13 +0000 commit 622675cdbc5f249bddfe970054f43a867d3ebed0 Author: Andrew Cooper AuthorDate: Fri Mar 24 17:59:56 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:36 2023 +0100 CI: Remove llvm-8 from the Debian Stretch container For similar reasons to c/s a6b1e2b80fe20. While this container is still build-able for now, all the other problems with explicitly-versioned compilers remain. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini (cherry picked from commit 7a298375721636290a57f31bb0f7c2a5a38956a4) --- automation/build/debian/stretch-llvm-8.list | 3 --- automation/build/debian/stretch.dockerfile | 12 ------------ automation/gitlab-ci/build.yaml | 27 --------------------------- 3 files changed, 42 deletions(-) diff --git a/automation/build/debian/stretch-llvm-8.list b/automation/build/debian/stretch-llvm-8.list deleted file mode 100644 index 09fe843fb2..0000000000 --- a/automation/build/debian/stretch-llvm-8.list +++ /dev/null @@ -1,3 +0,0 @@ -# Strech LLVM 8 repos -deb http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main -deb-src http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main diff --git a/automation/build/debian/stretch.dockerfile b/automation/build/debian/stretch.dockerfile index 32742f7f39..16dfc3cdda 100644 --- a/automation/build/debian/stretch.dockerfile +++ b/automation/build/debian/stretch.dockerfile @@ -49,15 +49,3 @@ RUN apt-get update && \ apt-get autoremove -y && \ apt-get clean && \ rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - -RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add - -COPY stretch-llvm-8.list /etc/apt/sources.list.d/ - -RUN apt-get update && \ - apt-get --quiet --yes install \ - clang-8 \ - lld-8 \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 02ac74ebce..ab480bfff8 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -26,13 +26,6 @@ CXX: clang++ clang: y -.clang-8-tmpl: - variables: &clang-8 - CC: clang-8 - CXX: clang++-8 - LD: ld.lld-8 - clang: y - .x86-64-build-tmpl: <<: *build variables: @@ -97,16 +90,6 @@ variables: <<: *clang -.clang-8-x86-64-build: - extends: .x86-64-build - variables: - <<: *clang-8 - -.clang-8-x86-64-build-debug: - extends: .x86-64-build-debug - variables: - <<: *clang-8 - .clang-x86-32-build: extends: .x86-32-build variables: @@ -226,16 +209,6 @@ debian-stretch-clang-debug: variables: CONTAINER: debian:stretch -debian-stretch-clang-8: - extends: .clang-8-x86-64-build - variables: - CONTAINER: debian:stretch - -debian-stretch-clang-8-debug: - extends: .clang-8-x86-64-build-debug - variables: - CONTAINER: debian:stretch - debian-stretch-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520287.807697 (Exim 4.92) (envelope-from ) id 1pmegQ-0002cG-PH; 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Wed, 12 Apr 2023 17:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=47pD9X/2ahJXgLAv4gUn7W/d/ZE8hsRQ5z6XBpWC2B0=; b=BZPMajmejKrRbzdj31AAco6zuT v9ih1tVjOKvzhWUOWEYTtXO8KdqhAsAp9BQC0p36DbPskMsepAd7DiO2iFTfIuKGMLsmWYQwnj9xE nrfhZrd80+U8j06E4lAd3f5uZ3vKAzko2Cn53wUJdTc6UVlb2/fY9Ac9A60Kf2LFTBzM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] LICENSES: Clarify that the SPDX tag GPL-2.0 is deprecated Message-Id: Date: Wed, 12 Apr 2023 17:55:01 +0000 commit a778dbdf443d81d30eed802018ecd498b8dd043f Author: Julien Grall AuthorDate: Mon Mar 27 19:45:14 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:36:53 2023 +0100 LICENSES: Clarify that the SPDX tag GPL-2.0 is deprecated From https://spdx.org/licenses/GPL-2.0.html, the SPDX tag GPL-2.0 is deprecated. Instead, GPL-2.0-only should be used. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- LICENSES/GPL-2.0 | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/LICENSES/GPL-2.0 b/LICENSES/GPL-2.0 index ff0812fd89..9f09528a8b 100644 --- a/LICENSES/GPL-2.0 +++ b/LICENSES/GPL-2.0 @@ -8,9 +8,9 @@ Usage-Guide: tag/value pairs into a comment according to the placement guidelines in the licensing rules documentation. For 'GNU General Public License (GPL) version 2 only' use: - SPDX-License-Identifier: GPL-2.0 - or SPDX-License-Identifier: GPL-2.0-only + or (now deprecated) + SPDX-License-Identifier: GPL-2.0 For 'GNU General Public License (GPL) version 2 or any later version' use: SPDX-License-Identifier: GPL-2.0+ or -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520288.807701 (Exim 4.92) (envelope-from ) id 1pmega-0002eJ-Qh; Wed, 12 Apr 2023 17:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520288.807701; Wed, 12 Apr 2023 17:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmega-0002eC-O7; Wed, 12 Apr 2023 17:55:12 +0000 Received: by outflank-mailman (input) for mailman id 520288; Wed, 12 Apr 2023 17:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegZ-0002e4-VM for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegZ-0008GY-UR for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmegZ-0007ta-T2 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GDurCP4T5Cv9/qq0qwH/R3p42gRMa43N0bkj1z8C7MI=; b=eNI9tBezzaeNtX+5v3+0VDWFJ2 4+I9yCYI1fBC2vVo5RJV8aBVGqPu6oyo5KwUcV82tqKzeKLc2/gO2ZJN7qxnNHFmycWGZhZNb6dUk x33RPIg788ovGjPI5KWOCfVCzt23+nkomzj2QYxDckjAe2R7eb0cHKEhX7dgv4Yk1jvQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.c Message-Id: Date: Wed, 12 Apr 2023 17:55:11 +0000 commit fc269f81fd6535392bbb8ac14360ce705d7d8e27 Author: Julien Grall AuthorDate: Mon Mar 27 19:45:15 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:29 2023 +0100 xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.c It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-only in xen/arch/x86/*.c: * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu/mwait-idle.c | 13 +------------ xen/arch/x86/cpu/vpmu.c | 13 +------------ xen/arch/x86/cpu/vpmu_amd.c | 13 +------------ xen/arch/x86/cpu/vpmu_intel.c | 13 +------------ xen/arch/x86/genapic/x2apic.c | 13 +------------ xen/arch/x86/hvm/asid.c | 13 +------------ xen/arch/x86/hvm/dm.c | 13 +------------ xen/arch/x86/hvm/hpet.c | 13 +------------ xen/arch/x86/hvm/hvm.c | 13 +------------ xen/arch/x86/hvm/intercept.c | 13 +------------ xen/arch/x86/hvm/io.c | 13 +------------ xen/arch/x86/hvm/ioreq.c | 13 +------------ xen/arch/x86/hvm/irq.c | 13 +------------ xen/arch/x86/hvm/mtrr.c | 13 +------------ xen/arch/x86/hvm/nestedhvm.c | 13 +------------ xen/arch/x86/hvm/pmtimer.c | 13 +------------ xen/arch/x86/hvm/quirks.c | 13 +------------ xen/arch/x86/hvm/save.c | 13 +------------ xen/arch/x86/hvm/svm/asid.c | 13 +------------ xen/arch/x86/hvm/svm/emulate.c | 13 +------------ xen/arch/x86/hvm/svm/intr.c | 13 +------------ xen/arch/x86/hvm/svm/nestedsvm.c | 13 +------------ xen/arch/x86/hvm/svm/svm.c | 13 +------------ xen/arch/x86/hvm/svm/svmdebug.c | 13 +------------ xen/arch/x86/hvm/svm/vmcb.c | 13 +------------ xen/arch/x86/hvm/vlapic.c | 13 +------------ xen/arch/x86/hvm/vmx/intr.c | 13 +------------ xen/arch/x86/hvm/vmx/vmcs.c | 13 +------------ xen/arch/x86/hvm/vmx/vmx.c | 13 +------------ xen/arch/x86/hvm/vmx/vvmx.c | 13 +------------ xen/arch/x86/hvm/vpt.c | 13 +------------ xen/arch/x86/mm/altp2m.c | 13 +------------ xen/arch/x86/mm/hap/guest_walk.c | 13 +------------ xen/arch/x86/mm/hap/nested_ept.c | 13 +------------ xen/arch/x86/mm/p2m-ept.c | 13 +------------ 35 files changed, 35 insertions(+), 420 deletions(-) diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c index 9e981e7e26..ff5c808bc9 100644 --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * mwait_idle.c - native hardware idle loop for modern processors * * Copyright (c) 2013, Intel Corporation. * Len Brown - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ /* diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index b6b7342fb4..f31c32bcf3 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpmu.c: PMU virtualization for HVM domain. * * Copyright (c) 2007, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * * Author: Haitao Shan */ #include diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c index 9df739aa3f..18266b9521 100644 --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpmu_amd.c: AMD specific PMU virtualization. * @@ -7,18 +8,6 @@ * Author: Wei Wang * Tested by: Suravee Suthikulpanit * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #include diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index bcfa187a14..35e350578b 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpmu_intel.c: CORE 2 specific PMU virtualization. * * Copyright (c) 2007, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * * Author: Haitao Shan */ diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index 0a7ee820f5..ca1db27157 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * x2APIC driver. * * Copyright (c) 2008, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/asid.c b/xen/arch/x86/hvm/asid.c index 1fd2770a3a..0faaa24a8f 100644 --- a/xen/arch/x86/hvm/asid.c +++ b/xen/arch/x86/hvm/asid.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asid.c: ASID management * Copyright (c) 2007, Advanced Micro Devices, Inc. * Copyright (c) 2009, Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index f8e6089870..462691f91d 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -1,17 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016 Citrix Systems Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index c65e1b27d0..dff27b760e 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hpet.c: HPET emulation for HVM guests. * Copyright (c) 2006, Intel Corporation. * Copyright (c) 2006, Keir Fraser - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 6885ae4a9e..1454c1732d 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm.c: Common hardware virtual machine abstractions. * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2005, International Business Machines Corporation. * Copyright (c) 2008, Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/intercept.c b/xen/arch/x86/hvm/intercept.c index ffa31b7467..61664c0ad1 100644 --- a/xen/arch/x86/hvm/intercept.c +++ b/xen/arch/x86/hvm/intercept.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * intercept.c: Handle performance critical I/O packets in hypervisor space * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2008, Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index ae2feebd79..53de1a967d 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * io.c: Handling I/O and interrupts. * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2005, International Business Machines Corporation. * Copyright (c) 2008, Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index 0bdcca1e1a..20dbb4c8cf 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm/io.c: hardware virtual machine I/O emulation * * Copyright (c) 2016 Citrix Systems Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 4fe87a71c1..1258371eb0 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * irq.c * * Interrupt distribution and delivery logic. * * Copyright (c) 2006, K A Fraser, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c index f1a88d7616..29f3fb1607 100644 --- a/xen/arch/x86/hvm/mtrr.c +++ b/xen/arch/x86/hvm/mtrr.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * mtrr.c: MTRR/PAT virtualization * * Copyright (c) 2007, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/nestedhvm.c b/xen/arch/x86/hvm/nestedhvm.c index 58370190ff..ec68551127 100644 --- a/xen/arch/x86/hvm/nestedhvm.c +++ b/xen/arch/x86/hvm/nestedhvm.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Nested HVM * Copyright (c) 2011, Advanced Micro Devices, Inc. * Author: Christoph Egger - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/pmtimer.c b/xen/arch/x86/hvm/pmtimer.c index b89d0fd53b..2145c531b6 100644 --- a/xen/arch/x86/hvm/pmtimer.c +++ b/xen/arch/x86/hvm/pmtimer.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm/pmtimer.c: emulation of the ACPI PM timer * * Copyright (c) 2007, XenSource inc. * Copyright (c) 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/quirks.c b/xen/arch/x86/hvm/quirks.c index 2adab1f4b8..bd30b0f881 100644 --- a/xen/arch/x86/hvm/quirks.c +++ b/xen/arch/x86/hvm/quirks.c @@ -1,17 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * x86/hvm/quirks.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/save.c b/xen/arch/x86/hvm/save.c index c1675e3d9f..79713cd6ca 100644 --- a/xen/arch/x86/hvm/save.c +++ b/xen/arch/x86/hvm/save.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm/save.c: Save and restore HVM guest's emulated hardware state. * @@ -6,18 +7,6 @@ * Copyright (c) 2007, Isaku Yamahata * VA Linux Systems Japan K.K. * split x86 specific part - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c index 150d8dfc81..09f8c23fd9 100644 --- a/xen/arch/x86/hvm/svm/asid.c +++ b/xen/arch/x86/hvm/svm/asid.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asid.c: handling ASIDs in SVM. * Copyright (c) 2007, Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 2c95d1ce06..aa2c61c433 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * emulate.c: handling SVM emulate instructions help. * Copyright (c) 2005 AMD Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index c1a057ce86..192e17ebbf 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * intr.c: Interrupt handling for SVM. * Copyright (c) 2005, AMD Inc. * Copyright (c) 2004, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 51e437e73a..5d74863268 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * nestedsvm.c: Nested Virtualization * Copyright (c) 2011, Advanced Micro Devices, Inc * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #include diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 1af7e8edf4..59a6e88dff 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * svm.c: handling SVM architecture-related VM exits * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2005-2007, Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmdebug.c index bce86f0ef7..7d6dc9ef47 100644 --- a/xen/arch/x86/hvm/svm/svmdebug.c +++ b/xen/arch/x86/hvm/svm/svmdebug.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * svmdebug.c: debug functions * Copyright (c) 2011, Advanced Micro Devices, Inc. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #include diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 5497463586..282fe7cdbe 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmcb.c: VMCB management * Copyright (c) 2005-2007, Advanced Micro Devices, Inc. * Copyright (c) 2004, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #include diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index f4f5ffc673..785d5d88d9 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vlapic.c: virtualize LAPIC for HVM vcpus. * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2006 Keir Fraser, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c index 87fb537b7c..fd719c4c01 100644 --- a/xen/arch/x86/hvm/vmx/intr.c +++ b/xen/arch/x86/hvm/vmx/intr.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * intr.c: handling I/O, interrupts related VMX entry/exit * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2004-2007, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 07f7a9d76b..b209563625 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmcs.c: VMCS management * Copyright (c) 2004, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index bfc9693f7e..096c69251d 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmx.c: handling VMX architecture-related VM exits * Copyright (c) 2004, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 27221fdb73..1034534c97 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vvmx.c: Support virtual VMX for nested virtualization. * @@ -5,18 +6,6 @@ * Author: Qing He * Eddie Dong * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #include diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c index 621f5bb88b..8f53e88d67 100644 --- a/xen/arch/x86/hvm/vpt.c +++ b/xen/arch/x86/hvm/vpt.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpt.c: Virtual Platform Timer * * Copyright (c) 2006, Xiaowei Yang, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/altp2m.c b/xen/arch/x86/mm/altp2m.c index 07393befee..a04297b646 100644 --- a/xen/arch/x86/mm/altp2m.c +++ b/xen/arch/x86/mm/altp2m.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Alternate p2m HVM * Copyright (c) 2014, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/hap/guest_walk.c b/xen/arch/x86/mm/hap/guest_walk.c index 1da8d3b99e..d1b7c5762c 100644 --- a/xen/arch/x86/mm/hap/guest_walk.c +++ b/xen/arch/x86/mm/hap/guest_walk.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/x86/mm/hap/guest_walk.c * * Guest page table walker * Copyright (c) 2007, AMD Corporation (Wei Huang) * Copyright (c) 2007, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/hap/nested_ept.c b/xen/arch/x86/mm/hap/nested_ept.c index 605e47c16c..d6df48af54 100644 --- a/xen/arch/x86/mm/hap/nested_ept.c +++ b/xen/arch/x86/mm/hap/nested_ept.c @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * nested_ept.c: Handling virtulized EPT for guest in nested case. * * Copyright (c) 2012, Intel Corporation * Xiantao Zhang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include #include diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index bb143c6c42..ffd34a1cc6 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * ept-p2m.c: use the EPT page table as p2m * Copyright (c) 2007, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520289.807704 (Exim 4.92) (envelope-from ) id 1pmegk-0002io-UH; Wed, 12 Apr 2023 17:55:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520289.807704; Wed, 12 Apr 2023 17:55:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegk-0002ie-Rf; Wed, 12 Apr 2023 17:55:22 +0000 Received: by outflank-mailman (input) for mailman id 520289; Wed, 12 Apr 2023 17:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegk-0002iW-2p for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegk-0008H3-20 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmegk-0007u7-0p for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=P5Pyd+Hz9WBRddeVldBu680y6q6TcploVixqggOVPTU=; b=BTgtftH5qOUcJY01pVznJSNU/r F6t/aYYA+yD/UhDaPIwBoXVvvd9KUvS+an66W/z9ns06tOGggCmmwXUM4kfSu9GDfBno7Jl7iluL9 fb81yxQI7p3dMKNKi7siCQizV1t4B5a6yrgGPGS7sXMm94Lf0MDAdyVwdXpyU+QM6nFI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.c (part 3) Message-Id: Date: Wed, 12 Apr 2023 17:55:22 +0000 commit 831a1c2da01f13bf66b2922896abd37f94aecddb Author: Julien Grall AuthorDate: Mon Mar 27 19:45:16 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:33 2023 +0100 xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.c (part 3) It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-only in xen/arch/x86/*.c: * This program is free software; you can redistribute it and/or * modify it under the terms and conditions of the GNU General Public * License, version 2, as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/hvm/dom0_build.c | 13 +------------ xen/arch/x86/hvm/domain.c | 13 +------------ xen/arch/x86/pv/callback.c | 13 +------------ xen/arch/x86/pv/descriptor-tables.c | 13 +------------ xen/arch/x86/pv/grant_table.c | 13 +------------ xen/arch/x86/pv/mm.c | 13 +------------ 6 files changed, 6 insertions(+), 72 deletions(-) diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c index d44de7f2b2..fd2cbf68bc 100644 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm/dom0_build.c * * Dom0 builder for PVH guest. * * Copyright (C) 2017 Citrix Systems R&D - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/domain.c b/xen/arch/x86/hvm/domain.c index 10e30175a1..deec74fdb4 100644 --- a/xen/arch/x86/hvm/domain.c +++ b/xen/arch/x86/hvm/domain.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * HVM domain specific functions. * * Copyright (C) 2017 Citrix Systems R&D - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/callback.c b/xen/arch/x86/pv/callback.c index ca3bc30e91..17829304fe 100644 --- a/xen/arch/x86/pv/callback.c +++ b/xen/arch/x86/pv/callback.c @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * pv/callback.c * * hypercall handles and helper functions for guest callback - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index b4135b450c..02647a2c50 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/x86/pv/descriptor-tables.c * @@ -5,18 +6,6 @@ * * Copyright (c) 2002-2005 K A Fraser * Copyright (c) 2004 Christian Limpach - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/grant_table.c b/xen/arch/x86/pv/grant_table.c index 81c72e61ed..247436a015 100644 --- a/xen/arch/x86/pv/grant_table.c +++ b/xen/arch/x86/pv/grant_table.c @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * pv/grant_table.c * * Grant table interfaces for PV guests * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/mm.c b/xen/arch/x86/pv/mm.c index 5ed7b3ccdb..24f0d2e4ff 100644 --- a/xen/arch/x86/pv/mm.c +++ b/xen/arch/x86/pv/mm.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * pv/mm.c * @@ -5,18 +6,6 @@ * * Copyright (c) 2002-2005 K A Fraser * Copyright (c) 2004 Christian Limpach - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520290.807709 (Exim 4.92) (envelope-from ) id 1pmegu-0002ln-W2; Wed, 12 Apr 2023 17:55:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520290.807709; Wed, 12 Apr 2023 17:55:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegu-0002lg-TE; Wed, 12 Apr 2023 17:55:32 +0000 Received: by outflank-mailman (input) for mailman id 520290; Wed, 12 Apr 2023 17:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegu-0002lT-6w for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmegu-0008HD-6C for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmegu-0007v4-57 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9jQ/o1nPxt/qSmXT0lkbz1gpR1UJkHHMlhfTRf/SEq8=; b=t8LeLi4J+eyAzT2EJJHcUDua3B GSL72vDQIZ4di6pJDmPAxrDlCUXYxef4Ge/8depfqVjThYlJKu8b6Q3+gUPphlijXpl3eZCB3YQlS ny4JvHApZCwh7jGQ38VncGSieQ7+fnHFuKbVwMxjmskkGOhlloYCWjcP70TCkeHFN4Q4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.h Message-Id: Date: Wed, 12 Apr 2023 17:55:32 +0000 commit 0f10cd10f44b0868194071865f7ec3aac0aed2b2 Author: Julien Grall AuthorDate: Mon Mar 27 19:45:17 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:36 2023 +0100 xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.h It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-only in xen/arch/x86/*.h: * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/altp2m.h | 13 +------------ xen/arch/x86/include/asm/hvm/asid.h | 13 +------------ xen/arch/x86/include/asm/hvm/domain.h | 13 +------------ xen/arch/x86/include/asm/hvm/hvm.h | 13 +------------ xen/arch/x86/include/asm/hvm/io.h | 13 +------------ xen/arch/x86/include/asm/hvm/ioreq.h | 13 +------------ xen/arch/x86/include/asm/hvm/irq.h | 13 +------------ xen/arch/x86/include/asm/hvm/monitor.h | 13 +------------ xen/arch/x86/include/asm/hvm/nestedhvm.h | 13 +------------ xen/arch/x86/include/asm/hvm/save.h | 13 +------------ xen/arch/x86/include/asm/hvm/support.h | 13 +------------ xen/arch/x86/include/asm/hvm/svm/nestedsvm.h | 13 +------------ xen/arch/x86/include/asm/hvm/svm/svm.h | 13 +------------ xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 13 +------------ xen/arch/x86/include/asm/hvm/svm/vmcb.h | 13 +------------ xen/arch/x86/include/asm/hvm/vcpu.h | 13 +------------ xen/arch/x86/include/asm/hvm/vlapic.h | 13 +------------ xen/arch/x86/include/asm/hvm/vm_event.h | 13 +------------ xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 13 +------------ xen/arch/x86/include/asm/hvm/vmx/vmx.h | 13 +------------ xen/arch/x86/include/asm/hvm/vmx/vvmx.h | 13 +------------ xen/arch/x86/include/asm/hvm/vpt.h | 13 +------------ xen/arch/x86/include/asm/iommu.h | 14 +------------- xen/arch/x86/include/asm/ioreq.h | 13 +------------ xen/arch/x86/include/asm/vm_event.h | 13 +------------ xen/arch/x86/include/asm/vpmu.h | 13 +------------ xen/arch/x86/mm/hap/private.h | 13 +------------ xen/arch/x86/x86_64/mmconfig.h | 13 +------------ 28 files changed, 28 insertions(+), 337 deletions(-) diff --git a/xen/arch/x86/include/asm/altp2m.h b/xen/arch/x86/include/asm/altp2m.h index b206e95863..e5e59cbd68 100644 --- a/xen/arch/x86/include/asm/altp2m.h +++ b/xen/arch/x86/include/asm/altp2m.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Alternate p2m HVM * Copyright (c) 2014, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_ALTP2M_H diff --git a/xen/arch/x86/include/asm/hvm/asid.h b/xen/arch/x86/include/asm/hvm/asid.h index 633ddb72e4..0207f8fc29 100644 --- a/xen/arch/x86/include/asm/hvm/asid.h +++ b/xen/arch/x86/include/asm/hvm/asid.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asid.h: ASID management * Copyright (c) 2007, Advanced Micro Devices, Inc. * Copyright (c) 2009, Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_ASID_H__ diff --git a/xen/arch/x86/include/asm/hvm/domain.h b/xen/arch/x86/include/asm/hvm/domain.h index 698455444e..02c32cf26d 100644 --- a/xen/arch/x86/include/asm/hvm/domain.h +++ b/xen/arch/x86/include/asm/hvm/domain.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * domain.h: HVM per domain definitions * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2005, International Business Machines Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_DOMAIN_H__ diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index 258e0a1f29..04cbd4ff24 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm.h: Hardware virtual machine assist interface definitions. * * Leendert van Doorn, leendert@watson.ibm.com * Copyright (c) 2005, International Business Machines Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_HVM_H__ diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h index 54e0161b49..8df33eb6cc 100644 --- a/xen/arch/x86/include/asm/hvm/io.h +++ b/xen/arch/x86/include/asm/hvm/io.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * io.h: HVM IO support * * Copyright (c) 2004, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_IO_H__ diff --git a/xen/arch/x86/include/asm/hvm/ioreq.h b/xen/arch/x86/include/asm/hvm/ioreq.h index 9b2eb6fedf..84be14fd08 100644 --- a/xen/arch/x86/include/asm/hvm/ioreq.h +++ b/xen/arch/x86/include/asm/hvm/ioreq.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm.h: Hardware virtual machine assist interface definitions. * * Copyright (c) 2016 Citrix Systems Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_IOREQ_H__ diff --git a/xen/arch/x86/include/asm/hvm/irq.h b/xen/arch/x86/include/asm/hvm/irq.h index c4369ceb7a..2d136ab99b 100644 --- a/xen/arch/x86/include/asm/hvm/irq.h +++ b/xen/arch/x86/include/asm/hvm/irq.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * irq.h * * Interrupt distribution and delivery logic. * * Copyright (c) 2006, K A Fraser, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_IRQ_H__ diff --git a/xen/arch/x86/include/asm/hvm/monitor.h b/xen/arch/x86/include/asm/hvm/monitor.h index 6884f38d73..5276b0af08 100644 --- a/xen/arch/x86/include/asm/hvm/monitor.h +++ b/xen/arch/x86/include/asm/hvm/monitor.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * include/asm-x86/hvm/monitor.h * * Arch-specific hardware virtual machine monitor abstractions. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_MONITOR_H__ diff --git a/xen/arch/x86/include/asm/hvm/nestedhvm.h b/xen/arch/x86/include/asm/hvm/nestedhvm.h index 7184928c2b..3d1ec53a6f 100644 --- a/xen/arch/x86/include/asm/hvm/nestedhvm.h +++ b/xen/arch/x86/include/asm/hvm/nestedhvm.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Nested HVM * Copyright (c) 2011, Advanced Micro Devices, Inc. * Author: Christoph Egger - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef _HVM_NESTEDHVM_H diff --git a/xen/arch/x86/include/asm/hvm/save.h b/xen/arch/x86/include/asm/hvm/save.h index e975011ddb..9d838c48e3 100644 --- a/xen/arch/x86/include/asm/hvm/save.h +++ b/xen/arch/x86/include/asm/hvm/save.h @@ -1,17 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * save.h: HVM support routines for save/restore - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __XEN_HVM_SAVE_H__ diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/asm/hvm/support.h index 6b583738ec..8d4707e58c 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * support.h: HVM support routines used by VT-x and SVM. * * Leendert van Doorn, leendert@watson.ibm.com * Copyright (c) 2005, International Business Machines Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_SUPPORT_H__ diff --git a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h b/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h index 230f818df8..406fc082b1 100644 --- a/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h +++ b/xen/arch/x86/include/asm/hvm/svm/nestedsvm.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * nestedsvm.h: Nested Virtualization * Copyright (c) 2011, Advanced Micro Devices, Inc * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_SVM_NESTEDSVM_H__ #define __ASM_X86_HVM_SVM_NESTEDSVM_H__ diff --git a/xen/arch/x86/include/asm/hvm/svm/svm.h b/xen/arch/x86/include/asm/hvm/svm/svm.h index 7d5de0122a..687d35be40 100644 --- a/xen/arch/x86/include/asm/hvm/svm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm/svm.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * svm.h: SVM Architecture related definitions * Copyright (c) 2005, AMD Corporation. * Copyright (c) 2004, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_SVM_H__ diff --git a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h index 330c1d91aa..f1cde676dc 100644 --- a/xen/arch/x86/include/asm/hvm/svm/svmdebug.h +++ b/xen/arch/x86/include/asm/hvm/svm/svmdebug.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * svmdebug.h: SVM related debug defintions * Copyright (c) 2011, AMD Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_SVM_SVMDEBUG_H__ diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h b/xen/arch/x86/include/asm/hvm/svm/vmcb.h index 8ec2ce6cdf..a1a8a7fd25 100644 --- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h +++ b/xen/arch/x86/include/asm/hvm/svm/vmcb.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmcb.h: VMCB related definitions * Copyright (c) 2005-2007, Advanced Micro Devices, Inc * Copyright (c) 2004, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_SVM_VMCB_H__ #define __ASM_X86_HVM_SVM_VMCB_H__ diff --git a/xen/arch/x86/include/asm/hvm/vcpu.h b/xen/arch/x86/include/asm/hvm/vcpu.h index 8adf4555c2..c9ef2b325b 100644 --- a/xen/arch/x86/include/asm/hvm/vcpu.h +++ b/xen/arch/x86/include/asm/hvm/vcpu.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vcpu.h: HVM per vcpu definitions * * Copyright (c) 2005, International Business Machines Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_VCPU_H__ diff --git a/xen/arch/x86/include/asm/hvm/vlapic.h b/xen/arch/x86/include/asm/hvm/vlapic.h index 8f908928c3..f27454a136 100644 --- a/xen/arch/x86/include/asm/hvm/vlapic.h +++ b/xen/arch/x86/include/asm/hvm/vlapic.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * hvm_vlapic.h: virtualize LAPIC definitions. * * Copyright (c) 2004, Intel Corporation. * Copyright (c) 2006 Keir Fraser, XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_VLAPIC_H__ diff --git a/xen/arch/x86/include/asm/hvm/vm_event.h b/xen/arch/x86/include/asm/hvm/vm_event.h index 28cb07ce8f..506a85c774 100644 --- a/xen/arch/x86/include/asm/hvm/vm_event.h +++ b/xen/arch/x86/include/asm/hvm/vm_event.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * include/asm-x86/hvm/vm_event.h * * Hardware virtual machine vm_event abstractions. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_VM_EVENT_H__ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h index 0a84e74478..51641caa9f 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmcs.h: VMCS related definitions * Copyright (c) 2004, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_VMX_VMCS_H__ #define __ASM_X86_HVM_VMX_VMCS_H__ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h index 82a9487b40..36c108d879 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vmx.h: VMX Architecture related definitions * Copyright (c) 2004, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_VMX_VMX_H__ #define __ASM_X86_HVM_VMX_VMX_H__ diff --git a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h index 2c3adb5dd6..dc9db69258 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vvmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vvmx.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vvmx.h: Support virtual VMX for nested virtualization. @@ -6,18 +7,6 @@ * Author: Qing He * Eddie Dong * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __ASM_X86_HVM_VVMX_H__ #define __ASM_X86_HVM_VVMX_H__ diff --git a/xen/arch/x86/include/asm/hvm/vpt.h b/xen/arch/x86/include/asm/hvm/vpt.h index 74c0cedd11..935cbe333b 100644 --- a/xen/arch/x86/include/asm/hvm/vpt.h +++ b/xen/arch/x86/include/asm/hvm/vpt.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpt.h: Virtual Platform Timer definitions * * Copyright (c) 2004, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_HVM_VPT_H__ diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h index 586c7434f2..0540cd9faa 100644 --- a/xen/arch/x86/include/asm/iommu.h +++ b/xen/arch/x86/include/asm/iommu.h @@ -1,16 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . -*/ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __ARCH_X86_IOMMU_H__ #define __ARCH_X86_IOMMU_H__ diff --git a/xen/arch/x86/include/asm/ioreq.h b/xen/arch/x86/include/asm/ioreq.h index d06ce9a6ea..5fe811eff5 100644 --- a/xen/arch/x86/include/asm/ioreq.h +++ b/xen/arch/x86/include/asm/ioreq.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * ioreq.h: Hardware virtual machine assist interface definitions. * @@ -5,18 +6,6 @@ * from the common code. * * Copyright (c) 2016 Citrix Systems Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_IOREQ_H__ diff --git a/xen/arch/x86/include/asm/vm_event.h b/xen/arch/x86/include/asm/vm_event.h index 0756124075..46e77ed6d9 100644 --- a/xen/arch/x86/include/asm/vm_event.h +++ b/xen/arch/x86/include/asm/vm_event.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vm_event.h: architecture specific vm_event handling routines * * Copyright (c) 2015 Tamas K Lengyel (tamas@tklengyel.com) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . */ #ifndef __ASM_X86_VM_EVENT_H__ diff --git a/xen/arch/x86/include/asm/vpmu.h b/xen/arch/x86/include/asm/vpmu.h index 05e1fbfccf..b165acc6c2 100644 --- a/xen/arch/x86/include/asm/vpmu.h +++ b/xen/arch/x86/include/asm/vpmu.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * vpmu.h: PMU virtualization for HVM domain. * * Copyright (c) 2007, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * * Author: Haitao Shan */ diff --git a/xen/arch/x86/mm/hap/private.h b/xen/arch/x86/mm/hap/private.h index 1040eaf69f..7eb672fa41 100644 --- a/xen/arch/x86/mm/hap/private.h +++ b/xen/arch/x86/mm/hap/private.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/x86/mm/hap/private.h * * Copyright (c) 2007, AMD Corporation (Wei Huang) * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * */ #ifndef __HAP_PRIVATE_H__ #define __HAP_PRIVATE_H__ diff --git a/xen/arch/x86/x86_64/mmconfig.h b/xen/arch/x86/x86_64/mmconfig.h index 433046be66..2d49fc79a0 100644 --- a/xen/arch/x86/x86_64/mmconfig.h +++ b/xen/arch/x86/x86_64/mmconfig.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2006, Intel Corporation. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; If not, see . - * * Author: Allen Kay - adapted from linux */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520291.807713 (Exim 4.92) (envelope-from ) id 1pmeh6-0002p0-36; Wed, 12 Apr 2023 17:55:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520291.807713; Wed, 12 Apr 2023 17:55:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmeh6-0002oq-0I; Wed, 12 Apr 2023 17:55:44 +0000 Received: by outflank-mailman (input) for mailman id 520291; Wed, 12 Apr 2023 17:55:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmeh4-0002oe-DZ for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmeh4-0008HP-BB for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmeh4-0007vV-8t for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sV13f163MUa4Nwpa5lhECwRt3U1WM+4GTFDDjca2N/M=; b=LZ1TtGyjEtT8Yoc0vQeGSaeJZn nm2W63UwbU/8FKUrp1ia5IKQHsYKnM8dL+Pc5HwQZYNbOyl2j7yEdJ3J8SGeEaF0XnroPCbhJqR7K vi4qFA1Amf6LytPvG62/SB6TQ6rSyJqObOsDTbDnian58n7GpPUdUbGpFdZlVe+kgwdc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.h (part 3) Message-Id: Date: Wed, 12 Apr 2023 17:55:42 +0000 commit 406f0f593ef33f67e64f96c3742fecf20b341b3e Author: Julien Grall AuthorDate: Mon Mar 27 19:45:18 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:52 2023 +0100 xen/x86: Replace GPL v2.0 license boilerplate with an SPDX tag in *.h (part 3) It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-only in xen/arch/x86/*.h: * This program is free software; you can redistribute it and/or * modify it under the terms and conditions of the GNU General Public * License, version 2, as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/guest.h | 13 +------------ xen/arch/x86/include/asm/guest/hyperv-hcall.h | 13 +------------ xen/arch/x86/include/asm/guest/hyperv.h | 13 +------------ xen/arch/x86/include/asm/guest/hypervisor.h | 13 +------------ xen/arch/x86/include/asm/guest/pvh-boot.h | 13 +------------ xen/arch/x86/include/asm/guest/xen-hcall.h | 13 +------------ xen/arch/x86/include/asm/guest/xen.h | 13 +------------ xen/arch/x86/include/asm/hvm/grant_table.h | 13 +------------ xen/arch/x86/include/asm/pv/domain.h | 13 +------------ xen/arch/x86/include/asm/pv/grant_table.h | 13 +------------ xen/arch/x86/include/asm/pv/mm.h | 13 +------------ xen/arch/x86/include/asm/pv/shim.h | 13 +------------ xen/arch/x86/include/asm/pv/traps.h | 13 +------------ 13 files changed, 13 insertions(+), 156 deletions(-) diff --git a/xen/arch/x86/include/asm/guest.h b/xen/arch/x86/include/asm/guest.h index ccf1ffbb72..c3124c7b8d 100644 --- a/xen/arch/x86/include/asm/guest.h +++ b/xen/arch/x86/include/asm/guest.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h b/xen/arch/x86/include/asm/guest/hyperv-hcall.h index 423ca0860b..b76dbf9ccc 100644 --- a/xen/arch/x86/include/asm/guest/hyperv-hcall.h +++ b/xen/arch/x86/include/asm/guest/hyperv-hcall.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/hyperv-hcall.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2019 Microsoft. */ diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h index 1a1b47831c..c05efdce71 100644 --- a/xen/arch/x86/include/asm/guest/hyperv.h +++ b/xen/arch/x86/include/asm/guest/hyperv.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/hyperv.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2019 Microsoft. */ diff --git a/xen/arch/x86/include/asm/guest/hypervisor.h b/xen/arch/x86/include/asm/guest/hypervisor.h index 0a6c3b47ab..4cffea3866 100644 --- a/xen/arch/x86/include/asm/guest/hypervisor.h +++ b/xen/arch/x86/include/asm/guest/hypervisor.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/hypervisor.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2019 Microsoft. */ diff --git a/xen/arch/x86/include/asm/guest/pvh-boot.h b/xen/arch/x86/include/asm/guest/pvh-boot.h index 48ffd1a0b1..247ba6899e 100644 --- a/xen/arch/x86/include/asm/guest/pvh-boot.h +++ b/xen/arch/x86/include/asm/guest/pvh-boot.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/pvh-boot.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/guest/xen-hcall.h b/xen/arch/x86/include/asm/guest/xen-hcall.h index 03d5868a9e..665b472d05 100644 --- a/xen/arch/x86/include/asm/guest/xen-hcall.h +++ b/xen/arch/x86/include/asm/guest/xen-hcall.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/xen-hcall.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/guest/xen.h b/xen/arch/x86/include/asm/guest/xen.h index 2042a9a0c2..c330c4d400 100644 --- a/xen/arch/x86/include/asm/guest/xen.h +++ b/xen/arch/x86/include/asm/guest/xen.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/xen.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/hvm/grant_table.h b/xen/arch/x86/include/asm/hvm/grant_table.h index a5612585b3..33c1da1a25 100644 --- a/xen/arch/x86/include/asm/hvm/grant_table.h +++ b/xen/arch/x86/include/asm/hvm/grant_table.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asm-x86/hvm/grant_table.h * * Grant table interfaces for HVM guests * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #ifndef __X86_HVM_GRANT_TABLE_H__ diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/asm/pv/domain.h index 924508bbb4..db7a40f68e 100644 --- a/xen/arch/x86/include/asm/pv/domain.h +++ b/xen/arch/x86/include/asm/pv/domain.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * pv/domain.h * * PV guest interface definitions * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #ifndef __X86_PV_DOMAIN_H__ diff --git a/xen/arch/x86/include/asm/pv/grant_table.h b/xen/arch/x86/include/asm/pv/grant_table.h index 85442b6074..88f36c6595 100644 --- a/xen/arch/x86/include/asm/pv/grant_table.h +++ b/xen/arch/x86/include/asm/pv/grant_table.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asm-x86/pv/grant_table.h * * Grant table interfaces for PV guests * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #ifndef __X86_PV_GRANT_TABLE_H__ diff --git a/xen/arch/x86/include/asm/pv/mm.h b/xen/arch/x86/include/asm/pv/mm.h index 9983f8257c..182764542c 100644 --- a/xen/arch/x86/include/asm/pv/mm.h +++ b/xen/arch/x86/include/asm/pv/mm.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * asm-x86/pv/mm.h * * Memory management interfaces for PV guests * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #ifndef __X86_PV_MM_H__ diff --git a/xen/arch/x86/include/asm/pv/shim.h b/xen/arch/x86/include/asm/pv/shim.h index a43c3689b4..5625b90b72 100644 --- a/xen/arch/x86/include/asm/pv/shim.h +++ b/xen/arch/x86/include/asm/pv/shim.h @@ -1,18 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /****************************************************************************** * asm-x86/guest/shim.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/pv/traps.h b/xen/arch/x86/include/asm/pv/traps.h index 855203c4e2..404f5b169c 100644 --- a/xen/arch/x86/include/asm/pv/traps.h +++ b/xen/arch/x86/include/asm/pv/traps.h @@ -1,21 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * pv/traps.h * * PV guest traps interface definitions * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or - * modify it under the terms and conditions of the GNU General Public - * License, version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this program; If not, see . */ #ifndef __X86_PV_TRAPS_H__ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:55:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:55:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520292.807717 (Exim 4.92) (envelope-from ) id 1pmehG-0002rb-4v; Wed, 12 Apr 2023 17:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520292.807717; Wed, 12 Apr 2023 17:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehG-0002rU-1v; Wed, 12 Apr 2023 17:55:54 +0000 Received: by outflank-mailman (input) for mailman id 520292; Wed, 12 Apr 2023 17:55:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehE-0002rO-I9 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehE-0008Ha-HG for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmehE-0007vx-G9 for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:55:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=q4aR/u88ykJGSfUFCJ3HS3Ux/ZfDMqBmwpp9UEeXIIg=; b=5It+EFWJyh1RDfFatpp3RrqRgi eNunWaI9UgjiydAkGw1tvYxBbsGXUFohjZbWo4JpL+PAWqfQ37GHZrrztOrz+RrgmZIuJdRtot8Qp 95j/ykLRGDVMcQjqAd3/c+OVV5hU5/K16dwxEp6FekGQ/J2r33Wns/m/fZi3BhGaAFa8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0+ license boilerplate with an SPDX tag in *.c Message-Id: Date: Wed, 12 Apr 2023 17:55:52 +0000 commit f68674efb79745cbcb80f333f1f1bd3007ad9f1e Author: Julien Grall AuthorDate: Mon Mar 27 19:45:19 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:54 2023 +0100 xen/x86: Replace GPL v2.0+ license boilerplate with an SPDX tag in *.c It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-or-later in xen/arch/x86/*.c: * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/alternative.c | 14 +------------- xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 14 +------------- xen/arch/x86/cpu/mcheck/mce_amd.c | 14 +------------- xen/arch/x86/cpu/mcheck/vmce.c | 14 +------------- xen/arch/x86/guest/hyperv/hyperv.c | 14 +------------- xen/arch/x86/guest/hyperv/tlb.c | 14 +------------- xen/arch/x86/guest/hyperv/util.c | 14 +------------- xen/arch/x86/guest/hypervisor.c | 14 +------------- xen/arch/x86/guest/xen/pvh-boot.c | 14 +------------- xen/arch/x86/guest/xen/xen.c | 14 +------------- xen/arch/x86/hvm/grant_table.c | 14 +------------- xen/arch/x86/hvm/hypercall.c | 14 +------------- xen/arch/x86/hypercall.c | 14 +------------- xen/arch/x86/mm.c | 14 +------------- xen/arch/x86/mm/guest_walk.c | 14 +------------- xen/arch/x86/mm/hap/hap.c | 14 +------------- xen/arch/x86/mm/hap/nested_hap.c | 14 +------------- xen/arch/x86/mm/mem_access.c | 14 +------------- xen/arch/x86/mm/mem_paging.c | 14 +------------- xen/arch/x86/mm/mem_sharing.c | 14 +------------- xen/arch/x86/mm/nested.c | 14 +------------- xen/arch/x86/mm/p2m-basic.c | 14 +------------- xen/arch/x86/mm/p2m-pod.c | 14 +------------- xen/arch/x86/mm/p2m-pt.c | 14 +------------- xen/arch/x86/mm/p2m.c | 14 +------------- xen/arch/x86/mm/paging.c | 14 +------------- xen/arch/x86/mm/physmap.c | 14 +------------- xen/arch/x86/mm/shadow/common.c | 14 +------------- xen/arch/x86/mm/shadow/hvm.c | 14 +------------- xen/arch/x86/mm/shadow/multi.c | 14 +------------- xen/arch/x86/mm/shadow/pv.c | 14 +------------- xen/arch/x86/mm/shadow/set.c | 14 +------------- xen/arch/x86/msr.c | 14 +------------- xen/arch/x86/pv/emul-gate-op.c | 14 +------------- xen/arch/x86/pv/emul-inv-op.c | 14 +------------- xen/arch/x86/pv/emul-priv-op.c | 14 +------------- xen/arch/x86/pv/emulate.c | 14 +------------- xen/arch/x86/pv/hypercall.c | 14 +------------- xen/arch/x86/pv/misc-hypercalls.c | 14 +------------- xen/arch/x86/pv/ro-page-fault.c | 14 +------------- xen/arch/x86/pv/shim.c | 14 +------------- xen/arch/x86/pv/traps.c | 14 +------------- xen/arch/x86/smpboot.c | 14 +------------- xen/arch/x86/spec_ctrl.c | 14 +------------- xen/arch/x86/traps.c | 14 +------------- xen/arch/x86/x86_emulate/x86_emulate.c | 14 +------------- 46 files changed, 46 insertions(+), 598 deletions(-) diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 0c6fc7b4fb..2383fa6629 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -1,18 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * alternative.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c index efb45c931e..7d48c9ab5f 100644 --- a/xen/arch/x86/cpu/mcheck/amd_nonfatal.c +++ b/xen/arch/x86/cpu/mcheck/amd_nonfatal.c @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MCA implementation for AMD CPUs * Copyright (c) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c index d7ae8919df..3c374fd4e4 100644 --- a/xen/arch/x86/cpu/mcheck/mce_amd.c +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * common MCA implementation for AMD CPUs. * Copyright (c) 2012-2014 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ /* K8 common MCA documentation published at diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 6f1a7e4de0..904b0c0d3a 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * vmce.c - provide software emulated vMCE support to guest * * Copyright (C) 2010, 2011 Jiang, Yunhong * Copyright (C) 2012, 2013 Liu, Jinsong - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c index b101ba3080..aacc7a6167 100644 --- a/xen/arch/x86/guest/hyperv/hyperv.c +++ b/xen/arch/x86/guest/hyperv/hyperv.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/hyperv/hyperv.c * * Support for detecting and running under Hyper-V. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2019 Microsoft. */ #include diff --git a/xen/arch/x86/guest/hyperv/tlb.c b/xen/arch/x86/guest/hyperv/tlb.c index f249b25925..ef930efa95 100644 --- a/xen/arch/x86/guest/hyperv/tlb.c +++ b/xen/arch/x86/guest/hyperv/tlb.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/hyperv/tlb.c * * Support for TLB management using hypercalls * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2020 Microsoft. */ diff --git a/xen/arch/x86/guest/hyperv/util.c b/xen/arch/x86/guest/hyperv/util.c index 2c5f421b7b..a88699e818 100644 --- a/xen/arch/x86/guest/hyperv/util.c +++ b/xen/arch/x86/guest/hyperv/util.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/hyperv/util.c * * Hyper-V utility functions * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2020 Microsoft. */ diff --git a/xen/arch/x86/guest/hypervisor.c b/xen/arch/x86/guest/hypervisor.c index 366af1d650..b8549a131a 100644 --- a/xen/arch/x86/guest/hypervisor.c +++ b/xen/arch/x86/guest/hypervisor.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/hypervisor.c * * Support for detecting and running under a hypervisor. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2019 Microsoft. */ #include diff --git a/xen/arch/x86/guest/xen/pvh-boot.c b/xen/arch/x86/guest/xen/pvh-boot.c index 498625eae0..9cbe87b61b 100644 --- a/xen/arch/x86/guest/xen/pvh-boot.c +++ b/xen/arch/x86/guest/xen/pvh-boot.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/pvh-boot.c * * PVH boot time support * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ #include diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index 9c2defaa66..f93dfc89f7 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/xen.c * * Support for detecting and running under Xen. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ #include diff --git a/xen/arch/x86/hvm/grant_table.c b/xen/arch/x86/hvm/grant_table.c index b7a896ea58..30d51d54a9 100644 --- a/xen/arch/x86/hvm/grant_table.c +++ b/xen/arch/x86/hvm/grant_table.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/hvm/grant_table.c * * Grant table interfaces for HVM guests * * Copyright (C) 2017 Wei Liu - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 405d0a95af..20d266ffd5 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/hvm/hypercall.c * * HVM hypercall dispatching routines * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ #include diff --git a/xen/arch/x86/hypercall.c b/xen/arch/x86/hypercall.c index 6b73cff9b9..cc9a6a9d59 100644 --- a/xen/arch/x86/hypercall.c +++ b/xen/arch/x86/hypercall.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/hypercall.c * * Common x86 hypercall infrastructure. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2015,2016 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 8e6d000950..36a07ef77e 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm.c * * Copyright (c) 2002-2005 K A Fraser * Copyright (c) 2004 Christian Limpach - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ /* diff --git a/xen/arch/x86/mm/guest_walk.c b/xen/arch/x86/mm/guest_walk.c index 76b4e04258..fe7393334f 100644 --- a/xen/arch/x86/mm/guest_walk.c +++ b/xen/arch/x86/mm/guest_walk.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/guest_walk.c * @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c index 16e9c3325f..de1b8189d9 100644 --- a/xen/arch/x86/mm/hap/hap.c +++ b/xen/arch/x86/mm/hap/hap.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/hap/hap.c * * hardware assisted paging * Copyright (c) 2007 Advanced Micro Devices (Wei Huang) * Parts of this code are Copyright (c) 2007 by XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c index 098e8e5d4c..ee78a797d1 100644 --- a/xen/arch/x86/mm/hap/nested_hap.c +++ b/xen/arch/x86/mm/hap/nested_hap.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/hap/nested_hap.c * * Code for Nested Virtualization * Copyright (c) 2011 Advanced Micro Devices - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/mem_access.c b/xen/arch/x86/mm/mem_access.c index 676d922973..c472fa1ee5 100644 --- a/xen/arch/x86/mm/mem_access.c +++ b/xen/arch/x86/mm/mem_access.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/mem_access.c * @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include /* copy_from_guest() */ diff --git a/xen/arch/x86/mm/mem_paging.c b/xen/arch/x86/mm/mem_paging.c index 01281f786e..2c2b34ccf6 100644 --- a/xen/arch/x86/mm/mem_paging.c +++ b/xen/arch/x86/mm/mem_paging.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/mem_paging.c * * Memory paging support. * * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 5b3449db7a..8edbd9600f 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/mem_sharing.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2011 GridCentric, Inc. (Adin Scannell & Andres Lagar-Cavilla) * Copyright (c) 2009 Citrix Systems, Inc. (Grzegorz Milos) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/nested.c b/xen/arch/x86/mm/nested.c index fab62b2b2d..03741ffae4 100644 --- a/xen/arch/x86/mm/nested.c +++ b/xen/arch/x86/mm/nested.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/nested.c * @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/p2m-basic.c b/xen/arch/x86/mm/p2m-basic.c index 47b780d6d6..8599bd15c6 100644 --- a/xen/arch/x86/mm/p2m-basic.c +++ b/xen/arch/x86/mm/p2m-basic.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/p2m-basic.c * @@ -8,19 +9,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index c75a60c19f..9969eb45fa 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/p2m-pod.c * * Populate-on-demand p2m entries. * * Copyright (c) 2009-2011 Citrix Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c index cd1af33b67..6d1bb5daad 100644 --- a/xen/arch/x86/mm/p2m-pt.c +++ b/xen/arch/x86/mm/p2m-pt.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/p2m-pt.c * @@ -9,19 +10,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index 7e481aec38..714358f953 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/p2m.c * @@ -8,19 +9,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index ff5b480677..9ec305730a 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/paging.c * * x86 specific paging support * Copyright (c) 2007 Advanced Micro Devices (Wei Huang) * Copyright (c) 2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/physmap.c b/xen/arch/x86/mm/physmap.c index 2d267b42f7..f1695e456e 100644 --- a/xen/arch/x86/mm/physmap.c +++ b/xen/arch/x86/mm/physmap.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/physmap.c * @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 1c1b0ad0d8..0f3a369d89 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/common.c * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 3a00daf9c4..d66dfea485 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/hvm.c @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index f86cc5b079..cf74fdf5dd 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/multi.c * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/shadow/pv.c b/xen/arch/x86/mm/shadow/pv.c index 0ef8e53d12..345fd5419a 100644 --- a/xen/arch/x86/mm/shadow/pv.c +++ b/xen/arch/x86/mm/shadow/pv.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/pv.c * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/mm/shadow/set.c b/xen/arch/x86/mm/shadow/set.c index bd6c68b547..8b670b6bb5 100644 --- a/xen/arch/x86/mm/shadow/set.c +++ b/xen/arch/x86/mm/shadow/set.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/set.c * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #define GUEST_PAGING_LEVELS 0 diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 2e16818bf5..ecf126566d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/msr.c * * Policy objects for Model-Specific Registers. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c index 9524982e7d..dcac0a0401 100644 --- a/xen/arch/x86/pv/emul-gate-op.c +++ b/xen/arch/x86/pv/emul-gate-op.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/emul-gate-op.c * * Emulate gate op for PV guests * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c index 32eb34e1a2..314ebd01cb 100644 --- a/xen/arch/x86/pv/emul-inv-op.c +++ b/xen/arch/x86/pv/emul-inv-op.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/emul-inv-op.c * * Emulate invalid op for PV guests * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index a30a172066..ce907f686e 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/emul-priv-op.c * * Emulate privileged instructions for PV guests * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 2eff77c577..e7a1c0a2cc 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/emulate.c * * Common PV emulation code * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/hypercall.c b/xen/arch/x86/pv/hypercall.c index 2eedfbfae8..4294e93012 100644 --- a/xen/arch/x86/pv/hypercall.c +++ b/xen/arch/x86/pv/hypercall.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/hypercall.c * * PV hypercall dispatching routines * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/pv/misc-hypercalls.c b/xen/arch/x86/pv/misc-hypercalls.c index aaaf70eb63..b11bd718b7 100644 --- a/xen/arch/x86/pv/misc-hypercalls.c +++ b/xen/arch/x86/pv/misc-hypercalls.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/misc-hypercalls.c * * Misc hypercall handlers * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index e17ed4e437..3dcdf07296 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/ro-page-fault.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2002-2005 K A Fraser * Copyright (c) 2004 Christian Limpach - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/pv/shim.c b/xen/arch/x86/pv/shim.c index ae1a0e6e65..4044087119 100644 --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/shim.c * * Functionaltiy for PV Shim mode * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ #include diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index 07040ced4a..17ca4d1d51 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/pv/traps.c * * PV low level entry points. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index b26758c2c8..cf9bb220f9 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * x86 SMP booting functions * * This inherits a great deal from Linux's SMP boot code: * (c) 1995 Alan Cox, Building #3 * (c) 1998, 1999, 2000 Ingo Molnar - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index e80e2a5ed1..f81db21433 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/spec_ctrl.c * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017-2018 Citrix Systems Ltd. */ #include diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 58e263056a..4229bda159 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/traps.c * * Modifications to Linux original are copyright (c) 2002-2004, K A Fraser - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ /* diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 8aa23b929c..f316117516 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * x86_emulate.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 12 17:56:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 12 Apr 2023 17:56:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520293.807721 (Exim 4.92) (envelope-from ) id 1pmehQ-0002v2-8w; Wed, 12 Apr 2023 17:56:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520293.807721; Wed, 12 Apr 2023 17:56:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehQ-0002uv-5g; Wed, 12 Apr 2023 17:56:04 +0000 Received: by outflank-mailman (input) for mailman id 520293; Wed, 12 Apr 2023 17:56:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehO-0002uK-MW for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:56:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmehO-0008Hu-LW for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:56:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmehO-0007x2-KQ for xen-changelog@lists.xenproject.org; Wed, 12 Apr 2023 17:56:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Yrcgb/h+fxs6Ugnh4VUpGM7M0xnu8QcherqDdI9NjSM=; b=XzndDRptmyk1YXbcvjpPD3txQ6 Jca4GjZf/x75AKS68CUrEEqe0j9NGtwNrk2NDjMvCKyXuWXRSBDVn4HafnVMFqR31W+dm/GWHknK/ t6btxSlP/+RXTYE8vp2nAPrlijQPIxXtUhseImR4X69sIWze932Ymv690QhX275atAvQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Replace GPL v2.0+ license boilerplate with an SPDX tag in *.h Message-Id: Date: Wed, 12 Apr 2023 17:56:02 +0000 commit 5ea03c570c8610d4359f8bbf5f093d215344ce3f Author: Julien Grall AuthorDate: Mon Mar 27 19:45:20 2023 +0100 Commit: Julien Grall CommitDate: Tue Apr 11 13:38:56 2023 +0100 xen/x86: Replace GPL v2.0+ license boilerplate with an SPDX tag in *.h It is easier to understand the license of a file when using SPDX. This is replacing the below pattern with the SPDX tag GPL-2.0-or-later in xen/arch/x86/*.h: * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; If not, see . Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/x86_mca.h | 14 +------------- xen/arch/x86/guest/hyperv/private.h | 14 +------------- xen/arch/x86/include/asm/endbr.h | 14 +------------- xen/arch/x86/include/asm/guest_pt.h | 14 +------------- xen/arch/x86/include/asm/hap.h | 14 +------------- xen/arch/x86/include/asm/mem_access.h | 14 +------------- xen/arch/x86/include/asm/mem_paging.h | 14 +------------- xen/arch/x86/include/asm/mem_sharing.h | 14 +------------- xen/arch/x86/include/asm/p2m.h | 14 +------------- xen/arch/x86/include/asm/paging.h | 14 +------------- xen/arch/x86/include/asm/shstk.h | 14 +------------- xen/arch/x86/include/asm/spec_ctrl.h | 14 +------------- xen/arch/x86/include/asm/spec_ctrl_asm.h | 14 +------------- xen/arch/x86/include/asm/traps.h | 14 +------------- xen/arch/x86/include/asm/xenoprof.h | 14 +------------- xen/arch/x86/mm/mm-locks.h | 14 +------------- xen/arch/x86/mm/p2m.h | 14 +------------- xen/arch/x86/mm/shadow/multi.h | 14 +------------- xen/arch/x86/mm/shadow/private.h | 14 +------------- xen/arch/x86/mm/shadow/types.h | 14 +------------- xen/arch/x86/x86_emulate/x86_emulate.h | 14 +------------- 21 files changed, 21 insertions(+), 273 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/x86_mca.h b/xen/arch/x86/cpu/mcheck/x86_mca.h index 8f7fced0fe..18116737af 100644 --- a/xen/arch/x86/cpu/mcheck/x86_mca.h +++ b/xen/arch/x86/cpu/mcheck/x86_mca.h @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * MCA implementation for AMD CPUs * Copyright (c) 2007-2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef X86_MCA_H diff --git a/xen/arch/x86/guest/hyperv/private.h b/xen/arch/x86/guest/hyperv/private.h index fea3e291e9..0277e8314c 100644 --- a/xen/arch/x86/guest/hyperv/private.h +++ b/xen/arch/x86/guest/hyperv/private.h @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/guest/hyperv/private.h * * Definitions / declarations only useful to Hyper-V code. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2020 Microsoft. */ diff --git a/xen/arch/x86/include/asm/endbr.h b/xen/arch/x86/include/asm/endbr.h index d946fac131..3033e40d29 100644 --- a/xen/arch/x86/include/asm/endbr.h +++ b/xen/arch/x86/include/asm/endbr.h @@ -1,17 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2021-2022 Citrix Systems Ltd. */ #ifndef XEN_ASM_ENDBR_H diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h index 6802db2a41..bde7588342 100644 --- a/xen/arch/x86/include/asm/guest_pt.h +++ b/xen/arch/x86/include/asm/guest_pt.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * xen/asm-x86/guest_pt.h * @@ -10,19 +11,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_ASM_GUEST_PT_H diff --git a/xen/arch/x86/include/asm/hap.h b/xen/arch/x86/include/asm/hap.h index 90dece29de..9d12327b12 100644 --- a/xen/arch/x86/include/asm/hap.h +++ b/xen/arch/x86/include/asm/hap.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/hap.h * @@ -7,19 +8,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_HAP_H diff --git a/xen/arch/x86/include/asm/mem_access.h b/xen/arch/x86/include/asm/mem_access.h index 18091610ae..8957e1181c 100644 --- a/xen/arch/x86/include/asm/mem_access.h +++ b/xen/arch/x86/include/asm/mem_access.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/mem_access.h * @@ -8,19 +9,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef __ASM_X86_MEM_ACCESS_H__ diff --git a/xen/arch/x86/include/asm/mem_paging.h b/xen/arch/x86/include/asm/mem_paging.h index d3635e96cf..5ae86669fb 100644 --- a/xen/arch/x86/include/asm/mem_paging.h +++ b/xen/arch/x86/include/asm/mem_paging.h @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/mem_paging.h * * Memory paging support. * * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef __ASM_X86_MEM_PAGING_H__ diff --git a/xen/arch/x86/include/asm/mem_sharing.h b/xen/arch/x86/include/asm/mem_sharing.h index 2c00069bc9..040962f690 100644 --- a/xen/arch/x86/include/asm/mem_sharing.h +++ b/xen/arch/x86/include/asm/mem_sharing.h @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/mem_sharing.h * * Memory sharing support. * * Copyright (c) 2009 Citrix Systems, Inc. (Grzegorz Milos) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef __MEM_SHARING_H__ #define __MEM_SHARING_H__ diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index cd43d8621a..40545f5fa8 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/paging.h * @@ -8,19 +9,6 @@ * Parts of this code are Copyright (c) 2006-2007 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_ASM_X86_P2M_H diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 2647b95e67..403243bfbd 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/paging.h * @@ -6,19 +7,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_PAGING_H diff --git a/xen/arch/x86/include/asm/shstk.h b/xen/arch/x86/include/asm/shstk.h index fdc9cc65a3..9160fe9f0e 100644 --- a/xen/arch/x86/include/asm/shstk.h +++ b/xen/arch/x86/include/asm/shstk.h @@ -1,17 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2022 Citrix Systems Ltd. */ #ifndef XEN_ASM_SHSTK_H diff --git a/xen/arch/x86/include/asm/spec_ctrl.h b/xen/arch/x86/include/asm/spec_ctrl.h index f718f94088..011ab1db27 100644 --- a/xen/arch/x86/include/asm/spec_ctrl.h +++ b/xen/arch/x86/include/asm/spec_ctrl.h @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/spec_ctrl.h * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017-2018 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/spec_ctrl_asm.h b/xen/arch/x86/include/asm/spec_ctrl_asm.h index f23bb105c5..f48f9e75e8 100644 --- a/xen/arch/x86/include/asm/spec_ctrl_asm.h +++ b/xen/arch/x86/include/asm/spec_ctrl_asm.h @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * include/asm-x86/spec_ctrl.h * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - * * Copyright (c) 2017-2018 Citrix Systems Ltd. */ diff --git a/xen/arch/x86/include/asm/traps.h b/xen/arch/x86/include/asm/traps.h index b0dd2d2461..01ef362edc 100644 --- a/xen/arch/x86/include/asm/traps.h +++ b/xen/arch/x86/include/asm/traps.h @@ -1,19 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (c) 2007, 2008 Advanced Micro Devices, Inc. * Author: Christoph Egger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef ASM_TRAP_H diff --git a/xen/arch/x86/include/asm/xenoprof.h b/xen/arch/x86/include/asm/xenoprof.h index cf6af8c5df..dc6f822d32 100644 --- a/xen/arch/x86/include/asm/xenoprof.h +++ b/xen/arch/x86/include/asm/xenoprof.h @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * asm-x86/xenoprof.h * xenoprof x86 arch specific header file * * Copyright (c) 2006 Isaku Yamahata * VA Linux Systems Japan K.K. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef __ASM_X86_XENOPROF_H__ diff --git a/xen/arch/x86/mm/mm-locks.h b/xen/arch/x86/mm/mm-locks.h index c1523aeccf..5a3f96fbaa 100644 --- a/xen/arch/x86/mm/mm-locks.h +++ b/xen/arch/x86/mm/mm-locks.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/mm-locks.h * @@ -7,19 +8,6 @@ * Copyright (c) 2007 Advanced Micro Devices (Wei Huang) * Copyright (c) 2006-2007 XenSource Inc. * Copyright (c) 2006 Michael A Fetterman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _MM_LOCKS_H diff --git a/xen/arch/x86/mm/p2m.h b/xen/arch/x86/mm/p2m.h index cc0f6766e4..11e63b8fe4 100644 --- a/xen/arch/x86/mm/p2m.h +++ b/xen/arch/x86/mm/p2m.h @@ -1,18 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/p2m.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ struct p2m_domain *p2m_init_one(struct domain *d); diff --git a/xen/arch/x86/mm/shadow/multi.h b/xen/arch/x86/mm/shadow/multi.h index 222c31bd10..0e93859434 100644 --- a/xen/arch/x86/mm/shadow/multi.h +++ b/xen/arch/x86/mm/shadow/multi.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/multi.h * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ extern int diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index d9a127e15d..93a443ee59 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/private.h * @@ -5,19 +6,6 @@ * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_SHADOW_PRIVATE_H diff --git a/xen/arch/x86/mm/shadow/types.h b/xen/arch/x86/mm/shadow/types.h index e81a3c2c5c..d700d8d64c 100644 --- a/xen/arch/x86/mm/shadow/types.h +++ b/xen/arch/x86/mm/shadow/types.h @@ -1,22 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * arch/x86/mm/shadow/types.h * * Parts of this code are Copyright (c) 2006 by XenSource Inc. * Parts of this code are Copyright (c) 2006 by Michael A Fetterman * Parts based on earlier work by Michael A Fetterman, Ian Pratt et al. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef _XEN_SHADOW_TYPES_H diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index c713e425c0..6afbc877f1 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * x86_emulate.h * @@ -5,19 +6,6 @@ * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifndef __X86_EMULATE_H__ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520422.807956 (Exim 4.92) (envelope-from ) id 1pmm0J-0000eW-K0; Thu, 13 Apr 2023 01:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520422.807956; Thu, 13 Apr 2023 01:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0J-0000eN-FW; Thu, 13 Apr 2023 01:44:03 +0000 Received: by outflank-mailman (input) for mailman id 520422; Thu, 13 Apr 2023 01:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0I-0000eH-2e for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0I-0001gi-19 for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm0H-00027B-Uw for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ydAA7qC+EGZ/gzpnUTWOnybE5waTbsdoIQ3WR41PGFE=; b=5niBJjpq1acFSk++mI9DwdVuke +4aNuzVPGk7NIfKeGqOv8qIIic77ZLJlAqLJM+6iZEj/GvbFGUQA1b8klChQL4puHfVtNs4aR76jQ WObp6VYJMj8mex/v5Y4mDiIvJk8lOyx/6NW7mfMDtk38xNq2DRrmPQsTQM//7+GX604s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] tools: Drop gettext as a build dependency Message-Id: Date: Thu, 13 Apr 2023 01:44:01 +0000 commit 708b0d75e77a8305a756b55eefa0f226212f4d36 Author: Andrew Cooper AuthorDate: Fri Mar 26 11:25:07 2021 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 tools: Drop gettext as a build dependency It has not been a dependency since at least 4.13. Remove its mandatory check from ./configure. Annotate the dependency in the CI dockerfiles, and drop them from CirrusCI and TravisCI. Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit e21a6a4f966a7e91cb0bb014dbe15d15cc0502ad) --- .cirrus.yml | 2 +- .travis.yml | 1 - README | 1 - tools/configure | 49 ------------------------------------------------- tools/configure.ac | 2 -- 5 files changed, 1 insertion(+), 54 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index 0efff6fa98..fdb1c9c94d 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -4,7 +4,7 @@ freebsd_template: &FREEBSD_TEMPLATE APPEND_LIB: /usr/local/lib APPEND_INCLUDES: /usr/local/include - install_script: pkg install -y seabios gettext-tools gmake + install_script: pkg install -y seabios gmake pkgconf python libiconv bison perl5 yajl lzo2 pixman argp-standalone libxml2 glib git diff --git a/.travis.yml b/.travis.yml index 2362475f7a..f3cd15b79f 100644 --- a/.travis.yml +++ b/.travis.yml @@ -54,7 +54,6 @@ addons: - pkg-config - flex - bison - - gettext - acpica-tools - bin86 - bcc diff --git a/README b/README index de579080d7..efaa1451cb 100644 --- a/README +++ b/README @@ -63,7 +63,6 @@ provided by your OS distributor: * bridge-utils package (/sbin/brctl) * iproute package (/sbin/ip) * GNU bison and GNU flex - * GNU gettext * ACPI ASL compiler (iasl) In addition to the above there are a number of optional build diff --git a/tools/configure b/tools/configure index bb5acf9d43..5df30df9b3 100755 --- a/tools/configure +++ b/tools/configure @@ -689,7 +689,6 @@ INSTALL_PROGRAM SET_MAKE AWK IASL -XGETTEXT FLEX BISON PERL @@ -847,7 +846,6 @@ PYTHON PERL BISON FLEX -XGETTEXT AS86 LD86 BCC @@ -1597,7 +1595,6 @@ Some influential environment variables: PERL Path to Perl parser BISON Path to Bison parser generator FLEX Path to Flex lexical analyser generator - XGETTEXT Path to xgetttext tool AS86 Path to as86 tool LD86 Path to ld86 tool BCC Path to bcc tool @@ -4738,7 +4735,6 @@ LDFLAGS="$PREPEND_LDFLAGS $LDFLAGS $APPEND_LDFLAGS" - # Checks for programs. ac_ext=c ac_cpp='$CPP $CPPFLAGS' @@ -7846,51 +7842,6 @@ fi if ! $rump; then -# Extract the first word of "xgettext", so it can be a program name with args. -set dummy xgettext; ac_word=$2 -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -$as_echo_n "checking for $ac_word... " >&6; } -if ${ac_cv_path_XGETTEXT+:} false; then : - $as_echo_n "(cached) " >&6 -else - case $XGETTEXT in - [\\/]* | ?:[\\/]*) - ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then - ac_cv_path_XGETTEXT="$as_dir/$ac_word$ac_exec_ext" - $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done - done -IFS=$as_save_IFS - - test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT="no" - ;; -esac -fi -XGETTEXT=$ac_cv_path_XGETTEXT -if test -n "$XGETTEXT"; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: $XGETTEXT" >&5 -$as_echo "$XGETTEXT" >&6; } -else - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } -fi - - -if test x"${XGETTEXT}" = x"no" -then - as_fn_error $? "Unable to find xgettext, please install xgettext" "$LINENO" 5 -fi case "$host_cpu" in i[3456]86|x86_64|aarch64) # Extract the first word of "iasl", so it can be a program name with args. diff --git a/tools/configure.ac b/tools/configure.ac index 636e7077be..6414fcbb44 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -298,7 +298,6 @@ AC_ARG_VAR([PYTHON], [Path to the Python parser]) AC_ARG_VAR([PERL], [Path to Perl parser]) AC_ARG_VAR([BISON], [Path to Bison parser generator]) AC_ARG_VAR([FLEX], [Path to Flex lexical analyser generator]) -AC_ARG_VAR([XGETTEXT], [Path to xgetttext tool]) AC_ARG_VAR([AS86], [Path to as86 tool]) AC_ARG_VAR([LD86], [Path to ld86 tool]) AC_ARG_VAR([BCC], [Path to bcc tool]) @@ -381,7 +380,6 @@ AS_IF([test "$cross_compiling" != yes], [ if ! $rump; then -AX_PATH_PROG_OR_FAIL([XGETTEXT], [xgettext]) dnl as86, ld86, bcc and iasl are only required when the host system is x86*. dnl "host" here means the platform on which the hypervisor and tools is dnl going to run, not the platform on which we are building (known as -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520423.807960 (Exim 4.92) (envelope-from ) id 1pmm0S-0000gq-ME; Thu, 13 Apr 2023 01:44:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520423.807960; Thu, 13 Apr 2023 01:44:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0S-0000gi-JO; Thu, 13 Apr 2023 01:44:12 +0000 Received: by outflank-mailman (input) for mailman id 520423; Thu, 13 Apr 2023 01:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0S-0000ga-66 for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0S-0001gm-5C for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm0S-00027q-3l for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TFqhE9SUoA3XJrHuRnvYTSMNjTA/ryF6wdn3K+Eu/hc=; b=uSGoZpu13tOTnijfjM0KiYh+9g EXOptMBv2LaVaMlksg7aOSUYsyQWxVxmboWfYvbfX8fBd9kPy1Nycg94RHHlVGGGFuz6V/jnahVFP MTDyjAwYNYtuOAzE992WRelUvdtyxOznuuYXLPwFJgGBq5rWpTw8AWgjnjUUTyif1VaE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] CI: Drop TravisCI Message-Id: Date: Thu, 13 Apr 2023 01:44:12 +0000 commit e006948dd27b320602a718e2728678160c61593f Author: Andrew Cooper AuthorDate: Wed Apr 21 10:16:13 2021 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 CI: Drop TravisCI Travis-ci.org is shutting down shortly. The arm cross-compile testing has been broken for a long time now, and all testing has now been superseded by our Gitlab infrastructure. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Wei Liu (cherry picked from commit e0dc9b095e7c73dcf6dbfe5c87c33c4708da4d1f) CI: Drop more TravisCI remnants This was missed from previous attempts to remove Travis. Fixes: e0dc9b095e7c ("CI: Drop TravisCI") Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Stefano Stabellini Release-acked-by: Henry Wang (cherry picked from commit bad4832710c7261fad1abe2d0e8e2e1d259b3e8d) --- .travis.yml | 86 ---------------------------------------------------- MAINTAINERS | 1 - scripts/travis-build | 32 ------------------- 3 files changed, 119 deletions(-) diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index f3cd15b79f..0000000000 --- a/.travis.yml +++ /dev/null @@ -1,86 +0,0 @@ -language: c -dist: trusty -sudo: required -# don't test master, smoke and coverity branches -branches: - except: - - master - - smoke - - /^coverity-tested\/.*/ - - /^stable-.*/ -matrix: - include: - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc-5 - env: XEN_TARGET_ARCH=x86_64 debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=x86_64 debug=y - - compiler: gcc-5 - env: XEN_TARGET_ARCH=x86_64 debug=y - - compiler: clang - env: XEN_TARGET_ARCH=x86_64 clang=y debug=n - - compiler: clang - env: XEN_TARGET_ARCH=x86_64 clang=y debug=y - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm32 CROSS_COMPILE=arm-linux-gnueabihf- debug=y - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- XEN_CONFIG_EXPERT=y RANDCONFIG=y debug=n - - compiler: gcc - env: XEN_TARGET_ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- debug=y -addons: - apt: - sources: - - ubuntu-toolchain-r-test - packages: - - zlib1g-dev - - libncurses5-dev - - libssl-dev - - python-dev - - xorg-dev - - uuid-dev - - libyajl-dev - - libaio-dev - - libglib2.0-dev - - libpixman-1-dev - - pkg-config - - flex - - bison - - acpica-tools - - bin86 - - bcc - - libnl-3-dev - - ocaml-nox - - libfindlib-ocaml-dev - - transfig - - pandoc - - gcc-arm-linux-gnueabihf - - gcc-aarch64-linux-gnu - - gcc-5 - - g++-5 - - seabios - - checkpolicy - - ghostscript -# we must set CXX manually instead of using 'language: cpp' due to -# travis-ci/travis-ci#3871 -before_script: - - export CXX=${CC/cc/++} - - export CXX=${CXX/clang/clang++} -script: - - ./scripts/travis-build -after_script: - - cat xen/.config - - cat tools/config.log - - cat docs/config.log -notifications: - irc: - channels: - - secure: "mPIFllF6eW3F3talvccMy55Tfcid66IPkkXZYCxDKRF2DQrMyvmg4qt0xN6gGZsdfOBMNr+/YfO5PxusBCUkVdBGBzd3QhFoIDYZbJZgzVh3yNDQ+x4L7p1cZNrwJ2loMmSX6KxGKZxZX9NRStrTUkVyp0jGZB9xkwT8Rl6jXj7EQkgQ95K1Wqafx0ycLfyDQmzX9bzi/3KIBFKMGmK18AFMh+R30zK0FPUUsS4+VhepIkVqO5puU3OYePd34wRnWlt7hjU2Vj5vYmVXp3UOE+E8/Lf9IGVAhitDi+EC35b8zo2BHJ9z6xZARYPvfSqbXcXV20RycabI+e3ufZJ40eatssly5QjWH+HhKS42C4gV1psmQhkTCNCM62Ty5uf6R1hsZJQuiOZrc8ojdje8ey2MxJk4R+Xz+Igg1/kD6+WX9/Y6Y3iRuj5HL1xCYfpTbK4mC7ofw0SofW2aAGI68jHpCqJdQCDzMl6748PlDMM0eKe0MPKIEenYHcoBnOEC/jciXUDa6wduV75EEip7oq2i+m44MopcsEDTpdliH077GhKapF0ActjvBTLpyoTRSfkKm0NZol/dgwd3PGG/mY8clIoeXWRb4opk93ejPC967KmSNC68SlfwaJmFZS5T9vAgb6k7r6i9G3dmYtrLKzws8IV1CPWqLzk58+v4pRk=" diff --git a/MAINTAINERS b/MAINTAINERS index 91064c09f9..37aa60dd64 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -195,7 +195,6 @@ S: Supported F: .gitlab-ci.yml F: .travis.yml F: automation/ -F: scripts/travis-build CPU POOLS M: Juergen Gross diff --git a/scripts/travis-build b/scripts/travis-build deleted file mode 100755 index 84d74266a0..0000000000 --- a/scripts/travis-build +++ /dev/null @@ -1,32 +0,0 @@ -#!/bin/bash -ex - -$CC --version - -# random config or default config -if [[ "${RANDCONFIG}" == "y" ]]; then - make -C xen KCONFIG_ALLCONFIG=tools/kconfig/allrandom.config randconfig -else - make -C xen defconfig -fi - -# build up our configure options -cfgargs=() -cfgargs+=("--disable-stubdom") # more work needed into building this -cfgargs+=("--disable-rombios") -cfgargs+=("--enable-docs") -cfgargs+=("--with-system-seabios=/usr/share/seabios/bios.bin") - -# Qemu requires Python 3.5 or later -if ! type python3 || python3 -c "import sys; res = sys.version_info < (3, 5); exit(not(res))"; then - cfgargs+=("--with-system-qemu=/bin/false") -fi - -if [[ "${XEN_TARGET_ARCH}" == "x86_64" ]]; then - cfgargs+=("--enable-tools") -else - cfgargs+=("--disable-tools") # we don't have the cross depends installed -fi - -./configure "${cfgargs[@]}" - -make dist -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520424.807964 (Exim 4.92) (envelope-from ) id 1pmm0c-0000jI-Ol; Thu, 13 Apr 2023 01:44:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520424.807964; Thu, 13 Apr 2023 01:44:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0c-0000jA-Kp; Thu, 13 Apr 2023 01:44:22 +0000 Received: by outflank-mailman (input) for mailman id 520424; Thu, 13 Apr 2023 01:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0c-0000j2-AQ for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0c-0001gy-97 for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm0c-00028W-7u for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=iAaeMHNUqYJsLTW7w+eJWG+k3MYhomrJT1K+gwTWm18=; b=tjIrF/+fUHk7/2Ofxyjk792Amn r5ylHEGDgULtw1CT4ZKYetbL6crel7pXVj+z0ejFVTIrjKgkYJ9ntOBQU2ErwXbNozoPKjKSs2ICO zP7yTzS75ZZN2x6xXrsV4Lgi1uUXfbZtG7hC9ulDvgaVb5GI4JiUYLpDvb9Uw0qJOUmw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] build: add --full to version.sh to guess $(XEN_FULLVERSION) Message-Id: Date: Thu, 13 Apr 2023 01:44:22 +0000 commit b461db64b37f9a04ba5a726b0e474e870226f2ac Author: Anthony PERARD AuthorDate: Thu Sep 9 15:33:06 2021 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 build: add --full to version.sh to guess $(XEN_FULLVERSION) Running $(MAKE) like that in a $(shell ) while parsing the Makefile doesn't work reliably. In some case, make will complain with "jobserver unavailable: using -j1. Add '+' to parent make rule.". Also, it isn't possible to distinguish between the output produced by the target "xenversion" and `make`'s own output. Instead of running make, this patch "improve" `version.sh` to try to guess the output of `make xenversion`. In order to have version.sh works in more scenario, it will use XEN_EXTRAVERSION and XEN_VENDORVERSION from the environment when present. As for the cases were those two variables are overridden by a make command line arguments, we export them when invoking version.sh via a new $(XEN_FULLVERSION) macro. That should hopefully get us to having ./version.sh returning the same value that `make xenversion` would. This fix GitLab CI's build job "debian-unstable-gcc-arm64". Signed-off-by: Anthony PERARD Reviewed-by: Daniel P. Smith Reviewed-by: Ian Jackson (cherry picked from commit ab4a83023eda9f04ad864877c1956b087ec6fc4f) --- tools/Rules.mk | 5 +++++ tools/flask/policy/Makefile.common | 2 +- version.sh | 18 +++++++++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/tools/Rules.mk b/tools/Rules.mk index 444e5bacdd..051a5d3555 100644 --- a/tools/Rules.mk +++ b/tools/Rules.mk @@ -6,6 +6,11 @@ all: -include $(XEN_ROOT)/config/Tools.mk include $(XEN_ROOT)/Config.mk +XEN_FULLVERSION=$(shell env \ + XEN_EXTRAVERSION=$(XEN_EXTRAVERSION) \ + XEN_VENDORVERSION=$(XEN_VENDORVERSION) \ + $(SHELL) $(XEN_ROOT)/version.sh --full $(XEN_ROOT)/xen/Makefile) + export _INSTALL := $(INSTALL) INSTALL = $(XEN_ROOT)/tools/cross-install diff --git a/tools/flask/policy/Makefile.common b/tools/flask/policy/Makefile.common index bea5ba4b6a..e5ed58200e 100644 --- a/tools/flask/policy/Makefile.common +++ b/tools/flask/policy/Makefile.common @@ -35,7 +35,7 @@ OUTPUT_POLICY ?= $(BEST_POLICY_VER) # ######################################## -POLICY_FILENAME = $(FLASK_BUILD_DIR)/xenpolicy-$(shell $(MAKE) -C $(XEN_ROOT)/xen xenversion --no-print-directory) +POLICY_FILENAME = $(FLASK_BUILD_DIR)/xenpolicy-$(XEN_FULLVERSION) POLICY_LOADPATH = /boot # List of policy versions supported by the hypervisor diff --git a/version.sh b/version.sh index e894ee7e04..c6a5692c19 100755 --- a/version.sh +++ b/version.sh @@ -1,5 +1,21 @@ #!/bin/sh +opt_full=false +while [ $# -gt 1 ]; do + case "$1" in + --full) opt_full=true ;; + *) break ;; + esac + shift +done + MAJOR=`grep "export XEN_VERSION" $1 | sed 's/.*=//g' | tr -s " "` MINOR=`grep "export XEN_SUBVERSION" $1 | sed 's/.*=//g' | tr -s " "` -printf "%d.%d" $MAJOR $MINOR + +if $opt_full; then + extraversion=$(grep "export XEN_EXTRAVERSION" $1 | sed 's/^.* ?=\s\+//; s/\$([^)]*)//g; s/ //g') + : ${XEN_EXTRAVERSION:=${extraversion}${XEN_VENDORVERSION}} +else + unset XEN_EXTRAVERSION +fi +printf "%d.%d%s" $MAJOR $MINOR $XEN_EXTRAVERSION -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520425.807968 (Exim 4.92) (envelope-from ) id 1pmm0n-0000mN-PZ; Thu, 13 Apr 2023 01:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520425.807968; Thu, 13 Apr 2023 01:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0n-0000mF-MT; Thu, 13 Apr 2023 01:44:33 +0000 Received: by outflank-mailman (input) for mailman id 520425; Thu, 13 Apr 2023 01:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0m-0000m6-EP for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0m-0001hV-DV for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm0m-00028x-Bf for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8avRzf/MmzmPBuDxYMIHFzpYasgHTtgy3Ttub75CcxM=; b=g6Stk1U2I3huqyVPoa1/q3O1o6 hgstsVIE5rumbWzSnj/ycPZrVMutDBHtfMLbz93vMwRBXfIh8OnZhr5Wp2727JcR9iR7DgWXY8klg jcXAKqB4xDWn9di9HOOAuaBNE8ej362g5rD0Se5/0TObJOvLZjQmKYJQIR4EaZGTFnyY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] bump default SeaBIOS version to 1.16.0 Message-Id: Date: Thu, 13 Apr 2023 01:44:32 +0000 commit b11fc96b1e6e474da614b87b6ac97183273c6ebd Author: Jan Beulich AuthorDate: Fri May 6 14:46:52 2022 +0200 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 bump default SeaBIOS version to 1.16.0 Signed-off-by: Jan Beulich Acked-by: Julien Grall (cherry picked from commit 944e389daa133dd310d87c4eebacba9f6da76018) --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index 9696e1a151..381bdf17b1 100644 --- a/Config.mk +++ b/Config.mk @@ -247,7 +247,7 @@ OVMF_UPSTREAM_REVISION ?= a3741780fe3535e19e02efa869a7cac481891129 QEMU_UPSTREAM_REVISION ?= qemu-xen-4.15.4 MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.15.4 -SEABIOS_UPSTREAM_REVISION ?= rel-1.14.0 +SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520426.807971 (Exim 4.92) (envelope-from ) id 1pmm0x-0000of-QZ; Thu, 13 Apr 2023 01:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520426.807971; Thu, 13 Apr 2023 01:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0x-0000oW-O1; Thu, 13 Apr 2023 01:44:43 +0000 Received: by outflank-mailman (input) for mailman id 520426; Thu, 13 Apr 2023 01:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0w-0000oJ-IR for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm0w-0001he-Hd for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm0w-00029c-GB for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XYe9U41UlwQmKPqFmChcBpBR67pWX4VWL8IWoMATHAY=; b=kE/YP5Dqo9uvNQdL3wJDAL8iQD acey2VxCt7F5jC3IP/5uzX6d4b/s4Ia/WzYxm89l61i97PaFpRyVKq9SQrBlac/3HrbH2Ja8PxoJK gWUfODheil+LbwqEp4NG6QhGrsKngTHbo/B6fRZ7bUvDr9FjdKymxTGxGxR+xU8OyxQ0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] CI: Drop automation/configs/ Message-Id: Date: Thu, 13 Apr 2023 01:44:42 +0000 commit 8455998e32d07e103a44826ac7f721639a4ebc26 Author: Andrew Cooper AuthorDate: Thu Dec 29 15:39:13 2022 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 CI: Drop automation/configs/ Having 3 extra hypervisor builds on the end of a full build is deeply confusing to debug if one of them fails, because the .config file presented in the artefacts is not the one which caused a build failure. Also, the log tends to be truncated in the UI. PV-only is tested as part of PV-Shim in a full build anyway, so doesn't need repeating. HVM-only and neither appear frequently in randconfig, so drop all the logic here to simplify things. Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit 7b20009a812f26e74bdbde2ab96165376b3dad34) --- automation/configs/x86/hvm_only_config | 3 --- automation/configs/x86/no_hvm_pv_config | 3 --- automation/configs/x86/pv_only_config | 3 --- automation/scripts/build | 21 --------------------- 4 files changed, 30 deletions(-) diff --git a/automation/configs/x86/hvm_only_config b/automation/configs/x86/hvm_only_config deleted file mode 100644 index 9efbddd535..0000000000 --- a/automation/configs/x86/hvm_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_HVM=y -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/no_hvm_pv_config b/automation/configs/x86/no_hvm_pv_config deleted file mode 100644 index 0bf6a8e468..0000000000 --- a/automation/configs/x86/no_hvm_pv_config +++ /dev/null @@ -1,3 +0,0 @@ -# CONFIG_HVM is not set -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/pv_only_config b/automation/configs/x86/pv_only_config deleted file mode 100644 index e9d8b4a7c7..0000000000 --- a/automation/configs/x86/pv_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PV=y -# CONFIG_HVM is not set -# CONFIG_DEBUG is not set diff --git a/automation/scripts/build b/automation/scripts/build index 1b752edfe6..fd87b02036 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -62,24 +62,3 @@ if [[ "${XEN_TARGET_ARCH}" != "x86_32" ]]; then cp -r dist binaries/ fi fi - -if [[ "${hypervisor_only}" == "y" ]]; then - # If we are build testing a specific Kconfig exit now, there's no point in - # testing all the possible configs. - exit 0 -fi - -# Build all the configs we care about -case ${XEN_TARGET_ARCH} in - x86_64) arch=x86 ;; - *) exit 0 ;; -esac - -cfg_dir="automation/configs/${arch}" -for cfg in `ls ${cfg_dir}`; do - echo "Building $cfg" - make -j$(nproc) -C xen clean - rm -f xen/.config - make -C xen KBUILD_DEFCONFIG=../../../../${cfg_dir}/${cfg} XEN_CONFIG_EXPERT=y defconfig - make -j$(nproc) -C xen XEN_CONFIG_EXPERT=y -done -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:44:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520427.807974 (Exim 4.92) (envelope-from ) id 1pmm17-0000r3-S1; Thu, 13 Apr 2023 01:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520427.807974; Thu, 13 Apr 2023 01:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm17-0000qv-PS; Thu, 13 Apr 2023 01:44:53 +0000 Received: by outflank-mailman (input) for mailman id 520427; Thu, 13 Apr 2023 01:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm16-0000ql-MQ for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm16-0001jK-La for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm16-0002AN-KJ for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RGO3S5kS/nGAQbTfNspN06VKG7f8JdfgYcjq5y2ue4Y=; b=0mvuKQmrllW7L0ynI49Y6HuShZ JOrJ51t7QjIVT5ZBb7IMUXRc+ixdJOFD703ZzaQDAWFkuNix5wh79uGv21W5a/sbL2WfpOjJIekpn PMvyk7xL+LHXgzFoW6EtWT3J5HROLeK3Jzz8Ny+G5H2EFXxE8KqRFmQUoTb2Zci178m4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] automation: Remove CentOS 7.2 containers and builds Message-Id: Date: Thu, 13 Apr 2023 01:44:52 +0000 commit c1367de50a304dcb327890d5c69fd7d2f66f1beb Author: Anthony PERARD AuthorDate: Tue Feb 21 16:55:36 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 automation: Remove CentOS 7.2 containers and builds We already have a container which track the latest CentOS 7, no need for this one as well. Also, 7.2 have outdated root certificate which prevent connection to website which use Let's Encrypt. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit ba512629f76dfddb39ea9133ee51cdd9e392a927) --- automation/build/centos/7.2.dockerfile | 51 --------------------------------- automation/build/centos/CentOS-7.2.repo | 35 ---------------------- automation/gitlab-ci/build.yaml | 10 ------- 3 files changed, 96 deletions(-) diff --git a/automation/build/centos/7.2.dockerfile b/automation/build/centos/7.2.dockerfile deleted file mode 100644 index af672a0be1..0000000000 --- a/automation/build/centos/7.2.dockerfile +++ /dev/null @@ -1,51 +0,0 @@ -FROM centos:7.2.1511 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -# ensure we only get bits from the vault for -# the version we want -COPY CentOS-7.2.repo /etc/yum.repos.d/CentOS-Base.repo - -# install EPEL for dev86, xz-devel and possibly other packages -RUN yum -y install https://dl.fedoraproject.org/pub/epel/epel-release-latest-7.noarch.rpm && \ - yum clean all - -RUN mkdir /build -WORKDIR /build - -# work around https://github.com/moby/moby/issues/10180 -# and install Xen depends -RUN rpm --rebuilddb && \ - yum -y install \ - yum-plugin-ovl \ - gcc \ - gcc-c++ \ - ncurses-devel \ - zlib-devel \ - openssl-devel \ - python-devel \ - libuuid-devel \ - pkgconfig \ - gettext \ - flex \ - bison \ - libaio-devel \ - glib2-devel \ - yajl-devel \ - pixman-devel \ - glibc-devel \ - # glibc-devel.i686 for Xen < 4.15 - glibc-devel.i686 \ - make \ - binutils \ - git \ - wget \ - acpica-tools \ - python-markdown \ - patch \ - checkpolicy \ - dev86 \ - xz-devel \ - bzip2 \ - nasm \ - && yum clean all diff --git a/automation/build/centos/CentOS-7.2.repo b/automation/build/centos/CentOS-7.2.repo deleted file mode 100644 index 4da27faeb5..0000000000 --- a/automation/build/centos/CentOS-7.2.repo +++ /dev/null @@ -1,35 +0,0 @@ -# CentOS-Base.repo -# -# This is a replacement file that pins things to just use CentOS 7.2 -# from the CentOS Vault. -# - -[base] -name=CentOS-7.2.1511 - Base -baseurl=http://vault.centos.org/7.2.1511/os/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#released updates -[updates] -name=CentOS-7.2.1511 - Updates -baseurl=http://vault.centos.org/7.2.1511/updates/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that may be useful -[extras] -name=CentOS-7.2.1511 - Extras -baseurl=http://vault.centos.org/7.2.1511/extras/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that extend functionality of existing packages -[centosplus] -name=CentOS-7.2.1511 - Plus -baseurl=http://vault.centos.org/7.2.1511/centosplus/$basearch/ -gpgcheck=1 -gpgcheck=1 -enabled=0 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 6cca2122aa..35a6643c3d 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -156,16 +156,6 @@ archlinux-gcc-debug: variables: CONTAINER: archlinux:current -centos-7-2-gcc: - extends: .gcc-x86-64-build - variables: - CONTAINER: centos:7.2 - -centos-7-2-gcc-debug: - extends: .gcc-x86-64-build-debug - variables: - CONTAINER: centos:7.2 - centos-7-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:45:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520428.807980 (Exim 4.92) (envelope-from ) id 1pmm1H-0000tQ-Un; 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Thu, 13 Apr 2023 01:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jBH34D2R3ZpE9qavHH6aCMbYKA+3V0xmN4KrjgeyfBU=; b=Y7Es8dkGnY7lrJOdqzfyTrx0yX QkQiu5jARGik6giQN7nQ9j8ts8akuaYOSPPnolOloNarRoya30j3pXEpOKTGHFLpnfVTZxBeSmKZv Pw7i5oeYwfOKBNHkjgFESYJuSuip2lVvHMsQL/TRb7L39GaopNUdxN9czXg4gM2VhVd8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] automation: Remove non-debug x86_32 build jobs Message-Id: Date: Thu, 13 Apr 2023 01:45:02 +0000 commit 7fa798d8615df5e3451fda020d6e1ebc850819c2 Author: Anthony PERARD AuthorDate: Fri Feb 24 17:29:15 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 automation: Remove non-debug x86_32 build jobs In the interest of having less jobs, we remove the x86_32 build jobs that do release build. Debug build is very likely to be enough to find 32bit build issues. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit 7b66792ea7f77fb9e587e1e9c530a7c869eecba1) --- automation/gitlab-ci/build.yaml | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 35a6643c3d..44f8bc6725 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -236,21 +236,11 @@ debian-stretch-gcc-debug: variables: CONTAINER: debian:stretch -debian-stretch-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:stretch-i386 -debian-stretch-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: @@ -288,21 +278,11 @@ debian-unstable-gcc-debug-randconfig: CONTAINER: debian:unstable RANDCONFIG: y -debian-unstable-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:unstable-i386 -debian-unstable-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 01:45:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 01:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520429.807983 (Exim 4.92) (envelope-from ) id 1pmm1S-0000xy-0i; Thu, 13 Apr 2023 01:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520429.807983; Thu, 13 Apr 2023 01:45:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm1R-0000xq-UE; Thu, 13 Apr 2023 01:45:13 +0000 Received: by outflank-mailman (input) for mailman id 520429; Thu, 13 Apr 2023 01:45:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm1Q-0000x8-TP for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:45:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmm1Q-0001k1-Sc for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:45:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmm1Q-0002BW-Rb for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 01:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ia7Ol/RIOVAwRvteqla8DD+8vfLuPPMDLi5V9qGMEBE=; b=z3D/IF9rK8Wwx87TznGjKX8iVs TmieKQaVynd8klVUbZduMwWj8G325/kKPqSrIZuzmVhuMxI/Iou0MFdtnxif5gbmO7S42i2XIemYM utvGNtApjzuDfp+EhEgJ14G5wqsVC+bFQp5zd6s9vBW4mu996UK93Wp4igjq3SIMR3Fs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] CI: Remove llvm-8 from the Debian Stretch container Message-Id: Date: Thu, 13 Apr 2023 01:45:12 +0000 commit 7963cdbf91d8a8d2f8338171adab3807b20f658a Author: Andrew Cooper AuthorDate: Fri Mar 24 17:59:56 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:28 2023 +0100 CI: Remove llvm-8 from the Debian Stretch container For similar reasons to c/s a6b1e2b80fe20. While this container is still build-able for now, all the other problems with explicitly-versioned compilers remain. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini (cherry picked from commit 7a298375721636290a57f31bb0f7c2a5a38956a4) --- automation/build/debian/stretch-llvm-8.list | 3 --- automation/build/debian/stretch.dockerfile | 12 ------------ automation/gitlab-ci/build.yaml | 27 --------------------------- 3 files changed, 42 deletions(-) diff --git a/automation/build/debian/stretch-llvm-8.list b/automation/build/debian/stretch-llvm-8.list deleted file mode 100644 index 09fe843fb2..0000000000 --- a/automation/build/debian/stretch-llvm-8.list +++ /dev/null @@ -1,3 +0,0 @@ -# Strech LLVM 8 repos -deb http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main -deb-src http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main diff --git a/automation/build/debian/stretch.dockerfile b/automation/build/debian/stretch.dockerfile index e3bace1f87..09e8a522ea 100644 --- a/automation/build/debian/stretch.dockerfile +++ b/automation/build/debian/stretch.dockerfile @@ -50,15 +50,3 @@ RUN apt-get update && \ apt-get autoremove -y && \ apt-get clean && \ rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - -RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add - -COPY stretch-llvm-8.list /etc/apt/sources.list.d/ - -RUN apt-get update && \ - apt-get --quiet --yes install \ - clang-8 \ - lld-8 \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 44f8bc6725..321e167b57 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -26,13 +26,6 @@ CXX: clang++ clang: y -.clang-8-tmpl: - variables: &clang-8 - CC: clang-8 - CXX: clang++-8 - LD: ld.lld-8 - clang: y - .x86-64-build-tmpl: <<: *build variables: @@ -97,16 +90,6 @@ variables: <<: *clang -.clang-8-x86-64-build: - extends: .x86-64-build - variables: - <<: *clang-8 - -.clang-8-x86-64-build-debug: - extends: .x86-64-build-debug - variables: - <<: *clang-8 - .clang-x86-32-build: extends: .x86-32-build variables: @@ -216,16 +199,6 @@ debian-stretch-clang-debug: variables: CONTAINER: debian:stretch -debian-stretch-clang-8: - extends: .clang-8-x86-64-build - variables: - CONTAINER: debian:stretch - -debian-stretch-clang-8-debug: - extends: .clang-8-x86-64-build-debug - variables: - CONTAINER: debian:stretch - debian-stretch-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520453.808017 (Exim 4.92) (envelope-from ) id 1pmpZv-0000DO-AN; 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Thu, 13 Apr 2023 05:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NIiYelv83Y0Ap0E+7jnE8e81WlsZuVhMgswiROCKK8E=; b=h6gRi6ZhvPRipoj2nFgRMSmOIe 7N59BrpYhIxWH0x0P5Ucwcv6zKydHbWNq+qCElB/wwxe5Zr4JULiY77a0xJvt1DKGDmZ2+ak1c1FD qwhfRTsCAG19TeXbTiDrdMagd6Ete/VMYt3EvFqo4hahTYE8GioeVbN7pvFezkO/Asu0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] bump default SeaBIOS version to 1.16.0 Message-Id: Date: Thu, 13 Apr 2023 05:33:02 +0000 commit 2a4d327387601b60c9844a5b0cc44de28792ea52 Author: Jan Beulich AuthorDate: Fri May 6 14:46:52 2022 +0200 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 bump default SeaBIOS version to 1.16.0 Signed-off-by: Jan Beulich Acked-by: Julien Grall (cherry picked from commit 944e389daa133dd310d87c4eebacba9f6da76018) --- Config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Config.mk b/Config.mk index 1215c2725b..073715c28d 100644 --- a/Config.mk +++ b/Config.mk @@ -241,7 +241,7 @@ OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 QEMU_UPSTREAM_REVISION ?= qemu-xen-4.16.3 MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.16.3 -SEABIOS_UPSTREAM_REVISION ?= rel-1.14.0 +SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 ETHERBOOT_NICS ?= rtl8139 8086100e -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520454.808021 (Exim 4.92) (envelope-from ) id 1pmpa5-0000Fu-Bf; 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Thu, 13 Apr 2023 05:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FEoAG6rq53CPCy/vfdntqcrYJVYZned6qqi1TV7JdPc=; b=KHKVxdadZw/X2M8sXyDqsoP0gN MBeL5OvR0/yFHW1w7fBztCFSOA0qjKx+Yq1+lqsapdTs1VxC+RimQCZEpnh3DRJidcjeQ/fV8//7O vUpJnXCItcBrGN+aN42/j4U99AEKSQtx7cWrPK+Z6dtLQIY2JCquvAqVvJdPHdqEkPwQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] CI: Drop automation/configs/ Message-Id: Date: Thu, 13 Apr 2023 05:33:12 +0000 commit 657dc5f5f6269008fd7484ca7cca723e21455483 Author: Andrew Cooper AuthorDate: Thu Dec 29 15:39:13 2022 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 CI: Drop automation/configs/ Having 3 extra hypervisor builds on the end of a full build is deeply confusing to debug if one of them fails, because the .config file presented in the artefacts is not the one which caused a build failure. Also, the log tends to be truncated in the UI. PV-only is tested as part of PV-Shim in a full build anyway, so doesn't need repeating. HVM-only and neither appear frequently in randconfig, so drop all the logic here to simplify things. Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit 7b20009a812f26e74bdbde2ab96165376b3dad34) --- automation/configs/x86/hvm_only_config | 3 --- automation/configs/x86/no_hvm_pv_config | 3 --- automation/configs/x86/pv_only_config | 3 --- automation/scripts/build | 21 --------------------- 4 files changed, 30 deletions(-) diff --git a/automation/configs/x86/hvm_only_config b/automation/configs/x86/hvm_only_config deleted file mode 100644 index 9efbddd535..0000000000 --- a/automation/configs/x86/hvm_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_HVM=y -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/no_hvm_pv_config b/automation/configs/x86/no_hvm_pv_config deleted file mode 100644 index 0bf6a8e468..0000000000 --- a/automation/configs/x86/no_hvm_pv_config +++ /dev/null @@ -1,3 +0,0 @@ -# CONFIG_HVM is not set -# CONFIG_PV is not set -# CONFIG_DEBUG is not set diff --git a/automation/configs/x86/pv_only_config b/automation/configs/x86/pv_only_config deleted file mode 100644 index e9d8b4a7c7..0000000000 --- a/automation/configs/x86/pv_only_config +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PV=y -# CONFIG_HVM is not set -# CONFIG_DEBUG is not set diff --git a/automation/scripts/build b/automation/scripts/build index 281f8b1fcc..2c807fa397 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -73,24 +73,3 @@ if [[ "${XEN_TARGET_ARCH}" != "x86_32" ]]; then cp -r dist binaries/ fi fi - -if [[ "${hypervisor_only}" == "y" ]]; then - # If we are build testing a specific Kconfig exit now, there's no point in - # testing all the possible configs. - exit 0 -fi - -# Build all the configs we care about -case ${XEN_TARGET_ARCH} in - x86_64) arch=x86 ;; - *) exit 0 ;; -esac - -cfg_dir="automation/configs/${arch}" -for cfg in `ls ${cfg_dir}`; do - echo "Building $cfg" - make -j$(nproc) -C xen clean - rm -f xen/.config - make -C xen KBUILD_DEFCONFIG=../../../../${cfg_dir}/${cfg} XEN_CONFIG_EXPERT=y defconfig - make -j$(nproc) -C xen XEN_CONFIG_EXPERT=y -done -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520455.808025 (Exim 4.92) (envelope-from ) id 1pmpaF-0000JN-DU; Thu, 13 Apr 2023 05:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520455.808025; Thu, 13 Apr 2023 05:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaF-0000JF-AY; Thu, 13 Apr 2023 05:33:23 +0000 Received: by outflank-mailman (input) for mailman id 520455; Thu, 13 Apr 2023 05:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaE-0000Is-Fe for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaE-0008Dk-En for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmpaE-0003Iz-Dw for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=G+WlIlrBAO1w3R33gRB526ZbFjZukdceE11TMdRtdNQ=; b=isiAMtIpPJUGEfN7mYbMtxb7JK KmNlLVgxUhsFhzhGRorF6P3wX/wcXKDXEs++yzx6PIANI+HTK7tIF9vRzV0RAGUwSJwE4Ieh/IouV NdMQLPKhxXojOzNi+9nRli/56OXifSfH25I+z82nRGmuaWmdOQDC/tIYlpJOatsf8OSM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] automation: Switch arm32 cross builds to run on arm64 Message-Id: Date: Thu, 13 Apr 2023 05:33:22 +0000 commit 37800cf8ab7806e506b96a13cad0fb395d86663a Author: Michal Orzel AuthorDate: Tue Feb 14 16:38:38 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 automation: Switch arm32 cross builds to run on arm64 Due to the limited x86 CI resources slowing down the whole pipeline, switch the arm32 cross builds to be executed on arm64 which is much more capable. For that, rename the existing debian container dockerfile from unstable-arm32-gcc to unstable-arm64v8-arm32-gcc and use arm64v8/debian:unstable as an image. Note, that we cannot use the same container name as we have to keep the backwards compatibility. Take the opportunity to remove extra empty line at the end of a file. Modify the tag of .arm32-cross-build-tmpl to arm64 and update the build jobs accordingly. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini (cherry picked from commit a35fccc8df93de7154dba87db6e7bcf391e9d51c) --- .../build/debian/unstable-arm32-gcc.dockerfile | 24 ---------------------- .../debian/unstable-arm64v8-arm32-gcc.dockerfile | 23 +++++++++++++++++++++ automation/gitlab-ci/build.yaml | 10 ++++----- 3 files changed, 28 insertions(+), 29 deletions(-) diff --git a/automation/build/debian/unstable-arm32-gcc.dockerfile b/automation/build/debian/unstable-arm32-gcc.dockerfile deleted file mode 100644 index b41a57f197..0000000000 --- a/automation/build/debian/unstable-arm32-gcc.dockerfile +++ /dev/null @@ -1,24 +0,0 @@ -FROM debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root -ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - flex \ - bison \ - git \ - gcc-arm-linux-gnueabihf \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - diff --git a/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile b/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile new file mode 100644 index 0000000000..11860425a6 --- /dev/null +++ b/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile @@ -0,0 +1,23 @@ +FROM arm64v8/debian:unstable +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root +ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + flex \ + bison \ + git \ + gcc-arm-linux-gnueabihf \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 06a75a8c5a..f66fbca8a7 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -123,7 +123,7 @@ variables: XEN_TARGET_ARCH: arm32 tags: - - x86_64 + - arm64 .arm32-cross-build: extends: .arm32-cross-build-tmpl @@ -497,23 +497,23 @@ alpine-3.12-clang-debug: debian-unstable-gcc-arm32: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc debian-unstable-gcc-arm32-debug: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc debian-unstable-gcc-arm32-randconfig: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc RANDCONFIG: y debian-unstable-gcc-arm32-debug-randconfig: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm32-gcc + CONTAINER: debian:unstable-arm64v8-arm32-gcc RANDCONFIG: y # Arm builds -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520456.808028 (Exim 4.92) (envelope-from ) id 1pmpaP-0000LU-Em; Thu, 13 Apr 2023 05:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520456.808028; Thu, 13 Apr 2023 05:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaP-0000LM-CD; Thu, 13 Apr 2023 05:33:33 +0000 Received: by outflank-mailman (input) for mailman id 520456; Thu, 13 Apr 2023 05:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaO-0000LE-Ja for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaO-0008EC-If for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmpaO-0003JT-HT for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NJd7uxqKolF1gEwEUV/r9tBZ4bvWMn195GX9TH+kux8=; b=thY5IDPjfBvlIJnaDCRwl0Wk6/ Gqxq9JF2ubpp1uX4bo2R+LCiRiiD8AWn7dy5upN9tBbzHx5bbLhOGQD2y2rdNuKDKHwwvqLfWbkY3 yV2d7QVOj1q2GTTFlqOc3vYD0kAbVoMlFwIMurZuUvw52Z3SF3QWgZrqAWnfOIGt+K0g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] automation: Remove CentOS 7.2 containers and builds Message-Id: Date: Thu, 13 Apr 2023 05:33:32 +0000 commit a4d901580b2ab3133bca13159b790914c217b0e2 Author: Anthony PERARD AuthorDate: Tue Feb 21 16:55:36 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 automation: Remove CentOS 7.2 containers and builds We already have a container which track the latest CentOS 7, no need for this one as well. Also, 7.2 have outdated root certificate which prevent connection to website which use Let's Encrypt. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit ba512629f76dfddb39ea9133ee51cdd9e392a927) --- automation/build/centos/7.2.dockerfile | 52 --------------------------------- automation/build/centos/CentOS-7.2.repo | 35 ---------------------- automation/gitlab-ci/build.yaml | 10 ------- 3 files changed, 97 deletions(-) diff --git a/automation/build/centos/7.2.dockerfile b/automation/build/centos/7.2.dockerfile deleted file mode 100644 index 4baa097e31..0000000000 --- a/automation/build/centos/7.2.dockerfile +++ /dev/null @@ -1,52 +0,0 @@ -FROM centos:7.2.1511 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -# ensure we only get bits from the vault for -# the version we want -COPY CentOS-7.2.repo /etc/yum.repos.d/CentOS-Base.repo - -# install EPEL for dev86, xz-devel and possibly other packages -RUN yum -y install https://dl.fedoraproject.org/pub/epel/epel-release-latest-7.noarch.rpm && \ - yum clean all - -RUN mkdir /build -WORKDIR /build - -# work around https://github.com/moby/moby/issues/10180 -# and install Xen depends -RUN rpm --rebuilddb && \ - yum -y install \ - yum-plugin-ovl \ - gcc \ - gcc-c++ \ - ncurses-devel \ - zlib-devel \ - openssl-devel \ - python-devel \ - libuuid-devel \ - pkgconfig \ - # gettext for Xen < 4.13 - gettext \ - flex \ - bison \ - libaio-devel \ - glib2-devel \ - yajl-devel \ - pixman-devel \ - glibc-devel \ - # glibc-devel.i686 for Xen < 4.15 - glibc-devel.i686 \ - make \ - binutils \ - git \ - wget \ - acpica-tools \ - python-markdown \ - patch \ - checkpolicy \ - dev86 \ - xz-devel \ - bzip2 \ - nasm \ - && yum clean all diff --git a/automation/build/centos/CentOS-7.2.repo b/automation/build/centos/CentOS-7.2.repo deleted file mode 100644 index 4da27faeb5..0000000000 --- a/automation/build/centos/CentOS-7.2.repo +++ /dev/null @@ -1,35 +0,0 @@ -# CentOS-Base.repo -# -# This is a replacement file that pins things to just use CentOS 7.2 -# from the CentOS Vault. -# - -[base] -name=CentOS-7.2.1511 - Base -baseurl=http://vault.centos.org/7.2.1511/os/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#released updates -[updates] -name=CentOS-7.2.1511 - Updates -baseurl=http://vault.centos.org/7.2.1511/updates/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that may be useful -[extras] -name=CentOS-7.2.1511 - Extras -baseurl=http://vault.centos.org/7.2.1511/extras/$basearch/ -gpgcheck=1 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - -#additional packages that extend functionality of existing packages -[centosplus] -name=CentOS-7.2.1511 - Plus -baseurl=http://vault.centos.org/7.2.1511/centosplus/$basearch/ -gpgcheck=1 -gpgcheck=1 -enabled=0 -gpgkey=file:///etc/pki/rpm-gpg/RPM-GPG-KEY-CentOS-7 - diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f66fbca8a7..bc1a732069 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -184,16 +184,6 @@ archlinux-gcc-debug: variables: CONTAINER: archlinux:current -centos-7-2-gcc: - extends: .gcc-x86-64-build - variables: - CONTAINER: centos:7.2 - -centos-7-2-gcc-debug: - extends: .gcc-x86-64-build-debug - variables: - CONTAINER: centos:7.2 - centos-7-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520457.808033 (Exim 4.92) (envelope-from ) id 1pmpaZ-0000Nn-H3; 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Thu, 13 Apr 2023 05:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=a3wLEKHSkrABNItHcU2TPmuM3ri5alVIXx7Bhhu3Y7k=; b=Huj/eyQ3cKxoFgwGDvWePGdSM6 7/zBOB1ih+sRG0+BAPAdCfT+k9FeyS/arliwi6vwQ9q6MyeIGQVAEYse7hKrZtWihkJC34YUi32P+ NGSrNaoriDdSC9995Fc2eDOWCJ5knVHG71V/5zXejsilqdWd+iyLCphsChaGl20OHN04=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] automation: Remove non-debug x86_32 build jobs Message-Id: Date: Thu, 13 Apr 2023 05:33:42 +0000 commit 27974fde92850419e385ad0355997c54d78046f2 Author: Anthony PERARD AuthorDate: Fri Feb 24 17:29:15 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 automation: Remove non-debug x86_32 build jobs In the interest of having less jobs, we remove the x86_32 build jobs that do release build. Debug build is very likely to be enough to find 32bit build issues. Signed-off-by: Anthony PERARD Acked-by: Andrew Cooper (cherry picked from commit 7b66792ea7f77fb9e587e1e9c530a7c869eecba1) --- automation/gitlab-ci/build.yaml | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index bc1a732069..4b51ad9e34 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -264,21 +264,11 @@ debian-stretch-gcc-debug: variables: CONTAINER: debian:stretch -debian-stretch-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:stretch-i386 -debian-stretch-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:stretch-i386 - debian-stretch-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: @@ -316,21 +306,11 @@ debian-unstable-gcc-debug-randconfig: CONTAINER: debian:unstable RANDCONFIG: y -debian-unstable-32-clang: - extends: .clang-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-clang-debug: extends: .clang-x86-32-build-debug variables: CONTAINER: debian:unstable-i386 -debian-unstable-32-gcc: - extends: .gcc-x86-32-build - variables: - CONTAINER: debian:unstable-i386 - debian-unstable-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Apr 13 05:33:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 13 Apr 2023 05:33:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.520458.808037 (Exim 4.92) (envelope-from ) id 1pmpaj-0000RF-KF; Thu, 13 Apr 2023 05:33:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 520458.808037; Thu, 13 Apr 2023 05:33:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpaj-0000R8-HV; Thu, 13 Apr 2023 05:33:53 +0000 Received: by outflank-mailman (input) for mailman id 520458; Thu, 13 Apr 2023 05:33:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpai-0000Qz-RW for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pmpai-0008Ec-Qb for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pmpai-0003KJ-Oo for xen-changelog@lists.xenproject.org; Thu, 13 Apr 2023 05:33:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RzqZrhAOkARDI/8nPivXs32zKONAHYVVwlM695NcsYc=; b=VrcNpTJzHxYSDeE7knEwsNGGdJ Zvh3rBuA0Ca5XQ8NUB55ZqiTZWm/S8fnlw3k5TKZZ0TbkD0lx7SJdXDJx3rFk2A5EbNNyIhMRddDa mQxvsztDpvz6gz3f6DSHIzvvGU4WYR3oE4UsXriCRo9rr+C2LZ9nPvyhoT0BcmhWvZVE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] CI: Remove llvm-8 from the Debian Stretch container Message-Id: Date: Thu, 13 Apr 2023 05:33:52 +0000 commit 31627a059c2e186f4ad12d171d964b09abe8a4a9 Author: Andrew Cooper AuthorDate: Fri Mar 24 17:59:56 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 12 09:00:19 2023 +0100 CI: Remove llvm-8 from the Debian Stretch container For similar reasons to c/s a6b1e2b80fe20. While this container is still build-able for now, all the other problems with explicitly-versioned compilers remain. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini (cherry picked from commit 7a298375721636290a57f31bb0f7c2a5a38956a4) --- automation/build/debian/stretch-llvm-8.list | 3 --- automation/build/debian/stretch.dockerfile | 12 ------------ automation/gitlab-ci/build.yaml | 27 --------------------------- 3 files changed, 42 deletions(-) diff --git a/automation/build/debian/stretch-llvm-8.list b/automation/build/debian/stretch-llvm-8.list deleted file mode 100644 index 09fe843fb2..0000000000 --- a/automation/build/debian/stretch-llvm-8.list +++ /dev/null @@ -1,3 +0,0 @@ -# Strech LLVM 8 repos -deb http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main -deb-src http://apt.llvm.org/stretch/ llvm-toolchain-stretch-8 main diff --git a/automation/build/debian/stretch.dockerfile b/automation/build/debian/stretch.dockerfile index da6aa874dd..9861acbcc3 100644 --- a/automation/build/debian/stretch.dockerfile +++ b/automation/build/debian/stretch.dockerfile @@ -53,15 +53,3 @@ RUN apt-get update && \ apt-get autoremove -y && \ apt-get clean && \ rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* - -RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add - -COPY stretch-llvm-8.list /etc/apt/sources.list.d/ - -RUN apt-get update && \ - apt-get --quiet --yes install \ - clang-8 \ - lld-8 \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 4b51ad9e34..fd8034b429 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -27,13 +27,6 @@ CXX: clang++ clang: y -.clang-8-tmpl: - variables: &clang-8 - CC: clang-8 - CXX: clang++-8 - LD: ld.lld-8 - clang: y - .x86-64-build-tmpl: <<: *build variables: @@ -98,16 +91,6 @@ variables: <<: *clang -.clang-8-x86-64-build: - extends: .x86-64-build - variables: - <<: *clang-8 - -.clang-8-x86-64-build-debug: - extends: .x86-64-build-debug - variables: - <<: *clang-8 - .clang-x86-32-build: extends: .x86-32-build variables: @@ -244,16 +227,6 @@ debian-stretch-clang-debug: variables: CONTAINER: debian:stretch -debian-stretch-clang-8: - extends: .clang-8-x86-64-build - variables: - CONTAINER: debian:stretch - -debian-stretch-clang-8-debug: - extends: .clang-8-x86-64-build-debug - variables: - CONTAINER: debian:stretch - debian-stretch-gcc: extends: .gcc-x86-64-build variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Apr 14 05:33:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 14 Apr 2023 05:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.521025.809267 (Exim 4.92) (envelope-from ) id 1pnC3S-0004mG-RM; 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Fri, 14 Apr 2023 05:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=shO8O/dqASj1GVbaOX36s6TcpHKB2J3ZtKcs6UcAcQ4=; b=cjHu+3bXpp2tM8Eq/0Wa83XKWm coA1DO5Yi2Hz1V2cLWQmiQ0r7ZMicBI5290gmqNQsehP3LNmZlAVk3+RxhV2vtDaSwq6XtdL4t362 KU8nhynRwZVbu+Nmzg94vBaNKxPqTzvgdx2REI1P5WcZD95bEOXv2z9IVjFJGOI9zay0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CI: Update FreeBSD to 13.2 Message-Id: Date: Fri, 14 Apr 2023 05:33:02 +0000 commit f872a624cbf92de9944483eea7674ef80ced1380 Author: Andrew Cooper AuthorDate: Wed Apr 12 18:43:27 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Apr 13 02:21:46 2023 +0100 CI: Update FreeBSD to 13.2 Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini --- .cirrus.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.cirrus.yml b/.cirrus.yml index b133afb740..9bb6cce4ea 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -23,7 +23,7 @@ task: task: name: 'FreeBSD 13' freebsd_instance: - image_family: freebsd-13-1 + image_family: freebsd-13-2 << : *FREEBSD_TEMPLATE task: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522280.811516 (Exim 4.92) (envelope-from ) id 1poT4C-0002Wj-C4; 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Mon, 17 Apr 2023 17:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pHjKauMyLe8ddqBqMLOnHEWvDPE9j6eXIemCY7HY0FE=; b=Cjp+hnqrwWkgBHNrxor9WKea4g Ca2UHu8FY5pWSO+ljmCrZPhZ9lffeT2Bno6GkbgoYkny5giBgWLY3+j27oWdbAEWPm7xC9VP53DcV tXuGWgT3Aje6iQGF4i6I0LBkidbssTQqAgJ3Zid9SyiCvrzqdJi4ZrkenLYZu6PvjqeI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: switch ADL hw tests to debug build Message-Id: Date: Mon, 17 Apr 2023 17:55:02 +0000 commit 8363b1f62e561cfb73073b4b094516fcbbd7020e Author: Marek Marczykowski-Górecki AuthorDate: Thu Apr 13 14:23:40 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Apr 13 14:44:41 2023 +0100 automation: switch ADL hw tests to debug build This should give a lot more useful information in case of a failure, and also enable some asserts for extra checks. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Andrew Cooper --- automation/gitlab-ci/test.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 0916b367ea..d68c584269 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -131,21 +131,21 @@ xilinx-smoke-dom0less-arm64-gcc: - *arm64-test-needs - alpine-3.12-gcc-arm64 -adl-smoke-x86-64-gcc: +adl-smoke-x86-64-gcc-debug: extends: .adl-x86-64 script: - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc + - alpine-3.12-gcc-debug -adl-suspend-x86-64-gcc: +adl-suspend-x86-64-gcc-debug: extends: .adl-x86-64 script: - ./automation/scripts/qubes-x86-64.sh s3 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc + - alpine-3.12-gcc-debug qemu-smoke-dom0-arm64-gcc: extends: .qemu-arm64 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522281.811519 (Exim 4.92) (envelope-from ) id 1poT4M-0002aF-CN; Mon, 17 Apr 2023 17:55:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522281.811519; Mon, 17 Apr 2023 17:55:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4M-0002a7-9e; Mon, 17 Apr 2023 17:55:14 +0000 Received: by outflank-mailman (input) for mailman id 522281; Mon, 17 Apr 2023 17:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4K-0002YK-HB for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4K-00034K-Fw for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT4K-00077y-Ek for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ymU0iW8PvkmzARat6zgG8qHDAfiTyhFnsbENl8jjvPI=; b=wMlrIElyjR43f3e2g/cdHyq2fx F716NGHDpCmm+VP3dGGpM6pobn07hC9fX+R26gnXPJOqcybfW9fbbFP3u6VspmXBslBUoRducgBh/ qSbFCp+foYuAE72AUUGk+Xc+qiXq+rU7gwP6QAw7siDEJSraobXjk+fFhjZDyRvykfSU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/hvm: Disallow disabling paging in 64bit mode Message-Id: Date: Mon, 17 Apr 2023 17:55:12 +0000 commit 18c128ba66e6308744850aca96dbffd18f91c29b Author: Andrew Cooper AuthorDate: Thu Jan 26 14:57:45 2023 +0000 Commit: Andrew Cooper CommitDate: Fri Apr 14 18:18:20 2023 +0100 x86/hvm: Disallow disabling paging in 64bit mode The Long Mode consistency checks exist to "ensure that the processor does not enter an undefined mode or state that results in unpredictable behavior". APM Vol2 Table 14-5 "Long-Mode Consistency Checks" lists them, but there is no row preventing the OS from trying to exit Long mode while in 64bit mode. This could leave the CPU in Protected Mode with an %rip above the 4G boundary. Experimentally, AMD CPUs really do permit this state transition. An OS which tries it hits an instant SHUTDOWN, even in cases where the truncation I expect to be going on behind the scenes ought to result in sane continued execution. Furthermore, right from the very outset, the APM Vol2 14.7 "Leaving Long Mode" section instructs peoples to switch to a compatibility mode segment first before clearing CR0.PG, which does clear out the upper bits in %rip. This is further backed up by Vol2 Figure 1-6 "Operating Modes of the AMD64 Architecture". Either way, this appears to have been a genuine oversight in the AMD64 spec. Intel, on the other hand, rejects this state transition with #GP. Between revision 71 (Nov 2019) and 72 (May 2020) of SDM Vol3, a footnote to 4.1.2 "Paging-Mode Enable" was altered from If CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP); software should clear CR4.PCIDE before attempting to disable paging. to If the logical processor is in 64-bit mode or if CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP). Software should transition to compatibility mode and clear CR4.PCIDE before attempting to disable paging. which acknowledges this corner case, but there doesn't appear to be any other discussion even in the relevant Long Mode sections. So it appears that Intel spotted and addressed the corner case in IA-32e mode, but were 15 years late to document it. Xen was written to the AMD spec, and misses the check. Follow the Intel behaviour, because it is more sensible and avoids hitting a VMEntry failure. Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné --- xen/arch/x86/hvm/hvm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 1454c1732d..d7d31b5393 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2340,6 +2340,21 @@ int hvm_set_cr0(unsigned long value, bool may_defer) } else if ( !(value & X86_CR0_PG) && (old_value & X86_CR0_PG) ) { + struct segment_register cs; + + hvm_get_segment_register(v, x86_seg_cs, &cs); + + /* + * Intel documents a #GP fault in this case, and VMEntry checks reject + * it as a valid state. AMD permits the state transition, and hits + * SHUTDOWN immediately thereafter. Follow the Intel behaviour. + */ + if ( (v->arch.hvm.guest_efer & EFER_LME) && cs.l ) + { + HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempt to clear CR0.PG in 64bit mode"); + return X86EMUL_EXCEPTION; + } + if ( hvm_pcid_enabled(v) ) { HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to clear CR0.PG " -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522282.811523 (Exim 4.92) (envelope-from ) id 1poT4W-0002d8-Dl; Mon, 17 Apr 2023 17:55:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522282.811523; Mon, 17 Apr 2023 17:55:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4W-0002d1-B7; Mon, 17 Apr 2023 17:55:24 +0000 Received: by outflank-mailman (input) for mailman id 522282; Mon, 17 Apr 2023 17:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4U-0002ci-TF for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4U-00034W-KA for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT4U-00078V-Ie for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6ihc+iacq7FBMlJG/lxEgKH2WWBWI590whc7MOZPAys=; b=Dcd3aAgYtFHLJeTSjB9/GytAo2 EnqULtsbyanT9lqU/mJGGuP/9cA9OsE0VH3/ppUxeGxDj3+8a++M7H6LUGZ6r5s1xbYOdIvYOXrTZ ChEV8k87L2KwKTeyuUKm7ym3LM+6eRzL0ZrE8FKP4qoxVOo4iZgDgHSb1n96cbCoL6S0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Reduce redundant clear root pages when teardown p2m Message-Id: Date: Mon, 17 Apr 2023 17:55:22 +0000 commit 603956258ceb30bbb621e1acdff1efcfd136212a Author: Henry Wang AuthorDate: Tue Mar 28 15:13:31 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 15:41:08 2023 +0100 xen/arm: Reduce redundant clear root pages when teardown p2m Currently, p2m for a domain will be teardown from two paths: (1) The normal path when a domain is destroyed. (2) The arch_domain_destroy() in the failure path of domain creation. When tearing down p2m from (1), the part to clear and clean the root is only needed to do once rather than for every call of p2m_teardown(). If the p2m teardown is from (2), the clear and clean of the root is unnecessary because the domain is not scheduled. Therefore, this patch introduces a helper `p2m_clear_root_pages()` to do the clear and clean of the root, and move this logic outside of p2m_teardown(). With this movement, the `page_list_empty(&p2m->pages)` check can be dropped. Signed-off-by: Henry Wang Reviewed-by: Michal Orzel Acked-by: Julien Grall --- xen/arch/arm/domain.c | 8 ++++++++ xen/arch/arm/include/asm/p2m.h | 1 + xen/arch/arm/p2m.c | 40 ++++++++++++++++++++-------------------- 3 files changed, 29 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 99577adb6c..b8a4a60570 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -959,6 +959,7 @@ enum { PROG_xen, PROG_page, PROG_mapping, + PROG_p2m_root, PROG_p2m, PROG_p2m_pool, PROG_done, @@ -1021,6 +1022,13 @@ int domain_relinquish_resources(struct domain *d) if ( ret ) return ret; + PROGRESS(p2m_root): + /* + * We are about to free the intermediate page-tables, so clear the + * root to prevent any walk to use them. + */ + p2m_clear_root_pages(&d->arch.p2m); + PROGRESS(p2m): ret = p2m_teardown(d, true); if ( ret ) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 91df922e1c..bf5183e53a 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -281,6 +281,7 @@ int p2m_set_entry(struct p2m_domain *p2m, bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn); +void p2m_clear_root_pages(struct p2m_domain *p2m); void p2m_invalidate_root(struct p2m_domain *p2m); /* diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 948f199d84..f1ccd7efbd 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -1314,6 +1314,26 @@ static void p2m_invalidate_table(struct p2m_domain *p2m, mfn_t mfn) p2m->need_flush = true; } +/* + * The domain will not be scheduled anymore, so in theory we should + * not need to flush the TLBs. Do it for safety purpose. + * Note that all the devices have already been de-assigned. So we don't + * need to flush the IOMMU TLB here. + */ +void p2m_clear_root_pages(struct p2m_domain *p2m) +{ + unsigned int i; + + p2m_write_lock(p2m); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_and_clean_page(p2m->root + i); + + p2m_force_tlb_flush_sync(p2m); + + p2m_write_unlock(p2m); +} + /* * Invalidate all entries in the root page-tables. This is * useful to get fault on entry and do an action. @@ -1698,30 +1718,10 @@ int p2m_teardown(struct domain *d, bool allow_preemption) struct p2m_domain *p2m = p2m_get_hostp2m(d); unsigned long count = 0; struct page_info *pg; - unsigned int i; int rc = 0; - if ( page_list_empty(&p2m->pages) ) - return 0; - p2m_write_lock(p2m); - /* - * We are about to free the intermediate page-tables, so clear the - * root to prevent any walk to use them. - */ - for ( i = 0; i < P2M_ROOT_PAGES; i++ ) - clear_and_clean_page(p2m->root + i); - - /* - * The domain will not be scheduled anymore, so in theory we should - * not need to flush the TLBs. Do it for safety purpose. - * - * Note that all the devices have already been de-assigned. So we don't - * need to flush the IOMMU TLB here. - */ - p2m_force_tlb_flush_sync(p2m); - while ( (pg = page_list_remove_head(&p2m->pages)) ) { p2m_free_page(p2m->domain, pg); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522283.811527 (Exim 4.92) (envelope-from ) id 1poT4f-0002fr-FV; Mon, 17 Apr 2023 17:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522283.811527; Mon, 17 Apr 2023 17:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4f-0002fj-Cj; Mon, 17 Apr 2023 17:55:33 +0000 Received: by outflank-mailman (input) for mailman id 522283; Mon, 17 Apr 2023 17:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4e-0002fc-OJ for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4e-00034g-NT for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT4e-000791-Mg for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=WD3t/a9dYPIQmkLQC0qUY43Gaa+0NdlmfhjMVOOJYLk=; b=MDFPsleDp1ftLbI5gCCVyAvLty PwVTYK88vWqrQbVVhv9vOpwV641pNWlk978YrCR5cuerAjQKJzqi18Kx0goG5LI0FNCLi7NSK1EqX hO1CMgc2E3lhU80QRzbhfcucOCaC/D/FihAgBBtw2izR5zv0JW9Fje1lS5T0WBRH9ejk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Rename vgic_cpu_base and vgic_dist_base for new vGIC Message-Id: Date: Mon, 17 Apr 2023 17:55:32 +0000 commit 5ee30222c626fd3224f0b6d59e9856ba77bb89d4 Author: Henry Wang AuthorDate: Tue Mar 28 15:13:32 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 15:41:08 2023 +0100 xen/arm: Rename vgic_cpu_base and vgic_dist_base for new vGIC In the follow-up patch from this series, the GICv2 CPU interface mapping will be deferred until the first access in the stage-2 data abort trap handling code. Since the data abort trap handling code is common for the current and the new vGIC implementation, it is necessary to unify the variable names in struct vgic_dist for these two implementations. Therefore, this commit renames the vgic_cpu_base and vgic_dist_base for new vGIC to cbase and dbase. So we can use the same code in the data abort trap handling code for both vGIC implementations. Signed-off-by: Henry Wang Acked-by: Julien Grall --- xen/arch/arm/include/asm/new_vgic.h | 8 ++++---- xen/arch/arm/vgic/vgic-init.c | 4 ++-- xen/arch/arm/vgic/vgic-v2.c | 17 ++++++++--------- 3 files changed, 14 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/include/asm/new_vgic.h b/xen/arch/arm/include/asm/new_vgic.h index b7fa9ab11a..18ed3f754a 100644 --- a/xen/arch/arm/include/asm/new_vgic.h +++ b/xen/arch/arm/include/asm/new_vgic.h @@ -115,11 +115,11 @@ struct vgic_dist { unsigned int nr_spis; /* base addresses in guest physical address space: */ - paddr_t vgic_dist_base; /* distributor */ + paddr_t dbase; /* distributor */ union { /* either a GICv2 CPU interface */ - paddr_t vgic_cpu_base; + paddr_t cbase; /* or a number of GICv3 redistributor regions */ struct { @@ -188,12 +188,12 @@ struct vgic_cpu { static inline paddr_t vgic_cpu_base(const struct vgic_dist *vgic) { - return vgic->vgic_cpu_base; + return vgic->cbase; } static inline paddr_t vgic_dist_base(const struct vgic_dist *vgic) { - return vgic->vgic_dist_base; + return vgic->dbase; } #endif /* __ASM_ARM_NEW_VGIC_H */ diff --git a/xen/arch/arm/vgic/vgic-init.c b/xen/arch/arm/vgic/vgic-init.c index 62ae553699..ea739d081e 100644 --- a/xen/arch/arm/vgic/vgic-init.c +++ b/xen/arch/arm/vgic/vgic-init.c @@ -112,8 +112,8 @@ int domain_vgic_register(struct domain *d, int *mmio_count) BUG(); } - d->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF; - d->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF; + d->arch.vgic.dbase = VGIC_ADDR_UNDEF; + d->arch.vgic.cbase = VGIC_ADDR_UNDEF; d->arch.vgic.vgic_redist_base = VGIC_ADDR_UNDEF; return 0; diff --git a/xen/arch/arm/vgic/vgic-v2.c b/xen/arch/arm/vgic/vgic-v2.c index c90e88fddb..bd51ef95c8 100644 --- a/xen/arch/arm/vgic/vgic-v2.c +++ b/xen/arch/arm/vgic/vgic-v2.c @@ -272,7 +272,7 @@ int vgic_v2_map_resources(struct domain *d) */ if ( is_hardware_domain(d) ) { - d->arch.vgic.vgic_dist_base = gic_v2_hw_data.dbase; + d->arch.vgic.dbase = gic_v2_hw_data.dbase; /* * For the hardware domain, we always map the whole HW CPU * interface region in order to match the device tree (the "reg" @@ -280,13 +280,13 @@ int vgic_v2_map_resources(struct domain *d) * Note that we assume the size of the CPU interface is always * aligned to PAGE_SIZE. */ - d->arch.vgic.vgic_cpu_base = gic_v2_hw_data.cbase; + d->arch.vgic.cbase = gic_v2_hw_data.cbase; csize = gic_v2_hw_data.csize; vbase = gic_v2_hw_data.vbase; } else if ( is_domain_direct_mapped(d) ) { - d->arch.vgic.vgic_dist_base = gic_v2_hw_data.dbase; + d->arch.vgic.dbase = gic_v2_hw_data.dbase; /* * For all the direct-mapped domain other than the hardware domain, * we only map a 8kB CPU interface but we make sure it is at a location @@ -296,13 +296,13 @@ int vgic_v2_map_resources(struct domain *d) * address when the GIC is aliased to get a 8kB contiguous * region. */ - d->arch.vgic.vgic_cpu_base = gic_v2_hw_data.cbase; + d->arch.vgic.cbase = gic_v2_hw_data.cbase; csize = GUEST_GICC_SIZE; vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; } else { - d->arch.vgic.vgic_dist_base = GUEST_GICD_BASE; + d->arch.vgic.dbase = GUEST_GICD_BASE; /* * The CPU interface exposed to the guest is always 8kB. We may * need to add an offset to the virtual CPU interface base @@ -310,14 +310,13 @@ int vgic_v2_map_resources(struct domain *d) * region. */ BUILD_BUG_ON(GUEST_GICC_SIZE != SZ_8K); - d->arch.vgic.vgic_cpu_base = GUEST_GICC_BASE; + d->arch.vgic.cbase = GUEST_GICC_BASE; csize = GUEST_GICC_SIZE; vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; } - ret = vgic_register_dist_iodev(d, gaddr_to_gfn(dist->vgic_dist_base), - VGIC_V2); + ret = vgic_register_dist_iodev(d, gaddr_to_gfn(dist->dbase), VGIC_V2); if ( ret ) { gdprintk(XENLOG_ERR, "Unable to register VGIC MMIO regions\n"); @@ -328,7 +327,7 @@ int vgic_v2_map_resources(struct domain *d) * Map the gic virtual cpu interface in the gic cpu interface * region of the guest. */ - ret = map_mmio_regions(d, gaddr_to_gfn(d->arch.vgic.vgic_cpu_base), + ret = map_mmio_regions(d, gaddr_to_gfn(d->arch.vgic.cbase), csize / PAGE_SIZE, maddr_to_mfn(vbase)); if ( ret ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522284.811531 (Exim 4.92) (envelope-from ) id 1poT4p-0002iN-Hg; Mon, 17 Apr 2023 17:55:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522284.811531; Mon, 17 Apr 2023 17:55:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4p-0002iF-Ej; Mon, 17 Apr 2023 17:55:43 +0000 Received: by outflank-mailman (input) for mailman id 522284; Mon, 17 Apr 2023 17:55:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4o-0002i8-S6 for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4o-00034p-RC for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT4o-00079S-Q7 for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=elHVmQZ7rymdhEDR6hraoRdPukoRse2NpINaaVi0BGA=; b=c9aIIrGfVUV18x4F58IZRfpxuO bz8kNvCWRAnWP05jPLh7oFVOTQv+sEUlQojidVFQV9TdxKiOAKt0hrfUyAec2U48MmleGcMhiWSt8 vgJOVlvqU6Q+rlDh3K9jPDgiaHqzpEfR5IH7rIR4+EnhnlceWAaqCXtNJuIj8KjMJ8iY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Defer GICv2 CPU interface mapping until the first access Message-Id: Date: Mon, 17 Apr 2023 17:55:42 +0000 commit 4dbcb0653621f2362e04e43be66197a03de24432 Author: Henry Wang AuthorDate: Tue Mar 28 15:13:33 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 15:41:08 2023 +0100 xen/arm: Defer GICv2 CPU interface mapping until the first access Currently, the mapping of the GICv2 CPU interface is created in arch_domain_create(). This causes some troubles in populating and freeing of the domain P2M pages pool. For example, a default 16 P2M pages are required in p2m_init() to cope with the P2M mapping of 8KB GICv2 CPU interface area, and these 16 P2M pages would cause the complexity of P2M destroy in the failure path of arch_domain_create(). As per discussion in [1], similarly as the MMIO access for ACPI, this patch defers the GICv2 CPU interface mapping until the first MMIO access. This is achieved by moving the GICv2 CPU interface mapping code from vgic_v2_domain_init()/vgic_v2_map_resources() to the stage-2 data abort trap handling code. The original CPU interface size and virtual CPU interface base address is now saved in `struct vgic_dist` instead of the local variable of vgic_v2_domain_init()/vgic_v2_map_resources(). Take the opportunity to unify the way of data access using the existing pointer to struct vgic_dist in vgic_v2_map_resources() for new GICv2. Since gicv2_map_hwdom_extra_mappings() happens after domain_create(), so there is no need to map the extra mappings on-demand, and therefore keep the hwdom extra mappings as untouched. [1] https://lore.kernel.org/xen-devel/e6643bfc-5bdf-f685-1b68-b28d341071c1@xen.org/ Signed-off-by: Henry Wang Reviewed-by: Julien Grall --- xen/arch/arm/include/asm/new_vgic.h | 2 ++ xen/arch/arm/include/asm/vgic.h | 2 ++ xen/arch/arm/traps.c | 19 ++++++++++++++++--- xen/arch/arm/vgic-v2.c | 25 +++++++----------------- xen/arch/arm/vgic/vgic-v2.c | 38 +++++++++++++------------------------ 5 files changed, 40 insertions(+), 46 deletions(-) diff --git a/xen/arch/arm/include/asm/new_vgic.h b/xen/arch/arm/include/asm/new_vgic.h index 18ed3f754a..1e76213893 100644 --- a/xen/arch/arm/include/asm/new_vgic.h +++ b/xen/arch/arm/include/asm/new_vgic.h @@ -127,6 +127,8 @@ struct vgic_dist { paddr_t vgic_redist_free_offset; }; }; + paddr_t csize; /* CPU interface size */ + paddr_t vbase; /* virtual CPU interface base address */ /* distributor enabled */ bool enabled; diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h index 3d44868039..328fd46d1b 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -153,6 +153,8 @@ struct vgic_dist { /* Base address for guest GIC */ paddr_t dbase; /* Distributor base address */ paddr_t cbase; /* CPU interface base address */ + paddr_t csize; /* CPU interface size */ + paddr_t vbase; /* Virtual CPU interface base address */ #ifdef CONFIG_GICV3 /* GIC V3 addressing */ /* List of contiguous occupied by the redistributors */ diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 061c92acbd..d40c331a4e 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1787,9 +1787,12 @@ static inline bool hpfar_is_valid(bool s1ptw, uint8_t fsc) } /* - * When using ACPI, most of the MMIO regions will be mapped on-demand - * in stage-2 page tables for the hardware domain because Xen is not - * able to know from the EFI memory map the MMIO regions. + * Try to map the MMIO regions for some special cases: + * 1. When using ACPI, most of the MMIO regions will be mapped on-demand + * in stage-2 page tables for the hardware domain because Xen is not + * able to know from the EFI memory map the MMIO regions. + * 2. For guests using GICv2, the GICv2 CPU interface mapping is created + * on the first access of the MMIO region. */ static bool try_map_mmio(gfn_t gfn) { @@ -1798,6 +1801,16 @@ static bool try_map_mmio(gfn_t gfn) /* For the hardware domain, all MMIOs are mapped with GFN == MFN */ mfn_t mfn = _mfn(gfn_x(gfn)); + /* + * Map the GICv2 virtual CPU interface in the GIC CPU interface + * region of the guest on the first access of the MMIO region. + */ + if ( d->arch.vgic.version == GIC_V2 && + gfn_to_gaddr(gfn) >= d->arch.vgic.cbase && + (gfn_to_gaddr(gfn) - d->arch.vgic.cbase) < d->arch.vgic.csize ) + return !map_mmio_regions(d, gfn, d->arch.vgic.csize / PAGE_SIZE, + maddr_to_mfn(d->arch.vgic.vbase)); + /* * Device-Tree should already have everything mapped when building * the hardware domain. diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 0026cb4360..0b083c33e6 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -644,10 +644,6 @@ static int vgic_v2_vcpu_init(struct vcpu *v) static int vgic_v2_domain_init(struct domain *d) { - int ret; - paddr_t csize; - paddr_t vbase; - /* * The hardware domain and direct-mapped domain both get the hardware * address. @@ -667,8 +663,8 @@ static int vgic_v2_domain_init(struct domain *d) * aligned to PAGE_SIZE. */ d->arch.vgic.cbase = vgic_v2_hw.cbase; - csize = vgic_v2_hw.csize; - vbase = vgic_v2_hw.vbase; + d->arch.vgic.csize = vgic_v2_hw.csize; + d->arch.vgic.vbase = vgic_v2_hw.vbase; } else if ( is_domain_direct_mapped(d) ) { @@ -683,8 +679,8 @@ static int vgic_v2_domain_init(struct domain *d) */ d->arch.vgic.dbase = vgic_v2_hw.dbase; d->arch.vgic.cbase = vgic_v2_hw.cbase; - csize = GUEST_GICC_SIZE; - vbase = vgic_v2_hw.vbase + vgic_v2_hw.aliased_offset; + d->arch.vgic.csize = GUEST_GICC_SIZE; + d->arch.vgic.vbase = vgic_v2_hw.vbase + vgic_v2_hw.aliased_offset; } else { @@ -697,18 +693,11 @@ static int vgic_v2_domain_init(struct domain *d) */ BUILD_BUG_ON(GUEST_GICC_SIZE != SZ_8K); d->arch.vgic.cbase = GUEST_GICC_BASE; - csize = GUEST_GICC_SIZE; - vbase = vgic_v2_hw.vbase + vgic_v2_hw.aliased_offset; + d->arch.vgic.csize = GUEST_GICC_SIZE; + d->arch.vgic.vbase = vgic_v2_hw.vbase + vgic_v2_hw.aliased_offset; } - /* - * Map the gic virtual cpu interface in the gic cpu interface - * region of the guest. - */ - ret = map_mmio_regions(d, gaddr_to_gfn(d->arch.vgic.cbase), - csize / PAGE_SIZE, maddr_to_mfn(vbase)); - if ( ret ) - return ret; + /* Mapping of the virtual CPU interface is deferred until first access */ register_mmio_handler(d, &vgic_v2_distr_mmio_handler, d->arch.vgic.dbase, PAGE_SIZE, NULL); diff --git a/xen/arch/arm/vgic/vgic-v2.c b/xen/arch/arm/vgic/vgic-v2.c index bd51ef95c8..6a558089c5 100644 --- a/xen/arch/arm/vgic/vgic-v2.c +++ b/xen/arch/arm/vgic/vgic-v2.c @@ -258,8 +258,6 @@ void vgic_v2_enable(struct vcpu *vcpu) int vgic_v2_map_resources(struct domain *d) { struct vgic_dist *dist = &d->arch.vgic; - paddr_t csize; - paddr_t vbase; int ret; /* @@ -272,7 +270,7 @@ int vgic_v2_map_resources(struct domain *d) */ if ( is_hardware_domain(d) ) { - d->arch.vgic.dbase = gic_v2_hw_data.dbase; + dist->dbase = gic_v2_hw_data.dbase; /* * For the hardware domain, we always map the whole HW CPU * interface region in order to match the device tree (the "reg" @@ -280,13 +278,13 @@ int vgic_v2_map_resources(struct domain *d) * Note that we assume the size of the CPU interface is always * aligned to PAGE_SIZE. */ - d->arch.vgic.cbase = gic_v2_hw_data.cbase; - csize = gic_v2_hw_data.csize; - vbase = gic_v2_hw_data.vbase; + dist->cbase = gic_v2_hw_data.cbase; + dist->csize = gic_v2_hw_data.csize; + dist->vbase = gic_v2_hw_data.vbase; } else if ( is_domain_direct_mapped(d) ) { - d->arch.vgic.dbase = gic_v2_hw_data.dbase; + dist->dbase = gic_v2_hw_data.dbase; /* * For all the direct-mapped domain other than the hardware domain, * we only map a 8kB CPU interface but we make sure it is at a location @@ -296,13 +294,13 @@ int vgic_v2_map_resources(struct domain *d) * address when the GIC is aliased to get a 8kB contiguous * region. */ - d->arch.vgic.cbase = gic_v2_hw_data.cbase; - csize = GUEST_GICC_SIZE; - vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; + dist->cbase = gic_v2_hw_data.cbase; + dist->csize = GUEST_GICC_SIZE; + dist->vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; } else { - d->arch.vgic.dbase = GUEST_GICD_BASE; + dist->dbase = GUEST_GICD_BASE; /* * The CPU interface exposed to the guest is always 8kB. We may * need to add an offset to the virtual CPU interface base @@ -310,9 +308,9 @@ int vgic_v2_map_resources(struct domain *d) * region. */ BUILD_BUG_ON(GUEST_GICC_SIZE != SZ_8K); - d->arch.vgic.cbase = GUEST_GICC_BASE; - csize = GUEST_GICC_SIZE; - vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; + dist->cbase = GUEST_GICC_BASE; + dist->csize = GUEST_GICC_SIZE; + dist->vbase = gic_v2_hw_data.vbase + gic_v2_hw_data.aliased_offset; } @@ -323,17 +321,7 @@ int vgic_v2_map_resources(struct domain *d) return ret; } - /* - * Map the gic virtual cpu interface in the gic cpu interface - * region of the guest. - */ - ret = map_mmio_regions(d, gaddr_to_gfn(d->arch.vgic.cbase), - csize / PAGE_SIZE, maddr_to_mfn(vbase)); - if ( ret ) - { - gdprintk(XENLOG_ERR, "Unable to remap VGIC CPU to VCPU\n"); - return ret; - } + /* Mapping of the virtual CPU interface is deferred until first access */ dist->ready = true; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:55:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:55:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522285.811535 (Exim 4.92) (envelope-from ) id 1poT4z-0002lX-KL; Mon, 17 Apr 2023 17:55:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522285.811535; Mon, 17 Apr 2023 17:55:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4z-0002lP-Hn; Mon, 17 Apr 2023 17:55:53 +0000 Received: by outflank-mailman (input) for mailman id 522285; Mon, 17 Apr 2023 17:55:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4y-0002lD-Va for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT4y-00035K-Uu for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT4y-0007AE-Ty for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:55:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QJMUJcD820Nje6unrk3lAMlZ3TArO0WG7rFd0RLgJ1w=; b=vMhoXEMFypycRSW/Anw3q3ytV7 NoaVjHobFxOtTTA8EEb/bKe7YB8Hu8L2Ar17RnCvclrDqKhiIirqhgmcz/uE1RKifYbICZX4rySI9 zm8B72YRiv9ioh6ZsLyeMIT7hz/PCLvX1diKXHrjY7yAMpZkmRn4JwwUyA6qzAb041iU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Clean-up in p2m_init() and p2m_final_teardown() Message-Id: Date: Mon, 17 Apr 2023 17:55:52 +0000 commit 9c962e07fbf3d7e2f8f92d8834a60fe7d5600637 Author: Henry Wang AuthorDate: Tue Mar 28 15:13:34 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 15:41:08 2023 +0100 xen/arm: Clean-up in p2m_init() and p2m_final_teardown() With the change in previous patch, the initial 16 pages in the P2M pool is not necessary anymore. Drop them for code simplification. Also the call to p2m_teardown() from arch_domain_destroy() is not necessary anymore since the movement of the P2M allocation out of arch_domain_create(). Drop the code and the above in-code comment mentioning it. Take the opportunity to fix a typo in the original in-code comment. With above clean-up, the second parameter of p2m_teardown() is also not needed anymore. Drop this parameter and the logic related to this parameter. Signed-off-by: Henry Wang Reviewed-by: Michal Orzel --- xen/arch/arm/domain.c | 2 +- xen/arch/arm/include/asm/p2m.h | 14 +++++--------- xen/arch/arm/p2m.c | 24 +++--------------------- 3 files changed, 9 insertions(+), 31 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index b8a4a60570..d8ef6501ff 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -1030,7 +1030,7 @@ int domain_relinquish_resources(struct domain *d) p2m_clear_root_pages(&d->arch.p2m); PROGRESS(p2m): - ret = p2m_teardown(d, true); + ret = p2m_teardown(d); if ( ret ) return ret; diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index bf5183e53a..f67e9ddc72 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -194,18 +194,14 @@ int p2m_init(struct domain *d); /* * The P2M resources are freed in two parts: - * - p2m_teardown() will be called preemptively when relinquish the - * resources, in which case it will free large resources (e.g. intermediate - * page-tables) that requires preemption. + * - p2m_teardown() will be called when relinquish the resources. It + * will free large resources (e.g. intermediate page-tables) that + * requires preemption. * - p2m_final_teardown() will be called when domain struct is been - * freed. This *cannot* be preempted and therefore one small + * freed. This *cannot* be preempted and therefore only small * resources should be freed here. - * Note that p2m_final_teardown() will also call p2m_teardown(), to properly - * free the P2M when failures happen in the domain creation with P2M pages - * already in use. In this case p2m_teardown() is called non-preemptively and - * p2m_teardown() will always return 0. */ -int p2m_teardown(struct domain *d, bool allow_preemption); +int p2m_teardown(struct domain *d); void p2m_final_teardown(struct domain *d); /* diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index f1ccd7efbd..418997843d 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -1713,7 +1713,7 @@ static void p2m_free_vmid(struct domain *d) spin_unlock(&vmid_alloc_lock); } -int p2m_teardown(struct domain *d, bool allow_preemption) +int p2m_teardown(struct domain *d) { struct p2m_domain *p2m = p2m_get_hostp2m(d); unsigned long count = 0; @@ -1727,7 +1727,7 @@ int p2m_teardown(struct domain *d, bool allow_preemption) p2m_free_page(p2m->domain, pg); count++; /* Arbitrarily preempt every 512 iterations */ - if ( allow_preemption && !(count % 512) && hypercall_preempt_check() ) + if ( !(count % 512) && hypercall_preempt_check() ) { rc = -ERESTART; break; @@ -1750,13 +1750,9 @@ void p2m_final_teardown(struct domain *d) /* * No need to call relinquish_p2m_mapping() here because * p2m_final_teardown() is called either after domain_relinquish_resources() - * where relinquish_p2m_mapping() has been called, or from failure path of - * domain_create()/arch_domain_create() where mappings that require - * p2m_put_l3_page() should never be created. For the latter case, also see - * comment on top of the p2m_set_entry() for more info. + * where relinquish_p2m_mapping() has been called. */ - BUG_ON(p2m_teardown(d, false)); ASSERT(page_list_empty(&p2m->pages)); while ( p2m_teardown_allocation(d) == -ERESTART ) @@ -1827,20 +1823,6 @@ int p2m_init(struct domain *d) if ( rc ) return rc; - /* - * Hardware using GICv2 needs to create a P2M mapping of 8KB GICv2 area - * when the domain is created. Considering the worst case for page - * tables and keep a buffer, populate 16 pages to the P2M pages pool here. - * For GICv3, the above-mentioned P2M mapping is not necessary, but since - * the allocated 16 pages here would not be lost, hence populate these - * pages unconditionally. - */ - spin_lock(&d->arch.paging.lock); - rc = p2m_set_allocation(d, 16, NULL); - spin_unlock(&d->arch.paging.lock); - if ( rc ) - return rc; - return 0; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:56:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:56:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522286.811539 (Exim 4.92) (envelope-from ) id 1poT59-0002oo-MC; Mon, 17 Apr 2023 17:56:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522286.811539; Mon, 17 Apr 2023 17:56:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT59-0002og-JR; Mon, 17 Apr 2023 17:56:03 +0000 Received: by outflank-mailman (input) for mailman id 522286; Mon, 17 Apr 2023 17:56:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT59-0002oU-2u for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT59-00035e-2C for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT59-0007B8-1D for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XATlXjXrM7QXtK6wfdbwVabte+E/A5HVjngmH269tas=; b=LIQAqcUm6rHvV9Xb+fscieRDaV 3MadICc5eMfFFC7Tfb9eWzWbMWzZbJtjsgcfqLJIJMDQRrx6y0PEmhJFHVMc/Y79tJHvQ8GoNfxb0 AqCLzKGanILpfE31kfncqZ51pJ3kElLeSyrvs7aM/Kem9Acau1fhCrV6IXm/YtFhy0Bc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Add memory overlap check for bootinfo.reserved_mem Message-Id: Date: Mon, 17 Apr 2023 17:56:03 +0000 commit 6f7d56ccd39940a51282730e121e1c5c64fbf8c0 Author: Henry Wang AuthorDate: Wed Feb 1 10:15:11 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 17:19:06 2023 +0100 xen/arm: Add memory overlap check for bootinfo.reserved_mem As we are having more and more types of static region, and all of these static regions are defined in bootinfo.reserved_mem, it is necessary to add the overlap check of reserved memory regions in Xen, because such check will help user to identify the misconfiguration in the device tree at the early stage of boot time. Currently we have 3 types of static region, namely (1) static memory (2) static heap (3) static shared memory (1) and (2) are parsed by the function `device_tree_get_meminfo()` and (3) is parsed using its own logic. All of parsed information of these types will be stored in `struct meminfo`. Therefore, to unify the overlap checking logic for all of these types, this commit firstly introduces a helper `meminfo_overlap_check()` and a function `check_reserved_regions_overlap()` to check if an input physical address range is overlapping with the existing memory regions defined in bootinfo. After that, use `check_reserved_regions_overlap()` in `device_tree_get_meminfo()` to do the overlap check of (1) and (2) and replace the original overlap check of (3) with `check_reserved_regions_overlap()`. Signed-off-by: Henry Wang Reviewed-by: Stefano Stabellini --- xen/arch/arm/bootfdt.c | 13 ++++++------ xen/arch/arm/include/asm/setup.h | 2 ++ xen/arch/arm/setup.c | 45 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c index 0085c28d74..e2f6c7324b 100644 --- a/xen/arch/arm/bootfdt.c +++ b/xen/arch/arm/bootfdt.c @@ -88,6 +88,9 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, for ( i = 0; i < banks && mem->nr_banks < NR_MEM_BANKS; i++ ) { device_tree_get_reg(&cell, address_cells, size_cells, &start, &size); + if ( mem == &bootinfo.reserved_mem && + check_reserved_regions_overlap(start, size) ) + return -EINVAL; /* Some DT may describe empty bank, ignore them */ if ( !size ) continue; @@ -482,7 +485,9 @@ static int __init process_shm_node(const void *fdt, int node, return -EINVAL; } - if ( (end <= mem->bank[i].start) || (paddr >= bank_end) ) + if ( check_reserved_regions_overlap(paddr, size) ) + return -EINVAL; + else { if ( strcmp(shm_id, mem->bank[i].shm_id) != 0 ) continue; @@ -493,12 +498,6 @@ static int __init process_shm_node(const void *fdt, int node, return -EINVAL; } } - else - { - printk("fdt: shared memory region overlap with an existing entry %#"PRIpaddr" - %#"PRIpaddr"\n", - mem->bank[i].start, bank_end); - return -EINVAL; - } } } diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index a926f30a2b..f0592370ea 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -143,6 +143,8 @@ void fw_unreserved_regions(paddr_t s, paddr_t e, size_t boot_fdt_info(const void *fdt, paddr_t paddr); const char *boot_fdt_cmdline(const void *fdt); +bool check_reserved_regions_overlap(paddr_t region_start, paddr_t region_size); + struct bootmodule *add_boot_module(bootmodule_kind kind, paddr_t start, paddr_t size, bool domU); struct bootmodule *boot_module_find_by_kind(bootmodule_kind kind); diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 1f26f67b90..28c79a413f 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -261,6 +261,36 @@ static void __init dt_unreserved_regions(paddr_t s, paddr_t e, cb(s, e); } +/* + * TODO: '*_end' could be 0 if the bank/region is at the end of the physical + * address space. This is for now not handled as it requires more rework. + */ +static bool __init meminfo_overlap_check(struct meminfo *meminfo, + paddr_t region_start, + paddr_t region_size) +{ + paddr_t bank_start = INVALID_PADDR, bank_end = 0; + paddr_t region_end = region_start + region_size; + unsigned int i, bank_num = meminfo->nr_banks; + + for ( i = 0; i < bank_num; i++ ) + { + bank_start = meminfo->bank[i].start; + bank_end = bank_start + meminfo->bank[i].size; + + if ( region_end <= bank_start || region_start >= bank_end ) + continue; + else + { + printk("Region: [%#"PRIpaddr", %#"PRIpaddr") overlapping with bank[%u]: [%#"PRIpaddr", %#"PRIpaddr")\n", + region_start, region_end, i, bank_start, bank_end); + return true; + } + } + + return false; +} + void __init fw_unreserved_regions(paddr_t s, paddr_t e, void (*cb)(paddr_t, paddr_t), unsigned int first) @@ -271,7 +301,22 @@ void __init fw_unreserved_regions(paddr_t s, paddr_t e, cb(s, e); } +/* + * Given an input physical address range, check if this range is overlapping + * with the existing reserved memory regions defined in bootinfo. + * Return true if the input physical address range is overlapping with any + * existing reserved memory regions, otherwise false. + */ +bool __init check_reserved_regions_overlap(paddr_t region_start, + paddr_t region_size) +{ + /* Check if input region is overlapping with bootinfo.reserved_mem banks */ + if ( meminfo_overlap_check(&bootinfo.reserved_mem, + region_start, region_size) ) + return true; + return false; +} struct bootmodule __init *add_boot_module(bootmodule_kind kind, paddr_t start, paddr_t size, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:56:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:56:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522287.811543 (Exim 4.92) (envelope-from ) id 1poT5J-0002rY-Nq; Mon, 17 Apr 2023 17:56:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522287.811543; Mon, 17 Apr 2023 17:56:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5J-0002rO-Kx; Mon, 17 Apr 2023 17:56:13 +0000 Received: by outflank-mailman (input) for mailman id 522287; Mon, 17 Apr 2023 17:56:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5J-0002rG-6N for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5J-00035l-5Y for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT5J-0007Bs-4f for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=seTafbWveWXiRxbN9g8hX6YUWQNXYh86D5y9TXaBgNc=; b=wCvOwdo/2AnZqeLgmQ0hkIQw42 3qOTpl4+HPfoJEkpdVvgIm4gqwcWrZnQoiGISH4KQ9DsYBoVQRSjp67gevwiUhzggUkPj5MdmF5b8 0N2AGuOZARgix/daAQE0Tq28vlhItIszq73WqOC8Yn+VBkJtYc+yDO0+TN20rWF3cka8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Extend the memory overlap check to include bootmodules Message-Id: Date: Mon, 17 Apr 2023 17:56:13 +0000 commit 4f6a29158273642928db3f73604ac76d6da1d6af Author: Henry Wang AuthorDate: Wed Feb 1 10:15:12 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 17:19:06 2023 +0100 xen/arm: Extend the memory overlap check to include bootmodules Similarly as the static regions defined in bootinfo.reserved_mem, the bootmodule regions defined in bootinfo.modules should also not be overlapping with memory regions in either bootinfo.reserved_mem or bootinfo.modules. Therefore, this commit introduces a helper `bootmodules_overlap_check()` and uses this helper to extend the check in function `check_reserved_regions_overlap()` so that memory regions in bootinfo.modules are included. Use `check_reserved_regions_overlap()` in `add_boot_module()` to return early if any error occurs. Signed-off-by: Henry Wang Reviewed-by: Stefano Stabellini --- xen/arch/arm/setup.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 28c79a413f..1ea42a0386 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -291,6 +291,36 @@ static bool __init meminfo_overlap_check(struct meminfo *meminfo, return false; } +/* + * TODO: '*_end' could be 0 if the module/region is at the end of the physical + * address space. This is for now not handled as it requires more rework. + */ +static bool __init bootmodules_overlap_check(struct bootmodules *bootmodules, + paddr_t region_start, + paddr_t region_size) +{ + paddr_t mod_start = INVALID_PADDR, mod_end = 0; + paddr_t region_end = region_start + region_size; + unsigned int i, mod_num = bootmodules->nr_mods; + + for ( i = 0; i < mod_num; i++ ) + { + mod_start = bootmodules->module[i].start; + mod_end = mod_start + bootmodules->module[i].size; + + if ( region_end <= mod_start || region_start >= mod_end ) + continue; + else + { + printk("Region: [%#"PRIpaddr", %#"PRIpaddr") overlapping with mod[%u]: [%#"PRIpaddr", %#"PRIpaddr")\n", + region_start, region_end, i, mod_start, mod_end); + return true; + } + } + + return false; +} + void __init fw_unreserved_regions(paddr_t s, paddr_t e, void (*cb)(paddr_t, paddr_t), unsigned int first) @@ -315,6 +345,11 @@ bool __init check_reserved_regions_overlap(paddr_t region_start, region_start, region_size) ) return true; + /* Check if input region is overlapping with bootmodules */ + if ( bootmodules_overlap_check(&bootinfo.modules, + region_start, region_size) ) + return true; + return false; } @@ -332,6 +367,10 @@ struct bootmodule __init *add_boot_module(bootmodule_kind kind, boot_module_kind_as_string(kind), start, start + size); return NULL; } + + if ( check_reserved_regions_overlap(start, size) ) + return NULL; + for ( i = 0 ; i < mods->nr_mods ; i++ ) { mod = &mods->module[i]; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:56:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:56:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522288.811547 (Exim 4.92) (envelope-from ) id 1poT5T-0002uE-P2; Mon, 17 Apr 2023 17:56:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522288.811547; Mon, 17 Apr 2023 17:56:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5T-0002u6-MS; Mon, 17 Apr 2023 17:56:23 +0000 Received: by outflank-mailman (input) for mailman id 522288; Mon, 17 Apr 2023 17:56:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5T-0002ty-9y for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5T-00035w-99 for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poT5T-0007CQ-8K for xen-changelog@lists.xenproject.org; Mon, 17 Apr 2023 17:56:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zEmOL6AoTETjZMGwRclLLfbkhC2RaHm4uiweS10JeIc=; b=2rHItBoODdwUC6Uqu3vOl7T1Qo rnHzHB27kDAXff5XNDEv0qbpB4DyIJAQBTHwZMseUpGREljhLw2TbT4Tf9Snz+wSHUkkTR40Zsipj G0pklxIlsZ1k7Z2zgNOpoCVekkJo8C63GgMg6G1jQQJowCP2zWHN5A78eBMzeMQWNya8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Extend the memory overlap check to include EfiACPIReclaimMemory Message-Id: Date: Mon, 17 Apr 2023 17:56:23 +0000 commit 3e25767ea50a95b0bd08c5922e33e601228f7485 Author: Henry Wang AuthorDate: Wed Feb 1 10:15:13 2023 +0800 Commit: Julien Grall CommitDate: Sun Apr 16 17:19:06 2023 +0100 xen/arm: Extend the memory overlap check to include EfiACPIReclaimMemory Similarly as the static regions and boot modules, memory regions with EfiACPIReclaimMemory type (defined in bootinfo.acpi if CONFIG_ACPI is enabled) should also not be overlapping with memory regions in bootinfo.reserved_mem and bootinfo.modules. Therefore, this commit reuses the `meminfo_overlap_check()` to further extends the check in function `check_reserved_regions_overlap()` so that memory regions in bootinfo.acpi are included. If any error occurs in the extended `check_reserved_regions_overlap()`, the `meminfo_add_bank()` defined in `efi-boot.h` will return early. Signed-off-by: Henry Wang Reviewed-by: Stefano Stabellini --- xen/arch/arm/efi/efi-boot.h | 10 ++++++++-- xen/arch/arm/setup.c | 6 ++++++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h index 223db0c4da..bb64925d70 100644 --- a/xen/arch/arm/efi/efi-boot.h +++ b/xen/arch/arm/efi/efi-boot.h @@ -161,13 +161,19 @@ static bool __init meminfo_add_bank(struct meminfo *mem, EFI_MEMORY_DESCRIPTOR *desc) { struct membank *bank; + paddr_t start = desc->PhysicalStart; + paddr_t size = desc->NumberOfPages * EFI_PAGE_SIZE; if ( mem->nr_banks >= NR_MEM_BANKS ) return false; +#ifdef CONFIG_ACPI + if ( check_reserved_regions_overlap(start, size) ) + return false; +#endif bank = &mem->bank[mem->nr_banks]; - bank->start = desc->PhysicalStart; - bank->size = desc->NumberOfPages * EFI_PAGE_SIZE; + bank->start = start; + bank->size = size; mem->nr_banks++; diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 1ea42a0386..6f9f4d8c8a 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -350,6 +350,12 @@ bool __init check_reserved_regions_overlap(paddr_t region_start, region_start, region_size) ) return true; +#ifdef CONFIG_ACPI + /* Check if input region is overlapping with ACPI EfiACPIReclaimMemory */ + if ( meminfo_overlap_check(&bootinfo.acpi, region_start, region_size) ) + return true; +#endif + return false; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Mon Apr 17 17:56:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 17 Apr 2023 17:56:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522289.811552 (Exim 4.92) (envelope-from ) id 1poT5e-0002wa-Qt; Mon, 17 Apr 2023 17:56:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522289.811552; Mon, 17 Apr 2023 17:56:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poT5e-0002wS-Nx; Mon, 17 Apr 2023 17:56:34 +0000 Received: by outflank-mailman (input) for mailman id 522289; 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bh=XY4idp+3V8sVbqzI3bzILYj3EBZYzYgrm+g9lxpL/w4=; b=P4UMG4w0UrKwVjMY84JVClX46O MeFjtGAzLBBZnBiKjPsPAsEEqDU3Fgdk0RhWUOTD8SnFJOz1SnYumZSGhlmTqJCgPGuv3z3sD8z0O AybyFegJdNKq6/0eo8acoqUyHnEUZKTPlSck3aNNLO4YX5JStCNamzG8ehNS0XKpoVj0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] ARM+RISC-V: BSS handling improvements Message-Id: Date: Mon, 17 Apr 2023 17:56:33 +0000 commit 44843cee3d2b8daa09e5860fc4574219b57acde8 Author: Andrew Cooper AuthorDate: Fri Mar 24 22:24:51 2023 +0000 Commit: Julien Grall CommitDate: Sun Apr 16 18:13:14 2023 +0100 ARM+RISC-V: BSS handling improvements * Correct comments in arm{32,64}/head.S * Provide Linker assertions to check the safety of the zeroing loops Signed-off-by: Andrew Cooper Reviewed-by: Oleksii Kurochko Acked-by: Alistair Francis Reviewed-by: Julien Grall --- xen/arch/arm/arm32/head.S | 2 +- xen/arch/arm/arm64/head.S | 2 +- xen/arch/arm/xen.lds.S | 2 ++ xen/arch/riscv/xen.lds.S | 4 ++++ 4 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index df51550baa..f9f7be9588 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -301,7 +301,7 @@ ENDPROC(check_cpu_mode) zero_bss: PRINT("- Zero BSS -\r\n") mov_w r0, __bss_start /* r0 := vaddr(__bss_start) */ - mov_w r1, __bss_end /* r1 := vaddr(__bss_start) */ + mov_w r1, __bss_end /* r1 := vaddr(__bss_end) */ mov r2, #0 1: str r2, [r0], #4 diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 4a3f87117c..8a4dd64c99 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -437,7 +437,7 @@ zero_bss: PRINT("- Zero BSS -\r\n") ldr x0, =__bss_start /* x0 := vaddr(__bss_start) */ - ldr x1, =__bss_end /* x1 := vaddr(__bss_start) */ + ldr x1, =__bss_end /* x1 := vaddr(__bss_end) */ 1: str xzr, [x0], #8 cmp x0, x1 diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index 1b392345bc..6ca3caefe6 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -240,3 +240,5 @@ ASSERT(_idmap_end - _idmap_start <= PAGE_SIZE, "Identity mapped code is larger t */ ASSERT(IS_ALIGNED(__init_begin, 4), "__init_begin is misaligned") ASSERT(IS_ALIGNED(__init_end, 4), "__init_end is misaligned") +ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") +ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index ca57cce75c..2ed70eccc6 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -1,3 +1,4 @@ +#include #include #undef ENTRY @@ -156,3 +157,6 @@ SECTIONS ELF_DETAILS_SECTIONS } + +ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") +ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522577.812057 (Exim 4.92) (envelope-from ) id 1poeti-0002vr-QO; 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Tue, 18 Apr 2023 06:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aJFpIG7+jT2wcWYisXgwvGPOL/K/Hu4Qr/5mh4nfOZU=; b=pDPQO3rcz1qdlAA6N51vc3ULvI 2JmIJr27b/l3vhy80eg+c36zGk0y/C1mQr9bPKYPN7pZ2rOwkqqhFxyJS5Jvol/LFFab5ckMjVHNP 1G2JdvOt58lVFiTIcr43PJl9P1KwJdcIE4nOrIV/wqouXjVBbE2eU9p4FIN8d7nRSEzk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul/fuzz: correct header (symlink) dependencies Message-Id: Date: Tue, 18 Apr 2023 06:33:02 +0000 commit 6ded4451de88d1956792136d9e5b549a2c805fb8 Author: Jan Beulich AuthorDate: Mon Apr 17 14:00:46 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:00:46 2023 +0200 x86emul/fuzz: correct header (symlink) dependencies A use of $(x86_emulate.h) was introduced (mirroring what the testharness has) without realizing that no such variable exists here. (Re)name the variable (to) "private.h", which better expresses what is included which way. Note that because of automatic dependencies tracking, unlike in the test harness no $(x86.h) variable is needed here - we solely need explicit dependencies for files which need symlinks created. Fixes: 9ace97ab9b87 ("x86emul: split off opcode 0f01 handling") Reported-by: Andrew Cooper Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/fuzz/x86_instruction_emulator/Makefile | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index a022e8c8ad..0100cfc8ac 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -35,14 +35,16 @@ OBJS := fuzz-emul.o x86-emulate.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o OBJS += x86_emulate/decode.o x86_emulate/fpu.o +private.h := x86-emulate.h x86_emulate/x86_emulate.h x86_emulate/private.h + x86-emulate.h: x86_emulate/x86_emulate.h -x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h +x86-emulate.o x86-emulate-cov.o: x86_emulate/x86_emulate.c $(private.h) fuzz-emul.o fuzz-emul-cov.o wrappers.o: x86-emulate.h -$(filter x86_emulate/%.o,$(OBJS)): x86_emulate/%.o: x86_emulate/%.c x86_emulate/private.h $(x86_emulate.h) +$(filter x86_emulate/%.o,$(OBJS)): x86_emulate/%.o: x86_emulate/%.c $(private.h) $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) -c -o $@ $< $(APPEND_CFLAGS) -$(patsubst %.o,%-cov.o,$(filter x86_emulate/%.o,$(OBJS))): x86_emulate/%-cov.o: x86_emulate/%.c x86_emulate/private.h $(x86_emulate.h) +$(patsubst %.o,%-cov.o,$(filter x86_emulate/%.o,$(OBJS))): x86_emulate/%-cov.o: x86_emulate/%.c $(private.h) $(CC) $(CPPFLAGS) $(CFLAGS) $(CFLAGS_$*.o) $(GCOV_FLAGS) -c -o $@ $< $(APPEND_CFLAGS) x86-insn-fuzzer.a: $(OBJS) cpuid.o -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522578.812062 (Exim 4.92) (envelope-from ) id 1poett-00031g-SA; Tue, 18 Apr 2023 06:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522578.812062; Tue, 18 Apr 2023 06:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poett-00031Y-P0; Tue, 18 Apr 2023 06:33:13 +0000 Received: by outflank-mailman (input) for mailman id 522578; Tue, 18 Apr 2023 06:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poets-00031C-Gd for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poets-00049m-Fs for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poets-0005jG-Ec for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kuhK/njUnwzx4Fh0ThD8XXd1fksNOCC2Jqv+QphYdd4=; b=Pnq7pZuqDl64U86nUW6i0yVw2j MNAJjVHn0uT0foZQeGtT03Z01LGQKGEgCLu/2eogS0BiPzJWpq9HYjX4nkGhRpjNbtBfWKZ0WBFnl t0dYJTi4HhKp+dixL3AjcnXB3g7Ber2sLydzSQBTbgQv8SoIO2R+GBfDcKSDtl9M1uKg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: switch split-off files to SPDX Message-Id: Date: Tue, 18 Apr 2023 06:33:12 +0000 commit 9bbada6eb5e621e9469f906495caffa86868e138 Author: Jan Beulich AuthorDate: Mon Apr 17 14:01:02 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:01:02 2023 +0200 x86emul: switch split-off files to SPDX I should have remembered to adjust the splitting patches accordingly, but I forgot. While making the adjustment also correct fpu.c's first comment line. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/x86_emulate/0f01.c | 14 +------------- xen/arch/x86/x86_emulate/0fae.c | 14 +------------- xen/arch/x86/x86_emulate/0fc7.c | 14 +------------- xen/arch/x86/x86_emulate/blk.c | 14 +------------- xen/arch/x86/x86_emulate/decode.c | 14 +------------- xen/arch/x86/x86_emulate/fpu.c | 16 ++-------------- xen/arch/x86/x86_emulate/private.h | 14 +------------- xen/arch/x86/x86_emulate/util-xen.c | 14 +------------- xen/arch/x86/x86_emulate/util.c | 14 +------------- 9 files changed, 10 insertions(+), 118 deletions(-) diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f01.c index 2d655bdb92..5dda10bff1 100644 --- a/xen/arch/x86/x86_emulate/0f01.c +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * 0f01.c - helper for x86_emulate.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/0fae.c b/xen/arch/x86/x86_emulate/0fae.c index db5f419671..00840b1d07 100644 --- a/xen/arch/x86/x86_emulate/0fae.c +++ b/xen/arch/x86/x86_emulate/0fae.c @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * 0fae.c - helper for x86_emulate.c * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/0fc7.c b/xen/arch/x86/x86_emulate/0fc7.c index b8808e4cca..5268d5cafd 100644 --- a/xen/arch/x86/x86_emulate/0fc7.c +++ b/xen/arch/x86/x86_emulate/0fc7.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * 0fc7.c - helper for x86_emulate.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/blk.c b/xen/arch/x86/x86_emulate/blk.c index 64b51fed04..e790f4f900 100644 --- a/xen/arch/x86/x86_emulate/blk.c +++ b/xen/arch/x86/x86_emulate/blk.c @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * blk.c - helper for x86_emulate.c * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c index ee7cd724b1..51a3d1d2dd 100644 --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * decode.c - helper for x86_emulate.c * @@ -5,19 +6,6 @@ * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/fpu.c b/xen/arch/x86/x86_emulate/fpu.c index e745840722..baa383f9d1 100644 --- a/xen/arch/x86/x86_emulate/fpu.c +++ b/xen/arch/x86/x86_emulate/fpu.c @@ -1,23 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** - * x86_emulate.c + * fpu.c * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 8dee019731..e09bed55f3 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * private.h - interface between x86_emulate.c and its helpers * * Copyright (c) 2005-2007 Keir Fraser * Copyright (c) 2005-2007 XenSource Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #ifdef __XEN__ diff --git a/xen/arch/x86/x86_emulate/util-xen.c b/xen/arch/x86/x86_emulate/util-xen.c index 95c15492a8..5e90818010 100644 --- a/xen/arch/x86/x86_emulate/util-xen.c +++ b/xen/arch/x86/x86_emulate/util-xen.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * util-xen.c * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator hypervisor- * only utility functions. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" diff --git a/xen/arch/x86/x86_emulate/util.c b/xen/arch/x86/x86_emulate/util.c index 090c7e07a9..4becd054c2 100644 --- a/xen/arch/x86/x86_emulate/util.c +++ b/xen/arch/x86/x86_emulate/util.c @@ -1,21 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /****************************************************************************** * util.c * * Generic x86 (32-bit and 64-bit) instruction decoder and emulator utility * functions. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . */ #include "private.h" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522581.812065 (Exim 4.92) (envelope-from ) id 1poeu3-0003An-T7; Tue, 18 Apr 2023 06:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522581.812065; Tue, 18 Apr 2023 06:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeu3-0003Af-QS; Tue, 18 Apr 2023 06:33:23 +0000 Received: by outflank-mailman (input) for mailman id 522581; Tue, 18 Apr 2023 06:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeu2-0003AL-LF for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeu2-00049y-KE for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poeu2-0005ju-Io for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=uJ55Kg979m9QtP0gTYYItAFkuftEJnMNZRsc1VXdHgE=; b=aW23Q5lTRFZDS87joiGXh/qBlf HKXL16k1WFe9mfURUtpR4TMWqPfMWdCkiWkNER6Lla06gxycBnDpYMd7lnXWvPDM4SkTPzs6DaGh/ hxzumJKL4HhfuhM3TwSZCYty0UG+9kknr977tEv/RYvnLTzzsWOdznAtwx+dzXlrsJTo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/efi: fix uninitialized use warning Message-Id: Date: Tue, 18 Apr 2023 06:33:22 +0000 commit 7d5e60c525114c83e2ab8867297c1f9623b21ad5 Author: Stewart Hildebrand AuthorDate: Mon Apr 17 14:01:26 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:01:26 2023 +0200 xen/efi: fix uninitialized use warning When building the hypervisor for arm64 with -Og, we encounter a (false) uninitialized use warning: arch/arm/efi/boot.c: In function ‘efi_start’: arch/arm/efi/boot.c:1468:9: error: ‘argc’ may be used uninitialized [-Werror=maybe-uninitialized] 1468 | efi_arch_handle_cmdline(argc ? *argv : NULL, options, name.s); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/efi/boot.c:1263:21: note: ‘argc’ was declared here 1263 | unsigned int i, argc; | ^~~~ cc1: all warnings being treated as errors Fix this by initializing argc. As a precaution, also initialize argv. Signed-off-by: Stewart Hildebrand Acked-by: Jan Beulich --- xen/common/efi/boot.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index b69c83e354..c5850c26af 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -1344,6 +1344,15 @@ efi_start(EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable) if ( !base_video ) efi_console_set_mode(); } + else + { + /* + * Some compilers may emit a false "uninitialized use" warning for argc, + * so initialize argc/argv here to avoid the warning. + */ + argc = 0; + argv = NULL; + } PrintStr(L"Xen " XEN_VERSION_STRING XEN_EXTRAVERSION " (c/s " XEN_CHANGESET ") EFI loader\r\n"); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522583.812071 (Exim 4.92) (envelope-from ) id 1poeuD-0003Jg-Vd; Tue, 18 Apr 2023 06:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522583.812071; Tue, 18 Apr 2023 06:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuD-0003JY-S2; Tue, 18 Apr 2023 06:33:33 +0000 Received: by outflank-mailman (input) for mailman id 522583; Tue, 18 Apr 2023 06:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuC-0003IA-Ou for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuC-0004A5-O7 for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poeuC-0005kc-N6 for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=w5b3TQ483wClvn230zizi9J2RSSgo2hL1bDiSPtqUE8=; b=uXMmxPN1iAm2s32m/JqhYtocOK HcY/DjCQt3LjPMC9KzEO8BVnJt13Wajcw7MQicJjzPYs9cSX62FvgPVhsYHig9ZLTtJmq0BC5pKY8 ApFaotEBY0CC8NZGurXmTd7kcV53B5pUZRybQvT8yPMiGxJDUNz55jwKcaJffG78iV8o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: support WRMSRNS Message-Id: Date: Tue, 18 Apr 2023 06:33:32 +0000 commit 07b167d17e84aa7985a1c6d03dd3c23c37a83d23 Author: Jan Beulich AuthorDate: Mon Apr 17 14:03:22 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:03:22 2023 +0200 x86emul: support WRMSRNS This insn differs from WRMSR solely in the lack of serialization. Hence the code used there can simply be used here as well, plus a feature check of course. As there's no other infrastructure needed beyond permitting the insn for PV privileged-op emulation (in particular no separate new VMEXIT) we can expose the insn to guests right away. Don't expose the feature to PV guests, as the involved #UD is serializing anyway. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- tools/tests/x86_emulator/predicates.c | 1 + tools/tests/x86_emulator/x86-emulate.c | 1 + xen/arch/x86/x86_emulate/0f01.c | 14 ++++++++++++++ xen/arch/x86/x86_emulate/private.h | 1 + xen/include/public/arch-x86/cpufeatureset.h | 2 +- 5 files changed, 18 insertions(+), 1 deletion(-) diff --git a/tools/tests/x86_emulator/predicates.c b/tools/tests/x86_emulator/predicates.c index cf1cb73054..0cb05442a1 100644 --- a/tools/tests/x86_emulator/predicates.c +++ b/tools/tests/x86_emulator/predicates.c @@ -340,6 +340,7 @@ static const struct { /*{ 0x01, 0xc3 }, { 2, 2 }, F, R }, vmresume */ { { 0x01, 0xc4 }, { 2, 2 }, F, N }, /* vmxoff */ { { 0x01, 0xc5 }, { 2, 2 }, F, N }, /* pconfig */ + { { 0x01, 0xc6 }, { 2, 2 }, F, N }, /* wrmsrns */ { { 0x01, 0xc8 }, { 2, 2 }, F, N }, /* monitor */ { { 0x01, 0xc9 }, { 2, 2 }, F, N }, /* mwait */ { { 0x01, 0xca }, { 2, 2 }, F, N }, /* clac */ diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 7d2d57f759..d3baaef1d0 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -86,6 +86,7 @@ bool emul_test_init(void) cp.feat.adx = true; cp.feat.avx512pf = cp.feat.avx512f; cp.feat.rdpid = true; + cp.feat.wrmsrns = true; cp.extd.clzero = true; if ( cpu_has_xsave ) diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f01.c index 5dda10bff1..ba43fc394b 100644 --- a/xen/arch/x86/x86_emulate/0f01.c +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -31,6 +31,20 @@ int x86emul_0f01(struct x86_emulate_state *s, struct segment_register sreg; uint64_t msr_val; + case 0xc6: + switch ( s->vex.pfx ) + { + case vex_none: /* wrmsrns */ + vcpu_must_have(wrmsrns); + generate_exception_if(!mode_ring0(), X86_EXC_GP, 0); + fail_if(!ops->write_msr); + rc = ops->write_msr(regs->ecx, + ((uint64_t)regs->r(dx) << 32) | regs->eax, + ctxt); + goto done; + } + generate_exception(X86_EXC_UD); + case 0xca: /* clac */ case 0xcb: /* stac */ vcpu_must_have(smap); diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index e09bed55f3..9f8db6ab0d 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -582,6 +582,7 @@ amd_like(const struct x86_emulate_ctxt *ctxt) #define vcpu_has_tsxldtrk() (ctxt->cpuid->feat.tsxldtrk) #define vcpu_has_avx_vnni() (ctxt->cpuid->feat.avx_vnni) #define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16) +#define vcpu_has_wrmsrns() (ctxt->cpuid->feat.wrmsrns) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 0888519087..46d006be8f 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -281,7 +281,7 @@ XEN_CPUFEATURE(AVX512_BF16, 10*32+ 5) /*A AVX512 BFloat16 Instructions */ XEN_CPUFEATURE(FZRM, 10*32+10) /*A Fast Zero-length REP MOVSB */ XEN_CPUFEATURE(FSRS, 10*32+11) /*A Fast Short REP STOSB */ XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ -XEN_CPUFEATURE(WRMSRNS, 10*32+19) /* WRMSR Non-Serialising */ +XEN_CPUFEATURE(WRMSRNS, 10*32+19) /*S WRMSR Non-Serialising */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522584.812073 (Exim 4.92) (envelope-from ) id 1poeuO-0003NG-0A; Tue, 18 Apr 2023 06:33:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522584.812073; Tue, 18 Apr 2023 06:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuN-0003N8-Tg; Tue, 18 Apr 2023 06:33:43 +0000 Received: by outflank-mailman (input) for mailman id 522584; Tue, 18 Apr 2023 06:33:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuM-0003Ml-Ub for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuM-0004AD-Rr for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poeuM-0005lO-Qn for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dfOiYdio7Ug+rhBOxSKGXN/z7L8C2A6Q2WsEw9hArN8=; b=QwkeXMXPwuet3MKM/JS1QOuw8Z 0LIKZ8F3C6aXh6qTMH5t2AWRLs2xT9w9XS2SSD5/86Ub923Alqfa8X927q7M4972hAFigwZYexoB0 zAHnA5qSzhdHuhoiFkQ8vU5NjDHlmB8+YMeJtEtKMJcDAjenXW45K21RnJA6/eGmL6go=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: drop regs field from emulator state structure Message-Id: Date: Tue, 18 Apr 2023 06:33:42 +0000 commit 3a407e70f7a76ec0e4436bbe87ccbecf932d2b3f Author: Jan Beulich AuthorDate: Mon Apr 17 14:04:34 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:04:34 2023 +0200 x86emul: drop regs field from emulator state structure For an unclear reason 0552a8cfda43 ("x86emul: track only rIP in emulator state") converted the original struct cpu_user_regs instance to a pointer, rather than dropping the field altogether: The pointer merely aliases the one in the context structure. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/x86_emulate/decode.c | 29 ++++++++++++++--------------- xen/arch/x86/x86_emulate/private.h | 1 - 2 files changed, 14 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c index 51a3d1d2dd..fefbba33a6 100644 --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -997,7 +997,6 @@ int x86emul_decode(struct x86_emulate_state *s, s->ea.type = OP_NONE; s->ea.mem.seg = x86_seg_ds; s->ea.reg = PTR_POISON; - s->regs = ctxt->regs; s->ip = ctxt->regs->r(ip); s->op_bytes = def_op_bytes = ad_bytes = def_ad_bytes = @@ -1113,7 +1112,7 @@ int x86emul_decode(struct x86_emulate_state *s, default: BUG(); /* Shouldn't be possible. */ case 2: - if ( s->regs->eflags & X86_EFLAGS_VM ) + if ( ctxt->regs->eflags & X86_EFLAGS_VM ) break; /* fall through */ case 4: @@ -1442,33 +1441,33 @@ int x86emul_decode(struct x86_emulate_state *s, switch ( s->modrm_rm ) { case 0: - s->ea.mem.off = s->regs->bx + s->regs->si; + s->ea.mem.off = ctxt->regs->bx + ctxt->regs->si; break; case 1: - s->ea.mem.off = s->regs->bx + s->regs->di; + s->ea.mem.off = ctxt->regs->bx + ctxt->regs->di; break; case 2: s->ea.mem.seg = x86_seg_ss; - s->ea.mem.off = s->regs->bp + s->regs->si; + s->ea.mem.off = ctxt->regs->bp + ctxt->regs->si; break; case 3: s->ea.mem.seg = x86_seg_ss; - s->ea.mem.off = s->regs->bp + s->regs->di; + s->ea.mem.off = ctxt->regs->bp + ctxt->regs->di; break; case 4: - s->ea.mem.off = s->regs->si; + s->ea.mem.off = ctxt->regs->si; break; case 5: - s->ea.mem.off = s->regs->di; + s->ea.mem.off = ctxt->regs->di; break; case 6: if ( s->modrm_mod == 0 ) break; s->ea.mem.seg = x86_seg_ss; - s->ea.mem.off = s->regs->bp; + s->ea.mem.off = ctxt->regs->bp; break; case 7: - s->ea.mem.off = s->regs->bx; + s->ea.mem.off = ctxt->regs->bx; break; } switch ( s->modrm_mod ) @@ -1501,7 +1500,7 @@ int x86emul_decode(struct x86_emulate_state *s, !s->evex.RX) << 4; else if ( s->sib_index != 4 ) { - s->ea.mem.off = *decode_gpr(s->regs, s->sib_index); + s->ea.mem.off = *decode_gpr(ctxt->regs, s->sib_index); s->ea.mem.off <<= s->sib_scale; } if ( (s->modrm_mod == 0) && ((sib_base & 7) == 5) ) @@ -1509,7 +1508,7 @@ int x86emul_decode(struct x86_emulate_state *s, else if ( sib_base == 4 ) { s->ea.mem.seg = x86_seg_ss; - s->ea.mem.off += s->regs->r(sp); + s->ea.mem.off += ctxt->regs->r(sp); if ( !s->ext && (b == 0x8f) ) /* POP computes its EA post increment. */ s->ea.mem.off += ((mode_64bit() && (s->op_bytes == 4)) @@ -1518,16 +1517,16 @@ int x86emul_decode(struct x86_emulate_state *s, else if ( sib_base == 5 ) { s->ea.mem.seg = x86_seg_ss; - s->ea.mem.off += s->regs->r(bp); + s->ea.mem.off += ctxt->regs->r(bp); } else - s->ea.mem.off += *decode_gpr(s->regs, sib_base); + s->ea.mem.off += *decode_gpr(ctxt->regs, sib_base); } else { generate_exception_if(d & vSIB, X86_EXC_UD); s->modrm_rm |= (s->rex_prefix & 1) << 3; - s->ea.mem.off = *decode_gpr(s->regs, s->modrm_rm); + s->ea.mem.off = *decode_gpr(ctxt->regs, s->modrm_rm); if ( (s->modrm_rm == 5) && (s->modrm_mod != 0) ) s->ea.mem.seg = x86_seg_ss; } diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 9f8db6ab0d..1a7c17feab 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -309,7 +309,6 @@ struct x86_emulate_state { #define imm2 ea.orig_val unsigned long ip; - struct cpu_user_regs *regs; #ifndef NDEBUG /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 18 06:33:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 18 Apr 2023 06:33:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.522585.812076 (Exim 4.92) (envelope-from ) id 1poeuY-0003R7-2r; Tue, 18 Apr 2023 06:33:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 522585.812076; Tue, 18 Apr 2023 06:33:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuY-0003R0-0P; Tue, 18 Apr 2023 06:33:54 +0000 Received: by outflank-mailman (input) for mailman id 522585; Tue, 18 Apr 2023 06:33:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuX-0003Qo-18 for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1poeuX-0004Ab-0K for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1poeuW-0005mX-VP for xen-changelog@lists.xenproject.org; Tue, 18 Apr 2023 06:33:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Pva488m7fTw1ReS6qjh7Co8xm4fk5SRB72pQQjkdLNM=; b=h2L3OeWNFLuzduqZ2VpKOFQ/gq Drd2LUZ8aTLJLZSWetj/0lChp1FY2ZyySfN4eEjvfJPNYBEnmLlyaBbSzYne40i3mjzEdgOqD5R5T C/Bf3j0Jqxw3T7411k5kQv9JtiNW39LXlXAAXRDq69kXViMMIVM8aUcJZXRDQZdRlz1Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: introduce stub_exn field in state structure Message-Id: Date: Tue, 18 Apr 2023 06:33:52 +0000 commit 5eb6bd7454e253f4907dbeb7aa982967b21698bc Author: Jan Beulich AuthorDate: Mon Apr 17 14:05:13 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 14:05:13 2023 +0200 x86emul: introduce stub_exn field in state structure This can be used to reduce the number of parameters x86emul_fpu() needs to take, and will be re-used subsequently. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/x86_emulate/fpu.c | 3 +-- xen/arch/x86/x86_emulate/private.h | 3 ++- xen/arch/x86/x86_emulate/x86_emulate.c | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/x86_emulate/fpu.c b/xen/arch/x86/x86_emulate/fpu.c index baa383f9d1..480d879657 100644 --- a/xen/arch/x86/x86_emulate/fpu.c +++ b/xen/arch/x86/x86_emulate/fpu.c @@ -78,9 +78,8 @@ int x86emul_fpu(struct x86_emulate_state *s, unsigned int *insn_bytes, enum x86_emulate_fpu_type *fpu_type, #define fpu_type (*fpu_type) /* for get_fpu() */ - struct stub_exn *stub_exn, -#define stub_exn (*stub_exn) /* for invoke_stub() */ mmval_t *mmvalp) +#define stub_exn (*s->stub_exn) /* for invoke_stub() */ { uint8_t b; int rc; diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 1a7c17feab..0f96eb5fd6 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -310,6 +310,8 @@ struct x86_emulate_state { unsigned long ip; + struct stub_exn *stub_exn; + #ifndef NDEBUG /* * Track caller of x86_decode_insn() to spot missing as well as @@ -747,7 +749,6 @@ int x86emul_fpu(struct x86_emulate_state *s, const struct x86_emulate_ops *ops, unsigned int *insn_bytes, enum x86_emulate_fpu_type *fpu_type, - struct stub_exn *stub_exn, mmval_t *mmvalp); int x86emul_0f01(struct x86_emulate_state *s, struct cpu_user_regs *regs, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index f316117516..17b374069c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -2024,8 +2024,9 @@ x86_emulate( #ifndef X86EMUL_NO_FPU case 0x9b: /* wait/fwait */ case 0xd8 ... 0xdf: /* FPU */ + state->stub_exn = &stub_exn; rc = x86emul_fpu(state, &_regs, &dst, &src, ctxt, ops, - &insn_bytes, &fpu_type, &stub_exn, mmvalp); + &insn_bytes, &fpu_type, mmvalp); goto dispatch_from_helper; #endif -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523769.814119 (Exim 4.92) (envelope-from ) id 1ppDtO-0004N9-TR; Wed, 19 Apr 2023 19:55:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523769.814119; Wed, 19 Apr 2023 19:55:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtO-0004N1-QV; Wed, 19 Apr 2023 19:55:02 +0000 Received: by outflank-mailman (input) for mailman id 523769; Wed, 19 Apr 2023 19:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtO-0004Mv-6p for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtN-00078L-R4 for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDtN-0003Vj-OB for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DOtHDkRiy9ILchhWpXJ7aIovTxV8MpyMvRR3bugFLEk=; b=Xts+WRUf1oDvwc4Ni/wxXuZWp5 r/TZvfgKCcLnY1FwHH/hINc1zSYmz85UICAYo5yOYsOW7TS2kRy/x93XJIaXl4HXbLB5DrqDxITUj fTflMqVlofspREoTmruPab227feINR+Ec1k5GhANAoWW1G77dl8jdDxwUJWazYEqVbhA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: support AVX-IFMA insns Message-Id: Date: Wed, 19 Apr 2023 19:55:01 +0000 commit da232f1f1118e8c8fad520dedee312005c2984fb Author: Jan Beulich AuthorDate: Mon Apr 17 18:10:14 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 18:10:14 2023 +0200 x86emul: support AVX-IFMA insns As in a few cases before (in particular: AVX512_IFMA), since the insns here and in particular their memory access patterns follow the usual scheme, I didn't think it was necessary to add a contrived test specifically for them. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- tools/libs/light/libxl_cpuid.c | 1 + tools/misc/xen-cpuid.c | 2 ++ tools/tests/x86_emulator/predicates.c | 2 ++ tools/tests/x86_emulator/x86-emulate.h | 1 + xen/arch/x86/include/asm/cpufeature.h | 1 + xen/arch/x86/x86_emulate/private.h | 1 + xen/arch/x86/x86_emulate/x86_emulate.c | 6 ++++++ xen/include/public/arch-x86/cpufeatureset.h | 1 + xen/tools/gen-cpuid.py | 2 +- 9 files changed, 16 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 9686359810..753345cc30 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -236,6 +236,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) {"fsrs", 0x00000007, 1, CPUID_REG_EAX, 11, 1}, {"fsrcs", 0x00000007, 1, CPUID_REG_EAX, 12, 1}, {"wrmsrns", 0x00000007, 1, CPUID_REG_EAX, 19, 1}, + {"avx-ifma", 0x00000007, 1, CPUID_REG_EAX, 23, 1}, {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 5810b5bcca..76a3f6e840 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -191,6 +191,8 @@ static const char *const str_7a1[32] = [12] = "fsrcs", /* 18 */ [19] = "wrmsrns", + + /* 22 */ [23] = "avx-ifma", }; static const char *const str_e21a[32] = diff --git a/tools/tests/x86_emulator/predicates.c b/tools/tests/x86_emulator/predicates.c index 0cb05442a1..eb493ddc49 100644 --- a/tools/tests/x86_emulator/predicates.c +++ b/tools/tests/x86_emulator/predicates.c @@ -1371,6 +1371,8 @@ static const struct vex { { { 0xad }, 2, T, R, pfx_66, Wn, LIG }, /* vnmadd213s{s,d} */ { { 0xae }, 2, T, R, pfx_66, Wn, Ln }, /* vnmsub213p{s,d} */ { { 0xaf }, 2, T, R, pfx_66, Wn, LIG }, /* vnmsub213s{s,d} */ + { { 0xb4 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52luq */ + { { 0xb5 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52huq */ { { 0xb6 }, 2, T, R, pfx_66, Wn, Ln }, /* vmaddsub231p{s,d} */ { { 0xb7 }, 2, T, R, pfx_66, Wn, Ln }, /* vmsubadd231p{s,d} */ { { 0xb8 }, 2, T, R, pfx_66, Wn, Ln }, /* vmadd231p{s,d} */ diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 02922d0c5a..78808783fd 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -185,6 +185,7 @@ void wrpkru(unsigned int val); #define cpu_has_serialize cp.feat.serialize #define cpu_has_avx_vnni (cp.feat.avx_vnni && xcr0_mask(6)) #define cpu_has_avx512_bf16 (cp.feat.avx512_bf16 && xcr0_mask(0xe6)) +#define cpu_has_avx_ifma (cp.feat.avx_ifma && xcr0_mask(6)) #define cpu_has_xgetbv1 (cpu_has_xsave && cp.xstate.xgetbv1) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 3cacc237ee..e1353485ea 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -170,6 +170,7 @@ extern struct cpuinfo_x86 boot_cpu_data; /* CPUID level 0x00000007:1.eax */ #define cpu_has_avx_vnni boot_cpu_has(X86_FEATURE_AVX_VNNI) #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +#define cpu_has_avx_ifma boot_cpu_has(X86_FEATURE_AVX_IFMA) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index 0f96eb5fd6..ca03458e04 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -584,6 +584,7 @@ amd_like(const struct x86_emulate_ctxt *ctxt) #define vcpu_has_avx_vnni() (ctxt->cpuid->feat.avx_vnni) #define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16) #define vcpu_has_wrmsrns() (ctxt->cpuid->feat.wrmsrns) +#define vcpu_has_avx_ifma() (ctxt->cpuid->feat.avx_ifma) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 17b374069c..9ac904dd1a 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -6670,6 +6670,12 @@ x86_emulate( break; } + case X86EMUL_OPC_VEX_66(0x0f38, 0xb4): /* vpmadd52luq [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX_66(0x0f38, 0xb5): /* vpmadd52huq [xy]mm/mem,[xy]mm,[xy]mm */ + host_and_vcpu_must_have(avx_ifma); + generate_exception_if(!vex.w, X86_EXC_UD); + goto simd_0f_ymm; + case X86EMUL_OPC_EVEX_66(0x0f38, 0xb4): /* vpmadd52luq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0xb5): /* vpmadd52huq [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ host_and_vcpu_must_have(avx512_ifma); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 46d006be8f..24db511916 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -282,6 +282,7 @@ XEN_CPUFEATURE(FZRM, 10*32+10) /*A Fast Zero-length REP MOVSB */ XEN_CPUFEATURE(FSRS, 10*32+11) /*A Fast Short REP STOSB */ XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ XEN_CPUFEATURE(WRMSRNS, 10*32+19) /*S WRMSR Non-Serialising */ +XEN_CPUFEATURE(AVX_IFMA, 10*32+23) /*A AVX-IFMA Instructions */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 4f7c8d78cc..46e23a2fad 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -254,7 +254,7 @@ def crunch_numbers(state): # feature flags. If want to use AVX512, AVX2 must be supported and # enabled. Certain later extensions, acting on 256-bit vectors of # integers, better depend on AVX2 than AVX. - AVX2: [AVX512F, VAES, VPCLMULQDQ, AVX_VNNI], + AVX2: [AVX512F, VAES, VPCLMULQDQ, AVX_VNNI, AVX_IFMA], # AVX512F is taken to mean hardware support for 512bit registers # (which in practice depends on the EVEX prefix to encode) as well -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523770.814123 (Exim 4.92) (envelope-from ) id 1ppDtY-0004PZ-VS; Wed, 19 Apr 2023 19:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523770.814123; Wed, 19 Apr 2023 19:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtY-0004PR-SA; Wed, 19 Apr 2023 19:55:12 +0000 Received: by outflank-mailman (input) for mailman id 523770; Wed, 19 Apr 2023 19:55:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtY-0004OY-08 for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtX-00078S-VW for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDtX-0003WU-UK for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lIr29T3R4cAumGtrpM1wN00hYfMbagrvaiAAgzjffhE=; b=YmJJPJxC4sLtVjWBJSWza4bbWZ t8hWJA/8swHrvcsHgEwazoHLyNVgX7nQkc7dpipvdDZKfdELA3zSbaFwpliXV64tC5mzo5GQOGwzs qkl55YYhxNl7lEc/TdbFwgtGQne7bt8B4TWnzY/NbTh10eCW7yqxs4Zaoms0Muylj/fQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: support AVX-VNNI-INT8 Message-Id: Date: Wed, 19 Apr 2023 19:55:11 +0000 commit 842acaa743a503726d6c4d77a7982cc64f07c4bf Author: Jan Beulich AuthorDate: Mon Apr 17 18:11:06 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 18:11:06 2023 +0200 x86emul: support AVX-VNNI-INT8 These are close relatives of the AVX-VNNI ISA extension. Since the insns here and in particular their memory access patterns follow the usual scheme (and especially the byte variants of AVX-VNNI), I didn't think it was necessary to add a contrived test specifically for them. While making the addition also re-wire AVX-VNNI's handling to simd_0f_ymm: There's no reason to check the AVX feature alongside the one actually of interest (there are a few features where two checks are actually necessary, e.g. GFNI+AVX, but this isn't the case here). Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- tools/libs/light/libxl_cpuid.c | 1 + tools/misc/xen-cpuid.c | 2 ++ tools/tests/x86_emulator/predicates.c | 6 ++++++ tools/tests/x86_emulator/x86-emulate.h | 1 + xen/arch/x86/include/asm/cpufeature.h | 3 +++ xen/arch/x86/x86_emulate/private.h | 1 + xen/arch/x86/x86_emulate/x86_emulate.c | 12 +++++++++++- xen/include/public/arch-x86/cpufeatureset.h | 1 + xen/tools/gen-cpuid.py | 2 +- 9 files changed, 27 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 753345cc30..4f58f45ea0 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -238,6 +238,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) {"wrmsrns", 0x00000007, 1, CPUID_REG_EAX, 19, 1}, {"avx-ifma", 0x00000007, 1, CPUID_REG_EAX, 23, 1}, + {"avx-vnni-int8",0x00000007, 1, CPUID_REG_EDX, 4, 1}, {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 76a3f6e840..ff22aec569 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -212,6 +212,8 @@ static const char *const str_7c1[32] = static const char *const str_7d1[32] = { + [ 4] = "avx-vnni-int8", + [18] = "cet-sss", }; diff --git a/tools/tests/x86_emulator/predicates.c b/tools/tests/x86_emulator/predicates.c index eb493ddc49..bdaba65048 100644 --- a/tools/tests/x86_emulator/predicates.c +++ b/tools/tests/x86_emulator/predicates.c @@ -1336,8 +1336,14 @@ static const struct vex { { { 0x45 }, 2, T, R, pfx_66, Wn, Ln }, /* vpsrlv{d,q} */ { { 0x46 }, 2, T, R, pfx_66, W0, Ln }, /* vpsravd */ { { 0x47 }, 2, T, R, pfx_66, Wn, Ln }, /* vpsllv{d,q} */ + { { 0x50 }, 2, T, R, pfx_no, W0, Ln }, /* vpdpbuud */ { { 0x50 }, 2, T, R, pfx_66, W0, Ln }, /* vpdpbusd */ + { { 0x50 }, 2, T, R, pfx_f3, W0, Ln }, /* vpdpbsud */ + { { 0x50 }, 2, T, R, pfx_f2, W0, Ln }, /* vpdpbssd */ + { { 0x51 }, 2, T, R, pfx_no, W0, Ln }, /* vpdpbuuds */ { { 0x51 }, 2, T, R, pfx_66, W0, Ln }, /* vpdpbusds */ + { { 0x51 }, 2, T, R, pfx_f3, W0, Ln }, /* vpdpbsuds */ + { { 0x51 }, 2, T, R, pfx_f2, W0, Ln }, /* vpdpbssds */ { { 0x52 }, 2, T, R, pfx_66, W0, Ln }, /* vpdpwssd */ { { 0x53 }, 2, T, R, pfx_66, W0, Ln }, /* vpdpwssds */ { { 0x58 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastd */ diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 78808783fd..fdb4766205 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -186,6 +186,7 @@ void wrpkru(unsigned int val); #define cpu_has_avx_vnni (cp.feat.avx_vnni && xcr0_mask(6)) #define cpu_has_avx512_bf16 (cp.feat.avx512_bf16 && xcr0_mask(0xe6)) #define cpu_has_avx_ifma (cp.feat.avx_ifma && xcr0_mask(6)) +#define cpu_has_avx_vnni_int8 (cp.feat.avx_vnni_int8 && xcr0_mask(6)) #define cpu_has_xgetbv1 (cpu_has_xsave && cp.xstate.xgetbv1) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index e1353485ea..b7740f79bf 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -172,6 +172,9 @@ extern struct cpuinfo_x86 boot_cpu_data; #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) #define cpu_has_avx_ifma boot_cpu_has(X86_FEATURE_AVX_IFMA) +/* CPUID level 0x00000007:1.edx */ +#define cpu_has_avx_vnni_int8 boot_cpu_has(X86_FEATURE_AVX_VNNI_INT8) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index ca03458e04..eff03481b8 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -585,6 +585,7 @@ amd_like(const struct x86_emulate_ctxt *ctxt) #define vcpu_has_avx512_bf16() (ctxt->cpuid->feat.avx512_bf16) #define vcpu_has_wrmsrns() (ctxt->cpuid->feat.wrmsrns) #define vcpu_has_avx_ifma() (ctxt->cpuid->feat.avx_ifma) +#define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 9ac904dd1a..e049d6bb99 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -6020,13 +6020,23 @@ x86_emulate( generate_exception_if(vex.l, X86_EXC_UD); goto simd_0f_avx; + case X86EMUL_OPC_VEX (0x0f38, 0x50): /* vpdpbuud [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX_F3(0x0f38, 0x50): /* vpdpbsud [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX_F2(0x0f38, 0x50): /* vpdpbssd [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX (0x0f38, 0x51): /* vpdpbuuds [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX_F3(0x0f38, 0x51): /* vpdpbsuds [xy]mm/mem,[xy]mm,[xy]mm */ + case X86EMUL_OPC_VEX_F2(0x0f38, 0x51): /* vpdpbssds [xy]mm/mem,[xy]mm,[xy]mm */ + host_and_vcpu_must_have(avx_vnni_int8); + generate_exception_if(vex.w, X86_EXC_UD); + goto simd_0f_ymm; + case X86EMUL_OPC_VEX_66(0x0f38, 0x50): /* vpdpbusd [xy]mm/mem,[xy]mm,[xy]mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x51): /* vpdpbusds [xy]mm/mem,[xy]mm,[xy]mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x52): /* vpdpwssd [xy]mm/mem,[xy]mm,[xy]mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0x53): /* vpdpwssds [xy]mm/mem,[xy]mm,[xy]mm */ host_and_vcpu_must_have(avx_vnni); generate_exception_if(vex.w, X86_EXC_UD); - goto simd_0f_avx; + goto simd_0f_ymm; case X86EMUL_OPC_EVEX_66(0x0f38, 0x50): /* vpdpbusd [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x51): /* vpdpbusds [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 24db511916..fc5e3ad1e8 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -302,6 +302,7 @@ XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ +XEN_CPUFEATURE(AVX_VNNI_INT8, 15*32+ 4) /*A AVX-VNNI-INT8 Instructions */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ #endif /* XEN_CPUFEATURE */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 46e23a2fad..d77b38afa9 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -254,7 +254,7 @@ def crunch_numbers(state): # feature flags. If want to use AVX512, AVX2 must be supported and # enabled. Certain later extensions, acting on 256-bit vectors of # integers, better depend on AVX2 than AVX. - AVX2: [AVX512F, VAES, VPCLMULQDQ, AVX_VNNI, AVX_IFMA], + AVX2: [AVX512F, VAES, VPCLMULQDQ, AVX_VNNI, AVX_IFMA, AVX_VNNI_INT8], # AVX512F is taken to mean hardware support for 512bit registers # (which in practice depends on the EVEX prefix to encode) as well -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523771.814127 (Exim 4.92) (envelope-from ) id 1ppDtj-0004SV-0m; Wed, 19 Apr 2023 19:55:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523771.814127; Wed, 19 Apr 2023 19:55:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDti-0004SN-Tg; Wed, 19 Apr 2023 19:55:22 +0000 Received: by outflank-mailman (input) for mailman id 523771; Wed, 19 Apr 2023 19:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDti-0004SH-5O for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDti-00078u-4V for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDti-0003Wx-2t for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tMaetydEBXjsIYpbvho2P9Gkb6HI5WK50ayQ7z/i3Pg=; b=2nPFrUCa+mAwFo2jSPAKyMmmev 1dE0ktuMxt4ersk7oty2/gQ/dt5OSuOseyW9GN0vCNQCLM7K88ChvAh0KezCXXqvW8Gnr5Xv3mZNl hyyXr8tUsTtWkDfX4tiXEtDdasDj4ZY3rkxTEfEPevHdn5rQfg/wi/KtZV2lq10aLCjc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: support AVX-NE-CONVERT insns Message-Id: Date: Wed, 19 Apr 2023 19:55:22 +0000 commit 65c4e7472cafb60f478e7a5f358ee1eeac28b5a8 Author: Jan Beulich AuthorDate: Mon Apr 17 18:11:45 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 17 18:11:45 2023 +0200 x86emul: support AVX-NE-CONVERT insns Matching what was done earlier, explicit tests are added only for irregular insn / memory access patterns. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- tools/libs/light/libxl_cpuid.c | 1 + tools/misc/xen-cpuid.c | 2 +- tools/tests/x86_emulator/predicates.c | 7 ++++++ tools/tests/x86_emulator/test_x86_emulator.c | 33 ++++++++++++++++++++++++++++ tools/tests/x86_emulator/x86-emulate.h | 1 + xen/arch/x86/include/asm/cpufeature.h | 1 + xen/arch/x86/x86_emulate/decode.c | 2 ++ xen/arch/x86/x86_emulate/private.h | 1 + xen/arch/x86/x86_emulate/x86_emulate.c | 20 +++++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 1 + xen/tools/gen-cpuid.py | 2 +- 11 files changed, 69 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 4f58f45ea0..5f0bf93810 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -239,6 +239,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) {"avx-ifma", 0x00000007, 1, CPUID_REG_EAX, 23, 1}, {"avx-vnni-int8",0x00000007, 1, CPUID_REG_EDX, 4, 1}, + {"avx-ne-convert",0x00000007, 1, CPUID_REG_EDX, 5, 1}, {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index ff22aec569..d7efc59d31 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -212,7 +212,7 @@ static const char *const str_7c1[32] = static const char *const str_7d1[32] = { - [ 4] = "avx-vnni-int8", + [ 4] = "avx-vnni-int8", [ 5] = "avx-ne-convert", [18] = "cet-sss", }; diff --git a/tools/tests/x86_emulator/predicates.c b/tools/tests/x86_emulator/predicates.c index bdaba65048..80db0e4cf3 100644 --- a/tools/tests/x86_emulator/predicates.c +++ b/tools/tests/x86_emulator/predicates.c @@ -1349,6 +1349,7 @@ static const struct vex { { { 0x58 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastd */ { { 0x59 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastq */ { { 0x5a }, 2, F, R, pfx_66, W0, L1 }, /* vbroadcasti128 */ + { { 0x72 }, 2, T, R, pfx_f3, W0, Ln }, /* vcvtneps2bf16 */ { { 0x78 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastb */ { { 0x79 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastw */ { { 0x8c }, 2, F, R, pfx_66, Wn, Ln }, /* vpmaskmov{d,q} */ @@ -1377,6 +1378,12 @@ static const struct vex { { { 0xad }, 2, T, R, pfx_66, Wn, LIG }, /* vnmadd213s{s,d} */ { { 0xae }, 2, T, R, pfx_66, Wn, Ln }, /* vnmsub213p{s,d} */ { { 0xaf }, 2, T, R, pfx_66, Wn, LIG }, /* vnmsub213s{s,d} */ + { { 0xb0 }, 2, F, R, pfx_no, W0, Ln }, /* vcvtneoph2ps */ + { { 0xb0 }, 2, F, R, pfx_66, W0, Ln }, /* vcvtneeph2ps */ + { { 0xb0 }, 2, F, R, pfx_f3, W0, Ln }, /* vcvtneebf162ps */ + { { 0xb0 }, 2, F, R, pfx_f2, W0, Ln }, /* vcvtneobf162ps */ + { { 0xb1 }, 2, F, R, pfx_66, W0, Ln }, /* vbcstnesh2ps */ + { { 0xb1 }, 2, F, R, pfx_f3, W0, Ln }, /* vbcstnebf162ps */ { { 0xb4 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52luq */ { { 0xb5 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52huq */ { { 0xb6 }, 2, T, R, pfx_66, Wn, Ln }, /* vmaddsub231p{s,d} */ diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 55a1394e14..5592b91914 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -4400,6 +4400,39 @@ int main(int argc, char **argv) else printf("skipped\n"); + printf("%-40s", "Testing vbcstnebf162ps 2(%ecx),%ymm3..."); + if ( stack_exec && cpu_has_avx_ne_convert ) + { + decl_insn(vbcstnebf162ps); + + asm volatile ( /* vbcstnebf162ps 2(%0), %%ymm3 */ + put_insn(vbcstnebf162ps, + ".byte 0xc4, 0xe2, 0x7e, 0xb1, 0x59, 0x02 ") + :: "c" (NULL) ); + + res[0] = 0x43210000; + regs.ecx = (unsigned long)res; + set_insn(vbcstnebf162ps); + bytes_read = 0; + rc = x86_emulate(&ctxt, &emulops); + if ( rc != X86EMUL_OKAY || !check_eip(vbcstnebf162ps) || + bytes_read != 2 ) + goto fail; + + asm volatile ( "vbroadcastss %1, %%ymm2;" + "vsubps %%ymm3, %%ymm2, %%ymm1;" + "vptest %%ymm1, %%ymm1;" + "setc %b0; setz %h0" + : "=&Q" (rc) + : "m" (res[0]) ); + if ( (rc & 0xffff) != 0x0101 ) + goto fail; + + printf("okay\n"); + } + else + printf("skipped\n"); + printf("%-40s", "Testing stmxcsr (%edx)..."); if ( cpu_has_sse ) { diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index fdb4766205..256ccb9fef 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -187,6 +187,7 @@ void wrpkru(unsigned int val); #define cpu_has_avx512_bf16 (cp.feat.avx512_bf16 && xcr0_mask(0xe6)) #define cpu_has_avx_ifma (cp.feat.avx_ifma && xcr0_mask(6)) #define cpu_has_avx_vnni_int8 (cp.feat.avx_vnni_int8 && xcr0_mask(6)) +#define cpu_has_avx_ne_convert (cp.feat.avx_ne_convert && xcr0_mask(6)) #define cpu_has_xgetbv1 (cpu_has_xsave && cp.xstate.xgetbv1) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index b7740f79bf..4140ec0938 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -174,6 +174,7 @@ extern struct cpuinfo_x86 boot_cpu_data; /* CPUID level 0x00000007:1.edx */ #define cpu_has_avx_vnni_int8 boot_cpu_has(X86_FEATURE_AVX_VNNI_INT8) +#define cpu_has_avx_ne_convert boot_cpu_has(X86_FEATURE_AVX_NE_CONVERT) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c index fefbba33a6..362de670bc 100644 --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -411,6 +411,8 @@ static const struct ext0f38_table { [0xad] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, [0xae] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, [0xaf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xb0] = { .simd_size = simd_other, .two_op = 1 }, + [0xb1] = { .simd_size = simd_other, .two_op = 1 }, [0xb4 ... 0xb5] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, [0xb6 ... 0xb8] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, [0xb9] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, diff --git a/xen/arch/x86/x86_emulate/private.h b/xen/arch/x86/x86_emulate/private.h index eff03481b8..bd05a37183 100644 --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -586,6 +586,7 @@ amd_like(const struct x86_emulate_ctxt *ctxt) #define vcpu_has_wrmsrns() (ctxt->cpuid->feat.wrmsrns) #define vcpu_has_avx_ifma() (ctxt->cpuid->feat.avx_ifma) #define vcpu_has_avx_vnni_int8() (ctxt->cpuid->feat.avx_vnni_int8) +#define vcpu_has_avx_ne_convert() (ctxt->cpuid->feat.avx_ne_convert) #define vcpu_must_have(feat) \ generate_exception_if(!vcpu_has_##feat(), X86_EXC_UD) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index e049d6bb99..6ff12384ec 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -6151,6 +6151,19 @@ x86_emulate( host_and_vcpu_must_have(avx512_vbmi2); goto avx512f_no_sae; + case X86EMUL_OPC_VEX (0x0f38, 0xb0): /* vcvtneoph2ps mem,[xy]mm */ + case X86EMUL_OPC_VEX_66(0x0f38, 0xb0): /* vcvtneeph2ps mem,[xy]mm */ + case X86EMUL_OPC_VEX_F3(0x0f38, 0xb0): /* vcvtneebf162ps mem,[xy]mm */ + case X86EMUL_OPC_VEX_F2(0x0f38, 0xb0): /* vcvtneobf162ps mem,[xy]mm */ + generate_exception_if(ea.type != OP_MEM, X86_EXC_UD); + /* fall through */ + case X86EMUL_OPC_VEX_F3(0x0f38, 0x72): /* vcvtneps2bf16 [xy]mm/mem,xmm */ + host_and_vcpu_must_have(avx_ne_convert); + generate_exception_if(vex.w, X86_EXC_UD); + d |= TwoOp; + op_bytes = 16 << vex.l; + goto simd_0f_ymm; + case X86EMUL_OPC_EVEX_66(0x0f38, 0x75): /* vpermi2{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x7d): /* vpermt2{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ case X86EMUL_OPC_EVEX_66(0x0f38, 0x8d): /* vperm{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */ @@ -6680,6 +6693,13 @@ x86_emulate( break; } + case X86EMUL_OPC_VEX_66(0x0f38, 0xb1): /* vbcstnesh2ps mem,[xy]mm */ + case X86EMUL_OPC_VEX_F3(0x0f38, 0xb1): /* vbcstnebf162ps mem,[xy]mm */ + host_and_vcpu_must_have(avx_ne_convert); + generate_exception_if(vex.w || ea.type != OP_MEM, X86_EXC_UD); + op_bytes = 2; + goto simd_0f_ymm; + case X86EMUL_OPC_VEX_66(0x0f38, 0xb4): /* vpmadd52luq [xy]mm/mem,[xy]mm,[xy]mm */ case X86EMUL_OPC_VEX_66(0x0f38, 0xb5): /* vpmadd52huq [xy]mm/mem,[xy]mm,[xy]mm */ host_and_vcpu_must_have(avx_ifma); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index fc5e3ad1e8..12e3dc80c6 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -303,6 +303,7 @@ XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ XEN_CPUFEATURE(AVX_VNNI_INT8, 15*32+ 4) /*A AVX-VNNI-INT8 Instructions */ +XEN_CPUFEATURE(AVX_NE_CONVERT, 15*32+ 5) /*A AVX-NE-CONVERT Instructions */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ #endif /* XEN_CPUFEATURE */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index d77b38afa9..0edb7d4a19 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -232,7 +232,7 @@ def crunch_numbers(state): # for the XOP prefix). VEX/XOP-encoded GPR instructions, such as # those from the BMI{1,2}, TBM and LWP sets function fine in the # absence of any enabled xstate. - AVX: [FMA, FMA4, F16C, AVX2, XOP], + AVX: [FMA, FMA4, F16C, AVX2, XOP, AVX_NE_CONVERT], # This dependency exists solely for the shadow pagetable code. If the # host doesn't have NX support, the shadow pagetable code can't handle -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523772.814131 (Exim 4.92) (envelope-from ) id 1ppDtt-0004Vp-3c; Wed, 19 Apr 2023 19:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523772.814131; Wed, 19 Apr 2023 19:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDtt-0004Vh-0s; Wed, 19 Apr 2023 19:55:33 +0000 Received: by outflank-mailman (input) for mailman id 523772; Wed, 19 Apr 2023 19:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDts-0004VV-8k for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDts-000794-7u for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDts-0003Xu-6z for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TMnL8rU8BWRjRONN67Q5ZDC0e1oo09Mf1zCHioHK9fo=; b=rB5IVL8HeuETh2YG2Ya6SbpGZ9 y8eYexEvnpqqKc27EBbVdft+f64QPYcX0S0/xJSiO5dWiBLxaHwbPAret/rsXKKRpmX2SElwpx5PZ YPkGGi8d3B0IJK/zoktSUXN5HO01FfQ6+h23qYrKurNQoudshsL4D6iQTKDiCQwOOSAw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: vpl011: Fix misleading comments Message-Id: Date: Wed, 19 Apr 2023 19:55:32 +0000 commit 005e84e695ed086b9ebb281ee6711fd1aa6aaaba Author: Michal Orzel AuthorDate: Wed Apr 5 13:17:48 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Apr 17 13:00:45 2023 -0700 xen/arm: vpl011: Fix misleading comments In both vpl011_read_data() and vpl011_read_data_xen(), there is a comment stating that the guest is expected to read the DR register only if the TXFE bit of FR register is not set. This is obviously logically wrong and it should be RXFE (i.e. RX FIFO empty bit set -> nothing to read). Signed-off-by: Michal Orzel Reviewed-by: Ayan Kumar Halder Reviewed-by: Stefano Stabellini Reviewed-by: Henry Wang --- xen/arch/arm/vpl011.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index 2fa80bc15a..0186d8a318 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -143,8 +143,8 @@ static uint8_t vpl011_read_data_xen(struct domain *d) /* * It is expected that there will be data in the ring buffer when this * function is called since the guest is expected to read the data register - * only if the TXFE flag is not set. - * If the guest still does read when TXFE bit is set then 0 will be returned. + * only if the RXFE flag is not set. + * If the guest still does read when RXFE bit is set then 0 will be returned. */ if ( xencons_queued(in_prod, in_cons, sizeof(intf->in)) > 0 ) { @@ -202,8 +202,8 @@ static uint8_t vpl011_read_data(struct domain *d) /* * It is expected that there will be data in the ring buffer when this * function is called since the guest is expected to read the data register - * only if the TXFE flag is not set. - * If the guest still does read when TXFE bit is set then 0 will be returned. + * only if the RXFE flag is not set. + * If the guest still does read when RXFE bit is set then 0 will be returned. */ if ( xencons_queued(in_prod, in_cons, sizeof(intf->in)) > 0 ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523773.814135 (Exim 4.92) (envelope-from ) id 1ppDu3-0004Z8-52; Wed, 19 Apr 2023 19:55:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523773.814135; Wed, 19 Apr 2023 19:55:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDu3-0004Z0-2O; Wed, 19 Apr 2023 19:55:43 +0000 Received: by outflank-mailman (input) for mailman id 523773; Wed, 19 Apr 2023 19:55:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDu2-0004Yl-CG for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDu2-00079D-BQ for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDu2-0003Yw-AK for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ue57tfJPl1+utaLYFMVTFL2/FMPjitrQk9MJDUlmj8c=; b=J/Y75RujKm6ReeI7fc0C8T/hdI AexF92W/alt2LPCEgt27ag48t9F06oI6DFKUsSiDgDZugGpUBNbO0WHH90HzD620cUk7iAdfy/mnd jgtX55kVlG+7he06HUJc7mED4FhKYNgVBPsm+dW3DNS/PH4AwYC/bYMuB37IW/fmKXpE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: vpl011: Handle correctly TXFE when backend in Xen Message-Id: Date: Wed, 19 Apr 2023 19:55:42 +0000 commit d3784f16bbfeabde92b55ee6d5d66dcb1d82d060 Author: Michal Orzel AuthorDate: Wed Apr 5 13:17:49 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Apr 17 13:01:05 2023 -0700 xen/arm: vpl011: Handle correctly TXFE when backend in Xen When backend is in Xen, the handling of data written to DR register is a bit special because we want to tell guest that we are always ready for new data to be written (i.e. no real FIFO, TXFF/BUSY never set and TXI always set). This conflicts with the current handling of TXFE bit, which we always clear and never set on a write path (we happen to set it when we receive char from serial input due to use of vpl011_data_avail() but this might never be called). This can lead to issues if a guest driver makes use of TXFE bit to check for TX transmission completion (such guest could then wait endlessly). Fix it by keeping TXFE always set to match the current emulation logic. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini Reviewed-by: Henry Wang Tested-by: Henry Wang --- xen/arch/arm/vpl011.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index 0186d8a318..ff06deeb64 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -112,8 +112,14 @@ static void vpl011_write_data_xen(struct domain *d, uint8_t data) } } + /* + * When backend is in Xen, we tell guest we are always ready for new data + * to be written. This is fulfilled by having: + * - TXI/TXFE -> always set, + * - TXFF/BUSY -> never set. + */ vpl011->uartris |= TXI; - vpl011->uartfr &= ~TXFE; + vpl011->uartfr |= TXFE; vpl011_update_interrupt_status(d); VPL011_UNLOCK(d, flags); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:55:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:55:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523774.814138 (Exim 4.92) (envelope-from ) id 1ppDuE-0004cT-6L; Wed, 19 Apr 2023 19:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523774.814138; Wed, 19 Apr 2023 19:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuE-0004cM-3s; Wed, 19 Apr 2023 19:55:54 +0000 Received: by outflank-mailman (input) for mailman id 523774; Wed, 19 Apr 2023 19:55:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuC-0004bm-FZ for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuC-00079O-Ep for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDuC-0003ao-Dw for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:55:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JVY26flvLMC8k7svrb+YPsciTR3FFHgFyZgf04qedNs=; b=ugZhCHeDrxgXTUkGwY+EjkPAcQ lUcaDQs4ULdwoiNe9rIdh6w0i0WeBY++Ic8r8R5nibrNB+f0Q2Hx+p96S4/dfmQkLTIblwQdXCoha 9R/RKtDx4vRXdeYnIN5sAjVSXywmF7EyZo7zfrbWMlxF4ML8SbC/T7pGkXikZ3eFzMos=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: vpl011: Do not try to handle TX FIFO status when backend in Xen Message-Id: Date: Wed, 19 Apr 2023 19:55:52 +0000 commit 1213ebfb9f35920b3e0f5dff71bb917f5fb4be5f Author: Michal Orzel AuthorDate: Wed Apr 5 13:17:50 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Apr 17 13:01:34 2023 -0700 xen/arm: vpl011: Do not try to handle TX FIFO status when backend in Xen >From vpl011_rx_char_xen(), we call vpl011_data_avail() that handles both RX and TX state. Because we are passing 0 as out_fifo_level and SBSA_UART_FIFO_SIZE as out_size, we end up calling a function vpl011_update_tx_fifo_status() which performs TXI bit handling depending on the FIFO trigger level. This does not make sense when backend is in Xen, as we maintain a single TX state where data can always be written and as such there is no TX FIFO handling. Furthermore, this function assumes that the backend is in domain by making use of struct xencons_interface unconditionally. Fix it by calling this function only when backend is in domain. Also add an assert for sanity. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini Tested-by: Henry Wang --- xen/arch/arm/vpl011.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index ff06deeb64..7856b4b5f5 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -261,6 +261,9 @@ static void vpl011_update_tx_fifo_status(struct vpl011 *vpl011, struct xencons_interface *intf = vpl011->backend.dom.ring_buf; unsigned int fifo_threshold = sizeof(intf->out) - SBSA_UART_FIFO_LEVEL; + /* No TX FIFO handling when backend is in Xen */ + ASSERT(vpl011->backend_in_domain); + BUILD_BUG_ON(sizeof(intf->out) < SBSA_UART_FIFO_SIZE); /* @@ -547,7 +550,13 @@ static void vpl011_data_avail(struct domain *d, */ vpl011->uartfr &= ~BUSY; - vpl011_update_tx_fifo_status(vpl011, out_fifo_level); + /* + * When backend is in Xen, we are always ready for new data to be + * written (i.e. no TX FIFO handling), therefore we do not want + * to change the TX FIFO status in such case. + */ + if ( vpl011->backend_in_domain ) + vpl011_update_tx_fifo_status(vpl011, out_fifo_level); } vpl011_update_interrupt_status(d); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:56:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:56:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523775.814143 (Exim 4.92) (envelope-from ) id 1ppDuO-0004fc-8O; Wed, 19 Apr 2023 19:56:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523775.814143; Wed, 19 Apr 2023 19:56:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuO-0004fU-5Q; Wed, 19 Apr 2023 19:56:04 +0000 Received: by outflank-mailman (input) for mailman id 523775; Wed, 19 Apr 2023 19:56:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuM-0004fD-J0 for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuM-00079i-I3 for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDuM-0003cI-HH for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UXpOgRFATCSmhBBvmkF5RUreQlWGoY5Kmnq6ej9GS+I=; b=p8QYocKwFig4e6rRwFwhzeR81o RhOR7qFyaicWfDxp4rFGEazyA0TPH/bfdZpiAywEa3fEZDKuRakh0qepfbU2mb7vHLcZCqwUWHRDN 90KoEdPsVKB5sjkv8DmB1ET06H66i/uH4nRu9Gp32qiJH00DE13ImYuu/h2avY7+ESbA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: add EMBEDDED_EXTRA_CFLAGS to CFLAGS Message-Id: Date: Wed, 19 Apr 2023 19:56:02 +0000 commit c57cd4d45c4e54b3906171499258dbd3556855d4 Author: Oleksii Kurochko AuthorDate: Tue Apr 18 08:22:20 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 18 08:22:20 2023 +0200 xen/riscv: add EMBEDDED_EXTRA_CFLAGS to CFLAGS The patch is needed to keep all address of cpu0_boot_stack PC-relative. Pseudoinstruction 'la' can be transformed to 'auipc/addi' or 'auipc/l{w|d}'. It depends on the .option directive: nopic and pic or compiler flags. Right now, 'la' transforms to 'auipc/l{w|d}', which in case of cpu0_boot_stack[] will lead to the usage of _GLOBAL_OFFSET_TABLE_ where all addresses will be without counting that it might happen that linker address != load address ( so addresses inside got sections will be relative to linker time ). It happens becuase the compiler from riscv64 docker compiled with --enable-default-pie: [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -v Using built-in specs. COLLECT_GCC=riscv64-linux-gnu-gcc COLLECT_LTO_WRAPPER=/usr/lib/gcc/riscv64-linux-gnu/12.2.0/lto-wrapper Target: riscv64-linux-gnu Configured with: /build/riscv64-linux-gnu-gcc/src/gcc-12.2.0/configure --prefix=/usr --program-prefix=riscv64-linux-gnu- --with-local- prefix=/usr/riscv64-linux-gnu --with-sysroot=/usr/riscv64-linux-gnu -- with-build-sysroot=/usr/riscv64-linux-gnu --libdir=/usr/lib -- libexecdir=/usr/lib --target=riscv64-linux-gnu --host=x86_64-pc-linux- gnu --build=x86_64-pc-linux-gnu --with-system-zlib --with-isl --with- linker-hash-style=gnu --disable-nls --disable-libunwind-exceptions -- disable-libstdcxx-pch --disable-libssp --disable-multilib --disable- werror --enable-languages=c,c++ --enable-shared --enable-threads=posix --enable-__cxa_atexit --enable-clocale=gnu --enable-gnu-unique-object - -enable-linker-build-id --enable-lto --enable-plugin --enable-install- libiberty --enable-gnu-indirect-function --enable-default-pie --enable- checking=release Thread model: posix Supported LTO compression algorithms: zlib zstd gcc version 12.2.0 (GCC) Looking at gcc spec file for the RISC-V architecture: [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -dumpspecs | grep -i pic --traditional-format %(subtarget_asm_debugging_spec) %{fno-pie|fno- PIE|fno-pic|fno-PIC:;:-fpic} %{march=*} %{mabi=*} %{mno-relax} %{mbig- endian} %{mlittle-endian} %(subtarget_asm_spec)%{misa-spec=*} which means that -fpic is enabled if none of the following options are present on the command line: -fno-pie -fno-PIE -fno-pic -fno-PIC That's the reasons why 'la' is transformed to 'aupic/l{w|d} GOT' and not be dependent on the toolchain used. Suggested-by: Jan Beulich Suggested-by: Andrew Cooper Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Alistair Francis --- xen/arch/riscv/arch.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk index 45fe858ee0..7448f759b4 100644 --- a/xen/arch/riscv/arch.mk +++ b/xen/arch/riscv/arch.mk @@ -1,6 +1,8 @@ ######################################## # RISCV-specific definitions +$(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) + CFLAGS-$(CONFIG_RISCV_64) += -mabi=lp64 riscv-march-$(CONFIG_RISCV_ISA_RV64G) := rv64g -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:56:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:56:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523776.814148 (Exim 4.92) (envelope-from ) id 1ppDuY-0004i7-9z; Wed, 19 Apr 2023 19:56:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523776.814148; Wed, 19 Apr 2023 19:56:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuY-0004hz-6x; Wed, 19 Apr 2023 19:56:14 +0000 Received: by outflank-mailman (input) for mailman id 523776; Wed, 19 Apr 2023 19:56:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuW-0004hn-MH for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuW-00079q-LX for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDuW-0003d5-Kg for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=t1RK68BRKSjAb9ue/u6hlvIAaOwXwAvLuYCc6cMO0Tg=; b=eLIuVIUZRvbUu4+wQzheC7C/eW Gg5C9xTPiCC9EUdRovBa4ArU8Udi9cHFZRds0UqSvVcmFpuhCZ2umgE65okOLCVXzg/tJCinIVwDm SOHg9bcYu8HjSfgPFzeHAo0xaR+sb4E/IPJ/qG9BIkzTdWjIvbNq4AmYJHHdzp6Vl28k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: add explicit check that .got{.plt} is empty Message-Id: Date: Wed, 19 Apr 2023 19:56:12 +0000 commit 3146c0f10140e23594c8185568f887111e504977 Author: Oleksii Kurochko AuthorDate: Tue Apr 18 08:25:50 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 18 08:25:50 2023 +0200 xen/riscv: add explicit check that .got{.plt} is empty The GOT sections usage should be avoided in the hypervisor so to catch such use cases earlier when GOT things are produced the patch introduces .got and .got.plt sections and adds asserts that they're empty. The sections won't be created until they remain empty otherwise the asserts would cause early failure. Suggested-by: Andrew Cooper Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Acked-by: Alistair Francis --- xen/arch/riscv/xen.lds.S | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index 2ed70eccc6..31e0d3576c 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -124,6 +124,15 @@ SECTIONS *(SORT(.init_array.*)) __ctors_end = .; } :text + + .got : { + *(.got) + } : text + + .got.plt : { + *(.got.plt) + } : text + . = ALIGN(POINTER_ALIGN); __init_end = .; @@ -160,3 +169,6 @@ SECTIONS ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") + +ASSERT(!SIZEOF(.got), ".got non-empty") +ASSERT(!SIZEOF(.got.plt), ".got.plt non-empty") -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:56:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:56:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523777.814151 (Exim 4.92) (envelope-from ) id 1ppDui-0004l3-BB; Wed, 19 Apr 2023 19:56:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523777.814151; Wed, 19 Apr 2023 19:56:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDui-0004kt-8K; Wed, 19 Apr 2023 19:56:24 +0000 Received: by outflank-mailman (input) for mailman id 523777; Wed, 19 Apr 2023 19:56:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDug-0004kf-PU for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDug-0007AH-Om for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDug-0003dc-Nv for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hGwa4No14k07aNld0dFjl7KzUeF3+W6QKsrl5CxPSrk=; b=EO4J/crMmY9FugnJRPVI4LIu/j XZAds2KudKPuUPGU1lu8ZYRjK6IZZpxh7GJATaFzBczvQrSSPTyoHuJAxZWTTeL8nDsnpw9AJQAfk dQaLgIN9/N7FM2lyI/08q0rV4MPDtDHZXg1xTeOVyRYzvkEmZiztZQ9kbwE6bdhnfoIw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: move CONFIG_DEBUG_INFO out of EXPERT section Message-Id: Date: Wed, 19 Apr 2023 19:56:22 +0000 commit 14a9f07d99f314a86fc4e94d5e5577fbf3f8a3ef Author: Juergen Gross AuthorDate: Tue Apr 18 08:26:24 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 18 08:26:24 2023 +0200 xen: move CONFIG_DEBUG_INFO out of EXPERT section In order to support hypervisor analysis of crash dumps, xen-syms needs to contain debug_info. It should be allowed to configure the hypervisor to be built with CONFIG_DEBUG_INFO in non-debug builds without having to enable EXPERT. Using a rather oldish gcc (7.5) it was verified that code generation doesn't really differ between CONFIG_DEBUG_INFO on or off without CONFIG_DEBUG being set (only observed differences were slightly different symbol addresses, verified via "objdump -d", resulting from the different config.gz in the binary). The old gcc version selection was based on the assumption, that newer gcc won't regress in this regard. So move CONFIG_DEBUG_INFO out of the section guarded by EXPERT. It should be mentioned that there have been reports that the linking of the xen.efi might take considerably longer with CONFIG_DEBUG_INFO selected when using newer binutils. Signed-off-by: Juergen Gross Tested-by: Dietmar Hahn Acked-by: Jan Beulich --- xen/Kconfig.debug | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index fad3050d4f..279dbe8274 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -28,13 +28,6 @@ config GDBSX If you want to enable support for debugging guests from dom0 via gdbsx then say Y. -config DEBUG_INFO - bool "Compile Xen with debug info" - default y - ---help--- - If you say Y here the resulting Xen will include debugging info - resulting in a larger binary image. - config FRAME_POINTER bool "Compile Xen with frame pointers" default DEBUG @@ -132,4 +125,11 @@ source "arch/$(SRCARCH)/Kconfig.debug" endif # DEBUG || EXPERT +config DEBUG_INFO + bool "Compile Xen with debug info" + default DEBUG + help + If you say Y here the resulting Xen will include debugging info + resulting in a larger binary image. + endmenu -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:56:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:56:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523778.814155 (Exim 4.92) (envelope-from ) id 1ppDus-0004nK-Cl; Wed, 19 Apr 2023 19:56:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523778.814155; Wed, 19 Apr 2023 19:56:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDus-0004nC-9t; Wed, 19 Apr 2023 19:56:34 +0000 Received: by outflank-mailman (input) for mailman id 523778; Wed, 19 Apr 2023 19:56:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuq-0004n2-Sm for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDuq-0007AO-Rx for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDuq-0003eE-RA for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sB8FltMyJ9QvJBjDUcs+l0g1Ryees6dwWS99gYF8JRE=; b=omMdeUqsbPqlu1ShIyXUGRrKlQ m/IacemP9AbEI0hOmFbgrtjO1JlqyCjPzUDu5+V92fmF1CJrjMiuCGBGuCrhPBbuqf74UnuC2uiWe zwr6j4mhDrs+yR8MHnn40R915Uh+XpU/o+6lMpQJV+Xqtr6e7+TDj6e+1SlNZt5APZNQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: update CONFIG_DEBUG_INFO help text Message-Id: Date: Wed, 19 Apr 2023 19:56:32 +0000 commit cbe828581b4a1717a4331b754c25a27a41d1bc58 Author: Juergen Gross AuthorDate: Tue Apr 18 08:28:15 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 18 08:28:15 2023 +0200 xen: update CONFIG_DEBUG_INFO help text Update the help text of the CONFIG_DEBUG_INFO option to be a little bit more specific. Signed-off-by: Juergen Gross Acked-by: Jan Beulich --- xen/Kconfig.debug | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index 279dbe8274..94e818ee09 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -129,7 +129,15 @@ config DEBUG_INFO bool "Compile Xen with debug info" default DEBUG help - If you say Y here the resulting Xen will include debugging info - resulting in a larger binary image. + Say Y here if you want to build Xen with debug information. This + information is needed e.g. for doing crash dump analysis of the + hypervisor via the "crash" tool. + Saying Y will increase the size of the xen-syms and xen.efi + binaries. In case the space on the EFI boot partition is rather + limited, you may want to install a stripped variant of xen.efi in + the EFI boot partition (look for "INSTALL_EFI_STRIP" in + docs/misc/efi.pandoc for more information - when not using + "make install-xen" for installing xen.efi, stripping needs to be + done outside the Xen build environment). endmenu -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Apr 19 19:56:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 19 Apr 2023 19:56:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.523779.814159 (Exim 4.92) (envelope-from ) id 1ppDv2-0004qL-Gz; Wed, 19 Apr 2023 19:56:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 523779.814159; Wed, 19 Apr 2023 19:56:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDv2-0004qE-E8; Wed, 19 Apr 2023 19:56:44 +0000 Received: by outflank-mailman (input) for mailman id 523779; Wed, 19 Apr 2023 19:56:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDv1-0004q1-0I for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ppDv0-0007AV-Vh for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ppDv0-0003ei-Um for xen-changelog@lists.xenproject.org; Wed, 19 Apr 2023 19:56:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=piqHOUZO0tX7lZ9ucQvM65hjnKv6azTenaM1FSOhiMA=; b=ez8uwIGpS+bn8h5hX5Q8sX15Vg a7FiIyLdjj0JPTchTuAiJEjvixwk6YPqGw4so49vXmQNYGptoeBdt8DwOlbRqdSLHH/BWjaqUf648 xGp3KrenQ1l2z9s8mjZYnLEt4K27N2kzrZf24Qj6uHiah2UHGdKb0laGXho5X38rPpf0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/livepatch: Fix livepatch application when CET is active Message-Id: Date: Wed, 19 Apr 2023 19:56:42 +0000 commit 8676092a0f16ca6ad188d3fb270784a2caecf542 Author: Andrew Cooper AuthorDate: Thu Apr 13 16:52:10 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Apr 18 20:20:26 2023 +0100 x86/livepatch: Fix livepatch application when CET is active Right now, trying to apply a livepatch on any system with CET shstk (AMD Zen3 or later, Intel Tiger Lake or Sapphire Rapids and later) fails as follows: (XEN) livepatch: lp: Verifying enabled expectations for all functions (XEN) common/livepatch.c:1591: livepatch: lp: timeout is 30000000ns (XEN) common/livepatch.c:1703: livepatch: lp: CPU28 - IPIing the other 127 CPUs (XEN) livepatch: lp: Applying 1 functions (XEN) hi_func: Hi! (called 1 times) (XEN) Hook executing. (XEN) Assertion 'local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu))' failed at arch/x86/smp.c:265 (XEN) *** DOUBLE FAULT *** The assertion failure is from a global (system wide) TLB flush initiated by modify_xen_mappings(). I'm not entirely sure when this broke, and I'm not sure exactly what causes the #DF's, but it doesn't really matter either because they highlight a latent bug that I'd overlooked with the CET-SS vs patching work the first place. While we're careful to arrange for the patching CPU to avoid encountering non-shstk memory with transient shstk perms, other CPUs can pick these mappings up too if they need to re-walk for uarch reasons. Another bug is that for livepatching, we only disable CET if shadow stacks are in use. Running on Intel CET systems when Xen is only using CET-IBT will crash in arch_livepatch_quiesce() when trying to clear CR0.WP with CR4.CET still active. Also, we never went and cleared the dirty bits on .rodata. This would matter (for the same reason it matters on .text - it becomes a valid target for WRSS), but we never actually patch .rodata anyway. Therefore rework how we do patching for both alternatives and livepatches. Introduce modify_xen_mappings_lite() with a purpose similar to modify_xen_mappings(), but stripped down to the bare minimum as it's used in weird contexts. Leave all complexity to the caller to handle. Instead of patching by clearing CR0.WP (and having to jump through some fragile hoops to disable CET in order to do this), just transiently relax the permissions on .text via l2_identmap[]. Note that neither alternatives nor livepatching edit .rodata, so we don't need to relax those permissions at this juncture. The perms are relaxed globally, but this is safe enough. Alternatives run before we boot APs, and Livepatching runs in a quiesced state where the other CPUs are not doing anything interesting. This approach is far more robust. Fixes: 48cdc15a424f ("x86/alternatives: Clear CR4.CET when clearing CR0.WP") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Ross Lagerwall --- xen/arch/x86/alternative.c | 45 +++++++++++--------------- xen/arch/x86/livepatch.c | 56 +++++++++++++-------------------- xen/arch/x86/mm.c | 68 ++++++++++++++++++++++++++++++++++++++++ xen/common/virtual_region.c | 22 ++++++++++--- xen/include/xen/mm.h | 1 + xen/include/xen/virtual_region.h | 4 ++- 6 files changed, 129 insertions(+), 67 deletions(-) diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 2383fa6629..99482766b5 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -382,24 +382,28 @@ static int __init cf_check nmi_apply_alternatives( */ if ( !(alt_done & alt_todo) ) { - unsigned long cr0, cr4; - - cr0 = read_cr0(); - cr4 = read_cr4(); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4 & ~X86_CR4_CET); - - /* Disable WP to allow patching read-only pages. */ - write_cr0(cr0 & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but we run ahead of bringing APs + * online, so only have our own TLB to worry about. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RWX); + flush_local(FLUSH_TLB_GLOBAL); _apply_alternatives(__alt_instructions, __alt_instructions_end, alt_done); - write_cr0(cr0); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4); + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RX); + flush_local(FLUSH_TLB_GLOBAL); alt_done |= alt_todo; } @@ -454,19 +458,6 @@ static void __init _alternative_instructions(bool force) panic("Timed out waiting for alternatives self-NMI to hit\n"); set_nmi_callback(saved_nmi_callback); - - /* - * When Xen is using shadow stacks, the alternatives clearing CR0.WP and - * writing into the mappings set dirty bits, turning the mappings into - * shadow stack mappings. - * - * While we can execute from them, this would also permit them to be the - * target of WRSS instructions, so reset the dirty after patching. - */ - if ( cpu_has_xen_shstk ) - modify_xen_mappings(XEN_VIRT_START + MB(2), - (unsigned long)&__2M_text_end, - PAGE_HYPERVISOR_RX); } void __init alternative_instructions(void) diff --git a/xen/arch/x86/livepatch.c b/xen/arch/x86/livepatch.c index f2d783fdc5..a54d991c5f 100644 --- a/xen/arch/x86/livepatch.c +++ b/xen/arch/x86/livepatch.c @@ -61,46 +61,32 @@ int arch_livepatch_safety_check(void) int noinline arch_livepatch_quiesce(void) { - /* If Shadow Stacks are in use, disable CR4.CET so we can modify CR0.WP. */ - if ( cpu_has_xen_shstk ) - write_cr4(read_cr4() & ~X86_CR4_CET); - - /* Disable WP to allow changes to read-only pages. */ - write_cr0(read_cr0() & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but all other CPUs are waiting on us. + */ + relax_virtual_region_perms(); + flush_local(FLUSH_TLB_GLOBAL); return 0; } void noinline arch_livepatch_revive(void) { - /* Reinstate WP. */ - write_cr0(read_cr0() | X86_CR0_WP); - - /* Clobber dirty bits and reinstate CET, if applicable. */ - if ( IS_ENABLED(CONFIG_XEN_SHSTK) && cpu_has_xen_shstk ) - { - unsigned long tmp; - - reset_virtual_region_perms(); - - write_cr4(read_cr4() | X86_CR4_CET); - - /* - * Fix up the return address on the shadow stack, which currently - * points at arch_livepatch_quiesce()'s caller. - * - * Note: this is somewhat fragile, and depends on both - * arch_livepatch_{quiesce,revive}() being called from the same - * function, which is currently the case. - * - * Any error will result in Xen dying with #CP, and its too late to - * recover in any way. - */ - asm volatile ("rdsspq %[ssp];" - "wrssq %[addr], (%[ssp]);" - : [ssp] "=&r" (tmp) - : [addr] "r" (__builtin_return_address(0))); - } + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + * + * The other CPUs waiting for us could in principle have re-walked while + * we were patching and cached the reduced perms in their TLB. Therefore, + * we need to do a global TLB flush. + * + * However, we can't use Xen's normal global TLB flush infrastructure, so + * delay the TLB flush to arch_livepatch_post_action(), which is called on + * all CPUs (including us) on the way out of patching. + */ + tighten_virtual_region_perms(); } int arch_livepatch_verify_func(const struct livepatch_func *func) @@ -197,6 +183,8 @@ void noinline arch_livepatch_revert(const struct livepatch_func *func) */ void noinline arch_livepatch_post_action(void) { + /* See arch_livepatch_revive() */ + flush_local(FLUSH_TLB_GLOBAL); } static nmi_callback_t *saved_nmi_callback; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 36a07ef77e..9741d28cbc 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -91,6 +91,7 @@ #include #include #include +#include #include #include #include @@ -5879,6 +5880,73 @@ int destroy_xen_mappings(unsigned long s, unsigned long e) return modify_xen_mappings(s, e, _PAGE_NONE); } +/* + * Similar to modify_xen_mappings(), but used by the alternatives and + * livepatch in weird contexts. All synchronization, TLB flushing, etc is the + * responsibility of the caller, and *MUST* not be introduced here. + * + * Must be limited to XEN_VIRT_{START,END}, i.e. over l2_xenmap[]. + * Must be called with present flags, and over present mappings. + * It is the callers responsibility to not pass s or e in the middle of + * superpages if changing the permission on the whole superpage is going to be + * a problem. + */ +void init_or_livepatch modify_xen_mappings_lite( + unsigned long s, unsigned long e, unsigned int _nf) +{ + unsigned long v = s, fm, nf; + + /* Set of valid PTE bits which may be altered. */ +#define FLAGS_MASK (_PAGE_NX|_PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_RW|_PAGE_PRESENT) + fm = put_pte_flags(FLAGS_MASK); + nf = put_pte_flags(_nf & FLAGS_MASK); +#undef FLAGS_MASK + + ASSERT(nf & _PAGE_PRESENT); + ASSERT(IS_ALIGNED(s, PAGE_SIZE) && s >= XEN_VIRT_START); + ASSERT(IS_ALIGNED(e, PAGE_SIZE) && e <= XEN_VIRT_END); + + while ( v < e ) + { + l2_pgentry_t *pl2e = &l2_xenmap[l2_table_offset(v)]; + l2_pgentry_t l2e = l2e_read_atomic(pl2e); + unsigned int l2f = l2e_get_flags(l2e); + + ASSERT(l2f & _PAGE_PRESENT); + + if ( l2e_get_flags(l2e) & _PAGE_PSE ) + { + l2e_write_atomic(pl2e, l2e_from_intpte((l2e.l2 & ~fm) | nf)); + + v += 1UL << L2_PAGETABLE_SHIFT; + continue; + } + + /* else descend to l1 */ + { + l1_pgentry_t *pl1t = map_l1t_from_l2e(l2e); + + while ( v < e ) + { + l1_pgentry_t *pl1e = &pl1t[l1_table_offset(v)]; + l1_pgentry_t l1e = l1e_read_atomic(pl1e); + unsigned int l1f = l1e_get_flags(l1e); + + ASSERT(l1f & _PAGE_PRESENT); + + l1e_write_atomic(pl1e, l1e_from_intpte((l1e.l1 & ~fm) | nf)); + + v += 1UL << L1_PAGETABLE_SHIFT; + + if ( l2_table_offset(v) == 0 ) + break; + } + + unmap_domain_page(pl1t); + } + } +} + void __set_fixmap( enum fixed_addresses idx, unsigned long mfn, unsigned long flags) { diff --git a/xen/common/virtual_region.c b/xen/common/virtual_region.c index 30b0b4ab9c..5f89703f51 100644 --- a/xen/common/virtual_region.c +++ b/xen/common/virtual_region.c @@ -92,16 +92,28 @@ void unregister_virtual_region(struct virtual_region *r) remove_virtual_region(r); } -#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_XEN_SHSTK) -void reset_virtual_region_perms(void) +#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_X86) +void relax_virtual_region_perms(void) { const struct virtual_region *region; rcu_read_lock(&rcu_virtual_region_lock); list_for_each_entry_rcu( region, &virtual_region_list, list ) - modify_xen_mappings((unsigned long)region->start, - ROUNDUP((unsigned long)region->end, PAGE_SIZE), - PAGE_HYPERVISOR_RX); + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RWX); + rcu_read_unlock(&rcu_virtual_region_lock); +} + +void tighten_virtual_region_perms(void) +{ + const struct virtual_region *region; + + rcu_read_lock(&rcu_virtual_region_lock); + list_for_each_entry_rcu( region, &virtual_region_list, list ) + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RX); rcu_read_unlock(&rcu_virtual_region_lock); } #endif diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index 9d14aed74b..b0dc3ba9c9 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -100,6 +100,7 @@ int map_pages_to_xen( unsigned int flags); /* Alter the permissions of a range of Xen virtual address space. */ int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags); +void modify_xen_mappings_lite(unsigned long s, unsigned long e, unsigned int flags); int destroy_xen_mappings(unsigned long s, unsigned long e); /* Retrieve the MFN mapped by VA in Xen virtual address space. */ mfn_t xen_map_to_mfn(unsigned long va); diff --git a/xen/include/xen/virtual_region.h b/xen/include/xen/virtual_region.h index ba408eb87a..d053620711 100644 --- a/xen/include/xen/virtual_region.h +++ b/xen/include/xen/virtual_region.h @@ -33,7 +33,9 @@ void setup_virtual_regions(const struct exception_table_entry *start, void unregister_init_virtual_region(void); void register_virtual_region(struct virtual_region *r); void unregister_virtual_region(struct virtual_region *r); -void reset_virtual_region_perms(void); + +void relax_virtual_region_perms(void); +void tighten_virtual_region_perms(void); #endif /* __XEN_VIRTUAL_REGION_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524810.815841 (Exim 4.92) (envelope-from ) id 1pqDBj-0001yP-W0; Sat, 22 Apr 2023 13:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524810.815841; Sat, 22 Apr 2023 13:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBj-0001yH-T3; Sat, 22 Apr 2023 13:22:03 +0000 Received: by outflank-mailman (input) for mailman id 524810; Sat, 22 Apr 2023 13:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBi-0001y9-Ik for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBi-0007sQ-Hn for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDBi-0001Ny-Gm for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=s0BE8m5PQm3mxr74tPF8mIswlpp2kwpQ2HlG0Ne9xFo=; b=l8RSR2Ew7uBIszr/9YlH0vIvol cpr5TjNSbV+XdqYjYBvJ5bVeNRyrVL8p/w/C99VXDOqgD/bCxKsfLFbETnFtFdGtdiirZFsNg92BF 94RiSmM3t9nUMMax71y1s+HA/s08FkyUqroUIepbSigYy7phTW/7GK3MXE1kHKxPHzjw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tests/cpu-policy: fix "run" goal Message-Id: Date: Sat, 22 Apr 2023 13:22:02 +0000 commit 224211c55bdded74c5a65f5a7e34281a8c5c56f2 Author: Jan Beulich AuthorDate: Wed Apr 19 11:00:19 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 19 11:00:19 2023 +0200 tests/cpu-policy: fix "run" goal An earlier change converted TARGET-y to TARGETS, but failed to replace all references. Convert run's dependency, but use $< in the command to avoid the leading blank that += inserts. Fixes: 6a9f5477637a ("tests/cpu-policy: Rework Makefile") Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- tools/tests/cpu-policy/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/tests/cpu-policy/Makefile b/tools/tests/cpu-policy/Makefile index c5b81afc71..5df9b1ebbd 100644 --- a/tools/tests/cpu-policy/Makefile +++ b/tools/tests/cpu-policy/Makefile @@ -16,8 +16,8 @@ endif all: $(TARGETS) .PHONY: run -run: $(TARGET-y) - ./$(TARGET-y) +run: $(TARGETS) + ./$< .PHONY: clean clean: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524811.815845 (Exim 4.92) (envelope-from ) id 1pqDBu-00020K-1K; Sat, 22 Apr 2023 13:22:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524811.815845; Sat, 22 Apr 2023 13:22:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBt-00020B-Uk; Sat, 22 Apr 2023 13:22:13 +0000 Received: by outflank-mailman (input) for mailman id 524811; Sat, 22 Apr 2023 13:22:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBt-000201-2J for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDBs-0007sY-Ls for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDBs-0001OT-KS for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Yz0YzNyT/DtbRvnR5vIHIZZwWdls0n3f9WMh20cWGIM=; b=jLjn0SsFORQ0A3C0XdmQ5Lz4db JkPi8WZrtAcj3/vky2vU386zKpKKWhSFn4PyhpD91Qja8swcBqdKWu7z9GDJD962UZUmzRvpp8Yc8 8vdjEPKGrBMflPaW4mksUr05MrKKWqRPXr3f2Vpfr0SxslTKAJQ0VQ8X10AVa3Dv56Kc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: cpu{id,}_policy_updated() can be static Message-Id: Date: Sat, 22 Apr 2023 13:22:12 +0000 commit 741599fa521fbbb4cf71a98d7ec22ba5f4671cfa Author: Jan Beulich AuthorDate: Wed Apr 19 11:01:29 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 19 11:01:29 2023 +0200 x86: cpu{id,}_policy_updated() can be static The function merely needs moving earlier in the file to avoid the need for a forward declaration. While moving it, also rename it following the recent folding of CPUID and MSR policies. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- xen/arch/x86/domain.c | 24 ++++++++++++------------ xen/arch/x86/include/asm/domain.h | 2 -- 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 596233418a..39c2153165 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -281,6 +281,16 @@ void update_guest_memory_policy(struct vcpu *v, } } +/* + * Called during vcpu construction, and each time the toolstack changes the + * CPU policy configuration for the domain. + */ +static void cpu_policy_updated(struct vcpu *v) +{ + if ( is_hvm_vcpu(v) ) + hvm_cpuid_policy_changed(v); +} + void domain_cpu_policy_changed(struct domain *d) { const struct cpu_policy *p = d->arch.cpu_policy; @@ -439,7 +449,7 @@ void domain_cpu_policy_changed(struct domain *d) for_each_vcpu ( d, v ) { - cpuid_policy_updated(v); + cpu_policy_updated(v); /* If PMU version is zero then the guest doesn't have VPMU */ if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && @@ -584,7 +594,7 @@ int arch_vcpu_create(struct vcpu *v) { vpmu_initialise(v); - cpuid_policy_updated(v); + cpu_policy_updated(v); } return rc; @@ -2413,16 +2423,6 @@ int domain_relinquish_resources(struct domain *d) return 0; } -/* - * Called during vcpu construction, and each time the toolstack changes the - * CPUID configuration for the domain. - */ -void cpuid_policy_updated(struct vcpu *v) -{ - if ( is_hvm_vcpu(v) ) - hvm_cpuid_policy_changed(v); -} - void arch_dump_domain_info(struct domain *d) { paging_dump_domain_info(d); diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 899ca7f70f..ad5729d5c2 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -83,8 +83,6 @@ void toggle_guest_mode(struct vcpu *); /* x86/64: toggle guest page tables between kernel and user modes. */ void toggle_guest_pt(struct vcpu *); -void cpuid_policy_updated(struct vcpu *v); - /* * Initialise a hypercall-transfer page. The given pointer must be mapped * in Xen virtual address space (accesses are not validated or checked). -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524812.815849 (Exim 4.92) (envelope-from ) id 1pqDC4-00023g-2r; Sat, 22 Apr 2023 13:22:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524812.815849; Sat, 22 Apr 2023 13:22:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDC4-00023Z-01; Sat, 22 Apr 2023 13:22:24 +0000 Received: by outflank-mailman (input) for mailman id 524812; Sat, 22 Apr 2023 13:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDC2-00023F-Qf for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDC2-0007sh-Pj for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDC2-0001Os-Oa for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/ArrG5Kt/HuLpxIDiXiA3YzGiXoHT+kw2xVqXATnv/g=; b=O+dCfT5HNv+70WUFYYQecwO5wG xFHsco2zDwE4hjzGjPtT/m4c++T0yPXoe2hIVsLHwQA/W7s70Bio1ceqbdq8fkmphj0mH6wDV7PGh Qhk3boCre9c4K5zryqinYefDFjRe3Rly1xfethZqv0yHPsS4dLg6+fqxxOQfNVobKJwI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: fix build with old gcc after CPU policy changes Message-Id: Date: Sat, 22 Apr 2023 13:22:22 +0000 commit 768846690d64bc730c1a1123e8de3af731bb2eb3 Author: Jan Beulich AuthorDate: Wed Apr 19 11:02:47 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 19 11:02:47 2023 +0200 x86: fix build with old gcc after CPU policy changes Old gcc won't cope with initializers involving unnamed struct/union fields. Fixes: 441b1b2a50ea ("x86/emul: Switch x86_emulate_ctxt to cpu_policy") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 4 +++- xen/arch/x86/pv/emul-priv-op.c | 4 +++- xen/arch/x86/pv/ro-page-fault.c | 4 +++- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 4885a68210..eeeb6931f4 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -893,12 +893,14 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; int rc; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.cpu_policy = &cp; + /* Reset all global state variables */ memset(&input, 0, sizeof(input)); diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index ce907f686e..aae38da089 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1313,12 +1313,14 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; unsigned int eflags, ar; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.ctxt.cpu_policy = currd->arch.cpu_policy; + if ( !pv_emul_read_descriptor(regs->cs, curr, &ctxt.cs.base, &ctxt.cs.limit, &ar, 1) || !(ar & _SEGMENT_S) || diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 3dcdf07296..cad28ef928 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -344,7 +344,6 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, @@ -352,6 +351,9 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) int rc; bool mmio_ro; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.cpu_policy = currd->arch.cpu_policy; + /* Attempt to read the PTE that maps the VA being accessed. */ pte = guest_get_eff_kern_l1e(addr); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524813.815853 (Exim 4.92) (envelope-from ) id 1pqDCE-00026j-4C; Sat, 22 Apr 2023 13:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524813.815853; Sat, 22 Apr 2023 13:22:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCE-00026a-1Y; Sat, 22 Apr 2023 13:22:34 +0000 Received: by outflank-mailman (input) for mailman id 524813; Sat, 22 Apr 2023 13:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCC-00026Q-Tz for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCC-0007sr-TC for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDCC-0001PM-S8 for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yc8RqAYUmrzqVpAiKxhjNheuvv33ubUKgVnLik8W+qk=; b=etXEtesUZLuQ6T1N997Z6b0Wh3 RB8ytEeU8sAdTEaOZ95V9AI0MC3xDqkbfJKiXmVlRV9ATpx6VqAd1SF09VeGv0pOGXZaEMEQPvgVO o91ewjmX/OfnNi3VGwf5vRS8zjhn4Sk7xqMTUItp6mjOMYspTq8RHPQ3iMBRvYtfnHyU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CHANGELOG: add gnttab_max_{maptrack_,}frames option changes Message-Id: Date: Sat, 22 Apr 2023 13:22:32 +0000 commit 569632a5832c02bd84790e0411940b8d3150fa17 Author: Roger Pau Monné AuthorDate: Wed Apr 19 11:03:30 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 19 11:03:30 2023 +0200 CHANGELOG: add gnttab_max_{maptrack_,}frames option changes Note in the changelog that the purpose of gnttab_max_{maptrack_,}frames command line options has been changed. Fixes: b2ea81d2b935 ('xen/grants: repurpose command line max options') Signed-off-by: Roger Pau Monné Acked-by: Henry Wang --- CHANGELOG.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index c978cfd9b6..5dbf8b06d7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -6,6 +6,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ## [unstable UNRELEASED](https://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD +### Changed + - Repurpose command line gnttab_max_{maptrack_,}frames options so they don't + cap toolstack provided values. + ### Added - On x86, support for features new in Intel Sapphire Rapids CPUs: - PKS (Protection Key Supervisor) available to HVM/PVH guests. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524814.815857 (Exim 4.92) (envelope-from ) id 1pqDCO-00029Y-5h; Sat, 22 Apr 2023 13:22:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524814.815857; Sat, 22 Apr 2023 13:22:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCO-00029Q-32; Sat, 22 Apr 2023 13:22:44 +0000 Received: by outflank-mailman (input) for mailman id 524814; Sat, 22 Apr 2023 13:22:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCN-00029E-1P for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCN-0007t0-0a for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDCM-0001Q2-Vn for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=chKysVBpngiuhvRlWoVcE5oFZJmpMcV0jThPlDzoGt4=; b=WU5Qid2n3mg9rNiswk9dwxXEZh smwp/BCMTQZXuve30EtSeJbpNDR6FX5fk64t1OxHPNms1SP973yBVHs2tAw7eJ5hebhe6uvTVoheQ KTzWilDoWpkTy1HbptIR6jA+0g3USCNXaR3zpRZ/g5j2VkstcJuwQylIgWSs+2RRDJcg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/ELF: Fix ELF32 PRI formatters Message-Id: Date: Sat, 22 Apr 2023 13:22:42 +0000 commit cfa2bb82c01f0c656804cedd8f44eb2a99a2b5bc Author: Andrew Cooper AuthorDate: Sun Apr 16 01:29:09 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 19 15:55:29 2023 +0100 xen/ELF: Fix ELF32 PRI formatters It is rude to hide width formatting inside a PRI* macro, doubly so when it's only in one bitness of the macro. However its fully buggy when all the users use %#"PRI because then it expands to the common trap of %#08x which does not do what the author intends. Switch the 32bit ELF PRI formatters to use plain integer PRI's, just like on the 64bit side already. No practical change. Fixes: 7597fabca76e ("livepatch: Include sizes when an mismatch occurs") Fixes: 380b229634f8 ("xsplice: Implement payload loading") Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Ross Lagerwall --- xen/include/xen/elfstructs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index 06e6f87c3d..3124469fae 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -561,8 +561,8 @@ typedef struct { #endif #if defined(ELFSIZE) && (ELFSIZE == 32) -#define PRIxElfAddr "08x" -#define PRIuElfWord "8u" +#define PRIxElfAddr PRIx32 +#define PRIuElfWord PRIu32 #define Elf_Ehdr Elf32_Ehdr #define Elf_Phdr Elf32_Phdr -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:22:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:22:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524816.815861 (Exim 4.92) (envelope-from ) id 1pqDCY-0002CT-75; Sat, 22 Apr 2023 13:22:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524816.815861; Sat, 22 Apr 2023 13:22:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCY-0002CM-4Z; Sat, 22 Apr 2023 13:22:54 +0000 Received: by outflank-mailman (input) for mailman id 524816; Sat, 22 Apr 2023 13:22:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCX-0002CA-52 for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDCX-0007tA-4H for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDCX-0001QW-3D for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:22:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Xsvvu1LsFtaDxtEuORXhognPxvaf9xgMHmVb0GWV9+4=; b=XlJW00Pilh3p7Lz7GQ+jo2N4mq OUU9IKvb5F2MHbgHiw/rg199qfbNFB+SiMZyMDvNaYDt9L0f1sBqkoMr3NI32jmJB+ARMQCG86u56 88NJrkI5s8ww4+BecAPZVeLA1nAzQQv8ORH1ONb+Z3D9NTzqNsKCRUm423rE5LDwjE7s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm/alternatives: Rename alt_instr fields which are used in common code Message-Id: Date: Sat, 22 Apr 2023 13:22:53 +0000 commit 418cf59c4e29451010d7efb3835b900690d19866 Author: Andrew Cooper AuthorDate: Sun Apr 16 01:10:43 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 19 15:55:30 2023 +0100 arm/alternatives: Rename alt_instr fields which are used in common code Alternatives auditing for livepatches is currently broken. To fix it, the livepatch code needs to inspect more fields of alt_instr. Rename ARM's fields to match x86's, because: * ARM already exposes alt_offset under the repl name via ALT_REPL_PTR(). * "alt" is ambiguous in a structure entirely about alternatives already. * "repl", being the same width as orig leads to slightly neater code. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini --- xen/arch/arm/alternative.c | 6 +++--- xen/arch/arm/include/asm/alternative.h | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/alternative.c b/xen/arch/arm/alternative.c index f00e3b9b3c..7366af4ea6 100644 --- a/xen/arch/arm/alternative.c +++ b/xen/arch/arm/alternative.c @@ -44,7 +44,7 @@ static bool branch_insn_requires_update(const struct alt_instr *alt, return true; replptr = (unsigned long)ALT_REPL_PTR(alt); - if ( pc >= replptr && pc <= (replptr + alt->alt_len) ) + if ( pc >= replptr && pc <= (replptr + alt->repl_len) ) return false; /* @@ -128,9 +128,9 @@ static int __apply_alternatives(const struct alt_region *region, continue; if ( alt->cpufeature == ARM_CB_PATCH ) - BUG_ON(alt->alt_len != 0); + BUG_ON(alt->repl_len != 0); else - BUG_ON(alt->alt_len != alt->orig_len); + BUG_ON(alt->repl_len != alt->orig_len); origptr = ALT_ORIG_PTR(alt); updptr = (void *)origptr + update_offset; diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/asm/alternative.h index 1eb4b60fbb..d3210e82f9 100644 --- a/xen/arch/arm/include/asm/alternative.h +++ b/xen/arch/arm/include/asm/alternative.h @@ -13,16 +13,16 @@ struct alt_instr { s32 orig_offset; /* offset to original instruction */ - s32 alt_offset; /* offset to replacement instruction */ + s32 repl_offset; /* offset to replacement instruction */ u16 cpufeature; /* cpufeature bit set for replacement */ u8 orig_len; /* size of original instruction(s) */ - u8 alt_len; /* size of new instruction(s), <= orig_len */ + u8 repl_len; /* size of new instruction(s), <= orig_len */ }; /* Xen: helpers used by common code. */ #define __ALT_PTR(a,f) ((void *)&(a)->f + (a)->f) #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset) -#define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset) +#define ALT_REPL_PTR(a) __ALT_PTR(a, repl_offset) typedef void (*alternative_cb_t)(const struct alt_instr *alt, const uint32_t *origptr, uint32_t *updptr, @@ -90,12 +90,12 @@ int apply_alternatives(const struct alt_instr *start, const struct alt_instr *en #include #include -.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len +.macro altinstruction_entry orig_offset repl_offset feature orig_len repl_len .word \orig_offset - . - .word \alt_offset - . + .word \repl_offset - . .hword \feature .byte \orig_len - .byte \alt_len + .byte \repl_len .endm .macro alternative_insn insn1, insn2, cap, enable = 1 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524817.815866 (Exim 4.92) (envelope-from ) id 1pqDCi-0002FI-9m; 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Sat, 22 Apr 2023 13:23:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ddx7Q0w0edqgVWMn4L0R73S5lsVro9vghvDtthXxjoU=; b=1og2zDwkorUwUVk7AV7s3CQBAb nZJM0Y0UKzicLLfBqSioCcc1emLfR8dlPwygyFkh24gQTn/poGz65fE6PSIQN/sV1Y7TJq2TmuAEb n6JoFh3oUIfLzb5GWy43WMqwezjdppiIikTCT2NxpXt08qtHwJmq3YIR9tMY5SxjROIM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/livepatch: Fix .altinstructions safety checks Message-Id: Date: Sat, 22 Apr 2023 13:23:03 +0000 commit e74360e4ba4a6b6827a44f8b1b22a0ec4311694a Author: Andrew Cooper AuthorDate: Thu Apr 13 20:56:15 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Apr 19 15:55:30 2023 +0100 xen/livepatch: Fix .altinstructions safety checks The prior check has && vs || mixups, making it tautologically false and thus providing no safety at all. There are boundary errors too. First start with a comment describing how the .altinstructions and .altinstr_replacement sections interact, and perform suitable cross-checking. Second, rewrite the alt_instr loop entirely from scratch. Origin sites have non-zero size, and must be fully contained within the livepatches .text section(s). Any non-zero sized replacements must be fully contained within the .altinstr_replacement section. Fixes: f8a10174e8b1 ("xsplice: Add support for alternatives") Signed-off-by: Andrew Cooper Reviewed-by: Ross Lagerwall --- xen/common/livepatch.c | 68 ++++++++++++++++++++++++++++++++++++++++---- xen/include/xen/elfstructs.h | 2 ++ 2 files changed, 64 insertions(+), 6 deletions(-) diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c index d385f882c6..d89a904bd4 100644 --- a/xen/common/livepatch.c +++ b/xen/common/livepatch.c @@ -808,28 +808,84 @@ static int prepare_payload(struct payload *payload, if ( sec ) { #ifdef CONFIG_HAS_ALTERNATIVE + /* + * (As of April 2023), Alternatives are formed of: + * - An .altinstructions section with an array of struct alt_instr's. + * - An .altinstr_replacement section containing instructions. + * + * An individual alt_instr contains: + * - An orig reference, pointing into .text with a nonzero length + * - A repl reference, pointing into .altinstr_replacement + * + * It is legal to have zero-length replacements, meaning it is legal + * for the .altinstr_replacement section to be empty too. An + * implementation detail means that a zero-length replacement's repl + * reference will still be in the .altinstr_replacement section. + */ + const struct livepatch_elf_sec *repl_sec; struct alt_instr *a, *start, *end; if ( !section_ok(elf, sec, sizeof(*a)) ) return -EINVAL; + /* Tolerate an empty .altinstructions section... */ + if ( sec->sec->sh_size == 0 ) + goto alt_done; + + /* ... but otherwise, there needs to be something to alter... */ + if ( payload->text_size == 0 ) + { + printk(XENLOG_ERR LIVEPATCH "%s Alternatives provided, but no .text\n", + elf->name); + return -EINVAL; + } + + /* ... and something to be altered to. */ + repl_sec = livepatch_elf_sec_by_name(elf, ".altinstr_replacement"); + if ( !repl_sec ) + { + printk(XENLOG_ERR LIVEPATCH "%s .altinstructions provided, but no .altinstr_replacement\n", + elf->name); + return -EINVAL; + } + start = sec->load_addr; end = sec->load_addr + sec->sec->sh_size; for ( a = start; a < end; a++ ) { - const void *instr = ALT_ORIG_PTR(a); - const void *replacement = ALT_REPL_PTR(a); + const void *orig = ALT_ORIG_PTR(a); + const void *repl = ALT_REPL_PTR(a); + + /* orig must be fully within .text. */ + if ( orig < payload->text_addr || + a->orig_len > payload->text_size || + orig + a->orig_len > payload->text_addr + payload->text_size ) + { + printk(XENLOG_ERR LIVEPATCH + "%s Alternative orig %p+%#x outside payload text %p+%#zx\n", + elf->name, orig, a->orig_len, + payload->text_addr, payload->text_size); + return -EINVAL; + } - if ( (instr < region->start && instr >= region->end) || - (replacement < region->start && replacement >= region->end) ) + /* + * repl must be fully within .altinstr_replacement, even if the + * replacement and the section happen to both have zero length. + */ + if ( repl < repl_sec->load_addr || + a->repl_len > repl_sec->sec->sh_size || + repl + a->repl_len > repl_sec->load_addr + repl_sec->sec->sh_size ) { - printk(XENLOG_ERR LIVEPATCH "%s Alt patching outside payload: %p\n", - elf->name, instr); + printk(XENLOG_ERR LIVEPATCH + "%s Alternative repl %p+%#x outside .altinstr_replacement %p+%#"PRIxElfWord"\n", + elf->name, repl, a->repl_len, + repl_sec->load_addr, repl_sec->sec->sh_size); return -EINVAL; } } apply_alternatives(start, end); + alt_done:; #else printk(XENLOG_ERR LIVEPATCH "%s: We don't support alternative patching\n", elf->name); diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index 3124469fae..eb6b87a823 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -563,6 +563,7 @@ typedef struct { #if defined(ELFSIZE) && (ELFSIZE == 32) #define PRIxElfAddr PRIx32 #define PRIuElfWord PRIu32 +#define PRIxElfWord PRIx32 #define Elf_Ehdr Elf32_Ehdr #define Elf_Phdr Elf32_Phdr @@ -591,6 +592,7 @@ typedef struct { #elif defined(ELFSIZE) && (ELFSIZE == 64) #define PRIxElfAddr PRIx64 #define PRIuElfWord PRIu64 +#define PRIxElfWord PRIx64 #define Elf_Ehdr Elf64_Ehdr #define Elf_Phdr Elf64_Phdr -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524818.815869 (Exim 4.92) (envelope-from ) id 1pqDCs-0002IP-CH; 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Sat, 22 Apr 2023 13:23:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=F64xHKL+1ZUGMDeXSckOjnXX3lW4yRaNadFE7PU2sAo=; b=LixYVXmoi92vdTiScklSYyPupH p0PqH398IwcVDH47dSnxAY2bTIwD1TcyN4FAvxp/bHYFMP05HC2yb5rBq6kAu9Zu13zNmNHeEJUM5 NENB/bS2oUMdVAESOFF/2Bki6CgOPnHKQtIn8x5rhhB+Pq5ciraAs1ZYiI6j6mhpIciE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: mark __guest_cmpxchg always_inline Message-Id: Date: Sat, 22 Apr 2023 13:23:13 +0000 commit 0678220defe2b5183a4e33ceeb58780cccce9ac5 Author: Stewart Hildebrand AuthorDate: Fri Apr 14 14:57:12 2023 -0400 Commit: Julien Grall CommitDate: Wed Apr 19 19:26:28 2023 +0100 xen/arm: mark __guest_cmpxchg always_inline When building the hypervisor with -Og, we run into a __bad_cmpxchg link error: aarch64-none-linux-gnu-ld: prelink.o: in function `__int_cmpxchg': .../xen/./arch/arm/include/asm/arm64/cmpxchg.h:117: undefined reference to `__bad_cmpxchg' aarch64-none-linux-gnu-ld: .../xen/./arch/arm/include/asm/arm64/cmpxchg.h:117: undefined reference to `__bad_cmpxchg' aarch64-none-linux-gnu-ld: ./.xen-syms.0: hidden symbol `__bad_cmpxchg' isn't defined aarch64-none-linux-gnu-ld: final link failed: bad value This is due to the function __guest_cmpxchg not being inlined in the -Og build with gcc 12. Fix this by marking __guest_cmpxchg always_inline. Signed-off-by: Stewart Hildebrand Reviewed-by: Julien Grall Reviewed-by: Henry Wang --- xen/arch/arm/include/asm/guest_atomics.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/include/asm/guest_atomics.h b/xen/arch/arm/include/asm/guest_atomics.h index 9e2e96d4ff..a1745f8613 100644 --- a/xen/arch/arm/include/asm/guest_atomics.h +++ b/xen/arch/arm/include/asm/guest_atomics.h @@ -86,11 +86,11 @@ static inline void guest_clear_mask16(struct domain *d, uint16_t mask, domain_unpause(d); } -static inline unsigned long __guest_cmpxchg(struct domain *d, - volatile void *ptr, - unsigned long old, - unsigned long new, - unsigned int size) +static always_inline unsigned long __guest_cmpxchg(struct domain *d, + volatile void *ptr, + unsigned long old, + unsigned long new, + unsigned int size) { unsigned long oldval = old; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524819.815873 (Exim 4.92) (envelope-from ) id 1pqDD2-0002LH-DW; Sat, 22 Apr 2023 13:23:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524819.815873; Sat, 22 Apr 2023 13:23:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDD2-0002L9-Ar; Sat, 22 Apr 2023 13:23:24 +0000 Received: by outflank-mailman (input) for mailman id 524819; Sat, 22 Apr 2023 13:23:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDD1-0002Kt-G0 for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDD1-0007uJ-FC for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDD1-0001SQ-E5 for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=koZ1PpHzvCMz6H0wqSW8YsBE6It45MNoYMypAqttFmQ=; b=gDgZ/3dKosVEWhVJWd854ghgkP 8pYVFSCBtYuwExqH8l0ZBF1ua7gGCli+vSQhWdMFytDlpuk5bHwt0BTnCvPOauPNONxNZTw0vwMCU +vvn/UPMTlhQK4t91PdvIvVsiAp4kFM4OToLe3m8O7f8/67FDQ+lUQpWFn2HeygKnSok=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: fix uninitialized use warning Message-Id: Date: Sat, 22 Apr 2023 13:23:23 +0000 commit 3adcfbd316c9e82b2ad311450f21f330bfdc1f41 Author: Stewart Hildebrand AuthorDate: Fri Apr 14 14:57:14 2023 -0400 Commit: Julien Grall CommitDate: Wed Apr 19 19:28:27 2023 +0100 xen/arm: fix uninitialized use warning When building the hypervisor with -Og and GCC 11/12, we encounter the following error: arch/arm/domain_build.c: In function ‘make_cpus_node’: arch/arm/domain_build.c:2040:12: error: ‘clock_valid’ may be used uninitialized [-Werror=maybe-uninitialized] 2040 | if ( clock_valid ) | ^ arch/arm/domain_build.c:1947:10: note: ‘clock_valid’ was declared here 1947 | bool clock_valid; | ^~~~~~~~~~~ cc1: all warnings being treated as errors Fix it by initializing the variable. Signed-off-by: Stewart Hildebrand Reviewed-by: Henry Wang Reviewed-by: Julien Grall --- xen/arch/arm/domain_build.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 4f9d4f9d88..f80fdd1af2 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1944,7 +1944,8 @@ static int __init make_cpus_node(const struct domain *d, void *fdt) /* Placeholder for cpu@ + a 32-bit hexadecimal number + \0 */ char buf[13]; u32 clock_frequency; - bool clock_valid; + /* Keep the compiler happy with -Og */ + bool clock_valid = false; uint64_t mpidr_aff; dt_dprintk("Create cpus node\n"); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524820.815877 (Exim 4.92) (envelope-from ) id 1pqDDC-0002Ne-F0; Sat, 22 Apr 2023 13:23:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524820.815877; Sat, 22 Apr 2023 13:23:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDC-0002NW-CF; Sat, 22 Apr 2023 13:23:34 +0000 Received: by outflank-mailman (input) for mailman id 524820; Sat, 22 Apr 2023 13:23:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDB-0002NO-JW for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDB-0007uQ-Ij for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDDB-0001T2-Hn for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9cNJA6tiZiF3EMjvNF0N0I5OycG6Z0XpqqExgHRlL54=; b=fc/as4BzKaitMr1bd6zDyjIHgx 1r6kF53fqG4uuVJEhCpgHwL6qqKkn5n+2fMXNlciEhHo8otBiOelWHjlXbTlcFmbbul653OZP+V1g 2X/ocmnZBE8U7K3YNONhovGymHLOSR067fiEAIiri39P9aTxIUVD3v4FcApZhnFnoggU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore/xenstored_control.c: correctly print time_t Message-Id: Date: Sat, 22 Apr 2023 13:23:33 +0000 commit b33a5c5929bce66302fbfd680ac5b4091886079e Author: Alexander Kanavin AuthorDate: Wed Apr 19 14:07:09 2023 +0200 Commit: Julien Grall CommitDate: Wed Apr 19 19:31:04 2023 +0100 tools/xenstore/xenstored_control.c: correctly print time_t On 32 bit systems with 64 bit time_t (hello, Y2038 problem), the following error occurs otherwise: | xenstored_control.c: In function 'lu_reject_reason': | xenstored_control.c:646:70: error: format '%ld' expects argument of type 'long int', but argument 5 has type 'time_t' {aka 'long long int'} [-Werror=format=] Signed-off-by: Alexander Kanavin Reviewed-by: Juergen Gross --- tools/xenstore/xenstored_control.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/xenstore/xenstored_control.c b/tools/xenstore/xenstored_control.c index cbd62556c3..403295788a 100644 --- a/tools/xenstore/xenstored_control.c +++ b/tools/xenstore/xenstored_control.c @@ -666,12 +666,12 @@ static const char *lu_reject_reason(const void *ctx) time_t now = time(NULL); list_for_each_entry(conn, &connections, list) { - if (conn->ta_start_time && - (now - conn->ta_start_time >= lu_status->timeout)) { + unsigned long tdiff = now - conn->ta_start_time; + + if (conn->ta_start_time && (tdiff >= lu_status->timeout)) { ret = talloc_asprintf(ctx, "%s\nDomain %u: %ld s", ret ? : "Domains with long running transactions:", - conn->id, - now - conn->ta_start_time); + conn->id, tdiff); } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524821.815881 (Exim 4.92) (envelope-from ) id 1pqDDN-0002Qz-GI; Sat, 22 Apr 2023 13:23:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524821.815881; Sat, 22 Apr 2023 13:23:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDN-0002Qr-Dg; Sat, 22 Apr 2023 13:23:45 +0000 Received: by outflank-mailman (input) for mailman id 524821; Sat, 22 Apr 2023 13:23:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDL-0002Qc-NG for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDL-0007uX-MF for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDDL-0001TU-LR for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4y8JK/xWzUp9W7E1HsZ7Wfk4DJgyUxV+AuX3LeA8Elw=; b=qC0OwR0hiX2jgho+E5XtHKX69s ZfcMp++3lr0UzMy7DpukW72m9uooiQ4ncZd6FwsH/ap7pJwbEKmVm9X1JhvShdqxxKK7YkrjfA/tW V+gdHcNzTKGj2FWW4Xs46SPrDH+Ss6glCV+fXUKAjTNDbhIDEoYvO3FoF+tgh4ZWCmno=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm32: head: Widen the use of the temporary mapping Message-Id: Date: Sat, 22 Apr 2023 13:23:43 +0000 commit eed3ae84bcd10a69c24c3cb4b0b98e070bc65ee4 Author: Julien Grall AuthorDate: Sun Apr 16 15:32:07 2023 +0100 Commit: Julien Grall CommitDate: Wed Apr 19 19:39:46 2023 +0100 xen/arm32: head: Widen the use of the temporary mapping At the moment, the temporary mapping is only used when the virtual runtime region of Xen is clashing with the physical region. In follow-up patches, we will rework how secondary CPU bring-up works and it will be convenient to use the fixmap area for accessing the root page-table (it is per-cpu). Rework the code to use temporary mapping when the Xen physical address is not overlapping with the temporary mapping. This also has the advantage to simplify the logic to identity map Xen. Signed-off-by: Julien Grall Reviewed-by: Henry Wang Tested-by: Henry Wang Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis --- xen/arch/arm/arm32/head.S | 86 +++++++++-------------------------------------- 1 file changed, 16 insertions(+), 70 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index f9f7be9588..5168eb4588 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -459,7 +459,6 @@ ENDPROC(cpu_init) create_page_tables: /* Prepare the page-tables for mapping Xen */ mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 create_table_entry boot_second, boot_third, r0, 2 /* Setup boot_third: */ @@ -479,70 +478,37 @@ create_page_tables: cmp r1, #(XEN_PT_LPAE_ENTRIES<<3) /* 512*8-byte entries per page */ blo 1b - /* - * If Xen is loaded at exactly XEN_VIRT_START then we don't - * need an additional 1:1 mapping, the virtual mapping will - * suffice. - */ - cmp r9, #XEN_VIRT_START - moveq pc, lr - /* * Setup the 1:1 mapping so we can turn the MMU on. Note that * only the first page of Xen will be part of the 1:1 mapping. - * - * In all the cases, we will link boot_third_id. So create the - * mapping in advance. */ + create_table_entry boot_pgtable, boot_second_id, r9, 1 + create_table_entry boot_second_id, boot_third_id, r9, 2 create_mapping_entry boot_third_id, r9, r9 /* - * Find the first slot used. If the slot is not XEN_FIRST_SLOT, - * then the 1:1 mapping will use its own set of page-tables from - * the second level. + * Find the first slot used. If the slot is not the same + * as TEMPORARY_AREA_FIRST_SLOT, then we will want to switch + * to the temporary mapping before jumping to the runtime + * virtual mapping. */ get_table_slot r1, r9, 1 /* r1 := first slot */ - cmp r1, #XEN_FIRST_SLOT - beq 1f - create_table_entry boot_pgtable, boot_second_id, r9, 1 - b link_from_second_id - -1: - /* - * Find the second slot used. If the slot is XEN_SECOND_SLOT, then the - * 1:1 mapping will use its own set of page-tables from the - * third level. - */ - get_table_slot r1, r9, 2 /* r1 := second slot */ - cmp r1, #XEN_SECOND_SLOT - beq virtphys_clash - create_table_entry boot_second, boot_third_id, r9, 2 - b link_from_third_id + cmp r1, #TEMPORARY_AREA_FIRST_SLOT + bne use_temporary_mapping -link_from_second_id: - create_table_entry boot_second_id, boot_third_id, r9, 2 -link_from_third_id: - /* Good news, we are not clashing with Xen virtual mapping */ + mov_w r0, XEN_VIRT_START + create_table_entry boot_pgtable, boot_second, r0, 1 mov r12, #0 /* r12 := temporary mapping not created */ mov pc, lr -virtphys_clash: +use_temporary_mapping: /* - * The identity map clashes with boot_third. Link boot_first_id and - * map Xen to a temporary mapping. See switch_to_runtime_mapping - * for more details. + * The identity mapping is not using the first slot + * TEMPORARY_AREA_FIRST_SLOT. Create a temporary mapping. + * See switch_to_runtime_mapping for more details. */ - PRINT("- Virt and Phys addresses clash -\r\n") PRINT("- Create temporary mapping -\r\n") - /* - * This will override the link to boot_second in XEN_FIRST_SLOT. - * The page-tables are not live yet. So no need to use - * break-before-make. - */ - create_table_entry boot_pgtable, boot_second_id, r9, 1 - create_table_entry boot_second_id, boot_third_id, r9, 2 - /* Map boot_second (cover Xen mappings) to the temporary 1st slot */ mov_w r0, TEMPORARY_XEN_VIRT_START create_table_entry boot_pgtable, boot_second, r0, 1 @@ -675,33 +641,13 @@ remove_identity_mapping: /* r2:r3 := invalid page-table entry */ mov r2, #0x0 mov r3, #0x0 - /* - * Find the first slot used. Remove the entry for the first - * table if the slot is not XEN_FIRST_SLOT. - */ + + /* Find the first slot used and remove it */ get_table_slot r1, r9, 1 /* r1 := first slot */ - cmp r1, #XEN_FIRST_SLOT - beq 1f - /* It is not in slot 0, remove the entry */ mov_w r0, boot_pgtable /* r0 := root table */ lsl r1, r1, #3 /* r1 := Slot offset */ strd r2, r3, [r0, r1] - b identity_mapping_removed - -1: - /* - * Find the second slot used. Remove the entry for the first - * table if the slot is not XEN_SECOND_SLOT. - */ - get_table_slot r1, r9, 2 /* r1 := second slot */ - cmp r1, #XEN_SECOND_SLOT - beq identity_mapping_removed - /* It is not in slot 1, remove the entry */ - mov_w r0, boot_second /* r0 := second table */ - lsl r1, r1, #3 /* r1 := Slot offset */ - strd r2, r3, [r0, r1] -identity_mapping_removed: flush_xen_tlb_local r0 mov pc, lr ENDPROC(remove_identity_mapping) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:23:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:23:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524822.815884 (Exim 4.92) (envelope-from ) id 1pqDDX-0002TR-Hq; Sat, 22 Apr 2023 13:23:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524822.815884; Sat, 22 Apr 2023 13:23:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDX-0002TJ-FF; Sat, 22 Apr 2023 13:23:55 +0000 Received: by outflank-mailman (input) for mailman id 524822; Sat, 22 Apr 2023 13:23:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDV-0002T3-QS for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDV-0007uf-Pg for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDDV-0001U1-Ot for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:23:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RRG1DYm9NpvDP2/Hw0Hkb41ILbuVX+UsBExpYIBWuZE=; b=GLlT2hzozI2VVC2NY+EsM0t+Cc LuSdvD7T2YTtsFyDTvmu2TbNdJYnZyz0CGcVn9HPAsoKLFlFQ0zMLcXp3Wc5bXs/gxUsgNCZ1a34g MUAfHDPfH948H1G0IV7oVhVSClbBwjwvy5IoDeePEXP4Pm5K6UWCofnHnfCPysUiKUWE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: Rework the memory layout Message-Id: Date: Sat, 22 Apr 2023 13:23:53 +0000 commit 9d267c049d92c8c2d464d9af86eb4048f8a8ba39 Author: Julien Grall AuthorDate: Sun Apr 16 15:32:08 2023 +0100 Commit: Julien Grall CommitDate: Wed Apr 19 19:39:58 2023 +0100 xen/arm64: Rework the memory layout Xen is currently not fully compliant with the Arm Arm because it will switch the TTBR with the MMU on. In order to be compliant, we need to disable the MMU before switching the TTBR. The implication is the page-tables should contain an identity mapping of the code switching the TTBR. In most of the case we expect Xen to be loaded in low memory. I am aware of one platform (i.e AMD Seattle) where the memory start above 512GB. To give us some slack, consider that Xen may be loaded in the first 2TB of the physical address space. The memory layout is reshuffled to keep the first four slots of the zeroeth level free. All the regions currently in L0 slot 0 will not be part of slot 4 (2TB). This requires a slight tweak of the boot code because XEN_VIRT_START (2TB + 2MB) cannot be used as an immediate. This reshuffle will make trivial to create a 1:1 mapping when Xen is loaded below 2TB. Lastly, take the opportunity to check at compile time if any of the regions may overlap with the reserved area for identity mapping. Signed-off-by: Julien Grall Tested-by: Henry Wang Reviewed-by: Luca Fancellu Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis --- xen/arch/arm/arm64/head.S | 3 ++- xen/arch/arm/include/asm/config.h | 38 ++++++++++++++++++++++++++------------ xen/arch/arm/mm.c | 23 ++++++++++++++++++----- 3 files changed, 46 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 8a4dd64c99..76c3affe11 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -607,7 +607,8 @@ create_page_tables: * need an additional 1:1 mapping, the virtual mapping will * suffice. */ - cmp x19, #XEN_VIRT_START + ldr x0, =XEN_VIRT_START + cmp x19, x0 bne 1f ret 1: diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index 5df0e4c495..c969e6da58 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -72,16 +72,13 @@ #include /* - * Common ARM32 and ARM64 layout: + * ARM32 layout: * 0 - 2M Unmapped * 2M - 4M Xen text, data, bss * 4M - 6M Fixmap: special-purpose 4K mapping slots * 6M - 10M Early boot mapping of FDT * 10M - 12M Livepatch vmap (if compiled in) * - * ARM32 layout: - * 0 - 12M - * * 32M - 128M Frametable: 32 bytes per page for 12GB of RAM * 256M - 1G VMAP: ioremap and early_ioremap use this virtual address * space @@ -90,14 +87,23 @@ * 2G - 4G Domheap: on-demand-mapped * * ARM64 layout: - * 0x0000000000000000 - 0x0000007fffffffff (512GB, L0 slot [0]) - * 0 - 12M + * 0x0000000000000000 - 0x000001ffffffffff (2TB, L0 slots [0..3]) + * + * Reserved to identity map Xen + * + * 0x0000020000000000 - 0x0000027fffffffff (512GB, L0 slot [4]) + * (Relative offsets) + * 0 - 2M Unmapped + * 2M - 4M Xen text, data, bss + * 4M - 6M Fixmap: special-purpose 4K mapping slots + * 6M - 10M Early boot mapping of FDT + * 10M - 12M Livepatch vmap (if compiled in) * * 1G - 2G VMAP: ioremap and early_ioremap * * 32G - 64G Frametable: 56 bytes per page for 2TB of RAM * - * 0x0000008000000000 - 0x00007fffffffffff (127.5TB, L0 slots [1..255]) + * 0x0000028000000000 - 0x00007fffffffffff (125TB, L0 slots [5..255]) * Unused * * 0x0000800000000000 - 0x000084ffffffffff (5TB, L0 slots [256..265]) @@ -107,7 +113,17 @@ * Unused */ +#ifdef CONFIG_ARM_32 #define XEN_VIRT_START _AT(vaddr_t, MB(2)) +#else + +#define SLOT0_ENTRY_BITS 39 +#define SLOT0(slot) (_AT(vaddr_t,slot) << SLOT0_ENTRY_BITS) +#define SLOT0_ENTRY_SIZE SLOT0(1) + +#define XEN_VIRT_START (SLOT0(4) + _AT(vaddr_t, MB(2))) +#endif + #define XEN_VIRT_SIZE _AT(vaddr_t, MB(2)) #define FIXMAP_VIRT_START (XEN_VIRT_START + XEN_VIRT_SIZE) @@ -163,14 +179,12 @@ #else /* ARM_64 */ -#define SLOT0_ENTRY_BITS 39 -#define SLOT0(slot) (_AT(vaddr_t,slot) << SLOT0_ENTRY_BITS) -#define SLOT0_ENTRY_SIZE SLOT0(1) +#define IDENTITY_MAPPING_AREA_NR_L0 4 -#define VMAP_VIRT_START GB(1) +#define VMAP_VIRT_START (SLOT0(4) + GB(1)) #define VMAP_VIRT_SIZE GB(1) -#define FRAMETABLE_VIRT_START GB(32) +#define FRAMETABLE_VIRT_START (SLOT0(4) + GB(32)) #define FRAMETABLE_SIZE GB(32) #define FRAMETABLE_NR (FRAMETABLE_SIZE / sizeof(*frame_table)) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index b99806af99..1d09d61dd9 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -153,7 +153,19 @@ static void __init __maybe_unused build_assertions(void) #endif /* Page table structure constraints */ #ifdef CONFIG_ARM_64 - BUILD_BUG_ON(zeroeth_table_offset(XEN_VIRT_START)); + /* + * The first few slots of the L0 table is reserved for the identity + * mapping. Check that none of the other regions are overlapping + * with it. + */ +#define CHECK_OVERLAP_WITH_IDMAP(virt) \ + BUILD_BUG_ON(zeroeth_table_offset(virt) < IDENTITY_MAPPING_AREA_NR_L0) + + CHECK_OVERLAP_WITH_IDMAP(XEN_VIRT_START); + CHECK_OVERLAP_WITH_IDMAP(VMAP_VIRT_START); + CHECK_OVERLAP_WITH_IDMAP(FRAMETABLE_VIRT_START); + CHECK_OVERLAP_WITH_IDMAP(DIRECTMAP_VIRT_START); +#undef CHECK_OVERLAP_WITH_IDMAP #endif BUILD_BUG_ON(first_table_offset(XEN_VIRT_START)); #ifdef CONFIG_ARCH_MAP_DOMAIN_PAGE @@ -496,10 +508,11 @@ void __init setup_pagetables(unsigned long boot_phys_offset) phys_offset = boot_phys_offset; #ifdef CONFIG_ARM_64 - p = (void *) xen_pgtable; - p[0] = pte_of_xenaddr((uintptr_t)xen_first); - p[0].pt.table = 1; - p[0].pt.xn = 0; + pte = pte_of_xenaddr((uintptr_t)xen_first); + pte.pt.table = 1; + pte.pt.xn = 0; + xen_pgtable[zeroeth_table_offset(XEN_VIRT_START)] = pte; + p = (void *) xen_first; #else p = (void *) cpu0_pgtable; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:24:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:24:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524823.815888 (Exim 4.92) (envelope-from ) id 1pqDDh-0002Vz-Jl; Sat, 22 Apr 2023 13:24:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524823.815888; Sat, 22 Apr 2023 13:24:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDh-0002Vs-Gr; Sat, 22 Apr 2023 13:24:05 +0000 Received: by outflank-mailman (input) for mailman id 524823; Sat, 22 Apr 2023 13:24:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDf-0002Vk-Tu for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDDf-0007vK-T8 for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDDf-0001Uf-SN for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=x8u/WyaNAPB7viWkFT8LpXgpcC2wY05KAVdvl/ioxJc=; b=AAccxxkhNxvo6J/5LG5iCAq383 PN1Dafoc34fZNy9hOuZGvsSwVaY+J2inF94hHSlkgs2Y4GGA6B2sGhum7ff78l6mcC8HjMwAy5E0q yKmYJCGWxkmQFtF89HnD7NoFlgSc+ho4+qPHv/r+Sr8pQg0cdaHmc7vtonkdmEV0eISc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: mm: Introduce helpers to prepare/enable/disable the identity mapping Message-Id: Date: Sat, 22 Apr 2023 13:24:03 +0000 commit 1c78d76b67e195a4bddac4329bbf12b63f41d377 Author: Julien Grall AuthorDate: Sun Apr 16 15:32:09 2023 +0100 Commit: Julien Grall CommitDate: Wed Apr 19 19:39:58 2023 +0100 xen/arm64: mm: Introduce helpers to prepare/enable/disable the identity mapping In follow-up patches we will need to have part of Xen identity mapped in order to safely switch the TTBR. On some platform, the identity mapping may have to start at 0. If we always keep the identity region mapped, NULL pointer dereference would lead to access to valid mapping. It would be possible to relocate Xen to avoid clashing with address 0. However the identity mapping is only meant to be used in very limited places. Therefore it would be better to keep the identity region invalid for most of the time. Two new external helpers are introduced: - arch_setup_page_tables() will setup the page-tables so it is easy to create the mapping afterwards. - update_identity_mapping() will create/remove the identity mapping Signed-off-by: Julien Grall Tested-by: Henry Wang Reviewed-by: Luca Fancellu Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis --- xen/arch/arm/arm64/Makefile | 1 + xen/arch/arm/arm64/mm.c | 130 ++++++++++++++++++++++++++++++++++++ xen/arch/arm/include/asm/arm32/mm.h | 4 ++ xen/arch/arm/include/asm/arm64/mm.h | 13 ++++ xen/arch/arm/include/asm/setup.h | 11 +++ xen/arch/arm/mm.c | 6 +- 6 files changed, 163 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile index 6d507da0d4..28481393e9 100644 --- a/xen/arch/arm/arm64/Makefile +++ b/xen/arch/arm/arm64/Makefile @@ -10,6 +10,7 @@ obj-y += entry.o obj-y += head.o obj-y += insn.o obj-$(CONFIG_LIVEPATCH) += livepatch.o +obj-y += mm.o obj-y += smc.o obj-y += smpboot.o obj-y += traps.o diff --git a/xen/arch/arm/arm64/mm.c b/xen/arch/arm/arm64/mm.c new file mode 100644 index 0000000000..56b9e9b8d3 --- /dev/null +++ b/xen/arch/arm/arm64/mm.c @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include +#include + +#include + +/* Override macros from asm/page.h to make them work with mfn_t */ +#undef virt_to_mfn +#define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) + +static DEFINE_PAGE_TABLE(xen_first_id); +static DEFINE_PAGE_TABLE(xen_second_id); +static DEFINE_PAGE_TABLE(xen_third_id); + +/* + * The identity mapping may start at physical address 0. So we don't want + * to keep it mapped longer than necessary. + * + * When this is called, we are still using the boot_pgtable. + * + * We need to prepare the identity mapping for both the boot page tables + * and runtime page tables. + * + * The logic to create the entry is slightly different because Xen may + * be running at a different location at runtime. + */ +static void __init prepare_boot_identity_mapping(void) +{ + paddr_t id_addr = virt_to_maddr(_start); + lpae_t pte; + DECLARE_OFFSETS(id_offsets, id_addr); + + /* + * We will be re-using the boot ID tables. They may not have been + * zeroed but they should be unlinked. So it is fine to use + * clear_page(). + */ + clear_page(boot_first_id); + clear_page(boot_second_id); + clear_page(boot_third_id); + + if ( id_offsets[0] >= IDENTITY_MAPPING_AREA_NR_L0 ) + panic("Cannot handle ID mapping above 2TB\n"); + + /* Link first ID table */ + pte = mfn_to_xen_entry(virt_to_mfn(boot_first_id), MT_NORMAL); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&boot_pgtable[id_offsets[0]], pte); + + /* Link second ID table */ + pte = mfn_to_xen_entry(virt_to_mfn(boot_second_id), MT_NORMAL); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&boot_first_id[id_offsets[1]], pte); + + /* Link third ID table */ + pte = mfn_to_xen_entry(virt_to_mfn(boot_third_id), MT_NORMAL); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&boot_second_id[id_offsets[2]], pte); + + /* The mapping in the third table will be created at a later stage */ +} + +static void __init prepare_runtime_identity_mapping(void) +{ + paddr_t id_addr = virt_to_maddr(_start); + lpae_t pte; + DECLARE_OFFSETS(id_offsets, id_addr); + + if ( id_offsets[0] >= IDENTITY_MAPPING_AREA_NR_L0 ) + panic("Cannot handle ID mapping above 2TB\n"); + + /* Link first ID table */ + pte = pte_of_xenaddr((vaddr_t)xen_first_id); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&xen_pgtable[id_offsets[0]], pte); + + /* Link second ID table */ + pte = pte_of_xenaddr((vaddr_t)xen_second_id); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&xen_first_id[id_offsets[1]], pte); + + /* Link third ID table */ + pte = pte_of_xenaddr((vaddr_t)xen_third_id); + pte.pt.table = 1; + pte.pt.xn = 0; + + write_pte(&xen_second_id[id_offsets[2]], pte); + + /* The mapping in the third table will be created at a later stage */ +} + +void __init arch_setup_page_tables(void) +{ + prepare_boot_identity_mapping(); + prepare_runtime_identity_mapping(); +} + +void update_identity_mapping(bool enable) +{ + paddr_t id_addr = virt_to_maddr(_start); + int rc; + + if ( enable ) + rc = map_pages_to_xen(id_addr, maddr_to_mfn(id_addr), 1, + PAGE_HYPERVISOR_RX); + else + rc = destroy_xen_mappings(id_addr, id_addr + PAGE_SIZE); + + BUG_ON(rc); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/include/asm/arm32/mm.h b/xen/arch/arm/include/asm/arm32/mm.h index 8bfc906e71..856f2dbec4 100644 --- a/xen/arch/arm/include/asm/arm32/mm.h +++ b/xen/arch/arm/include/asm/arm32/mm.h @@ -18,6 +18,10 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) bool init_domheap_mappings(unsigned int cpu); +static inline void arch_setup_page_tables(void) +{ +} + #endif /* __ARM_ARM32_MM_H__ */ /* diff --git a/xen/arch/arm/include/asm/arm64/mm.h b/xen/arch/arm/include/asm/arm64/mm.h index aa2adac631..e0bd23a6ed 100644 --- a/xen/arch/arm/include/asm/arm64/mm.h +++ b/xen/arch/arm/include/asm/arm64/mm.h @@ -1,6 +1,8 @@ #ifndef __ARM_ARM64_MM_H__ #define __ARM_ARM64_MM_H__ +extern DEFINE_PAGE_TABLE(xen_pgtable); + /* * On ARM64, all the RAM is currently direct mapped in Xen. * Hence return always true. @@ -10,6 +12,17 @@ static inline bool arch_mfns_in_directmap(unsigned long mfn, unsigned long nr) return true; } +void arch_setup_page_tables(void); + +/* + * Enable/disable the identity mapping in the live page-tables (i.e. + * the one pointed by TTBR_EL2). + * + * Note that nested call (e.g. enable=true, enable=true) is not + * supported. + */ +void update_identity_mapping(bool enable); + #endif /* __ARM_ARM64_MM_H__ */ /* diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index f0592370ea..38e2ce255f 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -168,6 +168,17 @@ u32 device_tree_get_u32(const void *fdt, int node, int map_range_to_domain(const struct dt_device_node *dev, u64 addr, u64 len, void *data); +extern DEFINE_BOOT_PAGE_TABLE(boot_pgtable); + +#ifdef CONFIG_ARM_64 +extern DEFINE_BOOT_PAGE_TABLE(boot_first_id); +#endif +extern DEFINE_BOOT_PAGE_TABLE(boot_second_id); +extern DEFINE_BOOT_PAGE_TABLE(boot_third_id); + +/* Find where Xen will be residing at runtime and return a PT entry */ +lpae_t pte_of_xenaddr(vaddr_t); + extern const char __ro_after_init_start[], __ro_after_init_end[]; struct init_info diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 1d09d61dd9..b7104d8d33 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -93,7 +93,7 @@ DEFINE_BOOT_PAGE_TABLE(boot_third); #ifdef CONFIG_ARM_64 #define HYP_PT_ROOT_LEVEL 0 -static DEFINE_PAGE_TABLE(xen_pgtable); +DEFINE_PAGE_TABLE(xen_pgtable); static DEFINE_PAGE_TABLE(xen_first); #define THIS_CPU_PGTABLE xen_pgtable #else @@ -400,7 +400,7 @@ void flush_page_to_ram(unsigned long mfn, bool sync_icache) invalidate_icache(); } -static inline lpae_t pte_of_xenaddr(vaddr_t va) +lpae_t pte_of_xenaddr(vaddr_t va) { paddr_t ma = va + phys_offset; @@ -507,6 +507,8 @@ void __init setup_pagetables(unsigned long boot_phys_offset) phys_offset = boot_phys_offset; + arch_setup_page_tables(); + #ifdef CONFIG_ARM_64 pte = pte_of_xenaddr((uintptr_t)xen_first); pte.pt.table = 1; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:24:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:24:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524824.815893 (Exim 4.92) (envelope-from ) id 1pqDDr-0002ZV-O8; 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Sat, 22 Apr 2023 13:24:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=//UQkMcUJIL6gGvA7Q1h25TwCpNgcskr6e06BJuz77w=; b=srXtG1hbwUrvngLndl/LdjzV+9 dFfqpISLPwtOALZYriuzkrt2XUQfnunOZYtN30f93g6DtWIAYRn3iDOhL46z90PJ8BihZfreQo42l +3EXYHAqL07G9GQJaUyoscGPFIYxg9iLZzwLqmxh5FaT1R/2coGB0Zkf/X/R/aKNOM3k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: mm: Rework switch_ttbr() Message-Id: Date: Sat, 22 Apr 2023 13:24:13 +0000 commit c4b72c4a54809cb76d652cc2ffe2fce90afd017e Author: Julien Grall AuthorDate: Sun Apr 16 15:32:10 2023 +0100 Commit: Julien Grall CommitDate: Wed Apr 19 19:39:58 2023 +0100 xen/arm64: mm: Rework switch_ttbr() At the moment, switch_ttbr() is switching the TTBR whilst the MMU is still on. Switching TTBR is like replacing existing mappings with new ones. So we need to follow the break-before-make sequence. In this case, it means the MMU needs to be switched off while the TTBR is updated. In order to disable the MMU, we need to first jump to an identity mapping. Rename switch_ttbr() to switch_ttbr_id() and create an helper on top to temporary map the identity mapping and call switch_ttbr() via the identity address. switch_ttbr_id() is now reworked to temporarily turn off the MMU before updating the TTBR. We also need to make sure the helper switch_ttbr() is part of the identity mapping. So move _end_boot past it. The arm32 code will use a different approach. So this issue is for now only resolved on arm64. Signed-off-by: Julien Grall Reviewed-by: Luca Fancellu Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis Tested-by: Henry Wang --- xen/arch/arm/arm64/head.S | 50 ++++++++++++++++++++++++++++--------------- xen/arch/arm/arm64/mm.c | 31 +++++++++++++++++++++++++++ xen/arch/arm/include/asm/mm.h | 2 ++ xen/arch/arm/mm.c | 2 -- 4 files changed, 66 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 76c3affe11..19a53d0a03 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -816,30 +816,46 @@ ENDPROC(fail) * Switch TTBR * * x0 ttbr - * - * TODO: This code does not comply with break-before-make. */ -ENTRY(switch_ttbr) - dsb sy /* Ensure the flushes happen before - * continuing */ - isb /* Ensure synchronization with previous - * changes to text */ - tlbi alle2 /* Flush hypervisor TLB */ - ic iallu /* Flush I-cache */ - dsb sy /* Ensure completion of TLB flush */ +ENTRY(switch_ttbr_id) + /* 1) Ensure any previous read/write have completed */ + dsb ish + isb + + /* 2) Turn off MMU */ + mrs x1, SCTLR_EL2 + bic x1, x1, #SCTLR_Axx_ELx_M + msr SCTLR_EL2, x1 + isb + + /* + * 3) Flush the TLBs. + * See asm/arm64/flushtlb.h for the explanation of the sequence. + */ + dsb nshst + tlbi alle2 + dsb nsh + isb + + /* 4) Update the TTBR */ + msr TTBR0_EL2, x0 isb - msr TTBR0_EL2, x0 + /* + * 5) Flush I-cache + * This should not be necessary but it is kept for safety. + */ + ic iallu + isb - isb /* Ensure synchronization with previous - * changes to text */ - tlbi alle2 /* Flush hypervisor TLB */ - ic iallu /* Flush I-cache */ - dsb sy /* Ensure completion of TLB flush */ + /* 6) Turn on the MMU */ + mrs x1, SCTLR_EL2 + orr x1, x1, #SCTLR_Axx_ELx_M /* Enable MMU */ + msr SCTLR_EL2, x1 isb ret -ENDPROC(switch_ttbr) +ENDPROC(switch_ttbr_id) #ifdef CONFIG_EARLY_PRINTK /* diff --git a/xen/arch/arm/arm64/mm.c b/xen/arch/arm/arm64/mm.c index 56b9e9b8d3..78b7c7eb00 100644 --- a/xen/arch/arm/arm64/mm.c +++ b/xen/arch/arm/arm64/mm.c @@ -120,6 +120,37 @@ void update_identity_mapping(bool enable) BUG_ON(rc); } +extern void switch_ttbr_id(uint64_t ttbr); + +typedef void (switch_ttbr_fn)(uint64_t ttbr); + +void __init switch_ttbr(uint64_t ttbr) +{ + vaddr_t id_addr = virt_to_maddr(switch_ttbr_id); + switch_ttbr_fn *fn = (switch_ttbr_fn *)id_addr; + lpae_t pte; + + /* Enable the identity mapping in the boot page tables */ + update_identity_mapping(true); + + /* Enable the identity mapping in the runtime page tables */ + pte = pte_of_xenaddr((vaddr_t)switch_ttbr_id); + pte.pt.table = 1; + pte.pt.xn = 0; + pte.pt.ro = 1; + write_pte(&xen_third_id[third_table_offset(id_addr)], pte); + + /* Switch TTBR */ + fn(ttbr); + + /* + * Disable the identity mapping in the runtime page tables. + * Note it is not necessary to disable it in the boot page tables + * because they are not going to be used by this CPU anymore. + */ + update_identity_mapping(false); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 23dec574eb..4262165ce2 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -207,6 +207,8 @@ extern unsigned long total_pages; extern void setup_pagetables(unsigned long boot_phys_offset); /* Map FDT in boot pagetable */ extern void *early_fdt_map(paddr_t fdt_paddr); +/* Switch to a new root page-tables */ +extern void switch_ttbr(uint64_t ttbr); /* Remove early mappings */ extern void remove_early_mappings(void); /* Allocate and initialise pagetables for a secondary CPU. Sets init_ttbr to the diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index b7104d8d33..74f6ff2c6f 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -488,8 +488,6 @@ static void xen_pt_enforce_wnx(void) flush_xen_tlb_local(); } -extern void switch_ttbr(uint64_t ttbr); - /* Clear a translation table and clean & invalidate the cache */ static void clear_table(void *table) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:24:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:24:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524825.815897 (Exim 4.92) (envelope-from ) id 1pqDE1-0002cC-Pc; Sat, 22 Apr 2023 13:24:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524825.815897; Sat, 22 Apr 2023 13:24:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDE1-0002c4-Mp; Sat, 22 Apr 2023 13:24:25 +0000 Received: by outflank-mailman (input) for mailman id 524825; Sat, 22 Apr 2023 13:24:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDE0-0002bq-4y for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDE0-0007vY-4C for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDE0-0001Vd-3I for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EeAm1Dq/ZOTRPKPKiw18CvGo74b39AJuVpCEblyvX0Y=; b=pzdxWHlgHCMVW3Jgbhitsj3oel Tw2GRX6CWaxq4jTDZnQSxR2hH7qoSpabiO0JPdg8bROcBPCWuMR70waAJcvnD3siYmZcaq0N7mT2K O5IapiEJd+rw4mZiOmBJ+E7lYCoQXXIL+RnMFOP8mOHbXFssncskfz5tCGqOqPXuvaqE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: smpboot: Directly switch to the runtime page-tables Message-Id: Date: Sat, 22 Apr 2023 13:24:24 +0000 commit dff17457c482dcb38b7caafd095334f461ef6d35 Author: Julien Grall AuthorDate: Sun Apr 16 15:32:11 2023 +0100 Commit: Julien Grall CommitDate: Wed Apr 19 19:39:58 2023 +0100 xen/arm64: smpboot: Directly switch to the runtime page-tables Switching TTBR while the MMU is on is not safe. Now that the identity mapping will not clash with the rest of the memory layout, we can avoid creating temporary page-tables every time a CPU is brought up. The arm32 code will use a different approach. So this issue is for now only resolved on arm64. Signed-off-by: Julien Grall Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis Tested-by: Henry Wang --- xen/arch/arm/arm32/smpboot.c | 4 ++++ xen/arch/arm/arm64/head.S | 29 +++++++++-------------------- xen/arch/arm/arm64/smpboot.c | 15 ++++++++++++++- xen/arch/arm/include/asm/smp.h | 1 + xen/arch/arm/smpboot.c | 1 + 5 files changed, 29 insertions(+), 21 deletions(-) diff --git a/xen/arch/arm/arm32/smpboot.c b/xen/arch/arm/arm32/smpboot.c index e7368665d5..518e9f9c7e 100644 --- a/xen/arch/arm/arm32/smpboot.c +++ b/xen/arch/arm/arm32/smpboot.c @@ -21,6 +21,10 @@ int arch_cpu_up(int cpu) return platform_cpu_up(cpu); } +void arch_cpu_up_finish(void) +{ +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 19a53d0a03..f37133cf7c 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -308,6 +308,7 @@ real_start_efi: bl check_cpu_mode bl cpu_init bl create_page_tables + load_paddr x0, boot_pgtable bl enable_mmu /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ @@ -365,29 +366,14 @@ GLOBAL(init_secondary) #endif bl check_cpu_mode bl cpu_init - bl create_page_tables + load_paddr x0, init_ttbr + ldr x0, [x0] bl enable_mmu /* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */ ldr x0, =secondary_switched br x0 secondary_switched: - /* - * Non-boot CPUs need to move on to the proper pagetables, which were - * setup in init_secondary_pagetables. - * - * XXX: This is not compliant with the Arm Arm. - */ - ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ - ldr x4, [x4] /* Actual value */ - dsb sy - msr TTBR0_EL2, x4 - dsb sy - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb - #ifdef CONFIG_EARLY_PRINTK /* Use a virtual address to access the UART. */ ldr x23, =EARLY_UART_VIRTUAL_ADDRESS @@ -672,9 +658,13 @@ ENDPROC(create_page_tables) * mapping. In other word, the caller is responsible to switch to the runtime * mapping. * - * Clobbers x0 - x3 + * Inputs: + * x0 : Physical address of the page tables. + * + * Clobbers x0 - x4 */ enable_mmu: + mov x4, x0 PRINT("- Turning on paging -\r\n") /* @@ -685,8 +675,7 @@ enable_mmu: dsb nsh /* Write Xen's PT's paddr into TTBR0_EL2 */ - load_paddr x0, boot_pgtable - msr TTBR0_EL2, x0 + msr TTBR0_EL2, x4 isb mrs x0, SCTLR_EL2 diff --git a/xen/arch/arm/arm64/smpboot.c b/xen/arch/arm/arm64/smpboot.c index 694fbf67e6..9637f42469 100644 --- a/xen/arch/arm/arm64/smpboot.c +++ b/xen/arch/arm/arm64/smpboot.c @@ -106,10 +106,23 @@ int __init arch_cpu_init(int cpu, struct dt_device_node *dn) int arch_cpu_up(int cpu) { + int rc; + if ( !smp_enable_ops[cpu].prepare_cpu ) return -ENODEV; - return smp_enable_ops[cpu].prepare_cpu(cpu); + update_identity_mapping(true); + + rc = smp_enable_ops[cpu].prepare_cpu(cpu); + if ( rc ) + update_identity_mapping(false); + + return rc; +} + +void arch_cpu_up_finish(void) +{ + update_identity_mapping(false); } /* diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h index 8133d5c295..a37ca55bff 100644 --- a/xen/arch/arm/include/asm/smp.h +++ b/xen/arch/arm/include/asm/smp.h @@ -25,6 +25,7 @@ extern void noreturn stop_cpu(void); extern int arch_smp_init(void); extern int arch_cpu_init(int cpu, struct dt_device_node *dn); extern int arch_cpu_up(int cpu); +extern void arch_cpu_up_finish(void); int cpu_up_send_sgi(int cpu); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 412ae22869..4a89b3a834 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -500,6 +500,7 @@ int __cpu_up(unsigned int cpu) init_data.cpuid = ~0; smp_up_cpu = MPIDR_INVALID; clean_dcache(smp_up_cpu); + arch_cpu_up_finish(); if ( !cpu_online(cpu) ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 22 13:24:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 22 Apr 2023 13:24:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.524826.815901 (Exim 4.92) (envelope-from ) id 1pqDEB-0002f1-RX; Sat, 22 Apr 2023 13:24:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 524826.815901; Sat, 22 Apr 2023 13:24:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDEB-0002er-OU; Sat, 22 Apr 2023 13:24:35 +0000 Received: by outflank-mailman (input) for mailman id 524826; Sat, 22 Apr 2023 13:24:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDEA-0002ef-8D for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pqDEA-0007vo-7P for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pqDEA-0001WT-6e for xen-changelog@lists.xenproject.org; Sat, 22 Apr 2023 13:24:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EN1Tljc7H/wcsiKcBi5Nf43320EiXvE4dboYBWTOl+4=; b=FD2sLU2eWdzYSzStvpmI7Z2EQX 75VHXwBiUb0sESa41RDDUpt3Ol8Us1enciSlpbn7GDrkf2JfmuodInfUhyfyjtt6l7QYEV2wQWNtJ XLa1KfMwYoetOs+jtBHw0qhak+h9llSCfRJMpV/qrBE8sOlKTIHrL2dx8wdHQW9kfqgg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Revert "xen/arm32: head: Widen the use of the temporary mapping" Message-Id: Date: Sat, 22 Apr 2023 13:24:34 +0000 commit c6c8c0808f908911a38bc330cdc7a26ac4bf6d51 Author: Julien Grall AuthorDate: Fri Apr 21 11:01:06 2023 +0100 Commit: Julien Grall CommitDate: Fri Apr 21 11:01:22 2023 +0100 Revert "xen/arm32: head: Widen the use of the temporary mapping" We suspect the patch may break boot on the arndale board. This reverts commit eed3ae84bcd10a69c24c3cb4b0b98e070bc65ee4. --- xen/arch/arm/arm32/head.S | 86 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 70 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 5168eb4588..f9f7be9588 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -459,6 +459,7 @@ ENDPROC(cpu_init) create_page_tables: /* Prepare the page-tables for mapping Xen */ mov_w r0, XEN_VIRT_START + create_table_entry boot_pgtable, boot_second, r0, 1 create_table_entry boot_second, boot_third, r0, 2 /* Setup boot_third: */ @@ -478,37 +479,70 @@ create_page_tables: cmp r1, #(XEN_PT_LPAE_ENTRIES<<3) /* 512*8-byte entries per page */ blo 1b + /* + * If Xen is loaded at exactly XEN_VIRT_START then we don't + * need an additional 1:1 mapping, the virtual mapping will + * suffice. + */ + cmp r9, #XEN_VIRT_START + moveq pc, lr + /* * Setup the 1:1 mapping so we can turn the MMU on. Note that * only the first page of Xen will be part of the 1:1 mapping. + * + * In all the cases, we will link boot_third_id. So create the + * mapping in advance. */ - create_table_entry boot_pgtable, boot_second_id, r9, 1 - create_table_entry boot_second_id, boot_third_id, r9, 2 create_mapping_entry boot_third_id, r9, r9 /* - * Find the first slot used. If the slot is not the same - * as TEMPORARY_AREA_FIRST_SLOT, then we will want to switch - * to the temporary mapping before jumping to the runtime - * virtual mapping. + * Find the first slot used. If the slot is not XEN_FIRST_SLOT, + * then the 1:1 mapping will use its own set of page-tables from + * the second level. */ get_table_slot r1, r9, 1 /* r1 := first slot */ - cmp r1, #TEMPORARY_AREA_FIRST_SLOT - bne use_temporary_mapping + cmp r1, #XEN_FIRST_SLOT + beq 1f + create_table_entry boot_pgtable, boot_second_id, r9, 1 + b link_from_second_id - mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 +1: + /* + * Find the second slot used. If the slot is XEN_SECOND_SLOT, then the + * 1:1 mapping will use its own set of page-tables from the + * third level. + */ + get_table_slot r1, r9, 2 /* r1 := second slot */ + cmp r1, #XEN_SECOND_SLOT + beq virtphys_clash + create_table_entry boot_second, boot_third_id, r9, 2 + b link_from_third_id + +link_from_second_id: + create_table_entry boot_second_id, boot_third_id, r9, 2 +link_from_third_id: + /* Good news, we are not clashing with Xen virtual mapping */ mov r12, #0 /* r12 := temporary mapping not created */ mov pc, lr -use_temporary_mapping: +virtphys_clash: /* - * The identity mapping is not using the first slot - * TEMPORARY_AREA_FIRST_SLOT. Create a temporary mapping. - * See switch_to_runtime_mapping for more details. + * The identity map clashes with boot_third. Link boot_first_id and + * map Xen to a temporary mapping. See switch_to_runtime_mapping + * for more details. */ + PRINT("- Virt and Phys addresses clash -\r\n") PRINT("- Create temporary mapping -\r\n") + /* + * This will override the link to boot_second in XEN_FIRST_SLOT. + * The page-tables are not live yet. So no need to use + * break-before-make. + */ + create_table_entry boot_pgtable, boot_second_id, r9, 1 + create_table_entry boot_second_id, boot_third_id, r9, 2 + /* Map boot_second (cover Xen mappings) to the temporary 1st slot */ mov_w r0, TEMPORARY_XEN_VIRT_START create_table_entry boot_pgtable, boot_second, r0, 1 @@ -641,13 +675,33 @@ remove_identity_mapping: /* r2:r3 := invalid page-table entry */ mov r2, #0x0 mov r3, #0x0 - - /* Find the first slot used and remove it */ + /* + * Find the first slot used. Remove the entry for the first + * table if the slot is not XEN_FIRST_SLOT. + */ get_table_slot r1, r9, 1 /* r1 := first slot */ + cmp r1, #XEN_FIRST_SLOT + beq 1f + /* It is not in slot 0, remove the entry */ mov_w r0, boot_pgtable /* r0 := root table */ lsl r1, r1, #3 /* r1 := Slot offset */ strd r2, r3, [r0, r1] + b identity_mapping_removed + +1: + /* + * Find the second slot used. Remove the entry for the first + * table if the slot is not XEN_SECOND_SLOT. + */ + get_table_slot r1, r9, 2 /* r1 := second slot */ + cmp r1, #XEN_SECOND_SLOT + beq identity_mapping_removed + /* It is not in slot 1, remove the entry */ + mov_w r0, boot_second /* r0 := second table */ + lsl r1, r1, #3 /* r1 := Slot offset */ + strd r2, r3, [r0, r1] +identity_mapping_removed: flush_xen_tlb_local r0 mov pc, lr ENDPROC(remove_identity_mapping) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 05:00:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 05:00:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525713.817058 (Exim 4.92) (envelope-from ) id 1prAmZ-0001Ta-Hf; Tue, 25 Apr 2023 05:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525713.817058; Tue, 25 Apr 2023 05:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmZ-0001T8-E2; Tue, 25 Apr 2023 05:00:03 +0000 Received: by outflank-mailman (input) for mailman id 525713; Tue, 25 Apr 2023 05:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmY-0001JL-PV for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmY-0000RY-F3 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prAmY-0003Yo-E6 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cyjho1yV9dkRFu9XU8tbqNzFPDAAHE+wVm0oVMWuZxc=; b=i/lhzgv4WoVbSVom4CILB1USKf SFcendxnZY+xdnoRWG+5MepOh/8DvsVbVuHXZr1IBQm2yCLUhvGou7gBRfz+3zaa40UUAgustOGXh gvUyVxsRFKIZ3oGMRymCxbLX5Xl1bCOseXyYgfMT28fXLoUVcNqxsiU6hJcvlMDz2dMk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools/xenstore: fix quota check in transaction_fix_domains() Message-Id: Date: Tue, 25 Apr 2023 05:00:02 +0000 commit bc5ecfbbc2bc75074de4687eaf2de809f4fdb8f2 Author: Juergen Gross AuthorDate: Mon Apr 24 12:59:13 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 12:59:13 2023 +0200 tools/xenstore: fix quota check in transaction_fix_domains() Today when finalizing a transaction the number of node quota is checked to not being exceeded after the transaction. This check is always done, even if the transaction is being performed by a privileged connection, or if there were no nodes created in the transaction. Correct that by checking quota only if: - the transaction is being performed by an unprivileged guest, and - at least one node was created in the transaction Reported-by: Julien Grall Fixes: f2bebf72c4d5 ("xenstore: rework of transaction handling") Signed-off-by: Juergen Gross master commit: f6b801c36bd5e4ab22a9f80c8d57121b62b139af master date: 2023-03-29 22:02:36 +0100 --- tools/xenstore/xenstored_core.c | 3 +++ tools/xenstore/xenstored_transaction.c | 24 ++++++++++++++++++++---- tools/xenstore/xenstored_transaction.h | 3 +++ 3 files changed, 26 insertions(+), 4 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 56dbdc2530..8907c6cb0b 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1474,6 +1474,9 @@ static struct node *create_node(struct connection *conn, const void *ctx, if (!node) return NULL; + if (conn && conn->transaction) + ta_node_created(conn->transaction); + node->data = data; node->datalen = datalen; diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index ac854197ca..8ebd16aed2 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -172,12 +172,20 @@ struct transaction /* List of changed domains - to record the changed domain entry number */ struct list_head changed_domains; + /* There was at least one node created in the transaction. */ + bool node_created; + /* Flag for letting transaction fail. */ bool fail; }; uint64_t generation; +void ta_node_created(struct transaction *trans) +{ + trans->node_created = true; +} + static struct accessed_node *find_accessed_node(struct transaction *trans, const char *name) { @@ -514,7 +522,12 @@ int do_transaction_start(const void *ctx, struct connection *conn, return 0; } -static int transaction_fix_domains(struct transaction *trans, bool update) +/* + * Update or check number of nodes per domain at the end of a transaction. + * If "update" is true, "chk_quota" is ignored. + */ +static int transaction_fix_domains(struct transaction *trans, bool chk_quota, + bool update) { struct changed_domain *d; int cnt; @@ -522,7 +535,7 @@ static int transaction_fix_domains(struct transaction *trans, bool update) list_for_each_entry(d, &trans->changed_domains, list) { cnt = domain_entry_fix(d->domid, d->nbentry, update); if (!update) { - if (cnt >= quota_nb_entry_per_domain) + if (chk_quota && cnt >= quota_nb_entry_per_domain) return ENOSPC; if (cnt < 0) return ENOMEM; @@ -538,6 +551,7 @@ int do_transaction_end(const void *ctx, struct connection *conn, const char *arg = onearg(in); struct transaction *trans; bool is_corrupt = false; + bool chk_quota; int ret; if (!arg || (!streq(arg, "T") && !streq(arg, "F"))) @@ -552,13 +566,15 @@ int do_transaction_end(const void *ctx, struct connection *conn, if (!conn->transaction_started) conn->ta_start_time = 0; + chk_quota = trans->node_created && domain_is_unprivileged(conn); + /* Attach transaction to ctx for auto-cleanup */ talloc_steal(ctx, trans); if (streq(arg, "T")) { if (trans->fail) return ENOMEM; - ret = transaction_fix_domains(trans, false); + ret = transaction_fix_domains(trans, chk_quota, false); if (ret) return ret; ret = finalize_transaction(conn, trans, &is_corrupt); @@ -568,7 +584,7 @@ int do_transaction_end(const void *ctx, struct connection *conn, wrl_apply_debit_trans_commit(conn); /* fix domain entry for each changed domain */ - transaction_fix_domains(trans, true); + transaction_fix_domains(trans, false, true); if (is_corrupt) corrupt(conn, "transaction inconsistency"); diff --git a/tools/xenstore/xenstored_transaction.h b/tools/xenstore/xenstored_transaction.h index 3417303f94..f57d204cc0 100644 --- a/tools/xenstore/xenstored_transaction.h +++ b/tools/xenstore/xenstored_transaction.h @@ -36,6 +36,9 @@ int do_transaction_end(const void *ctx, struct connection *conn, struct transaction *transaction_lookup(struct connection *conn, uint32_t id); +/* Set flag for created node. */ +void ta_node_created(struct transaction *trans); + /* inc/dec entry number local to trans while changing a node */ void transaction_entry_inc(struct transaction *trans, unsigned int domid); void transaction_entry_dec(struct transaction *trans, unsigned int domid); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 05:00:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 05:00:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525714.817062 (Exim 4.92) (envelope-from ) id 1prAmj-00022a-Jj; Tue, 25 Apr 2023 05:00:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525714.817062; Tue, 25 Apr 2023 05:00:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmj-00022U-Fl; Tue, 25 Apr 2023 05:00:13 +0000 Received: by outflank-mailman (input) for mailman id 525714; Tue, 25 Apr 2023 05:00:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmi-00021d-KQ for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86emul: pull permission check ahead for REP INS/OUTS Message-Id: Date: Tue, 25 Apr 2023 05:00:12 +0000 commit c4b0556a554464b08579b07d5b293351d19df375 Author: Jan Beulich AuthorDate: Mon Apr 24 12:59:39 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 12:59:39 2023 +0200 x86emul: pull permission check ahead for REP INS/OUTS Based on observations on a fair range of hardware from both primary vendors even zero-iteration-count instances of these insns perform the port related permission checking first. Fixes: fe300600464c ("x86: Fix emulation of REP prefix") Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper master commit: f41c88a6fca59f99a2eb5e7ed3d90ab7bca08b1b master date: 2023-03-30 13:07:16 +0200 --- xen/arch/x86/x86_emulate/x86_emulate.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index e38f98b547..94dd72585a 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -4249,14 +4249,15 @@ x86_emulate( goto imul; case 0x6c ... 0x6d: /* ins %dx,%es:%edi */ { - unsigned long nr_reps = get_rep_prefix(false, true); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - dst.mem.seg = x86_seg_es; - dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(false, true); + dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); + dst.mem.seg = x86_seg_es; /* Try the presumably most efficient approach first. */ if ( !ops->rep_ins ) nr_reps = 1; @@ -4290,13 +4291,14 @@ x86_emulate( } case 0x6e ... 0x6f: /* outs %esi,%dx */ { - unsigned long nr_reps = get_rep_prefix(true, false); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(true, false); + ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); /* Try the presumably most efficient approach first. */ if ( !ops->rep_outs ) nr_reps = 1; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 05:00:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 05:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525715.817066 (Exim 4.92) (envelope-from ) id 1prAmt-00025f-K5; Tue, 25 Apr 2023 05:00:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525715.817066; Tue, 25 Apr 2023 05:00:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAmt-00025Y-HQ; Tue, 25 Apr 2023 05:00:23 +0000 Received: by outflank-mailman (input) for mailman id 525715; Tue, 25 Apr 2023 05:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAms-00025Q-NU for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAms-0000fi-MX for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prAms-0003aV-Ld for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1qFpE/Apcesu04hBV5ZQvHxmH5rXCaNYBeEKO45Lm/Y=; b=BsKiZOQ4MkAVBNfZNyY4Qc2htn ruVKBPrqcXDRfX5aZi5bZeoF6UkcRxvxp7w/z1FDcGzoAXvbE/r6lze3UTtZbzf4LnFTRceKfn2Hw briFCYWFZFNRjU7OgpjPJ01jNHSAFNxk8aBJU3sxjZqHmRfHdZV6vZjdqLNJOzP+DTvE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/hvm: Disallow disabling paging in 64bit mode Message-Id: Date: Tue, 25 Apr 2023 05:00:22 +0000 commit fa3b9c2aa8968a3913a2f13775a0795fea077816 Author: Andrew Cooper AuthorDate: Mon Apr 24 13:00:44 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:00:44 2023 +0200 x86/hvm: Disallow disabling paging in 64bit mode The Long Mode consistency checks exist to "ensure that the processor does not enter an undefined mode or state that results in unpredictable behavior". APM Vol2 Table 14-5 "Long-Mode Consistency Checks" lists them, but there is no row preventing the OS from trying to exit Long mode while in 64bit mode. This could leave the CPU in Protected Mode with an %rip above the 4G boundary. Experimentally, AMD CPUs really do permit this state transition. An OS which tries it hits an instant SHUTDOWN, even in cases where the truncation I expect to be going on behind the scenes ought to result in sane continued execution. Furthermore, right from the very outset, the APM Vol2 14.7 "Leaving Long Mode" section instructs peoples to switch to a compatibility mode segment first before clearing CR0.PG, which does clear out the upper bits in %rip. This is further backed up by Vol2 Figure 1-6 "Operating Modes of the AMD64 Architecture". Either way, this appears to have been a genuine oversight in the AMD64 spec. Intel, on the other hand, rejects this state transition with #GP. Between revision 71 (Nov 2019) and 72 (May 2020) of SDM Vol3, a footnote to 4.1.2 "Paging-Mode Enable" was altered from If CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP); software should clear CR4.PCIDE before attempting to disable paging. to If the logical processor is in 64-bit mode or if CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP). Software should transition to compatibility mode and clear CR4.PCIDE before attempting to disable paging. which acknowledges this corner case, but there doesn't appear to be any other discussion even in the relevant Long Mode sections. So it appears that Intel spotted and addressed the corner case in IA-32e mode, but were 15 years late to document it. Xen was written to the AMD spec, and misses the check. Follow the Intel behaviour, because it is more sensible and avoids hitting a VMEntry failure. Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné master commit: 18c128ba66e6308744850aca96dbffd18f91c29b master date: 2023-04-14 18:18:20 +0100 --- xen/arch/x86/hvm/hvm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index ae4368ec4b..2f20df7874 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2332,6 +2332,21 @@ int hvm_set_cr0(unsigned long value, bool may_defer) } else if ( !(value & X86_CR0_PG) && (old_value & X86_CR0_PG) ) { + struct segment_register cs; + + hvm_get_segment_register(v, x86_seg_cs, &cs); + + /* + * Intel documents a #GP fault in this case, and VMEntry checks reject + * it as a valid state. AMD permits the state transition, and hits + * SHUTDOWN immediately thereafter. Follow the Intel behaviour. + */ + if ( (v->arch.hvm.guest_efer & EFER_LME) && cs.l ) + { + HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempt to clear CR0.PG in 64bit mode"); + return X86EMUL_EXCEPTION; + } + if ( hvm_pcid_enabled(v) ) { HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to clear CR0.PG " -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 05:00:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 05:00:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525716.817070 (Exim 4.92) (envelope-from ) id 1prAn3-00028r-N4; Tue, 25 Apr 2023 05:00:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525716.817070; Tue, 25 Apr 2023 05:00:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAn3-00028h-J1; Tue, 25 Apr 2023 05:00:33 +0000 Received: by outflank-mailman (input) for mailman id 525716; Tue, 25 Apr 2023 05:00:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAn2-00028O-SN for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAn2-0000fs-QT for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prAn2-0003az-PU for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VCS9YKYKBqL96M8p7XnlU/UaraAh3uKAPwDLOQyS7pA=; b=gSHMJm8U4njYoHdSoejt0ToO/g orVogulyqZ/J/KUc1ZJDabcud48/CWvVTkYWi1HbM/mPQyKQKZ44VA9ys6yM/Be51/SLr5WDBpiiO CONd5Vr7POMa7T3+B/24Ug4+AbEvSs8jeRJ0oJsXhq2G80vjuZpq/fHz+92bMsVePkf0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/livepatch: Fix livepatch application when CET is active Message-Id: Date: Tue, 25 Apr 2023 05:00:32 +0000 commit 55d24a7ad6beaa520b480eede130cb1cac19d69d Author: Andrew Cooper AuthorDate: Mon Apr 24 13:01:23 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:01:23 2023 +0200 x86/livepatch: Fix livepatch application when CET is active Right now, trying to apply a livepatch on any system with CET shstk (AMD Zen3 or later, Intel Tiger Lake or Sapphire Rapids and later) fails as follows: (XEN) livepatch: lp: Verifying enabled expectations for all functions (XEN) common/livepatch.c:1591: livepatch: lp: timeout is 30000000ns (XEN) common/livepatch.c:1703: livepatch: lp: CPU28 - IPIing the other 127 CPUs (XEN) livepatch: lp: Applying 1 functions (XEN) hi_func: Hi! (called 1 times) (XEN) Hook executing. (XEN) Assertion 'local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu))' failed at arch/x86/smp.c:265 (XEN) *** DOUBLE FAULT *** The assertion failure is from a global (system wide) TLB flush initiated by modify_xen_mappings(). I'm not entirely sure when this broke, and I'm not sure exactly what causes the #DF's, but it doesn't really matter either because they highlight a latent bug that I'd overlooked with the CET-SS vs patching work the first place. While we're careful to arrange for the patching CPU to avoid encountering non-shstk memory with transient shstk perms, other CPUs can pick these mappings up too if they need to re-walk for uarch reasons. Another bug is that for livepatching, we only disable CET if shadow stacks are in use. Running on Intel CET systems when Xen is only using CET-IBT will crash in arch_livepatch_quiesce() when trying to clear CR0.WP with CR4.CET still active. Also, we never went and cleared the dirty bits on .rodata. This would matter (for the same reason it matters on .text - it becomes a valid target for WRSS), but we never actually patch .rodata anyway. Therefore rework how we do patching for both alternatives and livepatches. Introduce modify_xen_mappings_lite() with a purpose similar to modify_xen_mappings(), but stripped down to the bare minimum as it's used in weird contexts. Leave all complexity to the caller to handle. Instead of patching by clearing CR0.WP (and having to jump through some fragile hoops to disable CET in order to do this), just transiently relax the permissions on .text via l2_identmap[]. Note that neither alternatives nor livepatching edit .rodata, so we don't need to relax those permissions at this juncture. The perms are relaxed globally, but this is safe enough. Alternatives run before we boot APs, and Livepatching runs in a quiesced state where the other CPUs are not doing anything interesting. This approach is far more robust. Fixes: 48cdc15a424f ("x86/alternatives: Clear CR4.CET when clearing CR0.WP") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Ross Lagerwall master commit: 8676092a0f16ca6ad188d3fb270784a2caecf542 master date: 2023-04-18 20:20:26 +0100 --- xen/arch/x86/alternative.c | 45 +++++++++++--------------- xen/arch/x86/livepatch.c | 56 +++++++++++++-------------------- xen/arch/x86/mm.c | 68 ++++++++++++++++++++++++++++++++++++++++ xen/common/virtual_region.c | 22 ++++++++++--- xen/include/xen/mm.h | 1 + xen/include/xen/virtual_region.h | 4 ++- 6 files changed, 129 insertions(+), 67 deletions(-) diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 0c6fc7b4fb..1d59dffc46 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -394,24 +394,28 @@ static int __init cf_check nmi_apply_alternatives( */ if ( !(alt_done & alt_todo) ) { - unsigned long cr0, cr4; - - cr0 = read_cr0(); - cr4 = read_cr4(); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4 & ~X86_CR4_CET); - - /* Disable WP to allow patching read-only pages. */ - write_cr0(cr0 & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but we run ahead of bringing APs + * online, so only have our own TLB to worry about. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RWX); + flush_local(FLUSH_TLB_GLOBAL); _apply_alternatives(__alt_instructions, __alt_instructions_end, alt_done); - write_cr0(cr0); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4); + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RX); + flush_local(FLUSH_TLB_GLOBAL); alt_done |= alt_todo; } @@ -466,19 +470,6 @@ static void __init _alternative_instructions(bool force) panic("Timed out waiting for alternatives self-NMI to hit\n"); set_nmi_callback(saved_nmi_callback); - - /* - * When Xen is using shadow stacks, the alternatives clearing CR0.WP and - * writing into the mappings set dirty bits, turning the mappings into - * shadow stack mappings. - * - * While we can execute from them, this would also permit them to be the - * target of WRSS instructions, so reset the dirty after patching. - */ - if ( cpu_has_xen_shstk ) - modify_xen_mappings(XEN_VIRT_START + MB(2), - (unsigned long)&__2M_text_end, - PAGE_HYPERVISOR_RX); } void __init alternative_instructions(void) diff --git a/xen/arch/x86/livepatch.c b/xen/arch/x86/livepatch.c index f2d783fdc5..a54d991c5f 100644 --- a/xen/arch/x86/livepatch.c +++ b/xen/arch/x86/livepatch.c @@ -61,46 +61,32 @@ int arch_livepatch_safety_check(void) int noinline arch_livepatch_quiesce(void) { - /* If Shadow Stacks are in use, disable CR4.CET so we can modify CR0.WP. */ - if ( cpu_has_xen_shstk ) - write_cr4(read_cr4() & ~X86_CR4_CET); - - /* Disable WP to allow changes to read-only pages. */ - write_cr0(read_cr0() & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but all other CPUs are waiting on us. + */ + relax_virtual_region_perms(); + flush_local(FLUSH_TLB_GLOBAL); return 0; } void noinline arch_livepatch_revive(void) { - /* Reinstate WP. */ - write_cr0(read_cr0() | X86_CR0_WP); - - /* Clobber dirty bits and reinstate CET, if applicable. */ - if ( IS_ENABLED(CONFIG_XEN_SHSTK) && cpu_has_xen_shstk ) - { - unsigned long tmp; - - reset_virtual_region_perms(); - - write_cr4(read_cr4() | X86_CR4_CET); - - /* - * Fix up the return address on the shadow stack, which currently - * points at arch_livepatch_quiesce()'s caller. - * - * Note: this is somewhat fragile, and depends on both - * arch_livepatch_{quiesce,revive}() being called from the same - * function, which is currently the case. - * - * Any error will result in Xen dying with #CP, and its too late to - * recover in any way. - */ - asm volatile ("rdsspq %[ssp];" - "wrssq %[addr], (%[ssp]);" - : [ssp] "=&r" (tmp) - : [addr] "r" (__builtin_return_address(0))); - } + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + * + * The other CPUs waiting for us could in principle have re-walked while + * we were patching and cached the reduced perms in their TLB. Therefore, + * we need to do a global TLB flush. + * + * However, we can't use Xen's normal global TLB flush infrastructure, so + * delay the TLB flush to arch_livepatch_post_action(), which is called on + * all CPUs (including us) on the way out of patching. + */ + tighten_virtual_region_perms(); } int arch_livepatch_verify_func(const struct livepatch_func *func) @@ -197,6 +183,8 @@ void noinline arch_livepatch_revert(const struct livepatch_func *func) */ void noinline arch_livepatch_post_action(void) { + /* See arch_livepatch_revive() */ + flush_local(FLUSH_TLB_GLOBAL); } static nmi_callback_t *saved_nmi_callback; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index db1817b691..b46eee1332 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -103,6 +103,7 @@ #include #include #include +#include #include #include #include @@ -5891,6 +5892,73 @@ int destroy_xen_mappings(unsigned long s, unsigned long e) return modify_xen_mappings(s, e, _PAGE_NONE); } +/* + * Similar to modify_xen_mappings(), but used by the alternatives and + * livepatch in weird contexts. All synchronization, TLB flushing, etc is the + * responsibility of the caller, and *MUST* not be introduced here. + * + * Must be limited to XEN_VIRT_{START,END}, i.e. over l2_xenmap[]. + * Must be called with present flags, and over present mappings. + * It is the callers responsibility to not pass s or e in the middle of + * superpages if changing the permission on the whole superpage is going to be + * a problem. + */ +void init_or_livepatch modify_xen_mappings_lite( + unsigned long s, unsigned long e, unsigned int _nf) +{ + unsigned long v = s, fm, nf; + + /* Set of valid PTE bits which may be altered. */ +#define FLAGS_MASK (_PAGE_NX|_PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_RW|_PAGE_PRESENT) + fm = put_pte_flags(FLAGS_MASK); + nf = put_pte_flags(_nf & FLAGS_MASK); +#undef FLAGS_MASK + + ASSERT(nf & _PAGE_PRESENT); + ASSERT(IS_ALIGNED(s, PAGE_SIZE) && s >= XEN_VIRT_START); + ASSERT(IS_ALIGNED(e, PAGE_SIZE) && e <= XEN_VIRT_END); + + while ( v < e ) + { + l2_pgentry_t *pl2e = &l2_xenmap[l2_table_offset(v)]; + l2_pgentry_t l2e = l2e_read_atomic(pl2e); + unsigned int l2f = l2e_get_flags(l2e); + + ASSERT(l2f & _PAGE_PRESENT); + + if ( l2e_get_flags(l2e) & _PAGE_PSE ) + { + l2e_write_atomic(pl2e, l2e_from_intpte((l2e.l2 & ~fm) | nf)); + + v += 1UL << L2_PAGETABLE_SHIFT; + continue; + } + + /* else descend to l1 */ + { + l1_pgentry_t *pl1t = map_l1t_from_l2e(l2e); + + while ( v < e ) + { + l1_pgentry_t *pl1e = &pl1t[l1_table_offset(v)]; + l1_pgentry_t l1e = l1e_read_atomic(pl1e); + unsigned int l1f = l1e_get_flags(l1e); + + ASSERT(l1f & _PAGE_PRESENT); + + l1e_write_atomic(pl1e, l1e_from_intpte((l1e.l1 & ~fm) | nf)); + + v += 1UL << L1_PAGETABLE_SHIFT; + + if ( l2_table_offset(v) == 0 ) + break; + } + + unmap_domain_page(pl1t); + } + } +} + void __set_fixmap( enum fixed_addresses idx, unsigned long mfn, unsigned long flags) { diff --git a/xen/common/virtual_region.c b/xen/common/virtual_region.c index 30b0b4ab9c..5f89703f51 100644 --- a/xen/common/virtual_region.c +++ b/xen/common/virtual_region.c @@ -92,16 +92,28 @@ void unregister_virtual_region(struct virtual_region *r) remove_virtual_region(r); } -#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_XEN_SHSTK) -void reset_virtual_region_perms(void) +#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_X86) +void relax_virtual_region_perms(void) { const struct virtual_region *region; rcu_read_lock(&rcu_virtual_region_lock); list_for_each_entry_rcu( region, &virtual_region_list, list ) - modify_xen_mappings((unsigned long)region->start, - ROUNDUP((unsigned long)region->end, PAGE_SIZE), - PAGE_HYPERVISOR_RX); + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RWX); + rcu_read_unlock(&rcu_virtual_region_lock); +} + +void tighten_virtual_region_perms(void) +{ + const struct virtual_region *region; + + rcu_read_lock(&rcu_virtual_region_lock); + list_for_each_entry_rcu( region, &virtual_region_list, list ) + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RX); rcu_read_unlock(&rcu_virtual_region_lock); } #endif diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index a925028ab3..3dc61bcc3c 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -100,6 +100,7 @@ int map_pages_to_xen( unsigned int flags); /* Alter the permissions of a range of Xen virtual address space. */ int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags); +void modify_xen_mappings_lite(unsigned long s, unsigned long e, unsigned int flags); int destroy_xen_mappings(unsigned long s, unsigned long e); /* Retrieve the MFN mapped by VA in Xen virtual address space. */ mfn_t xen_map_to_mfn(unsigned long va); diff --git a/xen/include/xen/virtual_region.h b/xen/include/xen/virtual_region.h index ba408eb87a..d053620711 100644 --- a/xen/include/xen/virtual_region.h +++ b/xen/include/xen/virtual_region.h @@ -33,7 +33,9 @@ void setup_virtual_regions(const struct exception_table_entry *start, void unregister_init_virtual_region(void); void register_virtual_region(struct virtual_region *r); void unregister_virtual_region(struct virtual_region *r); -void reset_virtual_region_perms(void); + +void relax_virtual_region_perms(void); +void tighten_virtual_region_perms(void); #endif /* __XEN_VIRTUAL_REGION_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 05:00:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 05:00:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525717.817074 (Exim 4.92) (envelope-from ) id 1prAnD-0002Cs-Qu; Tue, 25 Apr 2023 05:00:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525717.817074; Tue, 25 Apr 2023 05:00:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAnD-0002Ci-O4; Tue, 25 Apr 2023 05:00:43 +0000 Received: by outflank-mailman (input) for mailman id 525717; Tue, 25 Apr 2023 05:00:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAnC-0002CW-Uy for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prAnC-0000g5-U2 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prAnC-0003bO-T9 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 05:00:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7HpUKQA71MCo7PdVuLRu+x+bxKkszoAWkB/gPLjnARw=; b=O1Oiz8qRXPblsr/RJyY9AUdrOo 3jbUninz7g33n5DD6fptDMmH9fOiuoBi2h+Vwh1pHlp3manT4tv5SaI8rWLAXtVUto5OCbCIhFiXO mI4WhjaZxiXPIEFKarIRIOpst+Tt4b45JLIsHfa9fL+yINAFpZxH3d9KKzQnVt2QOl3I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] xen/ELF: Fix ELF32 PRI formatters Message-Id: Date: Tue, 25 Apr 2023 05:00:42 +0000 commit aa80e0afaaa5399915d90a80c6dbe1e353664d44 Author: Andrew Cooper AuthorDate: Mon Apr 24 13:02:19 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:02:19 2023 +0200 xen/ELF: Fix ELF32 PRI formatters It is rude to hide width formatting inside a PRI* macro, doubly so when it's only in one bitness of the macro. However its fully buggy when all the users use %#"PRI because then it expands to the common trap of %#08x which does not do what the author intends. Switch the 32bit ELF PRI formatters to use plain integer PRI's, just like on the 64bit side already. No practical change. Fixes: 7597fabca76e ("livepatch: Include sizes when an mismatch occurs") Fixes: 380b229634f8 ("xsplice: Implement payload loading") Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Ross Lagerwall master commit: cfa2bb82c01f0c656804cedd8f44eb2a99a2b5bc master date: 2023-04-19 15:55:29 +0100 --- xen/include/xen/elfstructs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index 06e6f87c3d..3124469fae 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -561,8 +561,8 @@ typedef struct { #endif #if defined(ELFSIZE) && (ELFSIZE == 32) -#define PRIxElfAddr "08x" -#define PRIuElfWord "8u" +#define PRIxElfAddr PRIx32 +#define PRIuElfWord PRIu32 #define Elf_Ehdr Elf32_Ehdr #define Elf_Phdr Elf32_Phdr -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 08:22:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 08:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525870.817347 (Exim 4.92) (envelope-from ) id 1prDw3-0003Pp-DE; Tue, 25 Apr 2023 08:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525870.817347; Tue, 25 Apr 2023 08:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDw3-0003Pi-Aj; Tue, 25 Apr 2023 08:22:03 +0000 Received: by outflank-mailman (input) for mailman id 525870; Tue, 25 Apr 2023 08:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDw1-0003Pc-MA for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDw1-0005xO-LH for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prDw1-0007Oz-KJ for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lAFQazBUqlU0CyugFmqb+xMscQrbJ8tqrnCOCKEYSPU=; b=DX/fY/LMhYQOiqNGW3Q2Vm1G9A qJgRZXmFihPij166lO+p6R5k1hWfcOpNHKy+xJgzCL7/5PHX6AUR08sFD9axOF2r+5FGhrRgN4gQr 8fMhU9VlUOkgzieaoAObFXjfN8Z6c+d842Bzxo5oX/61HQnNwEDvuVIijk2FRzYzXOX0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] tools/xenstore: fix quota check in transaction_fix_domains() Message-Id: Date: Tue, 25 Apr 2023 08:22:01 +0000 commit 1df1a2acabda9bb3996c6105039af39de1f2d060 Author: Juergen Gross AuthorDate: Mon Apr 24 13:03:36 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:03:36 2023 +0200 tools/xenstore: fix quota check in transaction_fix_domains() Today when finalizing a transaction the number of node quota is checked to not being exceeded after the transaction. This check is always done, even if the transaction is being performed by a privileged connection, or if there were no nodes created in the transaction. Correct that by checking quota only if: - the transaction is being performed by an unprivileged guest, and - at least one node was created in the transaction Reported-by: Julien Grall Fixes: f2bebf72c4d5 ("xenstore: rework of transaction handling") Signed-off-by: Juergen Gross master commit: f6b801c36bd5e4ab22a9f80c8d57121b62b139af master date: 2023-03-29 22:02:36 +0100 --- tools/xenstore/xenstored_core.c | 3 +++ tools/xenstore/xenstored_transaction.c | 24 ++++++++++++++++++++---- tools/xenstore/xenstored_transaction.h | 3 +++ 3 files changed, 26 insertions(+), 4 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index ccb7f0a925..feb7bbaa52 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1478,6 +1478,9 @@ static struct node *create_node(struct connection *conn, const void *ctx, if (!node) return NULL; + if (conn && conn->transaction) + ta_node_created(conn->transaction); + node->data = data; node->datalen = datalen; diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index ac854197ca..8ebd16aed2 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -172,12 +172,20 @@ struct transaction /* List of changed domains - to record the changed domain entry number */ struct list_head changed_domains; + /* There was at least one node created in the transaction. */ + bool node_created; + /* Flag for letting transaction fail. */ bool fail; }; uint64_t generation; +void ta_node_created(struct transaction *trans) +{ + trans->node_created = true; +} + static struct accessed_node *find_accessed_node(struct transaction *trans, const char *name) { @@ -514,7 +522,12 @@ int do_transaction_start(const void *ctx, struct connection *conn, return 0; } -static int transaction_fix_domains(struct transaction *trans, bool update) +/* + * Update or check number of nodes per domain at the end of a transaction. + * If "update" is true, "chk_quota" is ignored. + */ +static int transaction_fix_domains(struct transaction *trans, bool chk_quota, + bool update) { struct changed_domain *d; int cnt; @@ -522,7 +535,7 @@ static int transaction_fix_domains(struct transaction *trans, bool update) list_for_each_entry(d, &trans->changed_domains, list) { cnt = domain_entry_fix(d->domid, d->nbentry, update); if (!update) { - if (cnt >= quota_nb_entry_per_domain) + if (chk_quota && cnt >= quota_nb_entry_per_domain) return ENOSPC; if (cnt < 0) return ENOMEM; @@ -538,6 +551,7 @@ int do_transaction_end(const void *ctx, struct connection *conn, const char *arg = onearg(in); struct transaction *trans; bool is_corrupt = false; + bool chk_quota; int ret; if (!arg || (!streq(arg, "T") && !streq(arg, "F"))) @@ -552,13 +566,15 @@ int do_transaction_end(const void *ctx, struct connection *conn, if (!conn->transaction_started) conn->ta_start_time = 0; + chk_quota = trans->node_created && domain_is_unprivileged(conn); + /* Attach transaction to ctx for auto-cleanup */ talloc_steal(ctx, trans); if (streq(arg, "T")) { if (trans->fail) return ENOMEM; - ret = transaction_fix_domains(trans, false); + ret = transaction_fix_domains(trans, chk_quota, false); if (ret) return ret; ret = finalize_transaction(conn, trans, &is_corrupt); @@ -568,7 +584,7 @@ int do_transaction_end(const void *ctx, struct connection *conn, wrl_apply_debit_trans_commit(conn); /* fix domain entry for each changed domain */ - transaction_fix_domains(trans, true); + transaction_fix_domains(trans, false, true); if (is_corrupt) corrupt(conn, "transaction inconsistency"); diff --git a/tools/xenstore/xenstored_transaction.h b/tools/xenstore/xenstored_transaction.h index 3417303f94..f57d204cc0 100644 --- a/tools/xenstore/xenstored_transaction.h +++ b/tools/xenstore/xenstored_transaction.h @@ -36,6 +36,9 @@ int do_transaction_end(const void *ctx, struct connection *conn, struct transaction *transaction_lookup(struct connection *conn, uint32_t id); +/* Set flag for created node. */ +void ta_node_created(struct transaction *trans); + /* inc/dec entry number local to trans while changing a node */ void transaction_entry_inc(struct transaction *trans, unsigned int domid); void transaction_entry_dec(struct transaction *trans, unsigned int domid); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 08:22:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 08:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525871.817352 (Exim 4.92) (envelope-from ) id 1prDwD-0003S9-FA; Tue, 25 Apr 2023 08:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525871.817352; Tue, 25 Apr 2023 08:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwD-0003S2-CL; Tue, 25 Apr 2023 08:22:13 +0000 Received: by outflank-mailman (input) for mailman id 525871; Tue, 25 Apr 2023 08:22:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwB-0003Rd-QM for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86emul: pull permission check ahead for REP INS/OUTS Message-Id: Date: Tue, 25 Apr 2023 08:22:11 +0000 commit eff203e185ed2fc60880b4691ae4265783171513 Author: Jan Beulich AuthorDate: Mon Apr 24 13:03:59 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:03:59 2023 +0200 x86emul: pull permission check ahead for REP INS/OUTS Based on observations on a fair range of hardware from both primary vendors even zero-iteration-count instances of these insns perform the port related permission checking first. Fixes: fe300600464c ("x86: Fix emulation of REP prefix") Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper master commit: f41c88a6fca59f99a2eb5e7ed3d90ab7bca08b1b master date: 2023-03-30 13:07:16 +0200 --- xen/arch/x86/x86_emulate/x86_emulate.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 847f8f3771..c4ff341405 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -4249,14 +4249,15 @@ x86_emulate( goto imul; case 0x6c ... 0x6d: /* ins %dx,%es:%edi */ { - unsigned long nr_reps = get_rep_prefix(false, true); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - dst.mem.seg = x86_seg_es; - dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(false, true); + dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes); + dst.mem.seg = x86_seg_es; /* Try the presumably most efficient approach first. */ if ( !ops->rep_ins ) nr_reps = 1; @@ -4290,13 +4291,14 @@ x86_emulate( } case 0x6e ... 0x6f: /* outs %esi,%dx */ { - unsigned long nr_reps = get_rep_prefix(true, false); + unsigned long nr_reps; unsigned int port = _regs.dx; dst.bytes = !(b & 1) ? 1 : (op_bytes == 8) ? 4 : op_bytes; - ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); if ( (rc = ioport_access_check(port, dst.bytes, ctxt, ops)) != 0 ) goto done; + nr_reps = get_rep_prefix(true, false); + ea.mem.off = truncate_ea_and_reps(_regs.r(si), nr_reps, dst.bytes); /* Try the presumably most efficient approach first. */ if ( !ops->rep_outs ) nr_reps = 1; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 08:22:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 08:22:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525872.817356 (Exim 4.92) (envelope-from ) id 1prDwN-0003VH-Gg; Tue, 25 Apr 2023 08:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525872.817356; Tue, 25 Apr 2023 08:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwN-0003V9-Dz; Tue, 25 Apr 2023 08:22:23 +0000 Received: by outflank-mailman (input) for mailman id 525872; Tue, 25 Apr 2023 08:22:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwL-0003Uu-UB for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwL-0005xe-TU for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prDwL-0007Q1-SQ for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Kr8rVXekz9cwro6l1Evp40ov9PBFbxrDguQyWgdrzKg=; b=jxCKshqQthuwVYO6VNzz4HJG+M 3CMGNnF4mi2znAwFD8IClSy3aE3+w1lfrlHoMRgGAoZee4hpM+fNDDtW3HhIIck7n8qqkt30OlacG XakLU8JTBwdDOm63owf5nLGu1Skc6ticWHHjh53a7q4EjFA0fCxPjjGvTcnFWb2QyGGc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/hvm: Disallow disabling paging in 64bit mode Message-Id: Date: Tue, 25 Apr 2023 08:22:21 +0000 commit 8dbb7df069db23df42e7b8c36eaec9c4f842577c Author: Andrew Cooper AuthorDate: Mon Apr 24 13:05:24 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:05:24 2023 +0200 x86/hvm: Disallow disabling paging in 64bit mode The Long Mode consistency checks exist to "ensure that the processor does not enter an undefined mode or state that results in unpredictable behavior". APM Vol2 Table 14-5 "Long-Mode Consistency Checks" lists them, but there is no row preventing the OS from trying to exit Long mode while in 64bit mode. This could leave the CPU in Protected Mode with an %rip above the 4G boundary. Experimentally, AMD CPUs really do permit this state transition. An OS which tries it hits an instant SHUTDOWN, even in cases where the truncation I expect to be going on behind the scenes ought to result in sane continued execution. Furthermore, right from the very outset, the APM Vol2 14.7 "Leaving Long Mode" section instructs peoples to switch to a compatibility mode segment first before clearing CR0.PG, which does clear out the upper bits in %rip. This is further backed up by Vol2 Figure 1-6 "Operating Modes of the AMD64 Architecture". Either way, this appears to have been a genuine oversight in the AMD64 spec. Intel, on the other hand, rejects this state transition with #GP. Between revision 71 (Nov 2019) and 72 (May 2020) of SDM Vol3, a footnote to 4.1.2 "Paging-Mode Enable" was altered from If CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP); software should clear CR4.PCIDE before attempting to disable paging. to If the logical processor is in 64-bit mode or if CR4.PCIDE= 1, an attempt to clear CR0.PG causes a general-protection exception (#GP). Software should transition to compatibility mode and clear CR4.PCIDE before attempting to disable paging. which acknowledges this corner case, but there doesn't appear to be any other discussion even in the relevant Long Mode sections. So it appears that Intel spotted and addressed the corner case in IA-32e mode, but were 15 years late to document it. Xen was written to the AMD spec, and misses the check. Follow the Intel behaviour, because it is more sensible and avoids hitting a VMEntry failure. Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné master commit: 18c128ba66e6308744850aca96dbffd18f91c29b master date: 2023-04-14 18:18:20 +0100 --- xen/arch/x86/hvm/hvm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 1fe658d902..8fb3ac504d 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2357,6 +2357,21 @@ int hvm_set_cr0(unsigned long value, bool may_defer) } else if ( !(value & X86_CR0_PG) && (old_value & X86_CR0_PG) ) { + struct segment_register cs; + + hvm_get_segment_register(v, x86_seg_cs, &cs); + + /* + * Intel documents a #GP fault in this case, and VMEntry checks reject + * it as a valid state. AMD permits the state transition, and hits + * SHUTDOWN immediately thereafter. Follow the Intel behaviour. + */ + if ( (v->arch.hvm.guest_efer & EFER_LME) && cs.l ) + { + HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempt to clear CR0.PG in 64bit mode"); + return X86EMUL_EXCEPTION; + } + if ( hvm_pcid_enabled(v) ) { HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to clear CR0.PG " -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 08:22:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 08:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525873.817360 (Exim 4.92) (envelope-from ) id 1prDwX-0003Xx-II; Tue, 25 Apr 2023 08:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525873.817360; Tue, 25 Apr 2023 08:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwX-0003Xp-FR; Tue, 25 Apr 2023 08:22:33 +0000 Received: by outflank-mailman (input) for mailman id 525873; Tue, 25 Apr 2023 08:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwW-0003Xf-20 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwW-0005xp-13 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prDwW-0007Ql-09 for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SyLtjvhi873VA5KBMwyVrqgvXuhCgGzc9No2tLMje40=; b=AwJzl7kqpRc1ENfJk3CfAT20uD Yqm6OX1cuhZnELxalaaAP5vTo9kaF4hcoki9cbpzB+PciQ0LllQ0P9Pi6Qh2vtiFeZC91EWLt1zgi Fb97+p/qjtslliUrNVxpiNYwL80UPYwdSYXAWtgrsW8c9oqn71bqdLsfQl7Me+qRys3A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/livepatch: Fix livepatch application when CET is active Message-Id: Date: Tue, 25 Apr 2023 08:22:32 +0000 commit aae4235bfe2110d566929b476dcc0095b84ac9f0 Author: Andrew Cooper AuthorDate: Mon Apr 24 13:05:52 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:05:52 2023 +0200 x86/livepatch: Fix livepatch application when CET is active Right now, trying to apply a livepatch on any system with CET shstk (AMD Zen3 or later, Intel Tiger Lake or Sapphire Rapids and later) fails as follows: (XEN) livepatch: lp: Verifying enabled expectations for all functions (XEN) common/livepatch.c:1591: livepatch: lp: timeout is 30000000ns (XEN) common/livepatch.c:1703: livepatch: lp: CPU28 - IPIing the other 127 CPUs (XEN) livepatch: lp: Applying 1 functions (XEN) hi_func: Hi! (called 1 times) (XEN) Hook executing. (XEN) Assertion 'local_irq_is_enabled() || cpumask_subset(mask, cpumask_of(cpu))' failed at arch/x86/smp.c:265 (XEN) *** DOUBLE FAULT *** The assertion failure is from a global (system wide) TLB flush initiated by modify_xen_mappings(). I'm not entirely sure when this broke, and I'm not sure exactly what causes the #DF's, but it doesn't really matter either because they highlight a latent bug that I'd overlooked with the CET-SS vs patching work the first place. While we're careful to arrange for the patching CPU to avoid encountering non-shstk memory with transient shstk perms, other CPUs can pick these mappings up too if they need to re-walk for uarch reasons. Another bug is that for livepatching, we only disable CET if shadow stacks are in use. Running on Intel CET systems when Xen is only using CET-IBT will crash in arch_livepatch_quiesce() when trying to clear CR0.WP with CR4.CET still active. Also, we never went and cleared the dirty bits on .rodata. This would matter (for the same reason it matters on .text - it becomes a valid target for WRSS), but we never actually patch .rodata anyway. Therefore rework how we do patching for both alternatives and livepatches. Introduce modify_xen_mappings_lite() with a purpose similar to modify_xen_mappings(), but stripped down to the bare minimum as it's used in weird contexts. Leave all complexity to the caller to handle. Instead of patching by clearing CR0.WP (and having to jump through some fragile hoops to disable CET in order to do this), just transiently relax the permissions on .text via l2_identmap[]. Note that neither alternatives nor livepatching edit .rodata, so we don't need to relax those permissions at this juncture. The perms are relaxed globally, but this is safe enough. Alternatives run before we boot APs, and Livepatching runs in a quiesced state where the other CPUs are not doing anything interesting. This approach is far more robust. Fixes: 48cdc15a424f ("x86/alternatives: Clear CR4.CET when clearing CR0.WP") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Ross Lagerwall master commit: 8676092a0f16ca6ad188d3fb270784a2caecf542 master date: 2023-04-18 20:20:26 +0100 --- xen/arch/x86/alternative.c | 45 +++++++++++--------------- xen/arch/x86/livepatch.c | 56 +++++++++++++-------------------- xen/arch/x86/mm.c | 68 ++++++++++++++++++++++++++++++++++++++++ xen/common/virtual_region.c | 22 ++++++++++--- xen/include/xen/mm.h | 1 + xen/include/xen/virtual_region.h | 4 ++- 6 files changed, 129 insertions(+), 67 deletions(-) diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index f8023312f2..92b4bbba8c 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -333,24 +333,28 @@ static int __init nmi_apply_alternatives(const struct cpu_user_regs *regs, */ if ( !(alt_done & alt_todo) ) { - unsigned long cr0, cr4; - - cr0 = read_cr0(); - cr4 = read_cr4(); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4 & ~X86_CR4_CET); - - /* Disable WP to allow patching read-only pages. */ - write_cr0(cr0 & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but we run ahead of bringing APs + * online, so only have our own TLB to worry about. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RWX); + flush_local(FLUSH_TLB_GLOBAL); _apply_alternatives(__alt_instructions, __alt_instructions_end, alt_done); - write_cr0(cr0); - - if ( cr4 & X86_CR4_CET ) - write_cr4(cr4); + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + */ + modify_xen_mappings_lite(XEN_VIRT_START + MB(2), + (unsigned long)&__2M_text_end, + PAGE_HYPERVISOR_RX); + flush_local(FLUSH_TLB_GLOBAL); alt_done |= alt_todo; } @@ -405,19 +409,6 @@ static void __init _alternative_instructions(bool force) panic("Timed out waiting for alternatives self-NMI to hit\n"); set_nmi_callback(saved_nmi_callback); - - /* - * When Xen is using shadow stacks, the alternatives clearing CR0.WP and - * writing into the mappings set dirty bits, turning the mappings into - * shadow stack mappings. - * - * While we can execute from them, this would also permit them to be the - * target of WRSS instructions, so reset the dirty after patching. - */ - if ( cpu_has_xen_shstk ) - modify_xen_mappings(XEN_VIRT_START + MB(2), - (unsigned long)&__2M_text_end, - PAGE_HYPERVISOR_RX); } void __init alternative_instructions(void) diff --git a/xen/arch/x86/livepatch.c b/xen/arch/x86/livepatch.c index 0172610ebf..0a8d8f049b 100644 --- a/xen/arch/x86/livepatch.c +++ b/xen/arch/x86/livepatch.c @@ -60,46 +60,32 @@ int arch_livepatch_safety_check(void) int noinline arch_livepatch_quiesce(void) { - /* If Shadow Stacks are in use, disable CR4.CET so we can modify CR0.WP. */ - if ( cpu_has_xen_shstk ) - write_cr4(read_cr4() & ~X86_CR4_CET); - - /* Disable WP to allow changes to read-only pages. */ - write_cr0(read_cr0() & ~X86_CR0_WP); + /* + * Relax perms on .text to be RWX, so we can modify them. + * + * This relaxes perms globally, but all other CPUs are waiting on us. + */ + relax_virtual_region_perms(); + flush_local(FLUSH_TLB_GLOBAL); return 0; } void noinline arch_livepatch_revive(void) { - /* Reinstate WP. */ - write_cr0(read_cr0() | X86_CR0_WP); - - /* Clobber dirty bits and reinstate CET, if applicable. */ - if ( IS_ENABLED(CONFIG_XEN_SHSTK) && cpu_has_xen_shstk ) - { - unsigned long tmp; - - reset_virtual_region_perms(); - - write_cr4(read_cr4() | X86_CR4_CET); - - /* - * Fix up the return address on the shadow stack, which currently - * points at arch_livepatch_quiesce()'s caller. - * - * Note: this is somewhat fragile, and depends on both - * arch_livepatch_{quiesce,revive}() being called from the same - * function, which is currently the case. - * - * Any error will result in Xen dying with #CP, and its too late to - * recover in any way. - */ - asm volatile ("rdsspq %[ssp];" - "wrssq %[addr], (%[ssp]);" - : [ssp] "=&r" (tmp) - : [addr] "r" (__builtin_return_address(0))); - } + /* + * Reinstate perms on .text to be RX. This also cleans out the dirty + * bits, which matters when CET Shstk is active. + * + * The other CPUs waiting for us could in principle have re-walked while + * we were patching and cached the reduced perms in their TLB. Therefore, + * we need to do a global TLB flush. + * + * However, we can't use Xen's normal global TLB flush infrastructure, so + * delay the TLB flush to arch_livepatch_post_action(), which is called on + * all CPUs (including us) on the way out of patching. + */ + tighten_virtual_region_perms(); } int arch_livepatch_verify_func(const struct livepatch_func *func) @@ -196,6 +182,8 @@ void noinline arch_livepatch_revert(const struct livepatch_func *func) */ void noinline arch_livepatch_post_action(void) { + /* See arch_livepatch_revive() */ + flush_local(FLUSH_TLB_GLOBAL); } static nmi_callback_t *saved_nmi_callback; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 5812321cae..a9b159891b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -103,6 +103,7 @@ #include #include #include +#include #include #include #include @@ -5868,6 +5869,73 @@ int destroy_xen_mappings(unsigned long s, unsigned long e) return modify_xen_mappings(s, e, _PAGE_NONE); } +/* + * Similar to modify_xen_mappings(), but used by the alternatives and + * livepatch in weird contexts. All synchronization, TLB flushing, etc is the + * responsibility of the caller, and *MUST* not be introduced here. + * + * Must be limited to XEN_VIRT_{START,END}, i.e. over l2_xenmap[]. + * Must be called with present flags, and over present mappings. + * It is the callers responsibility to not pass s or e in the middle of + * superpages if changing the permission on the whole superpage is going to be + * a problem. + */ +void init_or_livepatch modify_xen_mappings_lite( + unsigned long s, unsigned long e, unsigned int _nf) +{ + unsigned long v = s, fm, nf; + + /* Set of valid PTE bits which may be altered. */ +#define FLAGS_MASK (_PAGE_NX|_PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_RW|_PAGE_PRESENT) + fm = put_pte_flags(FLAGS_MASK); + nf = put_pte_flags(_nf & FLAGS_MASK); +#undef FLAGS_MASK + + ASSERT(nf & _PAGE_PRESENT); + ASSERT(IS_ALIGNED(s, PAGE_SIZE) && s >= XEN_VIRT_START); + ASSERT(IS_ALIGNED(e, PAGE_SIZE) && e <= XEN_VIRT_END); + + while ( v < e ) + { + l2_pgentry_t *pl2e = &l2_xenmap[l2_table_offset(v)]; + l2_pgentry_t l2e = l2e_read_atomic(pl2e); + unsigned int l2f = l2e_get_flags(l2e); + + ASSERT(l2f & _PAGE_PRESENT); + + if ( l2e_get_flags(l2e) & _PAGE_PSE ) + { + l2e_write_atomic(pl2e, l2e_from_intpte((l2e.l2 & ~fm) | nf)); + + v += 1UL << L2_PAGETABLE_SHIFT; + continue; + } + + /* else descend to l1 */ + { + l1_pgentry_t *pl1t = map_l1t_from_l2e(l2e); + + while ( v < e ) + { + l1_pgentry_t *pl1e = &pl1t[l1_table_offset(v)]; + l1_pgentry_t l1e = l1e_read_atomic(pl1e); + unsigned int l1f = l1e_get_flags(l1e); + + ASSERT(l1f & _PAGE_PRESENT); + + l1e_write_atomic(pl1e, l1e_from_intpte((l1e.l1 & ~fm) | nf)); + + v += 1UL << L1_PAGETABLE_SHIFT; + + if ( l2_table_offset(v) == 0 ) + break; + } + + unmap_domain_page(pl1t); + } + } +} + void __set_fixmap( enum fixed_addresses idx, unsigned long mfn, unsigned long flags) { diff --git a/xen/common/virtual_region.c b/xen/common/virtual_region.c index 30b0b4ab9c..5f89703f51 100644 --- a/xen/common/virtual_region.c +++ b/xen/common/virtual_region.c @@ -92,16 +92,28 @@ void unregister_virtual_region(struct virtual_region *r) remove_virtual_region(r); } -#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_XEN_SHSTK) -void reset_virtual_region_perms(void) +#if defined(CONFIG_LIVEPATCH) && defined(CONFIG_X86) +void relax_virtual_region_perms(void) { const struct virtual_region *region; rcu_read_lock(&rcu_virtual_region_lock); list_for_each_entry_rcu( region, &virtual_region_list, list ) - modify_xen_mappings((unsigned long)region->start, - ROUNDUP((unsigned long)region->end, PAGE_SIZE), - PAGE_HYPERVISOR_RX); + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RWX); + rcu_read_unlock(&rcu_virtual_region_lock); +} + +void tighten_virtual_region_perms(void) +{ + const struct virtual_region *region; + + rcu_read_lock(&rcu_virtual_region_lock); + list_for_each_entry_rcu( region, &virtual_region_list, list ) + modify_xen_mappings_lite((unsigned long)region->start, + ROUNDUP((unsigned long)region->end, PAGE_SIZE), + PAGE_HYPERVISOR_RX); rcu_read_unlock(&rcu_virtual_region_lock); } #endif diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index 5db26ed477..3f5c296138 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -101,6 +101,7 @@ int map_pages_to_xen( unsigned int flags); /* Alter the permissions of a range of Xen virtual address space. */ int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags); +void modify_xen_mappings_lite(unsigned long s, unsigned long e, unsigned int flags); int destroy_xen_mappings(unsigned long v, unsigned long e); /* Retrieve the MFN mapped by VA in Xen virtual address space. */ mfn_t xen_map_to_mfn(unsigned long va); diff --git a/xen/include/xen/virtual_region.h b/xen/include/xen/virtual_region.h index ba408eb87a..d053620711 100644 --- a/xen/include/xen/virtual_region.h +++ b/xen/include/xen/virtual_region.h @@ -33,7 +33,9 @@ void setup_virtual_regions(const struct exception_table_entry *start, void unregister_init_virtual_region(void); void register_virtual_region(struct virtual_region *r); void unregister_virtual_region(struct virtual_region *r); -void reset_virtual_region_perms(void); + +void relax_virtual_region_perms(void); +void tighten_virtual_region_perms(void); #endif /* __XEN_VIRTUAL_REGION_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Tue Apr 25 08:22:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 25 Apr 2023 08:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.525874.817364 (Exim 4.92) (envelope-from ) id 1prDwh-0003ay-Ld; Tue, 25 Apr 2023 08:22:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 525874.817364; Tue, 25 Apr 2023 08:22:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwh-0003aq-Ix; Tue, 25 Apr 2023 08:22:43 +0000 Received: by outflank-mailman (input) for mailman id 525874; Tue, 25 Apr 2023 08:22:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwg-0003af-5K for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prDwg-0005y1-4a for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prDwg-0007RM-3b for xen-changelog@lists.xenproject.org; Tue, 25 Apr 2023 08:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RxIdLtkgypJq52pb+gL190x7P7yyoYbZnaihJ2qEeR4=; b=2FXnvmS6lTKWMhelQCm+yIiC2R HoNgI4YJDqZAtIRLwsJK5xFD3PqU8KPpUNAlyV1NSVjEeUuEQWcwI3Av7C+6iOdxKxlRF3y4Pi3/l MN3hYJBRdez2NumUq03XrbhV69Ph1YX5tRTO9p38Z00UJP+wPFRaPimTDR+m1cNo4St8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] xen/ELF: Fix ELF32 PRI formatters Message-Id: Date: Tue, 25 Apr 2023 08:22:42 +0000 commit 7f2df63f723478dee629b5884cdee9914f88d98c Author: Andrew Cooper AuthorDate: Mon Apr 24 13:06:28 2023 +0200 Commit: Jan Beulich CommitDate: Mon Apr 24 13:06:28 2023 +0200 xen/ELF: Fix ELF32 PRI formatters It is rude to hide width formatting inside a PRI* macro, doubly so when it's only in one bitness of the macro. However its fully buggy when all the users use %#"PRI because then it expands to the common trap of %#08x which does not do what the author intends. Switch the 32bit ELF PRI formatters to use plain integer PRI's, just like on the 64bit side already. No practical change. Fixes: 7597fabca76e ("livepatch: Include sizes when an mismatch occurs") Fixes: 380b229634f8 ("xsplice: Implement payload loading") Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Ross Lagerwall master commit: cfa2bb82c01f0c656804cedd8f44eb2a99a2b5bc master date: 2023-04-19 15:55:29 +0100 --- xen/include/xen/elfstructs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index 616ebf9269..6860aa41c3 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -561,8 +561,8 @@ typedef struct { #endif #if defined(ELFSIZE) && (ELFSIZE == 32) -#define PRIxElfAddr "08x" -#define PRIuElfWord "8u" +#define PRIxElfAddr PRIx32 +#define PRIuElfWord PRIu32 #define Elf_Ehdr Elf32_Ehdr #define Elf_Phdr Elf32_Phdr -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Wed Apr 26 02:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 26 Apr 2023 02:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.526446.818196 (Exim 4.92) (envelope-from ) id 1prVJ9-00041F-G0; Wed, 26 Apr 2023 02:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 526446.818196; Wed, 26 Apr 2023 02:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prVJ9-000417-CY; Wed, 26 Apr 2023 02:55:03 +0000 Received: by outflank-mailman (input) for mailman id 526446; Wed, 26 Apr 2023 02:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prVJ8-00040x-5I for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 02:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prVJ7-0006DM-QR for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 02:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prVJ7-0007Ao-Op for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 02:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5NBbudjTYZDSFT179aKscCSvY7q28kdXlMlStzKVPgs=; b=T7iVxLE6RrLMnEVW10qlMMBFRv 8+FXCMIyjroDuSonFMekU82+YyiPaFQvRfQNmY/B5uhyQuDeaGFExFGwBb/b4Vxw2Adhk6PrGrRzF BEaTnS5bGhbRYJpWbOROWylq3srs8C7APqI6yoGjnUva98kI5323+6HPQXGgaot9xy+o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] automation: Remove installation of packages from test scripts Message-Id: Date: Wed, 26 Apr 2023 02:55:01 +0000 commit 208dd44299193347d4ececdc1c8f864f6d9a0b9b Author: Michal Orzel AuthorDate: Tue Apr 25 09:12:48 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 09:12:48 2023 +0200 automation: Remove installation of packages from test scripts Now, when these packages are already installed in the respective containers, we can remove them from the test scripts. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini master commit: 72cfe1c3ad1fae95f4f0ac51dbdd6838264fdd7f master date: 2022-12-09 14:55:33 -0800 --- automation/scripts/qemu-alpine-arm64.sh | 8 -------- automation/scripts/qemu-alpine-x86_64.sh | 4 ---- automation/scripts/qemu-smoke-arm32.sh | 6 ------ automation/scripts/qemu-smoke-arm64.sh | 9 --------- 4 files changed, 27 deletions(-) diff --git a/automation/scripts/qemu-alpine-arm64.sh b/automation/scripts/qemu-alpine-arm64.sh index f4ac2d856f..e191de3765 100755 --- a/automation/scripts/qemu-alpine-arm64.sh +++ b/automation/scripts/qemu-alpine-arm64.sh @@ -2,14 +2,6 @@ set -ex -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - cpio \ - curl \ - busybox-static - # DomU Busybox cd binaries mkdir -p initrd diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh index 2e9625109c..8c8d0b0cd7 100755 --- a/automation/scripts/qemu-alpine-x86_64.sh +++ b/automation/scripts/qemu-alpine-x86_64.sh @@ -2,10 +2,6 @@ set -ex -apt-get -qy update -apt-get -qy install --no-install-recommends cpio \ - busybox-static - # DomU Busybox cd binaries mkdir -p initrd diff --git a/automation/scripts/qemu-smoke-arm32.sh b/automation/scripts/qemu-smoke-arm32.sh index c8ae0bfb9b..5da9533bcf 100755 --- a/automation/scripts/qemu-smoke-arm32.sh +++ b/automation/scripts/qemu-smoke-arm32.sh @@ -2,12 +2,6 @@ set -ex -export DEBIAN_FRONTEND=noninteractive -apt-get -qy update -apt-get -qy install --no-install-recommends device-tree-compiler \ - curl \ - cpio - cd binaries # Use the kernel from Debian curl --fail --silent --show-error --location --output vmlinuz http://http.us.debian.org/debian/dists/bullseye/main/installer-armhf/current/images/netboot/vmlinuz diff --git a/automation/scripts/qemu-smoke-arm64.sh b/automation/scripts/qemu-smoke-arm64.sh index 5b566072f7..80ec2b12f4 100755 --- a/automation/scripts/qemu-smoke-arm64.sh +++ b/automation/scripts/qemu-smoke-arm64.sh @@ -38,15 +38,6 @@ fi " fi -export DEBIAN_FRONTEND=noninteractive -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - busybox-static \ - cpio \ - curl - # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom ./binaries/qemu-system-aarch64 \ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 26 05:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 26 Apr 2023 05:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.526478.818250 (Exim 4.92) (envelope-from ) id 1prY7L-0007lT-BW; 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Wed, 26 Apr 2023 05:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2RtBuYe4+4B2XPaTLQinLE7EYVCyJpOE/X6WwYw8c/I=; b=rm3eFRkHWVQj/Tg2zJAjtxuLOw xVC3SyA39NrSa91I6x7O76tdGLoXyTSErYsano4Joy3CqmjGRcSl9nPPb0NoW3WgyAP/ZtWsfqmTJ nSNwbmU0DMgfu68820MjiU3lyAdMBgNP/ZLJMJfNH6DRKKq5HroFlYy3vzp6z9P1OCZ0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] automation: Remove installation of packages from test scripts Message-Id: Date: Wed, 26 Apr 2023 05:55:01 +0000 commit 6f6526ac7e342b2f125ffba649d4f13e22bbc860 Author: Michal Orzel AuthorDate: Tue Apr 25 09:22:59 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 09:22:59 2023 +0200 automation: Remove installation of packages from test scripts Now, when these packages are already installed in the respective containers, we can remove them from the test scripts. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini master commit: 72cfe1c3ad1fae95f4f0ac51dbdd6838264fdd7f master date: 2022-12-09 14:55:33 -0800 --- automation/scripts/qemu-alpine-arm64.sh | 8 -------- automation/scripts/qemu-alpine-x86_64.sh | 4 ---- automation/scripts/qemu-smoke-arm64.sh | 10 ---------- 3 files changed, 22 deletions(-) diff --git a/automation/scripts/qemu-alpine-arm64.sh b/automation/scripts/qemu-alpine-arm64.sh index f4ac2d856f..e191de3765 100755 --- a/automation/scripts/qemu-alpine-arm64.sh +++ b/automation/scripts/qemu-alpine-arm64.sh @@ -2,14 +2,6 @@ set -ex -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - cpio \ - curl \ - busybox-static - # DomU Busybox cd binaries mkdir -p initrd diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh index 2e9625109c..8c8d0b0cd7 100755 --- a/automation/scripts/qemu-alpine-x86_64.sh +++ b/automation/scripts/qemu-alpine-x86_64.sh @@ -2,10 +2,6 @@ set -ex -apt-get -qy update -apt-get -qy install --no-install-recommends cpio \ - busybox-static - # DomU Busybox cd binaries mkdir -p initrd diff --git a/automation/scripts/qemu-smoke-arm64.sh b/automation/scripts/qemu-smoke-arm64.sh index 53086a5ac7..4e6de7e624 100755 --- a/automation/scripts/qemu-smoke-arm64.sh +++ b/automation/scripts/qemu-smoke-arm64.sh @@ -2,16 +2,6 @@ set -ex -# Install QEMU -export DEBIAN_FRONTENT=noninteractive -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - busybox-static \ - cpio \ - curl - # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom ./binaries/qemu-system-aarch64 \ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Wed Apr 26 17:33:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 26 Apr 2023 17:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.526814.818807 (Exim 4.92) (envelope-from ) id 1prj0p-0007m1-Gd; Wed, 26 Apr 2023 17:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 526814.818807; Wed, 26 Apr 2023 17:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prj0p-0007ls-DV; Wed, 26 Apr 2023 17:33:03 +0000 Received: by outflank-mailman (input) for mailman id 526814; Wed, 26 Apr 2023 17:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prj0o-0007lj-0A for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 17:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prj0n-0002ia-TO for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 17:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prj0n-0000kX-Rd for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 17:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=G4JahRX9eSzn2dgvtcMZYHeRNnQQQyq67uEMTdX3XK4=; b=Jdu3VreMTC1C0HriC2u6h/8cvp q93kjBpnXrzUwmcCKHC8enh8VF1cvJCVWsEnXKigV4PQqY78bU2lIHAHJPYnH9yV85zJENCqORtmf OSdSA+/Xd2AluW8iNfIxuMGnal4FweG7/5vNmqw3A13WQwexkK9iy2nSCAXOjiLu+rZ0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/shadow: restore dropped check in sh_unshadow_for_p2m_change() Message-Id: Date: Wed, 26 Apr 2023 17:33:01 +0000 commit 8b5be1fe938f52b5d3682dee7702fd51c8cfb61b Author: Roger Pau Monné AuthorDate: Tue Apr 25 15:47:44 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 15:47:44 2023 +0200 x86/shadow: restore dropped check in sh_unshadow_for_p2m_change() As a result of 241702e064604dbb3e0d9b731aa8f45be448243b the mfn_valid() check in sh_unshadow_for_p2m_change() was lost. That allows sh_remove_shadows() to be called with gfns that have no backing page, causing an ASSERT to trigger in debug builds or dereferencing an arbitrary pointer partially under guest control in non-debug builds: RIP: e008:[] sh_remove_shadows+0x19f/0x722 RFLAGS: 0000000000010246 CONTEXT: hypervisor (d0v2) [...] Xen call trace: [] R sh_remove_shadows+0x19f/0x722 [] F arch/x86/mm/shadow/hvm.c#sh_unshadow_for_p2m_change+0xab/0x2b7 [] F arch/x86/mm/p2m-pt.c#write_p2m_entry+0x19b/0x4d3 [] F arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0x67b/0xa8e [] F p2m_set_entry+0xcc/0x149 [] F unmap_mmio_regions+0x17b/0x2c9 [] F do_domctl+0x11f3/0x195e [] F hvm_hypercall+0x5b1/0xa2d [] F vmx_vmexit_handler+0x130f/0x1cd5 [] F vmx_asm_vmexit_handler+0xf2/0x210 **************************************** Panic on CPU 1: Assertion 'mfn_valid(gmfn)' failed at arch/x86/mm/shadow/common.c:2203 **************************************** Fix this by restoring the mfn_valid() check in sh_unshadow_for_p2m_change(), unifying it with the rest of the checks that are done at the start of the function. This is XSA-430 / CVE-2022-42335 Fixes: 241702e064 ('x86/shadow: slightly consolidate sh_unshadow_for_p2m_change() (part II)') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: f6c3cb21628f7bed73cb992da400f6b36630f290 master date: 2023-04-25 15:44:54 +0200 --- xen/arch/x86/mm/shadow/hvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 29a58d9131..39abf4732d 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -814,7 +814,8 @@ static void cf_check sh_unshadow_for_p2m_change( /* Only previously present / valid entries need processing. */ if ( !(oflags & _PAGE_PRESENT) || - (!p2m_is_valid(p2mt) && !p2m_is_grant(p2mt)) ) + (!p2m_is_valid(p2mt) && !p2m_is_grant(p2mt)) || + !mfn_valid(omfn) ) return; switch ( level ) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Apr 26 23:33:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 26 Apr 2023 23:33:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.526853.818879 (Exim 4.92) (envelope-from ) id 1prodD-0003gn-8i; Wed, 26 Apr 2023 23:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 526853.818879; Wed, 26 Apr 2023 23:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prodD-0003gf-5p; Wed, 26 Apr 2023 23:33:03 +0000 Received: by outflank-mailman (input) for mailman id 526853; Wed, 26 Apr 2023 23:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prodC-0003gZ-BC for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 23:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prodB-0002ki-Ve for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 23:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prodB-00037w-Ud for xen-changelog@lists.xenproject.org; Wed, 26 Apr 2023 23:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=snAsJQjPOhtZOcfywnl9LYuI2blMpwiG/nOj4MyXJXk=; b=aj6l7eWdMMCKLek5TOaTEimDOS Ls023+Zalva/ijDMoqQlPP9+eWXuXM67ZysjG9NzGroh55SmEB3WcH8Pe9hle8X7x7cj8D+xmWkZH 8WdonEpustYvMGIB9ocUiTsG+YCCAt8FGyK/pXty+jm0r0bo1ZOgNa9v27p4hYoa/zGw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] automation: Remove installation of packages from test scripts Message-Id: Date: Wed, 26 Apr 2023 23:33:01 +0000 commit 98ec8ad2eeb96eb9d4b7f9bfd1ef3a994c63af17 Author: Michal Orzel AuthorDate: Wed Apr 26 09:29:45 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 26 09:29:45 2023 +0200 automation: Remove installation of packages from test scripts Now, when these packages are already installed in the respective containers, we can remove them from the test scripts. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini master commit: 72cfe1c3ad1fae95f4f0ac51dbdd6838264fdd7f master date: 2022-12-09 14:55:33 -0800 --- automation/scripts/qemu-smoke-x86-64.sh | 5 ----- 1 file changed, 5 deletions(-) diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/qemu-smoke-x86-64.sh index 09152e3e9c..be7e21872e 100755 --- a/automation/scripts/qemu-smoke-x86-64.sh +++ b/automation/scripts/qemu-smoke-x86-64.sh @@ -5,11 +5,6 @@ set -ex # variant should be either pv or pvh variant=$1 -# Install QEMU -export DEBIAN_FRONTENT=noninteractive -apt-get -qy update -apt-get -qy install qemu-system-x86 - # Clone and build XTF git clone https://xenbits.xen.org/git-http/xtf.git cd xtf && make -j$(nproc) && cd - -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 00:11:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 00:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.526873.818914 (Exim 4.92) (envelope-from ) id 1prpE0-0001Ry-6O; Thu, 27 Apr 2023 00:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 526873.818914; Thu, 27 Apr 2023 00:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prpE0-0001Rq-3S; Thu, 27 Apr 2023 00:11:04 +0000 Received: by outflank-mailman (input) for mailman id 526873; Thu, 27 Apr 2023 00:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prpDy-0001Rk-9r for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 00:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1prpDy-0004Cy-8x for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 00:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1prpDy-0004wm-7Y for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 00:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3kPegrdu3dVq9RvaaHZyR6ShwJn6EBayIAUIKQFvj04=; b=Tv7lXX4Q7OMe1anJRzxoXcaI7d GhWRTC1AcrNKIZxA76YC8XlKzPAqXPq9eonsRxzuTarcxGEH8TQjTsGoQtZvbG8qNYQdghYXfTgrW sPr3sm9R3bw/5xUUQFHShATvMM/9OA3c2zbHAgsY5WvCFSUSIzPtfwDszRT5Fc3v1uaA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] automation: Remove installation of packages from test scripts Message-Id: Date: Thu, 27 Apr 2023 00:11:02 +0000 commit 87cb0fd8757542893336aa2ffce3947451adf144 Author: Michal Orzel AuthorDate: Wed Apr 26 09:28:28 2023 +0200 Commit: Jan Beulich CommitDate: Wed Apr 26 09:28:28 2023 +0200 automation: Remove installation of packages from test scripts Now, when these packages are already installed in the respective containers, we can remove them from the test scripts. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini master commit: 72cfe1c3ad1fae95f4f0ac51dbdd6838264fdd7f master date: 2022-12-09 14:55:33 -0800 --- automation/scripts/qemu-alpine-arm64.sh | 8 -------- automation/scripts/qemu-smoke-arm64.sh | 10 ---------- automation/scripts/qemu-smoke-x86-64.sh | 5 ----- 3 files changed, 23 deletions(-) diff --git a/automation/scripts/qemu-alpine-arm64.sh b/automation/scripts/qemu-alpine-arm64.sh index f4ac2d856f..e191de3765 100755 --- a/automation/scripts/qemu-alpine-arm64.sh +++ b/automation/scripts/qemu-alpine-arm64.sh @@ -2,14 +2,6 @@ set -ex -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - cpio \ - curl \ - busybox-static - # DomU Busybox cd binaries mkdir -p initrd diff --git a/automation/scripts/qemu-smoke-arm64.sh b/automation/scripts/qemu-smoke-arm64.sh index 53086a5ac7..4e6de7e624 100755 --- a/automation/scripts/qemu-smoke-arm64.sh +++ b/automation/scripts/qemu-smoke-arm64.sh @@ -2,16 +2,6 @@ set -ex -# Install QEMU -export DEBIAN_FRONTENT=noninteractive -apt-get -qy update -apt-get -qy install --no-install-recommends u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - busybox-static \ - cpio \ - curl - # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom ./binaries/qemu-system-aarch64 \ diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/qemu-smoke-x86-64.sh index 09152e3e9c..be7e21872e 100755 --- a/automation/scripts/qemu-smoke-x86-64.sh +++ b/automation/scripts/qemu-smoke-x86-64.sh @@ -5,11 +5,6 @@ set -ex # variant should be either pv or pvh variant=$1 -# Install QEMU -export DEBIAN_FRONTENT=noninteractive -apt-get -qy update -apt-get -qy install qemu-system-x86 - # Clone and build XTF git clone https://xenbits.xen.org/git-http/xtf.git cd xtf && make -j$(nproc) && cd - -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527062.819244 (Exim 4.92) (envelope-from ) id 1ps6b5-0007PU-AN; Thu, 27 Apr 2023 18:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527062.819244; Thu, 27 Apr 2023 18:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6b5-0007PM-7U; Thu, 27 Apr 2023 18:44:03 +0000 Received: by outflank-mailman (input) for mailman id 527062; Thu, 27 Apr 2023 18:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6b4-0007PA-7r for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6b4-0004Rh-6C for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6b4-0001XM-3u for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eIu4VNitZ3uceALxqnJgYcyWiCuPLLpfkcArWsHkXGg=; b=q60oAFPIthepyBzMLAdeWjzrPz vNmeqWQhwfjrU5SbnULILozqvwXrRWDBjWs9a7ZFkeaav0DrqKf3WXDUKUn5WmSV/0xL9jctEO7pz MPYot0dZSc37YFXAp8suvfLINNTXt2A7lfOzxltojS064i5Boe+fl8y4vmYHNtcBEigI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/msi: clear initial MSI-X state on boot Message-Id: Date: Thu, 27 Apr 2023 18:44:02 +0000 commit 913751d7af6e78d65c1e2adf4887193c827f0c5e Author: Marek Marczykowski-Górecki AuthorDate: Tue Apr 25 12:16:17 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 12:16:17 2023 +0200 x86/msi: clear initial MSI-X state on boot Some firmware/devices are found to not reset MSI-X properly, leaving MASKALL set. Jason reports on his machine MASKALL persists through a warm reboot, but is cleared on cold boot. Xen relies on initial state being MASKALL clear. Especially, pci_reset_msix_state() assumes if MASKALL is set, it was Xen setting it due to msix->host_maskall or msix->guest_maskall. Clearing just MASKALL is risky if ENABLE is set, so clear them both. Reported-by: Jason Andryuk Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Jan Beulich Tested-by: Jason Andryuk --- xen/drivers/passthrough/msi.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/drivers/passthrough/msi.c b/xen/drivers/passthrough/msi.c index ce1a450f6f..fb78e2ebe8 100644 --- a/xen/drivers/passthrough/msi.c +++ b/xen/drivers/passthrough/msi.c @@ -46,6 +46,23 @@ int pdev_msi_init(struct pci_dev *pdev) spin_lock_init(&msix->table_lock); ctrl = pci_conf_read16(pdev->sbdf, msix_control_reg(pos)); + + if ( ctrl & (PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE) ) + { + /* + * pci_reset_msix_state() relies on MASKALL not being set + * initially, clear it (and ENABLE too - for safety), to meet that + * expectation. + */ + printk(XENLOG_WARNING + "%pp: unexpected initial MSI-X state (MASKALL=%d, ENABLE=%d), fixing\n", + &pdev->sbdf, + !!(ctrl & PCI_MSIX_FLAGS_MASKALL), + !!(ctrl & PCI_MSIX_FLAGS_ENABLE)); + ctrl &= ~(PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); + pci_conf_write16(pdev->sbdf, msix_control_reg(pos), ctrl); + } + msix->nr_entries = msix_table_size(ctrl); pdev->msix = msix; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527063.819248 (Exim 4.92) (envelope-from ) id 1ps6bF-0007Rb-Bd; Thu, 27 Apr 2023 18:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527063.819248; Thu, 27 Apr 2023 18:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bF-0007RT-8z; Thu, 27 Apr 2023 18:44:13 +0000 Received: by outflank-mailman (input) for mailman id 527063; Thu, 27 Apr 2023 18:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bE-0007RL-Aq for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bE-0004Ro-A3 for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6bE-0001Xr-8y for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=n8Rfxn0JFg4mjTOGntlsJF8iVO2Wb8UAQeihepD+Irs=; b=b90f9RlCWsKqUZg/P2HEzRNrVe uj+d8AxuZZ/lo+6ndGzmOnX89bptjgtGYPSq/bxvSsTQOpzvYxm34gbD/0RCayh4HMGLl11/RRV3s /+0xeJI3vJtVWoh88MuDRkdfac5+8wxFI0fdxY7EB61lq6ovKPGMz1qvDCXOsTcsioR8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: detect CMOS aliasing on ports other than 0x70/0x71 Message-Id: Date: Thu, 27 Apr 2023 18:44:12 +0000 commit 7c3e99b642d321bfe4eafed4d667e1bdd65ac410 Author: Jan Beulich AuthorDate: Tue Apr 25 12:17:26 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 12:17:26 2023 +0200 x86: detect CMOS aliasing on ports other than 0x70/0x71 ... in order to also intercept Dom0 accesses through the alias ports. Also stop intercepting accesses to the CMOS ports if we won't ourselves use the CMOS RTC, because of there being none. This doesn't go as far as covering port 0x70, as that also has the NMI disable bit, which we don't want to permit Dom0 to set. Note that rtc_init() deliberately uses 16 as the upper loop bound, despite probe_cmos_alias() using 8: The higher bound is benign now, but would save us touching the code (or, worse, missing to touch it) in case the lower one was doubled. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- xen/arch/x86/hvm/rtc.c | 18 ++++- xen/arch/x86/include/asm/mc146818rtc.h | 4 + xen/arch/x86/pv/emul-priv-op.c | 6 +- xen/arch/x86/setup.c | 39 +++++----- xen/arch/x86/time.c | 133 ++++++++++++++++++++++++++++++--- 5 files changed, 161 insertions(+), 39 deletions(-) diff --git a/xen/arch/x86/hvm/rtc.c b/xen/arch/x86/hvm/rtc.c index 44f2fb668d..c1ab6c7d58 100644 --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include @@ -836,9 +836,19 @@ void rtc_init(struct domain *d) if ( !has_vrtc(d) ) { - if ( is_hardware_domain(d) ) - /* Hardware domain gets mediated access to the physical RTC. */ - register_portio_handler(d, RTC_PORT(0), 2, hw_rtc_io); + unsigned int port; + + if ( !is_hardware_domain(d) ) + return; + + /* + * Hardware domain gets mediated access to the physical RTC/CMOS (of + * course unless we don't use it ourselves, for there being none). + */ + for ( port = RTC_PORT(0); port < RTC_PORT(0) + 0x10; port += 2 ) + if ( is_cmos_port(port, 2, d) ) + register_portio_handler(d, port, 2, hw_rtc_io); + return; } diff --git a/xen/arch/x86/include/asm/mc146818rtc.h b/xen/arch/x86/include/asm/mc146818rtc.h index 803b236c0a..1a34512d29 100644 --- a/xen/arch/x86/include/asm/mc146818rtc.h +++ b/xen/arch/x86/include/asm/mc146818rtc.h @@ -9,6 +9,10 @@ extern spinlock_t rtc_lock; /* serialize CMOS RAM access */ +struct domain; +bool is_cmos_port(unsigned int port, unsigned int bytes, + const struct domain *d); + /********************************************************************** * register summary **********************************************************************/ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index aae38da089..8a4ef9c35e 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -208,7 +208,7 @@ static bool admin_io_okay(unsigned int port, unsigned int bytes, return false; /* We also never permit direct access to the RTC/CMOS registers. */ - if ( port <= RTC_PORT(1) && port + bytes > RTC_PORT(0) ) + if ( is_cmos_port(port, bytes, d) ) return false; return ioports_access_permitted(d, port, port + bytes - 1); @@ -278,7 +278,7 @@ static uint32_t guest_io_read(unsigned int port, unsigned int bytes, { sub_data = pv_pit_handler(port, 0, 0); } - else if ( port == RTC_PORT(0) || port == RTC_PORT(1) ) + else if ( is_cmos_port(port, 1, currd) ) { sub_data = rtc_guest_read(port); } @@ -424,7 +424,7 @@ static void guest_io_write(unsigned int port, unsigned int bytes, { pv_pit_handler(port, (uint8_t)data, 1); } - else if ( port == RTC_PORT(0) || port == RTC_PORT(1) ) + else if ( is_cmos_port(port, 1, currd) ) { rtc_guest_write(port, data); } diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 08ade715a3..74e3915a4d 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2130,37 +2130,36 @@ int __hwdom_init xen_in_range(unsigned long mfn) static int __hwdom_init cf_check io_bitmap_cb( unsigned long s, unsigned long e, void *ctx) { - struct domain *d = ctx; + const struct domain *d = ctx; unsigned int i; ASSERT(e <= INT_MAX); for ( i = s; i <= e; i++ ) - __clear_bit(i, d->arch.hvm.io_bitmap); + /* + * Accesses to RTC ports also need to be trapped in order to keep + * consistency with hypervisor accesses. + */ + if ( !is_cmos_port(i, 1, d) ) + __clear_bit(i, d->arch.hvm.io_bitmap); return 0; } void __hwdom_init setup_io_bitmap(struct domain *d) { - int rc; + if ( !is_hvm_domain(d) ) + return; - if ( is_hvm_domain(d) ) - { - bitmap_fill(d->arch.hvm.io_bitmap, 0x10000); - rc = rangeset_report_ranges(d->arch.ioport_caps, 0, 0x10000, - io_bitmap_cb, d); - BUG_ON(rc); - /* - * NB: we need to trap accesses to 0xcf8 in order to intercept - * 4 byte accesses, that need to be handled by Xen in order to - * keep consistency. - * Access to 1 byte RTC ports also needs to be trapped in order - * to keep consistency with PV. - */ - __set_bit(0xcf8, d->arch.hvm.io_bitmap); - __set_bit(RTC_PORT(0), d->arch.hvm.io_bitmap); - __set_bit(RTC_PORT(1), d->arch.hvm.io_bitmap); - } + bitmap_fill(d->arch.hvm.io_bitmap, 0x10000); + if ( rangeset_report_ranges(d->arch.ioport_caps, 0, 0x10000, + io_bitmap_cb, d) ) + BUG(); + + /* + * We need to trap 4-byte accesses to 0xcf8 (see admin_io_okay(), + * guest_io_read(), and guest_io_write()). + */ + __set_bit(0xcf8, d->arch.hvm.io_bitmap); } /* diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index 4e44a43cc5..bc75e1ae7d 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1234,7 +1234,10 @@ static unsigned long get_cmos_time(void) if ( seconds < 60 ) { if ( rtc.sec != seconds ) + { cmos_rtc_probe = false; + acpi_gbl_FADT.boot_flags &= ~ACPI_FADT_NO_CMOS_RTC; + } break; } @@ -1249,6 +1252,86 @@ static unsigned long get_cmos_time(void) return mktime(rtc.year, rtc.mon, rtc.day, rtc.hour, rtc.min, rtc.sec); } +static unsigned int __ro_after_init cmos_alias_mask; + +static int __init cf_check probe_cmos_alias(void) +{ + unsigned int offs; + + if ( acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC ) + return 0; + + for ( offs = 2; offs < 8; offs <<= 1 ) + { + unsigned int i; + bool read = true; + + for ( i = RTC_REG_D + 1; i < 0x80; ++i ) + { + uint8_t normal, alt; + unsigned long flags; + + if ( i == acpi_gbl_FADT.century ) + continue; + + spin_lock_irqsave(&rtc_lock, flags); + + normal = CMOS_READ(i); + if ( inb(RTC_PORT(offs)) != i ) + read = false; + + alt = inb(RTC_PORT(offs + 1)); + + spin_unlock_irqrestore(&rtc_lock, flags); + + if ( normal != alt ) + break; + + process_pending_softirqs(); + } + if ( i == 0x80 ) + { + cmos_alias_mask |= offs; + dprintk(XENLOG_INFO, "CMOS aliased at %02x, index %s\n", + RTC_PORT(offs), read ? "r/w" : "w/o"); + } + } + + return 0; +} +__initcall(probe_cmos_alias); + +bool is_cmos_port(unsigned int port, unsigned int bytes, const struct domain *d) +{ + unsigned int offs; + + if ( !is_hardware_domain(d) ) + return port <= RTC_PORT(1) && port + bytes > RTC_PORT(0); + + /* + * While not really CMOS-related, port 0x70 always needs intercepting + * to deal with the NMI disable bit. + */ + if ( port <= RTC_PORT(0) && port + bytes > RTC_PORT(0) ) + return true; + + if ( acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC ) + return false; + + if ( port <= RTC_PORT(1) && port + bytes > RTC_PORT(0) ) + return true; + + for ( offs = 2; offs <= cmos_alias_mask; offs <<= 1 ) + { + if ( !(offs & cmos_alias_mask) ) + continue; + if ( port <= RTC_PORT(offs | 1) && port + bytes > RTC_PORT(offs) ) + return true; + } + + return false; +} + /* Helpers for guest accesses to the physical RTC. */ unsigned int rtc_guest_read(unsigned int port) { @@ -1256,23 +1339,36 @@ unsigned int rtc_guest_read(unsigned int port) unsigned long flags; unsigned int data = ~0; - switch ( port ) + switch ( port & ~cmos_alias_mask ) { case RTC_PORT(0): /* * All PV domains (and PVH dom0) are allowed to read the latched value * of the first RTC port, as there's no access to the physical IO - * ports. + * ports. Note that we return the index value regardless of whether + * underlying hardware would permit doing so. + */ + data = currd->arch.cmos_idx & (0xff >> (port == RTC_PORT(0))); + + /* + * When there's (supposedly) no RTC/CMOS, we don't intercept the other + * ports. While reading the index register isn't normally possible, + * play safe and return back whatever can be read (just in case a value + * written through an alias would be attempted to be read back here). */ - data = currd->arch.cmos_idx; + if ( port == RTC_PORT(0) && + (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) && + ioports_access_permitted(currd, port, port) ) + data = inb(port) & 0x7f; break; case RTC_PORT(1): - if ( !ioports_access_permitted(currd, RTC_PORT(0), RTC_PORT(1)) ) + if ( !ioports_access_permitted(currd, port - 1, port) ) break; spin_lock_irqsave(&rtc_lock, flags); - outb(currd->arch.cmos_idx & 0x7f, RTC_PORT(0)); - data = inb(RTC_PORT(1)); + outb(currd->arch.cmos_idx & (0xff >> (port == RTC_PORT(1))), + port - 1); + data = inb(port); spin_unlock_irqrestore(&rtc_lock, flags); break; @@ -1288,9 +1384,10 @@ void rtc_guest_write(unsigned int port, unsigned int data) struct domain *currd = current->domain; unsigned long flags; - switch ( port ) + switch ( port & ~cmos_alias_mask ) { typeof(pv_rtc_handler) hook; + unsigned int idx; case RTC_PORT(0): /* @@ -1298,20 +1395,32 @@ void rtc_guest_write(unsigned int port, unsigned int data) * value of the first RTC port, as there's no access to the physical IO * ports. */ - currd->arch.cmos_idx = data; + currd->arch.cmos_idx = data & (0xff >> (port == RTC_PORT(0))); + + /* + * When there's (supposedly) no RTC/CMOS, we don't intercept the other + * ports. Therefore the port write, with the NMI disable bit zapped, + * needs carrying out right away. + */ + if ( port == RTC_PORT(0) && + (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) && + ioports_access_permitted(currd, port, port) ) + outb(data & 0x7f, port); break; case RTC_PORT(1): - if ( !ioports_access_permitted(currd, RTC_PORT(0), RTC_PORT(1)) ) + if ( !ioports_access_permitted(currd, port - 1, port) ) break; + idx = currd->arch.cmos_idx & (0xff >> (port == RTC_PORT(1))); + hook = ACCESS_ONCE(pv_rtc_handler); if ( hook ) - hook(currd->arch.cmos_idx & 0x7f, data); + hook(idx, data); spin_lock_irqsave(&rtc_lock, flags); - outb(currd->arch.cmos_idx & 0x7f, RTC_PORT(0)); - outb(data, RTC_PORT(1)); + outb(idx, port - 1); + outb(data, port); spin_unlock_irqrestore(&rtc_lock, flags); break; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527064.819252 (Exim 4.92) (envelope-from ) id 1ps6bP-0007UQ-DE; Thu, 27 Apr 2023 18:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527064.819252; Thu, 27 Apr 2023 18:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bP-0007UI-AW; Thu, 27 Apr 2023 18:44:23 +0000 Received: by outflank-mailman (input) for mailman id 527064; Thu, 27 Apr 2023 18:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bO-0007Ty-EX for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bO-0004S0-De for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6bO-0001YY-CZ for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LUT+xJvbrfTNhwJVTdLedbzMeeBlKc5TNWxkxyFAUQU=; b=llN9Dg5Lm1q62vCPV4wJ9TW75W ogm0RZXjjcEjUKSkxnFMJhUgFu9PVujxvdHxd3ytkirkYjSJ1G/hcUOw78qu3aWxesJON0OnfA7mB YiZSQi+Gi4fpkdeR6U5Otd4xZUthReL69HEo1GjD2UoIG0lkuR5ZH4OCDozpY4vgi+mU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: add support for crash dump analysis with xen.efi Message-Id: Date: Thu, 27 Apr 2023 18:44:22 +0000 commit f514bab30ef8d4ade77a27c926e283c9bbbf9ffd Author: Juergen Gross AuthorDate: Tue Apr 25 12:18:37 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 12:18:37 2023 +0200 x86: add support for crash dump analysis with xen.efi Today it is not possible to analyse crash dumps of a system in hypervisor mode when it had been booted via EFI, as the crash utility doesn't understand the file format of xen.efi. This can easily be solved by creating an ELF file from xen.efi via objcopy. Using that file as name list for crash enables the user to analyse the dump in hypervisor mode. Note that crash isn't happy with a file containing no text and data, so using --only-keep-debug is not an option. Signed-off-by: Juergen Gross Reviewed-by: Jan Beulich --- xen/Makefile | 11 +++++++---- xen/arch/x86/Makefile | 3 +++ 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index 2710d7327e..5166403cff 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -502,9 +502,11 @@ _install: $(TARGET)$(CONFIG_XEN_INSTALL_SUFFIX) if [ -r $(TARGET).efi -a -n '$(EFI_DIR)' ]; then \ [ -d $(D)$(EFI_DIR) ] || $(INSTALL_DIR) $(D)$(EFI_DIR); \ $(INSTALL_DATA) $(TARGET).efi $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi; \ - if [ -e $(TARGET).efi.map ]; then \ - $(INSTALL_DATA) $(TARGET).efi.map $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.map; \ - fi; \ + for x in map elf; do \ + if [ -e $(TARGET).efi.$$x ]; then \ + $(INSTALL_DATA) $(TARGET).efi.$$x $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.$$x; \ + fi; \ + done; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi; \ ln -sf $(T)-$(XEN_FULLVERSION).efi $(D)$(EFI_DIR)/$(T).efi; \ @@ -539,6 +541,7 @@ _uninstall: rm -f $(D)$(DEBUG_DIR)/$(T)-syms-$(XEN_FULLVERSION).map rm -f $(D)$(EFI_DIR)/$(T)-$(XEN_FULLVERSION).efi rm -f $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).$(XEN_SUBVERSION).efi + rm -f $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.elf rm -f $(D)$(DEBUG_DIR)/$(T)-$(XEN_FULLVERSION).efi.map rm -f $(D)$(EFI_DIR)/$(T)-$(XEN_VERSION).efi rm -f $(D)$(EFI_DIR)/$(T).efi @@ -569,7 +572,7 @@ _clean: -o -name '*.lex.c' -o -name '*.tab.[ch]' -o -name "*.gcno" \ -o -name ".*.cmd" -o -name "lib.a" \) -exec rm -f {} \; rm -f include/asm $(TARGET) $(TARGET).gz $(TARGET)-syms $(TARGET)-syms.map - rm -f $(TARGET).efi $(TARGET).efi.map $(TARGET).efi.stripped + rm -f $(TARGET).efi $(TARGET).efi.map $(TARGET).efi.elf $(TARGET).efi.stripped rm -f asm-offsets.s arch/*/include/asm/asm-offsets.h rm -f .banner .allconfig.tmp include/xen/compile.h diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index fc9487aa40..2672d7f4ee 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -226,6 +226,9 @@ endif $(@D)/.$(@F).1r.o $(@D)/.$(@F).1s.o $(orphan-handling-y) $(note_file_option) -o $@ $(NM) -pa --format=sysv $(@D)/$(@F) \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort >$(@D)/$(@F).map +ifeq ($(CONFIG_DEBUG_INFO),y) + $(if $(filter --strip-debug,$(EFI_LDFLAGS)),:$(space))$(OBJCOPY) -O elf64-x86-64 $@ $@.elf +endif rm -f $(@D)/.$(@F).[0-9]* $(@D)/..$(@F).[0-9]* ifeq ($(CONFIG_XEN_IBT),y) $(SHELL) $(srctree)/tools/check-endbr.sh $@ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527065.819257 (Exim 4.92) (envelope-from ) id 1ps6bZ-0007XX-Fy; Thu, 27 Apr 2023 18:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527065.819257; Thu, 27 Apr 2023 18:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bZ-0007XP-C5; Thu, 27 Apr 2023 18:44:33 +0000 Received: by outflank-mailman (input) for mailman id 527065; Thu, 27 Apr 2023 18:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bY-0007X8-IR for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bY-0004SS-Hc for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6bY-0001Z7-GF for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1ouAZ+hK6OpuE/euX69nuGFrlLtI+K2IfJDb3W+kUPI=; b=rZ/ldCFLy9xEkgwyjev/2fJ5qL BN5CBsur0eKn5BCoc0YHWGPM+fl3b1N56iCRGJYSHBSlMJfAQHC2kGkUZ1u5EcGK5nm9bePfFl3PM wXtJU6ymlx/4NB6XfYtfaF7S5D4YN11J1IpGy5GowGsWpyxKaqndL6B5jhfQLjci7buI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/shadow: "monitor table" is a HVM-only concept Message-Id: Date: Thu, 27 Apr 2023 18:44:32 +0000 commit ffc3ca75e25024c05bce7afea694a7446e513c03 Author: Jan Beulich AuthorDate: Tue Apr 25 12:37:25 2023 +0200 Commit: Jan Beulich CommitDate: Tue Apr 25 12:37:25 2023 +0200 x86/shadow: "monitor table" is a HVM-only concept It looks like in the combination of aff8bf94ce65 ('x86/shadow: only 4-level guest code needs building when !HVM') and 0b841314dace ('x86/shadow: sh_{make,destroy}_monitor_table() are "even more" HVM- only') I didn't go quite far enough: SH_type_monitor_table is also effectively unused when !HVM. The assertion early in sh_destroy_shadow() can have the type dropped altogether: it shouldn't make it here in the first place. Pages of this type are freed directly from sh_destroy_monitor_table() only. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/x86/mm/shadow/common.c | 1 - xen/arch/x86/mm/shadow/private.h | 3 +-- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 0f3a369d89..6d84ff3d99 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1748,7 +1748,6 @@ void sh_destroy_shadow(struct domain *d, mfn_t smfn) ASSERT(t == SH_type_fl1_32_shadow || t == SH_type_fl1_pae_shadow || t == SH_type_fl1_64_shadow || - t == SH_type_monitor_table || (is_pv_32bit_domain(d) && t == SH_type_l4_64_shadow) || (page_get_owner(mfn_to_page(backpointer(sp))) == d)); diff --git a/xen/arch/x86/mm/shadow/private.h b/xen/arch/x86/mm/shadow/private.h index 93a443ee59..d02d70ab07 100644 --- a/xen/arch/x86/mm/shadow/private.h +++ b/xen/arch/x86/mm/shadow/private.h @@ -193,8 +193,7 @@ extern void shadow_audit_tables(struct vcpu *v); #define SH_type_l4_64_shadow 6U /* shadowing a 64-bit L4 page */ #define SH_type_max_shadow 6U #define SH_type_p2m_table 7U /* in use as the p2m table */ -#define SH_type_monitor_table 8U /* in use as a monitor table */ -#define SH_type_unused 9U +#define SH_type_unused 8U #endif #ifndef CONFIG_PV32 /* Unused (but uglier to #ifdef above): */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527066.819260 (Exim 4.92) (envelope-from ) id 1ps6bj-0007bG-Gl; Thu, 27 Apr 2023 18:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527066.819260; Thu, 27 Apr 2023 18:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bj-0007b9-De; Thu, 27 Apr 2023 18:44:43 +0000 Received: by outflank-mailman (input) for mailman id 527066; Thu, 27 Apr 2023 18:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bi-0007av-M3 for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6bi-0004Se-LC for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6bi-0001aB-KC for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=orxGF/qLEvGXgO+StXZwazbkdyqkGdGCQLf52oyS22c=; b=KGEZw9zBHcriaKJ8dBNKsGZ2LQ JFq+fz4ZuucrXgtRLqTYKUsyVZ4QhR9YRfPHl1ZRFqSII9QZ9VBQC8aFTh1TArmuHMYuRzEJw55JF Op6OtMivyyKf4dmrrkMuAqatjNxEHQ3Vr8j/E9hsiwYHKTNO0HcWwXS5W4xa1KTmhEdM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/shadow: restore dropped check in sh_unshadow_for_p2m_change() Message-Id: Date: Thu, 27 Apr 2023 18:44:42 +0000 commit f6c3cb21628f7bed73cb992da400f6b36630f290 Author: Roger Pau Monne AuthorDate: Mon Mar 20 12:08:52 2023 +0100 Commit: Jan Beulich CommitDate: Tue Apr 25 15:44:54 2023 +0200 x86/shadow: restore dropped check in sh_unshadow_for_p2m_change() As a result of 241702e064604dbb3e0d9b731aa8f45be448243b the mfn_valid() check in sh_unshadow_for_p2m_change() was lost. That allows sh_remove_shadows() to be called with gfns that have no backing page, causing an ASSERT to trigger in debug builds or dereferencing an arbitrary pointer partially under guest control in non-debug builds: RIP: e008:[] sh_remove_shadows+0x19f/0x722 RFLAGS: 0000000000010246 CONTEXT: hypervisor (d0v2) [...] Xen call trace: [] R sh_remove_shadows+0x19f/0x722 [] F arch/x86/mm/shadow/hvm.c#sh_unshadow_for_p2m_change+0xab/0x2b7 [] F arch/x86/mm/p2m-pt.c#write_p2m_entry+0x19b/0x4d3 [] F arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0x67b/0xa8e [] F p2m_set_entry+0xcc/0x149 [] F unmap_mmio_regions+0x17b/0x2c9 [] F do_domctl+0x11f3/0x195e [] F hvm_hypercall+0x5b1/0xa2d [] F vmx_vmexit_handler+0x130f/0x1cd5 [] F vmx_asm_vmexit_handler+0xf2/0x210 **************************************** Panic on CPU 1: Assertion 'mfn_valid(gmfn)' failed at arch/x86/mm/shadow/common.c:2203 **************************************** Fix this by restoring the mfn_valid() check in sh_unshadow_for_p2m_change(), unifying it with the rest of the checks that are done at the start of the function. This is XSA-430 / CVE-2022-42335 Fixes: 241702e064 ('x86/shadow: slightly consolidate sh_unshadow_for_p2m_change() (part II)') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- xen/arch/x86/mm/shadow/hvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index d66dfea485..c16f3b3adf 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -862,7 +862,8 @@ static void cf_check sh_unshadow_for_p2m_change( /* Only previously present / valid entries need processing. */ if ( !(oflags & _PAGE_PRESENT) || - (!p2m_is_valid(p2mt) && !p2m_is_grant(p2mt)) ) + (!p2m_is_valid(p2mt) && !p2m_is_grant(p2mt)) || + !mfn_valid(omfn) ) return; switch ( level ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:44:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527067.819263 (Exim 4.92) (envelope-from ) id 1ps6bt-0007fq-Jl; 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Thu, 27 Apr 2023 18:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Yauw7xSttQF7Zc3/bNG8WGg1+t33g88WhGUqifUt4fU=; b=ID+WpU7XfGC/vXx2JbaMDQqyIq h/W1zya3fBzd0PjUgSaPvfTpvs7THF3n2Y8OiWQeDEWVrfn+0meH2pc1zkolg58b0oSbr2mO5zznU OkFz8DCOK+D3Dy6S/RUCjz+kH71kL4vS7sue8jrGTByoi2ViNDtU//OuuzXdQKB57ldg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: specify explicit dom0 mem size for ADL tests Message-Id: Date: Thu, 27 Apr 2023 18:44:52 +0000 commit 9699347677fd8e11444323a59262b25470d5766b Author: Marek Marczykowski-Górecki AuthorDate: Mon Apr 24 22:56:56 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Apr 25 23:47:45 2023 +0100 automation: specify explicit dom0 mem size for ADL tests Avoid memory fragmentation that leads to: (XEN) common/memory.c:277:d0v10 Could not allocate order=9 extent: id=1 memflags=0xc0 (0 of 4) Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini --- automation/scripts/qubes-x86-64.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 2d4cf2e226..916dbaae59 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -123,7 +123,7 @@ TFTP=/scratch/gitlab-runner/tftp CONTROLLER=control@thor.testnet echo ' -multiboot2 (http)/gitlab-ci/xen console=com1 com1=115200,8n1 loglvl=all guest_loglvl=all +multiboot2 (http)/gitlab-ci/xen console=com1 com1=115200,8n1 loglvl=all guest_loglvl=all dom0_mem=4G module2 (http)/gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 module2 (http)/gitlab-ci/initrd-dom0 ' > $TFTP/grub.cfg -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:45:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527068.819268 (Exim 4.92) (envelope-from ) id 1ps6c3-0007ig-LI; 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Thu, 27 Apr 2023 18:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aHw4EVR0fIFVp+O5wCHJmWihfDDZN5ip7fju/sJ4tAk=; b=s292zuhBNhdv2Kkw8jgKEY6tUz vkwFlS/5T0u7oVpA2N1v5ttKCaYW27+JAN9kvQGSMoeqAJzBav5TC0c+d81jgFuNMZmGidZ+eGPL2 F/ZOqRhb398t41zkdTtBqsWd2If66fO385JI1TthiVKITRN9dHAXjewTl/kU/RbUerSA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: add runtime qemu dependencies to test container Message-Id: Date: Thu, 27 Apr 2023 18:45:02 +0000 commit fec83b86b479e1fe1c7ecdadfbcffe64d445c8b4 Author: Marek Marczykowski-Górecki AuthorDate: Mon Apr 24 22:56:57 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Apr 25 23:47:45 2023 +0100 automation: add runtime qemu dependencies to test container This is necessary to start HVM guests in subsequent tests. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini --- automation/tests-artifacts/alpine/3.12.dockerfile | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/tests-artifacts/alpine/3.12.dockerfile b/automation/tests-artifacts/alpine/3.12.dockerfile index b3909996b4..073f16a0d7 100644 --- a/automation/tests-artifacts/alpine/3.12.dockerfile +++ b/automation/tests-artifacts/alpine/3.12.dockerfile @@ -13,6 +13,7 @@ RUN \ \ # xen runtime deps apk add musl && \ + apk add libgcc && \ apk add openrc && \ apk add busybox && \ apk add sudo && \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:45:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:45:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527069.819272 (Exim 4.92) (envelope-from ) id 1ps6cD-0007m8-NF; Thu, 27 Apr 2023 18:45:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527069.819272; Thu, 27 Apr 2023 18:45:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cD-0007lz-KK; Thu, 27 Apr 2023 18:45:13 +0000 Received: by outflank-mailman (input) for mailman id 527069; Thu, 27 Apr 2023 18:45:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cD-0007le-0M for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cC-0004VC-Vq for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6cC-0001by-Uq for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=MHpMmfURJITLMIT6nxvvkw3s7zJ8kyav8WgRHkGbmiE=; b=ZBm7u5XgjXjVRfTyqI4QxwgmWB 1oqkEIyubVdt+A/IvoADwzjSqDt5AYqkD5Ow5gIhhd2mGvt/WNqsA5oxpEK6Izqf8CZxpAlD4IxrG /07rv4n8mg+T0Jo2mpU8dCOkZZXxsj9sr0s5svOm9hK+0CNdZnI9owfxWUb4xuwxY4hQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: re-enable building SeaBIOS in Alpine container Message-Id: Date: Thu, 27 Apr 2023 18:45:12 +0000 commit 360df0f8450541621b5d90dec3c32f2060861c4f Author: Marek Marczykowski-Górecki AuthorDate: Mon Apr 24 22:56:58 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Apr 25 23:47:45 2023 +0100 automation: re-enable building SeaBIOS in Alpine container It seems to build just fine with Alpine 3.12, and SeaBIOS is necessary for a HVM test (that use the Alpine build). Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini --- automation/scripts/build | 2 -- 1 file changed, 2 deletions(-) diff --git a/automation/scripts/build b/automation/scripts/build index 7d1b19c425..d830cff7b7 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -77,8 +77,6 @@ else if ldd /bin/ls | grep -q musl; then # disable --disable-werror for QEMUU when building with MUSL cfgargs+=("--with-extra-qemuu-configure-args=\"--disable-werror\"") - # SeaBIOS doesn't build on MUSL systems - cfgargs+=("--with-system-seabios=/bin/false") fi # Qemu requires Python 3.5 or later, and ninja -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 18:45:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 18:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527070.819276 (Exim 4.92) (envelope-from ) id 1ps6cO-0007pQ-Or; Thu, 27 Apr 2023 18:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527070.819276; Thu, 27 Apr 2023 18:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cO-0007pG-Ly; Thu, 27 Apr 2023 18:45:24 +0000 Received: by outflank-mailman (input) for mailman id 527070; Thu, 27 Apr 2023 18:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cN-0007ow-3c for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ps6cN-0004VJ-2w for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1ps6cN-0001cV-23 for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 18:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eknsxlVkPVcIdi419tltROecOo8QLXt/e5ufmfmuVNc=; b=4yc8S/VXhzaiSbm99OL5YuaGqi 2yZcF1d5EZNQHOVJ/NCpVOOZnBwpYg0XnwewWu3rEM2TdQWlwvj24g7If2d/eyOR4MJn86qRhBexv fdQP5M3iDKugjuFRG42b7oAoJeoF64nNKFr61y51JnJb+/KSqw/6HzStOGNb9E7ZH6XI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: ipxe: update for fixing build with GCC12 Message-Id: Date: Thu, 27 Apr 2023 18:45:23 +0000 commit 18a36b4a9b088875486cfe33a2d4a8ae7eb4ab47 Author: Olaf Hering AuthorDate: Wed Apr 19 11:00:26 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Apr 25 23:47:45 2023 +0100 tools: ipxe: update for fixing build with GCC12 Use a snapshot which includes commit b0ded89e917b48b73097d3b8b88dfa3afb264ed0 ("[build] Disable dangling pointer checking for GCC"), which fixes build with gcc12. Signed-off-by: Olaf Hering Acked-by: Andrew Cooper --- tools/firmware/etherboot/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/firmware/etherboot/Makefile b/tools/firmware/etherboot/Makefile index 6ab9e5bc6b..884ba35692 100644 --- a/tools/firmware/etherboot/Makefile +++ b/tools/firmware/etherboot/Makefile @@ -7,7 +7,7 @@ include Config IPXE_GIT_URL ?= https://github.com/ipxe/ipxe.git # put an updated tar.gz on xenbits after changes to this variable -IPXE_GIT_TAG := 3c040ad387099483102708bb1839110bc788cefb +IPXE_GIT_TAG := 1d1cf74a5e58811822bee4b3da3cff7282fcdfca IPXE_TARBALL_URL ?= $(XEN_EXTFILES_URL)/ipxe-git-$(IPXE_GIT_TAG).tar.gz -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Apr 27 22:55:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 27 Apr 2023 22:55:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527105.819350 (Exim 4.92) (envelope-from ) id 1psAVz-0002Xr-3L; Thu, 27 Apr 2023 22:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527105.819350; Thu, 27 Apr 2023 22:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psAVz-0002Xj-0c; Thu, 27 Apr 2023 22:55:03 +0000 Received: by outflank-mailman (input) for mailman id 527105; Thu, 27 Apr 2023 22:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psAVy-0002Xd-5A for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 22:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psAVx-0001jZ-St for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 22:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psAVx-0000g5-Rh for xen-changelog@lists.xenproject.org; Thu, 27 Apr 2023 22:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=w1CRX8XpsGdlL3sI0fyGrb6lNKQ7Qn3DyCtouunTVwU=; b=eKJhSIm+4fH3qhVUd6jKLzWodj B2i8XjYEmNVmCqP8+keFSPhu5nOq87rLl7T4ZIFplGLDJD0fDpXtp5QTssLm4aMqqbytWkkG25AQ9 rMIaGQGm5Wy5wRW9shWnAR5/GWaniqlYYhKvlbe34vMOqfg3JcK8e+XMoxOYxLnucLt8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] update Xen version to 4.17.1 Message-Id: Date: Thu, 27 Apr 2023 22:55:01 +0000 commit 0880df6f5f905bffc86dd181a8af64f16cc62110 Author: Jan Beulich AuthorDate: Thu Apr 27 14:53:19 2023 +0200 Commit: Jan Beulich CommitDate: Thu Apr 27 14:53:19 2023 +0200 update Xen version to 4.17.1 --- Config.mk | 6 +++--- xen/Makefile | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Config.mk b/Config.mk index d1f569f567..b9b999af45 100644 --- a/Config.mk +++ b/Config.mk @@ -229,15 +229,15 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 -QEMU_UPSTREAM_REVISION ?= qemu-xen-4.17.0 -MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.17.0 +QEMU_UPSTREAM_REVISION ?= qemu-xen-4.17.1 +MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.17.1 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 ETHERBOOT_NICS ?= rtl8139 8086100e -QEMU_TRADITIONAL_REVISION ?= xen-4.17.0 +QEMU_TRADITIONAL_REVISION ?= xen-4.17.1 # Specify which qemu-dm to use. This may be `ioemu' to use the old # Mercurial in-tree version, or a local directory, or a git URL. diff --git a/xen/Makefile b/xen/Makefile index dcedfbc38e..c535a5cfd1 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 17 -export XEN_EXTRAVERSION ?= .1-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .1$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Fri Apr 28 18:11:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 28 Apr 2023 18:11:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527490.820155 (Exim 4.92) (envelope-from ) id 1psSYg-0007Z8-Tv; Fri, 28 Apr 2023 18:11:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527490.820155; Fri, 28 Apr 2023 18:11:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYg-0007Z1-Qm; Fri, 28 Apr 2023 18:11:02 +0000 Received: by outflank-mailman (input) for mailman id 527490; Fri, 28 Apr 2023 18:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYg-0007Yv-0B for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYf-0004s1-Vb for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psSYf-0000RW-Si for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9Az+gaXTEKUwlLOiZZYF9MVUw8KXz8V+gDOwPlNQzm8=; b=jTOWJ9d+XBuNrQuUnZ3GY9ng2R MeoXPSHQ+BsFRIgqt5DnNVKLBUHa0RedIfNcPJXVk9152Vxn6eWgjxBO5soTe/sCtLoUd1HYmtH7P zeOChdMZ51vuKB5kbZPaV6qVHMhPYATdq5FXapa6p5fs5IpazJYVFJVfd3KqElg1wPJk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: device_backend_callback() print rc on error Message-Id: Date: Fri, 28 Apr 2023 18:11:01 +0000 commit ed7071423635ffcc02c00fc5fb3c5cce9fbb577b Author: Jason Andryuk AuthorDate: Tue Apr 25 15:46:21 2023 -0400 Commit: Andrew Cooper CommitDate: Wed Apr 26 15:15:30 2023 +0100 libxl: device_backend_callback() print rc on error Print the rc when an error is found in device_backend_callback() so the user can have some idea of why things went wrong. Signed-off-by: Jason Andryuk Reviewed-by: Juergen Gross --- tools/libs/light/libxl_device.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_device.c b/tools/libs/light/libxl_device.c index a75c21d433..13da6e0573 100644 --- a/tools/libs/light/libxl_device.c +++ b/tools/libs/light/libxl_device.c @@ -1160,9 +1160,10 @@ static void device_backend_callback(libxl__egc *egc, libxl__ev_devstate *ds, } if (rc) { - LOGD(ERROR, aodev->dev->domid, "unable to %s device with path %s", + LOGD(ERROR, aodev->dev->domid, + "unable to %s device with path %s - rc %d", libxl__device_action_to_string(aodev->action), - libxl__device_backend_path(gc, aodev->dev)); + libxl__device_backend_path(gc, aodev->dev), rc); goto out; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Apr 28 18:11:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 28 Apr 2023 18:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527492.820159 (Exim 4.92) (envelope-from ) id 1psSYq-0007bn-V5; Fri, 28 Apr 2023 18:11:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527492.820159; Fri, 28 Apr 2023 18:11:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYq-0007bf-SM; Fri, 28 Apr 2023 18:11:12 +0000 Received: by outflank-mailman (input) for mailman id 527492; Fri, 28 Apr 2023 18:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYq-0007bV-48 for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSYq-0004sL-3F for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psSYq-0000SN-1x for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Hdh3BSb6KRpMuSFSrNjLR6lC6bPrrN1XdHM8JQz1wZ8=; b=p/CCFVSvZ51kDvwaES3gYLSaXH UyZQWag4+JkYZpO1e4k0tEXkwtihFpvamLuNfjZlub/5f6hiiNh9YQwet3c8bV/tub6XdB7Um03Dh Jn3hyDUpRkdfzgXsqxgHKBwL1KAZoOxE5sM620xkJm46u7SFy3MuufDAKsUykwsh6TJw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: Print device_kind as a string Message-Id: Date: Fri, 28 Apr 2023 18:11:12 +0000 commit 2ffa3b2d68cdb9558336ea3c70d68cc14f831ddf Author: Jason Andryuk AuthorDate: Tue Apr 25 15:46:22 2023 -0400 Commit: Andrew Cooper CommitDate: Wed Apr 26 15:15:30 2023 +0100 libxl: Print device_kind as a string Printing the integer isn't particularly informative. Switch to a human-readable string when printing the device_kind in libxl__get_hotplug_script_info(). Signed-off-by: Jason Andryuk Reviewed-by: Juergen Gross --- tools/libs/light/libxl_linux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_linux.c b/tools/libs/light/libxl_linux.c index 27f2bce718..f7c92ba562 100644 --- a/tools/libs/light/libxl_linux.c +++ b/tools/libs/light/libxl_linux.c @@ -231,8 +231,8 @@ int libxl__get_hotplug_script_info(libxl__gc *gc, libxl__device *dev, break; default: /* No need to execute any hotplug scripts */ - LOGD(DEBUG, dev->domid, - "backend_kind %d, no need to execute scripts", dev->backend_kind); + LOGD(DEBUG, dev->domid, "backend_kind %s, no need to execute scripts", + libxl__device_kind_to_string(dev->backend_kind)); rc = 0; break; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Apr 28 18:11:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 28 Apr 2023 18:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527493.820163 (Exim 4.92) (envelope-from ) id 1psSZ1-0007fo-0B; Fri, 28 Apr 2023 18:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527493.820163; Fri, 28 Apr 2023 18:11:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZ0-0007fh-Tr; Fri, 28 Apr 2023 18:11:22 +0000 Received: by outflank-mailman (input) for mailman id 527493; Fri, 28 Apr 2023 18:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZ0-0007fS-89 for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZ0-0004sY-73 for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psSZ0-0000TN-5t for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZlIfM4g5iI51Mpg1zjMDdqKRD7lW2yZO/wkOuhDA9Y8=; b=gLdRtHfXjT70aUBdCtAqtAsTwJ BdFyMiDeLkOYitIX47nZFemWG0iq9vk24bO4cbU59U2XLVBTQKSK+C3Y74rPL72otgFI7Wp6YcYUE 5pgFs5PB/O8QjWEu9ZS5T1T6zWxZ55VDB4zY3tiuBOeEr0y4u6H07lCZaCCNdspmZs18=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] stubdom: fix errors in newlib:cygmon-gmon.c Message-Id: Date: Fri, 28 Apr 2023 18:11:22 +0000 commit 860fb990bd208f590b78d938ba874e867e1c2986 Author: Olaf Hering AuthorDate: Wed Apr 26 10:51:56 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 26 15:15:30 2023 +0100 stubdom: fix errors in newlib:cygmon-gmon.c rpm post-build-checks found a few code bugs in newlib, and marks them as errors. Add another newlib patch and apply it during stubdom build. I: A function uses a 'return;' statement, but has actually a value to return, like an integer ('return 42;') or similar. W: xen voidreturn ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:117, 125, 146, 157, 330 I: Program is using implicit definitions of special functions. these functions need to use their correct prototypes to allow the lightweight buffer overflow checking to work. - Implicit memory/string functions need #include . - Implicit *printf functions need #include . - Implicit *printf functions need #include . - Implicit *read* functions need #include . - Implicit *recv* functions need #include . E: xen implicit-fortify-decl ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:119 I: Program returns random data in a function E: xen no-return-in-nonvoid-function ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:362 Signed-off-by: Olaf Hering Reviewed-by: Samuel Thibault --- stubdom/Makefile | 1 + stubdom/newlib-cygmon-gmon.patch | 60 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) diff --git a/stubdom/Makefile b/stubdom/Makefile index b312f710cd..cddbbe2da0 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -95,6 +95,7 @@ newlib-$(NEWLIB_VERSION): newlib-$(NEWLIB_VERSION).tar.gz patch -d $@ -p0 < newlib-chk.patch patch -d $@ -p1 < newlib-stdint-size_max-fix-from-1.17.0.patch patch -d $@ -p1 < newlib-disable-texinfo.patch + patch -d $@ -p1 < newlib-cygmon-gmon.patch find $@ -type f | xargs perl -i.bak \ -pe 's/\b_(tzname|daylight|timezone)\b/$$1/g' touch $@ diff --git a/stubdom/newlib-cygmon-gmon.patch b/stubdom/newlib-cygmon-gmon.patch new file mode 100644 index 0000000000..b2dfbfafe2 --- /dev/null +++ b/stubdom/newlib-cygmon-gmon.patch @@ -0,0 +1,60 @@ + +I: A function uses a 'return;' statement, but has actually a value + to return, like an integer ('return 42;') or similar. +W: xen voidreturn ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:117, 125, 146, 157, 330 + +I: Program is using implicit definitions of special functions. + these functions need to use their correct prototypes to allow + the lightweight buffer overflow checking to work. + - Implicit memory/string functions need #include . + - Implicit *printf functions need #include . + - Implicit *printf functions need #include . + - Implicit *read* functions need #include . + - Implicit *recv* functions need #include . +E: xen implicit-fortify-decl ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:119 + +I: Program returns random data in a function +E: xen no-return-in-nonvoid-function ../../../../newlib-1.16.0/libgloss/i386/cygmon-gmon.c:362 + +--- + libgloss/i386/cygmon-gmon.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +Index: newlib-1.16.0/libgloss/i386/cygmon-gmon.c +=================================================================== +--- newlib-1.16.0.orig/libgloss/i386/cygmon-gmon.c ++++ newlib-1.16.0/libgloss/i386/cygmon-gmon.c +@@ -61,6 +61,8 @@ + static char sccsid[] = "@(#)gmon.c 5.3 (Berkeley) 5/22/91"; + #endif /* not lint */ + ++#include ++#include + #define DEBUG + #ifdef DEBUG + #include +@@ -89,7 +91,7 @@ static int s_scale; + + extern int errno; + +-int ++void + monstartup(lowpc, highpc) + char *lowpc; + char *highpc; +@@ -199,6 +201,7 @@ _mcleanup() + + static char already_setup = 0; + ++void + _mcount() + { + register char *selfpc; +@@ -341,6 +344,7 @@ overflow: + * profiling is what mcount checks to see if + * all the data structures are ready. + */ ++void + moncontrol(mode) + int mode; + { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Apr 28 18:11:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 28 Apr 2023 18:11:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527494.820167 (Exim 4.92) (envelope-from ) id 1psSZB-0007ik-21; Fri, 28 Apr 2023 18:11:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527494.820167; Fri, 28 Apr 2023 18:11:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZA-0007id-VK; Fri, 28 Apr 2023 18:11:32 +0000 Received: by outflank-mailman (input) for mailman id 527494; Fri, 28 Apr 2023 18:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZA-0007iU-BC for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psSZA-0004ss-AS for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psSZA-0000UF-9b for xen-changelog@lists.xenproject.org; Fri, 28 Apr 2023 18:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=iV1M5CFO5kLjRf4iUoCLQKKf+2+HmZjYc0fFImuIcBQ=; b=hQeNro1n0Stl0tfPCnL6OWRTin 6iX27Aauet35nLEZbvA/e8Fv/5FGCSHC2cjvvUjyQaMzvI16XWFpK1vJUDpSYlNVSqq8xISilVcVS CDC8p9P9f9XCFaPrFGIGrSZMahiwRiDQHskq3wKAh/BSh6JQSuUfvO6JGxun7ieIPtog=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] stubdom: fix errors in newlib:makedoc Message-Id: Date: Fri, 28 Apr 2023 18:11:32 +0000 commit dde20f7dc182fdfeeb6c55648979326bb982ca8c Author: Olaf Hering AuthorDate: Wed Apr 26 10:52:39 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Apr 26 15:15:30 2023 +0100 stubdom: fix errors in newlib:makedoc rpm post-build-checks found a few code bugs in newlib, and marks them as errors. Add another newlib patch and apply it during stubdom build. [ 227s] ../../../../newlib-1.16.0/newlib/doc/makedoc.c: In function 'lookup_word': [ 227s] ../../../../newlib-1.16.0/newlib/doc/makedoc.c:1147:10: warning: implicit declaration of function 'strcmp' [-Wimplicit-function-declaration] [ 227s] if (strcmp(ptr->word, word) == 0) return ptr; [ 227s] ^ [ 460s] I: Program is using implicit definitions of special functions. [ 460s] these functions need to use their correct prototypes to allow [ 460s] the lightweight buffer overflow checking to work. [ 460s] - Implicit memory/string functions need #include . [ 460s] - Implicit *printf functions need #include . [ 460s] - Implicit *printf functions need #include . [ 460s] - Implicit *read* functions need #include . [ 460s] - Implicit *recv* functions need #include . [ 460s] E: xen implicit-fortify-decl ../../../../newlib-1.16.0/newlib/doc/makedoc.c:1147 Signed-off-by: Olaf Hering Reviewed-by: Samuel Thibault --- stubdom/Makefile | 1 + stubdom/newlib-makedoc.patch | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/stubdom/Makefile b/stubdom/Makefile index cddbbe2da0..a21e1c3fa3 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -96,6 +96,7 @@ newlib-$(NEWLIB_VERSION): newlib-$(NEWLIB_VERSION).tar.gz patch -d $@ -p1 < newlib-stdint-size_max-fix-from-1.17.0.patch patch -d $@ -p1 < newlib-disable-texinfo.patch patch -d $@ -p1 < newlib-cygmon-gmon.patch + patch -d $@ -p1 < newlib-makedoc.patch find $@ -type f | xargs perl -i.bak \ -pe 's/\b_(tzname|daylight|timezone)\b/$$1/g' touch $@ diff --git a/stubdom/newlib-makedoc.patch b/stubdom/newlib-makedoc.patch new file mode 100644 index 0000000000..90678f1b63 --- /dev/null +++ b/stubdom/newlib-makedoc.patch @@ -0,0 +1,35 @@ +stubdom: fix errors in newlib + +rpm post-build-checks found a few code bugs in newlib, and marks them as +errors. Add another newlib patch and apply it during stubdom build. + +[ 227s] ../../../../newlib-1.16.0/newlib/doc/makedoc.c: In function 'lookup_word': +[ 227s] ../../../../newlib-1.16.0/newlib/doc/makedoc.c:1147:10: warning: implicit declaration of function 'strcmp' [-Wimplicit-function-declaration] +[ 227s] if (strcmp(ptr->word, word) == 0) return ptr; +[ 227s] ^ + +[ 460s] I: Program is using implicit definitions of special functions. +[ 460s] these functions need to use their correct prototypes to allow +[ 460s] the lightweight buffer overflow checking to work. +[ 460s] - Implicit memory/string functions need #include . +[ 460s] - Implicit *printf functions need #include . +[ 460s] - Implicit *printf functions need #include . +[ 460s] - Implicit *read* functions need #include . +[ 460s] - Implicit *recv* functions need #include . +[ 460s] E: xen implicit-fortify-decl ../../../../newlib-1.16.0/newlib/doc/makedoc.c:1147 +--- + newlib/doc/makedoc.c | 1 + + 1 file changed, 1 insertion(+) + +Index: newlib-1.16.0/newlib/doc/makedoc.c +=================================================================== +--- newlib-1.16.0.orig/newlib/doc/makedoc.c ++++ newlib-1.16.0/newlib/doc/makedoc.c +@@ -38,6 +38,7 @@ There is no + #include "ansidecl.h" + #include + #include ++#include + #include + + #define DEF_SIZE 5000 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Apr 29 10:22:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 29 Apr 2023 10:22:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527583.820276 (Exim 4.92) (envelope-from ) id 1pshiN-0001Yp-JC; Sat, 29 Apr 2023 10:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527583.820276; Sat, 29 Apr 2023 10:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pshiN-0001Yg-GM; Sat, 29 Apr 2023 10:22:03 +0000 Received: by outflank-mailman (input) for mailman id 527583; Sat, 29 Apr 2023 10:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pshiM-0001Ya-9c for xen-changelog@lists.xenproject.org; Sat, 29 Apr 2023 10:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pshiL-0001st-Uw for xen-changelog@lists.xenproject.org; Sat, 29 Apr 2023 10:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1pshiL-0001LR-T0 for xen-changelog@lists.xenproject.org; Sat, 29 Apr 2023 10:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yP0pkQD0gqiTvz/8+IdlWq/YXaEjZLmU0jELJSiW3KE=; b=YXZLaHX38gv9r4R/OwaMk0sxsD 7eadR2pY5FBO6mZm+TrJQbJEf9YX1BjiMcy2eha7mEPdSyOs1hceqfLtxgXetVANty2GGxl93ob/V IHY7Wd0TOWff8HGnjTomVv7Va/+9BkTDtXXHuQQ3bz6utmhnJDhGe0nzRIy0urWSy1CI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] update Xen version to 4.16.4 Message-Id: Date: Sat, 29 Apr 2023 10:22:01 +0000 commit 7251cea957cbe4a0772651a4ab110ed76f689f96 Author: Jan Beulich AuthorDate: Thu Apr 27 14:54:26 2023 +0200 Commit: Jan Beulich CommitDate: Thu Apr 27 14:54:26 2023 +0200 update Xen version to 4.16.4 --- Config.mk | 6 +++--- xen/Makefile | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Config.mk b/Config.mk index 073715c28d..5b27248329 100644 --- a/Config.mk +++ b/Config.mk @@ -238,15 +238,15 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 -QEMU_UPSTREAM_REVISION ?= qemu-xen-4.16.3 -MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.16.3 +QEMU_UPSTREAM_REVISION ?= qemu-xen-4.16.4 +MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.16.4 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 ETHERBOOT_NICS ?= rtl8139 8086100e -QEMU_TRADITIONAL_REVISION ?= xen-4.16.3 +QEMU_TRADITIONAL_REVISION ?= xen-4.16.4 # Specify which qemu-dm to use. This may be `ioemu' to use the old # Mercurial in-tree version, or a local directory, or a git URL. diff --git a/xen/Makefile b/xen/Makefile index 67c5551ffd..998db27f99 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -2,7 +2,7 @@ # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 16 -export XEN_EXTRAVERSION ?= .4-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .4$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527737.820400 (Exim 4.92) (envelope-from ) id 1psxdS-0007H2-DS; Sun, 30 Apr 2023 03:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527737.820400; Sun, 30 Apr 2023 03:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdS-0007Gr-Ah; Sun, 30 Apr 2023 03:22:02 +0000 Received: by outflank-mailman (input) for mailman id 527737; Sun, 30 Apr 2023 03:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdR-0007Gl-Q6 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdR-0007tH-P5 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxdR-0001kL-O6 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NRkGAPInTBCK7HlySC6JPk0gVBaM23mJsJvOCXK1Ad8=; b=uSoS6LmXQSk61+MNHXGyTSpade 6pxEIZFBnxwEyN1KVHElOtmudVelIkhfYg0ros0Z6p2hXAUQSW3X+nw3PidHvg1fm1iw/Lq95vuLU x/jEBmABgOEUh99YTU4U7X0DcMSsbde10QNvQJuWeHIIMZLhSCFnbsRuww0rydSWi6/4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/misra: xen-analysis.py: fix return error on PhaseExceptions Message-Id: Date: Sun, 30 Apr 2023 03:22:01 +0000 commit 09c7179f0a2c66d4d1716cc41c498349bf78811b Author: Luca Fancellu AuthorDate: Thu Apr 27 14:25:59 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Apr 27 21:44:44 2023 +0100 xen/misra: xen-analysis.py: fix return error on PhaseExceptions Currently the script return code is 0 even if an exception is found, because the return code is written only if the exception object has the errorcode member. Fix the issue returning the errorcode member in case it exists, otherwise use a generic value different from 0. Fixes: 02b26c02c7c4 ("xen/scripts: add cppcheck tool to the xen-analysis.py script") Signed-off-by: Luca Fancellu Reviewed-by: Andrew Cooper --- xen/scripts/xen-analysis.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/xen/scripts/xen-analysis.py b/xen/scripts/xen-analysis.py index 8e50c27cd8..5e8f2910cd 100755 --- a/xen/scripts/xen-analysis.py +++ b/xen/scripts/xen-analysis.py @@ -26,8 +26,7 @@ def main(argv): cppcheck_analysis.generate_cppcheck_report() except PhaseExceptions as e: print("ERROR: {}".format(e)) - if hasattr(e, "errorcode"): - ret_code = e.errorcode + ret_code = getattr(e, "errorcode", 1) finally: if settings.step_clean_analysis: cppcheck_analysis.clean_analysis_artifacts() -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527738.820403 (Exim 4.92) (envelope-from ) id 1psxdc-0007JB-Em; Sun, 30 Apr 2023 03:22:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527738.820403; Sun, 30 Apr 2023 03:22:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdc-0007J4-CL; Sun, 30 Apr 2023 03:22:12 +0000 Received: by outflank-mailman (input) for mailman id 527738; Sun, 30 Apr 2023 03:22:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdb-0007Iw-TS for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdb-0007ti-Sh for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxdb-0001ks-Rf for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/z+hH1wC6eLGyN0MT34N3Poy8BQKoHMmkoZYLzAC8Dc=; b=y90z17y2wW0ZNDl1vF1mHyaSfm 6BmajBYPtlXlwfomTkrYrZAHB8ekgzWJzql4Uupe7pX+p8H3blnp9HQCEIEEab/So/p+WWe7LOwY7 effuk/rer1XNacbCGHH7I1QDF2grmPq87t/GT4Fi2eqPQwwBtLMYEfwQbcMfcuVyYpak=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CI: Remove all use of /bin/false as a ROM Message-Id: Date: Sun, 30 Apr 2023 03:22:11 +0000 commit ac58d7fda63fecc6fae24f7824dbe033d001833e Author: Andrew Cooper AuthorDate: Wed Apr 26 15:34:30 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Apr 27 21:44:44 2023 +0100 CI: Remove all use of /bin/false as a ROM As the recent work to get PCI Passthrough testing working shows, putting `/bin/false` as a ROM into guest context doesn't work so well. For all ROM paths where we're skipping the build, use a slightly-plausible but likely non-existent path instead. Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini --- automation/scripts/build | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/automation/scripts/build b/automation/scripts/build index d830cff7b7..197d085f3e 100755 --- a/automation/scripts/build +++ b/automation/scripts/build @@ -67,9 +67,9 @@ else if [[ "${cc_is_clang}" == "y" ]]; then # SeaBIOS cannot be built with clang - cfgargs+=("--with-system-seabios=/usr/share/seabios/bios.bin") + cfgargs+=("--with-system-seabios=/usr/share/no-seabios.bin") # iPXE cannot be built with clang - cfgargs+=("--with-system-ipxe=/usr/lib/ipxe/ipxe.pxe") + cfgargs+=("--with-system-ipxe=/usr/share/no-ipxe.pxe") # newlib cannot be built with clang so we cannot build stubdoms cfgargs+=("--disable-stubdom") fi @@ -87,7 +87,7 @@ else # SeaBIOS requires GCC 4.6 or later if [[ "${cc_is_gcc}" == "y" && "${cc_ver}" -lt 0x040600 ]]; then - cfgargs+=("--with-system-seabios=/bin/false") + cfgargs+=("--with-system-seabios=/usr/share/no-seabios.bin") fi ./configure "${cfgargs[@]}" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527739.820408 (Exim 4.92) (envelope-from ) id 1psxdn-0007MD-Gn; Sun, 30 Apr 2023 03:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527739.820408; Sun, 30 Apr 2023 03:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdn-0007M5-Dv; Sun, 30 Apr 2023 03:22:23 +0000 Received: by outflank-mailman (input) for mailman id 527739; Sun, 30 Apr 2023 03:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdm-0007Li-15 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdm-0007tp-0N for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxdl-0001lK-VC for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ktISzHeyZISZp7zqlokAQ0fUXSTqBWQZMbVOCsGER1s=; b=UVLZXl8BI2Bssup/qxIeq6GJF6 HootYkF/SeIO6LqFPIaJGkBWyOmvSKZKx6WXI0MHQ3Vvd2Ph3sJ2pUupG/Sq4EpXqDPc7rtq9enpP XoM1mo4Fa7OK+eXihbNeNIqAD4pihkrbxsl+kWyWy85ho5UEoWwW45tq0Xok7/3mze98=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: wait for the login prompt as test end marker Message-Id: Date: Sun, 30 Apr 2023 03:22:21 +0000 commit 937e73feca9abaea06ec496cd93f8da8bd3b70bf Author: Marek Marczykowski-Górecki AuthorDate: Wed Apr 26 02:16:14 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Apr 27 21:48:12 2023 +0100 automation: wait for the login prompt as test end marker The login prompt is printed after all the startup (test) scripts, wait for that instead of "passed" marker. And only then check if test passed. Before this patch there was a race: "passed" marker could be already printed, but the final check would fail because login prompt wasn't there yet. Also, modify etc/issue in domU rootfs to avoid confusing the one from domU with the dom0's one. Use the dom0 one as test end marker. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini --- automation/scripts/qubes-x86-64.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 916dbaae59..6c03097046 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -66,6 +66,7 @@ ${domU_check} /bin/sh" > etc/local.d/xen.start chmod +x etc/local.d/xen.start echo "rc_verbose=yes" >> etc/rc.conf +sed -i -e 's/^Welcome/domU \0/' etc/issue find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz cd .. rm -rf rootfs @@ -159,7 +160,7 @@ if [ -n "$wait_and_wakeup" ]; then ssh $CONTROLLER wake fi -until grep "$passed" smoke.serial || [ $timeout -le 0 ]; do +until grep "^Welcome to Alpine Linux" smoke.serial || [ $timeout -le 0 ]; do sleep 1; : $((--timeout)) done -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527740.820412 (Exim 4.92) (envelope-from ) id 1psxdx-0007Ot-IP; Sun, 30 Apr 2023 03:22:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527740.820412; Sun, 30 Apr 2023 03:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdx-0007Om-Fa; Sun, 30 Apr 2023 03:22:33 +0000 Received: by outflank-mailman (input) for mailman id 527740; Sun, 30 Apr 2023 03:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdw-0007Oa-4Z for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxdw-0007u0-3r for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxdw-0001lp-2u for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9iTgoPykD/fD3yqiLDfqCGUTQt6Oq+biRa2w8KLK5QA=; b=TYQFwQOCqKIYFLldF98PN1rs0y tveg6Ext52O/cxSfqh6jyd9nM9HGzKEYzQH7Y228uLaMvGK7c7f8w4yfF0beODp0BVKvFM9tOKUvr prP28UQMlDmW5t5/rQhVmlnK99BZul+pl21XxBXrgsWImuGIRtPxo/B2OzMC+iWebe88=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: PCI passthrough tests on ADL hw Message-Id: Date: Sun, 30 Apr 2023 03:22:32 +0000 commit 3822b16a17dfa6396009c4acaf2ae660f933566f Author: Marek Marczykowski-Górecki AuthorDate: Wed Apr 26 02:16:15 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Apr 27 21:48:12 2023 +0100 automation: PCI passthrough tests on ADL hw Add simple PCI passthrough test to both PV and HVM domU. It passes through a network adapter (the only one in the system), gets an IP via DHCP (first basic test) and then ping the gateway (second basic test). Finally, if device is supposed to use MSI or MSI-X (as set in the PCIDEV_INTR test variable), check if it's in use via /proc/interrupts. On the current runner, the device in question is this: 03:00.0 Ethernet controller [0200]: Intel Corporation Ethernet Controller I225-V [8086:15f3] (rev 03) Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7d25] Flags: bus master, fast devsel, latency 0, IRQ 18 Memory at 50400000 (32-bit, non-prefetchable) [size=1M] Memory at 50500000 (32-bit, non-prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ Capabilities: [70] MSI-X: Enable+ Count=5 Masked- Capabilities: [a0] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting Capabilities: [140] Device Serial Number ... Capabilities: [1c0] Latency Tolerance Reporting Capabilities: [1f0] Precision Time Measurement Capabilities: [1e0] L1 PM Substates Kernel driver in use: igc Kernel modules: igc With the current Xen version, it uses MSI-X under PV and MSI under HVM. This patch moves domU config to a variable, to make it configurable on per-test basis. Add also a few comments for visual separation of tests. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/test.yaml | 20 +++++++++ automation/scripts/qubes-x86-64.sh | 85 ++++++++++++++++++++++++++++++++------ 2 files changed, 93 insertions(+), 12 deletions(-) diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index d68c584269..1ce083e6cd 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -94,6 +94,8 @@ # the test controller runs on RPi4 CONTAINER: alpine:3.12-arm64v8 LOGFILE: smoke-test.log + PCIDEV: "03:00.0" + PCIDEV_INTR: "MSI-X" artifacts: paths: - smoke.serial @@ -147,6 +149,24 @@ adl-suspend-x86-64-gcc-debug: - *x86-64-test-needs - alpine-3.12-gcc-debug +adl-pci-pv-x86-64-gcc-debug: + extends: .adl-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh pci-pv 2>&1 | tee ${LOGFILE} + needs: + - *x86-64-test-needs + - alpine-3.12-gcc-debug + +adl-pci-hvm-x86-64-gcc-debug: + extends: .adl-x86-64 + variables: + PCIDEV_INTR: "MSI" + script: + - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} + needs: + - *x86-64-test-needs + - alpine-3.12-gcc-debug + qemu-smoke-dom0-arm64-gcc: extends: .qemu-arm64 script: diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 6c03097046..a01c571860 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -4,8 +4,21 @@ set -ex test_variant=$1 +### defaults wait_and_wakeup= timeout=120 +domU_config=' +type = "pvh" +name = "domU" +kernel = "/boot/vmlinuz" +ramdisk = "/boot/initrd-domU" +extra = "root=/dev/ram0 console=hvc0" +memory = 512 +vif = [ "bridge=xenbr0", ] +disk = [ ] +' + +### test: smoke test if [ -z "${test_variant}" ]; then passed="ping test passed" domU_check=" @@ -23,6 +36,8 @@ done tail -n 100 /var/log/xen/console/guest-domU.log echo \"${passed}\" " + +### test: S3 elif [ "${test_variant}" = "s3" ]; then passed="suspend test passed" wait_and_wakeup="started, suspending" @@ -48,6 +63,62 @@ xl dmesg | grep 'Finishing wakeup from ACPI S3 state' || exit 1 ping -c 10 192.168.0.2 || exit 1 echo \"${passed}\" " + +### test: pci-pv, pci-hvm +elif [ "${test_variant}" = "pci-pv" ] || [ "${test_variant}" = "pci-hvm" ]; then + + if [ -z "$PCIDEV" ]; then + echo "Please set 'PCIDEV' variable with BDF of test network adapter" >&2 + echo "Optionally set also 'PCIDEV_INTR' to 'MSI' or 'MSI-X'" >&2 + exit 1 + fi + + passed="pci test passed" + + domU_config=' +type = "'${test_variant#pci-}'" +name = "domU" +kernel = "/boot/vmlinuz" +ramdisk = "/boot/initrd-domU" +extra = "root=/dev/ram0 console=hvc0" +memory = 512 +vif = [ ] +disk = [ ] +pci = [ "'$PCIDEV',seize=1" ] +on_reboot = "destroy" +' + + domU_check=" +set -x -e +ip link set eth0 up +timeout 30s udhcpc -i eth0 +pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ') +ping -c 10 \"\$pingip\" +echo domU started +cat /proc/interrupts +" + if [ "$PCIDEV_INTR" = "MSI-X" ]; then + domU_check="$domU_check +grep -- '\\(-msi-x\\|PCI-MSI-X\\).*eth0' /proc/interrupts +" + elif [ "$PCIDEV_INTR" = "MSI" ]; then + # depending on the kernel version and domain type, the MSI can be + # marked as '-msi', 'PCI-MSI', or 'PCI-MSI-'; be careful to not match + # -msi-x nor PCI-MSI-X + domU_check="$domU_check +grep -- '\\(-msi \\|PCI-MSI\\( \\|-[^X]\\)\\).*eth0' /proc/interrupts +" + fi + domU_check="$domU_check +echo \"${passed}\" +" + + dom0_check=" +until grep -q \"^domU Welcome to Alpine Linux\" /var/log/xen/console/guest-domU.log; do + sleep 1 +done +tail -n 100 /var/log/xen/console/guest-domU.log +" fi # DomU @@ -63,7 +134,7 @@ rm var/run echo "#!/bin/sh ${domU_check} -/bin/sh" > etc/local.d/xen.start +" > etc/local.d/xen.start chmod +x etc/local.d/xen.start echo "rc_verbose=yes" >> etc/rc.conf sed -i -e 's/^Welcome/domU \0/' etc/issue @@ -98,17 +169,7 @@ xl create /etc/xen/domU.cfg ${dom0_check} " > etc/local.d/xen.start chmod +x etc/local.d/xen.start -# just PVH for now -echo ' -type = "pvh" -name = "domU" -kernel = "/boot/vmlinuz" -ramdisk = "/boot/initrd-domU" -extra = "root=/dev/ram0 console=hvc0" -memory = 512 -vif = [ "bridge=xenbr0", ] -disk = [ ] -' > etc/xen/domU.cfg +echo "$domU_config" > etc/xen/domU.cfg echo "rc_verbose=yes" >> etc/rc.conf echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527741.820416 (Exim 4.92) (envelope-from ) id 1psxe7-0007SF-Jx; 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Sun, 30 Apr 2023 03:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Wlj3tlOMvVy0bE5/uEir1TIkdR9hBj5QX79o2+4fphw=; b=tiKwnHUsddFW5rDr9RQcYGZ5rz /rFL+tn3ChY0wDCN4XGYo/lWtaIhAhge0PyyoLXl13tQYaYrz/FQ0JmJ6np6ZnbFQGjPgzuOyLE1S kmJTj4g3Jo4STamJ20oGnMzUyJtM9TgY0sEG8rlc6m7scaqkUBCB/Y4OSGhcJBZMrUTU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: include tail of serial log in the gitlab outout Message-Id: Date: Sun, 30 Apr 2023 03:22:42 +0000 commit 8e974df445807bb4a3629ca51145c7d74ee85c8f Author: Marek Marczykowski-Górecki AuthorDate: Wed Apr 26 02:16:16 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Apr 27 21:48:12 2023 +0100 automation: include tail of serial log in the gitlab outout Make it a bit easier to see what has failed. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini --- automation/scripts/qubes-x86-64.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index a01c571860..056faf9e6d 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -225,6 +225,9 @@ until grep "^Welcome to Alpine Linux" smoke.serial || [ $timeout -le 0 ]; do sleep 1; : $((--timeout)) done + +tail -n 100 smoke.serial + if [ $timeout -le 0 ]; then echo "ERROR: test timeout, aborting" exit 1 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:22:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:22:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527742.820420 (Exim 4.92) (envelope-from ) id 1psxeH-0007Un-Lc; Sun, 30 Apr 2023 03:22:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527742.820420; Sun, 30 Apr 2023 03:22:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeH-0007Uf-J0; Sun, 30 Apr 2023 03:22:53 +0000 Received: by outflank-mailman (input) for mailman id 527742; Sun, 30 Apr 2023 03:22:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeG-0007UQ-D5 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeG-0007uN-C7 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxeG-0001mf-BI for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:22:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1o9v1HgWMRPMPPSzUmGv/yyHngnv7DFOub6WVZf/n6Q=; b=ENSUFDKsUofvPOvqSMVr/DSVxQ xIowG8xzOO5LkWb7fyeaaae6tLoxls5DRaxv3d6wJtq8PPqokEguOqIFQPQiTydXTPzj0MAVssiCX bSvw6v9XiD30cIWnPuTb5qO7rrxhd0ezI+/2t56sMnpFkB5xwo6eIISTGcdOBtjPMfV8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: Make some callers of xc_domain_getinfo() use xc_domain_getinfolist() Message-Id: Date: Sun, 30 Apr 2023 03:22:52 +0000 commit 4af349a4047d541f0886771252af90927126ee0e Author: Alejandro Vallejo AuthorDate: Fri Apr 28 11:41:18 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Apr 28 14:34:40 2023 +0100 tools: Make some callers of xc_domain_getinfo() use xc_domain_getinfolist() xc_domain_getinfo() is slow and prone to races because N hypercalls are needed to find information about N domains. xc_domain_getinfolist() finds the same information in a single hypercall as long as a big enough buffer is provided. Plus, xc_domain_getinfo() is disappearing on a future patch so migrate the callers interested in more than 1 domain to the the *list() version. Signed-off-by: Alejandro Vallejo Acked-by: Marek Marczykowski-Górecki Reviewed-by: Andrew Cooper --- tools/include/xenctrl.h | 13 +++++++++++++ tools/python/xen/lowlevel/xc/xc.c | 28 ++++++++++++++-------------- tools/xenmon/xenbaked.c | 6 +++--- 3 files changed, 30 insertions(+), 17 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 05967ecc92..5d709386b6 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -468,6 +468,19 @@ typedef struct xc_dominfo { typedef xen_domctl_getdomaininfo_t xc_domaininfo_t; +static inline unsigned int dominfo_shutdown_reason(const xc_domaininfo_t *info) +{ + return (info->flags >> XEN_DOMINF_shutdownshift) & XEN_DOMINF_shutdownmask; +} + +static inline bool dominfo_shutdown_with(const xc_domaininfo_t *info, + unsigned int expected_reason) +{ + /* The reason doesn't make sense unless the domain is actually shutdown */ + return (info->flags & XEN_DOMINF_shutdown) && + (dominfo_shutdown_reason(info) == expected_reason); +} + typedef union { #if defined(__i386__) || defined(__x86_64__) diff --git a/tools/python/xen/lowlevel/xc/xc.c b/tools/python/xen/lowlevel/xc/xc.c index 35901c2d63..9728b34185 100644 --- a/tools/python/xen/lowlevel/xc/xc.c +++ b/tools/python/xen/lowlevel/xc/xc.c @@ -342,7 +342,7 @@ static PyObject *pyxc_domain_getinfo(XcObject *self, uint32_t first_dom = 0; int max_doms = 1024, nr_doms, i; size_t j; - xc_dominfo_t *info; + xc_domaininfo_t *info; static char *kwd_list[] = { "first_dom", "max_doms", NULL }; @@ -350,11 +350,11 @@ static PyObject *pyxc_domain_getinfo(XcObject *self, &first_dom, &max_doms) ) return NULL; - info = calloc(max_doms, sizeof(xc_dominfo_t)); + info = calloc(max_doms, sizeof(*info)); if (info == NULL) return PyErr_NoMemory(); - nr_doms = xc_domain_getinfo(self->xc_handle, first_dom, max_doms, info); + nr_doms = xc_domain_getinfolist(self->xc_handle, first_dom, max_doms, info); if (nr_doms < 0) { @@ -368,21 +368,21 @@ static PyObject *pyxc_domain_getinfo(XcObject *self, info_dict = Py_BuildValue( "{s:i,s:i,s:i,s:i,s:i,s:i,s:i,s:i,s:i,s:i" ",s:L,s:L,s:L,s:i,s:i,s:i}", - "domid", (int)info[i].domid, + "domid", (int)info[i].domain, "online_vcpus", info[i].nr_online_vcpus, "max_vcpu_id", info[i].max_vcpu_id, - "hvm", info[i].hvm, - "dying", info[i].dying, - "crashed", info[i].crashed, - "shutdown", info[i].shutdown, - "paused", info[i].paused, - "blocked", info[i].blocked, - "running", info[i].running, - "mem_kb", (long long)info[i].nr_pages*(XC_PAGE_SIZE/1024), + "hvm", !!(info[i].flags & XEN_DOMINF_hvm_guest), + "dying", !!(info[i].flags & XEN_DOMINF_dying), + "crashed", dominfo_shutdown_with(&info[i], SHUTDOWN_crash), + "shutdown", !!(info[i].flags & XEN_DOMINF_shutdown), + "paused", !!(info[i].flags & XEN_DOMINF_paused), + "blocked", !!(info[i].flags & XEN_DOMINF_blocked), + "running", !!(info[i].flags & XEN_DOMINF_running), + "mem_kb", (long long)info[i].tot_pages * (XC_PAGE_SIZE / 1024), "cpu_time", (long long)info[i].cpu_time, - "maxmem_kb", (long long)info[i].max_memkb, + "maxmem_kb", (long long)(info[i].max_pages << (XC_PAGE_SHIFT - 10)), "ssidref", (int)info[i].ssidref, - "shutdown_reason", info[i].shutdown_reason, + "shutdown_reason", dominfo_shutdown_reason(&info[i]), "cpupool", (int)info[i].cpupool); pyhandle = PyList_New(sizeof(xen_domain_handle_t)); if ( (pyhandle == NULL) || (info_dict == NULL) ) diff --git a/tools/xenmon/xenbaked.c b/tools/xenmon/xenbaked.c index 4dddbd20e2..8632b10ea4 100644 --- a/tools/xenmon/xenbaked.c +++ b/tools/xenmon/xenbaked.c @@ -775,7 +775,7 @@ static void global_init_domain(int domid, int idx) static int indexof(int domid) { int idx; - xc_dominfo_t dominfo[NDOMAINS]; + xc_domaininfo_t dominfo[NDOMAINS]; xc_interface *xc_handle; int ndomains; @@ -797,7 +797,7 @@ static int indexof(int domid) // call domaininfo hypercall to try and garbage collect unused entries xc_handle = xc_interface_open(0,0,0); - ndomains = xc_domain_getinfo(xc_handle, 0, NDOMAINS, dominfo); + ndomains = xc_domain_getinfolist(xc_handle, 0, NDOMAINS, dominfo); xc_interface_close(xc_handle); // for each domain in our data, look for it in the system dominfo structure @@ -808,7 +808,7 @@ static int indexof(int domid) int jdx; for (jdx=0; jdx Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:23:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527743.820424 (Exim 4.92) (envelope-from ) id 1psxeR-0007YM-Ov; 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Sun, 30 Apr 2023 03:23:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wLoHnoe8UJQ9/0yK8/wju5NGp5AjxtQ6Cm5ElP8VeKU=; b=5XpVZcK0+pYiU5nZa3WMz0+olx s1gfoB69jg4fu91lu69mmOW3WLCFYg+COHVykMzilZ6OWYJ/Sq2Z7V/wvPoy6/+8snXVOtLl18tyX /AWdDzbYWTvrIqRO2pWaotpG0mInV28IZL9zpbNkXnfTAucN7V400yiM4niYpgdv92C0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: Create xc_domain_getinfo_single() Message-Id: Date: Sun, 30 Apr 2023 03:23:02 +0000 commit 7c7c436ccb9c684f44a184324fd8920b12f93a4d Author: Alejandro Vallejo AuthorDate: Fri Apr 28 11:41:19 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Apr 28 14:34:40 2023 +0100 tools: Create xc_domain_getinfo_single() It's a stricter version of xc_domain_getinfo() where the returned domid always matches the requested domid or the error code shows an error instead. A few patches ahead usages of xc_domain_getinfo() are removed until only xc_domain_getinfo_single() and xc_domain_getinfolist() remain. Signed-off-by: Alejandro Vallejo Reviewed-by: Andrew Cooper --- tools/include/xenctrl.h | 16 ++++++++++++++++ tools/libs/ctrl/xc_domain.c | 24 ++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 5d709386b6..752fc87580 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -704,6 +704,22 @@ int xc_vcpu_getaffinity(xc_interface *xch, int xc_domain_get_guest_width(xc_interface *xch, uint32_t domid, unsigned int *guest_width); +/** + * This function will return information about a single domain. It looks + * up the domain by the provided domid and succeeds if the domain exists + * and is accesible by the current domain, or fails otherwise. A buffer + * may optionally passed on the `info` parameter in order to retrieve + * information about the domain. The buffer is ignored if NULL is + * passed instead. + * + * @parm xch a handle to an open hypervisor interface + * @parm domid domid to lookup + * @parm info Optional domain information buffer (may be NULL) + * @return 0 on success, otherwise the call failed and info is undefined + */ +int xc_domain_getinfo_single(xc_interface *xch, + uint32_t domid, + xc_domaininfo_t *info); /** * This function will return information about one or more domains. It is diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index e939d07157..d5f0923088 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -345,6 +345,30 @@ int xc_dom_vuart_init(xc_interface *xch, return rc; } +int xc_domain_getinfo_single(xc_interface *xch, + uint32_t domid, + xc_domaininfo_t *info) +{ + struct xen_domctl domctl = { + .cmd = XEN_DOMCTL_getdomaininfo, + .domain = domid, + }; + + if ( do_domctl(xch, &domctl) < 0 ) + return -1; + + if ( domctl.u.getdomaininfo.domain != domid ) + { + errno = ESRCH; + return -1; + } + + if ( info ) + *info = domctl.u.getdomaininfo; + + return 0; +} + int xc_domain_getinfo(xc_interface *xch, uint32_t first_domid, unsigned int max_doms, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:23:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:23:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527744.820427 (Exim 4.92) (envelope-from ) id 1psxeb-0007at-Pz; Sun, 30 Apr 2023 03:23:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527744.820427; Sun, 30 Apr 2023 03:23:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeb-0007am-NP; Sun, 30 Apr 2023 03:23:13 +0000 Received: by outflank-mailman (input) for mailman id 527744; Sun, 30 Apr 2023 03:23:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxea-0007aa-Ku for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxea-0007vL-KD for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxea-0001o1-IZ for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YaH7tga5Pc6FftnUOn40XECTwbYe+loCGa+nBBjg0H0=; b=cg1qY8B82GOskXLFYVRw0yO3Lx jtpCtSa4/mGDsnZ+5NAhHp7dNN0TOg2P3DnNuPoWbyDj0VeFE81B75jYeyRH/QPRJBTKo6pwNptrA Knz9Y81c89gFYW87Aj9tts2YWQzBCS3xeEvgtHwn7B5KncwsZN7dLDKbHqJvrfWqTy+s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: Refactor console/io.c to avoid using xc_domain_getinfo() Message-Id: Date: Sun, 30 Apr 2023 03:23:12 +0000 commit e522c98c30a9e911a2fb4ec07252ff90541aaddc Author: Alejandro Vallejo AuthorDate: Fri Apr 28 11:41:20 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Apr 28 14:34:40 2023 +0100 tools: Refactor console/io.c to avoid using xc_domain_getinfo() It has 2 avoidable occurences * Check whether a domain is valid, which can be done faster with xc_domain_getinfo_single(). * Domain discovery, which can be done in a race-free way with the sysctl interface through xc_domain_getinfolist(). Signed-off-by: Alejandro Vallejo Reviewed-by: Andrew Cooper --- tools/console/daemon/io.c | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/tools/console/daemon/io.c b/tools/console/daemon/io.c index 6bfe96715b..bb739bdb8c 100644 --- a/tools/console/daemon/io.c +++ b/tools/console/daemon/io.c @@ -405,13 +405,7 @@ static void buffer_advance(struct buffer *buffer, size_t len) static bool domain_is_valid(int domid) { - bool ret; - xc_dominfo_t info; - - ret = (xc_domain_getinfo(xc, domid, 1, &info) == 1 && - info.domid == domid); - - return ret; + return xc_domain_getinfo_single(xc, domid, NULL) == 0; } static int create_hv_log(void) @@ -961,24 +955,33 @@ static unsigned enum_pass = 0; static void enum_domains(void) { - int domid = 1; - xc_dominfo_t dominfo; + /* + * Memory set aside to query the state of every + * domain in the hypervisor in a single hypercall. + */ + static xc_domaininfo_t domaininfo[DOMID_FIRST_RESERVED - 1]; + + int ret; struct domain *dom; enum_pass++; - while (xc_domain_getinfo(xc, domid, 1, &dominfo) == 1) { - dom = lookup_domain(dominfo.domid); - if (dominfo.dying) { + /* Fetch info on every valid domain except for dom0 */ + ret = xc_domain_getinfolist(xc, 1, DOMID_FIRST_RESERVED - 1, domaininfo); + if (ret < 0) + return; + + for (size_t i = 0; i < ret; i++) { + dom = lookup_domain(domaininfo[i].domain); + if (domaininfo[i].flags & XEN_DOMINF_dying) { if (dom) shutdown_domain(dom); } else { if (dom == NULL) - dom = create_domain(dominfo.domid); + dom = create_domain(domaininfo[i].domain); } if (dom) dom->last_seen = enum_pass; - domid = dominfo.domid + 1; } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:23:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:23:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527745.820431 (Exim 4.92) (envelope-from ) id 1psxel-0007e4-S0; Sun, 30 Apr 2023 03:23:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527745.820431; Sun, 30 Apr 2023 03:23:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxel-0007dv-P7; Sun, 30 Apr 2023 03:23:23 +0000 Received: by outflank-mailman (input) for mailman id 527745; Sun, 30 Apr 2023 03:23:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxek-0007dj-OH for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxek-0007vX-NW for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxek-0001oS-Mf for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cc2MHC1mA/me2U95Me1ALuVwtWOI/BgdplWIY8Pz+xA=; b=ILMkw7fEDLlPEV3okyOhvzV33J AsoHVH7cIrsl/SwEb5e1ytgyuovA9DshrGDEBc1e3k43ZGYByJkr9G3UOv50i0L5vNhLJ+HeTWRRa 4GCcWrNuz3c4mAHyPr6Dle6LEEHHuZb3BDC26mZWHn/OL+pwfwcxTYKsx0M9V+5RT0KQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: Make init-xenstore-domain use xc_domain_getinfolist() Message-Id: Date: Sun, 30 Apr 2023 03:23:22 +0000 commit 5a8efb1bd092a0f579cc3306226868346b73f362 Author: Alejandro Vallejo AuthorDate: Fri Apr 28 11:41:21 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Apr 28 14:34:40 2023 +0100 tools: Make init-xenstore-domain use xc_domain_getinfolist() It currently relies on xc_domain_getinfo() returning the next available domain past "first_domid", which is a feature that will disappear in a future patch. Furthermore and while at it, make it so the hypercall tries to fetch information about more than one domain per hypercall so we can (hopefully) get away with a single hypercall in a typical system. Signed-off-by: Alejandro Vallejo Reviewed-by: Juergen Gross Reviewed-by: Andrew Cooper --- tools/helpers/init-xenstore-domain.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tools/helpers/init-xenstore-domain.c b/tools/helpers/init-xenstore-domain.c index 0950ba7dc5..b2d5df8ba5 100644 --- a/tools/helpers/init-xenstore-domain.c +++ b/tools/helpers/init-xenstore-domain.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -322,16 +323,20 @@ err: static int check_domain(xc_interface *xch) { - xc_dominfo_t info; + /* Commonly dom0 is the only domain, but buffer a little for efficiency. */ + xc_domaininfo_t info[8]; uint32_t dom; int ret; dom = 1; - while ( (ret = xc_domain_getinfo(xch, dom, 1, &info)) == 1 ) + while ( (ret = xc_domain_getinfolist(xch, dom, ARRAY_SIZE(info), info)) > 0 ) { - if ( info.xenstore ) - return 1; - dom = info.domid + 1; + for ( size_t i = 0; i < ret; i++ ) + { + if ( info[i].flags & XEN_DOMINF_xs_domain ) + return 1; + } + dom = info[ret - 1].domain + 1; } if ( ret < 0 && errno != ESRCH ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Apr 30 03:23:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 30 Apr 2023 03:23:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.527746.820436 (Exim 4.92) (envelope-from ) id 1psxev-0007h7-TJ; Sun, 30 Apr 2023 03:23:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 527746.820436; Sun, 30 Apr 2023 03:23:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxev-0007gz-Qg; Sun, 30 Apr 2023 03:23:33 +0000 Received: by outflank-mailman (input) for mailman id 527746; Sun, 30 Apr 2023 03:23:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeu-0007gl-SV for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1psxeu-0007ve-RP for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1psxeu-0001p0-Q0 for xen-changelog@lists.xenproject.org; Sun, 30 Apr 2023 03:23:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zVCMPOm4Ny01wX+JP7h9t5SuHwDh+JXFjTIGq6j6zkg=; b=bFqZYCGaHoZjqdkJA6Ar/yz8fL Mvix8mtgx3ZYqidF9kgO6svS0VWKzXcozJr9Au51hwlXO+JZYFHOXO71YsP6HQpxaGSlnFFMIHFOo gy3QocYD10QsHgkz6kRHdf1JSTWPAf2g88j9MSHChTxgka+8EJUz1ShzHWwgrQqStD9I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] MAINTAINERS: add more xenstore files Message-Id: Date: Sun, 30 Apr 2023 03:23:32 +0000 commit 6a47ba2f7855f8fc094ec4f837e71a34ededb77b Author: Juergen Gross AuthorDate: Fri Apr 28 15:27:56 2023 +0200 Commit: Andrew Cooper CommitDate: Fri Apr 28 14:34:40 2023 +0100 MAINTAINERS: add more xenstore files Xenstore consists of more files than just the tools/xenstore directory. Add them to the XENSTORE block. Suggested-by: Andrew Cooper Signed-off-by: Juergen Gross Acked-by: Andrew Cooper --- MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 0e5eba2312..f2f1881b32 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -653,6 +653,11 @@ M: Wei Liu M: Juergen Gross R: Julien Grall S: Supported +F: tools/helpers/init-xenstore-domain.c +F: tools/include/xenstore-compat/ +F: tools/include/xenstore.h +F: tools/include/xenstore_lib.h +F: tools/libs/store/ F: tools/xenstore/ XENTRACE -- generated by git-patchbot for /home/xen/git/xen.git#master