From xen-changelog-bounces@lists.xenproject.org Tue Aug 01 21:22:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Aug 2023 21:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.574532.899886 (Exim 4.92) (envelope-from ) id 1qQwoc-0001Kk-JB; Tue, 01 Aug 2023 21:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574532.899886; Tue, 01 Aug 2023 21:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qQwoc-0001Kc-GQ; Tue, 01 Aug 2023 21:22:02 +0000 Received: by outflank-mailman (input) for mailman id 574532; Tue, 01 Aug 2023 21:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qQwob-0001KW-R0 for xen-changelog@lists.xenproject.org; Tue, 01 Aug 2023 21:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qQwob-0008Qk-PG for xen-changelog@lists.xenproject.org; Tue, 01 Aug 2023 21:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qQwob-0000uW-MR for xen-changelog@lists.xenproject.org; Tue, 01 Aug 2023 21:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VYHEOKY0K6fabv3FDeYulwmpbtoJkCglfHg819g5vdY=; b=6Zhj8ZblStUqXKz3Hy2rHX8IKI Ymqi/s6WrpiOuUpPtYsF09FQulDiI3iLggKIqSmei20cR+aI9b5GFLOLI9kQlHlQ7VfdmN7Cs7o+D Ye/lZeYUrNVoJ27EBAODZrAmJjJnD1ou2qL/n3VJqHpxcPwMDKXLN9BsCSBGBm45afxs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() Message-Id: Date: Tue, 01 Aug 2023 21:22:01 +0000 commit 602ee4c2954ed3f9f8552e08043146bee60ec012 Author: Andrew Cooper AuthorDate: Fri Jul 28 18:42:12 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Jul 31 13:55:36 2023 +0100 x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() This line: val &= ~chickenbit; ends up truncating val to 32 bits, and turning off various errata workarounds in Zen2 systems. Fixes: f91c5ea97067 ("x86/amd: Mitigations for Zenbleed") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c0dd53b8cbd1e47e9c89873a9265a7170bdc6b4c) --- xen/arch/x86/cpu/amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 9db79f409a..a1447f37ec 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -760,8 +760,8 @@ void amd_init_spectral_chicken(void) void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev, chickenbit = (1 << 9); - uint64_t val, old_val; + unsigned int good_rev; + uint64_t val, old_val, chickenbit = (1 << 9); /* * If we're virtualised, we can't do family/model checks safely, and -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 02 00:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Aug 2023 00:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.574644.900121 (Exim 4.92) (envelope-from ) id 1qR08k-00037c-M7; Wed, 02 Aug 2023 00:55:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574644.900121; Wed, 02 Aug 2023 00:55:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR08k-00037U-J0; Wed, 02 Aug 2023 00:55:02 +0000 Received: by outflank-mailman (input) for mailman id 574644; Wed, 02 Aug 2023 00:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR08j-00037E-In for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 00:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR08j-0005B9-Fd for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 00:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qR08j-00014s-E4 for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 00:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=a4fSL5sV16cp5ZAvtleeUhRsq/FBPJKbhHEs5s5uM38=; b=UNx9BsmwnIrw+kMXL1yC8leJDx ses/TnJuwEuCoV9y0xacDQd7vRU4+HrKN2yVE+LRwIlr92WyppoHD5IBoAoEb7w9MKVDG9ePsrR0M 2DXBVllHwoyCw9V5z3jx3gwQYFDgwZFp9jCdpZnKTxJbqqum0fLuQUXPGRR6slFPIaG4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() Message-Id: Date: Wed, 02 Aug 2023 00:55:01 +0000 commit e05a0e65b09d8512fdf4881c7fae713045c7d83d Author: Andrew Cooper AuthorDate: Fri Jul 28 18:42:12 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Jul 31 13:55:28 2023 +0100 x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() This line: val &= ~chickenbit; ends up truncating val to 32 bits, and turning off various errata workarounds in Zen2 systems. Fixes: f91c5ea97067 ("x86/amd: Mitigations for Zenbleed") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c0dd53b8cbd1e47e9c89873a9265a7170bdc6b4c) --- xen/arch/x86/cpu/amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index dd4dc3157c..82375bf242 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -760,8 +760,8 @@ void amd_init_spectral_chicken(void) void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev, chickenbit = (1 << 9); - uint64_t val, old_val; + unsigned int good_rev; + uint64_t val, old_val, chickenbit = (1 << 9); /* * If we're virtualised, we can't do family/model checks safely, and -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Wed Aug 02 02:33:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Aug 2023 02:33:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.574673.900174 (Exim 4.92) (envelope-from ) id 1qR1fa-0003Mu-Jt; Wed, 02 Aug 2023 02:33:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574673.900174; Wed, 02 Aug 2023 02:33:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR1fa-0003MZ-Gp; Wed, 02 Aug 2023 02:33:02 +0000 Received: by outflank-mailman (input) for mailman id 574673; Wed, 02 Aug 2023 02:33:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR1fZ-0003LC-Q4 for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 02:33:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR1fZ-0003y3-P7 for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 02:33:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qR1fZ-0005EY-Kp for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 02:33:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/5A7qzsUo2I+wMzfJlODwhgBhvxDSm3SJGVf/GGaG0w=; b=Ggq46V5hxlVZ5DBCDU5PCYrJZK 1EXyWOlerLL+EKeDfy/5konmIJBbwjC2EbLOysFSAhw3gHafHeu0Dawi5NP2VIdSgX5th+e8aEIQV PT+jiUGeE4OFZIl6hUqEv9A2VI6miVHfotTPUe7a+ZitKq5ZbvUGENXU9FplC2RCeV50=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() Message-Id: Date: Wed, 02 Aug 2023 02:33:01 +0000 commit a910e3f2a4d128bc045ac6be374459e73ddf9fde Author: Andrew Cooper AuthorDate: Fri Jul 28 18:42:12 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Jul 31 13:55:21 2023 +0100 x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() This line: val &= ~chickenbit; ends up truncating val to 32 bits, and turning off various errata workarounds in Zen2 systems. Fixes: f91c5ea97067 ("x86/amd: Mitigations for Zenbleed") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c0dd53b8cbd1e47e9c89873a9265a7170bdc6b4c) --- xen/arch/x86/cpu/amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 4ed08df4a8..81008a2d94 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -773,8 +773,8 @@ void __init detect_zen2_null_seg_behaviour(void) void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev, chickenbit = (1 << 9); - uint64_t val, old_val; + unsigned int good_rev; + uint64_t val, old_val, chickenbit = (1 << 9); /* * If we're virtualised, we can't do family/model checks safely, and -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Wed Aug 02 06:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Aug 2023 06:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.574722.900258 (Exim 4.92) (envelope-from ) id 1qR5l8-00008H-ND; Wed, 02 Aug 2023 06:55:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574722.900258; Wed, 02 Aug 2023 06:55:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR5l8-000089-Kg; Wed, 02 Aug 2023 06:55:02 +0000 Received: by outflank-mailman (input) for mailman id 574722; Wed, 02 Aug 2023 06:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR5l7-00007x-Fa for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 06:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR5l7-0001kp-Eg for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 06:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qR5l7-0006pi-C7 for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 06:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bwXAFrX1REkhYhlSogzLjiDjh6hjSDbc50lUEGawpHc=; b=OdkauJjE9DPSFAfOyrmSRV9IZU 2RnyyjBAJPakaKWuzWr/mNLc2LqpJFIlXztLYQ04nUucOJgd+QSIbZ00qHXhaOiD0PqpiOZ64+A+9 OeDqkpYTagM4d5DKfbrzpV2vdemmJc+BMR0JUbtJGKPMQACSZqMExGSRsM4uZeztXJrs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() Message-Id: Date: Wed, 02 Aug 2023 06:55:01 +0000 commit c18b2dd93f396eadd116d0016cf7285523a13505 Author: Andrew Cooper AuthorDate: Fri Jul 28 18:42:12 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Jul 31 13:55:09 2023 +0100 x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() This line: val &= ~chickenbit; ends up truncating val to 32 bits, and turning off various errata workarounds in Zen2 systems. Fixes: f91c5ea97067 ("x86/amd: Mitigations for Zenbleed") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c0dd53b8cbd1e47e9c89873a9265a7170bdc6b4c) --- xen/arch/x86/cpu/amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 8d23a5be0c..c452592872 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -882,8 +882,8 @@ void __init detect_zen2_null_seg_behaviour(void) void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev, chickenbit = (1 << 9); - uint64_t val, old_val; + unsigned int good_rev; + uint64_t val, old_val, chickenbit = (1 << 9); /* * If we're virtualised, we can't do family/model checks safely, and -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 02 17:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Aug 2023 17:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.575100.900866 (Exim 4.92) (envelope-from ) id 1qRG3r-0006CB-8X; Wed, 02 Aug 2023 17:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 575100.900866; Wed, 02 Aug 2023 17:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRG3r-0006C3-4F; Wed, 02 Aug 2023 17:55:03 +0000 Received: by outflank-mailman (input) for mailman id 575100; Wed, 02 Aug 2023 17:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRG3p-0006Bv-P0 for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 17:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRG3p-0000Xa-Kh for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 17:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRG3p-0007yQ-Jj for xen-changelog@lists.xenproject.org; Wed, 02 Aug 2023 17:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DiIJAxzVog6NUfKWPLQS+8IZBzQAZlfYeEfzkp6hTE8=; b=00UjUcIJ/5FEcmshKFmHsX1b7j Ot75e0k2GjMOv5jN6RjqkVEvB09BfzQVRXJWL/XIqpUXOAU3tP7knZBaAoMkEv+1FCzfznl7kXYUP wpP3MH9rWohv57mQ3w7lKdyliUUnVkzV+ya2FjpSrHwlJCovAkKRHzNH6J+ptFzCeA2k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() Message-Id: Date: Wed, 02 Aug 2023 17:55:01 +0000 commit c0dd53b8cbd1e47e9c89873a9265a7170bdc6b4c Author: Andrew Cooper AuthorDate: Fri Jul 28 18:42:12 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Jul 31 13:50:54 2023 +0100 x86/amd: Fix DE_CFG truncation in amd_check_zenbleed() This line: val &= ~chickenbit; ends up truncating val to 32 bits, and turning off various errata workarounds in Zen2 systems. Fixes: f91c5ea97067 ("x86/amd: Mitigations for Zenbleed") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 3ed06f6704..df2681b7c4 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -909,8 +909,8 @@ void __init detect_zen2_null_seg_behaviour(void) void amd_check_zenbleed(void) { const struct cpu_signature *sig = &this_cpu(cpu_sig); - unsigned int good_rev, chickenbit = (1 << 9); - uint64_t val, old_val; + unsigned int good_rev; + uint64_t val, old_val, chickenbit = (1 << 9); /* * If we're virtualised, we can't do family/model checks safely, and -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 03 03:22:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Aug 2023 03:22:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576002.901653 (Exim 4.92) (envelope-from ) id 1qROuZ-0003RJ-2w; Thu, 03 Aug 2023 03:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576002.901653; Thu, 03 Aug 2023 03:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qROuZ-0003RA-09; Thu, 03 Aug 2023 03:22:03 +0000 Received: by outflank-mailman (input) for mailman id 576002; Thu, 03 Aug 2023 03:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qROuY-0003R4-Go for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 03:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qROuY-0000jL-B7 for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 03:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qROuY-0004yU-A3 for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 03:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0EeJpURZWLvpHuYOLvfC1VKWP01RQjNeL5jg/y0QrVc=; b=xeL02rYwfS0Yb8NUpF/w3i58GG kVth5asyrlPZ0FrZob4Lgp8emCnw0jh5DDxEhDHNZAh3CFGCJux+dgv2Coq6y1NZm96a1ZLYUU/n1 MEAi/TKLrHvX28lrIEzeRLNIkOJxhJfysRr0U3EtG8mUvGRzesMYGBGsq6AX35WNYrHA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [qemu-xen master] thread-pool: signal "request_cond" while locked Message-Id: Date: Thu, 03 Aug 2023 03:22:02 +0000 commit 690346043db881debcace7d22249f3355527c5f9 Author: Anthony PERARD AuthorDate: Fri Jul 14 16:27:20 2023 +0100 Commit: Anthony PERARD CommitDate: Tue Aug 1 19:02:38 2023 +0100 thread-pool: signal "request_cond" while locked thread_pool_free() might have been called on the `pool`, which would be a reason for worker_thread() to quit. In this case, `pool->request_cond` is been destroyed. If worker_thread() didn't managed to signal `request_cond` before it been destroyed by thread_pool_free(), we got: util/qemu-thread-posix.c:198: qemu_cond_signal: Assertion `cond->initialized' failed. One backtrace: __GI___assert_fail (assertion=0x55555614abcb "cond->initialized", file=0x55555614ab88 "util/qemu-thread-posix.c", line=198, function=0x55555614ad80 <__PRETTY_FUNCTION__.17104> "qemu_cond_signal") at assert.c:101 qemu_cond_signal (cond=0x7fffb800db30) at util/qemu-thread-posix.c:198 worker_thread (opaque=0x7fffb800dab0) at util/thread-pool.c:129 qemu_thread_start (args=0x7fffb8000b20) at util/qemu-thread-posix.c:505 start_thread (arg=) at pthread_create.c:486 Reported here: https://lore.kernel.org/all/ZJwoK50FcnTSfFZ8@MacBook-Air-de-Roger.local/T/#u To avoid issue, keep lock while sending a signal to `request_cond`. Fixes: 900fa208f506 ("thread-pool: replace semaphore with condition variable") Signed-off-by: Anthony PERARD Reviewed-by: Stefan Hajnoczi Message-Id: <20230714152720.5077-1-anthony.perard@citrix.com> Signed-off-by: Anthony PERARD (cherry picked from commit f4f71363fcdb1092ff64d2bba6f9af39570c2f2b) --- util/thread-pool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/thread-pool.c b/util/thread-pool.c index 31113b5860..39accc9ebe 100644 --- a/util/thread-pool.c +++ b/util/thread-pool.c @@ -120,13 +120,13 @@ static void *worker_thread(void *opaque) pool->cur_threads--; qemu_cond_signal(&pool->worker_stopped); - qemu_mutex_unlock(&pool->lock); /* * Wake up another thread, in case we got a wakeup but decided * to exit due to pool->cur_threads > pool->max_threads. */ qemu_cond_signal(&pool->request_cond); + qemu_mutex_unlock(&pool->lock); return NULL; } -- generated by git-patchbot for /home/xen/git/qemu-xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 03 06:22:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Aug 2023 06:22:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576031.901726 (Exim 4.92) (envelope-from ) id 1qRRil-0005VL-A8; Thu, 03 Aug 2023 06:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576031.901726; Thu, 03 Aug 2023 06:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRRil-0005VE-7Z; Thu, 03 Aug 2023 06:22:03 +0000 Received: by outflank-mailman (input) for mailman id 576031; Thu, 03 Aug 2023 06:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRRik-0005V6-5y for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 06:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRRik-0005GA-3b for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 06:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRRik-0003Pt-1n for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 06:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=L0iziOKG5Uo4o+FdEAbqrXVXZ61AKTzeifZrURp7ez4=; b=jwSksonGaxo4vkWOFirm8AO2NH Ui2uuG/v6ItlHGjlmByb9f3i9sY6UsdrREvGiyoljucJ01GudOQfyshyi++05kswF0bkaQCmmCgrk hAtu4AiZ8Yw259PI8UY5pVlmrHUj6ws3LMFVBd+VqEkxi3j4Ia38RLl2xA6dJfvAd9C0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] xen/arm: Add Cortex-A77 erratum 1508412 handling Message-Id: Date: Thu, 03 Aug 2023 06:22:02 +0000 commit 3d0aa6f23d54a4d3c608010c58c1147a1500d865 Author: Luca Fancellu AuthorDate: Mon Jul 17 13:25:46 2023 +0100 Commit: Stefano Stabellini CommitDate: Tue Aug 1 16:05:31 2023 -0700 xen/arm: Add Cortex-A77 erratum 1508412 handling Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence of a store-exclusive or read of PAR_EL1 and a load with device or non-cacheable memory attributes. A workaround is available, but it depends on a firmware counterpart. The proposed workaround from the errata document is to modify the software running at EL1 and above to include a DMB SY before and after accessing PAR_EL1. In conjunction to the above, the firmware needs to use a specific write sequence to several IMPLEMENTATION DEFINED registers to have the hardware insert a DMB SY after all load-exclusive and store-exclusive instructions. Apply the workaround to Xen where PAR_EL1 is read, implementing an helper function to do that. Since Xen can be interrupted by irqs in any moment, add a barrier on entry/exit when we are running on the affected cores. A guest without the workaround can deadlock the system, so warn the users of Xen with the above type of cores to use only trusted guests, by printing a message on Xen startup. This is XSA-436 / CVE-2023-34320. Signed-off-by: Luca Fancellu [stefano: add XSA-436 to commit message] Signed-off-by: Stefano Stabellini Reviewed-by: Bertrand Marquis Reviewed-by: Julien Grall --- SUPPORT.md | 2 ++ docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/Kconfig | 21 +++++++++++++++++++++ xen/arch/arm/arm64/entry.S | 19 +++++++++++++++++++ xen/arch/arm/cpuerrata.c | 16 ++++++++++++---- xen/arch/arm/domain.c | 2 +- xen/arch/arm/include/asm/arm64/page.h | 12 ++++++------ xen/arch/arm/include/asm/cpufeature.h | 3 ++- xen/arch/arm/include/asm/sysregs.h | 24 ++++++++++++++++++++++++ 9 files changed, 88 insertions(+), 12 deletions(-) diff --git a/SUPPORT.md b/SUPPORT.md index cb504eec1e..c94c9cfe8f 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -39,8 +39,10 @@ supported in this document. Status: Supported Status, Cortex A57 r0p0-r1p1: Supported, not security supported + Status, Cortex A77 r0p0-r1p0: Supported, not security supported For the Cortex A57 r0p0 - r1p1, see Errata 832075. +For the Cortex A77 r0p0 - r1p0, see Errata 1508412. ## Host hardware support diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt index 1925d8fd4e..c4e82df535 100644 --- a/docs/misc/arm/silicon-errata.txt +++ b/docs/misc/arm/silicon-errata.txt @@ -58,4 +58,5 @@ stable hypervisors. | ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 | | ARM | Neoverse-N1 | #1165522 | N/A | ARM | Neoverse-N1 | #1286807 | ARM64_ERRATUM_1286807 | +| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | | ARM | MMU-500 | #842869 | N/A | diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 52a05f704d..87d541c411 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -318,6 +318,27 @@ config ARM64_ERRATUM_1286807 If unsure, say Y. +config ARM64_ERRATUM_1508412 + bool "Cortex-A77: 1508412: possible deadlock on sequence of NC/Device load and store exclusive or PAR read" + default y + depends on ARM_64 + help + This option adds a workaround for Arm Cortex-A77 erratum 1508412. + + Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence + of a store-exclusive or read of PAR_EL1 and a load with device or + non-cacheable memory attributes. The workaround depends on a firmware + counterpart. + + Xen guests must also have the workaround implemented or they can + deadlock the system. + + Work around the issue by inserting DMB SY barriers around PAR_EL1 + register reads and warning Xen users. The DMB barrier is sufficient + to prevent a speculative PAR_EL1 read. + + If unsure, say Y. + endmenu config ARM64_HARDEN_BRANCH_PREDICTOR diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index 95f1a92684..95ff4e3e05 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -134,6 +134,16 @@ * position on the stack before. */ .macro entry, hyp, compat, save_x0_x1=1 + + /* + * Ensure any PAR_EL1 reads complete, in case we were interrupted + * between the PAR_EL1 read and the memory barrier for the erratum + * 1508412 workaround. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + sub sp, sp, #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ .if \hyp == 0 /* Guest mode */ @@ -492,6 +502,15 @@ return_from_trap: ldr lr, [sp], #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ + /* + * Ensure any device/NC reads complete, in case we were interrupted + * between the memory barrier for the erratum 1508412 workaround and + * any PAR_EL1 read. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + eret sb diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index ae649d16ef..ea680fac2e 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -668,6 +668,14 @@ static const struct arm_cpu_capabilities arm_errata[] = { .capability = ARM64_WORKAROUND_AT_SPECULATE, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), }, +#ifdef CONFIG_ARM64_ERRATUM_1508412 + { + /* Cortex-A77 r0p0 - r1p0 */ + .desc = "ARM erratum 1508412 (hypervisor portion)", + .capability = ARM64_WORKAROUND_1508412, + MIDR_RANGE(MIDR_CORTEX_A77, 0, 1), + }, +#endif { /* Cortex-A55 (All versions as erratum is open in SDEN v14) */ .desc = "ARM erratum 1530923", @@ -686,11 +694,11 @@ void __init enable_errata_workarounds(void) { enable_cpu_capabilities(arm_errata); -#ifdef CONFIG_ARM64_ERRATUM_832075 - if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) ) +#if defined(CONFIG_ARM64_ERRATUM_832075) || defined(CONFIG_ARM64_ERRATUM_1508412) + if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || + cpus_have_cap(ARM64_WORKAROUND_1508412) ) { - printk_once("**** This CPU is affected by the errata 832075. ****\n" - "**** Guests without CPU erratum workarounds can deadlock the system! ****\n" + printk_once("**** Guests without CPU erratum workarounds can deadlock the system! ****\n" "**** Only trusted guests should be used. ****\n"); /* Taint the machine has being insecure */ diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 38e22f12af..b9dce97d66 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -137,7 +137,7 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_32bit_domain(p->domain) ) p->arch.dacr = READ_SYSREG(DACR32_EL2); - p->arch.par = READ_SYSREG64(PAR_EL1); + p->arch.par = read_sysreg_par(); #if defined(CONFIG_ARM_32) p->arch.mair0 = READ_CP32(MAIR0); p->arch.mair1 = READ_CP32(MAIR1); diff --git a/xen/arch/arm/include/asm/arm64/page.h b/xen/arch/arm/include/asm/arm64/page.h index 0cba266373..fbfe67bf89 100644 --- a/xen/arch/arm/include/asm/arm64/page.h +++ b/xen/arch/arm/include/asm/arm64/page.h @@ -48,11 +48,11 @@ static inline void invalidate_icache_local(void) /* Ask the MMU to translate a VA for us */ static inline uint64_t __va_to_par(vaddr_t va) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); asm volatile ("at s1e2r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } @@ -60,28 +60,28 @@ static inline uint64_t __va_to_par(vaddr_t va) /* Ask the MMU to translate a Guest VA for us */ static inline uint64_t gva_to_ma_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s12e1w, %0;" : : "r" (va)); else asm volatile ("at s12e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s1e1w, %0;" : : "r" (va)); else asm volatile ("at s1e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index c86a2e7f29..3a39fe4b5a 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -68,8 +68,9 @@ #define ARM_WORKAROUND_BHB_LOOP_32 14 #define ARM_WORKAROUND_BHB_SMCC_3 15 #define ARM_HAS_SB 16 +#define ARM64_WORKAROUND_1508412 17 -#define ARM_NCAPS 17 +#define ARM_NCAPS 18 #ifndef __ASSEMBLY__ diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h index 5c5c51bbcd..61e30c9e51 100644 --- a/xen/arch/arm/include/asm/sysregs.h +++ b/xen/arch/arm/include/asm/sysregs.h @@ -9,6 +9,30 @@ # error "unknown ARM variant" #endif +#ifndef __ASSEMBLY__ + +#include + +static inline register_t read_sysreg_par(void) +{ + register_t par_el1; + + /* + * On Cortex-A77 r0p0 and r1p0, read access to PAR_EL1 shall include a + * DMB SY before and after accessing it, as part of the workaround for the + * errata 1508412. + */ + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + par_el1 = READ_SYSREG64(PAR_EL1); + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + + return par_el1; +} + +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_ARM_SYSREGS_H */ /* * Local variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 03 09:55:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Aug 2023 09:55:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576162.901994 (Exim 4.92) (envelope-from ) id 1qRV2t-0007m9-3P; Thu, 03 Aug 2023 09:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576162.901994; Thu, 03 Aug 2023 09:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRV2s-0007m1-Vc; Thu, 03 Aug 2023 09:55:02 +0000 Received: by outflank-mailman (input) for mailman id 576162; Thu, 03 Aug 2023 09:55:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRV2r-0007ls-SQ for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 09:55:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRV2r-0002LW-Q9 for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 09:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRV2r-0005Zx-Om for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 09:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=24LpjsAMg9Rl0Jsr3UsJzQeyROo7+d8PNxQkund3eY0=; b=DKNBiGIg6CEpWrXLOW+OuFlsrh /JXUzOUU7AModhSsdR9HdmJYKWuIH/ntdOJpdpvmtxBT+i4vKUG/MuTz+Zwq8Ou+GawMdKJl9hIbx PCDbW8GqJ9K7PmyQIqm+v1NUSaOg/nFUSQUI+sBLNvRHWR6GSXL4dlHLRd6hSDOZZITg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] xen/arm: Add Cortex-A77 erratum 1508412 handling Message-Id: Date: Thu, 03 Aug 2023 09:55:01 +0000 commit 87eaa43b30f8ffb600f8e6f765d5c7e4bcb241b9 Author: Luca Fancellu AuthorDate: Mon Jul 17 13:25:46 2023 +0100 Commit: Stefano Stabellini CommitDate: Tue Aug 1 16:10:46 2023 -0700 xen/arm: Add Cortex-A77 erratum 1508412 handling Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence of a store-exclusive or read of PAR_EL1 and a load with device or non-cacheable memory attributes. A workaround is available, but it depends on a firmware counterpart. The proposed workaround from the errata document is to modify the software running at EL1 and above to include a DMB SY before and after accessing PAR_EL1. In conjunction to the above, the firmware needs to use a specific write sequence to several IMPLEMENTATION DEFINED registers to have the hardware insert a DMB SY after all load-exclusive and store-exclusive instructions. Apply the workaround to Xen where PAR_EL1 is read, implementing an helper function to do that. Since Xen can be interrupted by irqs in any moment, add a barrier on entry/exit when we are running on the affected cores. A guest without the workaround can deadlock the system, so warn the users of Xen with the above type of cores to use only trusted guests, by printing a message on Xen startup. This is XSA-436 / CVE-2023-34320. Signed-off-by: Luca Fancellu [stefano: add XSA-436 to commit message] Signed-off-by: Stefano Stabellini Reviewed-by: Bertrand Marquis Reviewed-by: Julien Grall --- SUPPORT.md | 2 ++ docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/Kconfig | 21 +++++++++++++++++++++ xen/arch/arm/arm64/entry.S | 19 +++++++++++++++++++ xen/arch/arm/cpuerrata.c | 16 ++++++++++++---- xen/arch/arm/domain.c | 2 +- xen/include/asm-arm/arm64/page.h | 12 ++++++------ xen/include/asm-arm/cpufeature.h | 3 ++- xen/include/asm-arm/sysregs.h | 24 ++++++++++++++++++++++++ 9 files changed, 88 insertions(+), 12 deletions(-) diff --git a/SUPPORT.md b/SUPPORT.md index 48fb462221..b63abbcda5 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -39,8 +39,10 @@ supported in this document. Status: Supported Status, Cortex A57 r0p0-r1p1: Supported, not security supported + Status, Cortex A77 r0p0-r1p0: Supported, not security supported For the Cortex A57 r0p0 - r1p1, see Errata 832075. +For the Cortex A77 r0p0 - r1p0, see Errata 1508412. ## Host hardware support diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt index 1925d8fd4e..c4e82df535 100644 --- a/docs/misc/arm/silicon-errata.txt +++ b/docs/misc/arm/silicon-errata.txt @@ -58,4 +58,5 @@ stable hypervisors. | ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 | | ARM | Neoverse-N1 | #1165522 | N/A | ARM | Neoverse-N1 | #1286807 | ARM64_ERRATUM_1286807 | +| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | | ARM | MMU-500 | #842869 | N/A | diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 330bbf6232..e3c8b89594 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -284,6 +284,27 @@ config ARM64_ERRATUM_1286807 If unsure, say Y. +config ARM64_ERRATUM_1508412 + bool "Cortex-A77: 1508412: possible deadlock on sequence of NC/Device load and store exclusive or PAR read" + default y + depends on ARM_64 + help + This option adds a workaround for Arm Cortex-A77 erratum 1508412. + + Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence + of a store-exclusive or read of PAR_EL1 and a load with device or + non-cacheable memory attributes. The workaround depends on a firmware + counterpart. + + Xen guests must also have the workaround implemented or they can + deadlock the system. + + Work around the issue by inserting DMB SY barriers around PAR_EL1 + register reads and warning Xen users. The DMB barrier is sufficient + to prevent a speculative PAR_EL1 read. + + If unsure, say Y. + endmenu config ARM64_HARDEN_BRANCH_PREDICTOR diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index a8c2145067..4f33cef0b3 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -112,6 +112,16 @@ * position on the stack before. */ .macro entry, hyp, compat, save_x0_x1=1 + + /* + * Ensure any PAR_EL1 reads complete, in case we were interrupted + * between the PAR_EL1 read and the memory barrier for the erratum + * 1508412 workaround. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + sub sp, sp, #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ push x28, x29 push x26, x27 @@ -465,6 +475,15 @@ return_from_trap: ldr lr, [sp], #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ + /* + * Ensure any device/NC reads complete, in case we were interrupted + * between the memory barrier for the erratum 1508412 workaround and + * any PAR_EL1 read. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + eret sb diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index ae649d16ef..ea680fac2e 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -668,6 +668,14 @@ static const struct arm_cpu_capabilities arm_errata[] = { .capability = ARM64_WORKAROUND_AT_SPECULATE, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), }, +#ifdef CONFIG_ARM64_ERRATUM_1508412 + { + /* Cortex-A77 r0p0 - r1p0 */ + .desc = "ARM erratum 1508412 (hypervisor portion)", + .capability = ARM64_WORKAROUND_1508412, + MIDR_RANGE(MIDR_CORTEX_A77, 0, 1), + }, +#endif { /* Cortex-A55 (All versions as erratum is open in SDEN v14) */ .desc = "ARM erratum 1530923", @@ -686,11 +694,11 @@ void __init enable_errata_workarounds(void) { enable_cpu_capabilities(arm_errata); -#ifdef CONFIG_ARM64_ERRATUM_832075 - if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) ) +#if defined(CONFIG_ARM64_ERRATUM_832075) || defined(CONFIG_ARM64_ERRATUM_1508412) + if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || + cpus_have_cap(ARM64_WORKAROUND_1508412) ) { - printk_once("**** This CPU is affected by the errata 832075. ****\n" - "**** Guests without CPU erratum workarounds can deadlock the system! ****\n" + printk_once("**** Guests without CPU erratum workarounds can deadlock the system! ****\n" "**** Only trusted guests should be used. ****\n"); /* Taint the machine has being insecure */ diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index b11359b8cc..a997e7dc11 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -136,7 +136,7 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_32bit_domain(p->domain) ) p->arch.dacr = READ_SYSREG(DACR32_EL2); - p->arch.par = READ_SYSREG64(PAR_EL1); + p->arch.par = read_sysreg_par(); #if defined(CONFIG_ARM_32) p->arch.mair0 = READ_CP32(MAIR0); p->arch.mair1 = READ_CP32(MAIR1); diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h index 0cba266373..fbfe67bf89 100644 --- a/xen/include/asm-arm/arm64/page.h +++ b/xen/include/asm-arm/arm64/page.h @@ -48,11 +48,11 @@ static inline void invalidate_icache_local(void) /* Ask the MMU to translate a VA for us */ static inline uint64_t __va_to_par(vaddr_t va) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); asm volatile ("at s1e2r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } @@ -60,28 +60,28 @@ static inline uint64_t __va_to_par(vaddr_t va) /* Ask the MMU to translate a Guest VA for us */ static inline uint64_t gva_to_ma_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s12e1w, %0;" : : "r" (va)); else asm volatile ("at s12e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s1e1w, %0;" : : "r" (va)); else asm volatile ("at s1e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index d4e7cde675..41aca9c58c 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -53,8 +53,9 @@ #define ARM_WORKAROUND_BHB_LOOP_24 13 #define ARM_WORKAROUND_BHB_LOOP_32 14 #define ARM_WORKAROUND_BHB_SMCC_3 15 +#define ARM64_WORKAROUND_1508412 16 -#define ARM_NCAPS 16 +#define ARM_NCAPS 17 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/sysregs.h b/xen/include/asm-arm/sysregs.h index 5c5c51bbcd..61e30c9e51 100644 --- a/xen/include/asm-arm/sysregs.h +++ b/xen/include/asm-arm/sysregs.h @@ -9,6 +9,30 @@ # error "unknown ARM variant" #endif +#ifndef __ASSEMBLY__ + +#include + +static inline register_t read_sysreg_par(void) +{ + register_t par_el1; + + /* + * On Cortex-A77 r0p0 and r1p0, read access to PAR_EL1 shall include a + * DMB SY before and after accessing it, as part of the workaround for the + * errata 1508412. + */ + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + par_el1 = READ_SYSREG64(PAR_EL1); + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + + return par_el1; +} + +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_ARM_SYSREGS_H */ /* * Local variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 03 12:55:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Aug 2023 12:55:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576345.902368 (Exim 4.92) (envelope-from ) id 1qRXr5-0004vV-Jd; Thu, 03 Aug 2023 12:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576345.902368; Thu, 03 Aug 2023 12:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRXr5-0004vN-GZ; Thu, 03 Aug 2023 12:55:03 +0000 Received: by outflank-mailman (input) for mailman id 576345; Thu, 03 Aug 2023 12:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRXr4-0004vB-8x for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 12:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRXr4-0006XG-6e for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 12:55:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRXr4-0005fD-5T for xen-changelog@lists.xenproject.org; Thu, 03 Aug 2023 12:55:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=O20E4rBCXojOJ+IyYMJ+8NC9wEX2HQxZR+UCAPI1oVQ=; b=ZVdpV+iJxWa8wvmgA3tTOYZnsH xaTcLD5xdoWGRbKv+6jr83KtAt8sBBitBaQSx7VLHQQNzn6S6UITuGuFOgU5pPjzke5fpyqPOkYHq xdu8JE9C9xnWBnwK6a2Pv3Ousqj5iGlnBGP9sD5FysPVaZNu5O28o6amvHxMNSPVFKUQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] xen/arm: Add Cortex-A77 erratum 1508412 handling Message-Id: Date: Thu, 03 Aug 2023 12:55:02 +0000 commit 3e357970c90172526d58e964f8ceaf32b2c69655 Author: Luca Fancellu AuthorDate: Mon Jul 17 13:25:46 2023 +0100 Commit: Stefano Stabellini CommitDate: Tue Aug 1 16:08:57 2023 -0700 xen/arm: Add Cortex-A77 erratum 1508412 handling Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence of a store-exclusive or read of PAR_EL1 and a load with device or non-cacheable memory attributes. A workaround is available, but it depends on a firmware counterpart. The proposed workaround from the errata document is to modify the software running at EL1 and above to include a DMB SY before and after accessing PAR_EL1. In conjunction to the above, the firmware needs to use a specific write sequence to several IMPLEMENTATION DEFINED registers to have the hardware insert a DMB SY after all load-exclusive and store-exclusive instructions. Apply the workaround to Xen where PAR_EL1 is read, implementing an helper function to do that. Since Xen can be interrupted by irqs in any moment, add a barrier on entry/exit when we are running on the affected cores. A guest without the workaround can deadlock the system, so warn the users of Xen with the above type of cores to use only trusted guests, by printing a message on Xen startup. This is XSA-436 / CVE-2023-34320. Signed-off-by: Luca Fancellu [stefano: add XSA-436 to commit message] Signed-off-by: Stefano Stabellini Reviewed-by: Bertrand Marquis Reviewed-by: Julien Grall --- SUPPORT.md | 2 ++ docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/Kconfig | 21 +++++++++++++++++++++ xen/arch/arm/arm64/entry.S | 19 +++++++++++++++++++ xen/arch/arm/cpuerrata.c | 16 ++++++++++++---- xen/arch/arm/domain.c | 2 +- xen/include/asm-arm/arm64/page.h | 12 ++++++------ xen/include/asm-arm/cpufeature.h | 3 ++- xen/include/asm-arm/sysregs.h | 24 ++++++++++++++++++++++++ 9 files changed, 88 insertions(+), 12 deletions(-) diff --git a/SUPPORT.md b/SUPPORT.md index 7d0cb34c8f..15fbad84a7 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -39,8 +39,10 @@ supported in this document. Status: Supported Status, Cortex A57 r0p0-r1p1: Supported, not security supported + Status, Cortex A77 r0p0-r1p0: Supported, not security supported For the Cortex A57 r0p0 - r1p1, see Errata 832075. +For the Cortex A77 r0p0 - r1p0, see Errata 1508412. ## Host hardware support diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt index 1925d8fd4e..c4e82df535 100644 --- a/docs/misc/arm/silicon-errata.txt +++ b/docs/misc/arm/silicon-errata.txt @@ -58,4 +58,5 @@ stable hypervisors. | ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 | | ARM | Neoverse-N1 | #1165522 | N/A | ARM | Neoverse-N1 | #1286807 | ARM64_ERRATUM_1286807 | +| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | | ARM | MMU-500 | #842869 | N/A | diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index ecfa6822e4..c787a042a0 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -278,6 +278,27 @@ config ARM64_ERRATUM_1286807 If unsure, say Y. +config ARM64_ERRATUM_1508412 + bool "Cortex-A77: 1508412: possible deadlock on sequence of NC/Device load and store exclusive or PAR read" + default y + depends on ARM_64 + help + This option adds a workaround for Arm Cortex-A77 erratum 1508412. + + Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence + of a store-exclusive or read of PAR_EL1 and a load with device or + non-cacheable memory attributes. The workaround depends on a firmware + counterpart. + + Xen guests must also have the workaround implemented or they can + deadlock the system. + + Work around the issue by inserting DMB SY barriers around PAR_EL1 + register reads and warning Xen users. The DMB barrier is sufficient + to prevent a speculative PAR_EL1 read. + + If unsure, say Y. + endmenu config ARM64_HARDEN_BRANCH_PREDICTOR diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index 95f1a92684..95ff4e3e05 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -134,6 +134,16 @@ * position on the stack before. */ .macro entry, hyp, compat, save_x0_x1=1 + + /* + * Ensure any PAR_EL1 reads complete, in case we were interrupted + * between the PAR_EL1 read and the memory barrier for the erratum + * 1508412 workaround. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + sub sp, sp, #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ .if \hyp == 0 /* Guest mode */ @@ -492,6 +502,15 @@ return_from_trap: ldr lr, [sp], #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ + /* + * Ensure any device/NC reads complete, in case we were interrupted + * between the memory barrier for the erratum 1508412 workaround and + * any PAR_EL1 read. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + eret sb diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index ae649d16ef..ea680fac2e 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -668,6 +668,14 @@ static const struct arm_cpu_capabilities arm_errata[] = { .capability = ARM64_WORKAROUND_AT_SPECULATE, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), }, +#ifdef CONFIG_ARM64_ERRATUM_1508412 + { + /* Cortex-A77 r0p0 - r1p0 */ + .desc = "ARM erratum 1508412 (hypervisor portion)", + .capability = ARM64_WORKAROUND_1508412, + MIDR_RANGE(MIDR_CORTEX_A77, 0, 1), + }, +#endif { /* Cortex-A55 (All versions as erratum is open in SDEN v14) */ .desc = "ARM erratum 1530923", @@ -686,11 +694,11 @@ void __init enable_errata_workarounds(void) { enable_cpu_capabilities(arm_errata); -#ifdef CONFIG_ARM64_ERRATUM_832075 - if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) ) +#if defined(CONFIG_ARM64_ERRATUM_832075) || defined(CONFIG_ARM64_ERRATUM_1508412) + if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || + cpus_have_cap(ARM64_WORKAROUND_1508412) ) { - printk_once("**** This CPU is affected by the errata 832075. ****\n" - "**** Guests without CPU erratum workarounds can deadlock the system! ****\n" + printk_once("**** Guests without CPU erratum workarounds can deadlock the system! ****\n" "**** Only trusted guests should be used. ****\n"); /* Taint the machine has being insecure */ diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index c7feaa323a..aa767a10e0 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -137,7 +137,7 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_32bit_domain(p->domain) ) p->arch.dacr = READ_SYSREG(DACR32_EL2); - p->arch.par = READ_SYSREG64(PAR_EL1); + p->arch.par = read_sysreg_par(); #if defined(CONFIG_ARM_32) p->arch.mair0 = READ_CP32(MAIR0); p->arch.mair1 = READ_CP32(MAIR1); diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h index 0cba266373..fbfe67bf89 100644 --- a/xen/include/asm-arm/arm64/page.h +++ b/xen/include/asm-arm/arm64/page.h @@ -48,11 +48,11 @@ static inline void invalidate_icache_local(void) /* Ask the MMU to translate a VA for us */ static inline uint64_t __va_to_par(vaddr_t va) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); asm volatile ("at s1e2r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } @@ -60,28 +60,28 @@ static inline uint64_t __va_to_par(vaddr_t va) /* Ask the MMU to translate a Guest VA for us */ static inline uint64_t gva_to_ma_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s12e1w, %0;" : : "r" (va)); else asm volatile ("at s12e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s1e1w, %0;" : : "r" (va)); else asm volatile ("at s1e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index f7368766c0..2f38137f39 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -67,8 +67,9 @@ #define ARM_WORKAROUND_BHB_LOOP_24 13 #define ARM_WORKAROUND_BHB_LOOP_32 14 #define ARM_WORKAROUND_BHB_SMCC_3 15 +#define ARM64_WORKAROUND_1508412 16 -#define ARM_NCAPS 16 +#define ARM_NCAPS 17 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/sysregs.h b/xen/include/asm-arm/sysregs.h index 5c5c51bbcd..61e30c9e51 100644 --- a/xen/include/asm-arm/sysregs.h +++ b/xen/include/asm-arm/sysregs.h @@ -9,6 +9,30 @@ # error "unknown ARM variant" #endif +#ifndef __ASSEMBLY__ + +#include + +static inline register_t read_sysreg_par(void) +{ + register_t par_el1; + + /* + * On Cortex-A77 r0p0 and r1p0, read access to PAR_EL1 shall include a + * DMB SY before and after accessing it, as part of the workaround for the + * errata 1508412. + */ + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + par_el1 = READ_SYSREG64(PAR_EL1); + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + + return par_el1; +} + +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_ARM_SYSREGS_H */ /* * Local variables: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576720.903186 (Exim 4.92) (envelope-from ) id 1qRjLL-0008Vs-Mx; Fri, 04 Aug 2023 01:11:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576720.903186; Fri, 04 Aug 2023 01:11:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLL-0008Vk-KC; Fri, 04 Aug 2023 01:11:03 +0000 Received: by outflank-mailman (input) for mailman id 576720; Fri, 04 Aug 2023 01:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLK-0008Va-Fz for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLK-0001iI-Ez for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjLK-0000bB-Dx for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=deyM++iemo9KKq0kz1rwlJWhEc09s5HULJA6EA3poRY=; b=ur8BchjAwijpEKjlFmvi3e+kma /QU26AVfVrRVeJTNB/2NUGG9GeQ6LbPA3/LaadqTGbmNDGcJVeHbNOyvMzpEApen2qNOgknbCxVXa YZ4BhMUv1L31yu1lGsY6lOHqYyUtYYr0umm7mNQbXxJnHeM0eiI1TyHHmNsq18l7+mIM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] build: evaluate XEN_BUILD_* and XEN_DOMAIN immediately Message-Id: Date: Fri, 04 Aug 2023 01:11:02 +0000 commit 0c594c1b57ee2ecec5f70826c53a2cf02a9c2acb Author: Anthony PERARD AuthorDate: Mon Jul 31 15:02:18 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:02:18 2023 +0200 build: evaluate XEN_BUILD_* and XEN_DOMAIN immediately With GNU make 4.4, the number of execution of the command present in these $(shell ) increased greatly. This is probably because as of make 4.4, exported variable are also added to the environment of $(shell ) construct. Also, `make -d` shows a lot of these: Makefile:15: not recursively expanding XEN_BUILD_DATE to export to shell function Makefile:16: not recursively expanding XEN_BUILD_TIME to export to shell function Makefile:17: not recursively expanding XEN_BUILD_HOST to export to shell function Makefile:14: not recursively expanding XEN_DOMAIN to export to shell function So to avoid having these command been run more than necessary, we will replace ?= by an equivalent but with immediate expansion. Reported-by: Jason Andryuk Signed-off-by: Anthony PERARD Tested-by: Jason Andryuk Reviewed-by: Jan Beulich --- xen/Makefile | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index e8aa663781..c1738dbbde 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -11,10 +11,18 @@ export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version export XEN_WHOAMI ?= $(USER) -export XEN_DOMAIN ?= $(shell ([ -x /bin/dnsdomainname ] && /bin/dnsdomainname) || ([ -x /bin/domainname ] && /bin/domainname || echo [unknown])) -export XEN_BUILD_DATE ?= $(shell LC_ALL=C date) -export XEN_BUILD_TIME ?= $(shell LC_ALL=C date +%T) -export XEN_BUILD_HOST ?= $(shell hostname) +ifeq ($(origin XEN_DOMAIN), undefined) +export XEN_DOMAIN := $(shell ([ -x /bin/dnsdomainname ] && /bin/dnsdomainname) || ([ -x /bin/domainname ] && /bin/domainname || echo [unknown])) +endif +ifeq ($(origin XEN_BUILD_DATE), undefined) +export XEN_BUILD_DATE := $(shell LC_ALL=C date) +endif +ifeq ($(origin XEN_BUILD_TIME), undefined) +export XEN_BUILD_TIME := $(shell LC_ALL=C date +%T) +endif +ifeq ($(origin XEN_BUILD_HOST), undefined) +export XEN_BUILD_HOST := $(shell hostname) +endif # Best effort attempt to find a python interpreter, defaulting to Python 3 if # available. Fall back to just `python` if `which` is nowhere to be found. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576721.903189 (Exim 4.92) (envelope-from ) id 1qRjLV-00006e-OL; Fri, 04 Aug 2023 01:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576721.903189; Fri, 04 Aug 2023 01:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLV-00006W-Ld; Fri, 04 Aug 2023 01:11:13 +0000 Received: by outflank-mailman (input) for mailman id 576721; Fri, 04 Aug 2023 01:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLU-00006M-Kl for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLU-0001iQ-Jv for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjLU-0000bj-H6 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=akdHKpZm9/0uMiJk+52C3uTCwNTnFjXo6eR3h+XIKG0=; b=fEnYp9PnP1/ngKXEF96hgYntXI 2vwL3upgu4XfahuOH/jmm7gb/FF+VqDNeSBMjgV06rZ2wA4F6FFwn/JdHe9dT8VkC/65gBBDGAD1M wBFvTgvyIQj/MqHzailIEaYGYalr8jn5ZCmmocuRl4DhV/QWNayAjFzk4SpaPLHd6MDo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Config.mk: evaluate XEN_COMPILE_ARCH and XEN_OS immediately Message-Id: Date: Fri, 04 Aug 2023 01:11:12 +0000 commit a07414d989cf52e5e84192b78023bee1589bbda4 Author: Anthony PERARD AuthorDate: Mon Jul 31 15:02:34 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:02:34 2023 +0200 Config.mk: evaluate XEN_COMPILE_ARCH and XEN_OS immediately With GNU make 4.4, the number of execution of the command present in these $(shell ) increased greatly. This is probably because as of make 4.4, exported variable are also added to the environment of $(shell ) construct. So to avoid having these command been run more than necessary, we will replace ?= by an equivalent but with immediate expansion. Reported-by: Jason Andryuk Signed-off-by: Anthony PERARD Tested-by: Jason Andryuk Reviewed-by: Jan Beulich --- Config.mk | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index c529b1ba19..dc3afaa47e 100644 --- a/Config.mk +++ b/Config.mk @@ -19,13 +19,17 @@ or = $(if $(strip $(1)),$(1),$(if $(strip $(2)),$(2),$(if $(strip $(3)),$( -include $(XEN_ROOT)/.config -XEN_COMPILE_ARCH ?= $(shell uname -m | sed -e s/i.86/x86_32/ \ +ifeq ($(origin XEN_COMPILE_ARCH), undefined) +XEN_COMPILE_ARCH := $(shell uname -m | sed -e s/i.86/x86_32/ \ -e s/i86pc/x86_32/ -e s/amd64/x86_64/ \ -e s/armv7.*/arm32/ -e s/armv8.*/arm64/ \ -e s/aarch64/arm64/) +endif XEN_TARGET_ARCH ?= $(XEN_COMPILE_ARCH) -XEN_OS ?= $(shell uname -s) +ifeq ($(origin XEN_OS), undefined) +XEN_OS := $(shell uname -s) +endif CONFIG_$(XEN_OS) := y -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576723.903196 (Exim 4.92) (envelope-from ) id 1qRjLf-0000A6-RB; Fri, 04 Aug 2023 01:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576723.903196; Fri, 04 Aug 2023 01:11:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLf-00009n-NC; Fri, 04 Aug 2023 01:11:23 +0000 Received: by outflank-mailman (input) for mailman id 576723; Fri, 04 Aug 2023 01:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLe-00009d-Oq for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLe-0001ia-NZ for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjLe-0000cC-MU for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=J/p+BVgqR49xqamuZgy3IxoAsZh8wPtiYlGHJgqfkkw=; b=T/byKx05hnfLSEbyvXMC22uqMb E7wGoZujD1mN6SO7dZI1PV1NUjnMlc42n0HAQd3eYgZI8FWmoEuYGGTlWU9IkRAteq4JCDQ9ouL7Q RnV/S8iekaOE3iWfl3kLBmxwDMFRDkCI/75jeJzmGyLRVox8G1Aqefr9KwyOZAjQP7OU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xl: Add escape character argument to xl console Message-Id: Date: Fri, 04 Aug 2023 01:11:22 +0000 commit 10d25fc47d888ffa4c7ecfc4fb8796f695511b5d Author: Peter Hoyes AuthorDate: Mon Jul 31 15:03:14 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:03:14 2023 +0200 xl: Add escape character argument to xl console Add -e argument to xl console and pass to new escape_character argument of libxl_console_exec. Introduce a new API version to support this new argument and advertise the new functionality in libxl.h In libxl_console_exec, there are currently two call sites to execl, which uses varargs, in order to support optionally passing 'start-notify-fd' to the console client. In order to support passing the 'escape' argument optionally too, refactor to instead have a single call site to execv, which has the same behavior but takes an array of arguments. If -e is not specified, --escape is not passed to the console client and the existing value (^]) is used as a default. Update the xl docs. Signed-off-by: Peter Hoyes Reviewed-by: Anthony PERARD --- docs/man/xl.1.pod.in | 8 +++++++- tools/include/libxl.h | 43 +++++++++++++++++++++++++++++++++++----- tools/libs/light/libxl_console.c | 30 ++++++++++++++++++++-------- tools/xl/xl_cmdtable.c | 3 ++- tools/xl/xl_console.c | 10 +++++++--- tools/xl/xl_vmcontrol.c | 2 +- 6 files changed, 77 insertions(+), 19 deletions(-) diff --git a/docs/man/xl.1.pod.in b/docs/man/xl.1.pod.in index 101e14241d..9ba22a8fa2 100644 --- a/docs/man/xl.1.pod.in +++ b/docs/man/xl.1.pod.in @@ -222,7 +222,8 @@ Attach to the console of a domain specified by I. If you've set up your domains to have a traditional login console this will look much like a normal text login screen. -Use the key combination Ctrl+] to detach from the domain console. +Use the escape character key combination (default Ctrl+]) to detach from the +domain console. B @@ -239,6 +240,11 @@ emulated serial for HVM guests and PV console for PV guests. Connect to console number I. Console numbers start from 0. +=item I<-e escapechar> + +Customize the escape sequence used to detach from the domain console to +I. If not specified, the value "^]" is used. + =back =item B [I] I diff --git a/tools/include/libxl.h b/tools/include/libxl.h index f3975ecc02..aa5b1c98d4 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -81,6 +81,15 @@ */ #define LIBXL_HAVE_CONSOLE_NOTIFY_FD 1 +/* LIBXL_HAVE_CONSOLE_ESCAPE_CHARACTER + * + * If this is defined, libxl_console_exec and + * libxl_primary_console_exe take an escape_character parameter. That + * parameter will be used to modify the escape sequence used to exit the + * console. + */ +#define LIBXL_HAVE_CONSOLE_ESCAPE_CHARACTER 1 + /* LIBXL_HAVE_CONST_COPY_AND_LENGTH_FUNCTIONS * * If this is defined, the copy functions have constified src parameter and the @@ -790,7 +799,8 @@ typedef struct libxl__ctx libxl_ctx; #if LIBXL_API_VERSION != 0x040200 && LIBXL_API_VERSION != 0x040300 && \ LIBXL_API_VERSION != 0x040400 && LIBXL_API_VERSION != 0x040500 && \ LIBXL_API_VERSION != 0x040700 && LIBXL_API_VERSION != 0x040800 && \ - LIBXL_API_VERSION != 0x041300 && LIBXL_API_VERSION != 0x041400 + LIBXL_API_VERSION != 0x041300 && LIBXL_API_VERSION != 0x041400 && \ + LIBXL_API_VERSION != 0x041800 #error Unknown LIBXL_API_VERSION #endif #endif @@ -1954,7 +1964,8 @@ int libxl_vncviewer_exec(libxl_ctx *ctx, uint32_t domid, int autopass); * the caller that it has connected to the guest console. */ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, - libxl_console_type type, int notify_fd); + libxl_console_type type, int notify_fd, + char* escape_character); /* libxl_primary_console_exec finds the domid and console number * corresponding to the primary console of the given vm, then calls * libxl_console_exec with the right arguments (domid might be different @@ -1964,9 +1975,12 @@ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, * guests using pygrub. * If notify_fd is not -1, xenconsole will write 0x00 to it to nofity * the caller that it has connected to the guest console. + * If escape_character is not NULL, the provided value is used to exit + * the guest console. */ int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm, - int notify_fd); + int notify_fd, + char* escape_character); #if defined(LIBXL_API_VERSION) && LIBXL_API_VERSION < 0x040800 @@ -1974,17 +1988,36 @@ static inline int libxl_console_exec_0x040700(libxl_ctx *ctx, uint32_t domid, int cons_num, libxl_console_type type) { - return libxl_console_exec(ctx, domid, cons_num, type, -1); + return libxl_console_exec(ctx, domid, cons_num, type, -1, NULL); } #define libxl_console_exec libxl_console_exec_0x040700 static inline int libxl_primary_console_exec_0x040700(libxl_ctx *ctx, uint32_t domid_vm) { - return libxl_primary_console_exec(ctx, domid_vm, -1); + return libxl_primary_console_exec(ctx, domid_vm, -1, NULL); } #define libxl_primary_console_exec libxl_primary_console_exec_0x040700 +#elif defined(LIBXL_API_VERSION) && LIBXL_API_VERSION < 0x041800 + +static inline int libxl_console_exec_0x041700(libxl_ctx *ctx, uint32_t domid, + int cons_num, + libxl_console_type type, + int notify_fd) +{ + return libxl_console_exec(ctx, domid, cons_num, type, notify_fd, NULL); +} +#define libxl_console_exec libxl_console_exec_0x041700 + +static inline int libxl_primary_console_exec_0x041700(libxl_ctx *ctx, + uint32_t domid_vm, + int notify_fd) +{ + return libxl_primary_console_exec(ctx, domid_vm, notify_fd, NULL); +} +#define libxl_primary_console_exec libxl_primary_console_exec_0x041700 + #endif /* libxl_console_get_tty retrieves the specified domain's console tty path diff --git a/tools/libs/light/libxl_console.c b/tools/libs/light/libxl_console.c index f497be141b..cd7412a327 100644 --- a/tools/libs/light/libxl_console.c +++ b/tools/libs/light/libxl_console.c @@ -52,7 +52,8 @@ out: } int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, - libxl_console_type type, int notify_fd) + libxl_console_type type, int notify_fd, + char* escape_character) { GC_INIT(ctx); char *p = GCSPRINTF("%s/xenconsole", libxl__private_bindir_path()); @@ -75,15 +76,26 @@ int libxl_console_exec(libxl_ctx *ctx, uint32_t domid, int cons_num, goto out; } + char *args[] = { + p, domid_s, "--num", cons_num_s, "--type", cons_type_s, + NULL, NULL, NULL, NULL, /* start-notify-fd, escape */ + NULL, /* list terminator - do not use */ + }; + char **args_extra = args + 6; + if (notify_fd != -1) { notify_fd_s = GCSPRINTF("%d", notify_fd); - execl(p, p, domid_s, "--num", cons_num_s, "--type", cons_type_s, - "--start-notify-fd", notify_fd_s, (void *)NULL); - } else { - execl(p, p, domid_s, "--num", cons_num_s, "--type", cons_type_s, - (void *)NULL); + *args_extra++ = "--start-notify-fd"; + *args_extra++ = notify_fd_s; } + if (escape_character) { + *args_extra++ = "--escape"; + *args_extra++ = escape_character; + } + + execv(p, args); + out: GC_FREE; return ERROR_FAIL; @@ -156,7 +168,8 @@ out: return rc; } -int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm, int notify_fd) +int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm, int notify_fd, + char* escape_character) { uint32_t domid; int cons_num; @@ -165,7 +178,8 @@ int libxl_primary_console_exec(libxl_ctx *ctx, uint32_t domid_vm, int notify_fd) rc = libxl__primary_console_find(ctx, domid_vm, &domid, &cons_num, &type); if ( rc ) return rc; - return libxl_console_exec(ctx, domid, cons_num, type, notify_fd); + return libxl_console_exec(ctx, domid, cons_num, type, notify_fd, + escape_character); } int libxl_primary_console_get_tty(libxl_ctx *ctx, uint32_t domid_vm, diff --git a/tools/xl/xl_cmdtable.c b/tools/xl/xl_cmdtable.c index ccf4d83584..67604e9536 100644 --- a/tools/xl/xl_cmdtable.c +++ b/tools/xl/xl_cmdtable.c @@ -141,7 +141,8 @@ const struct cmd_spec cmd_table[] = { "Attach to domain's console", "[options] \n" "-t console type, pv , serial or vuart\n" - "-n console number" + "-n console number\n" + "-e escape character" }, { "vncviewer", &main_vncviewer, 0, 0, diff --git a/tools/xl/xl_console.c b/tools/xl/xl_console.c index b27f9e0136..5633c6f6f7 100644 --- a/tools/xl/xl_console.c +++ b/tools/xl/xl_console.c @@ -28,8 +28,9 @@ int main_console(int argc, char **argv) int opt = 0, num = 0; libxl_console_type type = 0; const char *console_names = "pv, serial, vuart"; + char* escape_character = NULL; - SWITCH_FOREACH_OPT(opt, "n:t:", NULL, "console", 1) { + SWITCH_FOREACH_OPT(opt, "n:t:e:", NULL, "console", 1) { case 't': if (!strcmp(optarg, "pv")) type = LIBXL_CONSOLE_TYPE_PV; @@ -45,13 +46,16 @@ int main_console(int argc, char **argv) case 'n': num = atoi(optarg); break; + case 'e': + escape_character = optarg; + break; } domid = find_domain(argv[optind]); if (!type) - libxl_primary_console_exec(ctx, domid, -1); + libxl_primary_console_exec(ctx, domid, -1, escape_character); else - libxl_console_exec(ctx, domid, num, type, -1); + libxl_console_exec(ctx, domid, num, type, -1, escape_character); fprintf(stderr, "Unable to attach console\n"); return EXIT_FAILURE; } diff --git a/tools/xl/xl_vmcontrol.c b/tools/xl/xl_vmcontrol.c index 5518c78dc6..03971927e9 100644 --- a/tools/xl/xl_vmcontrol.c +++ b/tools/xl/xl_vmcontrol.c @@ -643,7 +643,7 @@ static void autoconnect_console(libxl_ctx *ctx_ignored, postfork(); sleep(1); - libxl_primary_console_exec(ctx, bldomid, notify_fd); + libxl_primary_console_exec(ctx, bldomid, notify_fd, NULL); /* Do not return. xl continued in child process */ perror("xl: unable to exec console client"); _exit(1); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576725.903197 (Exim 4.92) (envelope-from ) id 1qRjLp-0000Dc-Tb; Fri, 04 Aug 2023 01:11:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576725.903197; Fri, 04 Aug 2023 01:11:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLp-0000DU-R2; Fri, 04 Aug 2023 01:11:33 +0000 Received: by outflank-mailman (input) for mailman id 576725; Fri, 04 Aug 2023 01:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLo-0000D5-Rb for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLo-0001in-Qo for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjLo-0000ci-Pz for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=u8qbKHOLls7yZezPoOqiUZu9qd9IK4++3dR1buEt+Y4=; b=JOHYyXmeo6CZNu14KwRcdMjZly jcFUq3CiPhp2CA1KUMZSs7XbuHO6r378/GS0Z9Dq+dTbjqaRdz9E7TfuDySI2A1YWR/09WwHIbkcq rhzLoUvGGxNXckMPVIX+iVBp/0iurEUtNM6NTSfAeQdIi9BBpIJL+0fZZEH3mKBJ51mw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/IRQ: address violations of MISRA C: 2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:11:32 +0000 commit af6ad28a0f5fe64ff296b331bc7415a42d9ccbc6 Author: Federico Serafini AuthorDate: Mon Jul 31 15:03:34 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:03:34 2023 +0200 xen/IRQ: address violations of MISRA C: 2012 Rules 8.2 and 8.3 Give a name to unnamed parameters thus addressing violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini --- xen/arch/arm/irq.c | 2 +- xen/include/xen/irq.h | 41 +++++++++++++++++++++-------------------- xen/include/xen/softirq.h | 2 +- 3 files changed, 23 insertions(+), 22 deletions(-) diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 16e56f8945..054bb281d8 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -58,7 +58,7 @@ hw_irq_controller no_irq_type = { static irq_desc_t irq_desc[NR_IRQS]; static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); -irq_desc_t *__irq_to_desc(int irq) +struct irq_desc *__irq_to_desc(int irq) { if ( irq < NR_LOCAL_IRQS ) return &this_cpu(local_irq_desc)[irq]; diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h index 300625e56d..9747e818f7 100644 --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -110,22 +110,22 @@ typedef struct irq_desc { #define irq_to_desc(irq) (&irq_desc[irq]) #endif -int init_one_irq_desc(struct irq_desc *); -int arch_init_one_irq_desc(struct irq_desc *); +int init_one_irq_desc(struct irq_desc *desc); +int arch_init_one_irq_desc(struct irq_desc *desc); #define irq_desc_initialized(desc) ((desc)->handler != NULL) extern int setup_irq(unsigned int irq, unsigned int irqflags, - struct irqaction *); + struct irqaction *new); extern void release_irq(unsigned int irq, const void *dev_id); extern int request_irq(unsigned int irq, unsigned int irqflags, void (*handler)(int, void *, struct cpu_user_regs *), - const char * devname, void *dev_id); + const char *devname, void *dev_id); extern hw_irq_controller no_irq_type; void cf_check no_action(int cpl, void *dev_id, struct cpu_user_regs *regs); -unsigned int cf_check irq_startup_none(struct irq_desc *); -void cf_check irq_actor_none(struct irq_desc *); +unsigned int cf_check irq_startup_none(struct irq_desc *desc); +void cf_check irq_actor_none(struct irq_desc *desc); #define irq_shutdown_none irq_actor_none #define irq_disable_none irq_actor_none #define irq_enable_none irq_actor_none @@ -146,7 +146,7 @@ struct pirq { #define pirq_info(d, p) ((struct pirq *)radix_tree_lookup(&(d)->pirq_tree, p)) /* Use this instead of pirq_info() if the structure may need allocating. */ -extern struct pirq *pirq_get_info(struct domain *, int pirq); +extern struct pirq *pirq_get_info(struct domain *d, int pirq); #define pirq_field(d, p, f, def) ({ \ const struct pirq *__pi = pirq_info(d, p); \ @@ -155,30 +155,31 @@ extern struct pirq *pirq_get_info(struct domain *, int pirq); #define pirq_to_evtchn(d, pirq) pirq_field(d, pirq, evtchn, 0) #define pirq_masked(d, pirq) pirq_field(d, pirq, masked, 0) -void pirq_cleanup_check(struct pirq *, struct domain *); +void pirq_cleanup_check(struct pirq *pirq, struct domain *d); #define pirq_cleanup_check(pirq, d) \ ((pirq)->evtchn ? pirq_cleanup_check(pirq, d) : (void)0) -extern void pirq_guest_eoi(struct pirq *); -extern void desc_guest_eoi(struct irq_desc *, struct pirq *); +extern void pirq_guest_eoi(struct pirq *pirq); +extern void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq); extern int pirq_guest_unmask(struct domain *d); -extern int pirq_guest_bind(struct vcpu *, struct pirq *, int will_share); -extern void pirq_guest_unbind(struct domain *d, struct pirq *); -extern void pirq_set_affinity(struct domain *d, int irq, const cpumask_t *); -extern irq_desc_t *domain_spin_lock_irq_desc( - struct domain *d, int irq, unsigned long *pflags); -extern irq_desc_t *pirq_spin_lock_irq_desc( - const struct pirq *, unsigned long *pflags); +extern int pirq_guest_bind(struct vcpu *v, struct pirq *pirq, int will_share); +extern void pirq_guest_unbind(struct domain *d, struct pirq *pirq); +extern void pirq_set_affinity(struct domain *d, int pirq, + const cpumask_t *mask); +extern struct irq_desc *domain_spin_lock_irq_desc( + struct domain *d, int pirq, unsigned long *pflags); +extern struct irq_desc *pirq_spin_lock_irq_desc( + const struct pirq *pirq, unsigned long *pflags); -unsigned int set_desc_affinity(struct irq_desc *, const cpumask_t *); +unsigned int set_desc_affinity(struct irq_desc *desc, const cpumask_t *mask); #ifndef arch_hwdom_irqs -unsigned int arch_hwdom_irqs(domid_t); +unsigned int arch_hwdom_irqs(domid_t domid); #endif #ifndef arch_evtchn_bind_pirq -void arch_evtchn_bind_pirq(struct domain *, int pirq); +void arch_evtchn_bind_pirq(struct domain *d, int pirq); #endif #endif /* __XEN_IRQ_H__ */ diff --git a/xen/include/xen/softirq.h b/xen/include/xen/softirq.h index 1f6c4783da..33d6f2ecd2 100644 --- a/xen/include/xen/softirq.h +++ b/xen/include/xen/softirq.h @@ -26,7 +26,7 @@ typedef void (*softirq_handler)(void); void do_softirq(void); void open_softirq(int nr, softirq_handler handler); -void cpumask_raise_softirq(const cpumask_t *, unsigned int nr); +void cpumask_raise_softirq(const cpumask_t *mask, unsigned int nr); void cpu_raise_softirq(unsigned int cpu, unsigned int nr); void raise_softirq(unsigned int nr); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576726.903202 (Exim 4.92) (envelope-from ) id 1qRjLz-0000HG-VG; Fri, 04 Aug 2023 01:11:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576726.903202; Fri, 04 Aug 2023 01:11:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLz-0000H3-SX; Fri, 04 Aug 2023 01:11:43 +0000 Received: by outflank-mailman (input) for mailman id 576726; Fri, 04 Aug 2023 01:11:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLy-0000Gh-Vj for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjLy-0001j6-UQ for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjLy-0000du-T5 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:11:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e6EfNzKFQd7i0HtNP6EuG8xadSb1MbjacjgmSKkFw5I=; b=E79XiUxRu3xsfaGtKrTUSrOniE 63ssYwpoCP8jY9TCTtnm+GqwDYiVVMLrHmvZUYmvn7r2c50K5wUU7lghvyWkqg34d/Y9KrcNaFlP5 HGy89EBh1pTyG+8INSsMZONx3Saj5PPvksGeue2/57neQU2KF+h/wjOnO/M/Yx2MBTxo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/IRQ: address violations of MISRA C: 2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:11:42 +0000 commit d47e138d10108ab2fdc247d054db47f2464816b5 Author: Federico Serafini AuthorDate: Mon Jul 31 15:04:14 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:04:14 2023 +0200 x86/IRQ: address violations of MISRA C: 2012 Rules 8.2 and 8.3 Give a name to unnamed parameters thus addressing violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/irq.h | 30 +++++++++++++++--------------- xen/arch/x86/irq.c | 4 ++-- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h index 3f95dd39b7..ad907fc97f 100644 --- a/xen/arch/x86/include/asm/irq.h +++ b/xen/arch/x86/include/asm/irq.h @@ -107,12 +107,12 @@ void alloc_direct_apic_vector( void do_IRQ(struct cpu_user_regs *regs); -void cf_check disable_8259A_irq(struct irq_desc *); -void cf_check enable_8259A_irq(struct irq_desc *); +void cf_check disable_8259A_irq(struct irq_desc *desc); +void cf_check enable_8259A_irq(struct irq_desc *desc); int i8259A_irq_pending(unsigned int irq); void mask_8259A(void); void unmask_8259A(void); -void init_8259A(int aeoi); +void init_8259A(int auto_eoi); void make_8259A_irq(unsigned int irq); bool bogus_8259A_irq(unsigned int irq); int i8259A_suspend(void); @@ -142,15 +142,15 @@ struct arch_pirq { #define pirq_dpci(pirq) ((pirq) ? &(pirq)->arch.hvm.dpci : NULL) #define dpci_pirq(pd) container_of(pd, struct pirq, arch.hvm.dpci) -int pirq_shared(struct domain *d , int irq); +int pirq_shared(struct domain *d , int pirq); int map_domain_pirq(struct domain *d, int pirq, int irq, int type, void *data); int unmap_domain_pirq(struct domain *d, int pirq); int get_free_pirq(struct domain *d, int type); -int get_free_pirqs(struct domain *, unsigned int nr); +int get_free_pirqs(struct domain *d, unsigned int nr); void free_domain_pirqs(struct domain *d); -int map_domain_emuirq_pirq(struct domain *d, int pirq, int irq); +int map_domain_emuirq_pirq(struct domain *d, int pirq, int emuirq); int unmap_domain_pirq_emuirq(struct domain *d, int pirq); /* Reset irq affinities to match the given CPU mask. */ @@ -168,9 +168,9 @@ int irq_to_vector(int irq); */ int create_irq(nodeid_t node, bool grant_access); void destroy_irq(unsigned int irq); -int assign_irq_vector(int irq, const cpumask_t *); +int assign_irq_vector(int irq, const cpumask_t *mask); -void cf_check irq_complete_move(struct irq_desc *); +void cf_check irq_complete_move(struct irq_desc *desc); extern struct irq_desc *irq_desc; @@ -179,16 +179,16 @@ void unlock_vector_lock(void); void setup_vector_irq(unsigned int cpu); -void move_native_irq(struct irq_desc *); -void move_masked_irq(struct irq_desc *); +void move_native_irq(struct irq_desc *desc); +void move_masked_irq(struct irq_desc *desc); -int bind_irq_vector(int irq, int vector, const cpumask_t *); +int bind_irq_vector(int irq, int vector, const cpumask_t *mask); -void cf_check end_nonmaskable_irq(struct irq_desc *, uint8_t vector); -void irq_set_affinity(struct irq_desc *, const cpumask_t *mask); +void cf_check end_nonmaskable_irq(struct irq_desc *desc, uint8_t vector); +void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask); -int init_domain_irq_mapping(struct domain *); -void cleanup_domain_irq_mapping(struct domain *); +int init_domain_irq_mapping(struct domain *d); +void cleanup_domain_irq_mapping(struct domain *d); #define domain_pirq_to_irq(d, pirq) pirq_field(d, pirq, arch.irq, 0) #define domain_irq_to_pirq(d, irq) ({ \ diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 20150b1c7f..6abfd81621 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -177,7 +177,7 @@ static int __init _bind_irq_vector(struct irq_desc *desc, int vector, return 0; } -int __init bind_irq_vector(int irq, int vector, const cpumask_t *cpu_mask) +int __init bind_irq_vector(int irq, int vector, const cpumask_t *mask) { struct irq_desc *desc = irq_to_desc(irq); unsigned long flags; @@ -187,7 +187,7 @@ int __init bind_irq_vector(int irq, int vector, const cpumask_t *cpu_mask) spin_lock_irqsave(&desc->lock, flags); spin_lock(&vector_lock); - ret = _bind_irq_vector(desc, vector, cpu_mask); + ret = _bind_irq_vector(desc, vector, mask); spin_unlock(&vector_lock); spin_unlock_irqrestore(&desc->lock, flags); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:11:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:11:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576727.903206 (Exim 4.92) (envelope-from ) id 1qRjMA-0000LI-0Y; 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Fri, 04 Aug 2023 01:11:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=D0+BMy5VHc72PSA8VuiVZPAo22h3w/U+Cp1Mc0KvXIA=; b=HrSaX5vjYbwYPkTDE2JAwraXvO fj9K9yHtwLJ88PeM0nDgGhVusjN5r+7txVxPCf7+jh0+5KUWTMRKLK/EuIxcj4NoF6J1bRjHxZoEX LBJhK16tutiTxhY49KTI+VUpidm/XSgll1SvKMDgXNj47xt944uijJNFG1cnd4dbcFoY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] IOMMU: address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:11:53 +0000 commit 4fd19108859cf73d4f672a8fcf1966e520f5d73b Author: Federico Serafini AuthorDate: Mon Jul 31 15:05:14 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:05:14 2023 +0200 IOMMU: address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function or data declarations and the ones used in the corresponding function or data definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/passthrough/iommu.c | 10 +++++----- xen/include/xen/iommu.h | 30 ++++++++++++++++-------------- 2 files changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c index 0e187f6ae3..7bbe3889a2 100644 --- a/xen/drivers/passthrough/iommu.c +++ b/xen/drivers/passthrough/iommu.c @@ -25,10 +25,10 @@ unsigned int __read_mostly iommu_dev_iotlb_timeout = 1000; integer_param("iommu_dev_iotlb_timeout", iommu_dev_iotlb_timeout); -bool_t __initdata iommu_enable = 1; -bool_t __read_mostly iommu_enabled; -bool_t __read_mostly force_iommu; -bool_t __read_mostly iommu_verbose; +bool __initdata iommu_enable = 1; +bool __read_mostly iommu_enabled; +bool __read_mostly force_iommu; +bool __read_mostly iommu_verbose; static bool_t __read_mostly iommu_crash_disable; #define IOMMU_quarantine_none 0 /* aka false */ @@ -57,7 +57,7 @@ int8_t __hwdom_initdata iommu_hwdom_reserved = -1; bool __read_mostly iommu_hap_pt_share = true; #endif -bool_t __read_mostly iommu_debug; +bool __read_mostly iommu_debug; DEFINE_PER_CPU(bool_t, iommu_dont_flush_iotlb); diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 405db59971..8c0818cd01 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -52,7 +52,7 @@ static inline bool_t dfn_eq(dfn_t x, dfn_t y) } #ifdef CONFIG_HAS_PASSTHROUGH -extern bool_t iommu_enable, iommu_enabled; +extern bool iommu_enable, iommu_enabled; extern bool force_iommu, iommu_verbose; /* Boolean except for the specific purposes of drivers/passthrough/iommu.c. */ extern uint8_t iommu_quarantine; @@ -108,8 +108,8 @@ static inline void clear_iommu_hap_pt_share(void) #endif } -extern bool_t iommu_debug; -extern bool_t amd_iommu_perdev_intremap; +extern bool iommu_debug; +extern bool amd_iommu_perdev_intremap; extern bool iommu_hwdom_strict, iommu_hwdom_passthrough, iommu_hwdom_inclusive; extern int8_t iommu_hwdom_reserved; @@ -165,10 +165,10 @@ enum * values indicate partial completion, which is possible only with * IOMMUF_preempt passed in. */ -long __must_check iommu_map(struct domain *d, dfn_t dfn, mfn_t mfn, +long __must_check iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0, unsigned long page_count, unsigned int flags, unsigned int *flush_flags); -long __must_check iommu_unmap(struct domain *d, dfn_t dfn, +long __must_check iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count, unsigned int flags, unsigned int *flush_flags); @@ -197,11 +197,13 @@ bool_t iommu_has_feature(struct domain *d, enum iommu_feature feature); #ifdef CONFIG_HAS_PCI struct pirq; -int hvm_do_IRQ_dpci(struct domain *, struct pirq *); -int pt_irq_create_bind(struct domain *, const struct xen_domctl_bind_pt_irq *); -int pt_irq_destroy_bind(struct domain *, const struct xen_domctl_bind_pt_irq *); +int hvm_do_IRQ_dpci(struct domain *d, struct pirq *pirq); +int pt_irq_create_bind(struct domain *d, + const struct xen_domctl_bind_pt_irq *pt_irq_bind); +int pt_irq_destroy_bind(struct domain *d, + const struct xen_domctl_bind_pt_irq *pt_irq_bind); -struct hvm_irq_dpci *domain_get_irq_dpci(const struct domain *); +struct hvm_irq_dpci *domain_get_irq_dpci(const struct domain *d); void free_hvm_irq_dpci(struct hvm_irq_dpci *dpci); struct msi_desc; @@ -229,8 +231,8 @@ int iommu_release_dt_devices(struct domain *d); */ int iommu_add_dt_device(struct dt_device_node *np); -int iommu_do_dt_domctl(struct xen_domctl *, struct domain *, - XEN_GUEST_HANDLE_PARAM(xen_domctl_t)); +int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d, + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl); #endif /* HAS_DEVICE_TREE */ @@ -386,12 +388,12 @@ static inline int iommu_do_domctl(struct xen_domctl *domctl, struct domain *d, int __must_check iommu_suspend(void); void iommu_resume(void); void iommu_crash_shutdown(void); -int iommu_get_reserved_device_memory(iommu_grdm_t *, void *); +int iommu_get_reserved_device_memory(iommu_grdm_t *func, void *ctxt); int iommu_quarantine_dev_init(device_t *dev); #ifdef CONFIG_HAS_PCI -int iommu_do_pci_domctl(struct xen_domctl *, struct domain *d, - XEN_GUEST_HANDLE_PARAM(xen_domctl_t)); +int iommu_do_pci_domctl(struct xen_domctl *domctl, struct domain *d, + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl); #endif void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576728.903211 (Exim 4.92) (envelope-from ) id 1qRjMK-0000OW-2R; Fri, 04 Aug 2023 01:12:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576728.903211; Fri, 04 Aug 2023 01:12:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMJ-0000OO-VV; Fri, 04 Aug 2023 01:12:03 +0000 Received: by outflank-mailman (input) for mailman id 576728; Fri, 04 Aug 2023 01:12:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMJ-0000OF-57 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] amd: disable C6 after 1000 days on Zen2 Message-Id: Date: Fri, 04 Aug 2023 01:12:03 +0000 commit f7065b24f4fb8813a896b883e6ffd03d67f8a8f2 Author: Roger Pau Monné AuthorDate: Mon Jul 31 15:05:48 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:05:48 2023 +0200 amd: disable C6 after 1000 days on Zen2 As specified on Errata 1474: "A core will fail to exit CC6 after about 1044 days after the last system reset. The time of failure may vary depending on the spread spectrum and REFCLK frequency." Detect when running on AMD Zen2 and setup a timer to prevent entering C6 after 1000 days of uptime. Take into account the TSC value at boot in order to account for any time elapsed before Xen has been booted. Worst case we end up disabling C6 before strictly necessary, but that would still be safe, and it's better than not taking the TSC value into account and hanging. Disable C6 by updating the MSR listed in the revision guide, this avoids applying workarounds in the CPU idle drivers, as the processor won't be allowed to enter C6 by the hardware itself. Print a message once C6 is disabled in order to let the user know. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/amd.c | 74 ++++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/msr-index.h | 2 + xen/include/xen/time.h | 1 + 3 files changed, 77 insertions(+) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index df2681b7c4..89e33a5da6 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1,8 +1,10 @@ +#include #include #include #include #include #include +#include #include #include #include @@ -52,6 +54,8 @@ bool __read_mostly amd_acpi_c1e_quirk; bool __ro_after_init amd_legacy_ssbd; bool __initdata amd_virt_spec_ctrl; +static bool __read_mostly zen2_c6_disabled; + static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) { @@ -972,6 +976,32 @@ void amd_check_zenbleed(void) val & chickenbit ? "chickenbit" : "microcode"); } +static void cf_check zen2_disable_c6(void *arg) +{ + /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ + const uint64_t mask = ~((1ul << 6) | (1ul << 14) | (1ul << 22)); + uint64_t val; + + if (!zen2_c6_disabled) { + printk(XENLOG_WARNING + "Disabling C6 after 1000 days apparent uptime due to AMD errata 1474\n"); + zen2_c6_disabled = true; + /* + * Prevent CPU hotplug so that started CPUs will either see + * zen2_c6_disabled set, or will be handled by + * smp_call_function(). + */ + while (!get_cpu_maps()) + process_pending_softirqs(); + smp_call_function(zen2_disable_c6, NULL, 0); + put_cpu_maps(); + } + + /* Update the MSR to disable C6, done on all threads. */ + rdmsrl(MSR_AMD_CSTATE_CFG, val); + wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); +} + static void cf_check init_amd(struct cpuinfo_x86 *c) { u32 l, h; @@ -1240,6 +1270,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) amd_check_zenbleed(); + if (zen2_c6_disabled) + zen2_disable_c6(NULL); + check_syscfg_dram_mod_en(); amd_log_freq(c); @@ -1249,3 +1282,44 @@ const struct cpu_dev amd_cpu_dev = { .c_early_init = early_init_amd, .c_init = init_amd, }; + +static int __init cf_check zen2_c6_errata_check(void) +{ + /* + * Errata #1474: A Core May Hang After About 1044 Days + * Set up a timer to disable C6 after 1000 days uptime. + */ + s_time_t delta; + + /* + * Zen1 vs Zen2 isn't a simple model number comparison, so use STIBP as + * a heuristic to separate the two uarches in Fam17h. + */ + if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17 || + !boot_cpu_has(X86_FEATURE_AMD_STIBP)) + return 0; + + /* + * Deduct current TSC value, this would be relevant if kexec'ed for + * example. Might not be accurate, but worst case we end up disabling + * C6 before strictly required, which would still be safe. + * + * NB: all affected models (Zen2) have invariant TSC and TSC adjust + * MSR, so early_time_init() will have already cleared any TSC offset. + */ + delta = DAYS(1000) - tsc_ticks2ns(rdtsc()); + if (delta > 0) { + static struct timer errata_c6; + + init_timer(&errata_c6, zen2_disable_c6, NULL, 0); + set_timer(&errata_c6, NOW() + delta); + } else + zen2_disable_c6(NULL); + + return 0; +} +/* + * Must be executed after early_time_init() for tsc_ticks2ns() to have been + * calibrated. That prevents us doing the check in init_amd(). + */ +presmp_initcall(zen2_c6_errata_check); diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 2382fc8e11..4d41c171d2 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -211,6 +211,8 @@ #define MSR_VIRT_SPEC_CTRL 0xc001011f /* Layout matches MSR_SPEC_CTRL */ +#define MSR_AMD_CSTATE_CFG 0xc0010296 + /* * Legacy MSR constants in need of cleanup. No new MSRs below this comment. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index b7427460dd..9ceaec541f 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -53,6 +53,7 @@ struct tm wallclock_time(uint64_t *ns); #define SYSTEM_TIME_HZ 1000000000ULL #define NOW() ((s_time_t)get_s_time()) +#define DAYS(_d) SECONDS((_d) * 86400ULL) #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL)) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576729.903213 (Exim 4.92) (envelope-from ) id 1qRjMU-0000RZ-5V; Fri, 04 Aug 2023 01:12:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576729.903213; Fri, 04 Aug 2023 01:12:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMU-0000RR-2k; Fri, 04 Aug 2023 01:12:14 +0000 Received: by outflank-mailman (input) for mailman id 576729; Fri, 04 Aug 2023 01:12:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMT-0000RB-8g for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMT-0001kR-7v for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjMT-0000g9-70 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VFfeBG0BZMpyp6Z3YNi5anRX1gaGntVWRgMgOdzadH4=; b=NUnDCM5xcB6WbMybZUPfs8sLRH b9XGOGJ28kkRyx4FJb+Lyh2w8DeyG7W986uf9qjnmUFcegr7/1+5LgnUpu7tkceABNYPtuLh/Fsqd 3onIKsJMzMUgDhu2qJT0U3nYyzmyh+Iqb+erSq2WGPvMnSmFk+XgykIIqDSoTUjOr+co=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mm: remove variable to avoid shadowing Message-Id: Date: Fri, 04 Aug 2023 01:12:13 +0000 commit 79c3ae4b20d15317608eb81ac0a4ec01f60a100f Author: Nicola Vetrini AuthorDate: Mon Jul 31 15:06:23 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:06:23 2023 +0200 x86/mm: remove variable to avoid shadowing The local variable 'p2mt' shadows a declaration of the same variable in the enclosing scope, but removing the inner declaration does not alter the semantics ('p2mt' is an output for the get_gfn call later on) and this resolves a violation of MISRA C:2012 Rule 5.3. No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/mm/p2m.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index 714358f953..f6df35767a 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -2439,8 +2439,6 @@ int xenmem_add_to_physmap_one( case XENMAPSPACE_gmfn: { - p2m_type_t p2mt; - gfn = idx; mfn = get_gfn_unshare(d, gfn, &p2mt); /* If the page is still shared, exit early */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576731.903218 (Exim 4.92) (envelope-from ) id 1qRjMf-0000Ul-6d; Fri, 04 Aug 2023 01:12:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576731.903218; Fri, 04 Aug 2023 01:12:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMf-0000Ud-49; Fri, 04 Aug 2023 01:12:25 +0000 Received: by outflank-mailman (input) for mailman id 576731; Fri, 04 Aug 2023 01:12:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMd-0000UK-CO for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMd-0001kb-Bl for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjMd-0000gf-AS for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=m3TkVKyvMYFZ9SRy3ugBAvNiAbRpfNzxtS+4yqdoTS4=; b=jpkzLvpZBgPf3ZSZL0rHm9HPgm Oleyel4uxO+job3Q9djRX03YxBdhW8hCbMCYcjtC9MTgqiAziVRvbnWWNtrxcp8IWlGLU5mwm7Kvy iclhjzjRugnSoH60CDVzDYrTl5bmdigqw+7RNsFdBuD/rChR4jd1aI/+5Rtg/X9PQIiM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: avoid shadowing to address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:12:23 +0000 commit fca1fa283a62c7bb28c5e2676e1d5e91f24b3045 Author: Nicola Vetrini AuthorDate: Mon Jul 31 15:06:53 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:06:53 2023 +0200 x86emul: avoid shadowing to address MISRA C:2012 Rule 5.3 Rule 5.3 has the following headline: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" The declaration of local variable 'cpuid_leaf' causes shadowing with the homonymous function to happen, therefore the variable is renamed to avoid this. No functional changes. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/x86_emulate/x86_emulate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 2de1be7996..f811c1c76b 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1483,7 +1483,7 @@ x86_emulate( { enum x86_segment seg; struct segment_register cs, sreg; - struct cpuid_leaf cpuid_leaf; + struct cpuid_leaf leaf; uint64_t msr_val; unsigned int i, n; unsigned long dummy; @@ -5024,13 +5024,13 @@ x86_emulate( generate_exception_if((msr_val & MSR_MISC_FEATURES_CPUID_FAULTING), X86_EXC_GP, 0); /* Faulting active? (Inc. CPL test) */ - rc = ops->cpuid(_regs.eax, _regs.ecx, &cpuid_leaf, ctxt); + rc = ops->cpuid(_regs.eax, _regs.ecx, &leaf, ctxt); if ( rc != X86EMUL_OKAY ) goto done; - _regs.r(ax) = cpuid_leaf.a; - _regs.r(bx) = cpuid_leaf.b; - _regs.r(cx) = cpuid_leaf.c; - _regs.r(dx) = cpuid_leaf.d; + _regs.r(ax) = leaf.a; + _regs.r(bx) = leaf.b; + _regs.r(cx) = leaf.c; + _regs.r(dx) = leaf.d; break; case X86EMUL_OPC(0x0f, 0xa3): bt: /* bt */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576732.903221 (Exim 4.92) (envelope-from ) id 1qRjMp-0000XQ-84; Fri, 04 Aug 2023 01:12:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576732.903221; Fri, 04 Aug 2023 01:12:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMp-0000XI-5X; Fri, 04 Aug 2023 01:12:35 +0000 Received: by outflank-mailman (input) for mailman id 576732; Fri, 04 Aug 2023 01:12:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMn-0000X6-Fs for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMn-0001kn-F6 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjMn-0000hO-EL for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8znks5Ep4H5TJuvlR9+uzrda5fkRRFW2PqnrquopqA8=; b=HgBGV7jYtfp60bb1uAWDRTtiW2 RNLgfNY15TrMxLWYA+zna+B1fvBZxXLUGIV0PYUoTv1xJuPaqN0tstziikWm7fzNBilzeuN+K0Yf8 GLdMGcucNJlg1az9I1dBXJrJWqbb0NGIeG/BAqhV634jnjB53jCegROiJlHlZPNQ2HA8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: remove local variable to address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:12:33 +0000 commit 70eb862b01023c45b943e8ff92ef4f6a7e9e8950 Author: Nicola Vetrini AuthorDate: Mon Jul 31 15:07:29 2023 +0200 Commit: Jan Beulich CommitDate: Mon Jul 31 15:07:29 2023 +0200 x86emul: remove local variable to address MISRA C:2012 Rule 5.3 The local variable removed by this commit shadowed another declared in an outer scope and thus violates Rule 5.3. It was introduced as part of a refactoring by commit abf5fb62f73d0dbeabc6a8cd6dbb55174b36c8d1. No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/x86_emulate/x86_emulate.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index f811c1c76b..60bd2f8d8e 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -8408,8 +8408,6 @@ x86_emulate( generate_exception(X86_EXC_MF); if ( stub_exn.info.fields.trapnr == X86_EXC_XM ) { - unsigned long cr4; - if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY ) cr4 = X86_CR4_OSXMMEXCPT; generate_exception(cr4 & X86_CR4_OSXMMEXCPT ? X86_EXC_XM : X86_EXC_UD); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576733.903226 (Exim 4.92) (envelope-from ) id 1qRjMz-0000aX-9c; Fri, 04 Aug 2023 01:12:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576733.903226; Fri, 04 Aug 2023 01:12:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMz-0000aP-6w; Fri, 04 Aug 2023 01:12:45 +0000 Received: by outflank-mailman (input) for mailman id 576733; Fri, 04 Aug 2023 01:12:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMx-0000aD-LE for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjMx-0001l5-KT for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjMx-0000iZ-IA for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tjtgb/1G+3PuZ2lQdJyJQqSW58L/uv3YaBZ67EKgheg=; b=xVAMF+Acq0KdKl92JO9fHF7F9x tOUsK8vSDQsolW4lUza8HHoAqZ6236RQQNTcSwpV3hFGEmYnrGA96Ft7fy1/0naeKot/O2j/zQuKN IVnwkcQ1XAipOzaoAJtk+4CJkgTJJ4oozrW3khhJX+BsHxHxCdgNLrLXjxzX79yfwuyQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: avoid Misra Rule 19.1 violations Message-Id: Date: Fri, 04 Aug 2023 01:12:43 +0000 commit 7225f13aef0316f0c1e5d8d36b012ba5f3f19327 Author: Jan Beulich AuthorDate: Tue Aug 1 11:47:38 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:47:38 2023 +0200 x86: avoid Misra Rule 19.1 violations Not exactly overlapping accesses to objects on the left and right hand sides of an assignment are generally UB, and hence disallowed by Misra. While in the specific cases we're talking about here no actual UB can result as long as the compiler doesn't act actively "maliciously", let's still switch to using casts combined with exactly overlapping accesses. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- xen/arch/x86/hvm/hvm.c | 2 +- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 10 +++++----- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 0e471e02a1..2180abeb33 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3861,7 +3861,7 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) /* Zero the upper 32 bits of %rip if not in 64bit mode. */ if ( !(hvm_long_mode_active(cur) && cs->l) ) - regs->rip = regs->eip; + regs->rip = (uint32_t)regs->rip; add_taint(TAINT_HVM_FEP); diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 56cb2f61bb..27170213ae 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1420,7 +1420,7 @@ static void cf_check svm_inject_event(const struct x86_event *event) */ if ( !((vmcb_get_efer(vmcb) & EFER_LMA) && vmcb->cs.l) ) { - regs->rip = regs->eip; + regs->rip = (uint32_t)regs->rip; vmcb->nextrip = (uint32_t)vmcb->nextrip; } diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index c686e6990c..7ec44018d4 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -4760,7 +4760,7 @@ out: regs->rip = (long)(regs->rip << (64 - VADDR_BITS)) >> (64 - VADDR_BITS); else - regs->rip = regs->eip; + regs->rip = (uint32_t)regs->rip; } else domain_crash(v->domain); diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 60bd2f8d8e..e88245eae9 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -503,8 +503,8 @@ static inline void put_loop_count( if ( mode_64bit() && ad_bytes == 4 ) \ { \ _regs.r(cx) = 0; \ - if ( using_si ) _regs.r(si) = _regs.esi; \ - if ( using_di ) _regs.r(di) = _regs.edi; \ + if ( using_si ) _regs.r(si) = (uint32_t)_regs.r(si); \ + if ( using_di ) _regs.r(di) = (uint32_t)_regs.r(di); \ } \ goto complete_insn; \ } \ @@ -1984,9 +1984,9 @@ x86_emulate( case 0x98: /* cbw/cwde/cdqe */ switch ( op_bytes ) { - case 2: _regs.ax = (int8_t)_regs.al; break; /* cbw */ + case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */ case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */ - case 8: _regs.r(ax) = (int32_t)_regs.eax; break; /* cdqe */ + case 8: _regs.r(ax) = (int32_t)_regs.r(ax); break; /* cdqe */ } break; @@ -8377,7 +8377,7 @@ x86_emulate( /* Zero the upper 32 bits of %rip if not in 64-bit mode. */ if ( !mode_64bit() ) - _regs.r(ip) = _regs.eip; + _regs.r(ip) = (uint32_t)_regs.r(ip); /* Should a singlestep #DB be raised? */ if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:12:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:12:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576734.903230 (Exim 4.92) (envelope-from ) id 1qRjN9-0000dH-BC; Fri, 04 Aug 2023 01:12:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576734.903230; Fri, 04 Aug 2023 01:12:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjN9-0000dA-8T; Fri, 04 Aug 2023 01:12:55 +0000 Received: by outflank-mailman (input) for mailman id 576734; Fri, 04 Aug 2023 01:12:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjN7-0000cu-OO for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjN7-0001lF-Na for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjN7-0000j2-Mr for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:12:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=A1e0Y4L/oYFR3TrQdE63nY9voHbS5M9RwhVYUaQTHjw=; b=j1nwaTARMMV0RiHFwHylgt9aeV RmkTnym6+SxUZqStnRJtumAvoxIP0OiyISiKIGNb9tho6MwNlwErVPqwyBXB6lbLzEZ+PNSyrCyWJ pgSQUe0qai5OEN380i5R+UbY4VHthELV743CF9Tb20BSiMzm1K8LSWTC38vzG4lNSWV8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/iommu: pass full IO-APIC RTE for remapping table update Message-Id: Date: Fri, 04 Aug 2023 01:12:53 +0000 commit 3e033172b0250446bfe119f31c7f0f51684b0472 Author: Roger Pau Monné AuthorDate: Tue Aug 1 11:48:39 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:48:39 2023 +0200 x86/iommu: pass full IO-APIC RTE for remapping table update So that the remapping entry can be updated atomically when possible. Doing such update atomically will avoid Xen having to mask the IO-APIC pin prior to performing any interrupt movements (ie: changing the destination and vector fields), as the interrupt remapping entry is always consistent. This also simplifies some of the logic on both VT-d and AMD-Vi implementations, as having the full RTE available instead of half of it avoids to possibly read and update the missing other half from hardware. While there remove the explicit zeroing of new_ire fields in ioapic_rte_to_remap_entry() and initialize the variable at definition so all fields are zeroed. Note fields could be also initialized with final values at definition, but I found that likely too much to be done at this time. Signed-off-by: Roger Pau Monné Reviewed-by: Kevin Tian Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/iommu.h | 3 +- xen/arch/x86/io_apic.c | 5 +- xen/drivers/passthrough/amd/iommu.h | 2 +- xen/drivers/passthrough/amd/iommu_intr.c | 100 +++-------------------- xen/drivers/passthrough/vtd/extern.h | 2 +- xen/drivers/passthrough/vtd/intremap.c | 131 +++++++++++++++---------------- xen/drivers/passthrough/x86/iommu.c | 4 +- xen/include/xen/iommu.h | 3 +- 8 files changed, 82 insertions(+), 168 deletions(-) diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/iommu.h index 0540cd9faa..eb720205e2 100644 --- a/xen/arch/x86/include/asm/iommu.h +++ b/xen/arch/x86/include/asm/iommu.h @@ -84,7 +84,8 @@ struct iommu_init_ops { extern const struct iommu_init_ops *iommu_init_ops; -void iommu_update_ire_from_apic(unsigned int apic, unsigned int reg, unsigned int value); +void iommu_update_ire_from_apic(unsigned int apic, unsigned int pin, + uint64_t rte); unsigned int iommu_read_apic_from_ire(unsigned int apic, unsigned int reg); int iommu_setup_hpet_msi(struct msi_desc *); diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 041233b9b7..b3afef8933 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -275,10 +275,7 @@ void __ioapic_write_entry( __io_apic_write(apic, 0x10 + 2 * pin, eu.w1); } else - { - iommu_update_ire_from_apic(apic, 0x11 + 2 * pin, eu.w2); - iommu_update_ire_from_apic(apic, 0x10 + 2 * pin, eu.w1); - } + iommu_update_ire_from_apic(apic, pin, e.raw); } static void ioapic_write_entry( diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h index 8bc3c35b1b..5429ada58e 100644 --- a/xen/drivers/passthrough/amd/iommu.h +++ b/xen/drivers/passthrough/amd/iommu.h @@ -300,7 +300,7 @@ int cf_check amd_iommu_free_intremap_table( unsigned int amd_iommu_intremap_table_order( const void *irt, const struct amd_iommu *iommu); void cf_check amd_iommu_ioapic_update_ire( - unsigned int apic, unsigned int reg, unsigned int value); + unsigned int apic, unsigned int pin, uint64_t rte); unsigned int cf_check amd_iommu_read_ioapic_from_ire( unsigned int apic, unsigned int reg); int cf_check amd_iommu_msi_msg_update_ire( diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c index f32c418a7e..e83a2a932a 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -247,11 +247,6 @@ static void update_intremap_entry(const struct amd_iommu *iommu, } } -static inline int get_rte_index(const struct IO_APIC_route_entry *rte) -{ - return rte->vector | (rte->delivery_mode << 8); -} - static inline void set_rte_index(struct IO_APIC_route_entry *rte, int offset) { rte->vector = (u8)offset; @@ -267,7 +262,6 @@ static int update_intremap_entry_from_ioapic( int bdf, struct amd_iommu *iommu, struct IO_APIC_route_entry *rte, - bool_t lo_update, u16 *index) { unsigned long flags; @@ -315,31 +309,6 @@ static int update_intremap_entry_from_ioapic( spin_lock(lock); } - if ( fresh ) - /* nothing */; - else if ( !lo_update ) - { - /* - * Low half of incoming RTE is already in remapped format, - * so need to recover vector and delivery mode from IRTE. - */ - ASSERT(get_rte_index(rte) == offset); - if ( iommu->ctrl.ga_en ) - vector = entry.ptr128->full.vector; - else - vector = entry.ptr32->flds.vector; - /* The IntType fields match for both formats. */ - delivery_mode = entry.ptr32->flds.int_type; - } - else if ( x2apic_enabled ) - { - /* - * High half of incoming RTE was read from the I/O APIC and hence may - * not hold the full destination, so need to recover full destination - * from IRTE. - */ - dest = get_full_dest(entry.ptr128); - } update_intremap_entry(iommu, entry, vector, delivery_mode, dest_mode, dest); spin_unlock_irqrestore(lock, flags); @@ -350,14 +319,11 @@ static int update_intremap_entry_from_ioapic( } void cf_check amd_iommu_ioapic_update_ire( - unsigned int apic, unsigned int reg, unsigned int value) + unsigned int apic, unsigned int pin, uint64_t rte) { - struct IO_APIC_route_entry old_rte = { }; - struct IO_APIC_route_entry new_rte = { }; - unsigned int rte_lo = (reg & 1) ? reg - 1 : reg; - unsigned int pin = (reg - 0x10) / 2; + struct IO_APIC_route_entry old_rte; + struct IO_APIC_route_entry new_rte = { .raw = rte }; int seg, bdf, rc; - bool saved_mask, fresh = false; struct amd_iommu *iommu; unsigned int idx; @@ -373,58 +339,23 @@ void cf_check amd_iommu_ioapic_update_ire( { AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n", seg, bdf); - __io_apic_write(apic, reg, value); + __ioapic_write_entry(apic, pin, true, new_rte); return; } - /* save io-apic rte lower 32 bits */ - *((u32 *)&old_rte) = __io_apic_read(apic, rte_lo); - saved_mask = old_rte.mask; - - if ( reg == rte_lo ) - { - *((u32 *)&new_rte) = value; - /* read upper 32 bits from io-apic rte */ - *(((u32 *)&new_rte) + 1) = __io_apic_read(apic, reg + 1); - } - else - { - *((u32 *)&new_rte) = *((u32 *)&old_rte); - *(((u32 *)&new_rte) + 1) = value; - } - - if ( ioapic_sbdf[idx].pin_2_idx[pin] >= INTREMAP_MAX_ENTRIES ) - { - ASSERT(saved_mask); - - /* - * There's nowhere except the IRTE to store a full 32-bit destination, - * so we may not bypass entry allocation and updating of the low RTE - * half in the (usual) case of the high RTE half getting written first. - */ - if ( new_rte.mask && !x2apic_enabled ) - { - __io_apic_write(apic, reg, value); - return; - } - - fresh = true; - } - + old_rte = __ioapic_read_entry(apic, pin, true); /* mask the interrupt while we change the intremap table */ - if ( !saved_mask ) + if ( !old_rte.mask ) { old_rte.mask = 1; - __io_apic_write(apic, rte_lo, *((u32 *)&old_rte)); + __ioapic_write_entry(apic, pin, true, old_rte); } /* Update interrupt remapping entry */ rc = update_intremap_entry_from_ioapic( - bdf, iommu, &new_rte, reg == rte_lo, + bdf, iommu, &new_rte, &ioapic_sbdf[idx].pin_2_idx[pin]); - __io_apic_write(apic, reg, ((u32 *)&new_rte)[reg != rte_lo]); - if ( rc ) { /* Keep the entry masked. */ @@ -433,20 +364,7 @@ void cf_check amd_iommu_ioapic_update_ire( return; } - /* For lower bits access, return directly to avoid double writes */ - if ( reg == rte_lo ) - return; - - /* - * Unmask the interrupt after we have updated the intremap table. Also - * write the low half if a fresh entry was allocated for a high half - * update in x2APIC mode. - */ - if ( !saved_mask || (x2apic_enabled && fresh) ) - { - old_rte.mask = saved_mask; - __io_apic_write(apic, rte_lo, *((u32 *)&old_rte)); - } + __ioapic_write_entry(apic, pin, true, new_rte); } unsigned int cf_check amd_iommu_read_ioapic_from_ire( diff --git a/xen/drivers/passthrough/vtd/extern.h b/xen/drivers/passthrough/vtd/extern.h index 39602d1f88..d49e40c5ce 100644 --- a/xen/drivers/passthrough/vtd/extern.h +++ b/xen/drivers/passthrough/vtd/extern.h @@ -92,7 +92,7 @@ int cf_check intel_iommu_get_reserved_device_memory( unsigned int cf_check io_apic_read_remap_rte( unsigned int apic, unsigned int reg); void cf_check io_apic_write_remap_rte( - unsigned int apic, unsigned int reg, unsigned int value); + unsigned int apic, unsigned int pin, uint64_t rte); struct msi_desc; struct msi_msg; diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index 05df6d5759..706abefacc 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -328,15 +328,14 @@ static int remap_entry_to_ioapic_rte( static int ioapic_rte_to_remap_entry(struct vtd_iommu *iommu, int apic, unsigned int ioapic_pin, struct IO_xAPIC_route_entry *old_rte, - unsigned int rte_upper, unsigned int value) + struct IO_xAPIC_route_entry new_rte) { struct iremap_entry *iremap_entry = NULL, *iremap_entries; struct iremap_entry new_ire; struct IO_APIC_route_remap_entry *remap_rte; - struct IO_xAPIC_route_entry new_rte; int index; unsigned long flags; - bool init = false; + bool init = false, masked = old_rte->mask; remap_rte = (struct IO_APIC_route_remap_entry *) old_rte; spin_lock_irqsave(&iommu->intremap.lock, flags); @@ -364,48 +363,40 @@ static int ioapic_rte_to_remap_entry(struct vtd_iommu *iommu, new_ire = *iremap_entry; - if ( rte_upper ) - { - if ( x2apic_enabled ) - new_ire.remap.dst = value; - else - new_ire.remap.dst = (value >> 24) << 8; - } + if ( x2apic_enabled ) + new_ire.remap.dst = new_rte.dest.dest32; else - { - *(((u32 *)&new_rte) + 0) = value; - new_ire.remap.fpd = 0; - new_ire.remap.dm = new_rte.dest_mode; - new_ire.remap.tm = new_rte.trigger; - new_ire.remap.dlm = new_rte.delivery_mode; - /* Hardware require RH = 1 for LPR delivery mode */ - new_ire.remap.rh = (new_ire.remap.dlm == dest_LowestPrio); - new_ire.remap.avail = 0; - new_ire.remap.res_1 = 0; - new_ire.remap.vector = new_rte.vector; - new_ire.remap.res_2 = 0; - - set_ioapic_source_id(IO_APIC_ID(apic), &new_ire); - new_ire.remap.res_3 = 0; - new_ire.remap.res_4 = 0; - new_ire.remap.p = 1; /* finally, set present bit */ - - /* now construct new ioapic rte entry */ - remap_rte->vector = new_rte.vector; - remap_rte->delivery_mode = 0; /* has to be 0 for remap format */ - remap_rte->index_15 = (index >> 15) & 0x1; - remap_rte->index_0_14 = index & 0x7fff; - - remap_rte->delivery_status = new_rte.delivery_status; - remap_rte->polarity = new_rte.polarity; - remap_rte->irr = new_rte.irr; - remap_rte->trigger = new_rte.trigger; - remap_rte->mask = new_rte.mask; - remap_rte->reserved = 0; - remap_rte->format = 1; /* indicate remap format */ - } - - update_irte(iommu, iremap_entry, &new_ire, !init); + new_ire.remap.dst = GET_xAPIC_ID(new_rte.dest.dest32) << 8; + + new_ire.remap.dm = new_rte.dest_mode; + new_ire.remap.tm = new_rte.trigger; + new_ire.remap.dlm = new_rte.delivery_mode; + /* Hardware require RH = 1 for LPR delivery mode. */ + new_ire.remap.rh = (new_ire.remap.dlm == dest_LowestPrio); + new_ire.remap.vector = new_rte.vector; + + set_ioapic_source_id(IO_APIC_ID(apic), &new_ire); + /* Finally, set present bit. */ + new_ire.remap.p = 1; + + /* Now construct new ioapic rte entry. */ + remap_rte->vector = new_rte.vector; + /* Has to be 0 for remap format. */ + remap_rte->delivery_mode = 0; + remap_rte->index_15 = (index >> 15) & 0x1; + remap_rte->index_0_14 = index & 0x7fff; + + remap_rte->delivery_status = new_rte.delivery_status; + remap_rte->polarity = new_rte.polarity; + remap_rte->irr = new_rte.irr; + remap_rte->trigger = new_rte.trigger; + remap_rte->mask = new_rte.mask; + remap_rte->reserved = 0; + /* Indicate remap format. */ + remap_rte->format = 1; + + /* If cmpxchg16b is not available the caller must mask the IO-APIC pin. */ + update_irte(iommu, iremap_entry, &new_ire, !init && !masked); iommu_sync_cache(iremap_entry, sizeof(*iremap_entry)); iommu_flush_iec_index(iommu, 0, index); @@ -439,36 +430,42 @@ unsigned int cf_check io_apic_read_remap_rte( } void cf_check io_apic_write_remap_rte( - unsigned int apic, unsigned int reg, unsigned int value) + unsigned int apic, unsigned int pin, uint64_t rte) { - unsigned int pin = (reg - 0x10) / 2; + struct IO_xAPIC_route_entry new_rte = { .raw = rte }; struct IO_xAPIC_route_entry old_rte = { }; - struct IO_APIC_route_remap_entry *remap_rte; - unsigned int rte_upper = (reg & 1) ? 1 : 0; struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic)); - int saved_mask; + bool masked = true; + int rc; - old_rte = __ioapic_read_entry(apic, pin, true); - - remap_rte = (struct IO_APIC_route_remap_entry *) &old_rte; - - /* mask the interrupt while we change the intremap table */ - saved_mask = remap_rte->mask; - remap_rte->mask = 1; - __io_apic_write(apic, reg & ~1, *(u32 *)&old_rte); - remap_rte->mask = saved_mask; - - if ( ioapic_rte_to_remap_entry(iommu, apic, pin, - &old_rte, rte_upper, value) ) + if ( !cpu_has_cx16 ) { - __io_apic_write(apic, reg, value); + /* + * Cannot atomically update the IRTE entry: mask the IO-APIC pin to + * avoid interrupts seeing an inconsistent IRTE entry. + */ + old_rte = __ioapic_read_entry(apic, pin, true); + if ( !old_rte.mask ) + { + masked = false; + old_rte.mask = 1; + __ioapic_write_entry(apic, pin, true, old_rte); + } + } - /* Recover the original value of 'mask' bit */ - if ( rte_upper ) - __io_apic_write(apic, reg & ~1, *(u32 *)&old_rte); + rc = ioapic_rte_to_remap_entry(iommu, apic, pin, &old_rte, new_rte); + if ( rc ) + { + if ( !masked ) + { + /* Recover the original value of 'mask' bit */ + old_rte.mask = 0; + __ioapic_write_entry(apic, pin, true, old_rte); + } + return; } - else - __ioapic_write_entry(apic, pin, true, old_rte); + /* old_rte will contain the updated IO-APIC RTE on success. */ + __ioapic_write_entry(apic, pin, true, old_rte); } static void set_msi_source_id(struct pci_dev *pdev, struct iremap_entry *ire) diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c index be71a4c464..d290855959 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -158,9 +158,9 @@ int iommu_enable_x2apic(void) } void iommu_update_ire_from_apic( - unsigned int apic, unsigned int reg, unsigned int value) + unsigned int apic, unsigned int pin, uint64_t rte) { - iommu_vcall(&iommu_ops, update_ire_from_apic, apic, reg, value); + iommu_vcall(&iommu_ops, update_ire_from_apic, apic, pin, rte); } unsigned int iommu_read_apic_from_ire(unsigned int apic, unsigned int reg) diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 8c0818cd01..110693c59f 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -280,7 +280,8 @@ struct iommu_ops { int (*enable_x2apic)(void); void (*disable_x2apic)(void); - void (*update_ire_from_apic)(unsigned int apic, unsigned int reg, unsigned int value); + void (*update_ire_from_apic)(unsigned int apic, unsigned int pin, + uint64_t rte); unsigned int (*read_apic_from_ire)(unsigned int apic, unsigned int reg); int (*setup_hpet_msi)(struct msi_desc *); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576735.903234 (Exim 4.92) (envelope-from ) id 1qRjNJ-0000gX-E8; Fri, 04 Aug 2023 01:13:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576735.903234; Fri, 04 Aug 2023 01:13:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNJ-0000gP-BY; Fri, 04 Aug 2023 01:13:05 +0000 Received: by outflank-mailman (input) for mailman id 576735; Fri, 04 Aug 2023 01:13:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNH-0000gF-RW for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNH-0001lr-QS for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjNH-0000jc-Pj for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eXTFQmWTW5TxFlYsQdZ8NHfya7l6CPmXHXfnyw+NvfI=; b=t8QxdelgUldoRf6fa3Zs40S2DG y+Rjh/s92Nza0aJCv+fNIqswAjvtNKrBeiUmjJ7gNKzl/ZL6nMW3c8aCtqquZ+xuE9zsp9BqQgSbA q0iohthemS5/cjppEWX0GOvDI/eRb8ayOhgI3kGLsoV6yCqohwF5uBnzIpI+CnskPCJI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] EFI: address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:13:03 +0000 commit fcc205cbcc459a8733f7798d9a0cdc1564dd9a57 Author: Federico Serafini AuthorDate: Tue Aug 1 11:49:17 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:49:17 2023 +0200 EFI: address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Acked-by: Jan Beulich --- xen/common/efi/efi.h | 2 +- xen/include/xen/efi.h | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/common/efi/efi.h b/xen/common/efi/efi.h index c9aa65d506..c02fbb7b69 100644 --- a/xen/common/efi/efi.h +++ b/xen/common/efi/efi.h @@ -49,5 +49,5 @@ const CHAR16 *wmemchr(const CHAR16 *s, CHAR16 c, UINTN n); void *ebmalloc(size_t size); void free_ebmalloc_unused_mem(void); -const void *pe_find_section(const void *image_base, const size_t image_size, +const void *pe_find_section(const void *image, const UINTN image_size, const CHAR16 *section_name, UINTN *size_out); diff --git a/xen/include/xen/efi.h b/xen/include/xen/efi.h index 94a7e547f9..942d2e9491 100644 --- a/xen/include/xen/efi.h +++ b/xen/include/xen/efi.h @@ -39,11 +39,11 @@ unsigned long efi_get_time(void); void efi_halt_system(void); void efi_reset_system(bool warm); #ifndef COMPAT -int efi_get_info(uint32_t idx, union xenpf_efi_info *); -int efi_runtime_call(struct xenpf_efi_runtime_call *); +int efi_get_info(uint32_t idx, union xenpf_efi_info *info); +int efi_runtime_call(struct xenpf_efi_runtime_call *op); #endif -int efi_compat_get_info(uint32_t idx, union compat_pf_efi_info *); -int efi_compat_runtime_call(struct compat_pf_efi_runtime_call *); +int efi_compat_get_info(uint32_t idx, union compat_pf_efi_info *info); +int efi_compat_runtime_call(struct compat_pf_efi_runtime_call *op); #endif /* !__ASSEMBLY__ */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576736.903238 (Exim 4.92) (envelope-from ) id 1qRjNT-0000jR-Fw; Fri, 04 Aug 2023 01:13:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576736.903238; Fri, 04 Aug 2023 01:13:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNT-0000jJ-Cw; Fri, 04 Aug 2023 01:13:15 +0000 Received: by outflank-mailman (input) for mailman id 576736; Fri, 04 Aug 2023 01:13:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNR-0000j3-Tt for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNR-0001m5-TD for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjNR-0000kM-Sa for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Y5jbYVqiq7F37T3S5apW1jBEHc2+kRB8EmmXH5JDxqY=; b=K9SGT9MHoMWN7M/MUz32BBjCNa 5MQe9Gp+RN+t1iUL6ii+IKwQNZeF7I7jclj7vXW512sFJCse/m2g0KSaavDZhY8mqn94kRurW+H8W BST8i9awVTsVeXnKNL5Tt1b9OhcpoKXAvrOelM6CahyNb2JpHupeuPr9W0aUjQKVPImU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/HVM: tidy _hvm_load_entry() for style Message-Id: Date: Fri, 04 Aug 2023 01:13:13 +0000 commit c0579c65f6bef794cd449fbc946feacccf485f2e Author: Jan Beulich AuthorDate: Tue Aug 1 11:50:29 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:50:29 2023 +0200 x86/HVM: tidy _hvm_load_entry() for style The primary goal is to eliminate the Misra-non-compliance of "desc" shadowing at least the local variable in hvm_load(). Suffix both local variables with underscores, while also - dropping leading underscores from parameter names (applying this also to the two wrapper macros), - correcting indentation, - correcting brace placement, - dropping unnecessary parentheses around parameter uses when those are passed on as plain arguments. No functional change intended. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Reviewed-by: Stefano Stabellini --- xen/arch/x86/include/asm/hvm/save.h | 42 +++++++++++++++++++------------------ 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/save.h b/xen/arch/x86/include/asm/hvm/save.h index 535cf68ed2..fa201f5d59 100644 --- a/xen/arch/x86/include/asm/hvm/save.h +++ b/xen/arch/x86/include/asm/hvm/save.h @@ -47,30 +47,32 @@ void _hvm_read_entry(struct hvm_domain_context *h, * Unmarshalling: check, then copy. Evaluates to zero on success. This load * function requires the save entry to be the same size as the dest structure. */ -#define _hvm_load_entry(_x, _h, _dst, _strict) ({ \ - int r; \ - struct hvm_save_descriptor *desc \ - = (struct hvm_save_descriptor *)&(_h)->data[(_h)->cur]; \ - if ( (r = _hvm_check_entry((_h), HVM_SAVE_CODE(_x), \ - HVM_SAVE_LENGTH(_x), (_strict))) == 0 ) \ +#define _hvm_load_entry(x, h, dst, strict) ({ \ + int r_; \ + struct hvm_save_descriptor *desc_ \ + = (struct hvm_save_descriptor *)&(h)->data[(h)->cur]; \ + if ( (r_ = _hvm_check_entry(h, HVM_SAVE_CODE(x), \ + HVM_SAVE_LENGTH(x), strict)) == 0 ) \ { \ - _hvm_read_entry((_h), (_dst), HVM_SAVE_LENGTH(_x)); \ - if ( HVM_SAVE_HAS_COMPAT(_x) && \ - desc->length != HVM_SAVE_LENGTH(_x) ) \ - r = HVM_SAVE_FIX_COMPAT(_x, (_dst), desc->length); \ + _hvm_read_entry(h, dst, HVM_SAVE_LENGTH(x)); \ + if ( HVM_SAVE_HAS_COMPAT(x) && \ + desc_->length != HVM_SAVE_LENGTH(x) ) \ + r_ = HVM_SAVE_FIX_COMPAT(x, dst, desc_->length); \ } \ - else if (HVM_SAVE_HAS_COMPAT(_x) \ - && (r = _hvm_check_entry((_h), HVM_SAVE_CODE(_x), \ - HVM_SAVE_LENGTH_COMPAT(_x), (_strict))) == 0 ) { \ - _hvm_read_entry((_h), (_dst), HVM_SAVE_LENGTH_COMPAT(_x)); \ - r = HVM_SAVE_FIX_COMPAT(_x, (_dst), desc->length); \ + else if ( HVM_SAVE_HAS_COMPAT(x) && \ + (r_ = _hvm_check_entry(h, HVM_SAVE_CODE(x), \ + HVM_SAVE_LENGTH_COMPAT(x), \ + strict)) == 0 ) \ + { \ + _hvm_read_entry(h, dst, HVM_SAVE_LENGTH_COMPAT(x)); \ + r_ = HVM_SAVE_FIX_COMPAT(x, dst, desc_->length); \ } \ - r; }) + r_; }) -#define hvm_load_entry(_x, _h, _dst) \ - _hvm_load_entry(_x, _h, _dst, 1) -#define hvm_load_entry_zeroextend(_x, _h, _dst) \ - _hvm_load_entry(_x, _h, _dst, 0) +#define hvm_load_entry(x, h, dst) \ + _hvm_load_entry(x, h, dst, true) +#define hvm_load_entry_zeroextend(x, h, dst) \ + _hvm_load_entry(x, h, dst, false) /* Unmarshalling: what is the instance ID of the next entry? */ static inline unsigned int hvm_load_instance(const struct hvm_domain_context *h) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576737.903242 (Exim 4.92) (envelope-from ) id 1qRjNd-0000mE-HD; Fri, 04 Aug 2023 01:13:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576737.903242; Fri, 04 Aug 2023 01:13:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNd-0000m6-ER; Fri, 04 Aug 2023 01:13:25 +0000 Received: by outflank-mailman (input) for mailman id 576737; Fri, 04 Aug 2023 01:13:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNc-0000lt-0t for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNc-0001mK-0E for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjNb-0000l0-VZ for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=23kk9FmAnH1xfLpSPZF+mbhLyVwRxuYb0yOQw50SFNY=; b=JvaNmYylA8L2Zx5X1nyiHXvXtq s//sevMVWdAabXdS2YJcLGRg8XHhzNjewWXQ/aLD12knqx93kQIdnwdbD8zUt8BjBvFjGAVy66bWg NXA9PSunj9wlLzcNgRIrfeDlI61A1yHg43+iIOIoItU5QF98lH5vO3YOiIAjyKAvDs/4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/pci: rename local variable to address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:13:23 +0000 commit 4b40696fec1f4b2fcd7e5c34b43309fb14e07c48 Author: Nicola Vetrini AuthorDate: Tue Aug 1 11:51:01 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:51:01 2023 +0200 xen/pci: rename local variable to address MISRA C:2012 Rule 5.3 The rename s/pdev_type/type/ is done to avoid shadowing the homonymous function declaration. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/passthrough/pci.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 95846e84f2..33452791a8 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -650,12 +650,12 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, struct pci_seg *pseg; struct pci_dev *pdev; unsigned int slot = PCI_SLOT(devfn), func = PCI_FUNC(devfn); - const char *pdev_type; + const char *type; int ret; bool pf_is_extfn = false; if ( !info ) - pdev_type = "device"; + type = "device"; else if ( info->is_virtfn ) { pcidevs_lock(); @@ -668,12 +668,12 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, if ( !pdev ) pci_add_device(seg, info->physfn.bus, info->physfn.devfn, NULL, node); - pdev_type = "virtual function"; + type = "virtual function"; } else if ( info->is_extfn ) - pdev_type = "extended function"; + type = "extended function"; else - pdev_type = "device"; + type = "device"; ret = xsm_resource_plug_pci(XSM_PRIV, (seg << 16) | (bus << 8) | devfn); if ( ret ) @@ -780,7 +780,7 @@ out: pcidevs_unlock(); if ( !ret ) { - printk(XENLOG_DEBUG "PCI add %s %pp\n", pdev_type, &pdev->sbdf); + printk(XENLOG_DEBUG "PCI add %s %pp\n", type, &pdev->sbdf); while ( pdev->phantom_stride ) { func += pdev->phantom_stride; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576740.903246 (Exim 4.92) (envelope-from ) id 1qRjNn-0000ou-IW; Fri, 04 Aug 2023 01:13:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576740.903246; Fri, 04 Aug 2023 01:13:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNn-0000om-Ft; Fri, 04 Aug 2023 01:13:35 +0000 Received: by outflank-mailman (input) for mailman id 576740; Fri, 04 Aug 2023 01:13:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNm-0000oU-3u for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNm-0001mZ-3A for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjNm-0000lu-2M for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dSXbIGm/uIivOEEyvYtfzuLRlI1OT59Y1YdTP7LG6Cg=; b=jMia+RWVrt1LJA6CLA4vTHNUIw cum4K0X/JQaLPNtGJ0U18Tb29VaNWHtdx6kgOzdiqF/htbGUVlvdV3RdbvD1nsJreeRozZFTUcdlo uQjNSBqnDQQ3hYwucD8UCI8UL0yeMxIwu8I1VHcRHkrAO1oBDnBF495Xcw4fGrhWds+w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] amd/iommu: rename functions to address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:13:34 +0000 commit b524d543735bf9a3cb1ee3d4a75ce1ae849d1ca3 Author: Nicola Vetrini AuthorDate: Tue Aug 1 11:51:28 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:51:28 2023 +0200 amd/iommu: rename functions to address MISRA C:2012 Rule 5.3 The functions 'machine_bfd' and 'guest_bfd' have gained the prefix 'get_' to avoid the mutual shadowing with the homonymous parameters in these functions. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/drivers/passthrough/amd/iommu_guest.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_guest.c b/xen/drivers/passthrough/amd/iommu_guest.c index 80a331f546..47a912126a 100644 --- a/xen/drivers/passthrough/amd/iommu_guest.c +++ b/xen/drivers/passthrough/amd/iommu_guest.c @@ -38,12 +38,12 @@ (reg)->hi = (val) >> 32; \ } while (0) -static unsigned int machine_bdf(struct domain *d, uint16_t guest_bdf) +static unsigned int get_machine_bdf(struct domain *d, uint16_t guest_bdf) { return guest_bdf; } -static uint16_t guest_bdf(struct domain *d, uint16_t machine_bdf) +static uint16_t get_guest_bdf(struct domain *d, uint16_t machine_bdf) { return machine_bdf; } @@ -195,7 +195,7 @@ void guest_iommu_add_ppr_log(struct domain *d, u32 entry[]) log = map_domain_page(_mfn(mfn)) + (tail & ~PAGE_MASK); /* Convert physical device id back into virtual device id */ - gdev_id = guest_bdf(d, iommu_get_devid_from_cmd(entry[0])); + gdev_id = get_guest_bdf(d, iommu_get_devid_from_cmd(entry[0])); iommu_set_devid_to_cmd(&entry[0], gdev_id); memcpy(log, entry, sizeof(ppr_entry_t)); @@ -245,7 +245,7 @@ void guest_iommu_add_event_log(struct domain *d, u32 entry[]) log = map_domain_page(_mfn(mfn)) + (tail & ~PAGE_MASK); /* re-write physical device id into virtual device id */ - dev_id = guest_bdf(d, iommu_get_devid_from_cmd(entry[0])); + dev_id = get_guest_bdf(d, iommu_get_devid_from_cmd(entry[0])); iommu_set_devid_to_cmd(&entry[0], dev_id); memcpy(log, entry, sizeof(event_entry_t)); @@ -268,7 +268,7 @@ static int do_complete_ppr_request(struct domain *d, cmd_entry_t *cmd) uint16_t dev_id; struct amd_iommu *iommu; - dev_id = machine_bdf(d, iommu_get_devid_from_cmd(cmd->data[0])); + dev_id = get_machine_bdf(d, iommu_get_devid_from_cmd(cmd->data[0])); iommu = find_iommu_for_device(0, dev_id); if ( !iommu ) @@ -320,7 +320,7 @@ static int do_invalidate_iotlb_pages(struct domain *d, cmd_entry_t *cmd) struct amd_iommu *iommu; uint16_t dev_id; - dev_id = machine_bdf(d, iommu_get_devid_from_cmd(cmd->data[0])); + dev_id = get_machine_bdf(d, iommu_get_devid_from_cmd(cmd->data[0])); iommu = find_iommu_for_device(0, dev_id); if ( !iommu ) @@ -396,7 +396,7 @@ static int do_invalidate_dte(struct domain *d, cmd_entry_t *cmd) g_iommu = domain_iommu(d); gbdf = iommu_get_devid_from_cmd(cmd->data[0]); - mbdf = machine_bdf(d, gbdf); + mbdf = get_machine_bdf(d, gbdf); /* Guest can only update DTEs for its passthru devices */ if ( mbdf == 0 || gbdf == 0 ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576741.903252 (Exim 4.92) (envelope-from ) id 1qRjNx-0000rj-Ks; Fri, 04 Aug 2023 01:13:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576741.903252; Fri, 04 Aug 2023 01:13:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNx-0000rN-HK; Fri, 04 Aug 2023 01:13:45 +0000 Received: by outflank-mailman (input) for mailman id 576741; Fri, 04 Aug 2023 01:13:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNw-0000rD-7O for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjNw-0001mg-6c for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjNw-0000mc-5J for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gos+BM6qiRRgsphYaM8ZuUyLNML1oGh11ls+Lqf5mkQ=; b=fFSF9BlKzx8nYkF5D6KAeOpIpS tsQ6u2WI1i5HwJaY1FtEpKxDpi0BZXfLl2dqupUXfcisgnN7eeZdAKgcbq6t9KWo7G8qks4aY5uEZ kDfXY/AXkbpQjUhe3QPoEtNmx7fAA+G8GkU+EdSVxFVIw9wzcPDrz3sD9d1xItn1Oq8Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm/IRQ: uniform irq_set_affinity() with x86 version Message-Id: Date: Fri, 04 Aug 2023 01:13:44 +0000 commit c2026b88b58cbb6a84e2885c320a8cfe08f8ffc8 Author: Federico Serafini AuthorDate: Tue Aug 1 11:51:54 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 1 11:51:54 2023 +0200 xen/arm/IRQ: uniform irq_set_affinity() with x86 version Change parameter name of irq_set_affinity() to uniform the function prototype with the one used by x86. No functional changes. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini --- xen/arch/arm/include/asm/irq.h | 2 +- xen/arch/arm/irq.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h index 105b33b37d..c8044b0371 100644 --- a/xen/arch/arm/include/asm/irq.h +++ b/xen/arch/arm/include/asm/irq.h @@ -91,7 +91,7 @@ int platform_get_irq(const struct dt_device_node *device, int index); int platform_get_irq_byname(const struct dt_device_node *np, const char *name); -void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask); +void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask); /* * Use this helper in places that need to know whether the IRQ type is diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 054bb281d8..09648db17a 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -175,10 +175,10 @@ static inline struct domain *irq_get_domain(struct irq_desc *desc) return irq_get_guest_info(desc)->d; } -void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask) +void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask) { if ( desc != NULL ) - desc->handler->set_affinity(desc, cpu_mask); + desc->handler->set_affinity(desc, mask); } int request_irq(unsigned int irq, unsigned int irqflags, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:13:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:13:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576745.903264 (Exim 4.92) (envelope-from ) id 1qRjO7-0001Aq-Sh; Fri, 04 Aug 2023 01:13:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576745.903264; Fri, 04 Aug 2023 01:13:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjO7-0001Ah-Pw; Fri, 04 Aug 2023 01:13:55 +0000 Received: by outflank-mailman (input) for mailman id 576745; Fri, 04 Aug 2023 01:13:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjO6-00019X-AE for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjO6-0001oP-9T for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjO6-0000nX-8n for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:13:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cf3dYeF/asQIXIHW0RysqkqjJgmgeba2mRAC+O2YS5w=; b=K1SoBovBiqTCYg6OYzRTVConSV mNvcgZMsnsEHUwffzWC0kOq77fkQjzZzpfyfV7jdAbc+1C92lhRSsP+EcqUETKVQbeLn/9BopIfLd X+HbDWkhf4bWiraw63VjPU92T1UVzGTJ89gVko9w9Oxwg0ENLr21tcmv/OXLehNpzC+c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/lib: address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:13:54 +0000 commit 1398cf54efe37226f5c79a481f92d33775cc7af1 Author: Federico Serafini AuthorDate: Wed Aug 2 10:48:51 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:48:51 2023 +0200 xen/lib: address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters thus addressing violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Acked-by: Jan Beulich --- xen/include/xen/lib.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index 359cfdc784..8eef557dd5 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -78,7 +78,7 @@ debugtrace_printk(const char *fmt, ...) {} /* Allows us to use '%p' as general-purpose machine-word format char. */ #define _p(_x) ((void *)(unsigned long)(_x)) -extern void printk(const char *format, ...) +extern void printk(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); #define printk_once(fmt, args...) \ @@ -91,9 +91,9 @@ extern void printk(const char *format, ...) } \ }) -extern void guest_printk(const struct domain *d, const char *format, ...) +extern void guest_printk(const struct domain *d, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); -extern void noreturn panic(const char *format, ...) +extern void noreturn panic(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); extern int __printk_ratelimit(int ratelimit_ms, int ratelimit_burst); extern int printk_ratelimit(void); @@ -173,7 +173,7 @@ extern char *print_tainted(char *str); extern void add_taint(unsigned int taint); struct cpu_user_regs; -void cf_check dump_execstate(struct cpu_user_regs *); +void cf_check dump_execstate(struct cpu_user_regs *regs); void init_constructors(void); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576746.903268 (Exim 4.92) (envelope-from ) id 1qRjOH-0001I9-Ur; Fri, 04 Aug 2023 01:14:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576746.903268; Fri, 04 Aug 2023 01:14:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOH-0001I1-Rc; Fri, 04 Aug 2023 01:14:05 +0000 Received: by outflank-mailman (input) for mailman id 576746; Fri, 04 Aug 2023 01:14:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOG-0001G4-DU for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOG-0001pE-Cj for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjOG-0000od-Bs for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fnM//I/wVijkGyGI63KR+A5A+cnK/pLHrbBLyk7ad/o=; b=LYwhL/GoXtUfcCOM2mVguGuduI wsZKz7X2RA4+RQUP2YXkDrQ3eLgxSqgkKhaaxJodkER2O9A1wMo3IwysbqSai3wPH/bL0q9RPfJSz GVVAGkkx205sAgsFJSql/GqqlstxK7lAK3KRi7OO4YrRD/psLaP0i76PKvQBZIhGx81U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: mechanically rename to address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:14:04 +0000 commit 25325ddf2a180763370871fcdcfef1f1b6d34402 Author: Nicola Vetrini AuthorDate: Wed Aug 2 10:49:41 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:49:41 2023 +0200 x86: mechanically rename to address MISRA C:2012 Rule 5.3 Rule 5.3 has the following headline: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" The renames done by this patch avoid shadowing from happening. They are as follows: - s/socket_info/sock_info/ in 'do_write_psr_msrs' The parameter 'cpu_khz' that causes a violation in 'pit_init' is unused, and hence can be removed. Parameter 'debug_stack_lines' in 'compat_show_guest_stack' is removed, since the shadowed static variable has the same purpose. The declaration of 'init_e820' is renamed to be consistent with its definition. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/domain.c | 2 +- xen/arch/x86/emul-i8254.c | 2 +- xen/arch/x86/include/asm/e820.h | 2 +- xen/arch/x86/include/asm/hvm/vpt.h | 2 +- xen/arch/x86/psr.c | 4 ++-- xen/arch/x86/traps.c | 5 ++--- 6 files changed, 8 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 5f66c2ae33..fe86a7f853 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -858,7 +858,7 @@ int arch_domain_create(struct domain *d, } /* PV/PVH guests get an emulated PIT too for video BIOSes to use. */ - pit_init(d, cpu_khz); + pit_init(d); /* * If the FPU does not save FCS/FDS then we can always diff --git a/xen/arch/x86/emul-i8254.c b/xen/arch/x86/emul-i8254.c index a81232fc55..41ec4a1ef1 100644 --- a/xen/arch/x86/emul-i8254.c +++ b/xen/arch/x86/emul-i8254.c @@ -495,7 +495,7 @@ void pit_reset(struct domain *d) spin_unlock(&pit->lock); } -void pit_init(struct domain *d, unsigned long cpu_khz) +void pit_init(struct domain *d) { PITState *pit = domain_vpit(d); diff --git a/xen/arch/x86/include/asm/e820.h b/xen/arch/x86/include/asm/e820.h index 92f5efa4f5..213d5b5dd2 100644 --- a/xen/arch/x86/include/asm/e820.h +++ b/xen/arch/x86/include/asm/e820.h @@ -31,7 +31,7 @@ extern int e820_change_range_type( uint32_t orig_type, uint32_t new_type); extern int e820_add_range( struct e820map *, uint64_t s, uint64_t e, uint32_t type); -extern unsigned long init_e820(const char *, struct e820map *); +extern unsigned long init_e820(const char *str, struct e820map *raw); extern void print_e820_memory_map(const struct e820entry *map, unsigned int entries); extern struct e820map e820; diff --git a/xen/arch/x86/include/asm/hvm/vpt.h b/xen/arch/x86/include/asm/hvm/vpt.h index 2af76ca8dc..feb0bf43f1 100644 --- a/xen/arch/x86/include/asm/hvm/vpt.h +++ b/xen/arch/x86/include/asm/hvm/vpt.h @@ -179,7 +179,7 @@ void destroy_periodic_time(struct periodic_time *pt); int pv_pit_handler(int port, int data, int write); void pit_reset(struct domain *d); -void pit_init(struct domain *d, unsigned long cpu_khz); +void pit_init(struct domain *d); void pit_stop_channel0_irq(PITState * pit); void pit_deinit(struct domain *d); void rtc_init(struct domain *d); diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index a1e0af27c5..90bcb25e60 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -1252,7 +1252,7 @@ static void cf_check do_write_psr_msrs(void *data) { const struct cos_write_info *info = data; unsigned int i, index, cos = info->cos; - const struct psr_socket_info *socket_info = + const struct psr_socket_info *sock_info = get_socket_info(cpu_to_socket(smp_processor_id())); /* @@ -1261,7 +1261,7 @@ static void cf_check do_write_psr_msrs(void *data) */ for ( index = i = 0; i < ARRAY_SIZE(feat_props); i++ ) { - struct feat_node *feat = socket_info->features[i]; + struct feat_node *feat = sock_info->features[i]; const struct feat_props *props = feat_props[i]; unsigned int cos_num, j; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 4229bda159..f11239fd0f 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -195,8 +195,7 @@ void show_code(const struct cpu_user_regs *regs) } static void compat_show_guest_stack(struct vcpu *v, - const struct cpu_user_regs *regs, - int debug_stack_lines) + const struct cpu_user_regs *regs) { unsigned int i, *stack, addr, mask = STACK_SIZE; void *stack_page = NULL; @@ -273,7 +272,7 @@ static void show_guest_stack(struct vcpu *v, const struct cpu_user_regs *regs) if ( is_pv_32bit_vcpu(v) ) { - compat_show_guest_stack(v, regs, debug_stack_lines); + compat_show_guest_stack(v, regs); return; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:16 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576747.903272 (Exim 4.92) (envelope-from ) id 1qRjOS-0001Rw-1m; Fri, 04 Aug 2023 01:14:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576747.903272; Fri, 04 Aug 2023 01:14:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOR-0001Rp-Ut; Fri, 04 Aug 2023 01:14:15 +0000 Received: by outflank-mailman (input) for mailman id 576747; Fri, 04 Aug 2023 01:14:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOQ-0001RS-G7 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOQ-0001pO-FR for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjOQ-0000pC-Ep for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lrBwpF3PGIzFiPP2mz4o0/RQUSCMwNL65S3wGdvYDzs=; b=ZUG+tXH3Kjcp6vP5IwhZg23mUC 8iHK1IqKMWZY6lkcKu8H7oM3chnPGWiaP1PoYY5AC4TaKvxc0RmVoOJ9PAbXdR4kmlu8H9YdyKZmH sFkeU7LZ7zyP9kK9D3qGa0nAr4WtN+UjKNTm8Xi2sbedfrO6PtcA4KV22u+Zm8d7ODYA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/spinlock: address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Fri, 04 Aug 2023 01:14:14 +0000 commit fe212797d729c32f48455bbc6b26e5c7bfe63d9c Author: Federico Serafini AuthorDate: Wed Aug 2 10:50:21 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:50:21 2023 +0200 xen/spinlock: address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Acked-by: Jan Beulich --- xen/include/xen/spinlock.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/include/xen/spinlock.h b/xen/include/xen/spinlock.h index 0a02a527dc..e7a1c1aa89 100644 --- a/xen/include/xen/spinlock.h +++ b/xen/include/xen/spinlock.h @@ -125,8 +125,9 @@ struct lock_profile_qhead { } while(0) void _lock_profile_register_struct( - int32_t, struct lock_profile_qhead *, int32_t); -void _lock_profile_deregister_struct(int32_t, struct lock_profile_qhead *); + int32_t type, struct lock_profile_qhead *qhead, int32_t idx); +void _lock_profile_deregister_struct(int32_t type, + struct lock_profile_qhead *qhead); #define lock_profile_register_struct(type, ptr, idx) \ _lock_profile_register_struct(type, &((ptr)->profile_head), idx) @@ -178,7 +179,7 @@ typedef struct spinlock { #define spin_lock_init(l) (*(l) = (spinlock_t)SPIN_LOCK_UNLOCKED) void _spin_lock(spinlock_t *lock); -void _spin_lock_cb(spinlock_t *lock, void (*cond)(void *), void *data); +void _spin_lock_cb(spinlock_t *lock, void (*cb)(void *), void *data); void _spin_lock_irq(spinlock_t *lock); unsigned long _spin_lock_irqsave(spinlock_t *lock); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576749.903276 (Exim 4.92) (envelope-from ) id 1qRjOc-0001Xm-2q; Fri, 04 Aug 2023 01:14:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576749.903276; Fri, 04 Aug 2023 01:14:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOc-0001Xd-0B; Fri, 04 Aug 2023 01:14:26 +0000 Received: by outflank-mailman (input) for mailman id 576749; Fri, 04 Aug 2023 01:14:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOa-0001XL-J6 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOa-0001pb-IL for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjOa-0000ph-HY for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bCctA1ZDKFxXeOeup0TJgQ39dteIj0TONmZWNzRd69M=; b=0J6aRguWg3ZAmQn1x1Po1zl+0F OiJ9YieLoSIsjWvK2ETsrLqUCHvNaiGc1qyMFgGJWSqq8Ytgc1Vjwufjg9f7x2Gz2XN9qDEiFWwqj c3OJolK4mBfpA8rwhBLsznO2M63v63AZvvlpxdMD/LqY1/FA/8cj1qzkV1AaNc+T/Sx0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] common: move simple_strto{,u}l{,l}() to lib/ Message-Id: Date: Fri, 04 Aug 2023 01:14:24 +0000 commit e35944f37b4d98a81c832f0c4c3ed03b304af6d2 Author: Jan Beulich AuthorDate: Wed Aug 2 10:51:39 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:51:39 2023 +0200 common: move simple_strto{,u}l{,l}() to lib/ Convert style from a Xen/Linux mix to pure Xen while doing the move. No other changes, despite having been heavily tempted to do some - at the very least to make simple_strtoul() and simple_strtoull() the same in how they deal with non-numeric digits. Requested-by: Shawn Anastasio Signed-off-by: Jan Beulich Reviewed-by: Shawn Anastasio --- xen/common/vsprintf.c | 102 -------------------------------------------------- xen/lib/Makefile | 4 ++ xen/lib/strtol.c | 28 ++++++++++++++ xen/lib/strtoll.c | 28 ++++++++++++++ xen/lib/strtoul.c | 61 ++++++++++++++++++++++++++++++ xen/lib/strtoull.c | 62 ++++++++++++++++++++++++++++++ 6 files changed, 183 insertions(+), 102 deletions(-) diff --git a/xen/common/vsprintf.c b/xen/common/vsprintf.c index b278961cc3..94c1ba7257 100644 --- a/xen/common/vsprintf.c +++ b/xen/common/vsprintf.c @@ -24,108 +24,6 @@ #include #include -/** - * simple_strtoul - convert a string to an unsigned long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -unsigned long simple_strtoul( - const char *cp, const char **endp, unsigned int base) -{ - unsigned long result = 0,value; - - if (!base) { - base = 10; - if (*cp == '0') { - base = 8; - cp++; - if ((toupper(*cp) == 'X') && isxdigit(cp[1])) { - cp++; - base = 16; - } - } - } else if (base == 16) { - if (cp[0] == '0' && toupper(cp[1]) == 'X') - cp += 2; - } - while (isxdigit(*cp) && - (value = isdigit(*cp) ? *cp-'0' : toupper(*cp)-'A'+10) < base) { - result = result*base + value; - cp++; - } - if (endp) - *endp = cp; - return result; -} - -EXPORT_SYMBOL(simple_strtoul); - -/** - * simple_strtol - convert a string to a signed long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -long simple_strtol(const char *cp, const char **endp, unsigned int base) -{ - if(*cp=='-') - return -simple_strtoul(cp+1,endp,base); - return simple_strtoul(cp,endp,base); -} - -EXPORT_SYMBOL(simple_strtol); - -/** - * simple_strtoull - convert a string to an unsigned long long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -unsigned long long simple_strtoull( - const char *cp, const char **endp, unsigned int base) -{ - unsigned long long result = 0,value; - - if (!base) { - base = 10; - if (*cp == '0') { - base = 8; - cp++; - if ((toupper(*cp) == 'X') && isxdigit(cp[1])) { - cp++; - base = 16; - } - } - } else if (base == 16) { - if (cp[0] == '0' && toupper(cp[1]) == 'X') - cp += 2; - } - while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) - ? toupper(*cp) : *cp)-'A'+10) < base) { - result = result*base + value; - cp++; - } - if (endp) - *endp = cp; - return result; -} - -EXPORT_SYMBOL(simple_strtoull); - -/** - * simple_strtoll - convert a string to a signed long long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -long long simple_strtoll(const char *cp,const char **endp,unsigned int base) -{ - if(*cp=='-') - return -simple_strtoull(cp+1,endp,base); - return simple_strtoull(cp,endp,base); -} - static int skip_atoi(const char **s) { int i=0; diff --git a/xen/lib/Makefile b/xen/lib/Makefile index b311ea739c..2d9ebb945f 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -28,6 +28,10 @@ lib-y += strrchr.o lib-y += strsep.o lib-y += strspn.o lib-y += strstr.o +lib-y += strtol.o +lib-y += strtoll.o +lib-y += strtoul.o +lib-y += strtoull.o lib-$(CONFIG_X86) += xxhash32.o lib-$(CONFIG_X86) += xxhash64.o diff --git a/xen/lib/strtol.c b/xen/lib/strtol.c new file mode 100644 index 0000000000..30dca779cf --- /dev/null +++ b/xen/lib/strtol.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 1991, 1992 Linus Torvalds + */ + +#include + +/** + * simple_strtol - convert a string to a signed long + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +long simple_strtol(const char *cp, const char **endp, unsigned int base) +{ + if ( *cp == '-' ) + return -simple_strtoul(cp + 1, endp, base); + return simple_strtoul(cp, endp, base); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/lib/strtoll.c b/xen/lib/strtoll.c new file mode 100644 index 0000000000..5d23fd80e8 --- /dev/null +++ b/xen/lib/strtoll.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 1991, 1992 Linus Torvalds + */ + +#include + +/** + * simple_strtoll - convert a string to a signed long long + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +long long simple_strtoll(const char *cp, const char **endp, unsigned int base) +{ + if ( *cp == '-' ) + return -simple_strtoull(cp + 1, endp, base); + return simple_strtoull(cp, endp, base); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/lib/strtoul.c b/xen/lib/strtoul.c new file mode 100644 index 0000000000..a378fe735e --- /dev/null +++ b/xen/lib/strtoul.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 1991, 1992 Linus Torvalds + */ + +#include +#include + +/** + * simple_strtoul - convert a string to an unsigned long + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +unsigned long simple_strtoul( + const char *cp, const char **endp, unsigned int base) +{ + unsigned long result = 0, value; + + if ( !base ) + { + base = 10; + if ( *cp == '0' ) + { + base = 8; + cp++; + if ( (toupper(*cp) == 'X') && isxdigit(cp[1]) ) + { + cp++; + base = 16; + } + } + } + else if ( base == 16 ) + { + if ( cp[0] == '0' && toupper(cp[1]) == 'X' ) + cp += 2; + } + + while ( isxdigit(*cp) && + (value = isdigit(*cp) ? *cp - '0' + : toupper(*cp) - 'A' + 10) < base ) + { + result = result * base + value; + cp++; + } + + if ( endp ) + *endp = cp; + + return result; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/lib/strtoull.c b/xen/lib/strtoull.c new file mode 100644 index 0000000000..ba6e0f53b3 --- /dev/null +++ b/xen/lib/strtoull.c @@ -0,0 +1,62 @@ +/* + * Copyright (C) 1991, 1992 Linus Torvalds + */ + +#include +#include + +/** + * simple_strtoull - convert a string to an unsigned long long + * @cp: The start of the string + * @endp: A pointer to the end of the parsed string will be placed here + * @base: The number base to use + */ +unsigned long long simple_strtoull( + const char *cp, const char **endp, unsigned int base) +{ + unsigned long long result = 0, value; + + if ( !base ) + { + base = 10; + if ( *cp == '0' ) + { + base = 8; + cp++; + if ( (toupper(*cp) == 'X') && isxdigit(cp[1]) ) + { + cp++; + base = 16; + } + } + } + else if ( base == 16 ) + { + if ( cp[0] == '0' && toupper(cp[1]) == 'X' ) + cp += 2; + } + + while ( isxdigit(*cp) && + (value = isdigit(*cp) ? *cp - '0' + : (islower(*cp) ? toupper(*cp) + : *cp) - 'A' + 10) < base ) + { + result = result * base + value; + cp++; + } + + if ( endp ) + *endp = cp; + + return result; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576751.903289 (Exim 4.92) (envelope-from ) id 1qRjOl-0001rG-F8; Fri, 04 Aug 2023 01:14:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576751.903289; Fri, 04 Aug 2023 01:14:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOl-0001r8-CD; Fri, 04 Aug 2023 01:14:35 +0000 Received: by outflank-mailman (input) for mailman id 576751; Fri, 04 Aug 2023 01:14:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOk-0001qT-Lz for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOk-0001py-LL for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjOk-0000qN-Kd for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JF0uXWt+FNaYBvfUtajSSxeExaeCgnZO29Xti9QnVMI=; b=dZe+hQVMVzTzQcjfvY5SLAm8sL frSaleCHfBfSYKdYvSB3R3PhdXZjJvjteT0CekeTsGDlkjNiFCOiVPU5EoXYeIv8317kDBZjdco8+ StxAFWRs2nAUgZJpYOmttmlhShq9ZV9YQMP+mY7eBgVfNHzVz2nrWZ0it6J4QZCDiMSQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/common: address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:14:34 +0000 commit 8d75d8069b8760d1a8d241f3581a1a1569b9aacf Author: Nicola Vetrini AuthorDate: Wed Aug 2 10:52:17 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:52:17 2023 +0200 xen/common: address MISRA C:2012 Rule 5.3 The following strategies are adopted to deal with violations of MISRA C:2012 Rule 5.3: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope". - s/nodes/numa_nodes/ for the file-scope variable in 'common/numa.c'; - move the variable 'struct compat_remove_from_physmap cmp' inside the outer union variable 'cmp' to avoid shadowing it. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/common/compat/memory.c | 7 +++---- xen/common/numa.c | 20 ++++++++++---------- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/xen/common/compat/memory.c b/xen/common/compat/memory.c index 8ca63ceda6..8c34f201c2 100644 --- a/xen/common/compat/memory.c +++ b/xen/common/compat/memory.c @@ -81,6 +81,7 @@ int compat_memory_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) compat) struct compat_memory_exchange xchg; struct compat_add_to_physmap atp; struct compat_add_to_physmap_batch atpb; + struct compat_remove_from_physmap xrfp; struct compat_vnuma_topology_info vnuma; struct compat_mem_access_op mao; struct compat_mem_acquire_resource mar; @@ -321,12 +322,10 @@ int compat_memory_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) compat) case XENMEM_remove_from_physmap: { - struct compat_remove_from_physmap cmp; - - if ( copy_from_guest(&cmp, compat, 1) ) + if ( copy_from_guest(&cmp.xrfp, compat, 1) ) return -EFAULT; - XLAT_remove_from_physmap(nat.xrfp, &cmp); + XLAT_remove_from_physmap(nat.xrfp, &cmp.xrfp); break; } diff --git a/xen/common/numa.c b/xen/common/numa.c index fc1f7f665b..f454c4d894 100644 --- a/xen/common/numa.c +++ b/xen/common/numa.c @@ -15,7 +15,7 @@ static nodemask_t __initdata processor_nodes_parsed; static nodemask_t __initdata memory_nodes_parsed; -static struct node __initdata nodes[MAX_NUMNODES]; +static struct node __initdata numa_nodes[MAX_NUMNODES]; static unsigned int __ro_after_init num_node_memblks; static struct node __ro_after_init node_memblk_range[NR_NODE_MEMBLKS]; @@ -117,7 +117,7 @@ static enum conflicts __init conflicting_memblks( static void __init cutoff_node(nodeid_t i, paddr_t start, paddr_t end) { - struct node *nd = &nodes[i]; + struct node *nd = &numa_nodes[i]; if ( nd->start < start ) { @@ -157,7 +157,7 @@ bool __init numa_update_node_memblks(nodeid_t node, unsigned int arch_nid, paddr_t end = start + size; paddr_t nd_start = start; paddr_t nd_end = end; - struct node *nd = &nodes[node]; + struct node *nd = &numa_nodes[node]; /* * For the node that already has some memory blocks, we will @@ -292,17 +292,17 @@ static bool __init nodes_cover_memory(void) do { found = false; for_each_node_mask ( j, memory_nodes_parsed ) - if ( start < nodes[j].end && end > nodes[j].start ) + if ( start < numa_nodes[j].end && end > numa_nodes[j].start ) { - if ( start >= nodes[j].start ) + if ( start >= numa_nodes[j].start ) { - start = nodes[j].end; + start = numa_nodes[j].end; found = true; } - if ( end <= nodes[j].end ) + if ( end <= numa_nodes[j].end ) { - end = nodes[j].start; + end = numa_nodes[j].start; found = true; } } @@ -356,10 +356,10 @@ static bool __init numa_process_nodes(paddr_t start, paddr_t end) /* Finally register nodes */ for_each_node_mask ( i, all_nodes_parsed ) { - if ( nodes[i].end == nodes[i].start ) + if ( numa_nodes[i].end == numa_nodes[i].start ) printk(KERN_INFO "NUMA: node %u has no memory\n", i); - setup_node_bootmem(i, nodes[i].start, nodes[i].end); + setup_node_bootmem(i, numa_nodes[i].start, numa_nodes[i].end); } for ( i = 0; i < nr_cpu_ids; i++ ) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576753.903294 (Exim 4.92) (envelope-from ) id 1qRjOv-00021L-HF; Fri, 04 Aug 2023 01:14:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576753.903294; Fri, 04 Aug 2023 01:14:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOv-00021D-Dk; Fri, 04 Aug 2023 01:14:45 +0000 Received: by outflank-mailman (input) for mailman id 576753; Fri, 04 Aug 2023 01:14:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjOu-000210-Px for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] drivers/char: address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:14:44 +0000 commit b3f817a6c578f4ad98908eb17c45711d30631ffc Author: Nicola Vetrini AuthorDate: Wed Aug 2 10:52:44 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:52:44 2023 +0200 drivers/char: address MISRA C:2012 Rule 5.3 The following strategies are adopted to deal with violations of MISRA C:2012 Rule 5.3: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope". Local variable 'ctrl' shadows a variable defined in an outer scope. Since the innermost variable is used only once after being set, it is safe to remove it entirely. The enum constant 'baud' is shadowed by local a local variable at line 1476, and renaming the enum constant avoid such conflicts. Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/drivers/char/ehci-dbgp.c | 4 +--- xen/drivers/char/ns16550.c | 6 +++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c index 4d8d765122..72be4d9cc9 100644 --- a/xen/drivers/char/ehci-dbgp.c +++ b/xen/drivers/char/ehci-dbgp.c @@ -424,9 +424,7 @@ static void dbgp_issue_command(struct ehci_dbgp *dbgp, u32 ctrl, * checks to see if ACPI or some other initialization also * reset the EHCI debug port. */ - u32 ctrl = readl(&dbgp->ehci_debug->control); - - if ( ctrl & DBGP_ENABLED ) + if ( readl(&dbgp->ehci_debug->control) & DBGP_ENABLED ) { cmd |= CMD_RUN; writel(cmd, &dbgp->ehci_regs->command); diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 212a9c49ae..b75e7f8fa0 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1388,7 +1388,7 @@ string_param("com1", opt_com1); string_param("com2", opt_com2); enum serial_param_type { - baud, + baud_rate, clock_hz, data_bits, io_base, @@ -1416,7 +1416,7 @@ struct serial_param_var { * com_console_options for serial port com1 and com2. */ static const struct serial_param_var __initconst sp_vars[] = { - {"baud", baud}, + {"baud", baud_rate}, {"clock-hz", clock_hz}, {"data-bits", data_bits}, {"io-base", io_base}, @@ -1596,7 +1596,7 @@ static bool __init parse_namevalue_pairs(char *str, struct ns16550 *uart) switch ( get_token(token, ¶m_value) ) { - case baud: + case baud_rate: uart->baud = simple_strtoul(param_value, NULL, 0); break; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:14:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:14:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576756.903298 (Exim 4.92) (envelope-from ) id 1qRjP5-0002EI-Hv; Fri, 04 Aug 2023 01:14:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576756.903298; Fri, 04 Aug 2023 01:14:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjP5-0002EA-FB; Fri, 04 Aug 2023 01:14:55 +0000 Received: by outflank-mailman (input) for mailman id 576756; Fri, 04 Aug 2023 01:14:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjP4-0002Du-T3 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjP4-0001qK-SD for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjP4-0000rp-RV for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:14:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sm6Zaj+Q/Y2nlyw6RmThmg+9ilFHAw8KMItEKQ1T8jg=; b=jokbBYXAd/2GbhGfaAGGqKRXv+ +M90uhMCtSqmpn1YMlgudS6BmkJy4WbIZmzP2Vv5awhBsmSyTb0pUXuh4otDB+P51jbxmb/dYP0yk w/xXbtXUq5GtoZkZYwPKBtpGoy/t9LXE3gyDo9i7uuUX/idTJfIIo4uT5N4hl7KE/aP0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm/efi: address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 04 Aug 2023 01:14:54 +0000 commit c6dc0ee76df419a0ee8bff0544603c5c47b481f5 Author: Nicola Vetrini AuthorDate: Wed Aug 2 10:53:12 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:53:12 2023 +0200 arm/efi: address MISRA C:2012 Rule 5.3 Rule 5.3 has the following headline: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" The file-scope variable 'fdt' is shadowed by function parameters, and thus violates the rule, hence it's renamed to 'fdt_efi' No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/arm/efi/efi-boot.h | 84 ++++++++++++++++++++++----------------------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h index 6126a71400..f24df2abb9 100644 --- a/xen/arch/arm/efi/efi-boot.h +++ b/xen/arch/arm/efi/efi-boot.h @@ -49,7 +49,7 @@ static void PrintMessage(const CHAR16 *s); {0xb1b621d5U, 0xf19c, 0x41a5, {0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0}} static struct file __initdata dtbfile; -static void __initdata *fdt; +static void __initdata *fdt_efi; static void __initdata *memmap; static int __init setup_chosen_node(void *fdt, int *addr_cells, int *size_cells) @@ -383,7 +383,7 @@ static void __init efi_arch_process_memory_map(EFI_SYSTEM_TABLE *SystemTable, if ( EFI_ERROR(status) ) blexit(L"EFI memory map processing failed"); - status = fdt_add_uefi_nodes(SystemTable, fdt, map, map_size, desc_size, + status = fdt_add_uefi_nodes(SystemTable, fdt_efi, map, map_size, desc_size, desc_ver); if ( EFI_ERROR(status) ) PrintErrMesg(L"Updating FDT failed", status); @@ -395,7 +395,7 @@ static void __init efi_arch_pre_exit_boot(void) static void __init noreturn efi_arch_post_exit_boot(void) { - efi_xen_start(fdt, fdt_totalsize(fdt)); + efi_xen_start(fdt_efi, fdt_totalsize(fdt_efi)); } static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, @@ -420,8 +420,8 @@ static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, efi_bs->FreePool(name.w); } } - fdt = fdt_increase_size(&dtbfile, cfg.size + EFI_PAGE_SIZE); - if ( !fdt ) + fdt_efi = fdt_increase_size(&dtbfile, cfg.size + EFI_PAGE_SIZE); + if ( !fdt_efi ) blexit(L"Unable to create new FDT"); } @@ -465,7 +465,7 @@ static void __init efi_arch_handle_cmdline(CHAR16 *image_name, int chosen; /* locate chosen node, which is where we add Xen module info. */ - chosen = fdt_subnode_offset(fdt, 0, "chosen"); + chosen = fdt_subnode_offset(fdt_efi, 0, "chosen"); if ( chosen < 0 ) blexit(L"Unable to find chosen node"); @@ -498,7 +498,7 @@ static void __init efi_arch_handle_cmdline(CHAR16 *image_name, else { /* Get xen,xen-bootargs in /chosen if it is specified */ - const char *dt_bootargs_prop = fdt_getprop(fdt, chosen, + const char *dt_bootargs_prop = fdt_getprop(fdt_efi, chosen, "xen,xen-bootargs", NULL); if ( dt_bootargs_prop ) { @@ -526,7 +526,7 @@ static void __init efi_arch_handle_cmdline(CHAR16 *image_name, blexit(L"FDT string overflow"); } - if ( fdt_setprop_string(fdt, chosen, "xen,xen-bootargs", buf) < 0 ) + if ( fdt_setprop_string(fdt_efi, chosen, "xen,xen-bootargs", buf) < 0 ) blexit(L"Unable to set xen,xen-bootargs property."); efi_bs->FreePool(buf); @@ -542,7 +542,7 @@ static void __init efi_arch_handle_module(const struct file *file, if ( file == &dtbfile ) return; - chosen = setup_chosen_node(fdt, &addr_len, &size_len); + chosen = setup_chosen_node(fdt_efi, &addr_len, &size_len); if ( chosen < 0 ) blexit(L"Unable to setup chosen node"); @@ -551,13 +551,13 @@ static void __init efi_arch_handle_module(const struct file *file, static const char __initconst ramdisk_compat[] = "multiboot,ramdisk\0" "multiboot,module"; - node = fdt_add_subnode(fdt, chosen, "ramdisk"); + node = fdt_add_subnode(fdt_efi, chosen, "ramdisk"); if ( node < 0 ) blexit(L"Unable to add ramdisk FDT node."); - if ( fdt_setprop(fdt, node, "compatible", ramdisk_compat, + if ( fdt_setprop(fdt_efi, node, "compatible", ramdisk_compat, sizeof(ramdisk_compat)) < 0 ) blexit(L"Unable to set compatible property."); - if ( fdt_set_reg(fdt, node, addr_len, size_len, ramdisk.addr, + if ( fdt_set_reg(fdt_efi, node, addr_len, size_len, ramdisk.addr, ramdisk.size) < 0 ) blexit(L"Unable to set reg property."); } @@ -566,13 +566,13 @@ static void __init efi_arch_handle_module(const struct file *file, static const char __initconst xsm_compat[] = "xen,xsm-policy\0" "multiboot,module"; - node = fdt_add_subnode(fdt, chosen, "xsm"); + node = fdt_add_subnode(fdt_efi, chosen, "xsm"); if ( node < 0 ) blexit(L"Unable to add xsm FDT node."); - if ( fdt_setprop(fdt, node, "compatible", xsm_compat, + if ( fdt_setprop(fdt_efi, node, "compatible", xsm_compat, sizeof(xsm_compat)) < 0 ) blexit(L"Unable to set compatible property."); - if ( fdt_set_reg(fdt, node, addr_len, size_len, xsm.addr, + if ( fdt_set_reg(fdt_efi, node, addr_len, size_len, xsm.addr, xsm.size) < 0 ) blexit(L"Unable to set reg property."); } @@ -581,15 +581,15 @@ static void __init efi_arch_handle_module(const struct file *file, static const char __initconst kernel_compat[] = "multiboot,kernel\0" "multiboot,module"; - node = fdt_add_subnode(fdt, chosen, "kernel"); + node = fdt_add_subnode(fdt_efi, chosen, "kernel"); if ( node < 0 ) blexit(L"Unable to add dom0 FDT node."); - if ( fdt_setprop(fdt, node, "compatible", kernel_compat, + if ( fdt_setprop(fdt_efi, node, "compatible", kernel_compat, sizeof(kernel_compat)) < 0 ) blexit(L"Unable to set compatible property."); - if ( options && fdt_setprop_string(fdt, node, "bootargs", options) < 0 ) + if ( options && fdt_setprop_string(fdt_efi, node, "bootargs", options) < 0 ) blexit(L"Unable to set bootargs property."); - if ( fdt_set_reg(fdt, node, addr_len, size_len, kernel.addr, + if ( fdt_set_reg(fdt_efi, node, addr_len, size_len, kernel.addr, kernel.size) < 0 ) blexit(L"Unable to set reg property."); } @@ -719,7 +719,7 @@ static int __init handle_module_node(const EFI_LOADED_IMAGE *loaded_image, module_info *file; /* Check if the node is a multiboot,module otherwise return */ - module_compat = fdt_node_check_compatible(fdt, module_node_offset, + module_compat = fdt_node_check_compatible(fdt_efi, module_node_offset, "multiboot,module"); if ( module_compat < 0 ) /* Error while checking the compatible string */ @@ -730,7 +730,7 @@ static int __init handle_module_node(const EFI_LOADED_IMAGE *loaded_image, return 0; /* Read xen,uefi-binary property to get the file name. */ - uefi_name_prop = fdt_getprop(fdt, module_node_offset, "xen,uefi-binary", + uefi_name_prop = fdt_getprop(fdt_efi, module_node_offset, "xen,uefi-binary", &uefi_name_len); if ( !uefi_name_prop ) @@ -751,13 +751,13 @@ static int __init handle_module_node(const EFI_LOADED_IMAGE *loaded_image, snprintf(mod_string, sizeof(mod_string), "module@%"PRIx64, file->addr); /* Rename the module to be module@{address} */ - if ( fdt_set_name(fdt, module_node_offset, mod_string) < 0 ) + if ( fdt_set_name(fdt_efi, module_node_offset, mod_string) < 0 ) { PrintMessage(L"Unable to modify module node name."); return ERROR_RENAME_MODULE_NAME; } - if ( fdt_set_reg(fdt, module_node_offset, reg_addr_cells, reg_size_cells, + if ( fdt_set_reg(fdt_efi, module_node_offset, reg_addr_cells, reg_size_cells, file->addr, file->size) < 0 ) { PrintMessage(L"Unable to set module reg property."); @@ -766,7 +766,7 @@ static int __init handle_module_node(const EFI_LOADED_IMAGE *loaded_image, if ( !is_domu_module ) { - if ( (fdt_node_check_compatible(fdt, module_node_offset, + if ( (fdt_node_check_compatible(fdt_efi, module_node_offset, "multiboot,kernel") == 0) ) { /* @@ -784,14 +784,14 @@ static int __init handle_module_node(const EFI_LOADED_IMAGE *loaded_image, kernel.size = file->size; } else if ( ramdisk.addr && - (fdt_node_check_compatible(fdt, module_node_offset, + (fdt_node_check_compatible(fdt_efi, module_node_offset, "multiboot,ramdisk") == 0) ) { PrintMessage(L"Dom0 ramdisk already found in cfg file."); return ERROR_DOM0_RAMDISK_FOUND; } else if ( xsm.addr && - (fdt_node_check_compatible(fdt, module_node_offset, + (fdt_node_check_compatible(fdt_efi, module_node_offset, "xen,xsm-policy") == 0) ) { PrintMessage(L"XSM policy already found in cfg file."); @@ -816,7 +816,7 @@ static int __init handle_dom0less_domain_node(const EFI_LOADED_IMAGE *loaded_ima unsigned int mb_modules_found = 0; /* Get #address-cells and #size-cells from domain node */ - prop = fdt_get_property(fdt, domain_node, "#address-cells", &len); + prop = fdt_get_property(fdt_efi, domain_node, "#address-cells", &len); if ( !prop ) { PrintMessage(L"#address-cells not found in domain node."); @@ -825,7 +825,7 @@ static int __init handle_dom0less_domain_node(const EFI_LOADED_IMAGE *loaded_ima addr_cells = fdt32_to_cpu(*((uint32_t *)prop->data)); - prop = fdt_get_property(fdt, domain_node, "#size-cells", &len); + prop = fdt_get_property(fdt_efi, domain_node, "#size-cells", &len); if ( !prop ) { PrintMessage(L"#size-cells not found in domain node."); @@ -835,9 +835,9 @@ static int __init handle_dom0less_domain_node(const EFI_LOADED_IMAGE *loaded_ima size_cells = fdt32_to_cpu(*((uint32_t *)prop->data)); /* Check for nodes compatible with multiboot,module inside this node */ - for ( module_node = fdt_first_subnode(fdt, domain_node); + for ( module_node = fdt_first_subnode(fdt_efi, domain_node); module_node > 0; - module_node = fdt_next_subnode(fdt, module_node) ) + module_node = fdt_next_subnode(fdt_efi, module_node) ) { int ret = handle_module_node(loaded_image, dir_handle, module_node, addr_cells, size_cells, true); @@ -862,7 +862,7 @@ static int __init efi_check_dt_boot(const EFI_LOADED_IMAGE *loaded_image) EFI_FILE_HANDLE dir_handle = NULL; /* Check for the chosen node in the current DTB */ - chosen = setup_chosen_node(fdt, &addr_len, &size_len); + chosen = setup_chosen_node(fdt_efi, &addr_len, &size_len); if ( chosen < 0 ) { PrintMessage(L"Unable to setup chosen node"); @@ -870,13 +870,13 @@ static int __init efi_check_dt_boot(const EFI_LOADED_IMAGE *loaded_image) } /* Check for nodes compatible with xen,domain under the chosen node */ - for ( node = fdt_first_subnode(fdt, chosen); + for ( node = fdt_first_subnode(fdt_efi, chosen); node > 0; - node = fdt_next_subnode(fdt, node) ) + node = fdt_next_subnode(fdt_efi, node) ) { int ret; - if ( !fdt_node_check_compatible(fdt, node, "xen,domain") ) + if ( !fdt_node_check_compatible(fdt_efi, node, "xen,domain") ) { /* Found a node with compatible xen,domain; handle this node. */ ret = handle_dom0less_domain_node(loaded_image, &dir_handle, node); @@ -951,29 +951,29 @@ static bool __init efi_arch_use_config_file(EFI_SYSTEM_TABLE *SystemTable) * node to decide whether to skip the UEFI Xen configuration file or not. */ - fdt = lookup_fdt_config_table(SystemTable); - dtbfile.ptr = fdt; + fdt_efi = lookup_fdt_config_table(SystemTable); + dtbfile.ptr = fdt_efi; dtbfile.need_to_free = false; /* Config table memory can't be freed. */ - if ( fdt && - (fdt_node_offset_by_compatible(fdt, 0, "multiboot,module") > 0) ) + if ( fdt_efi && + (fdt_node_offset_by_compatible(fdt_efi, 0, "multiboot,module") > 0) ) { /* Locate chosen node */ - int node = fdt_subnode_offset(fdt, 0, "chosen"); + int node = fdt_subnode_offset(fdt_efi, 0, "chosen"); const void *cfg_load_prop; int cfg_load_len; if ( node > 0 ) { /* Check if xen,uefi-cfg-load property exists */ - cfg_load_prop = fdt_getprop(fdt, node, "xen,uefi-cfg-load", + cfg_load_prop = fdt_getprop(fdt_efi, node, "xen,uefi-cfg-load", &cfg_load_len); if ( !cfg_load_prop ) load_cfg_file = false; } } - if ( !fdt || load_cfg_file ) + if ( !fdt_efi || load_cfg_file ) { /* * We either have no FDT, or one without modules, so we must have a @@ -983,7 +983,7 @@ static bool __init efi_arch_use_config_file(EFI_SYSTEM_TABLE *SystemTable) } PrintStr(L"Using modules provided by bootloader in FDT\r\n"); /* We have modules already defined in fdt, just add space. */ - fdt = fdt_increase_size(&dtbfile, EFI_PAGE_SIZE); + fdt_efi = fdt_increase_size(&dtbfile, EFI_PAGE_SIZE); return false; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 01:15:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 01:15:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576758.903302 (Exim 4.92) (envelope-from ) id 1qRjPF-0002K2-Kn; Fri, 04 Aug 2023 01:15:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576758.903302; Fri, 04 Aug 2023 01:15:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjPF-0002Ju-IJ; Fri, 04 Aug 2023 01:15:05 +0000 Received: by outflank-mailman (input) for mailman id 576758; Fri, 04 Aug 2023 01:15:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjPE-0002Jn-Vu for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:15:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRjPE-0001rB-VD for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:15:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRjPE-0000sV-UT for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 01:15:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZpV+w7EjwHFOKi9qjiikVL3sSyP3owh1xBebN/mw15o=; b=n0KzGx6I1ruZy2xVfSIOLcB6YF F4EdibjWO5D9fMCu4mTfUFga2p6cyc9AQVCERyjZOgQ+fgLxmNYYhAs5LlF4IMy/yXVQ3BMbKf7Lu v6wv/92AUUQ6o9LzUu/4lYttuEA7AP+9oABPBv+8JlE9uTNgOivywQtWDfTRfVWhhwYM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/ppc: Switch to medium PIC code model Message-Id: Date: Fri, 04 Aug 2023 01:15:04 +0000 commit 51588938e0cd0e02dbc1d6d8c697c577135ff666 Author: Shawn Anastasio AuthorDate: Wed Aug 2 10:53:46 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 2 10:53:46 2023 +0200 xen/ppc: Switch to medium PIC code model Switch Xen to the medium PIC code model on Power. Among other things, this allows us to be load address agnostic and will open the door to booting on bare metal PowerNV systems that don't use OpenFirmware. Also update XEN_VIRT_START to 0xc000000000000000, which is equivalent to address 0x0 when the MMU is off. This prevents Open Firmware from loading Xen at an offset from its base load address, so the DECL_SECTION hack in xen.lds.S is no longer required. Signed-off-by: Shawn Anastasio Acked-by: Jan Beulich --- xen/arch/ppc/arch.mk | 2 +- xen/arch/ppc/include/asm/asm-defns.h | 7 ++++++ xen/arch/ppc/include/asm/config.h | 2 +- xen/arch/ppc/ppc64/head.S | 12 ++++++---- xen/arch/ppc/xen.lds.S | 44 +++++++++++++----------------------- 5 files changed, 33 insertions(+), 34 deletions(-) diff --git a/xen/arch/ppc/arch.mk b/xen/arch/ppc/arch.mk index 7eec22c283..0183b9ac6a 100644 --- a/xen/arch/ppc/arch.mk +++ b/xen/arch/ppc/arch.mk @@ -5,7 +5,7 @@ ppc-march-$(CONFIG_POWER_ISA_2_07B) := power8 ppc-march-$(CONFIG_POWER_ISA_3_00) := power9 CFLAGS += -m64 -mlittle-endian -mcpu=$(ppc-march-y) -CFLAGS += -mstrict-align -mcmodel=large -mabi=elfv2 -mno-altivec -mno-vsx +CFLAGS += -mstrict-align -mcmodel=medium -mabi=elfv2 -fPIC -mno-altivec -mno-vsx -msoft-float LDFLAGS += -m elf64lppc diff --git a/xen/arch/ppc/include/asm/asm-defns.h b/xen/arch/ppc/include/asm/asm-defns.h index 35b1c89d4e..62da88b32a 100644 --- a/xen/arch/ppc/include/asm/asm-defns.h +++ b/xen/arch/ppc/include/asm/asm-defns.h @@ -16,6 +16,13 @@ lis reg, (val) @h; \ ori reg, reg, (val) @l; \ +/* + * Load the address of a symbol from the TOC into the specified GPR. + */ +#define LOAD_REG_ADDR(reg,name) \ + addis reg, %r2, name@toc@ha; \ + addi reg, reg, name@toc@l + /* * Depending on how we were booted, the CPU could be running in either * Little Endian or Big Endian mode. The following trampoline from Linux diff --git a/xen/arch/ppc/include/asm/config.h b/xen/arch/ppc/include/asm/config.h index cb27d2781e..d060f0dca7 100644 --- a/xen/arch/ppc/include/asm/config.h +++ b/xen/arch/ppc/include/asm/config.h @@ -39,7 +39,7 @@ name: #endif -#define XEN_VIRT_START _AT(UL, 0x400000) +#define XEN_VIRT_START _AT(UL, 0xc000000000000000) #define SMP_CACHE_BYTES (1 << 6) diff --git a/xen/arch/ppc/ppc64/head.S b/xen/arch/ppc/ppc64/head.S index 02ff520458..8f1e5d3ad2 100644 --- a/xen/arch/ppc/ppc64/head.S +++ b/xen/arch/ppc/ppc64/head.S @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include +#include .section .text.header, "ax", %progbits @@ -11,16 +12,19 @@ ENTRY(start) FIXUP_ENDIAN /* set up the TOC pointer */ - LOAD_IMM32(%r2, .TOC.) + bcl 20, 31, 1f +1: mflr %r12 + addis %r2, %r12, .TOC.-1b@ha + addi %r2, %r2, .TOC.-1b@l /* set up the initial stack */ - LOAD_IMM32(%r1, cpu0_boot_stack) + LOAD_REG_ADDR(%r1, cpu0_boot_stack) li %r11, 0 stdu %r11, -STACK_FRAME_OVERHEAD(%r1) /* clear .bss */ - LOAD_IMM32(%r14, __bss_start) - LOAD_IMM32(%r15, __bss_end) + LOAD_REG_ADDR(%r14, __bss_start) + LOAD_REG_ADDR(%r15, __bss_end) 1: std %r11, 0(%r14) addi %r14, %r14, 8 diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index c628cc0e5c..2fa81d5a83 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -15,25 +15,12 @@ PHDRS #endif } -/** - * OpenFirmware's base load address is 0x400000 (XEN_VIRT_START). - * By defining sections this way, we can keep our virtual address base at 0x400000 - * while keeping the physical base at 0x0. - * - * Otherwise, OpenFirmware incorrectly loads .text at 0x400000 + 0x400000 = 0x800000. - * Taken from x86/xen.lds.S - */ -#ifdef CONFIG_LD_IS_GNU -# define DECL_SECTION(x) x : AT(ADDR(#x) - XEN_VIRT_START) -#else -# define DECL_SECTION(x) x : AT(ADDR(x) - XEN_VIRT_START) -#endif - SECTIONS { . = XEN_VIRT_START; + _start = .; - DECL_SECTION(.text) { + .text : { _stext = .; /* Text section */ *(.text.header) @@ -52,7 +39,7 @@ SECTIONS } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.rodata) { + .rodata : { _srodata = .; /* Read-only data */ *(.rodata) *(.rodata.*) @@ -67,7 +54,7 @@ SECTIONS #if defined(BUILD_ID) . = ALIGN(4); - DECL_SECTION(.note.gnu.build-id) { + .note.gnu.build-id : { __note_gnu_build_id_start = .; *(.note.gnu.build-id) __note_gnu_build_id_end = .; @@ -76,19 +63,19 @@ SECTIONS _erodata = .; /* End of read-only data */ . = ALIGN(PAGE_SIZE); - DECL_SECTION(.data.ro_after_init) { + .data.ro_after_init : { __ro_after_init_start = .; *(.data.ro_after_init) . = ALIGN(PAGE_SIZE); __ro_after_init_end = .; - } : text + } :text - DECL_SECTION(.data.read_mostly) { + .data.read_mostly : { *(.data.read_mostly) } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.data) { /* Data */ + .data : { /* Data */ *(.data.page_aligned) . = ALIGN(8); __start_schedulers_array = .; @@ -103,7 +90,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); /* Init code and data */ __init_begin = .; - DECL_SECTION(.init.text) { + .init.text : { _sinittext = .; *(.init.text) _einittext = .; @@ -111,7 +98,7 @@ SECTIONS } :text . = ALIGN(PAGE_SIZE); - DECL_SECTION(.init.data) { + .init.data : { *(.init.rodata) *(.init.rodata.*) @@ -140,18 +127,18 @@ SECTIONS __ctors_end = .; } :text - DECL_SECTION(.got) { - *(.got) + .got : { + *(.got .toc) } :text - DECL_SECTION(.got.plt) { + .got.plt : { *(.got.plt) } :text . = ALIGN(POINTER_ALIGN); __init_end = .; - DECL_SECTION(.bss) { /* BSS */ + .bss : { /* BSS */ __bss_start = .; *(.bss.stack_aligned) *(.bss.page_aligned) @@ -167,10 +154,11 @@ SECTIONS . = ALIGN(POINTER_ALIGN); __bss_end = .; } :text + _end = . ; /* Section for the device tree blob (if any). */ - DECL_SECTION(.dtb) { *(.dtb) } :text + .dtb : { *(.dtb) } :text DWARF2_DEBUG_SECTIONS -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 02:33:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 02:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576771.903326 (Exim 4.92) (envelope-from ) id 1qRkch-0003Oo-Gt; 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Fri, 04 Aug 2023 02:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=V4ddscj7QU8hQz39BwILqlcXvd5QzdbFRzpWXLwN2x8=; b=gbaHegfGzgM/Hcsri+q5CYBfWK 01rYTA0E9lXfEKSkzGbMrYhuy/PcduobjVow1rsWQ3MPX1eJifwriqnChQYZKp3E6xWZiRTVxGADE 8DtE+0bpi19QbIJhvs0brL+4RL8KyvoAe7NKHgryW6ojLEISpQ/J9SQ701Iv3azdRGwE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: fix early boot output Message-Id: Date: Fri, 04 Aug 2023 02:33:02 +0000 commit 6ede73cab9ec9cf1ad0be0224279b645b84d1a9a Author: Jan Beulich AuthorDate: Thu Aug 3 16:32:28 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:32:28 2023 +0200 x86: fix early boot output Loading the VGA base address involves sym_esi(), i.e. %esi still needs to hold the relocation base address. Therefore the address of the message to output cannot be "passed" in %esi. Put the message offset in %ecx instead, adding it into %esi _after_ its last use as base address. Fixes: b28044226e1c ("x86: make Xen early boot code relocatable") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper master commit: b1c16800e52743d9afd9af62c810f03af16dd942 master date: 2023-07-19 10:22:56 +0200 --- xen/arch/x86/boot/head.S | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index dd1bea0d10..e1b05a2557 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -141,21 +141,21 @@ efi_platform: .section .init.text, "ax", @progbits bad_cpu: - add $sym_offs(.Lbad_cpu_msg),%esi # Error message + mov $sym_offs(.Lbad_cpu_msg), %ecx jmp .Lget_vtb not_multiboot: - add $sym_offs(.Lbad_ldr_msg),%esi # Error message + mov $sym_offs(.Lbad_ldr_msg), %ecx jmp .Lget_vtb .Lmb2_no_st: /* * Here we are on EFI platform. vga_text_buffer was zapped earlier * because there is pretty good chance that VGA is unavailable. */ - add $sym_offs(.Lbad_ldr_nst),%esi # Error message + mov $sym_offs(.Lbad_ldr_nst), %ecx jmp .Lget_vtb .Lmb2_no_ih: /* Ditto. */ - add $sym_offs(.Lbad_ldr_nih),%esi # Error message + mov $sym_offs(.Lbad_ldr_nih), %ecx jmp .Lget_vtb .Lmb2_no_bs: /* @@ -163,7 +163,7 @@ not_multiboot: * via start label. Then reliable vga_text_buffer zap is impossible * in Multiboot2 scanning loop and we have to zero %edi below. */ - add $sym_offs(.Lbad_ldr_nbs),%esi # Error message + mov $sym_offs(.Lbad_ldr_nbs), %ecx xor %edi,%edi # No VGA text buffer jmp .Lprint_err .Lmb2_efi_ia_32: @@ -171,12 +171,15 @@ not_multiboot: * Here we are on EFI IA-32 platform. Then reliable vga_text_buffer zap is * impossible in Multiboot2 scanning loop and we have to zero %edi below. */ - add $sym_offs(.Lbad_efi_msg),%esi # Error message + mov $sym_offs(.Lbad_efi_msg), %ecx xor %edi,%edi # No VGA text buffer jmp .Lprint_err .Lget_vtb: mov sym_esi(vga_text_buffer),%edi .Lprint_err: + add %ecx, %esi # Add string offset to relocation base. + # NOTE: No further use of sym_esi() till the end of the "function"! +1: lodsb test %al,%al # Terminate on '\0' sentinel je .Lhalt @@ -189,11 +192,11 @@ not_multiboot: mov %bl,%al out %al,%dx # Send a character over the serial line test %edi,%edi # Is the VGA text buffer available? - jz .Lprint_err + jz 1b stosb # Write a character to the VGA text buffer mov $7,%al stosb # Write an attribute to the VGA text buffer - jmp .Lprint_err + jmp 1b .Lhalt: hlt jmp .Lhalt -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 02:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 02:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576772.903330 (Exim 4.92) (envelope-from ) id 1qRkcr-0003QW-I3; Fri, 04 Aug 2023 02:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576772.903330; Fri, 04 Aug 2023 02:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkcr-0003QO-FP; Fri, 04 Aug 2023 02:33:13 +0000 Received: by outflank-mailman (input) for mailman id 576772; Fri, 04 Aug 2023 02:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkcq-0003QE-Ks for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkcq-00045V-IG for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRkcq-0004MT-FK for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fW39dE1tnfWkNsZfNanlizLvO1XzxpQ99MnsUE2OI+4=; b=l8kZ4kz6Nlt/dODnJSu5Y7bGxb rz4VtEZ0Z4rwbzT8bGA7C4EfkPDT0v87pfeSXtzglQGDFZRJ9qTqVoA6PeRrafgzGCT+20oXvhKnC 0fhL8GwaNH3nMne34bkG99LGw5J3Q/uZg12riKydm7VDjghqaQIlOCPuiZLbJhd1OSKg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] tools/xenstore: fix XSA-417 patch Message-Id: Date: Fri, 04 Aug 2023 02:33:12 +0000 commit dcba0801cb64eceba30d5cbe88facee0c8b3e1d7 Author: Juergen Gross AuthorDate: Thu Aug 3 16:33:43 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:33:43 2023 +0200 tools/xenstore: fix XSA-417 patch The fix for XSA-417 had a bug: domain_alloc_permrefs() will not return a negative value in case of an error, but a plain errno value. Note this is not considered to be a security issue, as the only case where domain_alloc_permrefs() will return an error is a failed memory allocation. As a guest should not be able to drive Xenstore out of memory, this is NOT a problem a guest can trigger at will. Fixes: ab128218225d ("tools/xenstore: fix checking node permissions") Signed-off-by: Juergen Gross Acked-by: Julien Grall master commit: 0c53c638e16278078371ce028c74693841d7738a master date: 2023-07-21 08:32:43 +0200 --- tools/xenstore/xenstored_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index feb7bbaa52..13d6c0372d 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1784,7 +1784,7 @@ static int do_set_perms(const void *ctx, struct connection *conn, if (!xs_strings_to_perms(perms.p, perms.num, permstr)) return errno; - if (domain_alloc_permrefs(&perms) < 0) + if (domain_alloc_permrefs(&perms)) return ENOMEM; if (perms.p[0].perms & XS_PERM_IGNORE) return ENOENT; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 02:33:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 02:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576773.903334 (Exim 4.92) (envelope-from ) id 1qRkd1-0003Sq-Jj; Fri, 04 Aug 2023 02:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576773.903334; Fri, 04 Aug 2023 02:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkd1-0003Si-Gy; Fri, 04 Aug 2023 02:33:23 +0000 Received: by outflank-mailman (input) for mailman id 576773; Fri, 04 Aug 2023 02:33:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkd0-0003SW-ME for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkd0-00045g-LQ for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRkd0-0004NB-KS for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CKCYmImscyjR3zg6DkFyoyVQ9jX3ROib6qgOq0Pqfnw=; b=UdSwUmHalputJCKat8W0bo1U7A dXb2/Ipqh9+QzlfxdSZsHziJSyBWie5xuZ5H8G1qrsgUMFViAtP16TA2ExNPObifzaKJQFfk0S4Gs 7QTPCv/KVAgs72s9yzpgMtqFHs6tYE5/sdwW1EpQYKdllPUbGGv9WteivXWyT3ogw9eA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] amd: disable C6 after 1000 days on Zen2 Message-Id: Date: Fri, 04 Aug 2023 02:33:22 +0000 commit 6caa50cb025cdeec8d36b1db910c825e12665413 Author: Roger Pau Monné AuthorDate: Thu Aug 3 16:34:06 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:34:06 2023 +0200 amd: disable C6 after 1000 days on Zen2 As specified on Errata 1474: "A core will fail to exit CC6 after about 1044 days after the last system reset. The time of failure may vary depending on the spread spectrum and REFCLK frequency." Detect when running on AMD Zen2 and setup a timer to prevent entering C6 after 1000 days of uptime. Take into account the TSC value at boot in order to account for any time elapsed before Xen has been booted. Worst case we end up disabling C6 before strictly necessary, but that would still be safe, and it's better than not taking the TSC value into account and hanging. Disable C6 by updating the MSR listed in the revision guide, this avoids applying workarounds in the CPU idle drivers, as the processor won't be allowed to enter C6 by the hardware itself. Print a message once C6 is disabled in order to let the user know. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: f7065b24f4fb8813a896b883e6ffd03d67f8a8f2 master date: 2023-07-31 15:05:48 +0200 --- xen/arch/x86/cpu/amd.c | 74 +++++++++++++++++++++++++++++++++++++++++ xen/include/asm-x86/msr-index.h | 2 ++ xen/include/xen/time.h | 1 + 3 files changed, 77 insertions(+) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 81008a2d94..60c6d88edf 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1,8 +1,10 @@ +#include #include #include #include #include #include +#include #include #include #include @@ -50,6 +52,8 @@ boolean_param("allow_unsafe", opt_allow_unsafe); /* Signal whether the ACPI C1E quirk is required. */ bool __read_mostly amd_acpi_c1e_quirk; +static bool __read_mostly zen2_c6_disabled; + static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) { @@ -836,6 +840,32 @@ void amd_check_zenbleed(void) val & chickenbit ? "chickenbit" : "microcode"); } +static void zen2_disable_c6(void *arg) +{ + /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ + const uint64_t mask = ~((1ul << 6) | (1ul << 14) | (1ul << 22)); + uint64_t val; + + if (!zen2_c6_disabled) { + printk(XENLOG_WARNING + "Disabling C6 after 1000 days apparent uptime due to AMD errata 1474\n"); + zen2_c6_disabled = true; + /* + * Prevent CPU hotplug so that started CPUs will either see + * zen2_c6_disabled set, or will be handled by + * smp_call_function(). + */ + while (!get_cpu_maps()) + process_pending_softirqs(); + smp_call_function(zen2_disable_c6, NULL, 0); + put_cpu_maps(); + } + + /* Update the MSR to disable C6, done on all threads. */ + rdmsrl(MSR_AMD_CSTATE_CFG, val); + wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); +} + static void init_amd(struct cpuinfo_x86 *c) { u32 l, h; @@ -1110,6 +1140,9 @@ static void init_amd(struct cpuinfo_x86 *c) amd_check_zenbleed(); + if (zen2_c6_disabled) + zen2_disable_c6(NULL); + check_syscfg_dram_mod_en(); amd_log_freq(c); @@ -1119,3 +1152,44 @@ const struct cpu_dev amd_cpu_dev = { .c_early_init = early_init_amd, .c_init = init_amd, }; + +static int __init zen2_c6_errata_check(void) +{ + /* + * Errata #1474: A Core May Hang After About 1044 Days + * Set up a timer to disable C6 after 1000 days uptime. + */ + s_time_t delta; + + /* + * Zen1 vs Zen2 isn't a simple model number comparison, so use STIBP as + * a heuristic to separate the two uarches in Fam17h. + */ + if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17 || + !boot_cpu_has(X86_FEATURE_AMD_STIBP)) + return 0; + + /* + * Deduct current TSC value, this would be relevant if kexec'ed for + * example. Might not be accurate, but worst case we end up disabling + * C6 before strictly required, which would still be safe. + * + * NB: all affected models (Zen2) have invariant TSC and TSC adjust + * MSR, so early_time_init() will have already cleared any TSC offset. + */ + delta = DAYS(1000) - tsc_ticks2ns(rdtsc()); + if (delta > 0) { + static struct timer errata_c6; + + init_timer(&errata_c6, zen2_disable_c6, NULL, 0); + set_timer(&errata_c6, NOW() + delta); + } else + zen2_disable_c6(NULL); + + return 0; +} +/* + * Must be executed after early_time_init() for tsc_ticks2ns() to have been + * calibrated. That prevents us doing the check in init_amd(). + */ +presmp_initcall(zen2_c6_errata_check); diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 60c0bc7571..767e6a2061 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -192,6 +192,8 @@ #define MSR_VIRT_SPEC_CTRL 0xc001011f /* Layout matches MSR_SPEC_CTRL */ +#define MSR_AMD_CSTATE_CFG 0xc0010296 + /* * Legacy MSR constants in need of cleanup. No new MSRs below this comment. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index b7427460dd..9ceaec541f 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -53,6 +53,7 @@ struct tm wallclock_time(uint64_t *ns); #define SYSTEM_TIME_HZ 1000000000ULL #define NOW() ((s_time_t)get_s_time()) +#define DAYS(_d) SECONDS((_d) * 86400ULL) #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL)) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 02:33:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 02:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.576774.903337 (Exim 4.92) (envelope-from ) id 1qRkdB-0003Vp-L0; Fri, 04 Aug 2023 02:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 576774.903337; Fri, 04 Aug 2023 02:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkdB-0003Vi-IS; Fri, 04 Aug 2023 02:33:33 +0000 Received: by outflank-mailman (input) for mailman id 576774; Fri, 04 Aug 2023 02:33:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkdA-0003VW-PI for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRkdA-00045p-OV for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRkdA-0004No-NT for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 02:33:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TR6Dh3PUbC8X915NnKqcWSsH2tdexTv2WnSq/1OM9JI=; b=MMR/2v5XF3ye/nq5hvl3CvgdmB 7HJOjRqral3SzVj9sFm2j2dNUY4xdmmdwIbXSNj4oA9/vcvZgMnjfkg7j/qsb2blCtSHMxNpIDus+ XMWlacqrpmIjZ8jYe0Mj/nDeyyC6ISOm03wmzbFgY/ORd3AzByTaTK0mwnzU8HEjHAng=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] arm: Avoid using solaris syntax for .section directive Message-Id: Date: Fri, 04 Aug 2023 02:33:32 +0000 commit ff736d9f2abf9131414d72d0124b3c7739491249 Author: Khem Raj AuthorDate: Thu Aug 3 16:34:42 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:34:42 2023 +0200 arm: Avoid using solaris syntax for .section directive Assembler from binutils 2.41 will rejects ([1], [2]) the following syntax .section "name", #alloc for any other any target other than ELF SPARC. This means we can't use it in the Arm code. So switch to the GNU syntax .section name [, "flags"[, @type]] [1] https://sourceware.org/bugzilla/show_bug.cgi?id=11601 [2] https://sourceware.org/binutils/docs-2.41/as.html#Section Signed-off-by: Khem Raj Reviewed-by: Michal Orzel [jgrall: Reword commit message] Acked-by: Julien Grall master commit: dfc490a3740bb7d6889939934afadcb58891fbce master date: 2023-08-02 22:29:52 +0100 --- xen/arch/arm/arm32/proc-v7.S | 6 +++--- xen/arch/arm/dtb.S | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S index c90a31d80f..6d3d19b873 100644 --- a/xen/arch/arm/arm32/proc-v7.S +++ b/xen/arch/arm/arm32/proc-v7.S @@ -29,7 +29,7 @@ brahma15mp_init: mcr CP32(r0, ACTLR) mov pc, lr - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca15mp_proc_info, #object __v7_ca15mp_proc_info: .long 0x410FC0F0 /* Cortex-A15 */ @@ -38,7 +38,7 @@ __v7_ca15mp_proc_info: .long caxx_processor .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca7mp_proc_info, #object __v7_ca7mp_proc_info: .long 0x410FC070 /* Cortex-A7 */ @@ -47,7 +47,7 @@ __v7_ca7mp_proc_info: .long caxx_processor .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_brahma15mp_proc_info, #object __v7_brahma15mp_proc_info: .long 0x420F00F0 /* Broadcom Brahma-B15 */ diff --git a/xen/arch/arm/dtb.S b/xen/arch/arm/dtb.S index c39f3a095c..386f83ba64 100644 --- a/xen/arch/arm/dtb.S +++ b/xen/arch/arm/dtb.S @@ -1,3 +1,3 @@ - .section .dtb,#alloc + .section .dtb, "a" GLOBAL(_sdtb) .incbin CONFIG_DTB_FILE -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 14:00:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 14:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577160.904082 (Exim 4.92) (envelope-from ) id 1qRvLX-0005Qm-76; Fri, 04 Aug 2023 14:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577160.904082; Fri, 04 Aug 2023 14:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLX-0005QR-3l; Fri, 04 Aug 2023 14:00:03 +0000 Received: by outflank-mailman (input) for mailman id 577160; Fri, 04 Aug 2023 14:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLW-0005HO-D6 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLW-0004tV-8z for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRvLW-00008I-7u for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ovVenwTPJlNdk8ITfUu61fOqgMAAJh4UcuouySSXg9I=; b=xr/esG74UzwhEMHGDLln6bpbEV 2Vu5wg/VkJPSsdD5XactwRttmKbxtVRphreL059eHEB1QV94mM3/Cw+E2QpUYtvCsjZZJIcNSFb8Y Ok0A2R6TDrj2fN7CoqaPtFKZAH9ubPWed2U6zFr4h9mMJrBvKIUqJouH0v2MC1ucKeLE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] ocaml/libs/xc: Fix NULL dereference with physinfo_arch_caps() Message-Id: Date: Fri, 04 Aug 2023 14:00:02 +0000 commit db8d48abd38e20abe162fcb0cba2c244b9c6adba Author: Edwin Török AuthorDate: Thu Aug 3 16:29:05 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:29:05 2023 +0200 ocaml/libs/xc: Fix NULL dereference with physinfo_arch_caps() `Tag_cons` is `0` and is meant to be used as the tag argument for `caml_alloc`/`caml_alloc_small` when constructing a non-empty list. The empty list is `Val_emptylist` instead, which is really just `Val_int(0)`. Assigning `0` to a list value like this is equivalent to assigning the naked pointer `NULL` to the field. Naked pointers are not valid in OCaml 5, however even in OCaml <5.x any attempt to iterate on the list will lead to a segfault. The list currently only has an opaque type, so no code would have reason to iterate on it currently, but we shouldn't construct invalid OCaml values that might lead to a crash when exploring the type. `Val_emptylist` is available since OCaml 3.01 as a constant. Fixes: e5ac68a0110c ("x86/hvm: Revert per-domain APIC acceleration support") Signed-off-by: Edwin Török Acked-by: Christian Lindig master commit: 99e45548934923f0d2c1d52ae1239ffe4ef17a06 master date: 2023-07-13 11:06:07 +0100 --- tools/ocaml/libs/xc/xenctrl_stubs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c index facb561577..7de2ff5444 100644 --- a/tools/ocaml/libs/xc/xenctrl_stubs.c +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c @@ -748,7 +748,7 @@ CAMLprim value stub_xc_physinfo(value xch) Store_field(physinfo, 9, Val_int(c_physinfo.max_cpu_id + 1)); #if defined(__i386__) || defined(__x86_64__) - arch_cap_list = Tag_cons; + arch_cap_list = Val_emptylist; arch_cap_flags_tag = 1; /* tag x86 */ #else -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 14:00:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 14:00:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577161.904085 (Exim 4.92) (envelope-from ) id 1qRvLh-0005uG-7p; Fri, 04 Aug 2023 14:00:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577161.904085; Fri, 04 Aug 2023 14:00:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLh-0005u9-5O; Fri, 04 Aug 2023 14:00:13 +0000 Received: by outflank-mailman (input) for mailman id 577161; Fri, 04 Aug 2023 14:00:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLg-0005ty-HB for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLg-0004ty-ET for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRvLg-00009n-BO for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TeZpqCuMj+Ef1AT1t/qTd7TZ2iXlRwb2m9P2MZiFbEA=; b=RhXKKJ6A1zOxb6KxwtVWroAUiI G6RgRMsJtJDDDTTibmjHUPxfcVmlVzV2fqbC+gQOMSAi/qZTwNNvCpk2k0mSCWOswesKFoWyUyvXG QeBNUxVXclWl/Gi3nKunUTHdr78WROpzTFMx+fNFSMaPPtMLcReQ+k0yRNvmMfLsQgyE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: fix early boot output Message-Id: Date: Fri, 04 Aug 2023 14:00:12 +0000 commit b4a5a55e9c760e293857eb6e0a0448494d0b7d9f Author: Jan Beulich AuthorDate: Thu Aug 3 16:29:27 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:29:27 2023 +0200 x86: fix early boot output Loading the VGA base address involves sym_esi(), i.e. %esi still needs to hold the relocation base address. Therefore the address of the message to output cannot be "passed" in %esi. Put the message offset in %ecx instead, adding it into %esi _after_ its last use as base address. Fixes: b28044226e1c ("x86: make Xen early boot code relocatable") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper master commit: b1c16800e52743d9afd9af62c810f03af16dd942 master date: 2023-07-19 10:22:56 +0200 --- xen/arch/x86/boot/head.S | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 0fb7dd3029..245c859dd7 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -141,21 +141,21 @@ efi_platform: .section .init.text, "ax", @progbits bad_cpu: - add $sym_offs(.Lbad_cpu_msg),%esi # Error message + mov $sym_offs(.Lbad_cpu_msg), %ecx jmp .Lget_vtb not_multiboot: - add $sym_offs(.Lbad_ldr_msg),%esi # Error message + mov $sym_offs(.Lbad_ldr_msg), %ecx jmp .Lget_vtb .Lmb2_no_st: /* * Here we are on EFI platform. vga_text_buffer was zapped earlier * because there is pretty good chance that VGA is unavailable. */ - add $sym_offs(.Lbad_ldr_nst),%esi # Error message + mov $sym_offs(.Lbad_ldr_nst), %ecx jmp .Lget_vtb .Lmb2_no_ih: /* Ditto. */ - add $sym_offs(.Lbad_ldr_nih),%esi # Error message + mov $sym_offs(.Lbad_ldr_nih), %ecx jmp .Lget_vtb .Lmb2_no_bs: /* @@ -163,7 +163,7 @@ not_multiboot: * via start label. Then reliable vga_text_buffer zap is impossible * in Multiboot2 scanning loop and we have to zero %edi below. */ - add $sym_offs(.Lbad_ldr_nbs),%esi # Error message + mov $sym_offs(.Lbad_ldr_nbs), %ecx xor %edi,%edi # No VGA text buffer jmp .Lprint_err .Lmb2_efi_ia_32: @@ -171,12 +171,15 @@ not_multiboot: * Here we are on EFI IA-32 platform. Then reliable vga_text_buffer zap is * impossible in Multiboot2 scanning loop and we have to zero %edi below. */ - add $sym_offs(.Lbad_efi_msg),%esi # Error message + mov $sym_offs(.Lbad_efi_msg), %ecx xor %edi,%edi # No VGA text buffer jmp .Lprint_err .Lget_vtb: mov sym_esi(vga_text_buffer),%edi .Lprint_err: + add %ecx, %esi # Add string offset to relocation base. + # NOTE: No further use of sym_esi() till the end of the "function"! +1: lodsb test %al,%al # Terminate on '\0' sentinel je .Lhalt @@ -189,11 +192,11 @@ not_multiboot: mov %bl,%al out %al,%dx # Send a character over the serial line test %edi,%edi # Is the VGA text buffer available? - jz .Lprint_err + jz 1b stosb # Write a character to the VGA text buffer mov $7,%al stosb # Write an attribute to the VGA text buffer - jmp .Lprint_err + jmp 1b .Lhalt: hlt jmp .Lhalt -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 14:00:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 14:00:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577162.904089 (Exim 4.92) (envelope-from ) id 1qRvLs-0005wN-9L; Fri, 04 Aug 2023 14:00:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577162.904089; Fri, 04 Aug 2023 14:00:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLs-0005wF-6q; Fri, 04 Aug 2023 14:00:24 +0000 Received: by outflank-mailman (input) for mailman id 577162; Fri, 04 Aug 2023 14:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLq-0005w1-KL for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvLq-0004u7-Hi for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRvLq-0000Ao-Gh for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ozCAGjEVLvEshi4sQ1aRqsxBvJqcYjEy0LIONue68vA=; b=TyYQuG9/wNbmG/ppVcTyeWjVHx mI3mGhWL8KzjdBXvr748WDdc1U7DOxE6bp2NULrHWwrl2XacYaDJSr6vXWIMBRfs0+577b1BYTP0h +eO0j7C6Lf4zasXeJwkq0POAQn7G4tOwgHH//NYHkmsMgakkzDh+l7bJ9JGy6F3oFId0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools/xenstore: fix XSA-417 patch Message-Id: Date: Fri, 04 Aug 2023 14:00:22 +0000 commit 6c442499dc45425bb6dec0f97ca950abb0046081 Author: Juergen Gross AuthorDate: Thu Aug 3 16:30:27 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:30:27 2023 +0200 tools/xenstore: fix XSA-417 patch The fix for XSA-417 had a bug: domain_alloc_permrefs() will not return a negative value in case of an error, but a plain errno value. Note this is not considered to be a security issue, as the only case where domain_alloc_permrefs() will return an error is a failed memory allocation. As a guest should not be able to drive Xenstore out of memory, this is NOT a problem a guest can trigger at will. Fixes: ab128218225d ("tools/xenstore: fix checking node permissions") Signed-off-by: Juergen Gross Acked-by: Julien Grall master commit: 0c53c638e16278078371ce028c74693841d7738a master date: 2023-07-21 08:32:43 +0200 --- tools/xenstore/xenstored_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 8907c6cb0b..09b5d0656f 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1780,7 +1780,7 @@ static int do_set_perms(const void *ctx, struct connection *conn, if (!xs_strings_to_perms(perms.p, perms.num, permstr)) return errno; - if (domain_alloc_permrefs(&perms) < 0) + if (domain_alloc_permrefs(&perms)) return ENOMEM; if (perms.p[0].perms & XS_PERM_IGNORE) return ENOENT; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 14:00:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 14:00:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577163.904093 (Exim 4.92) (envelope-from ) id 1qRvM2-0005zH-B3; Fri, 04 Aug 2023 14:00:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577163.904093; Fri, 04 Aug 2023 14:00:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvM2-0005zA-8K; Fri, 04 Aug 2023 14:00:34 +0000 Received: by outflank-mailman (input) for mailman id 577163; Fri, 04 Aug 2023 14:00:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvM0-0005yq-M0 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvM0-0004uJ-L7 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRvM0-0000Ba-KB for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9aBvL+7o2XAdw9rqE/tXnwHHSe/lUxZEhqhk8zev1mA=; b=qzSIToRh17xZcyaGMpZTiYY4H1 w4ooXyRgYk5HyL1CsFfxvWu80Ou5GS5qGxI/2O1oChLZ2CP9kVfYvZydMJCg6hTMUof7273S3mSGL VsM8625/0YZ+wUA721gaYTHjI/GZPva5Y7OL11aAYRY8wruz13HjF617uAYl6Ddzjq5Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] amd: disable C6 after 1000 days on Zen2 Message-Id: Date: Fri, 04 Aug 2023 14:00:32 +0000 commit 8da1697e2c180e59eaf6c29ad62bd0b78765cd22 Author: Roger Pau Monné AuthorDate: Thu Aug 3 16:30:49 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:30:49 2023 +0200 amd: disable C6 after 1000 days on Zen2 As specified on Errata 1474: "A core will fail to exit CC6 after about 1044 days after the last system reset. The time of failure may vary depending on the spread spectrum and REFCLK frequency." Detect when running on AMD Zen2 and setup a timer to prevent entering C6 after 1000 days of uptime. Take into account the TSC value at boot in order to account for any time elapsed before Xen has been booted. Worst case we end up disabling C6 before strictly necessary, but that would still be safe, and it's better than not taking the TSC value into account and hanging. Disable C6 by updating the MSR listed in the revision guide, this avoids applying workarounds in the CPU idle drivers, as the processor won't be allowed to enter C6 by the hardware itself. Print a message once C6 is disabled in order to let the user know. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: f7065b24f4fb8813a896b883e6ffd03d67f8a8f2 master date: 2023-07-31 15:05:48 +0200 --- xen/arch/x86/cpu/amd.c | 74 ++++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/msr-index.h | 2 + xen/include/xen/time.h | 1 + 3 files changed, 77 insertions(+) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c452592872..3ea214fc2e 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1,8 +1,10 @@ +#include #include #include #include #include #include +#include #include #include #include @@ -52,6 +54,8 @@ bool __read_mostly amd_acpi_c1e_quirk; bool __ro_after_init amd_legacy_ssbd; bool __initdata amd_virt_spec_ctrl; +static bool __read_mostly zen2_c6_disabled; + static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) { @@ -945,6 +949,32 @@ void amd_check_zenbleed(void) val & chickenbit ? "chickenbit" : "microcode"); } +static void cf_check zen2_disable_c6(void *arg) +{ + /* Disable C6 by clearing the CCR{0,1,2}_CC6EN bits. */ + const uint64_t mask = ~((1ul << 6) | (1ul << 14) | (1ul << 22)); + uint64_t val; + + if (!zen2_c6_disabled) { + printk(XENLOG_WARNING + "Disabling C6 after 1000 days apparent uptime due to AMD errata 1474\n"); + zen2_c6_disabled = true; + /* + * Prevent CPU hotplug so that started CPUs will either see + * zen2_c6_disabled set, or will be handled by + * smp_call_function(). + */ + while (!get_cpu_maps()) + process_pending_softirqs(); + smp_call_function(zen2_disable_c6, NULL, 0); + put_cpu_maps(); + } + + /* Update the MSR to disable C6, done on all threads. */ + rdmsrl(MSR_AMD_CSTATE_CFG, val); + wrmsrl(MSR_AMD_CSTATE_CFG, val & mask); +} + static void cf_check init_amd(struct cpuinfo_x86 *c) { u32 l, h; @@ -1219,6 +1249,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) amd_check_zenbleed(); + if (zen2_c6_disabled) + zen2_disable_c6(NULL); + check_syscfg_dram_mod_en(); amd_log_freq(c); @@ -1228,3 +1261,44 @@ const struct cpu_dev amd_cpu_dev = { .c_early_init = early_init_amd, .c_init = init_amd, }; + +static int __init cf_check zen2_c6_errata_check(void) +{ + /* + * Errata #1474: A Core May Hang After About 1044 Days + * Set up a timer to disable C6 after 1000 days uptime. + */ + s_time_t delta; + + /* + * Zen1 vs Zen2 isn't a simple model number comparison, so use STIBP as + * a heuristic to separate the two uarches in Fam17h. + */ + if (cpu_has_hypervisor || boot_cpu_data.x86 != 0x17 || + !boot_cpu_has(X86_FEATURE_AMD_STIBP)) + return 0; + + /* + * Deduct current TSC value, this would be relevant if kexec'ed for + * example. Might not be accurate, but worst case we end up disabling + * C6 before strictly required, which would still be safe. + * + * NB: all affected models (Zen2) have invariant TSC and TSC adjust + * MSR, so early_time_init() will have already cleared any TSC offset. + */ + delta = DAYS(1000) - tsc_ticks2ns(rdtsc()); + if (delta > 0) { + static struct timer errata_c6; + + init_timer(&errata_c6, zen2_disable_c6, NULL, 0); + set_timer(&errata_c6, NOW() + delta); + } else + zen2_disable_c6(NULL); + + return 0; +} +/* + * Must be executed after early_time_init() for tsc_ticks2ns() to have been + * calibrated. That prevents us doing the check in init_amd(). + */ +presmp_initcall(zen2_c6_errata_check); diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 0a8852f3c2..faae3244f5 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -206,6 +206,8 @@ #define MSR_VIRT_SPEC_CTRL 0xc001011f /* Layout matches MSR_SPEC_CTRL */ +#define MSR_AMD_CSTATE_CFG 0xc0010296 + /* * Legacy MSR constants in need of cleanup. No new MSRs below this comment. */ diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index b7427460dd..9ceaec541f 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -53,6 +53,7 @@ struct tm wallclock_time(uint64_t *ns); #define SYSTEM_TIME_HZ 1000000000ULL #define NOW() ((s_time_t)get_s_time()) +#define DAYS(_d) SECONDS((_d) * 86400ULL) #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL)) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Fri Aug 04 14:00:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Aug 2023 14:00:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577165.904107 (Exim 4.92) (envelope-from ) id 1qRvMC-0006Ir-ON; Fri, 04 Aug 2023 14:00:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577165.904107; Fri, 04 Aug 2023 14:00:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvMC-0006Il-LO; Fri, 04 Aug 2023 14:00:44 +0000 Received: by outflank-mailman (input) for mailman id 577165; Fri, 04 Aug 2023 14:00:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvMA-0006Hh-P6 for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRvMA-0004uZ-OE for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qRvMA-0000CI-NK for xen-changelog@lists.xenproject.org; Fri, 04 Aug 2023 14:00:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YXcJ5pRleaOeCBzGSB1naKGGc+7AhLF+GCN2yvHqsVo=; b=Q7tIrKDCy8Az0YG5ViyQThUxsH K3MjGQIM8senJDfgAh06+2t0k+Mqa41QNGM5nUDCo/U26112OXjie4eEWCMDQ4T5hXNgYxl4K0ovP UrBALfg1kSncFZAGlBCGp3cMD8fwaFMO2KgAu8CFkoQwKYnxRXya23+WY7nie8viIuys=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] arm: Avoid using solaris syntax for .section directive Message-Id: Date: Fri, 04 Aug 2023 14:00:42 +0000 commit 0a62b16489958715c20a2f6177a11a8ca3c4f7f3 Author: Khem Raj AuthorDate: Thu Aug 3 16:31:36 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 16:31:36 2023 +0200 arm: Avoid using solaris syntax for .section directive Assembler from binutils 2.41 will rejects ([1], [2]) the following syntax .section "name", #alloc for any other any target other than ELF SPARC. This means we can't use it in the Arm code. So switch to the GNU syntax .section name [, "flags"[, @type]] [1] https://sourceware.org/bugzilla/show_bug.cgi?id=11601 [2] https://sourceware.org/binutils/docs-2.41/as.html#Section Signed-off-by: Khem Raj Reviewed-by: Michal Orzel [jgrall: Reword commit message] Acked-by: Julien Grall master commit: dfc490a3740bb7d6889939934afadcb58891fbce master date: 2023-08-02 22:29:52 +0100 --- xen/arch/arm/arm32/proc-v7.S | 6 +++--- xen/arch/arm/dtb.S | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S index c90a31d80f..6d3d19b873 100644 --- a/xen/arch/arm/arm32/proc-v7.S +++ b/xen/arch/arm/arm32/proc-v7.S @@ -29,7 +29,7 @@ brahma15mp_init: mcr CP32(r0, ACTLR) mov pc, lr - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca15mp_proc_info, #object __v7_ca15mp_proc_info: .long 0x410FC0F0 /* Cortex-A15 */ @@ -38,7 +38,7 @@ __v7_ca15mp_proc_info: .long caxx_processor .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca7mp_proc_info, #object __v7_ca7mp_proc_info: .long 0x410FC070 /* Cortex-A7 */ @@ -47,7 +47,7 @@ __v7_ca7mp_proc_info: .long caxx_processor .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_brahma15mp_proc_info, #object __v7_brahma15mp_proc_info: .long 0x420F00F0 /* Broadcom Brahma-B15 */ diff --git a/xen/arch/arm/dtb.S b/xen/arch/arm/dtb.S index c39f3a095c..386f83ba64 100644 --- a/xen/arch/arm/dtb.S +++ b/xen/arch/arm/dtb.S @@ -1,3 +1,3 @@ - .section .dtb,#alloc + .section .dtb, "a" GLOBAL(_sdtb) .incbin CONFIG_DTB_FILE -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577681.904626 (Exim 4.92) (envelope-from ) id 1qSYqu-0007Qg-2O; Sun, 06 Aug 2023 08:11:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577681.904626; Sun, 06 Aug 2023 08:11:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYqt-0007QZ-Vk; Sun, 06 Aug 2023 08:11:03 +0000 Received: by outflank-mailman (input) for mailman id 577681; Sun, 06 Aug 2023 08:11:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYqs-0007QT-Hu for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYqs-00045G-Gq for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYqs-00059e-El for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TPoASI76YD6nXwSkVcBO7/HjOA4CydkAQ9jVJW47j0U=; b=UW9f7hXxjXfukQwCw/K73IjPRo zC2QDopQKHPLNahtJy1urvagaWr9h6ccJ1I0mu6nrjjhsgaefhYNR6yltWzquAzusBctNWi2eLTt2 b0+jaq66QLKLtrk4HKNo8Y9Nvc3mlMELYja89v5XsnoLtQEYETAmPhvj9NTsp4RxSc9Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/traps: Move do_general_protection() earlier Message-Id: Date: Sun, 06 Aug 2023 08:11:02 +0000 commit 26638cd9efaea4fea3322914efc2611981e001fe Author: Andrew Cooper AuthorDate: Fri Feb 17 23:06:37 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Aug 2 16:25:24 2023 +0100 x86/traps: Move do_general_protection() earlier ... in order to clean up the declarations without needing to forward declare it for handle_gdt_ldt_mapping_fault() No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/traps.c | 157 +++++++++++++++++++++++++-------------------------- 1 file changed, 78 insertions(+), 79 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index f11239fd0f..80e8c2fb1f 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1223,6 +1223,84 @@ void do_int3(struct cpu_user_regs *regs) pv_inject_hw_exception(X86_EXC_BP, X86_EVENT_NO_EC); } +void do_general_protection(struct cpu_user_regs *regs) +{ +#ifdef CONFIG_PV + struct vcpu *v = current; +#endif + + if ( regs->error_code & X86_XEC_EXT ) + goto hardware_gp; + + if ( !guest_mode(regs) ) + goto gp_in_kernel; + +#ifdef CONFIG_PV + /* + * Cunning trick to allow arbitrary "INT n" handling. + * + * We set DPL == 0 on all vectors in the IDT. This prevents any INT + * instruction from trapping to the appropriate vector, when that might not + * be expected by Xen or the guest OS. For example, that entry might be for + * a fault handler (unlike traps, faults don't increment EIP), or might + * expect an error code on the stack (which a software trap never + * provides), or might be a hardware interrupt handler that doesn't like + * being called spuriously. + * + * Instead, a GPF occurs with the faulting IDT vector in the error code. + * Bit 1 is set to indicate that an IDT entry caused the fault. Bit 0 is + * clear (which got already checked above) to indicate that it's a software + * fault, not a hardware one. + * + * NOTE: Vectors 3 and 4 are dealt with from their own handler. This is + * okay because they can only be triggered by an explicit DPL-checked + * instruction. The DPL specified by the guest OS for these vectors is NOT + * CHECKED!! + */ + if ( regs->error_code & X86_XEC_IDT ) + { + /* This fault must be due to instruction. */ + uint8_t vector = regs->error_code >> 3; + const struct trap_info *ti = &v->arch.pv.trap_ctxt[vector]; + + if ( permit_softint(TI_GET_DPL(ti), v, regs) ) + { + regs->rip += 2; + pv_inject_sw_interrupt(vector); + return; + } + } + else if ( is_pv_32bit_vcpu(v) && regs->error_code ) + { + pv_emulate_gate_op(regs); + return; + } + + /* Emulate some simple privileged and I/O instructions. */ + if ( (regs->error_code == 0) && + pv_emulate_privileged_op(regs) ) + { + trace_trap_one_addr(TRC_PV_EMULATE_PRIVOP, regs->rip); + return; + } + + /* Pass on GPF as is. */ + pv_inject_hw_exception(X86_EXC_GP, regs->error_code); + return; +#endif + + gp_in_kernel: + if ( likely(extable_fixup(regs, true)) ) + return; + + hardware_gp: + if ( debugger_trap_fatal(X86_EXC_GP, regs) ) + return; + + show_execution_state(regs); + panic("GENERAL PROTECTION FAULT\n[error_code=%04x]\n", regs->error_code); +} + #ifdef CONFIG_PV static int handle_ldt_mapping_fault(unsigned int offset, struct cpu_user_regs *regs) @@ -1588,85 +1666,6 @@ void __init do_early_page_fault(struct cpu_user_regs *regs) } } -void do_general_protection(struct cpu_user_regs *regs) -{ -#ifdef CONFIG_PV - struct vcpu *v = current; -#endif - - if ( regs->error_code & X86_XEC_EXT ) - goto hardware_gp; - - if ( !guest_mode(regs) ) - goto gp_in_kernel; - -#ifdef CONFIG_PV - /* - * Cunning trick to allow arbitrary "INT n" handling. - * - * We set DPL == 0 on all vectors in the IDT. This prevents any INT - * instruction from trapping to the appropriate vector, when that might not - * be expected by Xen or the guest OS. For example, that entry might be for - * a fault handler (unlike traps, faults don't increment EIP), or might - * expect an error code on the stack (which a software trap never - * provides), or might be a hardware interrupt handler that doesn't like - * being called spuriously. - * - * Instead, a GPF occurs with the faulting IDT vector in the error code. - * Bit 1 is set to indicate that an IDT entry caused the fault. Bit 0 is - * clear (which got already checked above) to indicate that it's a software - * fault, not a hardware one. - * - * NOTE: Vectors 3 and 4 are dealt with from their own handler. This is - * okay because they can only be triggered by an explicit DPL-checked - * instruction. The DPL specified by the guest OS for these vectors is NOT - * CHECKED!! - */ - if ( regs->error_code & X86_XEC_IDT ) - { - /* This fault must be due to instruction. */ - uint8_t vector = regs->error_code >> 3; - const struct trap_info *ti = &v->arch.pv.trap_ctxt[vector]; - - if ( permit_softint(TI_GET_DPL(ti), v, regs) ) - { - regs->rip += 2; - pv_inject_sw_interrupt(vector); - return; - } - } - else if ( is_pv_32bit_vcpu(v) && regs->error_code ) - { - pv_emulate_gate_op(regs); - return; - } - - /* Emulate some simple privileged and I/O instructions. */ - if ( (regs->error_code == 0) && - pv_emulate_privileged_op(regs) ) - { - trace_trap_one_addr(TRC_PV_EMULATE_PRIVOP, regs->rip); - return; - } - - /* Pass on GPF as is. */ - pv_inject_hw_exception(X86_EXC_GP, regs->error_code); - return; -#endif - - gp_in_kernel: - - if ( likely(extable_fixup(regs, true)) ) - return; - - hardware_gp: - if ( debugger_trap_fatal(X86_EXC_GP, regs) ) - return; - - show_execution_state(regs); - panic("GENERAL PROTECTION FAULT\n[error_code=%04x]\n", regs->error_code); -} - static bool pci_serr_cont; static bool pci_serr_nmicont(void) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577682.904630 (Exim 4.92) (envelope-from ) id 1qSYr4-0007Ss-3n; Sun, 06 Aug 2023 08:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577682.904630; Sun, 06 Aug 2023 08:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYr4-0007Sj-19; Sun, 06 Aug 2023 08:11:14 +0000 Received: by outflank-mailman (input) for mailman id 577682; Sun, 06 Aug 2023 08:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYr2-0007SX-La for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYr2-00045O-Kk for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYr2-0005AS-JI for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lOb5n3ZQYvWKFloe2KbHbwMwActV2kA8doiP0G7FHCQ=; b=Q6APs2vuy+IwzM36gkE6P6a2Bq SEA4NXRts7y+87es/E31K86eeNliehjI88vfwhY9Oo13H6/avM1/xWMC/PbTFlfbU/WuKYnYgx60g SkbX5JLy1uUHQr6nnevIeqmK5f08YSEDEKmTgjpBLL4ccFKu4UvN9r/e72yp3z/Y8ODg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/entry: Rename the exception entrypoints Message-Id: Date: Sun, 06 Aug 2023 08:11:12 +0000 commit abe93fc8aafaecabb2ffbad1b29f049ca02ab8cb Author: Andrew Cooper AuthorDate: Fri Feb 17 14:10:58 2023 +0000 Commit: Andrew Cooper CommitDate: Wed Aug 2 16:25:24 2023 +0100 x86/entry: Rename the exception entrypoints This makes the names match the architectural short names that we use elsewhere. This avoids 'debug' in particular from being a global symbol shadowed by many local parameter names. Remove the DECLARE_TRAP_HANDLER{,_CONST}() infrastructure. Only NMI/#MC are referenced externally (and NMI will cease to be soon, as part of adding FRED support). Move the entrypoint declarations into the respective traps.c where they're used, rather than keeping them visible across ~all of Xen. Drop the long-stale comment at the top of init_idt_traps(). It's mostly discussing a 32bit Xen, and bogus otherwise as it's impossible to use trap gates correctly for these purposes. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Tested-by: Nicola Vetrini --- xen/arch/x86/include/asm/processor.h | 34 ++---------------- xen/arch/x86/pv/traps.c | 2 ++ xen/arch/x86/traps.c | 70 +++++++++++++++++++++--------------- xen/arch/x86/x86_64/entry.S | 36 +++++++++---------- 4 files changed, 64 insertions(+), 78 deletions(-) diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c0529cc3d9..0989748be6 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -417,38 +417,8 @@ extern void mtrr_bp_init(void); void mcheck_init(struct cpuinfo_x86 *c, bool_t bsp); -#define DECLARE_TRAP_HANDLER(_name) \ - void _name(void); \ - void do_ ## _name(struct cpu_user_regs *regs) -#define DECLARE_TRAP_HANDLER_CONST(_name) \ - void _name(void); \ - void do_ ## _name(const struct cpu_user_regs *regs) - -DECLARE_TRAP_HANDLER(divide_error); -DECLARE_TRAP_HANDLER(debug); -DECLARE_TRAP_HANDLER_CONST(nmi); -DECLARE_TRAP_HANDLER(int3); -DECLARE_TRAP_HANDLER(overflow); -DECLARE_TRAP_HANDLER(bounds); -DECLARE_TRAP_HANDLER(invalid_op); -DECLARE_TRAP_HANDLER(device_not_available); -DECLARE_TRAP_HANDLER(double_fault); -DECLARE_TRAP_HANDLER(invalid_TSS); -DECLARE_TRAP_HANDLER(segment_not_present); -DECLARE_TRAP_HANDLER(stack_segment); -DECLARE_TRAP_HANDLER(general_protection); -DECLARE_TRAP_HANDLER(page_fault); -DECLARE_TRAP_HANDLER(early_page_fault); -DECLARE_TRAP_HANDLER(coprocessor_error); -DECLARE_TRAP_HANDLER(simd_coprocessor_error); -DECLARE_TRAP_HANDLER_CONST(machine_check); -DECLARE_TRAP_HANDLER(alignment_check); -DECLARE_TRAP_HANDLER(entry_CP); - -DECLARE_TRAP_HANDLER(entry_int82); - -#undef DECLARE_TRAP_HANDLER_CONST -#undef DECLARE_TRAP_HANDLER +void do_nmi(const struct cpu_user_regs *regs); +void do_machine_check(const struct cpu_user_regs *regs); void trap_nop(void); diff --git a/xen/arch/x86/pv/traps.c b/xen/arch/x86/pv/traps.c index 17ca4d1d51..74f333da7e 100644 --- a/xen/arch/x86/pv/traps.c +++ b/xen/arch/x86/pv/traps.c @@ -132,6 +132,8 @@ static void cf_check nmi_softirq(void) *v_ptr = NULL; } +void nocall entry_int82(void); + void __init pv_trap_init(void) { #ifdef CONFIG_PV32 diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 80e8c2fb1f..a898e1f2d7 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -2106,35 +2106,49 @@ void percpu_traps_init(void) wrmsrl(MSR_IA32_DEBUGCTLMSR, IA32_DEBUGCTLMSR_LBR); } +/* Exception entries */ +void nocall entry_DE(void); +void nocall entry_DB(void); +void nocall entry_NMI(void); +void nocall entry_BP(void); +void nocall entry_OF(void); +void nocall entry_BR(void); +void nocall entry_UD(void); +void nocall entry_NM(void); +void nocall entry_DF(void); +void nocall entry_TS(void); +void nocall entry_NP(void); +void nocall entry_SS(void); +void nocall entry_GP(void); +void nocall early_page_fault(void); +void nocall entry_PF(void); +void nocall entry_MF(void); +void nocall entry_AC(void); +void nocall entry_MC(void); +void nocall entry_XM(void); +void nocall entry_CP(void); + void __init init_idt_traps(void) { - /* - * Note that interrupt gates are always used, rather than trap gates. We - * must have interrupts disabled until DS/ES/FS/GS are saved because the - * first activation must have the "bad" value(s) for these registers and - * we may lose them if another activation is installed before they are - * saved. The page-fault handler also needs interrupts disabled until %cr2 - * has been read and saved on the stack. - */ - set_intr_gate(X86_EXC_DE, divide_error); - set_intr_gate(X86_EXC_DB, debug); - set_intr_gate(X86_EXC_NMI, nmi); - set_swint_gate(X86_EXC_BP, int3); /* usable from all privileges */ - set_swint_gate(X86_EXC_OF, overflow); /* usable from all privileges */ - set_intr_gate(X86_EXC_BR, bounds); - set_intr_gate(X86_EXC_UD, invalid_op); - set_intr_gate(X86_EXC_NM, device_not_available); - set_intr_gate(X86_EXC_DF, double_fault); - set_intr_gate(X86_EXC_TS, invalid_TSS); - set_intr_gate(X86_EXC_NP, segment_not_present); - set_intr_gate(X86_EXC_SS, stack_segment); - set_intr_gate(X86_EXC_GP, general_protection); - set_intr_gate(X86_EXC_PF, early_page_fault); - set_intr_gate(X86_EXC_MF, coprocessor_error); - set_intr_gate(X86_EXC_AC, alignment_check); - set_intr_gate(X86_EXC_MC, machine_check); - set_intr_gate(X86_EXC_XM, simd_coprocessor_error); - set_intr_gate(X86_EXC_CP, entry_CP); + set_intr_gate (X86_EXC_DE, entry_DE); + set_intr_gate (X86_EXC_DB, entry_DB); + set_intr_gate (X86_EXC_NMI, entry_NMI); + set_swint_gate(X86_EXC_BP, entry_BP); + set_swint_gate(X86_EXC_OF, entry_OF); + set_intr_gate (X86_EXC_BR, entry_BR); + set_intr_gate (X86_EXC_UD, entry_UD); + set_intr_gate (X86_EXC_NM, entry_NM); + set_intr_gate (X86_EXC_DF, entry_DF); + set_intr_gate (X86_EXC_TS, entry_TS); + set_intr_gate (X86_EXC_NP, entry_NP); + set_intr_gate (X86_EXC_SS, entry_SS); + set_intr_gate (X86_EXC_GP, entry_GP); + set_intr_gate (X86_EXC_PF, early_page_fault); + set_intr_gate (X86_EXC_MF, entry_MF); + set_intr_gate (X86_EXC_AC, entry_AC); + set_intr_gate (X86_EXC_MC, entry_MC); + set_intr_gate (X86_EXC_XM, entry_XM); + set_intr_gate (X86_EXC_CP, entry_CP); /* Specify dedicated interrupt stacks for NMI, #DF, and #MC. */ enable_each_ist(idt_table); @@ -2153,7 +2167,7 @@ void __init trap_init(void) unsigned int vector; /* Replace early pagefault with real pagefault handler. */ - set_intr_gate(X86_EXC_PF, &page_fault); + set_intr_gate(X86_EXC_PF, entry_PF); pv_trap_init(); diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index bca1500e2b..81dd2c74b8 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -708,7 +708,7 @@ ENTRY(common_interrupt) mov %bl, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) jmp ret_from_intr -ENTRY(page_fault) +ENTRY(entry_PF) ENDBR64 movl $X86_EXC_PF, 4(%rsp) /* No special register assumptions. */ @@ -881,81 +881,81 @@ FATAL_exception_with_ints_disabled: movq %rsp,%rdi tailcall fatal_trap -ENTRY(divide_error) +ENTRY(entry_DE) ENDBR64 pushq $0 movl $X86_EXC_DE, 4(%rsp) jmp handle_exception -ENTRY(coprocessor_error) +ENTRY(entry_MF) ENDBR64 pushq $0 movl $X86_EXC_MF, 4(%rsp) jmp handle_exception -ENTRY(simd_coprocessor_error) +ENTRY(entry_XM) ENDBR64 pushq $0 movl $X86_EXC_XM, 4(%rsp) jmp handle_exception -ENTRY(device_not_available) +ENTRY(entry_NM) ENDBR64 pushq $0 movl $X86_EXC_NM, 4(%rsp) jmp handle_exception -ENTRY(debug) +ENTRY(entry_DB) ENDBR64 pushq $0 movl $X86_EXC_DB, 4(%rsp) jmp handle_ist_exception -ENTRY(int3) +ENTRY(entry_BP) ENDBR64 pushq $0 movl $X86_EXC_BP, 4(%rsp) jmp handle_exception -ENTRY(overflow) +ENTRY(entry_OF) ENDBR64 pushq $0 movl $X86_EXC_OF, 4(%rsp) jmp handle_exception -ENTRY(bounds) +ENTRY(entry_BR) ENDBR64 pushq $0 movl $X86_EXC_BR, 4(%rsp) jmp handle_exception -ENTRY(invalid_op) +ENTRY(entry_UD) ENDBR64 pushq $0 movl $X86_EXC_UD, 4(%rsp) jmp handle_exception -ENTRY(invalid_TSS) +ENTRY(entry_TS) ENDBR64 movl $X86_EXC_TS, 4(%rsp) jmp handle_exception -ENTRY(segment_not_present) +ENTRY(entry_NP) ENDBR64 movl $X86_EXC_NP, 4(%rsp) jmp handle_exception -ENTRY(stack_segment) +ENTRY(entry_SS) ENDBR64 movl $X86_EXC_SS, 4(%rsp) jmp handle_exception -ENTRY(general_protection) +ENTRY(entry_GP) ENDBR64 movl $X86_EXC_GP, 4(%rsp) jmp handle_exception -ENTRY(alignment_check) +ENTRY(entry_AC) ENDBR64 movl $X86_EXC_AC, 4(%rsp) jmp handle_exception @@ -965,7 +965,7 @@ ENTRY(entry_CP) movl $X86_EXC_CP, 4(%rsp) jmp handle_exception -ENTRY(double_fault) +ENTRY(entry_DF) ENDBR64 movl $X86_EXC_DF, 4(%rsp) /* Set AC to reduce chance of further SMAP faults */ @@ -989,7 +989,7 @@ ENTRY(double_fault) movq %rsp,%rdi tailcall do_double_fault -ENTRY(nmi) +ENTRY(entry_NMI) ENDBR64 pushq $0 movl $X86_EXC_NMI, 4(%rsp) @@ -1117,7 +1117,7 @@ handle_ist_exception: jmp restore_all_xen #endif -ENTRY(machine_check) +ENTRY(entry_MC) ENDBR64 pushq $0 movl $X86_EXC_MC, 4(%rsp) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577683.904634 (Exim 4.92) (envelope-from ) id 1qSYrE-0007Vk-5P; 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Sun, 06 Aug 2023 08:11:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wegQbAD44gLXtvXCkwjBn1BpEBoVXEWc2s+cMpERW9w=; b=gdIOfQtRn4qv6XM1qEx8aaDPT9 THGMp1Wim8sQX3rFx1ijY7+8L3DJ4x1xp8u82DdNlvvoVuQkxXTsv/eJipYJrTbbhGoND5GXo5Qy/ 5Y01Xv1YcAR3RBrtZsP1Pw4aE0x42uFqDfTWVrWTqG8ZQYTPagHf+aPCb6lB1TeFD9mk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Delete str() Message-Id: Date: Sun, 06 Aug 2023 08:11:22 +0000 commit 73aea9ada87f804f6b56efda13aead3b950f8657 Author: Andrew Cooper AuthorDate: Fri Jul 28 20:27:01 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Aug 2 16:25:24 2023 +0100 x86: Delete str() This is used in an assertion only, which is somewhat dubious to begin with and isn't expected to surivive the x86-S work (where TR is expected to become become be a NUL selector). Delete it now. This avoids many cases where as a global symbol, it shadows local string variables. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Tested-by: Nicola Vetrini --- xen/arch/x86/hvm/svm/svm.c | 2 -- xen/arch/x86/include/asm/desc.h | 9 --------- 2 files changed, 11 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 27170213ae..b3845bdca7 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1614,8 +1614,6 @@ static int _svm_cpu_up(bool bsp) /* Initialize OSVW bits to be used by guests */ svm_host_osvw_init(); - /* Minimal checking that enough CPU setup was done by now. */ - ASSERT(str() == TSS_SELECTOR); svm_vmsave_pa(per_cpu(host_vmcb, cpu)); return 0; diff --git a/xen/arch/x86/include/asm/desc.h b/xen/arch/x86/include/asm/desc.h index 225a864c48..a1e0807d97 100644 --- a/xen/arch/x86/include/asm/desc.h +++ b/xen/arch/x86/include/asm/desc.h @@ -238,15 +238,6 @@ static inline void ltr(unsigned int sel) __asm__ __volatile__ ( "ltr %w0" :: "rm" (sel) : "memory" ); } -static inline unsigned int str(void) -{ - unsigned int sel; - - __asm__ ( "str %0" : "=r" (sel) ); - - return sel; -} - #endif /* !__ASSEMBLY__ */ #endif /* __ARCH_DESC_H */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577684.904637 (Exim 4.92) (envelope-from ) id 1qSYrO-0007Yb-6e; Sun, 06 Aug 2023 08:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577684.904637; Sun, 06 Aug 2023 08:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrO-0007YU-4A; Sun, 06 Aug 2023 08:11:34 +0000 Received: by outflank-mailman (input) for mailman id 577684; Sun, 06 Aug 2023 08:11:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrM-0007YK-S2 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrM-00045c-RE for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYrM-0005Bt-QH for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YH/iMtcaCNyxZ9j2Rsn9sV5/u1QlGqhIea/YoFM3luQ=; b=nQ8sY4GWlyOu3fGdrt562xab6E 9RWkrCU02YELxEN3fatrZeBSZc30p6ltfqqPPWfZJvxXl0sezGv4TEzpQ2fsfvm745Y1KInRJlp/z poIaS43wPeGZP/pnJdCqXQZCgTw++slT08Rnkk1h1cVHcdtZiH1c0ROr210JHEOUno5Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/gen-cpuid: Avoid violations of Misra rule 1.3 Message-Id: Date: Sun, 06 Aug 2023 08:11:32 +0000 commit da55d9dc919752e092e591a74ab54c2f7d5adfab Author: Andrew Cooper AuthorDate: Wed Aug 2 13:44:30 2023 +0100 Commit: Andrew Cooper CommitDate: Wed Aug 2 16:25:24 2023 +0100 x86/gen-cpuid: Avoid violations of Misra rule 1.3 Add the script to the X86 section in ./MAINTAINERS. Structures or unions without any named members aren't liked by Misra (nor the C standard). Avoid emitting such for leaves without any known bits. The placeholders are affected similarly, but are only visible to MISRA in the middle of a patch series adding a new leaf. The absence of a name was intentional as these defines need to not duplicate names. As that's not deemed acceptable any more, move placeholder processing into the main loop and append the the word number to generate unique names. $ diff cpuid-autogen-{before,after}.h @@ -1034,7 +1034,7 @@ bool intel_psfd:1, ipred_ctrl:1, rrsba_ctrl:1, ddp_ctrl:1, ... #define CPUID_BITFIELD_14 \ - bool :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, ... + uint32_t _placeholder_14 #define CPUID_BITFIELD_15 \ bool :1, :1, :1, :1, avx_vnni_int8:1, avx_ne_convert:1, :1, ... @@ -1043,19 +1043,19 @@ bool rdcl_no:1, eibrs:1, rsba:1, skip_l1dfl:1, intel_ssb_no:1, ... #define CPUID_BITFIELD_17 \ - bool :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, :1, ... + uint32_t _placeholder_17 #define CPUID_BITFIELD_18 \ - uint32_t :32 /* placeholder */ + uint32_t _placeholder_18 #define CPUID_BITFIELD_19 \ - uint32_t :32 /* placeholder */ + uint32_t _placeholder_19 #define CPUID_BITFIELD_20 \ - uint32_t :32 /* placeholder */ + uint32_t _placeholder_20 #define CPUID_BITFIELD_21 \ - uint32_t :32 /* placeholder */ + uint32_t _placeholder_21 #endif /* __XEN_X86__FEATURESET_DATA__ */ No functional change. Signed-off-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- MAINTAINERS | 1 + xen/tools/gen-cpuid.py | 11 ++++++----- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d8a02a6c19..a0805d35cd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -601,6 +601,7 @@ F: xen/arch/x86/ F: xen/include/public/arch-x86/ F: xen/include/xen/lib/x86 F: xen/lib/x86 +F: xen/tools/gen-cpuid.py F: tools/firmware/hvmloader/ F: tools/firmware/rombios/ F: tools/firmware/vgabios/ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 72cf11654b..4a1ca58905 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -363,8 +363,8 @@ def crunch_numbers(state): state.deep_features = deps.keys() state.nr_deep_deps = len(state.deep_deps.keys()) - # Calculate the bitfield name declarations - for word in range(state.nr_entries): + # Calculate the bitfield name declarations. Leave 4 placeholders on the end + for word in range(state.nr_entries + 4): names = [] for bit in range(32): @@ -382,7 +382,10 @@ def crunch_numbers(state): names.append(name.lower()) - state.bitfields.append("bool " + ":1, ".join(names) + ":1") + if any(names): + state.bitfields.append("bool " + ":1, ".join(names) + ":1") + else: + state.bitfields.append("uint32_t _placeholder_%u" % (word, )) def write_results(state): @@ -464,8 +467,6 @@ def write_results(state): """) - state.bitfields += ["uint32_t :32 /* placeholder */"] * 4 - for idx, text in enumerate(state.bitfields): state.output.write( "#define CPUID_BITFIELD_%d \\\n %s\n\n" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577686.904641 (Exim 4.92) (envelope-from ) id 1qSYrY-0007cN-9e; Sun, 06 Aug 2023 08:11:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577686.904641; Sun, 06 Aug 2023 08:11:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrY-0007cF-71; Sun, 06 Aug 2023 08:11:44 +0000 Received: by outflank-mailman (input) for mailman id 577686; Sun, 06 Aug 2023 08:11:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrX-0007bz-8n for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrW-000464-UH for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYrW-0005DN-TU for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tpW+WdIiqgsoOmxFjINPmWxOL6XB37q6SlTTXze4Qds=; b=5k6Ojw/1ub0diJHvZVYWtb3SJF NcuMuDFhTraGCgz1Sw5Alqec8qrkrQb172YmYbHcaGYvZTcpsofyGOtT35Ly/G5OaMbEhrh/PZyst +rhR3CHDloGWi17/XotqnltR7p82VeUI1Ig5+QD1sEFCcedj0ZsEwsUSDZUDrEUBZyus=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm: Avoid using solaris syntax for .section directive Message-Id: Date: Sun, 06 Aug 2023 08:11:42 +0000 commit dfc490a3740bb7d6889939934afadcb58891fbce Author: Khem Raj AuthorDate: Tue Aug 1 10:49:30 2023 -0700 Commit: Julien Grall CommitDate: Wed Aug 2 22:29:52 2023 +0100 arm: Avoid using solaris syntax for .section directive Assembler from binutils 2.41 will rejects ([1], [2]) the following syntax .section "name", #alloc for any other any target other than ELF SPARC. This means we can't use it in the Arm code. So switch to the GNU syntax .section name [, "flags"[, @type]] [1] https://sourceware.org/bugzilla/show_bug.cgi?id=11601 [2] https://sourceware.org/binutils/docs-2.41/as.html#Section Signed-off-by: Khem Raj Reviewed-by: Michal Orzel [jgrall: Reword commit message] Acked-by: Julien Grall --- xen/arch/arm/arm32/proc-v7.S | 6 +++--- xen/arch/arm/dtb.S | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S index c90a31d80f..6d3d19b873 100644 --- a/xen/arch/arm/arm32/proc-v7.S +++ b/xen/arch/arm/arm32/proc-v7.S @@ -29,7 +29,7 @@ brahma15mp_init: mcr CP32(r0, ACTLR) mov pc, lr - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca15mp_proc_info, #object __v7_ca15mp_proc_info: .long 0x410FC0F0 /* Cortex-A15 */ @@ -38,7 +38,7 @@ __v7_ca15mp_proc_info: .long caxx_processor .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_ca7mp_proc_info, #object __v7_ca7mp_proc_info: .long 0x410FC070 /* Cortex-A7 */ @@ -47,7 +47,7 @@ __v7_ca7mp_proc_info: .long caxx_processor .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info - .section ".proc.info", #alloc + .section .proc.info, "a" .type __v7_brahma15mp_proc_info, #object __v7_brahma15mp_proc_info: .long 0x420F00F0 /* Broadcom Brahma-B15 */ diff --git a/xen/arch/arm/dtb.S b/xen/arch/arm/dtb.S index c39f3a095c..386f83ba64 100644 --- a/xen/arch/arm/dtb.S +++ b/xen/arch/arm/dtb.S @@ -1,3 +1,3 @@ - .section .dtb,#alloc + .section .dtb, "a" GLOBAL(_sdtb) .incbin CONFIG_DTB_FILE -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:11:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:11:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577687.904646 (Exim 4.92) (envelope-from ) id 1qSYri-0007f9-Av; Sun, 06 Aug 2023 08:11:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577687.904646; Sun, 06 Aug 2023 08:11:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYri-0007f2-8U; Sun, 06 Aug 2023 08:11:54 +0000 Received: by outflank-mailman (input) for mailman id 577687; Sun, 06 Aug 2023 08:11:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrh-0007ep-3H for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrh-00046E-1e for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYrh-0005EW-0C for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:11:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fKpWhugSTrFGQEbV2C0CEiudxRC4ZGHyiaj7SWdDQMc=; b=BxHtIwqeP5Cn+uYFZMgz/ytVMG fKYKjZhT8THpoWyyqacf/llplfmTEJgohLDDkmiwPWXMoqa/SBnAb8fjzEnVngGciWsOZa6M3qJHv AnyzRlqBqH67u3W4RnXmiRAOld1M0yRoy1CYTDHgugo62sxtD5DG4OPx4D3AwVyicA5w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: avoid shadowing of index() Message-Id: Date: Sun, 06 Aug 2023 08:11:53 +0000 commit 4f6afde88be3e8960eb311d16ac41d44ab71ed10 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:26 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 17:35:26 2023 +0200 libxl: avoid shadowing of index() Because of -Wshadow the build otherwise fails with old enough glibc. While there also obey line length limits for msr_add(). Fixes: 6d21cedbaa34 ("libxl: add support for parsing MSR features") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper --- tools/libs/light/libxl_cpuid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 5ec088b60c..0630d342b0 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,7 +157,7 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } -static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t idx) { unsigned int i = 0; libxl_cpuid_policy_list policy = *pl; @@ -167,14 +167,14 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index if (policy->msr != NULL) { for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { - if (policy->msr[i].index == index) { + if (policy->msr[i].index == idx) { return &policy->msr[i]; } } } policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); - policy->msr[i].index = index; + policy->msr[i].index = idx; memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; @@ -182,10 +182,10 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index return &policy->msr[i]; } -static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, - const char *val) +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t idx, + unsigned int bit, const char *val) { - struct xc_msr *entry = msr_find_match(policy, index); + struct xc_msr *entry = msr_find_match(policy, idx); /* Only allow options taking a character for MSRs, no values allowed. */ if (strlen(val) != 1) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:12:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577688.904650 (Exim 4.92) (envelope-from ) id 1qSYrs-0007i1-CW; Sun, 06 Aug 2023 08:12:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577688.904650; Sun, 06 Aug 2023 08:12:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrs-0007ht-9x; Sun, 06 Aug 2023 08:12:04 +0000 Received: by outflank-mailman (input) for mailman id 577688; Sun, 06 Aug 2023 08:12:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrr-0007hd-5g for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYrr-00046Y-4l for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYrr-0005F4-3k for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1lxj3bvE/wRxCAZJGgpubDKVtbvLm7+O/BcQEjdlHNk=; b=POjAXfCJMbP/tehlzPsIivs2/o mjD123iL+efnXbHoF/kK8n/HSZ4s1B91CecMogPlCUH+E09yx4GJPsv4JquNs0ws7j5gbOHLxEOSo G0pbwOOjeIxEqQ0RoW+kGeU2DVwqcbWPCfCje+U0/id9cxyIkk3NzISRrQJddFCrMqPo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: allow building with old gcc again Message-Id: Date: Sun, 06 Aug 2023 08:12:03 +0000 commit 1aa5acbbec3f37bf38d78fa96d210053f8e8efd5 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:39 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 3 17:35:39 2023 +0200 libxl: allow building with old gcc again We can't use initializers of unnamed struct/union members just yet. Fixes: d638fe233cb3 ("libxl: use the cpuid feature names from cpufeatureset.h") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper --- tools/libs/light/libxl_cpuid.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 0630d342b0..849722541c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -316,12 +316,16 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) uint32_t index; unsigned int reg; } msr; - }; + } u; } feature_to_policy[] = { #define CPUID_ENTRY(l, s, r) \ - { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } + { .type = FEAT_CPUID, \ + .u = { .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } \ + } #define MSR_ENTRY(i, r) \ - { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + { .type = FEAT_MSR, \ + .u = { .msr.index = i, .msr.reg = r } \ + } CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), @@ -380,9 +384,9 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) struct cpuid_flags f; f.name = feat->name; - f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; - f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; - f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.leaf = feature_to_policy[feat->bit / 32].u.cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].u.cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].u.cpuid.reg; f.bit = feat->bit % 32; f.length = 1; @@ -393,10 +397,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { unsigned int bit = feat->bit % 32; - if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + if (feature_to_policy[feat->bit / 32].u.msr.reg == CPUID_REG_EDX) bit += 32; - return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + return msr_add(policy, feature_to_policy[feat->bit / 32].u.msr.index, bit, val); } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:12:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577689.904654 (Exim 4.92) (envelope-from ) id 1qSYs2-0007kH-EO; Sun, 06 Aug 2023 08:12:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577689.904654; Sun, 06 Aug 2023 08:12:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYs2-0007k9-BO; Sun, 06 Aug 2023 08:12:14 +0000 Received: by outflank-mailman (input) for mailman id 577689; Sun, 06 Aug 2023 08:12:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYs1-0007jz-8k for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYs1-00046g-7w for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYs1-0005FZ-72 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Kj2kAxT4L/vm492qJ9pBCkkq/8/bD5V/oy7ihLNz/tc=; b=HKW19OpVL8u6Pr+lkbKUPj7laL dFTLo/C2Es8pOyAE4S1DF3aIkU3Xy1ckwtebwfC1faPuXnBthElEPNhLv/TSyNhljINswy+RqKmkd Dt4sxPnHS+4iMPAUnk5oNBomOew068gpkfolAKRIH6/L6gcQCwb0BllJNc1+Cd5RAghI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: Constify the vCPU parameter for expand_xsave_states() Message-Id: Date: Sun, 06 Aug 2023 08:12:13 +0000 commit 092cae024ab6cd9bd5788eb6ca3ae1a05e796c0a Author: Julien Grall AuthorDate: Wed Aug 2 16:47:05 2023 +0100 Commit: Julien Grall CommitDate: Thu Aug 3 17:41:41 2023 +0100 xen/x86: Constify the vCPU parameter for expand_xsave_states() expand_xsave_states() is not meant to modify the vCPU. So the parameter can be const. Signed-off-by: Julien Grall Acked-by: Jan Beulich --- xen/arch/x86/include/asm/xstate.h | 2 +- xen/arch/x86/xstate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/xstate.h b/xen/arch/x86/include/asm/xstate.h index 7ab0bdde89..c08c267884 100644 --- a/xen/arch/x86/include/asm/xstate.h +++ b/xen/arch/x86/include/asm/xstate.h @@ -100,7 +100,7 @@ int __must_check validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr); int __must_check handle_xsetbv(u32 index, u64 new_bv); -void expand_xsave_states(struct vcpu *v, void *dest, unsigned int size); +void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size); void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size); /* extended state init and cleanup functions */ diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 92496f3795..3d566252ea 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -172,7 +172,7 @@ static void setup_xstate_comp(uint16_t *comp_offsets, * It is the callers responsibility to ensure that there is xsave state to * serialise, and that the provided buffer is exactly the right size. */ -void expand_xsave_states(struct vcpu *v, void *dest, unsigned int size) +void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size) { const struct xsave_struct *xsave = v->arch.xsave_area; const void *src; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:12:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577690.904657 (Exim 4.92) (envelope-from ) id 1qSYsC-0007nO-FN; Sun, 06 Aug 2023 08:12:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577690.904657; Sun, 06 Aug 2023 08:12:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsC-0007nH-Cp; Sun, 06 Aug 2023 08:12:24 +0000 Received: by outflank-mailman (input) for mailman id 577690; Sun, 06 Aug 2023 08:12:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsB-0007n3-Bl for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsB-00046n-Av for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYsB-0005GA-A8 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2oOzxIk+yBRJjJa/d86Ox4NHgXUu3OC+2ZlQovUxSU0=; b=yOaeC0QJUZ6iGB4Byln1fR9K06 wluqcOGzz03vpoExLVXQ6St8C/wAIiSAJB6jpC7sKgZ6uK5ll3rC7p4R210lSf7kVSdlmHVjcsX3c np2CcbqjPkPbsn5p/p8pa+2ZJ1wjqbry2k476lzE13rJ82Sg5FLKxm5F9t/EQQCPJOtc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: add support for tag pipelines Message-Id: Date: Sun, 06 Aug 2023 08:12:23 +0000 commit 4d687adc8c77b5299d9aa5ece3d9bdcc538fdc16 Author: Simone Ballarin AuthorDate: Tue Aug 1 11:57:01 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 3 18:17:13 2023 -0700 automation/eclair: add support for tag pipelines The ECLAIR jobs fail when triggered by tag pipelines (e.g. xen-project/patchew/xen). This patch extends the integration to support such pipelines. Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/action.settings | 24 ++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/action.settings b/automation/eclair_analysis/ECLAIR/action.settings index 96426811a8..71c10d5141 100644 --- a/automation/eclair_analysis/ECLAIR/action.settings +++ b/automation/eclair_analysis/ECLAIR/action.settings @@ -41,7 +41,7 @@ github) push | workflow_dispatch) event=push # Extract the branch name from "refs/heads/" - branch="${GITHUB_REF#refs/heads/}" + ref="${GITHUB_REF#refs/heads/}" headCommitId="${GITHUB_SHA}" pushUser="${GITHUB_ACTOR}" ;; @@ -75,7 +75,13 @@ gitlab) ;; push | pipeline | web) event=push - branch="${CI_COMMIT_BRANCH}" + if [ -n "${CI_COMMIT_BRANCH:-}" ]; then + ref_kind=branch + ref="${CI_COMMIT_BRANCH}" + else + ref_kind=tag + ref="${CI_COMMIT_TAG}" + fi headCommitId="${CI_COMMIT_SHA}" pushUser="${GITLAB_USER_NAME}" ;; @@ -99,7 +105,7 @@ jenkins) jenkinsBotToken="${ECLAIR_BOT_TOKEN:-}" event=push - branch="${GIT_BRANCH}" + ref="${GIT_BRANCH}" headCommitId="${GIT_COMMIT}" pushUser=$(git show --pretty='format:%aN' -s) ;; @@ -111,7 +117,7 @@ esac if [ "${event}" = "push" ] && [ -n "${autoPRBranch:-}" ]; then # AUTO PR Feature enabled - if ! [ "${branch}" = "${autoPRBranch}" ] || + if ! [ "${ref}" = "${autoPRBranch}" ] || ! [ "${repository}" = "${autoPRRepository}" ]; then event=auto_pull_request fi @@ -123,17 +129,17 @@ pull_request) jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: ${pullRequestUser} wants to merge ${pullRequestHeadRepo}:${pullRequestHeadRef} (${headCommitId}) into ${pullRequestBaseRef} (${baseCommitId})" ;; push) - subDir="${branch}" - jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: branch ${branch} (${headCommitId})" - badgeLabel="ECLAIR ${ANALYSIS_KIND} ${branch}${variantHeadline} #${jobId}" + subDir="${ref}" + jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: ${ref_kind} ${ref} (${headCommitId})" + badgeLabel="ECLAIR ${ANALYSIS_KIND} ${ref}${variantHeadline} #${jobId}" ;; auto_pull_request) git remote remove autoPRRemote || true git remote add autoPRRemote "${autoPRRemoteUrl}" git fetch -q autoPRRemote - subDir="${branch}" + subDir="${ref}" baseCommitId=$(git merge-base "autoPRRemote/${autoPRBranch}" HEAD) - jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: ${pushUser} wants to merge ${repository}:${branch} (${headCommitId}) into ${autoPRRepository}/${autoPRBranch} (${baseCommitId})" + jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: ${pushUser} wants to merge ${repository}:${ref} (${headCommitId}) into ${autoPRRepository}/${autoPRBranch} (${baseCommitId})" ;; *) echo "Unexpected event ${event}" >&2 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:12:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577691.904661 (Exim 4.92) (envelope-from ) id 1qSYsM-0007qN-HK; Sun, 06 Aug 2023 08:12:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577691.904661; Sun, 06 Aug 2023 08:12:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsM-0007qG-EP; Sun, 06 Aug 2023 08:12:34 +0000 Received: by outflank-mailman (input) for mailman id 577691; Sun, 06 Aug 2023 08:12:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsL-0007q6-Ef for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsL-00046v-Du for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYsL-0005Gb-D5 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OIGy939xvvsBUiLddsACWddRTyTFi+GE8+C4S51SgsI=; b=1OAGJgARbC0DubV+gJeQabXubC d9nkXX5LpCaDMvv+k1cyLC3wQEikJPuKdv4KWz4sJrLVBsiBRCvIWSoCjqtSu72GG7yQYlvvGKdkO fApTI2HK8pQk3ARbfCN4n2sYBzLRjI3WA5QAsBVLhnBceCqMmiVd5Szj5mOFge+8WVGE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: add direct link to reports Message-Id: Date: Sun, 06 Aug 2023 08:12:33 +0000 commit 5499c75c21a7f5fd2832c0107ab8b5936fc2b466 Author: Simone Ballarin AuthorDate: Tue Aug 1 11:57:02 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 3 18:17:13 2023 -0700 automation/eclair: add direct link to reports This patch adds direct links to the analysis findings in the console log. Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/action.helpers | 84 ++++++++++++++++++------ 1 file changed, 65 insertions(+), 19 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/action.helpers b/automation/eclair_analysis/ECLAIR/action.helpers index 2ad6428eaa..df9bf2bd11 100644 --- a/automation/eclair_analysis/ECLAIR/action.helpers +++ b/automation/eclair_analysis/ECLAIR/action.helpers @@ -1,17 +1,26 @@ +esc=$(printf '\e') +cr=$(printf '\r') + if [ -n "${GITLAB_CI:-}" ]; then ci=gitlab + eol= + link_start="${esc}[33m" + link_end="${esc}[m" elif [ -n "${GITHUB_ACTION:-}" ]; then ci=github + eol="\\" + link_start= + link_end= elif [ -n "${JENKINS_HOME:-}" ]; then ci=jenkins + eol="
" + link_start= + link_end= else echo "Unexpected CI/CD context" >&2 exit 1 fi -esc=$(printf '\e') -cr=$(printf '\r') - open_section() { id=$1 title=$2 @@ -36,54 +45,86 @@ summary() { case "${ci}" in github) - nl="\\" + eol="\\" ;; gitlab) - nl= + eol= ;; jenkins) - nl="
" + eol="
" ;; *) - nl= + eol= ;; esac + currentDbReportsUrl="${eclairReportUrlPrefix}/fs${jobDir}/PROJECT.ecd;/by_service.html#service&kind" if [ -z "${newReports}" ]; then - fixedMsg= + fixedMsg="No fixed reports as there is no baseline" unfixedMsg="Unfixed reports: ${unfixedReports}" - countsMsg="${unfixedMsg}" + referenceReportsMsgTxt= + referenceReportsMsgLog= else fixedMsg="Fixed reports: ${fixedReports}" unfixedMsg="Unfixed reports: ${unfixedReports} [new: ${newReports}]" - countsMsg="${fixedMsg}${nl} -${unfixedMsg}" + case "${event}" in + pull_request | auto_pull_request) + referenceDbReportsUrl="${eclairReportUrlPrefix}/fs${jobDir}/base/PROJECT.ecd;/by_service.html#service&kind" + reference_kind=base + ;; + push) + referenceDbReportsUrl="${eclairReportUrlPrefix}/fs${jobDir}/prev/PROJECT.ecd;/by_service.html#service&kind" + reference_kind=previous + ;; + *) + echo "Unexpected event ${event}" >&2 + exit 1 + ;; + esac fi + case "${ci}" in jenkins) + if [ -n "${newReports}" ]; then + referenceReportsMsgTxt="Browse ${reference_kind} reports" + fi cat <"${summaryTxt}" -${countsMsg} ${nl} +${fixedMsg}${eol} +${unfixedMsg} ${eol}

${jobHeadline}

-Browse analysis results +Browse analysis summary +Browse current reports +${referenceReportsMsgTxt} EOF ;; *) + if [ -n "${newReports}" ]; then + referenceReportsMsgTxt="Browse ${reference_kind} reports: ${referenceDbReportsUrl}" + fi cat <"${summaryTxt}" Analysis Summary -${jobHeadline}${nl} -${countsMsg}${nl} -[Browse analysis](${indexHtmlUrl}) +${jobHeadline}${eol} +${fixedMsg}${eol} +${unfixedMsg}${eol} +Browse analysis summary: ${indexHtmlUrl} +Browse current reports: ${currentDbReportsUrl} +${referenceReportsMsgTxt} EOF ;; esac + analysisSummaryMsgLog="Browse analysis summary: ${link_start}${indexHtmlUrl}${link_end}" + currentReportsMsgLog="Browse current reports: ${link_start}${currentDbReportsUrl}${link_end}" + if [ -n "${newReports}" ]; then + referenceReportsMsgLog="Browse ${reference_kind} reports: ${link_start}${referenceDbReportsUrl}${link_end}" + fi case ${ci} in github) cat "${summaryTxt}" >"${GITHUB_STEP_SUMMARY}" @@ -93,8 +134,11 @@ EOF # Generate summary and print it (GitLab-specific) cat < Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577692.904668 (Exim 4.92) (envelope-from ) id 1qSYsW-0007tL-LM; Sun, 06 Aug 2023 08:12:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577692.904668; Sun, 06 Aug 2023 08:12:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsW-0007tD-Hh; Sun, 06 Aug 2023 08:12:44 +0000 Received: by outflank-mailman (input) for mailman id 577692; Sun, 06 Aug 2023 08:12:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsV-0007t1-Hd for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsV-00047Q-Gs for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYsV-0005H1-G1 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:12:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8vpo6T9xIRPZvz+HxvyJ7tPW4qKHdIQOwUmSszT5Qn0=; b=vXmS6tS2YAXStX40G7PnHJo7lw Ysi5+dkzzca7JA5OQu0YfKgCkC1i0OtYSjlFy6GKD98ftf6g71XruMB4RtmSj1vFBAuxTpG4Igq5o hvgTAn+mbDFDvkAL8xlDlGwBGy1W0AsnVklLBqXVB94ZjsFkkvMSYkinYsrC4oKOKi10=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: add scheduled pipelines Message-Id: Date: Sun, 06 Aug 2023 08:12:43 +0000 commit 0d3d7eb82f4d6dca0b07359868ade1b3fc313a13 Author: Simone Ballarin AuthorDate: Tue Aug 1 11:57:03 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 3 18:17:14 2023 -0700 automation/eclair: add scheduled pipelines This patch introduces six new ECLAIR jobs that run only when triggered by a GitLab scheduled pipeline. Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/action.settings | 2 +- automation/gitlab-ci/analyze.yaml | 65 +++++++++++++++++++++-- 2 files changed, 62 insertions(+), 5 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/action.settings b/automation/eclair_analysis/ECLAIR/action.settings index 71c10d5141..528bc24c72 100644 --- a/automation/eclair_analysis/ECLAIR/action.settings +++ b/automation/eclair_analysis/ECLAIR/action.settings @@ -73,7 +73,7 @@ gitlab) headCommitId="${CI_COMMIT_SHA}" baseCommitId="${CI_MERGE_REQUEST_DIFF_BASE_SHA}" ;; - push | pipeline | web) + push | pipeline | web | schedule) event=push if [ -n "${CI_COMMIT_BRANCH:-}" ]; then ref_kind=branch diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 3d8166572b..3325ef9d9a 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -8,6 +8,8 @@ ENABLE_ECLAIR_BOT: "n" AUTO_PR_BRANCH: "staging" AUTO_PR_REPOSITORY: "xen-project/xen" + script: + - ./automation/scripts/eclair 2>&1 | tee "${LOGFILE}" artifacts: when: always paths: @@ -23,8 +25,6 @@ eclair-x86_64: LOGFILE: "eclair-x86_64.log" VARIANT: "X86_64" RULESET: "Set1" - script: - - ./automation/scripts/eclair 2>&1 | tee "${LOGFILE}" allow_failure: true eclair-ARM64: @@ -33,6 +33,63 @@ eclair-ARM64: LOGFILE: "eclair-ARM64.log" VARIANT: "ARM64" RULESET: "Set1" - script: - - ./automation/scripts/eclair 2>&1 | tee "${LOGFILE}" + allow_failure: true + +.eclair-analysis:on-schedule: + extends: .eclair-analysis + rules: + - if: $CI_PIPELINE_SOURCE == "schedule" + +eclair-x86_64-Set1:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "X86_64" + RULESET: "Set1" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" + allow_failure: true + +eclair-x86_64-Set2:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "X86_64" + RULESET: "Set2" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" + allow_failure: true + +eclair-x86_64-Set3:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "X86_64" + RULESET: "Set3" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" + allow_failure: true + +eclair-ARM64-Set1:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "ARM64" + RULESET: "Set1" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" + allow_failure: true + +eclair-ARM64-Set2:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "ARM64" + RULESET: "Set2" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" + allow_failure: true + +eclair-ARM64-Set3:on-schedule: + extends: .eclair-analysis:on-schedule + variables: + VARIANT: "ARM64" + RULESET: "Set3" + ANALYSIS_KIND: "${RULESET}-scheduled" + LOGFILE: "eclair-${VARIANT}-${RULESET}.log" allow_failure: true -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:12:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:12:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577693.904669 (Exim 4.92) (envelope-from ) id 1qSYsg-0007w1-Lk; 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Sun, 06 Aug 2023 08:12:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UN+WnGn8bqOw7+NTY7HlsXXfW9iXmOKwcoq8BTs8lSI=; b=PDQBJA0Ijr7WUhND0q99F0EQfF j+xzDVwaFh655KFDmFZ116oz33CGobGpC916uaZhEyZXfk/I9002zWWW1CIoPRTUg7w73U+i07vWo PtGhLjEFgcCZRbmjJdlbgQ/zHSZWvfF+8903oF/OecMlsb5kSW6764L0/f6CkIBULFic=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: avoid failure in case of missing merge point Message-Id: Date: Sun, 06 Aug 2023 08:12:53 +0000 commit 4a6448fd6497ad7952cd0baacec1869f6791de9e Author: Simone Ballarin AuthorDate: Tue Aug 1 11:57:04 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 3 18:17:14 2023 -0700 automation/eclair: avoid failure in case of missing merge point In the context of an auto pull request, when a common merge point is not found the integration will continue the analysis without failing. Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/action.settings | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/automation/eclair_analysis/ECLAIR/action.settings b/automation/eclair_analysis/ECLAIR/action.settings index 528bc24c72..f96368ffc7 100644 --- a/automation/eclair_analysis/ECLAIR/action.settings +++ b/automation/eclair_analysis/ECLAIR/action.settings @@ -138,7 +138,9 @@ auto_pull_request) git remote add autoPRRemote "${autoPRRemoteUrl}" git fetch -q autoPRRemote subDir="${ref}" - baseCommitId=$(git merge-base "autoPRRemote/${autoPRBranch}" HEAD) + if ! baseCommitId=$(git merge-base "autoPRRemote/${autoPRBranch}" HEAD); then + baseCommitId=no_merge_point + fi jobHeadline="ECLAIR ${ANALYSIS_KIND} on repository ${repository}: ${pushUser} wants to merge ${repository}:${ref} (${headCommitId}) into ${autoPRRepository}/${autoPRBranch} (${baseCommitId})" ;; *) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 06 08:13:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 06 Aug 2023 08:13:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.577694.904674 (Exim 4.92) (envelope-from ) id 1qSYsr-0007yx-Nd; Sun, 06 Aug 2023 08:13:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 577694.904674; Sun, 06 Aug 2023 08:13:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsr-0007yp-Kj; Sun, 06 Aug 2023 08:13:05 +0000 Received: by outflank-mailman (input) for mailman id 577694; Sun, 06 Aug 2023 08:13:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsp-0007yb-Nd for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:13:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qSYsp-00047r-Mi for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:13:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qSYsp-0005I6-M1 for xen-changelog@lists.xenproject.org; Sun, 06 Aug 2023 08:13:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=j+qDMI+K06O7UcaGJThOlIDxLwMTU3aEyABuEJxBzLc=; b=LojdYnNsaz+OwWXiW3NQb1HKYE 9WIhjXiMYtuE8KMZ5IaaabGXWmJHkEyh6rwS1YBmz72qIcHJsNfYhjEEYOpcg04qc3EWHrk3gtkFO Imx8b1w/QC4Apg5pOU9dQjelPIA5L0ux0xyXB3pfiH6Yd271WhD2r3GTbfNzFjw+PsT0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: add missing "needs" Message-Id: Date: Sun, 06 Aug 2023 08:13:03 +0000 commit e55146071de9257d70bd157047700071d0007622 Author: Stefano Stabellini AuthorDate: Thu Aug 3 18:10:18 2023 -0700 Commit: Stefano Stabellini CommitDate: Fri Aug 4 14:35:16 2023 -0700 automation: add missing "needs" The test artifacts export jobs don't need prerequisites, so we should specify "needs" with an empty array for them. That way, they are not going to fruitlessly wait for previous jobs (ECLAIR jobs) to complete before continuing. Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- automation/gitlab-ci/build.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f01e2c32bb..af64a53ead 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -268,6 +268,7 @@ .test-jobs-artifact-common: stage: build + needs: [] except: !reference [.test-jobs-common, except] # Arm test artifacts -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580549.908808 (Exim 4.92) (envelope-from ) id 1qTVQp-0003QC-L7; Tue, 08 Aug 2023 22:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580549.908808; Tue, 08 Aug 2023 22:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQp-0003Q4-I0; Tue, 08 Aug 2023 22:44:03 +0000 Received: by outflank-mailman (input) for mailman id 580549; Tue, 08 Aug 2023 22:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQo-0003Py-9X for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQo-0001fg-8j for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVQo-0002uC-7K for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jo4wQz01S7pIMW0L4S+jnN48a8SpPsQvPrEr209Krw0=; b=XLcqbiS57wFK9Hf0Afqr7cpUUa lpS38UDWqH4YK0yT3nC5q4OfgRsHetwHzwLd8PgmWvA1QbgIeW/5/yqh29/FktbUD1jS9vdlQ5jAx asDW6r2Yto4RBSrQw0jmxrwloexkjLHaj39n5wZH25PaY7AH5+5pVwTW8KUDUrYi5w48=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/HVM: drop dead assignments from hvmemul_rep_{movs,stos}() Message-Id: Date: Tue, 08 Aug 2023 22:44:02 +0000 commit a628e73de1f4839b58f3ef4026ade3e06f7e54ea Author: Jan Beulich AuthorDate: Mon Aug 7 11:20:15 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:20:15 2023 +0200 x86/HVM: drop dead assignments from hvmemul_rep_{movs,stos}() In the latter case the variable altogether is then unused and hence gets dropped, eliminating a Misra Rule 5.3 violation. I'm afraid I mistakenly introduced both assignments in 57a57465daaf ("x86/HVM: use available linear->phys translations in REP MOVS/STOS handling"), likely as a result of some re-work on the patch. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Reviewed-by: Stefano Stabellini Reviewed-by: Paul Durrant --- xen/arch/x86/hvm/emulate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 75ee98a73b..9b6e4c8bc6 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -1861,7 +1861,6 @@ static int cf_check hvmemul_rep_movs( return rc; } - bytes = PAGE_SIZE - (daddr & ~PAGE_MASK); if ( hvio->mmio_access.write_access && (hvio->mmio_gla == (daddr & PAGE_MASK)) && /* See comment above. */ @@ -1988,7 +1987,7 @@ static int cf_check hvmemul_rep_stos( container_of(ctxt, struct hvm_emulate_ctxt, ctxt); struct vcpu *curr = current; struct hvm_vcpu_io *hvio = &curr->arch.hvm.hvm_io; - unsigned long addr, bytes; + unsigned long addr; paddr_t gpa; p2m_type_t p2mt; bool_t df = !!(ctxt->regs->eflags & X86_EFLAGS_DF); @@ -1998,7 +1997,6 @@ static int cf_check hvmemul_rep_stos( if ( rc != X86EMUL_OKAY ) return rc; - bytes = PAGE_SIZE - (addr & ~PAGE_MASK); if ( hvio->mmio_access.write_access && (hvio->mmio_gla == (addr & PAGE_MASK)) && /* See respective comment in MOVS processing. */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580550.908811 (Exim 4.92) (envelope-from ) id 1qTVQz-0003SN-MI; Tue, 08 Aug 2023 22:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580550.908811; Tue, 08 Aug 2023 22:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQz-0003SG-Jf; Tue, 08 Aug 2023 22:44:13 +0000 Received: by outflank-mailman (input) for mailman id 580550; Tue, 08 Aug 2023 22:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQy-0003S6-DO for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVQy-0001fo-Cc for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVQy-0002uh-BF for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LxybSfQtPmdAA+n5Y4hQinEPhXBE9Y7DR/0dCrCLfG8=; b=cge8uTGD0J2q2KS+QNl7ql0jd3 n9zx9Oc9UAH8iwKDw6EGYz3wx5/rlQHUY7+yT3yFpZ437M+qxnjKNszfDaHrjx+HffX4wUWmpfmaD XAnTGRqVkKYLlIFbmlOT8PBeRtTjaO4z+MDz6tP38JpKIrqQg2Bg4ZfC5dcGzLvtiNGE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/sched: mechanical renaming to address MISRA C:2012 Rule 5.3 Message-Id: Date: Tue, 08 Aug 2023 22:44:12 +0000 commit e26230a34982d8b771734cf43dbdc87864329d5a Author: Nicola Vetrini AuthorDate: Mon Aug 7 11:21:24 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:21:24 2023 +0200 xen/sched: mechanical renaming to address MISRA C:2012 Rule 5.3 Rule 5.3 has the following headline: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" The renaming s/sched_id/scheduler_id/ of the function defined in 'xen/common/sched/core.c' prevents any hiding of that function by the instances of homonymous function parameters that are defined in inner scopes. Similarly, the renames - s/ops/operations/ for the static variable in 'xen/common/sched/core.c' - s/do_softirq/needs_softirq/ are introduced for variables, to avoid any conflict with homonymous parameters or function identifiers. Moreover, the variable 'loop' defined at 'xen/common/sched/credit2.c:3887' has been dropped, in favour of the homonymous variable declared in the outer scope. This in turn requires a modification of the printk call that involves it. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Dario Faggioli --- xen/common/sched/core.c | 28 ++++++++++++++-------------- xen/common/sched/credit2.c | 6 +++--- xen/common/sysctl.c | 2 +- xen/include/xen/sched.h | 2 +- 4 files changed, 19 insertions(+), 19 deletions(-) diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c index 022f548652..12deefa745 100644 --- a/xen/common/sched/core.c +++ b/xen/common/sched/core.c @@ -91,7 +91,7 @@ extern const struct scheduler *__start_schedulers_array[], *__end_schedulers_arr #define NUM_SCHEDULERS (__end_schedulers_array - __start_schedulers_array) #define schedulers __start_schedulers_array -static struct scheduler __read_mostly ops; +static struct scheduler __read_mostly operations; static bool scheduler_active; @@ -171,7 +171,7 @@ static inline struct scheduler *dom_scheduler(const struct domain *d) * is the default scheduler that has been, choosen at boot. */ ASSERT(is_idle_domain(d)); - return &ops; + return &operations; } static inline struct scheduler *unit_scheduler(const struct sched_unit *unit) @@ -2040,10 +2040,10 @@ long do_set_timer_op(s_time_t timeout) return 0; } -/* sched_id - fetch ID of current scheduler */ -int sched_id(void) +/* scheduler_id - fetch ID of current scheduler */ +int scheduler_id(void) { - return ops.sched_id; + return operations.sched_id; } /* Adjust scheduling parameter for a given domain. */ @@ -2579,7 +2579,7 @@ static void cf_check sched_slave(void) struct sched_unit *prev = vprev->sched_unit, *next; s_time_t now; spinlock_t *lock; - bool do_softirq = false; + bool needs_softirq = false; unsigned int cpu = smp_processor_id(); ASSERT_NOT_IN_ATOMIC(); @@ -2604,7 +2604,7 @@ static void cf_check sched_slave(void) return; } - do_softirq = true; + needs_softirq = true; } if ( !prev->rendezvous_in_cnt ) @@ -2614,7 +2614,7 @@ static void cf_check sched_slave(void) rcu_read_unlock(&sched_res_rculock); /* Check for failed forced context switch. */ - if ( do_softirq ) + if ( needs_softirq ) raise_softirq(SCHEDULE_SOFTIRQ); return; @@ -3016,14 +3016,14 @@ void __init scheduler_init(void) BUG_ON(!scheduler); printk("Using '%s' (%s)\n", scheduler->name, scheduler->opt_name); } - ops = *scheduler; + operations = *scheduler; if ( cpu_schedule_up(0) ) BUG(); register_cpu_notifier(&cpu_schedule_nfb); - printk("Using scheduler: %s (%s)\n", ops.name, ops.opt_name); - if ( sched_init(&ops) ) + printk("Using scheduler: %s (%s)\n", operations.name, operations.opt_name); + if ( sched_init(&operations) ) panic("scheduler returned error on init\n"); if ( sched_ratelimit_us && @@ -3363,7 +3363,7 @@ int schedule_cpu_rm(unsigned int cpu, struct cpu_rm_data *data) struct scheduler *scheduler_get_default(void) { - return &ops; + return &operations; } struct scheduler *scheduler_alloc(unsigned int sched_id) @@ -3392,7 +3392,7 @@ struct scheduler *scheduler_alloc(unsigned int sched_id) void scheduler_free(struct scheduler *sched) { - BUG_ON(sched == &ops); + BUG_ON(sched == &operations); sched_deinit(sched); xfree(sched); } @@ -3416,7 +3416,7 @@ void schedule_dump(struct cpupool *c) } else { - sched = &ops; + sched = &operations; cpus = &cpupool_free_cpus; } diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index 87a1e31ee9..fc583915df 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -3874,7 +3874,7 @@ csched2_dump(const struct scheduler *ops) lock = unit_schedule_lock(unit); - printk("\t%3d: ", ++loop); + printk("\t%3u: ", ++loop); csched2_dump_unit(prv, svc); unit_schedule_unlock(lock, unit); @@ -3884,8 +3884,8 @@ csched2_dump(const struct scheduler *ops) list_for_each_entry ( rqd, &prv->rql, rql ) { struct list_head *iter, *runq = &rqd->runq; - int loop = 0; + loop = 0; /* We need the lock to scan the runqueue. */ spin_lock(&rqd->lock); @@ -3901,7 +3901,7 @@ csched2_dump(const struct scheduler *ops) if ( svc ) { - printk("\t%3d: ", loop++); + printk("\t%3u: ", loop++); csched2_dump_unit(prv, svc); } } diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c index 0cbfe8bd44..7cabfb0230 100644 --- a/xen/common/sysctl.c +++ b/xen/common/sysctl.c @@ -71,7 +71,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) break; case XEN_SYSCTL_sched_id: - op->u.sched_id.sched_id = sched_id(); + op->u.sched_id.sched_id = scheduler_id(); break; case XEN_SYSCTL_getdomaininfolist: diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 854f3e32c0..bfe714d2e2 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -791,7 +791,7 @@ int sched_init_domain(struct domain *d, unsigned int poolid); void sched_destroy_domain(struct domain *d); long sched_adjust(struct domain *, struct xen_domctl_scheduler_op *); long sched_adjust_global(struct xen_sysctl_scheduler_op *); -int sched_id(void); +int scheduler_id(void); /* * sched_get_id_by_name - retrieves a scheduler id given a scheduler name -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580551.908816 (Exim 4.92) (envelope-from ) id 1qTVR9-0003VE-O3; Tue, 08 Aug 2023 22:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580551.908816; Tue, 08 Aug 2023 22:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVR9-0003V6-LB; Tue, 08 Aug 2023 22:44:23 +0000 Received: by outflank-mailman (input) for mailman id 580551; Tue, 08 Aug 2023 22:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVR8-0003Ut-Gh for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVR8-0001gB-Fx for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVR8-0002vH-F4 for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qoAfMRTLS7XIyEYOwRtN486Y7Z9HNQIXmMROf2iK6BQ=; b=uY6N3eYLc5KKPwwVOgqIqWlptf rRfWQj7XAzdK0jC1QuwfauiAiszs5ag9m97hR4cf4moOEOeUpE9DamhhD84RKTNykYswF6SE6ZElS gMOVVyISNW3Cpw4kucB6yeKi8tDIid13D410pzoSGHLzG34HZwYe/i3LTgKfj/DNTlw8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/sched: address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Tue, 08 Aug 2023 22:44:22 +0000 commit 680e66544caa5cf5dbb55e0b160733f61d9157c1 Author: Federico Serafini AuthorDate: Mon Aug 7 11:22:24 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:22:24 2023 +0200 xen/sched: address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter names and types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional changes. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Dario Faggioli --- xen/common/sched/compat.c | 2 +- xen/common/sched/credit2.c | 3 ++- xen/common/sched/private.h | 2 +- xen/include/xen/sched.h | 10 +++++----- 4 files changed, 9 insertions(+), 8 deletions(-) diff --git a/xen/common/sched/compat.c b/xen/common/sched/compat.c index 040b4caca2..a596e3a226 100644 --- a/xen/common/sched/compat.c +++ b/xen/common/sched/compat.c @@ -39,7 +39,7 @@ static int compat_poll(struct compat_sched_poll *compat) #include "core.c" -int compat_set_timer_op(u32 lo, s32 hi) +int compat_set_timer_op(uint32_t lo, int32_t hi) { return do_set_timer_op(((s64)hi << 32) | lo); } diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index fc583915df..c76330d79d 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -1480,7 +1480,8 @@ static inline void runq_remove(struct csched2_unit *svc) list_del_init(&svc->runq_elem); } -void burn_credits(struct csched2_runqueue_data *rqd, struct csched2_unit *, s_time_t); +void burn_credits(struct csched2_runqueue_data *rqd, struct csched2_unit *svc, + s_time_t now); static inline void tickle_cpu(unsigned int cpu, struct csched2_runqueue_data *rqd) diff --git a/xen/common/sched/private.h b/xen/common/sched/private.h index 0527a8c70d..c516976c37 100644 --- a/xen/common/sched/private.h +++ b/xen/common/sched/private.h @@ -629,7 +629,7 @@ int cpu_disable_scheduler(unsigned int cpu); int schedule_cpu_add(unsigned int cpu, struct cpupool *c); struct cpu_rm_data *alloc_cpu_rm_data(unsigned int cpu, bool aff_alloc); void free_cpu_rm_data(struct cpu_rm_data *mem, unsigned int cpu); -int schedule_cpu_rm(unsigned int cpu, struct cpu_rm_data *mem); +int schedule_cpu_rm(unsigned int cpu, struct cpu_rm_data *data); int sched_move_domain(struct domain *d, struct cpupool *c); void sched_migrate_timers(unsigned int cpu); struct cpupool *cpupool_get_by_id(unsigned int poolid); diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index bfe714d2e2..b4f43cd410 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -789,8 +789,8 @@ int sched_init_vcpu(struct vcpu *v); void sched_destroy_vcpu(struct vcpu *v); int sched_init_domain(struct domain *d, unsigned int poolid); void sched_destroy_domain(struct domain *d); -long sched_adjust(struct domain *, struct xen_domctl_scheduler_op *); -long sched_adjust_global(struct xen_sysctl_scheduler_op *); +long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op); +long sched_adjust_global(struct xen_sysctl_scheduler_op *op); int scheduler_id(void); /* @@ -831,11 +831,11 @@ void context_switch( /* * As described above, context_switch() must call this function when the - * local CPU is no longer running in @prev's context, and @prev's context is + * local CPU is no longer running in @vprev's context, and @vprev's context is * saved to memory. Alternatively, if implementing lazy context switching, - * ensure that invoking sync_vcpu_execstate() will switch and commit @prev. + * ensure that invoking sync_vcpu_execstate() will switch and commit @vprev. */ -void sched_context_switched(struct vcpu *prev, struct vcpu *vnext); +void sched_context_switched(struct vcpu *vprev, struct vcpu *vnext); /* Called by the scheduler to continue running the current VCPU. */ void continue_running( -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580552.908821 (Exim 4.92) (envelope-from ) id 1qTVRJ-0003Y4-Pq; Tue, 08 Aug 2023 22:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580552.908821; Tue, 08 Aug 2023 22:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRJ-0003Xw-Mc; Tue, 08 Aug 2023 22:44:33 +0000 Received: by outflank-mailman (input) for mailman id 580552; Tue, 08 Aug 2023 22:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRI-0003Xm-KI for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRI-0001gK-JX for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVRI-0002vl-IB for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=nW50583AuzDNVOi9I8IJhoQ6d6GnAWI1cZqL0U1TrTw=; b=4Yl0BJTooJOynL9KPsnetX28w4 zAXNne+WYs1woIYILnxfbvW/4afd6PYrVPgJKQWrLUEuDGgxwcnfAoRwKy01Ze2P6My5Pf3SH2ZJz j0fDlURBMhqRHr5BieioWAgcVU34MTC5AmALvvQh33oZEN0qTQpNOF/HDXPb+Og3SsC8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:44:32 +0000 commit b89d204ee0fec0c4c2c639b9f37ef431d3b66100 Author: Gianluca Luparini AuthorDate: Mon Aug 7 11:22:58 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:22:58 2023 +0200 xen/arm: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- xen/arch/arm/include/asm/processor.h | 6 +++--- xen/arch/arm/vtimer.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 7e42ff8811..8e02410465 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -521,9 +521,9 @@ extern register_t __cpu_logical_map[]; #define CNTKCTL_EL1_EL0PTEN (1u<<9) /* Expose phys timer registers to EL0 */ /* Timer control registers */ -#define CNTx_CTL_ENABLE (1ul<<0) /* Enable timer */ -#define CNTx_CTL_MASK (1ul<<1) /* Mask IRQ */ -#define CNTx_CTL_PENDING (1ul<<2) /* IRQ pending */ +#define CNTx_CTL_ENABLE (1UL<<0) /* Enable timer */ +#define CNTx_CTL_MASK (1UL<<1) /* Mask IRQ */ +#define CNTx_CTL_PENDING (1UL<<2) /* IRQ pending */ /* Timer frequency mask */ #define CNTFRQ_MASK GENMASK(31, 0) diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index 48f2daa907..c54360e202 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -206,7 +206,7 @@ static bool vtimer_cntp_tval(struct cpu_user_regs *regs, register_t *r, if ( read ) { - *r = (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffull); + *r = (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffULL); } else { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580553.908823 (Exim 4.92) (envelope-from ) id 1qTVRT-0003aK-Qf; Tue, 08 Aug 2023 22:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580553.908823; Tue, 08 Aug 2023 22:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRT-0003aC-O3; Tue, 08 Aug 2023 22:44:43 +0000 Received: by outflank-mailman (input) for mailman id 580553; Tue, 08 Aug 2023 22:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRS-0003a2-Nj for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRS-0001gS-My for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVRS-0002wE-Lu for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=G01+EpWOAUR3sXsyAVVBWzfn0vEWXPS+6ybkrZbC8EE=; b=BlsMPMJ3ws27mMJgLLLx90futa 312NXo8A5EK89yRGlH91jyQGQ6XgBcz8b3UeHM4s3w/gDkR6KX5Rl8rPZKRQVzE3k6UxSnRC+nDmk Fbgrv2NANm9xxX34QubvG4/z0b8bjdJOusnVXD9yFJaiVXx9eB64RfueVoVFo62au9D8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/common: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:44:42 +0000 commit 6ad7563727ab383396e7932e5f2005f032f4eb59 Author: Gianluca Luparini AuthorDate: Mon Aug 7 11:23:29 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:23:29 2023 +0200 xen/common: address violations of MISRA C:2012 Rule 7.3 From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini --- xen/common/page_alloc.c | 6 +++--- xen/common/rangeset.c | 2 +- xen/common/softirq.c | 8 ++++---- xen/common/vsprintf.c | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index e40473f71e..03b63d0ee7 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2380,7 +2380,7 @@ int assign_pages( if ( unlikely(nr > d->max_pages - tot_pages) ) { gprintk(XENLOG_INFO, "Over-allocation for %pd: %Lu > %u\n", - d, tot_pages + 0ull + nr, d->max_pages); + d, tot_pages + 0ULL + nr, d->max_pages); rc = -E2BIG; goto out; } @@ -2392,7 +2392,7 @@ int assign_pages( { gprintk(XENLOG_INFO, "Excess allocation for %pd: %Lu (%u extra)\n", - d, d->tot_pages + 0ull + nr, d->extra_pages); + d, d->tot_pages + 0ULL + nr, d->extra_pages); if ( pg[0].count_info & PGC_extra ) d->extra_pages -= nr; rc = -E2BIG; @@ -2460,7 +2460,7 @@ struct page_info *alloc_domheap_pages( { unsigned long i; - for ( i = 0; i < (1ul << order); i++ ) + for ( i = 0; i < (1UL << order); i++ ) { ASSERT(!pg[i].count_info); pg[i].count_info = PGC_extra; diff --git a/xen/common/rangeset.c b/xen/common/rangeset.c index a6ef264046..f3baf52ab6 100644 --- a/xen/common/rangeset.c +++ b/xen/common/rangeset.c @@ -393,7 +393,7 @@ static int cf_check merge(unsigned long s, unsigned long e, void *data) int rangeset_merge(struct rangeset *r1, struct rangeset *r2) { - return rangeset_report_ranges(r2, 0, ~0ul, merge, r1); + return rangeset_report_ranges(r2, 0, ~0UL, merge, r1); } int rangeset_add_singleton( diff --git a/xen/common/softirq.c b/xen/common/softirq.c index 063e93cbe3..321d26902d 100644 --- a/xen/common/softirq.c +++ b/xen/common/softirq.c @@ -29,7 +29,7 @@ static void __do_softirq(unsigned long ignore_mask) { unsigned int i, cpu; unsigned long pending; - bool rcu_allowed = !(ignore_mask & (1ul << RCU_SOFTIRQ)); + bool rcu_allowed = !(ignore_mask & (1UL << RCU_SOFTIRQ)); ASSERT(!rcu_allowed || rcu_quiesce_allowed()); @@ -57,12 +57,12 @@ static void __do_softirq(unsigned long ignore_mask) void process_pending_softirqs(void) { /* Do not enter scheduler as it can preempt the calling context. */ - unsigned long ignore_mask = (1ul << SCHEDULE_SOFTIRQ) | - (1ul << SCHED_SLAVE_SOFTIRQ); + unsigned long ignore_mask = (1UL << SCHEDULE_SOFTIRQ) | + (1UL << SCHED_SLAVE_SOFTIRQ); /* Block RCU processing in case of rcu_read_lock() held. */ if ( !rcu_quiesce_allowed() ) - ignore_mask |= 1ul << RCU_SOFTIRQ; + ignore_mask |= 1UL << RCU_SOFTIRQ; ASSERT(!in_irq() && local_irq_is_enabled()); __do_softirq(ignore_mask); diff --git a/xen/common/vsprintf.c b/xen/common/vsprintf.c index 94c1ba7257..c49631c0a4 100644 --- a/xen/common/vsprintf.c +++ b/xen/common/vsprintf.c @@ -225,7 +225,7 @@ static char *print_bitmap_string(char *str, const char *end, */ for ( i = ROUNDUP(nr_bits, CHUNKSZ) - CHUNKSZ; i >= 0; i -= CHUNKSZ ) { - unsigned int chunkmask = (1ull << chunksz) - 1; + unsigned int chunkmask = (1ULL << chunksz) - 1; unsigned int word = i / BITS_PER_LONG; unsigned int offset = i % BITS_PER_LONG; unsigned long val = (bitmap[word] >> offset) & chunkmask; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:44:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580554.908828 (Exim 4.92) (envelope-from ) id 1qTVRd-0003dC-Ta; Tue, 08 Aug 2023 22:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580554.908828; Tue, 08 Aug 2023 22:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRd-0003d5-Qx; Tue, 08 Aug 2023 22:44:53 +0000 Received: by outflank-mailman (input) for mailman id 580554; Tue, 08 Aug 2023 22:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRc-0003cv-Qt for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVRc-0001gZ-Q4 for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVRc-0002wm-PD for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eYxeeQH4LqD58e3rYPyk+yUfh3Ay5KGzbEOIlDEzzWk=; b=Vut5M7bCXXyTiwkbP9s3Tr8hhq r1lK1k8IIwTabgTVfWApXQOMC0Qy9h87th5J0ZnIHFOqHhhoGwGD0NajXm6pKMC9bJGurC1Cw5kPD VxC4y9+HnH+AhRcDVvcS67eajPyrNOzxkNk8or3GxY1OUeSs110TyBnVY4pVecaSuFiU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/include: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:44:52 +0000 commit 0c8d77e117126ffd15aa63fe7617c4fd64b3ad77 Author: Gianluca Luparini AuthorDate: Mon Aug 7 11:23:54 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:23:54 2023 +0200 xen/include: address violations of MISRA C:2012 Rule 7.3 From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini --- xen/include/xen/bitops.h | 8 ++++---- xen/include/xen/tasklet.h | 4 ++-- xen/include/xen/time.h | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index e926047932..654f525fb4 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -186,12 +186,12 @@ static inline unsigned int generic_hweight64(uint64_t w) if ( BITS_PER_LONG < 64 ) return generic_hweight32(w >> 32) + generic_hweight32(w); - w -= (w >> 1) & 0x5555555555555555ul; - w = (w & 0x3333333333333333ul) + ((w >> 2) & 0x3333333333333333ul); - w = (w + (w >> 4)) & 0x0f0f0f0f0f0f0f0ful; + w -= (w >> 1) & 0x5555555555555555UL; + w = (w & 0x3333333333333333UL) + ((w >> 2) & 0x3333333333333333UL); + w = (w + (w >> 4)) & 0x0f0f0f0f0f0f0f0fUL; if ( IS_ENABLED(CONFIG_HAS_FAST_MULTIPLY) ) - return (w * 0x0101010101010101ul) >> 56; + return (w * 0x0101010101010101UL) >> 56; w += w >> 8; w += w >> 16; diff --git a/xen/include/xen/tasklet.h b/xen/include/xen/tasklet.h index ea73171f6e..193acf8f42 100644 --- a/xen/include/xen/tasklet.h +++ b/xen/include/xen/tasklet.h @@ -37,8 +37,8 @@ struct tasklet DECLARE_PER_CPU(unsigned long, tasklet_work_to_do); #define _TASKLET_enqueued 0 /* Tasklet work is enqueued for this CPU. */ #define _TASKLET_scheduled 1 /* Scheduler has scheduled do_tasklet(). */ -#define TASKLET_enqueued (1ul << _TASKLET_enqueued) -#define TASKLET_scheduled (1ul << _TASKLET_scheduled) +#define TASKLET_enqueued (1UL << _TASKLET_enqueued) +#define TASKLET_scheduled (1UL << _TASKLET_scheduled) static inline bool tasklet_work_to_do(unsigned int cpu) { diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index 9ceaec541f..5aafdda4f3 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -57,9 +57,9 @@ struct tm wallclock_time(uint64_t *ns); #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL)) -#define STIME_MAX ((s_time_t)((uint64_t)~0ull>>1)) +#define STIME_MAX ((s_time_t)((uint64_t)~0ULL>>1)) /* Chosen so (NOW() + delta) wont overflow without an uptime of 200 years */ -#define STIME_DELTA_MAX ((s_time_t)((uint64_t)~0ull>>2)) +#define STIME_DELTA_MAX ((s_time_t)((uint64_t)~0ULL>>2)) /* Explicitly OR with 1 just in case version number gets out of sync. */ #define version_update_begin(v) (((v) + 1) | 1) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580555.908832 (Exim 4.92) (envelope-from ) id 1qTVRn-0003hm-Uz; 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Tue, 08 Aug 2023 22:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZgcsNsXlKsvL0Y62Rwps3X9YnnhqecgRfDZdopwtsEU=; b=ZPsIBWbNuvGP0WwIRLV3e4gNWv BGVsDJYHqYzya/GjXCoBo0cDBPeG9VWnFcMah/VZ2U5Ldgd1PDhL2qHKEvT53hDfB9mWdRp5JV4d0 DSfYbTC+6qvLI5HeQLY78uUdfTa0nOigWLkpq7nyIvTgl58NcoL1Y5r/zKdNuJzfOSqo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Address violations of MISRA C:2012 by replacing bool_t uses Message-Id: Date: Tue, 08 Aug 2023 22:45:02 +0000 commit 202a341fd41d281d08846136289d93a5425520f6 Author: Federico Serafini AuthorDate: Mon Aug 7 11:24:28 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:24:28 2023 +0200 x86: Address violations of MISRA C:2012 by replacing bool_t uses Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between object and function declarations thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). Replace the occurrences of bool_t with bool. No functional change. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu/common.c | 6 +++--- xen/arch/x86/include/asm/processor.h | 16 ++++++++-------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index cfcdaace12..7b27f20138 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -26,11 +26,11 @@ bool __read_mostly opt_dom0_cpuid_faulting = true; -bool_t opt_arat = 1; +bool opt_arat = true; boolean_param("arat", opt_arat); /* pku: Flag to enable Memory Protection Keys (default on). */ -static bool_t opt_pku = 1; +static bool opt_pku = true; boolean_param("pku", opt_pku); unsigned int opt_cpuid_mask_ecx = ~0u; @@ -208,7 +208,7 @@ void ctxt_switch_levelling(const struct vcpu *next) alternative_vcall(ctxt_switch_masking, next); } -bool_t opt_cpu_info; +bool opt_cpu_info; boolean_param("cpuinfo", opt_cpu_info); int get_model_name(struct cpuinfo_x86 *c) diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 0989748be6..8d1909f73d 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -96,7 +96,7 @@ extern bool probe_cpuid_faulting(void); extern void ctxt_switch_levelling(const struct vcpu *next); extern void (*ctxt_switch_masking)(const struct vcpu *next); -extern bool_t opt_cpu_info; +extern bool opt_cpu_info; extern u32 trampoline_efer; extern u64 trampoline_misc_enable_off; @@ -109,17 +109,17 @@ extern unsigned int vaddr_bits; extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id table[]); -extern void identify_cpu(struct cpuinfo_x86 *); -extern void setup_clear_cpu_cap(unsigned int); -extern void setup_force_cpu_cap(unsigned int); -extern bool is_forced_cpu_cap(unsigned int); +extern void identify_cpu(struct cpuinfo_x86 *c); +extern void setup_clear_cpu_cap(unsigned int cap); +extern void setup_force_cpu_cap(unsigned int cap); +extern bool is_forced_cpu_cap(unsigned int cap); extern void print_cpu_info(unsigned int cpu); extern void init_intel_cacheinfo(struct cpuinfo_x86 *c); #define cpu_to_core(_cpu) (cpu_data[_cpu].cpu_core_id) #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id) -unsigned int apicid_to_socket(unsigned int); +unsigned int apicid_to_socket(unsigned int apicid); static inline int cpu_nr_siblings(unsigned int cpu) { @@ -410,12 +410,12 @@ void show_registers(const struct cpu_user_regs *regs); #define dump_execution_state() \ run_in_exception_handler(show_execution_state_nonconst) void show_page_walk(unsigned long addr); -void noreturn fatal_trap(const struct cpu_user_regs *regs, bool_t show_remote); +void noreturn fatal_trap(const struct cpu_user_regs *regs, bool show_remote); extern void mtrr_ap_init(void); extern void mtrr_bp_init(void); -void mcheck_init(struct cpuinfo_x86 *c, bool_t bsp); +void mcheck_init(struct cpuinfo_x86 *c, bool bsp); void do_nmi(const struct cpu_user_regs *regs); void do_machine_check(const struct cpu_user_regs *regs); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580556.908836 (Exim 4.92) (envelope-from ) id 1qTVRy-0003kt-0R; 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Tue, 08 Aug 2023 22:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sX+Tq57HuSAtBI3TkzzGEv+BLU3UolJp1qbQSJaoKos=; b=DUSLF+lo4Jz1C7UlqxabbR6ceI zhI6BKalmGY7SAFoN/B0Vg2ljVpwoiIl1NyIIC4rxBMG7MBhdlfzhh8gQLunEsbSGyQe5464YH+9R 5W5FdA+wNOg/uvUl9weELrz4lmZdGCVc8GOTXXLHKcH8xVSUNnCA7BZ8kgJAm08q1rcc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libelf: address MISRA C:2012 Rule 5.3 Message-Id: Date: Tue, 08 Aug 2023 22:45:12 +0000 commit d63ea6c46b89bffb99647871c788c236a8286646 Author: Nicola Vetrini AuthorDate: Mon Aug 7 11:25:02 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 7 11:26:43 2023 +0200 libelf: address MISRA C:2012 Rule 5.3 The types u{8,16,32,64} defined in 'xen/arch/x86/include/asm/types.h' shadow the variables in the modified function, hence violating Rule 5.3. Therefore, the rename takes care of the shadowing. No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/common/libelf/libelf-tools.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/xen/common/libelf/libelf-tools.c b/xen/common/libelf/libelf-tools.c index a9edb6a8dc..b847969da9 100644 --- a/xen/common/libelf/libelf-tools.c +++ b/xen/common/libelf/libelf-tools.c @@ -91,10 +91,10 @@ uint64_t elf_access_unsigned(struct elf_binary * elf, elf_ptrval base, { elf_ptrval ptrval = base + moreoffset; bool need_swap = elf_swap(elf); - const uint8_t *u8; - const uint16_t *u16; - const uint32_t *u32; - const uint64_t *u64; + const uint8_t *pu8; + const uint16_t *pu16; + const uint32_t *pu32; + const uint64_t *pu64; if ( !elf_access_ok(elf, ptrval, size) ) return 0; @@ -102,17 +102,17 @@ uint64_t elf_access_unsigned(struct elf_binary * elf, elf_ptrval base, switch ( size ) { case 1: - u8 = (const void*)ptrval; - return *u8; + pu8 = (const void *)ptrval; + return *pu8; case 2: - u16 = (const void*)ptrval; - return need_swap ? bswap_16(*u16) : *u16; + pu16 = (const void *)ptrval; + return need_swap ? bswap_16(*pu16) : *pu16; case 4: - u32 = (const void*)ptrval; - return need_swap ? bswap_32(*u32) : *u32; + pu32 = (const void *)ptrval; + return need_swap ? bswap_32(*pu32) : *pu32; case 8: - u64 = (const void*)ptrval; - return need_swap ? bswap_64(*u64) : *u64; + pu64 = (const void *)ptrval; + return need_swap ? bswap_64(*pu64) : *pu64; default: return 0; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580557.908839 (Exim 4.92) (envelope-from ) id 1qTVS8-0003nC-1v; Tue, 08 Aug 2023 22:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580557.908839; Tue, 08 Aug 2023 22:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVS7-0003n5-Vl; Tue, 08 Aug 2023 22:45:23 +0000 Received: by outflank-mailman (input) for mailman id 580557; Tue, 08 Aug 2023 22:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVS7-0003mt-4W for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVS7-0001hi-3i for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVS7-0002yU-2L for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=z9Pd7Qk2ovNxP2Ww3W6K+emkNsu76K6Wc2+5VNpKx7w=; b=XELKk2zBVOIIOYvAIu0/XSciwi s1aorz5US0CLgrYtslVixmCiP9tU4smKMscaIljWchklaX3SCQaAxTSmmoizbjKE2WaJkqdh64gUX xbxwK3VgTyQtWuFGin1Khtezg1XxKkvIZiv6uMb7uIXJXardio+X9bXXzLRI9yNuknb4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm/mm: Document the differences between arm32 and arm64 directmaps Message-Id: Date: Tue, 08 Aug 2023 22:45:23 +0000 commit 767d1a2cfdca962f4ae3f9f620e5c5f94db5f3e9 Author: Alejandro Vallejo AuthorDate: Fri Jul 28 08:58:59 2023 +0100 Commit: Julien Grall CommitDate: Mon Aug 7 14:45:18 2023 +0100 arm/mm: Document the differences between arm32 and arm64 directmaps arm32 merely covers the XENHEAP, whereas arm64 currently covers anything in the frame table. These comments highlight why arm32 doesn't need to account for PDX compression in its __va() implementation while arm64 does. Signed-off-by: Alejandro Vallejo Reviewed-by: Julien Grall --- xen/arch/arm/include/asm/mm.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 4262165ce2..5b530f0f40 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -280,6 +280,19 @@ static inline paddr_t __virt_to_maddr(vaddr_t va) #define virt_to_maddr(va) __virt_to_maddr((vaddr_t)(va)) #ifdef CONFIG_ARM_32 +/** + * Find the virtual address corresponding to a machine address + * + * Only memory backing the XENHEAP has a corresponding virtual address to + * be found. This is so we can save precious virtual space, as it's in + * short supply on arm32. This mapping is not subject to PDX compression + * because XENHEAP is known to be physically contiguous and can't hence + * jump over the PDX hole. This means we can avoid the roundtrips + * converting to/from pdx. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ static inline void *maddr_to_virt(paddr_t ma) { ASSERT(is_xen_heap_mfn(maddr_to_mfn(ma))); @@ -287,6 +300,19 @@ static inline void *maddr_to_virt(paddr_t ma) return (void *)(unsigned long) ma + XENHEAP_VIRT_START; } #else +/** + * Find the virtual address corresponding to a machine address + * + * The directmap covers all conventional memory accesible by the + * hypervisor. This means it's subject to PDX compression. + * + * Note there's an extra offset applied (directmap_base_pdx) on top of the + * regular PDX compression logic. Its purpose is to skip over the initial + * range of non-existing memory, should there be one. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ static inline void *maddr_to_virt(paddr_t ma) { ASSERT((mfn_to_pdx(maddr_to_mfn(ma)) - directmap_base_pdx) < -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580558.908843 (Exim 4.92) (envelope-from ) id 1qTVSI-0003qD-3T; Tue, 08 Aug 2023 22:45:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580558.908843; Tue, 08 Aug 2023 22:45:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSI-0003q5-0x; Tue, 08 Aug 2023 22:45:34 +0000 Received: by outflank-mailman (input) for mailman id 580558; Tue, 08 Aug 2023 22:45:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSH-0003pu-8O for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSH-0001hs-7Y for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVSH-0002z1-6J for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=PZzmfaYjjKlns7oBehp4jB4xklrNwLTbeJLRmjCdHA4=; b=kCQqmfzF4K6WMg+hFB4UKWfBhC I7fpQeWdHDIWj8H+0SZ1/6N/X8WeiQ6nD3YD9J9aGXuzdLTo0ywNcjnHz3D6joP0gpt+qWG29LgM6 jxC2CRkVwaWpDgtz6ObtbK4mbMITLAfKvtO45Qbb/TEVPFfZP3SB2Ozzub1K32wMEcuM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: Drop opt_pku entirely Message-Id: Date: Tue, 08 Aug 2023 22:45:33 +0000 commit 65f0d6fc80cba9d79b58e6f2bfc00e36d4e66898 Author: Andrew Cooper AuthorDate: Tue Jun 20 18:01:46 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Aug 7 15:30:18 2023 +0100 x86: Drop opt_pku entirely This option is particularly dubious as Xen does not use Protection Keys, owing to the sharing of pagetables with PV guests. All this option does is hide PKU by default from HVM guests, and is therefore redundant with the more generic cpuid=no-pku. The variable ought to be in __initdata given it's single user, but deleting it entirely looks to be a better course of action. Visibility of PKU to guests should be handled via its vm.cfg file. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Henry Wang --- CHANGELOG.md | 4 ++++ docs/misc/xen-command-line.pandoc | 10 ---------- xen/arch/x86/cpu/common.c | 7 ------- 3 files changed, 4 insertions(+), 17 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7d7e0590f8..7e5efcabda 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -25,6 +25,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - Add support for AVX512-FP16 on x86. - On Arm, Xen supports guests running SVE/SVE2 instructions. (Tech Preview) +### Removed + - On x86, the "pku" command line option has been removed. It has never + behaved precisely as described, and was redundant with the unsupported + "cpuid=no-pku". Visibility of PKU to guests should be via its vm.cfg file. ## [4.17.0](https://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.17.0) - 2022-12-12 diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 4060ebdc5d..9d66688bd1 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1950,16 +1950,6 @@ for all of them (`true`), only for those subject to XPTI (`xpti`) or for those not subject to XPTI (`no-xpti`). The feature is used only in case INVPCID is supported and not disabled via `invpcid=false`. -### pku (x86) -> `= ` - -> Default: `true` - -Flag to enable Memory Protection Keys. - -The protection-key feature provides an additional mechanism by which IA-32e -paging controls access to usermode addresses. - ### ple_gap > `= ` diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 7b27f20138..6fada384a1 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -29,10 +29,6 @@ bool __read_mostly opt_dom0_cpuid_faulting = true; bool opt_arat = true; boolean_param("arat", opt_arat); -/* pku: Flag to enable Memory Protection Keys (default on). */ -static bool opt_pku = true; -boolean_param("pku", opt_pku); - unsigned int opt_cpuid_mask_ecx = ~0u; integer_param("cpuid_mask_ecx", opt_cpuid_mask_ecx); unsigned int opt_cpuid_mask_edx = ~0u; @@ -522,9 +518,6 @@ void identify_cpu(struct cpuinfo_x86 *c) this_cpu->c_init(c); - if (c == &boot_cpu_data && !opt_pku) - setup_clear_cpu_cap(X86_FEATURE_PKU); - /* * The vendor-specific functions might have changed features. Now * we do "generic changes." -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580559.908848 (Exim 4.92) (envelope-from ) id 1qTVSS-0003sg-54; Tue, 08 Aug 2023 22:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580559.908848; Tue, 08 Aug 2023 22:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSS-0003sW-2M; Tue, 08 Aug 2023 22:45:44 +0000 Received: by outflank-mailman (input) for mailman id 580559; Tue, 08 Aug 2023 22:45:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSR-0003sL-BG for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSR-0001i1-AY for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVSR-0002zU-9f for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zwaIjfw/ajNtnNarJ9qFWWelp7wZP4sUNaJald1TmOk=; b=aVJx36i9JMLRhvDgR2nm5/yyiN amV1LR62dlmzzyAU+80euvxiyRwhxTIEFbFaxNTJkQVZo6ZnzVTgSlHroXB25W0EV4jm6uzpAVZB/ Q3Wq8yCRAguqDnuKWhWAUjEvbq2eQ4bVCmNRKfmysvDTkD6ePMgmXDqyaQoHW7dbiVv4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: change parameter name in monitor_domctl() declaration Message-Id: Date: Tue, 08 Aug 2023 22:45:43 +0000 commit 6759b42fcb8230ef56bdd2f67788bb9392f90ee8 Author: Federico Serafini AuthorDate: Thu Jul 27 17:35:50 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:14:01 2023 -0700 xen: change parameter name in monitor_domctl() declaration Change parameter name in monitor_domctl() declaration for consistency with the corresponding definition. This addresses a violation of MISRA C:2012 Rule 8.3: "All declarations of an object or function shall use the same names and type qualifiers". No functional changes. Signed-off-by: Federico Serafini Reviewed-by: Stefano Stabellini Acked-by: Tamas K Lengyel --- xen/include/xen/monitor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/xen/monitor.h b/xen/include/xen/monitor.h index 6b17a93071..713d54f7c1 100644 --- a/xen/include/xen/monitor.h +++ b/xen/include/xen/monitor.h @@ -27,7 +27,7 @@ struct domain; struct xen_domctl_monitor_op; -int monitor_domctl(struct domain *d, struct xen_domctl_monitor_op *op); +int monitor_domctl(struct domain *d, struct xen_domctl_monitor_op *mop); void monitor_guest_request(void); int monitor_traps(struct vcpu *v, bool sync, vm_event_request_t *req); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:45:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:45:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580560.908851 (Exim 4.92) (envelope-from ) id 1qTVSd-0003vK-6p; Tue, 08 Aug 2023 22:45:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580560.908851; Tue, 08 Aug 2023 22:45:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSd-0003vC-3q; Tue, 08 Aug 2023 22:45:55 +0000 Received: by outflank-mailman (input) for mailman id 580560; Tue, 08 Aug 2023 22:45:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSb-0003v1-Iw for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSb-0001i8-Da for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVSb-0002zz-Ck for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:45:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=v4x0HU9Z5h5CHMWK4qf984oRRDYq+b3YfK/t3VJFZvw=; b=bAdH1ayrxpGiKC3K3nSi4KUfS0 x8PLnKWQcXqka99BXB5cfqcrj/IujmBm87fqYep6wKr5EkzCLc6yAbXpdmJORv7O3KjNfNNBOaYwf p/KHvBFBR9e6fwduCoedfBFm3DIL/pbBmRq6JaYjSiliQMz8Gxo/zRjaHiaabybdIGeE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mce: address MISRA C:2012 Rule 5.3 Message-Id: Date: Tue, 08 Aug 2023 22:45:53 +0000 commit 48627540a11bebc97ef86c8bed3d5984be052103 Author: Nicola Vetrini AuthorDate: Fri Aug 4 10:03:33 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:14:52 2023 -0700 x86/mce: address MISRA C:2012 Rule 5.3 Suitable mechanical renames are made to avoid shadowing the function identifier 'wait' declared in 'xen/include/xen/wait.h', thus addressing violations of MISRA C:2012 Rule 5.3: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" The parameter name 'bar' is added as well to comply with MISRA C:2012 Rules 8.2 and 8.3. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/barrier.c | 8 ++++---- xen/arch/x86/cpu/mcheck/barrier.h | 14 +++++++------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/barrier.c b/xen/arch/x86/cpu/mcheck/barrier.c index a7e5b19a44..51a1d37a76 100644 --- a/xen/arch/x86/cpu/mcheck/barrier.c +++ b/xen/arch/x86/cpu/mcheck/barrier.c @@ -16,11 +16,11 @@ void mce_barrier_dec(struct mce_softirq_barrier *bar) atomic_dec(&bar->val); } -void mce_barrier_enter(struct mce_softirq_barrier *bar, bool wait) +void mce_barrier_enter(struct mce_softirq_barrier *bar, bool do_wait) { int gen; - if ( !wait ) + if ( !do_wait ) return; atomic_inc(&bar->ingen); gen = atomic_read(&bar->outgen); @@ -34,11 +34,11 @@ void mce_barrier_enter(struct mce_softirq_barrier *bar, bool wait) } } -void mce_barrier_exit(struct mce_softirq_barrier *bar, bool wait) +void mce_barrier_exit(struct mce_softirq_barrier *bar, bool do_wait) { int gen; - if ( !wait ) + if ( !do_wait ) return; atomic_inc(&bar->outgen); gen = atomic_read(&bar->ingen); diff --git a/xen/arch/x86/cpu/mcheck/barrier.h b/xen/arch/x86/cpu/mcheck/barrier.h index c4d52b6192..7ec483226f 100644 --- a/xen/arch/x86/cpu/mcheck/barrier.h +++ b/xen/arch/x86/cpu/mcheck/barrier.h @@ -20,7 +20,7 @@ struct mce_softirq_barrier { /* * Initialize a barrier. Just set it to 0. */ -void mce_barrier_init(struct mce_softirq_barrier *); +void mce_barrier_init(struct mce_softirq_barrier *bar); /* * This function will need to be used when offlining a CPU in the @@ -29,17 +29,17 @@ void mce_barrier_init(struct mce_softirq_barrier *); * Decrement a barrier only. Needed for cases where the CPU * in question can't do it itself (e.g. it is being offlined). */ -void mce_barrier_dec(struct mce_softirq_barrier *); +void mce_barrier_dec(struct mce_softirq_barrier *bar); /* - * If @wait is false, mce_barrier_enter/exit() will return immediately + * If @do_wait is false, mce_barrier_enter/exit() will return immediately * without touching the barrier. It's used when handling a * non-broadcasting MCE (e.g. MCE on some old Intel CPU, MCE on AMD * CPU and LMCE on Intel Skylake-server CPU) which is received on only * one CPU and thus does not invoke mce_barrier_enter/exit() calls on * all CPUs. * - * If @wait is true, mce_barrier_enter/exit() will handle the given + * If @do_wait is true, mce_barrier_enter/exit() will handle the given * barrier as below. * * Increment the generation number and the value. The generation number @@ -53,9 +53,9 @@ void mce_barrier_dec(struct mce_softirq_barrier *); * These barrier functions should always be paired, so that the * counter value will reach 0 again after all CPUs have exited. */ -void mce_barrier_enter(struct mce_softirq_barrier *, bool wait); -void mce_barrier_exit(struct mce_softirq_barrier *, bool wait); +void mce_barrier_enter(struct mce_softirq_barrier *bar, bool do_wait); +void mce_barrier_exit(struct mce_softirq_barrier *bar, bool do_wait); -void mce_barrier(struct mce_softirq_barrier *); +void mce_barrier(struct mce_softirq_barrier *bar); #endif /* _MCHECK_BARRIER_H */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580561.908856 (Exim 4.92) (envelope-from ) id 1qTVSn-0003yY-9H; Tue, 08 Aug 2023 22:46:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580561.908856; Tue, 08 Aug 2023 22:46:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSn-0003yQ-6i; Tue, 08 Aug 2023 22:46:05 +0000 Received: by outflank-mailman (input) for mailman id 580561; Tue, 08 Aug 2023 22:46:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSl-0003y0-Hb for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVSl-0001iT-Gm for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVSl-00030m-Fs for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aMBNIaoSI2PYWIDclIFrbFxe8PqYXzkPGebd+wJyoyY=; b=BEUXBGgZcfHjUncwkHRaIDKjJe G4LPqjmABZtUua8xVTn2EvrvlN9oJI1Tyh+7J97OzvDNuLnMB76z0xtnR7SeY2c/1logalPDg2jaB iC/X1EuqL/RhQiD6z5ucrRGQ7+alevv4OFYAe6nLfV+FGYqWV/jj9tjMJuXToW/lUqVU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mtrr: address MISRA C:2012 Rule 5.3 Message-Id: Date: Tue, 08 Aug 2023 22:46:03 +0000 commit 6456661cd0eea5bd2bb9601017b94575c0cb2b69 Author: Nicola Vetrini AuthorDate: Fri Aug 4 10:03:34 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:16:59 2023 -0700 x86/mtrr: address MISRA C:2012 Rule 5.3 Rename variables to avoid shadowing and thus address MISRA C:2012 Rule 5.3: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope". The shadowing happens between the global variable 'mtrr_state' declared in 'xen/arch/x86/include/asm/mtrr.h' and local variable names. The latter are renamed to 'm', which is used elsewhere in 'xen/arch/x86/hvm/mtrr.c' for the same purpose. No functional changes. Signed-off-by: Nicola Vetrini [stefano: improve commit description] Signed-off-by: Stefano Stabellini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/hvm/mtrr.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c index 29f3fb1607..7f486358b1 100644 --- a/xen/arch/x86/hvm/mtrr.c +++ b/xen/arch/x86/hvm/mtrr.c @@ -687,13 +687,13 @@ int hvm_set_mem_pinned_cacheattr(struct domain *d, uint64_t gfn_start, static int cf_check hvm_save_mtrr_msr(struct vcpu *v, hvm_domain_context_t *h) { - const struct mtrr_state *mtrr_state = &v->arch.hvm.mtrr; + const struct mtrr_state *m = &v->arch.hvm.mtrr; struct hvm_hw_mtrr hw_mtrr = { - .msr_mtrr_def_type = mtrr_state->def_type | - MASK_INSR(mtrr_state->fixed_enabled, + .msr_mtrr_def_type = m->def_type | + MASK_INSR(m->fixed_enabled, MTRRdefType_FE) | - MASK_INSR(mtrr_state->enabled, MTRRdefType_E), - .msr_mtrr_cap = mtrr_state->mtrr_cap, + MASK_INSR(m->enabled, MTRRdefType_E), + .msr_mtrr_cap = m->mtrr_cap, }; unsigned int i; @@ -710,14 +710,14 @@ static int cf_check hvm_save_mtrr_msr(struct vcpu *v, hvm_domain_context_t *h) for ( i = 0; i < MASK_EXTR(hw_mtrr.msr_mtrr_cap, MTRRcap_VCNT); i++ ) { - hw_mtrr.msr_mtrr_var[i * 2] = mtrr_state->var_ranges->base; - hw_mtrr.msr_mtrr_var[i * 2 + 1] = mtrr_state->var_ranges->mask; + hw_mtrr.msr_mtrr_var[i * 2] = m->var_ranges->base; + hw_mtrr.msr_mtrr_var[i * 2 + 1] = m->var_ranges->mask; } BUILD_BUG_ON(sizeof(hw_mtrr.msr_mtrr_fixed) != - sizeof(mtrr_state->fixed_ranges)); + sizeof(m->fixed_ranges)); - memcpy(hw_mtrr.msr_mtrr_fixed, mtrr_state->fixed_ranges, + memcpy(hw_mtrr.msr_mtrr_fixed, m->fixed_ranges, sizeof(hw_mtrr.msr_mtrr_fixed)); return hvm_save_entry(MTRR, v->vcpu_id, h, &hw_mtrr); @@ -727,7 +727,7 @@ static int cf_check hvm_load_mtrr_msr(struct domain *d, hvm_domain_context_t *h) { unsigned int vcpuid, i; struct vcpu *v; - struct mtrr_state *mtrr_state; + struct mtrr_state *m; struct hvm_hw_mtrr hw_mtrr; vcpuid = hvm_load_instance(h); @@ -749,26 +749,26 @@ static int cf_check hvm_load_mtrr_msr(struct domain *d, hvm_domain_context_t *h) return -EINVAL; } - mtrr_state = &v->arch.hvm.mtrr; + m = &v->arch.hvm.mtrr; hvm_set_guest_pat(v, hw_mtrr.msr_pat_cr); - mtrr_state->mtrr_cap = hw_mtrr.msr_mtrr_cap; + m->mtrr_cap = hw_mtrr.msr_mtrr_cap; for ( i = 0; i < NUM_FIXED_MSR; i++ ) - mtrr_fix_range_msr_set(d, mtrr_state, i, hw_mtrr.msr_mtrr_fixed[i]); + mtrr_fix_range_msr_set(d, m, i, hw_mtrr.msr_mtrr_fixed[i]); for ( i = 0; i < MASK_EXTR(hw_mtrr.msr_mtrr_cap, MTRRcap_VCNT); i++ ) { - mtrr_var_range_msr_set(d, mtrr_state, + mtrr_var_range_msr_set(d, m, MSR_IA32_MTRR_PHYSBASE(i), hw_mtrr.msr_mtrr_var[i * 2]); - mtrr_var_range_msr_set(d, mtrr_state, + mtrr_var_range_msr_set(d, m, MSR_IA32_MTRR_PHYSMASK(i), hw_mtrr.msr_mtrr_var[i * 2 + 1]); } - mtrr_def_type_msr_set(d, mtrr_state, hw_mtrr.msr_mtrr_def_type); + mtrr_def_type_msr_set(d, m, hw_mtrr.msr_mtrr_def_type); return 0; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580562.908859 (Exim 4.92) (envelope-from ) id 1qTVSx-00041P-Av; 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Tue, 08 Aug 2023 22:46:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sW5ymWbnWk8gs9xFDM1xPqWTQ2DCHUrs20SO8EVHXmo=; b=APO9XHt8iYUfgzx3qrcFMA1S/H oEeNPfoF41A/+JDf67PvZnZdRUUo9GPcLQVTu6W/AHIKkCxcGO/hPa6IiCVpX8ZVCBFfePtKvVHFw bswanzMOreSYKPDXRsuCj3XYkBnuiDUTF84ulDqDrYXZuUa8g4jtyHs9SWhYjuGpdqlo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mce: Address violations of MISRA C:2012 Rules 8.2 and 8.3 Message-Id: Date: Tue, 08 Aug 2023 22:46:13 +0000 commit 5e7a0614a4b8d9f9c6276c683c280f945532bf7a Author: Federico Serafini AuthorDate: Mon Aug 7 11:23:28 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:18:04 2023 -0700 x86/mce: Address violations of MISRA C:2012 Rules 8.2 and 8.3 Give a name to unnamed parameters to address violations of MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with named parameters"). Keep consistency between parameter types used in function declarations and the ones used in the corresponding function definitions, thus addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). No functional change. Signed-off-by: Federico Serafini Acked-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/mce.c | 2 +- xen/arch/x86/cpu/mcheck/mce.h | 28 ++++++++++++++++------------ 2 files changed, 17 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index c2173cfc78..57e1eb221e 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -44,7 +44,7 @@ DEFINE_PER_CPU_READ_MOSTLY(struct mca_banks *, no_cmci_banks); DEFINE_PER_CPU_READ_MOSTLY(struct mca_banks *, mce_clear_banks); static void intpose_init(void); -static void mcinfo_clear(struct mc_info *); +static void mcinfo_clear(struct mc_info *mi); struct mca_banks *mca_allbanks; #define SEG_PL(segsel) ((segsel) & 0x3) diff --git a/xen/arch/x86/cpu/mcheck/mce.h b/xen/arch/x86/cpu/mcheck/mce.h index d40cee531a..b6fc9c3617 100644 --- a/xen/arch/x86/cpu/mcheck/mce.h +++ b/xen/arch/x86/cpu/mcheck/mce.h @@ -58,12 +58,14 @@ bool mce_available(const struct cpuinfo_x86 *c); unsigned int mce_firstbank(struct cpuinfo_x86 *c); /* Helper functions used for collecting error telemetry */ void noreturn mc_panic(const char *s); -void x86_mc_get_cpu_info(unsigned, uint32_t *, uint16_t *, uint16_t *, - uint32_t *, uint32_t *, uint32_t *, uint32_t *); +void x86_mc_get_cpu_info(unsigned cpu, uint32_t *chipid, uint16_t *coreid, + uint16_t *threadid, uint32_t *apicid, + unsigned *ncores, unsigned *ncores_active, + unsigned *nthreads); /* Register a handler for machine check exceptions. */ typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *regs); -extern void x86_mce_vector_register(x86_mce_vector_t); +extern void x86_mce_vector_register(x86_mce_vector_t hdlr); /* * Common generic MCE handler that implementations may nominate @@ -73,12 +75,12 @@ void cf_check mcheck_cmn_handler(const struct cpu_user_regs *regs); /* Register a handler for judging whether mce is recoverable. */ typedef bool (*mce_recoverable_t)(uint64_t status); -extern void mce_recoverable_register(mce_recoverable_t); +extern void mce_recoverable_register(mce_recoverable_t cbfunc); /* Read an MSR, checking for an interposed value first */ -extern struct intpose_ent *intpose_lookup(unsigned int, uint64_t, - uint64_t *); -extern bool intpose_inval(unsigned int, uint64_t); +extern struct intpose_ent *intpose_lookup(unsigned int cpu_nr, uint64_t msr, + uint64_t *valp); +extern bool intpose_inval(unsigned int cpu_nr, uint64_t msr); static inline uint64_t mca_rdmsr(unsigned int msr) { @@ -128,10 +130,12 @@ DECLARE_PER_CPU(struct mca_banks *, mce_clear_banks); extern bool cmci_support; extern bool is_mc_panic; extern bool mce_broadcast; -extern void mcheck_mca_clearbanks(struct mca_banks *); +extern void mcheck_mca_clearbanks(struct mca_banks *bankmask); -extern mctelem_cookie_t mcheck_mca_logout(enum mca_source, struct mca_banks *, - struct mca_summary *, struct mca_banks *); +extern mctelem_cookie_t mcheck_mca_logout(enum mca_source who, + struct mca_banks *bankmask, + struct mca_summary *sp, + struct mca_banks *clear_bank); /* * Register callbacks to be made during bank telemetry logout. @@ -142,7 +146,7 @@ extern mctelem_cookie_t mcheck_mca_logout(enum mca_source, struct mca_banks *, /* Register a handler for judging whether the bank need to be cleared */ typedef bool (*mce_need_clearbank_t)(enum mca_source who, u64 status); -extern void mce_need_clearbank_register(mce_need_clearbank_t); +extern void mce_need_clearbank_register(mce_need_clearbank_t cbfunc); /* * Register a callback to collect additional information (typically non- @@ -155,7 +159,7 @@ extern void mce_need_clearbank_register(mce_need_clearbank_t); */ typedef struct mcinfo_extended *(*x86_mce_callback_t) (struct mc_info *, uint16_t, uint64_t); -extern void x86_mce_callback_register(x86_mce_callback_t); +extern void x86_mce_callback_register(x86_mce_callback_t cbfunc); void *x86_mcinfo_reserve(struct mc_info *mi, unsigned int size, unsigned int type); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580563.908864 (Exim 4.92) (envelope-from ) id 1qTVT7-000446-Cc; Tue, 08 Aug 2023 22:46:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580563.908864; Tue, 08 Aug 2023 22:46:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVT7-00043y-9m; Tue, 08 Aug 2023 22:46:25 +0000 Received: by outflank-mailman (input) for mailman id 580563; Tue, 08 Aug 2023 22:46:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVT5-00043l-NQ for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVT5-0001ix-Ml for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVT5-00031g-Ly for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=su6RX9at0P68grxTbUkoww7AFyZWWcASntfbu75a04g=; b=kXu9uQkdZzIr9G3B8PdJJWuFJb IdgjQEee0gC+GrZgNfHlSXViDWGznczP7WmF7r3vuBizln75ffxDoBefDdnUemN1FX3pcwWWDkGNQ 4sRJdNEp3QDzhwbbQL268OWlsmcQqRhm78LFB0Db9woXbeD1B5Nhds6k7lc4JNFrYL+4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: Advertise that ECLAIR jobs do not need prerequisites Message-Id: Date: Tue, 08 Aug 2023 22:46:23 +0000 commit 7d5ef63f08c240d3b47ba3f8dc9950a882e5761f Author: Michal Orzel AuthorDate: Mon Aug 7 15:41:22 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:18:19 2023 -0700 automation: Advertise that ECLAIR jobs do not need prerequisites While not required today (ECLAIR jobs come first), add "needs: []" for future-proofing and consistency with other jobs in the pipeline. Signed-off-by: Michal Orzel Reviewed-by: Stefano Stabellini --- automation/gitlab-ci/analyze.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index 3325ef9d9a..4aa4abe2ee 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -18,6 +18,7 @@ - '*.log' reports: codequality: gl-code-quality-report.json + needs: [] eclair-x86_64: extends: .eclair-analysis -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580564.908868 (Exim 4.92) (envelope-from ) id 1qTVTH-00046g-E4; Tue, 08 Aug 2023 22:46:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580564.908868; Tue, 08 Aug 2023 22:46:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTH-00046Y-BH; Tue, 08 Aug 2023 22:46:35 +0000 Received: by outflank-mailman (input) for mailman id 580564; Tue, 08 Aug 2023 22:46:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTF-00046H-QI for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTF-0001j4-Pb for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVTF-00032E-Ow for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LSTPCYnsaIQOg300fG2ViRD/A/CIZFZdHg64N8RkPLk=; b=Imtw+4OjTcNnFaxeq9D7jxLesg 8exo+3m5zYcRBPlJL28i4q7pqZJ7/T/ZrRXqdJYRalREz5nweOM6edXJg+QClA9m2tTsKScCf1LVi R2dAT+Rg4Hv1/O6E6yTgoxFdyY/WLB9oHGRS1SCFpUnxGUc2QagC3SsMyIwWfsOX6B3k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] AMD/IOMMU: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:46:33 +0000 commit c44cf8f584326d15a78c690098b0fa6350684cbf Author: Gianluca Luparini AuthorDate: Thu Aug 3 12:22:16 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:19:06 2023 -0700 AMD/IOMMU: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/passthrough/amd/iommu_guest.c | 2 +- xen/drivers/passthrough/amd/iommu_map.c | 2 +- xen/drivers/passthrough/amd/pci_amd_iommu.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_guest.c b/xen/drivers/passthrough/amd/iommu_guest.c index 47a912126a..80d289b8bf 100644 --- a/xen/drivers/passthrough/amd/iommu_guest.c +++ b/xen/drivers/passthrough/amd/iommu_guest.c @@ -87,7 +87,7 @@ static uint64_t dte_get_gcr3_table(const struct amd_iommu_dte *dte) static void dte_set_gcr3_table(struct amd_iommu_dte *dte, uint16_t dom_id, uint64_t addr, bool gv, uint8_t glx) { -#define GCR3_MASK(hi, lo) (((1ul << ((hi) + 1)) - 1) & ~((1ul << (lo)) - 1)) +#define GCR3_MASK(hi, lo) (((1UL << ((hi) + 1)) - 1) & ~((1UL << (lo)) - 1)) /* I bit must be set when gcr3 is enabled */ dte->i = true; diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c index 993bac6f88..daa24a4858 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -838,7 +838,7 @@ int cf_check amd_iommu_quarantine_init(struct pci_dev *pdev, bool scratch_page) { struct domain_iommu *hd = dom_iommu(dom_io); unsigned long end_gfn = - 1ul << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT); + 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT); unsigned int level = amd_iommu_get_paging_mode(end_gfn); unsigned int req_id = get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf); const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(pdev->seg); diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c index 94e3775506..bea70db4b7 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -368,7 +368,7 @@ static int cf_check amd_iommu_domain_init(struct domain *d) */ hd->arch.amd.paging_mode = max(amd_iommu_get_paging_mode( is_hvm_domain(d) - ? 1ul << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) + ? 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) : get_upper_mfn_bound() + 1), amd_iommu_min_paging_mode); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580565.908871 (Exim 4.92) (envelope-from ) id 1qTVTR-00049A-FR; Tue, 08 Aug 2023 22:46:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580565.908871; Tue, 08 Aug 2023 22:46:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTR-000492-Co; Tue, 08 Aug 2023 22:46:45 +0000 Received: by outflank-mailman (input) for mailman id 580565; Tue, 08 Aug 2023 22:46:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTP-00048q-TF for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTP-0001jG-Sa for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVTP-000345-Rs for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0mHbp8BBVDYbKc9Y9VVebi852BxcX6T7m/zvSRaDzac=; b=pih845kLwwOXo/sT1Sz5mb79kf HT9oHZJvzhkxFDhXq5LBnfC6aolEAgwP+3c5i61QNZYeJmNf4tQIu9/rPo91LxwRTFAuaJJ9uTI2M om0Ut70/N2f2olXt1/VEw8pJsFjLUcZ2NEuVuZMEFBn832GD4wckboLLUIKtN8n2T43E=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:46:43 +0000 commit 854c63f82c7c95d78c73c013eeda6cc63af0e03f Author: Gianluca Luparini AuthorDate: Thu Aug 3 12:22:17 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:19:20 2023 -0700 x86/svm: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/hvm/svm/svm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index b3845bdca7..01dd592d9b 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1077,7 +1077,7 @@ static void svm_guest_osvw_init(struct domain *d) * Guests should see errata 400 and 415 as fixed (assuming that * HLT and IO instructions are intercepted). */ - svm->osvw.length = min(max(3ul, osvw_length), 64ul); + svm->osvw.length = min(max(3UL, osvw_length), 64UL); svm->osvw.status = osvw_status & ~6; /* @@ -1652,7 +1652,7 @@ static void svm_do_nested_pgfault(struct vcpu *v, else if ( pfec & NPT_PFEC_in_gpt ) npfec.kind = npfec_kind_in_gpt; - ret = hvm_hap_nested_page_fault(gpa, ~0ul, npfec); + ret = hvm_hap_nested_page_fault(gpa, ~0UL, npfec); if ( tb_init_done ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:46:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:46:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580566.908876 (Exim 4.92) (envelope-from ) id 1qTVTb-0004Bz-HN; Tue, 08 Aug 2023 22:46:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580566.908876; Tue, 08 Aug 2023 22:46:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTb-0004Br-EI; Tue, 08 Aug 2023 22:46:55 +0000 Received: by outflank-mailman (input) for mailman id 580566; Tue, 08 Aug 2023 22:46:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTZ-0004Bf-W5 for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTZ-0001jQ-VN for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVTZ-00034f-Ug for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:46:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZNn/jk2wGj2zLsdlLpP3uK2lK/tTrThtJcKbQLt8y34=; b=kedAmQSMBkC5iwAwfrWlIMn5M1 JQV9Lmw7Qet3hI0DfadPwNYiUcGdy2tX4vOVnAvrK/s9jU/tsBJ3yt8IkLkcNKuiemEkth6+a+LM2 mdcDCwwripID0cYCwMjWCwqTqohYudysGj1NxKbqcpcJqDqYAD1MVE+2n3NwYYPLCAT8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/IOMMU: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:46:53 +0000 commit 2cb7d006b5d665274e25267adc46a2bd8b6b3ad8 Author: Gianluca Luparini AuthorDate: Thu Aug 3 12:22:19 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:19:51 2023 -0700 x86/IOMMU: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/passthrough/x86/iommu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c index d290855959..c85549ccad 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -576,16 +576,16 @@ struct page_info *iommu_alloc_pgtable(struct domain_iommu *hd, ASSERT((CONTIG_LEVEL_SHIFT & (contig_mask >> shift)) == CONTIG_LEVEL_SHIFT); - p[0] = (CONTIG_LEVEL_SHIFT + 0ull) << shift; + p[0] = (CONTIG_LEVEL_SHIFT + 0ULL) << shift; p[1] = 0; - p[2] = 1ull << shift; + p[2] = 1ULL << shift; p[3] = 0; for ( i = 4; i < PAGE_SIZE / sizeof(*p); i += 4 ) { - p[i + 0] = (find_first_set_bit(i) + 0ull) << shift; + p[i + 0] = (find_first_set_bit(i) + 0ULL) << shift; p[i + 1] = 0; - p[i + 2] = 1ull << shift; + p[i + 2] = 1ULL << shift; p[i + 3] = 0; } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:47:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:47:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580567.908879 (Exim 4.92) (envelope-from ) id 1qTVTl-0004F0-KS; Tue, 08 Aug 2023 22:47:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580567.908879; Tue, 08 Aug 2023 22:47:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTl-0004Et-Hw; Tue, 08 Aug 2023 22:47:05 +0000 Received: by outflank-mailman (input) for mailman id 580567; Tue, 08 Aug 2023 22:47:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTk-0004Ee-2g for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTk-0001jk-20 for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVTk-00035a-1I for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GhEcq/Hx6STd5sAnmeh0SoZGzWcWFYNJOZ9uY1eVQ+g=; b=2dSJ1hBW+TzS0mpKqOX52owtxx gMi/M8//k9jwtRJNgFQhutEbdJ13rbI2Vp8Lq8Z8MInB5HO3MqQSgIu4hGX5A6b8PbU2N7CJ6QooH LtPyYe4fHMAx9Q0JO+QB2zfV1rmfYyYI13SN0bByt8qx62bY7ieCTqF9BbOkCLDTL/lY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/mm: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:47:04 +0000 commit 84df4fd56d5ec142f0e2f3b32b4ce4d6ede99f13 Author: Gianluca Luparini AuthorDate: Thu Aug 3 12:22:24 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:20:05 2023 -0700 x86/mm: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/mm/p2m-pt.c | 6 +++--- xen/arch/x86/mm/p2m.c | 20 ++++++++++---------- xen/arch/x86/mm/physmap.c | 4 ++-- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c index 6d1bb5daad..b2b14746c1 100644 --- a/xen/arch/x86/mm/p2m-pt.c +++ b/xen/arch/x86/mm/p2m-pt.c @@ -552,7 +552,7 @@ static void check_entry(mfn_t mfn, p2m_type_t new, p2m_type_t old, if ( new == p2m_mmio_direct ) ASSERT(!mfn_eq(mfn, INVALID_MFN) && !rangeset_overlaps_range(mmio_ro_ranges, mfn_x(mfn), - mfn_x(mfn) + (1ul << order))); + mfn_x(mfn) + (1UL << order))); else if ( p2m_allows_invalid_mfn(new) || new == p2m_invalid || new == p2m_mmio_dm ) ASSERT(mfn_valid(mfn) || mfn_eq(mfn, INVALID_MFN)); @@ -745,9 +745,9 @@ p2m_pt_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn, if ( need_iommu_pt_sync(p2m->domain) && (iommu_old_flags != iommu_pte_flags || old_mfn != mfn_x(mfn)) ) rc = iommu_pte_flags - ? iommu_legacy_map(d, _dfn(gfn), mfn, 1ul << page_order, + ? iommu_legacy_map(d, _dfn(gfn), mfn, 1UL << page_order, iommu_pte_flags) - : iommu_legacy_unmap(d, _dfn(gfn), 1ul << page_order); + : iommu_legacy_unmap(d, _dfn(gfn), 1UL << page_order); /* * Free old intermediate tables if necessary. This has to be the diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index f6df35767a..0983bd71d9 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -392,7 +392,7 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, unsigned int page_order, p2m_type_t p2mt, p2m_access_t p2ma) { bool hap = hap_enabled(p2m->domain); - unsigned long todo = 1ul << page_order; + unsigned long todo = 1UL << page_order; int set_rc, rc = 0; ASSERT(gfn_locked_by_me(p2m, gfn)); @@ -401,10 +401,10 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, { unsigned long fn_mask = (!mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) : 0) | gfn_x(gfn) | todo; - unsigned int order = (!(fn_mask & ((1ul << PAGE_ORDER_1G) - 1)) && + unsigned int order = (!(fn_mask & ((1UL << PAGE_ORDER_1G) - 1)) && hap && hap_has_1gb) ? PAGE_ORDER_1G - : (!(fn_mask & ((1ul << PAGE_ORDER_2M) - 1)) && + : (!(fn_mask & ((1UL << PAGE_ORDER_2M) - 1)) && (!hap || hap_has_2mb)) ? PAGE_ORDER_2M : PAGE_ORDER_4K; @@ -412,10 +412,10 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, mfn_t mfn, if ( set_rc ) rc = set_rc; - gfn = gfn_add(gfn, 1ul << order); + gfn = gfn_add(gfn, 1UL << order); if ( !mfn_eq(mfn, INVALID_MFN) ) - mfn = mfn_add(mfn, 1ul << order); - todo -= 1ul << order; + mfn = mfn_add(mfn, 1UL << order); + todo -= 1UL << order; } return rc; @@ -1407,7 +1407,7 @@ void np2m_flush_base(struct vcpu *v, unsigned long np2m_base) struct p2m_domain *p2m; unsigned int i; - np2m_base &= ~(0xfffull); + np2m_base &= ~(0xfffULL); nestedp2m_lock(d); for ( i = 0; i < MAX_NESTEDP2M; i++ ) @@ -1456,7 +1456,7 @@ p2m_get_nestedp2m_locked(struct vcpu *v) bool needs_flush = true; /* Mask out low bits; this avoids collisions with P2M_BASE_EADDR */ - np2m_base &= ~(0xfffull); + np2m_base &= ~(0xfffULL); if (nv->nv_flushp2m && nv->nv_p2m) { nv->nv_p2m = NULL; @@ -1614,8 +1614,8 @@ unsigned long paging_gva_to_gfn(struct vcpu *v, * Sanity check that l1_gfn can be used properly as a 4K mapping, even * if it mapped by a nested superpage. */ - ASSERT((l2_gfn & ((1ul << l1_page_order) - 1)) == - (l1_gfn & ((1ul << l1_page_order) - 1))); + ASSERT((l2_gfn & ((1UL << l1_page_order) - 1)) == + (l1_gfn & ((1UL << l1_page_order) - 1))); return l1_gfn; } diff --git a/xen/arch/x86/mm/physmap.c b/xen/arch/x86/mm/physmap.c index f1695e456e..098ccdf541 100644 --- a/xen/arch/x86/mm/physmap.c +++ b/xen/arch/x86/mm/physmap.c @@ -72,7 +72,7 @@ int set_identity_p2m_entry(struct domain *d, unsigned long gfn, if ( !is_iommu_enabled(d) ) return 0; return iommu_legacy_map(d, _dfn(gfn), _mfn(gfn), - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, p2m_access_to_iommu_flags(p2ma)); } @@ -85,7 +85,7 @@ int clear_identity_p2m_entry(struct domain *d, unsigned long gfn) { if ( !is_iommu_enabled(d) ) return 0; - return iommu_legacy_unmap(d, _dfn(gfn), 1ul << PAGE_ORDER_4K); + return iommu_legacy_unmap(d, _dfn(gfn), 1UL << PAGE_ORDER_4K); } return p2m_remove_identity_entry(d, gfn); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 08 22:47:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 08 Aug 2023 22:47:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.580568.908883 (Exim 4.92) (envelope-from ) id 1qTVTv-0004I1-M8; Tue, 08 Aug 2023 22:47:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 580568.908883; Tue, 08 Aug 2023 22:47:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTv-0004Hu-Ja; Tue, 08 Aug 2023 22:47:15 +0000 Received: by outflank-mailman (input) for mailman id 580568; Tue, 08 Aug 2023 22:47:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTu-0004HY-6V for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTVTu-0001jr-5k for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTVTu-000361-52 for xen-changelog@lists.xenproject.org; Tue, 08 Aug 2023 22:47:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZLpRTwmz7/MUCws+rwn5It1V5hqBnVNQtOQyqYZeyBA=; b=vbG47kyp/iub7+kWhFSyEpUCLk 2c9SSGNsj0iYkgssG4A4q4ZDOKWrUfj1C0FWcSVdvPl+RJ4UxxMHN93dz1Rxqh5dnXC8rrfGKUfPk O1IXAGN5WcPrL2NbQ4d41IZkc77YPuuEcGnjRfW7cTzL2jdXex+dHgvnOLc8rYL1TrXg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/x86: address violations of MISRA C:2012 Rule 7.3 Message-Id: Date: Tue, 08 Aug 2023 22:47:14 +0000 commit d3be806dae9c122fe94702cd9fa2e358a60828cd Author: Gianluca Luparini AuthorDate: Thu Aug 3 12:22:26 2023 +0200 Commit: Stefano Stabellini CommitDate: Mon Aug 7 13:20:18 2023 -0700 xen/x86: address violations of MISRA C:2012 Rule 7.3 The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 4 ++-- xen/arch/x86/dom0_build.c | 2 +- xen/arch/x86/e820.c | 2 +- xen/arch/x86/hpet.c | 2 +- xen/arch/x86/hvm/hpet.c | 6 +++--- xen/arch/x86/hvm/hvm.c | 6 +++--- xen/arch/x86/hvm/stdvga.c | 2 +- xen/arch/x86/include/asm/apicdef.h | 4 ++-- xen/arch/x86/include/asm/debugreg.h | 16 ++++++++-------- xen/arch/x86/include/asm/guest_pt.h | 16 ++++++++-------- xen/arch/x86/include/asm/pv/domain.h | 2 +- xen/arch/x86/mm.c | 4 ++-- xen/arch/x86/msr.c | 2 +- xen/arch/x86/nmi.c | 2 +- xen/arch/x86/psr.c | 8 ++++---- xen/arch/x86/spec_ctrl.c | 6 +++--- xen/arch/x86/x86_64/mm.c | 4 ++-- xen/arch/x86/xstate.c | 2 +- xen/lib/x86/cpuid.c | 4 ++-- 19 files changed, 47 insertions(+), 47 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 1f954d4e59..5fbb3602ae 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -250,9 +250,9 @@ static void recalculate_xstate(struct cpu_policy *p) else xstates &= ~XSTATE_XSAVES_ONLY; - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + for ( i = 2; i < min(63UL, ARRAY_SIZE(p->xstate.comp)); ++i ) { - uint64_t curr_xstate = 1ul << i; + uint64_t curr_xstate = 1UL << i; if ( !(xstates & curr_xstate) ) continue; diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 8b1fcc6471..09fb8b063a 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -537,7 +537,7 @@ int __init dom0_setup_permissions(struct domain *d) for ( i = 0; i < e820.nr_map; i++ ) { unsigned long sfn, efn; - sfn = max_t(unsigned long, paddr_to_pfn(e820.map[i].addr), 0x100ul); + sfn = max_t(unsigned long, paddr_to_pfn(e820.map[i].addr), 0x100UL); efn = paddr_to_pfn(e820.map[i].addr + e820.map[i].size - 1); if ( (e820.map[i].type == E820_UNUSABLE) && (e820.map[i].size != 0) && diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c index 0b89935510..4911e64b8c 100644 --- a/xen/arch/x86/e820.c +++ b/xen/arch/x86/e820.c @@ -450,7 +450,7 @@ static uint64_t __init mtrr_top_of_ram(void) /* paddr_bits must have been set at this point */ ASSERT(paddr_bits); - addr_mask = ((1ull << paddr_bits) - 1) & PAGE_MASK; + addr_mask = ((1ULL << paddr_bits) - 1) & PAGE_MASK; rdmsrl(MSR_MTRRcap, mtrr_cap); rdmsrl(MSR_MTRRdefType, mtrr_def); diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c index bc164dd82c..a2df1c7df4 100644 --- a/xen/arch/x86/hpet.c +++ b/xen/arch/x86/hpet.c @@ -619,7 +619,7 @@ void __init cf_check hpet_broadcast_init(void) * math multiplication factor for nanosecond to hpet tick conversion. */ hpet_events[i].mult = div_sc((unsigned long)hpet_rate, - 1000000000ul, 32); + 1000000000UL, 32); hpet_events[i].shift = 32; hpet_events[i].next_event = STIME_MAX; spin_lock_init(&hpet_events[i].lock); diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index dff27b760e..80f323316c 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -161,7 +161,7 @@ static int cf_check hpet_read( if ( !v->domain->arch.hvm.params[HVM_PARAM_HPET_ENABLED] ) { - result = ~0ul; + result = ~0UL; goto out; } @@ -169,7 +169,7 @@ static int cf_check hpet_read( if ( hpet_check_access_length(addr, length) != 0 ) { - result = ~0ul; + result = ~0UL; goto out; } @@ -486,7 +486,7 @@ static int cf_check hpet_write( if ( timer_is_periodic(h, tn) && !(h->hpet.timers[tn].config & HPET_TN_SETVAL) ) { - uint64_t max_period = (timer_is_32bit(h, tn) ? ~0u : ~0ull) >> 1; + uint64_t max_period = (timer_is_32bit(h, tn) ? ~0u : ~0ULL) >> 1; /* * Clamp period to reasonable min/max values: diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2180abeb33..3a99c0ff20 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -294,7 +294,7 @@ void hvm_get_guest_pat(struct vcpu *v, uint64_t *guest_pat) static bool pat_valid(uint64_t val) { /* Yields a non-zero value in any lane which had value greater than 7. */ - uint64_t any_gt_7 = val & 0xf8f8f8f8f8f8f8f8ull; + uint64_t any_gt_7 = val & 0xf8f8f8f8f8f8f8f8ULL; /* * With the > 7 case covered, identify lanes with the value 0-3 by finding @@ -302,7 +302,7 @@ static bool pat_valid(uint64_t val) * * Yields bit 2 set in each lane which has a value <= 3. */ - uint64_t any_le_3 = ~val & 0x0404040404040404ull; + uint64_t any_le_3 = ~val & 0x0404040404040404ULL; /* * Logically, any_2_or_3 is "any_le_3 && bit 1 set". @@ -3626,7 +3626,7 @@ int hvm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) gp_fault: ret = X86EMUL_EXCEPTION; - *msr_content = -1ull; + *msr_content = -1ULL; goto out; } diff --git a/xen/arch/x86/hvm/stdvga.c b/xen/arch/x86/hvm/stdvga.c index 798a9a0549..2586891863 100644 --- a/xen/arch/x86/hvm/stdvga.c +++ b/xen/arch/x86/hvm/stdvga.c @@ -305,7 +305,7 @@ static int cf_check stdvga_mem_read( const struct hvm_io_handler *handler, uint64_t addr, uint32_t size, uint64_t *p_data) { - uint64_t data = ~0ul; + uint64_t data = ~0UL; switch ( size ) { diff --git a/xen/arch/x86/include/asm/apicdef.h b/xen/arch/x86/include/asm/apicdef.h index 2440d83c8d..a261436993 100644 --- a/xen/arch/x86/include/asm/apicdef.h +++ b/xen/arch/x86/include/asm/apicdef.h @@ -34,8 +34,8 @@ #define SET_xAPIC_LOGICAL_ID(x) (((x)<<24)) #define APIC_ALL_CPUS 0xFF #define APIC_DFR 0xE0 -#define APIC_DFR_CLUSTER 0x0FFFFFFFul -#define APIC_DFR_FLAT 0xFFFFFFFFul +#define APIC_DFR_CLUSTER 0x0FFFFFFFUL +#define APIC_DFR_FLAT 0xFFFFFFFFUL #define APIC_SPIV 0xF0 #define APIC_SPIV_FOCUS_DISABLED (1<<9) #define APIC_SPIV_APIC_ENABLED (1<<8) diff --git a/xen/arch/x86/include/asm/debugreg.h b/xen/arch/x86/include/asm/debugreg.h index c57914efc6..86aa6d7143 100644 --- a/xen/arch/x86/include/asm/debugreg.h +++ b/xen/arch/x86/include/asm/debugreg.h @@ -21,8 +21,8 @@ #define DR_STEP (0x4000) /* single-step */ #define DR_SWITCH (0x8000) /* task switch */ #define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */ -#define DR_STATUS_RESERVED_ZERO (~0xffffeffful) /* Reserved, read as zero */ -#define DR_STATUS_RESERVED_ONE 0xffff0ff0ul /* Reserved, read as one */ +#define DR_STATUS_RESERVED_ZERO (~0xffffefffUL) /* Reserved, read as zero */ +#define DR_STATUS_RESERVED_ONE 0xffff0ff0UL /* Reserved, read as one */ /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 @@ -61,12 +61,12 @@ We can slow the instruction pipeline for instructions coming via the gdt or the ldt if we want to. I am not sure why this is an advantage */ -#define DR_CONTROL_RESERVED_ZERO (~0xffff27fful) /* Reserved, read as zero */ -#define DR_CONTROL_RESERVED_ONE (0x00000400ul) /* Reserved, read as one */ -#define DR_LOCAL_EXACT_ENABLE (0x00000100ul) /* Local exact enable */ -#define DR_GLOBAL_EXACT_ENABLE (0x00000200ul) /* Global exact enable */ -#define DR_RTM_ENABLE (0x00000800ul) /* RTM debugging enable */ -#define DR_GENERAL_DETECT (0x00002000ul) /* General detect enable */ +#define DR_CONTROL_RESERVED_ZERO (~0xffff27ffUL) /* Reserved, read as zero */ +#define DR_CONTROL_RESERVED_ONE (0x00000400UL) /* Reserved, read as one */ +#define DR_LOCAL_EXACT_ENABLE (0x00000100UL) /* Local exact enable */ +#define DR_GLOBAL_EXACT_ENABLE (0x00000200UL) /* Global exact enable */ +#define DR_RTM_ENABLE (0x00000800UL) /* RTM debugging enable */ +#define DR_GENERAL_DETECT (0x00002000UL) /* General detect enable */ #define write_debugreg(reg, val) do { \ unsigned long __val = val; \ diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm/guest_pt.h index bde7588342..bc312343cd 100644 --- a/xen/arch/x86/include/asm/guest_pt.h +++ b/xen/arch/x86/include/asm/guest_pt.h @@ -32,15 +32,15 @@ gfn_to_paddr(gfn_t gfn) /* Mask covering the reserved bits from superpage alignment. */ #define SUPERPAGE_RSVD(bit) \ - (((1ul << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1ul))) + (((1UL << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1UL))) static inline uint32_t fold_pse36(uint64_t val) { - return (val & ~(0x1fful << 13)) | ((val & (0x1fful << 32)) >> (32 - 13)); + return (val & ~(0x1ffUL << 13)) | ((val & (0x1ffUL << 32)) >> (32 - 13)); } static inline uint64_t unfold_pse36(uint32_t val) { - return (val & ~(0x1fful << 13)) | ((val & (0x1fful << 13)) << (32 - 13)); + return (val & ~(0x1ffUL << 13)) | ((val & (0x1ffUL << 13)) << (32 - 13)); } /* Types of the guest's page tables and access functions for them */ @@ -99,10 +99,10 @@ static inline guest_l2e_t guest_l2e_from_gfn(gfn_t gfn, u32 flags) #define GUEST_L2_PAGETABLE_SHIFT 21 #define GUEST_L3_PAGETABLE_SHIFT 30 -#define GUEST_L1_PAGETABLE_RSVD 0x7ff0000000000000ul -#define GUEST_L2_PAGETABLE_RSVD 0x7ff0000000000000ul +#define GUEST_L1_PAGETABLE_RSVD 0x7ff0000000000000UL +#define GUEST_L2_PAGETABLE_RSVD 0x7ff0000000000000UL #define GUEST_L3_PAGETABLE_RSVD \ - (0xfff0000000000000ul | _PAGE_GLOBAL | _PAGE_PSE | _PAGE_DIRTY | \ + (0xfff0000000000000UL | _PAGE_GLOBAL | _PAGE_PSE | _PAGE_DIRTY | \ _PAGE_ACCESSED | _PAGE_USER | _PAGE_RW) #else /* GUEST_PAGING_LEVELS == 4 */ @@ -281,7 +281,7 @@ static always_inline bool guest_pks_enabled(const struct vcpu *v) static always_inline uint64_t guest_rsvd_bits(const struct vcpu *v) { return ((PADDR_MASK & - ~((1ul << v->domain->arch.cpuid->extd.maxphysaddr) - 1)) | + ~((1UL << v->domain->arch.cpuid->extd.maxphysaddr) - 1)) | (guest_nx_enabled(v) ? 0 : put_pte_flags(_PAGE_NX_BIT))); } @@ -301,7 +301,7 @@ static always_inline bool guest_l2e_rsvd_bits(const struct vcpu *v, ((l2e.l2 & _PAGE_PSE) && (l2e.l2 & ((GUEST_PAGING_LEVELS == 2 && guest_can_use_pse36(v->domain)) /* PSE36 tops out at 40 bits of address width. */ - ? (fold_pse36(rsvd_bits | (1ul << 40))) + ? (fold_pse36(rsvd_bits | (1UL << 40))) : SUPERPAGE_RSVD(GUEST_L2_PAGETABLE_SHIFT))))); } diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/asm/pv/domain.h index db7a40f68e..75a6b9e5c7 100644 --- a/xen/arch/x86/include/asm/pv/domain.h +++ b/xen/arch/x86/include/asm/pv/domain.h @@ -93,7 +93,7 @@ static inline int pv_vcpu_initialise(struct vcpu *v) { return -EOPNOTSUPP; } static inline void pv_domain_destroy(struct domain *d) {} static inline int pv_domain_initialise(struct domain *d) { return -EOPNOTSUPP; } -static inline unsigned long pv_make_cr4(const struct vcpu *v) { return ~0ul; } +static inline unsigned long pv_make_cr4(const struct vcpu *v) { return ~0UL; } static inline uint64_t pv_get_reg(struct vcpu *v, unsigned int reg) { diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index be2b10a391..ad0eafc900 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -3057,10 +3057,10 @@ static int _get_page_type(struct page_info *page, unsigned long type, if ( (x & PGT_type_mask) == PGT_writable_page ) rc = iommu_legacy_unmap(d, _dfn(mfn_x(mfn)), - 1ul << PAGE_ORDER_4K); + 1UL << PAGE_ORDER_4K); else rc = iommu_legacy_map(d, _dfn(mfn_x(mfn)), mfn, - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, IOMMUF_readable | IOMMUF_writable); if ( unlikely(rc) ) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ecf126566d..ef55498c1a 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -431,7 +431,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; - rsvd = ~0ull; + rsvd = ~0ULL; if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index 7656023748..c5c28300b0 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -205,7 +205,7 @@ void __init check_nmi_watchdog(void) * (Intel SDM, section 18.22.2) */ if ( nmi_watchdog == NMI_LOCAL_APIC ) - nmi_hz = max(1ul, cpu_khz >> 20); + nmi_hz = max(1UL, cpu_khz >> 20); return; } diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 90bcb25e60..4c01813c4b 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -289,7 +289,7 @@ static bool cf_check cat_check_cbm(const struct feat_node *feat, uint32_t *val) unsigned long cbm = *val; /* Set bits should only in the range of [0, cbm_len). */ - if ( cbm & (~0ul << cbm_len) ) + if ( cbm & (~0UL << cbm_len) ) return false; /* At least one bit need to be set. */ @@ -360,7 +360,7 @@ static bool cat_init_feature(const struct cpuid_leaf *regs, wrmsrl(MSR_IA32_PSR_L3_MASK(1), cat_default_val(feat->cat.cbm_len)); rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, - val | (1ull << PSR_L3_QOS_CDP_ENABLE_BIT)); + val | (1ULL << PSR_L3_QOS_CDP_ENABLE_BIT)); break; } @@ -636,7 +636,7 @@ static void __init init_psr_cmt(unsigned int rmid_max) psr_cmt->features = edx; psr_cmt->rmid_max = min(rmid_max, ebx); - rmid_mask = ~(~0ull << get_count_order(ebx)); + rmid_mask = ~(~0ULL << get_count_order(ebx)); if ( psr_cmt->features & PSR_RESOURCE_TYPE_L3 ) { @@ -738,7 +738,7 @@ static void psr_assoc_init(void) unsigned int cos_max = get_max_cos_max(info); if ( info->feat_init ) - psra->cos_mask = ((1ull << get_count_order(cos_max)) - 1) << + psra->cos_mask = ((1ULL << get_count_order(cos_max)) - 1) << ASSOC_REG_SHIFT; } diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 4081cef200..bc50173620 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1047,7 +1047,7 @@ static __init void l1tf_calculations(void) * The address mask which the L1D cache uses, which might be wider than * the CPUID-reported maxphysaddr. */ - l1tf_addr_mask = ((1ul << l1d_maxphysaddr) - 1) & PAGE_MASK; + l1tf_addr_mask = ((1UL << l1d_maxphysaddr) - 1) & PAGE_MASK; /* * To be safe, l1tf_safe_maddr must be above the highest cacheable entity @@ -1087,8 +1087,8 @@ static __init void l1tf_calculations(void) * information is in terms of guest physical layout. */ l1tf_safe_maddr = max(l1tf_safe_maddr, ((l1d_maxphysaddr > paddr_bits) - ? (1ul << paddr_bits) - : (3ul << (paddr_bits - 2)))); + ? (1UL << paddr_bits) + : (3UL << (paddr_bits - 2)))); } /* Calculate whether this CPU is vulnerable to MDS. */ diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 60db439af3..15b36e332d 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1313,7 +1313,7 @@ int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm) { for ( i = spfn; i < epfn; i++ ) if ( iommu_legacy_map(hardware_domain, _dfn(i), _mfn(i), - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, IOMMUF_readable | IOMMUF_writable) ) break; if ( i != epfn ) @@ -1321,7 +1321,7 @@ int memory_add(unsigned long spfn, unsigned long epfn, unsigned int pxm) while (i-- > old_max) /* If statement to satisfy __must_check. */ if ( iommu_legacy_unmap(hardware_domain, _dfn(i), - 1ul << PAGE_ORDER_4K) ) + 1UL << PAGE_ORDER_4K) ) continue; goto destroy_m2p; diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 3d566252ea..770747d88f 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -150,7 +150,7 @@ static void setup_xstate_comp(uint16_t *comp_offsets, offset = comp_offsets[2]; for ( i = 2; i < xstate_features; i++ ) { - if ( (1ul << i) & xcomp_bv ) + if ( (1UL << i) & xcomp_bv ) { if ( test_bit(i, &xstate_align) ) offset = ROUNDUP(offset, 64); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 07e5501914..2006cbaa1c 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -211,7 +211,7 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) for ( i = 2; i < min_t(unsigned int, 63, ARRAY_SIZE(p->xstate.raw)); ++i ) { - if ( xstates & (1ull << i) ) + if ( xstates & (1ULL << i) ) cpuid_count_leaf(0xd, i, &p->xstate.raw[i]); } } @@ -419,7 +419,7 @@ int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, &(struct cpuid_leaf){ p->hv2_limit }); /* Extended leaves. */ - for ( leaf = 0; leaf <= MIN(p->extd.max_leaf & 0xfffful, + for ( leaf = 0; leaf <= MIN(p->extd.max_leaf & 0xffffUL, ARRAY_SIZE(p->extd.raw) - 1); ++leaf ) COPY_LEAF(0x80000000 | leaf, XEN_CPUID_NO_SUBLEAF, &p->extd.raw[leaf]); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581497.910231 (Exim 4.92) (envelope-from ) id 1qTsqR-0006PC-Gq; Wed, 09 Aug 2023 23:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581497.910231; Wed, 09 Aug 2023 23:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqR-0006P3-Dk; Wed, 09 Aug 2023 23:44:03 +0000 Received: by outflank-mailman (input) for mailman id 581497; Wed, 09 Aug 2023 23:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqQ-0006Ni-1u for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqQ-0007tL-0r for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsqP-0004gB-W0 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EI9LnHnSYUCy6yUBhKEObYc/2x43JsO4DGr8g5dDahI=; b=ll3Sxi/VfntvmOxnCzW914hKm4 x/swfPz3D4Lfu8O04pmWMk9jxX38v6SSOXMVyJCFyTcqVQJ8ihIymh3mHiZMWMJp6Hmc1K19GUBPL eB8WBBqrnhwlXS3dMlJVQImtjQTSavEBKtp5NB/XUeJzXQWvzlnFKydIOXco0c41hk0k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools: drop bogus and obsolete ptyfuncs.m4 Message-Id: Date: Wed, 09 Aug 2023 23:44:01 +0000 commit 47ff4ab153e0a5bb48d31afbfdae54141096a78c Author: Olaf Hering AuthorDate: Fri May 12 12:26:14 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 12:29:34 2023 +0100 tools: drop bogus and obsolete ptyfuncs.m4 According to openpty(3) it is required to include to get the prototypes for openpty() and login_tty(). But this is not what the function AX_CHECK_PTYFUNCS actually does. It makes no attempt to include the required header. The two source files which call openpty() and login_tty() already contain the conditionals to include the required header. Remove the bogus m4 file to fix build with clang, which complains about calls to undeclared functions. Remove usage of INCLUDE_LIBUTIL_H in libxl_bootloader.c, it is already covered by inclusion of libxl_osdep.h. Remove usage of PTYFUNCS_LIBS in libxl/Makefile, it is already covered by UTIL_LIBS from config/StdGNU.mk. Signed-off-by: Olaf Hering Reviewed-by: Anthony PERARD (cherry picked from commit 42abf5b9c53eb1b1a902002fcda68708234152c3) --- config/Tools.mk.in | 2 -- m4/ptyfuncs.m4 | 35 ------------------- tools/config.h.in | 3 -- tools/configure | 68 ------------------------------------- tools/configure.ac | 2 -- tools/libs/light/Makefile | 2 +- tools/libs/light/libxl_bootloader.c | 4 --- 7 files changed, 1 insertion(+), 115 deletions(-) diff --git a/config/Tools.mk.in b/config/Tools.mk.in index d0d460f922..204c79c967 100644 --- a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -31,8 +31,6 @@ PTHREAD_CFLAGS := @PTHREAD_CFLAGS@ PTHREAD_LDFLAGS := @PTHREAD_LDFLAGS@ PTHREAD_LIBS := @PTHREAD_LIBS@ -PTYFUNCS_LIBS := @PTYFUNCS_LIBS@ - LIBNL3_LIBS := @LIBNL3_LIBS@ LIBNL3_CFLAGS := @LIBNL3_CFLAGS@ XEN_TOOLS_RPATH := @rpath@ diff --git a/m4/ptyfuncs.m4 b/m4/ptyfuncs.m4 deleted file mode 100644 index 3e37b5a23c..0000000000 --- a/m4/ptyfuncs.m4 +++ /dev/null @@ -1,35 +0,0 @@ -AC_DEFUN([AX_CHECK_PTYFUNCS], [ - dnl This is a workaround for a bug in Debian package - dnl libbsd-dev-0.3.0-1. Once we no longer support that - dnl package we can remove the addition of -Werror to - dnl CPPFLAGS. - AX_SAVEVAR_SAVE(CPPFLAGS) - CPPFLAGS="$CPPFLAGS -Werror" - AC_CHECK_HEADER([libutil.h],[ - AC_DEFINE([INCLUDE_LIBUTIL_H],[],[libutil header file name]) - ]) - AX_SAVEVAR_RESTORE(CPPFLAGS) - AC_CACHE_CHECK([for openpty et al], [ax_cv_ptyfuncs_libs], [ - for ax_cv_ptyfuncs_libs in -lutil "" NOT_FOUND; do - if test "x$ax_cv_ptyfuncs_libs" = "xNOT_FOUND"; then - AC_MSG_FAILURE([Unable to find library for openpty and login_tty]) - fi - AX_SAVEVAR_SAVE(LIBS) - LIBS="$LIBS $ax_cv_ptyfuncs_libs" - AC_LINK_IFELSE([AC_LANG_SOURCE([ -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif -int main(void) { - openpty(0,0,0,0,0); - login_tty(0); -} -])],[ - break - ],[]) - AX_SAVEVAR_RESTORE(LIBS) - done - ]) - PTYFUNCS_LIBS="$ax_cv_ptyfuncs_libs" - AC_SUBST(PTYFUNCS_LIBS) -]) diff --git a/tools/config.h.in b/tools/config.h.in index 9563d3acb6..3071cb3998 100644 --- a/tools/config.h.in +++ b/tools/config.h.in @@ -90,9 +90,6 @@ /* Define extfs header to use */ #undef INCLUDE_EXTFS_H -/* libutil header file name */ -#undef INCLUDE_LIBUTIL_H - /* IPXE path */ #undef IPXE_PATH diff --git a/tools/configure b/tools/configure index ffe3f48901..f1176d1c0f 100755 --- a/tools/configure +++ b/tools/configure @@ -636,7 +636,6 @@ LIBNL3_LIBS LIBNL3_CFLAGS argp_ldflags libiconv -PTYFUNCS_LIBS PTHREAD_LIBS PTHREAD_LDFLAGS PTHREAD_CFLAGS @@ -3751,8 +3750,6 @@ esac - - # Fetched from http://git.savannah.gnu.org/gitweb/?p=autoconf-archive.git;a=blob_plain;f=m4/ax_compare_version.m4 # Commit ID: 27948f49ca30e4222bb7cdd55182bd7341ac50c5 # =========================================================================== @@ -9015,71 +9012,6 @@ $as_echo "$ax_cv_pthread_flags" >&6; } - - - saved_CPPFLAGS="$CPPFLAGS" - - CPPFLAGS="$CPPFLAGS -Werror" - ac_fn_c_check_header_mongrel "$LINENO" "libutil.h" "ac_cv_header_libutil_h" "$ac_includes_default" -if test "x$ac_cv_header_libutil_h" = xyes; then : - - -$as_echo "#define INCLUDE_LIBUTIL_H " >>confdefs.h - - -fi - - - - CPPFLAGS="$saved_CPPFLAGS" - - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for openpty et al" >&5 -$as_echo_n "checking for openpty et al... " >&6; } -if ${ax_cv_ptyfuncs_libs+:} false; then : - $as_echo_n "(cached) " >&6 -else - - for ax_cv_ptyfuncs_libs in -lutil "" NOT_FOUND; do - if test "x$ax_cv_ptyfuncs_libs" = "xNOT_FOUND"; then - { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -as_fn_error $? "Unable to find library for openpty and login_tty -See \`config.log' for more details" "$LINENO" 5; } - fi - - saved_LIBS="$LIBS" - - LIBS="$LIBS $ax_cv_ptyfuncs_libs" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ - -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif -int main(void) { - openpty(0,0,0,0,0); - login_tty(0); -} - -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - - break - -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext - - LIBS="$saved_LIBS" - - done - -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ax_cv_ptyfuncs_libs" >&5 -$as_echo "$ax_cv_ptyfuncs_libs" >&6; } - PTYFUNCS_LIBS="$ax_cv_ptyfuncs_libs" - - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for yajl_alloc in -lyajl" >&5 $as_echo_n "checking for yajl_alloc in -lyajl... " >&6; } if ${ac_cv_lib_yajl_yajl_alloc+:} false; then : diff --git a/tools/configure.ac b/tools/configure.ac index 3a2f6a2da9..31bdef3d70 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -70,7 +70,6 @@ m4_include([../m4/uuid.m4]) m4_include([../m4/pkg.m4]) m4_include([../m4/curses.m4]) m4_include([../m4/pthread.m4]) -m4_include([../m4/ptyfuncs.m4]) m4_include([../m4/extfs.m4]) m4_include([../m4/fetcher.m4]) m4_include([../m4/ax_compare_version.m4]) @@ -417,7 +416,6 @@ AC_SUBST([ZLIB_CFLAGS]) AC_SUBST([ZLIB_LIBS]) AX_CHECK_EXTFS AX_CHECK_PTHREAD -AX_CHECK_PTYFUNCS AC_CHECK_LIB([yajl], [yajl_alloc], [], [AC_MSG_ERROR([Could not find yajl])]) AC_CHECK_LIB([z], [deflateCopy], [], [AC_MSG_ERROR([Could not find zlib])]) diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile index 374be1cfab..c8eeef12ab 100644 --- a/tools/libs/light/Makefile +++ b/tools/libs/light/Makefile @@ -160,7 +160,7 @@ NO_HEADERS_CHK := y include $(XEN_ROOT)/tools/libs/libs.mk -LDLIBS-y += $(PTYFUNCS_LIBS) +LDLIBS-y += $(UTIL_LIBS) LDLIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS) LDLIBS-$(CONFIG_Linux) += -luuid LDLIBS-$(CONFIG_Linux) += -lrt diff --git a/tools/libs/light/libxl_bootloader.c b/tools/libs/light/libxl_bootloader.c index 18e9ebd714..1bc6e51827 100644 --- a/tools/libs/light/libxl_bootloader.c +++ b/tools/libs/light/libxl_bootloader.c @@ -19,10 +19,6 @@ #include #endif -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif - #include "libxl_internal.h" #define BOOTLOADER_BUF_OUT 65536 -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581498.910237 (Exim 4.92) (envelope-from ) id 1qTsqb-0006RG-It; Wed, 09 Aug 2023 23:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581498.910237; Wed, 09 Aug 2023 23:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqb-0006R8-FJ; Wed, 09 Aug 2023 23:44:13 +0000 Received: by outflank-mailman (input) for mailman id 581498; Wed, 09 Aug 2023 23:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqa-0006Qw-63 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqa-0007tP-4n for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsqa-0004ge-3K for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=okLHQctofOPOtis/+Uy6uerNTBokkUshmRQ4txOjtfU=; b=t4cPV5zCt1FyxfXCS6JlsSgTAW GkFWrzrvjoVCa3fdop2YC5nVosWZiX6dF1zO7PEePQX8a6cbD8LU+2vRk2OsBr5kfS3uETCmknwZU HjXefbvP4c0R/xK5gbrF9QuNE4aM4Ld2I/Z6447vWjMkmE7sqTD9Kf8PCVfYRfj85jBs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] subdom: Fix -Werror=address failure in tmp_emulator Message-Id: Date: Wed, 09 Aug 2023 23:44:12 +0000 commit 61805922c7b74a26a7536821e8d6bb457745b57a Author: Andrew Cooper AuthorDate: Thu Aug 3 20:52:08 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 12:29:34 2023 +0100 subdom: Fix -Werror=address failure in tmp_emulator The opensuse-tumbleweed build jobs currently fail with: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c: In function 'rsa_private': /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:56:7: error: the comparison will always evaluate as 'true' for the address of 'p' will never be NULL [-Werror=address] 56 | if (!key->p || !key->q || !key->u) { | ^ In file included from /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:17: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.h:28:12: note: 'p' declared here 28 | tpm_bn_t p; | ^ This is because all tpm_bn_t's are 1-element arrays (of either a GMP or OpenSSL BIGNUM flavour). Adjust it to compile. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jason Andryuk (cherry picked from commit 46c5ef609b09cf51d7535aebbc05816eafca4c8d) --- stubdom/Makefile | 1 + stubdom/vtpm-tpm_bn_t-addr.patch | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/stubdom/Makefile b/stubdom/Makefile index b312f710cd..8db60d4ee0 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -241,6 +241,7 @@ tpm_emulator-$(XEN_TARGET_ARCH): tpm_emulator-$(TPMEMU_VERSION).tar.gz patch -d $@ -p1 < vtpm_extern.patch patch -d $@ -p1 < vtpm-microsecond-duration.patch patch -d $@ -p1 < vtpm-command-duration.patch + patch -d $@ -p1 < vtpm-tpm_bn_t-addr.patch mkdir $@/build cd $@/build; CC=${CC} $(CMAKE) .. -DCMAKE_C_FLAGS:STRING="-std=c99 -DTPM_NO_EXTERN $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) -Wno-declaration-after-statement" touch $@ diff --git a/stubdom/vtpm-tpm_bn_t-addr.patch b/stubdom/vtpm-tpm_bn_t-addr.patch new file mode 100644 index 0000000000..53172ae1c2 --- /dev/null +++ b/stubdom/vtpm-tpm_bn_t-addr.patch @@ -0,0 +1,18 @@ +All tpm_bn_t's are a 1-element array of one form or another, meaning the code +below is tautological and triggers -Werror=address. + +diff -ru tpm_emulator-x86_64.orig/crypto/rsa.c tpm_emulator-x86_64/crypto/rsa.c +--- tpm_emulator-x86_64.orig/crypto/rsa.c 2011-12-20 18:30:06.000000000 +0000 ++++ tpm_emulator-x86_64/crypto/rsa.c 2023-08-03 20:44:17.379166284 +0100 +@@ -53,10 +53,7 @@ + tpm_bn_init2(c, key->size); + tpm_bn_import(p, in_len, 1, in); + +- if (!key->p || !key->q || !key->u) { +- /* c = p ^ d mod n */ +- tpm_bn_powm(c, p, key->d, key->n); +- } else { ++ { + tpm_bn_init2(m1, key->size / 2); + tpm_bn_init2(m2, key->size / 2); + tpm_bn_init2(h, key->size); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581499.910239 (Exim 4.92) (envelope-from ) id 1qTsql-0006UJ-JZ; Wed, 09 Aug 2023 23:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581499.910239; Wed, 09 Aug 2023 23:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsql-0006UB-Gh; Wed, 09 Aug 2023 23:44:23 +0000 Received: by outflank-mailman (input) for mailman id 581499; Wed, 09 Aug 2023 23:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqk-0006U3-9J for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqk-0007ta-83 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsqk-0004h7-73 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=P0YNkoRs+bn9Wi4ZzNIPkFGSVxMxKmVB97fvx+i03Jw=; b=wgV80YHUGhsUNf46iTdqZTyyht R3Ayf8lnQXoiU4PluUUslTwuZg4FIOihT1XKwi4tRDhfn3Nkag/vnOR5ThdITHy92Dw3dpYN5SjgR zQb9pqQEMpSlHIlzQuuoZFIr0qtl6Cq4f/btRENAe50GMJddW6491Vtjhn/wnVKwYoGE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libs/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Message-Id: Date: Wed, 09 Aug 2023 23:44:22 +0000 commit 38306739f6c48d76a33c510cdabee78ec1f1138d Author: Andrew Cooper AuthorDate: Tue Aug 8 14:53:42 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 14:57:49 2023 +0100 libs/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Gitlab reports: init.c:348:18: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] ctrl->is_server = 1; ^ ~ 1 error generated. make[6]: *** [/builds/xen-project/people/andyhhp/xen/tools/libs/vchan/../../../tools/Rules.mk:188: init.o] Error 1 In Xen 4.18, this was fixed with c/s 99ab02f63ea8 ("tools: convert bitfields to unsigned type") but this is an ABI change which can't be backported. Swich 1 for -1 to provide a minimally invasive way to fix the build. No functional change. Signed-off-by: Andrew Cooper --- tools/libs/vchan/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libs/vchan/init.c b/tools/libs/vchan/init.c index 9195bd3b98..b3de8f96fe 100644 --- a/tools/libs/vchan/init.c +++ b/tools/libs/vchan/init.c @@ -345,7 +345,7 @@ struct libxenvchan *libxenvchan_server_init(struct xentoollog_logger *logger, ctrl->ring = NULL; ctrl->event = NULL; - ctrl->is_server = 1; + ctrl->is_server = -1; ctrl->server_persist = 0; ctrl->read.order = min_order(left_min); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581500.910242 (Exim 4.92) (envelope-from ) id 1qTsqv-0006XD-Kd; Wed, 09 Aug 2023 23:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581500.910242; Wed, 09 Aug 2023 23:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqv-0006X6-IB; Wed, 09 Aug 2023 23:44:33 +0000 Received: by outflank-mailman (input) for mailman id 581500; Wed, 09 Aug 2023 23:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqu-0006Wo-C4 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsqu-0007ti-BD for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsqu-0004hY-AJ for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KIO6D/r/nZ08mFJvuHnFNSj/CHJGQUd/L2mDWRmk79w=; b=6W8nEk/OO3i91uJtbbHD8h5ihS A4ZHWhzHjQ7OY131k5mhKdXn0Td0ZQk8dYwRIqJllzTopXhiAxHn2YuVnyQ81Jk8h3o3SaNUpXJrW AxbUEiP029BklTspx/U6zYNDBUVUluGmlwq8tVqJkSTsoL0QAKqS++KZwsKCfaUUqZ8k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools/xen-cpuid: Rework the handling of dynamic featuresets Message-Id: Date: Wed, 09 Aug 2023 23:44:32 +0000 commit 8c6035b2a905bc05d9f5dacb8f26cbdc93cb511b Author: Andrew Cooper AuthorDate: Fri Mar 10 19:04:22 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 tools/xen-cpuid: Rework the handling of dynamic featuresets struct fsinfo is the vestigial remnant of an older internal design which didn't survive very long. Simplify things by inlining get_featureset() and having a single memory allocation that gets reused. This in turn changes featuresets[] to be a simple list of names, so rename it to fs_names[]. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit ec3474e1dd42e6f410601f50b6e74fb7c442cfb9) --- tools/misc/xen-cpuid.c | 53 +++++++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 45e443f5d9..e774a9950e 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -244,16 +244,11 @@ static const struct { #define COL_ALIGN "18" -static struct fsinfo { - const char *name; - uint32_t len; - uint32_t *fs; -} featuresets[] = -{ - [XEN_SYSCTL_cpu_featureset_host] = { "Host", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_raw] = { "Raw", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_pv] = { "PV", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_hvm] = { "HVM", 0, NULL }, +static const char *const fs_names[] = { + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_pv] = "PV", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", }; static void dump_leaf(uint32_t leaf, const char *const *strs) @@ -300,22 +295,10 @@ static void decode_featureset(const uint32_t *features, } } -static int get_featureset(xc_interface *xch, unsigned int idx) -{ - struct fsinfo *f = &featuresets[idx]; - - f->len = nr_features; - f->fs = calloc(nr_features, sizeof(*f->fs)); - - if ( !f->fs ) - err(1, "calloc(, featureset)"); - - return xc_get_cpu_featureset(xch, idx, &f->len, f->fs); -} - static void dump_info(xc_interface *xch, bool detail) { unsigned int i; + uint32_t *fs; printf("nr_features: %u\n", nr_features); @@ -346,26 +329,34 @@ static void dump_info(xc_interface *xch, bool detail) nr_features, "HVM Hap Default", detail); printf("\nDynamic sets:\n"); - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) + + fs = malloc(sizeof(*fs) * nr_features); + if ( !fs ) + err(1, "malloc(featureset)"); + + for ( i = 0; i < ARRAY_SIZE(fs_names); ++i ) { - if ( get_featureset(xch, i) ) + uint32_t len = nr_features; + int ret; + + memset(fs, 0, sizeof(*fs) * nr_features); + + ret = xc_get_cpu_featureset(xch, i, &len, fs); + if ( ret ) { if ( errno == EOPNOTSUPP ) { - printf("%s featureset not supported by Xen\n", - featuresets[i].name); + printf("%s featureset not supported by Xen\n", fs_names[i]); continue; } err(1, "xc_get_featureset()"); } - decode_featureset(featuresets[i].fs, featuresets[i].len, - featuresets[i].name, detail); + decode_featureset(fs, len, fs_names[i], detail); } - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) - free(featuresets[i].fs); + free(fs); } static void print_policy(const char *name, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581501.910246 (Exim 4.92) (envelope-from ) id 1qTsr5-0006aK-ML; Wed, 09 Aug 2023 23:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581501.910246; Wed, 09 Aug 2023 23:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsr5-0006aD-Jn; Wed, 09 Aug 2023 23:44:43 +0000 Received: by outflank-mailman (input) for mailman id 581501; Wed, 09 Aug 2023 23:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsr4-0006Zu-Eq for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsr4-0007u7-ED for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsr4-0004hx-DU for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=clHhf/73H2Uu4COSAktafnzA9/Hm4uVEzqDpsqD9c/c=; b=JAott47NkPueYY4Qz3tULcjeXi Hsclfmhb2XlTgIwx5SK8UeyrLzlIGu8EoxzRvrw5IQSo5sEqfO+s/IecADQWlJj9tXmD15F/7IVtn 9MXCvBSXTgutfWp57Q57KbfA0Vdwv6cqh22sGqPuoJD3te2MKA/t73+QKV/AiXKHZc10=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Message-Id: Date: Wed, 09 Aug 2023 23:44:42 +0000 commit 8b76e103a37d03d87a3668e557eaa69dd2482f58 Author: Andrew Cooper AuthorDate: Fri Mar 10 19:37:56 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Featuresets are supposed to be disappearing when the CPU policy infrastructure is complete, but that has taken longer than expected, and isn't going to be complete imminently either. In the meantime, Xen does have proper default/max featuresets, and xen-cpuid can even get them via the XEN_SYSCTL_cpu_policy_* interface, but only knows now to render them nicely via the featureset interface. Differences between default and max are a frequent source of errors, frequently too in secret leading up to an embargo, so extend the featureset sysctl to allow xen-cpuid to render them all nicely. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Christian Lindig (cherry picked from commit 433d012c6c2737ad5a9aaa994355a4140d601852) --- tools/misc/xen-cpuid.c | 10 ++++++---- tools/ocaml/libs/xc/xenctrl.ml | 8 +++++++- tools/ocaml/libs/xc/xenctrl.mli | 8 +++++++- xen/arch/x86/sysctl.c | 4 +++- xen/include/public/sysctl.h | 2 ++ 5 files changed, 25 insertions(+), 7 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index e774a9950e..859345ae8a 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -245,10 +245,12 @@ static const struct { #define COL_ALIGN "18" static const char *const fs_names[] = { - [XEN_SYSCTL_cpu_featureset_host] = "Host", - [XEN_SYSCTL_cpu_featureset_raw] = "Raw", - [XEN_SYSCTL_cpu_featureset_pv] = "PV", - [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_pv] = "PV Default", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM Default", + [XEN_SYSCTL_cpu_featureset_pv_max] = "PV Max", + [XEN_SYSCTL_cpu_featureset_hvm_max] = "HVM Max", }; static void dump_leaf(uint32_t leaf, const char *const *strs) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index aa650533f7..49aa9102f5 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -309,7 +309,13 @@ external version_changeset: handle -> string = "stub_xc_version_changeset" external version_capabilities: handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external watchdog : handle -> int -> int32 -> int diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 5bf5f5dfea..b9b9274129 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -235,7 +235,13 @@ external version_changeset : handle -> string = "stub_xc_version_changeset" external version_capabilities : handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external pages_to_kib : int64 -> int64 = "stub_pages_to_kib" diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index f8f8d79755..d6612a1707 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -327,14 +327,16 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[4] = { + static const struct cpuid_policy *const policy_table[6] = { [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, #ifdef CONFIG_PV [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, #endif #ifdef CONFIG_HVM [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, #endif }; const struct cpuid_policy *p = NULL; diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 001a4de273..e8dded9fb9 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -796,6 +796,8 @@ struct xen_sysctl_cpu_featureset { #define XEN_SYSCTL_cpu_featureset_host 1 #define XEN_SYSCTL_cpu_featureset_pv 2 #define XEN_SYSCTL_cpu_featureset_hvm 3 +#define XEN_SYSCTL_cpu_featureset_pv_max 4 +#define XEN_SYSCTL_cpu_featureset_hvm_max 5 uint32_t index; /* IN: Which featureset to query? */ uint32_t nr_features; /* IN/OUT: Number of entries in/written to * 'features', or the maximum number of features if -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:44:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581502.910251 (Exim 4.92) (envelope-from ) id 1qTsrF-0006e1-QL; Wed, 09 Aug 2023 23:44:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581502.910251; Wed, 09 Aug 2023 23:44:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrF-0006dt-NB; Wed, 09 Aug 2023 23:44:53 +0000 Received: by outflank-mailman (input) for mailman id 581502; Wed, 09 Aug 2023 23:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrE-0006dh-I8 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrE-0007uH-HK for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsrE-0004iT-Ga for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lkUuIgARZk885KEi+K27dRNSDiVndN/YYFh511zzn78=; b=olheZdQBm09IakwUSPnb4NsORq fmRdGMFJKYeJagtj3mSSM9/1qGFsu9TZrflOCamttTINtipLL1LSWMqvdaHBO5gUvWzwGjpN1JJ3O M09VgTLJigH/Oi0mGrh9Pwnjpapm113ZJkzhLBjs7iuSO5qPocvAZ9jIz06iIB/9Rhj4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Rename struct cpu_policy to struct old_cpuid_policy Message-Id: Date: Wed, 09 Aug 2023 23:44:52 +0000 commit a1a38581b62da7371aa8a8cc960bf74a5776c399 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:31:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Rename struct cpu_policy to struct old_cpuid_policy We want to merge struct cpuid_policy and struct msr_policy together, and the result wants to be called struct cpu_policy. The current struct cpu_policy, being a pair of pointers, isn't terribly useful. Rename the type to struct old_cpu_policy, but it will disappear entirely once the merge is complete. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c2ec94c370f211d73f336ccfbdb32499f1b05f82) --- tools/libs/guest/xg_cpuid_x86.c | 4 ++-- tools/tests/cpu-policy/test-cpu-policy.c | 4 ++-- xen/arch/x86/domctl.c | 4 ++-- xen/arch/x86/include/asm/cpuid.h | 2 +- xen/arch/x86/sysctl.c | 4 ++-- xen/include/xen/lib/x86/cpu-policy.h | 6 +++--- xen/lib/x86/policy.c | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 57f81eb0a0..a22c7bf792 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -868,8 +868,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct cpu_policy h = { &host->cpuid, &host->msr }; - struct cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->cpuid, &host->msr }; + struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index ed450a0997..8a223fddb3 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -602,7 +602,7 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { @@ -654,7 +654,7 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index e9bfbc57a7..971d4937a1 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -41,8 +41,8 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct cpu_policy new = {}; - const struct cpu_policy *sys = is_pv_domain(d) + struct old_cpu_policy new = {}; + const struct old_cpu_policy *sys = is_pv_domain(d) ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 9c3637549a..49b3128f06 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -51,7 +51,7 @@ extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, pv_max_cpuid_policy, pv_def_cpuid_policy, hvm_max_cpuid_policy, hvm_def_cpuid_policy; -extern const struct cpu_policy system_policies[]; +extern const struct old_cpu_policy system_policies[]; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index d6612a1707..4afe73ff4f 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -33,7 +33,7 @@ #include #include -const struct cpu_policy system_policies[6] = { +const struct old_cpu_policy system_policies[6] = { [ XEN_SYSCTL_cpu_policy_raw ] = { &raw_cpuid_policy, &raw_msr_policy, @@ -392,7 +392,7 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct cpu_policy *policy; + const struct old_cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 5a2c4c7b2d..3a5300d107 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -5,7 +5,7 @@ #include #include -struct cpu_policy +struct old_cpu_policy { struct cpuid_policy *cpuid; struct msr_policy *msr; @@ -33,8 +33,8 @@ struct cpu_policy_errors * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f6cea4e2f9..2975711d7c 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581504.910254 (Exim 4.92) (envelope-from ) id 1qTsrP-0006j2-RW; Wed, 09 Aug 2023 23:45:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581504.910254; Wed, 09 Aug 2023 23:45:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrP-0006iv-Ol; Wed, 09 Aug 2023 23:45:03 +0000 Received: by outflank-mailman (input) for mailman id 581504; Wed, 09 Aug 2023 23:45:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrO-0006ij-Lb for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrO-0007v3-Km for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsrO-0004j7-Jr for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eh6eRMKqJRWKZIGLmY1MwChLiKEGWGBAyLa1k/kwKGI=; b=fVcm+wWPxqhodQpdVaHTHlhOeD kvRwCk4Tefu/hbkPM13+vJ5Qe4wpORmClPdHoOibQLMmVge+5fxaMQpBWpTAQ9Y6mr6DxIIcVkghF fYO43htUDg536i0OEYjUbEbQQ1/J1v34hER/soGYQjZf6f2GsRuJEAtDjFYbo8RuDXeI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields Message-Id: Date: Wed, 09 Aug 2023 23:45:02 +0000 commit 1483a13c145864538ae9d8b2eccecdac4a9b45f1 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:48:29 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields These weren't great names to begin with, and using {leaves,msrs} matches up better with the existing nr_{leaves,msr} parameters anyway. Furthermore, by renaming these fields we can get away with using some #define trickery to avoid the struct {cpuid,msr}_policy merge needing to happen in a single changeset. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 21e3ef57e0406b6b9a783f721f29df8f91a00f99) xen: Correct comments after renaming xen_{dom,sys}ctl_cpu_policy fields Fixes: 21e3ef57e040 ("x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné (cherry picked from commit 6e06d229d538ea51b92dc189546c522f5e903511) --- tools/libs/guest/xg_cpuid_x86.c | 12 ++++++------ xen/arch/x86/domctl.c | 12 ++++++------ xen/arch/x86/sysctl.c | 8 ++++---- xen/include/public/domctl.h | 10 ++++------ xen/include/public/sysctl.h | 14 ++++++-------- 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index a22c7bf792..76d9522c3a 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -145,9 +145,9 @@ static int get_system_cpu_policy(xc_interface *xch, uint32_t index, sysctl.cmd = XEN_SYSCTL_get_cpu_policy; sysctl.u.cpu_policy.index = index; sysctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(sysctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(sysctl.u.cpu_policy.leaves, leaves); sysctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(sysctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(sysctl.u.cpu_policy.msrs, msrs); ret = do_sysctl(xch, &sysctl); @@ -183,9 +183,9 @@ static int get_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_get_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); ret = do_domctl(xch, &domctl); @@ -232,9 +232,9 @@ int xc_set_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_set_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); domctl.u.cpu_policy.err_leaf = -1; domctl.u.cpu_policy.err_subleaf = -1; domctl.u.cpu_policy.err_msr = -1; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 971d4937a1..175d473e41 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -55,10 +55,10 @@ static int update_domain_cpu_policy(struct domain *d, /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->cpuid_policy, xdpc->nr_leaves, + new.cpuid, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msr_policy, xdpc->nr_msrs, &err.msr)) ) + new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ @@ -1318,20 +1318,20 @@ long arch_do_domctl( case XEN_DOMCTL_get_cpu_policy: /* Process the CPUID leaves. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( d->arch.cpuid, - domctl->u.cpu_policy.cpuid_policy, + domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; /* Process the MSR entries. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( d->arch.msr, - domctl->u.cpu_policy.msr_policy, + domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 4afe73ff4f..838a9947bf 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -412,11 +412,11 @@ long arch_do_sysctl( } /* Process the CPUID leaves. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( policy->cpuid, - sysctl->u.cpu_policy.cpuid_policy, + sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -428,11 +428,11 @@ long arch_do_sysctl( } /* Process the MSR entries. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( policy->msr, - sysctl->u.cpu_policy.msr_policy, + sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 51be28c3de..7ba3a56520 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -679,12 +679,10 @@ struct xen_domctl_set_target { * Query or set the CPUID and MSR policies for a specific domain. */ struct xen_domctl_cpu_policy { - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy'. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy' */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* IN/OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* IN/OUT */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves' */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs' */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* IN/OUT */ /* * OUT, set_policy only. Written in some (but not all) error cases to diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index e8dded9fb9..7eb8de8fa4 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -1043,15 +1043,13 @@ struct xen_sysctl_cpu_policy { #define XEN_SYSCTL_cpu_policy_pv_default 4 #define XEN_SYSCTL_cpu_policy_hvm_default 5 uint32_t index; /* IN: Which policy to query? */ - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy', or the maximum number of leaves - * if the guest handle is NULL. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy', or the maximum number of MSRs if - * the guest handle is NULL. */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves', + * or the max number if 'leaves' is NULL. */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs', or + * the max number of if 'msrs' is NULL. */ uint32_t _rsvd; /* Must be zero. */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* OUT */ }; typedef struct xen_sysctl_cpu_policy xen_sysctl_cpu_policy_t; DEFINE_XEN_GUEST_HANDLE(xen_sysctl_cpu_policy_t); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581505.910259 (Exim 4.92) (envelope-from ) id 1qTsrZ-0006lW-TI; Wed, 09 Aug 2023 23:45:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581505.910259; Wed, 09 Aug 2023 23:45:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrZ-0006lP-QS; Wed, 09 Aug 2023 23:45:13 +0000 Received: by outflank-mailman (input) for mailman id 581505; Wed, 09 Aug 2023 23:45:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrY-0006lH-P7 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrY-0007vD-OM for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsrY-0004k6-NP for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ngeXlVZbaxnmQ8C3gEhEKtabOF4afZgizO61DD3EMGI=; b=UBGp/Mx60QPvpDmOAdDLfskuNM 8GRRXJiCTETQgxl1z+YxYUl/G/yvVyviW6YayT15cuYCs/p1CBwFXJtn1c7Iw3Y3mi4k/vjx5JIIv wt9R23b5gmsvObGbm5hWjwQ03Er9ggrR3V/TUy8e6+NTJXJLcuykN830cIN41aom3ImQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Rename struct cpuid_policy to struct cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:45:12 +0000 commit 0c3fd4cc26e2d357bc069e46467a7846a752b145 Author: Andrew Cooper AuthorDate: Tue Mar 28 18:55:19 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Rename struct cpuid_policy to struct cpu_policy Also merge lib/x86/cpuid.h entirely into lib/x86/cpu-policy.h Use a temporary define to make struct cpuid_policy still work. There's one forward declaration of struct cpuid_policy in tools/tests/x86_emulator/x86-emulate.h that isn't covered by the define, and it's easier to rename that now than to rearrange the includes. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 743e530380a007774017df9dc2d8cb0659040ee3) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.h | 2 +- xen/arch/x86/include/asm/cpuid.h | 1 - xen/arch/x86/x86_emulate/x86_emulate.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 463 ++++++++++++++++++++++++++++- xen/include/xen/lib/x86/cpuid.h | 475 ------------------------------ xen/lib/x86/cpuid.c | 2 +- 8 files changed, 467 insertions(+), 482 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 79a849a044..7ebe8ee7c3 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 7b07c31bbd..bd82598f97 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -286,7 +286,7 @@ HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o: %.o: %.c $(x86_emulate.h) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 18ae40d017..19bea9c38d 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -70,7 +70,7 @@ #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) extern uint32_t mxcsr_mask; -extern struct cpuid_policy cp; +extern struct cpu_policy cp; #define MMAP_SZ 16384 bool emul_test_init(void); diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 49b3128f06..d418e8100d 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -9,7 +9,6 @@ #include #include -#include #include diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 4732855c40..c89c53e83b 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,7 +23,7 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ -#include +#include #define MAX_INST_LEN 15 diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 3a5300d107..666505964d 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -2,9 +2,342 @@ #ifndef XEN_LIB_X86_POLICIES_H #define XEN_LIB_X86_POLICIES_H -#include +#include #include +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ + +struct cpuid_leaf +{ + uint32_t a, b, c, d; +}; + +/* + * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard + * register, and are unable to cope with spilling it. This results in a + * rather cryptic error: + * error: inconsistent operand constraints in an ‘asm’ + * + * In affected situations, work around the issue by using a separate register + * to hold the the %rBX output, and xchg twice to leave %rBX preserved around + * the asm() statement. + */ +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) +# define XCHG_BX "xchg %%ebx, %[bx];" +# define BX_CON [bx] "=&r" +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ + defined(__x86_64__) && (defined(__code_model_medium__) || \ + defined(__code_model_large__)) +# define XCHG_BX "xchg %%rbx, %q[bx];" +# define BX_CON [bx] "=&r" +#else +# define XCHG_BX "" +# define BX_CON "=&b" +#endif + +static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) + : "a" (leaf) ); +} + +static inline void cpuid_count_leaf( + uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) + : "a" (leaf), "c" (subleaf) ); +} + +#undef BX_CON +#undef XCHG + +/** + * Given the vendor id from CPUID leaf 0, look up Xen's internal integer + * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. + */ +unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); + +/** + * Given Xen's internal vendor ID, return a string suitable for printing. + * Returns "Unknown" for any unrecognised ID. + */ +const char *x86_cpuid_vendor_to_str(unsigned int vendor); + +#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_CACHE (5u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) +#define CPUID_GUEST_NR_TOPO (1u + 1) +#define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) +#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) +#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ + CPUID_GUEST_NR_EXTD_AMD) + +/* + * Maximum number of leaves a struct cpu_policy turns into when serialised for + * interaction with the toolstack. (Sum of all leaves in each union, less the + * entries in basic which sub-unions hang off of.) + */ +#define CPUID_MAX_SERIALISED_LEAVES \ + (CPUID_GUEST_NR_BASIC + \ + CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ + CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ + CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ + CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ + CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) + +struct cpu_policy +{ +#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) +#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) +#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x + + /* Basic leaves: 0x000000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; + struct { + /* Leaf 0x0 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x1 - Family/model/stepping and features. */ + uint32_t raw_fms; + uint8_t :8, /* Brand ID. */ + clflush_size, /* Number of 8-byte blocks per cache line. */ + lppp, /* Logical processors per package. */ + apic_id; /* Initial APIC ID. */ + union { + uint32_t _1c; + struct { DECL_BITFIELD(1c); }; + }; + union { + uint32_t _1d; + struct { DECL_BITFIELD(1d); }; + }; + + /* Leaf 0x2 - TLB/Cache/Prefetch. */ + uint8_t l2_nr_queries; /* Documented as fixed to 1. */ + uint8_t l2_desc[15]; + + uint64_t :64, :64; /* Leaf 0x3 - PSN. */ + uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ + uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ + uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ + uint64_t :64, :64; /* Leaf 0x8 - rsvd */ + uint64_t :64, :64; /* Leaf 0x9 - DCA */ + + /* Leaf 0xa - Intel PMU. */ + uint8_t pmu_version, _pmu[15]; + + uint64_t :64, :64; /* Leaf 0xb - Topology. */ + uint64_t :64, :64; /* Leaf 0xc - rsvd */ + uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ + }; + } basic; + + /* Structured cache leaf: 0x00000004[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; + struct cpuid_cache_leaf { + uint32_t /* a */ type:5, level:3; + bool self_init:1, fully_assoc:1; + uint32_t :4, threads_per_cache:12, cores_per_package:6; + uint32_t /* b */ line_size:12, partitions:10, ways:10; + uint32_t /* c */ sets; + bool /* d */ wbinvd:1, inclusive:1, complex:1; + } subleaf[CPUID_GUEST_NR_CACHE]; + } cache; + + /* Structured feature leaf: 0x00000007[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + union { + uint32_t _7b0; + struct { DECL_BITFIELD(7b0); }; + }; + union { + uint32_t _7c0; + struct { DECL_BITFIELD(7c0); }; + }; + union { + uint32_t _7d0; + struct { DECL_BITFIELD(7d0); }; + }; + + /* Subleaf 1. */ + union { + uint32_t _7a1; + struct { DECL_BITFIELD(7a1); }; + }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; + }; + } feat; + + /* Extended topology enumeration: 0x0000000B[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; + struct cpuid_topo_leaf { + uint32_t id_shift:5, :27; + uint16_t nr_logical, :16; + uint8_t level, type, :8, :8; + uint32_t x2apic_id; + } subleaf[CPUID_GUEST_NR_TOPO]; + } topo; + + /* Xstate feature leaf: 0x0000000D[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; + + struct { + /* Subleaf 0. */ + uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; + + /* Subleaf 1. */ + union { + uint32_t Da1; + struct { DECL_BITFIELD(Da1); }; + }; + uint32_t /* b */:32, xss_low, xss_high; + }; + + /* Per-component common state. Valid for i >= 2. */ + struct { + uint32_t size, offset; + bool xss:1, align:1; + uint32_t _res_d; + } comp[CPUID_GUEST_NR_XSTATE]; + } xstate; + + /* Extended leaves: 0x800000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; + struct { + /* Leaf 0x80000000 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x80000001 - Family/model/stepping and features. */ + uint32_t raw_fms, /* b */:32; + union { + uint32_t e1c; + struct { DECL_BITFIELD(e1c); }; + }; + union { + uint32_t e1d; + struct { DECL_BITFIELD(e1d); }; + }; + + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* L1 cache/TLB. */ + uint64_t :64, :64; /* L2/3 cache/TLB. */ + + /* Leaf 0x80000007 - Advanced Power Management. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t e7d; + struct { DECL_BITFIELD(e7d); }; + }; + + /* Leaf 0x80000008 - Misc addr/feature info. */ + uint8_t maxphysaddr, maxlinaddr, :8, :8; + union { + uint32_t e8b; + struct { DECL_BITFIELD(e8b); }; + }; + uint32_t nc:8, :4, apic_id_size:4, :16; + uint32_t /* d */:32; + + uint64_t :64, :64; /* Leaf 0x80000009. */ + uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ + uint64_t :64, :64; /* Leaf 0x8000000b. */ + uint64_t :64, :64; /* Leaf 0x8000000c. */ + uint64_t :64, :64; /* Leaf 0x8000000d. */ + uint64_t :64, :64; /* Leaf 0x8000000e. */ + uint64_t :64, :64; /* Leaf 0x8000000f. */ + uint64_t :64, :64; /* Leaf 0x80000010. */ + uint64_t :64, :64; /* Leaf 0x80000011. */ + uint64_t :64, :64; /* Leaf 0x80000012. */ + uint64_t :64, :64; /* Leaf 0x80000013. */ + uint64_t :64, :64; /* Leaf 0x80000014. */ + uint64_t :64, :64; /* Leaf 0x80000015. */ + uint64_t :64, :64; /* Leaf 0x80000016. */ + uint64_t :64, :64; /* Leaf 0x80000017. */ + uint64_t :64, :64; /* Leaf 0x80000018. */ + uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ + uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ + uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ + uint64_t :64, :64; /* Leaf 0x8000001c. */ + uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ + uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ + uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ + uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ + + /* Leaf 0x80000021 - Extended Feature 2 */ + union { + uint32_t e21a; + struct { DECL_BITFIELD(e21a); }; + }; + uint32_t /* b */:32, /* c */:32, /* d */:32; + }; + } extd; + +#undef __DECL_BITFIELD +#undef _DECL_BITFIELD +#undef DECL_BITFIELD + + /* Toolstack selected Hypervisor max_leaf (if non-zero). */ + uint8_t hv_limit, hv2_limit; + + /* Value calculated from raw data above. */ + uint8_t x86_vendor; +}; + +/* Temporary */ +#define cpuid_policy cpu_policy + struct old_cpu_policy { struct cpuid_policy *cpuid; @@ -19,6 +352,134 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } +/* Fill in a featureset bitmap from a CPUID policy. */ +static inline void cpuid_policy_to_featureset( + const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +/* Fill in a CPUID policy from a featureset bitmap. */ +static inline void cpuid_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + +static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +{ + return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; +} + +static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +{ + uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; + + return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; +} + +const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); + +/** + * Recalculate the content in a CPUID policy which is derived from raw data. + */ +void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); + +/** + * Fill a CPUID policy using the native CPUID instruction. + * + * No sanitisation is performed, but synthesised values are calculated. + * Values may be influenced by a hypervisor or from masking/faulting + * configuration. + */ +void x86_cpuid_policy_fill_native(struct cpuid_policy *p); + +/** + * Clear leaf data beyond the policies max leaf/subleaf settings. + * + * Policy serialisation purposefully omits out-of-range leaves, because there + * are a large number of them due to vendor differences. However, when + * constructing new policies (e.g. levelling down), it is possible to end up + * with out-of-range leaves with stale content in them. This helper clears + * them. + */ +void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); + +#ifdef __XEN__ +#include +typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +#else +#include +typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +#endif + +/** + * Serialise a cpuid_policy object into an array of cpuid leaves. + * + * @param policy The cpuid_policy to serialise. + * @param leaves The array of leaves to serialise into. + * @param nr_entries The number of entries in 'leaves'. + * @returns -errno + * + * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the + * leaves array is too short. On success, nr_entries is updated with the + * actual number of leaves written. + */ +int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, + cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); + +/** + * Unserialise a cpuid_policy object from an array of cpuid leaves. + * + * @param policy The cpuid_policy to unserialise into. + * @param leaves The array of leaves to unserialise from. + * @param nr_entries The number of entries in 'leaves'. + * @param err_leaf Optional hint for error diagnostics. + * @param err_subleaf Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an + * incoming leaf is out of range of cpuid_policy, in which case the optional + * err_* pointers will identify the out-of-range indicies. + * + * No content validation of in-range leaves is performed. Synthesised data is + * recalculated. + */ +int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, + const cpuid_leaf_buffer_t leaves, + uint32_t nr_entries, uint32_t *err_leaf, + uint32_t *err_subleaf); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h deleted file mode 100644 index fa98b371ee..0000000000 --- a/xen/include/xen/lib/x86/cpuid.h +++ /dev/null @@ -1,475 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_CPUID_H -#define XEN_LIB_X86_CPUID_H - -#include - -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ - -struct cpuid_leaf -{ - uint32_t a, b, c, d; -}; - -/* - * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard - * register, and are unable to cope with spilling it. This results in a - * rather cryptic error: - * error: inconsistent operand constraints in an ‘asm’ - * - * In affected situations, work around the issue by using a separate register - * to hold the the %rBX output, and xchg twice to leave %rBX preserved around - * the asm() statement. - */ -#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) -# define XCHG_BX "xchg %%ebx, %[bx];" -# define BX_CON [bx] "=&r" -#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ - defined(__x86_64__) && (defined(__code_model_medium__) || \ - defined(__code_model_large__)) -# define XCHG_BX "xchg %%rbx, %q[bx];" -# define BX_CON [bx] "=&r" -#else -# define XCHG_BX "" -# define BX_CON "=&b" -#endif - -static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) - : "a" (leaf) ); -} - -static inline void cpuid_count_leaf( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) - : "a" (leaf), "c" (subleaf) ); -} - -#undef BX_CON -#undef XCHG - -/** - * Given the vendor id from CPUID leaf 0, look up Xen's internal integer - * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. - */ -unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); - -/** - * Given Xen's internal vendor ID, return a string suitable for printing. - * Returns "Unknown" for any unrecognised ID. - */ -const char *x86_cpuid_vendor_to_str(unsigned int vendor); - -#define CPUID_GUEST_NR_BASIC (0xdu + 1) -#define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (2u + 1) -#define CPUID_GUEST_NR_TOPO (1u + 1) -#define CPUID_GUEST_NR_XSTATE (62u + 1) -#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) -#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) -#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ - CPUID_GUEST_NR_EXTD_AMD) - -/* - * Maximum number of leaves a struct cpuid_policy turns into when serialised - * for interaction with the toolstack. (Sum of all leaves in each union, less - * the entries in basic which sub-unions hang off of.) - */ -#define CPUID_MAX_SERIALISED_LEAVES \ - (CPUID_GUEST_NR_BASIC + \ - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ - CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) - -struct cpuid_policy -{ -#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) -#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) -#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x - - /* Basic leaves: 0x000000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; - struct { - /* Leaf 0x0 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t raw_fms; - uint8_t :8, /* Brand ID. */ - clflush_size, /* Number of 8-byte blocks per cache line. */ - lppp, /* Logical processors per package. */ - apic_id; /* Initial APIC ID. */ - union { - uint32_t _1c; - struct { DECL_BITFIELD(1c); }; - }; - union { - uint32_t _1d; - struct { DECL_BITFIELD(1d); }; - }; - - /* Leaf 0x2 - TLB/Cache/Prefetch. */ - uint8_t l2_nr_queries; /* Documented as fixed to 1. */ - uint8_t l2_desc[15]; - - uint64_t :64, :64; /* Leaf 0x3 - PSN. */ - uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ - uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ - uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ - uint64_t :64, :64; /* Leaf 0x8 - rsvd */ - uint64_t :64, :64; /* Leaf 0x9 - DCA */ - - /* Leaf 0xa - Intel PMU. */ - uint8_t pmu_version, _pmu[15]; - - uint64_t :64, :64; /* Leaf 0xb - Topology. */ - uint64_t :64, :64; /* Leaf 0xc - rsvd */ - uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ - }; - } basic; - - /* Structured cache leaf: 0x00000004[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; - struct cpuid_cache_leaf { - uint32_t /* a */ type:5, level:3; - bool self_init:1, fully_assoc:1; - uint32_t :4, threads_per_cache:12, cores_per_package:6; - uint32_t /* b */ line_size:12, partitions:10, ways:10; - uint32_t /* c */ sets; - bool /* d */ wbinvd:1, inclusive:1, complex:1; - } subleaf[CPUID_GUEST_NR_CACHE]; - } cache; - - /* Structured feature leaf: 0x00000007[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; - struct { - /* Subleaf 0. */ - uint32_t max_subleaf; - union { - uint32_t _7b0; - struct { DECL_BITFIELD(7b0); }; - }; - union { - uint32_t _7c0; - struct { DECL_BITFIELD(7c0); }; - }; - union { - uint32_t _7d0; - struct { DECL_BITFIELD(7d0); }; - }; - - /* Subleaf 1. */ - union { - uint32_t _7a1; - struct { DECL_BITFIELD(7a1); }; - }; - union { - uint32_t _7b1; - struct { DECL_BITFIELD(7b1); }; - }; - union { - uint32_t _7c1; - struct { DECL_BITFIELD(7c1); }; - }; - union { - uint32_t _7d1; - struct { DECL_BITFIELD(7d1); }; - }; - - /* Subleaf 2. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t _7d2; - struct { DECL_BITFIELD(7d2); }; - }; - }; - } feat; - - /* Extended topology enumeration: 0x0000000B[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; - struct cpuid_topo_leaf { - uint32_t id_shift:5, :27; - uint16_t nr_logical, :16; - uint8_t level, type, :8, :8; - uint32_t x2apic_id; - } subleaf[CPUID_GUEST_NR_TOPO]; - } topo; - - /* Xstate feature leaf: 0x0000000D[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; - - struct { - /* Subleaf 0. */ - uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; - - /* Subleaf 1. */ - union { - uint32_t Da1; - struct { DECL_BITFIELD(Da1); }; - }; - uint32_t /* b */:32, xss_low, xss_high; - }; - - /* Per-component common state. Valid for i >= 2. */ - struct { - uint32_t size, offset; - bool xss:1, align:1; - uint32_t _res_d; - } comp[CPUID_GUEST_NR_XSTATE]; - } xstate; - - /* Extended leaves: 0x800000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; - struct { - /* Leaf 0x80000000 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x80000001 - Family/model/stepping and features. */ - uint32_t raw_fms, /* b */:32; - union { - uint32_t e1c; - struct { DECL_BITFIELD(e1c); }; - }; - union { - uint32_t e1d; - struct { DECL_BITFIELD(e1d); }; - }; - - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* L1 cache/TLB. */ - uint64_t :64, :64; /* L2/3 cache/TLB. */ - - /* Leaf 0x80000007 - Advanced Power Management. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t e7d; - struct { DECL_BITFIELD(e7d); }; - }; - - /* Leaf 0x80000008 - Misc addr/feature info. */ - uint8_t maxphysaddr, maxlinaddr, :8, :8; - union { - uint32_t e8b; - struct { DECL_BITFIELD(e8b); }; - }; - uint32_t nc:8, :4, apic_id_size:4, :16; - uint32_t /* d */:32; - - uint64_t :64, :64; /* Leaf 0x80000009. */ - uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ - uint64_t :64, :64; /* Leaf 0x8000000b. */ - uint64_t :64, :64; /* Leaf 0x8000000c. */ - uint64_t :64, :64; /* Leaf 0x8000000d. */ - uint64_t :64, :64; /* Leaf 0x8000000e. */ - uint64_t :64, :64; /* Leaf 0x8000000f. */ - uint64_t :64, :64; /* Leaf 0x80000010. */ - uint64_t :64, :64; /* Leaf 0x80000011. */ - uint64_t :64, :64; /* Leaf 0x80000012. */ - uint64_t :64, :64; /* Leaf 0x80000013. */ - uint64_t :64, :64; /* Leaf 0x80000014. */ - uint64_t :64, :64; /* Leaf 0x80000015. */ - uint64_t :64, :64; /* Leaf 0x80000016. */ - uint64_t :64, :64; /* Leaf 0x80000017. */ - uint64_t :64, :64; /* Leaf 0x80000018. */ - uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ - uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ - uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ - uint64_t :64, :64; /* Leaf 0x8000001c. */ - uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ - uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ - uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ - uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ - - /* Leaf 0x80000021 - Extended Feature 2 */ - union { - uint32_t e21a; - struct { DECL_BITFIELD(e21a); }; - }; - uint32_t /* b */:32, /* c */:32, /* d */:32; - }; - } extd; - -#undef __DECL_BITFIELD -#undef _DECL_BITFIELD -#undef DECL_BITFIELD - - /* Toolstack selected Hypervisor max_leaf (if non-zero). */ - uint8_t hv_limit, hv2_limit; - - /* Value calculated from raw data above. */ - uint8_t x86_vendor; -}; - -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} - -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} - -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -{ - return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; -} - -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) -{ - uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; - - return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; -} - -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); - -/** - * Recalculate the content in a CPUID policy which is derived from raw data. - */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); - -/** - * Fill a CPUID policy using the native CPUID instruction. - * - * No sanitisation is performed, but synthesised values are calculated. - * Values may be influenced by a hypervisor or from masking/faulting - * configuration. - */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); - -/** - * Clear leaf data beyond the policies max leaf/subleaf settings. - * - * Policy serialisation purposefully omits out-of-range leaves, because there - * are a large number of them due to vendor differences. However, when - * constructing new policies (e.g. levelling down), it is possible to end up - * with out-of-range leaves with stale content in them. This helper clears - * them. - */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; -#else -#include -typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; -#endif - -/** - * Serialise a cpuid_policy object into an array of cpuid leaves. - * - * @param policy The cpuid_policy to serialise. - * @param leaves The array of leaves to serialise into. - * @param nr_entries The number of entries in 'leaves'. - * @returns -errno - * - * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the - * leaves array is too short. On success, nr_entries is updated with the - * actual number of leaves written. - */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, - cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); - -/** - * Unserialise a cpuid_policy object from an array of cpuid leaves. - * - * @param policy The cpuid_policy to unserialise into. - * @param leaves The array of leaves to unserialise from. - * @param nr_entries The number of entries in 'leaves'. - * @param err_leaf Optional hint for error diagnostics. - * @param err_subleaf Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional - * err_* pointers will identify the out-of-range indicies. - * - * No content validation of in-range leaves is performed. Synthesised data is - * recalculated. - */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, - const cpuid_leaf_buffer_t leaves, - uint32_t nr_entries, uint32_t *err_leaf, - uint32_t *err_subleaf); - -#endif /* !XEN_LIB_X86_CPUID_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 8eb88314f5..e81f76c779 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581506.910262 (Exim 4.92) (envelope-from ) id 1qTsrk-0006q5-0N; Wed, 09 Aug 2023 23:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581506.910262; Wed, 09 Aug 2023 23:45:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrj-0006py-U7; Wed, 09 Aug 2023 23:45:23 +0000 Received: by outflank-mailman (input) for mailman id 581506; Wed, 09 Aug 2023 23:45:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsri-0006pq-Tv for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsri-0007vL-TC for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsri-0004kt-Qq for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sNiy3PFN+TNId62BhWBZw2BmKoMZI2rMeoUehmYF0qI=; b=KnRnNSOZDe2KVDtiE2+Ng94xN7 mawle0nw1KT92E/rXT6VyGE1hAss8dnAFBmFdjKX2qK2tKXEMOt7i1l0Ot0RQN4ueGuZ3tpgnIK20 o/x97rQFgkMdmZBQzyikm1Z/9psSn87KAS5b2ncTV+OLi4UqgDjqKM5U/qZTHHZ7DBPU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Merge struct msr_policy into struct cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:45:22 +0000 commit 6452ec66931e32d8ff2cbfb358dd4904d9b58a2c Author: Andrew Cooper AuthorDate: Tue Mar 28 21:24:20 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 03812da3754d550dd8cbee7289469069ea6f0073) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 1 - xen/arch/x86/include/asm/msr.h | 3 +- xen/include/xen/lib/x86/cpu-policy.h | 81 ++++++++++++++++++++++- xen/include/xen/lib/x86/msr.h | 104 ------------------------------ xen/lib/x86/msr.c | 2 +- 5 files changed, 83 insertions(+), 108 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 7ebe8ee7c3..316eb0efe0 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -10,7 +10,6 @@ #include #include -#include #include static bool debug; diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index dd1eee04a6..bb32bf19ad 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -6,8 +6,9 @@ #include #include #include +#include -#include +#include #include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 666505964d..53fffca552 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -3,7 +3,6 @@ #define XEN_LIB_X86_POLICIES_H #include -#include #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -107,6 +106,9 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) +/* Maximum number of MSRs written when serialising a cpu_policy. */ +#define MSR_MAX_SERIALISED_ENTRIES 2 + struct cpu_policy { #define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) @@ -324,6 +326,44 @@ struct cpu_policy }; } extd; + /* + * 0x000000ce - MSR_INTEL_PLATFORM_INFO + * + * This MSR is non-architectural, but for simplicy we allow it to be read + * unconditionally. CPUID Faulting support can be fully emulated for HVM + * guests so can be offered unconditionally, while support for PV guests + * is dependent on real hardware support. + */ + union { + uint32_t raw; + struct { + uint32_t :31; + bool cpuid_faulting:1; + }; + } platform_info; + + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -337,6 +377,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy struct old_cpu_policy { @@ -438,9 +479,11 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); #ifdef __XEN__ #include typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; #else #include typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** @@ -480,6 +523,42 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); +/** + * Serialise an msr_policy object into an array. + * + * @param policy The msr_policy to serialise. + * @param msrs The array of msrs to serialise into. + * @param nr_entries The number of entries in 'msrs'. + * @returns -errno + * + * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the + * buffer array is too short. On success, nr_entries is updated with the + * actual number of msrs written. + */ +int x86_msr_copy_to_buffer(const struct msr_policy *policy, + msr_entry_buffer_t msrs, uint32_t *nr_entries); + +/** + * Unserialise an msr_policy object from an array of msrs. + * + * @param policy The msr_policy object to unserialise into. + * @param msrs The array of msrs to unserialise from. + * @param nr_entries The number of entries in 'msrs'. + * @param err_msr Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons + * based on the content in an individual 'msrs' entry, including the MSR index + * not being valid in the policy, the flags field being nonzero, or if the + * value provided would truncate when stored in the policy. In such cases, + * the optional err_* pointer will identify the problematic MSR. + * + * No content validation is performed on the data stored in the policy object. + */ +int x86_msr_copy_from_buffer(struct msr_policy *policy, + const msr_entry_buffer_t msrs, uint32_t nr_entries, + uint32_t *err_msr); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/msr.h b/xen/include/xen/lib/x86/msr.h deleted file mode 100644 index 48ba4a59c0..0000000000 --- a/xen/include/xen/lib/x86/msr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_MSR_H -#define XEN_LIB_X86_MSR_H - -/* Maximum number of MSRs written when serialising msr_policy. */ -#define MSR_MAX_SERIALISED_ENTRIES 2 - -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy -{ - /* - * 0x000000ce - MSR_INTEL_PLATFORM_INFO - * - * This MSR is non-architectural, but for simplicy we allow it to be read - * unconditionally. CPUID Faulting support can be fully emulated for HVM - * guests so can be offered unconditionally, while support for PV guests - * is dependent on real hardware support. - */ - union { - uint32_t raw; - struct { - uint32_t :31; - bool cpuid_faulting:1; - }; - } platform_info; - - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; -#else -#include -typedef xen_msr_entry_t msr_entry_buffer_t[]; -#endif - -/** - * Serialise an msr_policy object into an array. - * - * @param policy The msr_policy to serialise. - * @param msrs The array of msrs to serialise into. - * @param nr_entries The number of entries in 'msrs'. - * @returns -errno - * - * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the - * buffer array is too short. On success, nr_entries is updated with the - * actual number of msrs written. - */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, - msr_entry_buffer_t msrs, uint32_t *nr_entries); - -/** - * Unserialise an msr_policy object from an array of msrs. - * - * @param policy The msr_policy object to unserialise into. - * @param msrs The array of msrs to unserialise from. - * @param nr_entries The number of entries in 'msrs'. - * @param err_msr Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons - * based on the content in an individual 'msrs' entry, including the MSR index - * not being valid in the policy, the flags field being nonzero, or if the - * value provided would truncate when stored in the policy. In such cases, - * the optional err_* pointer will identify the problematic MSR. - * - * No content validation is performed on the data stored in the policy object. - */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, - const msr_entry_buffer_t msrs, uint32_t nr_entries, - uint32_t *err_msr); - -#endif /* !XEN_LIB_X86_MSR_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index 7d71e92a38..c4d885e7b5 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include /* * Copy a single MSR into the provided msr_entry_buffer_t buffer, performing a -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581507.910267 (Exim 4.92) (envelope-from ) id 1qTsru-0006sl-2a; Wed, 09 Aug 2023 23:45:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581507.910267; Wed, 09 Aug 2023 23:45:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrt-0006sd-Vi; Wed, 09 Aug 2023 23:45:33 +0000 Received: by outflank-mailman (input) for mailman id 581507; Wed, 09 Aug 2023 23:45:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrt-0006sR-1F for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsrt-0007vW-0M for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsrs-0004lQ-Vn for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lNiiHhLR8D0xmJyAW9h7tEtFsi8pVD3tJNHq3zFGnfc=; b=wdtZx4uw79NqE231ZvbSAKRzKC tbY3G2Dk/EVa4FEN7Y0MzFgoIBJOOUSf96TOaGjkXDqb287rBZhz12CUVT6v/qPeV+YNnEbJS1yjs YqoP1PJMOleYzktgL4G4wiKHwpoUdCT7UqE3atE8dyjfZZdAFSqjBTJmt1eHMBMdAZWM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Merge the system {cpuid,msr} policy objects Message-Id: Date: Wed, 09 Aug 2023 23:45:32 +0000 commit 77a5a47a0e61b9a5a69c59fcb9fde4f50ec8101b Author: Andrew Cooper AuthorDate: Wed Mar 29 07:39:44 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Merge the system {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Introduce a new cpu-policy.{h,c} to be the new location for all policy handling logic. Place the combined objects in __ro_after_init, which is new since the original logic was written. As we're trying to phase out the use of struct old_cpu_policy entirely, rework update_domain_cpu_policy() to not pointer-chase through system_policies[]. This in turn allows system_policies[] in sysctl.c to become static and reduced in scope to XEN_SYSCTL_get_cpu_policy. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 6bc33366795d14a21a3244d0f3b63f7dccea87ef) --- xen/arch/x86/Makefile | 1 + xen/arch/x86/cpu-policy.c | 18 +++++++++ xen/arch/x86/cpu/common.c | 4 +- xen/arch/x86/cpuid.c | 66 ++++++++++++++------------------ xen/arch/x86/domctl.c | 17 ++++++--- xen/arch/x86/include/asm/cpu-policy.h | 14 +++++++ xen/arch/x86/include/asm/cpuid.h | 6 --- xen/arch/x86/include/asm/msr.h | 7 ---- xen/arch/x86/msr.c | 38 +++++++------------ xen/arch/x86/sysctl.c | 71 +++++++++++++---------------------- 10 files changed, 116 insertions(+), 126 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 5accbe4c67..f213a6b56a 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -18,6 +18,7 @@ obj-y += bitops.o obj-bin-y += bzimage.init.o obj-bin-y += clear_page.o obj-bin-y += copy_page.o +obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o obj-$(CONFIG_PV32) += x86_64/compat.o diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c new file mode 100644 index 0000000000..663e9a084c --- /dev/null +++ b/xen/arch/x86/cpu-policy.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#include + +#include + +struct cpu_policy __ro_after_init raw_cpu_policy; +struct cpu_policy __ro_after_init host_cpu_policy; +#ifdef CONFIG_PV +struct cpu_policy __ro_after_init pv_max_cpu_policy; +struct cpu_policy __ro_after_init pv_def_cpu_policy; +#endif +#ifdef CONFIG_HVM +struct cpu_policy __ro_after_init hvm_max_cpu_policy; +struct cpu_policy __ro_after_init hvm_def_cpu_policy; +#endif diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 27f73d3bbe..665200db38 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -138,7 +140,7 @@ bool __init probe_cpuid_faulting(void) return false; if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) - raw_msr_policy.platform_info.cpuid_faulting = + raw_cpu_policy.platform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; if (rc || diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index acc2f606ce..1327dba30d 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -142,17 +143,6 @@ static void zero_leaves(struct cpuid_leaf *l, memset(&l[first], 0, sizeof(*l) * (last - first + 1)); } -struct cpuid_policy __read_mostly raw_cpuid_policy, - __read_mostly host_cpuid_policy; -#ifdef CONFIG_PV -struct cpuid_policy __read_mostly pv_max_cpuid_policy; -struct cpuid_policy __read_mostly pv_def_cpuid_policy; -#endif -#ifdef CONFIG_HVM -struct cpuid_policy __read_mostly hvm_max_cpuid_policy; -struct cpuid_policy __read_mostly hvm_def_cpuid_policy; -#endif - static void sanitise_featureset(uint32_t *fs) { /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ @@ -344,7 +334,7 @@ static void recalculate_misc(struct cpuid_policy *p) static void __init calculate_raw_policy(void) { - struct cpuid_policy *p = &raw_cpuid_policy; + struct cpuid_policy *p = &raw_cpu_policy; x86_cpuid_policy_fill_native(p); @@ -354,10 +344,10 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct cpuid_policy *p = &host_cpuid_policy; + struct cpuid_policy *p = &host_cpu_policy; unsigned int max_extd_leaf; - *p = raw_cpuid_policy; + *p = raw_cpu_policy; p->basic.max_leaf = min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); @@ -449,17 +439,17 @@ static void __init guest_common_feature_adjustments(uint32_t *fs) * of IBRS by using the AMD feature bit. An administrator may wish for * performance reasons to offer IBPB without IBRS. */ - if ( host_cpuid_policy.feat.ibrsb ) + if ( host_cpu_policy.feat.ibrsb ) __set_bit(X86_FEATURE_IBPB, fs); } static void __init calculate_pv_max_policy(void) { - struct cpuid_policy *p = &pv_max_cpuid_policy; + struct cpuid_policy *p = &pv_max_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -486,11 +476,11 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { - struct cpuid_policy *p = &pv_def_cpuid_policy; + struct cpuid_policy *p = &pv_def_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = pv_max_cpuid_policy; + *p = pv_max_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -506,12 +496,12 @@ static void __init calculate_pv_def_policy(void) static void __init calculate_hvm_max_policy(void) { - struct cpuid_policy *p = &hvm_max_cpuid_policy; + struct cpuid_policy *p = &hvm_max_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -539,7 +529,7 @@ static void __init calculate_hvm_max_policy(void) * HVM guests are able if running in protected mode. */ if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpuid_policy.basic.sep ) + raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); /* @@ -588,12 +578,12 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct cpuid_policy *p = &hvm_def_cpuid_policy; + struct cpuid_policy *p = &hvm_def_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = hvm_max_cpuid_policy; + *p = hvm_max_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -661,8 +651,8 @@ void recalculate_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; unsigned int i; @@ -737,7 +727,7 @@ void recalculate_cpuid_policy(struct domain *d) /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpuid_policy.feat._7b0 & + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); @@ -788,8 +778,8 @@ void recalculate_cpuid_policy(struct domain *d) int init_domain_cpuid_policy(struct domain *d) { struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !p ) { @@ -1093,7 +1083,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) - *res = raw_cpuid_policy.basic.raw[5]; + *res = raw_cpu_policy.basic.raw[5]; break; case 0x7: @@ -1225,14 +1215,14 @@ static void __init __maybe_unused build_assertions(void) /* Find some more clever allocation scheme if this trips. */ BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.basic) != - sizeof(raw_cpuid_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.feat) != - sizeof(raw_cpuid_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.xstate) != - sizeof(raw_cpuid_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.extd) != - sizeof(raw_cpuid_policy.extd.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); } /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 175d473e41..2689df813b 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,18 +36,25 @@ #include #include #include -#include +#include static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct old_cpu_policy new = {}; - const struct old_cpu_policy *sys = is_pv_domain(d) - ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] - : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; + struct cpu_policy *sys = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + struct old_cpu_policy old_sys = { sys, sys }; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; + if ( !sys ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + /* Start by copying the domain's existing policies. */ if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || !(new.msr = xmemdup(d->arch.msr)) ) @@ -65,7 +72,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); if ( ret ) goto out; diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h new file mode 100644 index 0000000000..eef14bb426 --- /dev/null +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef X86_CPU_POLICY_H +#define X86_CPU_POLICY_H + +struct cpu_policy; + +extern struct cpu_policy raw_cpu_policy; +extern struct cpu_policy host_cpu_policy; +extern struct cpu_policy pv_max_cpu_policy; +extern struct cpu_policy pv_def_cpu_policy; +extern struct cpu_policy hvm_max_cpu_policy; +extern struct cpu_policy hvm_def_cpu_policy; + +#endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index d418e8100d..ea05862773 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -46,12 +46,6 @@ DECLARE_PER_CPU(struct cpuidmasks, cpuidmasks); /* Default masking MSR values, calculated at boot. */ extern struct cpuidmasks cpuidmask_defaults; -extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, - pv_max_cpuid_policy, pv_def_cpuid_policy, - hvm_max_cpuid_policy, hvm_def_cpuid_policy; - -extern const struct old_cpu_policy system_policies[]; - /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index bb32bf19ad..8a4da50c50 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -280,13 +280,6 @@ static inline void wrmsr_tsc_aux(uint32_t val) uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -extern struct msr_policy raw_msr_policy, - host_msr_policy, - pv_max_msr_policy, - pv_def_msr_policy, - hvm_max_msr_policy, - hvm_def_msr_policy; - /* Container object for per-vCPU MSRs */ struct vcpu_msrs { diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index cf46b18aa6..01f95603e2 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -37,20 +38,9 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -struct msr_policy __read_mostly raw_msr_policy, - __read_mostly host_msr_policy; -#ifdef CONFIG_PV -struct msr_policy __read_mostly pv_max_msr_policy; -struct msr_policy __read_mostly pv_def_msr_policy; -#endif -#ifdef CONFIG_HVM -struct msr_policy __read_mostly hvm_max_msr_policy; -struct msr_policy __read_mostly hvm_def_msr_policy; -#endif - static void __init calculate_raw_policy(void) { - struct msr_policy *mp = &raw_msr_policy; + struct msr_policy *mp = &raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -61,9 +51,9 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct msr_policy *mp = &host_msr_policy; + struct msr_policy *mp = &host_cpu_policy; - *mp = raw_msr_policy; + *mp = raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ @@ -81,25 +71,25 @@ static void __init calculate_host_policy(void) static void __init calculate_pv_max_policy(void) { - struct msr_policy *mp = &pv_max_msr_policy; + struct msr_policy *mp = &pv_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) { - struct msr_policy *mp = &pv_def_msr_policy; + struct msr_policy *mp = &pv_def_cpu_policy; - *mp = pv_max_msr_policy; + *mp = pv_max_cpu_policy; } static void __init calculate_hvm_max_policy(void) { - struct msr_policy *mp = &hvm_max_msr_policy; + struct msr_policy *mp = &hvm_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; @@ -109,9 +99,9 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct msr_policy *mp = &hvm_def_msr_policy; + struct msr_policy *mp = &hvm_def_cpu_policy; - *mp = hvm_max_msr_policy; + *mp = hvm_max_cpu_policy; } void __init init_guest_msr_policy(void) @@ -135,8 +125,8 @@ void __init init_guest_msr_policy(void) int init_domain_msr_policy(struct domain *d) { struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_msr_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_msr_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !mp ) { diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 838a9947bf..c68242e5bc 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -31,38 +31,7 @@ #include #include #include -#include - -const struct old_cpu_policy system_policies[6] = { - [ XEN_SYSCTL_cpu_policy_raw ] = { - &raw_cpuid_policy, - &raw_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_host ] = { - &host_cpuid_policy, - &host_msr_policy, - }, -#ifdef CONFIG_PV - [ XEN_SYSCTL_cpu_policy_pv_max ] = { - &pv_max_cpuid_policy, - &pv_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_pv_default ] = { - &pv_def_cpuid_policy, - &pv_def_msr_policy, - }, -#endif -#ifdef CONFIG_HVM - [ XEN_SYSCTL_cpu_policy_hvm_max ] = { - &hvm_max_cpuid_policy, - &hvm_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_hvm_default ] = { - &hvm_def_cpuid_policy, - &hvm_def_msr_policy, - }, -#endif -}; +#include struct l3_cache_info { int ret; @@ -327,19 +296,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[6] = { - [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, + static const struct cpu_policy *const policy_table[6] = { + [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_featureset_host] = &host_cpu_policy, #ifdef CONFIG_PV - [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpu_policy, #endif #ifdef CONFIG_HVM - [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpu_policy, #endif }; - const struct cpuid_policy *p = NULL; + const struct cpu_policy *p = NULL; uint32_t featureset[FSCAPINTS]; unsigned int nr; @@ -392,7 +361,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct old_cpu_policy *policy; + static const struct cpu_policy *const system_policies[6] = { + [XEN_SYSCTL_cpu_policy_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_policy_host] = &host_cpu_policy, +#ifdef CONFIG_PV + [XEN_SYSCTL_cpu_policy_pv_max] = &pv_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_pv_default] = &pv_def_cpu_policy, +#endif +#ifdef CONFIG_HVM + [XEN_SYSCTL_cpu_policy_hvm_max] = &hvm_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_hvm_default] = &hvm_def_cpu_policy, +#endif + }; + const struct cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || @@ -401,11 +382,11 @@ long arch_do_sysctl( ret = -EINVAL; break; } - policy = &system_policies[ + policy = system_policies[ array_index_nospec(sysctl->u.cpu_policy.index, ARRAY_SIZE(system_policies))]; - if ( !policy->cpuid || !policy->msr ) + if ( !policy ) { ret = -EOPNOTSUPP; break; @@ -415,7 +396,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - policy->cpuid, + policy, sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -431,7 +412,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - policy->msr, + policy, sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581508.910271 (Exim 4.92) (envelope-from ) id 1qTss4-0006wU-5L; Wed, 09 Aug 2023 23:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581508.910271; Wed, 09 Aug 2023 23:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTss4-0006wN-2f; Wed, 09 Aug 2023 23:45:44 +0000 Received: by outflank-mailman (input) for mailman id 581508; Wed, 09 Aug 2023 23:45:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTss3-0006wD-4e for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTss3-0007vy-3x for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTss3-0004lq-35 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fBeCdDDbaGA7PMRcYFwFvu4OORhpEEIgLeRaqEEK9AI=; b=1sBAYuQPhrtTywja2xenmZBL4F 6PPaNBoOnLIhNN1YAwGpfOqkBs1jzJDB6LNb0mXbLODCVKEP6C5Njw/Nqn/g3n6FJrO8D1syax/Xe i+cpPHYnJDSdRKI1WVJdgNjgY82Ftc7NY2xGFNUf0l7awYg2PQmegpiQthlF7CTy+WtU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Merge a domain's {cpuid,msr} policy objects Message-Id: Date: Wed, 09 Aug 2023 23:45:43 +0000 commit d11f78fdd2a5d5fc2fdf4f98d259f211da4d9613 Author: Andrew Cooper AuthorDate: Wed Mar 29 11:32:25 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Merge a domain's {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Drop the d->arch.msr pointer, and union d->arch.cpuid to give it a second name of cpu_policy in the interim. Merge init_domain_{cpuid,msr}_policy() into a single init_domain_cpu_policy(), moving the implementation into cpu-policy.c No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bd13dae34809e61e37ba1cd5de893c5c10c46256) --- xen/arch/x86/cpu-policy.c | 49 +++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 23 ---------------- xen/arch/x86/domain.c | 15 ++++------- xen/arch/x86/domctl.c | 35 ++++++++++++------------- xen/arch/x86/include/asm/cpu-policy.h | 4 +++ xen/arch/x86/include/asm/cpuid.h | 3 --- xen/arch/x86/include/asm/domain.h | 13 +++++++--- xen/arch/x86/include/asm/msr.h | 1 - xen/arch/x86/mm/mem_sharing.c | 3 +-- xen/arch/x86/msr.c | 44 ------------------------------- 10 files changed, 86 insertions(+), 104 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 663e9a084c..e9ac1269c3 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include +#include struct cpu_policy __ro_after_init raw_cpu_policy; struct cpu_policy __ro_after_init host_cpu_policy; @@ -16,3 +19,49 @@ struct cpu_policy __ro_after_init pv_def_cpu_policy; struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif + +int init_domain_cpu_policy(struct domain *d) +{ + struct cpu_policy *p = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); + + if ( !p ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + + p = xmemdup(p); + if ( !p ) + return -ENOMEM; + + /* See comment in ctxt_switch_levelling() */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); + } + + d->arch.cpu_policy = p; + + recalculate_cpuid_policy(d); + + return 0; +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 1327dba30d..e074befb72 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -775,29 +775,6 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } -int init_domain_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !p ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - p = xmemdup(p); - if ( !p ) - return -ENOMEM; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; -} - void __init init_dom0_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index e546c98322..faea542286 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -66,6 +66,7 @@ #ifdef CONFIG_COMPAT #include #endif +#include #include #include #include @@ -743,8 +744,7 @@ int arch_domain_create(struct domain *d, d->arch.ctxt_switch = &idle_csw; - d->arch.cpuid = ZERO_BLOCK_PTR; /* Catch stray misuses. */ - d->arch.msr = ZERO_BLOCK_PTR; + d->arch.cpu_policy = ZERO_BLOCK_PTR; /* Catch stray misuses. */ return 0; } @@ -799,10 +799,7 @@ int arch_domain_create(struct domain *d, goto fail; paging_initialised = true; - if ( (rc = init_domain_cpuid_policy(d)) ) - goto fail; - - if ( (rc = init_domain_msr_policy(d)) ) + if ( (rc = init_domain_cpu_policy(d)) ) goto fail; d->arch.ioport_caps = @@ -873,8 +870,7 @@ int arch_domain_create(struct domain *d, iommu_domain_destroy(d); cleanup_domain_irq_mapping(d); free_xenheap_page(d->shared_info); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); if ( paging_initialised ) paging_final_teardown(d); free_perdomain_mappings(d); @@ -888,8 +884,7 @@ void arch_domain_destroy(struct domain *d) hvm_domain_destroy(d); xfree(d->arch.e820); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); free_domain_pirqs(d); if ( !is_idle_domain(d) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 2689df813b..857d0abe32 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -41,11 +41,11 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct old_cpu_policy new = {}; + struct cpu_policy *new; struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }; + struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -55,33 +55,33 @@ static int update_domain_cpu_policy(struct domain *d, return -EOPNOTSUPP; } - /* Start by copying the domain's existing policies. */ - if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || - !(new.msr = xmemdup(d->arch.msr)) ) + /* Start by copying the domain's existing policy. */ + if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; + old_new = (struct old_cpu_policy){ new, new }; + /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->leaves, xdpc->nr_leaves, + new, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) + new, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); + x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); if ( ret ) goto out; /* - * Audit was successful. Replace existing policies, leaving the old - * policies to be freed. + * Audit was successful. Replace the existing policy, leaving the old one + * to be freed. */ - SWAP(new.cpuid, d->arch.cpuid); - SWAP(new.msr, d->arch.msr); + SWAP(new, d->arch.cpu_policy); /* TODO: Drop when x86_cpu_policies_are_compatible() is completed. */ recalculate_cpuid_policy(d); @@ -90,9 +90,8 @@ static int update_domain_cpu_policy(struct domain *d, domain_cpu_policy_changed(d); out: - /* Free whichever cpuid/msr structs are not installed in struct domain. */ - xfree(new.cpuid); - xfree(new.msr); + /* Free whichever struct is not installed in struct domain. */ + xfree(new); if ( ret ) { @@ -1328,7 +1327,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - d->arch.cpuid, + d->arch.cpu_policy, domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; @@ -1337,7 +1336,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - d->arch.msr, + d->arch.cpu_policy, domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index eef14bb426..9ba34bbf5e 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -3,6 +3,7 @@ #define X86_CPU_POLICY_H struct cpu_policy; +struct domain; extern struct cpu_policy raw_cpu_policy; extern struct cpu_policy host_cpu_policy; @@ -11,4 +12,7 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Allocate and initialise a CPU policy suitable for the domain. */ +int init_domain_cpu_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index ea05862773..7f81b998ce 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -49,9 +49,6 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Allocate and initialise a CPUID policy suitable for the domain. */ -int init_domain_cpuid_policy(struct domain *d); - /* Apply dom0-specific tweaks to the CPUID policy. */ void init_dom0_cpuid_policy(struct domain *d); diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 4e59ca8c4e..5293c0cde4 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -384,9 +384,16 @@ struct arch_domain */ uint8_t x87_fip_width; - /* CPUID and MSR policy objects. */ - struct cpuid_policy *cpuid; - struct msr_policy *msr; + /* + * The domain's CPU Policy. "cpu_policy" is considered the canonical + * pointer, but the "cpuid" and "msr" aliases exist so the most + * appropriate one can be used for local code clarity. + */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + struct cpu_policy *msr; + }; struct PITState vpit; diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index 8a4da50c50..a174bc6e89 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -398,7 +398,6 @@ struct vcpu_msrs }; void init_guest_msr_policy(void); -int init_domain_msr_policy(struct domain *d); int init_vcpu_msr_policy(struct vcpu *v); /* diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 649d93dc54..5b3449db7a 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1902,8 +1902,7 @@ static int fork(struct domain *cd, struct domain *d) domain_pause(d); cd->max_pages = d->max_pages; - *cd->arch.cpuid = *d->arch.cpuid; - *cd->arch.msr = *d->arch.msr; + *cd->arch.cpu_policy = *d->arch.cpu_policy; cd->vmtrace_size = d->vmtrace_size; cd->parent = d; } diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 01f95603e2..d3ca861454 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -122,50 +122,6 @@ void __init init_guest_msr_policy(void) } } -int init_domain_msr_policy(struct domain *d) -{ - struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !mp ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - mp = xmemdup(mp); - if ( !mp ) - return -ENOMEM; - - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - mp->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - mp->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - - d->arch.msr = mp; - - return 0; -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:45:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:45:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581510.910275 (Exim 4.92) (envelope-from ) id 1qTssE-0006zX-7z; Wed, 09 Aug 2023 23:45:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581510.910275; Wed, 09 Aug 2023 23:45:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssE-0006zI-4G; Wed, 09 Aug 2023 23:45:54 +0000 Received: by outflank-mailman (input) for mailman id 581510; Wed, 09 Aug 2023 23:45:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssD-0006z3-8Y for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssD-0007w4-7p for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTssD-0004mY-6X for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:45:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aYm7lmdkpTkSAiuNwnzA8ooOYx9RRhvK54vF6sSVFC4=; b=lUFDwDoedslk3NYwjbRm+ZrPbF FvRpPPkT2aPEWadW47GLg0znAFhUhgMmsWCngTucH6bAYXs1xzIAfgno+a6T2bzAwoSPcasfTQdM/ CVHceDeQ6XXtBtPqFHdpxTo0cy5TbT34baa7iTPKihvxx+oZgPM8BE9M/sPzIlvabHp8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Merge xc_cpu_policy's cpuid and msr objects Message-Id: Date: Wed, 09 Aug 2023 23:45:53 +0000 commit f7e83f312dffee62f6c8c5c029043be4b7e937da Author: Andrew Cooper AuthorDate: Wed Mar 29 12:37:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Merge xc_cpu_policy's cpuid and msr objects Right now, they're the same underlying type, containing disjoint information. Use a single object instead. Also take the opportunity to rename 'entries' to 'msrs' which is more descriptive, and more in line with nr_msrs being the count of MSR entries in the API. test-tsx uses xg_private.h to access the internals of xc_cpu_policy, so needs updating at the same time. Take the opportunity to improve the code clarity by passing a cpu_policy rather than an xc_cpu_policy into some functions. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c9985233ca663fea20fc8807cf509d2e3fef0dca) --- tools/libs/guest/xg_cpuid_x86.c | 36 ++++++++++----------- tools/libs/guest/xg_private.h | 5 ++- tools/tests/tsx/test-tsx.c | 71 +++++++++++++++++++---------------------- 3 files changed, 53 insertions(+), 59 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 76d9522c3a..5133d59d8a 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -431,7 +431,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, xc_dominfo_t di; unsigned int i, nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; - struct cpuid_policy *p = NULL; + struct cpu_policy *p = NULL; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; uint32_t len = ARRAY_SIZE(host_featureset); @@ -692,7 +692,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; int rc; - rc = x86_cpuid_copy_from_buffer(&policy->cpuid, policy->leaves, + rc = x86_cpuid_copy_from_buffer(&policy->policy, policy->leaves, nr_leaves, &err_leaf, &err_subleaf); if ( rc ) { @@ -702,7 +702,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, return rc; } - rc = x86_msr_copy_from_buffer(&policy->msr, policy->entries, + rc = x86_msr_copy_from_buffer(&policy->policy, policy->msrs, nr_entries, &err_msr); if ( rc ) { @@ -719,18 +719,18 @@ int xc_cpu_policy_get_system(xc_interface *xch, unsigned int policy_idx, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_system_cpu_policy(xch, policy_idx, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain %u policy", policy_idx); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -744,18 +744,18 @@ int xc_cpu_policy_get_domain(xc_interface *xch, uint32_t domid, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_domain_cpu_policy(xch, domid, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain domain %u policy", domid); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -770,16 +770,16 @@ int xc_cpu_policy_set_domain(xc_interface *xch, uint32_t domid, { uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = xc_cpu_policy_serialise(xch, policy, policy->leaves, &nr_leaves, - policy->entries, &nr_entries); + policy->msrs, &nr_msrs); if ( rc ) return rc; rc = xc_set_domain_cpu_policy(xch, domid, nr_leaves, policy->leaves, - nr_entries, policy->entries, + nr_msrs, policy->msrs, &err_leaf, &err_subleaf, &err_msr); if ( rc ) { @@ -802,7 +802,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( leaves ) { - rc = x86_cpuid_copy_to_buffer(&p->cpuid, leaves, nr_leaves); + rc = x86_cpuid_copy_to_buffer(&p->policy, leaves, nr_leaves); if ( rc ) { ERROR("Failed to serialize CPUID policy"); @@ -813,7 +813,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( msrs ) { - rc = x86_msr_copy_to_buffer(&p->msr, msrs, nr_msrs); + rc = x86_msr_copy_to_buffer(&p->policy, msrs, nr_msrs); if ( rc ) { ERROR("Failed to serialize MSR policy"); @@ -831,7 +831,7 @@ int xc_cpu_policy_update_cpuid(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t nr) { unsigned int err_leaf = -1, err_subleaf = -1; - int rc = x86_cpuid_copy_from_buffer(&policy->cpuid, leaves, nr, + int rc = x86_cpuid_copy_from_buffer(&policy->policy, leaves, nr, &err_leaf, &err_subleaf); if ( rc ) @@ -850,7 +850,7 @@ int xc_cpu_policy_update_msrs(xc_interface *xch, xc_cpu_policy_t *policy, const xen_msr_entry_t *msrs, uint32_t nr) { unsigned int err_msr = -1; - int rc = x86_msr_copy_from_buffer(&policy->msr, msrs, nr, &err_msr); + int rc = x86_msr_copy_from_buffer(&policy->policy, msrs, nr, &err_msr); if ( rc ) { @@ -868,8 +868,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->cpuid, &host->msr }; - struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->policy, &host->policy }; + struct old_cpu_policy g = { &guest->policy, &guest->policy }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/libs/guest/xg_private.h b/tools/libs/guest/xg_private.h index 09e24f1227..e729a8106c 100644 --- a/tools/libs/guest/xg_private.h +++ b/tools/libs/guest/xg_private.h @@ -173,10 +173,9 @@ int pin_table(xc_interface *xch, unsigned int type, unsigned long mfn, #include struct xc_cpu_policy { - struct cpuid_policy cpuid; - struct msr_policy msr; + struct cpu_policy policy; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; - xen_msr_entry_t entries[MSR_MAX_SERIALISED_ENTRIES]; + xen_msr_entry_t msrs[MSR_MAX_SERIALISED_ENTRIES]; }; #endif /* x86 */ diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index f11e8c54e0..0f4ea5f9c4 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -151,15 +151,15 @@ static void test_tsx_msrs(void) { printf("Testing MSR_TSX_FORCE_ABORT consistency\n"); test_tsx_msr_consistency( - MSR_TSX_FORCE_ABORT, host.cpuid.feat.tsx_force_abort); + MSR_TSX_FORCE_ABORT, host.policy.feat.tsx_force_abort); printf("Testing MSR_TSX_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_TSX_CTRL, host.msr.arch_caps.tsx_ctrl); + MSR_TSX_CTRL, host.policy.arch_caps.tsx_ctrl); printf("Testing MSR_MCU_OPT_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_MCU_OPT_CTRL, host.cpuid.feat.srbds_ctrl); + MSR_MCU_OPT_CTRL, host.policy.feat.srbds_ctrl); } /* @@ -281,7 +281,7 @@ static void test_rtm_behaviour(void) else return fail(" Got unexpected behaviour %d\n", rtm_behaviour); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { if ( rtm_behaviour == RTM_UD ) fail(" Host reports RTM, but appears unavailable\n"); @@ -293,57 +293,52 @@ static void test_rtm_behaviour(void) } } -static void dump_tsx_details(const struct xc_cpu_policy *p, const char *pref) +static void dump_tsx_details(const struct cpu_policy *p, const char *pref) { printf(" %s RTM %u, HLE %u, TSX_FORCE_ABORT %u, RTM_ALWAYS_ABORT %u, TSX_CTRL %u\n", pref, - p->cpuid.feat.rtm, - p->cpuid.feat.hle, - p->cpuid.feat.tsx_force_abort, - p->cpuid.feat.rtm_always_abort, - p->msr.arch_caps.tsx_ctrl); + p->feat.rtm, + p->feat.hle, + p->feat.tsx_force_abort, + p->feat.rtm_always_abort, + p->arch_caps.tsx_ctrl); } /* Sanity test various invariants we expect in the default/max policies. */ -static void test_guest_policies(const struct xc_cpu_policy *max, - const struct xc_cpu_policy *def) +static void test_guest_policies(const struct cpu_policy *max, + const struct cpu_policy *def) { - const struct cpuid_policy *cm = &max->cpuid; - const struct cpuid_policy *cd = &def->cpuid; - const struct msr_policy *mm = &max->msr; - const struct msr_policy *md = &def->msr; - dump_tsx_details(max, "Max:"); dump_tsx_details(def, "Def:"); - if ( ((cm->feat.raw[0].d | cd->feat.raw[0].d) & + if ( ((max->feat.raw[0].d | def->feat.raw[0].d) & (bitmaskof(X86_FEATURE_TSX_FORCE_ABORT) | bitmaskof(X86_FEATURE_RTM_ALWAYS_ABORT) | bitmaskof(X86_FEATURE_SRBDS_CTRL))) || - ((mm->arch_caps.raw | md->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) + ((max->arch_caps.raw | def->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) fail(" Xen-only TSX controls offered to guest\n"); switch ( rtm_behaviour ) { case RTM_UD: - if ( (cm->feat.raw[0].b | cd->feat.raw[0].b) & + if ( (max->feat.raw[0].b | def->feat.raw[0].b) & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests despite not being available\n"); break; case RTM_ABORT: - if ( cd->feat.raw[0].b & + if ( def->feat.raw[0].b & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests by default despite not being usable\n"); break; case RTM_OK: - if ( !cm->feat.rtm || !cd->feat.rtm ) + if ( !max->feat.rtm || !def->feat.rtm ) fail(" RTM not offered to guests despite being available\n"); break; } - if ( cd->feat.hle ) + if ( def->feat.hle ) fail(" Fail: HLE offered in default policy\n"); } @@ -352,13 +347,13 @@ static void test_def_max_policies(void) if ( xen_has_pv ) { printf("Testing PV default/max policies\n"); - test_guest_policies(&pv_max, &pv_default); + test_guest_policies(&pv_max.policy, &pv_default.policy); } if ( xen_has_hvm ) { printf("Testing HVM default/max policies\n"); - test_guest_policies(&hvm_max, &hvm_default); + test_guest_policies(&hvm_max.policy, &hvm_default.policy); } } @@ -382,23 +377,23 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); /* * Check defaults given to the guest. */ - if ( guest_policy.cpuid.feat.rtm != (rtm_behaviour == RTM_OK) ) + if ( guest_policy.policy.feat.rtm != (rtm_behaviour == RTM_OK) ) fail(" RTM %u in guest, despite rtm behaviour\n", - guest_policy.cpuid.feat.rtm); + guest_policy.policy.feat.rtm); - if ( guest_policy.cpuid.feat.hle || - guest_policy.cpuid.feat.tsx_force_abort || - guest_policy.cpuid.feat.rtm_always_abort || - guest_policy.cpuid.feat.srbds_ctrl || - guest_policy.msr.arch_caps.tsx_ctrl ) + if ( guest_policy.policy.feat.hle || + guest_policy.policy.feat.tsx_force_abort || + guest_policy.policy.feat.rtm_always_abort || + guest_policy.policy.feat.srbds_ctrl || + guest_policy.policy.arch_caps.tsx_ctrl ) fail(" Unexpected features advertised\n"); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { unsigned int _7b0; @@ -406,7 +401,7 @@ static void test_guest(struct xen_domctl_createdomain *c) * If host RTM is available, all combinations of guest flags should be * possible. Flip both HLE/RTM to check non-default settings. */ - _7b0 = (guest_policy.cpuid.feat.raw[0].b ^= + _7b0 = (guest_policy.policy.feat.raw[0].b ^= (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM))); /* Set the new policy. */ @@ -427,12 +422,12 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); - if ( guest_policy.cpuid.feat.raw[0].b != _7b0 ) + if ( guest_policy.policy.feat.raw[0].b != _7b0 ) { fail(" Expected CPUID.7[1].b 0x%08x differs from actual 0x%08x\n", - _7b0, guest_policy.cpuid.feat.raw[0].b); + _7b0, guest_policy.policy.feat.raw[0].b); goto out; } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:46:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581511.910278 (Exim 4.92) (envelope-from ) id 1qTssP-000739-AL; Wed, 09 Aug 2023 23:46:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581511.910278; Wed, 09 Aug 2023 23:46:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssP-000732-7r; Wed, 09 Aug 2023 23:46:05 +0000 Received: by outflank-mailman (input) for mailman id 581511; Wed, 09 Aug 2023 23:46:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssN-00072g-C8 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssN-0007wO-BP for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTssN-0004o1-AD for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=C3mnd/AUbuAuJ8wnuzneFD50WM2MXWWjafpqjkVjgYM=; b=OxDl9OJUIbnIy+yBCAoJRqq66S MzBsb2OZAAsJtKbnZ6G6AS52UKQVEMeaMSereHIuKBP7kgqy3myYFAhCjzy4PtYhsxOFpksGVlXk+ +4xviEnQO3S0NBjIt84s4j8lJ4h+kPpVM5MTO+eah0rkHQHAIrXDp7//tbhn7vEjHv5g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Drop struct old_cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:46:03 +0000 commit 70b38074291f3fad1521cf650744eae3f490cab5 Author: Andrew Cooper AuthorDate: Wed Mar 29 12:01:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Drop struct old_cpu_policy With all the complicated callers of x86_cpu_policies_are_compatible() updated to use a single cpu_policy object, we can drop the final user of struct old_cpu_policy. Update x86_cpu_policies_are_compatible() to take (new) cpu_policy pointers, reducing the amount of internal pointer chasing, and update all callers to pass their cpu_policy objects directly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 66c5c99656314451ff9520f91cff5bb39fee9fed) --- tools/libs/guest/xg_cpuid_x86.c | 4 +-- tools/tests/cpu-policy/test-cpu-policy.c | 50 ++++++++++---------------------- xen/arch/x86/domctl.c | 7 ++--- xen/include/xen/lib/x86/cpu-policy.h | 12 ++------ xen/lib/x86/policy.c | 12 ++++---- 5 files changed, 27 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 5133d59d8a..3be9c5e855 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -868,9 +868,7 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->policy, &host->policy }; - struct old_cpu_policy g = { &guest->policy, &guest->policy }; - int rc = x86_cpu_policies_are_compatible(&h, &g, &err); + int rc = x86_cpu_policies_are_compatible(&host->policy, &guest->policy, &err); if ( !rc ) return true; diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 8a223fddb3..4f3d09f1b7 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -98,7 +98,7 @@ static bool msrs_are_sorted(const xen_msr_entry_t *entries, unsigned int nr) static void test_cpuid_current(void) { - struct cpuid_policy p; + struct cpu_policy p; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; unsigned int nr = ARRAY_SIZE(leaves); int rc; @@ -118,7 +118,7 @@ static void test_cpuid_current(void) static void test_cpuid_serialise_success(void) { static const struct test { - struct cpuid_policy p; + struct cpu_policy p; const char *name; unsigned int nr_leaves; } tests[] = { @@ -242,7 +242,7 @@ static void test_cpuid_serialise_success(void) static void test_msr_serialise_success(void) { static const struct test { - struct msr_policy p; + struct cpu_policy p; const char *name; unsigned int nr_msrs; } tests[] = { @@ -430,7 +430,7 @@ static void test_cpuid_out_of_range_clearing(void) static const struct test { const char *name; unsigned int nr_markers; - struct cpuid_policy p; + struct cpu_policy p; } tests[] = { { .name = "basic", @@ -550,7 +550,7 @@ static void test_cpuid_out_of_range_clearing(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { const struct test *t = &tests[i]; - struct cpuid_policy *p = memdup(&t->p); + struct cpu_policy *p = memdup(&t->p); void *ptr; unsigned int nr_markers; @@ -574,23 +574,20 @@ static void test_is_compatible_success(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; } tests[] = { { .name = "Host CPUID faulting, Guest not", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, }, { .name = "Host CPUID faulting, Guest wanted", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, }, @@ -602,15 +599,8 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res != 0 || memcmp(&no_errors, &e, sizeof(no_errors)) ) @@ -624,25 +614,22 @@ static void test_is_compatible_failure(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; struct cpu_policy_errors e; } tests[] = { { .name = "Host basic.max_leaf out of range", - .guest_cpuid.basic.max_leaf = 1, + .guest.basic.max_leaf = 1, .e = { 0, -1, -1 }, }, { .name = "Host extd.max_leaf out of range", - .guest_cpuid.extd.max_leaf = 1, + .guest.extd.max_leaf = 1, .e = { 0x80000000, -1, -1 }, }, { .name = "Host no CPUID faulting, Guest wanted", - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, .e = { -1, -1, 0xce }, @@ -654,15 +641,8 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res == 0 || memcmp(&t->e, &e, sizeof(t->e)) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 857d0abe32..6d15d0c29c 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -42,10 +42,9 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct cpu_policy *new; - struct cpu_policy *sys = is_pv_domain(d) + const struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -59,8 +58,6 @@ static int update_domain_cpu_policy(struct domain *d, if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; - old_new = (struct old_cpu_policy){ new, new }; - /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( new, xdpc->leaves, xdpc->nr_leaves, @@ -73,7 +70,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); + ret = x86_cpu_policies_are_compatible(sys, new, &err); if ( ret ) goto out; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 53fffca552..8b27a0725b 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -379,12 +379,6 @@ struct cpu_policy #define cpuid_policy cpu_policy #define msr_policy cpu_policy -struct old_cpu_policy -{ - struct cpuid_policy *cpuid; - struct msr_policy *msr; -}; - struct cpu_policy_errors { uint32_t leaf, subleaf; @@ -559,7 +553,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); -/* +/** * Calculate whether two policies are compatible. * * i.e. Can a VM configured with @guest run on a CPU supporting @host. @@ -573,8 +567,8 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index 2975711d7c..a9c60000af 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; @@ -15,18 +15,18 @@ int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->cpuid->basic.max_leaf > host->cpuid->basic.max_leaf ) + if ( guest->basic.max_leaf > host->basic.max_leaf ) FAIL_CPUID(0, NA); - if ( guest->cpuid->feat.max_subleaf > host->cpuid->feat.max_subleaf ) + if ( guest->feat.max_subleaf > host->feat.max_subleaf ) FAIL_CPUID(7, 0); - if ( guest->cpuid->extd.max_leaf > host->cpuid->extd.max_leaf ) + if ( guest->extd.max_leaf > host->extd.max_leaf ) FAIL_CPUID(0x80000000, NA); /* TODO: Audit more CPUID data. */ - if ( ~host->msr->platform_info.raw & guest->msr->platform_info.raw ) + if ( ~host->platform_info.raw & guest->platform_info.raw ) FAIL_MSR(MSR_INTEL_PLATFORM_INFO); #undef FAIL_MSR -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:46:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:46:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581512.910283 (Exim 4.92) (envelope-from ) id 1qTssZ-000761-CK; Wed, 09 Aug 2023 23:46:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581512.910283; Wed, 09 Aug 2023 23:46:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssZ-00075u-9R; Wed, 09 Aug 2023 23:46:15 +0000 Received: by outflank-mailman (input) for mailman id 581512; Wed, 09 Aug 2023 23:46:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssX-00075c-FK for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssX-0007wV-EW for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTssX-0004oS-Ds for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=romhzL2nyCFyoFBbZB+cJ/N3ldc7+SxHuxIBNES0H+4=; b=x9To01t+g7Not0x2oYc2VrJTEg Q2IdCzTG9aEGKMU3+huybttz8eDMuUYMgDmJBL/5SJSc9fuIXTvvkV6QNEhxVPzh20AAdeheJ8fjv 2P5J9+Ffc2FYaHc9bNONkndnQ42pW94zovrHgmSieNCqWAztednkj0vwbsBiNsg8ONQw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Out-of-inline the policy<->featureset convertors Message-Id: Date: Wed, 09 Aug 2023 23:46:13 +0000 commit 3fb36d3f918916807dd7b5338fde1c6d7ce90c5d Author: Andrew Cooper AuthorDate: Thu Mar 30 18:21:01 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Out-of-inline the policy<->featureset convertors These are already getting over-large for being inline functions, and are only going to grow further over time. Out of line them, yielding the following net delta from bloat-o-meter: add/remove: 2/0 grow/shrink: 0/4 up/down: 276/-1877 (-1601) Switch to the newer cpu_policy terminology while doing so. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1027df4c00823f8b448e3a6861cc7b6ce61ba4e4) --- tools/libs/guest/xg_cpuid_x86.c | 2 +- xen/arch/x86/cpuid.c | 28 +++++++++---------- xen/arch/x86/sysctl.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 52 +++++++----------------------------- xen/lib/x86/cpuid.c | 42 +++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 3be9c5e855..b38e3a9de3 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -565,7 +565,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - cpuid_featureset_to_policy(feat, p); + x86_cpu_featureset_to_policy(feat, p); } else { diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index e074befb72..ef96af738a 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -368,7 +368,7 @@ static void __init calculate_host_policy(void) p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, ARRAY_SIZE(p->extd.raw) - 1); - cpuid_featureset_to_policy(boot_cpu_data.x86_capability, p); + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); recalculate_xstate(p); recalculate_misc(p); @@ -450,7 +450,7 @@ static void __init calculate_pv_max_policy(void) unsigned int i; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_max_featuremask[i]; @@ -468,7 +468,7 @@ static void __init calculate_pv_max_policy(void) guest_common_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ @@ -481,7 +481,7 @@ static void __init calculate_pv_def_policy(void) unsigned int i; *p = pv_max_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_def_featuremask[i]; @@ -490,7 +490,7 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); } @@ -502,7 +502,7 @@ static void __init calculate_hvm_max_policy(void) const uint32_t *hvm_featuremask; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_max_featuremask : hvm_shadow_max_featuremask; @@ -572,7 +572,7 @@ static void __init calculate_hvm_max_policy(void) guest_common_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -584,7 +584,7 @@ static void __init calculate_hvm_def_policy(void) const uint32_t *hvm_featuremask; *p = hvm_max_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_def_featuremask : hvm_shadow_def_featuremask; @@ -603,7 +603,7 @@ static void __init calculate_hvm_def_policy(void) __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -673,8 +673,8 @@ void recalculate_cpuid_policy(struct domain *d) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); - cpuid_policy_to_featureset(p, fs); - cpuid_policy_to_featureset(max, max_fs); + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); if ( is_hvm_domain(d) ) { @@ -731,7 +731,7 @@ void recalculate_cpuid_policy(struct domain *d) (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); /* Pass host cacheline size through to guests. */ p->basic.clflush_size = max->basic.clflush_size; @@ -797,7 +797,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) uint32_t fs[FSCAPINTS]; unsigned int i; - cpuid_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(p, fs); for ( i = 0; i < ARRAY_SIZE(fs); ++i ) { @@ -805,7 +805,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) fs[i] &= ~dom0_disable_feat[i]; } - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); recalculate_cpuid_policy(d); } diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index c68242e5bc..42dc360ad6 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -339,7 +339,7 @@ long arch_do_sysctl( ret = -EINVAL; if ( !ret ) - cpuid_policy_to_featureset(p, featureset); + x86_cpu_policy_to_featureset(p, featureset); /* Copy the requested featureset into place. */ if ( !ret && copy_to_guest(sysctl->u.cpu_featureset.features, diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 8b27a0725b..57b4633c86 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -387,49 +387,17 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} +/** + * Copy the featureset words out of a cpu_policy object. + */ +void x86_cpu_policy_to_featureset(const struct cpu_policy *p, + uint32_t fs[FEATURESET_NR_ENTRIES]); -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} +/** + * Copy the featureset words back into a cpu_policy object. + */ +void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], + struct cpu_policy *p); static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) { diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e81f76c779..734e90823a 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -60,6 +60,48 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor) } } +void x86_cpu_policy_to_featureset( + const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +void x86_cpu_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:46:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581513.910287 (Exim 4.92) (envelope-from ) id 1qTssj-00078q-EB; Wed, 09 Aug 2023 23:46:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581513.910287; Wed, 09 Aug 2023 23:46:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssj-00078i-BA; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EYPSEP07729bdEw5wJQJBbzKHiMknYg/iYE72zedz/c=; b=V00dchEx/sTfI/xIKK/PwueNVx M9iNffxSoNlBXon6o88QedSRXlx1HnC4AoFHAgfTKFNfsoCJTL/GGVNDW8bm1QV7DNUCFhe+iOphc b+cdtc0miTj/qbT+zY8TBQeLfAqGOgVJSg+ZGTUCz3VJkBpYRg4ZtyI7Mdpw1KkJFC5g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Move MSR policy initialisation logic into cpu-policy.c Message-Id: Date: Wed, 09 Aug 2023 23:46:23 +0000 commit 1fbaca2721c089c3afcda42b6387a8b42ed49618 Author: Andrew Cooper AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be) --- xen/arch/x86/cpu-policy.c | 84 +++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/cpu-policy.h | 3 ++ xen/arch/x86/include/asm/msr.h | 1 - xen/arch/x86/msr.c | 84 ----------------------------------- xen/arch/x86/setup.c | 3 +- 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e9ac1269c3..f6a2317ed7 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index a174bc6e89..b51d92e27c 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -397,7 +397,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index d3ca861454..14bcb8261c 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -38,90 +38,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 09c17b1016..1d62ea1ad9 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include #include @@ -1943,7 +1944,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:46:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:46:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581514.910291 (Exim 4.92) (envelope-from ) id 1qTsst-0007CF-IJ; Wed, 09 Aug 2023 23:46:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581514.910291; Wed, 09 Aug 2023 23:46:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsst-0007C8-F5; Wed, 09 Aug 2023 23:46:35 +0000 Received: by outflank-mailman (input) for mailman id 581514; Wed, 09 Aug 2023 23:46:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTssr-0007Bp-Lj for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Message-Id: Date: Wed, 09 Aug 2023 23:46:33 +0000 commit dd5f878145160c0b249c856a5f41f2d9d5e8f9d9 Author: Andrew Cooper AuthorDate: Mon Apr 3 19:06:02 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. Do some easy cleanup of includes. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 8eb56eb959a50bf9afd0fd590ec394e9145970a4) --- xen/arch/x86/cpu-policy.c | 743 +++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 808 +--------------------------------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/include/asm/cpu-policy.h | 6 + xen/arch/x86/include/asm/cpuid.h | 11 +- xen/arch/x86/pv/domain.c | 1 + xen/arch/x86/setup.c | 2 - 7 files changed, 755 insertions(+), 817 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index f6a2317ed7..9c506b6614 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,13 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include #include +#include +#include #include +#include #include +#include struct cpu_policy __ro_after_init raw_cpu_policy; struct cpu_policy __ro_after_init host_cpu_policy; @@ -20,10 +26,332 @@ struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif +const uint32_t known_features[] = INIT_KNOWN_FEATURES; + +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t deep_features[] = INIT_DEEP_FEATURES; + +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) +{ + const char *ss; + int val, rc = 0; + + do { + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; + const char *feat; + + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + /* Skip the 'no-' prefix for name comparisons. */ + feat = s; + if ( strncmp(s, "no-", 3) == 0 ) + feat += 3; + + /* (Re)initalise lhs and rhs for binary search. */ + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); + + while ( lhs < rhs ) + { + int res; + + mid = lhs + (rhs - lhs) / 2; + res = cmdline_strcmp(feat, mid->name); + + if ( res < 0 ) + { + rhs = mid; + continue; + } + if ( res > 0 ) + { + lhs = mid + 1; + continue; + } + + if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) + { + callback(mid->bit, val); + mid = NULL; + } + + break; + } + + /* + * Mid being NULL means that the name and boolean were successfully + * identified. Everything else is an error. + */ + if ( mid ) + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} + +static void __init cf_check _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init cf_check parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} +custom_param("cpuid", parse_xen_cpuid); + +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init cf_check _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init cf_check parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + +#define EMPTY_LEAF ((struct cpuid_leaf){}) +static void zero_leaves(struct cpuid_leaf *l, + unsigned int first, unsigned int last) +{ + memset(&l[first], 0, sizeof(*l) * (last - first + 1)); +} + +static void sanitise_featureset(uint32_t *fs) +{ + /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ + uint32_t disabled_features[ + ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; + unsigned int i; + + for ( i = 0; i < FSCAPINTS; ++i ) + { + /* Clamp to known mask. */ + fs[i] &= known_features[i]; + + /* + * Identify which features with deep dependencies have been + * disabled. + */ + disabled_features[i] = ~fs[i] & deep_features[i]; + } + + for_each_set_bit(i, (void *)disabled_features, + sizeof(disabled_features) * 8) + { + const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + unsigned int j; + + ASSERT(dfs); /* deep_features[] should guarentee this. */ + + for ( j = 0; j < FSCAPINTS; ++j ) + { + fs[j] &= ~dfs[j]; + disabled_features[j] &= ~dfs[j]; + } + } +} + +static void recalculate_xstate(struct cpu_policy *p) +{ + uint64_t xstates = XSTATE_FP_SSE; + uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; + unsigned int i, Da1 = p->xstate.Da1; + + /* + * The Da1 leaf is the only piece of information preserved in the common + * case. Everything else is derived from other feature state. + */ + memset(&p->xstate, 0, sizeof(p->xstate)); + + if ( !p->basic.xsave ) + return; + + if ( p->basic.avx ) + { + xstates |= X86_XCR0_YMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_YMM_POS] + + xstate_sizes[X86_XCR0_YMM_POS]); + } + + if ( p->feat.mpx ) + { + xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_BNDCSR_POS] + + xstate_sizes[X86_XCR0_BNDCSR_POS]); + } + + if ( p->feat.avx512f ) + { + xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_HI_ZMM_POS] + + xstate_sizes[X86_XCR0_HI_ZMM_POS]); + } + + if ( p->feat.pku ) + { + xstates |= X86_XCR0_PKRU; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_PKRU_POS] + + xstate_sizes[X86_XCR0_PKRU_POS]); + } + + p->xstate.max_size = xstate_size; + p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; + p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; + + p->xstate.Da1 = Da1; + if ( p->xstate.xsaves ) + { + p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; + p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; + } + else + xstates &= ~XSTATE_XSAVES_ONLY; + + for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + { + uint64_t curr_xstate = 1ul << i; + + if ( !(xstates & curr_xstate) ) + continue; + + p->xstate.comp[i].size = xstate_sizes[i]; + p->xstate.comp[i].offset = xstate_offsets[i]; + p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; + p->xstate.comp[i].align = curr_xstate & xstate_align; + } +} + +/* + * Misc adjustments to the policy. Mostly clobbering reserved fields and + * duplicating shared fields. Intentionally hidden fields are annotated. + */ +static void recalculate_misc(struct cpu_policy *p) +{ + p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ + p->basic.apic_id = 0; /* Dynamic. */ + + p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ + p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ + + p->basic.raw[0x8] = EMPTY_LEAF; + + /* TODO: Rework topology logic. */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + p->basic.raw[0xc] = EMPTY_LEAF; + + p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; + + /* Most of Power/RAS hidden from guests. */ + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; + + p->extd.raw[0x8].d = 0; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ + p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ + p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ + + p->extd.vendor_ebx = 0; + p->extd.vendor_ecx = 0; + p->extd.vendor_edx = 0; + + p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; + + p->extd.raw[0x5] = EMPTY_LEAF; + p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; + + p->extd.raw[0x8].a &= 0x0000ffff; + p->extd.raw[0x8].c = 0; + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + zero_leaves(p->basic.raw, 0x2, 0x3); + memset(p->cache.raw, 0, sizeof(p->cache.raw)); + zero_leaves(p->basic.raw, 0x9, 0xa); + + p->extd.vendor_ebx = p->basic.vendor_ebx; + p->extd.vendor_ecx = p->basic.vendor_ecx; + p->extd.vendor_edx = p->basic.vendor_edx; + + p->extd.raw_fms = p->basic.raw_fms; + p->extd.raw[0x1].b &= 0xff00ffff; + p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; + + p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ + p->extd.raw[0x8].c &= 0x0003f0ff; + + p->extd.raw[0x9] = EMPTY_LEAF; + + zero_leaves(p->extd.raw, 0xb, 0x18); + + /* 0x19 - TLB details. Pass through. */ + /* 0x1a - Perf hints. Pass through. */ + + p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ + p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ + p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ + p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ + p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ + p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ + break; + } +} + static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; + x86_cpuid_policy_fill_native(p); + + /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ + ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -34,9 +362,50 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { struct cpu_policy *p = &host_cpu_policy; + unsigned int max_extd_leaf; *p = raw_cpu_policy; + p->basic.max_leaf = + min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); + p->feat.max_subleaf = + min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); + + max_extd_leaf = p->extd.max_leaf; + + /* + * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be + * dispatch serialising for Spectre mitigations. Extend max_extd_leaf + * beyond what hardware supports, to include the feature leaf containing + * this information. + */ + if ( cpu_has_lfence_dispatch ) + max_extd_leaf = max(max_extd_leaf, 0x80000021); + + p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, + ARRAY_SIZE(p->extd.raw) - 1); + + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); + recalculate_xstate(p); + recalculate_misc(p); + + /* When vPMU is disabled, drop it from the host policy. */ + if ( vpmu_mode == XENPMU_MODE_OFF ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( p->extd.svm ) + { + /* Clamp to implemented features which require hardware support. */ + p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | + (1u << SVM_FEATURE_LBRV) | + (1u << SVM_FEATURE_NRIPS) | + (1u << SVM_FEATURE_PAUSEFILTER) | + (1u << SVM_FEATURE_DECODEASSISTS)); + /* Enable features which are always emulated. */ + p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | + (1u << SVM_FEATURE_TSCRATEMSR)); + } + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; @@ -51,11 +420,88 @@ static void __init calculate_host_policy(void) ARCH_CAPS_PBRSB_NO); } +static void __init guest_common_default_feature_adjustments(uint32_t *fs) +{ + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * On certain hardware, speculative or errata workarounds can result in + * TSX being placed in "force-abort" mode, where it doesn't actually + * function as expected, but is technically compatible with the ISA. + * + * Do not advertise RTM to guests by default if it won't actually work. + */ + if ( rtm_disabled ) + __clear_bit(X86_FEATURE_RTM, fs); +} + +static void __init guest_common_feature_adjustments(uint32_t *fs) +{ + /* Unconditionally claim to be able to set the hypervisor bit. */ + __set_bit(X86_FEATURE_HYPERVISOR, fs); + + /* + * If IBRS is offered to the guest, unconditionally offer STIBP. It is a + * nop on non-HT hardware, and has this behaviour to make heterogeneous + * setups easier to manage. + */ + if ( test_bit(X86_FEATURE_IBRSB, fs) ) + __set_bit(X86_FEATURE_STIBP, fs); + if ( test_bit(X86_FEATURE_IBRS, fs) ) + __set_bit(X86_FEATURE_AMD_STIBP, fs); + + /* + * On hardware which supports IBRS/IBPB, we can offer IBPB independently + * of IBRS by using the AMD feature bit. An administrator may wish for + * performance reasons to offer IBPB without IBRS. + */ + if ( host_cpu_policy.feat.ibrsb ) + __set_bit(X86_FEATURE_IBPB, fs); +} + static void __init calculate_pv_max_policy(void) { struct cpu_policy *p = &pv_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_max_featuremask[i]; + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); + + p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ p->arch_caps.raw = 0; /* Not supported yet. */ } @@ -63,15 +509,103 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { struct cpu_policy *p = &pv_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = pv_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_def_featuremask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } static void __init calculate_hvm_max_policy(void) { struct cpu_policy *p = &hvm_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_max_featuremask : hvm_shadow_max_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + /* + * Xen can provide an (x2)APIC emulation to HVM guests even if the host's + * (x2)APIC isn't enabled. + */ + __set_bit(X86_FEATURE_APIC, fs); + __set_bit(X86_FEATURE_X2APIC, fs); + + /* + * We don't support EFER.LMSLE at all. AMD has dropped the feature from + * hardware and allocated a CPUID bit to indicate its absence. + */ + __set_bit(X86_FEATURE_NO_LMSL, fs); + + /* + * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in + * long mode (and init_amd() has cleared it out of host capabilities), but + * HVM guests are able if running in protected mode. + */ + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + raw_cpu_policy.basic.sep ) + __set_bit(X86_FEATURE_SEP, fs); + + /* + * VIRT_SSBD is exposed in the default policy as a result of + * amd_virt_spec_ctrl being set, it also needs exposing in the max policy. + */ + if ( amd_virt_spec_ctrl ) + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + else if ( boot_cpu_has(X86_FEATURE_AMD_SSBD) ) + /* + * If SPEC_CTRL.SSBD is available VIRT_SPEC_CTRL.SSBD can be exposed + * and implemented using the former. Expose in the max policy only as + * the preference is for guests to use SPEC_CTRL.SSBD if available. + */ + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + /* + * With VT-x, some features are only supported by Xen if dedicated + * hardware support is also available. + */ + if ( cpu_has_vmx ) + { + if ( !cpu_has_vmx_mpx ) + __clear_bit(X86_FEATURE_MPX, fs); + + if ( !cpu_has_vmx_xsaves ) + __clear_bit(X86_FEATURE_XSAVES, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; @@ -82,8 +616,32 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { struct cpu_policy *p = &hvm_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = hvm_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_def_featuremask : hvm_shadow_def_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + /* + * Only expose VIRT_SSBD if AMD_SSBD is not available, and thus + * amd_virt_spec_ctrl is set. + */ + if ( amd_virt_spec_ctrl ) + __set_bit(X86_FEATURE_VIRT_SSBD, fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } void __init init_guest_cpu_policies(void) @@ -149,3 +707,188 @@ int init_domain_cpu_policy(struct domain *d) return 0; } + +void recalculate_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + const struct cpu_policy *max = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; + unsigned int i; + + if ( !max ) + { + ASSERT_UNREACHABLE(); + return; + } + + p->x86_vendor = x86_cpuid_lookup_vendor( + p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); + + p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); + p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); + p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, + ((p->x86_vendor & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) + ? CPUID_GUEST_NR_EXTD_AMD + : CPUID_GUEST_NR_EXTD_INTEL) - 1); + + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); + + if ( is_hvm_domain(d) ) + { + /* + * HVM domains using Shadow paging have further restrictions on their + * available paging features. + */ + if ( !hap_enabled(d) ) + { + for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) + max_fs[i] &= hvm_shadow_max_featuremask[i]; + } + + /* Hide nested-virt if it hasn't been explicitly configured. */ + if ( !nestedhvm_enabled(d) ) + { + __clear_bit(X86_FEATURE_VMX, max_fs); + __clear_bit(X86_FEATURE_SVM, max_fs); + } + } + + /* + * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits + * affect how to interpret topology information in other cpuid leaves. + */ + __set_bit(X86_FEATURE_HTT, max_fs); + __set_bit(X86_FEATURE_X2APIC, max_fs); + __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); + + /* + * 32bit PV domains can't use any Long Mode features, and cannot use + * SYSCALL on non-AMD hardware. + */ + if ( is_pv_32bit_domain(d) ) + { + __clear_bit(X86_FEATURE_LM, max_fs); + if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + __clear_bit(X86_FEATURE_SYSCALL, max_fs); + } + + /* Clamp the toolstacks choices to reality. */ + for ( i = 0; i < ARRAY_SIZE(fs); i++ ) + fs[i] &= max_fs[i]; + + if ( p->basic.max_leaf < XSTATE_CPUID ) + __clear_bit(X86_FEATURE_XSAVE, fs); + + sanitise_featureset(fs); + + /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ + fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & + (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); + + x86_cpu_featureset_to_policy(fs, p); + + /* Pass host cacheline size through to guests. */ + p->basic.clflush_size = max->basic.clflush_size; + + p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); + p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, + paging_max_paddr_bits(d)); + p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, + (p->basic.pae || p->basic.pse36) ? 36 : 32); + + p->extd.maxlinaddr = p->extd.lm ? 48 : 32; + + recalculate_xstate(p); + recalculate_misc(p); + + for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) + { + if ( p->cache.subleaf[i].type >= 1 && + p->cache.subleaf[i].type <= 3 ) + { + /* Subleaf has a valid cache type. Zero reserved fields. */ + p->cache.raw[i].a &= 0xffffc3ffu; + p->cache.raw[i].d &= 0x00000007u; + } + else + { + /* Subleaf is not valid. Zero the rest of the union. */ + zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); + break; + } + } + + if ( vpmu_mode == XENPMU_MODE_OFF || + ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.svm ) + p->extd.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.page1gb ) + p->extd.raw[0x19] = EMPTY_LEAF; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( cpu_has_arch_caps ) + p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + x86_cpu_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } +} + +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); + + /* Find some more clever allocation scheme if this trips. */ + BUILD_BUG_ON(sizeof(struct cpu_policy) > PAGE_SIZE); + + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index ef96af738a..3f20c342fd 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -1,629 +1,14 @@ -#include -#include -#include #include -#include -#include +#include + +#include + #include #include -#include -#include -#include #include -#include -#include -#include #include -const uint32_t known_features[] = INIT_KNOWN_FEATURES; - -static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; -static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t __initconst hvm_hap_max_featuremask[] = - INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t __initconst hvm_shadow_def_featuremask[] = - INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t __initconst hvm_hap_def_featuremask[] = - INIT_HVM_HAP_DEF_FEATURES; -static const uint32_t deep_features[] = INIT_DEEP_FEATURES; - -static const struct feature_name { - const char *name; - unsigned int bit; -} feature_names[] __initconstrel = INIT_FEATURE_NAMES; - -/* - * Parse a list of cpuid feature names -> bool, calling the callback for any - * matches found. - * - * always_inline, because this is init code only and we really don't want a - * function pointer call in the middle of the loop. - */ -static int __init always_inline parse_cpuid( - const char *s, void (*callback)(unsigned int feat, bool val)) -{ - const char *ss; - int val, rc = 0; - - do { - const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; - const char *feat; - - ss = strchr(s, ','); - if ( !ss ) - ss = strchr(s, '\0'); - - /* Skip the 'no-' prefix for name comparisons. */ - feat = s; - if ( strncmp(s, "no-", 3) == 0 ) - feat += 3; - - /* (Re)initalise lhs and rhs for binary search. */ - lhs = feature_names; - rhs = feature_names + ARRAY_SIZE(feature_names); - - while ( lhs < rhs ) - { - int res; - - mid = lhs + (rhs - lhs) / 2; - res = cmdline_strcmp(feat, mid->name); - - if ( res < 0 ) - { - rhs = mid; - continue; - } - if ( res > 0 ) - { - lhs = mid + 1; - continue; - } - - if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) - { - callback(mid->bit, val); - mid = NULL; - } - - break; - } - - /* - * Mid being NULL means that the name and boolean were successfully - * identified. Everything else is an error. - */ - if ( mid ) - rc = -EINVAL; - - s = ss + 1; - } while ( *ss ); - - return rc; -} - -static void __init cf_check _parse_xen_cpuid(unsigned int feat, bool val) -{ - if ( !val ) - setup_clear_cpu_cap(feat); - else if ( feat == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); -} - -static int __init cf_check parse_xen_cpuid(const char *s) -{ - return parse_cpuid(s, _parse_xen_cpuid); -} -custom_param("cpuid", parse_xen_cpuid); - -static bool __initdata dom0_cpuid_cmdline; -static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; -static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; - -static void __init cf_check _parse_dom0_cpuid(unsigned int feat, bool val) -{ - __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); - __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); -} - -static int __init cf_check parse_dom0_cpuid(const char *s) -{ - dom0_cpuid_cmdline = true; - - return parse_cpuid(s, _parse_dom0_cpuid); -} -custom_param("dom0-cpuid", parse_dom0_cpuid); - #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void zero_leaves(struct cpuid_leaf *l, - unsigned int first, unsigned int last) -{ - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); -} - -static void sanitise_featureset(uint32_t *fs) -{ - /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ - uint32_t disabled_features[ - ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; - unsigned int i; - - for ( i = 0; i < FSCAPINTS; ++i ) - { - /* Clamp to known mask. */ - fs[i] &= known_features[i]; - - /* - * Identify which features with deep dependencies have been - * disabled. - */ - disabled_features[i] = ~fs[i] & deep_features[i]; - } - - for_each_set_bit(i, (void *)disabled_features, - sizeof(disabled_features) * 8) - { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); - unsigned int j; - - ASSERT(dfs); /* deep_features[] should guarentee this. */ - - for ( j = 0; j < FSCAPINTS; ++j ) - { - fs[j] &= ~dfs[j]; - disabled_features[j] &= ~dfs[j]; - } - } -} - -static void recalculate_xstate(struct cpuid_policy *p) -{ - uint64_t xstates = XSTATE_FP_SSE; - uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; - unsigned int i, Da1 = p->xstate.Da1; - - /* - * The Da1 leaf is the only piece of information preserved in the common - * case. Everything else is derived from other feature state. - */ - memset(&p->xstate, 0, sizeof(p->xstate)); - - if ( !p->basic.xsave ) - return; - - if ( p->basic.avx ) - { - xstates |= X86_XCR0_YMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_YMM_POS] + - xstate_sizes[X86_XCR0_YMM_POS]); - } - - if ( p->feat.mpx ) - { - xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_BNDCSR_POS] + - xstate_sizes[X86_XCR0_BNDCSR_POS]); - } - - if ( p->feat.avx512f ) - { - xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_HI_ZMM_POS] + - xstate_sizes[X86_XCR0_HI_ZMM_POS]); - } - - if ( p->feat.pku ) - { - xstates |= X86_XCR0_PKRU; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_PKRU_POS] + - xstate_sizes[X86_XCR0_PKRU_POS]); - } - - p->xstate.max_size = xstate_size; - p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; - p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; - - p->xstate.Da1 = Da1; - if ( p->xstate.xsaves ) - { - p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; - p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; - } - else - xstates &= ~XSTATE_XSAVES_ONLY; - - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) - { - uint64_t curr_xstate = 1ul << i; - - if ( !(xstates & curr_xstate) ) - continue; - - p->xstate.comp[i].size = xstate_sizes[i]; - p->xstate.comp[i].offset = xstate_offsets[i]; - p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; - p->xstate.comp[i].align = curr_xstate & xstate_align; - } -} - -/* - * Misc adjustments to the policy. Mostly clobbering reserved fields and - * duplicating shared fields. Intentionally hidden fields are annotated. - */ -static void recalculate_misc(struct cpuid_policy *p) -{ - p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ - p->basic.apic_id = 0; /* Dynamic. */ - - p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ - p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ - - p->basic.raw[0x8] = EMPTY_LEAF; - - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - - p->basic.raw[0xc] = EMPTY_LEAF; - - p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; - - /* Most of Power/RAS hidden from guests. */ - p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; - - p->extd.raw[0x8].d = 0; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ - p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ - p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ - - p->extd.vendor_ebx = 0; - p->extd.vendor_ecx = 0; - p->extd.vendor_edx = 0; - - p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; - - p->extd.raw[0x5] = EMPTY_LEAF; - p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; - - p->extd.raw[0x8].a &= 0x0000ffff; - p->extd.raw[0x8].c = 0; - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - zero_leaves(p->basic.raw, 0x2, 0x3); - memset(p->cache.raw, 0, sizeof(p->cache.raw)); - zero_leaves(p->basic.raw, 0x9, 0xa); - - p->extd.vendor_ebx = p->basic.vendor_ebx; - p->extd.vendor_ecx = p->basic.vendor_ecx; - p->extd.vendor_edx = p->basic.vendor_edx; - - p->extd.raw_fms = p->basic.raw_fms; - p->extd.raw[0x1].b &= 0xff00ffff; - p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; - - p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ - p->extd.raw[0x8].c &= 0x0003f0ff; - - p->extd.raw[0x9] = EMPTY_LEAF; - - zero_leaves(p->extd.raw, 0xb, 0x18); - - /* 0x19 - TLB details. Pass through. */ - /* 0x1a - Perf hints. Pass through. */ - - p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ - p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ - p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ - p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ - p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ - p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ - break; - } -} - -static void __init calculate_raw_policy(void) -{ - struct cpuid_policy *p = &raw_cpu_policy; - - x86_cpuid_policy_fill_native(p); - - /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ - ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); -} - -static void __init calculate_host_policy(void) -{ - struct cpuid_policy *p = &host_cpu_policy; - unsigned int max_extd_leaf; - - *p = raw_cpu_policy; - - p->basic.max_leaf = - min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); - p->feat.max_subleaf = - min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); - - max_extd_leaf = p->extd.max_leaf; - - /* - * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be - * dispatch serialising for Spectre mitigations. Extend max_extd_leaf - * beyond what hardware supports, to include the feature leaf containing - * this information. - */ - if ( cpu_has_lfence_dispatch ) - max_extd_leaf = max(max_extd_leaf, 0x80000021); - - p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, - ARRAY_SIZE(p->extd.raw) - 1); - - x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); - recalculate_xstate(p); - recalculate_misc(p); - - /* When vPMU is disabled, drop it from the host policy. */ - if ( vpmu_mode == XENPMU_MODE_OFF ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( p->extd.svm ) - { - /* Clamp to implemented features which require hardware support. */ - p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | - (1u << SVM_FEATURE_LBRV) | - (1u << SVM_FEATURE_NRIPS) | - (1u << SVM_FEATURE_PAUSEFILTER) | - (1u << SVM_FEATURE_DECODEASSISTS)); - /* Enable features which are always emulated. */ - p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | - (1u << SVM_FEATURE_TSCRATEMSR)); - } -} - -static void __init guest_common_default_feature_adjustments(uint32_t *fs) -{ - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); - - /* - * On certain hardware, speculative or errata workarounds can result in - * TSX being placed in "force-abort" mode, where it doesn't actually - * function as expected, but is technically compatible with the ISA. - * - * Do not advertise RTM to guests by default if it won't actually work. - */ - if ( rtm_disabled ) - __clear_bit(X86_FEATURE_RTM, fs); -} - -static void __init guest_common_feature_adjustments(uint32_t *fs) -{ - /* Unconditionally claim to be able to set the hypervisor bit. */ - __set_bit(X86_FEATURE_HYPERVISOR, fs); - - /* - * If IBRS is offered to the guest, unconditionally offer STIBP. It is a - * nop on non-HT hardware, and has this behaviour to make heterogeneous - * setups easier to manage. - */ - if ( test_bit(X86_FEATURE_IBRSB, fs) ) - __set_bit(X86_FEATURE_STIBP, fs); - if ( test_bit(X86_FEATURE_IBRS, fs) ) - __set_bit(X86_FEATURE_AMD_STIBP, fs); - - /* - * On hardware which supports IBRS/IBPB, we can offer IBPB independently - * of IBRS by using the AMD feature bit. An administrator may wish for - * performance reasons to offer IBPB without IBRS. - */ - if ( host_cpu_policy.feat.ibrsb ) - __set_bit(X86_FEATURE_IBPB, fs); -} - -static void __init calculate_pv_max_policy(void) -{ - struct cpuid_policy *p = &pv_max_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_max_featuremask[i]; - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) - { - __clear_bit(X86_FEATURE_IBRSB, pv_featureset); - __clear_bit(X86_FEATURE_IBRS, pv_featureset); - } - - guest_common_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); - - p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct cpuid_policy *p = &pv_def_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = pv_max_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_def_featuremask[i]; - - guest_common_feature_adjustments(pv_featureset); - guest_common_default_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_max_policy(void) -{ - struct cpuid_policy *p = &hvm_max_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_max_featuremask : hvm_shadow_max_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - /* - * Xen can provide an (x2)APIC emulation to HVM guests even if the host's - * (x2)APIC isn't enabled. - */ - __set_bit(X86_FEATURE_APIC, hvm_featureset); - __set_bit(X86_FEATURE_X2APIC, hvm_featureset); - - /* - * We don't support EFER.LMSLE at all. AMD has dropped the feature from - * hardware and allocated a CPUID bit to indicate its absence. - */ - __set_bit(X86_FEATURE_NO_LMSL, hvm_featureset); - - /* - * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in - * long mode (and init_amd() has cleared it out of host capabilities), but - * HVM guests are able if running in protected mode. - */ - if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpu_policy.basic.sep ) - __set_bit(X86_FEATURE_SEP, hvm_featureset); - - /* - * VIRT_SSBD is exposed in the default policy as a result of - * amd_virt_spec_ctrl being set, it also needs exposing in the max policy. - */ - if ( amd_virt_spec_ctrl ) - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) - { - __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); - __clear_bit(X86_FEATURE_IBRS, hvm_featureset); - } - else if ( boot_cpu_has(X86_FEATURE_AMD_SSBD) ) - /* - * If SPEC_CTRL.SSBD is available VIRT_SPEC_CTRL.SSBD can be exposed - * and implemented using the former. Expose in the max policy only as - * the preference is for guests to use SPEC_CTRL.SSBD if available. - */ - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - /* - * With VT-x, some features are only supported by Xen if dedicated - * hardware support is also available. - */ - if ( cpu_has_vmx ) - { - if ( !cpu_has_vmx_mpx ) - __clear_bit(X86_FEATURE_MPX, hvm_featureset); - - if ( !cpu_has_vmx_xsaves ) - __clear_bit(X86_FEATURE_XSAVES, hvm_featureset); - } - - guest_common_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_def_policy(void) -{ - struct cpuid_policy *p = &hvm_def_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = hvm_max_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_def_featuremask : hvm_shadow_def_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - guest_common_feature_adjustments(hvm_featureset); - guest_common_default_feature_adjustments(hvm_featureset); - - /* - * Only expose VIRT_SSBD if AMD_SSBD is not available, and thus - * amd_virt_spec_ctrl is set. - */ - if ( amd_virt_spec_ctrl ) - __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -void __init init_guest_cpuid(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} bool recheck_cpu_features(unsigned int cpu) { @@ -647,170 +32,6 @@ bool recheck_cpu_features(unsigned int cpu) return okay; } -void recalculate_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; - unsigned int i; - - if ( !max ) - { - ASSERT_UNREACHABLE(); - return; - } - - p->x86_vendor = x86_cpuid_lookup_vendor( - p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); - - p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); - p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); - p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) - ? CPUID_GUEST_NR_EXTD_AMD - : CPUID_GUEST_NR_EXTD_INTEL) - 1); - - x86_cpu_policy_to_featureset(p, fs); - x86_cpu_policy_to_featureset(max, max_fs); - - if ( is_hvm_domain(d) ) - { - /* - * HVM domains using Shadow paging have further restrictions on their - * available paging features. - */ - if ( !hap_enabled(d) ) - { - for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) - max_fs[i] &= hvm_shadow_max_featuremask[i]; - } - - /* Hide nested-virt if it hasn't been explicitly configured. */ - if ( !nestedhvm_enabled(d) ) - { - __clear_bit(X86_FEATURE_VMX, max_fs); - __clear_bit(X86_FEATURE_SVM, max_fs); - } - } - - /* - * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits - * affect how to interpret topology information in other cpuid leaves. - */ - __set_bit(X86_FEATURE_HTT, max_fs); - __set_bit(X86_FEATURE_X2APIC, max_fs); - __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); - - /* - * 32bit PV domains can't use any Long Mode features, and cannot use - * SYSCALL on non-AMD hardware. - */ - if ( is_pv_32bit_domain(d) ) - { - __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - __clear_bit(X86_FEATURE_SYSCALL, max_fs); - } - - /* Clamp the toolstacks choices to reality. */ - for ( i = 0; i < ARRAY_SIZE(fs); i++ ) - fs[i] &= max_fs[i]; - - if ( p->basic.max_leaf < XSTATE_CPUID ) - __clear_bit(X86_FEATURE_XSAVE, fs); - - sanitise_featureset(fs); - - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & - (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - - x86_cpu_featureset_to_policy(fs, p); - - /* Pass host cacheline size through to guests. */ - p->basic.clflush_size = max->basic.clflush_size; - - p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); - p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, - paging_max_paddr_bits(d)); - p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, - (p->basic.pae || p->basic.pse36) ? 36 : 32); - - p->extd.maxlinaddr = p->extd.lm ? 48 : 32; - - recalculate_xstate(p); - recalculate_misc(p); - - for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) - { - if ( p->cache.subleaf[i].type >= 1 && - p->cache.subleaf[i].type <= 3 ) - { - /* Subleaf has a valid cache type. Zero reserved fields. */ - p->cache.raw[i].a &= 0xffffc3ffu; - p->cache.raw[i].d &= 0x00000007u; - } - else - { - /* Subleaf is not valid. Zero the rest of the union. */ - zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); - break; - } - } - - if ( vpmu_mode == XENPMU_MODE_OFF || - ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.svm ) - p->extd.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.page1gb ) - p->extd.raw[0x19] = EMPTY_LEAF; -} - -void __init init_dom0_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - - /* dom0 can't migrate. Give it ITSC if available. */ - if ( cpu_has_itsc ) - p->extd.itsc = true; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( cpu_has_arch_caps ) - p->feat.arch_caps = true; - - /* Apply dom0-cpuid= command line settings, if provided. */ - if ( dom0_cpuid_cmdline ) - { - uint32_t fs[FSCAPINTS]; - unsigned int i; - - x86_cpu_policy_to_featureset(p, fs); - - for ( i = 0; i < ARRAY_SIZE(fs); ++i ) - { - fs[i] |= dom0_enable_feat [i]; - fs[i] &= ~dom0_disable_feat[i]; - } - - x86_cpu_featureset_to_policy(fs, p); - - recalculate_cpuid_policy(d); - } -} - void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { @@ -1181,27 +402,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, } } -static void __init __maybe_unused build_assertions(void) -{ - BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); - - /* Find some more clever allocation scheme if this trips. */ - BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - - BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != - sizeof(raw_cpu_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != - sizeof(raw_cpu_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != - sizeof(raw_cpu_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != - sizeof(raw_cpu_policy.extd.raw)); -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2f20df7874..b486c0efe0 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -77,7 +77,6 @@ #include #include #include -#include #include diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index 13e2a1f86d..b361537a60 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -18,4 +18,10 @@ void init_guest_cpu_policies(void); /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + +/* Clamp the CPUID policy to reality. */ +void recalculate_cpuid_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/arch/x86/include/asm/cpuid.h b/xen/arch/x86/include/asm/cpuid.h index 7f81b998ce..b32ba0bbfe 100644 --- a/xen/arch/x86/include/asm/cpuid.h +++ b/xen/arch/x86/include/asm/cpuid.h @@ -8,14 +8,10 @@ #include #include -#include - #include extern const uint32_t known_features[FSCAPINTS]; -void init_guest_cpuid(void); - /* * Expected levelling capabilities (given cpuid vendor/family information), * and levelling capabilities actually available (given MSR probing). @@ -49,13 +45,8 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Apply dom0-specific tweaks to the CPUID policy. */ -void init_dom0_cpuid_policy(struct domain *d); - -/* Clamp the CPUID policy to reality. */ -void recalculate_cpuid_policy(struct domain *d); - struct vcpu; +struct cpuid_leaf; void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res); diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index f94f28c8e2..95492715d8 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 1d62ea1ad9..0c00ea875d 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -51,7 +51,6 @@ #include #include #include -#include #include #include #include @@ -1943,7 +1942,6 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !tboot_protect_mem_regions() ) panic("Could not protect TXT memory regions\n"); - init_guest_cpuid(); init_guest_cpu_policies(); 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/emul: Switch x86_emulate_ctxt to cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:46:43 +0000 commit 803d9b467b3662a386d6c67f0aa09a426bc6ad96 Author: Andrew Cooper AuthorDate: Mon Apr 3 20:03:57 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/emul: Switch x86_emulate_ctxt to cpu_policy As with struct domain, retain cpuid as a valid alias for local code clarity. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 441b1b2a50ea3656954d75e06d42c96d619ea0fc) --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 2 +- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/hvm/emulate.c | 4 ++-- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 7 +++++-- 8 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 966e46bee1..4885a68210 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -893,7 +893,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpuid = &cp, + .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 31586f8057..7b7fbaaf45 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -909,7 +909,7 @@ int main(int argc, char **argv) ctxt.regs = ®s; ctxt.force_writeback = 0; - ctxt.cpuid = &cp; + ctxt.cpu_policy = &cp; ctxt.lma = sizeof(void *) == 8; ctxt.addr_size = 8 * sizeof(void *); ctxt.sp_size = 8 * sizeof(void *); diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index ea286d6ad8..5ad282b575 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -38,7 +38,7 @@ #define put_stub(stb) ((stb).addr = 0) uint32_t mxcsr_mask = 0x0000ffbf; -struct cpuid_policy cp; +struct cpu_policy cp; static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); static bool use_xsave; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index cb221f70e8..275451dd36 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2772,7 +2772,7 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla) void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { - struct hvm_emulate_ctxt ctx = {{ 0 }}; + struct hvm_emulate_ctxt ctx = {}; int rc; hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); @@ -2847,7 +2847,7 @@ void hvm_emulate_init_once( hvmemul_ctxt->validate = validate; hvmemul_ctxt->ctxt.regs = regs; - hvmemul_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; } diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 39abf4732d..c00ce550a1 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -319,7 +319,7 @@ const struct x86_emulate_ops *shadow_init_emulation( memset(sh_ctxt, 0, sizeof(*sh_ctxt)); sh_ctxt->ctxt.regs = regs; - sh_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + sh_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; sh_ctxt->ctxt.lma = hvm_long_mode_active(curr); /* Segment cache initialisation. Primed with CS. */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 5da00e24e4..ab52768271 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1327,7 +1327,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpuid = currd->arch.cpuid, + .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 5963f5ee2d..0d02c7d2ab 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -356,7 +356,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpuid = currd->arch.cpuid, + .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index c89c53e83b..e1be0435f8 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -565,8 +565,11 @@ struct x86_emulate_ctxt * Input-only state: */ - /* CPUID Policy for the domain. */ - const struct cpuid_policy *cpuid; + /* CPU policy for the domain. Allow aliases for local code clarity. */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + }; /* Set this if writes may have side effects. */ bool force_writeback; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:46:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:46:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581516.910299 (Exim 4.92) (envelope-from ) id 1qTstC-0007IW-Nz; Wed, 09 Aug 2023 23:46:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581516.910299; Wed, 09 Aug 2023 23:46:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstC-0007IP-LJ; Wed, 09 Aug 2023 23:46:54 +0000 Received: by outflank-mailman (input) for mailman id 581516; Wed, 09 Aug 2023 23:46:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstB-0007I4-SO for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstB-0007xL-Rf for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTstB-0004re-Qy for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:46:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yEWQpwXW38S+CfxKJ9zd6mlQwie+OENNXbfOH0/qx98=; b=yVpLNnOIxQZIQFvBWgv/bIvKBV 6dS/4qL22PygGapycr/pQOpFcr9mccQ0Lu9XXk58qVdWiZAfFygR7LcBxfccVnA20Q//8fRsSoXxY A9R0mX6r4RqtZp1EDPdjJGXMvvkUbamwjxXmqDtQetvXe/YUJyZxG+PM1TSYtoq3m8Z4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools/fuzz: Rework afl-policy-fuzzer Message-Id: Date: Wed, 09 Aug 2023 23:46:53 +0000 commit b4de3bc9c1ad17d6d67ed4c3c5c0db77ea8e43a4 Author: Andrew Cooper AuthorDate: Mon Apr 3 17:14:14 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 tools/fuzz: Rework afl-policy-fuzzer With cpuid_policy and msr_policy merged to form cpu_policy, merge the respective fuzzing logic. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit a16dcd48c2db3f6820a15ea482551d289bd9cdec) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 57 +++++++++++-------------------- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 316eb0efe0..585324e417 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -16,16 +16,19 @@ static bool debug; #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void check_cpuid(struct cpuid_policy *cp) +static void check_policy(struct cpu_policy *cp) { - struct cpuid_policy new = {}; + struct cpu_policy new = {}; size_t data_end; xen_cpuid_leaf_t *leaves = malloc(CPUID_MAX_SERIALISED_LEAVES * sizeof(xen_cpuid_leaf_t)); - unsigned int nr = CPUID_MAX_SERIALISED_LEAVES; + xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * + sizeof(xen_cpuid_leaf_t)); + unsigned int nr_leaves = CPUID_MAX_SERIALISED_LEAVES; + unsigned int nr_msrs = MSR_MAX_SERIALISED_ENTRIES; int rc; - if ( !leaves ) + if ( !leaves || !msrs ) return; /* @@ -49,12 +52,19 @@ static void check_cpuid(struct cpuid_policy *cp) x86_cpuid_policy_recalc_synth(cp); /* Serialise... */ - rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr); + rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); + assert(rc == 0); + assert(nr_leaves <= CPUID_MAX_SERIALISED_LEAVES); + + rc = x86_msr_copy_to_buffer(cp, msrs, &nr_msrs); assert(rc == 0); - assert(nr <= CPUID_MAX_SERIALISED_LEAVES); + assert(nr_msrs <= MSR_MAX_SERIALISED_ENTRIES); /* ... and deserialise. */ - rc = x86_cpuid_copy_from_buffer(&new, leaves, nr, NULL, NULL); + rc = x86_cpuid_copy_from_buffer(&new, leaves, nr_leaves, NULL, NULL); + assert(rc == 0); + + rc = x86_msr_copy_from_buffer(&new, msrs, nr_msrs, NULL); assert(rc == 0); /* The result after serialisation/deserialisaion should be identical... */ @@ -76,28 +86,6 @@ static void check_cpuid(struct cpuid_policy *cp) free(leaves); } -static void check_msr(struct msr_policy *mp) -{ - struct msr_policy new = {}; - xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * - sizeof(xen_msr_entry_t)); - unsigned int nr = MSR_MAX_SERIALISED_ENTRIES; - int rc; - - if ( !msrs ) - return; - - rc = x86_msr_copy_to_buffer(mp, msrs, &nr); - assert(rc == 0); - assert(nr <= MSR_MAX_SERIALISED_ENTRIES); - - rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); - assert(rc == 0); - assert(memcmp(mp, &new, sizeof(*mp)) == 0); - - free(msrs); -} - int main(int argc, char **argv) { FILE *fp = NULL; @@ -144,8 +132,7 @@ int main(int argc, char **argv) while ( __AFL_LOOP(1000) ) #endif { - struct cpuid_policy *cp = NULL; - struct msr_policy *mp = NULL; + struct cpu_policy *cp = NULL; if ( fp != stdin ) { @@ -160,22 +147,18 @@ int main(int argc, char **argv) } cp = calloc(1, sizeof(*cp)); - mp = calloc(1, sizeof(*mp)); - if ( !cp || !mp ) + if ( !cp ) goto skip; fread(cp, sizeof(*cp), 1, fp); - fread(mp, sizeof(*mp), 1, fp); if ( !feof(fp) ) goto skip; - check_cpuid(cp); - check_msr(mp); + check_policy(cp); skip: free(cp); - free(mp); if ( fp != stdin ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581517.910303 (Exim 4.92) (envelope-from ) id 1qTstM-0007LM-Q2; Wed, 09 Aug 2023 23:47:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581517.910303; Wed, 09 Aug 2023 23:47:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstM-0007LD-N9; Wed, 09 Aug 2023 23:47:04 +0000 Received: by outflank-mailman (input) for mailman id 581517; Wed, 09 Aug 2023 23:47:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstL-0007L3-Vu for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libx86: Update library API for cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:47:03 +0000 commit f2808b2c1cb17ddfa21020ad658157ce4c1de2c3 Author: Andrew Cooper AuthorDate: Mon Apr 3 14:18:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libx86: Update library API for cpu_policy Adjust the API and comments appropriately. x86_cpu_policy_fill_native() will eventually contain MSR reads, but leave a TODO in the short term. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1b67fccf3b02825f6a036bad06cd17963d0972d2) tools/libs/guest: Fix build following libx86 changes I appear to have lost this hunk somewhere... Fixes: 1b67fccf3b02 ("libx86: Update library API for cpu_policy") Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit 48d76e6da92f9ef76c8468e299349a2f698362fa) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 4 +-- tools/libs/guest/xg_cpuid_x86.c | 2 +- tools/tests/cpu-policy/test-cpu-policy.c | 4 +-- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/cpu-policy.c | 4 +-- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/xstate.c | 4 +-- xen/include/xen/lib/x86/cpu-policy.h | 49 ++++++++++++++++++------------- xen/lib/x86/cpuid.c | 26 ++++++++-------- xen/lib/x86/msr.c | 4 +-- 11 files changed, 56 insertions(+), 47 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 585324e417..11df2f7802 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -48,8 +48,8 @@ static void check_policy(struct cpu_policy *cp) * Fix up the data in the source policy which isn't expected to survive * serialisation. */ - x86_cpuid_policy_clear_out_of_range_leaves(cp); - x86_cpuid_policy_recalc_synth(cp); + x86_cpu_policy_clear_out_of_range_leaves(cp); + x86_cpu_policy_recalc_synth(cp); /* Serialise... */ rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index b38e3a9de3..5d658534ef 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -555,7 +555,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *dfs; if ( !test_bit(b, disabled_features) || - !(dfs = x86_cpuid_lookup_deep_deps(b)) ) + !(dfs = x86_cpu_policy_lookup_deep_deps(b)) ) continue; for ( i = 0; i < ARRAY_SIZE(disabled_features); ++i ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 4f3d09f1b7..fea0eb8c35 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -105,7 +105,7 @@ static void test_cpuid_current(void) printf("Testing CPUID on current CPU\n"); - x86_cpuid_policy_fill_native(&p); + x86_cpu_policy_fill_native(&p); rc = x86_cpuid_copy_to_buffer(&p, leaves, &nr); if ( rc != 0 ) @@ -554,7 +554,7 @@ static void test_cpuid_out_of_range_clearing(void) void *ptr; unsigned int nr_markers; - x86_cpuid_policy_clear_out_of_range_leaves(p); + x86_cpu_policy_clear_out_of_range_leaves(p); /* Count the number of 0xc2's still remaining. */ for ( ptr = p, nr_markers = 0; diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 5ad282b575..3a092ea3ec 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -85,7 +85,7 @@ bool emul_test_init(void) unsigned long sp; - x86_cpuid_policy_fill_native(&cp); + x86_cpu_policy_fill_native(&cp); /* * The emulator doesn't use these instructions, so can always emulate diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 9c506b6614..19766e87b6 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -176,7 +176,7 @@ static void sanitise_featureset(uint32_t *fs) for_each_set_bit(i, (void *)disabled_features, sizeof(disabled_features) * 8) { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + const uint32_t *dfs = x86_cpu_policy_lookup_deep_deps(i); unsigned int j; ASSERT(dfs); /* deep_features[] should guarentee this. */ @@ -347,7 +347,7 @@ static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; - x86_cpuid_policy_fill_native(p); + x86_cpu_policy_fill_native(p); /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 665200db38..ce69232808 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -72,7 +72,7 @@ void __init setup_clear_cpu_cap(unsigned int cap) __builtin_return_address(0), cap); __clear_bit(cap, boot_cpu_data.x86_capability); - dfs = x86_cpuid_lookup_deep_deps(cap); + dfs = x86_cpu_policy_lookup_deep_deps(cap); if (!dfs) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 6d15d0c29c..1ce12b79e6 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -67,7 +67,7 @@ static int update_domain_cpu_policy(struct domain *d, goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new); + x86_cpu_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ ret = x86_cpu_policies_are_compatible(sys, new, &err); diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 3b32bdc51c..cea3d0b81f 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -685,7 +685,7 @@ void xstate_init(struct cpuinfo_x86 *c) int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr) { - uint64_t xcr0_max = cpuid_policy_xcr0_max(d->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(d->arch.cpuid); unsigned int i; if ( (hdr->xstate_bv & ~xcr0_accum) || @@ -709,7 +709,7 @@ int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, int handle_xsetbv(u32 index, u64 new_bv) { struct vcpu *curr = current; - uint64_t xcr0_max = cpuid_policy_xcr0_max(curr->domain->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(curr->domain->arch.cpuid); u64 mask; if ( index != XCR_XFEATURE_ENABLED_MASK ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 57b4633c86..cf7de0f29c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -399,33 +399,38 @@ void x86_cpu_policy_to_featureset(const struct cpu_policy *p, void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p); -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xcr0_max(const struct cpu_policy *p) { return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; } -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xstates(const struct cpu_policy *p) { uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); +/** + * For a specific feature, look up the dependent features. Returns NULL if + * this feature has no dependencies. Otherwise return a featureset of + * dependent features, which has been recursively flattened. + */ +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature); /** - * Recalculate the content in a CPUID policy which is derived from raw data. + * Recalculate the content in a CPU policy which is derived from raw data. */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); +void x86_cpu_policy_recalc_synth(struct cpu_policy *p); /** - * Fill a CPUID policy using the native CPUID instruction. + * Fill CPU policy using the native CPUID/RDMSR instruction. * * No sanitisation is performed, but synthesised values are calculated. * Values may be influenced by a hypervisor or from masking/faulting * configuration. */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); +void x86_cpu_policy_fill_native(struct cpu_policy *p); /** * Clear leaf data beyond the policies max leaf/subleaf settings. @@ -436,7 +441,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p); * with out-of-range leaves with stale content in them. This helper clears * them. */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p); #ifdef __XEN__ #include @@ -449,9 +454,10 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** - * Serialise a cpuid_policy object into an array of cpuid leaves. + * Serialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to serialise. + * @param policy The cpu_policy to serialise. * @param leaves The array of leaves to serialise into. * @param nr_entries The number of entries in 'leaves'. * @returns -errno @@ -460,13 +466,14 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; * leaves array is too short. On success, nr_entries is updated with the * actual number of leaves written. */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *policy, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); /** - * Unserialise a cpuid_policy object from an array of cpuid leaves. + * Unserialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to unserialise into. + * @param policy The cpu_policy to unserialise into. * @param leaves The array of leaves to unserialise from. * @param nr_entries The number of entries in 'leaves'. * @param err_leaf Optional hint for error diagnostics. @@ -474,21 +481,21 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, * @returns -errno * * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional + * incoming leaf is out of range of cpu_policy, in which case the optional * err_* pointers will identify the out-of-range indicies. * * No content validation of in-range leaves is performed. Synthesised data is * recalculated. */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, +int x86_cpuid_copy_from_buffer(struct cpu_policy *policy, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); /** - * Serialise an msr_policy object into an array. + * Serialise the MSRs of a cpu_policy object into an array. * - * @param policy The msr_policy to serialise. + * @param policy The cpu_policy to serialise. * @param msrs The array of msrs to serialise into. * @param nr_entries The number of entries in 'msrs'. * @returns -errno @@ -497,13 +504,13 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, * buffer array is too short. On success, nr_entries is updated with the * actual number of msrs written. */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, +int x86_msr_copy_to_buffer(const struct cpu_policy *policy, msr_entry_buffer_t msrs, uint32_t *nr_entries); /** - * Unserialise an msr_policy object from an array of msrs. + * Unserialise the MSRs of a cpu_policy object from an array of msrs. * - * @param policy The msr_policy object to unserialise into. + * @param policy The cpu_policy object to unserialise into. * @param msrs The array of msrs to unserialise from. * @param nr_entries The number of entries in 'msrs'. * @param err_msr Optional hint for error diagnostics. @@ -517,7 +524,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *policy, * * No content validation is performed on the data stored in the policy object. */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, +int x86_msr_copy_from_buffer(struct cpu_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 734e90823a..68aafb4049 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -102,13 +102,13 @@ void x86_cpu_featureset_to_policy( p->feat._7d1 = fs[FEATURESET_7d1]; } -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) +void x86_cpu_policy_recalc_synth(struct cpu_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); } -void x86_cpuid_policy_fill_native(struct cpuid_policy *p) +void x86_cpu_policy_fill_native(struct cpu_policy *p) { unsigned int i; @@ -199,7 +199,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]); cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]); - xstates = cpuid_policy_xstates(p); + xstates = cpu_policy_xstates(p); /* This logic will probably need adjusting when XCR0[63] gets used. */ BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); @@ -222,10 +222,12 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - x86_cpuid_policy_recalc_synth(p); + /* TODO MSRs */ + + x86_cpu_policy_recalc_synth(p); } -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p) { unsigned int i; @@ -260,7 +262,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) zero_leaves(p->topo.raw, i, ARRAY_SIZE(p->topo.raw) - 1); } - if ( p->basic.max_leaf < 0xd || !cpuid_policy_xstates(p) ) + if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); else { @@ -268,7 +270,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); /* First two leaves always valid. Rest depend on xstates. */ - i = max(2, 64 - __builtin_clzll(cpuid_policy_xstates(p))); + i = max(2, 64 - __builtin_clzll(cpu_policy_xstates(p))); zero_leaves(p->xstate.raw, i, ARRAY_SIZE(p->xstate.raw) - 1); @@ -278,7 +280,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) ARRAY_SIZE(p->extd.raw) - 1); } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature) +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature) { static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static const struct { @@ -333,7 +335,7 @@ static int copy_leaf_to_buffer(uint32_t leaf, uint32_t subleaf, return 0; } -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -383,7 +385,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, case 0xd: { - uint64_t xstates = cpuid_policy_xstates(p); + uint64_t xstates = cpu_policy_xstates(p); COPY_LEAF(leaf, 0, &p->xstate.raw[0]); COPY_LEAF(leaf, 1, &p->xstate.raw[1]); @@ -419,7 +421,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, return 0; } -int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, +int x86_cpuid_copy_from_buffer(struct cpu_policy *p, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf) @@ -522,7 +524,7 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, } } - x86_cpuid_policy_recalc_synth(p); + x86_cpu_policy_recalc_synth(p); return 0; diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index c4d885e7b5..e04b9ca013 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -23,7 +23,7 @@ static int copy_msr_to_buffer(uint32_t idx, uint64_t val, return 0; } -int x86_msr_copy_to_buffer(const struct msr_policy *p, +int x86_msr_copy_to_buffer(const struct cpu_policy *p, msr_entry_buffer_t msrs, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -48,7 +48,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p, return 0; } -int x86_msr_copy_from_buffer(struct msr_policy *p, +int x86_msr_copy_from_buffer(struct cpu_policy *p, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581519.910307 (Exim 4.92) (envelope-from ) id 1qTstW-0007OG-TN; Wed, 09 Aug 2023 23:47:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581519.910307; Wed, 09 Aug 2023 23:47:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstW-0007O9-QK; Wed, 09 Aug 2023 23:47:14 +0000 Received: by outflank-mailman (input) for mailman id 581519; Wed, 09 Aug 2023 23:47:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstW-0007Nw-45 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstW-0007xt-3Q for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTstW-0004sb-2d for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dzAddkIMeEYlJGI/sihT0XeuOORbrWaV741jIIrg1vg=; b=2TJ8g04bPsItVao7LFrzvlLonX oZQ1592h/n2iSB/L367HQqXSl8qwwDYsTpQFzPieVNU4fr4e91b152G9Iy8BMc7tVy9ethVQMhSfx nGrz1wJpXE/vIgVDwtHAIxD4cxTiGec16Xl7vud1hiMN9acPnMugAI5xz9pnyEdbnUAk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: Remove temporary {cpuid,msr}_policy defines Message-Id: Date: Wed, 09 Aug 2023 23:47:14 +0000 commit 04866f2fdae3b57bb0468266ad1db9940539257a Author: Andrew Cooper AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce) --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/include/asm/msr.h | 2 +- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 6 +++--- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 14 files changed, 26 insertions(+), 32 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 28a605a5cb..ce7678f242 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -1008,7 +1008,7 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 3f20c342fd..f311372cdf 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -36,7 +36,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index faea542286..aca9fa310c 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -283,7 +283,7 @@ void update_guest_memory_policy(struct vcpu *v, void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index b486c0efe0..d6c6ab8897 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -905,7 +905,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -942,7 +942,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe, cet; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index fa73257203..5fa945c526 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -596,7 +596,7 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index eb32f12e2d..5909935e0b 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1083,7 +1083,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 64dbd50197..8da6be33ee 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -738,7 +738,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void cf_check vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3465,7 +3465,7 @@ static int cf_check vmx_msr_write_intercept( unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index b51d92e27c..adda736efc 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -278,7 +278,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 14bcb8261c..a79021774b 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -54,8 +54,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -139,13 +138,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -321,7 +320,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -340,8 +339,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -382,7 +380,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -392,7 +390,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -404,7 +402,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -441,7 +439,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 95492715d8..5c92812dc6 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -146,7 +146,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index ab52768271..04416f1979 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -885,7 +885,7 @@ static int cf_check read_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false, warn = false; uint64_t tmp; int ret; @@ -1034,7 +1034,7 @@ static int cf_check write_msr( { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false; int ret; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index cade9e12f8..d12004b1c6 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1035,7 +1035,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 94dd72585a..7a4d3437dd 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1923,7 +1923,7 @@ in_protmode( } static bool -_amd_like(const struct cpuid_policy *cp) +_amd_like(const struct cpu_policy *cp) { return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } @@ -1931,7 +1931,7 @@ _amd_like(const struct cpuid_policy *cp) static bool amd_like(const struct x86_emulate_ctxt *ctxt) { - return _amd_like(ctxt->cpuid); + return _amd_like(ctxt->cpu_policy); } #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) @@ -2078,7 +2078,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581520.910311 (Exim 4.92) (envelope-from ) id 1qTstg-0007SW-UT; Wed, 09 Aug 2023 23:47:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581520.910311; Wed, 09 Aug 2023 23:47:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstg-0007SP-Ry; Wed, 09 Aug 2023 23:47:24 +0000 Received: by outflank-mailman (input) for mailman id 581520; Wed, 09 Aug 2023 23:47:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTstg-0007SB-7H for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully Message-Id: Date: Wed, 09 Aug 2023 23:47:24 +0000 commit d18c9ebccb9050bfd2a1ff24782e7cb68c104580 Author: Andrew Cooper AuthorDate: Wed May 10 19:58:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully When adding new featureset words, it is convenient to split the work into several patches. However, GCC 12 spotted that the way we prefer to split the work results in a real (transient) breakage whereby the policy <-> featureset helpers perform out-of-bounds accesses on the featureset array. Fix this by having gen-cpuid.py calculate FEATURESET_NR_ENTRIES from the comments describing the word blocks, rather than from the XEN_CPUFEATURE() with the greatest value. For simplicty, require that the word blocks appear in order. This can be revisted if we find a good reason to have blocks out of order. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56e2c8e5860090a35d5f0cafe168223a2a7c0e62) --- xen/tools/gen-cpuid.py | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 4f7c8d78cc..83b19c8515 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -50,13 +50,37 @@ def parse_definitions(state): "\s+([\s\d]+\*[\s\d]+\+[\s\d]+)\)" "\s+/\*([\w!]*) .*$") + word_regex = re.compile( + r"^/\* .* word (\d*) \*/$") + last_word = -1 + this = sys.modules[__name__] for l in state.input.readlines(): - # Short circuit the regex... - if not l.startswith("XEN_CPUFEATURE("): + + # Short circuit the regexes... + if not (l.startswith("XEN_CPUFEATURE(") or + l.startswith("/* ")): continue + # Handle /* ... word $N */ lines + if l.startswith("/* "): + + res = word_regex.match(l) + if res is None: + continue # Some other comment + + word = int(res.groups()[0]) + + if word != last_word + 1: + raise Fail("Featureset word %u out of order (last word %u)" + % (word, last_word)) + + last_word = word + state.nr_entries = word + 1 + continue + + # Handle XEN_CPUFEATURE( lines res = feat_regex.match(l) if res is None: @@ -94,6 +118,15 @@ def parse_definitions(state): if len(state.names) == 0: raise Fail("No features found") + if state.nr_entries == 0: + raise Fail("No featureset word info found") + + max_val = max(state.names.keys()) + if (max_val >> 5) >= state.nr_entries: + max_name = state.names[max_val] + raise Fail("Feature %s (%d*32+%d) exceeds FEATURESET_NR_ENTRIES (%d)" + % (max_name, max_val >> 5, max_val & 31, state.nr_entries)) + def featureset_to_uint32s(fs, nr): """ Represent a featureset as a list of C-compatible uint32_t's """ @@ -122,9 +155,6 @@ def format_uint32s(state, featureset, indent): def crunch_numbers(state): - # Size of bitmaps - state.nr_entries = nr_entries = (max(state.names.keys()) >> 5) + 1 - # Features common between 1d and e1d. common_1d = (FPU, VME, DE, PSE, TSC, MSR, PAE, MCE, CX8, APIC, MTRR, PGE, MCA, CMOV, PAT, PSE36, MMX, FXSR) @@ -328,7 +358,7 @@ def crunch_numbers(state): state.nr_deep_deps = len(state.deep_deps.keys()) # Calculate the bitfield name declarations - for word in range(nr_entries): + for word in range(state.nr_entries): names = [] for bit in range(32): -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581521.910314 (Exim 4.92) (envelope-from ) id 1qTstq-0007Vv-W8; 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Wed, 09 Aug 2023 23:47:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=nkL1R68wupGeUQeUrrXEvb35ozoakLIIu7ZLMrphQQ0=; b=H/+26D9QlsPG8gBLmosWbMh7cv AaiHuHhp0favbZlpNyYuFzCB6a347N1oi9329l1EDJyaNZ8JUWQBywwqKOWzX0ooPbwfmWd22c8lb cWDFSvVdDpYIsCvSc3kc829PETZPmF/eDfoHi/P+YCviNwiIvydhWY11JD7dYeU2u8FY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Rework dom0 feature configuration Message-Id: Date: Wed, 09 Aug 2023 23:47:34 +0000 commit 84734f2e2aa14b8833c25618c25c40952cb0f9bc Author: Andrew Cooper AuthorDate: Fri May 12 13:52:39 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Rework dom0 feature configuration Right now, dom0's feature configuration is split between between the common path and a dom0-specific one. This mostly is by accident, and causes some very subtle bugs. First, start by clearly defining init_dom0_cpuid_policy() to be the domain that Xen builds automatically. The late hwdom case is still constructed in a mostly normal way, with the control domain having full discretion over the CPU policy. Identifying this highlights a latent bug - the two halves of the MSR_ARCH_CAPS bodge are asymmetric with respect to the hardware domain. This means that shim, or a control-only dom0 sees the MSR_ARCH_CAPS CPUID bit but none of the MSR content. This in turn declares the hardware to be retpoline-safe by failing to advertise the {R,}RSBA bits appropriately. Restrict this logic to the hardware domain, although the special case will cease to exist shortly. For the CPUID Faulting adjustment, the comment in ctxt_switch_levelling() isn't actually relevant. Provide a better explanation. Move the recalculate_cpuid_policy() call outside of the dom0-cpuid= case. This is no change for now, but will become necessary shortly. Finally, place the second half of the MSR_ARCH_CAPS bodge after the recalculate_cpuid_policy() call. This is necessary to avoid transiently breaking the hardware domain's view while the handling is cleaned up. This special case will cease to exist shortly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ef1987fcb0fdfaa7ee148024037cb5fa335a7b2d) --- xen/arch/x86/cpu-policy.c | 57 ++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 19766e87b6..0f51823862 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -678,29 +678,6 @@ int init_domain_cpu_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - p->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - d->arch.cpu_policy = p; recalculate_cpuid_policy(d); @@ -836,11 +813,15 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } +/* + * Adjust the CPU policy for dom0. Really, this is "the domain Xen builds + * automatically on boot", and might not have the domid 0 (e.g. pvshim). + */ void __init init_dom0_cpuid_policy(struct domain *d) { struct cpu_policy *p = d->arch.cpuid; - /* dom0 can't migrate. Give it ITSC if available. */ + /* Dom0 doesn't migrate relative to Xen. Give it ITSC if available. */ if ( cpu_has_itsc ) p->extd.itsc = true; @@ -849,7 +830,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( cpu_has_arch_caps ) + if ( is_hardware_domain(d) && cpu_has_arch_caps ) p->feat.arch_caps = true; /* Apply dom0-cpuid= command line settings, if provided. */ @@ -867,8 +848,32 @@ void __init init_dom0_cpuid_policy(struct domain *d) } x86_cpu_featureset_to_policy(fs, p); + } + + /* + * PV Control domains used to require unfiltered CPUID. This was fixed in + * Xen 4.13, but there is an cmdline knob to restore the prior behaviour. + * + * If the domain is getting unfiltered CPUID, don't let the guest kernel + * play with CPUID faulting either, as Xen's CPUID path won't cope. + */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; - recalculate_cpuid_policy(d); + recalculate_cpuid_policy(d); + + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581522.910319 (Exim 4.92) (envelope-from ) id 1qTsu1-0007Yr-25; Wed, 09 Aug 2023 23:47:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581522.910319; Wed, 09 Aug 2023 23:47:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsu0-0007Yj-VB; Wed, 09 Aug 2023 23:47:44 +0000 Received: by outflank-mailman (input) for mailman id 581522; Wed, 09 Aug 2023 23:47:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsu0-0007YZ-D0 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsu0-0007yX-CL for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsu0-0004tv-Bj for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Kjx/y/JVlFevUC3TWIGspM8trogS/g3gSAOmToCYNPU=; b=i37MG8bRa7O2CshJsDxvF+xeQZ ufrE0sKUvRH0IV0KqUxP6tYy3He09N/AT/qH9vBoWk/NtGiAIHfIG2H2gpNnIyubX+zsep0VJ0dux GxEBShXrsS6DPdaf1k3b2Hnf34mB5r4tmTC4+dGeILVtxrQSbm4+kibYj0gbkPshN6zY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy Message-Id: Date: Wed, 09 Aug 2023 23:47:44 +0000 commit b997a9ac9fca5215332a44371c329431a2308984 Author: Andrew Cooper AuthorDate: Mon May 15 14:14:53 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy We are about to move MSR_ARCH_CAPS into featureset, but the order of operations (copy raw policy, then copy x86_capabilitiles[] in) will end up clobbering the ARCH_CAPS value. Some toolstacks use this information to handle TSX compatibility across the CPUs and microcode versions where support was removed. To avoid this transient breakage, read from raw_cpu_policy rather than modifying it in place. This logic will be removed entirely in due course. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 43912f8dbb1888ffd7f00adb10724c70e71927c4) --- xen/arch/x86/cpu-policy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 0f51823862..630c133daf 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -411,7 +411,7 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw &= + p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:47:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:47:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581523.910323 (Exim 4.92) (envelope-from ) id 1qTsuB-0007c1-4R; Wed, 09 Aug 2023 23:47:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581523.910323; Wed, 09 Aug 2023 23:47:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuB-0007bu-1y; Wed, 09 Aug 2023 23:47:55 +0000 Received: by outflank-mailman (input) for mailman id 581523; Wed, 09 Aug 2023 23:47:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuA-0007bn-GG for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuA-0007yb-FR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsuA-0004uK-Ed for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:47:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sDpsk3deJBAyh5dTSw+2nwCCyrlGtFYWY8pKEE/J2NM=; b=xTSRSDCNZFnFCYrLy1MUETH73y h32/g32qF5oVc7TKA+AFwndLH9vgO/BtmD/FuOqSkygYoamsxXLzJ7F/N3jWoFgKAS12gEzffBtBp CuljM2Yph5N+zjadIUBsWSY1s6VjOkIVwU9erddC5JXwr7DuOWuAahERpfGzVxW0x3i8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Message-Id: Date: Wed, 09 Aug 2023 23:47:54 +0000 commit 86ac7f74771bca3aa94bcd0e43b85a3878dd26cd Author: Andrew Cooper AuthorDate: Fri May 12 17:55:21 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Bits through 24 are already defined, meaning that we're not far off needing the second word. Put both in right away. As both halves are present now, the arch_caps field is full width. Adjust the unit test, which notices. The bool bitfield names in the arch_caps union are unused, and somewhat out of date. They'll shortly be automatically generated. Add CPUID and MSR prefixes to the ./xen-cpuid verbose output, now that there are a mix of the two. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit d9fe459ffad8a6eac2f695adb2331aff83c345d1) --- tools/misc/xen-cpuid.c | 44 +++++++++++++++---------- tools/tests/cpu-policy/test-cpu-policy.c | 5 --- xen/include/public/arch-x86/cpufeatureset.h | 4 +++ xen/include/xen/lib/x86/cpu-policy.h | 50 ++++++++++++++--------------- xen/lib/x86/cpuid.c | 4 +++ 5 files changed, 59 insertions(+), 48 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 859345ae8a..642e62efdf 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -218,31 +218,41 @@ static const char *const str_7d2[32] = [ 4] = "bhi-ctrl", [ 5] = "mcdt-no", }; +static const char *const str_m10Al[32] = +{ +}; + +static const char *const str_m10Ah[32] = +{ +}; + static const struct { const char *name; const char *abbr; const char *const *strs; } decodes[] = { - { "0x00000001.edx", "1d", str_1d }, - { "0x00000001.ecx", "1c", str_1c }, - { "0x80000001.edx", "e1d", str_e1d }, - { "0x80000001.ecx", "e1c", str_e1c }, - { "0x0000000d:1.eax", "Da1", str_Da1 }, - { "0x00000007:0.ebx", "7b0", str_7b0 }, - { "0x00000007:0.ecx", "7c0", str_7c0 }, - { "0x80000007.edx", "e7d", str_e7d }, - { "0x80000008.ebx", "e8b", str_e8b }, - { "0x00000007:0.edx", "7d0", str_7d0 }, - { "0x00000007:1.eax", "7a1", str_7a1 }, - { "0x80000021.eax", "e21a", str_e21a }, - { "0x00000007:1.ebx", "7b1", str_7b1 }, - { "0x00000007:2.edx", "7d2", str_7d2 }, - { "0x00000007:1.ecx", "7c1", str_7c1 }, - { "0x00000007:1.edx", "7d1", str_7d1 }, + { "CPUID 0x00000001.edx", "1d", str_1d }, + { "CPUID 0x00000001.ecx", "1c", str_1c }, + { "CPUID 0x80000001.edx", "e1d", str_e1d }, + { "CPUID 0x80000001.ecx", "e1c", str_e1c }, + { "CPUID 0x0000000d:1.eax", "Da1", str_Da1 }, + { "CPUID 0x00000007:0.ebx", "7b0", str_7b0 }, + { "CPUID 0x00000007:0.ecx", "7c0", str_7c0 }, + { "CPUID 0x80000007.edx", "e7d", str_e7d }, + { "CPUID 0x80000008.ebx", "e8b", str_e8b }, + { "CPUID 0x00000007:0.edx", "7d0", str_7d0 }, + { "CPUID 0x00000007:1.eax", "7a1", str_7a1 }, + { "CPUID 0x80000021.eax", "e21a", str_e21a }, + { "CPUID 0x00000007:1.ebx", "7b1", str_7b1 }, + { "CPUID 0x00000007:2.edx", "7d2", str_7d2 }, + { "CPUID 0x00000007:1.ecx", "7c1", str_7c1 }, + { "CPUID 0x00000007:1.edx", "7d1", str_7d1 }, + { "MSR_ARCH_CAPS.lo", "m10Al", str_m10Al }, + { "MSR_ARCH_CAPS.hi", "m10Ah", str_m10Ah }, }; -#define COL_ALIGN "18" +#define COL_ALIGN "24" static const char *const fs_names[] = { [XEN_SYSCTL_cpu_featureset_raw] = "Raw", diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index fea0eb8c35..cac28c7625 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -391,11 +391,6 @@ static void test_msr_deserialise_failure(void) .msr = { .idx = 0xce, .val = ~0ull }, .rc = -EOVERFLOW, }, - { - .name = "truncated val", - .msr = { .idx = 0x10a, .val = ~0ull }, - .rc = -EOVERFLOW, - }, }; printf("Testing MSR deserialise failure:\n"); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 08600cfdc7..52e862b678 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -300,6 +300,10 @@ XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ + +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index bfa4250604..6d5e9edd26 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -4,22 +4,24 @@ #include -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_m10Al 16 /* 0x0000010a.eax */ +#define FEATURESET_m10Ah 17 /* 0x0000010a.edx */ struct cpuid_leaf { @@ -350,17 +352,13 @@ struct cpu_policy * fixed in hardware. */ union { - uint32_t raw; + uint64_t raw; + struct { + uint32_t lo, hi; + }; struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; + DECL_BITFIELD(m10Al); + DECL_BITFIELD(m10Ah); }; } arch_caps; diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 68aafb4049..e795ce3750 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -79,6 +79,8 @@ void x86_cpu_policy_to_featureset( fs[FEATURESET_7d2] = p->feat._7d2; fs[FEATURESET_7c1] = p->feat._7c1; fs[FEATURESET_7d1] = p->feat._7d1; + fs[FEATURESET_m10Al] = p->arch_caps.lo; + fs[FEATURESET_m10Ah] = p->arch_caps.hi; } void x86_cpu_featureset_to_policy( @@ -100,6 +102,8 @@ void x86_cpu_featureset_to_policy( p->feat._7d2 = fs[FEATURESET_7d2]; p->feat._7c1 = fs[FEATURESET_7c1]; p->feat._7d1 = fs[FEATURESET_7d1]; + p->arch_caps.lo = fs[FEATURESET_m10Al]; + p->arch_caps.hi = fs[FEATURESET_m10Ah]; } void x86_cpu_policy_recalc_synth(struct cpu_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581524.910327 (Exim 4.92) (envelope-from ) id 1qTsuL-0007ec-6P; Wed, 09 Aug 2023 23:48:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581524.910327; Wed, 09 Aug 2023 23:48:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuL-0007eU-3T; Wed, 09 Aug 2023 23:48:05 +0000 Received: by outflank-mailman (input) for mailman id 581524; Wed, 09 Aug 2023 23:48:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuK-0007eE-J9 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuK-0007ys-IR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsuK-0004us-Hj for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/9H5L+0ktI5E2FXB2pYpgQFQxPNTmT+YaysMMuJH/ME=; b=WsO/yiInXAC6Bui6xRrxQVYvIz Kw7QP1R3g01mnLtv7fsZmC9P412CGzkRPQDBZwCJ4x34c26coMzvGa6y3LWFMxM72oonya+e2Np/B GaNkcrz2WTcEedRx6tLyUbJjOYMDKl+qp6nN3d8SSWz9nhaxTtm86OsmfOTzttQ0MpEE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: MSR_ARCH_CAPS feature names Message-Id: Date: Wed, 09 Aug 2023 23:48:04 +0000 commit c399b20810c1e605fc0e3d7ca958094ce957623a Author: Andrew Cooper AuthorDate: Fri May 12 18:50:59 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: MSR_ARCH_CAPS feature names Seed the default visibility from the dom0 special case, which for the most part just exposes the *_NO bits. EIBRS is the one non-*_NO bit, which is "just" a status bit to the guest indicating a change in implemention of IBRS which is already fully supported. Insert a block dependency from the ARCH_CAPS CPUID bit to the entire content of the MSR. This is because MSRs have no structure information similar to CPUID, and used by x86_cpu_policy_clear_out_of_range_leaves(), in order to bulk-clear inaccessable words. The overall CPUID bit is still max-only, so all of MSR_ARCH_CAPS is hidden in the default policies. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ce8c930851a5ca21c4e70f83be7e8b290ce1b519) --- tools/misc/xen-cpuid.c | 13 +++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 23 +++++++++++++++++++++++ xen/tools/gen-cpuid.py | 3 +++ 3 files changed, 39 insertions(+) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 642e62efdf..9eaa6c9209 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -220,6 +220,19 @@ static const char *const str_7d2[32] = static const char *const str_m10Al[32] = { + [ 0] = "rdcl-no", [ 1] = "eibrs", + [ 2] = "rsba", [ 3] = "skip-l1dfl", + [ 4] = "intel-ssb-no", [ 5] = "mds-no", + [ 6] = "if-pschange-mc-no", [ 7] = "tsx-ctrl", + [ 8] = "taa-no", [ 9] = "mcu-ctrl", + [10] = "misc-pkg-ctrl", [11] = "energy-ctrl", + [12] = "doitm", [13] = "sbdr-ssdp-no", + [14] = "fbsdp-no", [15] = "psdp-no", + /* 16 */ [17] = "fb-clear", + [18] = "fb-clear-ctrl", [19] = "rrsba", + [20] = "bhi-no", [21] = "xapic-status", + /* 22 */ [23] = "ovrclk-status", + [24] = "pbrsb-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 52e862b678..23b72094c6 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -301,6 +301,29 @@ XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ +XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ +XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ +XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ +XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ +XEN_CPUFEATURE(IF_PSCHANGE_MC_NO, 16*32+ 6) /*A No Instruction fetch #MC */ +XEN_CPUFEATURE(TSX_CTRL, 16*32+ 7) /* MSR_TSX_CTRL */ +XEN_CPUFEATURE(TAA_NO, 16*32+ 8) /*A No TSX Async Abort */ +XEN_CPUFEATURE(MCU_CTRL, 16*32+ 9) /* MSR_MCU_CTRL */ +XEN_CPUFEATURE(MISC_PKG_CTRL, 16*32+10) /* MSR_MISC_PKG_CTRL */ +XEN_CPUFEATURE(ENERGY_FILTERING, 16*32+11) /* MSR_MISC_PKG_CTRL.ENERGY_FILTERING */ +XEN_CPUFEATURE(DOITM, 16*32+12) /* Data Operand Invariant Timing Mode */ +XEN_CPUFEATURE(SBDR_SSDP_NO, 16*32+13) /*A No Shared Buffer Data Read or Sideband Stale Data Propagation */ +XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Propagation */ +XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ +XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ +XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ +XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ +XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ +XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 83b19c8515..72497b3cb0 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -325,6 +325,9 @@ def crunch_numbers(state): # In principle the TSXLDTRK insns could also be considered independent. RTM: [TSXLDTRK], + + # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. + ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:16 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581525.910330 (Exim 4.92) (envelope-from ) id 1qTsuW-0007gy-7j; Wed, 09 Aug 2023 23:48:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581525.910330; Wed, 09 Aug 2023 23:48:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuW-0007gq-53; Wed, 09 Aug 2023 23:48:16 +0000 Received: by outflank-mailman (input) for mailman id 581525; Wed, 09 Aug 2023 23:48:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuU-0007gk-ME for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuU-0007yw-LT for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsuU-0004vS-Ki for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=86nQ8tw1kwGma+Ilo8kYcEiBWpWbtDLujYNYYpWfH98=; b=WsAH+1KTmtpcj4MObSE/lki9Wm Bb7CMa9tY/UFq+2N6XxnzBhfcjfgO+BZ7JkOOcMf2JbCjFdfUlb1dWu3JeLaPmry7TyeXY2LM8QRe 4bQw6Nw4Eao0xYaK/Jo913ZlLbLVE92dkaojMkPeBlUXW3Zx2qAtzAgeO0Tq/q2x7Y4k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Message-Id: Date: Wed, 09 Aug 2023 23:48:14 +0000 commit 8d9df087e371dc8ca1b64bdc7dd7008fd85830b7 Author: Andrew Cooper AuthorDate: Fri May 12 15:37:02 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Extend x86_cpu_policy_fill_native() with a read of ARCH_CAPS based on the CPUID information just read, removing the specially handling in calculate_raw_cpu_policy(). Right now, the only use of x86_cpu_policy_fill_native() outside of Xen is the unit tests. Getting MSR data in this context is left to whomever first encounters a genuine need to have it. Extend generic_identify() to read ARCH_CAPS into x86_capability[], which is fed into the Host Policy. This in turn means there's no need to special case arch_caps in calculate_host_policy(). No practical change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 70553000d6b44dd7c271a35932b0b3e1f22c5532) --- xen/arch/x86/cpu-policy.c | 12 ------------ xen/arch/x86/cpu/common.c | 5 +++++ xen/lib/x86/cpuid.c | 7 ++++++- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 630c133daf..db04ffb899 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -354,9 +354,6 @@ static void __init calculate_raw_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -409,15 +406,6 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); } static void __init guest_common_default_feature_adjustments(uint32_t *fs) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index ce69232808..ffa6099307 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -471,6 +471,11 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(0xd, 1, &c->x86_capability[FEATURESET_Da1], &tmp, &tmp, &tmp); + + if (test_bit(X86_FEATURE_ARCH_CAPS, c->x86_capability)) + rdmsr(MSR_ARCH_CAPABILITIES, + c->x86_capability[FEATURESET_m10Al], + c->x86_capability[FEATURESET_m10Ah]); } /* diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e795ce3750..07e5501914 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -226,7 +226,12 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - /* TODO MSRs */ +#ifdef __XEN__ + /* TODO MSR_PLATFORM_INFO */ + + if ( p->feat.arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +#endif x86_cpu_policy_recalc_synth(p); } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581526.910334 (Exim 4.92) (envelope-from ) id 1qTsug-0007jq-93; Wed, 09 Aug 2023 23:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581526.910334; Wed, 09 Aug 2023 23:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsug-0007jj-6X; Wed, 09 Aug 2023 23:48:26 +0000 Received: by outflank-mailman (input) for mailman id 581526; Wed, 09 Aug 2023 23:48:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuf-0007jW-2E for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/boot: Expose MSR_ARCH_CAPS data in guest max policies Message-Id: Date: Wed, 09 Aug 2023 23:48:24 +0000 commit 95a3a8f7381149a018198207467ada06a261eedc Author: Andrew Cooper AuthorDate: Fri May 12 15:53:35 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Expose MSR_ARCH_CAPS data in guest max policies We already have common and default feature adjustment helpers. Introduce one for max featuresets too. Offer MSR_ARCH_CAPS unconditionally in the max policy, and stop clobbering the data inherited from the Host policy. This will be necessary to level a VM safely for migration. Annotate the ARCH_CAPS CPUID bit as special. Note: ARCH_CAPS is still max-only for now, so will not be inhereted by the default policies. With this done, the special case for dom0 can be shrunk to just resampling the Host policy (as ARCH_CAPS isn't visible by default yet). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bbb289f3d5bdd3358af748d7c567343532ac45b5) --- xen/arch/x86/cpu-policy.c | 42 ++++++++++++++++------------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 25 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index db04ffb899..d76b544816 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -408,6 +408,25 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; } +static void __init guest_common_max_feature_adjustments(uint32_t *fs) +{ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests + * unconditionally, although limit it to Intel systems as it is highly + * uarch-specific. + * + * In particular, the RSBA and RRSBA bits mean "you might migrate to a + * system where RSB underflow uses alternative predictors (a.k.a + * Retpoline not safe)", so these need to be visible to a guest in all + * cases, even when it's only some other server in the pool which + * suffers the identified behaviour. + */ + __set_bit(X86_FEATURE_ARCH_CAPS, fs); + } +} + static void __init guest_common_default_feature_adjustments(uint32_t *fs) { /* @@ -483,6 +502,7 @@ static void __init calculate_pv_max_policy(void) __clear_bit(X86_FEATURE_IBRS, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -490,8 +510,6 @@ static void __init calculate_pv_max_policy(void) recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -589,6 +607,7 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_XSAVES, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -597,8 +616,6 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) @@ -819,7 +836,10 @@ void __init init_dom0_cpuid_policy(struct domain *d) * domain policy logic gains a better understanding of MSRs. */ if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { p->feat.arch_caps = true; + p->arch_caps.raw = host_cpu_policy.arch_caps.raw; + } /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) @@ -849,20 +869,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) p->platform_info.cpuid_faulting = false; recalculate_cpuid_policy(d); - - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } } static void __init __maybe_unused build_assertions(void) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 23b72094c6..02a80b0c0c 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -270,7 +270,7 @@ XEN_CPUFEATURE(AVX512_FP16, 9*32+23) /* AVX512 FP16 instructions */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581528.910339 (Exim 4.92) (envelope-from ) id 1qTsuq-0007nJ-CH; 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Wed, 09 Aug 2023 23:48:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bzEf6UBYEmXEm2+4rDfwMmhXMe+ef2LhE++yU9G2tTk=; b=EwqTF1bCSTzrdq8ptL6buxMAap xs7SJpFUnLVCZSv2DhGaoHVeA7I3UW8szCH1Ohp6d7nyL1FGfnCKOEFpEs2MpR7derDhqPubvnEHB ikYQ7/wWpLhLRtK6mLcF+VjxV+yTCfY9uex57G9VBXAhcNH1F3Q0A74YBog2ESDl7gJk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/vtx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:48:34 +0000 commit 2aeaa7904d560050043869410afbd62743e51b10 Author: Andrew Cooper AuthorDate: Mon May 15 16:59:25 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3) --- xen/arch/x86/hvm/vmx/vmx.c | 8 ++------ xen/arch/x86/include/asm/cpufeature.h | 3 +++ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 8da6be33ee..f256dc2635 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2808,8 +2808,6 @@ static void __init ler_to_fixup_check(void); */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2817,10 +2815,8 @@ static bool __init has_if_pschange_mc(void) if ( cpu_has_hypervisor ) return false; - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index a3ad9ebee4..448d5c1e05 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -145,6 +145,9 @@ #define cpu_has_avx_vnni boot_cpu_has(X86_FEATURE_AVX_VNNI) #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:46 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581529.910342 (Exim 4.92) (envelope-from ) id 1qTsv0-0007pk-Dg; Wed, 09 Aug 2023 23:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581529.910342; Wed, 09 Aug 2023 23:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsv0-0007pc-Aq; Wed, 09 Aug 2023 23:48:46 +0000 Received: by outflank-mailman (input) for mailman id 581529; Wed, 09 Aug 2023 23:48:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuy-0007pK-VA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsuy-0007zU-UR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsuy-0004ww-Tl for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hyKy8MVFpb2HNL9VJ6wIZq8RxbkQscDwgqDt91fxmhg=; b=EDoLY7YE3/y9q9kzbQdWHlYDer kgIsvuWvnFVPLDbiOQulMDp90s33eCVU4hwwpgI7rFT9IjVfs8jDsJXvwH5CoMdTC8Wd1D1Fn1xMA 0Jlk0XUmslZaRpkdHZ/l5H+fBCZJR5QcaYYMZLu1XPRsoqTL3B5wO/1sBbGRLQ8dKUjg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/tsx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:48:44 +0000 commit 55840b4f502b326427aeb33b38ae0c08a253cee3 Author: Andrew Cooper AuthorDate: Mon May 15 19:05:01 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/tsx: Remove opencoded MSR_ARCH_CAPS check The current cpu_has_tsx_ctrl tristate is serving double pupose; to signal the first pass through tsx_init(), and the availability of MSR_TSX_CTRL. Drop the variable, replacing it with a once boolean, and altering cpu_has_tsx_ctrl to come out of the feature information. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 205a9f970378c31ae3e00b52d59103a2e881b9e0) --- xen/arch/x86/include/asm/cpufeature.h | 1 + xen/arch/x86/include/asm/processor.h | 2 +- xen/arch/x86/tsx.c | 13 ++++++++----- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 448d5c1e05..31ab4495b3 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -147,6 +147,7 @@ /* MSR_ARCH_CAPS */ #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) +#define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 66611df6ef..8ff96388e8 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -624,7 +624,7 @@ static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model, return fam; } -extern int8_t opt_tsx, cpu_has_tsx_ctrl; +extern int8_t opt_tsx; extern bool rtm_disabled; void tsx_init(void); diff --git a/xen/arch/x86/tsx.c b/xen/arch/x86/tsx.c index 41b6092cfe..80c6f4cedd 100644 --- a/xen/arch/x86/tsx.c +++ b/xen/arch/x86/tsx.c @@ -19,7 +19,6 @@ * controlling TSX behaviour, and where TSX isn't force-disabled by firmware. */ int8_t __read_mostly opt_tsx = -1; -int8_t __read_mostly cpu_has_tsx_ctrl = -1; bool __read_mostly rtm_disabled; static int __init cf_check parse_tsx(const char *s) @@ -37,24 +36,28 @@ custom_param("tsx", parse_tsx); void tsx_init(void) { + static bool __read_mostly once; + /* * This function is first called between microcode being loaded, and CPUID * being scanned generally. Read into boot_cpu_data.x86_capability[] for * the cpu_has_* bits we care about using here. */ - if ( unlikely(cpu_has_tsx_ctrl < 0) ) + if ( unlikely(!once) ) { - uint64_t caps = 0; bool has_rtm_always_abort; + once = true; + if ( boot_cpu_data.cpuid_level >= 7 ) boot_cpu_data.x86_capability[FEATURESET_7d0] = cpuid_count_edx(7, 0); if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); + rdmsr(MSR_ARCH_CAPABILITIES, + boot_cpu_data.x86_capability[FEATURESET_m10Al], + boot_cpu_data.x86_capability[FEATURESET_m10Ah]); - cpu_has_tsx_ctrl = !!(caps & ARCH_CAPS_TSX_CTRL); has_rtm_always_abort = cpu_has_rtm_always_abort; if ( cpu_has_tsx_ctrl && cpu_has_srbds_ctrl ) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:48:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:48:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581530.910348 (Exim 4.92) (envelope-from ) id 1qTsvA-0007sR-FR; Wed, 09 Aug 2023 23:48:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581530.910348; Wed, 09 Aug 2023 23:48:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvA-0007sJ-CI; Wed, 09 Aug 2023 23:48:56 +0000 Received: by outflank-mailman (input) for mailman id 581530; Wed, 09 Aug 2023 23:48:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsv9-0007rv-1s for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsv9-000816-13 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:55 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsv9-0004xN-0R for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:48:55 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ecMJZJwJMUM/MQe7/8mOWbRffxiMYPf1eE5qYaZxgJA=; b=xufEMlafiRpwBfLtcpQ2Z1Yc9H GRVO0Dug5ntdqi9jUhrPIqepjNFcJdAIXMfBmcJCkbwVdvYHpdpAXwH+Jseyc3IZ4cyusMLMmOI1T FN5XCCsg+O44XBw4j7PeFkRpu0Z/wcv+3FzozK/nemu+grKJ2yzOVhUpMiiOQBXl5ado=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:48:55 +0000 commit 8b3632cdda56530e8d7534ec7a5c3c0c57bab0b9 Author: Andrew Cooper AuthorDate: Mon May 15 19:15:48 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Replace opencoded checks with regular feature ones. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 511b9f286c3dadd041e0d90beeff7d47c9bf3b7a) --- xen/arch/x86/include/asm/cpufeature.h | 7 +++++ xen/arch/x86/spec_ctrl.c | 56 ++++++++++++++++------------------- 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 31ab4495b3..2460bc7e12 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -146,8 +146,15 @@ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) /* MSR_ARCH_CAPS */ +#define cpu_has_rdcl_no boot_cpu_has(X86_FEATURE_RDCL_NO) +#define cpu_has_eibrs boot_cpu_has(X86_FEATURE_EIBRS) +#define cpu_has_rsba boot_cpu_has(X86_FEATURE_RSBA) +#define cpu_has_skip_l1dfl boot_cpu_has(X86_FEATURE_SKIP_L1DFL) +#define cpu_has_mds_no boot_cpu_has(X86_FEATURE_MDS_NO) #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) +#define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) +#define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index e80e2a5ed1..4bba5e8c29 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -294,12 +294,10 @@ custom_param("spec-ctrl", parse_spec_ctrl); int8_t __read_mostly opt_xpti_hwdom = -1; int8_t __read_mostly opt_xpti_domu = -1; -static __init void xpti_init_default(uint64_t caps) +static __init void xpti_init_default(void) { - if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) - caps = ARCH_CAPS_RDCL_NO; - - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + cpu_has_rdcl_no ) { if ( opt_xpti_hwdom < 0 ) opt_xpti_hwdom = 0; @@ -402,9 +400,10 @@ static int __init cf_check parse_pv_l1tf(const char *s) } custom_param("pv-l1tf", parse_pv_l1tf); -static void __init print_details(enum ind_thunk thunk, uint64_t caps) +static void __init print_details(enum ind_thunk thunk) { unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ if ( boot_cpu_data.cpuid_level >= 7 ) @@ -413,6 +412,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, caps); printk("Speculative mitigation facilities:\n"); @@ -590,7 +591,7 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(uint64_t caps) +static bool __init retpoline_safe(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -608,7 +609,7 @@ static bool __init retpoline_safe(uint64_t caps) * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( caps & (ARCH_CAPS_RSBA | ARCH_CAPS_IBRS_ALL) ) + if ( cpu_has_rsba || cpu_has_eibrs ) return false; switch ( boot_cpu_data.x86_model ) @@ -857,7 +858,7 @@ static void __init ibpb_calculations(void) } /* Calculate whether this CPU is vulnerable to L1TF. */ -static __init void l1tf_calculations(uint64_t caps) +static __init void l1tf_calculations(void) { bool hit_default = false; @@ -945,7 +946,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */ - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( cpu_has_rdcl_no ) cpu_has_bug_l1tf = false; if ( cpu_has_bug_l1tf && hit_default ) @@ -1004,7 +1005,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Calculate whether this CPU is vulnerable to MDS. */ -static __init void mds_calculations(uint64_t caps) +static __init void mds_calculations(void) { /* MDS is only known to affect Intel Family 6 processors at this time. */ if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || @@ -1012,7 +1013,7 @@ static __init void mds_calculations(uint64_t caps) return; /* Any processor advertising MDS_NO should be not vulnerable to MDS. */ - if ( caps & ARCH_CAPS_MDS_NO ) + if ( cpu_has_mds_no ) return; switch ( boot_cpu_data.x86_model ) @@ -1125,10 +1126,6 @@ void __init init_speculation_mitigations(void) enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; bool cpu_has_bug_taa; - uint64_t caps = 0; - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); hw_smt_enabled = check_smt_enabled(); @@ -1175,7 +1172,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe(caps) ) + if ( retpoline_safe() ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; @@ -1404,13 +1401,13 @@ void __init init_speculation_mitigations(void) * threads. Activate this if SMT is enabled, and Xen is using a non-zero * MSR_SPEC_CTRL setting. */ - if ( boot_cpu_has(X86_FEATURE_IBRSB) && !(caps & ARCH_CAPS_IBRS_ALL) && + if ( boot_cpu_has(X86_FEATURE_IBRSB) && !cpu_has_eibrs && hw_smt_enabled && default_xen_spec_ctrl ) setup_force_cpu_cap(X86_FEATURE_SC_MSR_IDLE); - xpti_init_default(caps); + xpti_init_default(); - l1tf_calculations(caps); + l1tf_calculations(); /* * By default, enable PV domU L1TF mitigations on all L1TF-vulnerable @@ -1431,7 +1428,7 @@ void __init init_speculation_mitigations(void) if ( !boot_cpu_has(X86_FEATURE_L1D_FLUSH) ) opt_l1d_flush = 0; else if ( opt_l1d_flush == -1 ) - opt_l1d_flush = cpu_has_bug_l1tf && !(caps & ARCH_CAPS_SKIP_L1DFL); + opt_l1d_flush = cpu_has_bug_l1tf && !cpu_has_skip_l1dfl; /* We compile lfence's in by default, and nop them out if requested. */ if ( !opt_branch_harden ) @@ -1454,7 +1451,7 @@ void __init init_speculation_mitigations(void) "enabled. Please assess your configuration and choose an\n" "explicit 'smt=' setting. See XSA-273.\n"); - mds_calculations(caps); + mds_calculations(); /* * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have @@ -1466,7 +1463,7 @@ void __init init_speculation_mitigations(void) * the return-to-guest path. */ if ( opt_unpriv_mmio ) - opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR; + opt_fb_clear_mmio = cpu_has_fb_clear; /* * By default, enable PV and HVM mitigations on MDS-vulnerable hardware. @@ -1496,7 +1493,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio ) setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE); - opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush; + opt_md_clear_hvm &= !cpu_has_skip_l1dfl && !opt_l1d_flush; /* * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT @@ -1527,8 +1524,7 @@ void __init init_speculation_mitigations(void) * we check both to spot TSX in a microcode/cmdline independent way. */ cpu_has_bug_taa = - (cpu_has_rtm || (caps & ARCH_CAPS_TSX_CTRL)) && - (caps & (ARCH_CAPS_MDS_NO | ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO; + (cpu_has_rtm || cpu_has_tsx_ctrl) && cpu_has_mds_no && !cpu_has_taa_no; /* * On TAA-affected hardware, disabling TSX is the preferred mitigation, vs @@ -1547,7 +1543,7 @@ void __init init_speculation_mitigations(void) * plausibly value TSX higher than Hyperthreading...), disable TSX to * mitigate TAA. */ - if ( opt_tsx == -1 && cpu_has_bug_taa && (caps & ARCH_CAPS_TSX_CTRL) && + if ( opt_tsx == -1 && cpu_has_bug_taa && cpu_has_tsx_ctrl && ((hw_smt_enabled && opt_smt) || !boot_cpu_has(X86_FEATURE_SC_VERW_IDLE)) ) { @@ -1572,15 +1568,15 @@ void __init init_speculation_mitigations(void) if ( cpu_has_srbds_ctrl ) { if ( opt_srb_lock == -1 && !opt_unpriv_mmio && - (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) + cpu_has_mds_no && !cpu_has_taa_no && + (!cpu_has_hle || (cpu_has_tsx_ctrl && rtm_disabled)) ) opt_srb_lock = 0; set_in_mcu_opt_ctrl(MCU_OPT_CTRL_RNGDS_MITG_DIS, opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } - print_details(thunk, caps); + print_details(thunk); /* * If MSR_SPEC_CTRL is available, apply Xen's default setting and discard -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581531.910352 (Exim 4.92) (envelope-from ) id 1qTsvK-0007v7-HA; Wed, 09 Aug 2023 23:49:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581531.910352; Wed, 09 Aug 2023 23:49:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvK-0007v0-Dt; Wed, 09 Aug 2023 23:49:06 +0000 Received: by outflank-mailman (input) for mailman id 581531; Wed, 09 Aug 2023 23:49:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvJ-0007up-4e for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvJ-00081T-3x for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsvJ-0004yA-3N for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=m+Bxv2DN+xUvVCLOEOQu7+7S4vSlRvNuQfPoEOVyRd0=; b=KEc6u65gDyAUmEqp9PIJx0UEFG +Naq6km+2mFvr4gOKpAPa+Lzscf/TNGE9DygHZqhW/6oAIjvi+nb8kW6UlJMw3sY42MzesxS/g7gY z3RBr7531c5XQlYG3r8lr/dtCuzb5H9X0xAd1y7LfzKI+egA/iDFZW9Ztl98CONqtXHk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Update hardware hints Message-Id: Date: Wed, 09 Aug 2023 23:49:05 +0000 commit 84c7cd4f2b1886eeea4b6dc2d0228b404858de3b Author: Andrew Cooper AuthorDate: Tue May 30 16:03:16 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Update hardware hints * Rename IBRS_ALL to EIBRS. EIBRS is the term that everyone knows, and this makes ARCH_CAPS_EIBRS match the X86_FEATURE_EIBRS form. * Print RRSBA too, which is also a hint about behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94200e1bae07e725cc07238c11569c5cab7befb7) --- xen/arch/x86/include/asm/msr-index.h | 2 +- xen/arch/x86/spec_ctrl.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index faae3244f5..36dad0662b 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -66,7 +66,7 @@ #define MSR_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_EIBRS (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 4bba5e8c29..2e94eded7f 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -421,10 +421,11 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", - (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", + (caps & ARCH_CAPS_RRSBA) ? " RRSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL" : "", (e8b & cpufeat_mask(X86_FEATURE_SSB_NO)) || (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "", -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581532.910355 (Exim 4.92) (envelope-from ) id 1qTsvU-0007xy-IK; Wed, 09 Aug 2023 23:49:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581532.910355; Wed, 09 Aug 2023 23:49:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvU-0007xq-FU; Wed, 09 Aug 2023 23:49:16 +0000 Received: by outflank-mailman (input) for mailman id 581532; Wed, 09 Aug 2023 23:49:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvT-0007xa-7Q for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvT-0008BT-6k for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:15 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsvT-0004yk-68 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qnZK66lRP+pnxVnKXRBCpFHFS9TVoGaGfE91oUVA5Uc=; b=1FyhyLbZ/qG46jvGaTs/1CBsMD GonyHZL9FCUk+F37Oz+eRg/uJ9BcJ/Scqr4LUJfEbUXB5woHIGdjIpJ32gbW3lljT1qN2z+01k/GS j/mRvKhF6YZRZY5FbhqSBE8crX6btFCWCynwbMMyDu48KkGXPnHASYxoMsCSXWIEXcsk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() Message-Id: Date: Wed, 09 Aug 2023 23:49:15 +0000 commit 63714f490560d1efd236e994d837229293fb1c40 Author: Andrew Cooper AuthorDate: Fri Mar 10 16:23:20 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() This is prep work, split out to simply the diff on the following change. * Split the INTEL check out of the IvyBridge RDRAND check, as the former will be reused. * Use asm/intel-family.h to remove a raw 0x3a model number. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 064f572f96f1558faae0a74cad616ba95ec8ff34) --- xen/arch/x86/cpu-policy.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index d76b544816..4ec3c2fb93 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -429,21 +430,24 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) static void __init guest_common_default_feature_adjustments(uint32_t *fs) { - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + } /* * On certain hardware, speculative or errata workarounds can result in -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581534.910359 (Exim 4.92) (envelope-from ) id 1qTsve-00081e-Lz; Wed, 09 Aug 2023 23:49:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581534.910359; Wed, 09 Aug 2023 23:49:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsve-00081W-JF; Wed, 09 Aug 2023 23:49:26 +0000 Received: by outflank-mailman (input) for mailman id 581534; Wed, 09 Aug 2023 23:49:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvd-00081I-AN for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvd-0008BX-9c for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:25 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsvd-0004zS-8z for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:25 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=B76/zMseEIAc+mgVH48B3J89mV8GLy+1AJ+uQMJt4D8=; b=M2w1TQqks1yM6nMBvtGCEVo3DO q33lX6sk7H9eM0TjpyQ6EWgjhdnh9H6FSgup3L9NXWu0fZwjm149auGvNOHZEGR2clyMJoc7RQCme Zef7zLvbx9Y43K8T0QG854vLDbT+NUtTdPRGR/wqq9hrlnvmj6+nzRC53hBzQUHHZM6k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Fix the rendering of FB_CLEAR Message-Id: Date: Wed, 09 Aug 2023 23:49:25 +0000 commit 8cc3a2069ba663285562615d8aa0c09c58d13681 Author: Andrew Cooper AuthorDate: Mon Jun 12 20:24:00 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Fix the rendering of FB_CLEAR FB_CLEAR is a read-only status bit, not a read-write control. Move it from "Hardware features" into "Hardware hints". Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 921afcbae843bb3f575a8f4a270b8e6cf471f4ca) --- xen/arch/x86/spec_ctrl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 2e94eded7f..d5f56d7436 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -421,7 +421,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -434,6 +434,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "", (caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "", (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", + (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", @@ -443,7 +444,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -459,7 +460,6 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); /* Compiled-in support which pertains to mitigations. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581535.910362 (Exim 4.92) (envelope-from ) id 1qTsvo-000841-NG; Wed, 09 Aug 2023 23:49:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581535.910362; Wed, 09 Aug 2023 23:49:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvo-00083u-Ki; Wed, 09 Aug 2023 23:49:36 +0000 Received: by outflank-mailman (input) for mailman id 581535; Wed, 09 Aug 2023 23:49:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvn-00083i-DT for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:35 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvn-0008Bd-Ch for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:35 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsvn-0004zs-C0 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:35 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Uuv4C4Rzixj6KLG58vghdtytulJkIXItra8oqs/fhuA=; b=hHPmMA0kuceegwKJfRNaIdhI6n aEtR6K5TADeEwxLgC2CCg20o/kBjFoiHT4kk3oj2fMIbapPV2I0b2bGzVGgcJEEC6cGf5KmM62L1w EVdVmnPytS039+E34af46LtoSfLcaPlD4Y875isrH4FEGK3doBFTZ/4tIY9nJ8K0HjhY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Message-Id: Date: Wed, 09 Aug 2023 23:49:35 +0000 commit 6cd399059f8a6024be99cb6c013ca5e9cf42ba56 Author: Andrew Cooper AuthorDate: Mon Jun 5 11:09:11 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Reword the comment for 'S' to include an incompatible set of features on the same core. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 3f63f4510422c29fda7ba238b880cbb53eca34fe) --- xen/arch/x86/spec_ctrl.c | 3 +++ xen/common/kernel.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index d5f56d7436..c75521d3a6 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1144,7 +1144,10 @@ void __init init_speculation_mitigations(void) if ( read_cr4() & X86_CR4_CET ) { if ( !has_spec_ctrl ) + { printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } else if ( opt_ibrs == -1 ) opt_ibrs = ibrs = true; diff --git a/xen/common/kernel.c b/xen/common/kernel.c index f8134d3e7a..0e8abe0cf8 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -339,7 +339,7 @@ unsigned int tainted; * 'H' - HVM forced emulation prefix is permitted. * 'M' - Machine had a machine check experience. * 'U' - Platform is unsecure (usually due to an errata on the platform). - * 'S' - Out of spec CPU (One core has a feature incompatible with others). + * 'S' - Out of spec CPU (Incompatible features on one or more cores). * * The string is overwritten by the next call to print_taint(). */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581536.910367 (Exim 4.92) (envelope-from ) id 1qTsvy-00086W-Ow; Wed, 09 Aug 2023 23:49:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581536.910367; Wed, 09 Aug 2023 23:49:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvy-00086P-MD; Wed, 09 Aug 2023 23:49:46 +0000 Received: by outflank-mailman (input) for mailman id 581536; Wed, 09 Aug 2023 23:49:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvx-00086F-GJ for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsvx-0008C0-Ff for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsvx-00050J-Eu for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EBYc1lx5btHeNIetLm3WULF9sj8Ai6mg8PAP/c1miAA=; b=Km+KEOZ8Jwf7T3PEbc3cQTHBph RmIGwJY+6p/sTjqhhQvxsLI51SqkhwI71YE5Ma+Qv+8ZrpnhD6E0Nihj1VpU35UlRiqc4BFnwOfx1 JhIBndTuT1TagI4vJxaPf99i1kbKkgxDxusngQIatou3myiE3xHAUtBZVq1Su1VW8IHs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() Message-Id: Date: Wed, 09 Aug 2023 23:49:45 +0000 commit d1e24450c617dfdc2d96683eab3dd924f3ac3fd3 Author: Andrew Cooper AuthorDate: Fri May 26 10:35:47 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() This is prep work, split out to simply the diff on the following change. * Rename to retpoline_calculations(), and call unconditionally. It is shortly going to synthesise missing enumerations required for guest safety. * For the model check switch statement, store the result in a variable and break rather than returning directly. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 724c0d94ff79b208312d30676392bfdd693403be) --- xen/arch/x86/spec_ctrl.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index c75521d3a6..a6fd2fe9f5 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -592,9 +592,10 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(void) +static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; + bool safe = false; if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; @@ -632,29 +633,31 @@ static bool __init retpoline_safe(void) case 0x3f: /* Haswell EX/EP */ case 0x45: /* Haswell D */ case 0x46: /* Haswell H */ - return true; + safe = true; + break; /* * Broadwell processors are retpoline-safe after specific microcode * versions. */ case 0x3d: /* Broadwell */ - return ucode_rev >= 0x2a; + safe = ucode_rev >= 0x2a; break; case 0x47: /* Broadwell H */ - return ucode_rev >= 0x1d; + safe = ucode_rev >= 0x1d; break; case 0x4f: /* Broadwell EP/EX */ - return ucode_rev >= 0xb000021; + safe = ucode_rev >= 0xb000021; break; case 0x56: /* Broadwell D */ switch ( boot_cpu_data.x86_mask ) { - case 2: return ucode_rev >= 0x15; - case 3: return ucode_rev >= 0x7000012; - case 4: return ucode_rev >= 0xf000011; - case 5: return ucode_rev >= 0xe000009; + case 2: safe = ucode_rev >= 0x15; break; + case 3: safe = ucode_rev >= 0x7000012; break; + case 4: safe = ucode_rev >= 0xf000011; break; + case 5: safe = ucode_rev >= 0xe000009; break; default: printk("Unrecognised CPU stepping %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_mask); - return false; + safe = false; + break; } break; @@ -668,7 +671,8 @@ static bool __init retpoline_safe(void) case 0x67: /* Cannonlake? */ case 0x8e: /* Kabylake M */ case 0x9e: /* Kabylake D */ - return false; + safe = false; + break; /* * Atom processors before Goldmont Plus/Gemini Lake are retpoline-safe. @@ -687,13 +691,17 @@ static bool __init retpoline_safe(void) case 0x5c: /* Goldmont */ case 0x5f: /* Denverton */ case 0x85: /* Knights Mill */ - return true; + safe = true; + break; default: printk("Unrecognised CPU model %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_model); - return false; + safe = false; + break; } + + return safe; } /* @@ -1126,7 +1134,7 @@ void __init init_speculation_mitigations(void) { enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; - bool cpu_has_bug_taa; + bool cpu_has_bug_taa, retpoline_safe; hw_smt_enabled = check_smt_enabled(); @@ -1155,6 +1163,9 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } + /* Determine if retpoline is safe on this CPU. */ + retpoline_safe = retpoline_calculations(); + /* * Has the user specified any custom BTI mitigations? If so, follow their * instructions exactly and disable all heuristics. @@ -1176,7 +1187,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe() ) + if ( retpoline_safe ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:49:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:49:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581537.910370 (Exim 4.92) (envelope-from ) id 1qTsw8-00089Y-QY; Wed, 09 Aug 2023 23:49:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581537.910370; Wed, 09 Aug 2023 23:49:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsw8-00089R-O5; Wed, 09 Aug 2023 23:49:56 +0000 Received: by outflank-mailman (input) for mailman id 581537; Wed, 09 Aug 2023 23:49:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsw7-00089D-JR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsw7-0008C9-Ii for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:55 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsw7-00050l-Ht for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:49:55 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cqN609818/yWOdY9SN8FmOcjl4l1zCphc/xy0IXH7zQ=; b=qBOx5uGbMJnn2oAmd3Bv34vrFg DWU0JXtB8X2XSl6Azlk6fDuFCRp3WDfn1hgPyAy66IPErit6EkwqkGecu7s0CxL6Cp+AdsFc04p8x ge9rA0L07kGnVgZETWxfJ4nXGCqK6u6bm+bpX9/EkAHYtC5IIY8o7dY4CRRAZCknbuUc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate Message-Id: Date: Wed, 09 Aug 2023 23:49:55 +0000 commit ea19f259bb7aa2a1719895cfba70806ad54b09c4 Author: Andrew Cooper AuthorDate: Thu May 25 20:31:22 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate In order to level a VM safely for migration, the toolstack needs to know the RSBA/RRSBA properties of the CPU, whether or not they happen to be enumerated. See the code comment for details. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 36525a964fb629d0bd26e5a1c42de467af7a42a7) --- xen/arch/x86/include/asm/cpufeature.h | 1 + xen/arch/x86/spec_ctrl.c | 100 ++++++++++++++++++++++++++++++++-- 2 files changed, 96 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 2460bc7e12..ec9456e1fd 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -155,6 +155,7 @@ #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) +#define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index a6fd2fe9f5..8f9500bc64 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -591,7 +591,10 @@ static bool __init check_smt_enabled(void) return false; } -/* Calculate whether Retpoline is known-safe on this CPU. */ +/* + * Calculate whether Retpoline is known-safe on this CPU. Fix up the + * RSBA/RRSBA bits as necessary. + */ static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -605,15 +608,93 @@ static bool __init retpoline_calculations(void) return false; /* - * RSBA may be set by a hypervisor to indicate that we may move to a - * processor which isn't retpoline-safe. + * The meaning of the RSBA and RRSBA bits have evolved over time. The + * agreed upon meaning at the time of writing (May 2023) is thus: + * + * - RSBA (RSB Alternative) means that an RSB may fall back to an + * alternative predictor on underflow. Skylake uarch and later all have + * this property. Broadwell too, when running microcode versions prior + * to Jan 2018. + * + * - All eIBRS-capable processors suffer RSBA, but eIBRS also introduces + * tagging of predictions with the mode in which they were learned. So + * when eIBRS is active, RSBA becomes RRSBA (Restricted RSBA). + * + * - CPUs are not expected to enumerate both RSBA and RRSBA. + * + * Some parts (Broadwell) are not expected to ever enumerate this + * behaviour directly. Other parts have differing enumeration with + * microcode version. Fix up Xen's idea, so we can advertise them safely + * to guests, and so toolstacks can level a VM safety for migration. + * + * The following states exist: + * + * | | RSBA | EIBRS | RRSBA | Notes | Action (in principle) | + * |---+------+-------+-------+--------------------+-----------------------| + * | 1 | 0 | 0 | 0 | OK (older parts) | Maybe +RSBA | + * | 2 | 0 | 0 | 1 | Broken | (+RSBA, -RRSBA) | + * | 3 | 0 | 1 | 0 | OK (pre-Aug ucode) | +RRSBA | + * | 4 | 0 | 1 | 1 | OK | | + * | 5 | 1 | 0 | 0 | OK | | + * | 6 | 1 | 0 | 1 | Broken | (-RRSBA) | + * | 7 | 1 | 1 | 0 | Broken | (-RSBA, +RRSBA) | + * | 8 | 1 | 1 | 1 | Broken | (-RSBA) | + * + * However, we don't need perfect adherence to the spec. We only need + * RSBA || RRSBA to indicate "alternative predictors potentially in use". + * Rows 1 & 3 are fixed up by later logic, as they're known configurations + * which exist in the world. * + * Complain loudly at the broken cases. They're safe for Xen to use (so we + * don't attempt to correct), and may or may not exist in reality, but if + * we ever encounter them in practice, something is wrong and needs + * further investigation. + */ + if ( cpu_has_eibrs ? cpu_has_rsba /* Rows 7, 8 */ + : cpu_has_rrsba /* Rows 2, 6 */ ) + { + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: RSBA %u, EIBRS %u, RRSBA %u\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, ucode_rev, + cpu_has_rsba, cpu_has_eibrs, cpu_has_rrsba); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + /* * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( cpu_has_rsba || cpu_has_eibrs ) + if ( cpu_has_eibrs ) + { + /* + * Prior to the August 2023 microcode, many eIBRS-capable parts did + * not enumerate RRSBA. + */ + if ( !cpu_has_rrsba ) + setup_force_cpu_cap(X86_FEATURE_RRSBA); + + return false; + } + + /* + * RSBA is explicitly enumerated in some cases, but may also be set by a + * hypervisor to indicate that we may move to a processor which isn't + * retpoline-safe. + */ + if ( cpu_has_rsba ) return false; + /* + * At this point, we've filtered all the legal RSBA || RRSBA cases (or the + * known non-ideal cases). If ARCH_CAPS is visible, trust the absence of + * RSBA || RRSBA. There's no known microcode which advertises ARCH_CAPS + * without RSBA or EIBRS, and if we're virtualised we can't rely the model + * check anyway. + */ + if ( cpu_has_arch_caps ) + return true; + switch ( boot_cpu_data.x86_model ) { case 0x17: /* Penryn */ @@ -701,6 +782,15 @@ static bool __init retpoline_calculations(void) break; } + if ( !safe ) + { + /* + * Note: the eIBRS-capable parts are filtered out earlier, so the + * remainder here are the ones which suffer RSBA behaviour. + */ + setup_force_cpu_cap(X86_FEATURE_RSBA); + } + return safe; } @@ -1163,7 +1253,7 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } - /* Determine if retpoline is safe on this CPU. */ + /* Determine if retpoline is safe on this CPU. Fix up RSBA/RRSBA enumerations. */ retpoline_safe = retpoline_calculations(); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581538.910375 (Exim 4.92) (envelope-from ) id 1qTswI-0000XV-TG; Wed, 09 Aug 2023 23:50:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581538.910375; Wed, 09 Aug 2023 23:50:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswI-0000XO-PX; Wed, 09 Aug 2023 23:50:06 +0000 Received: by outflank-mailman (input) for mailman id 581538; Wed, 09 Aug 2023 23:50:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswH-0000SV-MW for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswH-0008CW-Lj for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTswH-00051M-L0 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aD+XsJFyvF78++VH//VwUAInETMpDkKEont1LLDwjJs=; b=n3HfPeoXA+/bJSkPhAH6e60jIm RGxZ3UCJpIXQDIubVm6UvQlPGg5AQX+aIUE4QbpdkqOA/UI6Zvq1gdgMwtxARLrx+bWAyDJeggi+E caOtY6czB+4eROwBn1OvYiB8QqKWlGZmtceWfoKUG+Fq1CZR5nkWO8Un0RLdFDAzJpRY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: Derive RSBA/RRSBA for guest policies Message-Id: Date: Wed, 09 Aug 2023 23:50:05 +0000 commit 73afd7df66914764da1ab048e2f9a8f91815d972 Author: Andrew Cooper AuthorDate: Wed May 24 15:41:21 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: Derive RSBA/RRSBA for guest policies The RSBA bit, "RSB Alternative", means that the RSB may use alternative predictors when empty. From a practical point of view, this mean "Retpoline not safe". Enhanced IBRS (officially IBRS_ALL in Intel's docs, previously IBRS_ATT) is a statement that IBRS is implemented in hardware (as opposed to the form retrofitted to existing CPUs in microcode). The RRSBA bit, "Restricted-RSBA", is a combination of RSBA, and the eIBRS property that predictions are tagged with the mode in which they were learnt. Therefore, it means "when eIBRS is active, the RSB may fall back to alternative predictors but restricted to the current prediction mode". As such, it's stronger statement than RSBA, but still means "Retpoline not safe". CPUs are not expected to enumerate both RSBA and RRSBA. Add feature dependencies for EIBRS and RRSBA. While technically they're not linked, absolutely nothing good can come of letting the guest see RRSBA without EIBRS. Nor a guest seeing EIBRS without IBRSB. Furthermore, we use this dependency to simplify the max derivation logic. The max policies gets RSBA and RRSBA unconditionally set (with the EIBRS dependency maybe hiding RRSBA). We can run any VM, even if it has been told "somewhere you might run, Retpoline isn't safe". The default policies are more complicated. A guest shouldn't see both bits, but it needs to see one if the current host suffers from any form of RSBA, and which bit it needs to see depends on whether eIBRS is visible or not. Therefore, the calculation must be performed after sanitise_featureset(). Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit e0586a4ff514590eec50185e2440b97f9a31cb7f) --- xen/arch/x86/cpu-policy.c | 39 +++++++++++++++++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 4 +-- xen/tools/gen-cpuid.py | 5 +++- 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 4ec3c2fb93..55524e28e1 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -423,8 +423,17 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) * Retpoline not safe)", so these need to be visible to a guest in all * cases, even when it's only some other server in the pool which * suffers the identified behaviour. + * + * We can always run any VM which has previously (or will + * subsequently) run on hardware where Retpoline is not safe. + * Note: + * - The dependency logic may hide RRSBA for other reasons. + * - The max policy does not constitute a sensible configuration to + * run a guest in. */ __set_bit(X86_FEATURE_ARCH_CAPS, fs); + __set_bit(X86_FEATURE_RSBA, fs); + __set_bit(X86_FEATURE_RRSBA, fs); } } @@ -532,6 +541,21 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } @@ -649,6 +673,21 @@ static void __init calculate_hvm_def_policy(void) __set_bit(X86_FEATURE_VIRT_SSBD, fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 02a80b0c0c..fe01dc231e 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -303,7 +303,7 @@ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks s /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ -XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*! RSB Alternative (Retpoline not safe) */ XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ @@ -319,7 +319,7 @@ XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Prop XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ -XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*! Restricted RSB Alternative */ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 72497b3cb0..8a7516ae0f 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -318,7 +318,7 @@ def crunch_numbers(state): # IBRSB/IBRS, and we pass this MSR directly to guests. Treating them # as dependent features simplifies Xen's logic, and prevents the guest # from seeing implausible configurations. - IBRSB: [STIBP, SSBD, INTEL_PSFD], + IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], AMD_STIBP: [STIBP_ALWAYS], @@ -328,6 +328,9 @@ def crunch_numbers(state): # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), + + # The behaviour described by RRSBA depend on eIBRS being active. + EIBRS: [RRSBA], } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581539.910379 (Exim 4.92) (envelope-from ) id 1qTswS-0000fW-WC; Wed, 09 Aug 2023 23:50:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581539.910379; Wed, 09 Aug 2023 23:50:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswS-0000fN-TM; Wed, 09 Aug 2023 23:50:16 +0000 Received: by outflank-mailman (input) for mailman id 581539; Wed, 09 Aug 2023 23:50:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswR-0000fF-QA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswR-0008Ce-PI for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:15 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTswR-00051n-OO for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wNJwhg6u8f1lJ/eadzFBh7s8R99Zob9NbaCrA6LgJTA=; b=CdTgIYQmM40003e6uQSWUg8dDv sjZrcQrCFeUITd57/oGbnMRb2fZ7lHNdii5cauQLBKefMViZ4U9eFHRVQH2RtX+VBYxf1CVYYNe5n ObuEBs6IRqO1ZRbKPzSxne5rYMZ6VMFnC0PK3lUl9pAEBKYlT4Ur1pETxVfdxFzknPio=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libs/guest: introduce support for setting guest MSRs Message-Id: Date: Wed, 09 Aug 2023 23:50:15 +0000 commit 1a76ff3b661f2f88a418394f12b66cb59c5ab855 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:53 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libs/guest: introduce support for setting guest MSRs Like it's done with CPUID, introduce support for passing MSR values to xc_cpuid_apply_policy(). The chosen format for expressing MSR policy data matches the current one used for CPUID. Note that existing callers of xc_cpuid_apply_policy() can pass NULL as the value for the newly introduced 'msr' parameter in order to preserve the same functionality, and in fact that's done in libxl on this patch. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit ed742cf1b65c822759833027ca5cbb087c506a41) --- tools/include/xenctrl.h | 21 ++++- tools/libs/guest/xg_cpuid_x86.c | 170 +++++++++++++++++++++++++++++++++++++++- tools/libs/light/libxl_cpuid.c | 2 +- 3 files changed, 189 insertions(+), 4 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 23037874d3..d4f3679aeb 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1833,6 +1833,21 @@ struct xc_xend_cpuid { char *policy[4]; }; +/* + * MSR policy data. + * + * The format of the policy string is the following: + * '1' -> force to 1 + * '0' -> force to 0 + * 'x' -> we don't care (use default) + * 'k' -> pass through host value + */ +struct xc_msr { + uint32_t index; + char policy[65]; +}; +#define XC_MSR_INPUT_UNUSED 0xffffffffu + /* * Make adjustments to the CPUID settings for a domain. * @@ -1844,13 +1859,15 @@ struct xc_xend_cpuid { * Either pass a full new @featureset (and @nr_features), or adjust individual * features (@pae, @itsc, @nested_virt). * - * Then (optionally) apply legacy XEND overrides (@xend) to the result. + * Then (optionally) apply legacy XEND CPUID overrides (@xend) or MSR (@msr) + * to the result. */ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, - bool nested_virt, const struct xc_xend_cpuid *xend); + bool nested_virt, const struct xc_xend_cpuid *xend, + const struct xc_msr *msr); int xc_mca_op(xc_interface *xch, struct xen_mc *mc); int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags, xc_cpumap_t cpumap, unsigned int nr_cpus); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 5d658534ef..0c7d162da6 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -422,10 +422,171 @@ static int xc_cpuid_xend_policy( return rc; } +static int compare_msr(const void *l, const void *r) +{ + const xen_msr_entry_t *lhs = l; + const xen_msr_entry_t *rhs = r; + + if ( lhs->idx == rhs->idx ) + return 0; + + return lhs->idx < rhs->idx ? -1 : 1; +} + +static xen_msr_entry_t *find_msr( + xen_msr_entry_t *msrs, unsigned int nr_msrs, + uint32_t index) +{ + const xen_msr_entry_t key = { .idx = index }; + + return bsearch(&key, msrs, nr_msrs, sizeof(*msrs), compare_msr); +} + + +static int xc_msr_policy(xc_interface *xch, domid_t domid, + const struct xc_msr *msr) +{ + int rc; + bool hvm; + xc_dominfo_t di; + unsigned int nr_leaves, nr_msrs; + uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; + /* + * Three full policies. The host, default for the domain type, + * and domain current. + */ + xen_msr_entry_t *host = NULL, *def = NULL, *cur = NULL; + unsigned int nr_host, nr_def, nr_cur; + + if ( xc_domain_getinfo(xch, domid, 1, &di) != 1 || + di.domid != domid ) + { + ERROR("Failed to obtain d%d info", domid); + rc = -ESRCH; + goto out; + } + hvm = di.hvm; + + rc = xc_cpu_policy_get_size(xch, &nr_leaves, &nr_msrs); + if ( rc ) + { + PERROR("Failed to obtain policy info size"); + rc = -errno; + goto out; + } + + if ( (host = calloc(nr_msrs, sizeof(*host))) == NULL || + (def = calloc(nr_msrs, sizeof(*def))) == NULL || + (cur = calloc(nr_msrs, sizeof(*cur))) == NULL ) + { + ERROR("Unable to allocate memory for %u CPUID leaves", nr_leaves); + rc = -ENOMEM; + goto out; + } + + /* Get the domain's current policy. */ + nr_leaves = 0; + nr_cur = nr_msrs; + rc = get_domain_cpu_policy(xch, domid, &nr_leaves, NULL, &nr_cur, cur); + if ( rc ) + { + PERROR("Failed to obtain d%d current policy", domid); + rc = -errno; + goto out; + } + + /* Get the domain type's default policy. */ + nr_leaves = 0; + nr_def = nr_msrs; + rc = get_system_cpu_policy(xch, hvm ? XEN_SYSCTL_cpu_policy_hvm_default + : XEN_SYSCTL_cpu_policy_pv_default, + &nr_leaves, NULL, &nr_def, def); + if ( rc ) + { + PERROR("Failed to obtain %s def policy", hvm ? "hvm" : "pv"); + rc = -errno; + goto out; + } + + /* Get the host policy. */ + nr_leaves = 0; + nr_host = nr_msrs; + rc = get_system_cpu_policy(xch, XEN_SYSCTL_cpu_policy_host, + &nr_leaves, NULL, &nr_host, host); + if ( rc ) + { + PERROR("Failed to obtain host policy"); + rc = -errno; + goto out; + } + + for ( ; msr->index != XC_MSR_INPUT_UNUSED; ++msr ) + { + xen_msr_entry_t *cur_msr = find_msr(cur, nr_cur, msr->index); + const xen_msr_entry_t *def_msr = find_msr(def, nr_def, msr->index); + const xen_msr_entry_t *host_msr = find_msr(host, nr_host, msr->index); + unsigned int i; + + if ( cur_msr == NULL || def_msr == NULL || host_msr == NULL ) + { + ERROR("Missing MSR %#x", msr->index); + rc = -ENOENT; + goto out; + } + + for ( i = 0; i < ARRAY_SIZE(msr->policy) - 1; i++ ) + { + bool val; + + if ( msr->policy[i] == '1' ) + val = true; + else if ( msr->policy[i] == '0' ) + val = false; + else if ( msr->policy[i] == 'x' ) + val = test_bit(63 - i, &def_msr->val); + else if ( msr->policy[i] == 'k' ) + val = test_bit(63 - i, &host_msr->val); + else + { + ERROR("MSR index %#x: bad character '%c' in policy string '%s'", + msr->index, msr->policy[i], msr->policy); + rc = -EINVAL; + goto out; + } + + if ( val ) + set_bit(63 - i, &cur_msr->val); + else + clear_bit(63 - i, &cur_msr->val); + } + } + + /* Feed the transformed policy back up to Xen. */ + rc = xc_set_domain_cpu_policy(xch, domid, 0, NULL, nr_cur, cur, + &err_leaf, &err_subleaf, &err_msr); + if ( rc ) + { + PERROR("Failed to set d%d's policy (err leaf %#x, subleaf %#x, msr %#x)", + domid, err_leaf, err_subleaf, err_msr); + rc = -errno; + goto out; + } + + /* Success! */ + + out: + free(cur); + free(def); + free(host); + + return rc; +} + int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, bool nested_virt, - const struct xc_xend_cpuid *xend) + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr) { int rc; xc_dominfo_t di; @@ -666,6 +827,13 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, if ( xend && (rc = xc_cpuid_xend_policy(xch, domid, xend)) ) goto out; + if ( msr ) + { + rc = xc_msr_policy(xch, domid, msr); + if ( rc ) + goto out; + } + rc = 0; out: diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 55cfbc8f23..11db0987ba 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -494,7 +494,7 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid); + pae, itsc, nested_virt, info->cpuid, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:28 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581540.910384 (Exim 4.92) (envelope-from ) id 1qTswe-0000i9-2A; Wed, 09 Aug 2023 23:50:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581540.910384; Wed, 09 Aug 2023 23:50:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswd-0000i1-Uy; Wed, 09 Aug 2023 23:50:27 +0000 Received: by outflank-mailman (input) for mailman id 581540; Wed, 09 Aug 2023 23:50:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswb-0000hr-Ui for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswb-0008Cp-U3 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:25 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTswb-00052I-Ru for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:25 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=h9Z2zWv3UM0ApCp99lZdqO9tIwWDKP81bM550jXRJZU=; b=EiPgknSqQrdjtjzjy3g4VRwK9Z W7ZUrr4LQVQzw2AKdFlYxhgCYrtQthctBAdSYYZSXAt6D4RaWPnegelETnhgzZQ0ZLhpq2TeWFSmG XiHGOGCWdT3lzIl9IvC5vThKI0+NKq6xsyhmZpRTY3LAy5aMnfnJvDCxyhTDKjzsiZvM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: change the type of libxl_cpuid_policy_list Message-Id: Date: Wed, 09 Aug 2023 23:50:25 +0000 commit 79c9c822441fe6c13b0978ac654f900053c71dc4 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:54 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: change the type of libxl_cpuid_policy_list Currently libxl_cpuid_policy_list is an opaque type to the users of libxl, and internally it's an array of xc_xend_cpuid objects. Change the type to instead be a structure that contains one array for CPUID policies, in preparation for it also holding another array for MSR policies. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 4825d19603580949144ac2ac5cb22df75c9da954) --- tools/include/libxl.h | 8 +--- tools/libs/light/libxl_cpuid.c | 87 +++++++++++++++++++++++++-------------- tools/libs/light/libxl_internal.h | 4 ++ 3 files changed, 63 insertions(+), 36 deletions(-) diff --git a/tools/include/libxl.h b/tools/include/libxl.h index d652895075..2eeb22fde9 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -1434,12 +1434,8 @@ typedef struct { void libxl_bitmap_init(libxl_bitmap *map); void libxl_bitmap_dispose(libxl_bitmap *map); -/* - * libxl_cpuid_policy is opaque in the libxl ABI. Users of both libxl and - * libxc may not make assumptions about xc_xend_cpuid. - */ -typedef struct xc_xend_cpuid libxl_cpuid_policy; -typedef libxl_cpuid_policy * libxl_cpuid_policy_list; +struct libxl__cpu_policy; +typedef struct libxl__cpu_policy *libxl_cpuid_policy_list; void libxl_cpuid_dispose(libxl_cpuid_policy_list *cpuid_list); int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *l); void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 11db0987ba..8eee7b1809 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -19,22 +19,29 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) return !libxl_cpuid_policy_list_length(pl); } -void libxl_cpuid_dispose(libxl_cpuid_policy_list *p_cpuid_list) +void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) { - int i, j; - libxl_cpuid_policy_list cpuid_list = *p_cpuid_list; + libxl_cpuid_policy_list policy = *pl; - if (cpuid_list == NULL) + if (policy == NULL) return; - for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { - for (j = 0; j < 4; j++) - if (cpuid_list[i].policy[j] != NULL) { - free(cpuid_list[i].policy[j]); - cpuid_list[i].policy[j] = NULL; + + if (policy->cpuid) { + unsigned int i, j; + struct xc_xend_cpuid *cpuid_list = policy->cpuid; + + for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { + for (j = 0; j < 4; j++) { + if (cpuid_list[i].policy[j] != NULL) { + free(cpuid_list[i].policy[j]); + } } + } + free(policy->cpuid); } - free(cpuid_list); - *p_cpuid_list = NULL; + + free(policy); + *pl = NULL; return; } @@ -62,11 +69,17 @@ struct cpuid_flags { /* go through the dynamic array finding the entry for a specified leaf. * if no entry exists, allocate one and return that. */ -static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, - uint32_t leaf, uint32_t subleaf) +static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, + uint32_t leaf, uint32_t subleaf) { + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid **list; int i = 0; + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + list = &policy->cpuid; if (*list != NULL) { for (i = 0; (*list)[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { if ((*list)[i].input[0] == leaf && (*list)[i].input[1] == subleaf) @@ -86,7 +99,7 @@ static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, * Will overwrite earlier entries and thus can be called multiple * times. */ -int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) +int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { #define NA XEN_CPUID_INPUT_UNUSED static const struct cpuid_flags cpuid_flags[] = { @@ -337,7 +350,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) if (flag->name == NULL) { return 2; } - entry = cpuid_find_match(cpuid, flag->leaf, flag->subleaf); + entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); resstr = entry->policy[flag->reg - 1]; num = strtoull(val, &endptr, 0); flags[flag->length] = 0; @@ -392,7 +405,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) * the strings for each register were directly exposed to the user. * Used for maintaining compatibility with older config files */ -int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, +int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; @@ -419,7 +432,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 3; } str = endptr + 1; - entry = cpuid_find_match(cpuid, leaf, subleaf); + entry = cpuid_find_match(policy, leaf, subleaf); for (str = endptr + 1; *str != 0;) { if (str[0] != 'e' || str[2] != 'x') { return 4; @@ -494,7 +507,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid, NULL); + pae, itsc, nested_virt, + info->cpuid ? info->cpuid->cpuid : NULL, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -519,16 +533,18 @@ static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, - libxl_cpuid_policy_list *pcpuid) + libxl_cpuid_policy_list *pl) { - libxl_cpuid_policy_list cpuid = *pcpuid; + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid *cpuid; yajl_gen_status s; int i, j; s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; - if (cpuid == NULL) goto empty; + if (policy == NULL || policy->cpuid == NULL) goto empty; + cpuid = policy->cpuid; for (i = 0; cpuid[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { s = yajl_gen_map_open(hand); @@ -567,7 +583,7 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl_cpuid_policy_list *p) { int i, size; - libxl_cpuid_policy_list l; + struct xc_xend_cpuid *l; flexarray_t *array; if (!libxl__json_object_is_array(o)) @@ -578,8 +594,10 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, return 0; size = array->count; + *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ - l = *p = libxl__calloc(NOGC, size + 1, sizeof(libxl_cpuid_policy)); + l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, + sizeof(struct xc_xend_cpuid)); l[size].input[0] = XEN_CPUID_INPUT_UNUSED; l[size].input[1] = XEN_CPUID_INPUT_UNUSED; @@ -622,8 +640,12 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) { int i = 0; - libxl_cpuid_policy_list l = *pl; + const struct xc_xend_cpuid *l; + + if (*pl == NULL) + return 0; + l = (*pl)->cpuid; if (l) { while (l[i].input[0] != XEN_CPUID_INPUT_UNUSED) i++; @@ -633,20 +655,25 @@ int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) } void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, - libxl_cpuid_policy_list *dst, - const libxl_cpuid_policy_list *src) + libxl_cpuid_policy_list *pdst, + const libxl_cpuid_policy_list *psrc) { + struct xc_xend_cpuid **dst; + struct xc_xend_cpuid *const *src; GC_INIT(ctx); int i, j, len; - if (*src == NULL) { - *dst = NULL; + if (*psrc == NULL) { + *pdst = NULL; goto out; } - len = libxl_cpuid_policy_list_length(src); + *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + dst = &(*pdst)->cpuid; + src = &(*psrc)->cpuid; + len = libxl_cpuid_policy_list_length(psrc); /* one extra slot for sentinel */ - *dst = libxl__calloc(NOGC, len + 1, sizeof(libxl_cpuid_policy)); + *dst = libxl__calloc(NOGC, len + 1, sizeof(struct xc_xend_cpuid)); (*dst)[len].input[0] = XEN_CPUID_INPUT_UNUSED; (*dst)[len].input[1] = XEN_CPUID_INPUT_UNUSED; diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index cae160351f..a0a0348546 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4868,6 +4868,10 @@ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t suid); _hidden int libxl__domain_set_paging_mempool_size( libxl__gc *gc, libxl_domain_config *d_config, uint32_t domid); +struct libxl__cpu_policy { + struct xc_xend_cpuid *cpuid; +}; + #endif /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:38 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581541.910387 (Exim 4.92) (envelope-from ) id 1qTswo-0000l4-3Z; Wed, 09 Aug 2023 23:50:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581541.910387; Wed, 09 Aug 2023 23:50:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswo-0000kw-0L; Wed, 09 Aug 2023 23:50:38 +0000 Received: by outflank-mailman (input) for mailman id 581541; Wed, 09 Aug 2023 23:50:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTswm-0000kb-22 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: introduce MSR data in libxl_cpuid_policy Message-Id: Date: Wed, 09 Aug 2023 23:50:36 +0000 commit 48a0a355b0b9fed253e01ada59443c32a3bbc23f Author: Roger Pau Monne AuthorDate: Wed Jul 26 09:47:53 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: introduce MSR data in libxl_cpuid_policy Add a new array field to libxl_cpuid_policy in order to store the MSR policies. Adding the MSR data in the libxl_cpuid_policy_list type is done so that existing users can seamlessly pass MSR features as part of the CPUID data, without requiring the introduction of a separate domain_build_info field, and a new set of handlers functions. Note that support for parsing the old JSON format is kept, as that's required in order to restore domains or received migrations from previous tool versions. Differentiation between the old and the new formats is done based on whether the contents of the 'cpuid' field is an array or a map JSON object. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 5b80cecb747b2176b9e85f6e7aa7be83416d77e1) --- tools/libs/light/libxl_cpuid.c | 160 ++++++++++++++++++++++++++++++++++---- tools/libs/light/libxl_internal.h | 1 + tools/libs/light/libxl_types.idl | 2 +- 3 files changed, 146 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 8eee7b1809..6af8023f19 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -16,7 +16,7 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { - return !libxl_cpuid_policy_list_length(pl); + return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); } void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) @@ -40,6 +40,8 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) free(policy->cpuid); } + free(policy->msr); + free(policy); *pl = NULL; return; @@ -508,7 +510,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, itsc, nested_virt, - info->cpuid ? info->cpuid->cpuid : NULL, NULL); + info->cpuid ? info->cpuid->cpuid : NULL, + info->cpuid ? info->cpuid->msr : NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -520,16 +523,22 @@ static const char *input_names[2] = { "leaf", "subleaf" }; static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; /* * Aiming for: - * [ - * { 'leaf': 'val-eax', - * 'subleaf': 'val-ecx', - * 'eax': 'filter', - * 'ebx': 'filter', - * 'ecx': 'filter', - * 'edx': 'filter' }, - * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, - * ... etc ... - * ] + * { 'cpuid': [ + * { 'leaf': 'val-eax', + * 'subleaf': 'val-ecx', + * 'eax': 'filter', + * 'ebx': 'filter', + * 'ecx': 'filter', + * 'edx': 'filter' }, + * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, + * ... etc ... + * ], + * 'msr': [ + * { 'index': 'val-index', + * 'policy': 'filter', }, + * ... etc ... + * ], + * } */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, @@ -537,9 +546,16 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, { libxl_cpuid_policy_list policy = *pl; struct xc_xend_cpuid *cpuid; + const struct xc_msr *msr; yajl_gen_status s; int i, j; + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "cpuid"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; @@ -574,6 +590,39 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, empty: s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "msr"); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_array_open(hand); + if (s != yajl_gen_status_ok) goto out; + + if (!policy || !policy->msr) goto done; + msr = policy->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "index"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_integer(hand, msr[i].index); + if (s != yajl_gen_status_ok) goto out; + s = libxl__yajl_gen_asciiz(hand, "policy"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_string(hand, + (const unsigned char *)msr[i].policy, 64); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_map_close(hand); + if (s != yajl_gen_status_ok) goto out; + } + +done: + s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_map_close(hand); out: return s; } @@ -584,17 +633,40 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, { int i, size; struct xc_xend_cpuid *l; + struct xc_msr *msr; + const libxl__json_object *co; flexarray_t *array; + bool cpuid_only = false; + + /* + * Old JSON field was an array with just the CPUID data. With the addition + * of MSRs the object is now a map with two array fields. + * + * Use the object format to detect whether the passed data contains just + * CPUID leafs and thus is an array, or does also contain MSRs and is a + * map. + */ + if (libxl__json_object_is_array(o)) { + co = o; + cpuid_only = true; + goto parse_cpuid; + } - if (!libxl__json_object_is_array(o)) + if (!libxl__json_object_is_map(o)) return ERROR_FAIL; - array = libxl__json_object_get_array(o); + co = libxl__json_map_get("cpuid", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + +parse_cpuid: + *p = libxl__calloc(NOGC, 1, sizeof(**p)); + + array = libxl__json_object_get_array(co); if (!array->count) - return 0; + goto cpuid_empty; size = array->count; - *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, sizeof(struct xc_xend_cpuid)); @@ -633,6 +705,42 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + if (cpuid_only) + return 0; + +cpuid_empty: + co = libxl__json_map_get("msr", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + + array = libxl__json_object_get_array(co); + if (!array->count) + return 0; + size = array->count; + /* need one extra slot as sentinel */ + msr = (*p)->msr = libxl__calloc(NOGC, size + 1, sizeof(struct xc_msr)); + + msr[size].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < size; i++) { + const libxl__json_object *t, *r; + + if (flexarray_get(array, i, (void**)&t) != 0) + return ERROR_FAIL; + + if (!libxl__json_object_is_map(t)) + return ERROR_FAIL; + + r = libxl__json_map_get("index", t, JSON_INTEGER); + if (!r) return ERROR_FAIL; + msr[i].index = libxl__json_object_get_integer(r); + r = libxl__json_map_get("policy", t, JSON_STRING); + if (!r) return ERROR_FAIL; + if (strlen(libxl__json_object_get_string(r)) != + ARRAY_SIZE(msr[i].policy) - 1) + return ERROR_FAIL; + strcpy(msr[i].policy, libxl__json_object_get_string(r)); + } return 0; } @@ -669,6 +777,10 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, } *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + + if (!(*psrc)->cpuid) + goto copy_msr; + dst = &(*pdst)->cpuid; src = &(*psrc)->cpuid; len = libxl_cpuid_policy_list_length(psrc); @@ -688,6 +800,22 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, (*dst)[i].policy[j] = NULL; } +copy_msr: + if ((*psrc)->msr) { + const struct xc_msr *msr = (*psrc)->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) + ; + len = i; + (*pdst)->msr = libxl__calloc(NOGC, len + 1, sizeof(struct xc_msr)); + (*pdst)->msr[len].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < len; i++) { + (*pdst)->msr[i].index = msr[i].index; + strcpy((*pdst)->msr[i].policy, msr[i].policy); + } + } + out: GC_FREE; } diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index a0a0348546..7ad38de30e 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4870,6 +4870,7 @@ _hidden int libxl__domain_set_paging_mempool_size( struct libxl__cpu_policy { struct xc_xend_cpuid *cpuid; + struct xc_msr *msr; }; #endif diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index 9e3d33cb5a..82328b1414 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -19,7 +19,7 @@ libxl_mac = Builtin("mac", json_parse_type="JSON_STRING", passby=PASS_BY_REFEREN libxl_bitmap = Builtin("bitmap", json_parse_type="JSON_ARRAY", dispose_fn="libxl_bitmap_dispose", passby=PASS_BY_REFERENCE, check_default_fn="libxl_bitmap_is_empty", copy_fn="libxl_bitmap_copy_alloc") libxl_cpuid_policy_list = Builtin("cpuid_policy_list", dispose_fn="libxl_cpuid_dispose", passby=PASS_BY_REFERENCE, - json_parse_type="JSON_ARRAY", check_default_fn="libxl__cpuid_policy_is_empty", + json_parse_type="JSON_ANY", check_default_fn="libxl__cpuid_policy_is_empty", copy_fn="libxl_cpuid_policy_list_copy") libxl_string_list = Builtin("string_list", dispose_fn="libxl_string_list_dispose", passby=PASS_BY_REFERENCE, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:48 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581542.910391 (Exim 4.92) (envelope-from ) id 1qTswy-0000oF-65; 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Wed, 09 Aug 2023 23:50:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lmxlG6lIR3cmkvtnUcfDi4lqA7z6yjofbwDhngAct8s=; b=3RXnfS5mL3AwaLlSzF4SekRPk9 HemzwcD8nHOZRXILRNVpNfmUpqAM07Q/9REVeQup5RJS+9MXUArFp8lIqNGyQX1bLT7DXrPACK4dw HGdD9Bo2V+TUBG7/kd6WokzVYmLhL0Whtaqx3kiWQCjUMBempS7VfsvtGxdRkfocWwYM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: split logic to parse user provided CPUID features Message-Id: Date: Wed, 09 Aug 2023 23:50:46 +0000 commit a27d2bfb5c02e0ae6b9164077f53465c79cf7447 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:56 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: split logic to parse user provided CPUID features Move the CPUID value parsers out of libxl_cpuid_parse_config() into a newly created cpuid_add() local helper. This is in preparation for also adding MSR feature parsing support. No functional change intended. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit e2b1da9b8fda0ed7d3dca7bd15829cfea496973a) --- tools/libs/light/libxl_cpuid.c | 120 +++++++++++++++++++++-------------------- 1 file changed, 63 insertions(+), 57 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 6af8023f19..8b054e3a71 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -96,6 +96,66 @@ static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, return *list + i; } +static int cpuid_add(libxl_cpuid_policy_list *policy, + const struct cpuid_flags *flag, const char *val) +{ + struct xc_xend_cpuid *entry = cpuid_find_match(policy, flag->leaf, + flag->subleaf); + unsigned long num; + char flags[33], *resstr, *endptr; + unsigned int i; + + resstr = entry->policy[flag->reg - 1]; + num = strtoul(val, &endptr, 0); + flags[flag->length] = 0; + if (endptr != val) { + /* if this was a valid number, write the binary form into the string */ + for (i = 0; i < flag->length; i++) { + flags[flag->length - 1 - i] = "01"[(num >> i) & 1]; + } + } else { + switch(val[0]) { + case 'x': case 'k': case 's': + memset(flags, val[0], flag->length); + break; + default: + return 3; + } + } + + if (resstr == NULL) { + resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + } + + /* the family and model entry is potentially split up across + * two fields in Fn0000_0001_EAX, so handle them here separately. + */ + if (!strcmp(flag->name, "family")) { + if (num < 16) { + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + memcpy(resstr + (32 - 8) - 20, "00000000", 8); + } else { + num -= 15; + memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); + for (i = 0; i < 7; i++) { + flags[7 - i] = "01"[num & 1]; + num >>= 1; + } + memcpy(resstr + (32 - 8) - 20, flags, 8); + } + } else if (!strcmp(flag->name, "model")) { + memcpy(resstr + (32 - 4) - 16, flags, 4); + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + } else { + memcpy(resstr + (32 - flag->length) - flag->bit, flags, + flag->length); + } + entry->policy[flag->reg - 1] = resstr; + + return 0; + +} + /* parse a single key=value pair and translate it into the libxc * used interface using 32-characters strings for each register. * Will overwrite earlier entries and thus can be called multiple @@ -332,12 +392,8 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; #undef NA - char *sep, *val, *endptr; - int i; + const char *sep, *val; const struct cpuid_flags *flag; - struct xc_xend_cpuid *entry; - unsigned long num; - char flags[33], *resstr; sep = strchr(str, '='); if (sep == NULL) { @@ -347,60 +403,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } for (flag = cpuid_flags; flag->name != NULL; flag++) { if(!strncmp(str, flag->name, sep - str) && flag->name[sep - str] == 0) - break; - } - if (flag->name == NULL) { - return 2; - } - entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); - resstr = entry->policy[flag->reg - 1]; - num = strtoull(val, &endptr, 0); - flags[flag->length] = 0; - if (endptr != val) { - /* if this was a valid number, write the binary form into the string */ - for (i = 0; i < flag->length; i++) { - flags[flag->length - 1 - i] = "01"[!!(num & (1 << i))]; - } - } else { - switch(val[0]) { - case 'x': case 'k': case 's': - memset(flags, val[0], flag->length); - break; - default: - return 3; - } - } - - if (resstr == NULL) { - resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + return cpuid_add(policy, flag, val); } - /* the family and model entry is potentially split up across - * two fields in Fn0000_0001_EAX, so handle them here separately. - */ - if (!strncmp(str, "family", sep - str)) { - if (num < 16) { - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - memcpy(resstr + (32 - 8) - 20, "00000000", 8); - } else { - num -= 15; - memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); - for (i = 0; i < 7; i++) { - flags[7 - i] = "01"[num & 1]; - num >>= 1; - } - memcpy(resstr + (32 - 8) - 20, flags, 8); - } - } else if (!strncmp(str, "model", sep - str)) { - memcpy(resstr + (32 - 4) - 16, flags, 4); - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - } else { - memcpy(resstr + (32 - flag->length) - flag->bit, flags, - flag->length); - } - entry->policy[flag->reg - 1] = resstr; - - return 0; + return 2; } /* parse a single list item from the legacy Python xend syntax, where -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:50:58 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:50:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581543.910395 (Exim 4.92) (envelope-from ) id 1qTsx8-0000qb-83; Wed, 09 Aug 2023 23:50:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581543.910395; Wed, 09 Aug 2023 23:50:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsx8-0000qU-4s; Wed, 09 Aug 2023 23:50:58 +0000 Received: by outflank-mailman (input) for mailman id 581543; Wed, 09 Aug 2023 23:50:56 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsx6-0000qI-9a for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsx6-0008DW-8n for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsx6-0005C0-8B for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:50:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rAaqyU4SVqRTHDAP3MWtvfIHoCjx37cmuTXxSEQg5Ag=; b=c53FRaEHww6LdHspZJsRSA9dJX tpraPb/Cr9CClcU1WT10/fBBXbLCTiKJqMh696OYz4o5h66xaC5CaSEPi4x9h7AdwJN6cB0eQfFlY xyfRk0APEL8hAZdWlt4UiruogSKXhgl9rCC7QBXo/J52b4N473vLJZU/DpSgjrhaxw/g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: use the cpuid feature names from cpufeatureset.h Message-Id: Date: Wed, 09 Aug 2023 23:50:56 +0000 commit 7374a8d7700f5cf0614205f3b6e9c0352861c1da Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:57 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: use the cpuid feature names from cpufeatureset.h The current implementation in libxl_cpuid_parse_config() requires keeping a list of cpuid feature bits that should be mostly in sync with the contents of cpufeatureset.h. Avoid such duplication by using the automatically generated list of cpuid features in INIT_FEATURE_NAMES in order to map feature names to featureset bits, and then translate from featureset bits into cpuid leaf, subleaf, register tuple. Note that the full contents of the previous cpuid translation table can't be removed. That's because some feature names allowed by libxl are not described in the featuresets, or because naming has diverged and the previous nomenclature is preserved for compatibility reasons. Should result in no functional change observed by callers, albeit some new cpuid features will be available as a result of the change. While there constify cpuid_flags name field. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit d638fe233cb3a45105319df75df0edfed2fde5a5) --- docs/man/xl.cfg.5.pod.in | 24 ++-- tools/libs/light/libxl_cpuid.c | 259 +++++++++++++++-------------------------- tools/xl/xl_parse.c | 3 + 3 files changed, 107 insertions(+), 179 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ec444fb2ba..bee0b9a889 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -1974,24 +1974,16 @@ proccount procpkg stepping =back -List of keys taking a character: +List of keys taking a character can be found in the public header file +L -=over 4 - -3dnow 3dnowext 3dnowprefetch abm acpi adx aes altmovcr8 apic arat avx avx2 -avx512-4fmaps avx512-4vnniw avx512bw avx512cd avx512dq avx512er avx512f -avx512ifma avx512pf avx512vbmi avx512vl bmi1 bmi2 clflushopt clfsh clwb cmov -cmplegacy cmpxchg16 cmpxchg8 cmt cntxid dca de ds dscpl dtes64 erms est extapic -f16c ffxsr fma fma4 fpu fsgsbase fxsr hle htt hypervisor ia64 ibs invpcid -invtsc lahfsahf lm lwp mca mce misalignsse mmx mmxext monitor movbe mpx msr -mtrr nodeid nx ospke osvw osxsave pae page1gb pat pbe pcid pclmulqdq pdcm -perfctr_core perfctr_nb pge pku popcnt pse pse36 psn rdrand rdseed rdtscp rtm -sha skinit smap smep smx ss sse sse2 sse3 sse4.1 sse4.2 sse4_1 sse4_2 sse4a -ssse3 svm svm_decode svm_lbrv svm_npt svm_nrips svm_pausefilt svm_tscrate -svm_vmcbclean syscall sysenter tbm tm tm2 topoext tsc tsc-deadline tsc_adjust -umip vme vmx wdt x2apic xop xsave xtpr +The feature names described in C should be specified in all +lowercase letters, and with underscores converted to hyphens. For example in +order to reference feature C the string C should be used. -=back +Note that C is described as an option that takes a value, and that +takes precedence over the C flag in C. The feature +flag must be referenced as C. =back diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 8b054e3a71..785b57f6f8 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -14,6 +14,8 @@ #include "libxl_internal.h" +#include + int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); @@ -60,7 +62,7 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) * Used for the static structure describing all features. */ struct cpuid_flags { - char* name; + const char *name; uint32_t leaf; uint32_t subleaf; int reg; @@ -153,7 +155,19 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, entry->policy[flag->reg - 1] = resstr; return 0; +} + +struct feature_name { + const char *name; + unsigned int bit; +}; + +static int search_feature(const void *a, const void *b) +{ + const char *key = a; + const char *feat = ((const struct feature_name *)b)->name; + return strcmp(key, feat); } /* parse a single key=value pair and translate it into the libxc @@ -176,202 +190,42 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"proccount", 0x00000001, NA, CPUID_REG_EBX, 16, 8}, {"localapicid", 0x00000001, NA, CPUID_REG_EBX, 24, 8}, - {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, - {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, - {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, - {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, - {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, - {"vmx", 0x00000001, NA, CPUID_REG_ECX, 5, 1}, - {"smx", 0x00000001, NA, CPUID_REG_ECX, 6, 1}, {"est", 0x00000001, NA, CPUID_REG_ECX, 7, 1}, - {"tm2", 0x00000001, NA, CPUID_REG_ECX, 8, 1}, - {"ssse3", 0x00000001, NA, CPUID_REG_ECX, 9, 1}, {"cntxid", 0x00000001, NA, CPUID_REG_ECX, 10, 1}, - {"fma", 0x00000001, NA, CPUID_REG_ECX, 12, 1}, {"cmpxchg16", 0x00000001, NA, CPUID_REG_ECX, 13, 1}, - {"xtpr", 0x00000001, NA, CPUID_REG_ECX, 14, 1}, - {"pdcm", 0x00000001, NA, CPUID_REG_ECX, 15, 1}, - {"pcid", 0x00000001, NA, CPUID_REG_ECX, 17, 1}, - {"dca", 0x00000001, NA, CPUID_REG_ECX, 18, 1}, /* Linux uses sse4_{1,2}. Keep sse4.{1,2} for compatibility */ {"sse4_1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4.1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4_2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, {"sse4.2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, - {"x2apic", 0x00000001, NA, CPUID_REG_ECX, 21, 1}, - {"movbe", 0x00000001, NA, CPUID_REG_ECX, 22, 1}, - {"popcnt", 0x00000001, NA, CPUID_REG_ECX, 23, 1}, - {"tsc-deadline", 0x00000001, NA, CPUID_REG_ECX, 24, 1}, {"aes", 0x00000001, NA, CPUID_REG_ECX, 25, 1}, - {"xsave", 0x00000001, NA, CPUID_REG_ECX, 26, 1}, - {"osxsave", 0x00000001, NA, CPUID_REG_ECX, 27, 1}, - {"avx", 0x00000001, NA, CPUID_REG_ECX, 28, 1}, - {"f16c", 0x00000001, NA, CPUID_REG_ECX, 29, 1}, - {"rdrand", 0x00000001, NA, CPUID_REG_ECX, 30, 1}, - {"hypervisor", 0x00000001, NA, CPUID_REG_ECX, 31, 1}, - - {"fpu", 0x00000001, NA, CPUID_REG_EDX, 0, 1}, - {"vme", 0x00000001, NA, CPUID_REG_EDX, 1, 1}, - {"de", 0x00000001, NA, CPUID_REG_EDX, 2, 1}, - {"pse", 0x00000001, NA, CPUID_REG_EDX, 3, 1}, - {"tsc", 0x00000001, NA, CPUID_REG_EDX, 4, 1}, - {"msr", 0x00000001, NA, CPUID_REG_EDX, 5, 1}, - {"pae", 0x00000001, NA, CPUID_REG_EDX, 6, 1}, - {"mce", 0x00000001, NA, CPUID_REG_EDX, 7, 1}, + {"cmpxchg8", 0x00000001, NA, CPUID_REG_EDX, 8, 1}, - {"apic", 0x00000001, NA, CPUID_REG_EDX, 9, 1}, {"sysenter", 0x00000001, NA, CPUID_REG_EDX, 11, 1}, - {"mtrr", 0x00000001, NA, CPUID_REG_EDX, 12, 1}, - {"pge", 0x00000001, NA, CPUID_REG_EDX, 13, 1}, - {"mca", 0x00000001, NA, CPUID_REG_EDX, 14, 1}, - {"cmov", 0x00000001, NA, CPUID_REG_EDX, 15, 1}, - {"pat", 0x00000001, NA, CPUID_REG_EDX, 16, 1}, - {"pse36", 0x00000001, NA, CPUID_REG_EDX, 17, 1}, {"psn", 0x00000001, NA, CPUID_REG_EDX, 18, 1}, {"clfsh", 0x00000001, NA, CPUID_REG_EDX, 19, 1}, - {"ds", 0x00000001, NA, CPUID_REG_EDX, 21, 1}, - {"acpi", 0x00000001, NA, CPUID_REG_EDX, 22, 1}, - {"mmx", 0x00000001, NA, CPUID_REG_EDX, 23, 1}, - {"fxsr", 0x00000001, NA, CPUID_REG_EDX, 24, 1}, - {"sse", 0x00000001, NA, CPUID_REG_EDX, 25, 1}, - {"sse2", 0x00000001, NA, CPUID_REG_EDX, 26, 1}, - {"ss", 0x00000001, NA, CPUID_REG_EDX, 27, 1}, - {"htt", 0x00000001, NA, CPUID_REG_EDX, 28, 1}, {"tm", 0x00000001, NA, CPUID_REG_EDX, 29, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, {"arat", 0x00000006, NA, CPUID_REG_EAX, 2, 1}, - {"fsgsbase", 0x00000007, 0, CPUID_REG_EBX, 0, 1}, {"tsc_adjust", 0x00000007, 0, CPUID_REG_EBX, 1, 1}, - {"bmi1", 0x00000007, 0, CPUID_REG_EBX, 3, 1}, - {"hle", 0x00000007, 0, CPUID_REG_EBX, 4, 1}, - {"avx2", 0x00000007, 0, CPUID_REG_EBX, 5, 1}, - {"smep", 0x00000007, 0, CPUID_REG_EBX, 7, 1}, - {"bmi2", 0x00000007, 0, CPUID_REG_EBX, 8, 1}, - {"erms", 0x00000007, 0, CPUID_REG_EBX, 9, 1}, - {"invpcid", 0x00000007, 0, CPUID_REG_EBX, 10, 1}, - {"rtm", 0x00000007, 0, CPUID_REG_EBX, 11, 1}, {"cmt", 0x00000007, 0, CPUID_REG_EBX, 12, 1}, - {"mpx", 0x00000007, 0, CPUID_REG_EBX, 14, 1}, - {"avx512f", 0x00000007, 0, CPUID_REG_EBX, 16, 1}, - {"avx512dq", 0x00000007, 0, CPUID_REG_EBX, 17, 1}, - {"rdseed", 0x00000007, 0, CPUID_REG_EBX, 18, 1}, - {"adx", 0x00000007, 0, CPUID_REG_EBX, 19, 1}, - {"smap", 0x00000007, 0, CPUID_REG_EBX, 20, 1}, - {"avx512-ifma", 0x00000007, 0, CPUID_REG_EBX, 21, 1}, - {"clflushopt", 0x00000007, 0, CPUID_REG_EBX, 23, 1}, - {"clwb", 0x00000007, 0, CPUID_REG_EBX, 24, 1}, - {"proc-trace", 0x00000007, 0, CPUID_REG_EBX, 25, 1}, - {"avx512pf", 0x00000007, 0, CPUID_REG_EBX, 26, 1}, - {"avx512er", 0x00000007, 0, CPUID_REG_EBX, 27, 1}, - {"avx512cd", 0x00000007, 0, CPUID_REG_EBX, 28, 1}, - {"sha", 0x00000007, 0, CPUID_REG_EBX, 29, 1}, - {"avx512bw", 0x00000007, 0, CPUID_REG_EBX, 30, 1}, - {"avx512vl", 0x00000007, 0, CPUID_REG_EBX, 31, 1}, - - {"prefetchwt1", 0x00000007, 0, CPUID_REG_ECX, 0, 1}, - {"avx512-vbmi", 0x00000007, 0, CPUID_REG_ECX, 1, 1}, - {"umip", 0x00000007, 0, CPUID_REG_ECX, 2, 1}, - {"pku", 0x00000007, 0, CPUID_REG_ECX, 3, 1}, - {"ospke", 0x00000007, 0, CPUID_REG_ECX, 4, 1}, - {"avx512-vbmi2", 0x00000007, 0, CPUID_REG_ECX, 6, 1}, - {"cet-ss", 0x00000007, 0, CPUID_REG_ECX, 7, 1}, - {"gfni", 0x00000007, 0, CPUID_REG_ECX, 8, 1}, - {"vaes", 0x00000007, 0, CPUID_REG_ECX, 9, 1}, - {"vpclmulqdq", 0x00000007, 0, CPUID_REG_ECX, 10, 1}, - {"avx512-vnni", 0x00000007, 0, CPUID_REG_ECX, 11, 1}, - {"avx512-bitalg",0x00000007, 0, CPUID_REG_ECX, 12, 1}, - {"avx512-vpopcntdq",0x00000007,0,CPUID_REG_ECX, 14, 1}, - {"rdpid", 0x00000007, 0, CPUID_REG_ECX, 22, 1}, - {"cldemote", 0x00000007, 0, CPUID_REG_ECX, 25, 1}, - - {"avx512-4vnniw",0x00000007, 0, CPUID_REG_EDX, 2, 1}, - {"avx512-4fmaps",0x00000007, 0, CPUID_REG_EDX, 3, 1}, - {"fsrm", 0x00000007, 0, CPUID_REG_EDX, 4, 1}, - {"avx512-vp2intersect",0x00000007,0,CPUID_REG_EDX,8, 1}, - {"srbds-ctrl", 0x00000007, 0, CPUID_REG_EDX, 9, 1}, - {"md-clear", 0x00000007, 0, CPUID_REG_EDX, 10, 1}, - {"serialize", 0x00000007, 0, CPUID_REG_EDX, 14, 1}, - {"tsxldtrk", 0x00000007, 0, CPUID_REG_EDX, 16, 1}, - {"cet-ibt", 0x00000007, 0, CPUID_REG_EDX, 20, 1}, - {"avx512-fp16", 0x00000007, 0, CPUID_REG_EDX, 23, 1}, - {"ibrsb", 0x00000007, 0, CPUID_REG_EDX, 26, 1}, - {"stibp", 0x00000007, 0, CPUID_REG_EDX, 27, 1}, - {"l1d-flush", 0x00000007, 0, CPUID_REG_EDX, 28, 1}, - {"arch-caps", 0x00000007, 0, CPUID_REG_EDX, 29, 1}, - {"core-caps", 0x00000007, 0, CPUID_REG_EDX, 30, 1}, - {"ssbd", 0x00000007, 0, CPUID_REG_EDX, 31, 1}, - - {"avx-vnni", 0x00000007, 1, CPUID_REG_EAX, 4, 1}, - {"avx512-bf16", 0x00000007, 1, CPUID_REG_EAX, 5, 1}, - {"fzrm", 0x00000007, 1, CPUID_REG_EAX, 10, 1}, - {"fsrs", 0x00000007, 1, CPUID_REG_EAX, 11, 1}, - {"fsrcs", 0x00000007, 1, CPUID_REG_EAX, 12, 1}, - - {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, - - {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, - {"ipred-ctrl", 0x00000007, 2, CPUID_REG_EDX, 1, 1}, - {"rrsba-ctrl", 0x00000007, 2, CPUID_REG_EDX, 2, 1}, - {"bhi-ctrl", 0x00000007, 2, CPUID_REG_EDX, 4, 1}, - {"mcdt-no", 0x00000007, 2, CPUID_REG_EDX, 5, 1}, {"lahfsahf", 0x80000001, NA, CPUID_REG_ECX, 0, 1}, {"cmplegacy", 0x80000001, NA, CPUID_REG_ECX, 1, 1}, - {"svm", 0x80000001, NA, CPUID_REG_ECX, 2, 1}, - {"extapic", 0x80000001, NA, CPUID_REG_ECX, 3, 1}, {"altmovcr8", 0x80000001, NA, CPUID_REG_ECX, 4, 1}, - {"abm", 0x80000001, NA, CPUID_REG_ECX, 5, 1}, - {"sse4a", 0x80000001, NA, CPUID_REG_ECX, 6, 1}, - {"misalignsse", 0x80000001, NA, CPUID_REG_ECX, 7, 1}, - {"3dnowprefetch",0x80000001, NA, CPUID_REG_ECX, 8, 1}, - {"osvw", 0x80000001, NA, CPUID_REG_ECX, 9, 1}, - {"ibs", 0x80000001, NA, CPUID_REG_ECX, 10, 1}, - {"xop", 0x80000001, NA, CPUID_REG_ECX, 11, 1}, - {"skinit", 0x80000001, NA, CPUID_REG_ECX, 12, 1}, - {"wdt", 0x80000001, NA, CPUID_REG_ECX, 13, 1}, - {"lwp", 0x80000001, NA, CPUID_REG_ECX, 15, 1}, - {"fma4", 0x80000001, NA, CPUID_REG_ECX, 16, 1}, {"nodeid", 0x80000001, NA, CPUID_REG_ECX, 19, 1}, - {"tbm", 0x80000001, NA, CPUID_REG_ECX, 21, 1}, - {"topoext", 0x80000001, NA, CPUID_REG_ECX, 22, 1}, {"perfctr_core", 0x80000001, NA, CPUID_REG_ECX, 23, 1}, {"perfctr_nb", 0x80000001, NA, CPUID_REG_ECX, 24, 1}, - {"syscall", 0x80000001, NA, CPUID_REG_EDX, 11, 1}, - {"nx", 0x80000001, NA, CPUID_REG_EDX, 20, 1}, - {"mmxext", 0x80000001, NA, CPUID_REG_EDX, 22, 1}, - {"ffxsr", 0x80000001, NA, CPUID_REG_EDX, 25, 1}, - {"page1gb", 0x80000001, NA, CPUID_REG_EDX, 26, 1}, - {"rdtscp", 0x80000001, NA, CPUID_REG_EDX, 27, 1}, - {"lm", 0x80000001, NA, CPUID_REG_EDX, 29, 1}, - {"3dnowext", 0x80000001, NA, CPUID_REG_EDX, 30, 1}, - {"3dnow", 0x80000001, NA, CPUID_REG_EDX, 31, 1}, - {"procpkg", 0x00000004, 0, CPUID_REG_EAX, 26, 6}, {"invtsc", 0x80000007, NA, CPUID_REG_EDX, 8, 1}, - {"clzero", 0x80000008, NA, CPUID_REG_EBX, 0, 1}, - {"rstr-fp-err-ptrs", 0x80000008, NA, CPUID_REG_EBX, 2, 1}, - {"wbnoinvd", 0x80000008, NA, CPUID_REG_EBX, 9, 1}, - {"ibpb", 0x80000008, NA, CPUID_REG_EBX, 12, 1}, - {"ibrs", 0x80000008, NA, CPUID_REG_EBX, 14, 1}, - {"amd-stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1}, - {"ibrs-always", 0x80000008, NA, CPUID_REG_EBX, 16, 1}, - {"stibp-always", 0x80000008, NA, CPUID_REG_EBX, 17, 1}, - {"ibrs-fast", 0x80000008, NA, CPUID_REG_EBX, 18, 1}, - {"ibrs-same-mode", 0x80000008, NA, CPUID_REG_EBX, 19, 1}, - {"no-lmsl", 0x80000008, NA, CPUID_REG_EBX, 20, 1}, {"ppin", 0x80000008, NA, CPUID_REG_EBX, 23, 1}, - {"amd-ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1}, - {"virt-ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1}, - {"ssb-no", 0x80000008, NA, CPUID_REG_EBX, 26, 1}, - {"psfd", 0x80000008, NA, CPUID_REG_EBX, 28, 1}, {"btc-no", 0x80000008, NA, CPUID_REG_EBX, 29, 1}, - {"ibpb-ret", 0x80000008, NA, CPUID_REG_EBX, 30, 1}, {"nc", 0x80000008, NA, CPUID_REG_ECX, 0, 8}, {"apicidsize", 0x80000008, NA, CPUID_REG_ECX, 12, 4}, @@ -385,15 +239,63 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"svm_pausefilt",0x8000000a, NA, CPUID_REG_EDX, 10, 1}, {"lfence+", 0x80000021, NA, CPUID_REG_EAX, 2, 1}, - {"nscb", 0x80000021, NA, CPUID_REG_EAX, 6, 1}, {"maxhvleaf", 0x40000000, NA, CPUID_REG_EAX, 0, 8}, {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; + static const struct feature_name features[] = INIT_FEATURE_NAMES; + /* + * NB: if we switch to using a cpu_policy derived object instead of a + * libxl_cpuid_policy_list we could get rid of the featureset -> cpuid leaf + * conversion table and use a featureset directly as we have conversions + * to/from featureset and cpu_policy. + */ + static const struct { + enum { FEAT_CPUID, FEAT_MSR } type; + union { + struct { + uint32_t leaf, subleaf; + unsigned int reg; + } cpuid; + struct { + uint32_t index; + unsigned int reg; + } msr; + }; + } feature_to_policy[] = { +#define CPUID_ENTRY(l, s, r) \ + { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } +#define MSR_ENTRY(i, r) \ + { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x0000000D, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_ECX), + CPUID_ENTRY(0x80000007, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000008, NA, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x80000021, NA, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 2, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_ECX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX), + MSR_ENTRY(0x10a, CPUID_REG_EAX), + MSR_ENTRY(0x10a, CPUID_REG_EDX), +#undef MSR_ENTRY +#undef CPUID_ENTRY + }; #undef NA const char *sep, *val; + char *name; const struct cpuid_flags *flag; + const struct feature_name *feat; + + BUILD_BUG_ON(ARRAY_SIZE(feature_to_policy) != FEATURESET_NR_ENTRIES); sep = strchr(str, '='); if (sep == NULL) { @@ -406,6 +308,37 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) return cpuid_add(policy, flag, val); } + /* Provide a NUL terminated feature name to the search helper. */ + name = strndup(str, sep - str); + if (name == NULL) + return ERROR_NOMEM; + + feat = bsearch(name, features, ARRAY_SIZE(features), sizeof(features[0]), + search_feature); + free(name); + + if (feat == NULL) + return 2; + + switch (feature_to_policy[feat->bit / 32].type) { + case FEAT_CPUID: + { + struct cpuid_flags f; + + f.name = feat->name; + f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.bit = feat->bit % 32; + f.length = 1; + + return cpuid_add(policy, &f, val); + } + + case FEAT_MSR: + return 2; + } + return 2; } diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 644ab8f8fd..1d8fd108af 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -2484,6 +2484,9 @@ skip_usbdev: case 3: errstr = "illegal CPUID value (must be: [0|1|x|k|s])"; break; + case ERROR_NOMEM: + errstr = "out of memory"; + break; default: errstr = "unknown error"; break; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581544.910399 (Exim 4.92) (envelope-from ) id 1qTsxH-0000ty-Bj; Wed, 09 Aug 2023 23:51:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581544.910399; Wed, 09 Aug 2023 23:51:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxH-0000tq-90; Wed, 09 Aug 2023 23:51:07 +0000 Received: by outflank-mailman (input) for mailman id 581544; Wed, 09 Aug 2023 23:51:06 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxG-0000tf-Cc for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:06 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxG-0008Dq-Bw for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:06 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsxG-0005Ch-B2 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:06 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2VwyPCDbmTNKVnRAxg58tVS9arMtT60+h6DiwK63eEM=; b=3OVrpj8/i480SpG730GizeZ7WO OXbYazckzLfEt8tOqD1m5/BpKtQu8Z5pjdGDUGdZ1tsKzmkfWZOSPvIxksabbfv5eaziqqissYZVk mhrgkJaIOkpY+SBGz6pVcsBgULSyxw4Nc+/wAOpHgFXl4Cw82QsKlddJqNQMo1cqSMyo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: add support for parsing MSR features Message-Id: Date: Wed, 09 Aug 2023 23:51:06 +0000 commit 8df6cec384b4f5d128a8d21af30cf1330e81e8a2 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:58 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: add support for parsing MSR features Introduce support for handling MSR features in libxl_cpuid_parse_config(). The MSR policies are added to the libxl_cpuid_policy like the CPUID one, which gets passed to xc_cpuid_apply_policy(). This allows existing users of libxl to provide MSR related features as key=value pairs to libxl_cpuid_parse_config() without requiring the usage of a different API. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit 6d21cedbaa34b3a3856f964189e911112c732b21) --- tools/libs/light/libxl_cpuid.c | 64 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 785b57f6f8..5ec088b60c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,6 +157,60 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +{ + unsigned int i = 0; + libxl_cpuid_policy_list policy = *pl; + + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + if (policy->msr != NULL) { + for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + if (policy->msr[i].index == index) { + return &policy->msr[i]; + } + } + } + + policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); + policy->msr[i].index = index; + memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); + policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; + policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; + + return &policy->msr[i]; +} + +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, + const char *val) +{ + struct xc_msr *entry = msr_find_match(policy, index); + + /* Only allow options taking a character for MSRs, no values allowed. */ + if (strlen(val) != 1) + return 3; + + switch (val[0]) { + case '0': + case '1': + case 'x': + case 'k': + entry->policy[63 - bit] = val[0]; + break; + + case 's': + /* Translate s -> k as xc_msr doesn't support the deprecated 's'. */ + entry->policy[63 - bit] = 'k'; + break; + + default: + return 3; + } + + return 0; +} + struct feature_name { const char *name; unsigned int bit; @@ -336,7 +390,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } case FEAT_MSR: - return 2; + { + unsigned int bit = feat->bit % 32; + + if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + bit += 32; + + return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + bit, val); + } } return 2; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581545.910402 (Exim 4.92) (envelope-from ) id 1qTsxR-0000wh-DC; Wed, 09 Aug 2023 23:51:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581545.910402; Wed, 09 Aug 2023 23:51:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxR-0000wZ-AX; Wed, 09 Aug 2023 23:51:17 +0000 Received: by outflank-mailman (input) for mailman id 581545; Wed, 09 Aug 2023 23:51:16 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxQ-0000wP-Fv for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:16 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxQ-0008Dx-F3 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:16 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsxQ-0005D6-EB for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:16 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5we0nNMKv9CFBQxRvql1lc3mMYt78IYlijoSWzO8nKk=; b=g7WduXVOP2zgtbFKC+kA48t87Q aAioSiOiJY4pYaHVAuvxLu3gtmuBRTWNqnBGjZaSoxmQK+ww+Svw0k1j1Aso5IbN6TlmeF9VQeA02 ZjCt+nmlSYUXv5HeIyToLo1RGXDlYwj/t8oZi6s/otEMEnvu5ZjW+jMaCrXJjU60Fg9g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: avoid shadowing of index() Message-Id: Date: Wed, 09 Aug 2023 23:51:16 +0000 commit 6af594e098104405ea7ebe47023eeb26c9764263 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:26 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: avoid shadowing of index() Because of -Wshadow the build otherwise fails with old enough glibc. While there also obey line length limits for msr_add(). Fixes: 6d21cedbaa34 ("libxl: add support for parsing MSR features") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 4f6afde88be3e8960eb311d16ac41d44ab71ed10) --- tools/libs/light/libxl_cpuid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 5ec088b60c..0630d342b0 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,7 +157,7 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } -static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t idx) { unsigned int i = 0; libxl_cpuid_policy_list policy = *pl; @@ -167,14 +167,14 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index if (policy->msr != NULL) { for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { - if (policy->msr[i].index == index) { + if (policy->msr[i].index == idx) { return &policy->msr[i]; } } } policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); - policy->msr[i].index = index; + policy->msr[i].index = idx; memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; @@ -182,10 +182,10 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index return &policy->msr[i]; } -static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, - const char *val) +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t idx, + unsigned int bit, const char *val) { - struct xc_msr *entry = msr_find_match(policy, index); + struct xc_msr *entry = msr_find_match(policy, idx); /* Only allow options taking a character for MSRs, no values allowed. */ if (strlen(val) != 1) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581546.910406 (Exim 4.92) (envelope-from ) id 1qTsxb-0000zg-Eh; Wed, 09 Aug 2023 23:51:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581546.910406; Wed, 09 Aug 2023 23:51:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxb-0000zZ-C7; Wed, 09 Aug 2023 23:51:27 +0000 Received: by outflank-mailman (input) for mailman id 581546; Wed, 09 Aug 2023 23:51:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxa-0000zP-JA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxa-0008E4-IR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:26 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsxa-0005O5-HS for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:26 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Rwdh7bKAznlQhLlXa1Y843A0GbSCJfBLaDyjnbMLA7I=; b=RPQIMqY/Tzk2Lw089+JvwFq/KP E0KhEwUYQff2tjLJWn4pxkEFvLnl2d79hqH1bCEBZqTvyVETQ8B5uAZaCjR5Q/ffnkET4hsG2FYnb wMIJGZGS6avJBFW7l2PXGSABloVp0GmDSdAlnYPhkzdmDToIGMgQfoW3++kbDJXwKp9w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: allow building with old gcc again Message-Id: Date: Wed, 09 Aug 2023 23:51:26 +0000 commit a982b33e5a6b3d6b8e85931a1b52e14db7bec20f Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:39 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 libxl: allow building with old gcc again We can't use initializers of unnamed struct/union members just yet. Fixes: d638fe233cb3 ("libxl: use the cpuid feature names from cpufeatureset.h") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 1aa5acbbec3f37bf38d78fa96d210053f8e8efd5) --- tools/libs/light/libxl_cpuid.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 0630d342b0..849722541c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -316,12 +316,16 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) uint32_t index; unsigned int reg; } msr; - }; + } u; } feature_to_policy[] = { #define CPUID_ENTRY(l, s, r) \ - { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } + { .type = FEAT_CPUID, \ + .u = { .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } \ + } #define MSR_ENTRY(i, r) \ - { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + { .type = FEAT_MSR, \ + .u = { .msr.index = i, .msr.reg = r } \ + } CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), @@ -380,9 +384,9 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) struct cpuid_flags f; f.name = feat->name; - f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; - f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; - f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.leaf = feature_to_policy[feat->bit / 32].u.cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].u.cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].u.cpuid.reg; f.bit = feat->bit % 32; f.length = 1; @@ -393,10 +397,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { unsigned int bit = feat->bit % 32; - if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + if (feature_to_policy[feat->bit / 32].u.msr.reg == CPUID_REG_EDX) bit += 32; - return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + return msr_add(policy, feature_to_policy[feat->bit / 32].u.msr.index, bit, val); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:38 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581550.910421 (Exim 4.92) (envelope-from ) id 1qTsxm-0001IQ-Oc; Wed, 09 Aug 2023 23:51:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581550.910421; Wed, 09 Aug 2023 23:51:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxm-0001IF-Ln; Wed, 09 Aug 2023 23:51:38 +0000 Received: by outflank-mailman (input) for mailman id 581550; Wed, 09 Aug 2023 23:51:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxk-0001H5-MA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxk-0008EZ-LV for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:36 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsxk-0005h1-Km for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:36 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JRixTpK8OBweYu0tWAMb7qCi0sWTCqCQP3XQddPyTrQ=; b=tYxBGKg319Z2sjZ3y+FI4ezd3/ ZsopzFfhy+LTw92oqcnPK5xRbmDztSsnlwG6dj24hraM7gm6C85Wvqrvx35NuaoT8NLMDcPhNzsMt W40IEzsVJJaprG8rhWpRjPOANCT6Vtz+MJc9mbXb9hHQ9AzX4nYGCummigJOmo55qNMg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default Message-Id: Date: Wed, 09 Aug 2023 23:51:36 +0000 commit 4ff3b18cee2ace10ed397dfc20d2ab6a92dfc675 Author: Andrew Cooper AuthorDate: Wed May 17 10:13:36 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default With xl/libxl now able to control the policy bits for MSR_ARCH_CAPS, it is safe to advertise to guests by default. In turn, we don't need the special case to expose details to dom0. This advertises MSR_ARCH_CAPS to guests on *all* Intel hardware, even if the register content ends up being empty. - Advertising ARCH_CAPS and not RSBA signals "retpoline is safe here and everywhere you might migrate to". This is important because it avoids the guest kernel needing to rely on model checks. - Alternatively, levelling for safety across the Broadwell/Skylake divide requires advertising ARCH_CAPS and RSBA, meaning "retpoline not safe on some hardware you might migrate to". On Cascade Lake and later hardware, guests can now see RDCL_NO (not vulnerable to Meltdown) amongst others. This causes substantial performance improvements, as guests are no longer applying software mitigations in cases where they don't need to. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 4b2cdbfe766e5666e6754198946df2dc16f6a642) --- xen/arch/x86/cpu-policy.c | 11 ----------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 55524e28e1..db926a1c66 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -873,17 +873,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) if ( cpu_has_itsc ) p->extd.itsc = true; - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - p->feat.arch_caps = true; - p->arch_caps.raw = host_cpu_policy.arch_caps.raw; - } - /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index fe01dc231e..6ae3117687 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -270,7 +270,7 @@ XEN_CPUFEATURE(AVX512_FP16, 9*32+23) /* AVX512 FP16 instructions */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!A IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581551.910425 (Exim 4.92) (envelope-from ) id 1qTsxv-0001No-Q2; Wed, 09 Aug 2023 23:51:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581551.910425; Wed, 09 Aug 2023 23:51:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxv-0001Ne-NH; Wed, 09 Aug 2023 23:51:47 +0000 Received: by outflank-mailman (input) for mailman id 581551; Wed, 09 Aug 2023 23:51:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxu-0001NH-PB for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsxu-0008Ep-OY for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:46 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsxu-0005xW-Nh for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/MgeWaSEQWxOS6F0Js3sPRFegsOI0HH4nBltIlVQ4HA=; b=lCXx1ZQ7rGK3v6Eyg9pms0RId/ e4dHFrUgU57i512vknemBhDFwLM1JZOHMpyabDTIJ0n0iKwek7TWtKeCgcNc2AiT9zJl/toq70S9i 9Vc5b67ojFwVAJBEZV+qsoVcpJ1FFSWUl0oSNW5RmtVZ5koWO7ZyKpr/6/3w5QuXlwuw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Rework ibpb_calculations() Message-Id: Date: Wed, 09 Aug 2023 23:51:46 +0000 commit c35a2dcd3892526f73afd58f36290fce4764c363 Author: Andrew Cooper AuthorDate: Thu Jul 27 20:03:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Rework ibpb_calculations() ... in order to make the SRSO mitigations easier to integrate. * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB. In particular, Xen supports synthesising the IBPB bit to guests on Intel to allow IBPB while dissuading the use of (legacy) IBRS. * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for both opt_ibpb_entry_{pv,hvm}. No functional change. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 292f68fb77196a35ac92b296792770d0f3190d75) --- xen/arch/x86/spec_ctrl.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 8f9500bc64..c2be2e3202 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -901,6 +901,8 @@ static bool __init should_use_eager_fpu(void) static void __init ibpb_calculations(void) { + bool def_ibpb_entry = false; + /* Check we have hardware IBPB support before using it... */ if ( !boot_cpu_has(X86_FEATURE_IBRSB) && !boot_cpu_has(X86_FEATURE_IBPB) ) { @@ -909,28 +911,28 @@ static void __init ibpb_calculations(void) return; } - /* - * AMD/Hygon CPUs to date (June 2022) don't flush the the RAS. Future - * CPUs are expected to enumerate IBPB_RET when this has been fixed. - * Until then, cover the difference with the software sequence. - */ - if ( boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_IBPB_RET) ) - setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + /* + * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future + * CPUs are expected to enumerate IBPB_RET when this has been fixed. + * Until then, cover the difference with the software sequence. + */ + if ( !boot_cpu_has(X86_FEATURE_IBPB_RET) ) + setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + + /* + * AMD/Hygon CPUs up to and including Zen2 suffer from Branch Type + * Confusion. Mitigate with IBPB-on-entry. + */ + if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) + def_ibpb_entry = true; + } - /* - * IBPB-on-entry mitigations for Branch Type Confusion. - * - * IBPB && !BTC_NO selects all AMD/Hygon hardware, not known to be safe, - * that we can provide some form of mitigation on. - */ if ( opt_ibpb_entry_pv == -1 ) - opt_ibpb_entry_pv = (IS_ENABLED(CONFIG_PV) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_pv = IS_ENABLED(CONFIG_PV) && def_ibpb_entry; if ( opt_ibpb_entry_hvm == -1 ) - opt_ibpb_entry_hvm = (IS_ENABLED(CONFIG_HVM) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_hvm = IS_ENABLED(CONFIG_HVM) && def_ibpb_entry; if ( opt_ibpb_entry_pv ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:51:57 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:51:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581553.910429 (Exim 4.92) (envelope-from ) id 1qTsy5-0001Yk-RV; Wed, 09 Aug 2023 23:51:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581553.910429; Wed, 09 Aug 2023 23:51:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsy5-0001Yd-Oq; Wed, 09 Aug 2023 23:51:57 +0000 Received: by outflank-mailman (input) for mailman id 581553; Wed, 09 Aug 2023 23:51:56 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsy4-0001YN-Sm for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsy4-0008Ew-S6 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsy4-00065X-RD for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:51:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ga3kD76VjfvmktV4O9fL5JvQJjIilptPU+cxwFlaaw8=; b=ZhsLx4JWMHWDBm/tFILPSU8oQI ZbpS4LcZdeRCf3qhj2vTiIS9AlbJpOCdfO+1M+xtg86XxMPehQcbJvW8B+JPHoXgx8lkjmv+woSeJ Vr9KEIC/SkE9V90rjQH7dc6nZhfRYEJBgW9RTHR5rnDi0S94/NVpYb5MhyYWzAnvBRyM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow Message-Id: Date: Wed, 09 Aug 2023 23:51:56 +0000 commit ecb2a3cea9c75e1ddeb9793b3032c2409b7df0c7 Author: Andrew Cooper AuthorDate: Wed Jun 14 09:13:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 2280b0ee2aed6e0fd4af3fa31bf99bc04d038bfe) --- tools/misc/xen-cpuid.c | 3 +++ xen/arch/x86/include/asm/msr-index.h | 1 + xen/arch/x86/msr.c | 5 ++++- xen/arch/x86/spec_ctrl.c | 15 ++++++++++----- xen/include/public/arch-x86/cpufeatureset.h | 3 +++ xen/tools/gen-cpuid.py | 1 + 6 files changed, 22 insertions(+), 6 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 9eaa6c9209..10421cbdbd 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -195,6 +195,9 @@ static const char *const str_e21a[32] = { [ 2] = "lfence+", [ 6] = "nscb", + + /* 26 */ [27] = "sbpb", + [28] = "ibpb-brtype", [29] = "srso-no", }; static const char *const str_7b1[32] = diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 36dad0662b..40450b66ad 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -45,6 +45,7 @@ #define MSR_PRED_CMD 0x00000049 #define PRED_CMD_IBPB (_AC(1, ULL) << 0) +#define PRED_CMD_SBPB (_AC(1, ULL) << 7) #define MSR_PPIN_CTL 0x0000004e #define PPIN_LOCKOUT (_AC(1, ULL) << 0) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index a79021774b..65fecdf785 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -416,7 +416,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( !cp->feat.ibrsb && !cp->extd.ibpb ) goto gp_fault; /* MSR available? */ - if ( val & ~PRED_CMD_IBPB ) + rsvd = ~(PRED_CMD_IBPB | + (cp->extd.sbpb ? PRED_CMD_SBPB : 0)); + + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ if ( v == curr ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index c2be2e3202..45b1de7b22 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -402,7 +402,7 @@ custom_param("pv-l1tf", parse_pv_l1tf); static void __init print_details(enum ind_thunk thunk) { - unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, e21a = 0, max = 0, tmp; uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ @@ -412,6 +412,8 @@ static void __init print_details(enum ind_thunk thunk) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000021 ) + cpuid(0x80000021, &e21a, &tmp, &tmp, &tmp); if ( cpu_has_arch_caps ) rdmsrl(MSR_ARCH_CAPABILITIES, caps); @@ -421,7 +423,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -441,10 +443,12 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "", (e8b & cpufeat_mask(X86_FEATURE_BTC_NO)) ? " BTC_NO" : "", - (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); + (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : "", + (e21a & cpufeat_mask(X86_FEATURE_IBPB_BRTYPE)) ? " IBPB_BRTYPE" : "", + (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -460,7 +464,8 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); + (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) ) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 6ae3117687..03b694589a 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -284,6 +284,9 @@ XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and limit too) */ +XEN_CPUFEATURE(SBPB, 11*32+27) /*A Selective Branch Predictor Barrier */ +XEN_CPUFEATURE(IBPB_BRTYPE, 11*32+28) /*A IBPB flushes Branch Type predictions too */ +XEN_CPUFEATURE(SRSO_NO, 11*32+29) /*A Hardware not vulenrable to Speculative Return Stack Overflow */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected Processor Inventory Number */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 8a7516ae0f..636ff44c8b 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -321,6 +321,7 @@ def crunch_numbers(state): IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], + IBPB: [IBPB_RET, SBPB, IBPB_BRTYPE], AMD_STIBP: [STIBP_ALWAYS], # In principle the TSXLDTRK insns could also be considered independent. -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581555.910432 (Exim 4.92) (envelope-from ) id 1qTsyF-0001fL-Ud; Wed, 09 Aug 2023 23:52:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581555.910432; Wed, 09 Aug 2023 23:52:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyF-0001fG-S1; Wed, 09 Aug 2023 23:52:07 +0000 Received: by outflank-mailman (input) for mailman id 581555; Wed, 09 Aug 2023 23:52:07 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyE-0001f0-W1 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:06 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyE-0008FG-VD for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:06 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsyE-00066W-UV for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:06 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=h92RKHtO4f5FITBHTLDJZTD1MqNFrH5Rm8lgZavar0o=; b=0vGADtyiM70rzCo4viJiLebipk ClsEw4JvLh2sjktDKA3E/C70Br639auz/8BvFzqy4/M4t26betaBQwDvkV7zq/6BZCOFB5R8cOvyF r11eN24MouBKz7jYo4Qscv8mhqeb5GmdlyjxR3VYj53oMXWcdJYiD6AqnRZr3fLRTWhw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Mitigate Speculative Return Stack Overflow Message-Id: Date: Wed, 09 Aug 2023 23:52:06 +0000 commit 24b37f953867b6d11ad1715e4b2a393ba691aacd Author: Andrew Cooper AuthorDate: Thu Jun 15 13:46:29 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Mitigate Speculative Return Stack Overflow On native, synthesise the SRSO bits by probing various hardware properties as given by AMD. Extend the IBPB-on-entry mitigations to Zen3/4 CPUs. There is a microcode prerequisite to make this an effective mitigation. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 220c06e6fefe2378f40e2a7391f5e265a2aa50f7) --- docs/misc/xen-command-line.pandoc | 7 ++-- xen/arch/x86/spec_ctrl.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 3 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index d601120faa..6169c52018 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2361,9 +2361,10 @@ guests to use. preference to here.* * `ibpb-entry=` offers control over whether IBPB (Indirect Branch Prediction Barrier) is used on entry to Xen. This is used by default on hardware - vulnerable to Branch Type Confusion, but for performance reasons, dom0 is - unprotected by default. If it necessary to protect dom0 too, boot with - `spec-ctrl=ibpb-entry`. + vulnerable to Branch Type Confusion, and hardware vulnerable to Speculative + Return Stack Overflow if appropriate microcode has been loaded, but for + performance reasons dom0 is unprotected by default. If it is necessary to + protect dom0 too, boot with `spec-ctrl=ibpb-entry`. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 45b1de7b22..c42ec3b8f6 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -904,6 +904,63 @@ static bool __init should_use_eager_fpu(void) } } +static void __init srso_calculations(bool hw_smt_enabled) +{ + if ( !(boot_cpu_data.x86_vendor & + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + return; + + /* + * If virtualised, none of these heuristics are safe. Trust the + * hypervisor completely. + */ + if ( cpu_has_hypervisor ) + return; + + if ( boot_cpu_data.x86 == 0x19 ) + { + /* + * We could have a table of models/microcode revisions. ...or we + * could just look for the new feature added. + */ + if ( wrmsr_safe(MSR_PRED_CMD, PRED_CMD_SBPB) == 0 ) + { + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + setup_force_cpu_cap(X86_FEATURE_SBPB); + } + else + printk(XENLOG_WARNING + "Vulnerable to SRSO, without suitable microcode to mitigate\n"); + } + else if ( boot_cpu_data.x86 < 0x19 ) + { + /* + * Zen1/2 (which have the IBPB microcode) have IBPB_BRTYPE behaviour + * already. + * + * Older CPUs are unknown, but their IBPB likely does flush branch + * types too. As we're synthesising for the benefit of guests, go + * with the likely option - this avoids VMs running on e.g. a Zen3 + * thinking there's no SRSO mitigation available because it may + * migrate to e.g. a Bulldozer. + */ + if ( boot_cpu_has(X86_FEATURE_IBPB) ) + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + } + + /* + * In single-thread mode on Zen1/2, microarchitectural limits prevent SRSO + * attacks from being effective. Synthesise SRSO_NO if SMT is disabled in + * hardware. + * + * Booting with smt=0, or using xen-hptool should be effective too, but + * they can be altered at runtime so it's not safe to presume SRSO_NO. + */ + if ( !hw_smt_enabled && + (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) ) + setup_force_cpu_cap(X86_FEATURE_SRSO_NO); +} + static void __init ibpb_calculations(void) { bool def_ibpb_entry = false; @@ -932,6 +989,15 @@ static void __init ibpb_calculations(void) */ if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) def_ibpb_entry = true; + + /* + * Further to BTC, Zen3/4 CPUs suffer from Speculative Return Stack + * Overflow in most configurations. Mitigate with IBPB-on-entry if we + * have the microcode that makes this an effective option. + */ + if ( !boot_cpu_has(X86_FEATURE_SRSO_NO) && + boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ) + def_ibpb_entry = true; } if ( opt_ibpb_entry_pv == -1 ) @@ -1498,6 +1564,8 @@ void __init init_speculation_mitigations(void) default_spec_ctrl_flags |= SCF_ist_rsb; } + srso_calculations(hw_smt_enabled); + ibpb_calculations(); /* Check whether Eager FPU should be enabled by default. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581557.910436 (Exim 4.92) (envelope-from ) id 1qTsyQ-0001iY-0B; Wed, 09 Aug 2023 23:52:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581557.910436; Wed, 09 Aug 2023 23:52:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyP-0001iQ-Tf; Wed, 09 Aug 2023 23:52:17 +0000 Received: by outflank-mailman (input) for mailman id 581557; Wed, 09 Aug 2023 23:52:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyP-0001iD-2u for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyP-0008FN-22 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:17 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsyP-00066v-1I for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:17 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bakinXtv6JYVn+pzoItJmeX50OM3sqaZ/W5/7o16Fmk=; b=HpAy0+JdIF3CU7/XwomY83RVhN ZUKHBAxwmsiyJP7QSzMUI6h2BUAabmQMZFQZrgBpYMvMEe4i2alSUpS6cbaaSPVrN2zgtt8gadiMW os5R3XecqJJsbC1aq7HJBFvOxUlx7JfOoMinDOlDn/sO31UuwV46fM+9CQFe3qi/Ul10=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX Message-Id: Date: Wed, 09 Aug 2023 23:52:17 +0000 commit bbf22355951dab5a66ac400b03cb9c88d2dc859f Author: Andrew Cooper AuthorDate: Mon Feb 27 15:36:49 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX The August 2023 microcode for GDS has an impact on the CLWB instruction. See code comments for full details. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 2dd06b4ea10891750af38e4a0e1efaeb0a9b3518) --- xen/arch/x86/cpu-policy.c | 25 +++++++++++++++++++++++++ xen/arch/x86/cpu/intel.c | 14 ++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 2 +- 3 files changed, 40 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index db926a1c66..f0f2c8a1c0 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -434,6 +434,18 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) __set_bit(X86_FEATURE_ARCH_CAPS, fs); __set_bit(X86_FEATURE_RSBA, fs); __set_bit(X86_FEATURE_RRSBA, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but VMs which + * have previously seen the CLWB feature can safely run on this CPU. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X && + raw_cpu_policy.feat.clwb ) + __set_bit(X86_FEATURE_CLWB, fs); } } @@ -456,6 +468,19 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs) boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE && cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but re-added + * it to the max policy to let VMs migrate in. Re-hide it in the + * default policy to disuade VMs from using it in the common case. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X && + raw_cpu_policy.feat.clwb ) + __clear_bit(X86_FEATURE_CLWB, fs); } /* diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index dc6a0c7807..b40ac696e6 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -556,6 +558,18 @@ static void cf_check init_intel(struct cpuinfo_x86 *c) if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) intel_log_freq(c); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * On this model, CLWB has equivalent behaviour to CLFLUSHOPT but the + * latter is not impacted. Hide CLWB to cause Xen to fall back to + * using CLFLUSHOPT instead. + */ + if (c == &boot_cpu_data && + c->x86 == 6 && c->x86_model == INTEL_FAM6_SKYLAKE_X) + setup_clear_cpu_cap(X86_FEATURE_CLWB); } const struct cpu_dev intel_cpu_dev = { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 03b694589a..2fc8158024 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -199,7 +199,7 @@ XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ -XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(CLWB, 5*32+24) /*!A CLWB instruction */ XEN_CPUFEATURE(PROC_TRACE, 5*32+25) /* Processor Trace */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:28 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581559.910441 (Exim 4.92) (envelope-from ) id 1qTsya-0001mL-1t; Wed, 09 Aug 2023 23:52:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581559.910441; Wed, 09 Aug 2023 23:52:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyZ-0001mE-VI; Wed, 09 Aug 2023 23:52:27 +0000 Received: by outflank-mailman (input) for mailman id 581559; Wed, 09 Aug 2023 23:52:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyZ-0001lz-61 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyZ-0008FU-56 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:27 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsyZ-00067W-4P for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:27 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=piaEJm6zRc8TSNLXSEqT7zd8JtNFGRfEPiK3sbiWkNA=; b=N9gE9UrD7aN5T3p1hby3MxvHA/ 3TWgrAp0dqql4nVjKkXNLDED2+tBk8M+1KPBG8EXO93Fcn9n2aPum18BATCzgVJVyf0xF3RR9H9aU ca4NJU3H7m4YfCBukY5+xakLaYbgZ+eBAiCxH22yw8tqruXNmWmRf5znTZMvDfEg+UOY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Enumerations for Gather Data Sampling Message-Id: Date: Wed, 09 Aug 2023 23:52:27 +0000 commit 46a3c16f3656b1e0ba1a01669a85f57b61c37d74 Author: Andrew Cooper AuthorDate: Wed Jan 4 17:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Enumerations for Gather Data Sampling GDS_CTRL is introduced by the August 2023 microcode. GDS_NO is for current and future processors not susceptible to GDS. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 9f585f59d90c8d3a1b21369a852b7d7eee8a29b9) --- tools/misc/xen-cpuid.c | 3 ++- xen/arch/x86/include/asm/cpufeature.h | 2 ++ xen/arch/x86/include/asm/msr-index.h | 4 ++++ xen/arch/x86/spec_ctrl.c | 6 ++++-- xen/include/public/arch-x86/cpufeatureset.h | 2 ++ 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 10421cbdbd..d2912c096b 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -235,7 +235,8 @@ static const char *const str_m10Al[32] = [18] = "fb-clear-ctrl", [19] = "rrsba", [20] = "bhi-no", [21] = "xapic-status", /* 22 */ [23] = "ovrclk-status", - [24] = "pbrsb-no", + [24] = "pbrsb-no", [25] = "gds-ctrl", + [26] = "gds-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index ec9456e1fd..458806cc8c 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -156,6 +156,8 @@ #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) #define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) +#define cpu_has_gds_ctrl boot_cpu_has(X86_FEATURE_GDS_CTRL) +#define cpu_has_gds_no boot_cpu_has(X86_FEATURE_GDS_NO) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 40450b66ad..2e0f9caee0 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -86,6 +86,8 @@ #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) +#define ARCH_CAPS_GDS_CTRL (_AC(1, ULL) << 25) +#define ARCH_CAPS_GDS_NO (_AC(1, ULL) << 26) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) @@ -104,6 +106,8 @@ #define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1) #define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2) #define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3) +#define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) +#define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) #define MSR_RTIT_OUTPUT_BASE 0x00000560 #define MSR_RTIT_OUTPUT_MASK 0x00000561 diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index c42ec3b8f6..d79374d63c 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -423,7 +423,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -438,6 +438,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", + (caps & ARCH_CAPS_GDS_NO) ? " GDS_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", @@ -448,7 +449,7 @@ static void __init print_details(enum ind_thunk thunk) (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -465,6 +466,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (caps & ARCH_CAPS_GDS_CTRL) ? " GDS_CTRL" : "", (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 2fc8158024..d6ce4af6f5 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -327,6 +327,8 @@ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection * XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ +XEN_CPUFEATURE(GDS_CTRL, 16*32+25) /* MCU_OPT_CTRL.GDS_MIT_{DIS,LOCK} */ +XEN_CPUFEATURE(GDS_NO, 16*32+26) /*A No Gather Data Sampling */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:38 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581560.910445 (Exim 4.92) (envelope-from ) id 1qTsyk-0001pu-3U; Wed, 09 Aug 2023 23:52:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581560.910445; Wed, 09 Aug 2023 23:52:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyk-0001pl-0a; Wed, 09 Aug 2023 23:52:38 +0000 Received: by outflank-mailman (input) for mailman id 581560; Wed, 09 Aug 2023 23:52:37 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyj-0001pR-CE for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:37 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyj-0008Fu-BW for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:37 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsyj-000681-7V for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:37 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LXjJqtw42i5iFlv8T4P5t9OKrxyyNm/1GyT+dPcZsm0=; b=jjSjj7WgFcrtRlF8yJY7COXw9r zYVXOnOXTX45bzyDZC4maHXeE6+K2cbiMpJipynDjKkPayX2Tow5Ns4LtSL8F8f5n/22SbtC8bxyM U+C0EMVHUfXpNJgPVV8lR5c/JjK9B4UNUyYSx398r8epEDZ5A1B76L6wMZOBFz/++M4U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86/spec-ctrl: Mitigate Gather Data Sampling Message-Id: Date: Wed, 09 Aug 2023 23:52:37 +0000 commit b9ade05cbba977673d5a08bc7a5940c5fd8add0e Author: Andrew Cooper AuthorDate: Wed Jan 4 16:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/spec-ctrl: Mitigate Gather Data Sampling This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56d690efd3ca3c68e1d222f259fb3d216206e8e5) --- docs/misc/xen-command-line.pandoc | 10 ++- xen/arch/x86/spec_ctrl.c | 158 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6169c52018..d9dae740cc 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2315,7 +2315,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`). > {msr-sc,rsb,md-clear,ibpb-entry}=|{pv,hvm}=, > bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd, > eager-fpu,l1d-flush,branch-harden,srb-lock, -> unpriv-mmio}= ]` +> unpriv-mmio,gds-mit}= ]` Controls for speculative execution sidechannel mitigations. By default, Xen will pick the most appropriate mitigations based on compiled in support, @@ -2429,6 +2429,14 @@ and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode release to mitigate cross-domain leakage of data via the MMIO Stale Data vulnerabilities. +On all hardware, the `gds-mit=` option can be used to force or prevent Xen +from mitigating the GDS (Gather Data Sampling) vulnerability. By default, Xen +will mitigate GDS on hardware believed to be vulnerable. On hardware +supporting GDS_CTRL (requires the August 2023 microcode), and where firmware +has elected not to lock the configuration, Xen will use GDS_CTRL to mitigate +GDS with. Otherwise, Xen will mitigate by disabling AVX, which blocks the use +of the AVX2 Gather instructions. + ### sync_console > `= ` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index d79374d63c..79b98f0fe7 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -78,6 +78,7 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. static int8_t __initdata opt_srb_lock = -1; static bool __initdata opt_unpriv_mmio; static bool __ro_after_init opt_fb_clear_mmio; +static int8_t __initdata opt_gds_mit = -1; static int __init cf_check parse_spec_ctrl(const char *s) { @@ -131,6 +132,7 @@ static int __init cf_check parse_spec_ctrl(const char *s) opt_branch_harden = false; opt_srb_lock = 0; opt_unpriv_mmio = false; + opt_gds_mit = 0; } else if ( val > 0 ) rc = -EINVAL; @@ -281,6 +283,8 @@ static int __init cf_check parse_spec_ctrl(const char *s) opt_srb_lock = val; else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 ) opt_unpriv_mmio = val; + else if ( (val = parse_boolean("gds-mit", s, ss)) >= 0 ) + opt_gds_mit = val; else rc = -EINVAL; @@ -1279,6 +1283,158 @@ static __init void mds_calculations(void) } } +static bool __init cpu_has_gds(void) +{ + /* + * Any part advertising GDS_NO should be not vulnerable to GDS. This + * includes cases where the hypervisor is mitigating behind our backs, or + * has synthesized GDS_NO on older parts for levelling purposes. + */ + if ( cpu_has_gds_no ) + return false; + + /* + * On real hardware the GDS_CTRL control only exists on parts vulnerable + * to GDS and with up-to-date microcode. It might also be virtualised by + * an aware hypervisor, meaning "somewhere you might migrate to is + * vulnerable". + */ + if ( cpu_has_gds_ctrl ) + return true; + + /* + * An attacker requires the use of the AVX2 GATHER instructions to leak + * data with GDS. However, the only way to block those instructions is to + * prevent XCR0[2] from being set, which is original AVX. A hypervisor + * might do this as a stopgap mitigation. + */ + if ( !cpu_has_avx ) + return false; + + /* + * GDS affects the Core line from Skylake up to but not including Golden + * Cove (Alder Lake, Sapphire Rapids). Broadwell and older, and the Atom + * line, and all hybrid parts are unaffected. + */ + switch ( boot_cpu_data.x86_model ) + { + case 0x55: /* Skylake/Cascade Lake/Cooper Lake SP */ + case 0x6a: /* Ice Lake SP */ + case 0x6c: /* Ice Lake D */ + case 0x7e: /* Ice Lake U/Y */ + case 0x8c: /* Tiger Lake U */ + case 0x8d: /* Tiger Lake H */ + case 0x8e: /* Amber/Kaby/Coffee/Whiskey/Comet lake U/Y */ + case 0x9e: /* Kaby/Coffee lake H/S/Xeon */ + case 0xa5: /* Comet Lake H/S */ + case 0xa6: /* Comet Lake U */ + case 0xa7: /* Rocket Lake */ + return true; + + default: + /* + * If we've got here and are virtualised, we're most likely under a + * hypervisor unaware of GDS at which point we've lost. Err on the + * safe side. + */ + return cpu_has_hypervisor; + } +} + +static void __init gds_calculations(void) +{ + bool cpu_has_bug_gds, mitigated = false; + + /* GDS is only known to affect Intel Family 6 processors at this time. */ + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + cpu_has_bug_gds = cpu_has_gds(); + + /* + * If we've got GDS_CTRL, we're either native with up-to-date microcode on + * a GDS-vulnerable part, or virtualised under a GDS-aware hypervisor. + */ + if ( cpu_has_gds_ctrl ) + { + bool locked; + uint64_t opt_ctrl; + + if ( cpu_has_gds_no ) + { + /* + * We don't expect to ever see GDS_CTL and GDS_NO set together. + * Complain loudly, and forgo playing with other features. + */ + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: GDS_CTRL && GDS_NO\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, this_cpu(cpu_sig).rev); + return add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + rdmsrl(MSR_MCU_OPT_CTRL, opt_ctrl); + + mitigated = !(opt_ctrl & MCU_OPT_CTRL_GDS_MIT_DIS); + locked = opt_ctrl & MCU_OPT_CTRL_GDS_MIT_LOCK; + + /* + * Firmware will lock the GDS mitigation if e.g. SGX is active. + * Alternatively, a hypervisor might virtualise GDS_CTRL as locked. + * Warn if the mitigiation is locked and the user requested the + * opposite configuration. + */ + if ( locked ) + { + if ( opt_gds_mit >= 0 && opt_gds_mit != mitigated ) + printk(XENLOG_WARNING + "GDS_MIT locked by firwmare - ignoring spec-ctrl=gds-mit setting\n"); + opt_gds_mit = mitigated; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * Latch our choice of GDS_MIT for all CPUs to pick up. If LOCK is + * set, we latch the same value as it currently holds. + */ + set_in_mcu_opt_ctrl(MCU_OPT_CTRL_GDS_MIT_DIS, + opt_gds_mit ? 0 : MCU_OPT_CTRL_GDS_MIT_DIS); + mitigated = opt_gds_mit; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * If we think we're not on vulnerable hardware, or we've mitigated GDS, + * synthesize GDS_NO. This is mostly for the benefit of guests, to inform + * them not to panic. + */ + if ( !cpu_has_bug_gds || mitigated ) + return setup_force_cpu_cap(X86_FEATURE_GDS_NO); + + /* + * If all else has failed, mitigate by disabling AVX. This prevents + * guests from enabling %xcr0.ymm, thereby blocking the use of VGATHER + * instructions. + * + * There's at least one affected CPU not expected to recieve a microcode + * update, and this is the only remaining mitigation. + * + * If we're virtualised, this prevents our guests attacking each other, + * but it doesn't stop the outer hypervisor's guests attacking us. Leave + * a note to this effect. + */ + if ( cpu_has_avx && opt_gds_mit ) + { + setup_clear_cpu_cap(X86_FEATURE_AVX); + printk(XENLOG_WARNING "Mitigating GDS by disabling AVX%s\n", + cpu_has_hypervisor ? + " while virtualised - protections are best-effort" : ""); + } +} + void spec_ctrl_init_domain(struct domain *d) { bool pv = is_pv_domain(d); @@ -1758,6 +1914,8 @@ void __init init_speculation_mitigations(void) opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } + gds_calculations(); + print_details(thunk); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:48 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581561.910449 (Exim 4.92) (envelope-from ) id 1qTsyu-0001t7-6b; Wed, 09 Aug 2023 23:52:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581561.910449; Wed, 09 Aug 2023 23:52:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyu-0001sz-3i; Wed, 09 Aug 2023 23:52:48 +0000 Received: by outflank-mailman (input) for mailman id 581561; Wed, 09 Aug 2023 23:52:47 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyt-0001sk-F7 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:47 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsyt-0008GF-EN for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:47 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsyt-00068d-Dj for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:47 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QPYuCQK+0Ret1YuWSmnP4b9cYFVuOYrTdvaThHyhBqA=; b=37GgGb6sowg97xS/Ic9KTF0IXI jlVKOnj5TTsyIY7cdde7D5Mv880IYcBJtGpAJprKLOy9gCROLfRj1KTCXWXOVh9+lE+/fsq+AGEFs FlZgNdCEF8bVvW09uzIxOIx0PhBe69q31kxV7oWeDiW2ym/WaaXBBC0O8xmwr8ozKf7I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] Update Xen to version 4.17.2 Message-Id: Date: Wed, 09 Aug 2023 23:52:47 +0000 commit 322a20add00a4687cd46d9183616fa6fecbef81f Author: Andrew Cooper AuthorDate: Mon Aug 7 12:11:56 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:17 2023 +0100 Update Xen to version 4.17.2 Signed-off-by: Andrew Cooper --- Config.mk | 2 +- xen/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index d474fc6242..8bc2bcd5f6 100644 --- a/Config.mk +++ b/Config.mk @@ -229,7 +229,7 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 -QEMU_UPSTREAM_REVISION ?= eeaede60ffb1760c06850cae562d104e4f98c859 +QEMU_UPSTREAM_REVISION ?= qemu-xen-4.17.2 MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.17.1 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 diff --git a/xen/Makefile b/xen/Makefile index 9bb0c13ff2..fbada570b8 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 17 -export XEN_EXTRAVERSION ?= .2-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .2$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:52:59 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:52:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581562.910454 (Exim 4.92) (envelope-from ) id 1qTsz5-0001vz-87; Wed, 09 Aug 2023 23:52:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581562.910454; Wed, 09 Aug 2023 23:52:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsz5-0001vp-5D; Wed, 09 Aug 2023 23:52:59 +0000 Received: by outflank-mailman (input) for mailman id 581562; Wed, 09 Aug 2023 23:52:58 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsz4-0001vX-F4 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:58 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsz4-0008GJ-EM for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:58 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTsz4-0006HP-DY for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:52:58 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zrMWpiW5V47dw/yw+JSenCiYABiICetlnWhSrHTifUw=; b=yLgZHy1QsiTRE7hARE/FZAjfFl zCrEdRIZihyFOuheCc/sSXPtTK9msRhPD31IUGhN/XxQbpcrwpCF8P8uCZ+qNiUgWhAnLNm+tc37R Nz7EtwzzH8PSGCKUqDi3S6rrIZlUcsMQOxynC4xRtZTrLXMDQoNA/9EhnLeeLv36XdR8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/msr: Expose MSR_ARCH_CAPS in the raw and host policies Message-Id: Date: Wed, 09 Aug 2023 23:52:58 +0000 commit 62549f81869638a65efe879d23c9c4573b7e45d4 Author: Andrew Cooper AuthorDate: Fri Jun 11 11:37:53 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:18 2023 +0100 x86/msr: Expose MSR_ARCH_CAPS in the raw and host policies MSR_ARCH_CAPS is still not supported for guests yet (other than the hardware domain), until the toolstack learns how to construct an MSR policy. However, we want access to the host ARCH_CAPS_TSX_CTRL value in particular for testing purposes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit b672695e748869b2e2e2cb03f671f12003d2b079) Also the remnants of: x86: Expose more MSR_ARCH_CAPS to hwdom (cherry picked from commit e83cd54611fec5b7a539fa1281a14319143490e6) x86/spec-ctrl: Enumeration for PBRSB_NO (cherry picked from commit b874e47eb13feb75be3ee7b5dc4ae9c97d80d774) which have both partially been backported already. --- xen/arch/x86/msr.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 576235e507..7b2add4f8d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -47,8 +47,13 @@ struct msr_policy __read_mostly hvm_def_msr_policy; static void __init calculate_raw_policy(void) { + struct msr_policy *mp = &raw_msr_policy; + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -60,6 +65,12 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + mp->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO); } static void __init calculate_pv_max_policy(void) @@ -67,6 +78,8 @@ static void __init calculate_pv_max_policy(void) struct msr_policy *mp = &pv_max_msr_policy; *mp = host_msr_policy; + + mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -84,6 +97,8 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; + + mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:53:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:53:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581563.910457 (Exim 4.92) (envelope-from ) id 1qTszF-0001yr-9I; Wed, 09 Aug 2023 23:53:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581563.910457; Wed, 09 Aug 2023 23:53:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszF-0001yk-6e; Wed, 09 Aug 2023 23:53:09 +0000 Received: by outflank-mailman (input) for mailman id 581563; Wed, 09 Aug 2023 23:53:08 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszE-0001yZ-I4 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:08 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszE-0008Ga-HI for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:08 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTszE-0006IG-Gc for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:08 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=p7gUuy3J/fjcvlNro9IhkJKwhPM+rFGaKPs5rllZIaQ=; b=DrlWd4qSAikX1FI6pq5Vzqbnye 1xIjg/LxV7Kv2HvNUfO7AUPiwiSIYuWygK/TC2oRQYXSPfGbZzLRrvneeA3x8ruBCuBW3pmckcbQT xrZBSy5ZUyGpaw7dMy4+za/cfRBXrr6Qadxeoj0Yx2Zlj+UJaCKU6AYzMoQ05QVbnD8c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Expose more MSR_ARCH_CAPS to hwdom Message-Id: Date: Wed, 09 Aug 2023 23:53:08 +0000 commit 155d38c76c3f04a20f7603e533a5ab247dd6d3ea Author: Jason Andryuk AuthorDate: Tue Jul 19 16:08:15 2022 -0400 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Expose more MSR_ARCH_CAPS to hwdom commit e46474278a0e ("x86/intel: Expose MSR_ARCH_CAPS to dom0") started exposing MSR_ARCH_CAPS to dom0. More bits in MSR_ARCH_CAPS have since been defined, but they haven't been exposed. Update the list to allow them through. As one example, this allows a Linux Dom0 to know that it has the appropriate microcode via FB_CLEAR. Notably, and with the updated microcode, this changes dom0's /sys/devices/system/cpu/vulnerabilities/mmio_stale_data changes from: "Vulnerable: Clear CPU buffers attempted, no microcode; SMT Host state unknown" to: "Mitigation: Clear CPU buffers; SMT Host state unknown" This exposes the MMIO Stale Data and Intel Branch History Injection (BHI) controls as well as the page size change MCE issue bit. Fixes: commit 2ebe8fe9b7e0 ("x86/spec-ctrl: Enumeration for MMIO Stale Data controls") Fixes: commit cea9ae062295 ("x86/spec-ctrl: Enumeration for new Intel BHI controls") Fixes: commit 59e89cdabc71 ("x86/vtx: Disable executable EPT superpages to work around CVE-2018-12207") Signed-off-by: Jason Andryuk Acked-by: Andrew Cooper (cherry picked from commit e83cd54611fec5b7a539fa1281a14319143490e6) --- xen/arch/x86/msr.c | 9 +++++++-- xen/include/asm-x86/msr-index.h | 2 ++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 7b2add4f8d..527205518c 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -70,7 +70,9 @@ static void __init calculate_host_policy(void) mp->arch_caps.raw &= (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO); + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO); } static void __init calculate_pv_max_policy(void) @@ -159,7 +161,10 @@ int init_domain_msr_policy(struct domain *d) mp->arch_caps.raw = val & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_TAA_NO); + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO); } d->arch.msr = mp; diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 4c1cba589d..63b77cd19a 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -61,6 +61,8 @@ #define ARCH_CAPS_PSDP_NO (_AC(1, ULL) << 15) #define ARCH_CAPS_FB_CLEAR (_AC(1, ULL) << 17) #define ARCH_CAPS_FB_CLEAR_CTRL (_AC(1, ULL) << 18) +#define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) +#define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:53:19 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:53:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581564.910461 (Exim 4.92) (envelope-from ) id 1qTszP-00021f-Af; Wed, 09 Aug 2023 23:53:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581564.910461; Wed, 09 Aug 2023 23:53:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszP-00021X-89; Wed, 09 Aug 2023 23:53:19 +0000 Received: by outflank-mailman (input) for mailman id 581564; Wed, 09 Aug 2023 23:53:18 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszO-00021N-Ku for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:18 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszO-0008Gi-KE for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:18 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTszO-0006Ik-JY for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:18 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TvLYszoU1b3sFgr0EIyrdFsS2DoOz1uohNChm16AOFQ=; b=LxLl8c0lbTFMCGXu05VGHosXWY YqDNBTzGbLQ4SCyLD4epZqFRfeInqsHXPbgtbsJspqjEo2eRiicbXAXDRhktMdEhybrRzKlvJHSpD BhJZ+iO0UQlgueFs3qTONp3HgqIDDXHcLT3wA2wqPjQeJCuNNqgyZppWN6JCAVlWGb4Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Enumeration for PBRSB_NO Message-Id: Date: Wed, 09 Aug 2023 23:53:18 +0000 commit c47bfc94c0817361f7bbfe62f215e17b0125d551 Author: Andrew Cooper AuthorDate: Fri Jul 29 14:22:53 2022 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Enumeration for PBRSB_NO The PBRSB_NO bit indicates that the CPU is not vulnerable to the Post-Barrier RSB speculative vulnerability. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit b874e47eb13feb75be3ee7b5dc4ae9c97d80d774) --- xen/arch/x86/msr.c | 5 +++-- xen/arch/x86/spec_ctrl.c | 3 ++- xen/include/asm-x86/msr-index.h | 1 + 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 527205518c..6517e50c9f 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -72,7 +72,8 @@ static void __init calculate_host_policy(void) ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO); + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); } static void __init calculate_pv_max_policy(void) @@ -164,7 +165,7 @@ int init_domain_msr_policy(struct domain *d) ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO); + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); } d->arch.msr = mp; diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index c650e07b06..9ce493d6bc 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -419,7 +419,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -431,6 +431,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) (caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "", (caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "", (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", + (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 63b77cd19a..ce5677f3b6 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -63,6 +63,7 @@ #define ARCH_CAPS_FB_CLEAR_CTRL (_AC(1, ULL) << 18) #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) +#define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:53:30 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:53:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581565.910466 (Exim 4.92) (envelope-from ) id 1qTsza-00024j-DT; Wed, 09 Aug 2023 23:53:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581565.910466; Wed, 09 Aug 2023 23:53:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTsza-00024Y-9a; Wed, 09 Aug 2023 23:53:30 +0000 Received: by outflank-mailman (input) for mailman id 581565; Wed, 09 Aug 2023 23:53:29 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszZ-000249-0s for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:29 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszY-0008Go-N5 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:28 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTszY-0006JC-MS for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:28 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5MSMkRqBSuXIGtKocqisnn+i7c2zR2sllcuu+gpT80g=; b=Eq2SJW42J+G9uX2h/ytgum42Cp 3PxLGsxKGr//jmTuu5Nyt+uSL9TFtlobOeLTIESwxBche4ahcfbWXV/jPGo1rjZG57UgiV1DiMfxI RBh6SK5GqseTdj7gNlQFIPgb1YCFWgfDywhyQ3sH89CPFuqUsRQfKylVybIAO+avgoRw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully Message-Id: Date: Wed, 09 Aug 2023 23:53:28 +0000 commit f99038fe4fba605e77a54cf8a57e9dadc90d4851 Author: Andrew Cooper AuthorDate: Wed May 10 19:58:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully When adding new featureset words, it is convenient to split the work into several patches. However, GCC 12 spotted that the way we prefer to split the work results in a real (transient) breakage whereby the policy <-> featureset helpers perform out-of-bounds accesses on the featureset array. Fix this by having gen-cpuid.py calculate FEATURESET_NR_ENTRIES from the comments describing the word blocks, rather than from the XEN_CPUFEATURE() with the greatest value. For simplicty, require that the word blocks appear in order. This can be revisted if we find a good reason to have blocks out of order. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56e2c8e5860090a35d5f0cafe168223a2a7c0e62) --- xen/tools/gen-cpuid.py | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index e77672ddcd..d813e92118 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -50,13 +50,37 @@ def parse_definitions(state): "\s+([\s\d]+\*[\s\d]+\+[\s\d]+)\)" "\s+/\*([\w!]*) .*$") + word_regex = re.compile( + r"^/\* .* word (\d*) \*/$") + last_word = -1 + this = sys.modules[__name__] for l in state.input.readlines(): - # Short circuit the regex... - if not l.startswith("XEN_CPUFEATURE("): + + # Short circuit the regexes... + if not (l.startswith("XEN_CPUFEATURE(") or + l.startswith("/* ")): continue + # Handle /* ... word $N */ lines + if l.startswith("/* "): + + res = word_regex.match(l) + if res is None: + continue # Some other comment + + word = int(res.groups()[0]) + + if word != last_word + 1: + raise Fail("Featureset word %u out of order (last word %u)" + % (word, last_word)) + + last_word = word + state.nr_entries = word + 1 + continue + + # Handle XEN_CPUFEATURE( lines res = feat_regex.match(l) if res is None: @@ -94,6 +118,15 @@ def parse_definitions(state): if len(state.names) == 0: raise Fail("No features found") + if state.nr_entries == 0: + raise Fail("No featureset word info found") + + max_val = max(state.names.keys()) + if (max_val >> 5) >= state.nr_entries: + max_name = state.names[max_val] + raise Fail("Feature %s (%d*32+%d) exceeds FEATURESET_NR_ENTRIES (%d)" + % (max_name, max_val >> 5, max_val & 31, state.nr_entries)) + def featureset_to_uint32s(fs, nr): """ Represent a featureset as a list of C-compatible uint32_t's """ @@ -122,9 +155,6 @@ def format_uint32s(state, featureset, indent): def crunch_numbers(state): - # Size of bitmaps - state.nr_entries = nr_entries = (max(state.names.keys()) >> 5) + 1 - # Features common between 1d and e1d. common_1d = (FPU, VME, DE, PSE, TSC, MSR, PAE, MCE, CX8, APIC, MTRR, PGE, MCA, CMOV, PAT, PSE36, MMX, FXSR) @@ -325,7 +355,7 @@ def crunch_numbers(state): state.nr_deep_deps = len(state.deep_deps.keys()) # Calculate the bitfield name declarations - for word in range(nr_entries): + for word in range(state.nr_entries): names = [] for bit in range(32): -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:53:40 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:53:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581566.910468 (Exim 4.92) (envelope-from ) id 1qTszk-00027V-Dg; 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Wed, 09 Aug 2023 23:53:38 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UdnWymZpAr4oBHCPDWkvvNRrrDrDQWFb9GFPHcrXgSc=; b=RgTWUArRqH7Kiq2pTdLU0QkUcW IStF/H/FjBPHgXnw/OX7CGCJrLEZmmyVTresthN6252/n4Xp+e1Welu49kRm73btCHQJdjHiqoULc kAsHJIHfvkaJ96PNttBOwxccwzp3t/qoksO7hV0AHSrPA28phDQDBJj7aef6xlypq8v8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Infrastructure for leaves 7:1{ecx,edx} Message-Id: Date: Wed, 09 Aug 2023 23:53:38 +0000 commit 56c68aec53154ee8f28a713f6fa141e1dc3f2dd4 Author: Andrew Cooper AuthorDate: Fri Mar 3 08:06:44 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Infrastructure for leaves 7:1{ecx,edx} We don't actually need ecx yet, but adding it in now will reduce the amount to which leaf 7 is out of order in a featureset. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit b4a23bf6293aadecfd03bf9e83974443e2eac9cb) --- tools/misc/xen-cpuid.c | 10 ++++++++++ xen/arch/x86/cpu/common.c | 3 ++- xen/include/public/arch-x86/cpufeatureset.h | 4 ++++ xen/include/xen/lib/x86/cpuid.h | 17 +++++++++++++++-- 4 files changed, 31 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 7771da4953..913e0e5dc1 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -193,6 +193,14 @@ static const char *const str_7b1[32] = { }; +static const char *const str_7c1[32] = +{ +}; + +static const char *const str_7d1[32] = +{ +}; + static const char *const str_7d2[32] = { [ 0] = "intel-psfd", @@ -218,6 +226,8 @@ static const struct { { "0x80000021.eax", "e21a", str_e21a }, { "0x00000007:1.ebx", "7b1", str_7b1 }, { "0x00000007:2.edx", "7d2", str_7d2 }, + { "0x00000007:1.ecx", "7c1", str_7c1 }, + { "0x00000007:1.edx", "7d1", str_7d1 }, }; #define COL_ALIGN "18" diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index dd592a69c5..70e6dea04a 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -435,7 +435,8 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(7, 1, &c->x86_capability[FEATURESET_7a1], &c->x86_capability[FEATURESET_7b1], - &tmp, &tmp); + &c->x86_capability[FEATURESET_7c1], + &c->x86_capability[FEATURESET_7d1]); if (max_subleaf >= 2) cpuid_count(7, 2, &tmp, &tmp, &tmp, diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index e536ab42b3..b09d5bd907 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -295,6 +295,10 @@ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ /* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ +/* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */ + +/* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h index 50be07c0eb..fa98b371ee 100644 --- a/xen/include/xen/lib/x86/cpuid.h +++ b/xen/include/xen/lib/x86/cpuid.h @@ -17,7 +17,9 @@ #define FEATURESET_7a1 10 /* 0x00000007:1.eax */ #define FEATURESET_e21a 11 /* 0x80000021.eax */ #define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x80000007:2.edx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ struct cpuid_leaf { @@ -194,7 +196,14 @@ struct cpuid_policy uint32_t _7b1; struct { DECL_BITFIELD(7b1); }; }; - uint32_t /* c */:32, /* d */:32; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; /* Subleaf 2. */ uint32_t /* a */:32, /* b */:32, /* c */:32; @@ -343,6 +352,8 @@ static inline void cpuid_policy_to_featureset( fs[FEATURESET_e21a] = p->extd.e21a; fs[FEATURESET_7b1] = p->feat._7b1; fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; } /* Fill in a CPUID policy from a featureset bitmap. */ @@ -363,6 +374,8 @@ static inline void cpuid_featureset_to_policy( p->extd.e21a = fs[FEATURESET_e21a]; p->feat._7b1 = fs[FEATURESET_7b1]; p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; } static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:53:50 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:53:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581567.910474 (Exim 4.92) (envelope-from ) id 1qTszu-0002Ap-Hl; Wed, 09 Aug 2023 23:53:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581567.910474; Wed, 09 Aug 2023 23:53:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszu-0002Ai-EL; Wed, 09 Aug 2023 23:53:50 +0000 Received: by outflank-mailman (input) for mailman id 581567; Wed, 09 Aug 2023 23:53:48 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszs-0002AI-Tl for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:48 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTszs-0008Io-T8 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:48 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTszs-0006KI-SU for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:48 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KrbiIGwPgfcht2mu+q3fRHLVgTwtZur67vSp0pSO1vs=; b=VyNgy4MREdRsupH/yX/3+wnI+I 6dY2ySmumcf/K4zr695gnaArM/5JCB7yl0QYl+cUuNfKLY+OKGbB+0DXq0YN4BXWsN3AiLeZL0Ibt 4IKWC5yK6ppqNWNs9Lx69TTY2AX6Zb97ASCOzSeKhk1KM+ObM2B66nA6OHudAjgXXBBM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Drop special_features[] Message-Id: Date: Wed, 09 Aug 2023 23:53:48 +0000 commit 0eafe6ac6ac0df7c92dfb50caf02c27a16cb4a3c Author: Andrew Cooper AuthorDate: Mon Jun 7 13:38:53 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Drop special_features[] While the ! annotation is useful to indicate that something special is happening, an array of bits is not. Drop it, to prevent mistakes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 69e1472d21cf7e5cf0795ef38b99d00de78a910e) x86/cpuid: Half revert "x86/cpuid: Drop special_features[]" xen-cpuid does print out the list of special features, and this is helpful to keep. Fixes: 69e1472d21cf ("x86/cpuid: Drop special_features[]") Reported-by: Jan Beulich Reported-by: Sander Eikelenboom Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 0ba0663b1b32d9351890dfd02bdebb3d238897bd) --- xen/arch/x86/cpuid.c | 2 -- xen/include/asm-x86/cpuid.h | 1 - 2 files changed, 3 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 587de66545..3a7c3f497c 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -14,7 +14,6 @@ #include const uint32_t known_features[] = INIT_KNOWN_FEATURES; -const uint32_t special_features[] = INIT_SPECIAL_FEATURES; static const uint32_t pv_max_featuremask[] = INIT_PV_MAX_FEATURES; static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; @@ -1133,7 +1132,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, static void __init __maybe_unused build_assertions(void) { BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(special_features) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 7baf6c9628..46904061d0 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -14,7 +14,6 @@ #include extern const uint32_t known_features[FSCAPINTS]; -extern const uint32_t special_features[FSCAPINTS]; void init_guest_cpuid(void); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:00 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581568.910476 (Exim 4.92) (envelope-from ) id 1qTt04-0002DG-IL; Wed, 09 Aug 2023 23:54:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581568.910476; Wed, 09 Aug 2023 23:54:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt04-0002D9-Fs; Wed, 09 Aug 2023 23:54:00 +0000 Received: by outflank-mailman (input) for mailman id 581568; Wed, 09 Aug 2023 23:53:59 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt03-0002Cu-0U for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:59 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt02-0008Iy-W5 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:58 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt02-0006Kt-VL for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:53:58 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IOGPJvhA5lDJmGjt0DKH3DEla13vZdap3ENQt8sdEPQ=; b=S4q15FQDx16iRvH3BwKzTNkP5H 2TIJJc+wYn6rEOT7KLUe+0pIbH57fsBqKLKg87+JnIP0pnfcoHEgRdHh+X57s/WNyjCkYH4fsVggb qEG1TuuhUi0vizrqSC2tZrbYYXyGc7zZafNLIjfIjoOpNv6L8xCKsfgdOeIVJhlRrUkY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/CPUID: move some static masks into .init Message-Id: Date: Wed, 09 Aug 2023 23:53:58 +0000 commit 1814dd3df7f9b93bfd840d5192477596774f85fb Author: Jan Beulich AuthorDate: Fri Apr 9 09:14:25 2021 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/CPUID: move some static masks into .init Except for hvm_shadow_max_featuremask and deep_features they're referenced by __init functions only. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné (cherry picked from commit 186b09ea01c925c3997f1a05f585b35151d32d1a) --- xen/arch/x86/cpuid.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 3a7c3f497c..88eae2a09e 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -15,12 +15,15 @@ const uint32_t known_features[] = INIT_KNOWN_FEATURES; -static const uint32_t pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t hvm_hap_max_featuremask[] = INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t hvm_shadow_def_featuremask[] = INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t hvm_hap_def_featuremask[] = INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static int __init parse_xen_cpuid(const char *s) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581569.910481 (Exim 4.92) (envelope-from ) id 1qTt0E-0002GV-KO; Wed, 09 Aug 2023 23:54:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581569.910481; Wed, 09 Aug 2023 23:54:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0E-0002GN-HL; Wed, 09 Aug 2023 23:54:10 +0000 Received: by outflank-mailman (input) for mailman id 581569; Wed, 09 Aug 2023 23:54:09 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0D-0002G0-3X for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:09 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0D-0008JF-2q for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:09 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt0D-0006LT-2D for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:09 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=VksiUsJE/5s7RYXlYsMBL31Eq36UQCw566xyNsBT/HE=; b=2ixRnScgl2akNBkLKvils+Kmtu DQ9jlVW7Bo6QQC7qlM5OCPIWUgvw6+emQU8O6+3DNFJhFqXZZElL/8GG2pLDI2blfFLSqh1esyiQC ZRa8PdMbrX2sGiG3H1EE8D07NOeW1DnLmcAEhzEFHBvPvoGmHxInuEN9osqO3g2/Tg0k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() Message-Id: Date: Wed, 09 Aug 2023 23:54:09 +0000 commit ceea0ecc3ec6fecdf834bcec5bf32acb55a7831e Author: Andrew Cooper AuthorDate: Wed Dec 15 15:36:59 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() To implement dom0-cpuid= support, the special cases would need extending. However there is already a problem with late hwdom where the special cases override toolstack settings, which is unintended and poor behaviour. Introduce a new init_dom0_cpuid_policy() for the purpose, moving the ITSC and ARCH_CAPS logic. The is_hardware_domain() can be dropped, and for now there is no need to rerun recalculate_cpuid_policy(); this is a relatively expensive operation, and will become more-so over time. Rearrange the logic in create_dom0() to make room for a call to init_dom0_cpuid_policy(). The AMX plans for having variable sized XSAVE states require that modifications to the policy happen before vCPUs are created. Additionally, factor out domid into a variable so we can be slightly more correct in the case of a failure, and also print the error from domain_create(). This will at least help distinguish -EINVAL from -ENOMEM. No practical change in behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c17072fc164a72583fda8e2b836c71d2e3f8e84d) --- xen/arch/x86/cpuid.c | 24 +++++++++++++++--------- xen/arch/x86/setup.c | 15 +++++++++++---- xen/include/asm-x86/cpuid.h | 3 +++ 3 files changed, 29 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 88eae2a09e..01fd016522 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -744,22 +744,28 @@ int init_domain_cpuid_policy(struct domain *d) if ( !p ) return -ENOMEM; - if ( d->disable_migrate ) - p->extd.itsc = cpu_has_itsc; + d->arch.cpuid = p; + + recalculate_cpuid_policy(d); + + return 0; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpuid_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; /* * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) + if ( cpu_has_arch_caps ) p->feat.arch_caps = true; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; } void guest_cpuid(const struct vcpu *v, uint32_t leaf, diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 29d71087a7..44b09b8be9 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -770,6 +770,7 @@ static struct domain *__init create_dom0(const module_t *image, }; struct domain *d; char *cmdline; + domid_t domid; if ( opt_dom0_pvh ) { @@ -784,10 +785,16 @@ static struct domain *__init create_dom0(const module_t *image, if ( iommu_enabled ) dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu; - /* Create initial domain 0. */ - d = domain_create(get_initial_domain_id(), &dom0_cfg, !pv_shim); - if ( IS_ERR(d) || (alloc_dom0_vcpu0(d) == NULL) ) - panic("Error creating domain 0\n"); + /* Create initial domain. Not d0 for pvshim. */ + domid = get_initial_domain_id(); + d = domain_create(domid, &dom0_cfg, !pv_shim); + if ( IS_ERR(d) ) + panic("Error creating d%u: %ld\n", domid, PTR_ERR(d)); + + init_dom0_cpuid_policy(d); + + if ( alloc_dom0_vcpu0(d) == NULL ) + panic("Error creating d%uv0\n", domid); /* Grab the DOM0 command line. */ cmdline = image->string ? __va(image->string) : NULL; diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 46904061d0..9c3637549a 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -59,6 +59,9 @@ bool recheck_cpu_features(unsigned int cpu); /* Allocate and initialise a CPUID policy suitable for the domain. */ int init_domain_cpuid_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + /* Clamp the CPUID policy to reality. */ void recalculate_cpuid_policy(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581570.910485 (Exim 4.92) (envelope-from ) id 1qTt0O-0002JD-LZ; Wed, 09 Aug 2023 23:54:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581570.910485; Wed, 09 Aug 2023 23:54:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0O-0002J5-Ir; Wed, 09 Aug 2023 23:54:20 +0000 Received: by outflank-mailman (input) for mailman id 581570; Wed, 09 Aug 2023 23:54:19 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0N-0002If-6X for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:19 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0N-0008JJ-5r for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:19 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt0N-0006MB-56 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:19 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sqUaB3u1OMcsEB8uOuVHGhwNXwmJ0yIa+zz2xn2UI2Q=; b=eZNoKJ7kcU+UXrZ5sg3fLgeJg5 Z3Dcrsqc/PCrdKkD+jUdie4bUor4jmNGYqJaG9Cn63OPnLmN1p09MtTKXcdGWOWkUklBB/TX9qfvS gQmN4XkYwNsqRnlUDMCqCutX/aV2ebFsAprNrksFPgVBxTwNa9guXTQHNfG14q17UrqU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Factor common parsing out of parse_xen_cpuid() Message-Id: Date: Wed, 09 Aug 2023 23:54:19 +0000 commit 6a3b0205d5c737ef5ef9b34f04de8539f091f145 Author: Andrew Cooper AuthorDate: Wed Dec 15 16:30:25 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Factor common parsing out of parse_xen_cpuid() dom0-cpuid= is going to want to reuse the common parsing loop, so factor it out into parse_cpuid(). Irritatingly, despite being static const, the features[] array gets duplicated each time parse_cpuid() is inlined. As it is a large (and ever growing with new CPU features) datastructure, move it to being file scope so all inlines use the same single object. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94c3df9188d6deed6fe213754492b11b9d409262) --- xen/arch/x86/cpuid.c | 45 ++++++++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 01fd016522..4c98d3348b 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -26,17 +26,26 @@ static const uint32_t __initconst hvm_hap_def_featuremask[] = INIT_HVM_HAP_DEF_FEATURES; static const uint32_t deep_features[] = INIT_DEEP_FEATURES; -static int __init parse_xen_cpuid(const char *s) +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) { const char *ss; int val, rc = 0; do { - static const struct feature { - const char *name; - unsigned int bit; - } features[] __initconstrel = INIT_FEATURE_NAMES; - const struct feature *lhs, *rhs, *mid = NULL /* GCC... */; + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; const char *feat; ss = strchr(s, ','); @@ -49,8 +58,8 @@ static int __init parse_xen_cpuid(const char *s) feat += 3; /* (Re)initalise lhs and rhs for binary search. */ - lhs = features; - rhs = features + ARRAY_SIZE(features); + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); while ( lhs < rhs ) { @@ -72,11 +81,7 @@ static int __init parse_xen_cpuid(const char *s) if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) { - if ( !val ) - setup_clear_cpu_cap(mid->bit); - else if ( mid->bit == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); + callback(mid->bit, val); mid = NULL; } @@ -95,6 +100,20 @@ static int __init parse_xen_cpuid(const char *s) return rc; } + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} custom_param("cpuid", parse_xen_cpuid); #define EMPTY_LEAF ((struct cpuid_leaf){}) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:30 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581572.910488 (Exim 4.92) (envelope-from ) id 1qTt0Y-0002Lp-Mw; Wed, 09 Aug 2023 23:54:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581572.910488; Wed, 09 Aug 2023 23:54:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0Y-0002Li-KV; Wed, 09 Aug 2023 23:54:30 +0000 Received: by outflank-mailman (input) for mailman id 581572; Wed, 09 Aug 2023 23:54:29 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0X-0002LV-9X for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:29 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0X-0008JN-8u for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:29 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt0X-0006Mk-89 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:29 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=C1nua2oB6kTbVvNaa8UsDXkjc3/dnpPYbg1SyplW9SM=; b=Ccus+7DsE6nOVCLd1+4/Hrscu9 FqHhAbnmChFvT4xYaPc06Iijigj5ZkbwBy2VHMNgtgEz3Ek6ZApAqQ/C9JX+woLtj68HYR8Bh+/Tv PZ/TXEaP31+fcxEDFkQ7LgKv40nWSohcUBUb2Lmlrc2SVENnhQBAA/ZavEB3pqKu6F5o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpuid: Introduce dom0-cpuid command line option Message-Id: Date: Wed, 09 Aug 2023 23:54:29 +0000 commit 3690ddda21b1ea24177a3434c75f189f5b19e47b Author: Andrew Cooper AuthorDate: Tue Dec 14 16:53:36 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpuid: Introduce dom0-cpuid command line option Specifically, this lets the user opt in to non-default features. Collect all dom0 settings together in dom0_{en,dis}able_feat[], and apply it to dom0's policy when other tweaks are being made. As recalculate_cpuid_policy() is an expensive action, and dom0-cpuid= is likely to only be used by the x86 maintainers for development purposes, forgo the recalculation in the general case. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 5bd2b82df28cb7390f5ffb00fac635d0b9e36674) --- docs/misc/xen-command-line.pandoc | 16 ++++++++++++++++ xen/arch/x86/cpuid.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index f13304ef4e..2fd6a9a552 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -756,6 +756,22 @@ Controls for how dom0 is constructed on x86 systems. restore the pre-4.13 behaviour. If specifying `no-cpuid-faulting` fixes an issue in dom0, please report a bug. +### dom0-cpuid + = List of comma separated booleans + + Applicability: x86 + +This option allows for fine tuning of the facilities dom0 will use, after +accounting for hardware capabilities and Xen settings as enumerated via CPUID. + +Options are accepted in positive and negative form, to enable or disable +specific features. All selections via this mechanism are subject to normal +CPU Policy safety and dependency logic. + +This option is intended for developers to opt dom0 into non-default features, +and is not intended for use in production circumstances. If using this option +is necessary to fix an issue, please report a bug. + ### dom0-iommu = List of [ passthrough=, strict=, map-inclusive=, map-reserved=, none ] diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 4c98d3348b..832a5e95c9 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -116,6 +116,24 @@ static int __init parse_xen_cpuid(const char *s) } custom_param("cpuid", parse_xen_cpuid); +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + #define EMPTY_LEAF ((struct cpuid_leaf){}) static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) @@ -785,6 +803,25 @@ void __init init_dom0_cpuid_policy(struct domain *d) */ if ( cpu_has_arch_caps ) p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + cpuid_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + cpuid_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } } void guest_cpuid(const struct vcpu *v, uint32_t leaf, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:40 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581573.910495 (Exim 4.92) (envelope-from ) id 1qTt0i-0002Oh-PN; Wed, 09 Aug 2023 23:54:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581573.910495; Wed, 09 Aug 2023 23:54:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0i-0002OZ-Ly; Wed, 09 Aug 2023 23:54:40 +0000 Received: by outflank-mailman (input) for mailman id 581573; Wed, 09 Aug 2023 23:54:39 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0h-0002OG-CT for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:39 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0h-0008Jj-Br for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:39 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt0h-0006N9-B5 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:39 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mQz1UROpKMT7eL5oVfFTE78uz6w7LwDy7C2pumzwhWM=; b=M1ODKaTJbYBqeDCLKJ0yU5uszG WBONKv45UUxBEvqrXnRTNyOExLkMygb9JOc44A/jFb9qvDT6E/DfTkGKRqLWS/Ez21iGt2g2RUej7 sfibJ8ZSGm+OEDsyamzYMFlrNS8Bf9K7EyAciCQsR2k39g8kBnPj0m/zT1LayL5Y53qI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] tools/xen-cpuid: Rework the handling of dynamic featuresets Message-Id: Date: Wed, 09 Aug 2023 23:54:39 +0000 commit 25eb98c93cb084d935a51986b6323999c7d1e4be Author: Andrew Cooper AuthorDate: Fri Mar 10 19:04:22 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 tools/xen-cpuid: Rework the handling of dynamic featuresets struct fsinfo is the vestigial remnant of an older internal design which didn't survive very long. Simplify things by inlining get_featureset() and having a single memory allocation that gets reused. This in turn changes featuresets[] to be a simple list of names, so rename it to fs_names[]. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit ec3474e1dd42e6f410601f50b6e74fb7c442cfb9) --- tools/misc/xen-cpuid.c | 53 +++++++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 913e0e5dc1..6cb805c162 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -232,16 +232,11 @@ static const struct { #define COL_ALIGN "18" -static struct fsinfo { - const char *name; - uint32_t len; - uint32_t *fs; -} featuresets[] = -{ - [XEN_SYSCTL_cpu_featureset_host] = { "Host", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_raw] = { "Raw", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_pv] = { "PV", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_hvm] = { "HVM", 0, NULL }, +static const char *const fs_names[] = { + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_pv] = "PV", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", }; static void dump_leaf(uint32_t leaf, const char *const *strs) @@ -288,22 +283,10 @@ static void decode_featureset(const uint32_t *features, } } -static int get_featureset(xc_interface *xch, unsigned int idx) -{ - struct fsinfo *f = &featuresets[idx]; - - f->len = nr_features; - f->fs = calloc(nr_features, sizeof(*f->fs)); - - if ( !f->fs ) - err(1, "calloc(, featureset)"); - - return xc_get_cpu_featureset(xch, idx, &f->len, f->fs); -} - static void dump_info(xc_interface *xch, bool detail) { unsigned int i; + uint32_t *fs; printf("nr_features: %u\n", nr_features); @@ -334,26 +317,34 @@ static void dump_info(xc_interface *xch, bool detail) nr_features, "HVM Hap Default", detail); printf("\nDynamic sets:\n"); - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) + + fs = malloc(sizeof(*fs) * nr_features); + if ( !fs ) + err(1, "malloc(featureset)"); + + for ( i = 0; i < ARRAY_SIZE(fs_names); ++i ) { - if ( get_featureset(xch, i) ) + uint32_t len = nr_features; + int ret; + + memset(fs, 0, sizeof(*fs) * nr_features); + + ret = xc_get_cpu_featureset(xch, i, &len, fs); + if ( ret ) { if ( errno == EOPNOTSUPP ) { - printf("%s featureset not supported by Xen\n", - featuresets[i].name); + printf("%s featureset not supported by Xen\n", fs_names[i]); continue; } err(1, "xc_get_featureset()"); } - decode_featureset(featuresets[i].fs, featuresets[i].len, - featuresets[i].name, detail); + decode_featureset(fs, len, fs_names[i], detail); } - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) - free(featuresets[i].fs); + free(fs); } static void print_policy(const char *name, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:54:50 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:54:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581574.910497 (Exim 4.92) (envelope-from ) id 1qTt0s-0002Ru-Rn; Wed, 09 Aug 2023 23:54:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581574.910497; Wed, 09 Aug 2023 23:54:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0s-0002Rl-P7; Wed, 09 Aug 2023 23:54:50 +0000 Received: by outflank-mailman (input) for mailman id 581574; Wed, 09 Aug 2023 23:54:49 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0r-0002Rb-Fd for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:49 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt0r-0008Jr-Ev for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:49 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt0r-0006Nb-E9 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:49 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=N3EiJ1NLOKLplEJqQwa17NHrefZEUimTVrz3Mc8nqKM=; b=E5UEzgrDa8LtGlQrCsh6a5ewvM gQoPMQlQecsM5Ro2JkQAP9+/oe8OvbH/oRBK/NYPk1IzDNDFp8JdKrxGZXcsSNa3Vl0aHsFGb4gLV zSHyPyK+bOmtET1Wp5AXlRhG2dfTO/qDNQqh/SShYQGuSmTjUuFeZsQ0ZVXhjKSDo9Qg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Message-Id: Date: Wed, 09 Aug 2023 23:54:49 +0000 commit 0307a3f68eed7fe9fd3fc6dddf9706244b2bf86f Author: Andrew Cooper AuthorDate: Fri Mar 10 19:37:56 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Featuresets are supposed to be disappearing when the CPU policy infrastructure is complete, but that has taken longer than expected, and isn't going to be complete imminently either. In the meantime, Xen does have proper default/max featuresets, and xen-cpuid can even get them via the XEN_SYSCTL_cpu_policy_* interface, but only knows now to render them nicely via the featureset interface. Differences between default and max are a frequent source of errors, frequently too in secret leading up to an embargo, so extend the featureset sysctl to allow xen-cpuid to render them all nicely. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Christian Lindig (cherry picked from commit 433d012c6c2737ad5a9aaa994355a4140d601852) --- tools/misc/xen-cpuid.c | 10 ++++++---- tools/ocaml/libs/xc/xenctrl.ml | 8 +++++++- tools/ocaml/libs/xc/xenctrl.mli | 8 +++++++- xen/arch/x86/sysctl.c | 4 +++- xen/include/public/sysctl.h | 2 ++ 5 files changed, 25 insertions(+), 7 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 6cb805c162..1e6baf98f6 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -233,10 +233,12 @@ static const struct { #define COL_ALIGN "18" static const char *const fs_names[] = { - [XEN_SYSCTL_cpu_featureset_host] = "Host", - [XEN_SYSCTL_cpu_featureset_raw] = "Raw", - [XEN_SYSCTL_cpu_featureset_pv] = "PV", - [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_pv] = "PV Default", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM Default", + [XEN_SYSCTL_cpu_featureset_pv_max] = "PV Max", + [XEN_SYSCTL_cpu_featureset_hvm_max] = "HVM Max", }; static void dump_leaf(uint32_t leaf, const char *const *strs) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index 497ded7ce2..780cc71278 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -274,7 +274,13 @@ external version_changeset: handle -> string = "stub_xc_version_changeset" external version_capabilities: handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external watchdog : handle -> int -> int32 -> int diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 26ec7e59b1..508f4ae829 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -212,7 +212,13 @@ external version_changeset : handle -> string = "stub_xc_version_changeset" external version_capabilities : handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external pages_to_kib : int64 -> int64 = "stub_pages_to_kib" diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index b0cb1b57e7..dc105cb463 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -357,14 +357,16 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[4] = { + static const struct cpuid_policy *const policy_table[6] = { [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, #ifdef CONFIG_PV [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, #endif #ifdef CONFIG_HVM [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, #endif }; const struct cpuid_policy *p = NULL; diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 7439cc154f..9091b469e2 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -804,6 +804,8 @@ struct xen_sysctl_cpu_featureset { #define XEN_SYSCTL_cpu_featureset_host 1 #define XEN_SYSCTL_cpu_featureset_pv 2 #define XEN_SYSCTL_cpu_featureset_hvm 3 +#define XEN_SYSCTL_cpu_featureset_pv_max 4 +#define XEN_SYSCTL_cpu_featureset_hvm_max 5 uint32_t index; /* IN: Which featureset to query? */ uint32_t nr_features; /* IN/OUT: Number of entries in/written to * 'features', or the maximum number of features if -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:01 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581575.910501 (Exim 4.92) (envelope-from ) id 1qTt12-0002Vz-TP; Wed, 09 Aug 2023 23:55:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581575.910501; Wed, 09 Aug 2023 23:55:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt12-0002Vr-Qj; Wed, 09 Aug 2023 23:55:00 +0000 Received: by outflank-mailman (input) for mailman id 581575; Wed, 09 Aug 2023 23:54:59 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt11-0002Vf-Iu for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:59 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt11-0008Jw-IA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:59 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt11-0006O6-HM for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:54:59 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=TSn8DcrDxtp8YpdE/Ti3u8cFgKXNbrTiHdQO8qeS6/g=; b=weoQjVb3R4e/LR1gn1u1HBybvP gbfKhDjrX4BIkZ0x4gXk12sLTXmgMfizgwZGwhw/IpQtFEuVRj3BQ6BM03o14nZiDsgZrVMlHUOS9 GM15BRtsaGlW3k+adjKgcg9ozUljzmc20qnYmypBaYafD2vC8xVSHhI5PuVchrBdSuBk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Rename struct cpu_policy to struct old_cpuid_policy Message-Id: Date: Wed, 09 Aug 2023 23:54:59 +0000 commit edc64afe1757410c0afe71683ff23d0e0e6aed14 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:31:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Rename struct cpu_policy to struct old_cpuid_policy We want to merge struct cpuid_policy and struct msr_policy together, and the result wants to be called struct cpu_policy. The current struct cpu_policy, being a pair of pointers, isn't terribly useful. Rename the type to struct old_cpu_policy, but it will disappear entirely once the merge is complete. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c2ec94c370f211d73f336ccfbdb32499f1b05f82) --- tools/tests/cpu-policy/test-cpu-policy.c | 4 ++-- xen/arch/x86/domctl.c | 4 ++-- xen/arch/x86/sysctl.c | 4 ++-- xen/include/asm-x86/cpuid.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 6 +++--- xen/lib/x86/policy.c | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 0fa209f1ea..d8af5581ab 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -585,7 +585,7 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { @@ -637,7 +637,7 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 6f2c69788d..20855cb40d 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -219,8 +219,8 @@ void domain_cpu_policy_changed(struct domain *d) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct cpu_policy new = {}; - const struct cpu_policy *sys = is_pv_domain(d) + struct old_cpu_policy new = {}; + const struct old_cpu_policy *sys = is_pv_domain(d) ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index dc105cb463..444aa82cc0 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -33,7 +33,7 @@ #include #include -const struct cpu_policy system_policies[6] = { +const struct old_cpu_policy system_policies[6] = { [ XEN_SYSCTL_cpu_policy_raw ] = { &raw_cpuid_policy, &raw_msr_policy, @@ -422,7 +422,7 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct cpu_policy *policy; + const struct old_cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 9c3637549a..49b3128f06 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -51,7 +51,7 @@ extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, pv_max_cpuid_policy, pv_def_cpuid_policy, hvm_max_cpuid_policy, hvm_def_cpuid_policy; -extern const struct cpu_policy system_policies[]; +extern const struct old_cpu_policy system_policies[]; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 5a2c4c7b2d..3a5300d107 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -5,7 +5,7 @@ #include #include -struct cpu_policy +struct old_cpu_policy { struct cpuid_policy *cpuid; struct msr_policy *msr; @@ -33,8 +33,8 @@ struct cpu_policy_errors * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index 4beca8767a..cb2d3b8dfa 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581576.910504 (Exim 4.92) (envelope-from ) id 1qTt1C-0002YO-V0; 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Wed, 09 Aug 2023 23:55:09 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=xkYOLo1YfuQLFg94kiOhYCa62LslnehuscwpdtQ8emQ=; b=CPcnHN+Kd5ofQDJoEG1t306HTe O6cBNyWx7sx7Wtxr4BoXVy64cXnCRuY+dvJtJQ3Wc5EGvLKl6fGmwnDD5Vn8ek+RvHjy8KpQzTs20 itFoBODKEu1m81JUAIew2zf4cez4x28Tjn2I4gRV0qmce9Ygf4fPldyctmbEvOKg/Lhk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields Message-Id: Date: Wed, 09 Aug 2023 23:55:09 +0000 commit 3747c51a6803693a338999080b5bbda6a69ff2d3 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:48:29 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields These weren't great names to begin with, and using {leaves,msrs} matches up better with the existing nr_{leaves,msr} parameters anyway. Furthermore, by renaming these fields we can get away with using some #define trickery to avoid the struct {cpuid,msr}_policy merge needing to happen in a single changeset. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 21e3ef57e0406b6b9a783f721f29df8f91a00f99) xen: Correct comments after renaming xen_{dom,sys}ctl_cpu_policy fields Fixes: 21e3ef57e040 ("x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné (cherry picked from commit 6e06d229d538ea51b92dc189546c522f5e903511) --- tools/libxc/xc_cpuid_x86.c | 12 ++++++------ xen/arch/x86/domctl.c | 12 ++++++------ xen/arch/x86/sysctl.c | 8 ++++---- xen/include/public/domctl.h | 10 ++++------ xen/include/public/sysctl.h | 14 ++++++-------- 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index a0202ecbc9..08e8772417 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -148,9 +148,9 @@ int xc_get_system_cpu_policy(xc_interface *xch, uint32_t index, sysctl.cmd = XEN_SYSCTL_get_cpu_policy; sysctl.u.cpu_policy.index = index; sysctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(sysctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(sysctl.u.cpu_policy.leaves, leaves); sysctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(sysctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(sysctl.u.cpu_policy.msrs, msrs); ret = do_sysctl(xch, &sysctl); @@ -186,9 +186,9 @@ int xc_get_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_get_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); ret = do_domctl(xch, &domctl); @@ -235,9 +235,9 @@ int xc_set_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_set_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); domctl.u.cpu_policy.err_leaf = -1; domctl.u.cpu_policy.err_subleaf = -1; domctl.u.cpu_policy.err_msr = -1; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 20855cb40d..64a4e17f88 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -233,10 +233,10 @@ static int update_domain_cpu_policy(struct domain *d, /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->cpuid_policy, xdpc->nr_leaves, + new.cpuid, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msr_policy, xdpc->nr_msrs, &err.msr)) ) + new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ @@ -1451,20 +1451,20 @@ long arch_do_domctl( case XEN_DOMCTL_get_cpu_policy: /* Process the CPUID leaves. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( d->arch.cpuid, - domctl->u.cpu_policy.cpuid_policy, + domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; /* Process the MSR entries. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( d->arch.msr, - domctl->u.cpu_policy.msr_policy, + domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 444aa82cc0..04e90c596a 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -442,11 +442,11 @@ long arch_do_sysctl( } /* Process the CPUID leaves. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( policy->cpuid, - sysctl->u.cpu_policy.cpuid_policy, + sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -458,11 +458,11 @@ long arch_do_sysctl( } /* Process the MSR entries. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( policy->msr, - sysctl->u.cpu_policy.msr_policy, + sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index f416722491..11b96e27ec 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -673,12 +673,10 @@ struct xen_domctl_set_target { * Query or set the CPUID and MSR policies for a specific domain. */ struct xen_domctl_cpu_policy { - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy'. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy' */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* IN/OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* IN/OUT */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves' */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs' */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* IN/OUT */ /* * OUT, set_policy only. Written in some (but not all) error cases to diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 9091b469e2..72d41802bb 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -1051,15 +1051,13 @@ struct xen_sysctl_cpu_policy { #define XEN_SYSCTL_cpu_policy_pv_default 4 #define XEN_SYSCTL_cpu_policy_hvm_default 5 uint32_t index; /* IN: Which policy to query? */ - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy', or the maximum number of leaves - * if the guest handle is NULL. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy', or the maximum number of MSRs if - * the guest handle is NULL. */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves', + * or the max number if 'leaves' is NULL. */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs', or + * the max number of if 'msrs' is NULL. */ uint32_t _rsvd; /* Must be zero. */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* OUT */ }; typedef struct xen_sysctl_cpu_policy xen_sysctl_cpu_policy_t; DEFINE_XEN_GUEST_HANDLE(xen_sysctl_cpu_policy_t); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:21 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581577.910509 (Exim 4.92) (envelope-from ) id 1qTt1N-0002bT-0X; Wed, 09 Aug 2023 23:55:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581577.910509; Wed, 09 Aug 2023 23:55:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1M-0002bM-Tq; Wed, 09 Aug 2023 23:55:20 +0000 Received: by outflank-mailman (input) for mailman id 581577; Wed, 09 Aug 2023 23:55:19 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1L-0002ao-PV for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:19 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1L-0008KW-Ol for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:19 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt1L-0006PP-O4 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:19 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RU+fmJLGBZ8jXqSZDJXU/uKD32ILvOvgwCtHRCBmjJE=; b=W81brxIbZEKthyQd2JBzf7hxB/ HWd+EpL2IGGFUjd8XoZ6OePEXoxOA9JyKGVbrtUw0f36ZH27H2LS21N0pTxpiBeHeyBCLuPSm7Duu PV+7xSj34R+kej/zdoYeFthkbbe21QcN9opHPX7GOanfWs6hswac47aBVDqFyTDH0ff0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Rename struct cpuid_policy to struct cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:55:19 +0000 commit 2e54fb9fec5a73e3dd47801eff37f91c23e94b64 Author: Andrew Cooper AuthorDate: Tue Mar 28 18:55:19 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Rename struct cpuid_policy to struct cpu_policy Also merge lib/x86/cpuid.h entirely into lib/x86/cpu-policy.h Use a temporary define to make struct cpuid_policy still work. There's one forward declaration of struct cpuid_policy in tools/tests/x86_emulator/x86-emulate.h that isn't covered by the define, and it's easier to rename that now than to rearrange the includes. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 743e530380a007774017df9dc2d8cb0659040ee3) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 2 +- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.h | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 2 +- xen/include/asm-x86/cpuid.h | 1 - xen/include/xen/lib/x86/cpu-policy.h | 463 +++++++++++++++++++++++++- xen/include/xen/lib/x86/cpuid.h | 475 --------------------------- xen/lib/x86/cpuid.c | 2 +- 9 files changed, 468 insertions(+), 483 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 79a849a044..7ebe8ee7c3 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 1a6dbf94e1..2284887761 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -28,7 +28,7 @@ GCOV_FLAGS := --coverage x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) # x86-emulate.c will be implicit for both diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 48b3e6dce1..18a3f3a9c0 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -286,7 +286,7 @@ HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o: %.o: %.c $(x86_emulate.h) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 6ea6cbc658..0ec065a59d 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -68,7 +68,7 @@ #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) extern uint32_t mxcsr_mask; -extern struct cpuid_policy cp; +extern struct cpu_policy cp; #define MMAP_SZ 16384 bool emul_test_init(void); diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index d8fb3a9909..ce8226bd4c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,7 +23,7 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ -#include +#include #define MAX_INST_LEN 15 diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 49b3128f06..d418e8100d 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -9,7 +9,6 @@ #include #include -#include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 3a5300d107..666505964d 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -2,9 +2,342 @@ #ifndef XEN_LIB_X86_POLICIES_H #define XEN_LIB_X86_POLICIES_H -#include +#include #include +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ + +struct cpuid_leaf +{ + uint32_t a, b, c, d; +}; + +/* + * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard + * register, and are unable to cope with spilling it. This results in a + * rather cryptic error: + * error: inconsistent operand constraints in an ‘asm’ + * + * In affected situations, work around the issue by using a separate register + * to hold the the %rBX output, and xchg twice to leave %rBX preserved around + * the asm() statement. + */ +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) +# define XCHG_BX "xchg %%ebx, %[bx];" +# define BX_CON [bx] "=&r" +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ + defined(__x86_64__) && (defined(__code_model_medium__) || \ + defined(__code_model_large__)) +# define XCHG_BX "xchg %%rbx, %q[bx];" +# define BX_CON [bx] "=&r" +#else +# define XCHG_BX "" +# define BX_CON "=&b" +#endif + +static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) + : "a" (leaf) ); +} + +static inline void cpuid_count_leaf( + uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) + : "a" (leaf), "c" (subleaf) ); +} + +#undef BX_CON +#undef XCHG + +/** + * Given the vendor id from CPUID leaf 0, look up Xen's internal integer + * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. + */ +unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); + +/** + * Given Xen's internal vendor ID, return a string suitable for printing. + * Returns "Unknown" for any unrecognised ID. + */ +const char *x86_cpuid_vendor_to_str(unsigned int vendor); + +#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_CACHE (5u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) +#define CPUID_GUEST_NR_TOPO (1u + 1) +#define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) +#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) +#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ + CPUID_GUEST_NR_EXTD_AMD) + +/* + * Maximum number of leaves a struct cpu_policy turns into when serialised for + * interaction with the toolstack. (Sum of all leaves in each union, less the + * entries in basic which sub-unions hang off of.) + */ +#define CPUID_MAX_SERIALISED_LEAVES \ + (CPUID_GUEST_NR_BASIC + \ + CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ + CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ + CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ + CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ + CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) + +struct cpu_policy +{ +#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) +#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) +#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x + + /* Basic leaves: 0x000000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; + struct { + /* Leaf 0x0 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x1 - Family/model/stepping and features. */ + uint32_t raw_fms; + uint8_t :8, /* Brand ID. */ + clflush_size, /* Number of 8-byte blocks per cache line. */ + lppp, /* Logical processors per package. */ + apic_id; /* Initial APIC ID. */ + union { + uint32_t _1c; + struct { DECL_BITFIELD(1c); }; + }; + union { + uint32_t _1d; + struct { DECL_BITFIELD(1d); }; + }; + + /* Leaf 0x2 - TLB/Cache/Prefetch. */ + uint8_t l2_nr_queries; /* Documented as fixed to 1. */ + uint8_t l2_desc[15]; + + uint64_t :64, :64; /* Leaf 0x3 - PSN. */ + uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ + uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ + uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ + uint64_t :64, :64; /* Leaf 0x8 - rsvd */ + uint64_t :64, :64; /* Leaf 0x9 - DCA */ + + /* Leaf 0xa - Intel PMU. */ + uint8_t pmu_version, _pmu[15]; + + uint64_t :64, :64; /* Leaf 0xb - Topology. */ + uint64_t :64, :64; /* Leaf 0xc - rsvd */ + uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ + }; + } basic; + + /* Structured cache leaf: 0x00000004[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; + struct cpuid_cache_leaf { + uint32_t /* a */ type:5, level:3; + bool self_init:1, fully_assoc:1; + uint32_t :4, threads_per_cache:12, cores_per_package:6; + uint32_t /* b */ line_size:12, partitions:10, ways:10; + uint32_t /* c */ sets; + bool /* d */ wbinvd:1, inclusive:1, complex:1; + } subleaf[CPUID_GUEST_NR_CACHE]; + } cache; + + /* Structured feature leaf: 0x00000007[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + union { + uint32_t _7b0; + struct { DECL_BITFIELD(7b0); }; + }; + union { + uint32_t _7c0; + struct { DECL_BITFIELD(7c0); }; + }; + union { + uint32_t _7d0; + struct { DECL_BITFIELD(7d0); }; + }; + + /* Subleaf 1. */ + union { + uint32_t _7a1; + struct { DECL_BITFIELD(7a1); }; + }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; + }; + } feat; + + /* Extended topology enumeration: 0x0000000B[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; + struct cpuid_topo_leaf { + uint32_t id_shift:5, :27; + uint16_t nr_logical, :16; + uint8_t level, type, :8, :8; + uint32_t x2apic_id; + } subleaf[CPUID_GUEST_NR_TOPO]; + } topo; + + /* Xstate feature leaf: 0x0000000D[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; + + struct { + /* Subleaf 0. */ + uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; + + /* Subleaf 1. */ + union { + uint32_t Da1; + struct { DECL_BITFIELD(Da1); }; + }; + uint32_t /* b */:32, xss_low, xss_high; + }; + + /* Per-component common state. Valid for i >= 2. */ + struct { + uint32_t size, offset; + bool xss:1, align:1; + uint32_t _res_d; + } comp[CPUID_GUEST_NR_XSTATE]; + } xstate; + + /* Extended leaves: 0x800000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; + struct { + /* Leaf 0x80000000 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x80000001 - Family/model/stepping and features. */ + uint32_t raw_fms, /* b */:32; + union { + uint32_t e1c; + struct { DECL_BITFIELD(e1c); }; + }; + union { + uint32_t e1d; + struct { DECL_BITFIELD(e1d); }; + }; + + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* L1 cache/TLB. */ + uint64_t :64, :64; /* L2/3 cache/TLB. */ + + /* Leaf 0x80000007 - Advanced Power Management. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t e7d; + struct { DECL_BITFIELD(e7d); }; + }; + + /* Leaf 0x80000008 - Misc addr/feature info. */ + uint8_t maxphysaddr, maxlinaddr, :8, :8; + union { + uint32_t e8b; + struct { DECL_BITFIELD(e8b); }; + }; + uint32_t nc:8, :4, apic_id_size:4, :16; + uint32_t /* d */:32; + + uint64_t :64, :64; /* Leaf 0x80000009. */ + uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ + uint64_t :64, :64; /* Leaf 0x8000000b. */ + uint64_t :64, :64; /* Leaf 0x8000000c. */ + uint64_t :64, :64; /* Leaf 0x8000000d. */ + uint64_t :64, :64; /* Leaf 0x8000000e. */ + uint64_t :64, :64; /* Leaf 0x8000000f. */ + uint64_t :64, :64; /* Leaf 0x80000010. */ + uint64_t :64, :64; /* Leaf 0x80000011. */ + uint64_t :64, :64; /* Leaf 0x80000012. */ + uint64_t :64, :64; /* Leaf 0x80000013. */ + uint64_t :64, :64; /* Leaf 0x80000014. */ + uint64_t :64, :64; /* Leaf 0x80000015. */ + uint64_t :64, :64; /* Leaf 0x80000016. */ + uint64_t :64, :64; /* Leaf 0x80000017. */ + uint64_t :64, :64; /* Leaf 0x80000018. */ + uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ + uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ + uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ + uint64_t :64, :64; /* Leaf 0x8000001c. */ + uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ + uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ + uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ + uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ + + /* Leaf 0x80000021 - Extended Feature 2 */ + union { + uint32_t e21a; + struct { DECL_BITFIELD(e21a); }; + }; + uint32_t /* b */:32, /* c */:32, /* d */:32; + }; + } extd; + +#undef __DECL_BITFIELD +#undef _DECL_BITFIELD +#undef DECL_BITFIELD + + /* Toolstack selected Hypervisor max_leaf (if non-zero). */ + uint8_t hv_limit, hv2_limit; + + /* Value calculated from raw data above. */ + uint8_t x86_vendor; +}; + +/* Temporary */ +#define cpuid_policy cpu_policy + struct old_cpu_policy { struct cpuid_policy *cpuid; @@ -19,6 +352,134 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } +/* Fill in a featureset bitmap from a CPUID policy. */ +static inline void cpuid_policy_to_featureset( + const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +/* Fill in a CPUID policy from a featureset bitmap. */ +static inline void cpuid_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + +static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +{ + return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; +} + +static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +{ + uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; + + return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; +} + +const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); + +/** + * Recalculate the content in a CPUID policy which is derived from raw data. + */ +void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); + +/** + * Fill a CPUID policy using the native CPUID instruction. + * + * No sanitisation is performed, but synthesised values are calculated. + * Values may be influenced by a hypervisor or from masking/faulting + * configuration. + */ +void x86_cpuid_policy_fill_native(struct cpuid_policy *p); + +/** + * Clear leaf data beyond the policies max leaf/subleaf settings. + * + * Policy serialisation purposefully omits out-of-range leaves, because there + * are a large number of them due to vendor differences. However, when + * constructing new policies (e.g. levelling down), it is possible to end up + * with out-of-range leaves with stale content in them. This helper clears + * them. + */ +void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); + +#ifdef __XEN__ +#include +typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +#else +#include +typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +#endif + +/** + * Serialise a cpuid_policy object into an array of cpuid leaves. + * + * @param policy The cpuid_policy to serialise. + * @param leaves The array of leaves to serialise into. + * @param nr_entries The number of entries in 'leaves'. + * @returns -errno + * + * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the + * leaves array is too short. On success, nr_entries is updated with the + * actual number of leaves written. + */ +int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, + cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); + +/** + * Unserialise a cpuid_policy object from an array of cpuid leaves. + * + * @param policy The cpuid_policy to unserialise into. + * @param leaves The array of leaves to unserialise from. + * @param nr_entries The number of entries in 'leaves'. + * @param err_leaf Optional hint for error diagnostics. + * @param err_subleaf Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an + * incoming leaf is out of range of cpuid_policy, in which case the optional + * err_* pointers will identify the out-of-range indicies. + * + * No content validation of in-range leaves is performed. Synthesised data is + * recalculated. + */ +int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, + const cpuid_leaf_buffer_t leaves, + uint32_t nr_entries, uint32_t *err_leaf, + uint32_t *err_subleaf); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h deleted file mode 100644 index fa98b371ee..0000000000 --- a/xen/include/xen/lib/x86/cpuid.h +++ /dev/null @@ -1,475 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_CPUID_H -#define XEN_LIB_X86_CPUID_H - -#include - -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ - -struct cpuid_leaf -{ - uint32_t a, b, c, d; -}; - -/* - * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard - * register, and are unable to cope with spilling it. This results in a - * rather cryptic error: - * error: inconsistent operand constraints in an ‘asm’ - * - * In affected situations, work around the issue by using a separate register - * to hold the the %rBX output, and xchg twice to leave %rBX preserved around - * the asm() statement. - */ -#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) -# define XCHG_BX "xchg %%ebx, %[bx];" -# define BX_CON [bx] "=&r" -#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ - defined(__x86_64__) && (defined(__code_model_medium__) || \ - defined(__code_model_large__)) -# define XCHG_BX "xchg %%rbx, %q[bx];" -# define BX_CON [bx] "=&r" -#else -# define XCHG_BX "" -# define BX_CON "=&b" -#endif - -static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) - : "a" (leaf) ); -} - -static inline void cpuid_count_leaf( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) - : "a" (leaf), "c" (subleaf) ); -} - -#undef BX_CON -#undef XCHG - -/** - * Given the vendor id from CPUID leaf 0, look up Xen's internal integer - * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. - */ -unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); - -/** - * Given Xen's internal vendor ID, return a string suitable for printing. - * Returns "Unknown" for any unrecognised ID. - */ -const char *x86_cpuid_vendor_to_str(unsigned int vendor); - -#define CPUID_GUEST_NR_BASIC (0xdu + 1) -#define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (2u + 1) -#define CPUID_GUEST_NR_TOPO (1u + 1) -#define CPUID_GUEST_NR_XSTATE (62u + 1) -#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) -#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) -#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ - CPUID_GUEST_NR_EXTD_AMD) - -/* - * Maximum number of leaves a struct cpuid_policy turns into when serialised - * for interaction with the toolstack. (Sum of all leaves in each union, less - * the entries in basic which sub-unions hang off of.) - */ -#define CPUID_MAX_SERIALISED_LEAVES \ - (CPUID_GUEST_NR_BASIC + \ - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ - CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) - -struct cpuid_policy -{ -#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) -#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) -#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x - - /* Basic leaves: 0x000000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; - struct { - /* Leaf 0x0 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t raw_fms; - uint8_t :8, /* Brand ID. */ - clflush_size, /* Number of 8-byte blocks per cache line. */ - lppp, /* Logical processors per package. */ - apic_id; /* Initial APIC ID. */ - union { - uint32_t _1c; - struct { DECL_BITFIELD(1c); }; - }; - union { - uint32_t _1d; - struct { DECL_BITFIELD(1d); }; - }; - - /* Leaf 0x2 - TLB/Cache/Prefetch. */ - uint8_t l2_nr_queries; /* Documented as fixed to 1. */ - uint8_t l2_desc[15]; - - uint64_t :64, :64; /* Leaf 0x3 - PSN. */ - uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ - uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ - uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ - uint64_t :64, :64; /* Leaf 0x8 - rsvd */ - uint64_t :64, :64; /* Leaf 0x9 - DCA */ - - /* Leaf 0xa - Intel PMU. */ - uint8_t pmu_version, _pmu[15]; - - uint64_t :64, :64; /* Leaf 0xb - Topology. */ - uint64_t :64, :64; /* Leaf 0xc - rsvd */ - uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ - }; - } basic; - - /* Structured cache leaf: 0x00000004[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; - struct cpuid_cache_leaf { - uint32_t /* a */ type:5, level:3; - bool self_init:1, fully_assoc:1; - uint32_t :4, threads_per_cache:12, cores_per_package:6; - uint32_t /* b */ line_size:12, partitions:10, ways:10; - uint32_t /* c */ sets; - bool /* d */ wbinvd:1, inclusive:1, complex:1; - } subleaf[CPUID_GUEST_NR_CACHE]; - } cache; - - /* Structured feature leaf: 0x00000007[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; - struct { - /* Subleaf 0. */ - uint32_t max_subleaf; - union { - uint32_t _7b0; - struct { DECL_BITFIELD(7b0); }; - }; - union { - uint32_t _7c0; - struct { DECL_BITFIELD(7c0); }; - }; - union { - uint32_t _7d0; - struct { DECL_BITFIELD(7d0); }; - }; - - /* Subleaf 1. */ - union { - uint32_t _7a1; - struct { DECL_BITFIELD(7a1); }; - }; - union { - uint32_t _7b1; - struct { DECL_BITFIELD(7b1); }; - }; - union { - uint32_t _7c1; - struct { DECL_BITFIELD(7c1); }; - }; - union { - uint32_t _7d1; - struct { DECL_BITFIELD(7d1); }; - }; - - /* Subleaf 2. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t _7d2; - struct { DECL_BITFIELD(7d2); }; - }; - }; - } feat; - - /* Extended topology enumeration: 0x0000000B[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; - struct cpuid_topo_leaf { - uint32_t id_shift:5, :27; - uint16_t nr_logical, :16; - uint8_t level, type, :8, :8; - uint32_t x2apic_id; - } subleaf[CPUID_GUEST_NR_TOPO]; - } topo; - - /* Xstate feature leaf: 0x0000000D[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; - - struct { - /* Subleaf 0. */ - uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; - - /* Subleaf 1. */ - union { - uint32_t Da1; - struct { DECL_BITFIELD(Da1); }; - }; - uint32_t /* b */:32, xss_low, xss_high; - }; - - /* Per-component common state. Valid for i >= 2. */ - struct { - uint32_t size, offset; - bool xss:1, align:1; - uint32_t _res_d; - } comp[CPUID_GUEST_NR_XSTATE]; - } xstate; - - /* Extended leaves: 0x800000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; - struct { - /* Leaf 0x80000000 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x80000001 - Family/model/stepping and features. */ - uint32_t raw_fms, /* b */:32; - union { - uint32_t e1c; - struct { DECL_BITFIELD(e1c); }; - }; - union { - uint32_t e1d; - struct { DECL_BITFIELD(e1d); }; - }; - - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* L1 cache/TLB. */ - uint64_t :64, :64; /* L2/3 cache/TLB. */ - - /* Leaf 0x80000007 - Advanced Power Management. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t e7d; - struct { DECL_BITFIELD(e7d); }; - }; - - /* Leaf 0x80000008 - Misc addr/feature info. */ - uint8_t maxphysaddr, maxlinaddr, :8, :8; - union { - uint32_t e8b; - struct { DECL_BITFIELD(e8b); }; - }; - uint32_t nc:8, :4, apic_id_size:4, :16; - uint32_t /* d */:32; - - uint64_t :64, :64; /* Leaf 0x80000009. */ - uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ - uint64_t :64, :64; /* Leaf 0x8000000b. */ - uint64_t :64, :64; /* Leaf 0x8000000c. */ - uint64_t :64, :64; /* Leaf 0x8000000d. */ - uint64_t :64, :64; /* Leaf 0x8000000e. */ - uint64_t :64, :64; /* Leaf 0x8000000f. */ - uint64_t :64, :64; /* Leaf 0x80000010. */ - uint64_t :64, :64; /* Leaf 0x80000011. */ - uint64_t :64, :64; /* Leaf 0x80000012. */ - uint64_t :64, :64; /* Leaf 0x80000013. */ - uint64_t :64, :64; /* Leaf 0x80000014. */ - uint64_t :64, :64; /* Leaf 0x80000015. */ - uint64_t :64, :64; /* Leaf 0x80000016. */ - uint64_t :64, :64; /* Leaf 0x80000017. */ - uint64_t :64, :64; /* Leaf 0x80000018. */ - uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ - uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ - uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ - uint64_t :64, :64; /* Leaf 0x8000001c. */ - uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ - uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ - uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ - uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ - - /* Leaf 0x80000021 - Extended Feature 2 */ - union { - uint32_t e21a; - struct { DECL_BITFIELD(e21a); }; - }; - uint32_t /* b */:32, /* c */:32, /* d */:32; - }; - } extd; - -#undef __DECL_BITFIELD -#undef _DECL_BITFIELD -#undef DECL_BITFIELD - - /* Toolstack selected Hypervisor max_leaf (if non-zero). */ - uint8_t hv_limit, hv2_limit; - - /* Value calculated from raw data above. */ - uint8_t x86_vendor; -}; - -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} - -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} - -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -{ - return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; -} - -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) -{ - uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; - - return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; -} - -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); - -/** - * Recalculate the content in a CPUID policy which is derived from raw data. - */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); - -/** - * Fill a CPUID policy using the native CPUID instruction. - * - * No sanitisation is performed, but synthesised values are calculated. - * Values may be influenced by a hypervisor or from masking/faulting - * configuration. - */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); - -/** - * Clear leaf data beyond the policies max leaf/subleaf settings. - * - * Policy serialisation purposefully omits out-of-range leaves, because there - * are a large number of them due to vendor differences. However, when - * constructing new policies (e.g. levelling down), it is possible to end up - * with out-of-range leaves with stale content in them. This helper clears - * them. - */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; -#else -#include -typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; -#endif - -/** - * Serialise a cpuid_policy object into an array of cpuid leaves. - * - * @param policy The cpuid_policy to serialise. - * @param leaves The array of leaves to serialise into. - * @param nr_entries The number of entries in 'leaves'. - * @returns -errno - * - * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the - * leaves array is too short. On success, nr_entries is updated with the - * actual number of leaves written. - */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, - cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); - -/** - * Unserialise a cpuid_policy object from an array of cpuid leaves. - * - * @param policy The cpuid_policy to unserialise into. - * @param leaves The array of leaves to unserialise from. - * @param nr_entries The number of entries in 'leaves'. - * @param err_leaf Optional hint for error diagnostics. - * @param err_subleaf Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional - * err_* pointers will identify the out-of-range indicies. - * - * No content validation of in-range leaves is performed. Synthesised data is - * recalculated. - */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, - const cpuid_leaf_buffer_t leaves, - uint32_t nr_entries, uint32_t *err_leaf, - uint32_t *err_subleaf); - -#endif /* !XEN_LIB_X86_CPUID_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index c7a0508148..b2def4c9bc 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:31 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581578.910513 (Exim 4.92) (envelope-from ) id 1qTt1X-0002eW-41; Wed, 09 Aug 2023 23:55:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581578.910513; Wed, 09 Aug 2023 23:55:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1X-0002eM-1F; Wed, 09 Aug 2023 23:55:31 +0000 Received: by outflank-mailman (input) for mailman id 581578; Wed, 09 Aug 2023 23:55:29 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1V-0002eC-UH for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:29 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1V-0008Kd-Tc for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:29 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt1V-0006Pq-R6 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:29 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2OXEwmKFNRnhpA2QR6Ztag4JowZd9WitAWTF5fdnuDc=; b=KFmyDQdMfJGFpiM6CexMOGV5sk HNFK7Dx1c4xcRx7Id/e4TyriVaWgPtSRf4qNyYLYJIwuQBP8c8qZWzX+m8Kz0oQ5HYpk8InqPHrHQ YMdZkeoA+ASaAJ9KNBgMqYJhUzFF1wxIpl9bA+VXb1pdSd651j01pqt7/kQ6yFiYeeRs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Merge struct msr_policy into struct cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:55:29 +0000 commit 63e4aa3d3b56d57f6d3d3a86d593f60e79e8a1ff Author: Andrew Cooper AuthorDate: Tue Mar 28 21:24:20 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 03812da3754d550dd8cbee7289469069ea6f0073) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 1 - xen/include/asm-x86/msr.h | 3 +- xen/include/xen/lib/x86/cpu-policy.h | 81 ++++++++++++++++++++++- xen/include/xen/lib/x86/msr.h | 104 ------------------------------ xen/lib/x86/msr.c | 2 +- 5 files changed, 83 insertions(+), 108 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 7ebe8ee7c3..316eb0efe0 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -10,7 +10,6 @@ #include #include -#include #include static bool debug; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 743c40e2c0..86fe27cc14 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -6,8 +6,9 @@ #include #include #include +#include -#include +#include #include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 666505964d..53fffca552 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -3,7 +3,6 @@ #define XEN_LIB_X86_POLICIES_H #include -#include #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -107,6 +106,9 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) +/* Maximum number of MSRs written when serialising a cpu_policy. */ +#define MSR_MAX_SERIALISED_ENTRIES 2 + struct cpu_policy { #define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) @@ -324,6 +326,44 @@ struct cpu_policy }; } extd; + /* + * 0x000000ce - MSR_INTEL_PLATFORM_INFO + * + * This MSR is non-architectural, but for simplicy we allow it to be read + * unconditionally. CPUID Faulting support can be fully emulated for HVM + * guests so can be offered unconditionally, while support for PV guests + * is dependent on real hardware support. + */ + union { + uint32_t raw; + struct { + uint32_t :31; + bool cpuid_faulting:1; + }; + } platform_info; + + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -337,6 +377,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy struct old_cpu_policy { @@ -438,9 +479,11 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); #ifdef __XEN__ #include typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; #else #include typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** @@ -480,6 +523,42 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); +/** + * Serialise an msr_policy object into an array. + * + * @param policy The msr_policy to serialise. + * @param msrs The array of msrs to serialise into. + * @param nr_entries The number of entries in 'msrs'. + * @returns -errno + * + * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the + * buffer array is too short. On success, nr_entries is updated with the + * actual number of msrs written. + */ +int x86_msr_copy_to_buffer(const struct msr_policy *policy, + msr_entry_buffer_t msrs, uint32_t *nr_entries); + +/** + * Unserialise an msr_policy object from an array of msrs. + * + * @param policy The msr_policy object to unserialise into. + * @param msrs The array of msrs to unserialise from. + * @param nr_entries The number of entries in 'msrs'. + * @param err_msr Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons + * based on the content in an individual 'msrs' entry, including the MSR index + * not being valid in the policy, the flags field being nonzero, or if the + * value provided would truncate when stored in the policy. In such cases, + * the optional err_* pointer will identify the problematic MSR. + * + * No content validation is performed on the data stored in the policy object. + */ +int x86_msr_copy_from_buffer(struct msr_policy *policy, + const msr_entry_buffer_t msrs, uint32_t nr_entries, + uint32_t *err_msr); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/msr.h b/xen/include/xen/lib/x86/msr.h deleted file mode 100644 index 48ba4a59c0..0000000000 --- a/xen/include/xen/lib/x86/msr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_MSR_H -#define XEN_LIB_X86_MSR_H - -/* Maximum number of MSRs written when serialising msr_policy. */ -#define MSR_MAX_SERIALISED_ENTRIES 2 - -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy -{ - /* - * 0x000000ce - MSR_INTEL_PLATFORM_INFO - * - * This MSR is non-architectural, but for simplicy we allow it to be read - * unconditionally. CPUID Faulting support can be fully emulated for HVM - * guests so can be offered unconditionally, while support for PV guests - * is dependent on real hardware support. - */ - union { - uint32_t raw; - struct { - uint32_t :31; - bool cpuid_faulting:1; - }; - } platform_info; - - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; -#else -#include -typedef xen_msr_entry_t msr_entry_buffer_t[]; -#endif - -/** - * Serialise an msr_policy object into an array. - * - * @param policy The msr_policy to serialise. - * @param msrs The array of msrs to serialise into. - * @param nr_entries The number of entries in 'msrs'. - * @returns -errno - * - * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the - * buffer array is too short. On success, nr_entries is updated with the - * actual number of msrs written. - */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, - msr_entry_buffer_t msrs, uint32_t *nr_entries); - -/** - * Unserialise an msr_policy object from an array of msrs. - * - * @param policy The msr_policy object to unserialise into. - * @param msrs The array of msrs to unserialise from. - * @param nr_entries The number of entries in 'msrs'. - * @param err_msr Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons - * based on the content in an individual 'msrs' entry, including the MSR index - * not being valid in the policy, the flags field being nonzero, or if the - * value provided would truncate when stored in the policy. In such cases, - * the optional err_* pointer will identify the problematic MSR. - * - * No content validation is performed on the data stored in the policy object. - */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, - const msr_entry_buffer_t msrs, uint32_t nr_entries, - uint32_t *err_msr); - -#endif /* !XEN_LIB_X86_MSR_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index 7d71e92a38..c4d885e7b5 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include /* * Copy a single MSR into the provided msr_entry_buffer_t buffer, performing a -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:41 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581579.910518 (Exim 4.92) (envelope-from ) id 1qTt1h-0002hR-6k; Wed, 09 Aug 2023 23:55:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581579.910518; Wed, 09 Aug 2023 23:55:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1h-0002hH-35; Wed, 09 Aug 2023 23:55:41 +0000 Received: by outflank-mailman (input) for mailman id 581579; Wed, 09 Aug 2023 23:55:40 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1g-0002h9-1U for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:40 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1g-0008L0-0d for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:40 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt1f-0006QO-WA for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:39 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RVmgb1P44k9WGeWDx2vl7mTEwKM2TN84JiqIlfxSIUk=; b=ckuQvwboQKJA2tnt9u3xIRB0Vq Z7K9XkJrHeynmKkVefWfNtCb9rdE6TqIV8HrFbe/8W7IXMJ82B+FItDQUU4WGUzQXWzfOiiOW03Ud J4q75KBUuQMF8A6EI8iNQkB6fmDoWW5eKTeUna9qKkgXzV7ES/IkqATTwUyr67/j7uPM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Merge the system {cpuid,msr} policy objects Message-Id: Date: Wed, 09 Aug 2023 23:55:39 +0000 commit 83a720e9129903ae0dce6d797d2319c1f99ad3b8 Author: Andrew Cooper AuthorDate: Wed Mar 29 07:39:44 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Merge the system {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Introduce a new cpu-policy.{h,c} to be the new location for all policy handling logic. Place the combined objects in __ro_after_init, which is new since the original logic was written. As we're trying to phase out the use of struct old_cpu_policy entirely, rework update_domain_cpu_policy() to not pointer-chase through system_policies[]. This in turn allows system_policies[] in sysctl.c to become static and reduced in scope to XEN_SYSCTL_get_cpu_policy. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 6bc33366795d14a21a3244d0f3b63f7dccea87ef) --- xen/arch/x86/Makefile | 1 + xen/arch/x86/cpu-policy.c | 18 ++++++++++ xen/arch/x86/cpu/common.c | 4 ++- xen/arch/x86/cpuid.c | 66 ++++++++++++++++--------------------- xen/arch/x86/domctl.c | 17 +++++++--- xen/arch/x86/msr.c | 38 ++++++++------------- xen/arch/x86/sysctl.c | 71 +++++++++++++++------------------------- xen/include/asm-x86/cpu-policy.h | 14 ++++++++ xen/include/asm-x86/cpuid.h | 6 ---- xen/include/asm-x86/msr.h | 7 ---- 10 files changed, 116 insertions(+), 126 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index fd0acd566a..d918e99c5e 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -16,6 +16,7 @@ obj-y += bitops.o obj-bin-y += bzimage.init.o obj-bin-y += clear_page.o obj-bin-y += copy_page.o +obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o x86_64/compat.o obj-$(CONFIG_KEXEC) += crash.o diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c new file mode 100644 index 0000000000..e47fbeb04d --- /dev/null +++ b/xen/arch/x86/cpu-policy.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#include + +#include + +struct cpu_policy __read_mostly raw_cpu_policy; +struct cpu_policy __read_mostly host_cpu_policy; +#ifdef CONFIG_PV +struct cpu_policy __read_mostly pv_max_cpu_policy; +struct cpu_policy __read_mostly pv_def_cpu_policy; +#endif +#ifdef CONFIG_HVM +struct cpu_policy __read_mostly hvm_max_cpu_policy; +struct cpu_policy __read_mostly hvm_def_cpu_policy; +#endif diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 70e6dea04a..088a871969 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -135,7 +137,7 @@ bool __init probe_cpuid_faulting(void) return false; if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) - raw_msr_policy.platform_info.cpuid_faulting = + raw_cpu_policy.platform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; if (rc || diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 832a5e95c9..3368d07efc 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -141,17 +142,6 @@ static void zero_leaves(struct cpuid_leaf *l, memset(&l[first], 0, sizeof(*l) * (last - first + 1)); } -struct cpuid_policy __read_mostly raw_cpuid_policy, - __read_mostly host_cpuid_policy; -#ifdef CONFIG_PV -struct cpuid_policy __read_mostly pv_max_cpuid_policy; -struct cpuid_policy __read_mostly pv_def_cpuid_policy; -#endif -#ifdef CONFIG_HVM -struct cpuid_policy __read_mostly hvm_max_cpuid_policy; -struct cpuid_policy __read_mostly hvm_def_cpuid_policy; -#endif - static void sanitise_featureset(uint32_t *fs) { /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ @@ -343,7 +333,7 @@ static void recalculate_misc(struct cpuid_policy *p) static void __init calculate_raw_policy(void) { - struct cpuid_policy *p = &raw_cpuid_policy; + struct cpuid_policy *p = &raw_cpu_policy; x86_cpuid_policy_fill_native(p); @@ -353,10 +343,10 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct cpuid_policy *p = &host_cpuid_policy; + struct cpuid_policy *p = &host_cpu_policy; unsigned int max_extd_leaf; - *p = raw_cpuid_policy; + *p = raw_cpu_policy; p->basic.max_leaf = min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); @@ -448,17 +438,17 @@ static void __init guest_common_feature_adjustments(uint32_t *fs) * of IBRS by using the AMD feature bit. An administrator may wish for * performance reasons to offer IBPB without IBRS. */ - if ( host_cpuid_policy.feat.ibrsb ) + if ( host_cpu_policy.feat.ibrsb ) __set_bit(X86_FEATURE_IBPB, fs); } static void __init calculate_pv_max_policy(void) { - struct cpuid_policy *p = &pv_max_cpuid_policy; + struct cpuid_policy *p = &pv_max_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -485,11 +475,11 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { - struct cpuid_policy *p = &pv_def_cpuid_policy; + struct cpuid_policy *p = &pv_def_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = pv_max_cpuid_policy; + *p = pv_max_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -505,12 +495,12 @@ static void __init calculate_pv_def_policy(void) static void __init calculate_hvm_max_policy(void) { - struct cpuid_policy *p = &hvm_max_cpuid_policy; + struct cpuid_policy *p = &hvm_max_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -532,7 +522,7 @@ static void __init calculate_hvm_max_policy(void) * HVM guests are able if running in protected mode. */ if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpuid_policy.basic.sep ) + raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); /* @@ -567,12 +557,12 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct cpuid_policy *p = &hvm_def_cpuid_policy; + struct cpuid_policy *p = &hvm_def_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = hvm_max_cpuid_policy; + *p = hvm_max_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -633,8 +623,8 @@ void recalculate_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; unsigned int i; @@ -717,7 +707,7 @@ void recalculate_cpuid_policy(struct domain *d) /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpuid_policy.feat._7b0 & + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); @@ -768,8 +758,8 @@ void recalculate_cpuid_policy(struct domain *d) int init_domain_cpuid_policy(struct domain *d) { struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !p ) { @@ -1073,7 +1063,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) - *res = raw_cpuid_policy.basic.raw[5]; + *res = raw_cpu_policy.basic.raw[5]; break; case 0x7: @@ -1205,14 +1195,14 @@ static void __init __maybe_unused build_assertions(void) /* Find some more clever allocation scheme if this trips. */ BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.basic) != - sizeof(raw_cpuid_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.feat) != - sizeof(raw_cpuid_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.xstate) != - sizeof(raw_cpuid_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.extd) != - sizeof(raw_cpuid_policy.extd.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); } /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 64a4e17f88..61c638f5c3 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -35,7 +35,7 @@ #include #include #include -#include +#include #ifdef CONFIG_GDBSX static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) @@ -220,12 +220,19 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct old_cpu_policy new = {}; - const struct old_cpu_policy *sys = is_pv_domain(d) - ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] - : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; + struct cpu_policy *sys = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + struct old_cpu_policy old_sys = { sys, sys }; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; + if ( !sys ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + /* Start by copying the domain's existing policies. */ if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || !(new.msr = xmemdup(d->arch.msr)) ) @@ -243,7 +250,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); if ( ret ) goto out; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 6517e50c9f..bc19ec356e 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -34,20 +35,9 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -struct msr_policy __read_mostly raw_msr_policy, - __read_mostly host_msr_policy; -#ifdef CONFIG_PV -struct msr_policy __read_mostly pv_max_msr_policy; -struct msr_policy __read_mostly pv_def_msr_policy; -#endif -#ifdef CONFIG_HVM -struct msr_policy __read_mostly hvm_max_msr_policy; -struct msr_policy __read_mostly hvm_def_msr_policy; -#endif - static void __init calculate_raw_policy(void) { - struct msr_policy *mp = &raw_msr_policy; + struct msr_policy *mp = &raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -58,9 +48,9 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct msr_policy *mp = &host_msr_policy; + struct msr_policy *mp = &host_cpu_policy; - *mp = raw_msr_policy; + *mp = raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ @@ -78,25 +68,25 @@ static void __init calculate_host_policy(void) static void __init calculate_pv_max_policy(void) { - struct msr_policy *mp = &pv_max_msr_policy; + struct msr_policy *mp = &pv_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) { - struct msr_policy *mp = &pv_def_msr_policy; + struct msr_policy *mp = &pv_def_cpu_policy; - *mp = pv_max_msr_policy; + *mp = pv_max_cpu_policy; } static void __init calculate_hvm_max_policy(void) { - struct msr_policy *mp = &hvm_max_msr_policy; + struct msr_policy *mp = &hvm_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; @@ -106,9 +96,9 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct msr_policy *mp = &hvm_def_msr_policy; + struct msr_policy *mp = &hvm_def_cpu_policy; - *mp = hvm_max_msr_policy; + *mp = hvm_max_cpu_policy; } void __init init_guest_msr_policy(void) @@ -132,8 +122,8 @@ void __init init_guest_msr_policy(void) int init_domain_msr_policy(struct domain *d) { struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_msr_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_msr_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !mp ) { diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 04e90c596a..99d5c1b85b 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -31,38 +31,7 @@ #include #include #include -#include - -const struct old_cpu_policy system_policies[6] = { - [ XEN_SYSCTL_cpu_policy_raw ] = { - &raw_cpuid_policy, - &raw_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_host ] = { - &host_cpuid_policy, - &host_msr_policy, - }, -#ifdef CONFIG_PV - [ XEN_SYSCTL_cpu_policy_pv_max ] = { - &pv_max_cpuid_policy, - &pv_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_pv_default ] = { - &pv_def_cpuid_policy, - &pv_def_msr_policy, - }, -#endif -#ifdef CONFIG_HVM - [ XEN_SYSCTL_cpu_policy_hvm_max ] = { - &hvm_max_cpuid_policy, - &hvm_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_hvm_default ] = { - &hvm_def_cpuid_policy, - &hvm_def_msr_policy, - }, -#endif -}; +#include struct l3_cache_info { int ret; @@ -357,19 +326,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[6] = { - [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, + static const struct cpu_policy *const policy_table[6] = { + [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_featureset_host] = &host_cpu_policy, #ifdef CONFIG_PV - [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpu_policy, #endif #ifdef CONFIG_HVM - [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpu_policy, #endif }; - const struct cpuid_policy *p = NULL; + const struct cpu_policy *p = NULL; uint32_t featureset[FSCAPINTS]; unsigned int nr; @@ -422,7 +391,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct old_cpu_policy *policy; + static const struct cpu_policy *const system_policies[6] = { + [XEN_SYSCTL_cpu_policy_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_policy_host] = &host_cpu_policy, +#ifdef CONFIG_PV + [XEN_SYSCTL_cpu_policy_pv_max] = &pv_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_pv_default] = &pv_def_cpu_policy, +#endif +#ifdef CONFIG_HVM + [XEN_SYSCTL_cpu_policy_hvm_max] = &hvm_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_hvm_default] = &hvm_def_cpu_policy, +#endif + }; + const struct cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || @@ -431,11 +412,11 @@ long arch_do_sysctl( ret = -EINVAL; break; } - policy = &system_policies[ + policy = system_policies[ array_index_nospec(sysctl->u.cpu_policy.index, ARRAY_SIZE(system_policies))]; - if ( !policy->cpuid || !policy->msr ) + if ( !policy ) { ret = -EOPNOTSUPP; break; @@ -445,7 +426,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - policy->cpuid, + policy, sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -461,7 +442,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - policy->msr, + policy, sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h new file mode 100644 index 0000000000..eef14bb426 --- /dev/null +++ b/xen/include/asm-x86/cpu-policy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef X86_CPU_POLICY_H +#define X86_CPU_POLICY_H + +struct cpu_policy; + +extern struct cpu_policy raw_cpu_policy; +extern struct cpu_policy host_cpu_policy; +extern struct cpu_policy pv_max_cpu_policy; +extern struct cpu_policy pv_def_cpu_policy; +extern struct cpu_policy hvm_max_cpu_policy; +extern struct cpu_policy hvm_def_cpu_policy; + +#endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index d418e8100d..ea05862773 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -46,12 +46,6 @@ DECLARE_PER_CPU(struct cpuidmasks, cpuidmasks); /* Default masking MSR values, calculated at boot. */ extern struct cpuidmasks cpuidmask_defaults; -extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, - pv_max_cpuid_policy, pv_def_cpuid_policy, - hvm_max_cpuid_policy, hvm_def_cpuid_policy; - -extern const struct old_cpu_policy system_policies[]; - /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 86fe27cc14..130c80c9cf 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -270,13 +270,6 @@ static inline void wrmsr_tsc_aux(uint32_t val) uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -extern struct msr_policy raw_msr_policy, - host_msr_policy, - pv_max_msr_policy, - pv_def_msr_policy, - hvm_max_msr_policy, - hvm_def_msr_policy; - /* Container object for per-vCPU MSRs */ struct vcpu_msrs { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:55:52 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:55:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581580.910522 (Exim 4.92) (envelope-from ) id 1qTt1s-0002ki-A3; Wed, 09 Aug 2023 23:55:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581580.910522; Wed, 09 Aug 2023 23:55:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1s-0002kY-6U; Wed, 09 Aug 2023 23:55:52 +0000 Received: by outflank-mailman (input) for mailman id 581580; Wed, 09 Aug 2023 23:55:50 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1q-0002kK-4a for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:50 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt1q-0008LA-3m for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:50 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt1q-0006Qn-3A for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:55:50 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=scOt1aBIhWactCIxYo9Zi6ke5QFo8P3cPZYf23gpf7c=; b=KHVfTeZd4kdT+X32AdN4yoKvSD 0/F7F5vakcytSDviydAZx1hHlOPVH8dk5dC80EKQSDPZnDU/kghb97CcbswSTrGfX9ywYCRCstD+8 rAwJhoV76+z0ebKvkOmG664wJYRxKZLWeKIX8u4ku3c9dIxt5L4q59V5UN3q6Z/XdHbY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Merge a domain's {cpuid,msr} policy objects Message-Id: Date: Wed, 09 Aug 2023 23:55:50 +0000 commit 99d01e372938be424a3622ff4e40bf3a77604acc Author: Andrew Cooper AuthorDate: Wed Mar 29 11:32:25 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Merge a domain's {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Drop the d->arch.msr pointer, and union d->arch.cpuid to give it a second name of cpu_policy in the interim. Merge init_domain_{cpuid,msr}_policy() into a single init_domain_cpu_policy(), moving the implementation into cpu-policy.c No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bd13dae34809e61e37ba1cd5de893c5c10c46256) --- xen/arch/x86/cpu-policy.c | 49 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 23 ------------------- xen/arch/x86/domain.c | 15 ++++-------- xen/arch/x86/domctl.c | 35 ++++++++++++++-------------- xen/arch/x86/msr.c | 44 ------------------------------------ xen/include/asm-x86/cpu-policy.h | 4 ++++ xen/include/asm-x86/cpuid.h | 3 --- xen/include/asm-x86/domain.h | 13 ++++++++--- xen/include/asm-x86/msr.h | 1 - 9 files changed, 85 insertions(+), 102 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e47fbeb04d..4c5fd70cf1 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -16,3 +19,49 @@ struct cpu_policy __read_mostly pv_def_cpu_policy; struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif + +int init_domain_cpu_policy(struct domain *d) +{ + struct cpu_policy *p = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); + + if ( !p ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + + p = xmemdup(p); + if ( !p ) + return -ENOMEM; + + /* See comment in ctxt_switch_levelling() */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); + } + + d->arch.cpu_policy = p; + + recalculate_cpuid_policy(d); + + return 0; +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 3368d07efc..026a6cc523 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -755,29 +755,6 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } -int init_domain_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !p ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - p = xmemdup(p); - if ( !p ) - return -ENOMEM; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; -} - void __init init_dom0_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b3774af1a5..314b42d04e 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -64,6 +64,7 @@ #include #include #include +#include #include #include #include @@ -534,8 +535,7 @@ int arch_domain_create(struct domain *d, d->arch.ctxt_switch = &idle_csw; - d->arch.cpuid = ZERO_BLOCK_PTR; /* Catch stray misuses. */ - d->arch.msr = ZERO_BLOCK_PTR; + d->arch.cpu_policy = ZERO_BLOCK_PTR; /* Catch stray misuses. */ return 0; } @@ -588,10 +588,7 @@ int arch_domain_create(struct domain *d, goto fail; paging_initialised = true; - if ( (rc = init_domain_cpuid_policy(d)) ) - goto fail; - - if ( (rc = init_domain_msr_policy(d)) ) + if ( (rc = init_domain_cpu_policy(d)) ) goto fail; d->arch.ioport_caps = @@ -660,8 +657,7 @@ int arch_domain_create(struct domain *d, iommu_domain_destroy(d); cleanup_domain_irq_mapping(d); free_xenheap_page(d->shared_info); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); if ( paging_initialised ) paging_final_teardown(d); free_perdomain_mappings(d); @@ -675,8 +671,7 @@ void arch_domain_destroy(struct domain *d) hvm_domain_destroy(d); xfree(d->arch.e820); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); free_domain_pirqs(d); if ( !is_idle_domain(d) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 61c638f5c3..c000ed71bd 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -219,11 +219,11 @@ void domain_cpu_policy_changed(struct domain *d) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct old_cpu_policy new = {}; + struct cpu_policy *new; struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }; + struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -233,33 +233,33 @@ static int update_domain_cpu_policy(struct domain *d, return -EOPNOTSUPP; } - /* Start by copying the domain's existing policies. */ - if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || - !(new.msr = xmemdup(d->arch.msr)) ) + /* Start by copying the domain's existing policy. */ + if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; + old_new = (struct old_cpu_policy){ new, new }; + /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->leaves, xdpc->nr_leaves, + new, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) + new, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); + x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); if ( ret ) goto out; /* - * Audit was successful. Replace existing policies, leaving the old - * policies to be freed. + * Audit was successful. Replace the existing policy, leaving the old one + * to be freed. */ - SWAP(new.cpuid, d->arch.cpuid); - SWAP(new.msr, d->arch.msr); + SWAP(new, d->arch.cpu_policy); /* TODO: Drop when x86_cpu_policies_are_compatible() is completed. */ recalculate_cpuid_policy(d); @@ -268,9 +268,8 @@ static int update_domain_cpu_policy(struct domain *d, domain_cpu_policy_changed(d); out: - /* Free whichever cpuid/msr structs are not installed in struct domain. */ - xfree(new.cpuid); - xfree(new.msr); + /* Free whichever struct is not installed in struct domain. */ + xfree(new); if ( ret ) { @@ -1461,7 +1460,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - d->arch.cpuid, + d->arch.cpu_policy, domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; @@ -1470,7 +1469,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - d->arch.msr, + d->arch.cpu_policy, domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index bc19ec356e..7bf8516e26 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -119,50 +119,6 @@ void __init init_guest_msr_policy(void) } } -int init_domain_msr_policy(struct domain *d) -{ - struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !mp ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - mp = xmemdup(mp); - if ( !mp ) - return -ENOMEM; - - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - mp->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - mp->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - - d->arch.msr = mp; - - return 0; -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index eef14bb426..9ba34bbf5e 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -3,6 +3,7 @@ #define X86_CPU_POLICY_H struct cpu_policy; +struct domain; extern struct cpu_policy raw_cpu_policy; extern struct cpu_policy host_cpu_policy; @@ -11,4 +12,7 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Allocate and initialise a CPU policy suitable for the domain. */ +int init_domain_cpu_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index ea05862773..7f81b998ce 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -49,9 +49,6 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Allocate and initialise a CPUID policy suitable for the domain. */ -int init_domain_cpuid_policy(struct domain *d); - /* Apply dom0-specific tweaks to the CPUID policy. */ void init_dom0_cpuid_policy(struct domain *d); diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index 53d5a43ec0..8175ef1a51 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -368,9 +368,16 @@ struct arch_domain */ uint8_t x87_fip_width; - /* CPUID and MSR policy objects. */ - struct cpuid_policy *cpuid; - struct msr_policy *msr; + /* + * The domain's CPU Policy. "cpu_policy" is considered the canonical + * pointer, but the "cpuid" and "msr" aliases exist so the most + * appropriate one can be used for local code clarity. + */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + struct cpu_policy *msr; + }; struct PITState vpit; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 130c80c9cf..b9d0a96d9d 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -334,7 +334,6 @@ struct vcpu_msrs }; void init_guest_msr_policy(void); -int init_domain_msr_policy(struct domain *d); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:02 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581581.910525 (Exim 4.92) (envelope-from ) id 1qTt22-0002nG-AZ; Wed, 09 Aug 2023 23:56:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581581.910525; Wed, 09 Aug 2023 23:56:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt22-0002n9-81; Wed, 09 Aug 2023 23:56:02 +0000 Received: by outflank-mailman (input) for mailman id 581581; Wed, 09 Aug 2023 23:56:00 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt20-0002mr-7S for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:00 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt20-0008LK-6d for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:00 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt20-0006RC-5v for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:00 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=CDFwN1qzgz0OLU3qmcqybSQLcgpfNh1SUKGZLzLlmUo=; b=Rj0/nmwGuYYyEUiB1HHaEA32qj SVDPQOc8B6WXTCkZdMFE2lJiveLs+VEFyGvudxa5rxVYp+/zPCUYwuuYi70KXMredsRhsaMpXOTT2 XHElC0YFr+1rZ6R9o9/O0OVopZ+NJqj8ELp3v0dXW++zgKfJ4knD5XXDVSewtsvjTSzM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Merge xc_cpu_policy's cpuid and msr objects Message-Id: Date: Wed, 09 Aug 2023 23:56:00 +0000 commit cfcf8333505bc5591a9b512cee52f55cbf2b1719 Author: Andrew Cooper AuthorDate: Wed Mar 29 12:37:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Merge xc_cpu_policy's cpuid and msr objects Right now, they're the same underlying type, containing disjoint information. Use a single object instead. Also take the opportunity to rename 'entries' to 'msrs' which is more descriptive, and more in line with nr_msrs being the count of MSR entries in the API. test-tsx uses xg_private.h to access the internals of xc_cpu_policy, so needs updating at the same time. Take the opportunity to improve the code clarity by passing a cpu_policy rather than an xc_cpu_policy into some functions. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c9985233ca663fea20fc8807cf509d2e3fef0dca) --- tools/libxc/xc_cpuid_x86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 08e8772417..539b0d2bde 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -434,7 +434,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, xc_dominfo_t di; unsigned int i, nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; - struct cpuid_policy *p = NULL; + struct cpu_policy *p = NULL; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; uint32_t len = ARRAY_SIZE(host_featureset); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581582.910528 (Exim 4.92) (envelope-from ) id 1qTt2C-0002q5-Cf; Wed, 09 Aug 2023 23:56:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581582.910528; Wed, 09 Aug 2023 23:56:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2C-0002pv-9T; Wed, 09 Aug 2023 23:56:12 +0000 Received: by outflank-mailman (input) for mailman id 581582; Wed, 09 Aug 2023 23:56:10 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2A-0002pX-AK for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:10 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2A-0008Le-9b for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:10 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt2A-0006Rx-90 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:56:10 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zqhhmxcpO9vHT8q/7WiE2n6J2kMoTgj2tH+Sy68XKj0=; b=O0e/QTL0WaDZFGUYRb8dVPMaZ8 OIiwqgLNpDHsBH8Tp5tJmk4FMZTTCPzfI6vfea/RrSry3zRzNk918tv1B8Eh4dtGGZMkM+FjL+i52 SWXODbLbrczJux/DmdRCkVQsFEWEAH6CYt3rYrAwTMzupCW5JAjZwG1WDbgZYOp6Hpys=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Drop struct old_cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:56:10 +0000 commit bdcc1765f184e2b3678b5c1fc77bb9dd8681e426 Author: Andrew Cooper AuthorDate: Wed Mar 29 12:01:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Drop struct old_cpu_policy With all the complicated callers of x86_cpu_policies_are_compatible() updated to use a single cpu_policy object, we can drop the final user of struct old_cpu_policy. Update x86_cpu_policies_are_compatible() to take (new) cpu_policy pointers, reducing the amount of internal pointer chasing, and update all callers to pass their cpu_policy objects directly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 66c5c99656314451ff9520f91cff5bb39fee9fed) --- tools/tests/cpu-policy/test-cpu-policy.c | 50 ++++++++++---------------------- xen/arch/x86/domctl.c | 7 ++--- xen/include/xen/lib/x86/cpu-policy.h | 12 ++------ xen/lib/x86/policy.c | 10 +++---- 4 files changed, 25 insertions(+), 54 deletions(-) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index d8af5581ab..a7c19be63f 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -88,7 +88,7 @@ static bool leaves_are_sorted(const xen_cpuid_leaf_t *leaves, unsigned int nr) static void test_cpuid_current(void) { - struct cpuid_policy p; + struct cpu_policy p; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; unsigned int nr = ARRAY_SIZE(leaves); int rc; @@ -108,7 +108,7 @@ static void test_cpuid_current(void) static void test_cpuid_serialise_success(void) { static const struct test { - struct cpuid_policy p; + struct cpu_policy p; const char *name; unsigned int nr_leaves; } tests[] = { @@ -232,7 +232,7 @@ static void test_cpuid_serialise_success(void) static void test_msr_serialise_success(void) { static const struct test { - struct msr_policy p; + struct cpu_policy p; const char *name; unsigned int nr_msrs; } tests[] = { @@ -413,7 +413,7 @@ static void test_cpuid_out_of_range_clearing(void) static const struct test { const char *name; unsigned int nr_markers; - struct cpuid_policy p; + struct cpu_policy p; } tests[] = { { .name = "basic", @@ -533,7 +533,7 @@ static void test_cpuid_out_of_range_clearing(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { const struct test *t = &tests[i]; - struct cpuid_policy *p = memdup(&t->p); + struct cpu_policy *p = memdup(&t->p); void *ptr; unsigned int nr_markers; @@ -557,23 +557,20 @@ static void test_is_compatible_success(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; } tests[] = { { .name = "Host CPUID faulting, Guest not", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, }, { .name = "Host CPUID faulting, Guest wanted", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, }, @@ -585,15 +582,8 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res != 0 || memcmp(&no_errors, &e, sizeof(no_errors)) ) @@ -607,25 +597,22 @@ static void test_is_compatible_failure(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; struct cpu_policy_errors e; } tests[] = { { .name = "Host basic.max_leaf out of range", - .guest_cpuid.basic.max_leaf = 1, + .guest.basic.max_leaf = 1, .e = { 0, -1, -1 }, }, { .name = "Host extd.max_leaf out of range", - .guest_cpuid.extd.max_leaf = 1, + .guest.extd.max_leaf = 1, .e = { 0x80000000, -1, -1 }, }, { .name = "Host no CPUID faulting, Guest wanted", - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, .e = { -1, -1, 0xce }, @@ -637,15 +624,8 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res == 0 || memcmp(&t->e, &e, sizeof(t->e)) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index c000ed71bd..adf70607c7 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -220,10 +220,9 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct cpu_policy *new; - struct cpu_policy *sys = is_pv_domain(d) + const struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -237,8 +236,6 @@ static int update_domain_cpu_policy(struct domain *d, if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; - old_new = (struct old_cpu_policy){ new, new }; - /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( new, xdpc->leaves, xdpc->nr_leaves, @@ -251,7 +248,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); + ret = x86_cpu_policies_are_compatible(sys, new, &err); if ( ret ) goto out; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 53fffca552..8b27a0725b 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -379,12 +379,6 @@ struct cpu_policy #define cpuid_policy cpu_policy #define msr_policy cpu_policy -struct old_cpu_policy -{ - struct cpuid_policy *cpuid; - struct msr_policy *msr; -}; - struct cpu_policy_errors { uint32_t leaf, subleaf; @@ -559,7 +553,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); -/* +/** * Calculate whether two policies are compatible. * * i.e. Can a VM configured with @guest run on a CPU supporting @host. @@ -573,8 +567,8 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index cb2d3b8dfa..29597af833 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; @@ -15,15 +15,15 @@ int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->cpuid->basic.max_leaf > host->cpuid->basic.max_leaf ) + if ( guest->basic.max_leaf > host->basic.max_leaf ) FAIL_CPUID(0, NA); - if ( guest->cpuid->extd.max_leaf > host->cpuid->extd.max_leaf ) + if ( guest->extd.max_leaf > host->extd.max_leaf ) FAIL_CPUID(0x80000000, NA); /* TODO: Audit more CPUID data. */ - if ( ~host->msr->platform_info.raw & guest->msr->platform_info.raw ) + if ( ~host->platform_info.raw & guest->platform_info.raw ) FAIL_MSR(MSR_INTEL_PLATFORM_INFO); #undef FAIL_MSR -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:21 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581583.910533 (Exim 4.92) (envelope-from ) id 1qTt2L-0002tN-FT; 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Wed, 09 Aug 2023 23:56:20 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=oeT0rZAwQhiU6AJLGcOYwCm15YnMqDLLyleIcD1mcHs=; b=KwNggzTY03AhfoDlGPwGsO28xE hjHeYsuMSIks90Rw+itHPV5Z4C2iDcl49CBvcPvW2tghBlD2+eiZoZiU9P9/JkU6obqKYL7MZzuZK 4Q57oyBK4sUkMSkywOBV7ReW+D01jJa9xVSqm+ZrWB+/zBPiOCT/YyE/gWkh4YVytgZw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Out-of-inline the policy<->featureset convertors Message-Id: Date: Wed, 09 Aug 2023 23:56:20 +0000 commit 4ff61b27a3a7f258fdd38fb39e8f26b5755a72f6 Author: Andrew Cooper AuthorDate: Thu Mar 30 18:21:01 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Out-of-inline the policy<->featureset convertors These are already getting over-large for being inline functions, and are only going to grow further over time. Out of line them, yielding the following net delta from bloat-o-meter: add/remove: 2/0 grow/shrink: 0/4 up/down: 276/-1877 (-1601) Switch to the newer cpu_policy terminology while doing so. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1027df4c00823f8b448e3a6861cc7b6ce61ba4e4) --- tools/libxc/xc_cpuid_x86.c | 2 +- xen/arch/x86/cpuid.c | 28 +++++++++---------- xen/arch/x86/sysctl.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 52 +++++++----------------------------- xen/lib/x86/cpuid.c | 42 +++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 58 deletions(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 539b0d2bde..b936e1d0e0 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -568,7 +568,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - cpuid_featureset_to_policy(feat, p); + x86_cpu_featureset_to_policy(feat, p); } else { diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 026a6cc523..f096713044 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -367,7 +367,7 @@ static void __init calculate_host_policy(void) p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, ARRAY_SIZE(p->extd.raw) - 1); - cpuid_featureset_to_policy(boot_cpu_data.x86_capability, p); + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); recalculate_xstate(p); recalculate_misc(p); @@ -449,7 +449,7 @@ static void __init calculate_pv_max_policy(void) unsigned int i; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_max_featuremask[i]; @@ -467,7 +467,7 @@ static void __init calculate_pv_max_policy(void) guest_common_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ @@ -480,7 +480,7 @@ static void __init calculate_pv_def_policy(void) unsigned int i; *p = pv_max_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_def_featuremask[i]; @@ -489,7 +489,7 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); } @@ -501,7 +501,7 @@ static void __init calculate_hvm_max_policy(void) const uint32_t *hvm_featuremask; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_max_featuremask : hvm_shadow_max_featuremask; @@ -551,7 +551,7 @@ static void __init calculate_hvm_max_policy(void) guest_common_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -563,7 +563,7 @@ static void __init calculate_hvm_def_policy(void) const uint32_t *hvm_featuremask; *p = hvm_max_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_def_featuremask : hvm_shadow_def_featuremask; @@ -575,7 +575,7 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -645,8 +645,8 @@ void recalculate_cpuid_policy(struct domain *d) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); - cpuid_policy_to_featureset(p, fs); - cpuid_policy_to_featureset(max, max_fs); + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); if ( is_hvm_domain(d) ) { @@ -711,7 +711,7 @@ void recalculate_cpuid_policy(struct domain *d) (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); /* Pass host cacheline size through to guests. */ p->basic.clflush_size = max->basic.clflush_size; @@ -777,7 +777,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) uint32_t fs[FSCAPINTS]; unsigned int i; - cpuid_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(p, fs); for ( i = 0; i < ARRAY_SIZE(fs); ++i ) { @@ -785,7 +785,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) fs[i] &= ~dom0_disable_feat[i]; } - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); recalculate_cpuid_policy(d); } diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 99d5c1b85b..4492525735 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -369,7 +369,7 @@ long arch_do_sysctl( ret = -EINVAL; if ( !ret ) - cpuid_policy_to_featureset(p, featureset); + x86_cpu_policy_to_featureset(p, featureset); /* Copy the requested featureset into place. */ if ( !ret && copy_to_guest(sysctl->u.cpu_featureset.features, diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 8b27a0725b..57b4633c86 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -387,49 +387,17 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} +/** + * Copy the featureset words out of a cpu_policy object. + */ +void x86_cpu_policy_to_featureset(const struct cpu_policy *p, + uint32_t fs[FEATURESET_NR_ENTRIES]); -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} +/** + * Copy the featureset words back into a cpu_policy object. + */ +void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], + struct cpu_policy *p); static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) { diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index b2def4c9bc..275bea7dff 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -60,6 +60,48 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor) } } +void x86_cpu_policy_to_featureset( + const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +void x86_cpu_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:31 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581584.910537 (Exim 4.92) (envelope-from ) id 1qTt2V-0002vo-Gj; Wed, 09 Aug 2023 23:56:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581584.910537; Wed, 09 Aug 2023 23:56:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2V-0002vh-EI; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ozU0/pA5CeGfeO1KobwgfSHqplAFV7n4O0bTU5GmBMc=; b=bDD/Cb2xYeDd4wMetRu46+Wleq hBhWEmc5yo2mcxpHqbIRcFRMbtirRgM6fxOpPI+qxeRcISaT9voE1yMSFiq5ZJUB3o0zTXzh3FlNo FUubIoOEVCB4dv/lPSluhMncCyisS7AhH11aPwgoLWFPzGyBt2kaYQVK9PRHvl+XiM0c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Move MSR policy initialisation logic into cpu-policy.c Message-Id: Date: Wed, 09 Aug 2023 23:56:30 +0000 commit 279c1fb626141a6b007c172dcacbe4d07de2f948 Author: Andrew Cooper AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be) --- xen/arch/x86/cpu-policy.c | 84 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/msr.c | 84 ---------------------------------------- xen/arch/x86/setup.c | 3 +- xen/include/asm-x86/cpu-policy.h | 3 ++ xen/include/asm-x86/msr.h | 1 - 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 4c5fd70cf1..d774d281c2 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 7bf8516e26..40a7a93b24 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -35,90 +35,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 44b09b8be9..7a5253fd40 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -1945,7 +1946,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index b9d0a96d9d..b509a5e564 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -333,7 +333,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:41 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581585.910541 (Exim 4.92) (envelope-from ) id 1qTt2f-0002yJ-JA; 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Wed, 09 Aug 2023 23:56:40 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aDxyM9b+PZSKMTT+ZwslLpsV9cuBjoqmPu8jjweE5TU=; b=n5/P+nC//C+/0W1l4xsiBdhJAg axYqjVw1wu9LorlX+pqqpKN2IimT7d50RahUOoMQ40Y+H5DlUa0u4wn4BdGcpzSlsLF+wRzhAYm/v ItwBmYkls4PpcW6OO9AlHfC9jt9V6GuAdeLbYhNFc966FL22qMhrX9EFnfvvk/PFTSWc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Message-Id: Date: Wed, 09 Aug 2023 23:56:40 +0000 commit 4e093cb4605ff043e200ff4d7d6bf367dba95c95 Author: Andrew Cooper AuthorDate: Mon Apr 3 19:06:02 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. Do some easy cleanup of includes. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 8eb56eb959a50bf9afd0fd590ec394e9145970a4) --- xen/arch/x86/cpu-policy.c | 724 +++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 787 +-------------------------------------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/pv/domain.c | 1 + xen/arch/x86/setup.c | 2 - xen/arch/x86/time.c | 1 + xen/include/asm-x86/cpu-policy.h | 6 + xen/include/asm-x86/cpuid.h | 11 +- 8 files changed, 737 insertions(+), 796 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index d774d281c2..a4ba8e9dea 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,13 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include #include +#include +#include #include +#include #include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -20,10 +26,332 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +const uint32_t known_features[] = INIT_KNOWN_FEATURES; + +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t deep_features[] = INIT_DEEP_FEATURES; + +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) +{ + const char *ss; + int val, rc = 0; + + do { + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; + const char *feat; + + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + /* Skip the 'no-' prefix for name comparisons. */ + feat = s; + if ( strncmp(s, "no-", 3) == 0 ) + feat += 3; + + /* (Re)initalise lhs and rhs for binary search. */ + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); + + while ( lhs < rhs ) + { + int res; + + mid = lhs + (rhs - lhs) / 2; + res = cmdline_strcmp(feat, mid->name); + + if ( res < 0 ) + { + rhs = mid; + continue; + } + if ( res > 0 ) + { + lhs = mid + 1; + continue; + } + + if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) + { + callback(mid->bit, val); + mid = NULL; + } + + break; + } + + /* + * Mid being NULL means that the name and boolean were successfully + * identified. Everything else is an error. + */ + if ( mid ) + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} +custom_param("cpuid", parse_xen_cpuid); + +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + +#define EMPTY_LEAF ((struct cpuid_leaf){}) +static void zero_leaves(struct cpuid_leaf *l, + unsigned int first, unsigned int last) +{ + memset(&l[first], 0, sizeof(*l) * (last - first + 1)); +} + +static void sanitise_featureset(uint32_t *fs) +{ + /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ + uint32_t disabled_features[ + ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; + unsigned int i; + + for ( i = 0; i < FSCAPINTS; ++i ) + { + /* Clamp to known mask. */ + fs[i] &= known_features[i]; + + /* + * Identify which features with deep dependencies have been + * disabled. + */ + disabled_features[i] = ~fs[i] & deep_features[i]; + } + + for_each_set_bit(i, (void *)disabled_features, + sizeof(disabled_features) * 8) + { + const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + unsigned int j; + + ASSERT(dfs); /* deep_features[] should guarentee this. */ + + for ( j = 0; j < FSCAPINTS; ++j ) + { + fs[j] &= ~dfs[j]; + disabled_features[j] &= ~dfs[j]; + } + } +} + +static void recalculate_xstate(struct cpu_policy *p) +{ + uint64_t xstates = XSTATE_FP_SSE; + uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; + unsigned int i, Da1 = p->xstate.Da1; + + /* + * The Da1 leaf is the only piece of information preserved in the common + * case. Everything else is derived from other feature state. + */ + memset(&p->xstate, 0, sizeof(p->xstate)); + + if ( !p->basic.xsave ) + return; + + if ( p->basic.avx ) + { + xstates |= X86_XCR0_YMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_YMM_POS] + + xstate_sizes[X86_XCR0_YMM_POS]); + } + + if ( p->feat.mpx ) + { + xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_BNDCSR_POS] + + xstate_sizes[X86_XCR0_BNDCSR_POS]); + } + + if ( p->feat.avx512f ) + { + xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_HI_ZMM_POS] + + xstate_sizes[X86_XCR0_HI_ZMM_POS]); + } + + if ( p->feat.pku ) + { + xstates |= X86_XCR0_PKRU; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_PKRU_POS] + + xstate_sizes[X86_XCR0_PKRU_POS]); + } + + p->xstate.max_size = xstate_size; + p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; + p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; + + p->xstate.Da1 = Da1; + if ( p->xstate.xsaves ) + { + p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; + p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; + } + else + xstates &= ~XSTATE_XSAVES_ONLY; + + for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + { + uint64_t curr_xstate = 1ul << i; + + if ( !(xstates & curr_xstate) ) + continue; + + p->xstate.comp[i].size = xstate_sizes[i]; + p->xstate.comp[i].offset = xstate_offsets[i]; + p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; + p->xstate.comp[i].align = curr_xstate & xstate_align; + } +} + +/* + * Misc adjustments to the policy. Mostly clobbering reserved fields and + * duplicating shared fields. Intentionally hidden fields are annotated. + */ +static void recalculate_misc(struct cpu_policy *p) +{ + p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ + p->basic.apic_id = 0; /* Dynamic. */ + + p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ + p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ + + p->basic.raw[0x8] = EMPTY_LEAF; + + /* TODO: Rework topology logic. */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + p->basic.raw[0xc] = EMPTY_LEAF; + + p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; + + /* Most of Power/RAS hidden from guests. */ + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; + + p->extd.raw[0x8].d = 0; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ + p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ + p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ + + p->extd.vendor_ebx = 0; + p->extd.vendor_ecx = 0; + p->extd.vendor_edx = 0; + + p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; + + p->extd.raw[0x5] = EMPTY_LEAF; + p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; + + p->extd.raw[0x8].a &= 0x0000ffff; + p->extd.raw[0x8].c = 0; + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + zero_leaves(p->basic.raw, 0x2, 0x3); + memset(p->cache.raw, 0, sizeof(p->cache.raw)); + zero_leaves(p->basic.raw, 0x9, 0xa); + + p->extd.vendor_ebx = p->basic.vendor_ebx; + p->extd.vendor_ecx = p->basic.vendor_ecx; + p->extd.vendor_edx = p->basic.vendor_edx; + + p->extd.raw_fms = p->basic.raw_fms; + p->extd.raw[0x1].b &= 0xff00ffff; + p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; + + p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ + p->extd.raw[0x8].c &= 0x0003f0ff; + + p->extd.raw[0x9] = EMPTY_LEAF; + + zero_leaves(p->extd.raw, 0xb, 0x18); + + /* 0x19 - TLB details. Pass through. */ + /* 0x1a - Perf hints. Pass through. */ + + p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ + p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ + p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ + p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ + p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ + p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ + break; + } +} + static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; + x86_cpuid_policy_fill_native(p); + + /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ + ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -34,9 +362,50 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { struct cpu_policy *p = &host_cpu_policy; + unsigned int max_extd_leaf; *p = raw_cpu_policy; + p->basic.max_leaf = + min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); + p->feat.max_subleaf = + min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); + + max_extd_leaf = p->extd.max_leaf; + + /* + * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be + * dispatch serialising for Spectre mitigations. Extend max_extd_leaf + * beyond what hardware supports, to include the feature leaf containing + * this information. + */ + if ( cpu_has_lfence_dispatch ) + max_extd_leaf = max(max_extd_leaf, 0x80000021); + + p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, + ARRAY_SIZE(p->extd.raw) - 1); + + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); + recalculate_xstate(p); + recalculate_misc(p); + + /* When vPMU is disabled, drop it from the host policy. */ + if ( vpmu_mode == XENPMU_MODE_OFF ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( p->extd.svm ) + { + /* Clamp to implemented features which require hardware support. */ + p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | + (1u << SVM_FEATURE_LBRV) | + (1u << SVM_FEATURE_NRIPS) | + (1u << SVM_FEATURE_PAUSEFILTER) | + (1u << SVM_FEATURE_DECODEASSISTS)); + /* Enable features which are always emulated. */ + p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | + (1u << SVM_FEATURE_TSCRATEMSR)); + } + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; @@ -51,11 +420,88 @@ static void __init calculate_host_policy(void) ARCH_CAPS_PBRSB_NO); } +static void __init guest_common_default_feature_adjustments(uint32_t *fs) +{ + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * On certain hardware, speculative or errata workarounds can result in + * TSX being placed in "force-abort" mode, where it doesn't actually + * function as expected, but is technically compatible with the ISA. + * + * Do not advertise RTM to guests by default if it won't actually work. + */ + if ( rtm_disabled ) + __clear_bit(X86_FEATURE_RTM, fs); +} + +static void __init guest_common_feature_adjustments(uint32_t *fs) +{ + /* Unconditionally claim to be able to set the hypervisor bit. */ + __set_bit(X86_FEATURE_HYPERVISOR, fs); + + /* + * If IBRS is offered to the guest, unconditionally offer STIBP. It is a + * nop on non-HT hardware, and has this behaviour to make heterogeneous + * setups easier to manage. + */ + if ( test_bit(X86_FEATURE_IBRSB, fs) ) + __set_bit(X86_FEATURE_STIBP, fs); + if ( test_bit(X86_FEATURE_IBRS, fs) ) + __set_bit(X86_FEATURE_AMD_STIBP, fs); + + /* + * On hardware which supports IBRS/IBPB, we can offer IBPB independently + * of IBRS by using the AMD feature bit. An administrator may wish for + * performance reasons to offer IBPB without IBRS. + */ + if ( host_cpu_policy.feat.ibrsb ) + __set_bit(X86_FEATURE_IBPB, fs); +} + static void __init calculate_pv_max_policy(void) { struct cpu_policy *p = &pv_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_max_featuremask[i]; + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); + + p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ p->arch_caps.raw = 0; /* Not supported yet. */ } @@ -63,15 +509,83 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { struct cpu_policy *p = &pv_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = pv_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_def_featuremask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } static void __init calculate_hvm_max_policy(void) { struct cpu_policy *p = &hvm_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_max_featuremask : hvm_shadow_max_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + /* + * Xen can provide an (x2)APIC emulation to HVM guests even if the host's + * (x2)APIC isn't enabled. + */ + __set_bit(X86_FEATURE_APIC, fs); + __set_bit(X86_FEATURE_X2APIC, fs); + + /* + * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in + * long mode (and init_amd() has cleared it out of host capabilities), but + * HVM guests are able if running in protected mode. + */ + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + raw_cpu_policy.basic.sep ) + __set_bit(X86_FEATURE_SEP, fs); + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + /* + * With VT-x, some features are only supported by Xen if dedicated + * hardware support is also available. + */ + if ( cpu_has_vmx ) + { + if ( !cpu_has_vmx_mpx ) + __clear_bit(X86_FEATURE_MPX, fs); + + if ( !cpu_has_vmx_xsaves ) + __clear_bit(X86_FEATURE_XSAVES, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; @@ -82,8 +596,25 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { struct cpu_policy *p = &hvm_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = hvm_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_def_featuremask : hvm_shadow_def_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } void __init init_guest_cpu_policies(void) @@ -149,3 +680,196 @@ int init_domain_cpu_policy(struct domain *d) return 0; } + +void recalculate_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + const struct cpu_policy *max = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; + unsigned int i; + + if ( !max ) + { + ASSERT_UNREACHABLE(); + return; + } + + p->x86_vendor = x86_cpuid_lookup_vendor( + p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); + + p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); + p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); + p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, + ((p->x86_vendor & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) + ? CPUID_GUEST_NR_EXTD_AMD + : CPUID_GUEST_NR_EXTD_INTEL) - 1); + + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); + + if ( is_hvm_domain(d) ) + { + /* + * HVM domains using Shadow paging have further restrictions on their + * available paging features. + */ + if ( !hap_enabled(d) ) + { + for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) + max_fs[i] &= hvm_shadow_max_featuremask[i]; + } + + /* Hide nested-virt if it hasn't been explicitly configured. */ + if ( !nestedhvm_enabled(d) ) + { + __clear_bit(X86_FEATURE_VMX, max_fs); + __clear_bit(X86_FEATURE_SVM, max_fs); + } + } + + /* + * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits + * affect how to interpret topology information in other cpuid leaves. + */ + __set_bit(X86_FEATURE_HTT, max_fs); + __set_bit(X86_FEATURE_X2APIC, max_fs); + __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); + + /* + * 32bit PV domains can't use any Long Mode features, and cannot use + * SYSCALL on non-AMD hardware. + */ + if ( is_pv_32bit_domain(d) ) + { + __clear_bit(X86_FEATURE_LM, max_fs); + if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + __clear_bit(X86_FEATURE_SYSCALL, max_fs); + } + + /* + * ITSC is masked by default (so domains are safe to migrate), but a + * toolstack which has configured disable_migrate or vTSC for a domain may + * safely select it, and needs a way of doing so. + */ + if ( cpu_has_itsc && (d->disable_migrate || d->arch.vtsc) ) + __set_bit(X86_FEATURE_ITSC, max_fs); + + /* Clamp the toolstacks choices to reality. */ + for ( i = 0; i < ARRAY_SIZE(fs); i++ ) + fs[i] &= max_fs[i]; + + if ( p->basic.max_leaf < XSTATE_CPUID ) + __clear_bit(X86_FEATURE_XSAVE, fs); + + sanitise_featureset(fs); + + /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ + fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & + (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); + + x86_cpu_featureset_to_policy(fs, p); + + /* Pass host cacheline size through to guests. */ + p->basic.clflush_size = max->basic.clflush_size; + + p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); + p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, + paging_max_paddr_bits(d)); + p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, + (p->basic.pae || p->basic.pse36) ? 36 : 32); + + p->extd.maxlinaddr = p->extd.lm ? 48 : 32; + + recalculate_xstate(p); + recalculate_misc(p); + + for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) + { + if ( p->cache.subleaf[i].type >= 1 && + p->cache.subleaf[i].type <= 3 ) + { + /* Subleaf has a valid cache type. Zero reserved fields. */ + p->cache.raw[i].a &= 0xffffc3ffu; + p->cache.raw[i].d &= 0x00000007u; + } + else + { + /* Subleaf is not valid. Zero the rest of the union. */ + zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); + break; + } + } + + if ( vpmu_mode == XENPMU_MODE_OFF || + ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.svm ) + p->extd.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.page1gb ) + p->extd.raw[0x19] = EMPTY_LEAF; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( cpu_has_arch_caps ) + p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + x86_cpu_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } +} + +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); + + /* Find some more clever allocation scheme if this trips. */ + BUILD_BUG_ON(sizeof(struct cpu_policy) > PAGE_SIZE); + + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index f096713044..f33dd29d4d 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -1,601 +1,15 @@ -#include -#include -#include #include #include +#include + +#include + #include #include -#include -#include -#include #include -#include -#include -#include #include -const uint32_t known_features[] = INIT_KNOWN_FEATURES; - -static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; -static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t __initconst hvm_hap_max_featuremask[] = - INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t __initconst hvm_shadow_def_featuremask[] = - INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t __initconst hvm_hap_def_featuremask[] = - INIT_HVM_HAP_DEF_FEATURES; -static const uint32_t deep_features[] = INIT_DEEP_FEATURES; - -static const struct feature_name { - const char *name; - unsigned int bit; -} feature_names[] __initconstrel = INIT_FEATURE_NAMES; - -/* - * Parse a list of cpuid feature names -> bool, calling the callback for any - * matches found. - * - * always_inline, because this is init code only and we really don't want a - * function pointer call in the middle of the loop. - */ -static int __init always_inline parse_cpuid( - const char *s, void (*callback)(unsigned int feat, bool val)) -{ - const char *ss; - int val, rc = 0; - - do { - const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; - const char *feat; - - ss = strchr(s, ','); - if ( !ss ) - ss = strchr(s, '\0'); - - /* Skip the 'no-' prefix for name comparisons. */ - feat = s; - if ( strncmp(s, "no-", 3) == 0 ) - feat += 3; - - /* (Re)initalise lhs and rhs for binary search. */ - lhs = feature_names; - rhs = feature_names + ARRAY_SIZE(feature_names); - - while ( lhs < rhs ) - { - int res; - - mid = lhs + (rhs - lhs) / 2; - res = cmdline_strcmp(feat, mid->name); - - if ( res < 0 ) - { - rhs = mid; - continue; - } - if ( res > 0 ) - { - lhs = mid + 1; - continue; - } - - if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) - { - callback(mid->bit, val); - mid = NULL; - } - - break; - } - - /* - * Mid being NULL means that the name and boolean were successfully - * identified. Everything else is an error. - */ - if ( mid ) - rc = -EINVAL; - - s = ss + 1; - } while ( *ss ); - - return rc; -} - -static void __init _parse_xen_cpuid(unsigned int feat, bool val) -{ - if ( !val ) - setup_clear_cpu_cap(feat); - else if ( feat == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); -} - -static int __init parse_xen_cpuid(const char *s) -{ - return parse_cpuid(s, _parse_xen_cpuid); -} -custom_param("cpuid", parse_xen_cpuid); - -static bool __initdata dom0_cpuid_cmdline; -static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; -static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; - -static void __init _parse_dom0_cpuid(unsigned int feat, bool val) -{ - __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); - __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); -} - -static int __init parse_dom0_cpuid(const char *s) -{ - dom0_cpuid_cmdline = true; - - return parse_cpuid(s, _parse_dom0_cpuid); -} -custom_param("dom0-cpuid", parse_dom0_cpuid); - #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void zero_leaves(struct cpuid_leaf *l, - unsigned int first, unsigned int last) -{ - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); -} - -static void sanitise_featureset(uint32_t *fs) -{ - /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ - uint32_t disabled_features[ - ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; - unsigned int i; - - for ( i = 0; i < FSCAPINTS; ++i ) - { - /* Clamp to known mask. */ - fs[i] &= known_features[i]; - - /* - * Identify which features with deep dependencies have been - * disabled. - */ - disabled_features[i] = ~fs[i] & deep_features[i]; - } - - for_each_set_bit(i, (void *)disabled_features, - sizeof(disabled_features) * 8) - { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); - unsigned int j; - - ASSERT(dfs); /* deep_features[] should guarentee this. */ - - for ( j = 0; j < FSCAPINTS; ++j ) - { - fs[j] &= ~dfs[j]; - disabled_features[j] &= ~dfs[j]; - } - } -} - -static void recalculate_xstate(struct cpuid_policy *p) -{ - uint64_t xstates = XSTATE_FP_SSE; - uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; - unsigned int i, Da1 = p->xstate.Da1; - - /* - * The Da1 leaf is the only piece of information preserved in the common - * case. Everything else is derived from other feature state. - */ - memset(&p->xstate, 0, sizeof(p->xstate)); - - if ( !p->basic.xsave ) - return; - - if ( p->basic.avx ) - { - xstates |= X86_XCR0_YMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_YMM_POS] + - xstate_sizes[X86_XCR0_YMM_POS]); - } - - if ( p->feat.mpx ) - { - xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_BNDCSR_POS] + - xstate_sizes[X86_XCR0_BNDCSR_POS]); - } - - if ( p->feat.avx512f ) - { - xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_HI_ZMM_POS] + - xstate_sizes[X86_XCR0_HI_ZMM_POS]); - } - - if ( p->feat.pku ) - { - xstates |= X86_XCR0_PKRU; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_PKRU_POS] + - xstate_sizes[X86_XCR0_PKRU_POS]); - } - - p->xstate.max_size = xstate_size; - p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; - p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; - - p->xstate.Da1 = Da1; - if ( p->xstate.xsaves ) - { - p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; - p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; - } - else - xstates &= ~XSTATE_XSAVES_ONLY; - - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) - { - uint64_t curr_xstate = 1ul << i; - - if ( !(xstates & curr_xstate) ) - continue; - - p->xstate.comp[i].size = xstate_sizes[i]; - p->xstate.comp[i].offset = xstate_offsets[i]; - p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; - p->xstate.comp[i].align = curr_xstate & xstate_align; - } -} - -/* - * Misc adjustments to the policy. Mostly clobbering reserved fields and - * duplicating shared fields. Intentionally hidden fields are annotated. - */ -static void recalculate_misc(struct cpuid_policy *p) -{ - p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ - p->basic.apic_id = 0; /* Dynamic. */ - - p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ - p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ - - p->basic.raw[0x8] = EMPTY_LEAF; - - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - - p->basic.raw[0xc] = EMPTY_LEAF; - - p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; - - /* Most of Power/RAS hidden from guests. */ - p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; - - p->extd.raw[0x8].d = 0; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ - p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ - p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ - - p->extd.vendor_ebx = 0; - p->extd.vendor_ecx = 0; - p->extd.vendor_edx = 0; - - p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; - - p->extd.raw[0x5] = EMPTY_LEAF; - p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; - - p->extd.raw[0x8].a &= 0x0000ffff; - p->extd.raw[0x8].c = 0; - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - zero_leaves(p->basic.raw, 0x2, 0x3); - memset(p->cache.raw, 0, sizeof(p->cache.raw)); - zero_leaves(p->basic.raw, 0x9, 0xa); - - p->extd.vendor_ebx = p->basic.vendor_ebx; - p->extd.vendor_ecx = p->basic.vendor_ecx; - p->extd.vendor_edx = p->basic.vendor_edx; - - p->extd.raw_fms = p->basic.raw_fms; - p->extd.raw[0x1].b &= 0xff00ffff; - p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; - - p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ - p->extd.raw[0x8].c &= 0x0003f0ff; - - p->extd.raw[0x9] = EMPTY_LEAF; - - zero_leaves(p->extd.raw, 0xb, 0x18); - - /* 0x19 - TLB details. Pass through. */ - /* 0x1a - Perf hints. Pass through. */ - - p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ - p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ - p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ - p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ - p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ - p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ - break; - } -} - -static void __init calculate_raw_policy(void) -{ - struct cpuid_policy *p = &raw_cpu_policy; - - x86_cpuid_policy_fill_native(p); - - /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ - ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); -} - -static void __init calculate_host_policy(void) -{ - struct cpuid_policy *p = &host_cpu_policy; - unsigned int max_extd_leaf; - - *p = raw_cpu_policy; - - p->basic.max_leaf = - min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); - p->feat.max_subleaf = - min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); - - max_extd_leaf = p->extd.max_leaf; - - /* - * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be - * dispatch serialising for Spectre mitigations. Extend max_extd_leaf - * beyond what hardware supports, to include the feature leaf containing - * this information. - */ - if ( cpu_has_lfence_dispatch ) - max_extd_leaf = max(max_extd_leaf, 0x80000021); - - p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, - ARRAY_SIZE(p->extd.raw) - 1); - - x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); - recalculate_xstate(p); - recalculate_misc(p); - - /* When vPMU is disabled, drop it from the host policy. */ - if ( vpmu_mode == XENPMU_MODE_OFF ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( p->extd.svm ) - { - /* Clamp to implemented features which require hardware support. */ - p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | - (1u << SVM_FEATURE_LBRV) | - (1u << SVM_FEATURE_NRIPS) | - (1u << SVM_FEATURE_PAUSEFILTER) | - (1u << SVM_FEATURE_DECODEASSISTS)); - /* Enable features which are always emulated. */ - p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | - (1u << SVM_FEATURE_TSCRATEMSR)); - } -} - -static void __init guest_common_default_feature_adjustments(uint32_t *fs) -{ - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); - - /* - * On certain hardware, speculative or errata workarounds can result in - * TSX being placed in "force-abort" mode, where it doesn't actually - * function as expected, but is technically compatible with the ISA. - * - * Do not advertise RTM to guests by default if it won't actually work. - */ - if ( rtm_disabled ) - __clear_bit(X86_FEATURE_RTM, fs); -} - -static void __init guest_common_feature_adjustments(uint32_t *fs) -{ - /* Unconditionally claim to be able to set the hypervisor bit. */ - __set_bit(X86_FEATURE_HYPERVISOR, fs); - - /* - * If IBRS is offered to the guest, unconditionally offer STIBP. It is a - * nop on non-HT hardware, and has this behaviour to make heterogeneous - * setups easier to manage. - */ - if ( test_bit(X86_FEATURE_IBRSB, fs) ) - __set_bit(X86_FEATURE_STIBP, fs); - if ( test_bit(X86_FEATURE_IBRS, fs) ) - __set_bit(X86_FEATURE_AMD_STIBP, fs); - - /* - * On hardware which supports IBRS/IBPB, we can offer IBPB independently - * of IBRS by using the AMD feature bit. An administrator may wish for - * performance reasons to offer IBPB without IBRS. - */ - if ( host_cpu_policy.feat.ibrsb ) - __set_bit(X86_FEATURE_IBPB, fs); -} - -static void __init calculate_pv_max_policy(void) -{ - struct cpuid_policy *p = &pv_max_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_max_featuremask[i]; - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) - { - __clear_bit(X86_FEATURE_IBRSB, pv_featureset); - __clear_bit(X86_FEATURE_IBRS, pv_featureset); - } - - guest_common_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); - - p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct cpuid_policy *p = &pv_def_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = pv_max_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_def_featuremask[i]; - - guest_common_feature_adjustments(pv_featureset); - guest_common_default_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_max_policy(void) -{ - struct cpuid_policy *p = &hvm_max_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_max_featuremask : hvm_shadow_max_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - /* - * Xen can provide an (x2)APIC emulation to HVM guests even if the host's - * (x2)APIC isn't enabled. - */ - __set_bit(X86_FEATURE_APIC, hvm_featureset); - __set_bit(X86_FEATURE_X2APIC, hvm_featureset); - - /* - * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in - * long mode (and init_amd() has cleared it out of host capabilities), but - * HVM guests are able if running in protected mode. - */ - if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpu_policy.basic.sep ) - __set_bit(X86_FEATURE_SEP, hvm_featureset); - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) - { - __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); - __clear_bit(X86_FEATURE_IBRS, hvm_featureset); - } - - /* - * With VT-x, some features are only supported by Xen if dedicated - * hardware support is also available. - */ - if ( cpu_has_vmx ) - { - if ( !cpu_has_vmx_mpx ) - __clear_bit(X86_FEATURE_MPX, hvm_featureset); - - if ( !cpu_has_vmx_xsaves ) - __clear_bit(X86_FEATURE_XSAVES, hvm_featureset); - } - - guest_common_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_def_policy(void) -{ - struct cpuid_policy *p = &hvm_def_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = hvm_max_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_def_featuremask : hvm_shadow_def_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - guest_common_feature_adjustments(hvm_featureset); - guest_common_default_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -void __init init_guest_cpuid(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} bool recheck_cpu_features(unsigned int cpu) { @@ -619,178 +33,6 @@ bool recheck_cpu_features(unsigned int cpu) return okay; } -void recalculate_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; - unsigned int i; - - if ( !max ) - { - ASSERT_UNREACHABLE(); - return; - } - - p->x86_vendor = x86_cpuid_lookup_vendor( - p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); - - p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); - p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); - p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) - ? CPUID_GUEST_NR_EXTD_AMD - : CPUID_GUEST_NR_EXTD_INTEL) - 1); - - x86_cpu_policy_to_featureset(p, fs); - x86_cpu_policy_to_featureset(max, max_fs); - - if ( is_hvm_domain(d) ) - { - /* - * HVM domains using Shadow paging have further restrictions on their - * available paging features. - */ - if ( !hap_enabled(d) ) - { - for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) - max_fs[i] &= hvm_shadow_max_featuremask[i]; - } - - /* Hide nested-virt if it hasn't been explicitly configured. */ - if ( !nestedhvm_enabled(d) ) - { - __clear_bit(X86_FEATURE_VMX, max_fs); - __clear_bit(X86_FEATURE_SVM, max_fs); - } - } - - /* - * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits - * affect how to interpret topology information in other cpuid leaves. - */ - __set_bit(X86_FEATURE_HTT, max_fs); - __set_bit(X86_FEATURE_X2APIC, max_fs); - __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); - - /* - * 32bit PV domains can't use any Long Mode features, and cannot use - * SYSCALL on non-AMD hardware. - */ - if ( is_pv_32bit_domain(d) ) - { - __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - __clear_bit(X86_FEATURE_SYSCALL, max_fs); - } - - /* - * ITSC is masked by default (so domains are safe to migrate), but a - * toolstack which has configured disable_migrate or vTSC for a domain may - * safely select it, and needs a way of doing so. - */ - if ( cpu_has_itsc && (d->disable_migrate || d->arch.vtsc) ) - __set_bit(X86_FEATURE_ITSC, max_fs); - - /* Clamp the toolstacks choices to reality. */ - for ( i = 0; i < ARRAY_SIZE(fs); i++ ) - fs[i] &= max_fs[i]; - - if ( p->basic.max_leaf < XSTATE_CPUID ) - __clear_bit(X86_FEATURE_XSAVE, fs); - - sanitise_featureset(fs); - - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & - (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - - x86_cpu_featureset_to_policy(fs, p); - - /* Pass host cacheline size through to guests. */ - p->basic.clflush_size = max->basic.clflush_size; - - p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); - p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, - paging_max_paddr_bits(d)); - p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, - (p->basic.pae || p->basic.pse36) ? 36 : 32); - - p->extd.maxlinaddr = p->extd.lm ? 48 : 32; - - recalculate_xstate(p); - recalculate_misc(p); - - for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) - { - if ( p->cache.subleaf[i].type >= 1 && - p->cache.subleaf[i].type <= 3 ) - { - /* Subleaf has a valid cache type. Zero reserved fields. */ - p->cache.raw[i].a &= 0xffffc3ffu; - p->cache.raw[i].d &= 0x00000007u; - } - else - { - /* Subleaf is not valid. Zero the rest of the union. */ - zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); - break; - } - } - - if ( vpmu_mode == XENPMU_MODE_OFF || - ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.svm ) - p->extd.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.page1gb ) - p->extd.raw[0x19] = EMPTY_LEAF; -} - -void __init init_dom0_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - - /* dom0 can't migrate. Give it ITSC if available. */ - if ( cpu_has_itsc ) - p->extd.itsc = true; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( cpu_has_arch_caps ) - p->feat.arch_caps = true; - - /* Apply dom0-cpuid= command line settings, if provided. */ - if ( dom0_cpuid_cmdline ) - { - uint32_t fs[FSCAPINTS]; - unsigned int i; - - x86_cpu_policy_to_featureset(p, fs); - - for ( i = 0; i < ARRAY_SIZE(fs); ++i ) - { - fs[i] |= dom0_enable_feat [i]; - fs[i] &= ~dom0_disable_feat[i]; - } - - x86_cpu_featureset_to_policy(fs, p); - - recalculate_cpuid_policy(d); - } -} - void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { @@ -1161,27 +403,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, } } -static void __init __maybe_unused build_assertions(void) -{ - BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); - - /* Find some more clever allocation scheme if this trips. */ - BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - - BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != - sizeof(raw_cpu_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != - sizeof(raw_cpu_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != - sizeof(raw_cpu_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != - sizeof(raw_cpu_policy.extd.raw)); -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 487ca4fe0c..72a30ad9b5 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -77,7 +77,6 @@ #include #include #include -#include #include diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index fe3d22dce6..f6cc6c606b 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 7a5253fd40..73da5b24ff 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -50,7 +50,6 @@ #include #include #include -#include #include #include #include @@ -1945,7 +1944,6 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !tboot_protect_mem_regions() ) panic("Could not protect TXT memory regions\n"); - init_guest_cpuid(); init_guest_cpu_policies(); if ( xen_cpuidle ) diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index 3488d21b18..37f8fea9db 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 13e2a1f86d..b361537a60 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -18,4 +18,10 @@ void init_guest_cpu_policies(void); /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + +/* Clamp the CPUID policy to reality. */ +void recalculate_cpuid_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 7f81b998ce..b32ba0bbfe 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -8,14 +8,10 @@ #include #include -#include - #include extern const uint32_t known_features[FSCAPINTS]; -void init_guest_cpuid(void); - /* * Expected levelling capabilities (given cpuid vendor/family information), * and levelling capabilities actually available (given MSR probing). @@ -49,13 +45,8 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Apply dom0-specific tweaks to the CPUID policy. */ -void init_dom0_cpuid_policy(struct domain *d); - -/* Clamp the CPUID policy to reality. */ -void recalculate_cpuid_policy(struct domain *d); - struct vcpu; +struct cpuid_leaf; void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:56:51 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:56:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581586.910545 (Exim 4.92) (envelope-from ) id 1qTt2p-00031L-MR; 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Wed, 09 Aug 2023 23:56:50 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5VTY9d1d5/KgUi4Pqt956cCtur/uEoUvZJmS6mefHcc=; b=Fx4hOBSgASVkMAxCNsVQBzVStj FBuzX+OEkAeSrZAbMS6aiYPp02WvMRSLudsi/J9cUJACHLpprBtrzYBlyrtSxwh0G2BeW27sz+6Hm deuFeTBdpOnORXHMMAfgVztyHnWvuu7e7QTeJHkp844WqAgw6yCk/dKYrhmCSZvTG/mM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/emul: Switch x86_emulate_ctxt to cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:56:50 +0000 commit 72895c4e97796d6613aa437f80cf9ba4b4cf6cb3 Author: Andrew Cooper AuthorDate: Mon Apr 3 20:03:57 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/emul: Switch x86_emulate_ctxt to cpu_policy As with struct domain, retain cpuid as a valid alias for local code clarity. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 441b1b2a50ea3656954d75e06d42c96d619ea0fc) --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 2 +- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/hvm/emulate.c | 4 ++-- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 7 +++++-- 8 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 28285aad24..a5453abc5a 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -896,7 +896,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpuid = &cp, + .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 4b01fa8b8d..3ae07738c2 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -885,7 +885,7 @@ int main(int argc, char **argv) ctxt.regs = ®s; ctxt.force_writeback = 0; - ctxt.cpuid = &cp; + ctxt.cpu_policy = &cp; ctxt.lma = sizeof(void *) == 8; ctxt.addr_size = 8 * sizeof(void *); ctxt.sp_size = 8 * sizeof(void *); diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index c32d9a55b4..9fb9046501 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -38,7 +38,7 @@ #define put_stub(stb) ((stb).addr = 0) uint32_t mxcsr_mask = 0x0000ffbf; -struct cpuid_policy cp; +struct cpu_policy cp; static char fpu_save_area[4096] __attribute__((__aligned__((64)))); static bool use_xsave; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index ee940c33ca..b6e95dc79d 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2775,7 +2775,7 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla) void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { - struct hvm_emulate_ctxt ctx = {{ 0 }}; + struct hvm_emulate_ctxt ctx = {}; int rc; hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); @@ -2850,7 +2850,7 @@ void hvm_emulate_init_once( hvmemul_ctxt->validate = validate; hvmemul_ctxt->ctxt.regs = regs; - hvmemul_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; } diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index 608360daec..5b3ce7526a 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -322,7 +322,7 @@ const struct x86_emulate_ops *shadow_init_emulation( memset(sh_ctxt, 0, sizeof(*sh_ctxt)); sh_ctxt->ctxt.regs = regs; - sh_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + sh_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; sh_ctxt->ctxt.lma = hvm_long_mode_active(curr); /* Segment cache initialisation. Primed with CS. */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 6a69af46ba..9508aaf20c 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1254,7 +1254,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpuid = currd->arch.cpuid, + .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 0eedb70002..b8f8fb4d45 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -340,7 +340,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpuid = currd->arch.cpuid, + .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index ce8226bd4c..cb9a8c41f2 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -566,8 +566,11 @@ struct x86_emulate_ctxt * Input-only state: */ - /* CPUID Policy for the domain. */ - const struct cpuid_policy *cpuid; + /* CPU policy for the domain. Allow aliases for local code clarity. */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + }; /* Set this if writes may have side effects. */ bool force_writeback; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:01 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581587.910548 (Exim 4.92) (envelope-from ) id 1qTt2z-00034L-OH; Wed, 09 Aug 2023 23:57:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581587.910548; Wed, 09 Aug 2023 23:57:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2z-00034D-Ld; Wed, 09 Aug 2023 23:57:01 +0000 Received: by outflank-mailman (input) for mailman id 581587; Wed, 09 Aug 2023 23:57:00 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2y-00033x-Qp for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:00 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt2y-0008Mc-QB for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:00 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt2y-0006Vc-PU for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:00 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OEcTNyK3aDM1aZJwWRRsZfOiQrWR0hj+vGqbyKvWucA=; b=MiYOdQh6EZsDG6m/mQAKN1+dV1 CbpjiMsKbwvzVEkWWlnDKr+FUugUZcXzrrwDjcpdFhQ9mKqfzDlM4edlMh/S/by2UzqNCJTXYN4ki UCd32lM4377DtOktcvfwhLhIvx1km28OyeDf0wdIVgoyXLE2EtlzwlnVqPy7NMxnmd3g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] tools/fuzz: Rework afl-policy-fuzzer Message-Id: Date: Wed, 09 Aug 2023 23:57:00 +0000 commit 738d89d31fa935090cdc14ff437cafadbc40ba9a Author: Andrew Cooper AuthorDate: Mon Apr 3 17:14:14 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 tools/fuzz: Rework afl-policy-fuzzer With cpuid_policy and msr_policy merged to form cpu_policy, merge the respective fuzzing logic. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit a16dcd48c2db3f6820a15ea482551d289bd9cdec) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 57 +++++++++++-------------------- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 316eb0efe0..585324e417 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -16,16 +16,19 @@ static bool debug; #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void check_cpuid(struct cpuid_policy *cp) +static void check_policy(struct cpu_policy *cp) { - struct cpuid_policy new = {}; + struct cpu_policy new = {}; size_t data_end; xen_cpuid_leaf_t *leaves = malloc(CPUID_MAX_SERIALISED_LEAVES * sizeof(xen_cpuid_leaf_t)); - unsigned int nr = CPUID_MAX_SERIALISED_LEAVES; + xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * + sizeof(xen_cpuid_leaf_t)); + unsigned int nr_leaves = CPUID_MAX_SERIALISED_LEAVES; + unsigned int nr_msrs = MSR_MAX_SERIALISED_ENTRIES; int rc; - if ( !leaves ) + if ( !leaves || !msrs ) return; /* @@ -49,12 +52,19 @@ static void check_cpuid(struct cpuid_policy *cp) x86_cpuid_policy_recalc_synth(cp); /* Serialise... */ - rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr); + rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); + assert(rc == 0); + assert(nr_leaves <= CPUID_MAX_SERIALISED_LEAVES); + + rc = x86_msr_copy_to_buffer(cp, msrs, &nr_msrs); assert(rc == 0); - assert(nr <= CPUID_MAX_SERIALISED_LEAVES); + assert(nr_msrs <= MSR_MAX_SERIALISED_ENTRIES); /* ... and deserialise. */ - rc = x86_cpuid_copy_from_buffer(&new, leaves, nr, NULL, NULL); + rc = x86_cpuid_copy_from_buffer(&new, leaves, nr_leaves, NULL, NULL); + assert(rc == 0); + + rc = x86_msr_copy_from_buffer(&new, msrs, nr_msrs, NULL); assert(rc == 0); /* The result after serialisation/deserialisaion should be identical... */ @@ -76,28 +86,6 @@ static void check_cpuid(struct cpuid_policy *cp) free(leaves); } -static void check_msr(struct msr_policy *mp) -{ - struct msr_policy new = {}; - xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * - sizeof(xen_msr_entry_t)); - unsigned int nr = MSR_MAX_SERIALISED_ENTRIES; - int rc; - - if ( !msrs ) - return; - - rc = x86_msr_copy_to_buffer(mp, msrs, &nr); - assert(rc == 0); - assert(nr <= MSR_MAX_SERIALISED_ENTRIES); - - rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); - assert(rc == 0); - assert(memcmp(mp, &new, sizeof(*mp)) == 0); - - free(msrs); -} - int main(int argc, char **argv) { FILE *fp = NULL; @@ -144,8 +132,7 @@ int main(int argc, char **argv) while ( __AFL_LOOP(1000) ) #endif { - struct cpuid_policy *cp = NULL; - struct msr_policy *mp = NULL; + struct cpu_policy *cp = NULL; if ( fp != stdin ) { @@ -160,22 +147,18 @@ int main(int argc, char **argv) } cp = calloc(1, sizeof(*cp)); - mp = calloc(1, sizeof(*mp)); - if ( !cp || !mp ) + if ( !cp ) goto skip; fread(cp, sizeof(*cp), 1, fp); - fread(mp, sizeof(*mp), 1, fp); if ( !feof(fp) ) goto skip; - check_cpuid(cp); - check_msr(mp); + check_policy(cp); skip: free(cp); - free(mp); if ( fp != stdin ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:11 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581588.910554 (Exim 4.92) (envelope-from ) id 1qTt39-00036z-QB; Wed, 09 Aug 2023 23:57:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581588.910554; Wed, 09 Aug 2023 23:57:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt39-00036t-NA; Wed, 09 Aug 2023 23:57:11 +0000 Received: by outflank-mailman (input) for mailman id 581588; Wed, 09 Aug 2023 23:57:10 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt38-00036l-UG for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libx86: Update library API for cpu_policy Message-Id: Date: Wed, 09 Aug 2023 23:57:10 +0000 commit c1adeb47797808a7655187b9ae6486f5d92f3ed1 Author: Andrew Cooper AuthorDate: Mon Apr 3 14:18:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libx86: Update library API for cpu_policy Adjust the API and comments appropriately. x86_cpu_policy_fill_native() will eventually contain MSR reads, but leave a TODO in the short term. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1b67fccf3b02825f6a036bad06cd17963d0972d2) tools/libs/guest: Fix build following libx86 changes I appear to have lost this hunk somewhere... Fixes: 1b67fccf3b02 ("libx86: Update library API for cpu_policy") Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit 48d76e6da92f9ef76c8468e299349a2f698362fa) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 4 +-- tools/libxc/xc_cpuid_x86.c | 2 +- tools/tests/cpu-policy/test-cpu-policy.c | 4 +-- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/cpu-policy.c | 4 +-- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/xstate.c | 4 +-- xen/include/xen/lib/x86/cpu-policy.h | 49 ++++++++++++++++++------------- xen/lib/x86/cpuid.c | 26 ++++++++-------- xen/lib/x86/msr.c | 4 +-- 11 files changed, 56 insertions(+), 47 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 585324e417..11df2f7802 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -48,8 +48,8 @@ static void check_policy(struct cpu_policy *cp) * Fix up the data in the source policy which isn't expected to survive * serialisation. */ - x86_cpuid_policy_clear_out_of_range_leaves(cp); - x86_cpuid_policy_recalc_synth(cp); + x86_cpu_policy_clear_out_of_range_leaves(cp); + x86_cpu_policy_recalc_synth(cp); /* Serialise... */ rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index b936e1d0e0..3067fb2169 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -558,7 +558,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *dfs; if ( !test_bit(b, disabled_features) || - !(dfs = x86_cpuid_lookup_deep_deps(b)) ) + !(dfs = x86_cpu_policy_lookup_deep_deps(b)) ) continue; for ( i = 0; i < ARRAY_SIZE(disabled_features); ++i ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index a7c19be63f..88d35c6c8e 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -95,7 +95,7 @@ static void test_cpuid_current(void) printf("Testing CPUID on current CPU\n"); - x86_cpuid_policy_fill_native(&p); + x86_cpu_policy_fill_native(&p); rc = x86_cpuid_copy_to_buffer(&p, leaves, &nr); if ( rc != 0 ) @@ -537,7 +537,7 @@ static void test_cpuid_out_of_range_clearing(void) void *ptr; unsigned int nr_markers; - x86_cpuid_policy_clear_out_of_range_leaves(p); + x86_cpu_policy_clear_out_of_range_leaves(p); /* Count the number of 0xc2's still remaining. */ for ( ptr = p, nr_markers = 0; diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 9fb9046501..7e794df11a 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -85,7 +85,7 @@ bool emul_test_init(void) unsigned long sp; - x86_cpuid_policy_fill_native(&cp); + x86_cpu_policy_fill_native(&cp); /* * The emulator doesn't use these instructions, so can always emulate diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index a4ba8e9dea..59ea49ac1b 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -176,7 +176,7 @@ static void sanitise_featureset(uint32_t *fs) for_each_set_bit(i, (void *)disabled_features, sizeof(disabled_features) * 8) { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + const uint32_t *dfs = x86_cpu_policy_lookup_deep_deps(i); unsigned int j; ASSERT(dfs); /* deep_features[] should guarentee this. */ @@ -347,7 +347,7 @@ static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; - x86_cpuid_policy_fill_native(p); + x86_cpu_policy_fill_native(p); /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 088a871969..29460135eb 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -72,7 +72,7 @@ void __init setup_clear_cpu_cap(unsigned int cap) __builtin_return_address(0), cap); __clear_bit(cap, boot_cpu_data.x86_capability); - dfs = x86_cpuid_lookup_deep_deps(cap); + dfs = x86_cpu_policy_lookup_deep_deps(cap); if (!dfs) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index adf70607c7..3cda239210 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -245,7 +245,7 @@ static int update_domain_cpu_policy(struct domain *d, goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new); + x86_cpu_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ ret = x86_cpu_policies_are_compatible(sys, new, &err); diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 3bcc523f80..7d935354ae 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -677,7 +677,7 @@ static bool valid_xcr0(u64 xcr0) int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr) { - uint64_t xcr0_max = cpuid_policy_xcr0_max(d->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(d->arch.cpuid); unsigned int i; if ( (hdr->xstate_bv & ~xcr0_accum) || @@ -701,7 +701,7 @@ int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, int handle_xsetbv(u32 index, u64 new_bv) { struct vcpu *curr = current; - uint64_t xcr0_max = cpuid_policy_xcr0_max(curr->domain->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(curr->domain->arch.cpuid); u64 mask; if ( index != XCR_XFEATURE_ENABLED_MASK ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 57b4633c86..cf7de0f29c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -399,33 +399,38 @@ void x86_cpu_policy_to_featureset(const struct cpu_policy *p, void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p); -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xcr0_max(const struct cpu_policy *p) { return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; } -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xstates(const struct cpu_policy *p) { uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); +/** + * For a specific feature, look up the dependent features. Returns NULL if + * this feature has no dependencies. Otherwise return a featureset of + * dependent features, which has been recursively flattened. + */ +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature); /** - * Recalculate the content in a CPUID policy which is derived from raw data. + * Recalculate the content in a CPU policy which is derived from raw data. */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); +void x86_cpu_policy_recalc_synth(struct cpu_policy *p); /** - * Fill a CPUID policy using the native CPUID instruction. + * Fill CPU policy using the native CPUID/RDMSR instruction. * * No sanitisation is performed, but synthesised values are calculated. * Values may be influenced by a hypervisor or from masking/faulting * configuration. */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); +void x86_cpu_policy_fill_native(struct cpu_policy *p); /** * Clear leaf data beyond the policies max leaf/subleaf settings. @@ -436,7 +441,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p); * with out-of-range leaves with stale content in them. This helper clears * them. */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p); #ifdef __XEN__ #include @@ -449,9 +454,10 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** - * Serialise a cpuid_policy object into an array of cpuid leaves. + * Serialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to serialise. + * @param policy The cpu_policy to serialise. * @param leaves The array of leaves to serialise into. * @param nr_entries The number of entries in 'leaves'. * @returns -errno @@ -460,13 +466,14 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; * leaves array is too short. On success, nr_entries is updated with the * actual number of leaves written. */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *policy, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); /** - * Unserialise a cpuid_policy object from an array of cpuid leaves. + * Unserialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to unserialise into. + * @param policy The cpu_policy to unserialise into. * @param leaves The array of leaves to unserialise from. * @param nr_entries The number of entries in 'leaves'. * @param err_leaf Optional hint for error diagnostics. @@ -474,21 +481,21 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, * @returns -errno * * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional + * incoming leaf is out of range of cpu_policy, in which case the optional * err_* pointers will identify the out-of-range indicies. * * No content validation of in-range leaves is performed. Synthesised data is * recalculated. */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, +int x86_cpuid_copy_from_buffer(struct cpu_policy *policy, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); /** - * Serialise an msr_policy object into an array. + * Serialise the MSRs of a cpu_policy object into an array. * - * @param policy The msr_policy to serialise. + * @param policy The cpu_policy to serialise. * @param msrs The array of msrs to serialise into. * @param nr_entries The number of entries in 'msrs'. * @returns -errno @@ -497,13 +504,13 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, * buffer array is too short. On success, nr_entries is updated with the * actual number of msrs written. */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, +int x86_msr_copy_to_buffer(const struct cpu_policy *policy, msr_entry_buffer_t msrs, uint32_t *nr_entries); /** - * Unserialise an msr_policy object from an array of msrs. + * Unserialise the MSRs of a cpu_policy object from an array of msrs. * - * @param policy The msr_policy object to unserialise into. + * @param policy The cpu_policy object to unserialise into. * @param msrs The array of msrs to unserialise from. * @param nr_entries The number of entries in 'msrs'. * @param err_msr Optional hint for error diagnostics. @@ -517,7 +524,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *policy, * * No content validation is performed on the data stored in the policy object. */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, +int x86_msr_copy_from_buffer(struct cpu_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 275bea7dff..1b83f7c576 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -102,13 +102,13 @@ void x86_cpu_featureset_to_policy( p->feat._7d1 = fs[FEATURESET_7d1]; } -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) +void x86_cpu_policy_recalc_synth(struct cpu_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); } -void x86_cpuid_policy_fill_native(struct cpuid_policy *p) +void x86_cpu_policy_fill_native(struct cpu_policy *p) { unsigned int i; @@ -199,7 +199,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]); cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]); - xstates = cpuid_policy_xstates(p); + xstates = cpu_policy_xstates(p); /* This logic will probably need adjusting when XCR0[63] gets used. */ BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); @@ -222,10 +222,12 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - x86_cpuid_policy_recalc_synth(p); + /* TODO MSRs */ + + x86_cpu_policy_recalc_synth(p); } -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p) { unsigned int i; @@ -260,7 +262,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) zero_leaves(p->topo.raw, i, ARRAY_SIZE(p->topo.raw) - 1); } - if ( p->basic.max_leaf < 0xd || !cpuid_policy_xstates(p) ) + if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); else { @@ -268,7 +270,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); /* First two leaves always valid. Rest depend on xstates. */ - i = max(2, 64 - __builtin_clzll(cpuid_policy_xstates(p))); + i = max(2, 64 - __builtin_clzll(cpu_policy_xstates(p))); zero_leaves(p->xstate.raw, i, ARRAY_SIZE(p->xstate.raw) - 1); @@ -278,7 +280,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) ARRAY_SIZE(p->extd.raw) - 1); } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature) +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature) { static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static const struct { @@ -333,7 +335,7 @@ static int copy_leaf_to_buffer(uint32_t leaf, uint32_t subleaf, return 0; } -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -383,7 +385,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, case 0xd: { - uint64_t xstates = cpuid_policy_xstates(p); + uint64_t xstates = cpu_policy_xstates(p); COPY_LEAF(leaf, 0, &p->xstate.raw[0]); COPY_LEAF(leaf, 1, &p->xstate.raw[1]); @@ -419,7 +421,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, return 0; } -int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, +int x86_cpuid_copy_from_buffer(struct cpu_policy *p, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf) @@ -522,7 +524,7 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, } } - x86_cpuid_policy_recalc_synth(p); + x86_cpu_policy_recalc_synth(p); return 0; diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index c4d885e7b5..e04b9ca013 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -23,7 +23,7 @@ static int copy_msr_to_buffer(uint32_t idx, uint64_t val, return 0; } -int x86_msr_copy_to_buffer(const struct msr_policy *p, +int x86_msr_copy_to_buffer(const struct cpu_policy *p, msr_entry_buffer_t msrs, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -48,7 +48,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p, return 0; } -int x86_msr_copy_from_buffer(struct msr_policy *p, +int x86_msr_copy_from_buffer(struct cpu_policy *p, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:21 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581589.910558 (Exim 4.92) (envelope-from ) id 1qTt3J-0003Au-UI; Wed, 09 Aug 2023 23:57:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581589.910558; Wed, 09 Aug 2023 23:57:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3J-0003Ak-QE; Wed, 09 Aug 2023 23:57:21 +0000 Received: by outflank-mailman (input) for mailman id 581589; Wed, 09 Aug 2023 23:57:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3J-0003AW-2I for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3J-0008N3-1Y for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt3J-0006Wi-0p for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GCHC1QNWxlwenCui+FUiUYgg7HaI+ca4ipoA1tIslxg=; b=T23e8B3UJlQ77CbQ7pj529RfaJ V6ERQTA+cYVDTUBuQbSlJEd+k5M/gxNdTnEV77tM5CYky8e17g18pUotaUME5oR2QG0i+2gUfb9UO vn0PSZn/gCx/BivBvLDXQl0YV4TesuxzZzLz2C6P0yArSZPrcwsnLHQrDEyFoZDezpgQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86: Remove temporary {cpuid,msr}_policy defines Message-Id: Date: Wed, 09 Aug 2023 23:57:21 +0000 commit f5b0f486dc3e9b94cf6a44a8877fb090cd6af911 Author: Andrew Cooper AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce) --- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 6 +++--- xen/include/asm-x86/msr.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 12 files changed, 23 insertions(+), 29 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index f33dd29d4d..ef4dca8b8d 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -37,7 +37,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 3cda239210..7fbd46e5b5 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -51,7 +51,7 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 72a30ad9b5..c9a57f3177 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -936,7 +936,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -973,7 +973,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d, bool restore) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 68db3c8f88..bffca24d93 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -593,7 +593,7 @@ static void svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 30007a999e..c5fbb6b05a 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1083,7 +1083,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 7adb3a94a4..b919b728c8 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -557,7 +557,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3258,7 +3258,7 @@ void vmx_vlapic_msr_changed(struct vcpu *v) static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 40a7a93b24..ded8897a14 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -51,8 +51,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -124,13 +123,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -248,7 +247,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -267,8 +266,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -318,7 +316,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -328,7 +326,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -340,7 +338,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -377,7 +375,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index f6cc6c606b..aafd7ea6f2 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -152,7 +152,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index de372853d1..0cc950e0d3 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -962,7 +962,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index c0f91dd4b3..8b7faab8b2 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1922,7 +1922,7 @@ in_protmode( } static bool -_amd_like(const struct cpuid_policy *cp) +_amd_like(const struct cpu_policy *cp) { return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } @@ -1930,7 +1930,7 @@ _amd_like(const struct cpuid_policy *cp) static bool amd_like(const struct x86_emulate_ctxt *ctxt) { - return _amd_like(ctxt->cpuid); + return _amd_like(ctxt->cpu_policy); } #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) @@ -2074,7 +2074,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index b509a5e564..1f4917c4f6 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -268,7 +268,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:31 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581590.910561 (Exim 4.92) (envelope-from ) id 1qTt3T-0003E8-Up; Wed, 09 Aug 2023 23:57:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581590.910561; Wed, 09 Aug 2023 23:57:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3T-0003E0-Rk; Wed, 09 Aug 2023 23:57:31 +0000 Received: by outflank-mailman (input) for mailman id 581590; Wed, 09 Aug 2023 23:57:31 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3T-0003Dk-5H for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Rework dom0 feature configuration Message-Id: Date: Wed, 09 Aug 2023 23:57:31 +0000 commit 5d624f0fb7fefb99c4bbcc8154ffbf55a9c2465c Author: Andrew Cooper AuthorDate: Fri May 12 13:52:39 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Rework dom0 feature configuration Right now, dom0's feature configuration is split between between the common path and a dom0-specific one. This mostly is by accident, and causes some very subtle bugs. First, start by clearly defining init_dom0_cpuid_policy() to be the domain that Xen builds automatically. The late hwdom case is still constructed in a mostly normal way, with the control domain having full discretion over the CPU policy. Identifying this highlights a latent bug - the two halves of the MSR_ARCH_CAPS bodge are asymmetric with respect to the hardware domain. This means that shim, or a control-only dom0 sees the MSR_ARCH_CAPS CPUID bit but none of the MSR content. This in turn declares the hardware to be retpoline-safe by failing to advertise the {R,}RSBA bits appropriately. Restrict this logic to the hardware domain, although the special case will cease to exist shortly. For the CPUID Faulting adjustment, the comment in ctxt_switch_levelling() isn't actually relevant. Provide a better explanation. Move the recalculate_cpuid_policy() call outside of the dom0-cpuid= case. This is no change for now, but will become necessary shortly. Finally, place the second half of the MSR_ARCH_CAPS bodge after the recalculate_cpuid_policy() call. This is necessary to avoid transiently breaking the hardware domain's view while the handling is cleaned up. This special case will cease to exist shortly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ef1987fcb0fdfaa7ee148024037cb5fa335a7b2d) --- xen/arch/x86/cpu-policy.c | 57 ++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 59ea49ac1b..45ba238227 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -651,29 +651,6 @@ int init_domain_cpu_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - p->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - d->arch.cpu_policy = p; recalculate_cpuid_policy(d); @@ -817,11 +794,15 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } +/* + * Adjust the CPU policy for dom0. Really, this is "the domain Xen builds + * automatically on boot", and might not have the domid 0 (e.g. pvshim). + */ void __init init_dom0_cpuid_policy(struct domain *d) { struct cpu_policy *p = d->arch.cpuid; - /* dom0 can't migrate. Give it ITSC if available. */ + /* Dom0 doesn't migrate relative to Xen. Give it ITSC if available. */ if ( cpu_has_itsc ) p->extd.itsc = true; @@ -830,7 +811,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( cpu_has_arch_caps ) + if ( is_hardware_domain(d) && cpu_has_arch_caps ) p->feat.arch_caps = true; /* Apply dom0-cpuid= command line settings, if provided. */ @@ -848,8 +829,32 @@ void __init init_dom0_cpuid_policy(struct domain *d) } x86_cpu_featureset_to_policy(fs, p); + } + + /* + * PV Control domains used to require unfiltered CPUID. This was fixed in + * Xen 4.13, but there is an cmdline knob to restore the prior behaviour. + * + * If the domain is getting unfiltered CPUID, don't let the guest kernel + * play with CPUID faulting either, as Xen's CPUID path won't cope. + */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; - recalculate_cpuid_policy(d); + recalculate_cpuid_policy(d); + + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:42 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581591.910565 (Exim 4.92) (envelope-from ) id 1qTt3d-0003IA-W5; Wed, 09 Aug 2023 23:57:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581591.910565; Wed, 09 Aug 2023 23:57:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3d-0003I2-TC; Wed, 09 Aug 2023 23:57:41 +0000 Received: by outflank-mailman (input) for mailman id 581591; Wed, 09 Aug 2023 23:57:41 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3d-0003Hv-8A for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:41 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3d-0008NY-7S for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:41 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt3d-0006Xa-6k for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:41 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6VPNKdvEiR/6SDk7UItervUt8eJjmIV4JEpUxHc96WU=; b=sqUGTbqlJBFMW6IpqjT8OpumgF +tXbOBtmcjzgPhcJxiGNfLqxI7WvQwURDO62NsI3O8MRIiiP6wDzjMCUbROLC9EblNirPOJ32uDYm bUIFoEG1Kr25vU07a7LEhV3uQCxE4cEUEyOD8qdt3MMk8vLG/OotTzhdqFP6THo9cxbo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy Message-Id: Date: Wed, 09 Aug 2023 23:57:41 +0000 commit 775b544ebe83a06d9120f119b38b00a56dcc2a86 Author: Andrew Cooper AuthorDate: Mon May 15 14:14:53 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy We are about to move MSR_ARCH_CAPS into featureset, but the order of operations (copy raw policy, then copy x86_capabilitiles[] in) will end up clobbering the ARCH_CAPS value. Some toolstacks use this information to handle TSX compatibility across the CPUs and microcode versions where support was removed. To avoid this transient breakage, read from raw_cpu_policy rather than modifying it in place. This logic will be removed entirely in due course. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 43912f8dbb1888ffd7f00adb10724c70e71927c4) --- xen/arch/x86/cpu-policy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 45ba238227..261d1daf0e 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -411,7 +411,7 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw &= + p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:57:52 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:57:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581592.910568 (Exim 4.92) (envelope-from ) id 1qTt3o-0003N7-11; Wed, 09 Aug 2023 23:57:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581592.910568; Wed, 09 Aug 2023 23:57:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3n-0003N0-Uh; Wed, 09 Aug 2023 23:57:51 +0000 Received: by outflank-mailman (input) for mailman id 581592; Wed, 09 Aug 2023 23:57:51 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3n-0003ML-BI for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:51 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3n-0008Nk-Aa for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:51 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt3n-0006Y0-9l for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:57:51 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KSL6qRdbuKPyR4UGjU/1Z7AfwmQDZUSD1zw1ya187Co=; b=iHyMutD3qUtAA8i1vkcyxv4Xi6 xaqWJoQUOQ0xDjIIQcZHQNkkN+A+tcNGhphSkfm4ayfWNXBoOFNfEMQuES8gPcTZW74zDjy8qTp+X iP2QDWCCaWA9Kw9E+SKL+tkfMGvCHJ8CKJJotE7yF70jCKygdtuNU/+cFTgQA97aPxSM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Message-Id: Date: Wed, 09 Aug 2023 23:57:51 +0000 commit eed3654beed98fd1f7b8adab86c8d60e56d273ad Author: Andrew Cooper AuthorDate: Fri May 12 17:55:21 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Bits through 24 are already defined, meaning that we're not far off needing the second word. Put both in right away. As both halves are present now, the arch_caps field is full width. Adjust the unit test, which notices. The bool bitfield names in the arch_caps union are unused, and somewhat out of date. They'll shortly be automatically generated. Add CPUID and MSR prefixes to the ./xen-cpuid verbose output, now that there are a mix of the two. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit d9fe459ffad8a6eac2f695adb2331aff83c345d1) --- tools/misc/xen-cpuid.c | 44 +++++++++++++++---------- tools/tests/cpu-policy/test-cpu-policy.c | 5 --- xen/include/public/arch-x86/cpufeatureset.h | 4 +++ xen/include/xen/lib/x86/cpu-policy.h | 50 ++++++++++++++--------------- xen/lib/x86/cpuid.c | 4 +++ 5 files changed, 59 insertions(+), 48 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 1e6baf98f6..ae8c0b2d14 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -206,31 +206,41 @@ static const char *const str_7d2[32] = [ 0] = "intel-psfd", }; +static const char *const str_m10Al[32] = +{ +}; + +static const char *const str_m10Ah[32] = +{ +}; + static const struct { const char *name; const char *abbr; const char *const *strs; } decodes[] = { - { "0x00000001.edx", "1d", str_1d }, - { "0x00000001.ecx", "1c", str_1c }, - { "0x80000001.edx", "e1d", str_e1d }, - { "0x80000001.ecx", "e1c", str_e1c }, - { "0x0000000d:1.eax", "Da1", str_Da1 }, - { "0x00000007:0.ebx", "7b0", str_7b0 }, - { "0x00000007:0.ecx", "7c0", str_7c0 }, - { "0x80000007.edx", "e7d", str_e7d }, - { "0x80000008.ebx", "e8b", str_e8b }, - { "0x00000007:0.edx", "7d0", str_7d0 }, - { "0x00000007:1.eax", "7a1", str_7a1 }, - { "0x80000021.eax", "e21a", str_e21a }, - { "0x00000007:1.ebx", "7b1", str_7b1 }, - { "0x00000007:2.edx", "7d2", str_7d2 }, - { "0x00000007:1.ecx", "7c1", str_7c1 }, - { "0x00000007:1.edx", "7d1", str_7d1 }, + { "CPUID 0x00000001.edx", "1d", str_1d }, + { "CPUID 0x00000001.ecx", "1c", str_1c }, + { "CPUID 0x80000001.edx", "e1d", str_e1d }, + { "CPUID 0x80000001.ecx", "e1c", str_e1c }, + { "CPUID 0x0000000d:1.eax", "Da1", str_Da1 }, + { "CPUID 0x00000007:0.ebx", "7b0", str_7b0 }, + { "CPUID 0x00000007:0.ecx", "7c0", str_7c0 }, + { "CPUID 0x80000007.edx", "e7d", str_e7d }, + { "CPUID 0x80000008.ebx", "e8b", str_e8b }, + { "CPUID 0x00000007:0.edx", "7d0", str_7d0 }, + { "CPUID 0x00000007:1.eax", "7a1", str_7a1 }, + { "CPUID 0x80000021.eax", "e21a", str_e21a }, + { "CPUID 0x00000007:1.ebx", "7b1", str_7b1 }, + { "CPUID 0x00000007:2.edx", "7d2", str_7d2 }, + { "CPUID 0x00000007:1.ecx", "7c1", str_7c1 }, + { "CPUID 0x00000007:1.edx", "7d1", str_7d1 }, + { "MSR_ARCH_CAPS.lo", "m10Al", str_m10Al }, + { "MSR_ARCH_CAPS.hi", "m10Ah", str_m10Ah }, }; -#define COL_ALIGN "18" +#define COL_ALIGN "24" static const char *const fs_names[] = { [XEN_SYSCTL_cpu_featureset_raw] = "Raw", diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 88d35c6c8e..093b980801 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -374,11 +374,6 @@ static void test_msr_deserialise_failure(void) .msr = { .idx = 0xce, .val = ~0ull }, .rc = -EOVERFLOW, }, - { - .name = "truncated val", - .msr = { .idx = 0x10a, .val = ~0ull }, - .rc = -EOVERFLOW, - }, }; printf("Testing MSR deserialise failure:\n"); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index b09d5bd907..cae12e23de 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -299,6 +299,10 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ + +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index bfa4250604..6d5e9edd26 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -4,22 +4,24 @@ #include -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_m10Al 16 /* 0x0000010a.eax */ +#define FEATURESET_m10Ah 17 /* 0x0000010a.edx */ struct cpuid_leaf { @@ -350,17 +352,13 @@ struct cpu_policy * fixed in hardware. */ union { - uint32_t raw; + uint64_t raw; + struct { + uint32_t lo, hi; + }; struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; + DECL_BITFIELD(m10Al); + DECL_BITFIELD(m10Ah); }; } arch_caps; diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 1b83f7c576..a95588d40b 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -79,6 +79,8 @@ void x86_cpu_policy_to_featureset( fs[FEATURESET_7d2] = p->feat._7d2; fs[FEATURESET_7c1] = p->feat._7c1; fs[FEATURESET_7d1] = p->feat._7d1; + fs[FEATURESET_m10Al] = p->arch_caps.lo; + fs[FEATURESET_m10Ah] = p->arch_caps.hi; } void x86_cpu_featureset_to_policy( @@ -100,6 +102,8 @@ void x86_cpu_featureset_to_policy( p->feat._7d2 = fs[FEATURESET_7d2]; p->feat._7c1 = fs[FEATURESET_7c1]; p->feat._7d1 = fs[FEATURESET_7d1]; + p->arch_caps.lo = fs[FEATURESET_m10Al]; + p->arch_caps.hi = fs[FEATURESET_m10Ah]; } void x86_cpu_policy_recalc_synth(struct cpu_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581593.910573 (Exim 4.92) (envelope-from ) id 1qTt3z-0003RP-4K; Wed, 09 Aug 2023 23:58:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581593.910573; Wed, 09 Aug 2023 23:58:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3z-0003RH-1d; Wed, 09 Aug 2023 23:58:03 +0000 Received: by outflank-mailman (input) for mailman id 581593; Wed, 09 Aug 2023 23:58:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3x-0003R3-EQ for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt3x-0008O1-DV for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt3x-0006YP-Ct for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1I0caUtdQe6rt2LpM447J4Ci6Y+wyHnkrviDn7CrvLE=; b=65nur4EPD/CbexoKMwnVzw0CjQ SoJS1BAgSL1v6lstz31MoPabSitGa18YqqZ/MXo+Ln3foj+sREErjbB32hut7FaRSaDvF2lSPuUSi NQfEQi1Jq8Sh/0ArmPws8nUHFqdHtqTbbPdZOJRRmustYTvFogyLjXBzSks0LnGVO+tA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: MSR_ARCH_CAPS feature names Message-Id: Date: Wed, 09 Aug 2023 23:58:01 +0000 commit 1ba3e81d73bfaba2a1f6539aa7418eda2c9f52d1 Author: Andrew Cooper AuthorDate: Fri May 12 18:50:59 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: MSR_ARCH_CAPS feature names Seed the default visibility from the dom0 special case, which for the most part just exposes the *_NO bits. EIBRS is the one non-*_NO bit, which is "just" a status bit to the guest indicating a change in implemention of IBRS which is already fully supported. Insert a block dependency from the ARCH_CAPS CPUID bit to the entire content of the MSR. This is because MSRs have no structure information similar to CPUID, and used by x86_cpu_policy_clear_out_of_range_leaves(), in order to bulk-clear inaccessable words. The overall CPUID bit is still max-only, so all of MSR_ARCH_CAPS is hidden in the default policies. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ce8c930851a5ca21c4e70f83be7e8b290ce1b519) --- tools/misc/xen-cpuid.c | 13 +++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 23 +++++++++++++++++++++++ xen/tools/gen-cpuid.py | 3 +++ 3 files changed, 39 insertions(+) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index ae8c0b2d14..ceb8a29c75 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -208,6 +208,19 @@ static const char *const str_7d2[32] = static const char *const str_m10Al[32] = { + [ 0] = "rdcl-no", [ 1] = "eibrs", + [ 2] = "rsba", [ 3] = "skip-l1dfl", + [ 4] = "intel-ssb-no", [ 5] = "mds-no", + [ 6] = "if-pschange-mc-no", [ 7] = "tsx-ctrl", + [ 8] = "taa-no", [ 9] = "mcu-ctrl", + [10] = "misc-pkg-ctrl", [11] = "energy-ctrl", + [12] = "doitm", [13] = "sbdr-ssdp-no", + [14] = "fbsdp-no", [15] = "psdp-no", + /* 16 */ [17] = "fb-clear", + [18] = "fb-clear-ctrl", [19] = "rrsba", + [20] = "bhi-no", [21] = "xapic-status", + /* 22 */ [23] = "ovrclk-status", + [24] = "pbrsb-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index cae12e23de..e87b37ab63 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -300,6 +300,29 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ +XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ +XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ +XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ +XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ +XEN_CPUFEATURE(IF_PSCHANGE_MC_NO, 16*32+ 6) /*A No Instruction fetch #MC */ +XEN_CPUFEATURE(TSX_CTRL, 16*32+ 7) /* MSR_TSX_CTRL */ +XEN_CPUFEATURE(TAA_NO, 16*32+ 8) /*A No TSX Async Abort */ +XEN_CPUFEATURE(MCU_CTRL, 16*32+ 9) /* MSR_MCU_CTRL */ +XEN_CPUFEATURE(MISC_PKG_CTRL, 16*32+10) /* MSR_MISC_PKG_CTRL */ +XEN_CPUFEATURE(ENERGY_FILTERING, 16*32+11) /* MSR_MISC_PKG_CTRL.ENERGY_FILTERING */ +XEN_CPUFEATURE(DOITM, 16*32+12) /* Data Operand Invariant Timing Mode */ +XEN_CPUFEATURE(SBDR_SSDP_NO, 16*32+13) /*A No Shared Buffer Data Read or Sideband Stale Data Propagation */ +XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Propagation */ +XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ +XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ +XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ +XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ +XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ +XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index d813e92118..54246ad209 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -322,6 +322,9 @@ def crunch_numbers(state): # In principle the TSXLDTRK insns could also be considered independent. RTM: [TSXLDTRK], + + # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. + ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581594.910576 (Exim 4.92) (envelope-from ) id 1qTt49-0003U3-5f; Wed, 09 Aug 2023 23:58:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581594.910576; Wed, 09 Aug 2023 23:58:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt49-0003Tw-39; Wed, 09 Aug 2023 23:58:13 +0000 Received: by outflank-mailman (input) for mailman id 581594; Wed, 09 Aug 2023 23:58:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt47-0003Tk-HR for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt47-0008O8-Gd for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt47-0006Z1-Fm for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DzC7/rOlr9GsbmYs8Itkpk62SZuDsaEsYdYLy8h35ME=; b=U/84HHFV52IhXK7QxrB/6Ai1v+ Avi0GZdswGvrkgisiVrHmfbpkYJvrbLJLbDmDwLFRyPN/6e23feXpmJA1OnMeOUqjEYH5TXzoLAsX i7+bUn+SOK1A818k3BMppKEM0SXuDcRNMDqWqeDsNZt7Lbv84v/YxoKWPE6UVLm9Tkus=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Message-Id: Date: Wed, 09 Aug 2023 23:58:11 +0000 commit 12f895ef395d18022d127d775e0a2c54893731aa Author: Andrew Cooper AuthorDate: Fri May 12 15:37:02 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Extend x86_cpu_policy_fill_native() with a read of ARCH_CAPS based on the CPUID information just read, removing the specially handling in calculate_raw_cpu_policy(). Right now, the only use of x86_cpu_policy_fill_native() outside of Xen is the unit tests. Getting MSR data in this context is left to whomever first encounters a genuine need to have it. Extend generic_identify() to read ARCH_CAPS into x86_capability[], which is fed into the Host Policy. This in turn means there's no need to special case arch_caps in calculate_host_policy(). No practical change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 70553000d6b44dd7c271a35932b0b3e1f22c5532) --- xen/arch/x86/cpu-policy.c | 12 ------------ xen/arch/x86/cpu/common.c | 5 +++++ xen/lib/x86/cpuid.c | 7 ++++++- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 261d1daf0e..900f448802 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -354,9 +354,6 @@ static void __init calculate_raw_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -409,15 +406,6 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); } static void __init guest_common_default_feature_adjustments(uint32_t *fs) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 29460135eb..aac3529a9a 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -449,6 +449,11 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(0xd, 1, &c->x86_capability[FEATURESET_Da1], &tmp, &tmp, &tmp); + + if (test_bit(X86_FEATURE_ARCH_CAPS, c->x86_capability)) + rdmsr(MSR_ARCH_CAPABILITIES, + c->x86_capability[FEATURESET_m10Al], + c->x86_capability[FEATURESET_m10Ah]); } /* diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index a95588d40b..baf692cb0a 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -226,7 +226,12 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - /* TODO MSRs */ +#ifdef __XEN__ + /* TODO MSR_PLATFORM_INFO */ + + if ( p->feat.arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +#endif x86_cpu_policy_recalc_synth(p); } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581595.910580 (Exim 4.92) (envelope-from ) id 1qTt4J-0003Wv-7G; Wed, 09 Aug 2023 23:58:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581595.910580; Wed, 09 Aug 2023 23:58:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4J-0003Wo-4f; Wed, 09 Aug 2023 23:58:23 +0000 Received: by outflank-mailman (input) for mailman id 581595; Wed, 09 Aug 2023 23:58:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4H-0003Wc-KS for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/boot: Expose MSR_ARCH_CAPS data in guest max policies Message-Id: Date: Wed, 09 Aug 2023 23:58:21 +0000 commit 834fd82b8e6113b94e3de5fff6d4cc873a75d07e Author: Andrew Cooper AuthorDate: Fri May 12 15:53:35 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/boot: Expose MSR_ARCH_CAPS data in guest max policies We already have common and default feature adjustment helpers. Introduce one for max featuresets too. Offer MSR_ARCH_CAPS unconditionally in the max policy, and stop clobbering the data inherited from the Host policy. This will be necessary to level a VM safely for migration. Annotate the ARCH_CAPS CPUID bit as special. Note: ARCH_CAPS is still max-only for now, so will not be inhereted by the default policies. With this done, the special case for dom0 can be shrunk to just resampling the Host policy (as ARCH_CAPS isn't visible by default yet). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bbb289f3d5bdd3358af748d7c567343532ac45b5) --- xen/arch/x86/cpu-policy.c | 42 ++++++++++++++++------------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 25 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 900f448802..99cae5b145 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -408,6 +408,25 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; } +static void __init guest_common_max_feature_adjustments(uint32_t *fs) +{ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests + * unconditionally, although limit it to Intel systems as it is highly + * uarch-specific. + * + * In particular, the RSBA and RRSBA bits mean "you might migrate to a + * system where RSB underflow uses alternative predictors (a.k.a + * Retpoline not safe)", so these need to be visible to a guest in all + * cases, even when it's only some other server in the pool which + * suffers the identified behaviour. + */ + __set_bit(X86_FEATURE_ARCH_CAPS, fs); + } +} + static void __init guest_common_default_feature_adjustments(uint32_t *fs) { /* @@ -483,6 +502,7 @@ static void __init calculate_pv_max_policy(void) __clear_bit(X86_FEATURE_IBRS, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -490,8 +510,6 @@ static void __init calculate_pv_max_policy(void) recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -569,6 +587,7 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_XSAVES, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -577,8 +596,6 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) @@ -800,7 +817,10 @@ void __init init_dom0_cpuid_policy(struct domain *d) * domain policy logic gains a better understanding of MSRs. */ if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { p->feat.arch_caps = true; + p->arch_caps.raw = host_cpu_policy.arch_caps.raw; + } /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) @@ -830,20 +850,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) p->platform_info.cpuid_faulting = false; recalculate_cpuid_policy(d); - - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } } static void __init __maybe_unused build_assertions(void) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index e87b37ab63..cd3fcee813 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -280,7 +280,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581596.910585 (Exim 4.92) (envelope-from ) id 1qTt4T-0003ZX-99; Wed, 09 Aug 2023 23:58:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581596.910585; Wed, 09 Aug 2023 23:58:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4T-0003ZQ-6H; Wed, 09 Aug 2023 23:58:33 +0000 Received: by outflank-mailman (input) for mailman id 581596; Wed, 09 Aug 2023 23:58:31 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4R-0003ZG-UP for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:31 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4R-0008OP-Mw for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:31 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt4R-0006a7-MF for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:31 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=A6IjzG7punktxR8RiUkdpIIgAGe5xsJ8wUtHpPvOq5s=; b=eELCgBjlrkV/+bkPEUX5EsukYi hcN8np41wKeAJM+q9XAIK5OAuI7Le/qly8YDnyyWD+y4RF+eXXioLoovDIN+9V65AFp39SHApDmQ3 qkbhhJ+AKkzuTg4SPRm5kgDhu6FSqe5GASP52CO/Pn9f+Vk8xPxIpL5CxnQEz3eLXvtk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/vtx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:58:31 +0000 commit 7320e9aa80f5da23abf76b41b2e93708fa1689b4 Author: Andrew Cooper AuthorDate: Mon May 15 16:59:25 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3) --- xen/arch/x86/hvm/vmx/vmx.c | 8 ++------ xen/include/asm-x86/cpufeature.h | 3 +++ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index b919b728c8..ed8c8f15bb 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2464,8 +2464,6 @@ static void __init ler_to_fixup_check(void); */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2473,10 +2471,8 @@ static bool __init has_if_pschange_mc(void) if ( cpu_has_hypervisor ) return false; - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index e93e72bbbd..e44643e393 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -142,6 +142,9 @@ /* CPUID level 0x00000007:1.eax */ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581597.910589 (Exim 4.92) (envelope-from ) id 1qTt4d-0003bs-BC; Wed, 09 Aug 2023 23:58:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581597.910589; Wed, 09 Aug 2023 23:58:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4d-0003bk-85; Wed, 09 Aug 2023 23:58:43 +0000 Received: by outflank-mailman (input) for mailman id 581597; Wed, 09 Aug 2023 23:58:41 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4b-0003ba-Ql for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:41 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4b-0008Om-Py for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:41 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt4b-0006ae-PH for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:41 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yLnCeyacLzOqqaAwRyW2jqV5aWPX+RacTPzwWhhKd28=; b=VCHmKnPNI3GJQZG7Xd9xhi30pr +reWpscJQVuJL/2rrDu3PK2wcE29kxshFkJog8yTQsL1IPiBOd+AX6XTKJKoii6vlALg/UeL+Q0/q ZJibyfHRQbCLzjnAvwdsNxfOkcsbZl0fEQLr+AVm1V9RW7LDEpcHCfde/Z2Cf3QY/m+Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/tsx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:58:41 +0000 commit ad084937fac247991b9344e9b9f3846bc42b2c30 Author: Andrew Cooper AuthorDate: Mon May 15 19:05:01 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/tsx: Remove opencoded MSR_ARCH_CAPS check The current cpu_has_tsx_ctrl tristate is serving double pupose; to signal the first pass through tsx_init(), and the availability of MSR_TSX_CTRL. Drop the variable, replacing it with a once boolean, and altering cpu_has_tsx_ctrl to come out of the feature information. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 205a9f970378c31ae3e00b52d59103a2e881b9e0) --- xen/arch/x86/tsx.c | 13 ++++++++----- xen/include/asm-x86/cpufeature.h | 1 + xen/include/asm-x86/processor.h | 2 +- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/tsx.c b/xen/arch/x86/tsx.c index be89741a2f..287812ec2b 100644 --- a/xen/arch/x86/tsx.c +++ b/xen/arch/x86/tsx.c @@ -19,7 +19,6 @@ * controlling TSX behaviour, and where TSX isn't force-disabled by firmware. */ int8_t __read_mostly opt_tsx = -1; -int8_t __read_mostly cpu_has_tsx_ctrl = -1; bool __read_mostly rtm_disabled; static int __init parse_tsx(const char *s) @@ -37,24 +36,28 @@ custom_param("tsx", parse_tsx); void tsx_init(void) { + static bool __read_mostly once; + /* * This function is first called between microcode being loaded, and CPUID * being scanned generally. Read into boot_cpu_data.x86_capability[] for * the cpu_has_* bits we care about using here. */ - if ( unlikely(cpu_has_tsx_ctrl < 0) ) + if ( unlikely(!once) ) { - uint64_t caps = 0; bool has_rtm_always_abort; + once = true; + if ( boot_cpu_data.cpuid_level >= 7 ) boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_ARCH_CAPS)] = cpuid_count_edx(7, 0); if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); + rdmsr(MSR_ARCH_CAPABILITIES, + boot_cpu_data.x86_capability[FEATURESET_m10Al], + boot_cpu_data.x86_capability[FEATURESET_m10Ah]); - cpu_has_tsx_ctrl = !!(caps & ARCH_CAPS_TSX_CTRL); has_rtm_always_abort = cpu_has_rtm_always_abort; if ( cpu_has_tsx_ctrl && cpu_has_srbds_ctrl ) diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index e44643e393..53623d31df 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -144,6 +144,7 @@ /* MSR_ARCH_CAPS */ #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) +#define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index 71b454d984..b4d4fe9930 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -628,7 +628,7 @@ static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model, return fam; } -extern int8_t opt_tsx, cpu_has_tsx_ctrl; +extern int8_t opt_tsx; extern bool rtm_disabled; void tsx_init(void); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:58:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581598.910593 (Exim 4.92) (envelope-from ) id 1qTt4n-0003fK-Ds; Wed, 09 Aug 2023 23:58:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581598.910593; Wed, 09 Aug 2023 23:58:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4n-0003fB-B3; Wed, 09 Aug 2023 23:58:53 +0000 Received: by outflank-mailman (input) for mailman id 581598; Wed, 09 Aug 2023 23:58:51 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4l-0003eo-Td for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:51 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4l-0008QO-Sw for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:51 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt4l-0006bC-SJ for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:58:51 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=n950NpqJI2wwrxEJ6wHjmRy4jBQ2GpWnlWtxkQf0W5g=; b=ezgf4Mrdh2TXwmDKmQX64aoNCa dcnL/HvOVgo94yefjGn1jJp/vg6lrA51cNO+U6LUM1F97gr1VXN67mVr0unhpPpwmKeLn8/Iwpmm4 nhCMwVYIQUv6K85R+Hq6SpnbwtrmwY0OLeG8WiBbc1YCJBW3FsJmfHoymZrFGlZoougU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Wed, 09 Aug 2023 23:58:51 +0000 commit dc89d1f6f3df7259be44a8e392a1a0e7792e8c63 Author: Andrew Cooper AuthorDate: Mon May 15 19:15:48 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Replace opencoded checks with regular feature ones. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 511b9f286c3dadd041e0d90beeff7d47c9bf3b7a) --- xen/arch/x86/spec_ctrl.c | 56 +++++++++++++++++++--------------------- xen/include/asm-x86/cpufeature.h | 7 +++++ 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 9ce493d6bc..549c6f2e5a 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -293,12 +293,10 @@ custom_param("spec-ctrl", parse_spec_ctrl); int8_t __read_mostly opt_xpti_hwdom = -1; int8_t __read_mostly opt_xpti_domu = -1; -static __init void xpti_init_default(uint64_t caps) +static __init void xpti_init_default(void) { - if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) - caps = ARCH_CAPS_RDCL_NO; - - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + cpu_has_rdcl_no ) { if ( opt_xpti_hwdom < 0 ) opt_xpti_hwdom = 0; @@ -401,9 +399,10 @@ static __init int parse_pv_l1tf(const char *s) } custom_param("pv-l1tf", parse_pv_l1tf); -static void __init print_details(enum ind_thunk thunk, uint64_t caps) +static void __init print_details(enum ind_thunk thunk) { unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ if ( boot_cpu_data.cpuid_level >= 7 ) @@ -412,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, caps); printk("Speculative mitigation facilities:\n"); @@ -587,7 +588,7 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(uint64_t caps) +static bool __init retpoline_safe(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -605,7 +606,7 @@ static bool __init retpoline_safe(uint64_t caps) * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( caps & (ARCH_CAPS_RSBA | ARCH_CAPS_IBRS_ALL) ) + if ( cpu_has_rsba || cpu_has_eibrs ) return false; switch ( boot_cpu_data.x86_model ) @@ -825,7 +826,7 @@ static void __init ibpb_calculations(void) } /* Calculate whether this CPU is vulnerable to L1TF. */ -static __init void l1tf_calculations(uint64_t caps) +static __init void l1tf_calculations(void) { bool hit_default = false; @@ -913,7 +914,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */ - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( cpu_has_rdcl_no ) cpu_has_bug_l1tf = false; if ( cpu_has_bug_l1tf && hit_default ) @@ -972,7 +973,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Calculate whether this CPU is vulnerable to MDS. */ -static __init void mds_calculations(uint64_t caps) +static __init void mds_calculations(void) { /* MDS is only known to affect Intel Family 6 processors at this time. */ if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || @@ -980,7 +981,7 @@ static __init void mds_calculations(uint64_t caps) return; /* Any processor advertising MDS_NO should be not vulnerable to MDS. */ - if ( caps & ARCH_CAPS_MDS_NO ) + if ( cpu_has_mds_no ) return; switch ( boot_cpu_data.x86_model ) @@ -1093,10 +1094,6 @@ void __init init_speculation_mitigations(void) enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; bool cpu_has_bug_taa; - uint64_t caps = 0; - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); hw_smt_enabled = check_smt_enabled(); @@ -1143,7 +1140,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe(caps) ) + if ( retpoline_safe() ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; @@ -1308,13 +1305,13 @@ void __init init_speculation_mitigations(void) * threads. Activate this if SMT is enabled, and Xen is using a non-zero * MSR_SPEC_CTRL setting. */ - if ( boot_cpu_has(X86_FEATURE_IBRSB) && !(caps & ARCH_CAPS_IBRS_ALL) && + if ( boot_cpu_has(X86_FEATURE_IBRSB) && !cpu_has_eibrs && hw_smt_enabled && default_xen_spec_ctrl ) setup_force_cpu_cap(X86_FEATURE_SC_MSR_IDLE); - xpti_init_default(caps); + xpti_init_default(); - l1tf_calculations(caps); + l1tf_calculations(); /* * By default, enable PV domU L1TF mitigations on all L1TF-vulnerable @@ -1335,7 +1332,7 @@ void __init init_speculation_mitigations(void) if ( !boot_cpu_has(X86_FEATURE_L1D_FLUSH) ) opt_l1d_flush = 0; else if ( opt_l1d_flush == -1 ) - opt_l1d_flush = cpu_has_bug_l1tf && !(caps & ARCH_CAPS_SKIP_L1DFL); + opt_l1d_flush = cpu_has_bug_l1tf && !cpu_has_skip_l1dfl; if ( opt_branch_harden ) setup_force_cpu_cap(X86_FEATURE_SC_BRANCH_HARDEN); @@ -1357,7 +1354,7 @@ void __init init_speculation_mitigations(void) "enabled. Please assess your configuration and choose an\n" "explicit 'smt=' setting. See XSA-273.\n"); - mds_calculations(caps); + mds_calculations(); /* * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have @@ -1369,7 +1366,7 @@ void __init init_speculation_mitigations(void) * the return-to-guest path. */ if ( opt_unpriv_mmio ) - opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR; + opt_fb_clear_mmio = cpu_has_fb_clear; /* * By default, enable PV and HVM mitigations on MDS-vulnerable hardware. @@ -1399,7 +1396,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio ) setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE); - opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush; + opt_md_clear_hvm &= !cpu_has_skip_l1dfl && !opt_l1d_flush; /* * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT @@ -1430,8 +1427,7 @@ void __init init_speculation_mitigations(void) * we check both to spot TSX in a microcode/cmdline independent way. */ cpu_has_bug_taa = - (cpu_has_rtm || (caps & ARCH_CAPS_TSX_CTRL)) && - (caps & (ARCH_CAPS_MDS_NO | ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO; + (cpu_has_rtm || cpu_has_tsx_ctrl) && cpu_has_mds_no && !cpu_has_taa_no; /* * On TAA-affected hardware, disabling TSX is the preferred mitigation, vs @@ -1450,7 +1446,7 @@ void __init init_speculation_mitigations(void) * plausibly value TSX higher than Hyperthreading...), disable TSX to * mitigate TAA. */ - if ( opt_tsx == -1 && cpu_has_bug_taa && (caps & ARCH_CAPS_TSX_CTRL) && + if ( opt_tsx == -1 && cpu_has_bug_taa && cpu_has_tsx_ctrl && ((hw_smt_enabled && opt_smt) || !boot_cpu_has(X86_FEATURE_SC_VERW_IDLE)) ) { @@ -1475,15 +1471,15 @@ void __init init_speculation_mitigations(void) if ( cpu_has_srbds_ctrl ) { if ( opt_srb_lock == -1 && !opt_unpriv_mmio && - (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) + cpu_has_mds_no && !cpu_has_taa_no && + (!cpu_has_hle || (cpu_has_tsx_ctrl && rtm_disabled)) ) opt_srb_lock = 0; set_in_mcu_opt_ctrl(MCU_OPT_CTRL_RNGDS_MITG_DIS, opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } - print_details(thunk, caps); + print_details(thunk); /* * If MSR_SPEC_CTRL is available, apply Xen's default setting and discard diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 53623d31df..c0415c06cb 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -143,8 +143,15 @@ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) /* MSR_ARCH_CAPS */ +#define cpu_has_rdcl_no boot_cpu_has(X86_FEATURE_RDCL_NO) +#define cpu_has_eibrs boot_cpu_has(X86_FEATURE_EIBRS) +#define cpu_has_rsba boot_cpu_has(X86_FEATURE_RSBA) +#define cpu_has_skip_l1dfl boot_cpu_has(X86_FEATURE_SKIP_L1DFL) +#define cpu_has_mds_no boot_cpu_has(X86_FEATURE_MDS_NO) #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) +#define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) +#define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581599.910596 (Exim 4.92) (envelope-from ) id 1qTt4x-0003i0-FC; Wed, 09 Aug 2023 23:59:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581599.910596; Wed, 09 Aug 2023 23:59:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4x-0003hs-CY; Wed, 09 Aug 2023 23:59:03 +0000 Received: by outflank-mailman (input) for mailman id 581599; Wed, 09 Aug 2023 23:59:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4w-0003he-0X for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt4v-0008Qo-Vw for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt4v-0006bt-VF for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EzBR3FnXT9ytTxPzH3FCUOEQPXwWVJVy017IpTxeTPU=; b=xZxyL/7wn5xxXDx1Y4gNyNFQnW t/IT91FJyfIMlPNZIOfsOWPyhyJUfUsGU0SRJY149vZpyYZ0KJx2gVJxMj81X3g2l9cBNxmrkLsPS 8M9EHqcuq/B3U0mUfLYuKuOhGWAdfw4WjNdKe+IavpicDp1okyswijDb8qckPdUasEYs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Update hardware hints Message-Id: Date: Wed, 09 Aug 2023 23:59:01 +0000 commit 06a2b62145f742816f8377fae22a21fe1dfe2059 Author: Andrew Cooper AuthorDate: Tue May 30 16:03:16 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Update hardware hints * Rename IBRS_ALL to EIBRS. EIBRS is the term that everyone knows, and this makes ARCH_CAPS_EIBRS match the X86_FEATURE_EIBRS form. * Print RRSBA too, which is also a hint about behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94200e1bae07e725cc07238c11569c5cab7befb7) --- xen/arch/x86/spec_ctrl.c | 5 +++-- xen/include/asm-x86/msr-index.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 549c6f2e5a..20d1bac126 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,10 +420,11 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", - (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", + (caps & ARCH_CAPS_RRSBA) ? " RRSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL" : "", (e8b & cpufeat_mask(X86_FEATURE_SSB_NO)) || (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "", diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index ce5677f3b6..7befa60abd 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -48,7 +48,7 @@ #define MSR_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_EIBRS (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581600.910601 (Exim 4.92) (envelope-from ) id 1qTt57-0003ke-Gn; Wed, 09 Aug 2023 23:59:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581600.910601; Wed, 09 Aug 2023 23:59:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt57-0003kW-EA; Wed, 09 Aug 2023 23:59:13 +0000 Received: by outflank-mailman (input) for mailman id 581600; Wed, 09 Aug 2023 23:59:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt56-0003kM-3V for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt56-0008Qv-2q for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt56-0006cR-1v for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=enPEnE5wa6e99wxQkzoR2tbywnCu7pp24fAqMaWBIdM=; b=g2B7/9Ou9rbK35AVRfagYTUoWp Iq1/COzOgaYGIsncN/OUVR8PAKFWYrVnw9YL3gEsEZDHTZETmQeBu51AZ+uDOl0ZRVp/8EIDrjmVy YBiFID+AaHimskvKzij+Y9vCM57BwFSF/elyTh6lfNCEF3BP1n8hHpbq5J2GDYjefTtk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() Message-Id: Date: Wed, 09 Aug 2023 23:59:12 +0000 commit 5619a526ead8f8c05e5180a4d69dd70007ca2660 Author: Andrew Cooper AuthorDate: Fri Mar 10 16:23:20 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() This is prep work, split out to simply the diff on the following change. * Split the INTEL check out of the IvyBridge RDRAND check, as the former will be reused. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 064f572f96f1558faae0a74cad616ba95ec8ff34) --- xen/arch/x86/cpu-policy.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 99cae5b145..7905d1f042 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -429,21 +429,24 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) static void __init guest_common_default_feature_adjustments(uint32_t *fs) { - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + } /* * On certain hardware, speculative or errata workarounds can result in -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581601.910605 (Exim 4.92) (envelope-from ) id 1qTt5H-0003nJ-IB; Wed, 09 Aug 2023 23:59:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581601.910605; Wed, 09 Aug 2023 23:59:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5H-0003nB-Fc; Wed, 09 Aug 2023 23:59:23 +0000 Received: by outflank-mailman (input) for mailman id 581601; Wed, 09 Aug 2023 23:59:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5G-0003n1-6f for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5G-0008R4-5s for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt5G-0006cw-5A for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=8suvGin5aNAFZzENYF77UHv6mDlgGDb93X6TURqI0M0=; b=Dge0lZ+6WPbr1ejvBm1WAcBqvn 37mBxJk1/S6zyPOySReIrmMdahTvxgYI12Sr55UoEB6rd+jy04+S9ViE1wmGQUUYIN8ycrfH1Jdly 9hyw+zKGtbzkBYEG7A/cU0AT+JdtVcLKyI4qXlqrwhJ0del2Au+UWIYV3lnFk9Xy9iCw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Fix the rendering of FB_CLEAR Message-Id: Date: Wed, 09 Aug 2023 23:59:22 +0000 commit 18e759cb87c6375bc6cd0e9ce7e51f7af1be67f1 Author: Andrew Cooper AuthorDate: Mon Jun 12 20:24:00 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Fix the rendering of FB_CLEAR FB_CLEAR is a read-only status bit, not a read-write control. Move it from "Hardware features" into "Hardware hints". Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 921afcbae843bb3f575a8f4a270b8e6cf471f4ca) --- xen/arch/x86/spec_ctrl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 20d1bac126..9efc49ace7 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,7 +420,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -433,6 +433,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "", (caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "", (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", + (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", @@ -442,7 +443,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -458,7 +459,6 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); /* Compiled-in support which pertains to mitigations. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581602.910608 (Exim 4.92) (envelope-from ) id 1qTt5R-0003q7-Jd; Wed, 09 Aug 2023 23:59:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581602.910608; Wed, 09 Aug 2023 23:59:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5R-0003q0-H8; Wed, 09 Aug 2023 23:59:33 +0000 Received: by outflank-mailman (input) for mailman id 581602; Wed, 09 Aug 2023 23:59:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5Q-0003pr-9Y for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5Q-0008RC-8v for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt5Q-0006dL-8C for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gWf5SViK9r+xHAva4XumFDhlhXr3t2gBu2GxITvNRGw=; b=murgCKxf00Cja1wT4OEe3HeePk /0vdPJ8yLV8oCI1Y7B+RCImt/DyGt3fk5hZb+x2tgfL1tsDnP6H44Nadu/SZOIm0DNz2wn765Jdwt i4b82NFUDkE7a1eXwmZVVc7DWs3PGJZItooHtCshPw7lDFgGtgHKOOMwdJUzevMtJCsc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Message-Id: Date: Wed, 09 Aug 2023 23:59:32 +0000 commit efc4bdd2c969e858fe41e3a1eff8aa99dc093132 Author: Andrew Cooper AuthorDate: Mon Jun 5 11:09:11 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Reword the comment for 'S' to include an incompatible set of features on the same core. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 3f63f4510422c29fda7ba238b880cbb53eca34fe) Also minimal fragments from: c/s 0bf9efb9ee4c ("xen/arm: Sanitize cpuinfo ID registers fields") to introduce TAINT_CPU_OUT_OF_SPEC. --- xen/arch/x86/spec_ctrl.c | 3 +++ xen/common/kernel.c | 6 ++++-- xen/include/xen/lib.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 9efc49ace7..44fb4c9d45 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1112,7 +1112,10 @@ void __init init_speculation_mitigations(void) if ( read_cr4() & X86_CR4_CET ) { if ( !has_spec_ctrl ) + { printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } else if ( opt_ibrs == -1 ) opt_ibrs = ibrs = true; diff --git a/xen/common/kernel.c b/xen/common/kernel.c index f07ff41d88..35c9489929 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -338,6 +338,7 @@ unsigned int tainted; * 'E' - An error (e.g. a machine check exceptions) has been injected. * 'H' - HVM forced emulation prefix is permitted. * 'M' - Machine had a machine check experience. + * 'S' - Out of spec CPU (Incompatible features on one or more cores). * * The string is overwritten by the next call to print_taint(). */ @@ -345,11 +346,12 @@ char *print_tainted(char *str) { if ( tainted ) { - snprintf(str, TAINT_STRING_MAX_LEN, "Tainted: %c%c%c%c", + snprintf(str, TAINT_STRING_MAX_LEN, "Tainted: %c%c%c%c%c", tainted & TAINT_MACHINE_CHECK ? 'M' : ' ', tainted & TAINT_SYNC_CONSOLE ? 'C' : ' ', tainted & TAINT_ERROR_INJECT ? 'E' : ' ', - tainted & TAINT_HVM_FEP ? 'H' : ' '); + tainted & TAINT_HVM_FEP ? 'H' : ' ', + tainted & TAINT_CPU_OUT_OF_SPEC ? 'S' : ' '); } else { diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index 900c0ce3e4..c072d5a597 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -183,6 +183,7 @@ uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); #define TAINT_MACHINE_CHECK (1u << 1) #define TAINT_ERROR_INJECT (1u << 2) #define TAINT_HVM_FEP (1u << 3) +#define TAINT_CPU_OUT_OF_SPEC (1u << 5) extern unsigned int tainted; #define TAINT_STRING_MAX_LEN 20 extern char *print_tainted(char *str); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581603.910614 (Exim 4.92) (envelope-from ) id 1qTt5b-0003tR-NG; Wed, 09 Aug 2023 23:59:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581603.910614; Wed, 09 Aug 2023 23:59:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5b-0003tJ-K5; Wed, 09 Aug 2023 23:59:43 +0000 Received: by outflank-mailman (input) for mailman id 581603; Wed, 09 Aug 2023 23:59:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5a-0003tB-Ch for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5a-0008Re-Bz for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt5a-0006dk-BF for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=rurIcltwSPvyNioZhgDcPeqHX8ux/xYMyEHCu66RnKE=; b=YAgoGSpXCDe146O4Zk0OZi3X6Y m7UoTixlpQKY0uJwrqcmr7qdWVFM+KBNfRdXcY5ujm6GRdcyH53t+i+d5G+XJ9s52akPcZSXvDMvu a3QqenZXj9BI7V2Hr2BDwvU4/VonS8NfimRZvHI3KFjPSYePqPkkt0Kr+M5fUW47axOU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() Message-Id: Date: Wed, 09 Aug 2023 23:59:42 +0000 commit 927a168c39accff6ec7ddee0d530bccdad47412a Author: Andrew Cooper AuthorDate: Fri May 26 10:35:47 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() This is prep work, split out to simply the diff on the following change. * Rename to retpoline_calculations(), and call unconditionally. It is shortly going to synthesise missing enumerations required for guest safety. * For the model check switch statement, store the result in a variable and break rather than returning directly. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 724c0d94ff79b208312d30676392bfdd693403be) --- xen/arch/x86/spec_ctrl.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 44fb4c9d45..1ca46ac33d 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -589,9 +589,10 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(void) +static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; + bool safe = false; if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; @@ -629,29 +630,31 @@ static bool __init retpoline_safe(void) case 0x3f: /* Haswell EX/EP */ case 0x45: /* Haswell D */ case 0x46: /* Haswell H */ - return true; + safe = true; + break; /* * Broadwell processors are retpoline-safe after specific microcode * versions. */ case 0x3d: /* Broadwell */ - return ucode_rev >= 0x2a; + safe = ucode_rev >= 0x2a; break; case 0x47: /* Broadwell H */ - return ucode_rev >= 0x1d; + safe = ucode_rev >= 0x1d; break; case 0x4f: /* Broadwell EP/EX */ - return ucode_rev >= 0xb000021; + safe = ucode_rev >= 0xb000021; break; case 0x56: /* Broadwell D */ switch ( boot_cpu_data.x86_mask ) { - case 2: return ucode_rev >= 0x15; - case 3: return ucode_rev >= 0x7000012; - case 4: return ucode_rev >= 0xf000011; - case 5: return ucode_rev >= 0xe000009; + case 2: safe = ucode_rev >= 0x15; break; + case 3: safe = ucode_rev >= 0x7000012; break; + case 4: safe = ucode_rev >= 0xf000011; break; + case 5: safe = ucode_rev >= 0xe000009; break; default: printk("Unrecognised CPU stepping %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_mask); - return false; + safe = false; + break; } break; @@ -665,7 +668,8 @@ static bool __init retpoline_safe(void) case 0x67: /* Cannonlake? */ case 0x8e: /* Kabylake M */ case 0x9e: /* Kabylake D */ - return false; + safe = false; + break; /* * Atom processors before Goldmont Plus/Gemini Lake are retpoline-safe. @@ -684,13 +688,17 @@ static bool __init retpoline_safe(void) case 0x5c: /* Goldmont */ case 0x5f: /* Denverton */ case 0x85: /* Knights Mill */ - return true; + safe = true; + break; default: printk("Unrecognised CPU model %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_model); - return false; + safe = false; + break; } + + return safe; } /* Calculate whether this CPU speculates past #NM */ @@ -1094,7 +1102,7 @@ void __init init_speculation_mitigations(void) { enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; - bool cpu_has_bug_taa; + bool cpu_has_bug_taa, retpoline_safe; hw_smt_enabled = check_smt_enabled(); @@ -1123,6 +1131,9 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } + /* Determine if retpoline is safe on this CPU. */ + retpoline_safe = retpoline_calculations(); + /* * Has the user specified any custom BTI mitigations? If so, follow their * instructions exactly and disable all heuristics. @@ -1144,7 +1155,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe() ) + if ( retpoline_safe ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Wed Aug 09 23:59:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 09 Aug 2023 23:59:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581604.910616 (Exim 4.92) (envelope-from ) id 1qTt5l-0003vc-O9; Wed, 09 Aug 2023 23:59:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581604.910616; Wed, 09 Aug 2023 23:59:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5l-0003vV-Lh; Wed, 09 Aug 2023 23:59:53 +0000 Received: by outflank-mailman (input) for mailman id 581604; Wed, 09 Aug 2023 23:59:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5k-0003vJ-Fw for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5k-0008Rm-F6 for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt5k-0006eR-ED for xen-changelog@lists.xenproject.org; Wed, 09 Aug 2023 23:59:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=u/cNNiQJnMGSyYPkbkHm+pOKOCsTlC09SF/4FOqmLw0=; b=BhS30XPhQOFB6sardx37J3NtTv /aV8FjJGorfQrDfXhMw1A3r0w2Z8M5mWM9RL3Do6i76FNJrgFWqS3CUPpOUSq8PZYvY/gnztgwt1C dJzUOf4g/8e1o3dUbpXeoIZp9vn8PmEKn7wXOWc5AW2daRbg0m6PNwlAulSKhbAcIm8g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate Message-Id: Date: Wed, 09 Aug 2023 23:59:52 +0000 commit 5059ff1349f7641b6d95ce8a2a181383a1e2814e Author: Andrew Cooper AuthorDate: Thu May 25 20:31:22 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate In order to level a VM safely for migration, the toolstack needs to know the RSBA/RRSBA properties of the CPU, whether or not they happen to be enumerated. See the code comment for details. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 36525a964fb629d0bd26e5a1c42de467af7a42a7) --- xen/arch/x86/spec_ctrl.c | 100 +++++++++++++++++++++++++++++++++++++-- xen/include/asm-x86/cpufeature.h | 1 + 2 files changed, 96 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 1ca46ac33d..9a8d6987ca 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -588,7 +588,10 @@ static bool __init check_smt_enabled(void) return false; } -/* Calculate whether Retpoline is known-safe on this CPU. */ +/* + * Calculate whether Retpoline is known-safe on this CPU. Fix up the + * RSBA/RRSBA bits as necessary. + */ static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -602,15 +605,93 @@ static bool __init retpoline_calculations(void) return false; /* - * RSBA may be set by a hypervisor to indicate that we may move to a - * processor which isn't retpoline-safe. + * The meaning of the RSBA and RRSBA bits have evolved over time. The + * agreed upon meaning at the time of writing (May 2023) is thus: + * + * - RSBA (RSB Alternative) means that an RSB may fall back to an + * alternative predictor on underflow. Skylake uarch and later all have + * this property. Broadwell too, when running microcode versions prior + * to Jan 2018. + * + * - All eIBRS-capable processors suffer RSBA, but eIBRS also introduces + * tagging of predictions with the mode in which they were learned. So + * when eIBRS is active, RSBA becomes RRSBA (Restricted RSBA). + * + * - CPUs are not expected to enumerate both RSBA and RRSBA. + * + * Some parts (Broadwell) are not expected to ever enumerate this + * behaviour directly. Other parts have differing enumeration with + * microcode version. Fix up Xen's idea, so we can advertise them safely + * to guests, and so toolstacks can level a VM safety for migration. + * + * The following states exist: + * + * | | RSBA | EIBRS | RRSBA | Notes | Action (in principle) | + * |---+------+-------+-------+--------------------+-----------------------| + * | 1 | 0 | 0 | 0 | OK (older parts) | Maybe +RSBA | + * | 2 | 0 | 0 | 1 | Broken | (+RSBA, -RRSBA) | + * | 3 | 0 | 1 | 0 | OK (pre-Aug ucode) | +RRSBA | + * | 4 | 0 | 1 | 1 | OK | | + * | 5 | 1 | 0 | 0 | OK | | + * | 6 | 1 | 0 | 1 | Broken | (-RRSBA) | + * | 7 | 1 | 1 | 0 | Broken | (-RSBA, +RRSBA) | + * | 8 | 1 | 1 | 1 | Broken | (-RSBA) | + * + * However, we don't need perfect adherence to the spec. We only need + * RSBA || RRSBA to indicate "alternative predictors potentially in use". + * Rows 1 & 3 are fixed up by later logic, as they're known configurations + * which exist in the world. * + * Complain loudly at the broken cases. They're safe for Xen to use (so we + * don't attempt to correct), and may or may not exist in reality, but if + * we ever encounter them in practice, something is wrong and needs + * further investigation. + */ + if ( cpu_has_eibrs ? cpu_has_rsba /* Rows 7, 8 */ + : cpu_has_rrsba /* Rows 2, 6 */ ) + { + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: RSBA %u, EIBRS %u, RRSBA %u\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, ucode_rev, + cpu_has_rsba, cpu_has_eibrs, cpu_has_rrsba); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + /* * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( cpu_has_rsba || cpu_has_eibrs ) + if ( cpu_has_eibrs ) + { + /* + * Prior to the August 2023 microcode, many eIBRS-capable parts did + * not enumerate RRSBA. + */ + if ( !cpu_has_rrsba ) + setup_force_cpu_cap(X86_FEATURE_RRSBA); + + return false; + } + + /* + * RSBA is explicitly enumerated in some cases, but may also be set by a + * hypervisor to indicate that we may move to a processor which isn't + * retpoline-safe. + */ + if ( cpu_has_rsba ) return false; + /* + * At this point, we've filtered all the legal RSBA || RRSBA cases (or the + * known non-ideal cases). If ARCH_CAPS is visible, trust the absence of + * RSBA || RRSBA. There's no known microcode which advertises ARCH_CAPS + * without RSBA or EIBRS, and if we're virtualised we can't rely the model + * check anyway. + */ + if ( cpu_has_arch_caps ) + return true; + switch ( boot_cpu_data.x86_model ) { case 0x17: /* Penryn */ @@ -698,6 +779,15 @@ static bool __init retpoline_calculations(void) break; } + if ( !safe ) + { + /* + * Note: the eIBRS-capable parts are filtered out earlier, so the + * remainder here are the ones which suffer RSBA behaviour. + */ + setup_force_cpu_cap(X86_FEATURE_RSBA); + } + return safe; } @@ -1131,7 +1221,7 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } - /* Determine if retpoline is safe on this CPU. */ + /* Determine if retpoline is safe on this CPU. Fix up RSBA/RRSBA enumerations. */ retpoline_safe = retpoline_calculations(); /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index c0415c06cb..90684fac95 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -152,6 +152,7 @@ #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) +#define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581605.910622 (Exim 4.92) (envelope-from ) id 1qTt5v-0004jP-SI; Thu, 10 Aug 2023 00:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581605.910622; Thu, 10 Aug 2023 00:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5v-0004j5-NO; Thu, 10 Aug 2023 00:00:03 +0000 Received: by outflank-mailman (input) for mailman id 581605; Thu, 10 Aug 2023 00:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5u-0004Ni-JI for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt5u-0000RM-IL for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt5u-0006fx-HS for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=+QdKfuFCJikVSvFhKi6Ha0unS2cm6SawHPSdZ6RWF8s=; b=Rc6A/MWIyZHrp8D++8V88rEQNM stCF6qMeKC6m/MzKOllsRK5TCKXCM90jWu9K7i/t4r9F8K2Blhr1Tmdk8PDaJ0NXC938Udzbizul3 8+haPOJq8P9zTFlfKi3m1l33lB3W4oP1z60QugXtbFSafKe2NLfj7M9t0ynzj2W/mf/A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: Derive RSBA/RRSBA for guest policies Message-Id: Date: Thu, 10 Aug 2023 00:00:02 +0000 commit cf02b6efed412eef35d3967756d4ba9f0ded1cbf Author: Andrew Cooper AuthorDate: Wed May 24 15:41:21 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: Derive RSBA/RRSBA for guest policies The RSBA bit, "RSB Alternative", means that the RSB may use alternative predictors when empty. From a practical point of view, this mean "Retpoline not safe". Enhanced IBRS (officially IBRS_ALL in Intel's docs, previously IBRS_ATT) is a statement that IBRS is implemented in hardware (as opposed to the form retrofitted to existing CPUs in microcode). The RRSBA bit, "Restricted-RSBA", is a combination of RSBA, and the eIBRS property that predictions are tagged with the mode in which they were learnt. Therefore, it means "when eIBRS is active, the RSB may fall back to alternative predictors but restricted to the current prediction mode". As such, it's stronger statement than RSBA, but still means "Retpoline not safe". CPUs are not expected to enumerate both RSBA and RRSBA. Add feature dependencies for EIBRS and RRSBA. While technically they're not linked, absolutely nothing good can come of letting the guest see RRSBA without EIBRS. Nor a guest seeing EIBRS without IBRSB. Furthermore, we use this dependency to simplify the max derivation logic. The max policies gets RSBA and RRSBA unconditionally set (with the EIBRS dependency maybe hiding RRSBA). We can run any VM, even if it has been told "somewhere you might run, Retpoline isn't safe". The default policies are more complicated. A guest shouldn't see both bits, but it needs to see one if the current host suffers from any form of RSBA, and which bit it needs to see depends on whether eIBRS is visible or not. Therefore, the calculation must be performed after sanitise_featureset(). Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit e0586a4ff514590eec50185e2440b97f9a31cb7f) --- xen/arch/x86/cpu-policy.c | 39 +++++++++++++++++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 4 +-- xen/tools/gen-cpuid.py | 5 +++- 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 7905d1f042..9d70e41306 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -422,8 +422,17 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) * Retpoline not safe)", so these need to be visible to a guest in all * cases, even when it's only some other server in the pool which * suffers the identified behaviour. + * + * We can always run any VM which has previously (or will + * subsequently) run on hardware where Retpoline is not safe. + * Note: + * - The dependency logic may hide RRSBA for other reasons. + * - The max policy does not constitute a sensible configuration to + * run a guest in. */ __set_bit(X86_FEATURE_ARCH_CAPS, fs); + __set_bit(X86_FEATURE_RSBA, fs); + __set_bit(X86_FEATURE_RRSBA, fs); } } @@ -531,6 +540,21 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } @@ -621,6 +645,21 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index cd3fcee813..357a86521e 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -302,7 +302,7 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ -XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*! RSB Alternative (Retpoline not safe) */ XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ @@ -318,7 +318,7 @@ XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Prop XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ -XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*! Restricted RSB Alternative */ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 54246ad209..1be3ddbb85 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -315,7 +315,7 @@ def crunch_numbers(state): # IBRSB/IBRS, and we pass this MSR directly to guests. Treating them # as dependent features simplifies Xen's logic, and prevents the guest # from seeing implausible configurations. - IBRSB: [STIBP, SSBD, INTEL_PSFD], + IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], AMD_STIBP: [STIBP_ALWAYS], @@ -325,6 +325,9 @@ def crunch_numbers(state): # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), + + # The behaviour described by RRSBA depend on eIBRS being active. + EIBRS: [RRSBA], } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581606.910626 (Exim 4.92) (envelope-from ) id 1qTt66-0005JD-Ed; Thu, 10 Aug 2023 00:00:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581606.910626; Thu, 10 Aug 2023 00:00:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt66-0005J6-Aq; Thu, 10 Aug 2023 00:00:14 +0000 Received: by outflank-mailman (input) for mailman id 581606; Thu, 10 Aug 2023 00:00:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt64-0005Is-Mb for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt64-0000gA-Ls for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt64-0006iC-L6 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EtlIq542hFqi+0Wj4HgjQzzfmlW3Phh7sPx5XNI5gIE=; b=gMZcdKXDUiTiKMK1ZbcydK5myk /3idME0/U5geSThvzPzOn2Z8fndG5CBKf/yft9xnQmxi1GqScHn0AaJZwTVPcP7P9kvYOknrF8rJs 3kcR3yZErpgsQ32UoGUms0BYRsZnf246CG693J0uvmqLMfCsDCe2Lg5b8N5mc/VoqfLI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: don't ignore the return value from xc_cpuid_apply_policy Message-Id: Date: Thu, 10 Aug 2023 00:00:12 +0000 commit 1e082c9eca04d731dd0b386878f16a40a585a6ab Author: Roger Pau Monne AuthorDate: Thu Mar 18 11:11:22 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: don't ignore the return value from xc_cpuid_apply_policy Also change libxl__cpuid_legacy to propagate the error from xc_cpuid_apply_policy into callers. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Reviewed-by: Anthony PERARD (cherry picked from commit 34990446ca91d9e201ff17bd4e3f43bfe3ad308e) libs/light: Propagate libxl__arch_domain_create() return code Commit 34990446ca91 started to overwrite the `rc` value from libxl__arch_domain_create(), thus error aren't propagated anymore. Check `rc` value before doing the next thing. Fixes: 34990446ca91 ("libxl: don't ignore the return value from xc_cpuid_apply_policy") Reported-by: Andrew Cooper Signed-off-by: Anthony PERARD Reviewed-by: Jason Andryuk Release-acked-by: Henry Wang (cherry picked from commit 8cdfbf95b19c01fbb741c41d5ea5a94f8823964c) libxl: fix guest kexec - skip cpuid policy When a domain performs a kexec (soft reset), libxl__build_pre() is called with the existing domid. Calling libxl__cpuid_legacy() on the existing domain fails since the cpuid policy has already been set, and the guest isn't rebuilt and doesn't kexec. xc: error: Failed to set d1's policy (err leaf 0xffffffff, subleaf 0xffffffff, msr 0xffffffff) (17 = File exists): Internal error libxl: error: libxl_cpuid.c:494:libxl__cpuid_legacy: Domain 1:Failed to apply CPUID policy: File exists libxl: error: libxl_create.c:1641:domcreate_rebuild_done: Domain 1:cannot (re-)build domain: -3 libxl: error: libxl_xshelp.c:201:libxl__xs_read_mandatory: xenstore read failed: `/libxl/1/type': No such file or directory libxl: warning: libxl_dom.c:49:libxl__domain_type: unable to get domain type for domid=1, assuming HVM During a soft_reset, skip calling libxl__cpuid_legacy() to avoid the issue. Before commit 34990446ca91, the libxl__cpuid_legacy() failure would have been ignored, so kexec would continue. Fixes: 34990446ca91 ("libxl: don't ignore the return value from xc_cpuid_apply_policy") Signed-off-by: Jason Andryuk Reviewed-by: Anthony PERARD (cherry picked from commit 1e454c2b5b1172e0fc7457e411ebaba61db8fc87) --- tools/libxl/libxl_cpuid.c | 14 +++++++++++--- tools/libxl/libxl_create.c | 7 +++++-- tools/libxl/libxl_dom.c | 6 ++++-- tools/libxl/libxl_internal.h | 5 +++-- tools/libxl/libxl_nocpuid.c | 5 +++-- 5 files changed, 26 insertions(+), 11 deletions(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 1b7626f7d4..72fc220de8 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -432,10 +432,12 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 0; } -void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, - libxl_domain_build_info *info) +int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, + libxl_domain_build_info *info) { + GC_INIT(ctx); bool pae = true; + int r; /* * For PV guests, PAE is Xen-controlled (it is the 'p' that differentiates @@ -450,7 +452,13 @@ void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, if (info->type == LIBXL_DOMAIN_TYPE_HVM) pae = libxl_defbool_val(info->u.hvm.pae); - xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, info->cpuid); + r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, + pae, info->cpuid); + if (r) + LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); + + GC_FREE; + return r ? ERROR_FAIL : 0; } static const char *input_names[2] = { "leaf", "subleaf" }; diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c index daf3ff0a55..1554bcca1b 100644 --- a/tools/libxl/libxl_create.c +++ b/tools/libxl/libxl_create.c @@ -1438,6 +1438,7 @@ int libxl__srm_callout_callback_static_data_done(unsigned int missing, libxl_domain_config *d_config = dcs->guest_config; libxl_domain_build_info *info = &d_config->b_info; + int rc = 0; /* * CPUID/MSR information is not present in pre Xen-4.14 streams. @@ -1447,9 +1448,9 @@ int libxl__srm_callout_callback_static_data_done(unsigned int missing, * stream doesn't contain any CPUID data. */ if (missing & XGR_SDD_MISSING_CPUID) - libxl__cpuid_legacy(ctx, dcs->guest_domid, true, info); + rc = libxl__cpuid_legacy(ctx, dcs->guest_domid, true, info); - return 0; + return rc; } void libxl__srm_callout_callback_restore_results(xen_pfn_t store_mfn, @@ -2141,6 +2142,8 @@ static int do_domain_soft_reset(libxl_ctx *ctx, aop_console_how); cdcs->domid_out = &domid_out; + state->soft_reset = true; + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { LOGD(ERROR, domid, "failed to read domain path"); diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index f8661e90d4..e68ba07ee8 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -386,13 +386,15 @@ int libxl__build_pre(libxl__gc *gc, uint32_t domid, state->console_port = xc_evtchn_alloc_unbound(ctx->xch, domid, state->console_domid); rc = libxl__arch_domain_create(gc, d_config, domid); + if (rc) goto out; /* Construct a CPUID policy, but only for brand new domains. Domains * being migrated-in/restored have CPUID handled during the * static_data_done() callback. */ - if (!state->restore) - libxl__cpuid_legacy(ctx, domid, false, info); + if (!state->restore && !state->soft_reset) + rc = libxl__cpuid_legacy(ctx, domid, false, info); +out: return rc; } diff --git a/tools/libxl/libxl_internal.h b/tools/libxl/libxl_internal.h index 3bc3bbcf84..2f531174e6 100644 --- a/tools/libxl/libxl_internal.h +++ b/tools/libxl/libxl_internal.h @@ -1403,6 +1403,7 @@ typedef struct { /* Whether this domain is being migrated/restored, or booting fresh. Only * applicable to the primary domain, not support domains (e.g. stub QEMU). */ bool restore; + bool soft_reset; } libxl__domain_build_state; _hidden void libxl__domain_build_state_init(libxl__domain_build_state *s); @@ -2056,8 +2057,8 @@ typedef yajl_gen_status (*libxl__gen_json_callback)(yajl_gen hand, void *); _hidden char *libxl__object_to_json(libxl_ctx *ctx, const char *type, libxl__gen_json_callback gen, void *p); -_hidden void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool retore, - libxl_domain_build_info *info); +_hidden int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool retore, + libxl_domain_build_info *info); /* Calls poll() again - useful to check whether a signaled condition * is still true. Cannot fail. Returns currently-true revents. */ diff --git a/tools/libxl/libxl_nocpuid.c b/tools/libxl/libxl_nocpuid.c index f47336565b..0630959e76 100644 --- a/tools/libxl/libxl_nocpuid.c +++ b/tools/libxl/libxl_nocpuid.c @@ -34,9 +34,10 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 0; } -void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, - libxl_domain_build_info *info) +int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, + libxl_domain_build_info *info) { + return 0; } yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581607.910629 (Exim 4.92) (envelope-from ) id 1qTt6F-0005Mm-I6; Thu, 10 Aug 2023 00:00:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581607.910629; Thu, 10 Aug 2023 00:00:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6F-0005Me-F8; Thu, 10 Aug 2023 00:00:23 +0000 Received: by outflank-mailman (input) for mailman id 581607; Thu, 10 Aug 2023 00:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6E-0005MY-Pf for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6E-0000gJ-P1 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt6E-0006il-OG for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3nHJcnShn7zQkBawbiAE/lWRjjfk9o03ASy3MvSgaa0=; b=OsAWZxJVpIRsThdJTqm71lIv3q 1x5db2/Gvv1rrC76k4IVGlvFWcDu3liXLQL0LfxGK9rh4RIRFQdeFqbsnJ7mxPJEIjLxQ4ZIofJxy IH7OfobL8/TBHfJ7borV61rypolJYHb35ltOmkF+IvHiBUw2IzZzr/weDx1IoUhe8U/A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libs/guest: introduce support for setting guest MSRs Message-Id: Date: Thu, 10 Aug 2023 00:00:22 +0000 commit 44fde35fdd5abb99a9d7de79ffe95176260b50fe Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:53 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libs/guest: introduce support for setting guest MSRs Like it's done with CPUID, introduce support for passing MSR values to xc_cpuid_apply_policy(). The chosen format for expressing MSR policy data matches the current one used for CPUID. Note that existing callers of xc_cpuid_apply_policy() can pass NULL as the value for the newly introduced 'msr' parameter in order to preserve the same functionality, and in fact that's done in libxl on this patch. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit ed742cf1b65c822759833027ca5cbb087c506a41) --- tools/libxc/include/xenctrl.h | 21 +++++- tools/libxc/xc_cpuid_x86.c | 170 +++++++++++++++++++++++++++++++++++++++++- tools/libxl/libxl_cpuid.c | 2 +- 3 files changed, 189 insertions(+), 4 deletions(-) diff --git a/tools/libxc/include/xenctrl.h b/tools/libxc/include/xenctrl.h index 4c89b7294c..687010df77 100644 --- a/tools/libxc/include/xenctrl.h +++ b/tools/libxc/include/xenctrl.h @@ -1819,6 +1819,21 @@ struct xc_xend_cpuid { char *policy[4]; }; +/* + * MSR policy data. + * + * The format of the policy string is the following: + * '1' -> force to 1 + * '0' -> force to 0 + * 'x' -> we don't care (use default) + * 'k' -> pass through host value + */ +struct xc_msr { + uint32_t index; + char policy[65]; +}; +#define XC_MSR_INPUT_UNUSED 0xffffffffu + /* * Make adjustments to the CPUID settings for a domain. * @@ -1830,13 +1845,15 @@ struct xc_xend_cpuid { * Either pass a full new @featureset (and @nr_features), or adjust individual * features (@pae). * - * Then (optionally) apply legacy XEND overrides (@xend) to the result. + * Then (optionally) apply legacy XEND CPUID overrides (@xend) or MSR (@msr) + * to the result. */ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, - const struct xc_xend_cpuid *xend); + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr); int xc_mca_op(xc_interface *xch, struct xen_mc *mc); int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags, xc_cpumap_t cpumap, unsigned int nr_cpus); diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 3067fb2169..07d204a67e 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -425,10 +425,171 @@ static int xc_cpuid_xend_policy( return rc; } +static int compare_msr(const void *l, const void *r) +{ + const xen_msr_entry_t *lhs = l; + const xen_msr_entry_t *rhs = r; + + if ( lhs->idx == rhs->idx ) + return 0; + + return lhs->idx < rhs->idx ? -1 : 1; +} + +static xen_msr_entry_t *find_msr( + xen_msr_entry_t *msrs, unsigned int nr_msrs, + uint32_t index) +{ + const xen_msr_entry_t key = { .idx = index }; + + return bsearch(&key, msrs, nr_msrs, sizeof(*msrs), compare_msr); +} + + +static int xc_msr_policy(xc_interface *xch, domid_t domid, + const struct xc_msr *msr) +{ + int rc; + bool hvm; + xc_dominfo_t di; + unsigned int nr_leaves, nr_msrs; + uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; + /* + * Three full policies. The host, default for the domain type, + * and domain current. + */ + xen_msr_entry_t *host = NULL, *def = NULL, *cur = NULL; + unsigned int nr_host, nr_def, nr_cur; + + if ( xc_domain_getinfo(xch, domid, 1, &di) != 1 || + di.domid != domid ) + { + ERROR("Failed to obtain d%d info", domid); + rc = -ESRCH; + goto out; + } + hvm = di.hvm; + + rc = xc_get_cpu_policy_size(xch, &nr_leaves, &nr_msrs); + if ( rc ) + { + PERROR("Failed to obtain policy info size"); + rc = -errno; + goto out; + } + + if ( (host = calloc(nr_msrs, sizeof(*host))) == NULL || + (def = calloc(nr_msrs, sizeof(*def))) == NULL || + (cur = calloc(nr_msrs, sizeof(*cur))) == NULL ) + { + ERROR("Unable to allocate memory for %u CPUID leaves", nr_leaves); + rc = -ENOMEM; + goto out; + } + + /* Get the domain's current policy. */ + nr_leaves = 0; + nr_cur = nr_msrs; + rc = xc_get_domain_cpu_policy(xch, domid, &nr_leaves, NULL, &nr_cur, cur); + if ( rc ) + { + PERROR("Failed to obtain d%d current policy", domid); + rc = -errno; + goto out; + } + + /* Get the domain type's default policy. */ + nr_leaves = 0; + nr_def = nr_msrs; + rc = xc_get_system_cpu_policy(xch, hvm ? XEN_SYSCTL_cpu_policy_hvm_default + : XEN_SYSCTL_cpu_policy_pv_default, + &nr_leaves, NULL, &nr_def, def); + if ( rc ) + { + PERROR("Failed to obtain %s def policy", hvm ? "hvm" : "pv"); + rc = -errno; + goto out; + } + + /* Get the host policy. */ + nr_leaves = 0; + nr_host = nr_msrs; + rc = xc_get_system_cpu_policy(xch, XEN_SYSCTL_cpu_policy_host, + &nr_leaves, NULL, &nr_host, host); + if ( rc ) + { + PERROR("Failed to obtain host policy"); + rc = -errno; + goto out; + } + + for ( ; msr->index != XC_MSR_INPUT_UNUSED; ++msr ) + { + xen_msr_entry_t *cur_msr = find_msr(cur, nr_cur, msr->index); + const xen_msr_entry_t *def_msr = find_msr(def, nr_def, msr->index); + const xen_msr_entry_t *host_msr = find_msr(host, nr_host, msr->index); + unsigned int i; + + if ( cur_msr == NULL || def_msr == NULL || host_msr == NULL ) + { + ERROR("Missing MSR %#x", msr->index); + rc = -ENOENT; + goto out; + } + + for ( i = 0; i < ARRAY_SIZE(msr->policy) - 1; i++ ) + { + bool val; + + if ( msr->policy[i] == '1' ) + val = true; + else if ( msr->policy[i] == '0' ) + val = false; + else if ( msr->policy[i] == 'x' ) + val = test_bit(63 - i, &def_msr->val); + else if ( msr->policy[i] == 'k' ) + val = test_bit(63 - i, &host_msr->val); + else + { + ERROR("MSR index %#x: bad character '%c' in policy string '%s'", + msr->index, msr->policy[i], msr->policy); + rc = -EINVAL; + goto out; + } + + if ( val ) + set_bit(63 - i, &cur_msr->val); + else + clear_bit(63 - i, &cur_msr->val); + } + } + + /* Feed the transformed policy back up to Xen. */ + rc = xc_set_domain_cpu_policy(xch, domid, 0, NULL, nr_cur, cur, + &err_leaf, &err_subleaf, &err_msr); + if ( rc ) + { + PERROR("Failed to set d%d's policy (err leaf %#x, subleaf %#x, msr %#x)", + domid, err_leaf, err_subleaf, err_msr); + rc = -errno; + goto out; + } + + /* Success! */ + + out: + free(cur); + free(def); + free(host); + + return rc; +} + int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, - const struct xc_xend_cpuid *xend) + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr) { int rc; xc_dominfo_t di; @@ -671,6 +832,13 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, if ( xend && (rc = xc_cpuid_xend_policy(xch, domid, xend)) ) goto out; + if ( msr ) + { + rc = xc_msr_policy(xch, domid, msr); + if ( rc ) + goto out; + } + rc = 0; out: diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 72fc220de8..ba795469dd 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -453,7 +453,7 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, pae = libxl_defbool_val(info->u.hvm.pae); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, info->cpuid); + pae, info->cpuid, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581608.910633 (Exim 4.92) (envelope-from ) id 1qTt6P-0005aN-Jb; Thu, 10 Aug 2023 00:00:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581608.910633; Thu, 10 Aug 2023 00:00:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6P-0005aG-Gh; Thu, 10 Aug 2023 00:00:33 +0000 Received: by outflank-mailman (input) for mailman id 581608; Thu, 10 Aug 2023 00:00:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6O-0005aA-Tm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6O-0000gX-SW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt6O-0006jM-Rk for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:00:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=X6MAxYeny4lN/3Lzu2Own3dceiNwRZ4VHiutL0MoHL4=; b=T1++avyxEkoHJryvVFABkhtWZ7 nIjbm/4ZDouBNngAacHN+mFpaOu3/OeAWvqtut69rapYIBHlRtX3xou0Oo0t9QDCnSGNYig+Fyxk3 ewxfgqcSFvATaNC3LssBx/tsHZgkJMO/cHsBlebNX1Vh2QpNGslRBu4wGvlxLuKnALoo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: change the type of libxl_cpuid_policy_list Message-Id: Date: Thu, 10 Aug 2023 00:00:32 +0000 commit 9f6f7e07d0920fa3b000f6447982f13322ac5e86 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:54 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: change the type of libxl_cpuid_policy_list Currently libxl_cpuid_policy_list is an opaque type to the users of libxl, and internally it's an array of xc_xend_cpuid objects. Change the type to instead be a structure that contains one array for CPUID policies, in preparation for it also holding another array for MSR policies. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 4825d19603580949144ac2ac5cb22df75c9da954) --- tools/libxl/libxl.h | 8 +--- tools/libxl/libxl_cpuid.c | 87 +++++++++++++++++++++++++++++--------------- tools/libxl/libxl_internal.h | 4 ++ 3 files changed, 63 insertions(+), 36 deletions(-) diff --git a/tools/libxl/libxl.h b/tools/libxl/libxl.h index 1cd6c38e83..43f8ca269e 100644 --- a/tools/libxl/libxl.h +++ b/tools/libxl/libxl.h @@ -1310,12 +1310,8 @@ typedef struct { void libxl_bitmap_init(libxl_bitmap *map); void libxl_bitmap_dispose(libxl_bitmap *map); -/* - * libxl_cpuid_policy is opaque in the libxl ABI. Users of both libxl and - * libxc may not make assumptions about xc_xend_cpuid. - */ -typedef struct xc_xend_cpuid libxl_cpuid_policy; -typedef libxl_cpuid_policy * libxl_cpuid_policy_list; +struct libxl__cpu_policy; +typedef struct libxl__cpu_policy *libxl_cpuid_policy_list; void libxl_cpuid_dispose(libxl_cpuid_policy_list *cpuid_list); int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *l); void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index ba795469dd..4045136319 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -19,22 +19,29 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) return !libxl_cpuid_policy_list_length(pl); } -void libxl_cpuid_dispose(libxl_cpuid_policy_list *p_cpuid_list) +void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) { - int i, j; - libxl_cpuid_policy_list cpuid_list = *p_cpuid_list; + libxl_cpuid_policy_list policy = *pl; - if (cpuid_list == NULL) + if (policy == NULL) return; - for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { - for (j = 0; j < 4; j++) - if (cpuid_list[i].policy[j] != NULL) { - free(cpuid_list[i].policy[j]); - cpuid_list[i].policy[j] = NULL; + + if (policy->cpuid) { + unsigned int i, j; + struct xc_xend_cpuid *cpuid_list = policy->cpuid; + + for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { + for (j = 0; j < 4; j++) { + if (cpuid_list[i].policy[j] != NULL) { + free(cpuid_list[i].policy[j]); + } } + } + free(policy->cpuid); } - free(cpuid_list); - *p_cpuid_list = NULL; + + free(policy); + *pl = NULL; return; } @@ -62,11 +69,17 @@ struct cpuid_flags { /* go through the dynamic array finding the entry for a specified leaf. * if no entry exists, allocate one and return that. */ -static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, - uint32_t leaf, uint32_t subleaf) +static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, + uint32_t leaf, uint32_t subleaf) { + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid **list; int i = 0; + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + list = &policy->cpuid; if (*list != NULL) { for (i = 0; (*list)[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { if ((*list)[i].input[0] == leaf && (*list)[i].input[1] == subleaf) @@ -86,7 +99,7 @@ static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, * Will overwrite earlier entries and thus can be called multiple * times. */ -int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) +int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { #define NA XEN_CPUID_INPUT_UNUSED static const struct cpuid_flags cpuid_flags[] = { @@ -321,7 +334,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) if (flag->name == NULL) { return 2; } - entry = cpuid_find_match(cpuid, flag->leaf, flag->subleaf); + entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); resstr = entry->policy[flag->reg - 1]; num = strtoull(val, &endptr, 0); flags[flag->length] = 0; @@ -376,7 +389,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) * the strings for each register were directly exposed to the user. * Used for maintaining compatibility with older config files */ -int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, +int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; @@ -403,7 +416,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 3; } str = endptr + 1; - entry = cpuid_find_match(cpuid, leaf, subleaf); + entry = cpuid_find_match(policy, leaf, subleaf); for (str = endptr + 1; *str != 0;) { if (str[0] != 'e' || str[2] != 'x') { return 4; @@ -453,7 +466,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, pae = libxl_defbool_val(info->u.hvm.pae); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, info->cpuid, NULL); + pae, + info->cpuid ? info->cpuid->cpuid : NULL, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -478,16 +492,18 @@ static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, - libxl_cpuid_policy_list *pcpuid) + libxl_cpuid_policy_list *pl) { - libxl_cpuid_policy_list cpuid = *pcpuid; + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid *cpuid; yajl_gen_status s; int i, j; s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; - if (cpuid == NULL) goto empty; + if (policy == NULL || policy->cpuid == NULL) goto empty; + cpuid = policy->cpuid; for (i = 0; cpuid[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { s = yajl_gen_map_open(hand); @@ -526,7 +542,7 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl_cpuid_policy_list *p) { int i, size; - libxl_cpuid_policy_list l; + struct xc_xend_cpuid *l; flexarray_t *array; if (!libxl__json_object_is_array(o)) @@ -537,8 +553,10 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, return 0; size = array->count; + *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ - l = *p = libxl__calloc(NOGC, size + 1, sizeof(libxl_cpuid_policy)); + l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, + sizeof(struct xc_xend_cpuid)); l[size].input[0] = XEN_CPUID_INPUT_UNUSED; l[size].input[1] = XEN_CPUID_INPUT_UNUSED; @@ -581,8 +599,12 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) { int i = 0; - libxl_cpuid_policy_list l = *pl; + const struct xc_xend_cpuid *l; + + if (*pl == NULL) + return 0; + l = (*pl)->cpuid; if (l) { while (l[i].input[0] != XEN_CPUID_INPUT_UNUSED) i++; @@ -592,20 +614,25 @@ int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) } void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, - libxl_cpuid_policy_list *dst, - const libxl_cpuid_policy_list *src) + libxl_cpuid_policy_list *pdst, + const libxl_cpuid_policy_list *psrc) { + struct xc_xend_cpuid **dst; + struct xc_xend_cpuid *const *src; GC_INIT(ctx); int i, j, len; - if (*src == NULL) { - *dst = NULL; + if (*psrc == NULL) { + *pdst = NULL; goto out; } - len = libxl_cpuid_policy_list_length(src); + *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + dst = &(*pdst)->cpuid; + src = &(*psrc)->cpuid; + len = libxl_cpuid_policy_list_length(psrc); /* one extra slot for sentinel */ - *dst = libxl__calloc(NOGC, len + 1, sizeof(libxl_cpuid_policy)); + *dst = libxl__calloc(NOGC, len + 1, sizeof(struct xc_xend_cpuid)); (*dst)[len].input[0] = XEN_CPUID_INPUT_UNUSED; (*dst)[len].input[1] = XEN_CPUID_INPUT_UNUSED; diff --git a/tools/libxl/libxl_internal.h b/tools/libxl/libxl_internal.h index 2f531174e6..5c8c19bc00 100644 --- a/tools/libxl/libxl_internal.h +++ b/tools/libxl/libxl_internal.h @@ -4838,6 +4838,10 @@ _hidden int libxl__domain_pvcontrol(libxl__egc *egc, /* Check whether a domid is recent */ int libxl__is_domid_recent(libxl__gc *gc, uint32_t domid, bool *recent); +struct libxl__cpu_policy { + struct xc_xend_cpuid *cpuid; +}; + #endif /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581609.910638 (Exim 4.92) (envelope-from ) id 1qTt6Z-0005d3-Ln; Thu, 10 Aug 2023 00:00:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581609.910638; Thu, 10 Aug 2023 00:00:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6Z-0005cv-IK; Thu, 10 Aug 2023 00:00:43 +0000 Received: by outflank-mailman (input) for mailman id 581609; Thu, 10 Aug 2023 00:00:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6Z-0005cn-1s for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: introduce MSR data in libxl_cpuid_policy Message-Id: Date: Thu, 10 Aug 2023 00:00:42 +0000 commit 53307f5c5d71b0e05b7840fcae4ad76e0fca9fa0 Author: Roger Pau Monne AuthorDate: Wed Jul 26 09:47:53 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: introduce MSR data in libxl_cpuid_policy Add a new array field to libxl_cpuid_policy in order to store the MSR policies. Adding the MSR data in the libxl_cpuid_policy_list type is done so that existing users can seamlessly pass MSR features as part of the CPUID data, without requiring the introduction of a separate domain_build_info field, and a new set of handlers functions. Note that support for parsing the old JSON format is kept, as that's required in order to restore domains or received migrations from previous tool versions. Differentiation between the old and the new formats is done based on whether the contents of the 'cpuid' field is an array or a map JSON object. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 5b80cecb747b2176b9e85f6e7aa7be83416d77e1) --- tools/libxl/libxl_cpuid.c | 160 ++++++++++++++++++++++++++++++++++++++----- tools/libxl/libxl_internal.h | 1 + tools/libxl/libxl_types.idl | 2 +- 3 files changed, 146 insertions(+), 17 deletions(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 4045136319..b4c3a12565 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -16,7 +16,7 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { - return !libxl_cpuid_policy_list_length(pl); + return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); } void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) @@ -40,6 +40,8 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) free(policy->cpuid); } + free(policy->msr); + free(policy); *pl = NULL; return; @@ -467,7 +469,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, - info->cpuid ? info->cpuid->cpuid : NULL, NULL); + info->cpuid ? info->cpuid->cpuid : NULL, + info->cpuid ? info->cpuid->msr : NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -479,16 +482,22 @@ static const char *input_names[2] = { "leaf", "subleaf" }; static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; /* * Aiming for: - * [ - * { 'leaf': 'val-eax', - * 'subleaf': 'val-ecx', - * 'eax': 'filter', - * 'ebx': 'filter', - * 'ecx': 'filter', - * 'edx': 'filter' }, - * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, - * ... etc ... - * ] + * { 'cpuid': [ + * { 'leaf': 'val-eax', + * 'subleaf': 'val-ecx', + * 'eax': 'filter', + * 'ebx': 'filter', + * 'ecx': 'filter', + * 'edx': 'filter' }, + * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, + * ... etc ... + * ], + * 'msr': [ + * { 'index': 'val-index', + * 'policy': 'filter', }, + * ... etc ... + * ], + * } */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, @@ -496,9 +505,16 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, { libxl_cpuid_policy_list policy = *pl; struct xc_xend_cpuid *cpuid; + const struct xc_msr *msr; yajl_gen_status s; int i, j; + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "cpuid"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; @@ -533,6 +549,39 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, empty: s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "msr"); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_array_open(hand); + if (s != yajl_gen_status_ok) goto out; + + if (!policy || !policy->msr) goto done; + msr = policy->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "index"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_integer(hand, msr[i].index); + if (s != yajl_gen_status_ok) goto out; + s = libxl__yajl_gen_asciiz(hand, "policy"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_string(hand, + (const unsigned char *)msr[i].policy, 64); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_map_close(hand); + if (s != yajl_gen_status_ok) goto out; + } + +done: + s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_map_close(hand); out: return s; } @@ -543,17 +592,40 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, { int i, size; struct xc_xend_cpuid *l; + struct xc_msr *msr; + const libxl__json_object *co; flexarray_t *array; + bool cpuid_only = false; + + /* + * Old JSON field was an array with just the CPUID data. With the addition + * of MSRs the object is now a map with two array fields. + * + * Use the object format to detect whether the passed data contains just + * CPUID leafs and thus is an array, or does also contain MSRs and is a + * map. + */ + if (libxl__json_object_is_array(o)) { + co = o; + cpuid_only = true; + goto parse_cpuid; + } - if (!libxl__json_object_is_array(o)) + if (!libxl__json_object_is_map(o)) return ERROR_FAIL; - array = libxl__json_object_get_array(o); + co = libxl__json_map_get("cpuid", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + +parse_cpuid: + *p = libxl__calloc(NOGC, 1, sizeof(**p)); + + array = libxl__json_object_get_array(co); if (!array->count) - return 0; + goto cpuid_empty; size = array->count; - *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, sizeof(struct xc_xend_cpuid)); @@ -592,6 +664,42 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + if (cpuid_only) + return 0; + +cpuid_empty: + co = libxl__json_map_get("msr", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + + array = libxl__json_object_get_array(co); + if (!array->count) + return 0; + size = array->count; + /* need one extra slot as sentinel */ + msr = (*p)->msr = libxl__calloc(NOGC, size + 1, sizeof(struct xc_msr)); + + msr[size].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < size; i++) { + const libxl__json_object *t, *r; + + if (flexarray_get(array, i, (void**)&t) != 0) + return ERROR_FAIL; + + if (!libxl__json_object_is_map(t)) + return ERROR_FAIL; + + r = libxl__json_map_get("index", t, JSON_INTEGER); + if (!r) return ERROR_FAIL; + msr[i].index = libxl__json_object_get_integer(r); + r = libxl__json_map_get("policy", t, JSON_STRING); + if (!r) return ERROR_FAIL; + if (strlen(libxl__json_object_get_string(r)) != + ARRAY_SIZE(msr[i].policy) - 1) + return ERROR_FAIL; + strcpy(msr[i].policy, libxl__json_object_get_string(r)); + } return 0; } @@ -628,6 +736,10 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, } *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + + if (!(*psrc)->cpuid) + goto copy_msr; + dst = &(*pdst)->cpuid; src = &(*psrc)->cpuid; len = libxl_cpuid_policy_list_length(psrc); @@ -647,6 +759,22 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, (*dst)[i].policy[j] = NULL; } +copy_msr: + if ((*psrc)->msr) { + const struct xc_msr *msr = (*psrc)->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) + ; + len = i; + (*pdst)->msr = libxl__calloc(NOGC, len + 1, sizeof(struct xc_msr)); + (*pdst)->msr[len].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < len; i++) { + (*pdst)->msr[i].index = msr[i].index; + strcpy((*pdst)->msr[i].policy, msr[i].policy); + } + } + out: GC_FREE; } diff --git a/tools/libxl/libxl_internal.h b/tools/libxl/libxl_internal.h index 5c8c19bc00..e9bd138df9 100644 --- a/tools/libxl/libxl_internal.h +++ b/tools/libxl/libxl_internal.h @@ -4840,6 +4840,7 @@ int libxl__is_domid_recent(libxl__gc *gc, uint32_t domid, bool *recent); struct libxl__cpu_policy { struct xc_xend_cpuid *cpuid; + struct xc_msr *msr; }; #endif diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl index 9d3f05f399..5b7553920c 100644 --- a/tools/libxl/libxl_types.idl +++ b/tools/libxl/libxl_types.idl @@ -19,7 +19,7 @@ libxl_mac = Builtin("mac", json_parse_type="JSON_STRING", passby=PASS_BY_REFEREN libxl_bitmap = Builtin("bitmap", json_parse_type="JSON_ARRAY", dispose_fn="libxl_bitmap_dispose", passby=PASS_BY_REFERENCE, check_default_fn="libxl_bitmap_is_empty", copy_fn="libxl_bitmap_copy_alloc") libxl_cpuid_policy_list = Builtin("cpuid_policy_list", dispose_fn="libxl_cpuid_dispose", passby=PASS_BY_REFERENCE, - json_parse_type="JSON_ARRAY", check_default_fn="libxl__cpuid_policy_is_empty", + json_parse_type="JSON_ANY", check_default_fn="libxl__cpuid_policy_is_empty", copy_fn="libxl_cpuid_policy_list_copy") libxl_string_list = Builtin("string_list", dispose_fn="libxl_string_list_dispose", passby=PASS_BY_REFERENCE, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:00:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:00:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581610.910641 (Exim 4.92) (envelope-from ) id 1qTt6j-0005gE-OM; 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Thu, 10 Aug 2023 00:00:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RTl1FqeygxdP2hZfzL1X7juEBROVXEgbfo4tczbDBqU=; b=MCle3zk886Pt1BqxluV22nzWfx K9HzdVNjPWGWvlTU9Z8xA7BIO5DtBihlCy2U7XwVguyNVC0Fkki1NKdNFuSdWyAbwekuJ2v+Pl6gS MSwSDoVF4DsguYT/Q9+gphRepbSC8WoPgd/VBisUAcnAarD2AZVqjx87qjEY2wt12K0M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: split logic to parse user provided CPUID features Message-Id: Date: Thu, 10 Aug 2023 00:00:53 +0000 commit 548ac090515986570d1ab4fab469c45ebcca0fc7 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:56 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: split logic to parse user provided CPUID features Move the CPUID value parsers out of libxl_cpuid_parse_config() into a newly created cpuid_add() local helper. This is in preparation for also adding MSR feature parsing support. No functional change intended. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit e2b1da9b8fda0ed7d3dca7bd15829cfea496973a) --- tools/libxl/libxl_cpuid.c | 120 ++++++++++++++++++++++++---------------------- 1 file changed, 63 insertions(+), 57 deletions(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index b4c3a12565..afbebd36a8 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -96,6 +96,66 @@ static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, return *list + i; } +static int cpuid_add(libxl_cpuid_policy_list *policy, + const struct cpuid_flags *flag, const char *val) +{ + struct xc_xend_cpuid *entry = cpuid_find_match(policy, flag->leaf, + flag->subleaf); + unsigned long num; + char flags[33], *resstr, *endptr; + unsigned int i; + + resstr = entry->policy[flag->reg - 1]; + num = strtoul(val, &endptr, 0); + flags[flag->length] = 0; + if (endptr != val) { + /* if this was a valid number, write the binary form into the string */ + for (i = 0; i < flag->length; i++) { + flags[flag->length - 1 - i] = "01"[(num >> i) & 1]; + } + } else { + switch(val[0]) { + case 'x': case 'k': case 's': + memset(flags, val[0], flag->length); + break; + default: + return 3; + } + } + + if (resstr == NULL) { + resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + } + + /* the family and model entry is potentially split up across + * two fields in Fn0000_0001_EAX, so handle them here separately. + */ + if (!strcmp(flag->name, "family")) { + if (num < 16) { + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + memcpy(resstr + (32 - 8) - 20, "00000000", 8); + } else { + num -= 15; + memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); + for (i = 0; i < 7; i++) { + flags[7 - i] = "01"[num & 1]; + num >>= 1; + } + memcpy(resstr + (32 - 8) - 20, flags, 8); + } + } else if (!strcmp(flag->name, "model")) { + memcpy(resstr + (32 - 4) - 16, flags, 4); + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + } else { + memcpy(resstr + (32 - flag->length) - flag->bit, flags, + flag->length); + } + entry->policy[flag->reg - 1] = resstr; + + return 0; + +} + /* parse a single key=value pair and translate it into the libxc * used interface using 32-characters strings for each register. * Will overwrite earlier entries and thus can be called multiple @@ -316,12 +376,8 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; #undef NA - char *sep, *val, *endptr; - int i; + const char *sep, *val; const struct cpuid_flags *flag; - struct xc_xend_cpuid *entry; - unsigned long num; - char flags[33], *resstr; sep = strchr(str, '='); if (sep == NULL) { @@ -331,60 +387,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } for (flag = cpuid_flags; flag->name != NULL; flag++) { if(!strncmp(str, flag->name, sep - str) && flag->name[sep - str] == 0) - break; - } - if (flag->name == NULL) { - return 2; - } - entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); - resstr = entry->policy[flag->reg - 1]; - num = strtoull(val, &endptr, 0); - flags[flag->length] = 0; - if (endptr != val) { - /* if this was a valid number, write the binary form into the string */ - for (i = 0; i < flag->length; i++) { - flags[flag->length - 1 - i] = "01"[!!(num & (1 << i))]; - } - } else { - switch(val[0]) { - case 'x': case 'k': case 's': - memset(flags, val[0], flag->length); - break; - default: - return 3; - } - } - - if (resstr == NULL) { - resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + return cpuid_add(policy, flag, val); } - /* the family and model entry is potentially split up across - * two fields in Fn0000_0001_EAX, so handle them here separately. - */ - if (!strncmp(str, "family", sep - str)) { - if (num < 16) { - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - memcpy(resstr + (32 - 8) - 20, "00000000", 8); - } else { - num -= 15; - memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); - for (i = 0; i < 7; i++) { - flags[7 - i] = "01"[num & 1]; - num >>= 1; - } - memcpy(resstr + (32 - 8) - 20, flags, 8); - } - } else if (!strncmp(str, "model", sep - str)) { - memcpy(resstr + (32 - 4) - 16, flags, 4); - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - } else { - memcpy(resstr + (32 - flag->length) - flag->bit, flags, - flag->length); - } - entry->policy[flag->reg - 1] = resstr; - - return 0; + return 2; } /* parse a single list item from the legacy Python xend syntax, where -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581611.910644 (Exim 4.92) (envelope-from ) id 1qTt6t-0005iu-Pv; Thu, 10 Aug 2023 00:01:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581611.910644; Thu, 10 Aug 2023 00:01:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt6t-0005in-N7; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Y2w6c0DyAXiPU6+pyZivU9KvUwVfKM6S25HTj5aawe0=; b=1i50fAaijGb9aI2fLhAa7eLuax zskA1fKdY+U+cIwhI6/0NyM3e4GYBIlWf75ueq7EkbuN3rUr+gN0gMn70qpAZhnfdXqypJPc4YicD C8Agz6ARoPjmRChc1bOLRfM0PuhIap8SqUgg3jaYgRYf2RuTKPXArGRxg4a6cOoD/S+o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: use the cpuid feature names from cpufeatureset.h Message-Id: Date: Thu, 10 Aug 2023 00:01:03 +0000 commit 1299ea8d766d15edd130248e3a76770f1ca2a7f2 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:57 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: use the cpuid feature names from cpufeatureset.h The current implementation in libxl_cpuid_parse_config() requires keeping a list of cpuid feature bits that should be mostly in sync with the contents of cpufeatureset.h. Avoid such duplication by using the automatically generated list of cpuid features in INIT_FEATURE_NAMES in order to map feature names to featureset bits, and then translate from featureset bits into cpuid leaf, subleaf, register tuple. Note that the full contents of the previous cpuid translation table can't be removed. That's because some feature names allowed by libxl are not described in the featuresets, or because naming has diverged and the previous nomenclature is preserved for compatibility reasons. Should result in no functional change observed by callers, albeit some new cpuid features will be available as a result of the change. While there constify cpuid_flags name field. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit d638fe233cb3a45105319df75df0edfed2fde5a5) --- docs/man/xl.cfg.5.pod.in | 24 ++--- tools/libxl/libxl_cpuid.c | 243 ++++++++++++++++++---------------------------- tools/xl/xl_parse.c | 3 + 3 files changed, 107 insertions(+), 163 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index 2224080b30..be454ede2a 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -2014,24 +2014,16 @@ proccount procpkg stepping =back -List of keys taking a character: +List of keys taking a character can be found in the public header file +L -=over 4 - -3dnow 3dnowext 3dnowprefetch abm acpi adx aes altmovcr8 apic arat avx avx2 -avx512-4fmaps avx512-4vnniw avx512bw avx512cd avx512dq avx512er avx512f -avx512ifma avx512pf avx512vbmi avx512vl bmi1 bmi2 clflushopt clfsh clwb cmov -cmplegacy cmpxchg16 cmpxchg8 cmt cntxid dca de ds dscpl dtes64 erms est extapic -f16c ffxsr fma fma4 fpu fsgsbase fxsr hle htt hypervisor ia64 ibs invpcid -invtsc lahfsahf lm lwp mca mce misalignsse mmx mmxext monitor movbe mpx msr -mtrr nodeid nx ospke osvw osxsave pae page1gb pat pbe pcid pclmulqdq pdcm -perfctr_core perfctr_nb pge pku popcnt pse pse36 psn rdrand rdseed rdtscp rtm -sha skinit smap smep smx ss sse sse2 sse3 sse4.1 sse4.2 sse4_1 sse4_2 sse4a -ssse3 svm svm_decode svm_lbrv svm_npt svm_nrips svm_pausefilt svm_tscrate -svm_vmcbclean syscall sysenter tbm tm tm2 topoext tsc tsc-deadline tsc_adjust -umip vme vmx wdt x2apic xop xsave xtpr +The feature names described in C should be specified in all +lowercase letters, and with underscores converted to hyphens. For example in +order to reference feature C the string C should be used. -=back +Note that C is described as an option that takes a value, and that +takes precedence over the C flag in C. The feature +flag must be referenced as C. =back diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index afbebd36a8..5d0fc34bd4 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -14,6 +14,8 @@ #include "libxl_internal.h" +#include + int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); @@ -60,7 +62,7 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) * Used for the static structure describing all features. */ struct cpuid_flags { - char* name; + const char *name; uint32_t leaf; uint32_t subleaf; int reg; @@ -153,7 +155,19 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, entry->policy[flag->reg - 1] = resstr; return 0; +} + +struct feature_name { + const char *name; + unsigned int bit; +}; + +static int search_feature(const void *a, const void *b) +{ + const char *key = a; + const char *feat = ((const struct feature_name *)b)->name; + return strcmp(key, feat); } /* parse a single key=value pair and translate it into the libxc @@ -176,187 +190,42 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"proccount", 0x00000001, NA, CPUID_REG_EBX, 16, 8}, {"localapicid", 0x00000001, NA, CPUID_REG_EBX, 24, 8}, - {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, - {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, - {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, - {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, - {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, - {"vmx", 0x00000001, NA, CPUID_REG_ECX, 5, 1}, - {"smx", 0x00000001, NA, CPUID_REG_ECX, 6, 1}, {"est", 0x00000001, NA, CPUID_REG_ECX, 7, 1}, - {"tm2", 0x00000001, NA, CPUID_REG_ECX, 8, 1}, - {"ssse3", 0x00000001, NA, CPUID_REG_ECX, 9, 1}, {"cntxid", 0x00000001, NA, CPUID_REG_ECX, 10, 1}, - {"fma", 0x00000001, NA, CPUID_REG_ECX, 12, 1}, {"cmpxchg16", 0x00000001, NA, CPUID_REG_ECX, 13, 1}, - {"xtpr", 0x00000001, NA, CPUID_REG_ECX, 14, 1}, - {"pdcm", 0x00000001, NA, CPUID_REG_ECX, 15, 1}, - {"pcid", 0x00000001, NA, CPUID_REG_ECX, 17, 1}, - {"dca", 0x00000001, NA, CPUID_REG_ECX, 18, 1}, /* Linux uses sse4_{1,2}. Keep sse4.{1,2} for compatibility */ {"sse4_1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4.1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4_2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, {"sse4.2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, - {"x2apic", 0x00000001, NA, CPUID_REG_ECX, 21, 1}, - {"movbe", 0x00000001, NA, CPUID_REG_ECX, 22, 1}, - {"popcnt", 0x00000001, NA, CPUID_REG_ECX, 23, 1}, - {"tsc-deadline", 0x00000001, NA, CPUID_REG_ECX, 24, 1}, {"aes", 0x00000001, NA, CPUID_REG_ECX, 25, 1}, - {"xsave", 0x00000001, NA, CPUID_REG_ECX, 26, 1}, - {"osxsave", 0x00000001, NA, CPUID_REG_ECX, 27, 1}, - {"avx", 0x00000001, NA, CPUID_REG_ECX, 28, 1}, - {"f16c", 0x00000001, NA, CPUID_REG_ECX, 29, 1}, - {"rdrand", 0x00000001, NA, CPUID_REG_ECX, 30, 1}, - {"hypervisor", 0x00000001, NA, CPUID_REG_ECX, 31, 1}, - - {"fpu", 0x00000001, NA, CPUID_REG_EDX, 0, 1}, - {"vme", 0x00000001, NA, CPUID_REG_EDX, 1, 1}, - {"de", 0x00000001, NA, CPUID_REG_EDX, 2, 1}, - {"pse", 0x00000001, NA, CPUID_REG_EDX, 3, 1}, - {"tsc", 0x00000001, NA, CPUID_REG_EDX, 4, 1}, - {"msr", 0x00000001, NA, CPUID_REG_EDX, 5, 1}, - {"pae", 0x00000001, NA, CPUID_REG_EDX, 6, 1}, - {"mce", 0x00000001, NA, CPUID_REG_EDX, 7, 1}, + {"cmpxchg8", 0x00000001, NA, CPUID_REG_EDX, 8, 1}, - {"apic", 0x00000001, NA, CPUID_REG_EDX, 9, 1}, {"sysenter", 0x00000001, NA, CPUID_REG_EDX, 11, 1}, - {"mtrr", 0x00000001, NA, CPUID_REG_EDX, 12, 1}, - {"pge", 0x00000001, NA, CPUID_REG_EDX, 13, 1}, - {"mca", 0x00000001, NA, CPUID_REG_EDX, 14, 1}, - {"cmov", 0x00000001, NA, CPUID_REG_EDX, 15, 1}, - {"pat", 0x00000001, NA, CPUID_REG_EDX, 16, 1}, - {"pse36", 0x00000001, NA, CPUID_REG_EDX, 17, 1}, {"psn", 0x00000001, NA, CPUID_REG_EDX, 18, 1}, {"clfsh", 0x00000001, NA, CPUID_REG_EDX, 19, 1}, - {"ds", 0x00000001, NA, CPUID_REG_EDX, 21, 1}, - {"acpi", 0x00000001, NA, CPUID_REG_EDX, 22, 1}, - {"mmx", 0x00000001, NA, CPUID_REG_EDX, 23, 1}, - {"fxsr", 0x00000001, NA, CPUID_REG_EDX, 24, 1}, - {"sse", 0x00000001, NA, CPUID_REG_EDX, 25, 1}, - {"sse2", 0x00000001, NA, CPUID_REG_EDX, 26, 1}, - {"ss", 0x00000001, NA, CPUID_REG_EDX, 27, 1}, - {"htt", 0x00000001, NA, CPUID_REG_EDX, 28, 1}, {"tm", 0x00000001, NA, CPUID_REG_EDX, 29, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, {"arat", 0x00000006, NA, CPUID_REG_EAX, 2, 1}, - {"fsgsbase", 0x00000007, 0, CPUID_REG_EBX, 0, 1}, {"tsc_adjust", 0x00000007, 0, CPUID_REG_EBX, 1, 1}, - {"bmi1", 0x00000007, 0, CPUID_REG_EBX, 3, 1}, - {"hle", 0x00000007, 0, CPUID_REG_EBX, 4, 1}, - {"avx2", 0x00000007, 0, CPUID_REG_EBX, 5, 1}, - {"smep", 0x00000007, 0, CPUID_REG_EBX, 7, 1}, - {"bmi2", 0x00000007, 0, CPUID_REG_EBX, 8, 1}, - {"erms", 0x00000007, 0, CPUID_REG_EBX, 9, 1}, - {"invpcid", 0x00000007, 0, CPUID_REG_EBX, 10, 1}, - {"rtm", 0x00000007, 0, CPUID_REG_EBX, 11, 1}, {"cmt", 0x00000007, 0, CPUID_REG_EBX, 12, 1}, - {"mpx", 0x00000007, 0, CPUID_REG_EBX, 14, 1}, - {"avx512f", 0x00000007, 0, CPUID_REG_EBX, 16, 1}, - {"avx512dq", 0x00000007, 0, CPUID_REG_EBX, 17, 1}, - {"rdseed", 0x00000007, 0, CPUID_REG_EBX, 18, 1}, - {"adx", 0x00000007, 0, CPUID_REG_EBX, 19, 1}, - {"smap", 0x00000007, 0, CPUID_REG_EBX, 20, 1}, - {"avx512-ifma", 0x00000007, 0, CPUID_REG_EBX, 21, 1}, - {"clflushopt", 0x00000007, 0, CPUID_REG_EBX, 23, 1}, - {"clwb", 0x00000007, 0, CPUID_REG_EBX, 24, 1}, - {"avx512pf", 0x00000007, 0, CPUID_REG_EBX, 26, 1}, - {"avx512er", 0x00000007, 0, CPUID_REG_EBX, 27, 1}, - {"avx512cd", 0x00000007, 0, CPUID_REG_EBX, 28, 1}, - {"sha", 0x00000007, 0, CPUID_REG_EBX, 29, 1}, - {"avx512bw", 0x00000007, 0, CPUID_REG_EBX, 30, 1}, - {"avx512vl", 0x00000007, 0, CPUID_REG_EBX, 31, 1}, - - {"prefetchwt1", 0x00000007, 0, CPUID_REG_ECX, 0, 1}, - {"avx512-vbmi", 0x00000007, 0, CPUID_REG_ECX, 1, 1}, - {"umip", 0x00000007, 0, CPUID_REG_ECX, 2, 1}, - {"pku", 0x00000007, 0, CPUID_REG_ECX, 3, 1}, - {"ospke", 0x00000007, 0, CPUID_REG_ECX, 4, 1}, - {"avx512-vbmi2", 0x00000007, 0, CPUID_REG_ECX, 6, 1}, - {"cet-ss", 0x00000007, 0, CPUID_REG_ECX, 7, 1}, - {"gfni", 0x00000007, 0, CPUID_REG_ECX, 8, 1}, - {"vaes", 0x00000007, 0, CPUID_REG_ECX, 9, 1}, - {"vpclmulqdq", 0x00000007, 0, CPUID_REG_ECX, 10, 1}, - {"avx512-vnni", 0x00000007, 0, CPUID_REG_ECX, 11, 1}, - {"avx512-bitalg",0x00000007, 0, CPUID_REG_ECX, 12, 1}, - {"avx512-vpopcntdq",0x00000007,0,CPUID_REG_ECX, 14, 1}, - {"rdpid", 0x00000007, 0, CPUID_REG_ECX, 22, 1}, - {"cldemote", 0x00000007, 0, CPUID_REG_ECX, 25, 1}, - - {"avx512-4vnniw",0x00000007, 0, CPUID_REG_EDX, 2, 1}, - {"avx512-4fmaps",0x00000007, 0, CPUID_REG_EDX, 3, 1}, - {"srbds-ctrl", 0x00000007, 0, CPUID_REG_EDX, 9, 1}, - {"md-clear", 0x00000007, 0, CPUID_REG_EDX, 10, 1}, - {"serialize", 0x00000007, 0, CPUID_REG_EDX, 14, 1}, - {"tsxldtrk", 0x00000007, 0, CPUID_REG_EDX, 16, 1}, - {"cet-ibt", 0x00000007, 0, CPUID_REG_EDX, 20, 1}, - {"ibrsb", 0x00000007, 0, CPUID_REG_EDX, 26, 1}, - {"stibp", 0x00000007, 0, CPUID_REG_EDX, 27, 1}, - {"l1d-flush", 0x00000007, 0, CPUID_REG_EDX, 28, 1}, - {"arch-caps", 0x00000007, 0, CPUID_REG_EDX, 29, 1}, - {"core-caps", 0x00000007, 0, CPUID_REG_EDX, 30, 1}, - {"ssbd", 0x00000007, 0, CPUID_REG_EDX, 31, 1}, - - {"avx512-bf16", 0x00000007, 1, CPUID_REG_EAX, 5, 1}, - - {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, {"lahfsahf", 0x80000001, NA, CPUID_REG_ECX, 0, 1}, {"cmplegacy", 0x80000001, NA, CPUID_REG_ECX, 1, 1}, - {"svm", 0x80000001, NA, CPUID_REG_ECX, 2, 1}, - {"extapic", 0x80000001, NA, CPUID_REG_ECX, 3, 1}, {"altmovcr8", 0x80000001, NA, CPUID_REG_ECX, 4, 1}, - {"abm", 0x80000001, NA, CPUID_REG_ECX, 5, 1}, - {"sse4a", 0x80000001, NA, CPUID_REG_ECX, 6, 1}, - {"misalignsse", 0x80000001, NA, CPUID_REG_ECX, 7, 1}, - {"3dnowprefetch",0x80000001, NA, CPUID_REG_ECX, 8, 1}, - {"osvw", 0x80000001, NA, CPUID_REG_ECX, 9, 1}, - {"ibs", 0x80000001, NA, CPUID_REG_ECX, 10, 1}, - {"xop", 0x80000001, NA, CPUID_REG_ECX, 11, 1}, - {"skinit", 0x80000001, NA, CPUID_REG_ECX, 12, 1}, - {"wdt", 0x80000001, NA, CPUID_REG_ECX, 13, 1}, - {"lwp", 0x80000001, NA, CPUID_REG_ECX, 15, 1}, - {"fma4", 0x80000001, NA, CPUID_REG_ECX, 16, 1}, {"nodeid", 0x80000001, NA, CPUID_REG_ECX, 19, 1}, - {"tbm", 0x80000001, NA, CPUID_REG_ECX, 21, 1}, - {"topoext", 0x80000001, NA, CPUID_REG_ECX, 22, 1}, {"perfctr_core", 0x80000001, NA, CPUID_REG_ECX, 23, 1}, {"perfctr_nb", 0x80000001, NA, CPUID_REG_ECX, 24, 1}, - {"syscall", 0x80000001, NA, CPUID_REG_EDX, 11, 1}, - {"nx", 0x80000001, NA, CPUID_REG_EDX, 20, 1}, - {"mmxext", 0x80000001, NA, CPUID_REG_EDX, 22, 1}, - {"ffxsr", 0x80000001, NA, CPUID_REG_EDX, 25, 1}, - {"page1gb", 0x80000001, NA, CPUID_REG_EDX, 26, 1}, - {"rdtscp", 0x80000001, NA, CPUID_REG_EDX, 27, 1}, - {"lm", 0x80000001, NA, CPUID_REG_EDX, 29, 1}, - {"3dnowext", 0x80000001, NA, CPUID_REG_EDX, 30, 1}, - {"3dnow", 0x80000001, NA, CPUID_REG_EDX, 31, 1}, - {"procpkg", 0x00000004, 0, CPUID_REG_EAX, 26, 6}, {"invtsc", 0x80000007, NA, CPUID_REG_EDX, 8, 1}, - {"clzero", 0x80000008, NA, CPUID_REG_EBX, 0, 1}, - {"rstr-fp-err-ptrs", 0x80000008, NA, CPUID_REG_EBX, 2, 1}, - {"wbnoinvd", 0x80000008, NA, CPUID_REG_EBX, 9, 1}, - {"ibpb", 0x80000008, NA, CPUID_REG_EBX, 12, 1}, - {"ibrs", 0x80000008, NA, CPUID_REG_EBX, 14, 1}, - {"amd-stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1}, - {"ibrs-always", 0x80000008, NA, CPUID_REG_EBX, 16, 1}, - {"stibp-always", 0x80000008, NA, CPUID_REG_EBX, 17, 1}, - {"ibrs-fast", 0x80000008, NA, CPUID_REG_EBX, 18, 1}, - {"ibrs-same-mode", 0x80000008, NA, CPUID_REG_EBX, 19, 1}, {"ppin", 0x80000008, NA, CPUID_REG_EBX, 23, 1}, - {"amd-ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1}, - {"virt-ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1}, - {"ssb-no", 0x80000008, NA, CPUID_REG_EBX, 26, 1}, - {"psfd", 0x80000008, NA, CPUID_REG_EBX, 28, 1}, {"btc-no", 0x80000008, NA, CPUID_REG_EBX, 29, 1}, - {"ibpb-ret", 0x80000008, NA, CPUID_REG_EBX, 30, 1}, {"nc", 0x80000008, NA, CPUID_REG_ECX, 0, 8}, {"apicidsize", 0x80000008, NA, CPUID_REG_ECX, 12, 4}, @@ -375,9 +244,58 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; + static const struct feature_name features[] = INIT_FEATURE_NAMES; + /* + * NB: if we switch to using a cpu_policy derived object instead of a + * libxl_cpuid_policy_list we could get rid of the featureset -> cpuid leaf + * conversion table and use a featureset directly as we have conversions + * to/from featureset and cpu_policy. + */ + static const struct { + enum { FEAT_CPUID, FEAT_MSR } type; + union { + struct { + uint32_t leaf, subleaf; + unsigned int reg; + } cpuid; + struct { + uint32_t index; + unsigned int reg; + } msr; + }; + } feature_to_policy[] = { +#define CPUID_ENTRY(l, s, r) \ + { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } +#define MSR_ENTRY(i, r) \ + { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x0000000D, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_ECX), + CPUID_ENTRY(0x80000007, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000008, NA, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x80000021, NA, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 2, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_ECX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX), + MSR_ENTRY(0x10a, CPUID_REG_EAX), + MSR_ENTRY(0x10a, CPUID_REG_EDX), +#undef MSR_ENTRY +#undef CPUID_ENTRY + }; #undef NA const char *sep, *val; + char *name; const struct cpuid_flags *flag; + const struct feature_name *feat; + + BUILD_BUG_ON(ARRAY_SIZE(feature_to_policy) != FEATURESET_NR_ENTRIES); sep = strchr(str, '='); if (sep == NULL) { @@ -390,6 +308,37 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) return cpuid_add(policy, flag, val); } + /* Provide a NUL terminated feature name to the search helper. */ + name = strndup(str, sep - str); + if (name == NULL) + return ERROR_NOMEM; + + feat = bsearch(name, features, ARRAY_SIZE(features), sizeof(features[0]), + search_feature); + free(name); + + if (feat == NULL) + return 2; + + switch (feature_to_policy[feat->bit / 32].type) { + case FEAT_CPUID: + { + struct cpuid_flags f; + + f.name = feat->name; + f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.bit = feat->bit % 32; + f.length = 1; + + return cpuid_add(policy, &f, val); + } + + case FEAT_MSR: + return 2; + } + return 2; } diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 34ac20773d..ca7e2576fc 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -2465,6 +2465,9 @@ skip_usbdev: case 3: errstr = "illegal CPUID value (must be: [0|1|x|k|s])"; break; + case ERROR_NOMEM: + errstr = "out of memory"; + break; default: errstr = "unknown error"; break; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581612.910649 (Exim 4.92) (envelope-from ) id 1qTt74-0005lV-Rv; Thu, 10 Aug 2023 00:01:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581612.910649; Thu, 10 Aug 2023 00:01:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt74-0005lN-Oy; Thu, 10 Aug 2023 00:01:14 +0000 Received: by outflank-mailman (input) for mailman id 581612; Thu, 10 Aug 2023 00:01:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt73-0005lA-B5 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt73-0000hU-AP for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt73-0006le-9e for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wh7Ajb583jHHfh7wHLMZeD2uo+k5O7W/5l1zFrlQpks=; b=bQ/gr/s4jJBYRePQ9XZo0efEXs TwtK1EQNGrEDNLOriOeMldnQD0xkcjJx2P2cDd2GEzYg7M3UFWdrHwlaAZFn5EksRuErcI81MqlJ7 SNgxEr8r0cryooSTWKUzBETj9GUWF2qRF1aZHfnHkJXmjtwvtl4F12N4rTZLdXk6JHIg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: add support for parsing MSR features Message-Id: Date: Thu, 10 Aug 2023 00:01:13 +0000 commit f1652ccc9093d50c20a74ac5765feecc9724d9a9 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:58 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: add support for parsing MSR features Introduce support for handling MSR features in libxl_cpuid_parse_config(). The MSR policies are added to the libxl_cpuid_policy like the CPUID one, which gets passed to xc_cpuid_apply_policy(). This allows existing users of libxl to provide MSR related features as key=value pairs to libxl_cpuid_parse_config() without requiring the usage of a different API. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit 6d21cedbaa34b3a3856f964189e911112c732b21) --- tools/libxl/libxl_cpuid.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 5d0fc34bd4..0a1ff02031 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -157,6 +157,60 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +{ + unsigned int i = 0; + libxl_cpuid_policy_list policy = *pl; + + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + if (policy->msr != NULL) { + for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + if (policy->msr[i].index == index) { + return &policy->msr[i]; + } + } + } + + policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); + policy->msr[i].index = index; + memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); + policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; + policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; + + return &policy->msr[i]; +} + +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, + const char *val) +{ + struct xc_msr *entry = msr_find_match(policy, index); + + /* Only allow options taking a character for MSRs, no values allowed. */ + if (strlen(val) != 1) + return 3; + + switch (val[0]) { + case '0': + case '1': + case 'x': + case 'k': + entry->policy[63 - bit] = val[0]; + break; + + case 's': + /* Translate s -> k as xc_msr doesn't support the deprecated 's'. */ + entry->policy[63 - bit] = 'k'; + break; + + default: + return 3; + } + + return 0; +} + struct feature_name { const char *name; unsigned int bit; @@ -336,7 +390,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } case FEAT_MSR: - return 2; + { + unsigned int bit = feat->bit % 32; + + if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + bit += 32; + + return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + bit, val); + } } return 2; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581613.910653 (Exim 4.92) (envelope-from ) id 1qTt7E-0005oy-Uq; Thu, 10 Aug 2023 00:01:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581613.910653; Thu, 10 Aug 2023 00:01:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7E-0005oq-SF; Thu, 10 Aug 2023 00:01:24 +0000 Received: by outflank-mailman (input) for mailman id 581613; Thu, 10 Aug 2023 00:01:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7D-0005og-E6 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7D-0000hb-DK for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt7D-0006m8-CZ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ibn3diM4UKsyNZkbT7sNi+5oUEUbujyoTEO+Yd+n49o=; b=pPgyJWg51+dahBdOa9WQz0QeHW EFWpwfwszBsQbaIpqvTlTuJHSCawhOzhdfDJDrX7z1AFFXv74ODi2QMM5uG74G3h0/ZTPTNdbXG6r NbE2E3pOi9M9DjQeUAWmbIIgmO81rEXqddNOsG9Q+47cYDfVACtrEKNhuKUISvZ9IE5Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: avoid shadowing of index() Message-Id: Date: Thu, 10 Aug 2023 00:01:23 +0000 commit 26a5e35fd81ac97ff9b49bfaf932f67aa2a26e76 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:26 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: avoid shadowing of index() Because of -Wshadow the build otherwise fails with old enough glibc. While there also obey line length limits for msr_add(). Fixes: 6d21cedbaa34 ("libxl: add support for parsing MSR features") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 4f6afde88be3e8960eb311d16ac41d44ab71ed10) --- tools/libxl/libxl_cpuid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 0a1ff02031..80d83f3213 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -157,7 +157,7 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } -static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t idx) { unsigned int i = 0; libxl_cpuid_policy_list policy = *pl; @@ -167,14 +167,14 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index if (policy->msr != NULL) { for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { - if (policy->msr[i].index == index) { + if (policy->msr[i].index == idx) { return &policy->msr[i]; } } } policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); - policy->msr[i].index = index; + policy->msr[i].index = idx; memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; @@ -182,10 +182,10 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index return &policy->msr[i]; } -static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, - const char *val) +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t idx, + unsigned int bit, const char *val) { - struct xc_msr *entry = msr_find_match(policy, index); + struct xc_msr *entry = msr_find_match(policy, idx); /* Only allow options taking a character for MSRs, no values allowed. */ if (strlen(val) != 1) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581614.910656 (Exim 4.92) (envelope-from ) id 1qTt7P-0005re-03; Thu, 10 Aug 2023 00:01:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581614.910656; Thu, 10 Aug 2023 00:01:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7O-0005rW-Tl; Thu, 10 Aug 2023 00:01:34 +0000 Received: by outflank-mailman (input) for mailman id 581614; Thu, 10 Aug 2023 00:01:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7N-0005rL-Gp for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7N-0000hl-GA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt7N-0006mc-FW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=p3AsPN7MGt7Njg+ribCbr08EYdXL9+7hPeyGpnW/FGw=; b=GkdLcCyN0H5CmJM/zUQ8nd3idq 56UUtqlB7W1vllYznuLUz2Rw6SAO0Dlcg8Xg+vGkRl6iMTc40BbZOz94Cul7gTqmI4l3iuVzoxJSG 9U5o8x8A5F7RHlSJF+LPlHyl443JQQ7ZObZ2W0OKFM0TGRBM7v/DXggsfNRN7DYBf7DQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] libxl: allow building with old gcc again Message-Id: Date: Thu, 10 Aug 2023 00:01:33 +0000 commit 7e10b39d9dfcde404edef9b16b8b0b2c887975fd Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:39 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 libxl: allow building with old gcc again We can't use initializers of unnamed struct/union members just yet. Fixes: d638fe233cb3 ("libxl: use the cpuid feature names from cpufeatureset.h") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 1aa5acbbec3f37bf38d78fa96d210053f8e8efd5) --- tools/libxl/libxl_cpuid.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/tools/libxl/libxl_cpuid.c b/tools/libxl/libxl_cpuid.c index 80d83f3213..50592b544a 100644 --- a/tools/libxl/libxl_cpuid.c +++ b/tools/libxl/libxl_cpuid.c @@ -316,12 +316,16 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) uint32_t index; unsigned int reg; } msr; - }; + } u; } feature_to_policy[] = { #define CPUID_ENTRY(l, s, r) \ - { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } + { .type = FEAT_CPUID, \ + .u = { .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } \ + } #define MSR_ENTRY(i, r) \ - { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + { .type = FEAT_MSR, \ + .u = { .msr.index = i, .msr.reg = r } \ + } CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), @@ -380,9 +384,9 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) struct cpuid_flags f; f.name = feat->name; - f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; - f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; - f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.leaf = feature_to_policy[feat->bit / 32].u.cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].u.cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].u.cpuid.reg; f.bit = feat->bit % 32; f.length = 1; @@ -393,10 +397,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { unsigned int bit = feat->bit % 32; - if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + if (feature_to_policy[feat->bit / 32].u.msr.reg == CPUID_REG_EDX) bit += 32; - return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + return msr_add(policy, feature_to_policy[feat->bit / 32].u.msr.index, bit, val); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581615.910660 (Exim 4.92) (envelope-from ) id 1qTt7Z-0005uD-1f; Thu, 10 Aug 2023 00:01:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581615.910660; Thu, 10 Aug 2023 00:01:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7Y-0005u5-VG; Thu, 10 Aug 2023 00:01:44 +0000 Received: by outflank-mailman (input) for mailman id 581615; Thu, 10 Aug 2023 00:01:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7X-0005tq-Jl for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7X-0000iG-J1 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt7X-0006oX-IN for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hfgRjWYh2meMrNtyT55Lfcxn/AlOPgRHuY0jYS9C/sM=; b=mt6aDXWodH1XVup4or4mq4ekse FibhLekVAUfdSyzBKc69lUX49C4d0GO4+FdP8e7BdHq9izU/STmPyRnmHFJRQXDx1r+2b35faBjR3 D9gtRR48Dg9b/C4wPxAJFhvan00kRroF0kbg9Atr0/jTgQ6VDrDIjzdxlU+U0XIUgEt0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default Message-Id: Date: Thu, 10 Aug 2023 00:01:43 +0000 commit 49fbb552c4f5c6663dc83ea923cabe8056ae4710 Author: Andrew Cooper AuthorDate: Wed May 17 10:13:36 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default With xl/libxl now able to control the policy bits for MSR_ARCH_CAPS, it is safe to advertise to guests by default. In turn, we don't need the special case to expose details to dom0. This advertises MSR_ARCH_CAPS to guests on *all* Intel hardware, even if the register content ends up being empty. - Advertising ARCH_CAPS and not RSBA signals "retpoline is safe here and everywhere you might migrate to". This is important because it avoids the guest kernel needing to rely on model checks. - Alternatively, levelling for safety across the Broadwell/Skylake divide requires advertising ARCH_CAPS and RSBA, meaning "retpoline not safe on some hardware you might migrate to". On Cascade Lake and later hardware, guests can now see RDCL_NO (not vulnerable to Meltdown) amongst others. This causes substantial performance improvements, as guests are no longer applying software mitigations in cases where they don't need to. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 4b2cdbfe766e5666e6754198946df2dc16f6a642) --- xen/arch/x86/cpu-policy.c | 11 ----------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 9d70e41306..99914b0bff 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -853,17 +853,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) if ( cpu_has_itsc ) p->extd.itsc = true; - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - p->feat.arch_caps = true; - p->arch_caps.raw = host_cpu_policy.arch_caps.raw; - } - /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 357a86521e..be85e7b38a 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -280,7 +280,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!A IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:01:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:01:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581616.910664 (Exim 4.92) (envelope-from ) id 1qTt7j-0005wo-30; Thu, 10 Aug 2023 00:01:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581616.910664; Thu, 10 Aug 2023 00:01:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7j-0005wh-0R; Thu, 10 Aug 2023 00:01:55 +0000 Received: by outflank-mailman (input) for mailman id 581616; Thu, 10 Aug 2023 00:01:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7h-0005wV-Ms for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7h-0000iQ-M7 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt7h-0006p8-LF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:01:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DBIUg8lEi8uC5m8RMFCS5WpSB6nAQI6t8AkHCpDRphE=; b=SUFGVojesJ4qRXOCMYLXVrEGf4 5SSVOPDUbIXUXXY7w7o7PRDd5Ytd9E6BC2BvcDBRPuhvZLQ0RijmQWdjZU4+4Ale6ZFwTUx8CahpF Pghz/YEd6ePuRmt74bze6byEfN6q8ZahTjuzWfXmdbJzMwKj7PFz5wTpErMPFLMA/5nQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Rework ibpb_calculations() Message-Id: Date: Thu, 10 Aug 2023 00:01:53 +0000 commit 0ac679428a034b54da52da5bc4c43788e679613a Author: Andrew Cooper AuthorDate: Thu Jul 27 20:03:28 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Rework ibpb_calculations() ... in order to make the SRSO mitigations easier to integrate. * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB. In particular, Xen supports synthesising the IBPB bit to guests on Intel to allow IBPB while dissuading the use of (legacy) IBRS. * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for both opt_ibpb_entry_{pv,hvm}. No functional change. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 292f68fb77196a35ac92b296792770d0f3190d75) --- xen/arch/x86/spec_ctrl.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 9a8d6987ca..55d727e8db 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -869,6 +869,8 @@ static bool __init should_use_eager_fpu(void) static void __init ibpb_calculations(void) { + bool def_ibpb_entry = false; + /* Check we have hardware IBPB support before using it... */ if ( !boot_cpu_has(X86_FEATURE_IBRSB) && !boot_cpu_has(X86_FEATURE_IBPB) ) { @@ -877,28 +879,28 @@ static void __init ibpb_calculations(void) return; } - /* - * AMD/Hygon CPUs to date (June 2022) don't flush the the RAS. Future - * CPUs are expected to enumerate IBPB_RET when this has been fixed. - * Until then, cover the difference with the software sequence. - */ - if ( boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_IBPB_RET) ) - setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + /* + * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future + * CPUs are expected to enumerate IBPB_RET when this has been fixed. + * Until then, cover the difference with the software sequence. + */ + if ( !boot_cpu_has(X86_FEATURE_IBPB_RET) ) + setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + + /* + * AMD/Hygon CPUs up to and including Zen2 suffer from Branch Type + * Confusion. Mitigate with IBPB-on-entry. + */ + if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) + def_ibpb_entry = true; + } - /* - * IBPB-on-entry mitigations for Branch Type Confusion. - * - * IBPB && !BTC_NO selects all AMD/Hygon hardware, not known to be safe, - * that we can provide some form of mitigation on. - */ if ( opt_ibpb_entry_pv == -1 ) - opt_ibpb_entry_pv = (IS_ENABLED(CONFIG_PV) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_pv = IS_ENABLED(CONFIG_PV) && def_ibpb_entry; if ( opt_ibpb_entry_hvm == -1 ) - opt_ibpb_entry_hvm = (IS_ENABLED(CONFIG_HVM) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_hvm = IS_ENABLED(CONFIG_HVM) && def_ibpb_entry; if ( opt_ibpb_entry_pv ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581617.910668 (Exim 4.92) (envelope-from ) id 1qTt7t-0005zQ-4p; Thu, 10 Aug 2023 00:02:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581617.910668; Thu, 10 Aug 2023 00:02:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7t-0005zI-2B; Thu, 10 Aug 2023 00:02:05 +0000 Received: by outflank-mailman (input) for mailman id 581617; Thu, 10 Aug 2023 00:02:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7r-0005z8-Q5 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt7r-0000il-PL for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt7r-0006pg-OY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zV+mDG5NYdjuf9yffS6vVefEtVlgFu6Sl3C+xhXU710=; b=iIs2rq2G+7LA0HJoqtTejWW1Nv Ei+Z86JdCOvtvy6HT+f9AGbsva0HFSc7HJVu16/Enwu/FKmEsfgQIEP5ptio8GsjiuudJHVOV1jyF smgOKPr/TMMemXkKmQ5AZ75FE3PjZjx0miJI2keQ1W/taYNV5GPtUP4WKpKmQN6LkRBk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:02:03 +0000 commit 6a2df62a986739561df37912ac2b6474b5162da3 Author: Andrew Cooper AuthorDate: Wed Jun 14 09:13:28 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 2280b0ee2aed6e0fd4af3fa31bf99bc04d038bfe) --- tools/misc/xen-cpuid.c | 3 +++ xen/arch/x86/msr.c | 5 ++++- xen/arch/x86/spec_ctrl.c | 15 ++++++++++----- xen/include/asm-x86/msr-index.h | 1 + xen/include/public/arch-x86/cpufeatureset.h | 3 +++ xen/tools/gen-cpuid.py | 1 + 6 files changed, 22 insertions(+), 6 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index ceb8a29c75..37010b7623 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -187,6 +187,9 @@ static const char *const str_7a1[32] = static const char *const str_e21a[32] = { [ 2] = "lfence+", + + /* 26 */ [27] = "sbpb", + [28] = "ibpb-brtype", [29] = "srso-no", }; static const char *const str_7b1[32] = diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ded8897a14..c11274cbb6 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -352,7 +352,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( !cp->feat.ibrsb && !cp->extd.ibpb ) goto gp_fault; /* MSR available? */ - if ( val & ~PRED_CMD_IBPB ) + rsvd = ~(PRED_CMD_IBPB | + (cp->extd.sbpb ? PRED_CMD_SBPB : 0)); + + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ if ( v == curr ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 55d727e8db..3659e6800e 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -401,7 +401,7 @@ custom_param("pv-l1tf", parse_pv_l1tf); static void __init print_details(enum ind_thunk thunk) { - unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, e21a = 0, max = 0, tmp; uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ @@ -411,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000021 ) + cpuid(0x80000021, &e21a, &tmp, &tmp, &tmp); if ( cpu_has_arch_caps ) rdmsrl(MSR_ARCH_CAPABILITIES, caps); @@ -420,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -440,10 +442,12 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "", (e8b & cpufeat_mask(X86_FEATURE_BTC_NO)) ? " BTC_NO" : "", - (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); + (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : "", + (e21a & cpufeat_mask(X86_FEATURE_IBPB_BRTYPE)) ? " IBPB_BRTYPE" : "", + (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -459,7 +463,8 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); + (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) ) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 7befa60abd..8e89ad4e28 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -37,6 +37,7 @@ #define MSR_PRED_CMD 0x00000049 #define PRED_CMD_IBPB (_AC(1, ULL) << 0) +#define PRED_CMD_SBPB (_AC(1, ULL) << 7) #define MSR_PPIN_CTL 0x0000004e #define PPIN_LOCKOUT (_AC(1, ULL) << 0) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index be85e7b38a..db7478a3e0 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -289,6 +289,9 @@ XEN_CPUFEATURE(AVX512_BF16, 10*32+ 5) /*A AVX512 BFloat16 Instructions */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ +XEN_CPUFEATURE(SBPB, 11*32+27) /*A Selective Branch Predictor Barrier */ +XEN_CPUFEATURE(IBPB_BRTYPE, 11*32+28) /*A IBPB flushes Branch Type predictions too */ +XEN_CPUFEATURE(SRSO_NO, 11*32+29) /*A Hardware not vulenrable to Speculative Return Stack Overflow */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 1be3ddbb85..3980e1b67e 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -318,6 +318,7 @@ def crunch_numbers(state): IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], + IBPB: [IBPB_RET, SBPB, IBPB_BRTYPE], AMD_STIBP: [STIBP_ALWAYS], # In principle the TSXLDTRK insns could also be considered independent. -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581618.910673 (Exim 4.92) (envelope-from ) id 1qTt83-00062h-7e; Thu, 10 Aug 2023 00:02:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581618.910673; Thu, 10 Aug 2023 00:02:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt83-00062Z-4v; Thu, 10 Aug 2023 00:02:15 +0000 Received: by outflank-mailman (input) for mailman id 581618; Thu, 10 Aug 2023 00:02:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt81-00062M-TJ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt81-0000iu-Sd for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt81-0006q7-Rl for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GF0FXo1bD5fqrvfkuIpRUTNqPUE3OLcKG3IIumZNOm0=; b=dtRaWS/XQBCYZYobnePM9Kk8FQ NcutBgnp6F6P1fAoIn2qimVer+5VwsmMYVk7iZPdFKNTc4OeOm747PUtVhFMhQjO2tPK+FLhf7Por gDJceEUGGJVH1jzxBj7hQOH8yzBqudwvvIyCaSF3e+3D75e6zyVsEig8bPyhx/vDFPm0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Mitigate Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:02:13 +0000 commit e8db771a17c96f3a393ad7929c1c35e17e39972a Author: Andrew Cooper AuthorDate: Thu Jun 15 13:46:29 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Mitigate Speculative Return Stack Overflow On native, synthesise the SRSO bits by probing various hardware properties as given by AMD. Extend the IBPB-on-entry mitigations to Zen3/4 CPUs. There is a microcode prerequisite to make this an effective mitigation. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 220c06e6fefe2378f40e2a7391f5e265a2aa50f7) --- docs/misc/xen-command-line.pandoc | 7 ++-- xen/arch/x86/spec_ctrl.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 3 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 2fd6a9a552..88f880177f 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2170,9 +2170,10 @@ guests to use. preference to here.* * `ibpb-entry=` offers control over whether IBPB (Indirect Branch Prediction Barrier) is used on entry to Xen. This is used by default on hardware - vulnerable to Branch Type Confusion, but for performance reasons, dom0 is - unprotected by default. If it necessary to protect dom0 too, boot with - `spec-ctrl=ibpb-entry`. + vulnerable to Branch Type Confusion, and hardware vulnerable to Speculative + Return Stack Overflow if appropriate microcode has been loaded, but for + performance reasons dom0 is unprotected by default. If it is necessary to + protect dom0 too, boot with `spec-ctrl=ibpb-entry`. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 3659e6800e..2dad423255 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -872,6 +872,63 @@ static bool __init should_use_eager_fpu(void) } } +static void __init srso_calculations(bool hw_smt_enabled) +{ + if ( !(boot_cpu_data.x86_vendor & + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + return; + + /* + * If virtualised, none of these heuristics are safe. Trust the + * hypervisor completely. + */ + if ( cpu_has_hypervisor ) + return; + + if ( boot_cpu_data.x86 == 0x19 ) + { + /* + * We could have a table of models/microcode revisions. ...or we + * could just look for the new feature added. + */ + if ( wrmsr_safe(MSR_PRED_CMD, PRED_CMD_SBPB) == 0 ) + { + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + setup_force_cpu_cap(X86_FEATURE_SBPB); + } + else + printk(XENLOG_WARNING + "Vulnerable to SRSO, without suitable microcode to mitigate\n"); + } + else if ( boot_cpu_data.x86 < 0x19 ) + { + /* + * Zen1/2 (which have the IBPB microcode) have IBPB_BRTYPE behaviour + * already. + * + * Older CPUs are unknown, but their IBPB likely does flush branch + * types too. As we're synthesising for the benefit of guests, go + * with the likely option - this avoids VMs running on e.g. a Zen3 + * thinking there's no SRSO mitigation available because it may + * migrate to e.g. a Bulldozer. + */ + if ( boot_cpu_has(X86_FEATURE_IBPB) ) + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + } + + /* + * In single-thread mode on Zen1/2, microarchitectural limits prevent SRSO + * attacks from being effective. Synthesise SRSO_NO if SMT is disabled in + * hardware. + * + * Booting with smt=0, or using xen-hptool should be effective too, but + * they can be altered at runtime so it's not safe to presume SRSO_NO. + */ + if ( !hw_smt_enabled && + (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) ) + setup_force_cpu_cap(X86_FEATURE_SRSO_NO); +} + static void __init ibpb_calculations(void) { bool def_ibpb_entry = false; @@ -900,6 +957,15 @@ static void __init ibpb_calculations(void) */ if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) def_ibpb_entry = true; + + /* + * Further to BTC, Zen3/4 CPUs suffer from Speculative Return Stack + * Overflow in most configurations. Mitigate with IBPB-on-entry if we + * have the microcode that makes this an effective option. + */ + if ( !boot_cpu_has(X86_FEATURE_SRSO_NO) && + boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ) + def_ibpb_entry = true; } if ( opt_ibpb_entry_pv == -1 ) @@ -1402,6 +1468,8 @@ void __init init_speculation_mitigations(void) if ( opt_rsb_hvm ) setup_force_cpu_cap(X86_FEATURE_SC_RSB_HVM); + srso_calculations(hw_smt_enabled); + ibpb_calculations(); /* Check whether Eager FPU should be enabled by default. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581619.910676 (Exim 4.92) (envelope-from ) id 1qTt8D-00065X-8u; Thu, 10 Aug 2023 00:02:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581619.910676; Thu, 10 Aug 2023 00:02:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8D-00065Q-6O; Thu, 10 Aug 2023 00:02:25 +0000 Received: by outflank-mailman (input) for mailman id 581619; Thu, 10 Aug 2023 00:02:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8B-00065E-WB for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8B-0000j1-VY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt8B-0006qY-Ut for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BCKe3oljwc0fsjPxbgBFLuw58HnInh7i5ryejujv3Ek=; b=2daAI+pkALdZ0Fq6N6cLuDojJu aet6DeSMi/kNeDRqwUCqiBnIZemr/FQtv0liQbvtG2ZiAuBYvbvJhbgBQJKvAZLZw3F71kGTwH7PG LNBOF8BCmsD7u0ro6L+N45qHGGAzrvykKJh2xnqcYLfllEGEYdH1pk0c4Ul2BaOHFh+0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX Message-Id: Date: Thu, 10 Aug 2023 00:02:23 +0000 commit 5792b92fd9b6a65214e9980d0280eaef95e59b4a Author: Andrew Cooper AuthorDate: Mon Feb 27 15:36:49 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX The August 2023 microcode for GDS has an impact on the CLWB instruction. See code comments for full details. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 2dd06b4ea10891750af38e4a0e1efaeb0a9b3518) --- xen/arch/x86/cpu-policy.c | 25 +++++++++++++++++++++++++ xen/arch/x86/cpu/intel.c | 12 ++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 2 +- 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 99914b0bff..fe85f1f960 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -433,6 +433,18 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) __set_bit(X86_FEATURE_ARCH_CAPS, fs); __set_bit(X86_FEATURE_RSBA, fs); __set_bit(X86_FEATURE_RRSBA, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but VMs which + * have previously seen the CLWB feature can safely run on this CPU. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __set_bit(X86_FEATURE_CLWB, fs); } } @@ -455,6 +467,19 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs) boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but re-added + * it to the max policy to let VMs migrate in. Re-hide it in the + * default policy to disuade VMs from using it in the common case. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __clear_bit(X86_FEATURE_CLWB, fs); } /* diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 21419e08c3..2bda64c93a 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -518,6 +518,18 @@ static void init_intel(struct cpuinfo_x86 *c) if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) intel_log_freq(c); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * On this model, CLWB has equivalent behaviour to CLFLUSHOPT but the + * latter is not impacted. Hide CLWB to cause Xen to fall back to + * using CLFLUSHOPT instead. + */ + if (c == &boot_cpu_data && + c->x86 == 6 && c->x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */) + setup_clear_cpu_cap(X86_FEATURE_CLWB); } const struct cpu_dev intel_cpu_dev = { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index db7478a3e0..3274ac3e9a 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -216,7 +216,7 @@ XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ -XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(CLWB, 5*32+24) /*!A CLWB instruction */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ XEN_CPUFEATURE(AVX512CD, 5*32+28) /*A AVX-512 Conflict Detection Instrs */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581620.910681 (Exim 4.92) (envelope-from ) id 1qTt8N-00068I-AM; Thu, 10 Aug 2023 00:02:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581620.910681; Thu, 10 Aug 2023 00:02:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8N-00068B-7t; Thu, 10 Aug 2023 00:02:35 +0000 Received: by outflank-mailman (input) for mailman id 581620; Thu, 10 Aug 2023 00:02:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8M-000682-35 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8M-0000j9-2M for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt8M-0006qx-1c for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=iselHkKHzdOXErVtFzlNV4ozFAraTB7BmZ/7BdAbrpM=; b=LSm3O6Xy2Hm1xbjh55dfcA37Cd YAT+WMO/Kq8qyoYzhBbtHO6Ge1Ys8pZLoD3artHD+d8Okv3qvr0+jIklQrjZKfPHa8EMyiDjdsrbb fzYU4HmVAM6Rn9J3DuQ/N8cW1J9uN+pTrB+J1ef56JC37FOY71abpmOAuEt3sYhImDIg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Enumerations for Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:02:34 +0000 commit e138318362ac40572929327e2a3512a20ebb4488 Author: Andrew Cooper AuthorDate: Wed Jan 4 17:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Enumerations for Gather Data Sampling GDS_CTRL is introduced by the August 2023 microcode. GDS_NO is for current and future processors not susceptible to GDS. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 9f585f59d90c8d3a1b21369a852b7d7eee8a29b9) --- tools/misc/xen-cpuid.c | 3 ++- xen/arch/x86/spec_ctrl.c | 6 ++++-- xen/include/asm-x86/cpufeature.h | 2 ++ xen/include/asm-x86/msr-index.h | 4 ++++ xen/include/public/arch-x86/cpufeatureset.h | 2 ++ 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 37010b7623..ff46046bff 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -223,7 +223,8 @@ static const char *const str_m10Al[32] = [18] = "fb-clear-ctrl", [19] = "rrsba", [20] = "bhi-no", [21] = "xapic-status", /* 22 */ [23] = "ovrclk-status", - [24] = "pbrsb-no", + [24] = "pbrsb-no", [25] = "gds-ctrl", + [26] = "gds-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 2dad423255..c9d4daad9d 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -422,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -437,6 +437,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", + (caps & ARCH_CAPS_GDS_NO) ? " GDS_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", @@ -447,7 +448,7 @@ static void __init print_details(enum ind_thunk thunk) (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -464,6 +465,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (caps & ARCH_CAPS_GDS_CTRL) ? " GDS_CTRL" : "", (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 90684fac95..86480b1081 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -153,6 +153,8 @@ #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) #define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) +#define cpu_has_gds_ctrl boot_cpu_has(X86_FEATURE_GDS_CTRL) +#define cpu_has_gds_no boot_cpu_has(X86_FEATURE_GDS_NO) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 8e89ad4e28..b50d4b4eb3 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -65,6 +65,8 @@ #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) +#define ARCH_CAPS_GDS_CTRL (_AC(1, ULL) << 25) +#define ARCH_CAPS_GDS_NO (_AC(1, ULL) << 26) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) @@ -83,6 +85,8 @@ #define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1) #define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2) #define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3) +#define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) +#define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) #define MSR_RTIT_OUTPUT_BASE 0x00000560 #define MSR_RTIT_OUTPUT_MASK 0x00000561 diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 3274ac3e9a..60173be97d 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -326,6 +326,8 @@ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection * XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ +XEN_CPUFEATURE(GDS_CTRL, 16*32+25) /* MCU_OPT_CTRL.GDS_MIT_{DIS,LOCK} */ +XEN_CPUFEATURE(GDS_NO, 16*32+26) /*A No Gather Data Sampling */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581621.910685 (Exim 4.92) (envelope-from ) id 1qTt8X-0006Au-C3; Thu, 10 Aug 2023 00:02:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581621.910685; Thu, 10 Aug 2023 00:02:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8X-0006An-9R; Thu, 10 Aug 2023 00:02:45 +0000 Received: by outflank-mailman (input) for mailman id 581621; Thu, 10 Aug 2023 00:02:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8W-0006Ad-62 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8W-0000jb-5L for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt8W-0006rP-4h for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=JTt4i3127GIDHPC2ep0lGnMrjv1qg5v25zY+O1Lx0KI=; b=eB1ujPTWoVFh35R6j7B/7QHVri CZHbLOe8o/tz2RMDEItVmFfaNG1vGvkQY4BzzY6+iyzMJC/kAC4WzUG2pQaxGhCv5sd8lPv7spYXh Xv3O3GfKFlwfk5DY6dJ7bZ3hViOaSiiRqf1RhHJnflygdUTvP78nD3njyTMIofcfQSBA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] x86/spec-ctrl: Mitigate Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:02:44 +0000 commit 050abf9e978c153e599d0aaeef4c2da71b6e0993 Author: Andrew Cooper AuthorDate: Wed Jan 4 16:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:14:19 2023 +0100 x86/spec-ctrl: Mitigate Gather Data Sampling This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56d690efd3ca3c68e1d222f259fb3d216206e8e5) --- docs/misc/xen-command-line.pandoc | 10 ++- xen/arch/x86/spec_ctrl.c | 158 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 88f880177f..452d07eba1 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2124,7 +2124,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`). > {msr-sc,rsb,md-clear,ibpb-entry}=|{pv,hvm}=, > bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd, > eager-fpu,l1d-flush,branch-harden,srb-lock, -> unpriv-mmio}= ]` +> unpriv-mmio,gds-mit}= ]` Controls for speculative execution sidechannel mitigations. By default, Xen will pick the most appropriate mitigations based on compiled in support, @@ -2236,6 +2236,14 @@ and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode release to mitigate cross-domain leakage of data via the MMIO Stale Data vulnerabilities. +On all hardware, the `gds-mit=` option can be used to force or prevent Xen +from mitigating the GDS (Gather Data Sampling) vulnerability. By default, Xen +will mitigate GDS on hardware believed to be vulnerable. On hardware +supporting GDS_CTRL (requires the August 2023 microcode), and where firmware +has elected not to lock the configuration, Xen will use GDS_CTRL to mitigate +GDS with. Otherwise, Xen will mitigate by disabling AVX, which blocks the use +of the AVX2 Gather instructions. + ### sync_console > `= ` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index c9d4daad9d..27bb121b09 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -77,6 +77,7 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. static int8_t __initdata opt_srb_lock = -1; static bool __initdata opt_unpriv_mmio; static bool __read_mostly opt_fb_clear_mmio; +static int8_t __initdata opt_gds_mit = -1; static int __init parse_spec_ctrl(const char *s) { @@ -130,6 +131,7 @@ static int __init parse_spec_ctrl(const char *s) opt_branch_harden = false; opt_srb_lock = 0; opt_unpriv_mmio = false; + opt_gds_mit = 0; } else if ( val > 0 ) rc = -EINVAL; @@ -280,6 +282,8 @@ static int __init parse_spec_ctrl(const char *s) opt_srb_lock = val; else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 ) opt_unpriv_mmio = val; + else if ( (val = parse_boolean("gds-mit", s, ss)) >= 0 ) + opt_gds_mit = val; else rc = -EINVAL; @@ -1247,6 +1251,158 @@ static __init void mds_calculations(void) } } +static bool __init cpu_has_gds(void) +{ + /* + * Any part advertising GDS_NO should be not vulnerable to GDS. This + * includes cases where the hypervisor is mitigating behind our backs, or + * has synthesized GDS_NO on older parts for levelling purposes. + */ + if ( cpu_has_gds_no ) + return false; + + /* + * On real hardware the GDS_CTRL control only exists on parts vulnerable + * to GDS and with up-to-date microcode. It might also be virtualised by + * an aware hypervisor, meaning "somewhere you might migrate to is + * vulnerable". + */ + if ( cpu_has_gds_ctrl ) + return true; + + /* + * An attacker requires the use of the AVX2 GATHER instructions to leak + * data with GDS. However, the only way to block those instructions is to + * prevent XCR0[2] from being set, which is original AVX. A hypervisor + * might do this as a stopgap mitigation. + */ + if ( !cpu_has_avx ) + return false; + + /* + * GDS affects the Core line from Skylake up to but not including Golden + * Cove (Alder Lake, Sapphire Rapids). Broadwell and older, and the Atom + * line, and all hybrid parts are unaffected. + */ + switch ( boot_cpu_data.x86_model ) + { + case 0x55: /* Skylake/Cascade Lake/Cooper Lake SP */ + case 0x6a: /* Ice Lake SP */ + case 0x6c: /* Ice Lake D */ + case 0x7e: /* Ice Lake U/Y */ + case 0x8c: /* Tiger Lake U */ + case 0x8d: /* Tiger Lake H */ + case 0x8e: /* Amber/Kaby/Coffee/Whiskey/Comet lake U/Y */ + case 0x9e: /* Kaby/Coffee lake H/S/Xeon */ + case 0xa5: /* Comet Lake H/S */ + case 0xa6: /* Comet Lake U */ + case 0xa7: /* Rocket Lake */ + return true; + + default: + /* + * If we've got here and are virtualised, we're most likely under a + * hypervisor unaware of GDS at which point we've lost. Err on the + * safe side. + */ + return cpu_has_hypervisor; + } +} + +static void __init gds_calculations(void) +{ + bool cpu_has_bug_gds, mitigated = false; + + /* GDS is only known to affect Intel Family 6 processors at this time. */ + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + cpu_has_bug_gds = cpu_has_gds(); + + /* + * If we've got GDS_CTRL, we're either native with up-to-date microcode on + * a GDS-vulnerable part, or virtualised under a GDS-aware hypervisor. + */ + if ( cpu_has_gds_ctrl ) + { + bool locked; + uint64_t opt_ctrl; + + if ( cpu_has_gds_no ) + { + /* + * We don't expect to ever see GDS_CTL and GDS_NO set together. + * Complain loudly, and forgo playing with other features. + */ + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: GDS_CTRL && GDS_NO\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, this_cpu(cpu_sig).rev); + return add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + rdmsrl(MSR_MCU_OPT_CTRL, opt_ctrl); + + mitigated = !(opt_ctrl & MCU_OPT_CTRL_GDS_MIT_DIS); + locked = opt_ctrl & MCU_OPT_CTRL_GDS_MIT_LOCK; + + /* + * Firmware will lock the GDS mitigation if e.g. SGX is active. + * Alternatively, a hypervisor might virtualise GDS_CTRL as locked. + * Warn if the mitigiation is locked and the user requested the + * opposite configuration. + */ + if ( locked ) + { + if ( opt_gds_mit >= 0 && opt_gds_mit != mitigated ) + printk(XENLOG_WARNING + "GDS_MIT locked by firwmare - ignoring spec-ctrl=gds-mit setting\n"); + opt_gds_mit = mitigated; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * Latch our choice of GDS_MIT for all CPUs to pick up. If LOCK is + * set, we latch the same value as it currently holds. + */ + set_in_mcu_opt_ctrl(MCU_OPT_CTRL_GDS_MIT_DIS, + opt_gds_mit ? 0 : MCU_OPT_CTRL_GDS_MIT_DIS); + mitigated = opt_gds_mit; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * If we think we're not on vulnerable hardware, or we've mitigated GDS, + * synthesize GDS_NO. This is mostly for the benefit of guests, to inform + * them not to panic. + */ + if ( !cpu_has_bug_gds || mitigated ) + return setup_force_cpu_cap(X86_FEATURE_GDS_NO); + + /* + * If all else has failed, mitigate by disabling AVX. This prevents + * guests from enabling %xcr0.ymm, thereby blocking the use of VGATHER + * instructions. + * + * There's at least one affected CPU not expected to recieve a microcode + * update, and this is the only remaining mitigation. + * + * If we're virtualised, this prevents our guests attacking each other, + * but it doesn't stop the outer hypervisor's guests attacking us. Leave + * a note to this effect. + */ + if ( cpu_has_avx && opt_gds_mit ) + { + setup_clear_cpu_cap(X86_FEATURE_AVX); + printk(XENLOG_WARNING "Mitigating GDS by disabling AVX%s\n", + cpu_has_hypervisor ? + " while virtualised - protections are best-effort" : ""); + } +} + void spec_ctrl_init_domain(struct domain *d) { bool pv = is_pv_domain(d); @@ -1661,6 +1817,8 @@ void __init init_speculation_mitigations(void) opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } + gds_calculations(); + print_details(thunk); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:02:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:02:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581622.910688 (Exim 4.92) (envelope-from ) id 1qTt8h-0006E6-FB; Thu, 10 Aug 2023 00:02:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581622.910688; Thu, 10 Aug 2023 00:02:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8h-0006Dy-CY; Thu, 10 Aug 2023 00:02:55 +0000 Received: by outflank-mailman (input) for mailman id 581622; Thu, 10 Aug 2023 00:02:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8g-0006Dn-8p for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTt8g-0000ji-88 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTt8g-0006rs-7S for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:02:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dGOKezqinmTperUwJ0RoP1WV42fAoA6nRVesX6S62qY=; b=FkhWbuJpg7WMIqSmIqvc0tdPeP UUhZ+Xp+RcL5bHYDTpr2SW6kgUM5QePOisdo9x8d/gZMU/xqNldwdJmLNYbOHTn12m8yFfoMViZHX DDpaWl3KuLg6vym1d+m8KHEFOMRYugStg/i0E+wnB6KBq9MBlgD0Obzitvp4YyOZ4g10=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.14] Update Xen to version 4.14.6 Message-Id: Date: Thu, 10 Aug 2023 00:02:54 +0000 commit 297fce96e1329107f48c08f539bc3000652610cd Author: Andrew Cooper AuthorDate: Mon Aug 7 13:11:10 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Aug 7 13:11:14 2023 +0100 Update Xen to version 4.14.6 Signed-off-by: Andrew Cooper --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index 46c8177d74..4dc707e72f 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -2,7 +2,7 @@ # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 14 -export XEN_EXTRAVERSION ?= .5$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .6$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.14 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581641.910703 (Exim 4.92) (envelope-from ) id 1qTtRE-0000W3-9t; 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Thu, 10 Aug 2023 00:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=O1bUCAcyirGPhJ+1k2S9HDde3SsIMM0ceaaubbCEPco=; b=vQqRsC8mNfcRybt1XJl0h3CK/N 0tIgYlp/5aBajSWTneckpR+gCwIAXVwpVyXjz6LY5TKswSrUVtsnGfLW514kgjXkuGZi1F4B5gLte C7qwJmxglH12LJTDfTEmU694k8Xs+8zmKXTMmNfD6hXdtyRJaa4wzwhOe5HDsX4CCyQI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] tools: drop bogus and obsolete ptyfuncs.m4 Message-Id: Date: Thu, 10 Aug 2023 00:22:02 +0000 commit 36191ac79bb80d6fe4c2292c752815cd11b558e2 Author: Olaf Hering AuthorDate: Fri May 12 12:26:14 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 12:33:49 2023 +0100 tools: drop bogus and obsolete ptyfuncs.m4 According to openpty(3) it is required to include to get the prototypes for openpty() and login_tty(). But this is not what the function AX_CHECK_PTYFUNCS actually does. It makes no attempt to include the required header. The two source files which call openpty() and login_tty() already contain the conditionals to include the required header. Remove the bogus m4 file to fix build with clang, which complains about calls to undeclared functions. Remove usage of INCLUDE_LIBUTIL_H in libxl_bootloader.c, it is already covered by inclusion of libxl_osdep.h. Remove usage of PTYFUNCS_LIBS in libxl/Makefile, it is already covered by UTIL_LIBS from config/StdGNU.mk. Signed-off-by: Olaf Hering Reviewed-by: Anthony PERARD (cherry picked from commit 42abf5b9c53eb1b1a902002fcda68708234152c3) --- config/Tools.mk.in | 2 -- m4/ptyfuncs.m4 | 35 ------------------- tools/config.h.in | 3 -- tools/configure | 68 ------------------------------------- tools/configure.ac | 2 -- tools/libs/light/Makefile | 2 +- tools/libs/light/libxl_bootloader.c | 4 --- 7 files changed, 1 insertion(+), 115 deletions(-) diff --git a/config/Tools.mk.in b/config/Tools.mk.in index 934d899967..3853362528 100644 --- a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -30,8 +30,6 @@ PTHREAD_CFLAGS := @PTHREAD_CFLAGS@ PTHREAD_LDFLAGS := @PTHREAD_LDFLAGS@ PTHREAD_LIBS := @PTHREAD_LIBS@ -PTYFUNCS_LIBS := @PTYFUNCS_LIBS@ - LIBNL3_LIBS := @LIBNL3_LIBS@ LIBNL3_CFLAGS := @LIBNL3_CFLAGS@ XEN_TOOLS_RPATH := @rpath@ diff --git a/m4/ptyfuncs.m4 b/m4/ptyfuncs.m4 deleted file mode 100644 index 3e37b5a23c..0000000000 --- a/m4/ptyfuncs.m4 +++ /dev/null @@ -1,35 +0,0 @@ -AC_DEFUN([AX_CHECK_PTYFUNCS], [ - dnl This is a workaround for a bug in Debian package - dnl libbsd-dev-0.3.0-1. Once we no longer support that - dnl package we can remove the addition of -Werror to - dnl CPPFLAGS. - AX_SAVEVAR_SAVE(CPPFLAGS) - CPPFLAGS="$CPPFLAGS -Werror" - AC_CHECK_HEADER([libutil.h],[ - AC_DEFINE([INCLUDE_LIBUTIL_H],[],[libutil header file name]) - ]) - AX_SAVEVAR_RESTORE(CPPFLAGS) - AC_CACHE_CHECK([for openpty et al], [ax_cv_ptyfuncs_libs], [ - for ax_cv_ptyfuncs_libs in -lutil "" NOT_FOUND; do - if test "x$ax_cv_ptyfuncs_libs" = "xNOT_FOUND"; then - AC_MSG_FAILURE([Unable to find library for openpty and login_tty]) - fi - AX_SAVEVAR_SAVE(LIBS) - LIBS="$LIBS $ax_cv_ptyfuncs_libs" - AC_LINK_IFELSE([AC_LANG_SOURCE([ -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif -int main(void) { - openpty(0,0,0,0,0); - login_tty(0); -} -])],[ - break - ],[]) - AX_SAVEVAR_RESTORE(LIBS) - done - ]) - PTYFUNCS_LIBS="$ax_cv_ptyfuncs_libs" - AC_SUBST(PTYFUNCS_LIBS) -]) diff --git a/tools/config.h.in b/tools/config.h.in index 52e01b2c84..89eef9c2ec 100644 --- a/tools/config.h.in +++ b/tools/config.h.in @@ -90,9 +90,6 @@ /* Define extfs header to use */ #undef INCLUDE_EXTFS_H -/* libutil header file name */ -#undef INCLUDE_LIBUTIL_H - /* IPXE path */ #undef IPXE_PATH diff --git a/tools/configure b/tools/configure index 40f970b14b..1b5e33da8f 100755 --- a/tools/configure +++ b/tools/configure @@ -636,7 +636,6 @@ LIBNL3_LIBS LIBNL3_CFLAGS argp_ldflags libiconv -PTYFUNCS_LIBS PTHREAD_LIBS PTHREAD_LDFLAGS PTHREAD_CFLAGS @@ -3749,8 +3748,6 @@ esac - - # Fetched from http://git.savannah.gnu.org/gitweb/?p=autoconf-archive.git;a=blob_plain;f=m4/ax_compare_version.m4 # Commit ID: 27948f49ca30e4222bb7cdd55182bd7341ac50c5 # =========================================================================== @@ -8944,71 +8941,6 @@ $as_echo "$ax_cv_pthread_flags" >&6; } - - - saved_CPPFLAGS="$CPPFLAGS" - - CPPFLAGS="$CPPFLAGS -Werror" - ac_fn_c_check_header_mongrel "$LINENO" "libutil.h" "ac_cv_header_libutil_h" "$ac_includes_default" -if test "x$ac_cv_header_libutil_h" = xyes; then : - - -$as_echo "#define INCLUDE_LIBUTIL_H " >>confdefs.h - - -fi - - - - CPPFLAGS="$saved_CPPFLAGS" - - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for openpty et al" >&5 -$as_echo_n "checking for openpty et al... " >&6; } -if ${ax_cv_ptyfuncs_libs+:} false; then : - $as_echo_n "(cached) " >&6 -else - - for ax_cv_ptyfuncs_libs in -lutil "" NOT_FOUND; do - if test "x$ax_cv_ptyfuncs_libs" = "xNOT_FOUND"; then - { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -as_fn_error $? "Unable to find library for openpty and login_tty -See \`config.log' for more details" "$LINENO" 5; } - fi - - saved_LIBS="$LIBS" - - LIBS="$LIBS $ax_cv_ptyfuncs_libs" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ - -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif -int main(void) { - openpty(0,0,0,0,0); - login_tty(0); -} - -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - - break - -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext - - LIBS="$saved_LIBS" - - done - -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ax_cv_ptyfuncs_libs" >&5 -$as_echo "$ax_cv_ptyfuncs_libs" >&6; } - PTYFUNCS_LIBS="$ax_cv_ptyfuncs_libs" - - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for yajl_alloc in -lyajl" >&5 $as_echo_n "checking for yajl_alloc in -lyajl... " >&6; } if ${ac_cv_lib_yajl_yajl_alloc+:} false; then : diff --git a/tools/configure.ac b/tools/configure.ac index 3ac62626a5..2662e61e65 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -67,7 +67,6 @@ m4_include([../m4/uuid.m4]) m4_include([../m4/pkg.m4]) m4_include([../m4/curses.m4]) m4_include([../m4/pthread.m4]) -m4_include([../m4/ptyfuncs.m4]) m4_include([../m4/extfs.m4]) m4_include([../m4/fetcher.m4]) m4_include([../m4/ax_compare_version.m4]) @@ -405,7 +404,6 @@ AC_SUBST(zlib) AC_SUBST(system_aio) AX_CHECK_EXTFS AX_CHECK_PTHREAD -AX_CHECK_PTYFUNCS AC_CHECK_LIB([yajl], [yajl_alloc], [], [AC_MSG_ERROR([Could not find yajl])]) AC_CHECK_LIB([z], [deflateCopy], [], [AC_MSG_ERROR([Could not find zlib])]) diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile index dd43f37b4c..8cc50dc9ea 100644 --- a/tools/libs/light/Makefile +++ b/tools/libs/light/Makefile @@ -167,7 +167,7 @@ NO_HEADERS_CHK := y include $(XEN_ROOT)/tools/libs/libs.mk -LDUSELIBS-y += $(PTYFUNCS_LIBS) +LDUSELIBS-y += $(UTIL_LIBS) LDUSELIBS-$(CONFIG_LIBNL) += $(LIBNL3_LIBS) LDUSELIBS-$(CONFIG_Linux) += -luuid LDUSELIBS-$(CONFIG_Linux) += -lrt diff --git a/tools/libs/light/libxl_bootloader.c b/tools/libs/light/libxl_bootloader.c index 18e9ebd714..1bc6e51827 100644 --- a/tools/libs/light/libxl_bootloader.c +++ b/tools/libs/light/libxl_bootloader.c @@ -19,10 +19,6 @@ #include #endif -#ifdef INCLUDE_LIBUTIL_H -#include INCLUDE_LIBUTIL_H -#endif - #include "libxl_internal.h" #define BOOTLOADER_BUF_OUT 65536 -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581642.910707 (Exim 4.92) (envelope-from ) id 1qTtRO-0000Y9-Bf; Thu, 10 Aug 2023 00:22:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581642.910707; Thu, 10 Aug 2023 00:22:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRO-0000Y1-8s; Thu, 10 Aug 2023 00:22:14 +0000 Received: by outflank-mailman (input) for mailman id 581642; Thu, 10 Aug 2023 00:22:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRM-0000Xr-W8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRM-0001E1-VJ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtRM-000821-UN for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HWGFLI5JnBKf9SD1wnneJVFxTRAV0R2ojIftkbxqjt0=; b=KM4a2uGoDZMUm9N2M2Q8GRbsBJ /1OqkX7lmNiXowRo8E50gjTYEmP/9DhwPt78O3YShRTz8iFes64nVkFNlQD0mt6f2W645Oym9SF0V 2O23SgNqHqDsRx6xRhYx1pt4T2yz0Ewt89/X960ZUnWcRp8UeUevaBk+WkBzEv7Z7f+0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] subdom: Fix -Werror=address failure in tmp_emulator Message-Id: Date: Thu, 10 Aug 2023 00:22:12 +0000 commit 61678abb39f6c79a4fb003d6e279fd501b627c19 Author: Andrew Cooper AuthorDate: Thu Aug 3 20:52:08 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 12:33:49 2023 +0100 subdom: Fix -Werror=address failure in tmp_emulator The opensuse-tumbleweed build jobs currently fail with: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c: In function 'rsa_private': /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:56:7: error: the comparison will always evaluate as 'true' for the address of 'p' will never be NULL [-Werror=address] 56 | if (!key->p || !key->q || !key->u) { | ^ In file included from /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:17: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.h:28:12: note: 'p' declared here 28 | tpm_bn_t p; | ^ This is because all tpm_bn_t's are 1-element arrays (of either a GMP or OpenSSL BIGNUM flavour). Adjust it to compile. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jason Andryuk (cherry picked from commit 46c5ef609b09cf51d7535aebbc05816eafca4c8d) --- stubdom/Makefile | 1 + stubdom/vtpm-tpm_bn_t-addr.patch | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/stubdom/Makefile b/stubdom/Makefile index ccfcf5b75f..65fc9903bb 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -241,6 +241,7 @@ tpm_emulator-$(XEN_TARGET_ARCH): tpm_emulator-$(TPMEMU_VERSION).tar.gz patch -d $@ -p1 < vtpm_extern.patch patch -d $@ -p1 < vtpm-microsecond-duration.patch patch -d $@ -p1 < vtpm-command-duration.patch + patch -d $@ -p1 < vtpm-tpm_bn_t-addr.patch mkdir $@/build cd $@/build; CC=${CC} $(CMAKE) .. -DCMAKE_C_FLAGS:STRING="-std=c99 -DTPM_NO_EXTERN $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) -Wno-declaration-after-statement" touch $@ diff --git a/stubdom/vtpm-tpm_bn_t-addr.patch b/stubdom/vtpm-tpm_bn_t-addr.patch new file mode 100644 index 0000000000..53172ae1c2 --- /dev/null +++ b/stubdom/vtpm-tpm_bn_t-addr.patch @@ -0,0 +1,18 @@ +All tpm_bn_t's are a 1-element array of one form or another, meaning the code +below is tautological and triggers -Werror=address. + +diff -ru tpm_emulator-x86_64.orig/crypto/rsa.c tpm_emulator-x86_64/crypto/rsa.c +--- tpm_emulator-x86_64.orig/crypto/rsa.c 2011-12-20 18:30:06.000000000 +0000 ++++ tpm_emulator-x86_64/crypto/rsa.c 2023-08-03 20:44:17.379166284 +0100 +@@ -53,10 +53,7 @@ + tpm_bn_init2(c, key->size); + tpm_bn_import(p, in_len, 1, in); + +- if (!key->p || !key->q || !key->u) { +- /* c = p ^ d mod n */ +- tpm_bn_powm(c, p, key->d, key->n); +- } else { ++ { + tpm_bn_init2(m1, key->size / 2); + tpm_bn_init2(m2, key->size / 2); + tpm_bn_init2(h, key->size); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581643.910710 (Exim 4.92) (envelope-from ) id 1qTtRY-0000bB-D8; Thu, 10 Aug 2023 00:22:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581643.910710; Thu, 10 Aug 2023 00:22:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRY-0000b3-AM; Thu, 10 Aug 2023 00:22:24 +0000 Received: by outflank-mailman (input) for mailman id 581643; Thu, 10 Aug 2023 00:22:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRX-0000ap-57 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRX-0001E9-2W for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtRX-00082S-1E for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=biJ8G+6GtezAGBh3wEJrbn1QFrURi9V6EAXMR1aWlko=; b=4jUF72/v/ZV7kxI4QbtQzFQzab qaDCJrU9VU+jg+B6k0hoBrUQ8SzWHmHr5PbKHTcCmXHgUwV8PAWxkzdO0xdpwtXXRiMElM36eMu1I 61atT8bTdB8NyjohU5yu7pBLcN38rEblkkX3ZDHjfEfAUYaTmjI81fH39vxe5iq+ufZ8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libs/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Message-Id: Date: Thu, 10 Aug 2023 00:22:23 +0000 commit 3e23155743566e682404fadf81b58c44b4aa1cbf Author: Andrew Cooper AuthorDate: Tue Aug 8 14:53:42 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 14:53:42 2023 +0100 libs/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Gitlab reports: init.c:348:18: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] ctrl->is_server = 1; ^ ~ 1 error generated. make[6]: *** [/builds/xen-project/people/andyhhp/xen/tools/libs/vchan/../../../tools/Rules.mk:188: init.o] Error 1 In Xen 4.18, this was fixed with c/s 99ab02f63ea8 ("tools: convert bitfields to unsigned type") but this is an ABI change which can't be backported. Swich 1 for -1 to provide a minimally invasive way to fix the build. No functional change. Signed-off-by: Andrew Cooper --- tools/libs/vchan/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libs/vchan/init.c b/tools/libs/vchan/init.c index c8510e6ce9..89ddf9c464 100644 --- a/tools/libs/vchan/init.c +++ b/tools/libs/vchan/init.c @@ -321,7 +321,7 @@ struct libxenvchan *libxenvchan_server_init(struct xentoollog_logger *logger, ctrl->ring = NULL; ctrl->event = NULL; - ctrl->is_server = 1; + ctrl->is_server = -1; ctrl->server_persist = 0; ctrl->read.order = min_order(left_min); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581644.910715 (Exim 4.92) (envelope-from ) id 1qTtRi-0000eL-Ep; Thu, 10 Aug 2023 00:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581644.910715; Thu, 10 Aug 2023 00:22:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRi-0000eD-Bl; Thu, 10 Aug 2023 00:22:34 +0000 Received: by outflank-mailman (input) for mailman id 581644; Thu, 10 Aug 2023 00:22:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRh-0000e3-6c for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRh-0001EW-5r for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtRh-000831-4u for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Vtv0cfgZX1XKUu0DARwUfDswYnTO55GE2A3W187UGyM=; b=ZbYecWKoYvStaCLVnUBUikY2Z5 u04Qd90UyCJVDbN6YjseDZqVefkJiDwxQaRKw6C80W0oep2sKcNeF85QrWPvDQrdr7TORgpXAedAO lmKDWPREiN3B0dp5C93TvlINPNEY98yA7Xqgf2AMfjGc0phPFW1Ei2LovAdPuVsGYCfU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() Message-Id: Date: Thu, 10 Aug 2023 00:22:33 +0000 commit 4d0dc655aa7135c44ab99641d95a3d32bdf3c09d Author: Andrew Cooper AuthorDate: Wed Dec 15 15:36:59 2021 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() To implement dom0-cpuid= support, the special cases would need extending. However there is already a problem with late hwdom where the special cases override toolstack settings, which is unintended and poor behaviour. Introduce a new init_dom0_cpuid_policy() for the purpose, moving the ITSC and ARCH_CAPS logic. The is_hardware_domain() can be dropped, and for now there is no need to rerun recalculate_cpuid_policy(); this is a relatively expensive operation, and will become more-so over time. Rearrange the logic in create_dom0() to make room for a call to init_dom0_cpuid_policy(). The AMX plans for having variable sized XSAVE states require that modifications to the policy happen before vCPUs are created. Additionally, factor out domid into a variable so we can be slightly more correct in the case of a failure, and also print the error from domain_create(). This will at least help distinguish -EINVAL from -ENOMEM. No practical change in behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c17072fc164a72583fda8e2b836c71d2e3f8e84d) --- xen/arch/x86/cpuid.c | 25 +++++++++++++++---------- xen/arch/x86/setup.c | 15 +++++++++++---- xen/include/asm-x86/cpuid.h | 3 +++ 3 files changed, 29 insertions(+), 14 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index a647331f47..0693543ea0 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -742,23 +742,28 @@ int init_domain_cpuid_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* The hardware domain can't migrate. Give it ITSC if available. */ - if ( is_hardware_domain(d) ) - p->extd.itsc = cpu_has_itsc; + d->arch.cpuid = p; + + recalculate_cpuid_policy(d); + + return 0; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpuid_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; /* * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) + if ( cpu_has_arch_caps ) p->feat.arch_caps = true; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; } void guest_cpuid(const struct vcpu *v, uint32_t leaf, diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index f0de805780..d2df3047f3 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -787,6 +787,7 @@ static struct domain *__init create_dom0(const module_t *image, }; struct domain *d; char *cmdline; + domid_t domid; if ( opt_dom0_pvh ) { @@ -801,10 +802,16 @@ static struct domain *__init create_dom0(const module_t *image, if ( iommu_enabled ) dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu; - /* Create initial domain 0. */ - d = domain_create(get_initial_domain_id(), &dom0_cfg, !pv_shim); - if ( IS_ERR(d) || (alloc_dom0_vcpu0(d) == NULL) ) - panic("Error creating domain 0\n"); + /* Create initial domain. Not d0 for pvshim. */ + domid = get_initial_domain_id(); + d = domain_create(domid, &dom0_cfg, !pv_shim); + if ( IS_ERR(d) ) + panic("Error creating d%u: %ld\n", domid, PTR_ERR(d)); + + init_dom0_cpuid_policy(d); + + if ( alloc_dom0_vcpu0(d) == NULL ) + panic("Error creating d%uv0\n", domid); /* Grab the DOM0 command line. */ cmdline = image->string ? __va(image->string) : NULL; diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 46904061d0..9c3637549a 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -59,6 +59,9 @@ bool recheck_cpu_features(unsigned int cpu); /* Allocate and initialise a CPUID policy suitable for the domain. */ int init_domain_cpuid_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + /* Clamp the CPUID policy to reality. */ void recalculate_cpuid_policy(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581645.910719 (Exim 4.92) (envelope-from ) id 1qTtRs-0000hM-G8; Thu, 10 Aug 2023 00:22:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581645.910719; Thu, 10 Aug 2023 00:22:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRs-0000hE-DL; Thu, 10 Aug 2023 00:22:44 +0000 Received: by outflank-mailman (input) for mailman id 581645; Thu, 10 Aug 2023 00:22:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRr-0000gw-9c for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtRr-0001Ey-8s for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtRr-00083r-81 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gtvr+XmzS/d0FlRaUoLiVBehOcw+zdf9XqO4FwN3aBc=; b=GgzreGf5Z8UwPSXHDsRDILXj6J z+y+zIOnOfuSmWqTYP/DQCj/4r/Li2CboMxHSAHoerN24shv3VzNRfU8zAYFcadcrEOd+DAigxRu3 ba+4rnRgBYcwP/J7uP8IaTFfROUoudWv8cKFo9P4sV4dOgMEAqgzlHR2A1r0q22MQQ2c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpuid: Factor common parsing out of parse_xen_cpuid() Message-Id: Date: Thu, 10 Aug 2023 00:22:43 +0000 commit 3733f126bd62bef449651b976db3f8abd5f3bfea Author: Andrew Cooper AuthorDate: Wed Dec 15 16:30:25 2021 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpuid: Factor common parsing out of parse_xen_cpuid() dom0-cpuid= is going to want to reuse the common parsing loop, so factor it out into parse_cpuid(). Irritatingly, despite being static const, the features[] array gets duplicated each time parse_cpuid() is inlined. As it is a large (and ever growing with new CPU features) datastructure, move it to being file scope so all inlines use the same single object. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94c3df9188d6deed6fe213754492b11b9d409262) --- xen/arch/x86/cpuid.c | 45 ++++++++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 0693543ea0..7028f9a60c 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -26,17 +26,26 @@ static const uint32_t __initconst hvm_hap_def_featuremask[] = INIT_HVM_HAP_DEF_FEATURES; static const uint32_t deep_features[] = INIT_DEEP_FEATURES; -static int __init parse_xen_cpuid(const char *s) +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) { const char *ss; int val, rc = 0; do { - static const struct feature { - const char *name; - unsigned int bit; - } features[] __initconstrel = INIT_FEATURE_NAMES; - const struct feature *lhs, *rhs, *mid = NULL /* GCC... */; + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; const char *feat; ss = strchr(s, ','); @@ -49,8 +58,8 @@ static int __init parse_xen_cpuid(const char *s) feat += 3; /* (Re)initalise lhs and rhs for binary search. */ - lhs = features; - rhs = features + ARRAY_SIZE(features); + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); while ( lhs < rhs ) { @@ -72,11 +81,7 @@ static int __init parse_xen_cpuid(const char *s) if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) { - if ( !val ) - setup_clear_cpu_cap(mid->bit); - else if ( mid->bit == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); + callback(mid->bit, val); mid = NULL; } @@ -95,6 +100,20 @@ static int __init parse_xen_cpuid(const char *s) return rc; } + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} custom_param("cpuid", parse_xen_cpuid); #define EMPTY_LEAF ((struct cpuid_leaf){}) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:22:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:22:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581646.910723 (Exim 4.92) (envelope-from ) id 1qTtS3-0000kn-JG; Thu, 10 Aug 2023 00:22:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581646.910723; Thu, 10 Aug 2023 00:22:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtS3-0000kf-GY; Thu, 10 Aug 2023 00:22:55 +0000 Received: by outflank-mailman (input) for mailman id 581646; Thu, 10 Aug 2023 00:22:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtS1-0000kR-Cj for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtS1-0001F5-Bw for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtS1-00084T-BD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:22:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5jIaJlJNWYoNzvmK4DHOcNddKJlmkU6JitGo1Jr2yrs=; b=jS008WZ59nDvTBRcWYuKJRx+l/ 8kT6aO9xCNhn0NAgWkWcv0kbHCdi10pxXWOdn4qChbYKRESSNDR5wq9XM7wilZjQ6rYHzjlKEGrbH 471s9yPkDZDd/aoGmPQ8WgyZDiH+k+WijwOeR61cLSbOQ42yPJ5b4uTNDJ0UOfSI1lT4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpuid: Introduce dom0-cpuid command line option Message-Id: Date: Thu, 10 Aug 2023 00:22:53 +0000 commit 08e5cf49d9ed1ca70a8051000be37056cdb1585b Author: Andrew Cooper AuthorDate: Tue Dec 14 16:53:36 2021 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpuid: Introduce dom0-cpuid command line option Specifically, this lets the user opt in to non-default features. Collect all dom0 settings together in dom0_{en,dis}able_feat[], and apply it to dom0's policy when other tweaks are being made. As recalculate_cpuid_policy() is an expensive action, and dom0-cpuid= is likely to only be used by the x86 maintainers for development purposes, forgo the recalculation in the general case. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 5bd2b82df28cb7390f5ffb00fac635d0b9e36674) --- docs/misc/xen-command-line.pandoc | 16 ++++++++++++++++ xen/arch/x86/cpuid.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 7b7a619c1b..17a0e9f77b 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -819,6 +819,22 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. +### dom0-cpuid + = List of comma separated booleans + + Applicability: x86 + +This option allows for fine tuning of the facilities dom0 will use, after +accounting for hardware capabilities and Xen settings as enumerated via CPUID. + +Options are accepted in positive and negative form, to enable or disable +specific features. All selections via this mechanism are subject to normal +CPU Policy safety and dependency logic. + +This option is intended for developers to opt dom0 into non-default features, +and is not intended for use in production circumstances. If using this option +is necessary to fix an issue, please report a bug. + ### dom0-iommu = List of [ passthrough=, strict=, map-inclusive=, map-reserved=, none ] diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 7028f9a60c..12c1cd30c7 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -116,6 +116,24 @@ static int __init parse_xen_cpuid(const char *s) } custom_param("cpuid", parse_xen_cpuid); +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + #define EMPTY_LEAF ((struct cpuid_leaf){}) static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) @@ -783,6 +801,25 @@ void __init init_dom0_cpuid_policy(struct domain *d) */ if ( cpu_has_arch_caps ) p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + cpuid_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + cpuid_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } } void guest_cpuid(const struct vcpu *v, uint32_t leaf, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581648.910727 (Exim 4.92) (envelope-from ) id 1qTtSD-0000nh-Km; Thu, 10 Aug 2023 00:23:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581648.910727; Thu, 10 Aug 2023 00:23:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSD-0000nZ-I6; Thu, 10 Aug 2023 00:23:05 +0000 Received: by outflank-mailman (input) for mailman id 581648; Thu, 10 Aug 2023 00:23:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSB-0000nG-Fm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSB-0001FS-F1 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtSB-000855-EB for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=p0V88ErfUE2rPzrI6AjBbSPwZhdEgu6r752N7x5GEVA=; b=sZOPffmWZCakXiJMg/6rl2A9pq sbcOMxI2SYCscQX5g8x9pR9NThHkQ+M9ZPTEfb2CoxQrpF/EABTy9FYCpD6MwnHFwiuy6Rb/gBPpq D/MauyhyW/vRhdkK1KYsx/GVhExI563e6TveeiuTnlxYxyuXBocpfsYjhvPvgA1AhUQk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] tools/xen-cpuid: Rework the handling of dynamic featuresets Message-Id: Date: Thu, 10 Aug 2023 00:23:03 +0000 commit 95535c4209dec070faa0baf33247fa0d5fe3d89e Author: Andrew Cooper AuthorDate: Fri Mar 10 19:04:22 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 tools/xen-cpuid: Rework the handling of dynamic featuresets struct fsinfo is the vestigial remnant of an older internal design which didn't survive very long. Simplify things by inlining get_featureset() and having a single memory allocation that gets reused. This in turn changes featuresets[] to be a simple list of names, so rename it to fs_names[]. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit ec3474e1dd42e6f410601f50b6e74fb7c442cfb9) --- tools/misc/xen-cpuid.c | 53 +++++++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index db9c4ed8fc..648751fb5e 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -238,16 +238,11 @@ static const struct { #define COL_ALIGN "18" -static struct fsinfo { - const char *name; - uint32_t len; - uint32_t *fs; -} featuresets[] = -{ - [XEN_SYSCTL_cpu_featureset_host] = { "Host", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_raw] = { "Raw", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_pv] = { "PV", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_hvm] = { "HVM", 0, NULL }, +static const char *const fs_names[] = { + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_pv] = "PV", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", }; static void dump_leaf(uint32_t leaf, const char *const *strs) @@ -294,22 +289,10 @@ static void decode_featureset(const uint32_t *features, } } -static int get_featureset(xc_interface *xch, unsigned int idx) -{ - struct fsinfo *f = &featuresets[idx]; - - f->len = nr_features; - f->fs = calloc(nr_features, sizeof(*f->fs)); - - if ( !f->fs ) - err(1, "calloc(, featureset)"); - - return xc_get_cpu_featureset(xch, idx, &f->len, f->fs); -} - static void dump_info(xc_interface *xch, bool detail) { unsigned int i; + uint32_t *fs; printf("nr_features: %u\n", nr_features); @@ -340,26 +323,34 @@ static void dump_info(xc_interface *xch, bool detail) nr_features, "HVM Hap Default", detail); printf("\nDynamic sets:\n"); - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) + + fs = malloc(sizeof(*fs) * nr_features); + if ( !fs ) + err(1, "malloc(featureset)"); + + for ( i = 0; i < ARRAY_SIZE(fs_names); ++i ) { - if ( get_featureset(xch, i) ) + uint32_t len = nr_features; + int ret; + + memset(fs, 0, sizeof(*fs) * nr_features); + + ret = xc_get_cpu_featureset(xch, i, &len, fs); + if ( ret ) { if ( errno == EOPNOTSUPP ) { - printf("%s featureset not supported by Xen\n", - featuresets[i].name); + printf("%s featureset not supported by Xen\n", fs_names[i]); continue; } err(1, "xc_get_featureset()"); } - decode_featureset(featuresets[i].fs, featuresets[i].len, - featuresets[i].name, detail); + decode_featureset(fs, len, fs_names[i], detail); } - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) - free(featuresets[i].fs); + free(fs); } static void print_policy(const char *name, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581649.910731 (Exim 4.92) (envelope-from ) id 1qTtSM-0000qU-MF; Thu, 10 Aug 2023 00:23:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581649.910731; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yRFVOwKiE3leBMxs51PFcEr4DVVPxV2gaHSTTEuh7is=; b=Tb8RDfl9GP6/zkCVanyvXFwHkp DusUrxLGgk1rtyOA2XNo6BkV9cb6k05n3o79SB2dIHk7uQLNcQfMmRhEjBdPQWJYhMJ76nJxs6Qir GmeWJGCffA3JLZ1Fg2bEbci5STcrjR6pqstX4JQ1wWJXiUFCSsdsoNKeCFme1k/57OhE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Message-Id: Date: Thu, 10 Aug 2023 00:23:13 +0000 commit 620f413ecfee7a4c5ad9c94d367c57c80815606f Author: Andrew Cooper AuthorDate: Fri Mar 10 19:37:56 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Featuresets are supposed to be disappearing when the CPU policy infrastructure is complete, but that has taken longer than expected, and isn't going to be complete imminently either. In the meantime, Xen does have proper default/max featuresets, and xen-cpuid can even get them via the XEN_SYSCTL_cpu_policy_* interface, but only knows now to render them nicely via the featureset interface. Differences between default and max are a frequent source of errors, frequently too in secret leading up to an embargo, so extend the featureset sysctl to allow xen-cpuid to render them all nicely. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Christian Lindig (cherry picked from commit 433d012c6c2737ad5a9aaa994355a4140d601852) --- tools/misc/xen-cpuid.c | 10 ++++++---- tools/ocaml/libs/xc/xenctrl.ml | 8 +++++++- tools/ocaml/libs/xc/xenctrl.mli | 8 +++++++- xen/arch/x86/sysctl.c | 4 +++- xen/include/public/sysctl.h | 2 ++ 5 files changed, 25 insertions(+), 7 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 648751fb5e..ec6eff9b77 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -239,10 +239,12 @@ static const struct { #define COL_ALIGN "18" static const char *const fs_names[] = { - [XEN_SYSCTL_cpu_featureset_host] = "Host", - [XEN_SYSCTL_cpu_featureset_raw] = "Raw", - [XEN_SYSCTL_cpu_featureset_pv] = "PV", - [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_pv] = "PV Default", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM Default", + [XEN_SYSCTL_cpu_featureset_pv_max] = "PV Max", + [XEN_SYSCTL_cpu_featureset_hvm_max] = "HVM Max", }; static void dump_leaf(uint32_t leaf, const char *const *strs) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index b40c70d33f..f4f408a77b 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -299,7 +299,13 @@ external version_changeset: handle -> string = "stub_xc_version_changeset" external version_capabilities: handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external watchdog : handle -> int -> int32 -> int diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index d1d9c9247a..5388fccd1f 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -225,7 +225,13 @@ external version_changeset : handle -> string = "stub_xc_version_changeset" external version_capabilities : handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external pages_to_kib : int64 -> int64 = "stub_pages_to_kib" diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index ff843eaee2..d6ac3069ed 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -327,14 +327,16 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[4] = { + static const struct cpuid_policy *const policy_table[6] = { [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, #ifdef CONFIG_PV [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, #endif #ifdef CONFIG_HVM [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, #endif }; const struct cpuid_policy *p = NULL; diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index b0a4af8789..d09481f9c8 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -811,6 +811,8 @@ struct xen_sysctl_cpu_featureset { #define XEN_SYSCTL_cpu_featureset_host 1 #define XEN_SYSCTL_cpu_featureset_pv 2 #define XEN_SYSCTL_cpu_featureset_hvm 3 +#define XEN_SYSCTL_cpu_featureset_pv_max 4 +#define XEN_SYSCTL_cpu_featureset_hvm_max 5 uint32_t index; /* IN: Which featureset to query? */ uint32_t nr_features; /* IN/OUT: Number of entries in/written to * 'features', or the maximum number of features if -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581650.910735 (Exim 4.92) (envelope-from ) id 1qTtSW-0000tY-Nh; Thu, 10 Aug 2023 00:23:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581650.910735; Thu, 10 Aug 2023 00:23:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSW-0000tP-L9; Thu, 10 Aug 2023 00:23:24 +0000 Received: by outflank-mailman (input) for mailman id 581650; Thu, 10 Aug 2023 00:23:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSV-0000tH-M8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSV-0001Fi-LL for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtSV-00086I-Ka for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jQPx0Z1L/pZ6I4x5ma06GLhKig6l6pWEmbVk/WTvei4=; b=RGY0lBHVnKyYRnS3bFyL0dsi4o grNE2fXVd7xCjzInzAYl/zCWITEmVpVeXx3G4WRyUgOKPNTAd3Pd6s7Yri3Ct9+4r1KVWWpyb7+2L SLD0ch/zt1j6Pb7gHzX3ZRLYR+Bg5MeE9hQvC5zKNYQUgfNhy8RGHyOwA+mcB5GsUzPA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Rename struct cpu_policy to struct old_cpuid_policy Message-Id: Date: Thu, 10 Aug 2023 00:23:23 +0000 commit 232230f27d589f41bc7cb4ba5f71296ebb02c878 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:31:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Rename struct cpu_policy to struct old_cpuid_policy We want to merge struct cpuid_policy and struct msr_policy together, and the result wants to be called struct cpu_policy. The current struct cpu_policy, being a pair of pointers, isn't terribly useful. Rename the type to struct old_cpu_policy, but it will disappear entirely once the merge is complete. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c2ec94c370f211d73f336ccfbdb32499f1b05f82) --- tools/libs/guest/xg_cpuid_x86.c | 4 ++-- tools/tests/cpu-policy/test-cpu-policy.c | 4 ++-- xen/arch/x86/domctl.c | 4 ++-- xen/arch/x86/sysctl.c | 4 ++-- xen/include/asm-x86/cpuid.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 6 +++--- xen/lib/x86/policy.c | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 6ea14c4c56..0e84072dce 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -869,8 +869,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct cpu_policy h = { &host->cpuid, &host->msr }; - struct cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->cpuid, &host->msr }; + struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index ed450a0997..8a223fddb3 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -602,7 +602,7 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { @@ -654,7 +654,7 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 0fa51f2ebd..4a260b0a9c 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -50,8 +50,8 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct cpu_policy new = {}; - const struct cpu_policy *sys = is_pv_domain(d) + struct old_cpu_policy new = {}; + const struct old_cpu_policy *sys = is_pv_domain(d) ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index d6ac3069ed..36ad199e80 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -33,7 +33,7 @@ #include #include -const struct cpu_policy system_policies[6] = { +const struct old_cpu_policy system_policies[6] = { [ XEN_SYSCTL_cpu_policy_raw ] = { &raw_cpuid_policy, &raw_msr_policy, @@ -392,7 +392,7 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct cpu_policy *policy; + const struct old_cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 9c3637549a..49b3128f06 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -51,7 +51,7 @@ extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, pv_max_cpuid_policy, pv_def_cpuid_policy, hvm_max_cpuid_policy, hvm_def_cpuid_policy; -extern const struct cpu_policy system_policies[]; +extern const struct old_cpu_policy system_policies[]; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 5a2c4c7b2d..3a5300d107 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -5,7 +5,7 @@ #include #include -struct cpu_policy +struct old_cpu_policy { struct cpuid_policy *cpuid; struct msr_policy *msr; @@ -33,8 +33,8 @@ struct cpu_policy_errors * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f6cea4e2f9..2975711d7c 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581651.910739 (Exim 4.92) (envelope-from ) id 1qTtSg-0000wH-Ps; Thu, 10 Aug 2023 00:23:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581651.910739; Thu, 10 Aug 2023 00:23:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSg-0000w7-Mq; Thu, 10 Aug 2023 00:23:34 +0000 Received: by outflank-mailman (input) for mailman id 581651; Thu, 10 Aug 2023 00:23:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSf-0000vz-PN for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields Message-Id: Date: Thu, 10 Aug 2023 00:23:33 +0000 commit 222611c8d2b2807b239d35cd12cffce82bfe9d8c Author: Andrew Cooper AuthorDate: Tue Mar 28 20:48:29 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields These weren't great names to begin with, and using {leaves,msrs} matches up better with the existing nr_{leaves,msr} parameters anyway. Furthermore, by renaming these fields we can get away with using some #define trickery to avoid the struct {cpuid,msr}_policy merge needing to happen in a single changeset. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 21e3ef57e0406b6b9a783f721f29df8f91a00f99) xen: Correct comments after renaming xen_{dom,sys}ctl_cpu_policy fields Fixes: 21e3ef57e040 ("x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné (cherry picked from commit 6e06d229d538ea51b92dc189546c522f5e903511) --- tools/libs/guest/xg_cpuid_x86.c | 12 ++++++------ xen/arch/x86/domctl.c | 12 ++++++------ xen/arch/x86/sysctl.c | 8 ++++---- xen/include/public/domctl.h | 10 ++++------ xen/include/public/sysctl.h | 14 ++++++-------- 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 0e84072dce..8d5c68c967 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -146,9 +146,9 @@ static int get_system_cpu_policy(xc_interface *xch, uint32_t index, sysctl.cmd = XEN_SYSCTL_get_cpu_policy; sysctl.u.cpu_policy.index = index; sysctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(sysctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(sysctl.u.cpu_policy.leaves, leaves); sysctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(sysctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(sysctl.u.cpu_policy.msrs, msrs); ret = do_sysctl(xch, &sysctl); @@ -184,9 +184,9 @@ static int get_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_get_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); ret = do_domctl(xch, &domctl); @@ -233,9 +233,9 @@ int xc_set_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_set_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); domctl.u.cpu_policy.err_leaf = -1; domctl.u.cpu_policy.err_subleaf = -1; domctl.u.cpu_policy.err_msr = -1; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 4a260b0a9c..9a53182f5a 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -64,10 +64,10 @@ static int update_domain_cpu_policy(struct domain *d, /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->cpuid_policy, xdpc->nr_leaves, + new.cpuid, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msr_policy, xdpc->nr_msrs, &err.msr)) ) + new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ @@ -1332,20 +1332,20 @@ long arch_do_domctl( case XEN_DOMCTL_get_cpu_policy: /* Process the CPUID leaves. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( d->arch.cpuid, - domctl->u.cpu_policy.cpuid_policy, + domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; /* Process the MSR entries. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( d->arch.msr, - domctl->u.cpu_policy.msr_policy, + domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 36ad199e80..9e91cbc6c3 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -412,11 +412,11 @@ long arch_do_sysctl( } /* Process the CPUID leaves. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( policy->cpuid, - sysctl->u.cpu_policy.cpuid_policy, + sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -428,11 +428,11 @@ long arch_do_sysctl( } /* Process the MSR entries. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( policy->msr, - sysctl->u.cpu_policy.msr_policy, + sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index b85e6170b0..a286ca7b9e 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -690,12 +690,10 @@ struct xen_domctl_set_target { * Query or set the CPUID and MSR policies for a specific domain. */ struct xen_domctl_cpu_policy { - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy'. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy' */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* IN/OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* IN/OUT */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves' */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs' */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* IN/OUT */ /* * OUT, set_policy only. Written in some (but not all) error cases to diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index d09481f9c8..4363aa9446 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -1058,15 +1058,13 @@ struct xen_sysctl_cpu_policy { #define XEN_SYSCTL_cpu_policy_pv_default 4 #define XEN_SYSCTL_cpu_policy_hvm_default 5 uint32_t index; /* IN: Which policy to query? */ - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy', or the maximum number of leaves - * if the guest handle is NULL. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy', or the maximum number of MSRs if - * the guest handle is NULL. */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves', + * or the max number if 'leaves' is NULL. */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs', or + * the max number of if 'msrs' is NULL. */ uint32_t _rsvd; /* Must be zero. */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* OUT */ }; typedef struct xen_sysctl_cpu_policy xen_sysctl_cpu_policy_t; DEFINE_XEN_GUEST_HANDLE(xen_sysctl_cpu_policy_t); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581652.910743 (Exim 4.92) (envelope-from ) id 1qTtSq-0000zU-TE; Thu, 10 Aug 2023 00:23:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581652.910743; Thu, 10 Aug 2023 00:23:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSq-0000zN-Q4; Thu, 10 Aug 2023 00:23:44 +0000 Received: by outflank-mailman (input) for mailman id 581652; Thu, 10 Aug 2023 00:23:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSp-0000zD-Su for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSp-0001GI-S3 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtSp-00087R-R8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eIaCBjT9RXAKis8PyT4iodcZ5E+yzFD175wH5qhy4Rg=; b=dfUIJ+MITJKkt3CMOhN0VXmPDD 94iE2oDuf00bjCn5qAZkGgUG6+3OKEDd5E6mSGsLprvLlQrlhlbqKZWVojDFt4fxR13BQDIB8oNgB 1eS9cPACWOfF4vJcH5q4uNgsGCTQttLKHazMV5aNADWLTTy/SdMtBQmoGtmsh9Co58NM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Rename struct cpuid_policy to struct cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:23:43 +0000 commit 9fd987f13d721d9ef7362d64822f88ee5e7bcd09 Author: Andrew Cooper AuthorDate: Tue Mar 28 18:55:19 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Rename struct cpuid_policy to struct cpu_policy Also merge lib/x86/cpuid.h entirely into lib/x86/cpu-policy.h Use a temporary define to make struct cpuid_policy still work. There's one forward declaration of struct cpuid_policy in tools/tests/x86_emulator/x86-emulate.h that isn't covered by the define, and it's easier to rename that now than to rearrange the includes. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 743e530380a007774017df9dc2d8cb0659040ee3) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 2 +- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.h | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 2 +- xen/include/asm-x86/cpuid.h | 1 - xen/include/xen/lib/x86/cpu-policy.h | 463 +++++++++++++++++++++++++- xen/include/xen/lib/x86/cpuid.h | 475 --------------------------- xen/lib/x86/cpuid.c | 2 +- 9 files changed, 468 insertions(+), 483 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 79a849a044..7ebe8ee7c3 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 1a6dbf94e1..2284887761 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -28,7 +28,7 @@ GCOV_FLAGS := --coverage x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) # x86-emulate.c will be implicit for both diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 7b07c31bbd..bd82598f97 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -286,7 +286,7 @@ HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o: %.o: %.c $(x86_emulate.h) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index e1a2aaef68..3f2f6a5c2e 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -68,7 +68,7 @@ #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) extern uint32_t mxcsr_mask; -extern struct cpuid_policy cp; +extern struct cpu_policy cp; #define MMAP_SZ 16384 bool emul_test_init(void); diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index d8fb3a9909..ce8226bd4c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,7 +23,7 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ -#include +#include #define MAX_INST_LEN 15 diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 49b3128f06..d418e8100d 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -9,7 +9,6 @@ #include #include -#include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 3a5300d107..666505964d 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -2,9 +2,342 @@ #ifndef XEN_LIB_X86_POLICIES_H #define XEN_LIB_X86_POLICIES_H -#include +#include #include +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ + +struct cpuid_leaf +{ + uint32_t a, b, c, d; +}; + +/* + * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard + * register, and are unable to cope with spilling it. This results in a + * rather cryptic error: + * error: inconsistent operand constraints in an ‘asm’ + * + * In affected situations, work around the issue by using a separate register + * to hold the the %rBX output, and xchg twice to leave %rBX preserved around + * the asm() statement. + */ +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) +# define XCHG_BX "xchg %%ebx, %[bx];" +# define BX_CON [bx] "=&r" +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ + defined(__x86_64__) && (defined(__code_model_medium__) || \ + defined(__code_model_large__)) +# define XCHG_BX "xchg %%rbx, %q[bx];" +# define BX_CON [bx] "=&r" +#else +# define XCHG_BX "" +# define BX_CON "=&b" +#endif + +static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) + : "a" (leaf) ); +} + +static inline void cpuid_count_leaf( + uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) + : "a" (leaf), "c" (subleaf) ); +} + +#undef BX_CON +#undef XCHG + +/** + * Given the vendor id from CPUID leaf 0, look up Xen's internal integer + * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. + */ +unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); + +/** + * Given Xen's internal vendor ID, return a string suitable for printing. + * Returns "Unknown" for any unrecognised ID. + */ +const char *x86_cpuid_vendor_to_str(unsigned int vendor); + +#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_CACHE (5u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) +#define CPUID_GUEST_NR_TOPO (1u + 1) +#define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) +#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) +#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ + CPUID_GUEST_NR_EXTD_AMD) + +/* + * Maximum number of leaves a struct cpu_policy turns into when serialised for + * interaction with the toolstack. (Sum of all leaves in each union, less the + * entries in basic which sub-unions hang off of.) + */ +#define CPUID_MAX_SERIALISED_LEAVES \ + (CPUID_GUEST_NR_BASIC + \ + CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ + CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ + CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ + CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ + CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) + +struct cpu_policy +{ +#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) +#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) +#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x + + /* Basic leaves: 0x000000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; + struct { + /* Leaf 0x0 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x1 - Family/model/stepping and features. */ + uint32_t raw_fms; + uint8_t :8, /* Brand ID. */ + clflush_size, /* Number of 8-byte blocks per cache line. */ + lppp, /* Logical processors per package. */ + apic_id; /* Initial APIC ID. */ + union { + uint32_t _1c; + struct { DECL_BITFIELD(1c); }; + }; + union { + uint32_t _1d; + struct { DECL_BITFIELD(1d); }; + }; + + /* Leaf 0x2 - TLB/Cache/Prefetch. */ + uint8_t l2_nr_queries; /* Documented as fixed to 1. */ + uint8_t l2_desc[15]; + + uint64_t :64, :64; /* Leaf 0x3 - PSN. */ + uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ + uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ + uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ + uint64_t :64, :64; /* Leaf 0x8 - rsvd */ + uint64_t :64, :64; /* Leaf 0x9 - DCA */ + + /* Leaf 0xa - Intel PMU. */ + uint8_t pmu_version, _pmu[15]; + + uint64_t :64, :64; /* Leaf 0xb - Topology. */ + uint64_t :64, :64; /* Leaf 0xc - rsvd */ + uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ + }; + } basic; + + /* Structured cache leaf: 0x00000004[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; + struct cpuid_cache_leaf { + uint32_t /* a */ type:5, level:3; + bool self_init:1, fully_assoc:1; + uint32_t :4, threads_per_cache:12, cores_per_package:6; + uint32_t /* b */ line_size:12, partitions:10, ways:10; + uint32_t /* c */ sets; + bool /* d */ wbinvd:1, inclusive:1, complex:1; + } subleaf[CPUID_GUEST_NR_CACHE]; + } cache; + + /* Structured feature leaf: 0x00000007[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + union { + uint32_t _7b0; + struct { DECL_BITFIELD(7b0); }; + }; + union { + uint32_t _7c0; + struct { DECL_BITFIELD(7c0); }; + }; + union { + uint32_t _7d0; + struct { DECL_BITFIELD(7d0); }; + }; + + /* Subleaf 1. */ + union { + uint32_t _7a1; + struct { DECL_BITFIELD(7a1); }; + }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; + }; + } feat; + + /* Extended topology enumeration: 0x0000000B[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; + struct cpuid_topo_leaf { + uint32_t id_shift:5, :27; + uint16_t nr_logical, :16; + uint8_t level, type, :8, :8; + uint32_t x2apic_id; + } subleaf[CPUID_GUEST_NR_TOPO]; + } topo; + + /* Xstate feature leaf: 0x0000000D[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; + + struct { + /* Subleaf 0. */ + uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; + + /* Subleaf 1. */ + union { + uint32_t Da1; + struct { DECL_BITFIELD(Da1); }; + }; + uint32_t /* b */:32, xss_low, xss_high; + }; + + /* Per-component common state. Valid for i >= 2. */ + struct { + uint32_t size, offset; + bool xss:1, align:1; + uint32_t _res_d; + } comp[CPUID_GUEST_NR_XSTATE]; + } xstate; + + /* Extended leaves: 0x800000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; + struct { + /* Leaf 0x80000000 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x80000001 - Family/model/stepping and features. */ + uint32_t raw_fms, /* b */:32; + union { + uint32_t e1c; + struct { DECL_BITFIELD(e1c); }; + }; + union { + uint32_t e1d; + struct { DECL_BITFIELD(e1d); }; + }; + + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* L1 cache/TLB. */ + uint64_t :64, :64; /* L2/3 cache/TLB. */ + + /* Leaf 0x80000007 - Advanced Power Management. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t e7d; + struct { DECL_BITFIELD(e7d); }; + }; + + /* Leaf 0x80000008 - Misc addr/feature info. */ + uint8_t maxphysaddr, maxlinaddr, :8, :8; + union { + uint32_t e8b; + struct { DECL_BITFIELD(e8b); }; + }; + uint32_t nc:8, :4, apic_id_size:4, :16; + uint32_t /* d */:32; + + uint64_t :64, :64; /* Leaf 0x80000009. */ + uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ + uint64_t :64, :64; /* Leaf 0x8000000b. */ + uint64_t :64, :64; /* Leaf 0x8000000c. */ + uint64_t :64, :64; /* Leaf 0x8000000d. */ + uint64_t :64, :64; /* Leaf 0x8000000e. */ + uint64_t :64, :64; /* Leaf 0x8000000f. */ + uint64_t :64, :64; /* Leaf 0x80000010. */ + uint64_t :64, :64; /* Leaf 0x80000011. */ + uint64_t :64, :64; /* Leaf 0x80000012. */ + uint64_t :64, :64; /* Leaf 0x80000013. */ + uint64_t :64, :64; /* Leaf 0x80000014. */ + uint64_t :64, :64; /* Leaf 0x80000015. */ + uint64_t :64, :64; /* Leaf 0x80000016. */ + uint64_t :64, :64; /* Leaf 0x80000017. */ + uint64_t :64, :64; /* Leaf 0x80000018. */ + uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ + uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ + uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ + uint64_t :64, :64; /* Leaf 0x8000001c. */ + uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ + uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ + uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ + uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ + + /* Leaf 0x80000021 - Extended Feature 2 */ + union { + uint32_t e21a; + struct { DECL_BITFIELD(e21a); }; + }; + uint32_t /* b */:32, /* c */:32, /* d */:32; + }; + } extd; + +#undef __DECL_BITFIELD +#undef _DECL_BITFIELD +#undef DECL_BITFIELD + + /* Toolstack selected Hypervisor max_leaf (if non-zero). */ + uint8_t hv_limit, hv2_limit; + + /* Value calculated from raw data above. */ + uint8_t x86_vendor; +}; + +/* Temporary */ +#define cpuid_policy cpu_policy + struct old_cpu_policy { struct cpuid_policy *cpuid; @@ -19,6 +352,134 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } +/* Fill in a featureset bitmap from a CPUID policy. */ +static inline void cpuid_policy_to_featureset( + const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +/* Fill in a CPUID policy from a featureset bitmap. */ +static inline void cpuid_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + +static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +{ + return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; +} + +static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +{ + uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; + + return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; +} + +const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); + +/** + * Recalculate the content in a CPUID policy which is derived from raw data. + */ +void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); + +/** + * Fill a CPUID policy using the native CPUID instruction. + * + * No sanitisation is performed, but synthesised values are calculated. + * Values may be influenced by a hypervisor or from masking/faulting + * configuration. + */ +void x86_cpuid_policy_fill_native(struct cpuid_policy *p); + +/** + * Clear leaf data beyond the policies max leaf/subleaf settings. + * + * Policy serialisation purposefully omits out-of-range leaves, because there + * are a large number of them due to vendor differences. However, when + * constructing new policies (e.g. levelling down), it is possible to end up + * with out-of-range leaves with stale content in them. This helper clears + * them. + */ +void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); + +#ifdef __XEN__ +#include +typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +#else +#include +typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +#endif + +/** + * Serialise a cpuid_policy object into an array of cpuid leaves. + * + * @param policy The cpuid_policy to serialise. + * @param leaves The array of leaves to serialise into. + * @param nr_entries The number of entries in 'leaves'. + * @returns -errno + * + * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the + * leaves array is too short. On success, nr_entries is updated with the + * actual number of leaves written. + */ +int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, + cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); + +/** + * Unserialise a cpuid_policy object from an array of cpuid leaves. + * + * @param policy The cpuid_policy to unserialise into. + * @param leaves The array of leaves to unserialise from. + * @param nr_entries The number of entries in 'leaves'. + * @param err_leaf Optional hint for error diagnostics. + * @param err_subleaf Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an + * incoming leaf is out of range of cpuid_policy, in which case the optional + * err_* pointers will identify the out-of-range indicies. + * + * No content validation of in-range leaves is performed. Synthesised data is + * recalculated. + */ +int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, + const cpuid_leaf_buffer_t leaves, + uint32_t nr_entries, uint32_t *err_leaf, + uint32_t *err_subleaf); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h deleted file mode 100644 index fa98b371ee..0000000000 --- a/xen/include/xen/lib/x86/cpuid.h +++ /dev/null @@ -1,475 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_CPUID_H -#define XEN_LIB_X86_CPUID_H - -#include - -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ - -struct cpuid_leaf -{ - uint32_t a, b, c, d; -}; - -/* - * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard - * register, and are unable to cope with spilling it. This results in a - * rather cryptic error: - * error: inconsistent operand constraints in an ‘asm’ - * - * In affected situations, work around the issue by using a separate register - * to hold the the %rBX output, and xchg twice to leave %rBX preserved around - * the asm() statement. - */ -#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) -# define XCHG_BX "xchg %%ebx, %[bx];" -# define BX_CON [bx] "=&r" -#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ - defined(__x86_64__) && (defined(__code_model_medium__) || \ - defined(__code_model_large__)) -# define XCHG_BX "xchg %%rbx, %q[bx];" -# define BX_CON [bx] "=&r" -#else -# define XCHG_BX "" -# define BX_CON "=&b" -#endif - -static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) - : "a" (leaf) ); -} - -static inline void cpuid_count_leaf( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) - : "a" (leaf), "c" (subleaf) ); -} - -#undef BX_CON -#undef XCHG - -/** - * Given the vendor id from CPUID leaf 0, look up Xen's internal integer - * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. - */ -unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); - -/** - * Given Xen's internal vendor ID, return a string suitable for printing. - * Returns "Unknown" for any unrecognised ID. - */ -const char *x86_cpuid_vendor_to_str(unsigned int vendor); - -#define CPUID_GUEST_NR_BASIC (0xdu + 1) -#define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (2u + 1) -#define CPUID_GUEST_NR_TOPO (1u + 1) -#define CPUID_GUEST_NR_XSTATE (62u + 1) -#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) -#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) -#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ - CPUID_GUEST_NR_EXTD_AMD) - -/* - * Maximum number of leaves a struct cpuid_policy turns into when serialised - * for interaction with the toolstack. (Sum of all leaves in each union, less - * the entries in basic which sub-unions hang off of.) - */ -#define CPUID_MAX_SERIALISED_LEAVES \ - (CPUID_GUEST_NR_BASIC + \ - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ - CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) - -struct cpuid_policy -{ -#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) -#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) -#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x - - /* Basic leaves: 0x000000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; - struct { - /* Leaf 0x0 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t raw_fms; - uint8_t :8, /* Brand ID. */ - clflush_size, /* Number of 8-byte blocks per cache line. */ - lppp, /* Logical processors per package. */ - apic_id; /* Initial APIC ID. */ - union { - uint32_t _1c; - struct { DECL_BITFIELD(1c); }; - }; - union { - uint32_t _1d; - struct { DECL_BITFIELD(1d); }; - }; - - /* Leaf 0x2 - TLB/Cache/Prefetch. */ - uint8_t l2_nr_queries; /* Documented as fixed to 1. */ - uint8_t l2_desc[15]; - - uint64_t :64, :64; /* Leaf 0x3 - PSN. */ - uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ - uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ - uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ - uint64_t :64, :64; /* Leaf 0x8 - rsvd */ - uint64_t :64, :64; /* Leaf 0x9 - DCA */ - - /* Leaf 0xa - Intel PMU. */ - uint8_t pmu_version, _pmu[15]; - - uint64_t :64, :64; /* Leaf 0xb - Topology. */ - uint64_t :64, :64; /* Leaf 0xc - rsvd */ - uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ - }; - } basic; - - /* Structured cache leaf: 0x00000004[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; - struct cpuid_cache_leaf { - uint32_t /* a */ type:5, level:3; - bool self_init:1, fully_assoc:1; - uint32_t :4, threads_per_cache:12, cores_per_package:6; - uint32_t /* b */ line_size:12, partitions:10, ways:10; - uint32_t /* c */ sets; - bool /* d */ wbinvd:1, inclusive:1, complex:1; - } subleaf[CPUID_GUEST_NR_CACHE]; - } cache; - - /* Structured feature leaf: 0x00000007[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; - struct { - /* Subleaf 0. */ - uint32_t max_subleaf; - union { - uint32_t _7b0; - struct { DECL_BITFIELD(7b0); }; - }; - union { - uint32_t _7c0; - struct { DECL_BITFIELD(7c0); }; - }; - union { - uint32_t _7d0; - struct { DECL_BITFIELD(7d0); }; - }; - - /* Subleaf 1. */ - union { - uint32_t _7a1; - struct { DECL_BITFIELD(7a1); }; - }; - union { - uint32_t _7b1; - struct { DECL_BITFIELD(7b1); }; - }; - union { - uint32_t _7c1; - struct { DECL_BITFIELD(7c1); }; - }; - union { - uint32_t _7d1; - struct { DECL_BITFIELD(7d1); }; - }; - - /* Subleaf 2. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t _7d2; - struct { DECL_BITFIELD(7d2); }; - }; - }; - } feat; - - /* Extended topology enumeration: 0x0000000B[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; - struct cpuid_topo_leaf { - uint32_t id_shift:5, :27; - uint16_t nr_logical, :16; - uint8_t level, type, :8, :8; - uint32_t x2apic_id; - } subleaf[CPUID_GUEST_NR_TOPO]; - } topo; - - /* Xstate feature leaf: 0x0000000D[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; - - struct { - /* Subleaf 0. */ - uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; - - /* Subleaf 1. */ - union { - uint32_t Da1; - struct { DECL_BITFIELD(Da1); }; - }; - uint32_t /* b */:32, xss_low, xss_high; - }; - - /* Per-component common state. Valid for i >= 2. */ - struct { - uint32_t size, offset; - bool xss:1, align:1; - uint32_t _res_d; - } comp[CPUID_GUEST_NR_XSTATE]; - } xstate; - - /* Extended leaves: 0x800000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; - struct { - /* Leaf 0x80000000 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x80000001 - Family/model/stepping and features. */ - uint32_t raw_fms, /* b */:32; - union { - uint32_t e1c; - struct { DECL_BITFIELD(e1c); }; - }; - union { - uint32_t e1d; - struct { DECL_BITFIELD(e1d); }; - }; - - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* L1 cache/TLB. */ - uint64_t :64, :64; /* L2/3 cache/TLB. */ - - /* Leaf 0x80000007 - Advanced Power Management. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t e7d; - struct { DECL_BITFIELD(e7d); }; - }; - - /* Leaf 0x80000008 - Misc addr/feature info. */ - uint8_t maxphysaddr, maxlinaddr, :8, :8; - union { - uint32_t e8b; - struct { DECL_BITFIELD(e8b); }; - }; - uint32_t nc:8, :4, apic_id_size:4, :16; - uint32_t /* d */:32; - - uint64_t :64, :64; /* Leaf 0x80000009. */ - uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ - uint64_t :64, :64; /* Leaf 0x8000000b. */ - uint64_t :64, :64; /* Leaf 0x8000000c. */ - uint64_t :64, :64; /* Leaf 0x8000000d. */ - uint64_t :64, :64; /* Leaf 0x8000000e. */ - uint64_t :64, :64; /* Leaf 0x8000000f. */ - uint64_t :64, :64; /* Leaf 0x80000010. */ - uint64_t :64, :64; /* Leaf 0x80000011. */ - uint64_t :64, :64; /* Leaf 0x80000012. */ - uint64_t :64, :64; /* Leaf 0x80000013. */ - uint64_t :64, :64; /* Leaf 0x80000014. */ - uint64_t :64, :64; /* Leaf 0x80000015. */ - uint64_t :64, :64; /* Leaf 0x80000016. */ - uint64_t :64, :64; /* Leaf 0x80000017. */ - uint64_t :64, :64; /* Leaf 0x80000018. */ - uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ - uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ - uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ - uint64_t :64, :64; /* Leaf 0x8000001c. */ - uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ - uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ - uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ - uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ - - /* Leaf 0x80000021 - Extended Feature 2 */ - union { - uint32_t e21a; - struct { DECL_BITFIELD(e21a); }; - }; - uint32_t /* b */:32, /* c */:32, /* d */:32; - }; - } extd; - -#undef __DECL_BITFIELD -#undef _DECL_BITFIELD -#undef DECL_BITFIELD - - /* Toolstack selected Hypervisor max_leaf (if non-zero). */ - uint8_t hv_limit, hv2_limit; - - /* Value calculated from raw data above. */ - uint8_t x86_vendor; -}; - -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} - -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} - -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -{ - return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; -} - -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) -{ - uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; - - return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; -} - -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); - -/** - * Recalculate the content in a CPUID policy which is derived from raw data. - */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); - -/** - * Fill a CPUID policy using the native CPUID instruction. - * - * No sanitisation is performed, but synthesised values are calculated. - * Values may be influenced by a hypervisor or from masking/faulting - * configuration. - */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); - -/** - * Clear leaf data beyond the policies max leaf/subleaf settings. - * - * Policy serialisation purposefully omits out-of-range leaves, because there - * are a large number of them due to vendor differences. However, when - * constructing new policies (e.g. levelling down), it is possible to end up - * with out-of-range leaves with stale content in them. This helper clears - * them. - */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; -#else -#include -typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; -#endif - -/** - * Serialise a cpuid_policy object into an array of cpuid leaves. - * - * @param policy The cpuid_policy to serialise. - * @param leaves The array of leaves to serialise into. - * @param nr_entries The number of entries in 'leaves'. - * @returns -errno - * - * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the - * leaves array is too short. On success, nr_entries is updated with the - * actual number of leaves written. - */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, - cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); - -/** - * Unserialise a cpuid_policy object from an array of cpuid leaves. - * - * @param policy The cpuid_policy to unserialise into. - * @param leaves The array of leaves to unserialise from. - * @param nr_entries The number of entries in 'leaves'. - * @param err_leaf Optional hint for error diagnostics. - * @param err_subleaf Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional - * err_* pointers will identify the out-of-range indicies. - * - * No content validation of in-range leaves is performed. Synthesised data is - * recalculated. - */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, - const cpuid_leaf_buffer_t leaves, - uint32_t nr_entries, uint32_t *err_leaf, - uint32_t *err_subleaf); - -#endif /* !XEN_LIB_X86_CPUID_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 8eb88314f5..e81f76c779 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:23:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:23:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581654.910747 (Exim 4.92) (envelope-from ) id 1qTtT1-00012k-09; Thu, 10 Aug 2023 00:23:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581654.910747; Thu, 10 Aug 2023 00:23:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtT0-00012d-Tf; Thu, 10 Aug 2023 00:23:54 +0000 Received: by outflank-mailman (input) for mailman id 581654; Thu, 10 Aug 2023 00:23:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSz-00012T-Vt for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtSz-0001Hu-V5 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtSz-00087w-UP for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:23:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cYdjnIB4QjPmiVFdu4/3gN0ZjjwJxftrwwDyNP0izhI=; b=fQJ06MeT+V0nyRyBqCB62iF8J0 dYNM8ivgkOdyjIttFFCIJYQvDsDtHbgxDzIlGGXSqokrkESPDhdNM2OJzQJf8Fkp1lLmrFFl4R4p5 6yzDSc96eOL75Tpp/vflbDUrwHwxxXP6+LmWB9eWM85GRsjSS6HldSIsZrHG0Il5v6uk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Merge struct msr_policy into struct cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:23:53 +0000 commit 6d642d53d699af8e2fd08e228b377728fa685635 Author: Andrew Cooper AuthorDate: Tue Mar 28 21:24:20 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 03812da3754d550dd8cbee7289469069ea6f0073) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 1 - xen/include/asm-x86/msr.h | 3 +- xen/include/xen/lib/x86/cpu-policy.h | 81 ++++++++++++++++++++++- xen/include/xen/lib/x86/msr.h | 104 ------------------------------ xen/lib/x86/msr.c | 2 +- 5 files changed, 83 insertions(+), 108 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 7ebe8ee7c3..316eb0efe0 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -10,7 +10,6 @@ #include #include -#include #include static bool debug; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index ce4fe51afe..78b70d323e 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -6,8 +6,9 @@ #include #include #include +#include -#include +#include #include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 666505964d..53fffca552 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -3,7 +3,6 @@ #define XEN_LIB_X86_POLICIES_H #include -#include #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -107,6 +106,9 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) +/* Maximum number of MSRs written when serialising a cpu_policy. */ +#define MSR_MAX_SERIALISED_ENTRIES 2 + struct cpu_policy { #define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) @@ -324,6 +326,44 @@ struct cpu_policy }; } extd; + /* + * 0x000000ce - MSR_INTEL_PLATFORM_INFO + * + * This MSR is non-architectural, but for simplicy we allow it to be read + * unconditionally. CPUID Faulting support can be fully emulated for HVM + * guests so can be offered unconditionally, while support for PV guests + * is dependent on real hardware support. + */ + union { + uint32_t raw; + struct { + uint32_t :31; + bool cpuid_faulting:1; + }; + } platform_info; + + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -337,6 +377,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy struct old_cpu_policy { @@ -438,9 +479,11 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); #ifdef __XEN__ #include typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; #else #include typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** @@ -480,6 +523,42 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); +/** + * Serialise an msr_policy object into an array. + * + * @param policy The msr_policy to serialise. + * @param msrs The array of msrs to serialise into. + * @param nr_entries The number of entries in 'msrs'. + * @returns -errno + * + * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the + * buffer array is too short. On success, nr_entries is updated with the + * actual number of msrs written. + */ +int x86_msr_copy_to_buffer(const struct msr_policy *policy, + msr_entry_buffer_t msrs, uint32_t *nr_entries); + +/** + * Unserialise an msr_policy object from an array of msrs. + * + * @param policy The msr_policy object to unserialise into. + * @param msrs The array of msrs to unserialise from. + * @param nr_entries The number of entries in 'msrs'. + * @param err_msr Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons + * based on the content in an individual 'msrs' entry, including the MSR index + * not being valid in the policy, the flags field being nonzero, or if the + * value provided would truncate when stored in the policy. In such cases, + * the optional err_* pointer will identify the problematic MSR. + * + * No content validation is performed on the data stored in the policy object. + */ +int x86_msr_copy_from_buffer(struct msr_policy *policy, + const msr_entry_buffer_t msrs, uint32_t nr_entries, + uint32_t *err_msr); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/msr.h b/xen/include/xen/lib/x86/msr.h deleted file mode 100644 index 48ba4a59c0..0000000000 --- a/xen/include/xen/lib/x86/msr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_MSR_H -#define XEN_LIB_X86_MSR_H - -/* Maximum number of MSRs written when serialising msr_policy. */ -#define MSR_MAX_SERIALISED_ENTRIES 2 - -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy -{ - /* - * 0x000000ce - MSR_INTEL_PLATFORM_INFO - * - * This MSR is non-architectural, but for simplicy we allow it to be read - * unconditionally. CPUID Faulting support can be fully emulated for HVM - * guests so can be offered unconditionally, while support for PV guests - * is dependent on real hardware support. - */ - union { - uint32_t raw; - struct { - uint32_t :31; - bool cpuid_faulting:1; - }; - } platform_info; - - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; -#else -#include -typedef xen_msr_entry_t msr_entry_buffer_t[]; -#endif - -/** - * Serialise an msr_policy object into an array. - * - * @param policy The msr_policy to serialise. - * @param msrs The array of msrs to serialise into. - * @param nr_entries The number of entries in 'msrs'. - * @returns -errno - * - * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the - * buffer array is too short. On success, nr_entries is updated with the - * actual number of msrs written. - */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, - msr_entry_buffer_t msrs, uint32_t *nr_entries); - -/** - * Unserialise an msr_policy object from an array of msrs. - * - * @param policy The msr_policy object to unserialise into. - * @param msrs The array of msrs to unserialise from. - * @param nr_entries The number of entries in 'msrs'. - * @param err_msr Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons - * based on the content in an individual 'msrs' entry, including the MSR index - * not being valid in the policy, the flags field being nonzero, or if the - * value provided would truncate when stored in the policy. In such cases, - * the optional err_* pointer will identify the problematic MSR. - * - * No content validation is performed on the data stored in the policy object. - */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, - const msr_entry_buffer_t msrs, uint32_t nr_entries, - uint32_t *err_msr); - -#endif /* !XEN_LIB_X86_MSR_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index 7d71e92a38..c4d885e7b5 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include /* * Copy a single MSR into the provided msr_entry_buffer_t buffer, performing a -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581655.910751 (Exim 4.92) (envelope-from ) id 1qTtTB-00015T-1l; Thu, 10 Aug 2023 00:24:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581655.910751; Thu, 10 Aug 2023 00:24:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTA-00015M-VB; Thu, 10 Aug 2023 00:24:04 +0000 Received: by outflank-mailman (input) for mailman id 581655; Thu, 10 Aug 2023 00:24:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTA-000159-2m for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTA-0001IK-24 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtTA-00088U-1M for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6Yjgi9bqoLyQPA5HxgIs/shZY8DalbfghOy2U6PbU3U=; b=z9czM88jigVqY8BkZ4LaHKmXMO uDMnFaT39aapolikaIT1ruVAo5UoUUOEuEHRFd+f8YW6jzIq1jY9PCYJHnIZpe7zKL1obB3WDXkuW 7AtRh4FveyT11/GMAG99DvTQuRc51fio/MMj2Si8xp5Wv/xbxNFuhadfmcgv9/37wY+8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Merge the system {cpuid,msr} policy objects Message-Id: Date: Thu, 10 Aug 2023 00:24:04 +0000 commit 06241024d0c375a093ebd3083341f2fa91345201 Author: Andrew Cooper AuthorDate: Wed Mar 29 07:39:44 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Merge the system {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Introduce a new cpu-policy.{h,c} to be the new location for all policy handling logic. Place the combined objects in __ro_after_init, which is new since the original logic was written. As we're trying to phase out the use of struct old_cpu_policy entirely, rework update_domain_cpu_policy() to not pointer-chase through system_policies[]. This in turn allows system_policies[] in sysctl.c to become static and reduced in scope to XEN_SYSCTL_get_cpu_policy. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 6bc33366795d14a21a3244d0f3b63f7dccea87ef) --- xen/arch/x86/Makefile | 1 + xen/arch/x86/cpu-policy.c | 18 ++++++++++ xen/arch/x86/cpu/common.c | 4 ++- xen/arch/x86/cpuid.c | 66 ++++++++++++++++--------------------- xen/arch/x86/domctl.c | 17 +++++++--- xen/arch/x86/msr.c | 38 ++++++++------------- xen/arch/x86/sysctl.c | 71 +++++++++++++++------------------------- xen/include/asm-x86/cpu-policy.h | 14 ++++++++ xen/include/asm-x86/cpuid.h | 6 ---- xen/include/asm-x86/msr.h | 7 ---- 10 files changed, 116 insertions(+), 126 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 8e975f472d..eb63e54d93 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -16,6 +16,7 @@ obj-y += bitops.o obj-bin-y += bzimage.init.o obj-bin-y += clear_page.o obj-bin-y += copy_page.o +obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o obj-$(CONFIG_PV32) += x86_64/compat.o diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c new file mode 100644 index 0000000000..e47fbeb04d --- /dev/null +++ b/xen/arch/x86/cpu-policy.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#include + +#include + +struct cpu_policy __read_mostly raw_cpu_policy; +struct cpu_policy __read_mostly host_cpu_policy; +#ifdef CONFIG_PV +struct cpu_policy __read_mostly pv_max_cpu_policy; +struct cpu_policy __read_mostly pv_def_cpu_policy; +#endif +#ifdef CONFIG_HVM +struct cpu_policy __read_mostly hvm_max_cpu_policy; +struct cpu_policy __read_mostly hvm_def_cpu_policy; +#endif diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index e1fc034ce6..9895abc624 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -135,7 +137,7 @@ bool __init probe_cpuid_faulting(void) return false; if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) - raw_msr_policy.platform_info.cpuid_faulting = + raw_cpu_policy.platform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; if (rc || diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 12c1cd30c7..a70c36e569 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -141,17 +142,6 @@ static void zero_leaves(struct cpuid_leaf *l, memset(&l[first], 0, sizeof(*l) * (last - first + 1)); } -struct cpuid_policy __read_mostly raw_cpuid_policy, - __read_mostly host_cpuid_policy; -#ifdef CONFIG_PV -struct cpuid_policy __read_mostly pv_max_cpuid_policy; -struct cpuid_policy __read_mostly pv_def_cpuid_policy; -#endif -#ifdef CONFIG_HVM -struct cpuid_policy __read_mostly hvm_max_cpuid_policy; -struct cpuid_policy __read_mostly hvm_def_cpuid_policy; -#endif - static void sanitise_featureset(uint32_t *fs) { /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ @@ -343,7 +333,7 @@ static void recalculate_misc(struct cpuid_policy *p) static void __init calculate_raw_policy(void) { - struct cpuid_policy *p = &raw_cpuid_policy; + struct cpuid_policy *p = &raw_cpu_policy; x86_cpuid_policy_fill_native(p); @@ -353,10 +343,10 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct cpuid_policy *p = &host_cpuid_policy; + struct cpuid_policy *p = &host_cpu_policy; unsigned int max_extd_leaf; - *p = raw_cpuid_policy; + *p = raw_cpu_policy; p->basic.max_leaf = min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); @@ -448,17 +438,17 @@ static void __init guest_common_feature_adjustments(uint32_t *fs) * of IBRS by using the AMD feature bit. An administrator may wish for * performance reasons to offer IBPB without IBRS. */ - if ( host_cpuid_policy.feat.ibrsb ) + if ( host_cpu_policy.feat.ibrsb ) __set_bit(X86_FEATURE_IBPB, fs); } static void __init calculate_pv_max_policy(void) { - struct cpuid_policy *p = &pv_max_cpuid_policy; + struct cpuid_policy *p = &pv_max_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -485,11 +475,11 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { - struct cpuid_policy *p = &pv_def_cpuid_policy; + struct cpuid_policy *p = &pv_def_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = pv_max_cpuid_policy; + *p = pv_max_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -505,12 +495,12 @@ static void __init calculate_pv_def_policy(void) static void __init calculate_hvm_max_policy(void) { - struct cpuid_policy *p = &hvm_max_cpuid_policy; + struct cpuid_policy *p = &hvm_max_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -538,7 +528,7 @@ static void __init calculate_hvm_max_policy(void) * HVM guests are able if running in protected mode. */ if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpuid_policy.basic.sep ) + raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); /* @@ -573,12 +563,12 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct cpuid_policy *p = &hvm_def_cpuid_policy; + struct cpuid_policy *p = &hvm_def_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = hvm_max_cpuid_policy; + *p = hvm_max_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -639,8 +629,8 @@ void recalculate_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; unsigned int i; @@ -715,7 +705,7 @@ void recalculate_cpuid_policy(struct domain *d) /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpuid_policy.feat._7b0 & + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); @@ -766,8 +756,8 @@ void recalculate_cpuid_policy(struct domain *d) int init_domain_cpuid_policy(struct domain *d) { struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !p ) { @@ -1071,7 +1061,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) - *res = raw_cpuid_policy.basic.raw[5]; + *res = raw_cpu_policy.basic.raw[5]; break; case 0x7: @@ -1203,14 +1193,14 @@ static void __init __maybe_unused build_assertions(void) /* Find some more clever allocation scheme if this trips. */ BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.basic) != - sizeof(raw_cpuid_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.feat) != - sizeof(raw_cpuid_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.xstate) != - sizeof(raw_cpuid_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.extd) != - sizeof(raw_cpuid_policy.extd.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); } /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 9a53182f5a..30625607a7 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -35,7 +35,7 @@ #include #include #include -#include +#include #ifdef CONFIG_GDBSX static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) @@ -51,12 +51,19 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct old_cpu_policy new = {}; - const struct old_cpu_policy *sys = is_pv_domain(d) - ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] - : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; + struct cpu_policy *sys = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + struct old_cpu_policy old_sys = { sys, sys }; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; + if ( !sys ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + /* Start by copying the domain's existing policies. */ if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || !(new.msr = xmemdup(d->arch.msr)) ) @@ -74,7 +81,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); if ( ret ) goto out; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index cc8fe76203..7819c1de4d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -35,20 +36,9 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -struct msr_policy __read_mostly raw_msr_policy, - __read_mostly host_msr_policy; -#ifdef CONFIG_PV -struct msr_policy __read_mostly pv_max_msr_policy; -struct msr_policy __read_mostly pv_def_msr_policy; -#endif -#ifdef CONFIG_HVM -struct msr_policy __read_mostly hvm_max_msr_policy; -struct msr_policy __read_mostly hvm_def_msr_policy; -#endif - static void __init calculate_raw_policy(void) { - struct msr_policy *mp = &raw_msr_policy; + struct msr_policy *mp = &raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -59,9 +49,9 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct msr_policy *mp = &host_msr_policy; + struct msr_policy *mp = &host_cpu_policy; - *mp = raw_msr_policy; + *mp = raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ @@ -79,25 +69,25 @@ static void __init calculate_host_policy(void) static void __init calculate_pv_max_policy(void) { - struct msr_policy *mp = &pv_max_msr_policy; + struct msr_policy *mp = &pv_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) { - struct msr_policy *mp = &pv_def_msr_policy; + struct msr_policy *mp = &pv_def_cpu_policy; - *mp = pv_max_msr_policy; + *mp = pv_max_cpu_policy; } static void __init calculate_hvm_max_policy(void) { - struct msr_policy *mp = &hvm_max_msr_policy; + struct msr_policy *mp = &hvm_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; @@ -107,9 +97,9 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct msr_policy *mp = &hvm_def_msr_policy; + struct msr_policy *mp = &hvm_def_cpu_policy; - *mp = hvm_max_msr_policy; + *mp = hvm_max_cpu_policy; } void __init init_guest_msr_policy(void) @@ -133,8 +123,8 @@ void __init init_guest_msr_policy(void) int init_domain_msr_policy(struct domain *d) { struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_msr_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_msr_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !mp ) { diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 9e91cbc6c3..16a6dbb069 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -31,38 +31,7 @@ #include #include #include -#include - -const struct old_cpu_policy system_policies[6] = { - [ XEN_SYSCTL_cpu_policy_raw ] = { - &raw_cpuid_policy, - &raw_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_host ] = { - &host_cpuid_policy, - &host_msr_policy, - }, -#ifdef CONFIG_PV - [ XEN_SYSCTL_cpu_policy_pv_max ] = { - &pv_max_cpuid_policy, - &pv_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_pv_default ] = { - &pv_def_cpuid_policy, - &pv_def_msr_policy, - }, -#endif -#ifdef CONFIG_HVM - [ XEN_SYSCTL_cpu_policy_hvm_max ] = { - &hvm_max_cpuid_policy, - &hvm_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_hvm_default ] = { - &hvm_def_cpuid_policy, - &hvm_def_msr_policy, - }, -#endif -}; +#include struct l3_cache_info { int ret; @@ -327,19 +296,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[6] = { - [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, + static const struct cpu_policy *const policy_table[6] = { + [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_featureset_host] = &host_cpu_policy, #ifdef CONFIG_PV - [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpu_policy, #endif #ifdef CONFIG_HVM - [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpu_policy, #endif }; - const struct cpuid_policy *p = NULL; + const struct cpu_policy *p = NULL; uint32_t featureset[FSCAPINTS]; unsigned int nr; @@ -392,7 +361,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct old_cpu_policy *policy; + static const struct cpu_policy *const system_policies[6] = { + [XEN_SYSCTL_cpu_policy_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_policy_host] = &host_cpu_policy, +#ifdef CONFIG_PV + [XEN_SYSCTL_cpu_policy_pv_max] = &pv_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_pv_default] = &pv_def_cpu_policy, +#endif +#ifdef CONFIG_HVM + [XEN_SYSCTL_cpu_policy_hvm_max] = &hvm_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_hvm_default] = &hvm_def_cpu_policy, +#endif + }; + const struct cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || @@ -401,11 +382,11 @@ long arch_do_sysctl( ret = -EINVAL; break; } - policy = &system_policies[ + policy = system_policies[ array_index_nospec(sysctl->u.cpu_policy.index, ARRAY_SIZE(system_policies))]; - if ( !policy->cpuid || !policy->msr ) + if ( !policy ) { ret = -EOPNOTSUPP; break; @@ -415,7 +396,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - policy->cpuid, + policy, sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -431,7 +412,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - policy->msr, + policy, sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h new file mode 100644 index 0000000000..eef14bb426 --- /dev/null +++ b/xen/include/asm-x86/cpu-policy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef X86_CPU_POLICY_H +#define X86_CPU_POLICY_H + +struct cpu_policy; + +extern struct cpu_policy raw_cpu_policy; +extern struct cpu_policy host_cpu_policy; +extern struct cpu_policy pv_max_cpu_policy; +extern struct cpu_policy pv_def_cpu_policy; +extern struct cpu_policy hvm_max_cpu_policy; +extern struct cpu_policy hvm_def_cpu_policy; + +#endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index d418e8100d..ea05862773 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -46,12 +46,6 @@ DECLARE_PER_CPU(struct cpuidmasks, cpuidmasks); /* Default masking MSR values, calculated at boot. */ extern struct cpuidmasks cpuidmask_defaults; -extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, - pv_max_cpuid_policy, pv_def_cpuid_policy, - hvm_max_cpuid_policy, hvm_def_cpuid_policy; - -extern const struct old_cpu_policy system_policies[]; - /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 78b70d323e..f2c0022fec 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -280,13 +280,6 @@ static inline void wrmsr_tsc_aux(uint32_t val) uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -extern struct msr_policy raw_msr_policy, - host_msr_policy, - pv_max_msr_policy, - pv_def_msr_policy, - hvm_max_msr_policy, - hvm_def_msr_policy; - /* Container object for per-vCPU MSRs */ struct vcpu_msrs { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581656.910755 (Exim 4.92) (envelope-from ) id 1qTtTL-00018d-4y; Thu, 10 Aug 2023 00:24:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581656.910755; Thu, 10 Aug 2023 00:24:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTL-00018V-2B; Thu, 10 Aug 2023 00:24:15 +0000 Received: by outflank-mailman (input) for mailman id 581656; Thu, 10 Aug 2023 00:24:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTK-00018L-7l for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTK-0001Id-5X for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtTK-000897-4m for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Zbo5l0u5lkFfWraJokPQsW4LCvwPmGCLj1oSAE2Ze8U=; b=oa8VfVOiD0iQF6xMs37w0RIBiO yluYoT6cKZeSktrxweaoMuLNXh8mM2h1+/8C4iJJLfUGMvHerC+F/vNKx4or5kTlyxOkSuVjM6TEg J0g98qh06bm047JZjSdyn/E4Wp6rS5k8NlXKPtl4Nc+LjkLONzXWnVl3zV5NMztHolCg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Merge a domain's {cpuid,msr} policy objects Message-Id: Date: Thu, 10 Aug 2023 00:24:14 +0000 commit 5ff420f3ee30642a28d777820f44e0081cb00627 Author: Andrew Cooper AuthorDate: Wed Mar 29 11:32:25 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Merge a domain's {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Drop the d->arch.msr pointer, and union d->arch.cpuid to give it a second name of cpu_policy in the interim. Merge init_domain_{cpuid,msr}_policy() into a single init_domain_cpu_policy(), moving the implementation into cpu-policy.c No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bd13dae34809e61e37ba1cd5de893c5c10c46256) --- xen/arch/x86/cpu-policy.c | 49 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 23 ------------------- xen/arch/x86/domain.c | 15 ++++-------- xen/arch/x86/domctl.c | 35 ++++++++++++++-------------- xen/arch/x86/mm/mem_sharing.c | 3 +-- xen/arch/x86/msr.c | 44 ------------------------------------ xen/include/asm-x86/cpu-policy.h | 4 ++++ xen/include/asm-x86/cpuid.h | 3 --- xen/include/asm-x86/domain.h | 13 ++++++++--- xen/include/asm-x86/msr.h | 1 - 10 files changed, 86 insertions(+), 104 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e47fbeb04d..4c5fd70cf1 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -16,3 +19,49 @@ struct cpu_policy __read_mostly pv_def_cpu_policy; struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif + +int init_domain_cpu_policy(struct domain *d) +{ + struct cpu_policy *p = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); + + if ( !p ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + + p = xmemdup(p); + if ( !p ) + return -ENOMEM; + + /* See comment in ctxt_switch_levelling() */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); + } + + d->arch.cpu_policy = p; + + recalculate_cpuid_policy(d); + + return 0; +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index a70c36e569..dc0e955a12 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -753,29 +753,6 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } -int init_domain_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !p ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - p = xmemdup(p); - if ( !p ) - return -ENOMEM; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; -} - void __init init_dom0_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 6eeb248908..a5e97d6881 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -66,6 +66,7 @@ #ifdef CONFIG_COMPAT #include #endif +#include #include #include #include @@ -742,8 +743,7 @@ int arch_domain_create(struct domain *d, d->arch.ctxt_switch = &idle_csw; - d->arch.cpuid = ZERO_BLOCK_PTR; /* Catch stray misuses. */ - d->arch.msr = ZERO_BLOCK_PTR; + d->arch.cpu_policy = ZERO_BLOCK_PTR; /* Catch stray misuses. */ return 0; } @@ -798,10 +798,7 @@ int arch_domain_create(struct domain *d, goto fail; paging_initialised = true; - if ( (rc = init_domain_cpuid_policy(d)) ) - goto fail; - - if ( (rc = init_domain_msr_policy(d)) ) + if ( (rc = init_domain_cpu_policy(d)) ) goto fail; d->arch.ioport_caps = @@ -872,8 +869,7 @@ int arch_domain_create(struct domain *d, iommu_domain_destroy(d); cleanup_domain_irq_mapping(d); free_xenheap_page(d->shared_info); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); if ( paging_initialised ) paging_final_teardown(d); free_perdomain_mappings(d); @@ -887,8 +883,7 @@ void arch_domain_destroy(struct domain *d) hvm_domain_destroy(d); xfree(d->arch.e820); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); free_domain_pirqs(d); if ( !is_idle_domain(d) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 30625607a7..c8a3199bdc 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -50,11 +50,11 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct old_cpu_policy new = {}; + struct cpu_policy *new; struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }; + struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -64,33 +64,33 @@ static int update_domain_cpu_policy(struct domain *d, return -EOPNOTSUPP; } - /* Start by copying the domain's existing policies. */ - if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || - !(new.msr = xmemdup(d->arch.msr)) ) + /* Start by copying the domain's existing policy. */ + if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; + old_new = (struct old_cpu_policy){ new, new }; + /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->leaves, xdpc->nr_leaves, + new, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) + new, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); + x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); if ( ret ) goto out; /* - * Audit was successful. Replace existing policies, leaving the old - * policies to be freed. + * Audit was successful. Replace the existing policy, leaving the old one + * to be freed. */ - SWAP(new.cpuid, d->arch.cpuid); - SWAP(new.msr, d->arch.msr); + SWAP(new, d->arch.cpu_policy); /* TODO: Drop when x86_cpu_policies_are_compatible() is completed. */ recalculate_cpuid_policy(d); @@ -99,9 +99,8 @@ static int update_domain_cpu_policy(struct domain *d, domain_cpu_policy_changed(d); out: - /* Free whichever cpuid/msr structs are not installed in struct domain. */ - xfree(new.cpuid); - xfree(new.msr); + /* Free whichever struct is not installed in struct domain. */ + xfree(new); if ( ret ) { @@ -1342,7 +1341,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - d->arch.cpuid, + d->arch.cpu_policy, domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; @@ -1351,7 +1350,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - d->arch.msr, + d->arch.cpu_policy, domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 74d2869c0e..3fa7ad3399 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1843,8 +1843,7 @@ static int fork(struct domain *cd, struct domain *d) domain_pause(d); cd->max_pages = d->max_pages; - *cd->arch.cpuid = *d->arch.cpuid; - *cd->arch.msr = *d->arch.msr; + *cd->arch.cpu_policy = *d->arch.cpu_policy; cd->vmtrace_size = d->vmtrace_size; cd->parent = d; } diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 7819c1de4d..21a891d635 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -120,50 +120,6 @@ void __init init_guest_msr_policy(void) } } -int init_domain_msr_policy(struct domain *d) -{ - struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !mp ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - mp = xmemdup(mp); - if ( !mp ) - return -ENOMEM; - - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - mp->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - mp->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - - d->arch.msr = mp; - - return 0; -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index eef14bb426..9ba34bbf5e 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -3,6 +3,7 @@ #define X86_CPU_POLICY_H struct cpu_policy; +struct domain; extern struct cpu_policy raw_cpu_policy; extern struct cpu_policy host_cpu_policy; @@ -11,4 +12,7 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Allocate and initialise a CPU policy suitable for the domain. */ +int init_domain_cpu_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index ea05862773..7f81b998ce 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -49,9 +49,6 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Allocate and initialise a CPUID policy suitable for the domain. */ -int init_domain_cpuid_policy(struct domain *d); - /* Apply dom0-specific tweaks to the CPUID policy. */ void init_dom0_cpuid_policy(struct domain *d); diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index e4c099262c..92937d9d73 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -379,9 +379,16 @@ struct arch_domain */ uint8_t x87_fip_width; - /* CPUID and MSR policy objects. */ - struct cpuid_policy *cpuid; - struct msr_policy *msr; + /* + * The domain's CPU Policy. "cpu_policy" is considered the canonical + * pointer, but the "cpuid" and "msr" aliases exist so the most + * appropriate one can be used for local code clarity. + */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + struct cpu_policy *msr; + }; struct PITState vpit; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index f2c0022fec..38984f2b94 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -376,7 +376,6 @@ struct vcpu_msrs }; void init_guest_msr_policy(void); -int init_domain_msr_policy(struct domain *d); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581657.910760 (Exim 4.92) (envelope-from ) id 1qTtTV-0001BY-72; Thu, 10 Aug 2023 00:24:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581657.910760; Thu, 10 Aug 2023 00:24:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTV-0001BR-3r; Thu, 10 Aug 2023 00:24:25 +0000 Received: by outflank-mailman (input) for mailman id 581657; Thu, 10 Aug 2023 00:24:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTU-0001BI-9T for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTU-0001Ih-8f for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtTU-00089n-80 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XQVU8S1b2tJUVWPFsFVfMx1KA5jCMuvEXovEkmNP65w=; b=pL+gHwMsLDNFm2o7o6Z0+9/ooF x2I+XGPx+PVvlXrh0DMKeXU8Gl7LwL+yMCtGli1f1plztLOYkXCjki4i/dufWSidGdWOpK7duLcEq SMhRjh8RhHI8tGNQosaJB3gM7LAfZCmSp69f047XluRJI1Ww72JH2BDeRVfFgD2Pa6W8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Merge xc_cpu_policy's cpuid and msr objects Message-Id: Date: Thu, 10 Aug 2023 00:24:24 +0000 commit 9fd9906c5740cead915533d0b66732c5e53c9b4e Author: Andrew Cooper AuthorDate: Wed Mar 29 12:37:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Merge xc_cpu_policy's cpuid and msr objects Right now, they're the same underlying type, containing disjoint information. Use a single object instead. Also take the opportunity to rename 'entries' to 'msrs' which is more descriptive, and more in line with nr_msrs being the count of MSR entries in the API. test-tsx uses xg_private.h to access the internals of xc_cpu_policy, so needs updating at the same time. Take the opportunity to improve the code clarity by passing a cpu_policy rather than an xc_cpu_policy into some functions. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c9985233ca663fea20fc8807cf509d2e3fef0dca) --- tools/libs/guest/xg_cpuid_x86.c | 36 ++++++++++----------- tools/libs/guest/xg_private.h | 5 ++- tools/tests/tsx/test-tsx.c | 71 +++++++++++++++++++---------------------- 3 files changed, 53 insertions(+), 59 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 8d5c68c967..c1e33613cf 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -432,7 +432,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, xc_dominfo_t di; unsigned int i, nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; - struct cpuid_policy *p = NULL; + struct cpu_policy *p = NULL; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; uint32_t len = ARRAY_SIZE(host_featureset); @@ -693,7 +693,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; int rc; - rc = x86_cpuid_copy_from_buffer(&policy->cpuid, policy->leaves, + rc = x86_cpuid_copy_from_buffer(&policy->policy, policy->leaves, nr_leaves, &err_leaf, &err_subleaf); if ( rc ) { @@ -703,7 +703,7 @@ static int deserialize_policy(xc_interface *xch, xc_cpu_policy_t *policy, return rc; } - rc = x86_msr_copy_from_buffer(&policy->msr, policy->entries, + rc = x86_msr_copy_from_buffer(&policy->policy, policy->msrs, nr_entries, &err_msr); if ( rc ) { @@ -720,18 +720,18 @@ int xc_cpu_policy_get_system(xc_interface *xch, unsigned int policy_idx, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_system_cpu_policy(xch, policy_idx, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain %u policy", policy_idx); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -745,18 +745,18 @@ int xc_cpu_policy_get_domain(xc_interface *xch, uint32_t domid, xc_cpu_policy_t *policy) { unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = get_domain_cpu_policy(xch, domid, &nr_leaves, policy->leaves, - &nr_entries, policy->entries); + &nr_msrs, policy->msrs); if ( rc ) { PERROR("Failed to obtain domain %u policy", domid); return rc; } - rc = deserialize_policy(xch, policy, nr_leaves, nr_entries); + rc = deserialize_policy(xch, policy, nr_leaves, nr_msrs); if ( rc ) { errno = -rc; @@ -771,16 +771,16 @@ int xc_cpu_policy_set_domain(xc_interface *xch, uint32_t domid, { uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; unsigned int nr_leaves = ARRAY_SIZE(policy->leaves); - unsigned int nr_entries = ARRAY_SIZE(policy->entries); + unsigned int nr_msrs = ARRAY_SIZE(policy->msrs); int rc; rc = xc_cpu_policy_serialise(xch, policy, policy->leaves, &nr_leaves, - policy->entries, &nr_entries); + policy->msrs, &nr_msrs); if ( rc ) return rc; rc = xc_set_domain_cpu_policy(xch, domid, nr_leaves, policy->leaves, - nr_entries, policy->entries, + nr_msrs, policy->msrs, &err_leaf, &err_subleaf, &err_msr); if ( rc ) { @@ -803,7 +803,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( leaves ) { - rc = x86_cpuid_copy_to_buffer(&p->cpuid, leaves, nr_leaves); + rc = x86_cpuid_copy_to_buffer(&p->policy, leaves, nr_leaves); if ( rc ) { ERROR("Failed to serialize CPUID policy"); @@ -814,7 +814,7 @@ int xc_cpu_policy_serialise(xc_interface *xch, const xc_cpu_policy_t *p, if ( msrs ) { - rc = x86_msr_copy_to_buffer(&p->msr, msrs, nr_msrs); + rc = x86_msr_copy_to_buffer(&p->policy, msrs, nr_msrs); if ( rc ) { ERROR("Failed to serialize MSR policy"); @@ -832,7 +832,7 @@ int xc_cpu_policy_update_cpuid(xc_interface *xch, xc_cpu_policy_t *policy, uint32_t nr) { unsigned int err_leaf = -1, err_subleaf = -1; - int rc = x86_cpuid_copy_from_buffer(&policy->cpuid, leaves, nr, + int rc = x86_cpuid_copy_from_buffer(&policy->policy, leaves, nr, &err_leaf, &err_subleaf); if ( rc ) @@ -851,7 +851,7 @@ int xc_cpu_policy_update_msrs(xc_interface *xch, xc_cpu_policy_t *policy, const xen_msr_entry_t *msrs, uint32_t nr) { unsigned int err_msr = -1; - int rc = x86_msr_copy_from_buffer(&policy->msr, msrs, nr, &err_msr); + int rc = x86_msr_copy_from_buffer(&policy->policy, msrs, nr, &err_msr); if ( rc ) { @@ -869,8 +869,8 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->cpuid, &host->msr }; - struct old_cpu_policy g = { &guest->cpuid, &guest->msr }; + struct old_cpu_policy h = { &host->policy, &host->policy }; + struct old_cpu_policy g = { &guest->policy, &guest->policy }; int rc = x86_cpu_policies_are_compatible(&h, &g, &err); if ( !rc ) diff --git a/tools/libs/guest/xg_private.h b/tools/libs/guest/xg_private.h index 28441ee13f..d01e49df80 100644 --- a/tools/libs/guest/xg_private.h +++ b/tools/libs/guest/xg_private.h @@ -172,10 +172,9 @@ int pin_table(xc_interface *xch, unsigned int type, unsigned long mfn, #include struct xc_cpu_policy { - struct cpuid_policy cpuid; - struct msr_policy msr; + struct cpu_policy policy; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; - xen_msr_entry_t entries[MSR_MAX_SERIALISED_ENTRIES]; + xen_msr_entry_t msrs[MSR_MAX_SERIALISED_ENTRIES]; }; #endif /* x86 */ diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index f11e8c54e0..0f4ea5f9c4 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -151,15 +151,15 @@ static void test_tsx_msrs(void) { printf("Testing MSR_TSX_FORCE_ABORT consistency\n"); test_tsx_msr_consistency( - MSR_TSX_FORCE_ABORT, host.cpuid.feat.tsx_force_abort); + MSR_TSX_FORCE_ABORT, host.policy.feat.tsx_force_abort); printf("Testing MSR_TSX_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_TSX_CTRL, host.msr.arch_caps.tsx_ctrl); + MSR_TSX_CTRL, host.policy.arch_caps.tsx_ctrl); printf("Testing MSR_MCU_OPT_CTRL consistency\n"); test_tsx_msr_consistency( - MSR_MCU_OPT_CTRL, host.cpuid.feat.srbds_ctrl); + MSR_MCU_OPT_CTRL, host.policy.feat.srbds_ctrl); } /* @@ -281,7 +281,7 @@ static void test_rtm_behaviour(void) else return fail(" Got unexpected behaviour %d\n", rtm_behaviour); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { if ( rtm_behaviour == RTM_UD ) fail(" Host reports RTM, but appears unavailable\n"); @@ -293,57 +293,52 @@ static void test_rtm_behaviour(void) } } -static void dump_tsx_details(const struct xc_cpu_policy *p, const char *pref) +static void dump_tsx_details(const struct cpu_policy *p, const char *pref) { printf(" %s RTM %u, HLE %u, TSX_FORCE_ABORT %u, RTM_ALWAYS_ABORT %u, TSX_CTRL %u\n", pref, - p->cpuid.feat.rtm, - p->cpuid.feat.hle, - p->cpuid.feat.tsx_force_abort, - p->cpuid.feat.rtm_always_abort, - p->msr.arch_caps.tsx_ctrl); + p->feat.rtm, + p->feat.hle, + p->feat.tsx_force_abort, + p->feat.rtm_always_abort, + p->arch_caps.tsx_ctrl); } /* Sanity test various invariants we expect in the default/max policies. */ -static void test_guest_policies(const struct xc_cpu_policy *max, - const struct xc_cpu_policy *def) +static void test_guest_policies(const struct cpu_policy *max, + const struct cpu_policy *def) { - const struct cpuid_policy *cm = &max->cpuid; - const struct cpuid_policy *cd = &def->cpuid; - const struct msr_policy *mm = &max->msr; - const struct msr_policy *md = &def->msr; - dump_tsx_details(max, "Max:"); dump_tsx_details(def, "Def:"); - if ( ((cm->feat.raw[0].d | cd->feat.raw[0].d) & + if ( ((max->feat.raw[0].d | def->feat.raw[0].d) & (bitmaskof(X86_FEATURE_TSX_FORCE_ABORT) | bitmaskof(X86_FEATURE_RTM_ALWAYS_ABORT) | bitmaskof(X86_FEATURE_SRBDS_CTRL))) || - ((mm->arch_caps.raw | md->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) + ((max->arch_caps.raw | def->arch_caps.raw) & ARCH_CAPS_TSX_CTRL) ) fail(" Xen-only TSX controls offered to guest\n"); switch ( rtm_behaviour ) { case RTM_UD: - if ( (cm->feat.raw[0].b | cd->feat.raw[0].b) & + if ( (max->feat.raw[0].b | def->feat.raw[0].b) & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests despite not being available\n"); break; case RTM_ABORT: - if ( cd->feat.raw[0].b & + if ( def->feat.raw[0].b & (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM)) ) fail(" HLE/RTM offered to guests by default despite not being usable\n"); break; case RTM_OK: - if ( !cm->feat.rtm || !cd->feat.rtm ) + if ( !max->feat.rtm || !def->feat.rtm ) fail(" RTM not offered to guests despite being available\n"); break; } - if ( cd->feat.hle ) + if ( def->feat.hle ) fail(" Fail: HLE offered in default policy\n"); } @@ -352,13 +347,13 @@ static void test_def_max_policies(void) if ( xen_has_pv ) { printf("Testing PV default/max policies\n"); - test_guest_policies(&pv_max, &pv_default); + test_guest_policies(&pv_max.policy, &pv_default.policy); } if ( xen_has_hvm ) { printf("Testing HVM default/max policies\n"); - test_guest_policies(&hvm_max, &hvm_default); + test_guest_policies(&hvm_max.policy, &hvm_default.policy); } } @@ -382,23 +377,23 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); /* * Check defaults given to the guest. */ - if ( guest_policy.cpuid.feat.rtm != (rtm_behaviour == RTM_OK) ) + if ( guest_policy.policy.feat.rtm != (rtm_behaviour == RTM_OK) ) fail(" RTM %u in guest, despite rtm behaviour\n", - guest_policy.cpuid.feat.rtm); + guest_policy.policy.feat.rtm); - if ( guest_policy.cpuid.feat.hle || - guest_policy.cpuid.feat.tsx_force_abort || - guest_policy.cpuid.feat.rtm_always_abort || - guest_policy.cpuid.feat.srbds_ctrl || - guest_policy.msr.arch_caps.tsx_ctrl ) + if ( guest_policy.policy.feat.hle || + guest_policy.policy.feat.tsx_force_abort || + guest_policy.policy.feat.rtm_always_abort || + guest_policy.policy.feat.srbds_ctrl || + guest_policy.policy.arch_caps.tsx_ctrl ) fail(" Unexpected features advertised\n"); - if ( host.cpuid.feat.rtm ) + if ( host.policy.feat.rtm ) { unsigned int _7b0; @@ -406,7 +401,7 @@ static void test_guest(struct xen_domctl_createdomain *c) * If host RTM is available, all combinations of guest flags should be * possible. Flip both HLE/RTM to check non-default settings. */ - _7b0 = (guest_policy.cpuid.feat.raw[0].b ^= + _7b0 = (guest_policy.policy.feat.raw[0].b ^= (bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_RTM))); /* Set the new policy. */ @@ -427,12 +422,12 @@ static void test_guest(struct xen_domctl_createdomain *c) goto out; } - dump_tsx_details(&guest_policy, "Cur:"); + dump_tsx_details(&guest_policy.policy, "Cur:"); - if ( guest_policy.cpuid.feat.raw[0].b != _7b0 ) + if ( guest_policy.policy.feat.raw[0].b != _7b0 ) { fail(" Expected CPUID.7[1].b 0x%08x differs from actual 0x%08x\n", - _7b0, guest_policy.cpuid.feat.raw[0].b); + _7b0, guest_policy.policy.feat.raw[0].b); goto out; } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581658.910762 (Exim 4.92) (envelope-from ) id 1qTtTf-0001Em-9X; Thu, 10 Aug 2023 00:24:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581658.910762; Thu, 10 Aug 2023 00:24:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTf-0001Ef-6z; Thu, 10 Aug 2023 00:24:35 +0000 Received: by outflank-mailman (input) for mailman id 581658; Thu, 10 Aug 2023 00:24:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTe-0001EV-CY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTe-0001In-Bp for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtTe-0008Ab-B5 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4fv5CF3z/KnAz8KnIS2Et/ffaSBrZBFxEXFpRN++KLo=; b=KI8nDZEHR5nojeXw5/BD6UR5sE mikay3gCRmnDpxt7e0oaroNBexLQRG+KIWQFhTZ4ydWN7Gv//Lh2sF7HqQD8bB7Qq0L4QB+rmbAlX cVCgT+2pNNAvwH64KnNMEacgqpBA9sml9EOstWgZ6qVyw83f1t2Ki6hORml7Va/NJJO4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Drop struct old_cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:24:34 +0000 commit 0b8a347d7bcc47e209f266c75e4af661675dd577 Author: Andrew Cooper AuthorDate: Wed Mar 29 12:01:33 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Drop struct old_cpu_policy With all the complicated callers of x86_cpu_policies_are_compatible() updated to use a single cpu_policy object, we can drop the final user of struct old_cpu_policy. Update x86_cpu_policies_are_compatible() to take (new) cpu_policy pointers, reducing the amount of internal pointer chasing, and update all callers to pass their cpu_policy objects directly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 66c5c99656314451ff9520f91cff5bb39fee9fed) --- tools/libs/guest/xg_cpuid_x86.c | 4 +-- tools/tests/cpu-policy/test-cpu-policy.c | 50 ++++++++++---------------------- xen/arch/x86/domctl.c | 7 ++--- xen/include/xen/lib/x86/cpu-policy.h | 12 ++------ xen/lib/x86/policy.c | 12 ++++---- 5 files changed, 27 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index c1e33613cf..7fd014184e 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -869,9 +869,7 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host, xc_cpu_policy_t *guest) { struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; - struct old_cpu_policy h = { &host->policy, &host->policy }; - struct old_cpu_policy g = { &guest->policy, &guest->policy }; - int rc = x86_cpu_policies_are_compatible(&h, &g, &err); + int rc = x86_cpu_policies_are_compatible(&host->policy, &guest->policy, &err); if ( !rc ) return true; diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 8a223fddb3..4f3d09f1b7 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -98,7 +98,7 @@ static bool msrs_are_sorted(const xen_msr_entry_t *entries, unsigned int nr) static void test_cpuid_current(void) { - struct cpuid_policy p; + struct cpu_policy p; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; unsigned int nr = ARRAY_SIZE(leaves); int rc; @@ -118,7 +118,7 @@ static void test_cpuid_current(void) static void test_cpuid_serialise_success(void) { static const struct test { - struct cpuid_policy p; + struct cpu_policy p; const char *name; unsigned int nr_leaves; } tests[] = { @@ -242,7 +242,7 @@ static void test_cpuid_serialise_success(void) static void test_msr_serialise_success(void) { static const struct test { - struct msr_policy p; + struct cpu_policy p; const char *name; unsigned int nr_msrs; } tests[] = { @@ -430,7 +430,7 @@ static void test_cpuid_out_of_range_clearing(void) static const struct test { const char *name; unsigned int nr_markers; - struct cpuid_policy p; + struct cpu_policy p; } tests[] = { { .name = "basic", @@ -550,7 +550,7 @@ static void test_cpuid_out_of_range_clearing(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { const struct test *t = &tests[i]; - struct cpuid_policy *p = memdup(&t->p); + struct cpu_policy *p = memdup(&t->p); void *ptr; unsigned int nr_markers; @@ -574,23 +574,20 @@ static void test_is_compatible_success(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; } tests[] = { { .name = "Host CPUID faulting, Guest not", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, }, { .name = "Host CPUID faulting, Guest wanted", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, }, @@ -602,15 +599,8 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res != 0 || memcmp(&no_errors, &e, sizeof(no_errors)) ) @@ -624,25 +614,22 @@ static void test_is_compatible_failure(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; struct cpu_policy_errors e; } tests[] = { { .name = "Host basic.max_leaf out of range", - .guest_cpuid.basic.max_leaf = 1, + .guest.basic.max_leaf = 1, .e = { 0, -1, -1 }, }, { .name = "Host extd.max_leaf out of range", - .guest_cpuid.extd.max_leaf = 1, + .guest.extd.max_leaf = 1, .e = { 0x80000000, -1, -1 }, }, { .name = "Host no CPUID faulting, Guest wanted", - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, .e = { -1, -1, 0xce }, @@ -654,15 +641,8 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res == 0 || memcmp(&t->e, &e, sizeof(t->e)) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index c8a3199bdc..2573f97065 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -51,10 +51,9 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct cpu_policy *new; - struct cpu_policy *sys = is_pv_domain(d) + const struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -68,8 +67,6 @@ static int update_domain_cpu_policy(struct domain *d, if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; - old_new = (struct old_cpu_policy){ new, new }; - /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( new, xdpc->leaves, xdpc->nr_leaves, @@ -82,7 +79,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); + ret = x86_cpu_policies_are_compatible(sys, new, &err); if ( ret ) goto out; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 53fffca552..8b27a0725b 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -379,12 +379,6 @@ struct cpu_policy #define cpuid_policy cpu_policy #define msr_policy cpu_policy -struct old_cpu_policy -{ - struct cpuid_policy *cpuid; - struct msr_policy *msr; -}; - struct cpu_policy_errors { uint32_t leaf, subleaf; @@ -559,7 +553,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); -/* +/** * Calculate whether two policies are compatible. * * i.e. Can a VM configured with @guest run on a CPU supporting @host. @@ -573,8 +567,8 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index 2975711d7c..a9c60000af 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; @@ -15,18 +15,18 @@ int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->cpuid->basic.max_leaf > host->cpuid->basic.max_leaf ) + if ( guest->basic.max_leaf > host->basic.max_leaf ) FAIL_CPUID(0, NA); - if ( guest->cpuid->feat.max_subleaf > host->cpuid->feat.max_subleaf ) + if ( guest->feat.max_subleaf > host->feat.max_subleaf ) FAIL_CPUID(7, 0); - if ( guest->cpuid->extd.max_leaf > host->cpuid->extd.max_leaf ) + if ( guest->extd.max_leaf > host->extd.max_leaf ) FAIL_CPUID(0x80000000, NA); /* TODO: Audit more CPUID data. */ - if ( ~host->msr->platform_info.raw & guest->msr->platform_info.raw ) + if ( ~host->platform_info.raw & guest->platform_info.raw ) FAIL_MSR(MSR_INTEL_PLATFORM_INFO); #undef FAIL_MSR -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581659.910767 (Exim 4.92) (envelope-from ) id 1qTtTp-0001HO-BS; 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Thu, 10 Aug 2023 00:24:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=o8pFu6oOmmQg8iep4jMCqD5hbi1TgjiQcsdJgAfa/1A=; b=x8+qwsFa1QUqXljo4aqfQYBiWK G0vklDN4eEZLDul76QxkmvRoARz5kyX/Hwi/d8QEkIkyxI2yrKUlQGYsZUgyqVL5S3XS0Xgjs09Y5 C1DsIrIGN64TVHoiuyDAith9DUtgT0eckIBHJkDhBqtqQYgCHHcmlul/aCKx6OD95jVU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Out-of-inline the policy<->featureset convertors Message-Id: Date: Thu, 10 Aug 2023 00:24:44 +0000 commit 31bdc9d1b9dfe4c18939b2fde0c7b1d6757549ff Author: Andrew Cooper AuthorDate: Thu Mar 30 18:21:01 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Out-of-inline the policy<->featureset convertors These are already getting over-large for being inline functions, and are only going to grow further over time. Out of line them, yielding the following net delta from bloat-o-meter: add/remove: 2/0 grow/shrink: 0/4 up/down: 276/-1877 (-1601) Switch to the newer cpu_policy terminology while doing so. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1027df4c00823f8b448e3a6861cc7b6ce61ba4e4) --- tools/libs/guest/xg_cpuid_x86.c | 2 +- xen/arch/x86/cpuid.c | 28 +++++++++---------- xen/arch/x86/sysctl.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 52 +++++++----------------------------- xen/lib/x86/cpuid.c | 42 +++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 7fd014184e..76dc7932a4 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -566,7 +566,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - cpuid_featureset_to_policy(feat, p); + x86_cpu_featureset_to_policy(feat, p); } else { diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index dc0e955a12..20d0462d98 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -367,7 +367,7 @@ static void __init calculate_host_policy(void) p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, ARRAY_SIZE(p->extd.raw) - 1); - cpuid_featureset_to_policy(boot_cpu_data.x86_capability, p); + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); recalculate_xstate(p); recalculate_misc(p); @@ -449,7 +449,7 @@ static void __init calculate_pv_max_policy(void) unsigned int i; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_max_featuremask[i]; @@ -467,7 +467,7 @@ static void __init calculate_pv_max_policy(void) guest_common_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ @@ -480,7 +480,7 @@ static void __init calculate_pv_def_policy(void) unsigned int i; *p = pv_max_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_def_featuremask[i]; @@ -489,7 +489,7 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); } @@ -501,7 +501,7 @@ static void __init calculate_hvm_max_policy(void) const uint32_t *hvm_featuremask; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_max_featuremask : hvm_shadow_max_featuremask; @@ -557,7 +557,7 @@ static void __init calculate_hvm_max_policy(void) guest_common_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -569,7 +569,7 @@ static void __init calculate_hvm_def_policy(void) const uint32_t *hvm_featuremask; *p = hvm_max_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_def_featuremask : hvm_shadow_def_featuremask; @@ -581,7 +581,7 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -651,8 +651,8 @@ void recalculate_cpuid_policy(struct domain *d) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); - cpuid_policy_to_featureset(p, fs); - cpuid_policy_to_featureset(max, max_fs); + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); if ( is_hvm_domain(d) ) { @@ -709,7 +709,7 @@ void recalculate_cpuid_policy(struct domain *d) (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); /* Pass host cacheline size through to guests. */ p->basic.clflush_size = max->basic.clflush_size; @@ -775,7 +775,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) uint32_t fs[FSCAPINTS]; unsigned int i; - cpuid_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(p, fs); for ( i = 0; i < ARRAY_SIZE(fs); ++i ) { @@ -783,7 +783,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) fs[i] &= ~dom0_disable_feat[i]; } - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); recalculate_cpuid_policy(d); } diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 16a6dbb069..16dc615640 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -339,7 +339,7 @@ long arch_do_sysctl( ret = -EINVAL; if ( !ret ) - cpuid_policy_to_featureset(p, featureset); + x86_cpu_policy_to_featureset(p, featureset); /* Copy the requested featureset into place. */ if ( !ret && copy_to_guest(sysctl->u.cpu_featureset.features, diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 8b27a0725b..57b4633c86 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -387,49 +387,17 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} +/** + * Copy the featureset words out of a cpu_policy object. + */ +void x86_cpu_policy_to_featureset(const struct cpu_policy *p, + uint32_t fs[FEATURESET_NR_ENTRIES]); -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} +/** + * Copy the featureset words back into a cpu_policy object. + */ +void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], + struct cpu_policy *p); static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) { diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e81f76c779..734e90823a 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -60,6 +60,48 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor) } } +void x86_cpu_policy_to_featureset( + const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +void x86_cpu_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:24:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:24:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581660.910771 (Exim 4.92) (envelope-from ) id 1qTtTz-0001K2-DW; Thu, 10 Aug 2023 00:24:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581660.910771; Thu, 10 Aug 2023 00:24:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTz-0001Jt-AH; Thu, 10 Aug 2023 00:24:55 +0000 Received: by outflank-mailman (input) for mailman id 581660; Thu, 10 Aug 2023 00:24:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTy-0001Jm-J0 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtTy-0001JG-IJ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtTy-0008BY-Hh for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:24:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gBqtYWOwfO2QuQptyS0hOBY/8npzvDRnsa97uWUC/f4=; b=DrQP3HjwGdr1nhbHMaK9srfIqs n41bIfYMBDHFht4r74luBTIBGJorjF99xQUVNb3AptWK8H7gi5Al3qNRBGL9XQwLbbJRAc+WWiaR1 IKLR+H/TCqc7/h4ohh8749AZebMSLDAMM2Pr7UKS8fk14xVHgyDeaprGOm1ROksf3LOM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Move MSR policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 10 Aug 2023 00:24:54 +0000 commit 56b9ce39ce43390b44099cc9b8c058a8aac918d3 Author: Andrew Cooper AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be) --- xen/arch/x86/cpu-policy.c | 84 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/msr.c | 84 ---------------------------------------- xen/arch/x86/setup.c | 3 +- xen/include/asm-x86/cpu-policy.h | 3 ++ xen/include/asm-x86/msr.h | 1 - 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 4c5fd70cf1..d774d281c2 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 21a891d635..61d74374f8 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -36,90 +36,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d2df3047f3..a6e2e90dc9 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -51,6 +51,7 @@ #include #include #include +#include #include #include #include @@ -1991,7 +1992,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 38984f2b94..60627710f5 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -375,7 +375,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581661.910775 (Exim 4.92) (envelope-from ) id 1qTtU9-0001Oj-H8; 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Thu, 10 Aug 2023 00:25:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=K3tTGLamgqYlveW2FbNOK298O0Pvk6XMMvnQClGfb80=; b=S157BsdPExIflI+julN6dKfhp0 X35L7uJeVc1fhUWHbDLgmvUtD2wFqtQIMw/8oa5hov9Y1Z3W4J99tLoCMHATGjs6LeJ2khzU7bI1X bzUy9CwoaMkpYRVa90qdoquZW/+fOicpUbIabudhX4VDE4pG7Qipal0Zup6rRZilk7EI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 10 Aug 2023 00:25:04 +0000 commit 6d05849626000c4bc53c8312d06c56c3c6539359 Author: Andrew Cooper AuthorDate: Mon Apr 3 19:06:02 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. Do some easy cleanup of includes. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 8eb56eb959a50bf9afd0fd590ec394e9145970a4) --- xen/arch/x86/cpu-policy.c | 722 +++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 785 +-------------------------------------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/pv/domain.c | 1 + xen/arch/x86/setup.c | 2 - xen/include/asm-x86/cpu-policy.h | 6 + xen/include/asm-x86/cpuid.h | 11 +- 7 files changed, 734 insertions(+), 794 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index d774d281c2..e311fe142b 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,13 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include #include +#include +#include #include +#include #include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -20,10 +26,332 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +const uint32_t known_features[] = INIT_KNOWN_FEATURES; + +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t deep_features[] = INIT_DEEP_FEATURES; + +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) +{ + const char *ss; + int val, rc = 0; + + do { + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; + const char *feat; + + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + /* Skip the 'no-' prefix for name comparisons. */ + feat = s; + if ( strncmp(s, "no-", 3) == 0 ) + feat += 3; + + /* (Re)initalise lhs and rhs for binary search. */ + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); + + while ( lhs < rhs ) + { + int res; + + mid = lhs + (rhs - lhs) / 2; + res = cmdline_strcmp(feat, mid->name); + + if ( res < 0 ) + { + rhs = mid; + continue; + } + if ( res > 0 ) + { + lhs = mid + 1; + continue; + } + + if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) + { + callback(mid->bit, val); + mid = NULL; + } + + break; + } + + /* + * Mid being NULL means that the name and boolean were successfully + * identified. Everything else is an error. + */ + if ( mid ) + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} +custom_param("cpuid", parse_xen_cpuid); + +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + +#define EMPTY_LEAF ((struct cpuid_leaf){}) +static void zero_leaves(struct cpuid_leaf *l, + unsigned int first, unsigned int last) +{ + memset(&l[first], 0, sizeof(*l) * (last - first + 1)); +} + +static void sanitise_featureset(uint32_t *fs) +{ + /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ + uint32_t disabled_features[ + ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; + unsigned int i; + + for ( i = 0; i < FSCAPINTS; ++i ) + { + /* Clamp to known mask. */ + fs[i] &= known_features[i]; + + /* + * Identify which features with deep dependencies have been + * disabled. + */ + disabled_features[i] = ~fs[i] & deep_features[i]; + } + + for_each_set_bit(i, (void *)disabled_features, + sizeof(disabled_features) * 8) + { + const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + unsigned int j; + + ASSERT(dfs); /* deep_features[] should guarentee this. */ + + for ( j = 0; j < FSCAPINTS; ++j ) + { + fs[j] &= ~dfs[j]; + disabled_features[j] &= ~dfs[j]; + } + } +} + +static void recalculate_xstate(struct cpu_policy *p) +{ + uint64_t xstates = XSTATE_FP_SSE; + uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; + unsigned int i, Da1 = p->xstate.Da1; + + /* + * The Da1 leaf is the only piece of information preserved in the common + * case. Everything else is derived from other feature state. + */ + memset(&p->xstate, 0, sizeof(p->xstate)); + + if ( !p->basic.xsave ) + return; + + if ( p->basic.avx ) + { + xstates |= X86_XCR0_YMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_YMM_POS] + + xstate_sizes[X86_XCR0_YMM_POS]); + } + + if ( p->feat.mpx ) + { + xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_BNDCSR_POS] + + xstate_sizes[X86_XCR0_BNDCSR_POS]); + } + + if ( p->feat.avx512f ) + { + xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_HI_ZMM_POS] + + xstate_sizes[X86_XCR0_HI_ZMM_POS]); + } + + if ( p->feat.pku ) + { + xstates |= X86_XCR0_PKRU; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_PKRU_POS] + + xstate_sizes[X86_XCR0_PKRU_POS]); + } + + p->xstate.max_size = xstate_size; + p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; + p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; + + p->xstate.Da1 = Da1; + if ( p->xstate.xsaves ) + { + p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; + p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; + } + else + xstates &= ~XSTATE_XSAVES_ONLY; + + for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + { + uint64_t curr_xstate = 1ul << i; + + if ( !(xstates & curr_xstate) ) + continue; + + p->xstate.comp[i].size = xstate_sizes[i]; + p->xstate.comp[i].offset = xstate_offsets[i]; + p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; + p->xstate.comp[i].align = curr_xstate & xstate_align; + } +} + +/* + * Misc adjustments to the policy. Mostly clobbering reserved fields and + * duplicating shared fields. Intentionally hidden fields are annotated. + */ +static void recalculate_misc(struct cpu_policy *p) +{ + p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ + p->basic.apic_id = 0; /* Dynamic. */ + + p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ + p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ + + p->basic.raw[0x8] = EMPTY_LEAF; + + /* TODO: Rework topology logic. */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + p->basic.raw[0xc] = EMPTY_LEAF; + + p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; + + /* Most of Power/RAS hidden from guests. */ + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; + + p->extd.raw[0x8].d = 0; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ + p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ + p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ + + p->extd.vendor_ebx = 0; + p->extd.vendor_ecx = 0; + p->extd.vendor_edx = 0; + + p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; + + p->extd.raw[0x5] = EMPTY_LEAF; + p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; + + p->extd.raw[0x8].a &= 0x0000ffff; + p->extd.raw[0x8].c = 0; + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + zero_leaves(p->basic.raw, 0x2, 0x3); + memset(p->cache.raw, 0, sizeof(p->cache.raw)); + zero_leaves(p->basic.raw, 0x9, 0xa); + + p->extd.vendor_ebx = p->basic.vendor_ebx; + p->extd.vendor_ecx = p->basic.vendor_ecx; + p->extd.vendor_edx = p->basic.vendor_edx; + + p->extd.raw_fms = p->basic.raw_fms; + p->extd.raw[0x1].b &= 0xff00ffff; + p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; + + p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ + p->extd.raw[0x8].c &= 0x0003f0ff; + + p->extd.raw[0x9] = EMPTY_LEAF; + + zero_leaves(p->extd.raw, 0xb, 0x18); + + /* 0x19 - TLB details. Pass through. */ + /* 0x1a - Perf hints. Pass through. */ + + p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ + p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ + p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ + p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ + p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ + p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ + break; + } +} + static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; + x86_cpuid_policy_fill_native(p); + + /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ + ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -34,9 +362,50 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { struct cpu_policy *p = &host_cpu_policy; + unsigned int max_extd_leaf; *p = raw_cpu_policy; + p->basic.max_leaf = + min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); + p->feat.max_subleaf = + min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); + + max_extd_leaf = p->extd.max_leaf; + + /* + * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be + * dispatch serialising for Spectre mitigations. Extend max_extd_leaf + * beyond what hardware supports, to include the feature leaf containing + * this information. + */ + if ( cpu_has_lfence_dispatch ) + max_extd_leaf = max(max_extd_leaf, 0x80000021); + + p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, + ARRAY_SIZE(p->extd.raw) - 1); + + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); + recalculate_xstate(p); + recalculate_misc(p); + + /* When vPMU is disabled, drop it from the host policy. */ + if ( vpmu_mode == XENPMU_MODE_OFF ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( p->extd.svm ) + { + /* Clamp to implemented features which require hardware support. */ + p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | + (1u << SVM_FEATURE_LBRV) | + (1u << SVM_FEATURE_NRIPS) | + (1u << SVM_FEATURE_PAUSEFILTER) | + (1u << SVM_FEATURE_DECODEASSISTS)); + /* Enable features which are always emulated. */ + p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | + (1u << SVM_FEATURE_TSCRATEMSR)); + } + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; @@ -51,11 +420,88 @@ static void __init calculate_host_policy(void) ARCH_CAPS_PBRSB_NO); } +static void __init guest_common_default_feature_adjustments(uint32_t *fs) +{ + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * On certain hardware, speculative or errata workarounds can result in + * TSX being placed in "force-abort" mode, where it doesn't actually + * function as expected, but is technically compatible with the ISA. + * + * Do not advertise RTM to guests by default if it won't actually work. + */ + if ( rtm_disabled ) + __clear_bit(X86_FEATURE_RTM, fs); +} + +static void __init guest_common_feature_adjustments(uint32_t *fs) +{ + /* Unconditionally claim to be able to set the hypervisor bit. */ + __set_bit(X86_FEATURE_HYPERVISOR, fs); + + /* + * If IBRS is offered to the guest, unconditionally offer STIBP. It is a + * nop on non-HT hardware, and has this behaviour to make heterogeneous + * setups easier to manage. + */ + if ( test_bit(X86_FEATURE_IBRSB, fs) ) + __set_bit(X86_FEATURE_STIBP, fs); + if ( test_bit(X86_FEATURE_IBRS, fs) ) + __set_bit(X86_FEATURE_AMD_STIBP, fs); + + /* + * On hardware which supports IBRS/IBPB, we can offer IBPB independently + * of IBRS by using the AMD feature bit. An administrator may wish for + * performance reasons to offer IBPB without IBRS. + */ + if ( host_cpu_policy.feat.ibrsb ) + __set_bit(X86_FEATURE_IBPB, fs); +} + static void __init calculate_pv_max_policy(void) { struct cpu_policy *p = &pv_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_max_featuremask[i]; + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); + + p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ p->arch_caps.raw = 0; /* Not supported yet. */ } @@ -63,15 +509,89 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { struct cpu_policy *p = &pv_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = pv_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_def_featuremask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } static void __init calculate_hvm_max_policy(void) { struct cpu_policy *p = &hvm_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_max_featuremask : hvm_shadow_max_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + /* + * Xen can provide an (x2)APIC emulation to HVM guests even if the host's + * (x2)APIC isn't enabled. + */ + __set_bit(X86_FEATURE_APIC, fs); + __set_bit(X86_FEATURE_X2APIC, fs); + + /* + * We don't support EFER.LMSLE at all. AMD has dropped the feature from + * hardware and allocated a CPUID bit to indicate its absence. + */ + __set_bit(X86_FEATURE_NO_LMSL, fs); + + /* + * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in + * long mode (and init_amd() has cleared it out of host capabilities), but + * HVM guests are able if running in protected mode. + */ + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + raw_cpu_policy.basic.sep ) + __set_bit(X86_FEATURE_SEP, fs); + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + /* + * With VT-x, some features are only supported by Xen if dedicated + * hardware support is also available. + */ + if ( cpu_has_vmx ) + { + if ( !cpu_has_vmx_mpx ) + __clear_bit(X86_FEATURE_MPX, fs); + + if ( !cpu_has_vmx_xsaves ) + __clear_bit(X86_FEATURE_XSAVES, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; @@ -82,8 +602,25 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { struct cpu_policy *p = &hvm_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = hvm_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_def_featuremask : hvm_shadow_def_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } void __init init_guest_cpu_policies(void) @@ -149,3 +686,188 @@ int init_domain_cpu_policy(struct domain *d) return 0; } + +void recalculate_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + const struct cpu_policy *max = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; + unsigned int i; + + if ( !max ) + { + ASSERT_UNREACHABLE(); + return; + } + + p->x86_vendor = x86_cpuid_lookup_vendor( + p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); + + p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); + p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); + p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, + ((p->x86_vendor & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) + ? CPUID_GUEST_NR_EXTD_AMD + : CPUID_GUEST_NR_EXTD_INTEL) - 1); + + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); + + if ( is_hvm_domain(d) ) + { + /* + * HVM domains using Shadow paging have further restrictions on their + * available paging features. + */ + if ( !hap_enabled(d) ) + { + for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) + max_fs[i] &= hvm_shadow_max_featuremask[i]; + } + + /* Hide nested-virt if it hasn't been explicitly configured. */ + if ( !nestedhvm_enabled(d) ) + { + __clear_bit(X86_FEATURE_VMX, max_fs); + __clear_bit(X86_FEATURE_SVM, max_fs); + } + } + + /* + * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits + * affect how to interpret topology information in other cpuid leaves. + */ + __set_bit(X86_FEATURE_HTT, max_fs); + __set_bit(X86_FEATURE_X2APIC, max_fs); + __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); + + /* + * 32bit PV domains can't use any Long Mode features, and cannot use + * SYSCALL on non-AMD hardware. + */ + if ( is_pv_32bit_domain(d) ) + { + __clear_bit(X86_FEATURE_LM, max_fs); + if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + __clear_bit(X86_FEATURE_SYSCALL, max_fs); + } + + /* Clamp the toolstacks choices to reality. */ + for ( i = 0; i < ARRAY_SIZE(fs); i++ ) + fs[i] &= max_fs[i]; + + if ( p->basic.max_leaf < XSTATE_CPUID ) + __clear_bit(X86_FEATURE_XSAVE, fs); + + sanitise_featureset(fs); + + /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ + fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & + (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); + + x86_cpu_featureset_to_policy(fs, p); + + /* Pass host cacheline size through to guests. */ + p->basic.clflush_size = max->basic.clflush_size; + + p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); + p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, + paging_max_paddr_bits(d)); + p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, + (p->basic.pae || p->basic.pse36) ? 36 : 32); + + p->extd.maxlinaddr = p->extd.lm ? 48 : 32; + + recalculate_xstate(p); + recalculate_misc(p); + + for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) + { + if ( p->cache.subleaf[i].type >= 1 && + p->cache.subleaf[i].type <= 3 ) + { + /* Subleaf has a valid cache type. Zero reserved fields. */ + p->cache.raw[i].a &= 0xffffc3ffu; + p->cache.raw[i].d &= 0x00000007u; + } + else + { + /* Subleaf is not valid. Zero the rest of the union. */ + zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); + break; + } + } + + if ( vpmu_mode == XENPMU_MODE_OFF || + ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.svm ) + p->extd.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.page1gb ) + p->extd.raw[0x19] = EMPTY_LEAF; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( cpu_has_arch_caps ) + p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + x86_cpu_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } +} + +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); + + /* Find some more clever allocation scheme if this trips. */ + BUILD_BUG_ON(sizeof(struct cpu_policy) > PAGE_SIZE); + + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 20d0462d98..aa1af2e1cc 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -1,607 +1,15 @@ -#include -#include -#include #include #include +#include + +#include + #include #include -#include -#include -#include #include -#include -#include -#include #include -const uint32_t known_features[] = INIT_KNOWN_FEATURES; - -static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; -static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t __initconst hvm_hap_max_featuremask[] = - INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t __initconst hvm_shadow_def_featuremask[] = - INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t __initconst hvm_hap_def_featuremask[] = - INIT_HVM_HAP_DEF_FEATURES; -static const uint32_t deep_features[] = INIT_DEEP_FEATURES; - -static const struct feature_name { - const char *name; - unsigned int bit; -} feature_names[] __initconstrel = INIT_FEATURE_NAMES; - -/* - * Parse a list of cpuid feature names -> bool, calling the callback for any - * matches found. - * - * always_inline, because this is init code only and we really don't want a - * function pointer call in the middle of the loop. - */ -static int __init always_inline parse_cpuid( - const char *s, void (*callback)(unsigned int feat, bool val)) -{ - const char *ss; - int val, rc = 0; - - do { - const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; - const char *feat; - - ss = strchr(s, ','); - if ( !ss ) - ss = strchr(s, '\0'); - - /* Skip the 'no-' prefix for name comparisons. */ - feat = s; - if ( strncmp(s, "no-", 3) == 0 ) - feat += 3; - - /* (Re)initalise lhs and rhs for binary search. */ - lhs = feature_names; - rhs = feature_names + ARRAY_SIZE(feature_names); - - while ( lhs < rhs ) - { - int res; - - mid = lhs + (rhs - lhs) / 2; - res = cmdline_strcmp(feat, mid->name); - - if ( res < 0 ) - { - rhs = mid; - continue; - } - if ( res > 0 ) - { - lhs = mid + 1; - continue; - } - - if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) - { - callback(mid->bit, val); - mid = NULL; - } - - break; - } - - /* - * Mid being NULL means that the name and boolean were successfully - * identified. Everything else is an error. - */ - if ( mid ) - rc = -EINVAL; - - s = ss + 1; - } while ( *ss ); - - return rc; -} - -static void __init _parse_xen_cpuid(unsigned int feat, bool val) -{ - if ( !val ) - setup_clear_cpu_cap(feat); - else if ( feat == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); -} - -static int __init parse_xen_cpuid(const char *s) -{ - return parse_cpuid(s, _parse_xen_cpuid); -} -custom_param("cpuid", parse_xen_cpuid); - -static bool __initdata dom0_cpuid_cmdline; -static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; -static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; - -static void __init _parse_dom0_cpuid(unsigned int feat, bool val) -{ - __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); - __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); -} - -static int __init parse_dom0_cpuid(const char *s) -{ - dom0_cpuid_cmdline = true; - - return parse_cpuid(s, _parse_dom0_cpuid); -} -custom_param("dom0-cpuid", parse_dom0_cpuid); - #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void zero_leaves(struct cpuid_leaf *l, - unsigned int first, unsigned int last) -{ - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); -} - -static void sanitise_featureset(uint32_t *fs) -{ - /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ - uint32_t disabled_features[ - ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; - unsigned int i; - - for ( i = 0; i < FSCAPINTS; ++i ) - { - /* Clamp to known mask. */ - fs[i] &= known_features[i]; - - /* - * Identify which features with deep dependencies have been - * disabled. - */ - disabled_features[i] = ~fs[i] & deep_features[i]; - } - - for_each_set_bit(i, (void *)disabled_features, - sizeof(disabled_features) * 8) - { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); - unsigned int j; - - ASSERT(dfs); /* deep_features[] should guarentee this. */ - - for ( j = 0; j < FSCAPINTS; ++j ) - { - fs[j] &= ~dfs[j]; - disabled_features[j] &= ~dfs[j]; - } - } -} - -static void recalculate_xstate(struct cpuid_policy *p) -{ - uint64_t xstates = XSTATE_FP_SSE; - uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; - unsigned int i, Da1 = p->xstate.Da1; - - /* - * The Da1 leaf is the only piece of information preserved in the common - * case. Everything else is derived from other feature state. - */ - memset(&p->xstate, 0, sizeof(p->xstate)); - - if ( !p->basic.xsave ) - return; - - if ( p->basic.avx ) - { - xstates |= X86_XCR0_YMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_YMM_POS] + - xstate_sizes[X86_XCR0_YMM_POS]); - } - - if ( p->feat.mpx ) - { - xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_BNDCSR_POS] + - xstate_sizes[X86_XCR0_BNDCSR_POS]); - } - - if ( p->feat.avx512f ) - { - xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_HI_ZMM_POS] + - xstate_sizes[X86_XCR0_HI_ZMM_POS]); - } - - if ( p->feat.pku ) - { - xstates |= X86_XCR0_PKRU; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_PKRU_POS] + - xstate_sizes[X86_XCR0_PKRU_POS]); - } - - p->xstate.max_size = xstate_size; - p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; - p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; - - p->xstate.Da1 = Da1; - if ( p->xstate.xsaves ) - { - p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; - p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; - } - else - xstates &= ~XSTATE_XSAVES_ONLY; - - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) - { - uint64_t curr_xstate = 1ul << i; - - if ( !(xstates & curr_xstate) ) - continue; - - p->xstate.comp[i].size = xstate_sizes[i]; - p->xstate.comp[i].offset = xstate_offsets[i]; - p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; - p->xstate.comp[i].align = curr_xstate & xstate_align; - } -} - -/* - * Misc adjustments to the policy. Mostly clobbering reserved fields and - * duplicating shared fields. Intentionally hidden fields are annotated. - */ -static void recalculate_misc(struct cpuid_policy *p) -{ - p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ - p->basic.apic_id = 0; /* Dynamic. */ - - p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ - p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ - - p->basic.raw[0x8] = EMPTY_LEAF; - - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - - p->basic.raw[0xc] = EMPTY_LEAF; - - p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; - - /* Most of Power/RAS hidden from guests. */ - p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; - - p->extd.raw[0x8].d = 0; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ - p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ - p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ - - p->extd.vendor_ebx = 0; - p->extd.vendor_ecx = 0; - p->extd.vendor_edx = 0; - - p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; - - p->extd.raw[0x5] = EMPTY_LEAF; - p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; - - p->extd.raw[0x8].a &= 0x0000ffff; - p->extd.raw[0x8].c = 0; - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - zero_leaves(p->basic.raw, 0x2, 0x3); - memset(p->cache.raw, 0, sizeof(p->cache.raw)); - zero_leaves(p->basic.raw, 0x9, 0xa); - - p->extd.vendor_ebx = p->basic.vendor_ebx; - p->extd.vendor_ecx = p->basic.vendor_ecx; - p->extd.vendor_edx = p->basic.vendor_edx; - - p->extd.raw_fms = p->basic.raw_fms; - p->extd.raw[0x1].b &= 0xff00ffff; - p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; - - p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ - p->extd.raw[0x8].c &= 0x0003f0ff; - - p->extd.raw[0x9] = EMPTY_LEAF; - - zero_leaves(p->extd.raw, 0xb, 0x18); - - /* 0x19 - TLB details. Pass through. */ - /* 0x1a - Perf hints. Pass through. */ - - p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ - p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ - p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ - p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ - p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ - p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ - break; - } -} - -static void __init calculate_raw_policy(void) -{ - struct cpuid_policy *p = &raw_cpu_policy; - - x86_cpuid_policy_fill_native(p); - - /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ - ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); -} - -static void __init calculate_host_policy(void) -{ - struct cpuid_policy *p = &host_cpu_policy; - unsigned int max_extd_leaf; - - *p = raw_cpu_policy; - - p->basic.max_leaf = - min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); - p->feat.max_subleaf = - min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); - - max_extd_leaf = p->extd.max_leaf; - - /* - * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be - * dispatch serialising for Spectre mitigations. Extend max_extd_leaf - * beyond what hardware supports, to include the feature leaf containing - * this information. - */ - if ( cpu_has_lfence_dispatch ) - max_extd_leaf = max(max_extd_leaf, 0x80000021); - - p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, - ARRAY_SIZE(p->extd.raw) - 1); - - x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); - recalculate_xstate(p); - recalculate_misc(p); - - /* When vPMU is disabled, drop it from the host policy. */ - if ( vpmu_mode == XENPMU_MODE_OFF ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( p->extd.svm ) - { - /* Clamp to implemented features which require hardware support. */ - p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | - (1u << SVM_FEATURE_LBRV) | - (1u << SVM_FEATURE_NRIPS) | - (1u << SVM_FEATURE_PAUSEFILTER) | - (1u << SVM_FEATURE_DECODEASSISTS)); - /* Enable features which are always emulated. */ - p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | - (1u << SVM_FEATURE_TSCRATEMSR)); - } -} - -static void __init guest_common_default_feature_adjustments(uint32_t *fs) -{ - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); - - /* - * On certain hardware, speculative or errata workarounds can result in - * TSX being placed in "force-abort" mode, where it doesn't actually - * function as expected, but is technically compatible with the ISA. - * - * Do not advertise RTM to guests by default if it won't actually work. - */ - if ( rtm_disabled ) - __clear_bit(X86_FEATURE_RTM, fs); -} - -static void __init guest_common_feature_adjustments(uint32_t *fs) -{ - /* Unconditionally claim to be able to set the hypervisor bit. */ - __set_bit(X86_FEATURE_HYPERVISOR, fs); - - /* - * If IBRS is offered to the guest, unconditionally offer STIBP. It is a - * nop on non-HT hardware, and has this behaviour to make heterogeneous - * setups easier to manage. - */ - if ( test_bit(X86_FEATURE_IBRSB, fs) ) - __set_bit(X86_FEATURE_STIBP, fs); - if ( test_bit(X86_FEATURE_IBRS, fs) ) - __set_bit(X86_FEATURE_AMD_STIBP, fs); - - /* - * On hardware which supports IBRS/IBPB, we can offer IBPB independently - * of IBRS by using the AMD feature bit. An administrator may wish for - * performance reasons to offer IBPB without IBRS. - */ - if ( host_cpu_policy.feat.ibrsb ) - __set_bit(X86_FEATURE_IBPB, fs); -} - -static void __init calculate_pv_max_policy(void) -{ - struct cpuid_policy *p = &pv_max_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_max_featuremask[i]; - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) - { - __clear_bit(X86_FEATURE_IBRSB, pv_featureset); - __clear_bit(X86_FEATURE_IBRS, pv_featureset); - } - - guest_common_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); - - p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct cpuid_policy *p = &pv_def_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = pv_max_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_def_featuremask[i]; - - guest_common_feature_adjustments(pv_featureset); - guest_common_default_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_max_policy(void) -{ - struct cpuid_policy *p = &hvm_max_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_max_featuremask : hvm_shadow_max_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - /* - * Xen can provide an (x2)APIC emulation to HVM guests even if the host's - * (x2)APIC isn't enabled. - */ - __set_bit(X86_FEATURE_APIC, hvm_featureset); - __set_bit(X86_FEATURE_X2APIC, hvm_featureset); - - /* - * We don't support EFER.LMSLE at all. AMD has dropped the feature from - * hardware and allocated a CPUID bit to indicate its absence. - */ - __set_bit(X86_FEATURE_NO_LMSL, hvm_featureset); - - /* - * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in - * long mode (and init_amd() has cleared it out of host capabilities), but - * HVM guests are able if running in protected mode. - */ - if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpu_policy.basic.sep ) - __set_bit(X86_FEATURE_SEP, hvm_featureset); - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) - { - __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); - __clear_bit(X86_FEATURE_IBRS, hvm_featureset); - } - - /* - * With VT-x, some features are only supported by Xen if dedicated - * hardware support is also available. - */ - if ( cpu_has_vmx ) - { - if ( !cpu_has_vmx_mpx ) - __clear_bit(X86_FEATURE_MPX, hvm_featureset); - - if ( !cpu_has_vmx_xsaves ) - __clear_bit(X86_FEATURE_XSAVES, hvm_featureset); - } - - guest_common_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_def_policy(void) -{ - struct cpuid_policy *p = &hvm_def_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = hvm_max_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_def_featuremask : hvm_shadow_def_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - guest_common_feature_adjustments(hvm_featureset); - guest_common_default_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -void __init init_guest_cpuid(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} bool recheck_cpu_features(unsigned int cpu) { @@ -625,170 +33,6 @@ bool recheck_cpu_features(unsigned int cpu) return okay; } -void recalculate_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; - unsigned int i; - - if ( !max ) - { - ASSERT_UNREACHABLE(); - return; - } - - p->x86_vendor = x86_cpuid_lookup_vendor( - p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); - - p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); - p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); - p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) - ? CPUID_GUEST_NR_EXTD_AMD - : CPUID_GUEST_NR_EXTD_INTEL) - 1); - - x86_cpu_policy_to_featureset(p, fs); - x86_cpu_policy_to_featureset(max, max_fs); - - if ( is_hvm_domain(d) ) - { - /* - * HVM domains using Shadow paging have further restrictions on their - * available paging features. - */ - if ( !hap_enabled(d) ) - { - for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) - max_fs[i] &= hvm_shadow_max_featuremask[i]; - } - - /* Hide nested-virt if it hasn't been explicitly configured. */ - if ( !nestedhvm_enabled(d) ) - { - __clear_bit(X86_FEATURE_VMX, max_fs); - __clear_bit(X86_FEATURE_SVM, max_fs); - } - } - - /* - * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits - * affect how to interpret topology information in other cpuid leaves. - */ - __set_bit(X86_FEATURE_HTT, max_fs); - __set_bit(X86_FEATURE_X2APIC, max_fs); - __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); - - /* - * 32bit PV domains can't use any Long Mode features, and cannot use - * SYSCALL on non-AMD hardware. - */ - if ( is_pv_32bit_domain(d) ) - { - __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - __clear_bit(X86_FEATURE_SYSCALL, max_fs); - } - - /* Clamp the toolstacks choices to reality. */ - for ( i = 0; i < ARRAY_SIZE(fs); i++ ) - fs[i] &= max_fs[i]; - - if ( p->basic.max_leaf < XSTATE_CPUID ) - __clear_bit(X86_FEATURE_XSAVE, fs); - - sanitise_featureset(fs); - - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & - (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - - x86_cpu_featureset_to_policy(fs, p); - - /* Pass host cacheline size through to guests. */ - p->basic.clflush_size = max->basic.clflush_size; - - p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); - p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, - paging_max_paddr_bits(d)); - p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, - (p->basic.pae || p->basic.pse36) ? 36 : 32); - - p->extd.maxlinaddr = p->extd.lm ? 48 : 32; - - recalculate_xstate(p); - recalculate_misc(p); - - for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) - { - if ( p->cache.subleaf[i].type >= 1 && - p->cache.subleaf[i].type <= 3 ) - { - /* Subleaf has a valid cache type. Zero reserved fields. */ - p->cache.raw[i].a &= 0xffffc3ffu; - p->cache.raw[i].d &= 0x00000007u; - } - else - { - /* Subleaf is not valid. Zero the rest of the union. */ - zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); - break; - } - } - - if ( vpmu_mode == XENPMU_MODE_OFF || - ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.svm ) - p->extd.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.page1gb ) - p->extd.raw[0x19] = EMPTY_LEAF; -} - -void __init init_dom0_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - - /* dom0 can't migrate. Give it ITSC if available. */ - if ( cpu_has_itsc ) - p->extd.itsc = true; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( cpu_has_arch_caps ) - p->feat.arch_caps = true; - - /* Apply dom0-cpuid= command line settings, if provided. */ - if ( dom0_cpuid_cmdline ) - { - uint32_t fs[FSCAPINTS]; - unsigned int i; - - x86_cpu_policy_to_featureset(p, fs); - - for ( i = 0; i < ARRAY_SIZE(fs); ++i ) - { - fs[i] |= dom0_enable_feat [i]; - fs[i] &= ~dom0_disable_feat[i]; - } - - x86_cpu_featureset_to_policy(fs, p); - - recalculate_cpuid_policy(d); - } -} - void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { @@ -1159,27 +403,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, } } -static void __init __maybe_unused build_assertions(void) -{ - BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); - - /* Find some more clever allocation scheme if this trips. */ - BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - - BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != - sizeof(raw_cpu_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != - sizeof(raw_cpu_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != - sizeof(raw_cpu_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != - sizeof(raw_cpu_policy.extd.raw)); -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 8fb3ac504d..a6de1dffc4 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -77,7 +77,6 @@ #include #include #include -#include #include diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 6ad533183b..76ab768367 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index a6e2e90dc9..5c72cd914a 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -52,7 +52,6 @@ #include #include #include -#include #include #include #include @@ -1991,7 +1990,6 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !tboot_protect_mem_regions() ) panic("Could not protect TXT memory regions\n"); - init_guest_cpuid(); init_guest_cpu_policies(); if ( xen_cpuidle ) diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 13e2a1f86d..b361537a60 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -18,4 +18,10 @@ void init_guest_cpu_policies(void); /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + +/* Clamp the CPUID policy to reality. */ +void recalculate_cpuid_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 7f81b998ce..b32ba0bbfe 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -8,14 +8,10 @@ #include #include -#include - #include extern const uint32_t known_features[FSCAPINTS]; -void init_guest_cpuid(void); - /* * Expected levelling capabilities (given cpuid vendor/family information), * and levelling capabilities actually available (given MSR probing). @@ -49,13 +45,8 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Apply dom0-specific tweaks to the CPUID policy. */ -void init_dom0_cpuid_policy(struct domain *d); - -/* Clamp the CPUID policy to reality. */ -void recalculate_cpuid_policy(struct domain *d); - struct vcpu; +struct cpuid_leaf; void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:16 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581662.910779 (Exim 4.92) (envelope-from ) id 1qTtUK-0001RX-LA; Thu, 10 Aug 2023 00:25:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581662.910779; Thu, 10 Aug 2023 00:25:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUK-0001RP-Hy; Thu, 10 Aug 2023 00:25:16 +0000 Received: by outflank-mailman (input) for mailman id 581662; Thu, 10 Aug 2023 00:25:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUI-0001RF-QB for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUI-0001Jh-PX for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtUI-0008Cd-Ok for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sGV63qjUypKixi9DkHe898hXx51vbF/B9ruwKZZyHZI=; b=3mfAeTxh7u+92J8mAHVJx5c/Xm InFRwQvewFdYYOX0xrAsNnhlS1pGx3ecvYe5f9UFatfS5yw8jHS079spFncvFj8ptGnazDNYtsAm4 crPwSmcZfAG/kfg/g+JgQo4sPXroqpYy/Xlabu3GwExzXtyaeZPlPQgn7ok00GFWV4Y4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/emul: Switch x86_emulate_ctxt to cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:25:14 +0000 commit 348506e8bd55765ade3374f8c38b67f5a25a3082 Author: Andrew Cooper AuthorDate: Mon Apr 3 20:03:57 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/emul: Switch x86_emulate_ctxt to cpu_policy As with struct domain, retain cpuid as a valid alias for local code clarity. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 441b1b2a50ea3656954d75e06d42c96d619ea0fc) --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 2 +- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/hvm/emulate.c | 4 ++-- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 7 +++++-- 8 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 28285aad24..a5453abc5a 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -896,7 +896,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpuid = &cp, + .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index 9b3e98a1a5..e453b1687f 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -907,7 +907,7 @@ int main(int argc, char **argv) ctxt.regs = ®s; ctxt.force_writeback = 0; - ctxt.cpuid = &cp; + ctxt.cpu_policy = &cp; ctxt.lma = sizeof(void *) == 8; ctxt.addr_size = 8 * sizeof(void *); ctxt.sp_size = 8 * sizeof(void *); diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index ea286d6ad8..5ad282b575 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -38,7 +38,7 @@ #define put_stub(stb) ((stb).addr = 0) uint32_t mxcsr_mask = 0x0000ffbf; -struct cpuid_policy cp; +struct cpu_policy cp; static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); static bool use_xsave; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 7da348b5d4..4f37ae700d 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2776,7 +2776,7 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla) void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { - struct hvm_emulate_ctxt ctx = {{ 0 }}; + struct hvm_emulate_ctxt ctx = {}; int rc; hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); @@ -2851,7 +2851,7 @@ void hvm_emulate_init_once( hvmemul_ctxt->validate = validate; hvmemul_ctxt->ctxt.regs = regs; - hvmemul_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; } diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index a0878d9ad7..66033ce333 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -322,7 +322,7 @@ const struct x86_emulate_ops *shadow_init_emulation( memset(sh_ctxt, 0, sizeof(*sh_ctxt)); sh_ctxt->ctxt.regs = regs; - sh_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + sh_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; sh_ctxt->ctxt.lma = hvm_long_mode_active(curr); /* Segment cache initialisation. Primed with CS. */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index b73e698cbc..d036baf3b2 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1328,7 +1328,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpuid = currd->arch.cpuid, + .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index ac5b66870c..e6add29a0f 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -334,7 +334,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpuid = currd->arch.cpuid, + .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index ce8226bd4c..cb9a8c41f2 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -566,8 +566,11 @@ struct x86_emulate_ctxt * Input-only state: */ - /* CPUID Policy for the domain. */ - const struct cpuid_policy *cpuid; + /* CPU policy for the domain. Allow aliases for local code clarity. */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + }; /* Set this if writes may have side effects. */ bool force_writeback; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581663.910783 (Exim 4.92) (envelope-from ) id 1qTtUU-0001UU-Md; Thu, 10 Aug 2023 00:25:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581663.910783; Thu, 10 Aug 2023 00:25:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUU-0001UN-Jo; Thu, 10 Aug 2023 00:25:26 +0000 Received: by outflank-mailman (input) for mailman id 581663; Thu, 10 Aug 2023 00:25:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUT-0001UB-7a for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUS-0001Jm-Sb for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtUS-0008DL-Rn for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3JABhHuY2b5SUeyzPP2Q5zbALuqZcvIfeKGRvucDwaA=; b=o/1nNYH32w7k9mfb20f9cyFlXv 3ny9GEL3l+4isKDp5cceyHSgKpC5xpzpoqA8AhPmmsWPX98iU93vkN5s0Rw87VMd3DaCxV20znImc psZ98Rk7PjUzXfkbLRdbOkYqjKepZvuNidzE5lu27S4Ki7+93NZ0hID4SLwH2fQTCYrM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] tools/fuzz: Rework afl-policy-fuzzer Message-Id: Date: Thu, 10 Aug 2023 00:25:24 +0000 commit bd89107b3f0db5a43eec2c707f6ac42d57bfb26d Author: Andrew Cooper AuthorDate: Mon Apr 3 17:14:14 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 tools/fuzz: Rework afl-policy-fuzzer With cpuid_policy and msr_policy merged to form cpu_policy, merge the respective fuzzing logic. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit a16dcd48c2db3f6820a15ea482551d289bd9cdec) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 57 +++++++++++-------------------- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 316eb0efe0..585324e417 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -16,16 +16,19 @@ static bool debug; #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void check_cpuid(struct cpuid_policy *cp) +static void check_policy(struct cpu_policy *cp) { - struct cpuid_policy new = {}; + struct cpu_policy new = {}; size_t data_end; xen_cpuid_leaf_t *leaves = malloc(CPUID_MAX_SERIALISED_LEAVES * sizeof(xen_cpuid_leaf_t)); - unsigned int nr = CPUID_MAX_SERIALISED_LEAVES; + xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * + sizeof(xen_cpuid_leaf_t)); + unsigned int nr_leaves = CPUID_MAX_SERIALISED_LEAVES; + unsigned int nr_msrs = MSR_MAX_SERIALISED_ENTRIES; int rc; - if ( !leaves ) + if ( !leaves || !msrs ) return; /* @@ -49,12 +52,19 @@ static void check_cpuid(struct cpuid_policy *cp) x86_cpuid_policy_recalc_synth(cp); /* Serialise... */ - rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr); + rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); + assert(rc == 0); + assert(nr_leaves <= CPUID_MAX_SERIALISED_LEAVES); + + rc = x86_msr_copy_to_buffer(cp, msrs, &nr_msrs); assert(rc == 0); - assert(nr <= CPUID_MAX_SERIALISED_LEAVES); + assert(nr_msrs <= MSR_MAX_SERIALISED_ENTRIES); /* ... and deserialise. */ - rc = x86_cpuid_copy_from_buffer(&new, leaves, nr, NULL, NULL); + rc = x86_cpuid_copy_from_buffer(&new, leaves, nr_leaves, NULL, NULL); + assert(rc == 0); + + rc = x86_msr_copy_from_buffer(&new, msrs, nr_msrs, NULL); assert(rc == 0); /* The result after serialisation/deserialisaion should be identical... */ @@ -76,28 +86,6 @@ static void check_cpuid(struct cpuid_policy *cp) free(leaves); } -static void check_msr(struct msr_policy *mp) -{ - struct msr_policy new = {}; - xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * - sizeof(xen_msr_entry_t)); - unsigned int nr = MSR_MAX_SERIALISED_ENTRIES; - int rc; - - if ( !msrs ) - return; - - rc = x86_msr_copy_to_buffer(mp, msrs, &nr); - assert(rc == 0); - assert(nr <= MSR_MAX_SERIALISED_ENTRIES); - - rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); - assert(rc == 0); - assert(memcmp(mp, &new, sizeof(*mp)) == 0); - - free(msrs); -} - int main(int argc, char **argv) { FILE *fp = NULL; @@ -144,8 +132,7 @@ int main(int argc, char **argv) while ( __AFL_LOOP(1000) ) #endif { - struct cpuid_policy *cp = NULL; - struct msr_policy *mp = NULL; + struct cpu_policy *cp = NULL; if ( fp != stdin ) { @@ -160,22 +147,18 @@ int main(int argc, char **argv) } cp = calloc(1, sizeof(*cp)); - mp = calloc(1, sizeof(*mp)); - if ( !cp || !mp ) + if ( !cp ) goto skip; fread(cp, sizeof(*cp), 1, fp); - fread(mp, sizeof(*mp), 1, fp); if ( !feof(fp) ) goto skip; - check_cpuid(cp); - check_msr(mp); + check_policy(cp); skip: free(cp); - free(mp); if ( fp != stdin ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581664.910787 (Exim 4.92) (envelope-from ) id 1qTtUe-0001XT-Om; Thu, 10 Aug 2023 00:25:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581664.910787; Thu, 10 Aug 2023 00:25:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUe-0001XL-LQ; Thu, 10 Aug 2023 00:25:36 +0000 Received: by outflank-mailman (input) for mailman id 581664; Thu, 10 Aug 2023 00:25:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUd-0001XB-0O for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libx86: Update library API for cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:25:34 +0000 commit 459dd2f605219322413e583a67dcd0780f41dbbb Author: Andrew Cooper AuthorDate: Mon Apr 3 14:18:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 libx86: Update library API for cpu_policy Adjust the API and comments appropriately. x86_cpu_policy_fill_native() will eventually contain MSR reads, but leave a TODO in the short term. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1b67fccf3b02825f6a036bad06cd17963d0972d2) tools/libs/guest: Fix build following libx86 changes I appear to have lost this hunk somewhere... Fixes: 1b67fccf3b02 ("libx86: Update library API for cpu_policy") Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit 48d76e6da92f9ef76c8468e299349a2f698362fa) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 4 +-- tools/libs/guest/xg_cpuid_x86.c | 2 +- tools/tests/cpu-policy/test-cpu-policy.c | 4 +-- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/cpu-policy.c | 4 +-- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/xstate.c | 4 +-- xen/include/xen/lib/x86/cpu-policy.h | 49 ++++++++++++++++++------------- xen/lib/x86/cpuid.c | 26 ++++++++-------- xen/lib/x86/msr.c | 4 +-- 11 files changed, 56 insertions(+), 47 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 585324e417..11df2f7802 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -48,8 +48,8 @@ static void check_policy(struct cpu_policy *cp) * Fix up the data in the source policy which isn't expected to survive * serialisation. */ - x86_cpuid_policy_clear_out_of_range_leaves(cp); - x86_cpuid_policy_recalc_synth(cp); + x86_cpu_policy_clear_out_of_range_leaves(cp); + x86_cpu_policy_recalc_synth(cp); /* Serialise... */ rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 76dc7932a4..c04f2b90d4 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -556,7 +556,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *dfs; if ( !test_bit(b, disabled_features) || - !(dfs = x86_cpuid_lookup_deep_deps(b)) ) + !(dfs = x86_cpu_policy_lookup_deep_deps(b)) ) continue; for ( i = 0; i < ARRAY_SIZE(disabled_features); ++i ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 4f3d09f1b7..fea0eb8c35 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -105,7 +105,7 @@ static void test_cpuid_current(void) printf("Testing CPUID on current CPU\n"); - x86_cpuid_policy_fill_native(&p); + x86_cpu_policy_fill_native(&p); rc = x86_cpuid_copy_to_buffer(&p, leaves, &nr); if ( rc != 0 ) @@ -554,7 +554,7 @@ static void test_cpuid_out_of_range_clearing(void) void *ptr; unsigned int nr_markers; - x86_cpuid_policy_clear_out_of_range_leaves(p); + x86_cpu_policy_clear_out_of_range_leaves(p); /* Count the number of 0xc2's still remaining. */ for ( ptr = p, nr_markers = 0; diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 5ad282b575..3a092ea3ec 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -85,7 +85,7 @@ bool emul_test_init(void) unsigned long sp; - x86_cpuid_policy_fill_native(&cp); + x86_cpu_policy_fill_native(&cp); /* * The emulator doesn't use these instructions, so can always emulate diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e311fe142b..ef27b2a6bb 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -176,7 +176,7 @@ static void sanitise_featureset(uint32_t *fs) for_each_set_bit(i, (void *)disabled_features, sizeof(disabled_features) * 8) { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + const uint32_t *dfs = x86_cpu_policy_lookup_deep_deps(i); unsigned int j; ASSERT(dfs); /* deep_features[] should guarentee this. */ @@ -347,7 +347,7 @@ static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; - x86_cpuid_policy_fill_native(p); + x86_cpu_policy_fill_native(p); /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 9895abc624..0ad0069d26 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -72,7 +72,7 @@ void __init setup_clear_cpu_cap(unsigned int cap) __builtin_return_address(0), cap); __clear_bit(cap, boot_cpu_data.x86_capability); - dfs = x86_cpuid_lookup_deep_deps(cap); + dfs = x86_cpu_policy_lookup_deep_deps(cap); if (!dfs) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 2573f97065..ef9a3c37bb 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -76,7 +76,7 @@ static int update_domain_cpu_policy(struct domain *d, goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new); + x86_cpu_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ ret = x86_cpu_policies_are_compatible(sys, new, &err); diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 3b32bdc51c..cea3d0b81f 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -685,7 +685,7 @@ void xstate_init(struct cpuinfo_x86 *c) int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr) { - uint64_t xcr0_max = cpuid_policy_xcr0_max(d->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(d->arch.cpuid); unsigned int i; if ( (hdr->xstate_bv & ~xcr0_accum) || @@ -709,7 +709,7 @@ int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, int handle_xsetbv(u32 index, u64 new_bv) { struct vcpu *curr = current; - uint64_t xcr0_max = cpuid_policy_xcr0_max(curr->domain->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(curr->domain->arch.cpuid); u64 mask; if ( index != XCR_XFEATURE_ENABLED_MASK ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 57b4633c86..cf7de0f29c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -399,33 +399,38 @@ void x86_cpu_policy_to_featureset(const struct cpu_policy *p, void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p); -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xcr0_max(const struct cpu_policy *p) { return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; } -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xstates(const struct cpu_policy *p) { uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); +/** + * For a specific feature, look up the dependent features. Returns NULL if + * this feature has no dependencies. Otherwise return a featureset of + * dependent features, which has been recursively flattened. + */ +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature); /** - * Recalculate the content in a CPUID policy which is derived from raw data. + * Recalculate the content in a CPU policy which is derived from raw data. */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); +void x86_cpu_policy_recalc_synth(struct cpu_policy *p); /** - * Fill a CPUID policy using the native CPUID instruction. + * Fill CPU policy using the native CPUID/RDMSR instruction. * * No sanitisation is performed, but synthesised values are calculated. * Values may be influenced by a hypervisor or from masking/faulting * configuration. */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); +void x86_cpu_policy_fill_native(struct cpu_policy *p); /** * Clear leaf data beyond the policies max leaf/subleaf settings. @@ -436,7 +441,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p); * with out-of-range leaves with stale content in them. This helper clears * them. */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p); #ifdef __XEN__ #include @@ -449,9 +454,10 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** - * Serialise a cpuid_policy object into an array of cpuid leaves. + * Serialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to serialise. + * @param policy The cpu_policy to serialise. * @param leaves The array of leaves to serialise into. * @param nr_entries The number of entries in 'leaves'. * @returns -errno @@ -460,13 +466,14 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; * leaves array is too short. On success, nr_entries is updated with the * actual number of leaves written. */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *policy, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); /** - * Unserialise a cpuid_policy object from an array of cpuid leaves. + * Unserialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to unserialise into. + * @param policy The cpu_policy to unserialise into. * @param leaves The array of leaves to unserialise from. * @param nr_entries The number of entries in 'leaves'. * @param err_leaf Optional hint for error diagnostics. @@ -474,21 +481,21 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, * @returns -errno * * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional + * incoming leaf is out of range of cpu_policy, in which case the optional * err_* pointers will identify the out-of-range indicies. * * No content validation of in-range leaves is performed. Synthesised data is * recalculated. */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, +int x86_cpuid_copy_from_buffer(struct cpu_policy *policy, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); /** - * Serialise an msr_policy object into an array. + * Serialise the MSRs of a cpu_policy object into an array. * - * @param policy The msr_policy to serialise. + * @param policy The cpu_policy to serialise. * @param msrs The array of msrs to serialise into. * @param nr_entries The number of entries in 'msrs'. * @returns -errno @@ -497,13 +504,13 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, * buffer array is too short. On success, nr_entries is updated with the * actual number of msrs written. */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, +int x86_msr_copy_to_buffer(const struct cpu_policy *policy, msr_entry_buffer_t msrs, uint32_t *nr_entries); /** - * Unserialise an msr_policy object from an array of msrs. + * Unserialise the MSRs of a cpu_policy object from an array of msrs. * - * @param policy The msr_policy object to unserialise into. + * @param policy The cpu_policy object to unserialise into. * @param msrs The array of msrs to unserialise from. * @param nr_entries The number of entries in 'msrs'. * @param err_msr Optional hint for error diagnostics. @@ -517,7 +524,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *policy, * * No content validation is performed on the data stored in the policy object. */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, +int x86_msr_copy_from_buffer(struct cpu_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 734e90823a..68aafb4049 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -102,13 +102,13 @@ void x86_cpu_featureset_to_policy( p->feat._7d1 = fs[FEATURESET_7d1]; } -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) +void x86_cpu_policy_recalc_synth(struct cpu_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); } -void x86_cpuid_policy_fill_native(struct cpuid_policy *p) +void x86_cpu_policy_fill_native(struct cpu_policy *p) { unsigned int i; @@ -199,7 +199,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]); cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]); - xstates = cpuid_policy_xstates(p); + xstates = cpu_policy_xstates(p); /* This logic will probably need adjusting when XCR0[63] gets used. */ BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); @@ -222,10 +222,12 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - x86_cpuid_policy_recalc_synth(p); + /* TODO MSRs */ + + x86_cpu_policy_recalc_synth(p); } -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p) { unsigned int i; @@ -260,7 +262,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) zero_leaves(p->topo.raw, i, ARRAY_SIZE(p->topo.raw) - 1); } - if ( p->basic.max_leaf < 0xd || !cpuid_policy_xstates(p) ) + if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); else { @@ -268,7 +270,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); /* First two leaves always valid. Rest depend on xstates. */ - i = max(2, 64 - __builtin_clzll(cpuid_policy_xstates(p))); + i = max(2, 64 - __builtin_clzll(cpu_policy_xstates(p))); zero_leaves(p->xstate.raw, i, ARRAY_SIZE(p->xstate.raw) - 1); @@ -278,7 +280,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) ARRAY_SIZE(p->extd.raw) - 1); } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature) +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature) { static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static const struct { @@ -333,7 +335,7 @@ static int copy_leaf_to_buffer(uint32_t leaf, uint32_t subleaf, return 0; } -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -383,7 +385,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, case 0xd: { - uint64_t xstates = cpuid_policy_xstates(p); + uint64_t xstates = cpu_policy_xstates(p); COPY_LEAF(leaf, 0, &p->xstate.raw[0]); COPY_LEAF(leaf, 1, &p->xstate.raw[1]); @@ -419,7 +421,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, return 0; } -int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, +int x86_cpuid_copy_from_buffer(struct cpu_policy *p, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf) @@ -522,7 +524,7 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, } } - x86_cpuid_policy_recalc_synth(p); + x86_cpu_policy_recalc_synth(p); return 0; diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index c4d885e7b5..e04b9ca013 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -23,7 +23,7 @@ static int copy_msr_to_buffer(uint32_t idx, uint64_t val, return 0; } -int x86_msr_copy_to_buffer(const struct msr_policy *p, +int x86_msr_copy_to_buffer(const struct cpu_policy *p, msr_entry_buffer_t msrs, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -48,7 +48,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p, return 0; } -int x86_msr_copy_from_buffer(struct msr_policy *p, +int x86_msr_copy_from_buffer(struct cpu_policy *p, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:46 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581665.910790 (Exim 4.92) (envelope-from ) id 1qTtUo-0001ae-S3; Thu, 10 Aug 2023 00:25:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581665.910790; Thu, 10 Aug 2023 00:25:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUo-0001aW-Oo; Thu, 10 Aug 2023 00:25:46 +0000 Received: by outflank-mailman (input) for mailman id 581665; Thu, 10 Aug 2023 00:25:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUn-0001aF-50 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUn-0001KL-4K for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtUn-0008EH-3a for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:25:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9EP1Ofu+4WuqqLAxSDIOpaeS+GsO9T81z554epiuu4Y=; b=vtw3Ql9uxrfJ+tWeUhLQ285+I0 Yh4MwiA6gBHnuNfnDr7wEaTATenc+Etp5Uq0FZ3OMXjmGwRjojjlAZfq5Zw68qD7MbKSjYlKKhztf yMqphHZJM+pNC3DI3sMe0iKZHxRC/am32n7xHXNVt7eAgFavAuaQ+yEw3Vyqnp9cb818=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86: Remove temporary {cpuid,msr}_policy defines Message-Id: Date: Thu, 10 Aug 2023 00:25:45 +0000 commit add9ca7fea7522484811ab58f811e40d10cf69b0 Author: Andrew Cooper AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce) --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 6 +++--- xen/include/asm-x86/msr.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 14 files changed, 26 insertions(+), 32 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index d364e9bf5a..c72725d81a 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -1001,7 +1001,7 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index aa1af2e1cc..42da518728 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -37,7 +37,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index a5e97d6881..d5101ff1a6 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -283,7 +283,7 @@ void update_guest_memory_policy(struct vcpu *v, void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index a6de1dffc4..542b60bc90 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -937,7 +937,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -974,7 +974,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe, cet; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 332de61993..a019d196e0 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -595,7 +595,7 @@ static void svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index a51f172128..3d25aaff55 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1082,7 +1082,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index cebe46ef6a..a75bdde4ff 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -736,7 +736,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3438,7 +3438,7 @@ void vmx_vlapic_msr_changed(struct vcpu *v) static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 61d74374f8..9091ba4570 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -52,8 +52,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -137,13 +136,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -310,7 +309,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -329,8 +328,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -371,7 +369,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -381,7 +379,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -393,7 +391,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -430,7 +428,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 76ab768367..7fe2c04aac 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -146,7 +146,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index d036baf3b2..c1d1be0ec9 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -883,7 +883,7 @@ static int read_msr(unsigned int reg, uint64_t *val, { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false, warn = false; uint64_t tmp; int ret; @@ -1032,7 +1032,7 @@ static int write_msr(unsigned int reg, uint64_t val, { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false; int ret; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 6dd923a9fb..9679bfdb08 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1080,7 +1080,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index c4ff341405..6e0863f09a 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1923,7 +1923,7 @@ in_protmode( } static bool -_amd_like(const struct cpuid_policy *cp) +_amd_like(const struct cpu_policy *cp) { return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } @@ -1931,7 +1931,7 @@ _amd_like(const struct cpuid_policy *cp) static bool amd_like(const struct x86_emulate_ctxt *ctxt) { - return _amd_like(ctxt->cpuid); + return _amd_like(ctxt->cpu_policy); } #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) @@ -2078,7 +2078,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 60627710f5..c37b9e771b 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -278,7 +278,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:25:57 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:25:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581666.910795 (Exim 4.92) (envelope-from ) id 1qTtUy-0001dD-TH; Thu, 10 Aug 2023 00:25:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581666.910795; Thu, 10 Aug 2023 00:25:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUy-0001d5-QU; Thu, 10 Aug 2023 00:25:56 +0000 Received: by outflank-mailman (input) for mailman id 581666; Thu, 10 Aug 2023 00:25:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtUx-0001ck-7w for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully Message-Id: Date: Thu, 10 Aug 2023 00:25:55 +0000 commit f84a604d73216b48ffe970e7de7a630449c3bf99 Author: Andrew Cooper AuthorDate: Wed May 10 19:58:43 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully When adding new featureset words, it is convenient to split the work into several patches. However, GCC 12 spotted that the way we prefer to split the work results in a real (transient) breakage whereby the policy <-> featureset helpers perform out-of-bounds accesses on the featureset array. Fix this by having gen-cpuid.py calculate FEATURESET_NR_ENTRIES from the comments describing the word blocks, rather than from the XEN_CPUFEATURE() with the greatest value. For simplicty, require that the word blocks appear in order. This can be revisted if we find a good reason to have blocks out of order. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56e2c8e5860090a35d5f0cafe168223a2a7c0e62) --- xen/tools/gen-cpuid.py | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index e0e3f2f463..66911c4ba8 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -50,13 +50,37 @@ def parse_definitions(state): "\s+([\s\d]+\*[\s\d]+\+[\s\d]+)\)" "\s+/\*([\w!]*) .*$") + word_regex = re.compile( + r"^/\* .* word (\d*) \*/$") + last_word = -1 + this = sys.modules[__name__] for l in state.input.readlines(): - # Short circuit the regex... - if not l.startswith("XEN_CPUFEATURE("): + + # Short circuit the regexes... + if not (l.startswith("XEN_CPUFEATURE(") or + l.startswith("/* ")): continue + # Handle /* ... word $N */ lines + if l.startswith("/* "): + + res = word_regex.match(l) + if res is None: + continue # Some other comment + + word = int(res.groups()[0]) + + if word != last_word + 1: + raise Fail("Featureset word %u out of order (last word %u)" + % (word, last_word)) + + last_word = word + state.nr_entries = word + 1 + continue + + # Handle XEN_CPUFEATURE( lines res = feat_regex.match(l) if res is None: @@ -94,6 +118,15 @@ def parse_definitions(state): if len(state.names) == 0: raise Fail("No features found") + if state.nr_entries == 0: + raise Fail("No featureset word info found") + + max_val = max(state.names.keys()) + if (max_val >> 5) >= state.nr_entries: + max_name = state.names[max_val] + raise Fail("Feature %s (%d*32+%d) exceeds FEATURESET_NR_ENTRIES (%d)" + % (max_name, max_val >> 5, max_val & 31, state.nr_entries)) + def featureset_to_uint32s(fs, nr): """ Represent a featureset as a list of C-compatible uint32_t's """ @@ -122,9 +155,6 @@ def format_uint32s(state, featureset, indent): def crunch_numbers(state): - # Size of bitmaps - state.nr_entries = nr_entries = (max(state.names.keys()) >> 5) + 1 - # Features common between 1d and e1d. common_1d = (FPU, VME, DE, PSE, TSC, MSR, PAE, MCE, CX8, APIC, MTRR, PGE, MCA, CMOV, PAT, PSE36, MMX, FXSR) @@ -327,7 +357,7 @@ def crunch_numbers(state): state.nr_deep_deps = len(state.deep_deps.keys()) # Calculate the bitfield name declarations - for word in range(nr_entries): + for word in range(state.nr_entries): names = [] for bit in range(32): -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581667.910799 (Exim 4.92) (envelope-from ) id 1qTtV8-0001fm-Uf; Thu, 10 Aug 2023 00:26:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581667.910799; Thu, 10 Aug 2023 00:26:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtV8-0001fe-Rx; Thu, 10 Aug 2023 00:26:06 +0000 Received: by outflank-mailman (input) for mailman id 581667; Thu, 10 Aug 2023 00:26:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtV7-0001fV-Az for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtV7-0001Kl-AF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtV7-0008FN-9R for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=C3t6VMnpjFmAUNmxsKmq1p2jchNWwfoyXINl5tmie40=; b=5iI4Odr/n1f6WkhoZgdfQl/z2s xGsmzyr3Gmhl2xwo2n51pbcoaqLJe/+smjp1AWrbCzI1l3Hhw0CaSFtsCr1XzLC8n4ZP+go2D8iCg L6WrKPr/o5bbGSP5tCiJXYbCw+lVq1tf3S/HdQvF1iQzhgPjzH3UfXpgRaRkGXjL4Xmw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Rework dom0 feature configuration Message-Id: Date: Thu, 10 Aug 2023 00:26:05 +0000 commit 17c152e8ce93412a721b516e9896d1fe8ef79394 Author: Andrew Cooper AuthorDate: Fri May 12 13:52:39 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Rework dom0 feature configuration Right now, dom0's feature configuration is split between between the common path and a dom0-specific one. This mostly is by accident, and causes some very subtle bugs. First, start by clearly defining init_dom0_cpuid_policy() to be the domain that Xen builds automatically. The late hwdom case is still constructed in a mostly normal way, with the control domain having full discretion over the CPU policy. Identifying this highlights a latent bug - the two halves of the MSR_ARCH_CAPS bodge are asymmetric with respect to the hardware domain. This means that shim, or a control-only dom0 sees the MSR_ARCH_CAPS CPUID bit but none of the MSR content. This in turn declares the hardware to be retpoline-safe by failing to advertise the {R,}RSBA bits appropriately. Restrict this logic to the hardware domain, although the special case will cease to exist shortly. For the CPUID Faulting adjustment, the comment in ctxt_switch_levelling() isn't actually relevant. Provide a better explanation. Move the recalculate_cpuid_policy() call outside of the dom0-cpuid= case. This is no change for now, but will become necessary shortly. Finally, place the second half of the MSR_ARCH_CAPS bodge after the recalculate_cpuid_policy() call. This is necessary to avoid transiently breaking the hardware domain's view while the handling is cleaned up. This special case will cease to exist shortly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ef1987fcb0fdfaa7ee148024037cb5fa335a7b2d) --- xen/arch/x86/cpu-policy.c | 57 ++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index ef27b2a6bb..351973a866 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -657,29 +657,6 @@ int init_domain_cpu_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - p->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - d->arch.cpu_policy = p; recalculate_cpuid_policy(d); @@ -815,11 +792,15 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } +/* + * Adjust the CPU policy for dom0. Really, this is "the domain Xen builds + * automatically on boot", and might not have the domid 0 (e.g. pvshim). + */ void __init init_dom0_cpuid_policy(struct domain *d) { struct cpu_policy *p = d->arch.cpuid; - /* dom0 can't migrate. Give it ITSC if available. */ + /* Dom0 doesn't migrate relative to Xen. Give it ITSC if available. */ if ( cpu_has_itsc ) p->extd.itsc = true; @@ -828,7 +809,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( cpu_has_arch_caps ) + if ( is_hardware_domain(d) && cpu_has_arch_caps ) p->feat.arch_caps = true; /* Apply dom0-cpuid= command line settings, if provided. */ @@ -846,8 +827,32 @@ void __init init_dom0_cpuid_policy(struct domain *d) } x86_cpu_featureset_to_policy(fs, p); + } + + /* + * PV Control domains used to require unfiltered CPUID. This was fixed in + * Xen 4.13, but there is an cmdline knob to restore the prior behaviour. + * + * If the domain is getting unfiltered CPUID, don't let the guest kernel + * play with CPUID faulting either, as Xen's CPUID path won't cope. + */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; - recalculate_cpuid_policy(d); + recalculate_cpuid_policy(d); + + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581668.910804 (Exim 4.92) (envelope-from ) id 1qTtVJ-0001iX-0h; Thu, 10 Aug 2023 00:26:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581668.910804; Thu, 10 Aug 2023 00:26:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVI-0001iP-TS; Thu, 10 Aug 2023 00:26:16 +0000 Received: by outflank-mailman (input) for mailman id 581668; Thu, 10 Aug 2023 00:26:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVH-0001iC-E4 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVH-0001Ks-DF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:15 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtVH-0008Fm-CS for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tpKEfcn3kKq0QKnh9aMGGyUBdh8zRHMvy8rJaBCPcZ8=; b=jzwr6f35In3eDrvzuvJJiPoMLI uDgCY6fJr7BntgV3qlym5dKCe4cGFyNCp3i20E8ATGMN0gkJ4WFcGawM9U692s42zQMTJmGZk5WSF diG8nmYgFmsMu7BIC9eJ6+JvxmN442C7RUoYgnwSfTa683l3nDbFIkc3JuEOcEsBVC08=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy Message-Id: Date: Thu, 10 Aug 2023 00:26:15 +0000 commit a21bfbd10b0daf46bd596b7bde2d0a6a9351ffa7 Author: Andrew Cooper AuthorDate: Mon May 15 14:14:53 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy We are about to move MSR_ARCH_CAPS into featureset, but the order of operations (copy raw policy, then copy x86_capabilitiles[] in) will end up clobbering the ARCH_CAPS value. Some toolstacks use this information to handle TSX compatibility across the CPUs and microcode versions where support was removed. To avoid this transient breakage, read from raw_cpu_policy rather than modifying it in place. This logic will be removed entirely in due course. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 43912f8dbb1888ffd7f00adb10724c70e71927c4) --- xen/arch/x86/cpu-policy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 351973a866..b650af431c 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -411,7 +411,7 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw &= + p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581669.910807 (Exim 4.92) (envelope-from ) id 1qTtVT-0001m2-3I; Thu, 10 Aug 2023 00:26:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581669.910807; Thu, 10 Aug 2023 00:26:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVT-0001lu-0e; Thu, 10 Aug 2023 00:26:27 +0000 Received: by outflank-mailman (input) for mailman id 581669; Thu, 10 Aug 2023 00:26:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVR-0001ll-Gw for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVR-0001Kz-GE for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:25 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtVR-0008GH-Fa for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:25 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bx8L7nulcL2iJXX5GHEfwYquLkVR/gYVW/LORYnOlr4=; b=5ZszSAAjULYe3roDh5+UXybVyt 7VcMURoVzaxHtgO8xxHNmYRI0zVa7aQtK2Raj0Che/AcZX8j6xM9gl1RmdM4PGVwStx5jLoSRLCl0 Z22TJ6AsoojPCyn/momhBCAjQ4ohyoSGC8fhpvKYjw/9n1O6x5pBDP8KHCvswuu+Jakk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Message-Id: Date: Thu, 10 Aug 2023 00:26:25 +0000 commit cf2802d822c97375ae87d7e03aceecd68f983612 Author: Andrew Cooper AuthorDate: Fri May 12 17:55:21 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Bits through 24 are already defined, meaning that we're not far off needing the second word. Put both in right away. As both halves are present now, the arch_caps field is full width. Adjust the unit test, which notices. The bool bitfield names in the arch_caps union are unused, and somewhat out of date. They'll shortly be automatically generated. Add CPUID and MSR prefixes to the ./xen-cpuid verbose output, now that there are a mix of the two. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit d9fe459ffad8a6eac2f695adb2331aff83c345d1) --- tools/misc/xen-cpuid.c | 44 +++++++++++++++---------- tools/tests/cpu-policy/test-cpu-policy.c | 5 --- xen/include/public/arch-x86/cpufeatureset.h | 4 +++ xen/include/xen/lib/x86/cpu-policy.h | 50 ++++++++++++++--------------- xen/lib/x86/cpuid.c | 4 +++ 5 files changed, 59 insertions(+), 48 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index ec6eff9b77..cb44d8d855 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -212,31 +212,41 @@ static const char *const str_7d2[32] = [ 0] = "intel-psfd", }; +static const char *const str_m10Al[32] = +{ +}; + +static const char *const str_m10Ah[32] = +{ +}; + static const struct { const char *name; const char *abbr; const char *const *strs; } decodes[] = { - { "0x00000001.edx", "1d", str_1d }, - { "0x00000001.ecx", "1c", str_1c }, - { "0x80000001.edx", "e1d", str_e1d }, - { "0x80000001.ecx", "e1c", str_e1c }, - { "0x0000000d:1.eax", "Da1", str_Da1 }, - { "0x00000007:0.ebx", "7b0", str_7b0 }, - { "0x00000007:0.ecx", "7c0", str_7c0 }, - { "0x80000007.edx", "e7d", str_e7d }, - { "0x80000008.ebx", "e8b", str_e8b }, - { "0x00000007:0.edx", "7d0", str_7d0 }, - { "0x00000007:1.eax", "7a1", str_7a1 }, - { "0x80000021.eax", "e21a", str_e21a }, - { "0x00000007:1.ebx", "7b1", str_7b1 }, - { "0x00000007:2.edx", "7d2", str_7d2 }, - { "0x00000007:1.ecx", "7c1", str_7c1 }, - { "0x00000007:1.edx", "7d1", str_7d1 }, + { "CPUID 0x00000001.edx", "1d", str_1d }, + { "CPUID 0x00000001.ecx", "1c", str_1c }, + { "CPUID 0x80000001.edx", "e1d", str_e1d }, + { "CPUID 0x80000001.ecx", "e1c", str_e1c }, + { "CPUID 0x0000000d:1.eax", "Da1", str_Da1 }, + { "CPUID 0x00000007:0.ebx", "7b0", str_7b0 }, + { "CPUID 0x00000007:0.ecx", "7c0", str_7c0 }, + { "CPUID 0x80000007.edx", "e7d", str_e7d }, + { "CPUID 0x80000008.ebx", "e8b", str_e8b }, + { "CPUID 0x00000007:0.edx", "7d0", str_7d0 }, + { "CPUID 0x00000007:1.eax", "7a1", str_7a1 }, + { "CPUID 0x80000021.eax", "e21a", str_e21a }, + { "CPUID 0x00000007:1.ebx", "7b1", str_7b1 }, + { "CPUID 0x00000007:2.edx", "7d2", str_7d2 }, + { "CPUID 0x00000007:1.ecx", "7c1", str_7c1 }, + { "CPUID 0x00000007:1.edx", "7d1", str_7d1 }, + { "MSR_ARCH_CAPS.lo", "m10Al", str_m10Al }, + { "MSR_ARCH_CAPS.hi", "m10Ah", str_m10Ah }, }; -#define COL_ALIGN "18" +#define COL_ALIGN "24" static const char *const fs_names[] = { [XEN_SYSCTL_cpu_featureset_raw] = "Raw", diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index fea0eb8c35..cac28c7625 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -391,11 +391,6 @@ static void test_msr_deserialise_failure(void) .msr = { .idx = 0xce, .val = ~0ull }, .rc = -EOVERFLOW, }, - { - .name = "truncated val", - .msr = { .idx = 0x10a, .val = ~0ull }, - .rc = -EOVERFLOW, - }, }; printf("Testing MSR deserialise failure:\n"); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 4832ad09df..5445bbde42 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -309,6 +309,10 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ + +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index bfa4250604..6d5e9edd26 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -4,22 +4,24 @@ #include -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_m10Al 16 /* 0x0000010a.eax */ +#define FEATURESET_m10Ah 17 /* 0x0000010a.edx */ struct cpuid_leaf { @@ -350,17 +352,13 @@ struct cpu_policy * fixed in hardware. */ union { - uint32_t raw; + uint64_t raw; + struct { + uint32_t lo, hi; + }; struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; + DECL_BITFIELD(m10Al); + DECL_BITFIELD(m10Ah); }; } arch_caps; diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 68aafb4049..e795ce3750 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -79,6 +79,8 @@ void x86_cpu_policy_to_featureset( fs[FEATURESET_7d2] = p->feat._7d2; fs[FEATURESET_7c1] = p->feat._7c1; fs[FEATURESET_7d1] = p->feat._7d1; + fs[FEATURESET_m10Al] = p->arch_caps.lo; + fs[FEATURESET_m10Ah] = p->arch_caps.hi; } void x86_cpu_featureset_to_policy( @@ -100,6 +102,8 @@ void x86_cpu_featureset_to_policy( p->feat._7d2 = fs[FEATURESET_7d2]; p->feat._7c1 = fs[FEATURESET_7c1]; p->feat._7d1 = fs[FEATURESET_7d1]; + p->arch_caps.lo = fs[FEATURESET_m10Al]; + p->arch_caps.hi = fs[FEATURESET_m10Ah]; } void x86_cpu_policy_recalc_synth(struct cpu_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581670.910811 (Exim 4.92) (envelope-from ) id 1qTtVd-0001od-4p; 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Thu, 10 Aug 2023 00:26:35 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lhKk56Wk6Qd3wmO2id1h6qUKL8wqX3b6QR1RqboLSF0=; b=M/3zxEG18LPgYuXrw4gUUa56/x ePVJiAzi4dOJ54CJVb2UyK5epm9P0qwoqMbeC3a2mc2jKpjndzM4Q7ibw72aVoswjYrm2Gcoex9nV mJkojRzfkoYn6abecMwcsKDuRjlMEEJnu5zxk6ymp0oEuRbhgIVqyuIkJyRAHhZbZWeg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: MSR_ARCH_CAPS feature names Message-Id: Date: Thu, 10 Aug 2023 00:26:35 +0000 commit 259ff08b390398f6d8bf19921ad60f41dc1051f6 Author: Andrew Cooper AuthorDate: Fri May 12 18:50:59 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/cpu-policy: MSR_ARCH_CAPS feature names Seed the default visibility from the dom0 special case, which for the most part just exposes the *_NO bits. EIBRS is the one non-*_NO bit, which is "just" a status bit to the guest indicating a change in implemention of IBRS which is already fully supported. Insert a block dependency from the ARCH_CAPS CPUID bit to the entire content of the MSR. This is because MSRs have no structure information similar to CPUID, and used by x86_cpu_policy_clear_out_of_range_leaves(), in order to bulk-clear inaccessable words. The overall CPUID bit is still max-only, so all of MSR_ARCH_CAPS is hidden in the default policies. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ce8c930851a5ca21c4e70f83be7e8b290ce1b519) --- tools/misc/xen-cpuid.c | 13 +++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 23 +++++++++++++++++++++++ xen/tools/gen-cpuid.py | 3 +++ 3 files changed, 39 insertions(+) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index cb44d8d855..9fcf4054ec 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -214,6 +214,19 @@ static const char *const str_7d2[32] = static const char *const str_m10Al[32] = { + [ 0] = "rdcl-no", [ 1] = "eibrs", + [ 2] = "rsba", [ 3] = "skip-l1dfl", + [ 4] = "intel-ssb-no", [ 5] = "mds-no", + [ 6] = "if-pschange-mc-no", [ 7] = "tsx-ctrl", + [ 8] = "taa-no", [ 9] = "mcu-ctrl", + [10] = "misc-pkg-ctrl", [11] = "energy-ctrl", + [12] = "doitm", [13] = "sbdr-ssdp-no", + [14] = "fbsdp-no", [15] = "psdp-no", + /* 16 */ [17] = "fb-clear", + [18] = "fb-clear-ctrl", [19] = "rrsba", + [20] = "bhi-no", [21] = "xapic-status", + /* 22 */ [23] = "ovrclk-status", + [24] = "pbrsb-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 5445bbde42..82a1073d3f 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -310,6 +310,29 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks safe to use */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ +XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ +XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ +XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ +XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ +XEN_CPUFEATURE(IF_PSCHANGE_MC_NO, 16*32+ 6) /*A No Instruction fetch #MC */ +XEN_CPUFEATURE(TSX_CTRL, 16*32+ 7) /* MSR_TSX_CTRL */ +XEN_CPUFEATURE(TAA_NO, 16*32+ 8) /*A No TSX Async Abort */ +XEN_CPUFEATURE(MCU_CTRL, 16*32+ 9) /* MSR_MCU_CTRL */ +XEN_CPUFEATURE(MISC_PKG_CTRL, 16*32+10) /* MSR_MISC_PKG_CTRL */ +XEN_CPUFEATURE(ENERGY_FILTERING, 16*32+11) /* MSR_MISC_PKG_CTRL.ENERGY_FILTERING */ +XEN_CPUFEATURE(DOITM, 16*32+12) /* Data Operand Invariant Timing Mode */ +XEN_CPUFEATURE(SBDR_SSDP_NO, 16*32+13) /*A No Shared Buffer Data Read or Sideband Stale Data Propagation */ +XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Propagation */ +XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ +XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ +XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ +XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ +XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ +XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 66911c4ba8..922622fdda 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -324,6 +324,9 @@ def crunch_numbers(state): # In principle the TSXLDTRK insns could also be considered independent. RTM: [TSXLDTRK], + + # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. + ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581671.910816 (Exim 4.92) (envelope-from ) id 1qTtVn-0001rE-6d; Thu, 10 Aug 2023 00:26:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581671.910816; Thu, 10 Aug 2023 00:26:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVn-0001r4-3Y; Thu, 10 Aug 2023 00:26:47 +0000 Received: by outflank-mailman (input) for mailman id 581671; Thu, 10 Aug 2023 00:26:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVl-0001qv-N0 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVl-0001Lc-MJ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtVl-0008Ih-Lc for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:26:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=MV2wU1nZCWu4kvXghEyFO6g0G+UXxWdnLUI3kcoctD8=; b=FvVIn5lRAUNL1I1MUyGa47xyBS La9xrXk2sYJNf725lwrsnYlMWSWM9ESzPYKwByocyCHFQhf2okdf5fI5nlRn8T0F0fBasDSJAHoEt aJacDhijuXYoNZruyabqaTD+KPGrTSXwthwFtz88ubtAsmX9oaZJENYETBOsUOS2F14U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Message-Id: Date: Thu, 10 Aug 2023 00:26:45 +0000 commit 66e51e6ba02605bbefa38f59937c2c2b85bc1c77 Author: Andrew Cooper AuthorDate: Fri May 12 15:37:02 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Extend x86_cpu_policy_fill_native() with a read of ARCH_CAPS based on the CPUID information just read, removing the specially handling in calculate_raw_cpu_policy(). Right now, the only use of x86_cpu_policy_fill_native() outside of Xen is the unit tests. Getting MSR data in this context is left to whomever first encounters a genuine need to have it. Extend generic_identify() to read ARCH_CAPS into x86_capability[], which is fed into the Host Policy. This in turn means there's no need to special case arch_caps in calculate_host_policy(). No practical change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 70553000d6b44dd7c271a35932b0b3e1f22c5532) --- xen/arch/x86/cpu-policy.c | 12 ------------ xen/arch/x86/cpu/common.c | 5 +++++ xen/lib/x86/cpuid.c | 7 ++++++- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index b650af431c..39e53523a6 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -354,9 +354,6 @@ static void __init calculate_raw_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -409,15 +406,6 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); } static void __init guest_common_default_feature_adjustments(uint32_t *fs) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 0ad0069d26..f506a2962f 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -468,6 +468,11 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(0xd, 1, &c->x86_capability[FEATURESET_Da1], &tmp, &tmp, &tmp); + + if (test_bit(X86_FEATURE_ARCH_CAPS, c->x86_capability)) + rdmsr(MSR_ARCH_CAPABILITIES, + c->x86_capability[FEATURESET_m10Al], + c->x86_capability[FEATURESET_m10Ah]); } /* diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e795ce3750..07e5501914 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -226,7 +226,12 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - /* TODO MSRs */ +#ifdef __XEN__ + /* TODO MSR_PLATFORM_INFO */ + + if ( p->feat.arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +#endif x86_cpu_policy_recalc_synth(p); } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:26:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:26:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581672.910818 (Exim 4.92) (envelope-from ) id 1qTtVw-0001to-7Z; Thu, 10 Aug 2023 00:26:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581672.910818; Thu, 10 Aug 2023 00:26:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVw-0001tg-4y; Thu, 10 Aug 2023 00:26:56 +0000 Received: by outflank-mailman (input) for mailman id 581672; Thu, 10 Aug 2023 00:26:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtVv-0001tZ-Q0 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/boot: Expose MSR_ARCH_CAPS data in guest max policies Message-Id: Date: Thu, 10 Aug 2023 00:26:55 +0000 commit 3b7887affa8df4ff33610b0684f104b620fa0c07 Author: Andrew Cooper AuthorDate: Fri May 12 15:53:35 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/boot: Expose MSR_ARCH_CAPS data in guest max policies We already have common and default feature adjustment helpers. Introduce one for max featuresets too. Offer MSR_ARCH_CAPS unconditionally in the max policy, and stop clobbering the data inherited from the Host policy. This will be necessary to level a VM safely for migration. Annotate the ARCH_CAPS CPUID bit as special. Note: ARCH_CAPS is still max-only for now, so will not be inhereted by the default policies. With this done, the special case for dom0 can be shrunk to just resampling the Host policy (as ARCH_CAPS isn't visible by default yet). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bbb289f3d5bdd3358af748d7c567343532ac45b5) --- xen/arch/x86/cpu-policy.c | 42 ++++++++++++++++------------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 25 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 39e53523a6..770742a78e 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -408,6 +408,25 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; } +static void __init guest_common_max_feature_adjustments(uint32_t *fs) +{ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests + * unconditionally, although limit it to Intel systems as it is highly + * uarch-specific. + * + * In particular, the RSBA and RRSBA bits mean "you might migrate to a + * system where RSB underflow uses alternative predictors (a.k.a + * Retpoline not safe)", so these need to be visible to a guest in all + * cases, even when it's only some other server in the pool which + * suffers the identified behaviour. + */ + __set_bit(X86_FEATURE_ARCH_CAPS, fs); + } +} + static void __init guest_common_default_feature_adjustments(uint32_t *fs) { /* @@ -483,6 +502,7 @@ static void __init calculate_pv_max_policy(void) __clear_bit(X86_FEATURE_IBRS, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -490,8 +510,6 @@ static void __init calculate_pv_max_policy(void) recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -575,6 +593,7 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_XSAVES, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -583,8 +602,6 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) @@ -798,7 +815,10 @@ void __init init_dom0_cpuid_policy(struct domain *d) * domain policy logic gains a better understanding of MSRs. */ if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { p->feat.arch_caps = true; + p->arch_caps.raw = host_cpu_policy.arch_caps.raw; + } /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) @@ -828,20 +848,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) p->platform_info.cpuid_faulting = false; recalculate_cpuid_policy(d); - - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } } static void __init __maybe_unused build_assertions(void) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 82a1073d3f..8e5ee6fda6 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -284,7 +284,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581673.910823 (Exim 4.92) (envelope-from ) id 1qTtW6-0001x5-AM; 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Thu, 10 Aug 2023 00:27:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=26Vh31lcRAOcV4AAhHHHyEQR283F3ekaU9UY00zevWE=; b=ZSgaz6pvw5ye3MO01qb7FHd/h5 ezA+UZAjYkvXRO6epGNvjdPumwX2x3bYD6s3MnK3ecTK+AeftkL6+uBc1FRqcqW/AGf8xOINykiJt 2H9f/mJjYax3UtCmcJj1l+hKbNx/HyCAsfoPJoI7jlKt2XOTVpIKBubiERrRzQMWUHNU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/vtx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:27:05 +0000 commit 6a007c521c2d3dcce56b7454d779c28ce720ac3d Author: Andrew Cooper AuthorDate: Mon May 15 16:59:25 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:53 2023 +0100 x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3) --- xen/arch/x86/hvm/vmx/vmx.c | 8 ++------ xen/include/asm-x86/cpufeature.h | 3 +++ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index a75bdde4ff..6c35812d05 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2779,8 +2779,6 @@ static void __init ler_to_fixup_check(void); */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2788,10 +2786,8 @@ static bool __init has_if_pschange_mc(void) if ( cpu_has_hypervisor ) return false; - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 35fae5d649..ef4eedcaed 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -143,6 +143,9 @@ #define cpu_has_avx_vnni boot_cpu_has(X86_FEATURE_AVX_VNNI) #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581674.910827 (Exim 4.92) (envelope-from ) id 1qTtWG-0001ze-Br; Thu, 10 Aug 2023 00:27:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581674.910827; Thu, 10 Aug 2023 00:27:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWG-0001zW-9E; Thu, 10 Aug 2023 00:27:16 +0000 Received: by outflank-mailman (input) for mailman id 581674; Thu, 10 Aug 2023 00:27:16 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWF-0001zP-W1 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWF-0001MC-VK for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:15 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtWF-0008KD-Uf for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Wt4xtlTvRN08OkGe3oLXPTQRffv9K1jU+Y3S41L9fLk=; b=F6TiZXNEhf94woFq9CcEe53lp0 kTrz+7GjbsOEmBR9HvUDpPBfabWWgMiFzOMrf3suvcbKdMU9trxVPkfkWMlvJ0hMMZ8e3rg4nUCFa +DHlIh7Ky4kah0BKgyYJ/L2Vo3MlQCa1/G3BhH0Zom+d41HKmbRhIV988KTgTOHm2e9o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/tsx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:27:15 +0000 commit 7d1d8152c4af5fa6f5831290047e9df61d96782c Author: Andrew Cooper AuthorDate: Mon May 15 19:05:01 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/tsx: Remove opencoded MSR_ARCH_CAPS check The current cpu_has_tsx_ctrl tristate is serving double pupose; to signal the first pass through tsx_init(), and the availability of MSR_TSX_CTRL. Drop the variable, replacing it with a once boolean, and altering cpu_has_tsx_ctrl to come out of the feature information. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 205a9f970378c31ae3e00b52d59103a2e881b9e0) --- xen/arch/x86/tsx.c | 13 ++++++++----- xen/include/asm-x86/cpufeature.h | 1 + xen/include/asm-x86/processor.h | 2 +- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/tsx.c b/xen/arch/x86/tsx.c index be89741a2f..287812ec2b 100644 --- a/xen/arch/x86/tsx.c +++ b/xen/arch/x86/tsx.c @@ -19,7 +19,6 @@ * controlling TSX behaviour, and where TSX isn't force-disabled by firmware. */ int8_t __read_mostly opt_tsx = -1; -int8_t __read_mostly cpu_has_tsx_ctrl = -1; bool __read_mostly rtm_disabled; static int __init parse_tsx(const char *s) @@ -37,24 +36,28 @@ custom_param("tsx", parse_tsx); void tsx_init(void) { + static bool __read_mostly once; + /* * This function is first called between microcode being loaded, and CPUID * being scanned generally. Read into boot_cpu_data.x86_capability[] for * the cpu_has_* bits we care about using here. */ - if ( unlikely(cpu_has_tsx_ctrl < 0) ) + if ( unlikely(!once) ) { - uint64_t caps = 0; bool has_rtm_always_abort; + once = true; + if ( boot_cpu_data.cpuid_level >= 7 ) boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_ARCH_CAPS)] = cpuid_count_edx(7, 0); if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); + rdmsr(MSR_ARCH_CAPABILITIES, + boot_cpu_data.x86_capability[FEATURESET_m10Al], + boot_cpu_data.x86_capability[FEATURESET_m10Ah]); - cpu_has_tsx_ctrl = !!(caps & ARCH_CAPS_TSX_CTRL); has_rtm_always_abort = cpu_has_rtm_always_abort; if ( cpu_has_tsx_ctrl && cpu_has_srbds_ctrl ) diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index ef4eedcaed..1ab0602524 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -145,6 +145,7 @@ /* MSR_ARCH_CAPS */ #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) +#define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index 96621ec39f..376a276669 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -626,7 +626,7 @@ static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model, return fam; } -extern int8_t opt_tsx, cpu_has_tsx_ctrl; +extern int8_t opt_tsx; extern bool rtm_disabled; void tsx_init(void); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581675.910831 (Exim 4.92) (envelope-from ) id 1qTtWR-00023u-DQ; Thu, 10 Aug 2023 00:27:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581675.910831; Thu, 10 Aug 2023 00:27:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWR-00023n-Ap; Thu, 10 Aug 2023 00:27:27 +0000 Received: by outflank-mailman (input) for mailman id 581675; Thu, 10 Aug 2023 00:27:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWQ-00023c-3J for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWQ-0001ML-2B for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:26 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtWQ-0008Kc-1X for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:26 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GHlgKcN0yTRGlzcTlv+daSueg6TGQmdd1H4MQc0fnMk=; b=ZtdNV3mr+Q8WfiRKs5wd9Yvaxi 29JGClv+F1bkAwf7Kil4rfidKIUd92NURgrC+UtzS62B6VR2DfNl+RlSheL9mzz7RqIs7Xc4uLE6S 5Zfdp56698LHAKc8TFdGzJmcYkChgs4sQCleHT5GohQR5V0t0hEH4mtH+m6PEAp+SvQA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:27:26 +0000 commit 976e4a890ebdd05f8f14b7f1e250be2782ffcf4a Author: Andrew Cooper AuthorDate: Mon May 15 19:15:48 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Replace opencoded checks with regular feature ones. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 511b9f286c3dadd041e0d90beeff7d47c9bf3b7a) --- xen/arch/x86/spec_ctrl.c | 56 +++++++++++++++++++--------------------- xen/include/asm-x86/cpufeature.h | 7 +++++ 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 14649d92f5..242ff65529 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -293,12 +293,10 @@ custom_param("spec-ctrl", parse_spec_ctrl); int8_t __read_mostly opt_xpti_hwdom = -1; int8_t __read_mostly opt_xpti_domu = -1; -static __init void xpti_init_default(uint64_t caps) +static __init void xpti_init_default(void) { - if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) - caps = ARCH_CAPS_RDCL_NO; - - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + cpu_has_rdcl_no ) { if ( opt_xpti_hwdom < 0 ) opt_xpti_hwdom = 0; @@ -401,9 +399,10 @@ static __init int parse_pv_l1tf(const char *s) } custom_param("pv-l1tf", parse_pv_l1tf); -static void __init print_details(enum ind_thunk thunk, uint64_t caps) +static void __init print_details(enum ind_thunk thunk) { unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ if ( boot_cpu_data.cpuid_level >= 7 ) @@ -412,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, caps); printk("Speculative mitigation facilities:\n"); @@ -585,7 +586,7 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(uint64_t caps) +static bool __init retpoline_safe(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -603,7 +604,7 @@ static bool __init retpoline_safe(uint64_t caps) * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( caps & (ARCH_CAPS_RSBA | ARCH_CAPS_IBRS_ALL) ) + if ( cpu_has_rsba || cpu_has_eibrs ) return false; switch ( boot_cpu_data.x86_model ) @@ -852,7 +853,7 @@ static void __init ibpb_calculations(void) } /* Calculate whether this CPU is vulnerable to L1TF. */ -static __init void l1tf_calculations(uint64_t caps) +static __init void l1tf_calculations(void) { bool hit_default = false; @@ -940,7 +941,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */ - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( cpu_has_rdcl_no ) cpu_has_bug_l1tf = false; if ( cpu_has_bug_l1tf && hit_default ) @@ -999,7 +1000,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Calculate whether this CPU is vulnerable to MDS. */ -static __init void mds_calculations(uint64_t caps) +static __init void mds_calculations(void) { /* MDS is only known to affect Intel Family 6 processors at this time. */ if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || @@ -1007,7 +1008,7 @@ static __init void mds_calculations(uint64_t caps) return; /* Any processor advertising MDS_NO should be not vulnerable to MDS. */ - if ( caps & ARCH_CAPS_MDS_NO ) + if ( cpu_has_mds_no ) return; switch ( boot_cpu_data.x86_model ) @@ -1120,10 +1121,6 @@ void __init init_speculation_mitigations(void) enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; bool cpu_has_bug_taa; - uint64_t caps = 0; - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); hw_smt_enabled = check_smt_enabled(); @@ -1170,7 +1167,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe(caps) ) + if ( retpoline_safe() ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; @@ -1394,13 +1391,13 @@ void __init init_speculation_mitigations(void) * threads. Activate this if SMT is enabled, and Xen is using a non-zero * MSR_SPEC_CTRL setting. */ - if ( boot_cpu_has(X86_FEATURE_IBRSB) && !(caps & ARCH_CAPS_IBRS_ALL) && + if ( boot_cpu_has(X86_FEATURE_IBRSB) && !cpu_has_eibrs && hw_smt_enabled && default_xen_spec_ctrl ) setup_force_cpu_cap(X86_FEATURE_SC_MSR_IDLE); - xpti_init_default(caps); + xpti_init_default(); - l1tf_calculations(caps); + l1tf_calculations(); /* * By default, enable PV domU L1TF mitigations on all L1TF-vulnerable @@ -1421,7 +1418,7 @@ void __init init_speculation_mitigations(void) if ( !boot_cpu_has(X86_FEATURE_L1D_FLUSH) ) opt_l1d_flush = 0; else if ( opt_l1d_flush == -1 ) - opt_l1d_flush = cpu_has_bug_l1tf && !(caps & ARCH_CAPS_SKIP_L1DFL); + opt_l1d_flush = cpu_has_bug_l1tf && !cpu_has_skip_l1dfl; /* We compile lfence's in by default, and nop them out if requested. */ if ( !opt_branch_harden ) @@ -1444,7 +1441,7 @@ void __init init_speculation_mitigations(void) "enabled. Please assess your configuration and choose an\n" "explicit 'smt=' setting. See XSA-273.\n"); - mds_calculations(caps); + mds_calculations(); /* * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have @@ -1456,7 +1453,7 @@ void __init init_speculation_mitigations(void) * the return-to-guest path. */ if ( opt_unpriv_mmio ) - opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR; + opt_fb_clear_mmio = cpu_has_fb_clear; /* * By default, enable PV and HVM mitigations on MDS-vulnerable hardware. @@ -1486,7 +1483,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio ) setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE); - opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush; + opt_md_clear_hvm &= !cpu_has_skip_l1dfl && !opt_l1d_flush; /* * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT @@ -1517,8 +1514,7 @@ void __init init_speculation_mitigations(void) * we check both to spot TSX in a microcode/cmdline independent way. */ cpu_has_bug_taa = - (cpu_has_rtm || (caps & ARCH_CAPS_TSX_CTRL)) && - (caps & (ARCH_CAPS_MDS_NO | ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO; + (cpu_has_rtm || cpu_has_tsx_ctrl) && cpu_has_mds_no && !cpu_has_taa_no; /* * On TAA-affected hardware, disabling TSX is the preferred mitigation, vs @@ -1537,7 +1533,7 @@ void __init init_speculation_mitigations(void) * plausibly value TSX higher than Hyperthreading...), disable TSX to * mitigate TAA. */ - if ( opt_tsx == -1 && cpu_has_bug_taa && (caps & ARCH_CAPS_TSX_CTRL) && + if ( opt_tsx == -1 && cpu_has_bug_taa && cpu_has_tsx_ctrl && ((hw_smt_enabled && opt_smt) || !boot_cpu_has(X86_FEATURE_SC_VERW_IDLE)) ) { @@ -1562,15 +1558,15 @@ void __init init_speculation_mitigations(void) if ( cpu_has_srbds_ctrl ) { if ( opt_srb_lock == -1 && !opt_unpriv_mmio && - (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) + cpu_has_mds_no && !cpu_has_taa_no && + (!cpu_has_hle || (cpu_has_tsx_ctrl && rtm_disabled)) ) opt_srb_lock = 0; set_in_mcu_opt_ctrl(MCU_OPT_CTRL_RNGDS_MITG_DIS, opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } - print_details(thunk, caps); + print_details(thunk); /* * If MSR_SPEC_CTRL is available, apply Xen's default setting and discard diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 1ab0602524..8216e52c08 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -144,8 +144,15 @@ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) /* MSR_ARCH_CAPS */ +#define cpu_has_rdcl_no boot_cpu_has(X86_FEATURE_RDCL_NO) +#define cpu_has_eibrs boot_cpu_has(X86_FEATURE_EIBRS) +#define cpu_has_rsba boot_cpu_has(X86_FEATURE_RSBA) +#define cpu_has_skip_l1dfl boot_cpu_has(X86_FEATURE_SKIP_L1DFL) +#define cpu_has_mds_no boot_cpu_has(X86_FEATURE_MDS_NO) #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) +#define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) +#define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581676.910835 (Exim 4.92) (envelope-from ) id 1qTtWb-00027d-Fh; Thu, 10 Aug 2023 00:27:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581676.910835; Thu, 10 Aug 2023 00:27:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWb-00027O-Ck; Thu, 10 Aug 2023 00:27:37 +0000 Received: by outflank-mailman (input) for mailman id 581676; Thu, 10 Aug 2023 00:27:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWa-00027B-6F for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWa-0001MT-5X for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:36 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtWa-0008L3-4Z for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:36 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vDKY33OyMdsr5fFJMKIdp4vEG1TedQCO35622hxjVmg=; b=q+lAcTlQaWBJXTBNIZQOGeREJX NhaGwB9wh9ZtGw+D3//cu9tJbFMtE604+qbAi+68pjYKNePgd7h1ufKQL4TNXFoMlfJUJt/KCgS+l LO15oPwLBNj8wjNF1oGFIAkmHAXQysHOiV2AbMg+DoR2la1H6U07t2H1+m1uPg3BIE0I=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Update hardware hints Message-Id: Date: Thu, 10 Aug 2023 00:27:36 +0000 commit c80112cc0308e76b86267e3a4cb01b7161320548 Author: Andrew Cooper AuthorDate: Tue May 30 16:03:16 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Update hardware hints * Rename IBRS_ALL to EIBRS. EIBRS is the term that everyone knows, and this makes ARCH_CAPS_EIBRS match the X86_FEATURE_EIBRS form. * Print RRSBA too, which is also a hint about behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94200e1bae07e725cc07238c11569c5cab7befb7) --- xen/arch/x86/spec_ctrl.c | 5 +++-- xen/include/asm-x86/msr-index.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 242ff65529..0c6b10b290 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,10 +420,11 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", - (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", + (caps & ARCH_CAPS_RRSBA) ? " RRSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL" : "", (e8b & cpufeat_mask(X86_FEATURE_SSB_NO)) || (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "", diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 767e6a2061..1ba5d2e418 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -58,7 +58,7 @@ #define MSR_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_EIBRS (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581677.910838 (Exim 4.92) (envelope-from ) id 1qTtWl-0002BV-H0; Thu, 10 Aug 2023 00:27:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581677.910838; Thu, 10 Aug 2023 00:27:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWl-0002BN-ES; Thu, 10 Aug 2023 00:27:47 +0000 Received: by outflank-mailman (input) for mailman id 581677; Thu, 10 Aug 2023 00:27:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWk-0002B0-96 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWk-0001Mx-8O for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:46 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtWk-0008Lk-7l for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=P28LGHMBNPZblIbjn16DStQcMHRTDgU7rYKrlQEUbgo=; b=rcDXw0eKFpBPSIqf4znpw66Bw8 lAiSK9WNr+BHpuOZfJ/MA86pYRIT8bUBk3p66BChKGWBSTHwmawSDyuea+i8n/5BXXGBLr8Ifa9EU bJnj3yrH6nTJrdNxCMQEW0AA2qT0PsIynMSREG8V1BPH7RbS+kLl9EJ0gcIRFuw8EBGA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() Message-Id: Date: Thu, 10 Aug 2023 00:27:46 +0000 commit d80d4cc42fac8969766b0ad9124fef3719dd2939 Author: Andrew Cooper AuthorDate: Fri Mar 10 16:23:20 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() This is prep work, split out to simply the diff on the following change. * Split the INTEL check out of the IvyBridge RDRAND check, as the former will be reused. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 064f572f96f1558faae0a74cad616ba95ec8ff34) --- xen/arch/x86/cpu-policy.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 770742a78e..f78baa2059 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -429,21 +429,24 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) static void __init guest_common_default_feature_adjustments(uint32_t *fs) { - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + } /* * On certain hardware, speculative or errata workarounds can result in -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:27:57 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:27:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581678.910844 (Exim 4.92) (envelope-from ) id 1qTtWv-0002F8-LS; Thu, 10 Aug 2023 00:27:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581678.910844; Thu, 10 Aug 2023 00:27:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWv-0002F0-HS; Thu, 10 Aug 2023 00:27:57 +0000 Received: by outflank-mailman (input) for mailman id 581678; Thu, 10 Aug 2023 00:27:56 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWu-0002El-C9 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtWu-0001N4-BO for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtWu-0008MD-Aj for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:27:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jynxInn77f6XtrGD2oKHTR2IUp7nOGCXGcwGXaK2maY=; b=B7XEzLrXAPW2LsBcTt+Ygk3wzW 1w8BGshhFIxFIzdpWAmtHwYgbatvTHsHt5c8jh3Yw8yBXb5LwaxsXtVGnpNvjVAIuHlqtwopkn+DW wBa2Zewl4n+ppPsNNDQ9jmB6g50+CBNVybGvJWt3lgMSBRt7xfUUFrHU7uZLZVSdMU30=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Fix the rendering of FB_CLEAR Message-Id: Date: Thu, 10 Aug 2023 00:27:56 +0000 commit 5010f37d9664057ced5ee71217957c3a47933706 Author: Andrew Cooper AuthorDate: Mon Jun 12 20:24:00 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Fix the rendering of FB_CLEAR FB_CLEAR is a read-only status bit, not a read-write control. Move it from "Hardware features" into "Hardware hints". Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 921afcbae843bb3f575a8f4a270b8e6cf471f4ca) --- xen/arch/x86/spec_ctrl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 0c6b10b290..701843311c 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,7 +420,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -433,6 +433,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "", (caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "", (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", + (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", @@ -442,7 +443,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -458,7 +459,6 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); /* Compiled-in support which pertains to mitigations. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581679.910847 (Exim 4.92) (envelope-from ) id 1qTtX5-0002I3-Li; Thu, 10 Aug 2023 00:28:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581679.910847; Thu, 10 Aug 2023 00:28:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtX5-0002Hv-J1; Thu, 10 Aug 2023 00:28:07 +0000 Received: by outflank-mailman (input) for mailman id 581679; Thu, 10 Aug 2023 00:28:06 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtX4-0002Hk-FI for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:06 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtX4-0001NP-Ea for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:06 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtX4-0008Mu-Dm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:06 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=veLnIqyHYNJpWLIqjPnYyI7ESOruS4x8uToJVS70Rkc=; b=OHRNN+ElHWzPG9MwbYed6Li7nB uZKEIrWHGX4ucbEOx2j466a4J97qDoGE08BJbLj9GD7ogW4GFLUb6X097cro6c41Dc0O0vEl9Lsk3 7vGqQiAV1/wA/GGQrQcAEoHaph8Jvl1AL6eCTPCHSEcZTRLxk7zIqXGo9XVJNEdQzOhw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Message-Id: Date: Thu, 10 Aug 2023 00:28:06 +0000 commit bf67861f787cf2b32503005575d326fc2d0a2ff7 Author: Andrew Cooper AuthorDate: Mon Jun 5 11:09:11 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Reword the comment for 'S' to include an incompatible set of features on the same core. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 3f63f4510422c29fda7ba238b880cbb53eca34fe) --- xen/arch/x86/spec_ctrl.c | 3 +++ xen/common/kernel.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 701843311c..302a53fa12 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1139,7 +1139,10 @@ void __init init_speculation_mitigations(void) if ( read_cr4() & X86_CR4_CET ) { if ( !has_spec_ctrl ) + { printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } else if ( opt_ibrs == -1 ) opt_ibrs = ibrs = true; diff --git a/xen/common/kernel.c b/xen/common/kernel.c index 7ed96521f9..9f22399063 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -339,7 +339,7 @@ unsigned int tainted; * 'H' - HVM forced emulation prefix is permitted. * 'M' - Machine had a machine check experience. * 'U' - Platform is unsecure (usually due to an errata on the platform). - * 'S' - Out of spec CPU (One core has a feature incompatible with others). + * 'S' - Out of spec CPU (Incompatible features on one or more cores). * * The string is overwritten by the next call to print_taint(). */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581680.910851 (Exim 4.92) (envelope-from ) id 1qTtXF-0002KZ-NG; Thu, 10 Aug 2023 00:28:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581680.910851; Thu, 10 Aug 2023 00:28:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXF-0002KR-KW; Thu, 10 Aug 2023 00:28:17 +0000 Received: by outflank-mailman (input) for mailman id 581680; Thu, 10 Aug 2023 00:28:16 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXE-0002KJ-ID for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:16 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXE-0001NW-HV for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:16 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtXE-0008NS-Gm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:16 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NjR/BlDtQOORkMEgTd+bqj1TNOqGMnktaDONyTnZYjQ=; b=mC5PBqyooMnS+/UvotDN8RGgOP tQwACGcty5++fhTWJtuy2INJt2+vHclR8HG/zEKQ32XPia15IWwTec+pX9T8/fAbFmMyvZQyvwhmB jXRwB29rcyKaWm++MvWDbiG1X10J/L+MHsme2r+y20boHVny/CUQhTNaBVaLVFrTPPOk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() Message-Id: Date: Thu, 10 Aug 2023 00:28:16 +0000 commit 1dba8d38cf7f116726877b4cc46eb34b7f8a4b11 Author: Andrew Cooper AuthorDate: Fri May 26 10:35:47 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() This is prep work, split out to simply the diff on the following change. * Rename to retpoline_calculations(), and call unconditionally. It is shortly going to synthesise missing enumerations required for guest safety. * For the model check switch statement, store the result in a variable and break rather than returning directly. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 724c0d94ff79b208312d30676392bfdd693403be) --- xen/arch/x86/spec_ctrl.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 302a53fa12..4a38a900df 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -587,9 +587,10 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(void) +static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; + bool safe = false; if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; @@ -627,29 +628,31 @@ static bool __init retpoline_safe(void) case 0x3f: /* Haswell EX/EP */ case 0x45: /* Haswell D */ case 0x46: /* Haswell H */ - return true; + safe = true; + break; /* * Broadwell processors are retpoline-safe after specific microcode * versions. */ case 0x3d: /* Broadwell */ - return ucode_rev >= 0x2a; + safe = ucode_rev >= 0x2a; break; case 0x47: /* Broadwell H */ - return ucode_rev >= 0x1d; + safe = ucode_rev >= 0x1d; break; case 0x4f: /* Broadwell EP/EX */ - return ucode_rev >= 0xb000021; + safe = ucode_rev >= 0xb000021; break; case 0x56: /* Broadwell D */ switch ( boot_cpu_data.x86_mask ) { - case 2: return ucode_rev >= 0x15; - case 3: return ucode_rev >= 0x7000012; - case 4: return ucode_rev >= 0xf000011; - case 5: return ucode_rev >= 0xe000009; + case 2: safe = ucode_rev >= 0x15; break; + case 3: safe = ucode_rev >= 0x7000012; break; + case 4: safe = ucode_rev >= 0xf000011; break; + case 5: safe = ucode_rev >= 0xe000009; break; default: printk("Unrecognised CPU stepping %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_mask); - return false; + safe = false; + break; } break; @@ -663,7 +666,8 @@ static bool __init retpoline_safe(void) case 0x67: /* Cannonlake? */ case 0x8e: /* Kabylake M */ case 0x9e: /* Kabylake D */ - return false; + safe = false; + break; /* * Atom processors before Goldmont Plus/Gemini Lake are retpoline-safe. @@ -682,13 +686,17 @@ static bool __init retpoline_safe(void) case 0x5c: /* Goldmont */ case 0x5f: /* Denverton */ case 0x85: /* Knights Mill */ - return true; + safe = true; + break; default: printk("Unrecognised CPU model %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_model); - return false; + safe = false; + break; } + + return safe; } /* @@ -1121,7 +1129,7 @@ void __init init_speculation_mitigations(void) { enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; - bool cpu_has_bug_taa; + bool cpu_has_bug_taa, retpoline_safe; hw_smt_enabled = check_smt_enabled(); @@ -1150,6 +1158,9 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } + /* Determine if retpoline is safe on this CPU. */ + retpoline_safe = retpoline_calculations(); + /* * Has the user specified any custom BTI mitigations? If so, follow their * instructions exactly and disable all heuristics. @@ -1171,7 +1182,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe() ) + if ( retpoline_safe ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581681.910854 (Exim 4.92) (envelope-from ) id 1qTtXP-0002NX-Oj; Thu, 10 Aug 2023 00:28:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581681.910854; Thu, 10 Aug 2023 00:28:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXP-0002NP-M5; Thu, 10 Aug 2023 00:28:27 +0000 Received: by outflank-mailman (input) for mailman id 581681; Thu, 10 Aug 2023 00:28:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXO-0002NF-LK for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXO-0001Nh-Kb for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:26 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtXO-0008O7-Jt for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:26 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ODApY5W+LJBl3RrIojPoLJwCIIbQvu/6GPkJ/AFXLTM=; b=gX8Y5bNKIyw/Go0F1wZ5p/tBAX VAKbQQQEfpv1qWpMQ+7o6fj5qEPfTDCoH4gSl5olHDXrWiP1uGexmkbNmjkFkqEg9dvpCKeEXVIUr E1moqcsxdnRvLnZFKVA/86d8PfNAvnPwJYUL0kzpkOISAkg6XxBFk6xoXLsN8TWBItm4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate Message-Id: Date: Thu, 10 Aug 2023 00:28:26 +0000 commit d166c8f109b12c51bf854d1d8a0ab061b6b316cd Author: Andrew Cooper AuthorDate: Thu May 25 20:31:22 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate In order to level a VM safely for migration, the toolstack needs to know the RSBA/RRSBA properties of the CPU, whether or not they happen to be enumerated. See the code comment for details. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 36525a964fb629d0bd26e5a1c42de467af7a42a7) --- xen/arch/x86/spec_ctrl.c | 100 +++++++++++++++++++++++++++++++++++++-- xen/include/asm-x86/cpufeature.h | 1 + 2 files changed, 96 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 4a38a900df..75de259592 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -586,7 +586,10 @@ static bool __init check_smt_enabled(void) return false; } -/* Calculate whether Retpoline is known-safe on this CPU. */ +/* + * Calculate whether Retpoline is known-safe on this CPU. Fix up the + * RSBA/RRSBA bits as necessary. + */ static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -600,15 +603,93 @@ static bool __init retpoline_calculations(void) return false; /* - * RSBA may be set by a hypervisor to indicate that we may move to a - * processor which isn't retpoline-safe. + * The meaning of the RSBA and RRSBA bits have evolved over time. The + * agreed upon meaning at the time of writing (May 2023) is thus: + * + * - RSBA (RSB Alternative) means that an RSB may fall back to an + * alternative predictor on underflow. Skylake uarch and later all have + * this property. Broadwell too, when running microcode versions prior + * to Jan 2018. + * + * - All eIBRS-capable processors suffer RSBA, but eIBRS also introduces + * tagging of predictions with the mode in which they were learned. So + * when eIBRS is active, RSBA becomes RRSBA (Restricted RSBA). + * + * - CPUs are not expected to enumerate both RSBA and RRSBA. + * + * Some parts (Broadwell) are not expected to ever enumerate this + * behaviour directly. Other parts have differing enumeration with + * microcode version. Fix up Xen's idea, so we can advertise them safely + * to guests, and so toolstacks can level a VM safety for migration. + * + * The following states exist: + * + * | | RSBA | EIBRS | RRSBA | Notes | Action (in principle) | + * |---+------+-------+-------+--------------------+-----------------------| + * | 1 | 0 | 0 | 0 | OK (older parts) | Maybe +RSBA | + * | 2 | 0 | 0 | 1 | Broken | (+RSBA, -RRSBA) | + * | 3 | 0 | 1 | 0 | OK (pre-Aug ucode) | +RRSBA | + * | 4 | 0 | 1 | 1 | OK | | + * | 5 | 1 | 0 | 0 | OK | | + * | 6 | 1 | 0 | 1 | Broken | (-RRSBA) | + * | 7 | 1 | 1 | 0 | Broken | (-RSBA, +RRSBA) | + * | 8 | 1 | 1 | 1 | Broken | (-RSBA) | + * + * However, we don't need perfect adherence to the spec. We only need + * RSBA || RRSBA to indicate "alternative predictors potentially in use". + * Rows 1 & 3 are fixed up by later logic, as they're known configurations + * which exist in the world. * + * Complain loudly at the broken cases. They're safe for Xen to use (so we + * don't attempt to correct), and may or may not exist in reality, but if + * we ever encounter them in practice, something is wrong and needs + * further investigation. + */ + if ( cpu_has_eibrs ? cpu_has_rsba /* Rows 7, 8 */ + : cpu_has_rrsba /* Rows 2, 6 */ ) + { + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: RSBA %u, EIBRS %u, RRSBA %u\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, ucode_rev, + cpu_has_rsba, cpu_has_eibrs, cpu_has_rrsba); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + /* * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( cpu_has_rsba || cpu_has_eibrs ) + if ( cpu_has_eibrs ) + { + /* + * Prior to the August 2023 microcode, many eIBRS-capable parts did + * not enumerate RRSBA. + */ + if ( !cpu_has_rrsba ) + setup_force_cpu_cap(X86_FEATURE_RRSBA); + + return false; + } + + /* + * RSBA is explicitly enumerated in some cases, but may also be set by a + * hypervisor to indicate that we may move to a processor which isn't + * retpoline-safe. + */ + if ( cpu_has_rsba ) return false; + /* + * At this point, we've filtered all the legal RSBA || RRSBA cases (or the + * known non-ideal cases). If ARCH_CAPS is visible, trust the absence of + * RSBA || RRSBA. There's no known microcode which advertises ARCH_CAPS + * without RSBA or EIBRS, and if we're virtualised we can't rely the model + * check anyway. + */ + if ( cpu_has_arch_caps ) + return true; + switch ( boot_cpu_data.x86_model ) { case 0x17: /* Penryn */ @@ -696,6 +777,15 @@ static bool __init retpoline_calculations(void) break; } + if ( !safe ) + { + /* + * Note: the eIBRS-capable parts are filtered out earlier, so the + * remainder here are the ones which suffer RSBA behaviour. + */ + setup_force_cpu_cap(X86_FEATURE_RSBA); + } + return safe; } @@ -1158,7 +1248,7 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } - /* Determine if retpoline is safe on this CPU. */ + /* Determine if retpoline is safe on this CPU. Fix up RSBA/RRSBA enumerations. */ retpoline_safe = retpoline_calculations(); /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 8216e52c08..f8dce8e461 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -153,6 +153,7 @@ #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) +#define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581682.910859 (Exim 4.92) (envelope-from ) id 1qTtXZ-0002QB-Qs; Thu, 10 Aug 2023 00:28:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581682.910859; Thu, 10 Aug 2023 00:28:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXZ-0002Q2-Nd; Thu, 10 Aug 2023 00:28:37 +0000 Received: by outflank-mailman (input) for mailman id 581682; Thu, 10 Aug 2023 00:28:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXY-0002Pr-OV for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXY-0001No-Nm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:36 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtXY-0008Ol-N1 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:36 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7a1OLAwrBm0g7huhmLD06z2NkfFJ7f1KwFsmXDIqCAk=; b=xsx9O38k9JEGVod9U88dSq7lCv +ArZPmYEEUadjIIG1CVbKB2Esr/g+ppyZfkROi7G+1ZMtO/9C2eBoLVuTOuuI3PrMZyAk3pP51YjX 7RRnNUpyW4OGrRBbo5V/DyIl31Q48xEbO3YQilpFidD09uUWUiacBLTFGk7q8ze84Xbs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: Derive RSBA/RRSBA for guest policies Message-Id: Date: Thu, 10 Aug 2023 00:28:36 +0000 commit 04b7eda221a90c01cfa01bc1086c9b1f85502560 Author: Andrew Cooper AuthorDate: Wed May 24 15:41:21 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/cpu-policy: Derive RSBA/RRSBA for guest policies The RSBA bit, "RSB Alternative", means that the RSB may use alternative predictors when empty. From a practical point of view, this mean "Retpoline not safe". Enhanced IBRS (officially IBRS_ALL in Intel's docs, previously IBRS_ATT) is a statement that IBRS is implemented in hardware (as opposed to the form retrofitted to existing CPUs in microcode). The RRSBA bit, "Restricted-RSBA", is a combination of RSBA, and the eIBRS property that predictions are tagged with the mode in which they were learnt. Therefore, it means "when eIBRS is active, the RSB may fall back to alternative predictors but restricted to the current prediction mode". As such, it's stronger statement than RSBA, but still means "Retpoline not safe". CPUs are not expected to enumerate both RSBA and RRSBA. Add feature dependencies for EIBRS and RRSBA. While technically they're not linked, absolutely nothing good can come of letting the guest see RRSBA without EIBRS. Nor a guest seeing EIBRS without IBRSB. Furthermore, we use this dependency to simplify the max derivation logic. The max policies gets RSBA and RRSBA unconditionally set (with the EIBRS dependency maybe hiding RRSBA). We can run any VM, even if it has been told "somewhere you might run, Retpoline isn't safe". The default policies are more complicated. A guest shouldn't see both bits, but it needs to see one if the current host suffers from any form of RSBA, and which bit it needs to see depends on whether eIBRS is visible or not. Therefore, the calculation must be performed after sanitise_featureset(). Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit e0586a4ff514590eec50185e2440b97f9a31cb7f) --- xen/arch/x86/cpu-policy.c | 39 +++++++++++++++++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 4 +-- xen/tools/gen-cpuid.py | 5 +++- 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index f78baa2059..b8548fd52f 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -422,8 +422,17 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) * Retpoline not safe)", so these need to be visible to a guest in all * cases, even when it's only some other server in the pool which * suffers the identified behaviour. + * + * We can always run any VM which has previously (or will + * subsequently) run on hardware where Retpoline is not safe. + * Note: + * - The dependency logic may hide RRSBA for other reasons. + * - The max policy does not constitute a sensible configuration to + * run a guest in. */ __set_bit(X86_FEATURE_ARCH_CAPS, fs); + __set_bit(X86_FEATURE_RSBA, fs); + __set_bit(X86_FEATURE_RRSBA, fs); } } @@ -531,6 +540,21 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } @@ -627,6 +651,21 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 8e5ee6fda6..b625d3c5db 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -312,7 +312,7 @@ XEN_CPUFEATURE(CET_SSS, 15*32+18) /* CET Supervisor Shadow Stacks s /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ -XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*! RSB Alternative (Retpoline not safe) */ XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ @@ -328,7 +328,7 @@ XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Prop XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ -XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*! Restricted RSB Alternative */ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 922622fdda..fd32da3a86 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -317,7 +317,7 @@ def crunch_numbers(state): # IBRSB/IBRS, and we pass this MSR directly to guests. Treating them # as dependent features simplifies Xen's logic, and prevents the guest # from seeing implausible configurations. - IBRSB: [STIBP, SSBD, INTEL_PSFD], + IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], AMD_STIBP: [STIBP_ALWAYS], @@ -327,6 +327,9 @@ def crunch_numbers(state): # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), + + # The behaviour described by RRSBA depend on eIBRS being active. + EIBRS: [RRSBA], } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581683.910863 (Exim 4.92) (envelope-from ) id 1qTtXj-0002TM-Tv; Thu, 10 Aug 2023 00:28:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581683.910863; Thu, 10 Aug 2023 00:28:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXj-0002TF-R4; Thu, 10 Aug 2023 00:28:47 +0000 Received: by outflank-mailman (input) for mailman id 581683; Thu, 10 Aug 2023 00:28:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXi-0002T2-Re for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXi-0001On-Qs for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:46 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtXi-0008PF-QC for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YxlhaKBtKigVGbSU03UXQDznnZwZdD1biAy9zVsRC+8=; b=6q9rxhIWKG1Vq9BC8KmPuhj+Ne m8w/Yb5m7F5rKVzOBoAGt9b5iVvnAOA3hLXI4EmMkmj1OqV3ak26DSABSxmxPhN5whFteMg3DB2PN Z5UI9yBClogura46EB0F7uSQUU7vayB+03VR6h1KQgkp8zJxpTYUG7nF3kI9Z3ZlaPVA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libs/guest: introduce support for setting guest MSRs Message-Id: Date: Thu, 10 Aug 2023 00:28:46 +0000 commit c5eadfe0d083dd6ace4f82c924996b3cf2deea00 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:53 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libs/guest: introduce support for setting guest MSRs Like it's done with CPUID, introduce support for passing MSR values to xc_cpuid_apply_policy(). The chosen format for expressing MSR policy data matches the current one used for CPUID. Note that existing callers of xc_cpuid_apply_policy() can pass NULL as the value for the newly introduced 'msr' parameter in order to preserve the same functionality, and in fact that's done in libxl on this patch. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit ed742cf1b65c822759833027ca5cbb087c506a41) --- tools/include/xenctrl.h | 21 ++++- tools/libs/guest/xg_cpuid_x86.c | 170 +++++++++++++++++++++++++++++++++++++++- tools/libs/light/libxl_cpuid.c | 2 +- 3 files changed, 189 insertions(+), 4 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 893ae39e4a..ebf21ee215 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1829,6 +1829,21 @@ struct xc_xend_cpuid { char *policy[4]; }; +/* + * MSR policy data. + * + * The format of the policy string is the following: + * '1' -> force to 1 + * '0' -> force to 0 + * 'x' -> we don't care (use default) + * 'k' -> pass through host value + */ +struct xc_msr { + uint32_t index; + char policy[65]; +}; +#define XC_MSR_INPUT_UNUSED 0xffffffffu + /* * Make adjustments to the CPUID settings for a domain. * @@ -1840,13 +1855,15 @@ struct xc_xend_cpuid { * Either pass a full new @featureset (and @nr_features), or adjust individual * features (@pae, @itsc, @nested_virt). * - * Then (optionally) apply legacy XEND overrides (@xend) to the result. + * Then (optionally) apply legacy XEND CPUID overrides (@xend) or MSR (@msr) + * to the result. */ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, - bool nested_virt, const struct xc_xend_cpuid *xend); + bool nested_virt, const struct xc_xend_cpuid *xend, + const struct xc_msr *msr); int xc_mca_op(xc_interface *xch, struct xen_mc *mc); int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags, xc_cpumap_t cpumap, unsigned int nr_cpus); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index c04f2b90d4..26197e1a5b 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -423,10 +423,171 @@ static int xc_cpuid_xend_policy( return rc; } +static int compare_msr(const void *l, const void *r) +{ + const xen_msr_entry_t *lhs = l; + const xen_msr_entry_t *rhs = r; + + if ( lhs->idx == rhs->idx ) + return 0; + + return lhs->idx < rhs->idx ? -1 : 1; +} + +static xen_msr_entry_t *find_msr( + xen_msr_entry_t *msrs, unsigned int nr_msrs, + uint32_t index) +{ + const xen_msr_entry_t key = { .idx = index }; + + return bsearch(&key, msrs, nr_msrs, sizeof(*msrs), compare_msr); +} + + +static int xc_msr_policy(xc_interface *xch, domid_t domid, + const struct xc_msr *msr) +{ + int rc; + bool hvm; + xc_dominfo_t di; + unsigned int nr_leaves, nr_msrs; + uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; + /* + * Three full policies. The host, default for the domain type, + * and domain current. + */ + xen_msr_entry_t *host = NULL, *def = NULL, *cur = NULL; + unsigned int nr_host, nr_def, nr_cur; + + if ( xc_domain_getinfo(xch, domid, 1, &di) != 1 || + di.domid != domid ) + { + ERROR("Failed to obtain d%d info", domid); + rc = -ESRCH; + goto out; + } + hvm = di.hvm; + + rc = xc_cpu_policy_get_size(xch, &nr_leaves, &nr_msrs); + if ( rc ) + { + PERROR("Failed to obtain policy info size"); + rc = -errno; + goto out; + } + + if ( (host = calloc(nr_msrs, sizeof(*host))) == NULL || + (def = calloc(nr_msrs, sizeof(*def))) == NULL || + (cur = calloc(nr_msrs, sizeof(*cur))) == NULL ) + { + ERROR("Unable to allocate memory for %u CPUID leaves", nr_leaves); + rc = -ENOMEM; + goto out; + } + + /* Get the domain's current policy. */ + nr_leaves = 0; + nr_cur = nr_msrs; + rc = get_domain_cpu_policy(xch, domid, &nr_leaves, NULL, &nr_cur, cur); + if ( rc ) + { + PERROR("Failed to obtain d%d current policy", domid); + rc = -errno; + goto out; + } + + /* Get the domain type's default policy. */ + nr_leaves = 0; + nr_def = nr_msrs; + rc = get_system_cpu_policy(xch, hvm ? XEN_SYSCTL_cpu_policy_hvm_default + : XEN_SYSCTL_cpu_policy_pv_default, + &nr_leaves, NULL, &nr_def, def); + if ( rc ) + { + PERROR("Failed to obtain %s def policy", hvm ? "hvm" : "pv"); + rc = -errno; + goto out; + } + + /* Get the host policy. */ + nr_leaves = 0; + nr_host = nr_msrs; + rc = get_system_cpu_policy(xch, XEN_SYSCTL_cpu_policy_host, + &nr_leaves, NULL, &nr_host, host); + if ( rc ) + { + PERROR("Failed to obtain host policy"); + rc = -errno; + goto out; + } + + for ( ; msr->index != XC_MSR_INPUT_UNUSED; ++msr ) + { + xen_msr_entry_t *cur_msr = find_msr(cur, nr_cur, msr->index); + const xen_msr_entry_t *def_msr = find_msr(def, nr_def, msr->index); + const xen_msr_entry_t *host_msr = find_msr(host, nr_host, msr->index); + unsigned int i; + + if ( cur_msr == NULL || def_msr == NULL || host_msr == NULL ) + { + ERROR("Missing MSR %#x", msr->index); + rc = -ENOENT; + goto out; + } + + for ( i = 0; i < ARRAY_SIZE(msr->policy) - 1; i++ ) + { + bool val; + + if ( msr->policy[i] == '1' ) + val = true; + else if ( msr->policy[i] == '0' ) + val = false; + else if ( msr->policy[i] == 'x' ) + val = test_bit(63 - i, &def_msr->val); + else if ( msr->policy[i] == 'k' ) + val = test_bit(63 - i, &host_msr->val); + else + { + ERROR("MSR index %#x: bad character '%c' in policy string '%s'", + msr->index, msr->policy[i], msr->policy); + rc = -EINVAL; + goto out; + } + + if ( val ) + set_bit(63 - i, &cur_msr->val); + else + clear_bit(63 - i, &cur_msr->val); + } + } + + /* Feed the transformed policy back up to Xen. */ + rc = xc_set_domain_cpu_policy(xch, domid, 0, NULL, nr_cur, cur, + &err_leaf, &err_subleaf, &err_msr); + if ( rc ) + { + PERROR("Failed to set d%d's policy (err leaf %#x, subleaf %#x, msr %#x)", + domid, err_leaf, err_subleaf, err_msr); + rc = -errno; + goto out; + } + + /* Success! */ + + out: + free(cur); + free(def); + free(host); + + return rc; +} + int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, bool nested_virt, - const struct xc_xend_cpuid *xend) + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr) { int rc; xc_dominfo_t di; @@ -667,6 +828,13 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, if ( xend && (rc = xc_cpuid_xend_policy(xch, domid, xend)) ) goto out; + if ( msr ) + { + rc = xc_msr_policy(xch, domid, msr); + if ( rc ) + goto out; + } + rc = 0; out: diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index b4eacc2bd5..0d876342e3 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -489,7 +489,7 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid); + pae, itsc, nested_virt, info->cpuid, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:28:58 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:28:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581685.910867 (Exim 4.92) (envelope-from ) id 1qTtXt-0002W3-VN; Thu, 10 Aug 2023 00:28:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581685.910867; Thu, 10 Aug 2023 00:28:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXt-0002Vv-Sd; Thu, 10 Aug 2023 00:28:57 +0000 Received: by outflank-mailman (input) for mailman id 581685; Thu, 10 Aug 2023 00:28:57 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXs-0002Vl-Ut for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtXs-0001Pk-UB for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtXs-0008Pi-TS for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:28:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=aDGz7hGrWK//c97CnagT4C0q8UPbWhribT6xBI6g8JM=; b=rhNYd6orkrHWEPnf5E8Tk7wGqu n2BgC9cZhrgiG5CvJdyEgcDz2ezjOwjvQ2khX541ZgZDwN9pRu2/l6igVuuJA1HNRFqxVSDjf0Lec hISXNELSlxz4GEaIugawhsXKuPz5VkIlOuh7tlu5aYL03UFHwdro8Cw5jd1H66HbDUTw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: change the type of libxl_cpuid_policy_list Message-Id: Date: Thu, 10 Aug 2023 00:28:56 +0000 commit 22e8f7b45c37a305daa92e63104b7534c0a9684e Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:54 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: change the type of libxl_cpuid_policy_list Currently libxl_cpuid_policy_list is an opaque type to the users of libxl, and internally it's an array of xc_xend_cpuid objects. Change the type to instead be a structure that contains one array for CPUID policies, in preparation for it also holding another array for MSR policies. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 4825d19603580949144ac2ac5cb22df75c9da954) --- tools/include/libxl.h | 8 +--- tools/libs/light/libxl_cpuid.c | 87 +++++++++++++++++++++++++-------------- tools/libs/light/libxl_internal.h | 4 ++ 3 files changed, 63 insertions(+), 36 deletions(-) diff --git a/tools/include/libxl.h b/tools/include/libxl.h index 2bbbd21f0b..e5cf115a4a 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -1419,12 +1419,8 @@ typedef struct { void libxl_bitmap_init(libxl_bitmap *map); void libxl_bitmap_dispose(libxl_bitmap *map); -/* - * libxl_cpuid_policy is opaque in the libxl ABI. Users of both libxl and - * libxc may not make assumptions about xc_xend_cpuid. - */ -typedef struct xc_xend_cpuid libxl_cpuid_policy; -typedef libxl_cpuid_policy * libxl_cpuid_policy_list; +struct libxl__cpu_policy; +typedef struct libxl__cpu_policy *libxl_cpuid_policy_list; void libxl_cpuid_dispose(libxl_cpuid_policy_list *cpuid_list); int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *l); void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 0d876342e3..48802b9f7c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -19,22 +19,29 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) return !libxl_cpuid_policy_list_length(pl); } -void libxl_cpuid_dispose(libxl_cpuid_policy_list *p_cpuid_list) +void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) { - int i, j; - libxl_cpuid_policy_list cpuid_list = *p_cpuid_list; + libxl_cpuid_policy_list policy = *pl; - if (cpuid_list == NULL) + if (policy == NULL) return; - for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { - for (j = 0; j < 4; j++) - if (cpuid_list[i].policy[j] != NULL) { - free(cpuid_list[i].policy[j]); - cpuid_list[i].policy[j] = NULL; + + if (policy->cpuid) { + unsigned int i, j; + struct xc_xend_cpuid *cpuid_list = policy->cpuid; + + for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { + for (j = 0; j < 4; j++) { + if (cpuid_list[i].policy[j] != NULL) { + free(cpuid_list[i].policy[j]); + } } + } + free(policy->cpuid); } - free(cpuid_list); - *p_cpuid_list = NULL; + + free(policy); + *pl = NULL; return; } @@ -62,11 +69,17 @@ struct cpuid_flags { /* go through the dynamic array finding the entry for a specified leaf. * if no entry exists, allocate one and return that. */ -static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, - uint32_t leaf, uint32_t subleaf) +static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, + uint32_t leaf, uint32_t subleaf) { + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid **list; int i = 0; + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + list = &policy->cpuid; if (*list != NULL) { for (i = 0; (*list)[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { if ((*list)[i].input[0] == leaf && (*list)[i].input[1] == subleaf) @@ -86,7 +99,7 @@ static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, * Will overwrite earlier entries and thus can be called multiple * times. */ -int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) +int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { #define NA XEN_CPUID_INPUT_UNUSED static const struct cpuid_flags cpuid_flags[] = { @@ -332,7 +345,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) if (flag->name == NULL) { return 2; } - entry = cpuid_find_match(cpuid, flag->leaf, flag->subleaf); + entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); resstr = entry->policy[flag->reg - 1]; num = strtoull(val, &endptr, 0); flags[flag->length] = 0; @@ -387,7 +400,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) * the strings for each register were directly exposed to the user. * Used for maintaining compatibility with older config files */ -int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, +int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; @@ -414,7 +427,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 3; } str = endptr + 1; - entry = cpuid_find_match(cpuid, leaf, subleaf); + entry = cpuid_find_match(policy, leaf, subleaf); for (str = endptr + 1; *str != 0;) { if (str[0] != 'e' || str[2] != 'x') { return 4; @@ -489,7 +502,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid, NULL); + pae, itsc, nested_virt, + info->cpuid ? info->cpuid->cpuid : NULL, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -514,16 +528,18 @@ static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, - libxl_cpuid_policy_list *pcpuid) + libxl_cpuid_policy_list *pl) { - libxl_cpuid_policy_list cpuid = *pcpuid; + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid *cpuid; yajl_gen_status s; int i, j; s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; - if (cpuid == NULL) goto empty; + if (policy == NULL || policy->cpuid == NULL) goto empty; + cpuid = policy->cpuid; for (i = 0; cpuid[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { s = yajl_gen_map_open(hand); @@ -562,7 +578,7 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl_cpuid_policy_list *p) { int i, size; - libxl_cpuid_policy_list l; + struct xc_xend_cpuid *l; flexarray_t *array; if (!libxl__json_object_is_array(o)) @@ -573,8 +589,10 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, return 0; size = array->count; + *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ - l = *p = libxl__calloc(NOGC, size + 1, sizeof(libxl_cpuid_policy)); + l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, + sizeof(struct xc_xend_cpuid)); l[size].input[0] = XEN_CPUID_INPUT_UNUSED; l[size].input[1] = XEN_CPUID_INPUT_UNUSED; @@ -617,8 +635,12 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) { int i = 0; - libxl_cpuid_policy_list l = *pl; + const struct xc_xend_cpuid *l; + + if (*pl == NULL) + return 0; + l = (*pl)->cpuid; if (l) { while (l[i].input[0] != XEN_CPUID_INPUT_UNUSED) i++; @@ -628,20 +650,25 @@ int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) } void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, - libxl_cpuid_policy_list *dst, - const libxl_cpuid_policy_list *src) + libxl_cpuid_policy_list *pdst, + const libxl_cpuid_policy_list *psrc) { + struct xc_xend_cpuid **dst; + struct xc_xend_cpuid *const *src; GC_INIT(ctx); int i, j, len; - if (*src == NULL) { - *dst = NULL; + if (*psrc == NULL) { + *pdst = NULL; goto out; } - len = libxl_cpuid_policy_list_length(src); + *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + dst = &(*pdst)->cpuid; + src = &(*psrc)->cpuid; + len = libxl_cpuid_policy_list_length(psrc); /* one extra slot for sentinel */ - *dst = libxl__calloc(NOGC, len + 1, sizeof(libxl_cpuid_policy)); + *dst = libxl__calloc(NOGC, len + 1, sizeof(struct xc_xend_cpuid)); (*dst)[len].input[0] = XEN_CPUID_INPUT_UNUSED; (*dst)[len].input[1] = XEN_CPUID_INPUT_UNUSED; diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index ee6a251700..8c67a0eeb3 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4859,6 +4859,10 @@ int libxl__is_domid_recent(libxl__gc *gc, uint32_t domid, bool *recent); /* os-specific implementation of setresuid() */ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t suid); +struct libxl__cpu_policy { + struct xc_xend_cpuid *cpuid; +}; + #endif /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581686.910870 (Exim 4.92) (envelope-from ) id 1qTtY4-0002Yk-0g; Thu, 10 Aug 2023 00:29:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581686.910870; Thu, 10 Aug 2023 00:29:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtY3-0002Yd-UF; Thu, 10 Aug 2023 00:29:07 +0000 Received: by outflank-mailman (input) for mailman id 581686; Thu, 10 Aug 2023 00:29:07 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtY3-0002YR-1z for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: introduce MSR data in libxl_cpuid_policy Message-Id: Date: Thu, 10 Aug 2023 00:29:07 +0000 commit 2a862681ff09278f38d3379c1f09a70e8ab3a206 Author: Roger Pau Monne AuthorDate: Wed Jul 26 09:47:53 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: introduce MSR data in libxl_cpuid_policy Add a new array field to libxl_cpuid_policy in order to store the MSR policies. Adding the MSR data in the libxl_cpuid_policy_list type is done so that existing users can seamlessly pass MSR features as part of the CPUID data, without requiring the introduction of a separate domain_build_info field, and a new set of handlers functions. Note that support for parsing the old JSON format is kept, as that's required in order to restore domains or received migrations from previous tool versions. Differentiation between the old and the new formats is done based on whether the contents of the 'cpuid' field is an array or a map JSON object. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 5b80cecb747b2176b9e85f6e7aa7be83416d77e1) --- tools/libs/light/libxl_cpuid.c | 160 ++++++++++++++++++++++++++++++++++---- tools/libs/light/libxl_internal.h | 1 + tools/libs/light/libxl_types.idl | 2 +- 3 files changed, 146 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 48802b9f7c..f003cea6eb 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -16,7 +16,7 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { - return !libxl_cpuid_policy_list_length(pl); + return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); } void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) @@ -40,6 +40,8 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) free(policy->cpuid); } + free(policy->msr); + free(policy); *pl = NULL; return; @@ -503,7 +505,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, itsc, nested_virt, - info->cpuid ? info->cpuid->cpuid : NULL, NULL); + info->cpuid ? info->cpuid->cpuid : NULL, + info->cpuid ? info->cpuid->msr : NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -515,16 +518,22 @@ static const char *input_names[2] = { "leaf", "subleaf" }; static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; /* * Aiming for: - * [ - * { 'leaf': 'val-eax', - * 'subleaf': 'val-ecx', - * 'eax': 'filter', - * 'ebx': 'filter', - * 'ecx': 'filter', - * 'edx': 'filter' }, - * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, - * ... etc ... - * ] + * { 'cpuid': [ + * { 'leaf': 'val-eax', + * 'subleaf': 'val-ecx', + * 'eax': 'filter', + * 'ebx': 'filter', + * 'ecx': 'filter', + * 'edx': 'filter' }, + * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, + * ... etc ... + * ], + * 'msr': [ + * { 'index': 'val-index', + * 'policy': 'filter', }, + * ... etc ... + * ], + * } */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, @@ -532,9 +541,16 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, { libxl_cpuid_policy_list policy = *pl; struct xc_xend_cpuid *cpuid; + const struct xc_msr *msr; yajl_gen_status s; int i, j; + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "cpuid"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; @@ -569,6 +585,39 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, empty: s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "msr"); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_array_open(hand); + if (s != yajl_gen_status_ok) goto out; + + if (!policy || !policy->msr) goto done; + msr = policy->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "index"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_integer(hand, msr[i].index); + if (s != yajl_gen_status_ok) goto out; + s = libxl__yajl_gen_asciiz(hand, "policy"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_string(hand, + (const unsigned char *)msr[i].policy, 64); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_map_close(hand); + if (s != yajl_gen_status_ok) goto out; + } + +done: + s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_map_close(hand); out: return s; } @@ -579,17 +628,40 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, { int i, size; struct xc_xend_cpuid *l; + struct xc_msr *msr; + const libxl__json_object *co; flexarray_t *array; + bool cpuid_only = false; + + /* + * Old JSON field was an array with just the CPUID data. With the addition + * of MSRs the object is now a map with two array fields. + * + * Use the object format to detect whether the passed data contains just + * CPUID leafs and thus is an array, or does also contain MSRs and is a + * map. + */ + if (libxl__json_object_is_array(o)) { + co = o; + cpuid_only = true; + goto parse_cpuid; + } - if (!libxl__json_object_is_array(o)) + if (!libxl__json_object_is_map(o)) return ERROR_FAIL; - array = libxl__json_object_get_array(o); + co = libxl__json_map_get("cpuid", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + +parse_cpuid: + *p = libxl__calloc(NOGC, 1, sizeof(**p)); + + array = libxl__json_object_get_array(co); if (!array->count) - return 0; + goto cpuid_empty; size = array->count; - *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, sizeof(struct xc_xend_cpuid)); @@ -628,6 +700,42 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + if (cpuid_only) + return 0; + +cpuid_empty: + co = libxl__json_map_get("msr", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + + array = libxl__json_object_get_array(co); + if (!array->count) + return 0; + size = array->count; + /* need one extra slot as sentinel */ + msr = (*p)->msr = libxl__calloc(NOGC, size + 1, sizeof(struct xc_msr)); + + msr[size].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < size; i++) { + const libxl__json_object *t, *r; + + if (flexarray_get(array, i, (void**)&t) != 0) + return ERROR_FAIL; + + if (!libxl__json_object_is_map(t)) + return ERROR_FAIL; + + r = libxl__json_map_get("index", t, JSON_INTEGER); + if (!r) return ERROR_FAIL; + msr[i].index = libxl__json_object_get_integer(r); + r = libxl__json_map_get("policy", t, JSON_STRING); + if (!r) return ERROR_FAIL; + if (strlen(libxl__json_object_get_string(r)) != + ARRAY_SIZE(msr[i].policy) - 1) + return ERROR_FAIL; + strcpy(msr[i].policy, libxl__json_object_get_string(r)); + } return 0; } @@ -664,6 +772,10 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, } *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + + if (!(*psrc)->cpuid) + goto copy_msr; + dst = &(*pdst)->cpuid; src = &(*psrc)->cpuid; len = libxl_cpuid_policy_list_length(psrc); @@ -683,6 +795,22 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, (*dst)[i].policy[j] = NULL; } +copy_msr: + if ((*psrc)->msr) { + const struct xc_msr *msr = (*psrc)->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) + ; + len = i; + (*pdst)->msr = libxl__calloc(NOGC, len + 1, sizeof(struct xc_msr)); + (*pdst)->msr[len].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < len; i++) { + (*pdst)->msr[i].index = msr[i].index; + strcpy((*pdst)->msr[i].policy, msr[i].policy); + } + } + out: GC_FREE; } diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index 8c67a0eeb3..cc27c72ecf 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4861,6 +4861,7 @@ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t suid); struct libxl__cpu_policy { struct xc_xend_cpuid *cpuid; + struct xc_msr *msr; }; #endif diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index 2a42da2f7d..ef59b205f3 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -19,7 +19,7 @@ libxl_mac = Builtin("mac", json_parse_type="JSON_STRING", passby=PASS_BY_REFEREN libxl_bitmap = Builtin("bitmap", json_parse_type="JSON_ARRAY", dispose_fn="libxl_bitmap_dispose", passby=PASS_BY_REFERENCE, check_default_fn="libxl_bitmap_is_empty", copy_fn="libxl_bitmap_copy_alloc") libxl_cpuid_policy_list = Builtin("cpuid_policy_list", dispose_fn="libxl_cpuid_dispose", passby=PASS_BY_REFERENCE, - json_parse_type="JSON_ARRAY", check_default_fn="libxl__cpuid_policy_is_empty", + json_parse_type="JSON_ANY", check_default_fn="libxl__cpuid_policy_is_empty", copy_fn="libxl_cpuid_policy_list_copy") libxl_string_list = Builtin("string_list", dispose_fn="libxl_string_list_dispose", passby=PASS_BY_REFERENCE, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581687.910874 (Exim 4.92) (envelope-from ) id 1qTtYE-0002c1-3Q; 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Thu, 10 Aug 2023 00:29:17 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BMfQTV3IWMlbychRbTldifvCr7Lsjbl0OWkuob51lOE=; b=xJMsrhvxQ899ojvUn26IiXATH2 RK2Q2xERuYapl2RaFfMs6HH0G3fCVbSymsvmOcVR2b+m6UzreFvlel5L9naTl/UP4kHJ4jjEcV8OD VUdavTlD2FWrAMCnxcyKYIhPZ50n1vGWsSKrf7JlJPju8RuYwSzXDeyLQpYVXvJKxFcI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: split logic to parse user provided CPUID features Message-Id: Date: Thu, 10 Aug 2023 00:29:17 +0000 commit d180a3e6f6eda0216a7fb1c8b7a2c53638f4f7a1 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:56 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: split logic to parse user provided CPUID features Move the CPUID value parsers out of libxl_cpuid_parse_config() into a newly created cpuid_add() local helper. This is in preparation for also adding MSR feature parsing support. No functional change intended. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit e2b1da9b8fda0ed7d3dca7bd15829cfea496973a) --- tools/libs/light/libxl_cpuid.c | 120 +++++++++++++++++++++-------------------- 1 file changed, 63 insertions(+), 57 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index f003cea6eb..317445fc61 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -96,6 +96,66 @@ static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, return *list + i; } +static int cpuid_add(libxl_cpuid_policy_list *policy, + const struct cpuid_flags *flag, const char *val) +{ + struct xc_xend_cpuid *entry = cpuid_find_match(policy, flag->leaf, + flag->subleaf); + unsigned long num; + char flags[33], *resstr, *endptr; + unsigned int i; + + resstr = entry->policy[flag->reg - 1]; + num = strtoul(val, &endptr, 0); + flags[flag->length] = 0; + if (endptr != val) { + /* if this was a valid number, write the binary form into the string */ + for (i = 0; i < flag->length; i++) { + flags[flag->length - 1 - i] = "01"[(num >> i) & 1]; + } + } else { + switch(val[0]) { + case 'x': case 'k': case 's': + memset(flags, val[0], flag->length); + break; + default: + return 3; + } + } + + if (resstr == NULL) { + resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + } + + /* the family and model entry is potentially split up across + * two fields in Fn0000_0001_EAX, so handle them here separately. + */ + if (!strcmp(flag->name, "family")) { + if (num < 16) { + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + memcpy(resstr + (32 - 8) - 20, "00000000", 8); + } else { + num -= 15; + memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); + for (i = 0; i < 7; i++) { + flags[7 - i] = "01"[num & 1]; + num >>= 1; + } + memcpy(resstr + (32 - 8) - 20, flags, 8); + } + } else if (!strcmp(flag->name, "model")) { + memcpy(resstr + (32 - 4) - 16, flags, 4); + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + } else { + memcpy(resstr + (32 - flag->length) - flag->bit, flags, + flag->length); + } + entry->policy[flag->reg - 1] = resstr; + + return 0; + +} + /* parse a single key=value pair and translate it into the libxc * used interface using 32-characters strings for each register. * Will overwrite earlier entries and thus can be called multiple @@ -327,12 +387,8 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; #undef NA - char *sep, *val, *endptr; - int i; + const char *sep, *val; const struct cpuid_flags *flag; - struct xc_xend_cpuid *entry; - unsigned long num; - char flags[33], *resstr; sep = strchr(str, '='); if (sep == NULL) { @@ -342,60 +398,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } for (flag = cpuid_flags; flag->name != NULL; flag++) { if(!strncmp(str, flag->name, sep - str) && flag->name[sep - str] == 0) - break; - } - if (flag->name == NULL) { - return 2; - } - entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); - resstr = entry->policy[flag->reg - 1]; - num = strtoull(val, &endptr, 0); - flags[flag->length] = 0; - if (endptr != val) { - /* if this was a valid number, write the binary form into the string */ - for (i = 0; i < flag->length; i++) { - flags[flag->length - 1 - i] = "01"[!!(num & (1 << i))]; - } - } else { - switch(val[0]) { - case 'x': case 'k': case 's': - memset(flags, val[0], flag->length); - break; - default: - return 3; - } - } - - if (resstr == NULL) { - resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + return cpuid_add(policy, flag, val); } - /* the family and model entry is potentially split up across - * two fields in Fn0000_0001_EAX, so handle them here separately. - */ - if (!strncmp(str, "family", sep - str)) { - if (num < 16) { - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - memcpy(resstr + (32 - 8) - 20, "00000000", 8); - } else { - num -= 15; - memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); - for (i = 0; i < 7; i++) { - flags[7 - i] = "01"[num & 1]; - num >>= 1; - } - memcpy(resstr + (32 - 8) - 20, flags, 8); - } - } else if (!strncmp(str, "model", sep - str)) { - memcpy(resstr + (32 - 4) - 16, flags, 4); - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - } else { - memcpy(resstr + (32 - flag->length) - flag->bit, flags, - flag->length); - } - entry->policy[flag->reg - 1] = resstr; - - return 0; + return 2; } /* parse a single list item from the legacy Python xend syntax, where -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:28 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581688.910878 (Exim 4.92) (envelope-from ) id 1qTtYO-0002ev-55; Thu, 10 Aug 2023 00:29:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581688.910878; Thu, 10 Aug 2023 00:29:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYO-0002eo-2V; Thu, 10 Aug 2023 00:29:28 +0000 Received: by outflank-mailman (input) for mailman id 581688; Thu, 10 Aug 2023 00:29:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYN-0002ef-8C for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYN-0001QM-7P for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:27 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtYN-0008RH-6a for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:27 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=k+aNAJFAwfIGvskiRfHY+VxoqpZ5pw7wbVuCOUZc7sI=; b=2pjUL9xSduYkzhytmE7Ve6pigF kJ42564JHjWXh9hqEhhVtQer7rhgLIP7Yhrl58tk4Dy4TmEVSFK5hzQFFouK36FFpcJ0JVSgJp3bZ d0uhu8qhkzR0D8HHTu7zddekcX8q2DB+5w2mA4tXKaSPlROCeqV5x/zlAwMb9JOtsZJQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: use the cpuid feature names from cpufeatureset.h Message-Id: Date: Thu, 10 Aug 2023 00:29:27 +0000 commit 1157776c51d76706c44442235a434aaa7a59fa5f Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:57 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: use the cpuid feature names from cpufeatureset.h The current implementation in libxl_cpuid_parse_config() requires keeping a list of cpuid feature bits that should be mostly in sync with the contents of cpufeatureset.h. Avoid such duplication by using the automatically generated list of cpuid features in INIT_FEATURE_NAMES in order to map feature names to featureset bits, and then translate from featureset bits into cpuid leaf, subleaf, register tuple. Note that the full contents of the previous cpuid translation table can't be removed. That's because some feature names allowed by libxl are not described in the featuresets, or because naming has diverged and the previous nomenclature is preserved for compatibility reasons. Should result in no functional change observed by callers, albeit some new cpuid features will be available as a result of the change. While there constify cpuid_flags name field. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit d638fe233cb3a45105319df75df0edfed2fde5a5) --- docs/man/xl.cfg.5.pod.in | 24 ++-- tools/libs/light/libxl_cpuid.c | 254 ++++++++++++++++------------------------- tools/xl/xl_parse.c | 3 + 3 files changed, 107 insertions(+), 174 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ab7541f22c..e17568e840 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -1979,24 +1979,16 @@ proccount procpkg stepping =back -List of keys taking a character: +List of keys taking a character can be found in the public header file +L -=over 4 - -3dnow 3dnowext 3dnowprefetch abm acpi adx aes altmovcr8 apic arat avx avx2 -avx512-4fmaps avx512-4vnniw avx512bw avx512cd avx512dq avx512er avx512f -avx512ifma avx512pf avx512vbmi avx512vl bmi1 bmi2 clflushopt clfsh clwb cmov -cmplegacy cmpxchg16 cmpxchg8 cmt cntxid dca de ds dscpl dtes64 erms est extapic -f16c ffxsr fma fma4 fpu fsgsbase fxsr hle htt hypervisor ia64 ibs invpcid -invtsc lahfsahf lm lwp mca mce misalignsse mmx mmxext monitor movbe mpx msr -mtrr nodeid nx ospke osvw osxsave pae page1gb pat pbe pcid pclmulqdq pdcm -perfctr_core perfctr_nb pge pku popcnt pse pse36 psn rdrand rdseed rdtscp rtm -sha skinit smap smep smx ss sse sse2 sse3 sse4.1 sse4.2 sse4_1 sse4_2 sse4a -ssse3 svm svm_decode svm_lbrv svm_npt svm_nrips svm_pausefilt svm_tscrate -svm_vmcbclean syscall sysenter tbm tm tm2 topoext tsc tsc-deadline tsc_adjust -umip vme vmx wdt x2apic xop xsave xtpr +The feature names described in C should be specified in all +lowercase letters, and with underscores converted to hyphens. For example in +order to reference feature C the string C should be used. -=back +Note that C is described as an option that takes a value, and that +takes precedence over the C flag in C. The feature +flag must be referenced as C. =back diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 317445fc61..785b57f6f8 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -14,6 +14,8 @@ #include "libxl_internal.h" +#include + int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); @@ -60,7 +62,7 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) * Used for the static structure describing all features. */ struct cpuid_flags { - char* name; + const char *name; uint32_t leaf; uint32_t subleaf; int reg; @@ -153,7 +155,19 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, entry->policy[flag->reg - 1] = resstr; return 0; +} + +struct feature_name { + const char *name; + unsigned int bit; +}; + +static int search_feature(const void *a, const void *b) +{ + const char *key = a; + const char *feat = ((const struct feature_name *)b)->name; + return strcmp(key, feat); } /* parse a single key=value pair and translate it into the libxc @@ -176,197 +190,42 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"proccount", 0x00000001, NA, CPUID_REG_EBX, 16, 8}, {"localapicid", 0x00000001, NA, CPUID_REG_EBX, 24, 8}, - {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, - {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, - {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, - {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, - {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, - {"vmx", 0x00000001, NA, CPUID_REG_ECX, 5, 1}, - {"smx", 0x00000001, NA, CPUID_REG_ECX, 6, 1}, {"est", 0x00000001, NA, CPUID_REG_ECX, 7, 1}, - {"tm2", 0x00000001, NA, CPUID_REG_ECX, 8, 1}, - {"ssse3", 0x00000001, NA, CPUID_REG_ECX, 9, 1}, {"cntxid", 0x00000001, NA, CPUID_REG_ECX, 10, 1}, - {"fma", 0x00000001, NA, CPUID_REG_ECX, 12, 1}, {"cmpxchg16", 0x00000001, NA, CPUID_REG_ECX, 13, 1}, - {"xtpr", 0x00000001, NA, CPUID_REG_ECX, 14, 1}, - {"pdcm", 0x00000001, NA, CPUID_REG_ECX, 15, 1}, - {"pcid", 0x00000001, NA, CPUID_REG_ECX, 17, 1}, - {"dca", 0x00000001, NA, CPUID_REG_ECX, 18, 1}, /* Linux uses sse4_{1,2}. Keep sse4.{1,2} for compatibility */ {"sse4_1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4.1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4_2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, {"sse4.2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, - {"x2apic", 0x00000001, NA, CPUID_REG_ECX, 21, 1}, - {"movbe", 0x00000001, NA, CPUID_REG_ECX, 22, 1}, - {"popcnt", 0x00000001, NA, CPUID_REG_ECX, 23, 1}, - {"tsc-deadline", 0x00000001, NA, CPUID_REG_ECX, 24, 1}, {"aes", 0x00000001, NA, CPUID_REG_ECX, 25, 1}, - {"xsave", 0x00000001, NA, CPUID_REG_ECX, 26, 1}, - {"osxsave", 0x00000001, NA, CPUID_REG_ECX, 27, 1}, - {"avx", 0x00000001, NA, CPUID_REG_ECX, 28, 1}, - {"f16c", 0x00000001, NA, CPUID_REG_ECX, 29, 1}, - {"rdrand", 0x00000001, NA, CPUID_REG_ECX, 30, 1}, - {"hypervisor", 0x00000001, NA, CPUID_REG_ECX, 31, 1}, - - {"fpu", 0x00000001, NA, CPUID_REG_EDX, 0, 1}, - {"vme", 0x00000001, NA, CPUID_REG_EDX, 1, 1}, - {"de", 0x00000001, NA, CPUID_REG_EDX, 2, 1}, - {"pse", 0x00000001, NA, CPUID_REG_EDX, 3, 1}, - {"tsc", 0x00000001, NA, CPUID_REG_EDX, 4, 1}, - {"msr", 0x00000001, NA, CPUID_REG_EDX, 5, 1}, - {"pae", 0x00000001, NA, CPUID_REG_EDX, 6, 1}, - {"mce", 0x00000001, NA, CPUID_REG_EDX, 7, 1}, + {"cmpxchg8", 0x00000001, NA, CPUID_REG_EDX, 8, 1}, - {"apic", 0x00000001, NA, CPUID_REG_EDX, 9, 1}, {"sysenter", 0x00000001, NA, CPUID_REG_EDX, 11, 1}, - {"mtrr", 0x00000001, NA, CPUID_REG_EDX, 12, 1}, - {"pge", 0x00000001, NA, CPUID_REG_EDX, 13, 1}, - {"mca", 0x00000001, NA, CPUID_REG_EDX, 14, 1}, - {"cmov", 0x00000001, NA, CPUID_REG_EDX, 15, 1}, - {"pat", 0x00000001, NA, CPUID_REG_EDX, 16, 1}, - {"pse36", 0x00000001, NA, CPUID_REG_EDX, 17, 1}, {"psn", 0x00000001, NA, CPUID_REG_EDX, 18, 1}, {"clfsh", 0x00000001, NA, CPUID_REG_EDX, 19, 1}, - {"ds", 0x00000001, NA, CPUID_REG_EDX, 21, 1}, - {"acpi", 0x00000001, NA, CPUID_REG_EDX, 22, 1}, - {"mmx", 0x00000001, NA, CPUID_REG_EDX, 23, 1}, - {"fxsr", 0x00000001, NA, CPUID_REG_EDX, 24, 1}, - {"sse", 0x00000001, NA, CPUID_REG_EDX, 25, 1}, - {"sse2", 0x00000001, NA, CPUID_REG_EDX, 26, 1}, - {"ss", 0x00000001, NA, CPUID_REG_EDX, 27, 1}, - {"htt", 0x00000001, NA, CPUID_REG_EDX, 28, 1}, {"tm", 0x00000001, NA, CPUID_REG_EDX, 29, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, {"arat", 0x00000006, NA, CPUID_REG_EAX, 2, 1}, - {"fsgsbase", 0x00000007, 0, CPUID_REG_EBX, 0, 1}, {"tsc_adjust", 0x00000007, 0, CPUID_REG_EBX, 1, 1}, - {"bmi1", 0x00000007, 0, CPUID_REG_EBX, 3, 1}, - {"hle", 0x00000007, 0, CPUID_REG_EBX, 4, 1}, - {"avx2", 0x00000007, 0, CPUID_REG_EBX, 5, 1}, - {"smep", 0x00000007, 0, CPUID_REG_EBX, 7, 1}, - {"bmi2", 0x00000007, 0, CPUID_REG_EBX, 8, 1}, - {"erms", 0x00000007, 0, CPUID_REG_EBX, 9, 1}, - {"invpcid", 0x00000007, 0, CPUID_REG_EBX, 10, 1}, - {"rtm", 0x00000007, 0, CPUID_REG_EBX, 11, 1}, {"cmt", 0x00000007, 0, CPUID_REG_EBX, 12, 1}, - {"mpx", 0x00000007, 0, CPUID_REG_EBX, 14, 1}, - {"avx512f", 0x00000007, 0, CPUID_REG_EBX, 16, 1}, - {"avx512dq", 0x00000007, 0, CPUID_REG_EBX, 17, 1}, - {"rdseed", 0x00000007, 0, CPUID_REG_EBX, 18, 1}, - {"adx", 0x00000007, 0, CPUID_REG_EBX, 19, 1}, - {"smap", 0x00000007, 0, CPUID_REG_EBX, 20, 1}, - {"avx512-ifma", 0x00000007, 0, CPUID_REG_EBX, 21, 1}, - {"clflushopt", 0x00000007, 0, CPUID_REG_EBX, 23, 1}, - {"clwb", 0x00000007, 0, CPUID_REG_EBX, 24, 1}, - {"proc-trace", 0x00000007, 0, CPUID_REG_EBX, 25, 1}, - {"avx512pf", 0x00000007, 0, CPUID_REG_EBX, 26, 1}, - {"avx512er", 0x00000007, 0, CPUID_REG_EBX, 27, 1}, - {"avx512cd", 0x00000007, 0, CPUID_REG_EBX, 28, 1}, - {"sha", 0x00000007, 0, CPUID_REG_EBX, 29, 1}, - {"avx512bw", 0x00000007, 0, CPUID_REG_EBX, 30, 1}, - {"avx512vl", 0x00000007, 0, CPUID_REG_EBX, 31, 1}, - - {"prefetchwt1", 0x00000007, 0, CPUID_REG_ECX, 0, 1}, - {"avx512-vbmi", 0x00000007, 0, CPUID_REG_ECX, 1, 1}, - {"umip", 0x00000007, 0, CPUID_REG_ECX, 2, 1}, - {"pku", 0x00000007, 0, CPUID_REG_ECX, 3, 1}, - {"ospke", 0x00000007, 0, CPUID_REG_ECX, 4, 1}, - {"avx512-vbmi2", 0x00000007, 0, CPUID_REG_ECX, 6, 1}, - {"cet-ss", 0x00000007, 0, CPUID_REG_ECX, 7, 1}, - {"gfni", 0x00000007, 0, CPUID_REG_ECX, 8, 1}, - {"vaes", 0x00000007, 0, CPUID_REG_ECX, 9, 1}, - {"vpclmulqdq", 0x00000007, 0, CPUID_REG_ECX, 10, 1}, - {"avx512-vnni", 0x00000007, 0, CPUID_REG_ECX, 11, 1}, - {"avx512-bitalg",0x00000007, 0, CPUID_REG_ECX, 12, 1}, - {"avx512-vpopcntdq",0x00000007,0,CPUID_REG_ECX, 14, 1}, - {"rdpid", 0x00000007, 0, CPUID_REG_ECX, 22, 1}, - {"cldemote", 0x00000007, 0, CPUID_REG_ECX, 25, 1}, - - {"avx512-4vnniw",0x00000007, 0, CPUID_REG_EDX, 2, 1}, - {"avx512-4fmaps",0x00000007, 0, CPUID_REG_EDX, 3, 1}, - {"fsrm", 0x00000007, 0, CPUID_REG_EDX, 4, 1}, - {"avx512-vp2intersect",0x00000007,0,CPUID_REG_EDX,8, 1}, - {"srbds-ctrl", 0x00000007, 0, CPUID_REG_EDX, 9, 1}, - {"md-clear", 0x00000007, 0, CPUID_REG_EDX, 10, 1}, - {"serialize", 0x00000007, 0, CPUID_REG_EDX, 14, 1}, - {"tsxldtrk", 0x00000007, 0, CPUID_REG_EDX, 16, 1}, - {"cet-ibt", 0x00000007, 0, CPUID_REG_EDX, 20, 1}, - {"ibrsb", 0x00000007, 0, CPUID_REG_EDX, 26, 1}, - {"stibp", 0x00000007, 0, CPUID_REG_EDX, 27, 1}, - {"l1d-flush", 0x00000007, 0, CPUID_REG_EDX, 28, 1}, - {"arch-caps", 0x00000007, 0, CPUID_REG_EDX, 29, 1}, - {"core-caps", 0x00000007, 0, CPUID_REG_EDX, 30, 1}, - {"ssbd", 0x00000007, 0, CPUID_REG_EDX, 31, 1}, - - {"avx-vnni", 0x00000007, 1, CPUID_REG_EAX, 4, 1}, - {"avx512-bf16", 0x00000007, 1, CPUID_REG_EAX, 5, 1}, - {"fzrm", 0x00000007, 1, CPUID_REG_EAX, 10, 1}, - {"fsrs", 0x00000007, 1, CPUID_REG_EAX, 11, 1}, - {"fsrcs", 0x00000007, 1, CPUID_REG_EAX, 12, 1}, - - {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, - - {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, {"lahfsahf", 0x80000001, NA, CPUID_REG_ECX, 0, 1}, {"cmplegacy", 0x80000001, NA, CPUID_REG_ECX, 1, 1}, - {"svm", 0x80000001, NA, CPUID_REG_ECX, 2, 1}, - {"extapic", 0x80000001, NA, CPUID_REG_ECX, 3, 1}, {"altmovcr8", 0x80000001, NA, CPUID_REG_ECX, 4, 1}, - {"abm", 0x80000001, NA, CPUID_REG_ECX, 5, 1}, - {"sse4a", 0x80000001, NA, CPUID_REG_ECX, 6, 1}, - {"misalignsse", 0x80000001, NA, CPUID_REG_ECX, 7, 1}, - {"3dnowprefetch",0x80000001, NA, CPUID_REG_ECX, 8, 1}, - {"osvw", 0x80000001, NA, CPUID_REG_ECX, 9, 1}, - {"ibs", 0x80000001, NA, CPUID_REG_ECX, 10, 1}, - {"xop", 0x80000001, NA, CPUID_REG_ECX, 11, 1}, - {"skinit", 0x80000001, NA, CPUID_REG_ECX, 12, 1}, - {"wdt", 0x80000001, NA, CPUID_REG_ECX, 13, 1}, - {"lwp", 0x80000001, NA, CPUID_REG_ECX, 15, 1}, - {"fma4", 0x80000001, NA, CPUID_REG_ECX, 16, 1}, {"nodeid", 0x80000001, NA, CPUID_REG_ECX, 19, 1}, - {"tbm", 0x80000001, NA, CPUID_REG_ECX, 21, 1}, - {"topoext", 0x80000001, NA, CPUID_REG_ECX, 22, 1}, {"perfctr_core", 0x80000001, NA, CPUID_REG_ECX, 23, 1}, {"perfctr_nb", 0x80000001, NA, CPUID_REG_ECX, 24, 1}, - {"syscall", 0x80000001, NA, CPUID_REG_EDX, 11, 1}, - {"nx", 0x80000001, NA, CPUID_REG_EDX, 20, 1}, - {"mmxext", 0x80000001, NA, CPUID_REG_EDX, 22, 1}, - {"ffxsr", 0x80000001, NA, CPUID_REG_EDX, 25, 1}, - {"page1gb", 0x80000001, NA, CPUID_REG_EDX, 26, 1}, - {"rdtscp", 0x80000001, NA, CPUID_REG_EDX, 27, 1}, - {"lm", 0x80000001, NA, CPUID_REG_EDX, 29, 1}, - {"3dnowext", 0x80000001, NA, CPUID_REG_EDX, 30, 1}, - {"3dnow", 0x80000001, NA, CPUID_REG_EDX, 31, 1}, - {"procpkg", 0x00000004, 0, CPUID_REG_EAX, 26, 6}, {"invtsc", 0x80000007, NA, CPUID_REG_EDX, 8, 1}, - {"clzero", 0x80000008, NA, CPUID_REG_EBX, 0, 1}, - {"rstr-fp-err-ptrs", 0x80000008, NA, CPUID_REG_EBX, 2, 1}, - {"wbnoinvd", 0x80000008, NA, CPUID_REG_EBX, 9, 1}, - {"ibpb", 0x80000008, NA, CPUID_REG_EBX, 12, 1}, - {"ibrs", 0x80000008, NA, CPUID_REG_EBX, 14, 1}, - {"amd-stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1}, - {"ibrs-always", 0x80000008, NA, CPUID_REG_EBX, 16, 1}, - {"stibp-always", 0x80000008, NA, CPUID_REG_EBX, 17, 1}, - {"ibrs-fast", 0x80000008, NA, CPUID_REG_EBX, 18, 1}, - {"ibrs-same-mode", 0x80000008, NA, CPUID_REG_EBX, 19, 1}, - {"no-lmsl", 0x80000008, NA, CPUID_REG_EBX, 20, 1}, {"ppin", 0x80000008, NA, CPUID_REG_EBX, 23, 1}, - {"amd-ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1}, - {"virt-ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1}, - {"ssb-no", 0x80000008, NA, CPUID_REG_EBX, 26, 1}, - {"psfd", 0x80000008, NA, CPUID_REG_EBX, 28, 1}, {"btc-no", 0x80000008, NA, CPUID_REG_EBX, 29, 1}, - {"ibpb-ret", 0x80000008, NA, CPUID_REG_EBX, 30, 1}, {"nc", 0x80000008, NA, CPUID_REG_ECX, 0, 8}, {"apicidsize", 0x80000008, NA, CPUID_REG_ECX, 12, 4}, @@ -380,15 +239,63 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"svm_pausefilt",0x8000000a, NA, CPUID_REG_EDX, 10, 1}, {"lfence+", 0x80000021, NA, CPUID_REG_EAX, 2, 1}, - {"nscb", 0x80000021, NA, CPUID_REG_EAX, 6, 1}, {"maxhvleaf", 0x40000000, NA, CPUID_REG_EAX, 0, 8}, {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; + static const struct feature_name features[] = INIT_FEATURE_NAMES; + /* + * NB: if we switch to using a cpu_policy derived object instead of a + * libxl_cpuid_policy_list we could get rid of the featureset -> cpuid leaf + * conversion table and use a featureset directly as we have conversions + * to/from featureset and cpu_policy. + */ + static const struct { + enum { FEAT_CPUID, FEAT_MSR } type; + union { + struct { + uint32_t leaf, subleaf; + unsigned int reg; + } cpuid; + struct { + uint32_t index; + unsigned int reg; + } msr; + }; + } feature_to_policy[] = { +#define CPUID_ENTRY(l, s, r) \ + { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } +#define MSR_ENTRY(i, r) \ + { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x0000000D, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_ECX), + CPUID_ENTRY(0x80000007, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000008, NA, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x80000021, NA, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 2, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_ECX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX), + MSR_ENTRY(0x10a, CPUID_REG_EAX), + MSR_ENTRY(0x10a, CPUID_REG_EDX), +#undef MSR_ENTRY +#undef CPUID_ENTRY + }; #undef NA const char *sep, *val; + char *name; const struct cpuid_flags *flag; + const struct feature_name *feat; + + BUILD_BUG_ON(ARRAY_SIZE(feature_to_policy) != FEATURESET_NR_ENTRIES); sep = strchr(str, '='); if (sep == NULL) { @@ -401,6 +308,37 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) return cpuid_add(policy, flag, val); } + /* Provide a NUL terminated feature name to the search helper. */ + name = strndup(str, sep - str); + if (name == NULL) + return ERROR_NOMEM; + + feat = bsearch(name, features, ARRAY_SIZE(features), sizeof(features[0]), + search_feature); + free(name); + + if (feat == NULL) + return 2; + + switch (feature_to_policy[feat->bit / 32].type) { + case FEAT_CPUID: + { + struct cpuid_flags f; + + f.name = feat->name; + f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.bit = feat->bit % 32; + f.length = 1; + + return cpuid_add(policy, &f, val); + } + + case FEAT_MSR: + return 2; + } + return 2; } diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index b98c0de378..2c2b6e823b 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -2480,6 +2480,9 @@ skip_usbdev: case 3: errstr = "illegal CPUID value (must be: [0|1|x|k|s])"; break; + case ERROR_NOMEM: + errstr = "out of memory"; + break; default: errstr = "unknown error"; break; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:38 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581689.910883 (Exim 4.92) (envelope-from ) id 1qTtYY-0002hr-9M; Thu, 10 Aug 2023 00:29:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581689.910883; Thu, 10 Aug 2023 00:29:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYY-0002hi-6J; Thu, 10 Aug 2023 00:29:38 +0000 Received: by outflank-mailman (input) for mailman id 581689; Thu, 10 Aug 2023 00:29:37 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYX-0002hW-B8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:37 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYX-0001Qo-AM for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:37 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtYX-0008Rt-9b for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:37 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=85YOfKrWVGUCEZwe+Z//ubFxBluN+Lr2MFEOKjVtUKQ=; b=eFt0AnpksUJAsh2YNX+5FyrVCN ORrFsvQ4UNmbaQ4X03dlGdicrLIDUjjSkUk9c4AWrUU3d0bs3CaR5yU9cs0RfIfuUELq1NX0TJo0l iPSypAJb5Vtycw2uZGIbNT5pRxq79L4kyUn6IKpW20ntASY9/FXboRTkmpx9GcGgyVYM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: add support for parsing MSR features Message-Id: Date: Thu, 10 Aug 2023 00:29:37 +0000 commit 902b2aeeb43b4a89731a4dbcb0cac1df501f8a6f Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:58 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: add support for parsing MSR features Introduce support for handling MSR features in libxl_cpuid_parse_config(). The MSR policies are added to the libxl_cpuid_policy like the CPUID one, which gets passed to xc_cpuid_apply_policy(). This allows existing users of libxl to provide MSR related features as key=value pairs to libxl_cpuid_parse_config() without requiring the usage of a different API. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit 6d21cedbaa34b3a3856f964189e911112c732b21) --- tools/libs/light/libxl_cpuid.c | 64 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 785b57f6f8..5ec088b60c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,6 +157,60 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +{ + unsigned int i = 0; + libxl_cpuid_policy_list policy = *pl; + + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + if (policy->msr != NULL) { + for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + if (policy->msr[i].index == index) { + return &policy->msr[i]; + } + } + } + + policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); + policy->msr[i].index = index; + memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); + policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; + policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; + + return &policy->msr[i]; +} + +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, + const char *val) +{ + struct xc_msr *entry = msr_find_match(policy, index); + + /* Only allow options taking a character for MSRs, no values allowed. */ + if (strlen(val) != 1) + return 3; + + switch (val[0]) { + case '0': + case '1': + case 'x': + case 'k': + entry->policy[63 - bit] = val[0]; + break; + + case 's': + /* Translate s -> k as xc_msr doesn't support the deprecated 's'. */ + entry->policy[63 - bit] = 'k'; + break; + + default: + return 3; + } + + return 0; +} + struct feature_name { const char *name; unsigned int bit; @@ -336,7 +390,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } case FEAT_MSR: - return 2; + { + unsigned int bit = feat->bit % 32; + + if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + bit += 32; + + return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + bit, val); + } } return 2; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:49 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581690.910887 (Exim 4.92) (envelope-from ) id 1qTtYj-0002ke-AZ; Thu, 10 Aug 2023 00:29:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581690.910887; Thu, 10 Aug 2023 00:29:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYj-0002kW-7p; Thu, 10 Aug 2023 00:29:49 +0000 Received: by outflank-mailman (input) for mailman id 581690; Thu, 10 Aug 2023 00:29:47 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYh-0002kK-E8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:47 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYh-0001Qv-DR for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:47 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtYh-0008SM-CX for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:47 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SnE2+5nYtyX0fJVv4taIUXOwRrsqIeYv9wtKBrUV6mk=; b=bbkMUrdKk0XReUKyCLvkvpo9Q/ 6l6efRSqcIeibiY12I5+4ASg2lNxWdBKInRJONp9qYXPXuaCapfB4J6gAWtrthv4sRcsJydLNQmKn BYc5n8rdcjyaRTJAzrYH3KgnaL7ttRG0rPxWniXJOq6mEu2jffWlmzHz7QIrafXtTl8k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: avoid shadowing of index() Message-Id: Date: Thu, 10 Aug 2023 00:29:47 +0000 commit 7b1336b3eb3aff6f4abe1ba005fba02dc16b7856 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:26 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: avoid shadowing of index() Because of -Wshadow the build otherwise fails with old enough glibc. While there also obey line length limits for msr_add(). Fixes: 6d21cedbaa34 ("libxl: add support for parsing MSR features") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 4f6afde88be3e8960eb311d16ac41d44ab71ed10) --- tools/libs/light/libxl_cpuid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 5ec088b60c..0630d342b0 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,7 +157,7 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } -static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t idx) { unsigned int i = 0; libxl_cpuid_policy_list policy = *pl; @@ -167,14 +167,14 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index if (policy->msr != NULL) { for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { - if (policy->msr[i].index == index) { + if (policy->msr[i].index == idx) { return &policy->msr[i]; } } } policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); - policy->msr[i].index = index; + policy->msr[i].index = idx; memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; @@ -182,10 +182,10 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index return &policy->msr[i]; } -static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, - const char *val) +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t idx, + unsigned int bit, const char *val) { - struct xc_msr *entry = msr_find_match(policy, index); + struct xc_msr *entry = msr_find_match(policy, idx); /* Only allow options taking a character for MSRs, no values allowed. */ if (strlen(val) != 1) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:29:59 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:29:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581691.910890 (Exim 4.92) (envelope-from ) id 1qTtYt-0002of-CU; Thu, 10 Aug 2023 00:29:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581691.910890; Thu, 10 Aug 2023 00:29:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYt-0002oY-9D; Thu, 10 Aug 2023 00:29:59 +0000 Received: by outflank-mailman (input) for mailman id 581691; Thu, 10 Aug 2023 00:29:57 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYr-0002mu-HK for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:57 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtYr-0001R3-GW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:57 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtYr-0008T1-Fc for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:29:57 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FM9i9yaKbONaGdogtkP8gjQbwZ63SgfLBNBM/B4rTe8=; b=vw5c7MyRSxpVOMDIdL10jSVb7B KqUgXO1mFJB5Vb0ofNF+Ee92IoSlXbr89bPMJUztCw022HT9brpHZoXyd+UEJfa3iHr5Ii2b4OJ3e tlqPkh8Lw0jumSn8OANAoQmyq1iSyq/t5TSt/tGqJFmBtPFxhMLglVmFLhFBOHs7sizc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] libxl: allow building with old gcc again Message-Id: Date: Thu, 10 Aug 2023 00:29:57 +0000 commit 0d48119c1d94ec88de0aa43f43146c3d1ea07d47 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:39 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 libxl: allow building with old gcc again We can't use initializers of unnamed struct/union members just yet. Fixes: d638fe233cb3 ("libxl: use the cpuid feature names from cpufeatureset.h") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 1aa5acbbec3f37bf38d78fa96d210053f8e8efd5) --- tools/libs/light/libxl_cpuid.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 0630d342b0..849722541c 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -316,12 +316,16 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) uint32_t index; unsigned int reg; } msr; - }; + } u; } feature_to_policy[] = { #define CPUID_ENTRY(l, s, r) \ - { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } + { .type = FEAT_CPUID, \ + .u = { .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } \ + } #define MSR_ENTRY(i, r) \ - { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + { .type = FEAT_MSR, \ + .u = { .msr.index = i, .msr.reg = r } \ + } CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), @@ -380,9 +384,9 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) struct cpuid_flags f; f.name = feat->name; - f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; - f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; - f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.leaf = feature_to_policy[feat->bit / 32].u.cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].u.cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].u.cpuid.reg; f.bit = feat->bit % 32; f.length = 1; @@ -393,10 +397,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { unsigned int bit = feat->bit % 32; - if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + if (feature_to_policy[feat->bit / 32].u.msr.reg == CPUID_REG_EDX) bit += 32; - return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + return msr_add(policy, feature_to_policy[feat->bit / 32].u.msr.index, bit, val); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581692.910895 (Exim 4.92) (envelope-from ) id 1qTtZ3-0003gQ-Dn; Thu, 10 Aug 2023 00:30:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581692.910895; Thu, 10 Aug 2023 00:30:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZ3-0003gJ-Al; Thu, 10 Aug 2023 00:30:09 +0000 Received: by outflank-mailman (input) for mailman id 581692; Thu, 10 Aug 2023 00:30:07 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZ1-0003g9-KW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:07 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZ1-0001Re-Jl for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:07 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZ1-0008Td-J2 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:07 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bEMRafsIoDZq00Cda/NrKZ2n6cxPyciuzi3RIH6pCbw=; b=dSNmqUx64NTeJGQDdfUXuGoeKY 4Kc23eFJRChUvXbXFTYcC3RNb0sSuve0YrIkcybbm/l0BH9vWautdDENoQk+CeBwe/On9nxbl6oCl ENJZab4UWLBiLt6FaZwQv4oORJWGVzrYzLXcTlZywhilc0bIFFVWiFu51yUXZNS7Rl7s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default Message-Id: Date: Thu, 10 Aug 2023 00:30:07 +0000 commit 04dee21883ea59132f4454b09367bc149e6185cb Author: Andrew Cooper AuthorDate: Wed May 17 10:13:36 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default With xl/libxl now able to control the policy bits for MSR_ARCH_CAPS, it is safe to advertise to guests by default. In turn, we don't need the special case to expose details to dom0. This advertises MSR_ARCH_CAPS to guests on *all* Intel hardware, even if the register content ends up being empty. - Advertising ARCH_CAPS and not RSBA signals "retpoline is safe here and everywhere you might migrate to". This is important because it avoids the guest kernel needing to rely on model checks. - Alternatively, levelling for safety across the Broadwell/Skylake divide requires advertising ARCH_CAPS and RSBA, meaning "retpoline not safe on some hardware you might migrate to". On Cascade Lake and later hardware, guests can now see RDCL_NO (not vulnerable to Meltdown) amongst others. This causes substantial performance improvements, as guests are no longer applying software mitigations in cases where they don't need to. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 4b2cdbfe766e5666e6754198946df2dc16f6a642) --- xen/arch/x86/cpu-policy.c | 11 ----------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index b8548fd52f..4229ad097e 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -851,17 +851,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) if ( cpu_has_itsc ) p->extd.itsc = true; - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - p->feat.arch_caps = true; - p->arch_caps.raw = host_cpu_policy.arch_caps.raw; - } - /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index b625d3c5db..7f85998987 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -284,7 +284,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!A IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:19 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581693.910899 (Exim 4.92) (envelope-from ) id 1qTtZD-0003jG-Eu; Thu, 10 Aug 2023 00:30:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581693.910899; Thu, 10 Aug 2023 00:30:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZD-0003j8-CH; Thu, 10 Aug 2023 00:30:19 +0000 Received: by outflank-mailman (input) for mailman id 581693; Thu, 10 Aug 2023 00:30:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZB-0003j0-Nm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZB-0001Rl-My for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:17 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZB-0008U6-MD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:17 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1yY9OC+cHjWywtCKiVgZh3L/U3s4mcjeX51FzYIIGf8=; b=Si/98Cd0KHlvCM7dfsZ76Eh6AN DJQ+U/QzIKoaMDh7OsPbGoU/3tZmpVzad1SqARi4kxQqkcfVXY046rO419ub9n5xvRWzLcEZm6snZ tSskNl57KBwgXxk1hQx0PmafZZgJcqOVbO6KPGVeyfoPa8p21RXaO4GBy034q/spSwzc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Rework ibpb_calculations() Message-Id: Date: Thu, 10 Aug 2023 00:30:17 +0000 commit b274f6878b6199c35968b39be2afa1de62763f5b Author: Andrew Cooper AuthorDate: Thu Jul 27 20:03:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Rework ibpb_calculations() ... in order to make the SRSO mitigations easier to integrate. * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB. In particular, Xen supports synthesising the IBPB bit to guests on Intel to allow IBPB while dissuading the use of (legacy) IBRS. * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for both opt_ibpb_entry_{pv,hvm}. No functional change. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 292f68fb77196a35ac92b296792770d0f3190d75) --- xen/arch/x86/spec_ctrl.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 75de259592..60d4a89ebd 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -896,6 +896,8 @@ static bool __init should_use_eager_fpu(void) static void __init ibpb_calculations(void) { + bool def_ibpb_entry = false; + /* Check we have hardware IBPB support before using it... */ if ( !boot_cpu_has(X86_FEATURE_IBRSB) && !boot_cpu_has(X86_FEATURE_IBPB) ) { @@ -904,28 +906,28 @@ static void __init ibpb_calculations(void) return; } - /* - * AMD/Hygon CPUs to date (June 2022) don't flush the the RAS. Future - * CPUs are expected to enumerate IBPB_RET when this has been fixed. - * Until then, cover the difference with the software sequence. - */ - if ( boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_IBPB_RET) ) - setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + /* + * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future + * CPUs are expected to enumerate IBPB_RET when this has been fixed. + * Until then, cover the difference with the software sequence. + */ + if ( !boot_cpu_has(X86_FEATURE_IBPB_RET) ) + setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + + /* + * AMD/Hygon CPUs up to and including Zen2 suffer from Branch Type + * Confusion. Mitigate with IBPB-on-entry. + */ + if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) + def_ibpb_entry = true; + } - /* - * IBPB-on-entry mitigations for Branch Type Confusion. - * - * IBPB && !BTC_NO selects all AMD/Hygon hardware, not known to be safe, - * that we can provide some form of mitigation on. - */ if ( opt_ibpb_entry_pv == -1 ) - opt_ibpb_entry_pv = (IS_ENABLED(CONFIG_PV) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_pv = IS_ENABLED(CONFIG_PV) && def_ibpb_entry; if ( opt_ibpb_entry_hvm == -1 ) - opt_ibpb_entry_hvm = (IS_ENABLED(CONFIG_HVM) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_hvm = IS_ENABLED(CONFIG_HVM) && def_ibpb_entry; if ( opt_ibpb_entry_pv ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:29 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581694.910903 (Exim 4.92) (envelope-from ) id 1qTtZN-0003mA-GY; Thu, 10 Aug 2023 00:30:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581694.910903; Thu, 10 Aug 2023 00:30:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZN-0003m3-Dn; Thu, 10 Aug 2023 00:30:29 +0000 Received: by outflank-mailman (input) for mailman id 581694; Thu, 10 Aug 2023 00:30:28 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZL-0003lt-V0 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZL-0001Rw-QR for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:27 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZL-0008Us-Pm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:27 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jX8pz9eYxe9hJuAQ+rH2ULqZ9ejtmjqShJze7sIgvpI=; b=AgVlbC+pHS4OeZRxBOuj5tAYUo OOl/zO2GM0UdiCwBFIR7XZxRg0icLatEMDdh3sIiuRXipc+98xR+qfPF9dN3aj1dsH5RjCYId6kbx upQgNfJT4xAYa8wCaKt2n7cy8QXfGo2dEBHFGUkxxHV5DB7ylMF+ayJwrqvEgDKXiyjs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:30:27 +0000 commit 498945c4670a8fe76c03ccf568cb2057f22b36ac Author: Andrew Cooper AuthorDate: Wed Jun 14 09:13:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 2280b0ee2aed6e0fd4af3fa31bf99bc04d038bfe) --- tools/misc/xen-cpuid.c | 3 +++ xen/arch/x86/msr.c | 5 ++++- xen/arch/x86/spec_ctrl.c | 15 ++++++++++----- xen/include/asm-x86/msr-index.h | 1 + xen/include/public/arch-x86/cpufeatureset.h | 3 +++ xen/tools/gen-cpuid.py | 1 + 6 files changed, 22 insertions(+), 6 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 9fcf4054ec..bb913bb68f 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -192,6 +192,9 @@ static const char *const str_e21a[32] = { [ 2] = "lfence+", [ 6] = "nscb", + + /* 26 */ [27] = "sbpb", + [28] = "ibpb-brtype", [29] = "srso-no", }; static const char *const str_7b1[32] = diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 9091ba4570..22f86f2785 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -405,7 +405,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( !cp->feat.ibrsb && !cp->extd.ibpb ) goto gp_fault; /* MSR available? */ - if ( val & ~PRED_CMD_IBPB ) + rsvd = ~(PRED_CMD_IBPB | + (cp->extd.sbpb ? PRED_CMD_SBPB : 0)); + + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ if ( v == curr ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 60d4a89ebd..7078f8b4fd 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -401,7 +401,7 @@ custom_param("pv-l1tf", parse_pv_l1tf); static void __init print_details(enum ind_thunk thunk) { - unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, e21a = 0, max = 0, tmp; uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ @@ -411,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000021 ) + cpuid(0x80000021, &e21a, &tmp, &tmp, &tmp); if ( cpu_has_arch_caps ) rdmsrl(MSR_ARCH_CAPABILITIES, caps); @@ -420,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -440,10 +442,12 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "", (e8b & cpufeat_mask(X86_FEATURE_BTC_NO)) ? " BTC_NO" : "", - (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); + (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : "", + (e21a & cpufeat_mask(X86_FEATURE_IBPB_BRTYPE)) ? " IBPB_BRTYPE" : "", + (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -459,7 +463,8 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); + (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) ) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 1ba5d2e418..267f4e59c4 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -40,6 +40,7 @@ #define MSR_PRED_CMD 0x00000049 #define PRED_CMD_IBPB (_AC(1, ULL) << 0) +#define PRED_CMD_SBPB (_AC(1, ULL) << 7) #define MSR_PPIN_CTL 0x0000004e #define PPIN_LOCKOUT (_AC(1, ULL) << 0) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 7f85998987..fb190d0e19 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -298,6 +298,9 @@ XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and limit too) */ +XEN_CPUFEATURE(SBPB, 11*32+27) /*A Selective Branch Predictor Barrier */ +XEN_CPUFEATURE(IBPB_BRTYPE, 11*32+28) /*A IBPB flushes Branch Type predictions too */ +XEN_CPUFEATURE(SRSO_NO, 11*32+29) /*A Hardware not vulenrable to Speculative Return Stack Overflow */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index fd32da3a86..3ad9263221 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -320,6 +320,7 @@ def crunch_numbers(state): IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], + IBPB: [IBPB_RET, SBPB, IBPB_BRTYPE], AMD_STIBP: [STIBP_ALWAYS], # In principle the TSXLDTRK insns could also be considered independent. -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:39 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581695.910908 (Exim 4.92) (envelope-from ) id 1qTtZX-0003pO-Km; Thu, 10 Aug 2023 00:30:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581695.910908; Thu, 10 Aug 2023 00:30:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZX-0003pG-Gk; Thu, 10 Aug 2023 00:30:39 +0000 Received: by outflank-mailman (input) for mailman id 581695; Thu, 10 Aug 2023 00:30:37 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZV-0003p2-Uc for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:37 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZV-0001SJ-Tn for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:37 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZV-0008Va-Su for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:37 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=E9bPo0MpY0igt+RmrO1faXDHiC6bt5BpjW7hMsESo+I=; b=m70L5xNEzRO5SJoWa7nbTPRqZj FXafED8uveIZc4HV8gMumusvaVX1WNEMUHlZ2xJBc6UWd6CWVJvxOYI8ax5AbaGHMIJaCZfVpiruj dVTA6pEsu/lXL/r89nWyx40OGd6hQuRrKeb9kwTMTy+yoag78/CxNCMXs7SsloI6OyMs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Mitigate Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:30:37 +0000 commit 2bd25cef5949ee472a6f48a91148499ea81140a2 Author: Andrew Cooper AuthorDate: Thu Jun 15 13:46:29 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Mitigate Speculative Return Stack Overflow On native, synthesise the SRSO bits by probing various hardware properties as given by AMD. Extend the IBPB-on-entry mitigations to Zen3/4 CPUs. There is a microcode prerequisite to make this an effective mitigation. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 220c06e6fefe2378f40e2a7391f5e265a2aa50f7) --- docs/misc/xen-command-line.pandoc | 7 ++-- xen/arch/x86/spec_ctrl.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 3 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 17a0e9f77b..c9195bf828 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2309,9 +2309,10 @@ guests to use. preference to here.* * `ibpb-entry=` offers control over whether IBPB (Indirect Branch Prediction Barrier) is used on entry to Xen. This is used by default on hardware - vulnerable to Branch Type Confusion, but for performance reasons, dom0 is - unprotected by default. If it necessary to protect dom0 too, boot with - `spec-ctrl=ibpb-entry`. + vulnerable to Branch Type Confusion, and hardware vulnerable to Speculative + Return Stack Overflow if appropriate microcode has been loaded, but for + performance reasons dom0 is unprotected by default. If it is necessary to + protect dom0 too, boot with `spec-ctrl=ibpb-entry`. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 7078f8b4fd..fef19dd50e 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -899,6 +899,63 @@ static bool __init should_use_eager_fpu(void) } } +static void __init srso_calculations(bool hw_smt_enabled) +{ + if ( !(boot_cpu_data.x86_vendor & + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + return; + + /* + * If virtualised, none of these heuristics are safe. Trust the + * hypervisor completely. + */ + if ( cpu_has_hypervisor ) + return; + + if ( boot_cpu_data.x86 == 0x19 ) + { + /* + * We could have a table of models/microcode revisions. ...or we + * could just look for the new feature added. + */ + if ( wrmsr_safe(MSR_PRED_CMD, PRED_CMD_SBPB) == 0 ) + { + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + setup_force_cpu_cap(X86_FEATURE_SBPB); + } + else + printk(XENLOG_WARNING + "Vulnerable to SRSO, without suitable microcode to mitigate\n"); + } + else if ( boot_cpu_data.x86 < 0x19 ) + { + /* + * Zen1/2 (which have the IBPB microcode) have IBPB_BRTYPE behaviour + * already. + * + * Older CPUs are unknown, but their IBPB likely does flush branch + * types too. As we're synthesising for the benefit of guests, go + * with the likely option - this avoids VMs running on e.g. a Zen3 + * thinking there's no SRSO mitigation available because it may + * migrate to e.g. a Bulldozer. + */ + if ( boot_cpu_has(X86_FEATURE_IBPB) ) + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + } + + /* + * In single-thread mode on Zen1/2, microarchitectural limits prevent SRSO + * attacks from being effective. Synthesise SRSO_NO if SMT is disabled in + * hardware. + * + * Booting with smt=0, or using xen-hptool should be effective too, but + * they can be altered at runtime so it's not safe to presume SRSO_NO. + */ + if ( !hw_smt_enabled && + (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) ) + setup_force_cpu_cap(X86_FEATURE_SRSO_NO); +} + static void __init ibpb_calculations(void) { bool def_ibpb_entry = false; @@ -927,6 +984,15 @@ static void __init ibpb_calculations(void) */ if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) def_ibpb_entry = true; + + /* + * Further to BTC, Zen3/4 CPUs suffer from Speculative Return Stack + * Overflow in most configurations. Mitigate with IBPB-on-entry if we + * have the microcode that makes this an effective option. + */ + if ( !boot_cpu_has(X86_FEATURE_SRSO_NO) && + boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ) + def_ibpb_entry = true; } if ( opt_ibpb_entry_pv == -1 ) @@ -1488,6 +1554,8 @@ void __init init_speculation_mitigations(void) default_spec_ctrl_flags |= SCF_ist_rsb; } + srso_calculations(hw_smt_enabled); + ibpb_calculations(); /* Check whether Eager FPU should be enabled by default. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:49 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581696.910911 (Exim 4.92) (envelope-from ) id 1qTtZh-0003s1-Ky; Thu, 10 Aug 2023 00:30:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581696.910911; Thu, 10 Aug 2023 00:30:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZh-0003rt-IL; Thu, 10 Aug 2023 00:30:49 +0000 Received: by outflank-mailman (input) for mailman id 581696; Thu, 10 Aug 2023 00:30:48 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZg-0003rc-1B for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:48 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZg-0001SS-0V for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:48 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZf-0008W9-W2 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:47 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jYwGCYiFilcxbnuUVIRWae0Oa3sgWIdkccNUlVu45e4=; b=O/XUO2sALIDF+OZE6YYU6y/pmM pyO4qx+MD6ZrMkfEJUcHVr+WcHu/8DwZK8bu/C8CHjDkVIa0VOgl1LEBZu1gLqCq1bd0YoU17gbbr QXIdLPnQH3OPIuT+drZIH8/i5JXqrnLYXCEvdKxUTv0dBytrroXATjle76O2Xjigedig=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX Message-Id: Date: Thu, 10 Aug 2023 00:30:47 +0000 commit 3f9d9b47ef98eb641fe5fcbdf5341e7eef17cfab Author: Andrew Cooper AuthorDate: Mon Feb 27 15:36:49 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX The August 2023 microcode for GDS has an impact on the CLWB instruction. See code comments for full details. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 2dd06b4ea10891750af38e4a0e1efaeb0a9b3518) --- xen/arch/x86/cpu-policy.c | 25 +++++++++++++++++++++++++ xen/arch/x86/cpu/intel.c | 12 ++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 2 +- 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 4229ad097e..f38063b667 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -433,6 +433,18 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) __set_bit(X86_FEATURE_ARCH_CAPS, fs); __set_bit(X86_FEATURE_RSBA, fs); __set_bit(X86_FEATURE_RRSBA, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but VMs which + * have previously seen the CLWB feature can safely run on this CPU. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __set_bit(X86_FEATURE_CLWB, fs); } } @@ -455,6 +467,19 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs) boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but re-added + * it to the max policy to let VMs migrate in. Re-hide it in the + * default policy to disuade VMs from using it in the common case. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __clear_bit(X86_FEATURE_CLWB, fs); } /* diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index e7d4dd652f..97438da464 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -518,6 +518,18 @@ static void init_intel(struct cpuinfo_x86 *c) if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) intel_log_freq(c); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * On this model, CLWB has equivalent behaviour to CLFLUSHOPT but the + * latter is not impacted. Hide CLWB to cause Xen to fall back to + * using CLFLUSHOPT instead. + */ + if (c == &boot_cpu_data && + c->x86 == 6 && c->x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */) + setup_clear_cpu_cap(X86_FEATURE_CLWB); } const struct cpu_dev intel_cpu_dev = { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index fb190d0e19..dc8ffc59b6 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -216,7 +216,7 @@ XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ -XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(CLWB, 5*32+24) /*!A CLWB instruction */ XEN_CPUFEATURE(PROC_TRACE, 5*32+25) /* Processor Trace */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:30:59 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:30:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581697.910914 (Exim 4.92) (envelope-from ) id 1qTtZr-0003ug-MX; Thu, 10 Aug 2023 00:30:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581697.910914; Thu, 10 Aug 2023 00:30:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZr-0003uY-Jt; Thu, 10 Aug 2023 00:30:59 +0000 Received: by outflank-mailman (input) for mailman id 581697; Thu, 10 Aug 2023 00:30:58 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZq-0003uL-4T for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:58 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtZq-0001SZ-3k for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:58 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtZq-00004t-2u for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:30:58 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1tdZnpJyApYzWDvh0e6aiU21Ad7bM4N4S8NbfuNkDwo=; b=aINm24WP7NS0LzjPNcoZf3mfvD eUnypf4KfArangCrkepYwYDJrCzu74RDaiIZZf/ndItxlZ/tzaUcx63IJDgDlHXnOH6Um4VwVyajB Oq4taSSfT/7wCdjl/DkFzWjDyoDSfWkhCvUjr4t+7ozW7oy9wbwVxFS7b0fqsNgiHfZ0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Enumerations for Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:30:58 +0000 commit 78eb1284a8f178b59a87225471fdc4865d81928a Author: Andrew Cooper AuthorDate: Wed Jan 4 17:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Enumerations for Gather Data Sampling GDS_CTRL is introduced by the August 2023 microcode. GDS_NO is for current and future processors not susceptible to GDS. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 9f585f59d90c8d3a1b21369a852b7d7eee8a29b9) --- tools/misc/xen-cpuid.c | 3 ++- xen/arch/x86/spec_ctrl.c | 6 ++++-- xen/include/asm-x86/cpufeature.h | 2 ++ xen/include/asm-x86/msr-index.h | 4 ++++ xen/include/public/arch-x86/cpufeatureset.h | 2 ++ 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index bb913bb68f..c55a6e7678 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -229,7 +229,8 @@ static const char *const str_m10Al[32] = [18] = "fb-clear-ctrl", [19] = "rrsba", [20] = "bhi-no", [21] = "xapic-status", /* 22 */ [23] = "ovrclk-status", - [24] = "pbrsb-no", + [24] = "pbrsb-no", [25] = "gds-ctrl", + [26] = "gds-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index fef19dd50e..d841c0d811 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -422,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -437,6 +437,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", + (caps & ARCH_CAPS_GDS_NO) ? " GDS_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", @@ -447,7 +448,7 @@ static void __init print_details(enum ind_thunk thunk) (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -464,6 +465,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (caps & ARCH_CAPS_GDS_CTRL) ? " GDS_CTRL" : "", (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index f8dce8e461..1ac3d3a1f9 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -154,6 +154,8 @@ #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) #define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) +#define cpu_has_gds_ctrl boot_cpu_has(X86_FEATURE_GDS_CTRL) +#define cpu_has_gds_no boot_cpu_has(X86_FEATURE_GDS_NO) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 267f4e59c4..8251b8258b 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -75,6 +75,8 @@ #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) +#define ARCH_CAPS_GDS_CTRL (_AC(1, ULL) << 25) +#define ARCH_CAPS_GDS_NO (_AC(1, ULL) << 26) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) @@ -93,6 +95,8 @@ #define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1) #define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2) #define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3) +#define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) +#define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) #define MSR_RTIT_OUTPUT_BASE 0x00000560 #define MSR_RTIT_OUTPUT_MASK 0x00000561 diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index dc8ffc59b6..0ee1d1d903 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -336,6 +336,8 @@ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection * XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ +XEN_CPUFEATURE(GDS_CTRL, 16*32+25) /* MCU_OPT_CTRL.GDS_MIT_{DIS,LOCK} */ +XEN_CPUFEATURE(GDS_NO, 16*32+26) /*A No Gather Data Sampling */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:31:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:31:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581698.910919 (Exim 4.92) (envelope-from ) id 1qTta1-0003wv-OQ; Thu, 10 Aug 2023 00:31:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581698.910919; Thu, 10 Aug 2023 00:31:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTta1-0003wn-LS; Thu, 10 Aug 2023 00:31:09 +0000 Received: by outflank-mailman (input) for mailman id 581698; Thu, 10 Aug 2023 00:31:08 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTta0-0003wa-7k for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:31:08 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTta0-0001St-6y for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:31:08 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTta0-00005h-6B for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:31:08 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bSwCTPWpqG8tx4i+kioP2TqVBvCMDSUDN4hGM76iM2c=; b=oG5BOHdKKvBoJ2v6CSUbjuyKXb 8TuCbaW/cwr8hGpooCvxTExsHGX48OS9P8jfYgS82eIQIB8UqC98fEJmCJQMAKbejyCk9lCXkvXhl lVF8DgPweHoOtXfcNQrngmhcDsix7x8DCht7nvt6k08iQlppR4bcU+YZqkbw5CBZjJLQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] x86/spec-ctrl: Mitigate Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:31:08 +0000 commit 5e90eb43f73c1f7c297f0dbbe079139beb754121 Author: Andrew Cooper AuthorDate: Wed Jan 4 16:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 x86/spec-ctrl: Mitigate Gather Data Sampling This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56d690efd3ca3c68e1d222f259fb3d216206e8e5) --- docs/misc/xen-command-line.pandoc | 10 ++- xen/arch/x86/spec_ctrl.c | 158 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index c9195bf828..a37a3890d1 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2263,7 +2263,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`). > {msr-sc,rsb,md-clear,ibpb-entry}=|{pv,hvm}=, > bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd, > eager-fpu,l1d-flush,branch-harden,srb-lock, -> unpriv-mmio}= ]` +> unpriv-mmio,gds-mit}= ]` Controls for speculative execution sidechannel mitigations. By default, Xen will pick the most appropriate mitigations based on compiled in support, @@ -2375,6 +2375,14 @@ and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode release to mitigate cross-domain leakage of data via the MMIO Stale Data vulnerabilities. +On all hardware, the `gds-mit=` option can be used to force or prevent Xen +from mitigating the GDS (Gather Data Sampling) vulnerability. By default, Xen +will mitigate GDS on hardware believed to be vulnerable. On hardware +supporting GDS_CTRL (requires the August 2023 microcode), and where firmware +has elected not to lock the configuration, Xen will use GDS_CTRL to mitigate +GDS with. Otherwise, Xen will mitigate by disabling AVX, which blocks the use +of the AVX2 Gather instructions. + ### sync_console > `= ` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index d841c0d811..082445179d 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -77,6 +77,7 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. static int8_t __initdata opt_srb_lock = -1; static bool __initdata opt_unpriv_mmio; static bool __read_mostly opt_fb_clear_mmio; +static int8_t __initdata opt_gds_mit = -1; static int __init parse_spec_ctrl(const char *s) { @@ -130,6 +131,7 @@ static int __init parse_spec_ctrl(const char *s) opt_branch_harden = false; opt_srb_lock = 0; opt_unpriv_mmio = false; + opt_gds_mit = 0; } else if ( val > 0 ) rc = -EINVAL; @@ -280,6 +282,8 @@ static int __init parse_spec_ctrl(const char *s) opt_srb_lock = val; else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 ) opt_unpriv_mmio = val; + else if ( (val = parse_boolean("gds-mit", s, ss)) >= 0 ) + opt_gds_mit = val; else rc = -EINVAL; @@ -1274,6 +1278,158 @@ static __init void mds_calculations(void) } } +static bool __init cpu_has_gds(void) +{ + /* + * Any part advertising GDS_NO should be not vulnerable to GDS. This + * includes cases where the hypervisor is mitigating behind our backs, or + * has synthesized GDS_NO on older parts for levelling purposes. + */ + if ( cpu_has_gds_no ) + return false; + + /* + * On real hardware the GDS_CTRL control only exists on parts vulnerable + * to GDS and with up-to-date microcode. It might also be virtualised by + * an aware hypervisor, meaning "somewhere you might migrate to is + * vulnerable". + */ + if ( cpu_has_gds_ctrl ) + return true; + + /* + * An attacker requires the use of the AVX2 GATHER instructions to leak + * data with GDS. However, the only way to block those instructions is to + * prevent XCR0[2] from being set, which is original AVX. A hypervisor + * might do this as a stopgap mitigation. + */ + if ( !cpu_has_avx ) + return false; + + /* + * GDS affects the Core line from Skylake up to but not including Golden + * Cove (Alder Lake, Sapphire Rapids). Broadwell and older, and the Atom + * line, and all hybrid parts are unaffected. + */ + switch ( boot_cpu_data.x86_model ) + { + case 0x55: /* Skylake/Cascade Lake/Cooper Lake SP */ + case 0x6a: /* Ice Lake SP */ + case 0x6c: /* Ice Lake D */ + case 0x7e: /* Ice Lake U/Y */ + case 0x8c: /* Tiger Lake U */ + case 0x8d: /* Tiger Lake H */ + case 0x8e: /* Amber/Kaby/Coffee/Whiskey/Comet lake U/Y */ + case 0x9e: /* Kaby/Coffee lake H/S/Xeon */ + case 0xa5: /* Comet Lake H/S */ + case 0xa6: /* Comet Lake U */ + case 0xa7: /* Rocket Lake */ + return true; + + default: + /* + * If we've got here and are virtualised, we're most likely under a + * hypervisor unaware of GDS at which point we've lost. Err on the + * safe side. + */ + return cpu_has_hypervisor; + } +} + +static void __init gds_calculations(void) +{ + bool cpu_has_bug_gds, mitigated = false; + + /* GDS is only known to affect Intel Family 6 processors at this time. */ + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + cpu_has_bug_gds = cpu_has_gds(); + + /* + * If we've got GDS_CTRL, we're either native with up-to-date microcode on + * a GDS-vulnerable part, or virtualised under a GDS-aware hypervisor. + */ + if ( cpu_has_gds_ctrl ) + { + bool locked; + uint64_t opt_ctrl; + + if ( cpu_has_gds_no ) + { + /* + * We don't expect to ever see GDS_CTL and GDS_NO set together. + * Complain loudly, and forgo playing with other features. + */ + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: GDS_CTRL && GDS_NO\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, this_cpu(cpu_sig).rev); + return add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + rdmsrl(MSR_MCU_OPT_CTRL, opt_ctrl); + + mitigated = !(opt_ctrl & MCU_OPT_CTRL_GDS_MIT_DIS); + locked = opt_ctrl & MCU_OPT_CTRL_GDS_MIT_LOCK; + + /* + * Firmware will lock the GDS mitigation if e.g. SGX is active. + * Alternatively, a hypervisor might virtualise GDS_CTRL as locked. + * Warn if the mitigiation is locked and the user requested the + * opposite configuration. + */ + if ( locked ) + { + if ( opt_gds_mit >= 0 && opt_gds_mit != mitigated ) + printk(XENLOG_WARNING + "GDS_MIT locked by firwmare - ignoring spec-ctrl=gds-mit setting\n"); + opt_gds_mit = mitigated; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * Latch our choice of GDS_MIT for all CPUs to pick up. If LOCK is + * set, we latch the same value as it currently holds. + */ + set_in_mcu_opt_ctrl(MCU_OPT_CTRL_GDS_MIT_DIS, + opt_gds_mit ? 0 : MCU_OPT_CTRL_GDS_MIT_DIS); + mitigated = opt_gds_mit; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * If we think we're not on vulnerable hardware, or we've mitigated GDS, + * synthesize GDS_NO. This is mostly for the benefit of guests, to inform + * them not to panic. + */ + if ( !cpu_has_bug_gds || mitigated ) + return setup_force_cpu_cap(X86_FEATURE_GDS_NO); + + /* + * If all else has failed, mitigate by disabling AVX. This prevents + * guests from enabling %xcr0.ymm, thereby blocking the use of VGATHER + * instructions. + * + * There's at least one affected CPU not expected to recieve a microcode + * update, and this is the only remaining mitigation. + * + * If we're virtualised, this prevents our guests attacking each other, + * but it doesn't stop the outer hypervisor's guests attacking us. Leave + * a note to this effect. + */ + if ( cpu_has_avx && opt_gds_mit ) + { + setup_clear_cpu_cap(X86_FEATURE_AVX); + printk(XENLOG_WARNING "Mitigating GDS by disabling AVX%s\n", + cpu_has_hypervisor ? + " while virtualised - protections are best-effort" : ""); + } +} + void spec_ctrl_init_domain(struct domain *d) { bool pv = is_pv_domain(d); @@ -1748,6 +1904,8 @@ void __init init_speculation_mitigations(void) opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } + gds_calculations(); + print_details(thunk); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:31:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:31:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581699.910923 (Exim 4.92) (envelope-from ) id 1qTtaA-00040N-RZ; Thu, 10 Aug 2023 00:31:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581699.910923; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4wEUQZ8mxPPmNpzte++it3YClni3ZFCuydFawnku5Rw=; b=J2+vDZ+cEehpO6xf2cJ7vDobAY A9dyoVlhe2ogFg0xw1l3dO+teh7AANRiotaKc9Q89HOJJUxeqJ9fH5a7c5rl5zvNXf/emXNlDEZ+1 e3cleS2E2EzEk26fVWEzksaxVYQBs3Ca5FqihGr+aExmfRajWkda38Tr1mWRwfYPQaU0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.16] Update Xen to version 4.16.5 Message-Id: Date: Thu, 10 Aug 2023 00:31:18 +0000 commit b9ad687bfd0a49f36e0dd9f038e73782595fb4af Author: Andrew Cooper AuthorDate: Mon Aug 7 13:00:02 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 16:02:54 2023 +0100 Update Xen to version 4.16.5 Signed-off-by: Andrew Cooper --- Config.mk | 2 +- xen/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index e3cf81f274..a45570f41c 100644 --- a/Config.mk +++ b/Config.mk @@ -238,7 +238,7 @@ SEABIOS_UPSTREAM_URL ?= git://xenbits.xen.org/seabios.git MINIOS_UPSTREAM_URL ?= git://xenbits.xen.org/mini-os.git endif OVMF_UPSTREAM_REVISION ?= 7b4a99be8a39c12d3a7fc4b8db9f0eab4ac688d5 -QEMU_UPSTREAM_REVISION ?= c02cb236b5e4a76cf74e641cc35a0e3ebd3e52f3 +QEMU_UPSTREAM_REVISION ?= qemu-xen-4.16.5 MINIOS_UPSTREAM_REVISION ?= xen-RELEASE-4.16.4 SEABIOS_UPSTREAM_REVISION ?= rel-1.16.0 diff --git a/xen/Makefile b/xen/Makefile index aa956fe918..78db742049 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -2,7 +2,7 @@ # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 16 -export XEN_EXTRAVERSION ?= .5-pre$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .5$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.16 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581703.910927 (Exim 4.92) (envelope-from ) id 1qTtmV-00057r-Of; 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Thu, 10 Aug 2023 00:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EnAOE6HAcbnEkaGggeBGH9uzU4iG6CNIIJUyqkF8CVc=; b=2Y4Y6eP+qQgHwR5Dz5Dh8iC1ZX ms8d/mxmZrlThf0hn+GJTETU6BWNuIdfdlzd1FWzKLO3N5Jt/x23LrQqvZ+r2rOjzcZHeT5MW+h3B fkbrWAJAmYtRjqnhTvKkMsDb8M40NLm2ZzBBxLZbGYiPCCPH4c1tiu+aqX9Hz4Qg1tY8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully Message-Id: Date: Thu, 10 Aug 2023 00:44:02 +0000 commit 68cc80cff66c1f2c1f3bfef76df70c32b59c9727 Author: Andrew Cooper AuthorDate: Wed May 10 19:58:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Calculate FEATURESET_NR_ENTRIES more helpfully When adding new featureset words, it is convenient to split the work into several patches. However, GCC 12 spotted that the way we prefer to split the work results in a real (transient) breakage whereby the policy <-> featureset helpers perform out-of-bounds accesses on the featureset array. Fix this by having gen-cpuid.py calculate FEATURESET_NR_ENTRIES from the comments describing the word blocks, rather than from the XEN_CPUFEATURE() with the greatest value. For simplicty, require that the word blocks appear in order. This can be revisted if we find a good reason to have blocks out of order. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56e2c8e5860090a35d5f0cafe168223a2a7c0e62) --- xen/tools/gen-cpuid.py | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 1e7020de46..2fe409e75e 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -50,13 +50,37 @@ def parse_definitions(state): "\s+([\s\d]+\*[\s\d]+\+[\s\d]+)\)" "\s+/\*([\w!]*) .*$") + word_regex = re.compile( + r"^/\* .* word (\d*) \*/$") + last_word = -1 + this = sys.modules[__name__] for l in state.input.readlines(): - # Short circuit the regex... - if not l.startswith("XEN_CPUFEATURE("): + + # Short circuit the regexes... + if not (l.startswith("XEN_CPUFEATURE(") or + l.startswith("/* ")): continue + # Handle /* ... word $N */ lines + if l.startswith("/* "): + + res = word_regex.match(l) + if res is None: + continue # Some other comment + + word = int(res.groups()[0]) + + if word != last_word + 1: + raise Fail("Featureset word %u out of order (last word %u)" + % (word, last_word)) + + last_word = word + state.nr_entries = word + 1 + continue + + # Handle XEN_CPUFEATURE( lines res = feat_regex.match(l) if res is None: @@ -94,6 +118,15 @@ def parse_definitions(state): if len(state.names) == 0: raise Fail("No features found") + if state.nr_entries == 0: + raise Fail("No featureset word info found") + + max_val = max(state.names.keys()) + if (max_val >> 5) >= state.nr_entries: + max_name = state.names[max_val] + raise Fail("Feature %s (%d*32+%d) exceeds FEATURESET_NR_ENTRIES (%d)" + % (max_name, max_val >> 5, max_val & 31, state.nr_entries)) + def featureset_to_uint32s(fs, nr): """ Represent a featureset as a list of C-compatible uint32_t's """ @@ -122,9 +155,6 @@ def format_uint32s(state, featureset, indent): def crunch_numbers(state): - # Size of bitmaps - state.nr_entries = nr_entries = (max(state.names.keys()) >> 5) + 1 - # Features common between 1d and e1d. common_1d = (FPU, VME, DE, PSE, TSC, MSR, PAE, MCE, CX8, APIC, MTRR, PGE, MCA, CMOV, PAT, PSE36, MMX, FXSR) @@ -325,7 +355,7 @@ def crunch_numbers(state): state.nr_deep_deps = len(state.deep_deps.keys()) # Calculate the bitfield name declarations - for word in range(nr_entries): + for word in range(state.nr_entries): names = [] for bit in range(32): -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581704.910930 (Exim 4.92) (envelope-from ) id 1qTtmf-00059U-Q5; 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Thu, 10 Aug 2023 00:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=6Assz4VKxEKGuDBOq8Pg53l85xqGAM/6Gp8rZuVMi3Q=; b=fTSo2Jv06jdE/1Wz7GtCkJMdHn SxGP1nWTfe1lJB/M6WJSoJ+/hVVGBpo4Z1oPi8SA2MYpiYp1I+2T36EpKAY4rzRLoDlrkiIf1jzGI FsK/VnXdU/H3jua70+nQQVHfLsZY79GW6ermdG1MktuqD2JFlq1S5Ucyxi/u4aOXN1LI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Infrastructure for leaves 7:1{ecx,edx} Message-Id: Date: Thu, 10 Aug 2023 00:44:12 +0000 commit 8bd381185ba49b174663a75c21646a7a74ea573b Author: Andrew Cooper AuthorDate: Fri Mar 3 08:06:44 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Infrastructure for leaves 7:1{ecx,edx} We don't actually need ecx yet, but adding it in now will reduce the amount to which leaf 7 is out of order in a featureset. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit b4a23bf6293aadecfd03bf9e83974443e2eac9cb) --- tools/misc/xen-cpuid.c | 10 ++++++++++ xen/arch/x86/cpu/common.c | 3 ++- xen/include/public/arch-x86/cpufeatureset.h | 4 ++++ xen/include/xen/lib/x86/cpuid.h | 17 +++++++++++++++-- 4 files changed, 31 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 5c944c24fe..f7be8d12e9 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -193,6 +193,14 @@ static const char *const str_7b1[32] = { }; +static const char *const str_7c1[32] = +{ +}; + +static const char *const str_7d1[32] = +{ +}; + static const char *const str_7d2[32] = { [ 0] = "intel-psfd", @@ -218,6 +226,8 @@ static const struct { { "0x80000021.eax", "e21a", str_e21a }, { "0x00000007:1.ebx", "7b1", str_7b1 }, { "0x00000007:2.edx", "7d2", str_7d2 }, + { "0x00000007:1.ecx", "7c1", str_7c1 }, + { "0x00000007:1.edx", "7d1", str_7d1 }, }; #define COL_ALIGN "18" diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 40a81d63e2..7b93902585 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -435,7 +435,8 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(7, 1, &c->x86_capability[FEATURESET_7a1], &c->x86_capability[FEATURESET_7b1], - &tmp, &tmp); + &c->x86_capability[FEATURESET_7c1], + &c->x86_capability[FEATURESET_7d1]); if (max_subleaf >= 2) cpuid_count(7, 2, &tmp, &tmp, &tmp, diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 41a358d575..34d5a0648e 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -298,6 +298,10 @@ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ /* Intel-defined CPU features, CPUID level 0x00000007:2.edx, word 13 */ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ +/* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */ + +/* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h index 50be07c0eb..fa98b371ee 100644 --- a/xen/include/xen/lib/x86/cpuid.h +++ b/xen/include/xen/lib/x86/cpuid.h @@ -17,7 +17,9 @@ #define FEATURESET_7a1 10 /* 0x00000007:1.eax */ #define FEATURESET_e21a 11 /* 0x80000021.eax */ #define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x80000007:2.edx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ struct cpuid_leaf { @@ -194,7 +196,14 @@ struct cpuid_policy uint32_t _7b1; struct { DECL_BITFIELD(7b1); }; }; - uint32_t /* c */:32, /* d */:32; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; /* Subleaf 2. */ uint32_t /* a */:32, /* b */:32, /* c */:32; @@ -343,6 +352,8 @@ static inline void cpuid_policy_to_featureset( fs[FEATURESET_e21a] = p->extd.e21a; fs[FEATURESET_7b1] = p->feat._7b1; fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; } /* Fill in a CPUID policy from a featureset bitmap. */ @@ -363,6 +374,8 @@ static inline void cpuid_featureset_to_policy( p->extd.e21a = fs[FEATURESET_e21a]; p->feat._7b1 = fs[FEATURESET_7b1]; p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; } static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581705.910935 (Exim 4.92) (envelope-from ) id 1qTtmp-0005CV-RV; Thu, 10 Aug 2023 00:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581705.910935; Thu, 10 Aug 2023 00:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmp-0005CL-Oz; Thu, 10 Aug 2023 00:44:23 +0000 Received: by outflank-mailman (input) for mailman id 581705; Thu, 10 Aug 2023 00:44:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmp-0005C9-0x for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmp-0001mE-07 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtmo-0000y7-VW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IV1REXW53OkhrKdLJntR2ObgACtuxwpBs/yFTTgqZHE=; b=I2orxdMWiutLaRiVO3d/9DVeB6 SnxyMbyqiDWcosEy0Dny01Cinl/oqttsnLcvfereokqnILvHumK42FUzLkCdoP9Y2WvlpP59dwYRa UNVCOTb5hwvF3i31RmHy2wy6LLDCAfcJepc1a9FzBtrkNGZt4C2Hm2max1q7j+S8Pkyw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/msr: Expose MSR_ARCH_CAPS in the raw and host policies Message-Id: Date: Thu, 10 Aug 2023 00:44:22 +0000 commit e3acf0ab009058e34a91b5d3ce1a41bf76c499fe Author: Andrew Cooper AuthorDate: Fri Jun 11 11:37:53 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/msr: Expose MSR_ARCH_CAPS in the raw and host policies MSR_ARCH_CAPS is still not supported for guests yet (other than the hardware domain), until the toolstack learns how to construct an MSR policy. However, we want access to the host ARCH_CAPS_TSX_CTRL value in particular for testing purposes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit b672695e748869b2e2e2cb03f671f12003d2b079) Also the remnants of: x86: Expose more MSR_ARCH_CAPS to hwdom (cherry picked from commit e83cd54611fec5b7a539fa1281a14319143490e6) x86/spec-ctrl: Enumeration for PBRSB_NO (cherry picked from commit b874e47eb13feb75be3ee7b5dc4ae9c97d80d774) which have both partially been backported already. --- xen/arch/x86/msr.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 9bced8d36c..cc8fe76203 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -48,8 +48,13 @@ struct msr_policy __read_mostly hvm_def_msr_policy; static void __init calculate_raw_policy(void) { + struct msr_policy *mp = &raw_msr_policy; + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -61,6 +66,15 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + mp->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); } static void __init calculate_pv_max_policy(void) @@ -68,6 +82,8 @@ static void __init calculate_pv_max_policy(void) struct msr_policy *mp = &pv_max_msr_policy; *mp = host_msr_policy; + + mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -85,6 +101,8 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; + + mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581706.910939 (Exim 4.92) (envelope-from ) id 1qTtmz-0005Fm-T1; Thu, 10 Aug 2023 00:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581706.910939; Thu, 10 Aug 2023 00:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmz-0005Fe-QP; Thu, 10 Aug 2023 00:44:33 +0000 Received: by outflank-mailman (input) for mailman id 581706; Thu, 10 Aug 2023 00:44:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmz-0005FT-4s for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtmz-0001mN-42 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtmz-0000yZ-2N for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=t55JgvqsCHCDylsa65SdfComBTaEfz5Hep4BB5bvvcE=; b=04rVKLJtdki74rqC+gutXbQLPJ OLkcplPaSrf9Qs5MdYkC8oijc4/CHr9wnCCDBmArfSzEDHoEWNszdPq8hHosAiFF/adYb7H7m/eCz 7v2K+9yut9MUwE9WVCA/V7zHQ4R3HfODGEZtOEDkmTk4+kNSpIekJGiE0yQ/3rwnLYfQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Drop special_features[] Message-Id: Date: Thu, 10 Aug 2023 00:44:33 +0000 commit 2e1c9a210c2788c330c62290d1cc77e31fd617d7 Author: Andrew Cooper AuthorDate: Mon Jun 7 13:38:53 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Drop special_features[] While the ! annotation is useful to indicate that something special is happening, an array of bits is not. Drop it, to prevent mistakes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 69e1472d21cf7e5cf0795ef38b99d00de78a910e) x86/cpuid: Half revert "x86/cpuid: Drop special_features[]" xen-cpuid does print out the list of special features, and this is helpful to keep. Fixes: 69e1472d21cf ("x86/cpuid: Drop special_features[]") Reported-by: Jan Beulich Reported-by: Sander Eikelenboom Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 0ba0663b1b32d9351890dfd02bdebb3d238897bd) --- xen/arch/x86/cpuid.c | 2 -- xen/include/asm-x86/cpuid.h | 1 - 2 files changed, 3 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 11c95178f1..79950dc3ea 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -14,7 +14,6 @@ #include const uint32_t known_features[] = INIT_KNOWN_FEATURES; -const uint32_t special_features[] = INIT_SPECIAL_FEATURES; static const uint32_t pv_max_featuremask[] = INIT_PV_MAX_FEATURES; static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; @@ -1126,7 +1125,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, static void __init __maybe_unused build_assertions(void) { BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(special_features) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 7baf6c9628..46904061d0 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -14,7 +14,6 @@ #include extern const uint32_t known_features[FSCAPINTS]; -extern const uint32_t special_features[FSCAPINTS]; void init_guest_cpuid(void); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581707.910942 (Exim 4.92) (envelope-from ) id 1qTtn9-0005IZ-Us; Thu, 10 Aug 2023 00:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581707.910942; Thu, 10 Aug 2023 00:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtn9-0005IR-Rt; Thu, 10 Aug 2023 00:44:43 +0000 Received: by outflank-mailman (input) for mailman id 581707; Thu, 10 Aug 2023 00:44:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtn9-0005IG-9d for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtn9-0001ml-78 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtn9-0000zO-6I for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YF1lRj3AfhCWaG9EJIFZj0hlPZirDkVcOaWsTr6jjwQ=; b=6CZZpjkIT/7tyqqkgvhFFGaoi+ 787+uLzQkx0YG72ecSzwTL1ha49ByHZTWrDs+kWYl53wIiTO5IX1LvhkG13joghY9pZ9T0Ndqt60L Xq2DPczNScf5mjd5RQnJSd5FdGePQlzgQFsTUyXaiyRcmeENQHpkSA2dq/qur3yWnSTw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/CPUID: move some static masks into .init Message-Id: Date: Thu, 10 Aug 2023 00:44:43 +0000 commit e1184eb9226164ebd722d3d2acf95ab094f0aa6f Author: Jan Beulich AuthorDate: Fri Apr 9 09:14:25 2021 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/CPUID: move some static masks into .init Except for hvm_shadow_max_featuremask and deep_features they're referenced by __init functions only. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné (cherry picked from commit 186b09ea01c925c3997f1a05f585b35151d32d1a) --- xen/arch/x86/cpuid.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 79950dc3ea..c8e1a3e580 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -15,12 +15,15 @@ const uint32_t known_features[] = INIT_KNOWN_FEATURES; -static const uint32_t pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t hvm_hap_max_featuremask[] = INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t hvm_shadow_def_featuremask[] = INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t hvm_hap_def_featuremask[] = INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static int __init parse_xen_cpuid(const char *s) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:44:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581708.910947 (Exim 4.92) (envelope-from ) id 1qTtnK-0005Lp-1P; Thu, 10 Aug 2023 00:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581708.910947; Thu, 10 Aug 2023 00:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnJ-0005Lh-Ul; Thu, 10 Aug 2023 00:44:53 +0000 Received: by outflank-mailman (input) for mailman id 581708; Thu, 10 Aug 2023 00:44:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnJ-0005LW-B9 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnJ-0001ms-AP for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtnJ-0000zu-9T for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:44:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SWvxB8UebICuCSXmachBBin9TvFpzIHNhbTZs2qlQcc=; b=y4gU2J/fo94w46mnd4ve6nTUFk 9TjvwO3gMTGR1izaypzVh7pdLzxDFeKudVa1JxAtUOKwWEHvSQMQEV4enJzMQ9C2FNTpLYsJ+GeiA qluil7OpEjQG5TIlz8pOpx36VDxzR7yw2Mon6l+t5Y72477GYUXf/CdAN4P01JiW028k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() Message-Id: Date: Thu, 10 Aug 2023 00:44:53 +0000 commit 11dd3480a890d6e2657fde7b0cb27d929d3dcf08 Author: Andrew Cooper AuthorDate: Wed Dec 15 15:36:59 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Split dom0 handling out of init_domain_cpuid_policy() To implement dom0-cpuid= support, the special cases would need extending. However there is already a problem with late hwdom where the special cases override toolstack settings, which is unintended and poor behaviour. Introduce a new init_dom0_cpuid_policy() for the purpose, moving the ITSC and ARCH_CAPS logic. The is_hardware_domain() can be dropped, and for now there is no need to rerun recalculate_cpuid_policy(); this is a relatively expensive operation, and will become more-so over time. Rearrange the logic in create_dom0() to make room for a call to init_dom0_cpuid_policy(). The AMX plans for having variable sized XSAVE states require that modifications to the policy happen before vCPUs are created. Additionally, factor out domid into a variable so we can be slightly more correct in the case of a failure, and also print the error from domain_create(). This will at least help distinguish -EINVAL from -ENOMEM. No practical change in behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c17072fc164a72583fda8e2b836c71d2e3f8e84d) --- xen/arch/x86/cpuid.c | 25 +++++++++++++++---------- xen/arch/x86/setup.c | 15 +++++++++++---- xen/include/asm-x86/cpuid.h | 3 +++ 3 files changed, 29 insertions(+), 14 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index c8e1a3e580..7a76bc4d09 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -736,23 +736,28 @@ int init_domain_cpuid_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* The hardware domain can't migrate. Give it ITSC if available. */ - if ( is_hardware_domain(d) ) - p->extd.itsc = cpu_has_itsc; + d->arch.cpuid = p; + + recalculate_cpuid_policy(d); + + return 0; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpuid_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; /* * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) + if ( cpu_has_arch_caps ) p->feat.arch_caps = true; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; } void guest_cpuid(const struct vcpu *v, uint32_t leaf, diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 30d028af6d..82fc351a2f 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -788,6 +788,7 @@ static struct domain *__init create_dom0(const module_t *image, }; struct domain *d; char *cmdline; + domid_t domid; if ( opt_dom0_pvh ) { @@ -802,10 +803,16 @@ static struct domain *__init create_dom0(const module_t *image, if ( iommu_enabled ) dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu; - /* Create initial domain 0. */ - d = domain_create(get_initial_domain_id(), &dom0_cfg, !pv_shim); - if ( IS_ERR(d) || (alloc_dom0_vcpu0(d) == NULL) ) - panic("Error creating domain 0\n"); + /* Create initial domain. Not d0 for pvshim. */ + domid = get_initial_domain_id(); + d = domain_create(domid, &dom0_cfg, !pv_shim); + if ( IS_ERR(d) ) + panic("Error creating d%u: %ld\n", domid, PTR_ERR(d)); + + init_dom0_cpuid_policy(d); + + if ( alloc_dom0_vcpu0(d) == NULL ) + panic("Error creating d%uv0\n", domid); /* Grab the DOM0 command line. */ cmdline = image->string ? __va(image->string) : NULL; diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 46904061d0..9c3637549a 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -59,6 +59,9 @@ bool recheck_cpu_features(unsigned int cpu); /* Allocate and initialise a CPUID policy suitable for the domain. */ int init_domain_cpuid_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + /* Clamp the CPUID policy to reality. */ void recalculate_cpuid_policy(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581709.910951 (Exim 4.92) (envelope-from ) id 1qTtnU-0005Q1-2i; Thu, 10 Aug 2023 00:45:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581709.910951; Thu, 10 Aug 2023 00:45:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnU-0005Pt-00; Thu, 10 Aug 2023 00:45:04 +0000 Received: by outflank-mailman (input) for mailman id 581709; Thu, 10 Aug 2023 00:45:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnT-0005Pk-Fx for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnT-0001nQ-FA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtnT-00010v-Ch for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cVIiTt9P3+i9kNyUaMBU+s8VbKDEBbkA2PnbTYNhBUo=; b=YdR1q+nhIS4aEMyNT5DCBLgrqG LkDlRfsuXQsN6R5eGWyEuwA3toIi8fGbVOwdOtjx8Id7ULgiuT31/JUjDcDjTTIyLZLyiOGnRQ8y6 B+A1VcEJbIcYG/k1XUx5YjjVfm62TQv8+SfkNdJe+DOBr90ozb4r8BP+CdmDu6T2thgw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Factor common parsing out of parse_xen_cpuid() Message-Id: Date: Thu, 10 Aug 2023 00:45:03 +0000 commit 054a7ee1e6e693bf67ac34e60f54ac0335b9684b Author: Andrew Cooper AuthorDate: Wed Dec 15 16:30:25 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Factor common parsing out of parse_xen_cpuid() dom0-cpuid= is going to want to reuse the common parsing loop, so factor it out into parse_cpuid(). Irritatingly, despite being static const, the features[] array gets duplicated each time parse_cpuid() is inlined. As it is a large (and ever growing with new CPU features) datastructure, move it to being file scope so all inlines use the same single object. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94c3df9188d6deed6fe213754492b11b9d409262) --- xen/arch/x86/cpuid.c | 45 ++++++++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 7a76bc4d09..428fa5a84f 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -26,17 +26,26 @@ static const uint32_t __initconst hvm_hap_def_featuremask[] = INIT_HVM_HAP_DEF_FEATURES; static const uint32_t deep_features[] = INIT_DEEP_FEATURES; -static int __init parse_xen_cpuid(const char *s) +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) { const char *ss; int val, rc = 0; do { - static const struct feature { - const char *name; - unsigned int bit; - } features[] __initconstrel = INIT_FEATURE_NAMES; - const struct feature *lhs, *rhs, *mid = NULL /* GCC... */; + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; const char *feat; ss = strchr(s, ','); @@ -49,8 +58,8 @@ static int __init parse_xen_cpuid(const char *s) feat += 3; /* (Re)initalise lhs and rhs for binary search. */ - lhs = features; - rhs = features + ARRAY_SIZE(features); + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); while ( lhs < rhs ) { @@ -72,11 +81,7 @@ static int __init parse_xen_cpuid(const char *s) if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) { - if ( !val ) - setup_clear_cpu_cap(mid->bit); - else if ( mid->bit == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); + callback(mid->bit, val); mid = NULL; } @@ -95,6 +100,20 @@ static int __init parse_xen_cpuid(const char *s) return rc; } + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} custom_param("cpuid", parse_xen_cpuid); #define EMPTY_LEAF ((struct cpuid_leaf){}) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581710.910956 (Exim 4.92) (envelope-from ) id 1qTtne-0005Sl-4R; Thu, 10 Aug 2023 00:45:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581710.910956; Thu, 10 Aug 2023 00:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtne-0005Sd-1S; Thu, 10 Aug 2023 00:45:14 +0000 Received: by outflank-mailman (input) for mailman id 581710; Thu, 10 Aug 2023 00:45:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnd-0005ST-Iz for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnd-0001na-IG for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtnd-000124-HY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ecrIpOg80jeZvL8+L6F5pYISTTJhvCWqlIdWUK9zAjk=; b=XD2wi0Lwi6ALyppSvMj81ccmlA R7uYSK74w1snXvrS8LsFHnHTQfJsnn07qC3giRCMVOgG8jCdZSpSoxmBktBu3Sl/4k9gayprhwdID 879NlD9La26TaAYKW1GUlAj4whommkGf7LfGSaehLo/Hod+kcDZR7lf/lW0Oa389owPE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpuid: Introduce dom0-cpuid command line option Message-Id: Date: Thu, 10 Aug 2023 00:45:13 +0000 commit 067a890347cf07fa1322ef0fad92d335542ea679 Author: Andrew Cooper AuthorDate: Tue Dec 14 16:53:36 2021 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/cpuid: Introduce dom0-cpuid command line option Specifically, this lets the user opt in to non-default features. Collect all dom0 settings together in dom0_{en,dis}able_feat[], and apply it to dom0's policy when other tweaks are being made. As recalculate_cpuid_policy() is an expensive action, and dom0-cpuid= is likely to only be used by the x86 maintainers for development purposes, forgo the recalculation in the general case. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 5bd2b82df28cb7390f5ffb00fac635d0b9e36674) --- docs/misc/xen-command-line.pandoc | 16 ++++++++++++++++ xen/arch/x86/cpuid.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index b73c4a6050..2eacef5afd 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -809,6 +809,22 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. +### dom0-cpuid + = List of comma separated booleans + + Applicability: x86 + +This option allows for fine tuning of the facilities dom0 will use, after +accounting for hardware capabilities and Xen settings as enumerated via CPUID. + +Options are accepted in positive and negative form, to enable or disable +specific features. All selections via this mechanism are subject to normal +CPU Policy safety and dependency logic. + +This option is intended for developers to opt dom0 into non-default features, +and is not intended for use in production circumstances. If using this option +is necessary to fix an issue, please report a bug. + ### dom0-iommu = List of [ passthrough=, strict=, map-inclusive=, map-reserved=, none ] diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 428fa5a84f..795bbddef8 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -116,6 +116,24 @@ static int __init parse_xen_cpuid(const char *s) } custom_param("cpuid", parse_xen_cpuid); +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + #define EMPTY_LEAF ((struct cpuid_leaf){}) static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) @@ -777,6 +795,25 @@ void __init init_dom0_cpuid_policy(struct domain *d) */ if ( cpu_has_arch_caps ) p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + cpuid_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + cpuid_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } } void guest_cpuid(const struct vcpu *v, uint32_t leaf, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581711.910959 (Exim 4.92) (envelope-from ) id 1qTtnp-0005VZ-5f; Thu, 10 Aug 2023 00:45:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581711.910959; Thu, 10 Aug 2023 00:45:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnp-0005VR-2y; Thu, 10 Aug 2023 00:45:25 +0000 Received: by outflank-mailman (input) for mailman id 581711; Thu, 10 Aug 2023 00:45:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnn-0005VJ-Mg for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnn-0001ni-LV for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtnn-00012X-Ka for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=/3FULE0jInWa7O6zxcRl+NhiOchpQ1V/HQWunOTJhbQ=; b=VwrsExrQ2TiAHc7XPDwggDAUdT 9QlNvR2ZacrH1o/QZ9PkGhtPeEAib79JRCR+wzmN1Rzr7elEbCG7Q17CJpONfgLxlUKXoH7qATg35 kjkupTAVlpn7JPgUpJT+Ijp8jY/4QbSrwQwGANDAQcccTzAk4lPgiHh7g8tM7gQxZhAE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] tools/xen-cpuid: Rework the handling of dynamic featuresets Message-Id: Date: Thu, 10 Aug 2023 00:45:23 +0000 commit 186ece0292aa83d63d2805375e7f4bbb777baf4b Author: Andrew Cooper AuthorDate: Fri Mar 10 19:04:22 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 tools/xen-cpuid: Rework the handling of dynamic featuresets struct fsinfo is the vestigial remnant of an older internal design which didn't survive very long. Simplify things by inlining get_featureset() and having a single memory allocation that gets reused. This in turn changes featuresets[] to be a simple list of names, so rename it to fs_names[]. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit ec3474e1dd42e6f410601f50b6e74fb7c442cfb9) --- tools/misc/xen-cpuid.c | 53 +++++++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index f7be8d12e9..89fca5686b 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -232,16 +232,11 @@ static const struct { #define COL_ALIGN "18" -static struct fsinfo { - const char *name; - uint32_t len; - uint32_t *fs; -} featuresets[] = -{ - [XEN_SYSCTL_cpu_featureset_host] = { "Host", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_raw] = { "Raw", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_pv] = { "PV", 0, NULL }, - [XEN_SYSCTL_cpu_featureset_hvm] = { "HVM", 0, NULL }, +static const char *const fs_names[] = { + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_pv] = "PV", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", }; static void dump_leaf(uint32_t leaf, const char *const *strs) @@ -288,22 +283,10 @@ static void decode_featureset(const uint32_t *features, } } -static int get_featureset(xc_interface *xch, unsigned int idx) -{ - struct fsinfo *f = &featuresets[idx]; - - f->len = nr_features; - f->fs = calloc(nr_features, sizeof(*f->fs)); - - if ( !f->fs ) - err(1, "calloc(, featureset)"); - - return xc_get_cpu_featureset(xch, idx, &f->len, f->fs); -} - static void dump_info(xc_interface *xch, bool detail) { unsigned int i; + uint32_t *fs; printf("nr_features: %u\n", nr_features); @@ -334,26 +317,34 @@ static void dump_info(xc_interface *xch, bool detail) nr_features, "HVM Hap Default", detail); printf("\nDynamic sets:\n"); - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) + + fs = malloc(sizeof(*fs) * nr_features); + if ( !fs ) + err(1, "malloc(featureset)"); + + for ( i = 0; i < ARRAY_SIZE(fs_names); ++i ) { - if ( get_featureset(xch, i) ) + uint32_t len = nr_features; + int ret; + + memset(fs, 0, sizeof(*fs) * nr_features); + + ret = xc_get_cpu_featureset(xch, i, &len, fs); + if ( ret ) { if ( errno == EOPNOTSUPP ) { - printf("%s featureset not supported by Xen\n", - featuresets[i].name); + printf("%s featureset not supported by Xen\n", fs_names[i]); continue; } err(1, "xc_get_featureset()"); } - decode_featureset(featuresets[i].fs, featuresets[i].len, - featuresets[i].name, detail); + decode_featureset(fs, len, fs_names[i], detail); } - for ( i = 0; i < ARRAY_SIZE(featuresets); ++i ) - free(featuresets[i].fs); + free(fs); } static void print_policy(const char *name, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581712.910962 (Exim 4.92) (envelope-from ) id 1qTtnz-0005YI-71; Thu, 10 Aug 2023 00:45:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581712.910962; Thu, 10 Aug 2023 00:45:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnz-0005YA-4P; Thu, 10 Aug 2023 00:45:35 +0000 Received: by outflank-mailman (input) for mailman id 581712; Thu, 10 Aug 2023 00:45:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnx-0005Xz-Pd for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtnx-0001ns-Oq for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtnx-000132-Nu for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Q66pmCY2JFu9TnZsQN7sBmsxkfrHs2Irw5Z7ZfJCYFk=; b=BGAsOwaSnwmn1tc6zQ4UueGsUu 4Vqd3o2VxRd/wBvZTnk20nyS2u+Rmtid1v5w2WDqxaYy782kIxpkuOnJPMH8CwYHScjybi/JpLAea RKtUVTXiurK1A0KuiXJqfFhpJuDOkpUcmtfzUpCThx3/1REA61zM9AUOsCyFi+woU08A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Message-Id: Date: Thu, 10 Aug 2023 00:45:33 +0000 commit fc1497c51e39168d56de2ed8c137394b1e75c28c Author: Andrew Cooper AuthorDate: Fri Mar 10 19:37:56 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86/sysctl: Retrofit XEN_SYSCTL_cpu_featureset_{pv,hvm}_max Featuresets are supposed to be disappearing when the CPU policy infrastructure is complete, but that has taken longer than expected, and isn't going to be complete imminently either. In the meantime, Xen does have proper default/max featuresets, and xen-cpuid can even get them via the XEN_SYSCTL_cpu_policy_* interface, but only knows now to render them nicely via the featureset interface. Differences between default and max are a frequent source of errors, frequently too in secret leading up to an embargo, so extend the featureset sysctl to allow xen-cpuid to render them all nicely. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Acked-by: Christian Lindig (cherry picked from commit 433d012c6c2737ad5a9aaa994355a4140d601852) --- tools/misc/xen-cpuid.c | 10 ++++++---- tools/ocaml/libs/xc/xenctrl.ml | 8 +++++++- tools/ocaml/libs/xc/xenctrl.mli | 8 +++++++- xen/arch/x86/sysctl.c | 4 +++- xen/include/public/sysctl.h | 2 ++ 5 files changed, 25 insertions(+), 7 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 89fca5686b..bac32a127a 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -233,10 +233,12 @@ static const struct { #define COL_ALIGN "18" static const char *const fs_names[] = { - [XEN_SYSCTL_cpu_featureset_host] = "Host", - [XEN_SYSCTL_cpu_featureset_raw] = "Raw", - [XEN_SYSCTL_cpu_featureset_pv] = "PV", - [XEN_SYSCTL_cpu_featureset_hvm] = "HVM", + [XEN_SYSCTL_cpu_featureset_raw] = "Raw", + [XEN_SYSCTL_cpu_featureset_host] = "Host", + [XEN_SYSCTL_cpu_featureset_pv] = "PV Default", + [XEN_SYSCTL_cpu_featureset_hvm] = "HVM Default", + [XEN_SYSCTL_cpu_featureset_pv_max] = "PV Max", + [XEN_SYSCTL_cpu_featureset_hvm_max] = "HVM Max", }; static void dump_leaf(uint32_t leaf, const char *const *strs) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index a5588c643f..ab0787bc85 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -283,7 +283,13 @@ external version_changeset: handle -> string = "stub_xc_version_changeset" external version_capabilities: handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external watchdog : handle -> int -> int32 -> int diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 6e94940a8a..eaa7da376e 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -220,7 +220,13 @@ external version_changeset : handle -> string = "stub_xc_version_changeset" external version_capabilities : handle -> string = "stub_xc_version_capabilities" -type featureset_index = Featureset_raw | Featureset_host | Featureset_pv | Featureset_hvm +type featureset_index = + | Featureset_raw + | Featureset_host + | Featureset_pv + | Featureset_hvm + | Featureset_pv_max + | Featureset_hvm_max external get_cpu_featureset : handle -> featureset_index -> int64 array = "stub_xc_get_cpu_featureset" external pages_to_kib : int64 -> int64 = "stub_pages_to_kib" diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index aff52a13f3..2e0edc6aff 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -324,14 +324,16 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[4] = { + static const struct cpuid_policy *const policy_table[6] = { [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, #ifdef CONFIG_PV [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, #endif #ifdef CONFIG_HVM [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, #endif }; const struct cpuid_policy *p = NULL; diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 3145aff95b..27c310770f 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -805,6 +805,8 @@ struct xen_sysctl_cpu_featureset { #define XEN_SYSCTL_cpu_featureset_host 1 #define XEN_SYSCTL_cpu_featureset_pv 2 #define XEN_SYSCTL_cpu_featureset_hvm 3 +#define XEN_SYSCTL_cpu_featureset_pv_max 4 +#define XEN_SYSCTL_cpu_featureset_hvm_max 5 uint32_t index; /* IN: Which featureset to query? */ uint32_t nr_features; /* IN/OUT: Number of entries in/written to * 'features', or the maximum number of features if -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581713.910967 (Exim 4.92) (envelope-from ) id 1qTto9-0005bV-AX; Thu, 10 Aug 2023 00:45:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581713.910967; Thu, 10 Aug 2023 00:45:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTto9-0005bN-7B; Thu, 10 Aug 2023 00:45:45 +0000 Received: by outflank-mailman (input) for mailman id 581713; Thu, 10 Aug 2023 00:45:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTto7-0005bB-T7 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTto7-0001oK-SL for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTto7-00013T-RD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Yzs0ehMrwxTqcOGePuq+UNFT3o58TP58W0FwXVfA0qQ=; b=G9CQfDOmXjrSP/GgugXCFZuQLX 90hh2p3Y5gd/SPVv1LJPyRCM1sHlNNwhc/xf9hObrEVc37owfYUUArHvqTBC94vh+vZeHir25z5ZF u8OLS+w/A5Kyfk9fusdqxugiPauay2NJXVwHl7x2mdC8diU/FFLIMfKrGpVsgzFkrv50=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Rename struct cpu_policy to struct old_cpuid_policy Message-Id: Date: Thu, 10 Aug 2023 00:45:43 +0000 commit 18bd78af8d0e1d185bf4e1e7d7712aba528ba8f2 Author: Andrew Cooper AuthorDate: Tue Mar 28 20:31:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86: Rename struct cpu_policy to struct old_cpuid_policy We want to merge struct cpuid_policy and struct msr_policy together, and the result wants to be called struct cpu_policy. The current struct cpu_policy, being a pair of pointers, isn't terribly useful. Rename the type to struct old_cpu_policy, but it will disappear entirely once the merge is complete. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c2ec94c370f211d73f336ccfbdb32499f1b05f82) --- tools/tests/cpu-policy/test-cpu-policy.c | 4 ++-- xen/arch/x86/domctl.c | 4 ++-- xen/arch/x86/sysctl.c | 4 ++-- xen/include/asm-x86/cpuid.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 6 +++--- xen/lib/x86/policy.c | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 0fa209f1ea..d8af5581ab 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -585,7 +585,7 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { @@ -637,7 +637,7 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct cpu_policy sys = { + struct old_cpu_policy sys = { &t->host_cpuid, &t->host_msr, }, new = { diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 8dc84796b9..77e09a3295 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -50,8 +50,8 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct cpu_policy new = {}; - const struct cpu_policy *sys = is_pv_domain(d) + struct old_cpu_policy new = {}; + const struct old_cpu_policy *sys = is_pv_domain(d) ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 2e0edc6aff..60604429e2 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -33,7 +33,7 @@ #include #include -const struct cpu_policy system_policies[6] = { +const struct old_cpu_policy system_policies[6] = { [ XEN_SYSCTL_cpu_policy_raw ] = { &raw_cpuid_policy, &raw_msr_policy, @@ -389,7 +389,7 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct cpu_policy *policy; + const struct old_cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 9c3637549a..49b3128f06 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -51,7 +51,7 @@ extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, pv_max_cpuid_policy, pv_def_cpuid_policy, hvm_max_cpuid_policy, hvm_def_cpuid_policy; -extern const struct cpu_policy system_policies[]; +extern const struct old_cpu_policy system_policies[]; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 5a2c4c7b2d..3a5300d107 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -5,7 +5,7 @@ #include #include -struct cpu_policy +struct old_cpu_policy { struct cpuid_policy *cpuid; struct msr_policy *msr; @@ -33,8 +33,8 @@ struct cpu_policy_errors * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f6cea4e2f9..2975711d7c 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct cpu_policy *host, - const struct cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, + const struct old_cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:45:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:45:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581714.910971 (Exim 4.92) (envelope-from ) id 1qTtoJ-0005e8-Bt; Thu, 10 Aug 2023 00:45:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581714.910971; Thu, 10 Aug 2023 00:45:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoJ-0005e0-8v; Thu, 10 Aug 2023 00:45:55 +0000 Received: by outflank-mailman (input) for mailman id 581714; Thu, 10 Aug 2023 00:45:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoI-0005ds-07 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoH-0001oS-VY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtoH-000147-Us for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:45:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=q8uQ8I4b/Q8bQXXtgPHppRbrxadC5JDYlEGVQvpeLmg=; b=4zkuzQ/hV1D0ZRiMl5DtgpgB+5 aWIPW/JhjtuRVxkc7l/wADLXkiW7PEVeVVwJhKbGRgARThhQtrg01y9e5U/mCfuvn0SlIPmFmJEji gHH/uUGE7pCArxcle5Nnhdz8niIdlb8aKF/IzgyuZNmquJNLHQDh5JGB6aJ3Hc6/VLFo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields Message-Id: Date: Thu, 10 Aug 2023 00:45:53 +0000 commit 5a69f12533db66bc1eb643be67139769b2b0a95e Author: Andrew Cooper AuthorDate: Tue Mar 28 20:48:29 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:39 2023 +0100 x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields These weren't great names to begin with, and using {leaves,msrs} matches up better with the existing nr_{leaves,msr} parameters anyway. Furthermore, by renaming these fields we can get away with using some #define trickery to avoid the struct {cpuid,msr}_policy merge needing to happen in a single changeset. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 21e3ef57e0406b6b9a783f721f29df8f91a00f99) xen: Correct comments after renaming xen_{dom,sys}ctl_cpu_policy fields Fixes: 21e3ef57e040 ("x86: Rename {domctl,sysctl}.cpu_policy.{cpuid,msr}_policy fields") Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné (cherry picked from commit 6e06d229d538ea51b92dc189546c522f5e903511) --- tools/libs/guest/xg_cpuid_x86.c | 12 ++++++------ xen/arch/x86/domctl.c | 12 ++++++------ xen/arch/x86/sysctl.c | 8 ++++---- xen/include/public/domctl.h | 10 ++++------ xen/include/public/sysctl.h | 14 ++++++-------- 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index ead547f302..0b35c8e3b0 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -148,9 +148,9 @@ int xc_get_system_cpu_policy(xc_interface *xch, uint32_t index, sysctl.cmd = XEN_SYSCTL_get_cpu_policy; sysctl.u.cpu_policy.index = index; sysctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(sysctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(sysctl.u.cpu_policy.leaves, leaves); sysctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(sysctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(sysctl.u.cpu_policy.msrs, msrs); ret = do_sysctl(xch, &sysctl); @@ -186,9 +186,9 @@ int xc_get_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_get_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = *nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = *nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); ret = do_domctl(xch, &domctl); @@ -235,9 +235,9 @@ int xc_set_domain_cpu_policy(xc_interface *xch, uint32_t domid, domctl.cmd = XEN_DOMCTL_set_cpu_policy; domctl.domain = domid; domctl.u.cpu_policy.nr_leaves = nr_leaves; - set_xen_guest_handle(domctl.u.cpu_policy.cpuid_policy, leaves); + set_xen_guest_handle(domctl.u.cpu_policy.leaves, leaves); domctl.u.cpu_policy.nr_msrs = nr_msrs; - set_xen_guest_handle(domctl.u.cpu_policy.msr_policy, msrs); + set_xen_guest_handle(domctl.u.cpu_policy.msrs, msrs); domctl.u.cpu_policy.err_leaf = -1; domctl.u.cpu_policy.err_subleaf = -1; domctl.u.cpu_policy.err_msr = -1; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 77e09a3295..7878588def 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -64,10 +64,10 @@ static int update_domain_cpu_policy(struct domain *d, /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->cpuid_policy, xdpc->nr_leaves, + new.cpuid, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msr_policy, xdpc->nr_msrs, &err.msr)) ) + new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ @@ -1326,20 +1326,20 @@ long arch_do_domctl( case XEN_DOMCTL_get_cpu_policy: /* Process the CPUID leaves. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( d->arch.cpuid, - domctl->u.cpu_policy.cpuid_policy, + domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; /* Process the MSR entries. */ - if ( guest_handle_is_null(domctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( d->arch.msr, - domctl->u.cpu_policy.msr_policy, + domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 60604429e2..67dbc9166d 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -409,11 +409,11 @@ long arch_do_sysctl( } /* Process the CPUID leaves. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.cpuid_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( policy->cpuid, - sysctl->u.cpu_policy.cpuid_policy, + sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -425,11 +425,11 @@ long arch_do_sysctl( } /* Process the MSR entries. */ - if ( guest_handle_is_null(sysctl->u.cpu_policy.msr_policy) ) + if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( policy->msr, - sysctl->u.cpu_policy.msr_policy, + sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 4dbf107785..e3f27a7f9d 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -678,12 +678,10 @@ struct xen_domctl_set_target { * Query or set the CPUID and MSR policies for a specific domain. */ struct xen_domctl_cpu_policy { - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy'. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy' */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* IN/OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* IN/OUT */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves' */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs' */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* IN/OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* IN/OUT */ /* * OUT, set_policy only. Written in some (but not all) error cases to diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h index 27c310770f..c356098635 100644 --- a/xen/include/public/sysctl.h +++ b/xen/include/public/sysctl.h @@ -1052,15 +1052,13 @@ struct xen_sysctl_cpu_policy { #define XEN_SYSCTL_cpu_policy_pv_default 4 #define XEN_SYSCTL_cpu_policy_hvm_default 5 uint32_t index; /* IN: Which policy to query? */ - uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to - * 'cpuid_policy', or the maximum number of leaves - * if the guest handle is NULL. */ - uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to - * 'msr_policy', or the maximum number of MSRs if - * the guest handle is NULL. */ + uint32_t nr_leaves; /* IN/OUT: Number of leaves in/written to 'leaves', + * or the max number if 'leaves' is NULL. */ + uint32_t nr_msrs; /* IN/OUT: Number of MSRs in/written to 'msrs', or + * the max number of if 'msrs' is NULL. */ uint32_t _rsvd; /* Must be zero. */ - XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_policy; /* OUT */ - XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_policy; /* OUT */ + XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) leaves; /* OUT */ + XEN_GUEST_HANDLE_64(xen_msr_entry_t) msrs; /* OUT */ }; typedef struct xen_sysctl_cpu_policy xen_sysctl_cpu_policy_t; DEFINE_XEN_GUEST_HANDLE(xen_sysctl_cpu_policy_t); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581715.910975 (Exim 4.92) (envelope-from ) id 1qTtoT-0005gn-Di; Thu, 10 Aug 2023 00:46:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581715.910975; Thu, 10 Aug 2023 00:46:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoT-0005gg-Ab; Thu, 10 Aug 2023 00:46:05 +0000 Received: by outflank-mailman (input) for mailman id 581715; Thu, 10 Aug 2023 00:46:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoS-0005gS-3L for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoS-0001op-2V for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtoS-00014s-1m for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zwzmX5oRt8uClJo69nsibT9Tx+PReYPfbsuB96JtTuI=; b=dhl5tlETYP4f6crpiizNU9xxrR kDC0uR2CePVZpzYjXaB0+iA39ajh3RUzD8d2GaNz/qK7oEN0SZScjhR1oudjfF9sqcnFaluuIW9iI I4rM/OUcLR2peEZZAMPPuIxT4qhar3qlFixlq5W8EO/3tzEgOzj4IiL6WuAvyYccxT9w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Rename struct cpuid_policy to struct cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:46:04 +0000 commit 8b5a89b5038bff27f3881bb8d82b689a1a455a8d Author: Andrew Cooper AuthorDate: Tue Mar 28 18:55:19 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Rename struct cpuid_policy to struct cpu_policy Also merge lib/x86/cpuid.h entirely into lib/x86/cpu-policy.h Use a temporary define to make struct cpuid_policy still work. There's one forward declaration of struct cpuid_policy in tools/tests/x86_emulator/x86-emulate.h that isn't covered by the define, and it's easier to rename that now than to rearrange the includes. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 743e530380a007774017df9dc2d8cb0659040ee3) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 2 +- tools/fuzz/x86_instruction_emulator/Makefile | 2 +- tools/tests/x86_emulator/Makefile | 2 +- tools/tests/x86_emulator/x86-emulate.h | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 2 +- xen/include/asm-x86/cpuid.h | 1 - xen/include/xen/lib/x86/cpu-policy.h | 463 +++++++++++++++++++++++++- xen/include/xen/lib/x86/cpuid.h | 475 --------------------------- xen/lib/x86/cpuid.c | 2 +- 9 files changed, 468 insertions(+), 483 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 79a849a044..7ebe8ee7c3 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 1a6dbf94e1..2284887761 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -28,7 +28,7 @@ GCOV_FLAGS := --coverage x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) # x86-emulate.c will be implicit for both diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 7b07c31bbd..bd82598f97 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -286,7 +286,7 @@ HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH)) x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\ x86-vendors.h x86-defns.h msr-index.h) \ $(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \ - cpuid.h cpuid-autogen.h) + cpu-policy.h cpuid-autogen.h) x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h $(x86.h) x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o: %.o: %.c $(x86_emulate.h) diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index e1a2aaef68..3f2f6a5c2e 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -68,7 +68,7 @@ #define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63)) extern uint32_t mxcsr_mask; -extern struct cpuid_policy cp; +extern struct cpu_policy cp; #define MMAP_SZ 16384 bool emul_test_init(void); diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index d8fb3a9909..ce8226bd4c 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,7 +23,7 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ -#include +#include #define MAX_INST_LEN 15 diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 49b3128f06..d418e8100d 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -9,7 +9,6 @@ #include #include -#include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 3a5300d107..666505964d 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -2,9 +2,342 @@ #ifndef XEN_LIB_X86_POLICIES_H #define XEN_LIB_X86_POLICIES_H -#include +#include #include +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ + +struct cpuid_leaf +{ + uint32_t a, b, c, d; +}; + +/* + * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard + * register, and are unable to cope with spilling it. This results in a + * rather cryptic error: + * error: inconsistent operand constraints in an ‘asm’ + * + * In affected situations, work around the issue by using a separate register + * to hold the the %rBX output, and xchg twice to leave %rBX preserved around + * the asm() statement. + */ +#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) +# define XCHG_BX "xchg %%ebx, %[bx];" +# define BX_CON [bx] "=&r" +#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ + defined(__x86_64__) && (defined(__code_model_medium__) || \ + defined(__code_model_large__)) +# define XCHG_BX "xchg %%rbx, %q[bx];" +# define BX_CON [bx] "=&r" +#else +# define XCHG_BX "" +# define BX_CON "=&b" +#endif + +static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) + : "a" (leaf) ); +} + +static inline void cpuid_count_leaf( + uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) +{ + asm ( XCHG_BX + "cpuid;" + XCHG_BX + : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) + : "a" (leaf), "c" (subleaf) ); +} + +#undef BX_CON +#undef XCHG + +/** + * Given the vendor id from CPUID leaf 0, look up Xen's internal integer + * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. + */ +unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); + +/** + * Given Xen's internal vendor ID, return a string suitable for printing. + * Returns "Unknown" for any unrecognised ID. + */ +const char *x86_cpuid_vendor_to_str(unsigned int vendor); + +#define CPUID_GUEST_NR_BASIC (0xdu + 1) +#define CPUID_GUEST_NR_CACHE (5u + 1) +#define CPUID_GUEST_NR_FEAT (2u + 1) +#define CPUID_GUEST_NR_TOPO (1u + 1) +#define CPUID_GUEST_NR_XSTATE (62u + 1) +#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) +#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) +#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ + CPUID_GUEST_NR_EXTD_AMD) + +/* + * Maximum number of leaves a struct cpu_policy turns into when serialised for + * interaction with the toolstack. (Sum of all leaves in each union, less the + * entries in basic which sub-unions hang off of.) + */ +#define CPUID_MAX_SERIALISED_LEAVES \ + (CPUID_GUEST_NR_BASIC + \ + CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ + CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ + CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ + CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ + CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) + +struct cpu_policy +{ +#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) +#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) +#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x + + /* Basic leaves: 0x000000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; + struct { + /* Leaf 0x0 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x1 - Family/model/stepping and features. */ + uint32_t raw_fms; + uint8_t :8, /* Brand ID. */ + clflush_size, /* Number of 8-byte blocks per cache line. */ + lppp, /* Logical processors per package. */ + apic_id; /* Initial APIC ID. */ + union { + uint32_t _1c; + struct { DECL_BITFIELD(1c); }; + }; + union { + uint32_t _1d; + struct { DECL_BITFIELD(1d); }; + }; + + /* Leaf 0x2 - TLB/Cache/Prefetch. */ + uint8_t l2_nr_queries; /* Documented as fixed to 1. */ + uint8_t l2_desc[15]; + + uint64_t :64, :64; /* Leaf 0x3 - PSN. */ + uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ + uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ + uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ + uint64_t :64, :64; /* Leaf 0x8 - rsvd */ + uint64_t :64, :64; /* Leaf 0x9 - DCA */ + + /* Leaf 0xa - Intel PMU. */ + uint8_t pmu_version, _pmu[15]; + + uint64_t :64, :64; /* Leaf 0xb - Topology. */ + uint64_t :64, :64; /* Leaf 0xc - rsvd */ + uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ + }; + } basic; + + /* Structured cache leaf: 0x00000004[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; + struct cpuid_cache_leaf { + uint32_t /* a */ type:5, level:3; + bool self_init:1, fully_assoc:1; + uint32_t :4, threads_per_cache:12, cores_per_package:6; + uint32_t /* b */ line_size:12, partitions:10, ways:10; + uint32_t /* c */ sets; + bool /* d */ wbinvd:1, inclusive:1, complex:1; + } subleaf[CPUID_GUEST_NR_CACHE]; + } cache; + + /* Structured feature leaf: 0x00000007[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; + struct { + /* Subleaf 0. */ + uint32_t max_subleaf; + union { + uint32_t _7b0; + struct { DECL_BITFIELD(7b0); }; + }; + union { + uint32_t _7c0; + struct { DECL_BITFIELD(7c0); }; + }; + union { + uint32_t _7d0; + struct { DECL_BITFIELD(7d0); }; + }; + + /* Subleaf 1. */ + union { + uint32_t _7a1; + struct { DECL_BITFIELD(7a1); }; + }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; + union { + uint32_t _7c1; + struct { DECL_BITFIELD(7c1); }; + }; + union { + uint32_t _7d1; + struct { DECL_BITFIELD(7d1); }; + }; + + /* Subleaf 2. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t _7d2; + struct { DECL_BITFIELD(7d2); }; + }; + }; + } feat; + + /* Extended topology enumeration: 0x0000000B[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; + struct cpuid_topo_leaf { + uint32_t id_shift:5, :27; + uint16_t nr_logical, :16; + uint8_t level, type, :8, :8; + uint32_t x2apic_id; + } subleaf[CPUID_GUEST_NR_TOPO]; + } topo; + + /* Xstate feature leaf: 0x0000000D[xx] */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; + + struct { + /* Subleaf 0. */ + uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; + + /* Subleaf 1. */ + union { + uint32_t Da1; + struct { DECL_BITFIELD(Da1); }; + }; + uint32_t /* b */:32, xss_low, xss_high; + }; + + /* Per-component common state. Valid for i >= 2. */ + struct { + uint32_t size, offset; + bool xss:1, align:1; + uint32_t _res_d; + } comp[CPUID_GUEST_NR_XSTATE]; + } xstate; + + /* Extended leaves: 0x800000xx */ + union { + struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; + struct { + /* Leaf 0x80000000 - Max and vendor. */ + uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; + + /* Leaf 0x80000001 - Family/model/stepping and features. */ + uint32_t raw_fms, /* b */:32; + union { + uint32_t e1c; + struct { DECL_BITFIELD(e1c); }; + }; + union { + uint32_t e1d; + struct { DECL_BITFIELD(e1d); }; + }; + + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* Brand string. */ + uint64_t :64, :64; /* L1 cache/TLB. */ + uint64_t :64, :64; /* L2/3 cache/TLB. */ + + /* Leaf 0x80000007 - Advanced Power Management. */ + uint32_t /* a */:32, /* b */:32, /* c */:32; + union { + uint32_t e7d; + struct { DECL_BITFIELD(e7d); }; + }; + + /* Leaf 0x80000008 - Misc addr/feature info. */ + uint8_t maxphysaddr, maxlinaddr, :8, :8; + union { + uint32_t e8b; + struct { DECL_BITFIELD(e8b); }; + }; + uint32_t nc:8, :4, apic_id_size:4, :16; + uint32_t /* d */:32; + + uint64_t :64, :64; /* Leaf 0x80000009. */ + uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ + uint64_t :64, :64; /* Leaf 0x8000000b. */ + uint64_t :64, :64; /* Leaf 0x8000000c. */ + uint64_t :64, :64; /* Leaf 0x8000000d. */ + uint64_t :64, :64; /* Leaf 0x8000000e. */ + uint64_t :64, :64; /* Leaf 0x8000000f. */ + uint64_t :64, :64; /* Leaf 0x80000010. */ + uint64_t :64, :64; /* Leaf 0x80000011. */ + uint64_t :64, :64; /* Leaf 0x80000012. */ + uint64_t :64, :64; /* Leaf 0x80000013. */ + uint64_t :64, :64; /* Leaf 0x80000014. */ + uint64_t :64, :64; /* Leaf 0x80000015. */ + uint64_t :64, :64; /* Leaf 0x80000016. */ + uint64_t :64, :64; /* Leaf 0x80000017. */ + uint64_t :64, :64; /* Leaf 0x80000018. */ + uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ + uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ + uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ + uint64_t :64, :64; /* Leaf 0x8000001c. */ + uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ + uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ + uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ + uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ + + /* Leaf 0x80000021 - Extended Feature 2 */ + union { + uint32_t e21a; + struct { DECL_BITFIELD(e21a); }; + }; + uint32_t /* b */:32, /* c */:32, /* d */:32; + }; + } extd; + +#undef __DECL_BITFIELD +#undef _DECL_BITFIELD +#undef DECL_BITFIELD + + /* Toolstack selected Hypervisor max_leaf (if non-zero). */ + uint8_t hv_limit, hv2_limit; + + /* Value calculated from raw data above. */ + uint8_t x86_vendor; +}; + +/* Temporary */ +#define cpuid_policy cpu_policy + struct old_cpu_policy { struct cpuid_policy *cpuid; @@ -19,6 +352,134 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } +/* Fill in a featureset bitmap from a CPUID policy. */ +static inline void cpuid_policy_to_featureset( + const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +/* Fill in a CPUID policy from a featureset bitmap. */ +static inline void cpuid_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + +static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +{ + return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; +} + +static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +{ + uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; + + return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; +} + +const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); + +/** + * Recalculate the content in a CPUID policy which is derived from raw data. + */ +void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); + +/** + * Fill a CPUID policy using the native CPUID instruction. + * + * No sanitisation is performed, but synthesised values are calculated. + * Values may be influenced by a hypervisor or from masking/faulting + * configuration. + */ +void x86_cpuid_policy_fill_native(struct cpuid_policy *p); + +/** + * Clear leaf data beyond the policies max leaf/subleaf settings. + * + * Policy serialisation purposefully omits out-of-range leaves, because there + * are a large number of them due to vendor differences. However, when + * constructing new policies (e.g. levelling down), it is possible to end up + * with out-of-range leaves with stale content in them. This helper clears + * them. + */ +void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); + +#ifdef __XEN__ +#include +typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +#else +#include +typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +#endif + +/** + * Serialise a cpuid_policy object into an array of cpuid leaves. + * + * @param policy The cpuid_policy to serialise. + * @param leaves The array of leaves to serialise into. + * @param nr_entries The number of entries in 'leaves'. + * @returns -errno + * + * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the + * leaves array is too short. On success, nr_entries is updated with the + * actual number of leaves written. + */ +int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, + cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); + +/** + * Unserialise a cpuid_policy object from an array of cpuid leaves. + * + * @param policy The cpuid_policy to unserialise into. + * @param leaves The array of leaves to unserialise from. + * @param nr_entries The number of entries in 'leaves'. + * @param err_leaf Optional hint for error diagnostics. + * @param err_subleaf Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an + * incoming leaf is out of range of cpuid_policy, in which case the optional + * err_* pointers will identify the out-of-range indicies. + * + * No content validation of in-range leaves is performed. Synthesised data is + * recalculated. + */ +int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, + const cpuid_leaf_buffer_t leaves, + uint32_t nr_entries, uint32_t *err_leaf, + uint32_t *err_subleaf); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/cpuid.h b/xen/include/xen/lib/x86/cpuid.h deleted file mode 100644 index fa98b371ee..0000000000 --- a/xen/include/xen/lib/x86/cpuid.h +++ /dev/null @@ -1,475 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_CPUID_H -#define XEN_LIB_X86_CPUID_H - -#include - -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ - -struct cpuid_leaf -{ - uint32_t a, b, c, d; -}; - -/* - * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard - * register, and are unable to cope with spilling it. This results in a - * rather cryptic error: - * error: inconsistent operand constraints in an ‘asm’ - * - * In affected situations, work around the issue by using a separate register - * to hold the the %rBX output, and xchg twice to leave %rBX preserved around - * the asm() statement. - */ -#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__) -# define XCHG_BX "xchg %%ebx, %[bx];" -# define BX_CON [bx] "=&r" -#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \ - defined(__x86_64__) && (defined(__code_model_medium__) || \ - defined(__code_model_large__)) -# define XCHG_BX "xchg %%rbx, %q[bx];" -# define BX_CON [bx] "=&r" -#else -# define XCHG_BX "" -# define BX_CON "=&b" -#endif - -static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d) - : "a" (leaf) ); -} - -static inline void cpuid_count_leaf( - uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l) -{ - asm ( XCHG_BX - "cpuid;" - XCHG_BX - : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d) - : "a" (leaf), "c" (subleaf) ); -} - -#undef BX_CON -#undef XCHG - -/** - * Given the vendor id from CPUID leaf 0, look up Xen's internal integer - * vendor ID. Returns X86_VENDOR_UNKNOWN for any unknown vendor. - */ -unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx); - -/** - * Given Xen's internal vendor ID, return a string suitable for printing. - * Returns "Unknown" for any unrecognised ID. - */ -const char *x86_cpuid_vendor_to_str(unsigned int vendor); - -#define CPUID_GUEST_NR_BASIC (0xdu + 1) -#define CPUID_GUEST_NR_CACHE (5u + 1) -#define CPUID_GUEST_NR_FEAT (2u + 1) -#define CPUID_GUEST_NR_TOPO (1u + 1) -#define CPUID_GUEST_NR_XSTATE (62u + 1) -#define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1) -#define CPUID_GUEST_NR_EXTD_AMD (0x21u + 1) -#define CPUID_GUEST_NR_EXTD MAX(CPUID_GUEST_NR_EXTD_INTEL, \ - CPUID_GUEST_NR_EXTD_AMD) - -/* - * Maximum number of leaves a struct cpuid_policy turns into when serialised - * for interaction with the toolstack. (Sum of all leaves in each union, less - * the entries in basic which sub-unions hang off of.) - */ -#define CPUID_MAX_SERIALISED_LEAVES \ - (CPUID_GUEST_NR_BASIC + \ - CPUID_GUEST_NR_FEAT - !!CPUID_GUEST_NR_FEAT + \ - CPUID_GUEST_NR_CACHE - !!CPUID_GUEST_NR_CACHE + \ - CPUID_GUEST_NR_TOPO - !!CPUID_GUEST_NR_TOPO + \ - CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ - CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) - -struct cpuid_policy -{ -#define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) -#define _DECL_BITFIELD(x) __DECL_BITFIELD(x) -#define __DECL_BITFIELD(x) CPUID_BITFIELD_ ## x - - /* Basic leaves: 0x000000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_BASIC]; - struct { - /* Leaf 0x0 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t raw_fms; - uint8_t :8, /* Brand ID. */ - clflush_size, /* Number of 8-byte blocks per cache line. */ - lppp, /* Logical processors per package. */ - apic_id; /* Initial APIC ID. */ - union { - uint32_t _1c; - struct { DECL_BITFIELD(1c); }; - }; - union { - uint32_t _1d; - struct { DECL_BITFIELD(1d); }; - }; - - /* Leaf 0x2 - TLB/Cache/Prefetch. */ - uint8_t l2_nr_queries; /* Documented as fixed to 1. */ - uint8_t l2_desc[15]; - - uint64_t :64, :64; /* Leaf 0x3 - PSN. */ - uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ - uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ - uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ - uint64_t :64, :64; /* Leaf 0x8 - rsvd */ - uint64_t :64, :64; /* Leaf 0x9 - DCA */ - - /* Leaf 0xa - Intel PMU. */ - uint8_t pmu_version, _pmu[15]; - - uint64_t :64, :64; /* Leaf 0xb - Topology. */ - uint64_t :64, :64; /* Leaf 0xc - rsvd */ - uint64_t :64, :64; /* Leaf 0xd - XSTATE. */ - }; - } basic; - - /* Structured cache leaf: 0x00000004[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE]; - struct cpuid_cache_leaf { - uint32_t /* a */ type:5, level:3; - bool self_init:1, fully_assoc:1; - uint32_t :4, threads_per_cache:12, cores_per_package:6; - uint32_t /* b */ line_size:12, partitions:10, ways:10; - uint32_t /* c */ sets; - bool /* d */ wbinvd:1, inclusive:1, complex:1; - } subleaf[CPUID_GUEST_NR_CACHE]; - } cache; - - /* Structured feature leaf: 0x00000007[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT]; - struct { - /* Subleaf 0. */ - uint32_t max_subleaf; - union { - uint32_t _7b0; - struct { DECL_BITFIELD(7b0); }; - }; - union { - uint32_t _7c0; - struct { DECL_BITFIELD(7c0); }; - }; - union { - uint32_t _7d0; - struct { DECL_BITFIELD(7d0); }; - }; - - /* Subleaf 1. */ - union { - uint32_t _7a1; - struct { DECL_BITFIELD(7a1); }; - }; - union { - uint32_t _7b1; - struct { DECL_BITFIELD(7b1); }; - }; - union { - uint32_t _7c1; - struct { DECL_BITFIELD(7c1); }; - }; - union { - uint32_t _7d1; - struct { DECL_BITFIELD(7d1); }; - }; - - /* Subleaf 2. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t _7d2; - struct { DECL_BITFIELD(7d2); }; - }; - }; - } feat; - - /* Extended topology enumeration: 0x0000000B[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_TOPO]; - struct cpuid_topo_leaf { - uint32_t id_shift:5, :27; - uint16_t nr_logical, :16; - uint8_t level, type, :8, :8; - uint32_t x2apic_id; - } subleaf[CPUID_GUEST_NR_TOPO]; - } topo; - - /* Xstate feature leaf: 0x0000000D[xx] */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_XSTATE]; - - struct { - /* Subleaf 0. */ - uint32_t xcr0_low, /* b */:32, max_size, xcr0_high; - - /* Subleaf 1. */ - union { - uint32_t Da1; - struct { DECL_BITFIELD(Da1); }; - }; - uint32_t /* b */:32, xss_low, xss_high; - }; - - /* Per-component common state. Valid for i >= 2. */ - struct { - uint32_t size, offset; - bool xss:1, align:1; - uint32_t _res_d; - } comp[CPUID_GUEST_NR_XSTATE]; - } xstate; - - /* Extended leaves: 0x800000xx */ - union { - struct cpuid_leaf raw[CPUID_GUEST_NR_EXTD]; - struct { - /* Leaf 0x80000000 - Max and vendor. */ - uint32_t max_leaf, vendor_ebx, vendor_ecx, vendor_edx; - - /* Leaf 0x80000001 - Family/model/stepping and features. */ - uint32_t raw_fms, /* b */:32; - union { - uint32_t e1c; - struct { DECL_BITFIELD(e1c); }; - }; - union { - uint32_t e1d; - struct { DECL_BITFIELD(e1d); }; - }; - - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* Brand string. */ - uint64_t :64, :64; /* L1 cache/TLB. */ - uint64_t :64, :64; /* L2/3 cache/TLB. */ - - /* Leaf 0x80000007 - Advanced Power Management. */ - uint32_t /* a */:32, /* b */:32, /* c */:32; - union { - uint32_t e7d; - struct { DECL_BITFIELD(e7d); }; - }; - - /* Leaf 0x80000008 - Misc addr/feature info. */ - uint8_t maxphysaddr, maxlinaddr, :8, :8; - union { - uint32_t e8b; - struct { DECL_BITFIELD(e8b); }; - }; - uint32_t nc:8, :4, apic_id_size:4, :16; - uint32_t /* d */:32; - - uint64_t :64, :64; /* Leaf 0x80000009. */ - uint64_t :64, :64; /* Leaf 0x8000000a - SVM rev and features. */ - uint64_t :64, :64; /* Leaf 0x8000000b. */ - uint64_t :64, :64; /* Leaf 0x8000000c. */ - uint64_t :64, :64; /* Leaf 0x8000000d. */ - uint64_t :64, :64; /* Leaf 0x8000000e. */ - uint64_t :64, :64; /* Leaf 0x8000000f. */ - uint64_t :64, :64; /* Leaf 0x80000010. */ - uint64_t :64, :64; /* Leaf 0x80000011. */ - uint64_t :64, :64; /* Leaf 0x80000012. */ - uint64_t :64, :64; /* Leaf 0x80000013. */ - uint64_t :64, :64; /* Leaf 0x80000014. */ - uint64_t :64, :64; /* Leaf 0x80000015. */ - uint64_t :64, :64; /* Leaf 0x80000016. */ - uint64_t :64, :64; /* Leaf 0x80000017. */ - uint64_t :64, :64; /* Leaf 0x80000018. */ - uint64_t :64, :64; /* Leaf 0x80000019 - TLB 1GB Identifiers. */ - uint64_t :64, :64; /* Leaf 0x8000001a - Performance related info. */ - uint64_t :64, :64; /* Leaf 0x8000001b - IBS feature information. */ - uint64_t :64, :64; /* Leaf 0x8000001c. */ - uint64_t :64, :64; /* Leaf 0x8000001d - Cache properties. */ - uint64_t :64, :64; /* Leaf 0x8000001e - Extd APIC/Core/Node IDs. */ - uint64_t :64, :64; /* Leaf 0x8000001f - AMD Secure Encryption. */ - uint64_t :64, :64; /* Leaf 0x80000020 - Platform QoS. */ - - /* Leaf 0x80000021 - Extended Feature 2 */ - union { - uint32_t e21a; - struct { DECL_BITFIELD(e21a); }; - }; - uint32_t /* b */:32, /* c */:32, /* d */:32; - }; - } extd; - -#undef __DECL_BITFIELD -#undef _DECL_BITFIELD -#undef DECL_BITFIELD - - /* Toolstack selected Hypervisor max_leaf (if non-zero). */ - uint8_t hv_limit, hv2_limit; - - /* Value calculated from raw data above. */ - uint8_t x86_vendor; -}; - -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} - -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} - -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) -{ - return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; -} - -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) -{ - uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; - - return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; -} - -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); - -/** - * Recalculate the content in a CPUID policy which is derived from raw data. - */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); - -/** - * Fill a CPUID policy using the native CPUID instruction. - * - * No sanitisation is performed, but synthesised values are calculated. - * Values may be influenced by a hypervisor or from masking/faulting - * configuration. - */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); - -/** - * Clear leaf data beyond the policies max leaf/subleaf settings. - * - * Policy serialisation purposefully omits out-of-range leaves, because there - * are a large number of them due to vendor differences. However, when - * constructing new policies (e.g. levelling down), it is possible to end up - * with out-of-range leaves with stale content in them. This helper clears - * them. - */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; -#else -#include -typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; -#endif - -/** - * Serialise a cpuid_policy object into an array of cpuid leaves. - * - * @param policy The cpuid_policy to serialise. - * @param leaves The array of leaves to serialise into. - * @param nr_entries The number of entries in 'leaves'. - * @returns -errno - * - * Writes at most CPUID_MAX_SERIALISED_LEAVES. May fail with -ENOBUFS if the - * leaves array is too short. On success, nr_entries is updated with the - * actual number of leaves written. - */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, - cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); - -/** - * Unserialise a cpuid_policy object from an array of cpuid leaves. - * - * @param policy The cpuid_policy to unserialise into. - * @param leaves The array of leaves to unserialise from. - * @param nr_entries The number of entries in 'leaves'. - * @param err_leaf Optional hint for error diagnostics. - * @param err_subleaf Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional - * err_* pointers will identify the out-of-range indicies. - * - * No content validation of in-range leaves is performed. Synthesised data is - * recalculated. - */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, - const cpuid_leaf_buffer_t leaves, - uint32_t nr_entries, uint32_t *err_leaf, - uint32_t *err_subleaf); - -#endif /* !XEN_LIB_X86_CPUID_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 8eb88314f5..e81f76c779 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581716.910979 (Exim 4.92) (envelope-from ) id 1qTtod-0005jv-Gw; Thu, 10 Aug 2023 00:46:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581716.910979; Thu, 10 Aug 2023 00:46:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtod-0005jm-EH; Thu, 10 Aug 2023 00:46:15 +0000 Received: by outflank-mailman (input) for mailman id 581716; Thu, 10 Aug 2023 00:46:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoc-0005jZ-6O for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtoc-0001ow-5a for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtoc-00015H-4o for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=AG2GCTIKX6J19Hj/pqB78K/3v7H6xg0r0Yj1ZMkc6tQ=; b=DgO9136uTH0AM5vpMPT5fNLC/Z RnsVChP0wCYGjGB/YIYKfJrcFXBZ8LntJEIwDC84OWGHHzU8xutmfZwTBD6lb5ARg78pEDovr8/qU ZlpPJW3Nmiuh/bXss/vaoMfHH6mijVrY81YEm7pkZpsyehzEgUteWwtyuxoa1t5XwHMY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Merge struct msr_policy into struct cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:46:14 +0000 commit cb24798cac3e5257fc56dbf7382f60ae76c8c6f4 Author: Andrew Cooper AuthorDate: Tue Mar 28 21:24:20 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 03812da3754d550dd8cbee7289469069ea6f0073) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 1 - xen/include/asm-x86/msr.h | 3 +- xen/include/xen/lib/x86/cpu-policy.h | 81 ++++++++++++++++++++++- xen/include/xen/lib/x86/msr.h | 104 ------------------------------ xen/lib/x86/msr.c | 2 +- 5 files changed, 83 insertions(+), 108 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 7ebe8ee7c3..316eb0efe0 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -10,7 +10,6 @@ #include #include -#include #include static bool debug; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index ce4fe51afe..78b70d323e 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -6,8 +6,9 @@ #include #include #include +#include -#include +#include #include #include diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 666505964d..53fffca552 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -3,7 +3,6 @@ #define XEN_LIB_X86_POLICIES_H #include -#include #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -107,6 +106,9 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor); CPUID_GUEST_NR_XSTATE - !!CPUID_GUEST_NR_XSTATE + \ CPUID_GUEST_NR_EXTD + 2 /* hv_limit and hv2_limit */ ) +/* Maximum number of MSRs written when serialising a cpu_policy. */ +#define MSR_MAX_SERIALISED_ENTRIES 2 + struct cpu_policy { #define DECL_BITFIELD(word) _DECL_BITFIELD(FEATURESET_ ## word) @@ -324,6 +326,44 @@ struct cpu_policy }; } extd; + /* + * 0x000000ce - MSR_INTEL_PLATFORM_INFO + * + * This MSR is non-architectural, but for simplicy we allow it to be read + * unconditionally. CPUID Faulting support can be fully emulated for HVM + * guests so can be offered unconditionally, while support for PV guests + * is dependent on real hardware support. + */ + union { + uint32_t raw; + struct { + uint32_t :31; + bool cpuid_faulting:1; + }; + } platform_info; + + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -337,6 +377,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy struct old_cpu_policy { @@ -438,9 +479,11 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); #ifdef __XEN__ #include typedef XEN_GUEST_HANDLE_64(xen_cpuid_leaf_t) cpuid_leaf_buffer_t; +typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; #else #include typedef xen_cpuid_leaf_t cpuid_leaf_buffer_t[]; +typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** @@ -480,6 +523,42 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); +/** + * Serialise an msr_policy object into an array. + * + * @param policy The msr_policy to serialise. + * @param msrs The array of msrs to serialise into. + * @param nr_entries The number of entries in 'msrs'. + * @returns -errno + * + * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the + * buffer array is too short. On success, nr_entries is updated with the + * actual number of msrs written. + */ +int x86_msr_copy_to_buffer(const struct msr_policy *policy, + msr_entry_buffer_t msrs, uint32_t *nr_entries); + +/** + * Unserialise an msr_policy object from an array of msrs. + * + * @param policy The msr_policy object to unserialise into. + * @param msrs The array of msrs to unserialise from. + * @param nr_entries The number of entries in 'msrs'. + * @param err_msr Optional hint for error diagnostics. + * @returns -errno + * + * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons + * based on the content in an individual 'msrs' entry, including the MSR index + * not being valid in the policy, the flags field being nonzero, or if the + * value provided would truncate when stored in the policy. In such cases, + * the optional err_* pointer will identify the problematic MSR. + * + * No content validation is performed on the data stored in the policy object. + */ +int x86_msr_copy_from_buffer(struct msr_policy *policy, + const msr_entry_buffer_t msrs, uint32_t nr_entries, + uint32_t *err_msr); + /* * Calculate whether two policies are compatible. * diff --git a/xen/include/xen/lib/x86/msr.h b/xen/include/xen/lib/x86/msr.h deleted file mode 100644 index 48ba4a59c0..0000000000 --- a/xen/include/xen/lib/x86/msr.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Common data structures and functions consumed by hypervisor and toolstack */ -#ifndef XEN_LIB_X86_MSR_H -#define XEN_LIB_X86_MSR_H - -/* Maximum number of MSRs written when serialising msr_policy. */ -#define MSR_MAX_SERIALISED_ENTRIES 2 - -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy -{ - /* - * 0x000000ce - MSR_INTEL_PLATFORM_INFO - * - * This MSR is non-architectural, but for simplicy we allow it to be read - * unconditionally. CPUID Faulting support can be fully emulated for HVM - * guests so can be offered unconditionally, while support for PV guests - * is dependent on real hardware support. - */ - union { - uint32_t raw; - struct { - uint32_t :31; - bool cpuid_faulting:1; - }; - } platform_info; - - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - -#ifdef __XEN__ -#include -typedef XEN_GUEST_HANDLE_64(xen_msr_entry_t) msr_entry_buffer_t; -#else -#include -typedef xen_msr_entry_t msr_entry_buffer_t[]; -#endif - -/** - * Serialise an msr_policy object into an array. - * - * @param policy The msr_policy to serialise. - * @param msrs The array of msrs to serialise into. - * @param nr_entries The number of entries in 'msrs'. - * @returns -errno - * - * Writes at most MSR_MAX_SERIALISED_ENTRIES. May fail with -ENOBUFS if the - * buffer array is too short. On success, nr_entries is updated with the - * actual number of msrs written. - */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, - msr_entry_buffer_t msrs, uint32_t *nr_entries); - -/** - * Unserialise an msr_policy object from an array of msrs. - * - * @param policy The msr_policy object to unserialise into. - * @param msrs The array of msrs to unserialise from. - * @param nr_entries The number of entries in 'msrs'. - * @param err_msr Optional hint for error diagnostics. - * @returns -errno - * - * Reads at most MSR_MAX_SERIALISED_ENTRIES. May fail for a number of reasons - * based on the content in an individual 'msrs' entry, including the MSR index - * not being valid in the policy, the flags field being nonzero, or if the - * value provided would truncate when stored in the policy. In such cases, - * the optional err_* pointer will identify the problematic MSR. - * - * No content validation is performed on the data stored in the policy object. - */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, - const msr_entry_buffer_t msrs, uint32_t nr_entries, - uint32_t *err_msr); - -#endif /* !XEN_LIB_X86_MSR_H */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index 7d71e92a38..c4d885e7b5 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -1,6 +1,6 @@ #include "private.h" -#include +#include /* * Copy a single MSR into the provided msr_entry_buffer_t buffer, performing a -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581718.910983 (Exim 4.92) (envelope-from ) id 1qTton-0005mv-Ib; Thu, 10 Aug 2023 00:46:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581718.910983; Thu, 10 Aug 2023 00:46:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTton-0005mo-Fn; Thu, 10 Aug 2023 00:46:25 +0000 Received: by outflank-mailman (input) for mailman id 581718; Thu, 10 Aug 2023 00:46:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtom-0005me-A0 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtom-0001p5-8p for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtom-00015g-8B for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wp3n6ah1J0kZfWuYmsIoI7AXJFUfSpHSUI5WtgFpbBs=; b=JjkqeNHeWVXwvoqQ9pHgAAdqjG SQPXrFSHhW+uIbZuVmCBw7B331f0089nmO7X4TiYwQIWrA6SR1zkR4cJn3sP0Xa72GM8XCUR5qSDX pNx5nCCx/lK6DsGF9dD7HdU4z8fyzcz/zq4+90P+gUmAaqyD5MkAvNpgHrilAmXAS93g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Merge the system {cpuid,msr} policy objects Message-Id: Date: Thu, 10 Aug 2023 00:46:24 +0000 commit 48d296b57b2ca8335de45f306a93bd70b88227b3 Author: Andrew Cooper AuthorDate: Wed Mar 29 07:39:44 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Merge the system {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Introduce a new cpu-policy.{h,c} to be the new location for all policy handling logic. Place the combined objects in __ro_after_init, which is new since the original logic was written. As we're trying to phase out the use of struct old_cpu_policy entirely, rework update_domain_cpu_policy() to not pointer-chase through system_policies[]. This in turn allows system_policies[] in sysctl.c to become static and reduced in scope to XEN_SYSCTL_get_cpu_policy. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 6bc33366795d14a21a3244d0f3b63f7dccea87ef) --- xen/arch/x86/Makefile | 1 + xen/arch/x86/cpu-policy.c | 18 ++++++++++ xen/arch/x86/cpu/common.c | 4 ++- xen/arch/x86/cpuid.c | 66 ++++++++++++++++--------------------- xen/arch/x86/domctl.c | 17 +++++++--- xen/arch/x86/msr.c | 38 ++++++++------------- xen/arch/x86/sysctl.c | 71 +++++++++++++++------------------------- xen/include/asm-x86/cpu-policy.h | 14 ++++++++ xen/include/asm-x86/cpuid.h | 6 ---- xen/include/asm-x86/msr.h | 7 ---- 10 files changed, 116 insertions(+), 126 deletions(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 2211616cdb..9389501645 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -16,6 +16,7 @@ obj-y += bitops.o obj-bin-y += bzimage.init.o obj-bin-y += clear_page.o obj-bin-y += copy_page.o +obj-y += cpu-policy.o obj-y += cpuid.o obj-$(CONFIG_PV) += compat.o x86_64/compat.o obj-$(CONFIG_KEXEC) += crash.o diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c new file mode 100644 index 0000000000..e47fbeb04d --- /dev/null +++ b/xen/arch/x86/cpu-policy.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include + +#include + +#include + +struct cpu_policy __read_mostly raw_cpu_policy; +struct cpu_policy __read_mostly host_cpu_policy; +#ifdef CONFIG_PV +struct cpu_policy __read_mostly pv_max_cpu_policy; +struct cpu_policy __read_mostly pv_def_cpu_policy; +#endif +#ifdef CONFIG_HVM +struct cpu_policy __read_mostly hvm_max_cpu_policy; +struct cpu_policy __read_mostly hvm_def_cpu_policy; +#endif diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 7b93902585..8b5e32c78b 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -3,6 +3,8 @@ #include #include #include + +#include #include #include #include @@ -135,7 +137,7 @@ bool __init probe_cpuid_faulting(void) return false; if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0) - raw_msr_policy.platform_info.cpuid_faulting = + raw_cpu_policy.platform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING; if (rc || diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 795bbddef8..8bded8653b 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -141,17 +142,6 @@ static void zero_leaves(struct cpuid_leaf *l, memset(&l[first], 0, sizeof(*l) * (last - first + 1)); } -struct cpuid_policy __read_mostly raw_cpuid_policy, - __read_mostly host_cpuid_policy; -#ifdef CONFIG_PV -struct cpuid_policy __read_mostly pv_max_cpuid_policy; -struct cpuid_policy __read_mostly pv_def_cpuid_policy; -#endif -#ifdef CONFIG_HVM -struct cpuid_policy __read_mostly hvm_max_cpuid_policy; -struct cpuid_policy __read_mostly hvm_def_cpuid_policy; -#endif - static void sanitise_featureset(uint32_t *fs) { /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ @@ -343,7 +333,7 @@ static void recalculate_misc(struct cpuid_policy *p) static void __init calculate_raw_policy(void) { - struct cpuid_policy *p = &raw_cpuid_policy; + struct cpuid_policy *p = &raw_cpu_policy; x86_cpuid_policy_fill_native(p); @@ -353,10 +343,10 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct cpuid_policy *p = &host_cpuid_policy; + struct cpuid_policy *p = &host_cpu_policy; unsigned int max_extd_leaf; - *p = raw_cpuid_policy; + *p = raw_cpu_policy; p->basic.max_leaf = min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); @@ -448,17 +438,17 @@ static void __init guest_common_feature_adjustments(uint32_t *fs) * of IBRS by using the AMD feature bit. An administrator may wish for * performance reasons to offer IBPB without IBRS. */ - if ( host_cpuid_policy.feat.ibrsb ) + if ( host_cpu_policy.feat.ibrsb ) __set_bit(X86_FEATURE_IBPB, fs); } static void __init calculate_pv_max_policy(void) { - struct cpuid_policy *p = &pv_max_cpuid_policy; + struct cpuid_policy *p = &pv_max_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -485,11 +475,11 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { - struct cpuid_policy *p = &pv_def_cpuid_policy; + struct cpuid_policy *p = &pv_def_cpu_policy; uint32_t pv_featureset[FSCAPINTS]; unsigned int i; - *p = pv_max_cpuid_policy; + *p = pv_max_cpu_policy; cpuid_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) @@ -505,12 +495,12 @@ static void __init calculate_pv_def_policy(void) static void __init calculate_hvm_max_policy(void) { - struct cpuid_policy *p = &hvm_max_cpuid_policy; + struct cpuid_policy *p = &hvm_max_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = host_cpuid_policy; + *p = host_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -532,7 +522,7 @@ static void __init calculate_hvm_max_policy(void) * HVM guests are able if running in protected mode. */ if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpuid_policy.basic.sep ) + raw_cpu_policy.basic.sep ) __set_bit(X86_FEATURE_SEP, hvm_featureset); /* @@ -567,12 +557,12 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct cpuid_policy *p = &hvm_def_cpuid_policy; + struct cpuid_policy *p = &hvm_def_cpu_policy; uint32_t hvm_featureset[FSCAPINTS]; unsigned int i; const uint32_t *hvm_featuremask; - *p = hvm_max_cpuid_policy; + *p = hvm_max_cpu_policy; cpuid_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? @@ -633,8 +623,8 @@ void recalculate_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; unsigned int i; @@ -709,7 +699,7 @@ void recalculate_cpuid_policy(struct domain *d) /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpuid_policy.feat._7b0 & + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); @@ -760,8 +750,8 @@ void recalculate_cpuid_policy(struct domain *d) int init_domain_cpuid_policy(struct domain *d) { struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpuid_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpuid_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !p ) { @@ -1065,7 +1055,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, if ( is_pv_domain(d) && is_hardware_domain(d) && guest_kernel_mode(v, regs) && cpu_has_monitor && regs->entry_vector == TRAP_gp_fault ) - *res = raw_cpuid_policy.basic.raw[5]; + *res = raw_cpu_policy.basic.raw[5]; break; case 0x7: @@ -1197,14 +1187,14 @@ static void __init __maybe_unused build_assertions(void) /* Find some more clever allocation scheme if this trips. */ BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.basic) != - sizeof(raw_cpuid_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.feat) != - sizeof(raw_cpuid_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.xstate) != - sizeof(raw_cpuid_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpuid_policy.extd) != - sizeof(raw_cpuid_policy.extd.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); } /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 7878588def..f24e8c1099 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -35,7 +35,7 @@ #include #include #include -#include +#include #ifdef CONFIG_GDBSX static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) @@ -51,12 +51,19 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct old_cpu_policy new = {}; - const struct old_cpu_policy *sys = is_pv_domain(d) - ? &system_policies[XEN_SYSCTL_cpu_policy_pv_max] - : &system_policies[XEN_SYSCTL_cpu_policy_hvm_max]; + struct cpu_policy *sys = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + struct old_cpu_policy old_sys = { sys, sys }; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; + if ( !sys ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + /* Start by copying the domain's existing policies. */ if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || !(new.msr = xmemdup(d->arch.msr)) ) @@ -74,7 +81,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); if ( ret ) goto out; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index cc8fe76203..7819c1de4d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -35,20 +36,9 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -struct msr_policy __read_mostly raw_msr_policy, - __read_mostly host_msr_policy; -#ifdef CONFIG_PV -struct msr_policy __read_mostly pv_max_msr_policy; -struct msr_policy __read_mostly pv_def_msr_policy; -#endif -#ifdef CONFIG_HVM -struct msr_policy __read_mostly hvm_max_msr_policy; -struct msr_policy __read_mostly hvm_def_msr_policy; -#endif - static void __init calculate_raw_policy(void) { - struct msr_policy *mp = &raw_msr_policy; + struct msr_policy *mp = &raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -59,9 +49,9 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { - struct msr_policy *mp = &host_msr_policy; + struct msr_policy *mp = &host_cpu_policy; - *mp = raw_msr_policy; + *mp = raw_cpu_policy; /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ @@ -79,25 +69,25 @@ static void __init calculate_host_policy(void) static void __init calculate_pv_max_policy(void) { - struct msr_policy *mp = &pv_max_msr_policy; + struct msr_policy *mp = &pv_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; mp->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) { - struct msr_policy *mp = &pv_def_msr_policy; + struct msr_policy *mp = &pv_def_cpu_policy; - *mp = pv_max_msr_policy; + *mp = pv_max_cpu_policy; } static void __init calculate_hvm_max_policy(void) { - struct msr_policy *mp = &hvm_max_msr_policy; + struct msr_policy *mp = &hvm_max_cpu_policy; - *mp = host_msr_policy; + *mp = host_cpu_policy; /* It's always possible to emulate CPUID faulting for HVM guests */ mp->platform_info.cpuid_faulting = true; @@ -107,9 +97,9 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { - struct msr_policy *mp = &hvm_def_msr_policy; + struct msr_policy *mp = &hvm_def_cpu_policy; - *mp = hvm_max_msr_policy; + *mp = hvm_max_cpu_policy; } void __init init_guest_msr_policy(void) @@ -133,8 +123,8 @@ void __init init_guest_msr_policy(void) int init_domain_msr_policy(struct domain *d) { struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_msr_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_msr_policy : NULL); + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); if ( !mp ) { diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 67dbc9166d..93b2277973 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -31,38 +31,7 @@ #include #include #include -#include - -const struct old_cpu_policy system_policies[6] = { - [ XEN_SYSCTL_cpu_policy_raw ] = { - &raw_cpuid_policy, - &raw_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_host ] = { - &host_cpuid_policy, - &host_msr_policy, - }, -#ifdef CONFIG_PV - [ XEN_SYSCTL_cpu_policy_pv_max ] = { - &pv_max_cpuid_policy, - &pv_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_pv_default ] = { - &pv_def_cpuid_policy, - &pv_def_msr_policy, - }, -#endif -#ifdef CONFIG_HVM - [ XEN_SYSCTL_cpu_policy_hvm_max ] = { - &hvm_max_cpuid_policy, - &hvm_max_msr_policy, - }, - [ XEN_SYSCTL_cpu_policy_hvm_default ] = { - &hvm_def_cpuid_policy, - &hvm_def_msr_policy, - }, -#endif -}; +#include struct l3_cache_info { int ret; @@ -324,19 +293,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_featureset: { - static const struct cpuid_policy *const policy_table[6] = { - [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_host] = &host_cpuid_policy, + static const struct cpu_policy *const policy_table[6] = { + [XEN_SYSCTL_cpu_featureset_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_featureset_host] = &host_cpu_policy, #ifdef CONFIG_PV - [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_pv] = &pv_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_pv_max] = &pv_max_cpu_policy, #endif #ifdef CONFIG_HVM - [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpuid_policy, - [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpuid_policy, + [XEN_SYSCTL_cpu_featureset_hvm] = &hvm_def_cpu_policy, + [XEN_SYSCTL_cpu_featureset_hvm_max] = &hvm_max_cpu_policy, #endif }; - const struct cpuid_policy *p = NULL; + const struct cpu_policy *p = NULL; uint32_t featureset[FSCAPINTS]; unsigned int nr; @@ -389,7 +358,19 @@ long arch_do_sysctl( case XEN_SYSCTL_get_cpu_policy: { - const struct old_cpu_policy *policy; + static const struct cpu_policy *const system_policies[6] = { + [XEN_SYSCTL_cpu_policy_raw] = &raw_cpu_policy, + [XEN_SYSCTL_cpu_policy_host] = &host_cpu_policy, +#ifdef CONFIG_PV + [XEN_SYSCTL_cpu_policy_pv_max] = &pv_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_pv_default] = &pv_def_cpu_policy, +#endif +#ifdef CONFIG_HVM + [XEN_SYSCTL_cpu_policy_hvm_max] = &hvm_max_cpu_policy, + [XEN_SYSCTL_cpu_policy_hvm_default] = &hvm_def_cpu_policy, +#endif + }; + const struct cpu_policy *policy; /* Reserved field set, or bad policy index? */ if ( sysctl->u.cpu_policy._rsvd || @@ -398,11 +379,11 @@ long arch_do_sysctl( ret = -EINVAL; break; } - policy = &system_policies[ + policy = system_policies[ array_index_nospec(sysctl->u.cpu_policy.index, ARRAY_SIZE(system_policies))]; - if ( !policy->cpuid || !policy->msr ) + if ( !policy ) { ret = -EOPNOTSUPP; break; @@ -412,7 +393,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.leaves) ) sysctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - policy->cpuid, + policy, sysctl->u.cpu_policy.leaves, &sysctl->u.cpu_policy.nr_leaves)) ) break; @@ -428,7 +409,7 @@ long arch_do_sysctl( if ( guest_handle_is_null(sysctl->u.cpu_policy.msrs) ) sysctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - policy->msr, + policy, sysctl->u.cpu_policy.msrs, &sysctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h new file mode 100644 index 0000000000..eef14bb426 --- /dev/null +++ b/xen/include/asm-x86/cpu-policy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef X86_CPU_POLICY_H +#define X86_CPU_POLICY_H + +struct cpu_policy; + +extern struct cpu_policy raw_cpu_policy; +extern struct cpu_policy host_cpu_policy; +extern struct cpu_policy pv_max_cpu_policy; +extern struct cpu_policy pv_def_cpu_policy; +extern struct cpu_policy hvm_max_cpu_policy; +extern struct cpu_policy hvm_def_cpu_policy; + +#endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index d418e8100d..ea05862773 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -46,12 +46,6 @@ DECLARE_PER_CPU(struct cpuidmasks, cpuidmasks); /* Default masking MSR values, calculated at boot. */ extern struct cpuidmasks cpuidmask_defaults; -extern struct cpuid_policy raw_cpuid_policy, host_cpuid_policy, - pv_max_cpuid_policy, pv_def_cpuid_policy, - hvm_max_cpuid_policy, hvm_def_cpuid_policy; - -extern const struct old_cpu_policy system_policies[]; - /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 78b70d323e..f2c0022fec 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -280,13 +280,6 @@ static inline void wrmsr_tsc_aux(uint32_t val) uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -extern struct msr_policy raw_msr_policy, - host_msr_policy, - pv_max_msr_policy, - pv_def_msr_policy, - hvm_max_msr_policy, - hvm_def_msr_policy; - /* Container object for per-vCPU MSRs */ struct vcpu_msrs { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581719.910987 (Exim 4.92) (envelope-from ) id 1qTtox-0005qF-M0; Thu, 10 Aug 2023 00:46:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581719.910987; Thu, 10 Aug 2023 00:46:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtox-0005q8-JJ; Thu, 10 Aug 2023 00:46:35 +0000 Received: by outflank-mailman (input) for mailman id 581719; Thu, 10 Aug 2023 00:46:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtow-0005ps-D6 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtow-0001pD-CL for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtow-00016A-BS for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=W01N69/r2AV6izaGL1NIIkDaYbUsRNjEFvgbR2OFyek=; b=ekha5Zy/VPl1dH63/AMbyz+XsY hDYSfrpGAXW2SaIB+2Fape3X1Unjggw998oseOBnRC4NsML28RCR4l7hohjZLV7DhTJJrj8kY6Ts2 QqyRoKyr6bfKLLWNO2wIw2cjEVqrNsUkUD3xh6fkK5eLPsSkjv6LetVtDhBvZ0xYBLjI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Merge a domain's {cpuid,msr} policy objects Message-Id: Date: Thu, 10 Aug 2023 00:46:34 +0000 commit ad3ee30bcb5b69fb4d6f1c8cfa3c15456cf9ea06 Author: Andrew Cooper AuthorDate: Wed Mar 29 11:32:25 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Merge a domain's {cpuid,msr} policy objects Right now, they're the same underlying type, containing disjoint information. Drop the d->arch.msr pointer, and union d->arch.cpuid to give it a second name of cpu_policy in the interim. Merge init_domain_{cpuid,msr}_policy() into a single init_domain_cpu_policy(), moving the implementation into cpu-policy.c No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bd13dae34809e61e37ba1cd5de893c5c10c46256) --- xen/arch/x86/cpu-policy.c | 49 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 23 ------------------- xen/arch/x86/domain.c | 15 ++++-------- xen/arch/x86/domctl.c | 35 ++++++++++++++-------------- xen/arch/x86/mm/mem_sharing.c | 3 +-- xen/arch/x86/msr.c | 44 ------------------------------------ xen/include/asm-x86/cpu-policy.h | 4 ++++ xen/include/asm-x86/cpuid.h | 3 --- xen/include/asm-x86/domain.h | 13 ++++++++--- xen/include/asm-x86/msr.h | 1 - 10 files changed, 86 insertions(+), 104 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e47fbeb04d..4c5fd70cf1 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,10 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -16,3 +19,49 @@ struct cpu_policy __read_mostly pv_def_cpu_policy; struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif + +int init_domain_cpu_policy(struct domain *d) +{ + struct cpu_policy *p = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); + + if ( !p ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + + p = xmemdup(p); + if ( !p ) + return -ENOMEM; + + /* See comment in ctxt_switch_levelling() */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); + } + + d->arch.cpu_policy = p; + + recalculate_cpuid_policy(d); + + return 0; +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 8bded8653b..b861fee6e8 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -747,29 +747,6 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } -int init_domain_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !p ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - p = xmemdup(p); - if ( !p ) - return -ENOMEM; - - d->arch.cpuid = p; - - recalculate_cpuid_policy(d); - - return 0; -} - void __init init_dom0_cpuid_policy(struct domain *d) { struct cpuid_policy *p = d->arch.cpuid; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index b82e18dd62..5e40681863 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -64,6 +64,7 @@ #include #include #include +#include #include #include #include @@ -740,8 +741,7 @@ int arch_domain_create(struct domain *d, d->arch.ctxt_switch = &idle_csw; - d->arch.cpuid = ZERO_BLOCK_PTR; /* Catch stray misuses. */ - d->arch.msr = ZERO_BLOCK_PTR; + d->arch.cpu_policy = ZERO_BLOCK_PTR; /* Catch stray misuses. */ return 0; } @@ -796,10 +796,7 @@ int arch_domain_create(struct domain *d, goto fail; paging_initialised = true; - if ( (rc = init_domain_cpuid_policy(d)) ) - goto fail; - - if ( (rc = init_domain_msr_policy(d)) ) + if ( (rc = init_domain_cpu_policy(d)) ) goto fail; d->arch.ioport_caps = @@ -870,8 +867,7 @@ int arch_domain_create(struct domain *d, iommu_domain_destroy(d); cleanup_domain_irq_mapping(d); free_xenheap_page(d->shared_info); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); if ( paging_initialised ) paging_final_teardown(d); free_perdomain_mappings(d); @@ -885,8 +881,7 @@ void arch_domain_destroy(struct domain *d) hvm_domain_destroy(d); xfree(d->arch.e820); - xfree(d->arch.cpuid); - xfree(d->arch.msr); + XFREE(d->arch.cpu_policy); free_domain_pirqs(d); if ( !is_idle_domain(d) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index f24e8c1099..17f77a2663 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -50,11 +50,11 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { - struct old_cpu_policy new = {}; + struct cpu_policy *new; struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }; + struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -64,33 +64,33 @@ static int update_domain_cpu_policy(struct domain *d, return -EOPNOTSUPP; } - /* Start by copying the domain's existing policies. */ - if ( !(new.cpuid = xmemdup(d->arch.cpuid)) || - !(new.msr = xmemdup(d->arch.msr)) ) + /* Start by copying the domain's existing policy. */ + if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; + old_new = (struct old_cpu_policy){ new, new }; + /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( - new.cpuid, xdpc->leaves, xdpc->nr_leaves, + new, xdpc->leaves, xdpc->nr_leaves, &err.leaf, &err.subleaf)) || (ret = x86_msr_copy_from_buffer( - new.msr, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) + new, xdpc->msrs, xdpc->nr_msrs, &err.msr)) ) goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new.cpuid); + x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &new, &err); + ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); if ( ret ) goto out; /* - * Audit was successful. Replace existing policies, leaving the old - * policies to be freed. + * Audit was successful. Replace the existing policy, leaving the old one + * to be freed. */ - SWAP(new.cpuid, d->arch.cpuid); - SWAP(new.msr, d->arch.msr); + SWAP(new, d->arch.cpu_policy); /* TODO: Drop when x86_cpu_policies_are_compatible() is completed. */ recalculate_cpuid_policy(d); @@ -99,9 +99,8 @@ static int update_domain_cpu_policy(struct domain *d, domain_cpu_policy_changed(d); out: - /* Free whichever cpuid/msr structs are not installed in struct domain. */ - xfree(new.cpuid); - xfree(new.msr); + /* Free whichever struct is not installed in struct domain. */ + xfree(new); if ( ret ) { @@ -1336,7 +1335,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.leaves) ) domctl->u.cpu_policy.nr_leaves = CPUID_MAX_SERIALISED_LEAVES; else if ( (ret = x86_cpuid_copy_to_buffer( - d->arch.cpuid, + d->arch.cpu_policy, domctl->u.cpu_policy.leaves, &domctl->u.cpu_policy.nr_leaves)) ) break; @@ -1345,7 +1344,7 @@ long arch_do_domctl( if ( guest_handle_is_null(domctl->u.cpu_policy.msrs) ) domctl->u.cpu_policy.nr_msrs = MSR_MAX_SERIALISED_ENTRIES; else if ( (ret = x86_msr_copy_to_buffer( - d->arch.msr, + d->arch.cpu_policy, domctl->u.cpu_policy.msrs, &domctl->u.cpu_policy.nr_msrs)) ) break; diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 98b14f7b0a..d1831c9138 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1783,8 +1783,7 @@ static int fork(struct domain *cd, struct domain *d) domain_pause(d); cd->max_pages = d->max_pages; - *cd->arch.cpuid = *d->arch.cpuid; - *cd->arch.msr = *d->arch.msr; + *cd->arch.cpu_policy = *d->arch.cpu_policy; cd->vmtrace_size = d->vmtrace_size; cd->parent = d; } diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 7819c1de4d..21a891d635 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -120,50 +120,6 @@ void __init init_guest_msr_policy(void) } } -int init_domain_msr_policy(struct domain *d) -{ - struct msr_policy *mp = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_def_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_def_cpu_policy : NULL); - - if ( !mp ) - { - ASSERT_UNREACHABLE(); - return -EOPNOTSUPP; - } - - mp = xmemdup(mp); - if ( !mp ) - return -ENOMEM; - - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - mp->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - mp->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - - d->arch.msr = mp; - - return 0; -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index eef14bb426..9ba34bbf5e 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -3,6 +3,7 @@ #define X86_CPU_POLICY_H struct cpu_policy; +struct domain; extern struct cpu_policy raw_cpu_policy; extern struct cpu_policy host_cpu_policy; @@ -11,4 +12,7 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Allocate and initialise a CPU policy suitable for the domain. */ +int init_domain_cpu_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index ea05862773..7f81b998ce 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -49,9 +49,6 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Allocate and initialise a CPUID policy suitable for the domain. */ -int init_domain_cpuid_policy(struct domain *d); - /* Apply dom0-specific tweaks to the CPUID policy. */ void init_dom0_cpuid_policy(struct domain *d); diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index 7d6483f21b..e2ad2957ee 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -379,9 +379,16 @@ struct arch_domain */ uint8_t x87_fip_width; - /* CPUID and MSR policy objects. */ - struct cpuid_policy *cpuid; - struct msr_policy *msr; + /* + * The domain's CPU Policy. "cpu_policy" is considered the canonical + * pointer, but the "cpuid" and "msr" aliases exist so the most + * appropriate one can be used for local code clarity. + */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + struct cpu_policy *msr; + }; struct PITState vpit; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index f2c0022fec..38984f2b94 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -376,7 +376,6 @@ struct vcpu_msrs }; void init_guest_msr_policy(void); -int init_domain_msr_policy(struct domain *d); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581720.910990 (Exim 4.92) (envelope-from ) id 1qTtp7-0005sw-NZ; Thu, 10 Aug 2023 00:46:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581720.910990; Thu, 10 Aug 2023 00:46:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtp7-0005sp-Kt; Thu, 10 Aug 2023 00:46:45 +0000 Received: by outflank-mailman (input) for mailman id 581720; Thu, 10 Aug 2023 00:46:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtp6-0005sh-GD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtp6-0001pi-FX for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtp6-000184-Ec for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=zq9allcDIU2UF7NRWwEEYMooa/FtA42t1FU/uyQMuXg=; b=rdTyekwrtyVKYTGhBMKfaVZwV2 KOWMCYGNDxkstQT6PT7yRjru2ZHBW03TXuzJ/cArIfznBuX1GleBec2qjucJnrWf+Q+u99urubQzc ZAo7yhIqYyDWfbo82g4Pz6CCK7rW26VsBB8fcMYI8YjAidMzDgyySrBQJZkAQ4Tr5aek=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Merge xc_cpu_policy's cpuid and msr objects Message-Id: Date: Thu, 10 Aug 2023 00:46:44 +0000 commit af24f29e78a51ba009b68ddfc76533373bc2fb10 Author: Andrew Cooper AuthorDate: Wed Mar 29 12:37:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Merge xc_cpu_policy's cpuid and msr objects Right now, they're the same underlying type, containing disjoint information. Use a single object instead. Also take the opportunity to rename 'entries' to 'msrs' which is more descriptive, and more in line with nr_msrs being the count of MSR entries in the API. test-tsx uses xg_private.h to access the internals of xc_cpu_policy, so needs updating at the same time. Take the opportunity to improve the code clarity by passing a cpu_policy rather than an xc_cpu_policy into some functions. No practical change. This undoes the transient doubling of storage space from earlier patches. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit c9985233ca663fea20fc8807cf509d2e3fef0dca) --- tools/libs/guest/xg_cpuid_x86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 0b35c8e3b0..b6c1b024cc 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -434,7 +434,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, xc_dominfo_t di; unsigned int i, nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; - struct cpuid_policy *p = NULL; + struct cpu_policy *p = NULL; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; uint32_t len = ARRAY_SIZE(host_featureset); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:46:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:46:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581721.910995 (Exim 4.92) (envelope-from ) id 1qTtpH-0005vh-Pc; Thu, 10 Aug 2023 00:46:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581721.910995; Thu, 10 Aug 2023 00:46:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpH-0005va-Mi; Thu, 10 Aug 2023 00:46:55 +0000 Received: by outflank-mailman (input) for mailman id 581721; Thu, 10 Aug 2023 00:46:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpG-0005vO-Jr for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpG-0001pp-JA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtpG-00018i-Hv for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:46:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XT/aqZJxSy9pl84cjm483DQppbcTMtgiu0QlEpD3Npg=; b=LEDFSm131FA4ndj16jdcpYRtN6 zkH3HSFr5jvC7nGQgwru9v8yNyCs2h7LJsm7PCwO1DMZHZWR5mPSK4Spou3iNrja2B80yaXP4Q0F2 w5tEElamcClmoCHzVmzPYhXL01/+pyx6BASGrnZprQOEYoe/4lX64QiS/6+RdNC56PtU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Drop struct old_cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:46:54 +0000 commit 698827b8749353caaf8bfee5110fb3792159e07c Author: Andrew Cooper AuthorDate: Wed Mar 29 12:01:33 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Drop struct old_cpu_policy With all the complicated callers of x86_cpu_policies_are_compatible() updated to use a single cpu_policy object, we can drop the final user of struct old_cpu_policy. Update x86_cpu_policies_are_compatible() to take (new) cpu_policy pointers, reducing the amount of internal pointer chasing, and update all callers to pass their cpu_policy objects directly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 66c5c99656314451ff9520f91cff5bb39fee9fed) --- tools/tests/cpu-policy/test-cpu-policy.c | 50 ++++++++++---------------------- xen/arch/x86/domctl.c | 7 ++--- xen/include/xen/lib/x86/cpu-policy.h | 12 ++------ xen/lib/x86/policy.c | 12 ++++---- 4 files changed, 26 insertions(+), 55 deletions(-) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index d8af5581ab..a7c19be63f 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -88,7 +88,7 @@ static bool leaves_are_sorted(const xen_cpuid_leaf_t *leaves, unsigned int nr) static void test_cpuid_current(void) { - struct cpuid_policy p; + struct cpu_policy p; xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; unsigned int nr = ARRAY_SIZE(leaves); int rc; @@ -108,7 +108,7 @@ static void test_cpuid_current(void) static void test_cpuid_serialise_success(void) { static const struct test { - struct cpuid_policy p; + struct cpu_policy p; const char *name; unsigned int nr_leaves; } tests[] = { @@ -232,7 +232,7 @@ static void test_cpuid_serialise_success(void) static void test_msr_serialise_success(void) { static const struct test { - struct msr_policy p; + struct cpu_policy p; const char *name; unsigned int nr_msrs; } tests[] = { @@ -413,7 +413,7 @@ static void test_cpuid_out_of_range_clearing(void) static const struct test { const char *name; unsigned int nr_markers; - struct cpuid_policy p; + struct cpu_policy p; } tests[] = { { .name = "basic", @@ -533,7 +533,7 @@ static void test_cpuid_out_of_range_clearing(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { const struct test *t = &tests[i]; - struct cpuid_policy *p = memdup(&t->p); + struct cpu_policy *p = memdup(&t->p); void *ptr; unsigned int nr_markers; @@ -557,23 +557,20 @@ static void test_is_compatible_success(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; } tests[] = { { .name = "Host CPUID faulting, Guest not", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, }, { .name = "Host CPUID faulting, Guest wanted", - .host_msr = { + .host = { .platform_info.cpuid_faulting = true, }, - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, }, @@ -585,15 +582,8 @@ static void test_is_compatible_success(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res != 0 || memcmp(&no_errors, &e, sizeof(no_errors)) ) @@ -607,25 +597,22 @@ static void test_is_compatible_failure(void) { static struct test { const char *name; - struct cpuid_policy host_cpuid; - struct cpuid_policy guest_cpuid; - struct msr_policy host_msr; - struct msr_policy guest_msr; + struct cpu_policy host, guest; struct cpu_policy_errors e; } tests[] = { { .name = "Host basic.max_leaf out of range", - .guest_cpuid.basic.max_leaf = 1, + .guest.basic.max_leaf = 1, .e = { 0, -1, -1 }, }, { .name = "Host extd.max_leaf out of range", - .guest_cpuid.extd.max_leaf = 1, + .guest.extd.max_leaf = 1, .e = { 0x80000000, -1, -1 }, }, { .name = "Host no CPUID faulting, Guest wanted", - .guest_msr = { + .guest = { .platform_info.cpuid_faulting = true, }, .e = { -1, -1, 0xce }, @@ -637,15 +624,8 @@ static void test_is_compatible_failure(void) for ( size_t i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - struct old_cpu_policy sys = { - &t->host_cpuid, - &t->host_msr, - }, new = { - &t->guest_cpuid, - &t->guest_msr, - }; struct cpu_policy_errors e; - int res = x86_cpu_policies_are_compatible(&sys, &new, &e); + int res = x86_cpu_policies_are_compatible(&t->host, &t->guest, &e); /* Check the expected error output. */ if ( res == 0 || memcmp(&t->e, &e, sizeof(t->e)) ) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 17f77a2663..0ace9cc7c2 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -51,10 +51,9 @@ static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) { struct cpu_policy *new; - struct cpu_policy *sys = is_pv_domain(d) + const struct cpu_policy *sys = is_pv_domain(d) ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - struct old_cpu_policy old_sys = { sys, sys }, old_new; struct cpu_policy_errors err = INIT_CPU_POLICY_ERRORS; int ret = -ENOMEM; @@ -68,8 +67,6 @@ static int update_domain_cpu_policy(struct domain *d, if ( !(new = xmemdup(d->arch.cpu_policy)) ) goto out; - old_new = (struct old_cpu_policy){ new, new }; - /* Merge the toolstack provided data. */ if ( (ret = x86_cpuid_copy_from_buffer( new, xdpc->leaves, xdpc->nr_leaves, @@ -82,7 +79,7 @@ static int update_domain_cpu_policy(struct domain *d, x86_cpuid_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ - ret = x86_cpu_policies_are_compatible(&old_sys, &old_new, &err); + ret = x86_cpu_policies_are_compatible(sys, new, &err); if ( ret ) goto out; diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 53fffca552..8b27a0725b 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -379,12 +379,6 @@ struct cpu_policy #define cpuid_policy cpu_policy #define msr_policy cpu_policy -struct old_cpu_policy -{ - struct cpuid_policy *cpuid; - struct msr_policy *msr; -}; - struct cpu_policy_errors { uint32_t leaf, subleaf; @@ -559,7 +553,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); -/* +/** * Calculate whether two policies are compatible. * * i.e. Can a VM configured with @guest run on a CPU supporting @host. @@ -573,8 +567,8 @@ int x86_msr_copy_from_buffer(struct msr_policy *policy, * incompatibility is detected, the optional err pointer may identify the * problematic leaf/subleaf and/or MSR. */ -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err); #endif /* !XEN_LIB_X86_POLICIES_H */ diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index 2975711d7c..a9c60000af 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,8 +2,8 @@ #include -int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, - const struct old_cpu_policy *guest, +int x86_cpu_policies_are_compatible(const struct cpu_policy *host, + const struct cpu_policy *guest, struct cpu_policy_errors *err) { struct cpu_policy_errors e = INIT_CPU_POLICY_ERRORS; @@ -15,18 +15,18 @@ int x86_cpu_policies_are_compatible(const struct old_cpu_policy *host, #define FAIL_MSR(m) \ do { e.msr = (m); goto out; } while ( 0 ) - if ( guest->cpuid->basic.max_leaf > host->cpuid->basic.max_leaf ) + if ( guest->basic.max_leaf > host->basic.max_leaf ) FAIL_CPUID(0, NA); - if ( guest->cpuid->feat.max_subleaf > host->cpuid->feat.max_subleaf ) + if ( guest->feat.max_subleaf > host->feat.max_subleaf ) FAIL_CPUID(7, 0); - if ( guest->cpuid->extd.max_leaf > host->cpuid->extd.max_leaf ) + if ( guest->extd.max_leaf > host->extd.max_leaf ) FAIL_CPUID(0x80000000, NA); /* TODO: Audit more CPUID data. */ - if ( ~host->msr->platform_info.raw & guest->msr->platform_info.raw ) + if ( ~host->platform_info.raw & guest->platform_info.raw ) FAIL_MSR(MSR_INTEL_PLATFORM_INFO); #undef FAIL_MSR -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581722.910998 (Exim 4.92) (envelope-from ) id 1qTtpR-0005yu-Sb; Thu, 10 Aug 2023 00:47:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581722.910998; Thu, 10 Aug 2023 00:47:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpR-0005yn-Q8; Thu, 10 Aug 2023 00:47:05 +0000 Received: by outflank-mailman (input) for mailman id 581722; Thu, 10 Aug 2023 00:47:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpQ-0005ya-Ms for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpQ-0001q9-M7 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtpQ-00019K-LX for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RFYqm98NuZSI2Yy24Gnx/X60QvZomQlZsmJ+gLKXRj4=; b=esZby+bZVXi4+EF77dmSVkW2Rn Pe6SseN0JacN70TI/AxKwVK084J+1BAWYuNWlQm6R7twtUVKPmCCxN3kRbNr+ddBq5RFW1rp7gsWM gAy5QzH39nWQm/nQJqLEpz4OguUEvaso/bftGaWrbPJD5iSk2Z4e2XhtBaj4ZhoPQmEU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Out-of-inline the policy<->featureset convertors Message-Id: Date: Thu, 10 Aug 2023 00:47:04 +0000 commit 1d9db6d6a3bf079af6e62c8df53ca9f0764b76ab Author: Andrew Cooper AuthorDate: Thu Mar 30 18:21:01 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Out-of-inline the policy<->featureset convertors These are already getting over-large for being inline functions, and are only going to grow further over time. Out of line them, yielding the following net delta from bloat-o-meter: add/remove: 2/0 grow/shrink: 0/4 up/down: 276/-1877 (-1601) Switch to the newer cpu_policy terminology while doing so. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1027df4c00823f8b448e3a6861cc7b6ce61ba4e4) --- tools/libs/guest/xg_cpuid_x86.c | 2 +- xen/arch/x86/cpuid.c | 28 +++++++++---------- xen/arch/x86/sysctl.c | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 52 +++++++----------------------------- xen/lib/x86/cpuid.c | 42 +++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 58 deletions(-) diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index b6c1b024cc..53922922b1 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -568,7 +568,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - cpuid_featureset_to_policy(feat, p); + x86_cpu_featureset_to_policy(feat, p); } else { diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index b861fee6e8..afebd7c990 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -367,7 +367,7 @@ static void __init calculate_host_policy(void) p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, ARRAY_SIZE(p->extd.raw) - 1); - cpuid_featureset_to_policy(boot_cpu_data.x86_capability, p); + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); recalculate_xstate(p); recalculate_misc(p); @@ -449,7 +449,7 @@ static void __init calculate_pv_max_policy(void) unsigned int i; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_max_featuremask[i]; @@ -467,7 +467,7 @@ static void __init calculate_pv_max_policy(void) guest_common_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ @@ -480,7 +480,7 @@ static void __init calculate_pv_def_policy(void) unsigned int i; *p = pv_max_cpu_policy; - cpuid_policy_to_featureset(p, pv_featureset); + x86_cpu_policy_to_featureset(p, pv_featureset); for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) pv_featureset[i] &= pv_def_featuremask[i]; @@ -489,7 +489,7 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(pv_featureset); sanitise_featureset(pv_featureset); - cpuid_featureset_to_policy(pv_featureset, p); + x86_cpu_featureset_to_policy(pv_featureset, p); recalculate_xstate(p); } @@ -501,7 +501,7 @@ static void __init calculate_hvm_max_policy(void) const uint32_t *hvm_featuremask; *p = host_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_max_featuremask : hvm_shadow_max_featuremask; @@ -551,7 +551,7 @@ static void __init calculate_hvm_max_policy(void) guest_common_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -563,7 +563,7 @@ static void __init calculate_hvm_def_policy(void) const uint32_t *hvm_featuremask; *p = hvm_max_cpu_policy; - cpuid_policy_to_featureset(p, hvm_featureset); + x86_cpu_policy_to_featureset(p, hvm_featureset); hvm_featuremask = hvm_hap_supported() ? hvm_hap_def_featuremask : hvm_shadow_def_featuremask; @@ -575,7 +575,7 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(hvm_featureset); sanitise_featureset(hvm_featureset); - cpuid_featureset_to_policy(hvm_featureset, p); + x86_cpu_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); } @@ -645,8 +645,8 @@ void recalculate_cpuid_policy(struct domain *d) ? CPUID_GUEST_NR_EXTD_AMD : CPUID_GUEST_NR_EXTD_INTEL) - 1); - cpuid_policy_to_featureset(p, fs); - cpuid_policy_to_featureset(max, max_fs); + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); if ( is_hvm_domain(d) ) { @@ -703,7 +703,7 @@ void recalculate_cpuid_policy(struct domain *d) (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); /* Pass host cacheline size through to guests. */ p->basic.clflush_size = max->basic.clflush_size; @@ -769,7 +769,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) uint32_t fs[FSCAPINTS]; unsigned int i; - cpuid_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(p, fs); for ( i = 0; i < ARRAY_SIZE(fs); ++i ) { @@ -777,7 +777,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) fs[i] &= ~dom0_disable_feat[i]; } - cpuid_featureset_to_policy(fs, p); + x86_cpu_featureset_to_policy(fs, p); recalculate_cpuid_policy(d); } diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 93b2277973..512ace2267 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -336,7 +336,7 @@ long arch_do_sysctl( ret = -EINVAL; if ( !ret ) - cpuid_policy_to_featureset(p, featureset); + x86_cpu_policy_to_featureset(p, featureset); /* Copy the requested featureset into place. */ if ( !ret && copy_to_guest(sysctl->u.cpu_featureset.features, diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 8b27a0725b..57b4633c86 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -387,49 +387,17 @@ struct cpu_policy_errors #define INIT_CPU_POLICY_ERRORS { -1, -1, -1 } -/* Fill in a featureset bitmap from a CPUID policy. */ -static inline void cpuid_policy_to_featureset( - const struct cpuid_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) -{ - fs[FEATURESET_1d] = p->basic._1d; - fs[FEATURESET_1c] = p->basic._1c; - fs[FEATURESET_e1d] = p->extd.e1d; - fs[FEATURESET_e1c] = p->extd.e1c; - fs[FEATURESET_Da1] = p->xstate.Da1; - fs[FEATURESET_7b0] = p->feat._7b0; - fs[FEATURESET_7c0] = p->feat._7c0; - fs[FEATURESET_e7d] = p->extd.e7d; - fs[FEATURESET_e8b] = p->extd.e8b; - fs[FEATURESET_7d0] = p->feat._7d0; - fs[FEATURESET_7a1] = p->feat._7a1; - fs[FEATURESET_e21a] = p->extd.e21a; - fs[FEATURESET_7b1] = p->feat._7b1; - fs[FEATURESET_7d2] = p->feat._7d2; - fs[FEATURESET_7c1] = p->feat._7c1; - fs[FEATURESET_7d1] = p->feat._7d1; -} +/** + * Copy the featureset words out of a cpu_policy object. + */ +void x86_cpu_policy_to_featureset(const struct cpu_policy *p, + uint32_t fs[FEATURESET_NR_ENTRIES]); -/* Fill in a CPUID policy from a featureset bitmap. */ -static inline void cpuid_featureset_to_policy( - const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpuid_policy *p) -{ - p->basic._1d = fs[FEATURESET_1d]; - p->basic._1c = fs[FEATURESET_1c]; - p->extd.e1d = fs[FEATURESET_e1d]; - p->extd.e1c = fs[FEATURESET_e1c]; - p->xstate.Da1 = fs[FEATURESET_Da1]; - p->feat._7b0 = fs[FEATURESET_7b0]; - p->feat._7c0 = fs[FEATURESET_7c0]; - p->extd.e7d = fs[FEATURESET_e7d]; - p->extd.e8b = fs[FEATURESET_e8b]; - p->feat._7d0 = fs[FEATURESET_7d0]; - p->feat._7a1 = fs[FEATURESET_7a1]; - p->extd.e21a = fs[FEATURESET_e21a]; - p->feat._7b1 = fs[FEATURESET_7b1]; - p->feat._7d2 = fs[FEATURESET_7d2]; - p->feat._7c1 = fs[FEATURESET_7c1]; - p->feat._7d1 = fs[FEATURESET_7d1]; -} +/** + * Copy the featureset words back into a cpu_policy object. + */ +void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], + struct cpu_policy *p); static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) { diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e81f76c779..734e90823a 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -60,6 +60,48 @@ const char *x86_cpuid_vendor_to_str(unsigned int vendor) } } +void x86_cpu_policy_to_featureset( + const struct cpu_policy *p, uint32_t fs[FEATURESET_NR_ENTRIES]) +{ + fs[FEATURESET_1d] = p->basic._1d; + fs[FEATURESET_1c] = p->basic._1c; + fs[FEATURESET_e1d] = p->extd.e1d; + fs[FEATURESET_e1c] = p->extd.e1c; + fs[FEATURESET_Da1] = p->xstate.Da1; + fs[FEATURESET_7b0] = p->feat._7b0; + fs[FEATURESET_7c0] = p->feat._7c0; + fs[FEATURESET_e7d] = p->extd.e7d; + fs[FEATURESET_e8b] = p->extd.e8b; + fs[FEATURESET_7d0] = p->feat._7d0; + fs[FEATURESET_7a1] = p->feat._7a1; + fs[FEATURESET_e21a] = p->extd.e21a; + fs[FEATURESET_7b1] = p->feat._7b1; + fs[FEATURESET_7d2] = p->feat._7d2; + fs[FEATURESET_7c1] = p->feat._7c1; + fs[FEATURESET_7d1] = p->feat._7d1; +} + +void x86_cpu_featureset_to_policy( + const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p) +{ + p->basic._1d = fs[FEATURESET_1d]; + p->basic._1c = fs[FEATURESET_1c]; + p->extd.e1d = fs[FEATURESET_e1d]; + p->extd.e1c = fs[FEATURESET_e1c]; + p->xstate.Da1 = fs[FEATURESET_Da1]; + p->feat._7b0 = fs[FEATURESET_7b0]; + p->feat._7c0 = fs[FEATURESET_7c0]; + p->extd.e7d = fs[FEATURESET_e7d]; + p->extd.e8b = fs[FEATURESET_e8b]; + p->feat._7d0 = fs[FEATURESET_7d0]; + p->feat._7a1 = fs[FEATURESET_7a1]; + p->extd.e21a = fs[FEATURESET_e21a]; + p->feat._7b1 = fs[FEATURESET_7b1]; + p->feat._7d2 = fs[FEATURESET_7d2]; + p->feat._7c1 = fs[FEATURESET_7c1]; + p->feat._7d1 = fs[FEATURESET_7d1]; +} + void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581723.911003 (Exim 4.92) (envelope-from ) id 1qTtpb-00061S-VP; Thu, 10 Aug 2023 00:47:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581723.911003; Thu, 10 Aug 2023 00:47:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpb-00061L-Rf; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=MCxBWXDMbltNW+oVqb36y3bDrbej5VjKYyOFxuTQG/g=; b=jQ/h4IzOBbtvwibR09pQndYh0x mcXUjsO3QGeIg9fKH+O3097c54lFO5vGaBPcMuiPlV9NRN6+9bUMWvBpM/uUIEb62cHg9qK5iLFJ+ ibg7fNboAoAuzY2QFBjOvrFyp9kAiWwDcuK2CNyleOkqGGZdi9Pg+IwKfNhM+v3jOmvI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Move MSR policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 10 Aug 2023 00:47:14 +0000 commit f274ccdc4f1db9d963fbdf44abac855061174f68 Author: Andrew Cooper AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be) --- xen/arch/x86/cpu-policy.c | 84 ++++++++++++++++++++++++++++++++++++++++ xen/arch/x86/msr.c | 84 ---------------------------------------- xen/arch/x86/setup.c | 3 +- xen/include/asm-x86/cpu-policy.h | 3 ++ xen/include/asm-x86/msr.h | 1 - 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 4c5fd70cf1..d774d281c2 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 21a891d635..61d74374f8 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -36,90 +36,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 82fc351a2f..8f70d6cf96 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -1953,7 +1954,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 38984f2b94..60627710f5 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -375,7 +375,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581724.911006 (Exim 4.92) (envelope-from ) id 1qTtpn-00064f-01; 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Thu, 10 Aug 2023 00:47:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mnhNr30NpagyIC9LcOt/z2tEQdGXbPrhYmGJ+LlLM/U=; b=0P+SEbkLLPHCBgmJ1K3a/6xIjS 2qUqZKLL95FBdxMq5Ddk9P46DpckuedUnZOGebqoGH1fSF9lV3BUKKb/F1J27HHRVNKoW0PJQpGMY 0sbFgFs8dyyNLv9+L9jJ80GIKYdpj/gBnSBFAPUTUO/gQChrb9Dp+nryrXENu/ESt0k8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Message-Id: Date: Thu, 10 Aug 2023 00:47:24 +0000 commit dda1a3f13a28f2556379cde20a59b8bed0b423f3 Author: Andrew Cooper AuthorDate: Mon Apr 3 19:06:02 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Merge CPUID policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. Do some easy cleanup of includes. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 8eb56eb959a50bf9afd0fd590ec394e9145970a4) --- xen/arch/x86/cpu-policy.c | 716 +++++++++++++++++++++++++++++++++++ xen/arch/x86/cpuid.c | 779 +-------------------------------------- xen/arch/x86/hvm/hvm.c | 1 - xen/arch/x86/pv/domain.c | 1 + xen/arch/x86/setup.c | 2 - xen/include/asm-x86/cpu-policy.h | 6 + xen/include/asm-x86/cpuid.h | 11 +- 7 files changed, 728 insertions(+), 788 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index d774d281c2..73195ec7d9 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -1,13 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include +#include #include #include +#include #include +#include +#include #include +#include #include +#include struct cpu_policy __read_mostly raw_cpu_policy; struct cpu_policy __read_mostly host_cpu_policy; @@ -20,10 +26,332 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy; struct cpu_policy __read_mostly hvm_def_cpu_policy; #endif +const uint32_t known_features[] = INIT_KNOWN_FEATURES; + +static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; +static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; +static const uint32_t __initconst hvm_hap_max_featuremask[] = + INIT_HVM_HAP_MAX_FEATURES; +static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; +static const uint32_t __initconst hvm_shadow_def_featuremask[] = + INIT_HVM_SHADOW_DEF_FEATURES; +static const uint32_t __initconst hvm_hap_def_featuremask[] = + INIT_HVM_HAP_DEF_FEATURES; +static const uint32_t deep_features[] = INIT_DEEP_FEATURES; + +static const struct feature_name { + const char *name; + unsigned int bit; +} feature_names[] __initconstrel = INIT_FEATURE_NAMES; + +/* + * Parse a list of cpuid feature names -> bool, calling the callback for any + * matches found. + * + * always_inline, because this is init code only and we really don't want a + * function pointer call in the middle of the loop. + */ +static int __init always_inline parse_cpuid( + const char *s, void (*callback)(unsigned int feat, bool val)) +{ + const char *ss; + int val, rc = 0; + + do { + const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; + const char *feat; + + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + /* Skip the 'no-' prefix for name comparisons. */ + feat = s; + if ( strncmp(s, "no-", 3) == 0 ) + feat += 3; + + /* (Re)initalise lhs and rhs for binary search. */ + lhs = feature_names; + rhs = feature_names + ARRAY_SIZE(feature_names); + + while ( lhs < rhs ) + { + int res; + + mid = lhs + (rhs - lhs) / 2; + res = cmdline_strcmp(feat, mid->name); + + if ( res < 0 ) + { + rhs = mid; + continue; + } + if ( res > 0 ) + { + lhs = mid + 1; + continue; + } + + if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) + { + callback(mid->bit, val); + mid = NULL; + } + + break; + } + + /* + * Mid being NULL means that the name and boolean were successfully + * identified. Everything else is an error. + */ + if ( mid ) + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} + +static void __init _parse_xen_cpuid(unsigned int feat, bool val) +{ + if ( !val ) + setup_clear_cpu_cap(feat); + else if ( feat == X86_FEATURE_RDRAND && + (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) + setup_force_cpu_cap(X86_FEATURE_RDRAND); +} + +static int __init parse_xen_cpuid(const char *s) +{ + return parse_cpuid(s, _parse_xen_cpuid); +} +custom_param("cpuid", parse_xen_cpuid); + +static bool __initdata dom0_cpuid_cmdline; +static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; +static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; + +static void __init _parse_dom0_cpuid(unsigned int feat, bool val) +{ + __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); + __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); +} + +static int __init parse_dom0_cpuid(const char *s) +{ + dom0_cpuid_cmdline = true; + + return parse_cpuid(s, _parse_dom0_cpuid); +} +custom_param("dom0-cpuid", parse_dom0_cpuid); + +#define EMPTY_LEAF ((struct cpuid_leaf){}) +static void zero_leaves(struct cpuid_leaf *l, + unsigned int first, unsigned int last) +{ + memset(&l[first], 0, sizeof(*l) * (last - first + 1)); +} + +static void sanitise_featureset(uint32_t *fs) +{ + /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ + uint32_t disabled_features[ + ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; + unsigned int i; + + for ( i = 0; i < FSCAPINTS; ++i ) + { + /* Clamp to known mask. */ + fs[i] &= known_features[i]; + + /* + * Identify which features with deep dependencies have been + * disabled. + */ + disabled_features[i] = ~fs[i] & deep_features[i]; + } + + for_each_set_bit(i, (void *)disabled_features, + sizeof(disabled_features) * 8) + { + const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + unsigned int j; + + ASSERT(dfs); /* deep_features[] should guarentee this. */ + + for ( j = 0; j < FSCAPINTS; ++j ) + { + fs[j] &= ~dfs[j]; + disabled_features[j] &= ~dfs[j]; + } + } +} + +static void recalculate_xstate(struct cpu_policy *p) +{ + uint64_t xstates = XSTATE_FP_SSE; + uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; + unsigned int i, Da1 = p->xstate.Da1; + + /* + * The Da1 leaf is the only piece of information preserved in the common + * case. Everything else is derived from other feature state. + */ + memset(&p->xstate, 0, sizeof(p->xstate)); + + if ( !p->basic.xsave ) + return; + + if ( p->basic.avx ) + { + xstates |= X86_XCR0_YMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_YMM_POS] + + xstate_sizes[X86_XCR0_YMM_POS]); + } + + if ( p->feat.mpx ) + { + xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_BNDCSR_POS] + + xstate_sizes[X86_XCR0_BNDCSR_POS]); + } + + if ( p->feat.avx512f ) + { + xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_HI_ZMM_POS] + + xstate_sizes[X86_XCR0_HI_ZMM_POS]); + } + + if ( p->feat.pku ) + { + xstates |= X86_XCR0_PKRU; + xstate_size = max(xstate_size, + xstate_offsets[X86_XCR0_PKRU_POS] + + xstate_sizes[X86_XCR0_PKRU_POS]); + } + + p->xstate.max_size = xstate_size; + p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; + p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; + + p->xstate.Da1 = Da1; + if ( p->xstate.xsaves ) + { + p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; + p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; + } + else + xstates &= ~XSTATE_XSAVES_ONLY; + + for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + { + uint64_t curr_xstate = 1ul << i; + + if ( !(xstates & curr_xstate) ) + continue; + + p->xstate.comp[i].size = xstate_sizes[i]; + p->xstate.comp[i].offset = xstate_offsets[i]; + p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; + p->xstate.comp[i].align = curr_xstate & xstate_align; + } +} + +/* + * Misc adjustments to the policy. Mostly clobbering reserved fields and + * duplicating shared fields. Intentionally hidden fields are annotated. + */ +static void recalculate_misc(struct cpu_policy *p) +{ + p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ + p->basic.apic_id = 0; /* Dynamic. */ + + p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ + p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ + + p->basic.raw[0x8] = EMPTY_LEAF; + + /* TODO: Rework topology logic. */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + p->basic.raw[0xc] = EMPTY_LEAF; + + p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; + + /* Most of Power/RAS hidden from guests. */ + p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; + + p->extd.raw[0x8].d = 0; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ + p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ + p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ + + p->extd.vendor_ebx = 0; + p->extd.vendor_ecx = 0; + p->extd.vendor_edx = 0; + + p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; + + p->extd.raw[0x5] = EMPTY_LEAF; + p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; + + p->extd.raw[0x8].a &= 0x0000ffff; + p->extd.raw[0x8].c = 0; + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + zero_leaves(p->basic.raw, 0x2, 0x3); + memset(p->cache.raw, 0, sizeof(p->cache.raw)); + zero_leaves(p->basic.raw, 0x9, 0xa); + + p->extd.vendor_ebx = p->basic.vendor_ebx; + p->extd.vendor_ecx = p->basic.vendor_ecx; + p->extd.vendor_edx = p->basic.vendor_edx; + + p->extd.raw_fms = p->basic.raw_fms; + p->extd.raw[0x1].b &= 0xff00ffff; + p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; + + p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ + p->extd.raw[0x8].c &= 0x0003f0ff; + + p->extd.raw[0x9] = EMPTY_LEAF; + + zero_leaves(p->extd.raw, 0xb, 0x18); + + /* 0x19 - TLB details. Pass through. */ + /* 0x1a - Perf hints. Pass through. */ + + p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ + p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ + p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ + p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ + p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ + p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ + break; + } +} + static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; + x86_cpuid_policy_fill_native(p); + + /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ + ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ @@ -34,9 +362,50 @@ static void __init calculate_raw_policy(void) static void __init calculate_host_policy(void) { struct cpu_policy *p = &host_cpu_policy; + unsigned int max_extd_leaf; *p = raw_cpu_policy; + p->basic.max_leaf = + min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); + p->feat.max_subleaf = + min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); + + max_extd_leaf = p->extd.max_leaf; + + /* + * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be + * dispatch serialising for Spectre mitigations. Extend max_extd_leaf + * beyond what hardware supports, to include the feature leaf containing + * this information. + */ + if ( cpu_has_lfence_dispatch ) + max_extd_leaf = max(max_extd_leaf, 0x80000021); + + p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, + ARRAY_SIZE(p->extd.raw) - 1); + + x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); + recalculate_xstate(p); + recalculate_misc(p); + + /* When vPMU is disabled, drop it from the host policy. */ + if ( vpmu_mode == XENPMU_MODE_OFF ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( p->extd.svm ) + { + /* Clamp to implemented features which require hardware support. */ + p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | + (1u << SVM_FEATURE_LBRV) | + (1u << SVM_FEATURE_NRIPS) | + (1u << SVM_FEATURE_PAUSEFILTER) | + (1u << SVM_FEATURE_DECODEASSISTS)); + /* Enable features which are always emulated. */ + p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | + (1u << SVM_FEATURE_TSCRATEMSR)); + } + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; @@ -51,11 +420,88 @@ static void __init calculate_host_policy(void) ARCH_CAPS_PBRSB_NO); } +static void __init guest_common_default_feature_adjustments(uint32_t *fs) +{ + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && + boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * On certain hardware, speculative or errata workarounds can result in + * TSX being placed in "force-abort" mode, where it doesn't actually + * function as expected, but is technically compatible with the ISA. + * + * Do not advertise RTM to guests by default if it won't actually work. + */ + if ( rtm_disabled ) + __clear_bit(X86_FEATURE_RTM, fs); +} + +static void __init guest_common_feature_adjustments(uint32_t *fs) +{ + /* Unconditionally claim to be able to set the hypervisor bit. */ + __set_bit(X86_FEATURE_HYPERVISOR, fs); + + /* + * If IBRS is offered to the guest, unconditionally offer STIBP. It is a + * nop on non-HT hardware, and has this behaviour to make heterogeneous + * setups easier to manage. + */ + if ( test_bit(X86_FEATURE_IBRSB, fs) ) + __set_bit(X86_FEATURE_STIBP, fs); + if ( test_bit(X86_FEATURE_IBRS, fs) ) + __set_bit(X86_FEATURE_AMD_STIBP, fs); + + /* + * On hardware which supports IBRS/IBPB, we can offer IBPB independently + * of IBRS by using the AMD feature bit. An administrator may wish for + * performance reasons to offer IBPB without IBRS. + */ + if ( host_cpu_policy.feat.ibrsb ) + __set_bit(X86_FEATURE_IBPB, fs); +} + static void __init calculate_pv_max_policy(void) { struct cpu_policy *p = &pv_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_max_featuremask[i]; + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); + + p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ p->arch_caps.raw = 0; /* Not supported yet. */ } @@ -63,15 +509,83 @@ static void __init calculate_pv_max_policy(void) static void __init calculate_pv_def_policy(void) { struct cpu_policy *p = &pv_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; *p = pv_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= pv_def_featuremask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } static void __init calculate_hvm_max_policy(void) { struct cpu_policy *p = &hvm_max_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = host_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_max_featuremask : hvm_shadow_max_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + /* + * Xen can provide an (x2)APIC emulation to HVM guests even if the host's + * (x2)APIC isn't enabled. + */ + __set_bit(X86_FEATURE_APIC, fs); + __set_bit(X86_FEATURE_X2APIC, fs); + + /* + * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in + * long mode (and init_amd() has cleared it out of host capabilities), but + * HVM guests are able if running in protected mode. + */ + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && + raw_cpu_policy.basic.sep ) + __set_bit(X86_FEATURE_SEP, fs); + + /* + * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional + * availability, or admin choice), hide the feature. + */ + if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + { + __clear_bit(X86_FEATURE_IBRSB, fs); + __clear_bit(X86_FEATURE_IBRS, fs); + } + + /* + * With VT-x, some features are only supported by Xen if dedicated + * hardware support is also available. + */ + if ( cpu_has_vmx ) + { + if ( !cpu_has_vmx_mpx ) + __clear_bit(X86_FEATURE_MPX, fs); + + if ( !cpu_has_vmx_xsaves ) + __clear_bit(X86_FEATURE_XSAVES, fs); + } + + guest_common_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; @@ -82,8 +596,25 @@ static void __init calculate_hvm_max_policy(void) static void __init calculate_hvm_def_policy(void) { struct cpu_policy *p = &hvm_def_cpu_policy; + uint32_t fs[FSCAPINTS]; + unsigned int i; + const uint32_t *mask; *p = hvm_max_cpu_policy; + x86_cpu_policy_to_featureset(p, fs); + + mask = hvm_hap_supported() ? + hvm_hap_def_featuremask : hvm_shadow_def_featuremask; + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + fs[i] &= mask[i]; + + guest_common_feature_adjustments(fs); + guest_common_default_feature_adjustments(fs); + + sanitise_featureset(fs); + x86_cpu_featureset_to_policy(fs, p); + recalculate_xstate(p); } void __init init_guest_cpu_policies(void) @@ -149,3 +680,188 @@ int init_domain_cpu_policy(struct domain *d) return 0; } + +void recalculate_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + const struct cpu_policy *max = is_pv_domain(d) + ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) + : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); + uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; + unsigned int i; + + if ( !max ) + { + ASSERT_UNREACHABLE(); + return; + } + + p->x86_vendor = x86_cpuid_lookup_vendor( + p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); + + p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); + p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); + p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, + ((p->x86_vendor & (X86_VENDOR_AMD | + X86_VENDOR_HYGON)) + ? CPUID_GUEST_NR_EXTD_AMD + : CPUID_GUEST_NR_EXTD_INTEL) - 1); + + x86_cpu_policy_to_featureset(p, fs); + x86_cpu_policy_to_featureset(max, max_fs); + + if ( is_hvm_domain(d) ) + { + /* + * HVM domains using Shadow paging have further restrictions on their + * available paging features. + */ + if ( !hap_enabled(d) ) + { + for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) + max_fs[i] &= hvm_shadow_max_featuremask[i]; + } + + /* Hide nested-virt if it hasn't been explicitly configured. */ + if ( !nestedhvm_enabled(d) ) + { + __clear_bit(X86_FEATURE_VMX, max_fs); + __clear_bit(X86_FEATURE_SVM, max_fs); + } + } + + /* + * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits + * affect how to interpret topology information in other cpuid leaves. + */ + __set_bit(X86_FEATURE_HTT, max_fs); + __set_bit(X86_FEATURE_X2APIC, max_fs); + __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); + + /* + * 32bit PV domains can't use any Long Mode features, and cannot use + * SYSCALL on non-AMD hardware. + */ + if ( is_pv_32bit_domain(d) ) + { + __clear_bit(X86_FEATURE_LM, max_fs); + if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + __clear_bit(X86_FEATURE_SYSCALL, max_fs); + } + + /* Clamp the toolstacks choices to reality. */ + for ( i = 0; i < ARRAY_SIZE(fs); i++ ) + fs[i] &= max_fs[i]; + + if ( p->basic.max_leaf < XSTATE_CPUID ) + __clear_bit(X86_FEATURE_XSAVE, fs); + + sanitise_featureset(fs); + + /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ + fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); + fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & + (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | + cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); + + x86_cpu_featureset_to_policy(fs, p); + + /* Pass host cacheline size through to guests. */ + p->basic.clflush_size = max->basic.clflush_size; + + p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); + p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, + paging_max_paddr_bits(d)); + p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, + (p->basic.pae || p->basic.pse36) ? 36 : 32); + + p->extd.maxlinaddr = p->extd.lm ? 48 : 32; + + recalculate_xstate(p); + recalculate_misc(p); + + for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) + { + if ( p->cache.subleaf[i].type >= 1 && + p->cache.subleaf[i].type <= 3 ) + { + /* Subleaf has a valid cache type. Zero reserved fields. */ + p->cache.raw[i].a &= 0xffffc3ffu; + p->cache.raw[i].d &= 0x00000007u; + } + else + { + /* Subleaf is not valid. Zero the rest of the union. */ + zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); + break; + } + } + + if ( vpmu_mode == XENPMU_MODE_OFF || + ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) + p->basic.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.svm ) + p->extd.raw[0xa] = EMPTY_LEAF; + + if ( !p->extd.page1gb ) + p->extd.raw[0x19] = EMPTY_LEAF; +} + +void __init init_dom0_cpuid_policy(struct domain *d) +{ + struct cpu_policy *p = d->arch.cpuid; + + /* dom0 can't migrate. Give it ITSC if available. */ + if ( cpu_has_itsc ) + p->extd.itsc = true; + + /* + * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, + * so dom0 can turn off workarounds as appropriate. Temporary, until the + * domain policy logic gains a better understanding of MSRs. + */ + if ( cpu_has_arch_caps ) + p->feat.arch_caps = true; + + /* Apply dom0-cpuid= command line settings, if provided. */ + if ( dom0_cpuid_cmdline ) + { + uint32_t fs[FSCAPINTS]; + unsigned int i; + + x86_cpu_policy_to_featureset(p, fs); + + for ( i = 0; i < ARRAY_SIZE(fs); ++i ) + { + fs[i] |= dom0_enable_feat [i]; + fs[i] &= ~dom0_disable_feat[i]; + } + + x86_cpu_featureset_to_policy(fs, p); + + recalculate_cpuid_policy(d); + } +} + +static void __init __maybe_unused build_assertions(void) +{ + BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); + BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); + + /* Find some more clever allocation scheme if this trips. */ + BUILD_BUG_ON(sizeof(struct cpu_policy) > PAGE_SIZE); + + BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != + sizeof(raw_cpu_policy.basic.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != + sizeof(raw_cpu_policy.feat.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != + sizeof(raw_cpu_policy.xstate.raw)); + BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != + sizeof(raw_cpu_policy.extd.raw)); +} diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index afebd7c990..aa1af2e1cc 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -1,601 +1,15 @@ -#include -#include -#include #include #include +#include + +#include + #include #include -#include -#include -#include #include -#include -#include -#include #include -const uint32_t known_features[] = INIT_KNOWN_FEATURES; - -static const uint32_t __initconst pv_max_featuremask[] = INIT_PV_MAX_FEATURES; -static const uint32_t hvm_shadow_max_featuremask[] = INIT_HVM_SHADOW_MAX_FEATURES; -static const uint32_t __initconst hvm_hap_max_featuremask[] = - INIT_HVM_HAP_MAX_FEATURES; -static const uint32_t __initconst pv_def_featuremask[] = INIT_PV_DEF_FEATURES; -static const uint32_t __initconst hvm_shadow_def_featuremask[] = - INIT_HVM_SHADOW_DEF_FEATURES; -static const uint32_t __initconst hvm_hap_def_featuremask[] = - INIT_HVM_HAP_DEF_FEATURES; -static const uint32_t deep_features[] = INIT_DEEP_FEATURES; - -static const struct feature_name { - const char *name; - unsigned int bit; -} feature_names[] __initconstrel = INIT_FEATURE_NAMES; - -/* - * Parse a list of cpuid feature names -> bool, calling the callback for any - * matches found. - * - * always_inline, because this is init code only and we really don't want a - * function pointer call in the middle of the loop. - */ -static int __init always_inline parse_cpuid( - const char *s, void (*callback)(unsigned int feat, bool val)) -{ - const char *ss; - int val, rc = 0; - - do { - const struct feature_name *lhs, *rhs, *mid = NULL /* GCC... */; - const char *feat; - - ss = strchr(s, ','); - if ( !ss ) - ss = strchr(s, '\0'); - - /* Skip the 'no-' prefix for name comparisons. */ - feat = s; - if ( strncmp(s, "no-", 3) == 0 ) - feat += 3; - - /* (Re)initalise lhs and rhs for binary search. */ - lhs = feature_names; - rhs = feature_names + ARRAY_SIZE(feature_names); - - while ( lhs < rhs ) - { - int res; - - mid = lhs + (rhs - lhs) / 2; - res = cmdline_strcmp(feat, mid->name); - - if ( res < 0 ) - { - rhs = mid; - continue; - } - if ( res > 0 ) - { - lhs = mid + 1; - continue; - } - - if ( (val = parse_boolean(mid->name, s, ss)) >= 0 ) - { - callback(mid->bit, val); - mid = NULL; - } - - break; - } - - /* - * Mid being NULL means that the name and boolean were successfully - * identified. Everything else is an error. - */ - if ( mid ) - rc = -EINVAL; - - s = ss + 1; - } while ( *ss ); - - return rc; -} - -static void __init _parse_xen_cpuid(unsigned int feat, bool val) -{ - if ( !val ) - setup_clear_cpu_cap(feat); - else if ( feat == X86_FEATURE_RDRAND && - (cpuid_ecx(1) & cpufeat_mask(X86_FEATURE_RDRAND)) ) - setup_force_cpu_cap(X86_FEATURE_RDRAND); -} - -static int __init parse_xen_cpuid(const char *s) -{ - return parse_cpuid(s, _parse_xen_cpuid); -} -custom_param("cpuid", parse_xen_cpuid); - -static bool __initdata dom0_cpuid_cmdline; -static uint32_t __initdata dom0_enable_feat[FSCAPINTS]; -static uint32_t __initdata dom0_disable_feat[FSCAPINTS]; - -static void __init _parse_dom0_cpuid(unsigned int feat, bool val) -{ - __set_bit (feat, val ? dom0_enable_feat : dom0_disable_feat); - __clear_bit(feat, val ? dom0_disable_feat : dom0_enable_feat ); -} - -static int __init parse_dom0_cpuid(const char *s) -{ - dom0_cpuid_cmdline = true; - - return parse_cpuid(s, _parse_dom0_cpuid); -} -custom_param("dom0-cpuid", parse_dom0_cpuid); - #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void zero_leaves(struct cpuid_leaf *l, - unsigned int first, unsigned int last) -{ - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); -} - -static void sanitise_featureset(uint32_t *fs) -{ - /* for_each_set_bit() uses unsigned longs. Extend with zeroes. */ - uint32_t disabled_features[ - ROUNDUP(FSCAPINTS, sizeof(unsigned long)/sizeof(uint32_t))] = {}; - unsigned int i; - - for ( i = 0; i < FSCAPINTS; ++i ) - { - /* Clamp to known mask. */ - fs[i] &= known_features[i]; - - /* - * Identify which features with deep dependencies have been - * disabled. - */ - disabled_features[i] = ~fs[i] & deep_features[i]; - } - - for_each_set_bit(i, (void *)disabled_features, - sizeof(disabled_features) * 8) - { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); - unsigned int j; - - ASSERT(dfs); /* deep_features[] should guarentee this. */ - - for ( j = 0; j < FSCAPINTS; ++j ) - { - fs[j] &= ~dfs[j]; - disabled_features[j] &= ~dfs[j]; - } - } -} - -static void recalculate_xstate(struct cpuid_policy *p) -{ - uint64_t xstates = XSTATE_FP_SSE; - uint32_t xstate_size = XSTATE_AREA_MIN_SIZE; - unsigned int i, Da1 = p->xstate.Da1; - - /* - * The Da1 leaf is the only piece of information preserved in the common - * case. Everything else is derived from other feature state. - */ - memset(&p->xstate, 0, sizeof(p->xstate)); - - if ( !p->basic.xsave ) - return; - - if ( p->basic.avx ) - { - xstates |= X86_XCR0_YMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_YMM_POS] + - xstate_sizes[X86_XCR0_YMM_POS]); - } - - if ( p->feat.mpx ) - { - xstates |= X86_XCR0_BNDREGS | X86_XCR0_BNDCSR; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_BNDCSR_POS] + - xstate_sizes[X86_XCR0_BNDCSR_POS]); - } - - if ( p->feat.avx512f ) - { - xstates |= X86_XCR0_OPMASK | X86_XCR0_ZMM | X86_XCR0_HI_ZMM; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_HI_ZMM_POS] + - xstate_sizes[X86_XCR0_HI_ZMM_POS]); - } - - if ( p->feat.pku ) - { - xstates |= X86_XCR0_PKRU; - xstate_size = max(xstate_size, - xstate_offsets[X86_XCR0_PKRU_POS] + - xstate_sizes[X86_XCR0_PKRU_POS]); - } - - p->xstate.max_size = xstate_size; - p->xstate.xcr0_low = xstates & ~XSTATE_XSAVES_ONLY; - p->xstate.xcr0_high = (xstates & ~XSTATE_XSAVES_ONLY) >> 32; - - p->xstate.Da1 = Da1; - if ( p->xstate.xsaves ) - { - p->xstate.xss_low = xstates & XSTATE_XSAVES_ONLY; - p->xstate.xss_high = (xstates & XSTATE_XSAVES_ONLY) >> 32; - } - else - xstates &= ~XSTATE_XSAVES_ONLY; - - for ( i = 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) - { - uint64_t curr_xstate = 1ul << i; - - if ( !(xstates & curr_xstate) ) - continue; - - p->xstate.comp[i].size = xstate_sizes[i]; - p->xstate.comp[i].offset = xstate_offsets[i]; - p->xstate.comp[i].xss = curr_xstate & XSTATE_XSAVES_ONLY; - p->xstate.comp[i].align = curr_xstate & xstate_align; - } -} - -/* - * Misc adjustments to the policy. Mostly clobbering reserved fields and - * duplicating shared fields. Intentionally hidden fields are annotated. - */ -static void recalculate_misc(struct cpuid_policy *p) -{ - p->basic.raw_fms &= 0x0fff0fff; /* Clobber Processor Type on Intel. */ - p->basic.apic_id = 0; /* Dynamic. */ - - p->basic.raw[0x5] = EMPTY_LEAF; /* MONITOR not exposed to guests. */ - p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */ - - p->basic.raw[0x8] = EMPTY_LEAF; - - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - - p->basic.raw[0xc] = EMPTY_LEAF; - - p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES; - - /* Most of Power/RAS hidden from guests. */ - p->extd.raw[0x7].a = p->extd.raw[0x7].b = p->extd.raw[0x7].c = 0; - - p->extd.raw[0x8].d = 0; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - p->basic.l2_nr_queries = 1; /* Fixed to 1 query. */ - p->basic.raw[0x3] = EMPTY_LEAF; /* PSN - always hidden. */ - p->basic.raw[0x9] = EMPTY_LEAF; /* DCA - always hidden. */ - - p->extd.vendor_ebx = 0; - p->extd.vendor_ecx = 0; - p->extd.vendor_edx = 0; - - p->extd.raw[0x1].a = p->extd.raw[0x1].b = 0; - - p->extd.raw[0x5] = EMPTY_LEAF; - p->extd.raw[0x6].a = p->extd.raw[0x6].b = p->extd.raw[0x6].d = 0; - - p->extd.raw[0x8].a &= 0x0000ffff; - p->extd.raw[0x8].c = 0; - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - zero_leaves(p->basic.raw, 0x2, 0x3); - memset(p->cache.raw, 0, sizeof(p->cache.raw)); - zero_leaves(p->basic.raw, 0x9, 0xa); - - p->extd.vendor_ebx = p->basic.vendor_ebx; - p->extd.vendor_ecx = p->basic.vendor_ecx; - p->extd.vendor_edx = p->basic.vendor_edx; - - p->extd.raw_fms = p->basic.raw_fms; - p->extd.raw[0x1].b &= 0xff00ffff; - p->extd.e1d |= p->basic._1d & CPUID_COMMON_1D_FEATURES; - - p->extd.raw[0x8].a &= 0x0000ffff; /* GuestMaxPhysAddr hidden. */ - p->extd.raw[0x8].c &= 0x0003f0ff; - - p->extd.raw[0x9] = EMPTY_LEAF; - - zero_leaves(p->extd.raw, 0xb, 0x18); - - /* 0x19 - TLB details. Pass through. */ - /* 0x1a - Perf hints. Pass through. */ - - p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */ - p->extd.raw[0x1c] = EMPTY_LEAF; /* LWP - not supported. */ - p->extd.raw[0x1d] = EMPTY_LEAF; /* TopoExt Cache */ - p->extd.raw[0x1e] = EMPTY_LEAF; /* TopoExt APIC ID/Core/Node */ - p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */ - p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */ - break; - } -} - -static void __init calculate_raw_policy(void) -{ - struct cpuid_policy *p = &raw_cpu_policy; - - x86_cpuid_policy_fill_native(p); - - /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ - ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); -} - -static void __init calculate_host_policy(void) -{ - struct cpuid_policy *p = &host_cpu_policy; - unsigned int max_extd_leaf; - - *p = raw_cpu_policy; - - p->basic.max_leaf = - min_t(uint32_t, p->basic.max_leaf, ARRAY_SIZE(p->basic.raw) - 1); - p->feat.max_subleaf = - min_t(uint32_t, p->feat.max_subleaf, ARRAY_SIZE(p->feat.raw) - 1); - - max_extd_leaf = p->extd.max_leaf; - - /* - * For AMD/Hygon hardware before Zen3, we unilaterally modify LFENCE to be - * dispatch serialising for Spectre mitigations. Extend max_extd_leaf - * beyond what hardware supports, to include the feature leaf containing - * this information. - */ - if ( cpu_has_lfence_dispatch ) - max_extd_leaf = max(max_extd_leaf, 0x80000021); - - p->extd.max_leaf = 0x80000000 | min_t(uint32_t, max_extd_leaf & 0xffff, - ARRAY_SIZE(p->extd.raw) - 1); - - x86_cpu_featureset_to_policy(boot_cpu_data.x86_capability, p); - recalculate_xstate(p); - recalculate_misc(p); - - /* When vPMU is disabled, drop it from the host policy. */ - if ( vpmu_mode == XENPMU_MODE_OFF ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( p->extd.svm ) - { - /* Clamp to implemented features which require hardware support. */ - p->extd.raw[0xa].d &= ((1u << SVM_FEATURE_NPT) | - (1u << SVM_FEATURE_LBRV) | - (1u << SVM_FEATURE_NRIPS) | - (1u << SVM_FEATURE_PAUSEFILTER) | - (1u << SVM_FEATURE_DECODEASSISTS)); - /* Enable features which are always emulated. */ - p->extd.raw[0xa].d |= ((1u << SVM_FEATURE_VMCBCLEAN) | - (1u << SVM_FEATURE_TSCRATEMSR)); - } -} - -static void __init guest_common_default_feature_adjustments(uint32_t *fs) -{ - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); - - /* - * On certain hardware, speculative or errata workarounds can result in - * TSX being placed in "force-abort" mode, where it doesn't actually - * function as expected, but is technically compatible with the ISA. - * - * Do not advertise RTM to guests by default if it won't actually work. - */ - if ( rtm_disabled ) - __clear_bit(X86_FEATURE_RTM, fs); -} - -static void __init guest_common_feature_adjustments(uint32_t *fs) -{ - /* Unconditionally claim to be able to set the hypervisor bit. */ - __set_bit(X86_FEATURE_HYPERVISOR, fs); - - /* - * If IBRS is offered to the guest, unconditionally offer STIBP. It is a - * nop on non-HT hardware, and has this behaviour to make heterogeneous - * setups easier to manage. - */ - if ( test_bit(X86_FEATURE_IBRSB, fs) ) - __set_bit(X86_FEATURE_STIBP, fs); - if ( test_bit(X86_FEATURE_IBRS, fs) ) - __set_bit(X86_FEATURE_AMD_STIBP, fs); - - /* - * On hardware which supports IBRS/IBPB, we can offer IBPB independently - * of IBRS by using the AMD feature bit. An administrator may wish for - * performance reasons to offer IBPB without IBRS. - */ - if ( host_cpu_policy.feat.ibrsb ) - __set_bit(X86_FEATURE_IBPB, fs); -} - -static void __init calculate_pv_max_policy(void) -{ - struct cpuid_policy *p = &pv_max_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_max_featuremask[i]; - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for PV guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_PV) ) - { - __clear_bit(X86_FEATURE_IBRSB, pv_featureset); - __clear_bit(X86_FEATURE_IBRS, pv_featureset); - } - - guest_common_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); - - p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct cpuid_policy *p = &pv_def_cpu_policy; - uint32_t pv_featureset[FSCAPINTS]; - unsigned int i; - - *p = pv_max_cpu_policy; - x86_cpu_policy_to_featureset(p, pv_featureset); - - for ( i = 0; i < ARRAY_SIZE(pv_featureset); ++i ) - pv_featureset[i] &= pv_def_featuremask[i]; - - guest_common_feature_adjustments(pv_featureset); - guest_common_default_feature_adjustments(pv_featureset); - - sanitise_featureset(pv_featureset); - x86_cpu_featureset_to_policy(pv_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_max_policy(void) -{ - struct cpuid_policy *p = &hvm_max_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = host_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_max_featuremask : hvm_shadow_max_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - /* - * Xen can provide an (x2)APIC emulation to HVM guests even if the host's - * (x2)APIC isn't enabled. - */ - __set_bit(X86_FEATURE_APIC, hvm_featureset); - __set_bit(X86_FEATURE_X2APIC, hvm_featureset); - - /* - * On AMD, PV guests are entirely unable to use SYSENTER as Xen runs in - * long mode (and init_amd() has cleared it out of host capabilities), but - * HVM guests are able if running in protected mode. - */ - if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) && - raw_cpu_policy.basic.sep ) - __set_bit(X86_FEATURE_SEP, hvm_featureset); - - /* - * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional - * availability, or admin choice), hide the feature. - */ - if ( !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) - { - __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); - __clear_bit(X86_FEATURE_IBRS, hvm_featureset); - } - - /* - * With VT-x, some features are only supported by Xen if dedicated - * hardware support is also available. - */ - if ( cpu_has_vmx ) - { - if ( !cpu_has_vmx_mpx ) - __clear_bit(X86_FEATURE_MPX, hvm_featureset); - - if ( !cpu_has_vmx_xsaves ) - __clear_bit(X86_FEATURE_XSAVES, hvm_featureset); - } - - guest_common_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -static void __init calculate_hvm_def_policy(void) -{ - struct cpuid_policy *p = &hvm_def_cpu_policy; - uint32_t hvm_featureset[FSCAPINTS]; - unsigned int i; - const uint32_t *hvm_featuremask; - - *p = hvm_max_cpu_policy; - x86_cpu_policy_to_featureset(p, hvm_featureset); - - hvm_featuremask = hvm_hap_supported() ? - hvm_hap_def_featuremask : hvm_shadow_def_featuremask; - - for ( i = 0; i < ARRAY_SIZE(hvm_featureset); ++i ) - hvm_featureset[i] &= hvm_featuremask[i]; - - guest_common_feature_adjustments(hvm_featureset); - guest_common_default_feature_adjustments(hvm_featureset); - - sanitise_featureset(hvm_featureset); - x86_cpu_featureset_to_policy(hvm_featureset, p); - recalculate_xstate(p); -} - -void __init init_guest_cpuid(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} bool recheck_cpu_features(unsigned int cpu) { @@ -619,170 +33,6 @@ bool recheck_cpu_features(unsigned int cpu) return okay; } -void recalculate_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - const struct cpuid_policy *max = is_pv_domain(d) - ? (IS_ENABLED(CONFIG_PV) ? &pv_max_cpu_policy : NULL) - : (IS_ENABLED(CONFIG_HVM) ? &hvm_max_cpu_policy : NULL); - uint32_t fs[FSCAPINTS], max_fs[FSCAPINTS]; - unsigned int i; - - if ( !max ) - { - ASSERT_UNREACHABLE(); - return; - } - - p->x86_vendor = x86_cpuid_lookup_vendor( - p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); - - p->basic.max_leaf = min(p->basic.max_leaf, max->basic.max_leaf); - p->feat.max_subleaf = min(p->feat.max_subleaf, max->feat.max_subleaf); - p->extd.max_leaf = 0x80000000 | min(p->extd.max_leaf & 0xffff, - ((p->x86_vendor & (X86_VENDOR_AMD | - X86_VENDOR_HYGON)) - ? CPUID_GUEST_NR_EXTD_AMD - : CPUID_GUEST_NR_EXTD_INTEL) - 1); - - x86_cpu_policy_to_featureset(p, fs); - x86_cpu_policy_to_featureset(max, max_fs); - - if ( is_hvm_domain(d) ) - { - /* - * HVM domains using Shadow paging have further restrictions on their - * available paging features. - */ - if ( !hap_enabled(d) ) - { - for ( i = 0; i < ARRAY_SIZE(max_fs); i++ ) - max_fs[i] &= hvm_shadow_max_featuremask[i]; - } - - /* Hide nested-virt if it hasn't been explicitly configured. */ - if ( !nestedhvm_enabled(d) ) - { - __clear_bit(X86_FEATURE_VMX, max_fs); - __clear_bit(X86_FEATURE_SVM, max_fs); - } - } - - /* - * Allow the toolstack to set HTT, X2APIC and CMP_LEGACY. These bits - * affect how to interpret topology information in other cpuid leaves. - */ - __set_bit(X86_FEATURE_HTT, max_fs); - __set_bit(X86_FEATURE_X2APIC, max_fs); - __set_bit(X86_FEATURE_CMP_LEGACY, max_fs); - - /* - * 32bit PV domains can't use any Long Mode features, and cannot use - * SYSCALL on non-AMD hardware. - */ - if ( is_pv_32bit_domain(d) ) - { - __clear_bit(X86_FEATURE_LM, max_fs); - if ( !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - __clear_bit(X86_FEATURE_SYSCALL, max_fs); - } - - /* Clamp the toolstacks choices to reality. */ - for ( i = 0; i < ARRAY_SIZE(fs); i++ ) - fs[i] &= max_fs[i]; - - if ( p->basic.max_leaf < XSTATE_CPUID ) - __clear_bit(X86_FEATURE_XSAVE, fs); - - sanitise_featureset(fs); - - /* Fold host's FDP_EXCP_ONLY and NO_FPU_SEL into guest's view. */ - fs[FEATURESET_7b0] &= ~(cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL)); - fs[FEATURESET_7b0] |= (host_cpu_policy.feat._7b0 & - (cpufeat_mask(X86_FEATURE_FDP_EXCP_ONLY) | - cpufeat_mask(X86_FEATURE_NO_FPU_SEL))); - - x86_cpu_featureset_to_policy(fs, p); - - /* Pass host cacheline size through to guests. */ - p->basic.clflush_size = max->basic.clflush_size; - - p->extd.maxphysaddr = min(p->extd.maxphysaddr, max->extd.maxphysaddr); - p->extd.maxphysaddr = min_t(uint8_t, p->extd.maxphysaddr, - paging_max_paddr_bits(d)); - p->extd.maxphysaddr = max_t(uint8_t, p->extd.maxphysaddr, - (p->basic.pae || p->basic.pse36) ? 36 : 32); - - p->extd.maxlinaddr = p->extd.lm ? 48 : 32; - - recalculate_xstate(p); - recalculate_misc(p); - - for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) - { - if ( p->cache.subleaf[i].type >= 1 && - p->cache.subleaf[i].type <= 3 ) - { - /* Subleaf has a valid cache type. Zero reserved fields. */ - p->cache.raw[i].a &= 0xffffc3ffu; - p->cache.raw[i].d &= 0x00000007u; - } - else - { - /* Subleaf is not valid. Zero the rest of the union. */ - zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); - break; - } - } - - if ( vpmu_mode == XENPMU_MODE_OFF || - ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) ) - p->basic.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.svm ) - p->extd.raw[0xa] = EMPTY_LEAF; - - if ( !p->extd.page1gb ) - p->extd.raw[0x19] = EMPTY_LEAF; -} - -void __init init_dom0_cpuid_policy(struct domain *d) -{ - struct cpuid_policy *p = d->arch.cpuid; - - /* dom0 can't migrate. Give it ITSC if available. */ - if ( cpu_has_itsc ) - p->extd.itsc = true; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( cpu_has_arch_caps ) - p->feat.arch_caps = true; - - /* Apply dom0-cpuid= command line settings, if provided. */ - if ( dom0_cpuid_cmdline ) - { - uint32_t fs[FSCAPINTS]; - unsigned int i; - - x86_cpu_policy_to_featureset(p, fs); - - for ( i = 0; i < ARRAY_SIZE(fs); ++i ) - { - fs[i] |= dom0_enable_feat [i]; - fs[i] &= ~dom0_disable_feat[i]; - } - - x86_cpu_featureset_to_policy(fs, p); - - recalculate_cpuid_policy(d); - } -} - void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { @@ -1153,27 +403,6 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, } } -static void __init __maybe_unused build_assertions(void) -{ - BUILD_BUG_ON(ARRAY_SIZE(known_features) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(pv_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_shadow_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(hvm_hap_max_featuremask) != FSCAPINTS); - BUILD_BUG_ON(ARRAY_SIZE(deep_features) != FSCAPINTS); - - /* Find some more clever allocation scheme if this trips. */ - BUILD_BUG_ON(sizeof(struct cpuid_policy) > PAGE_SIZE); - - BUILD_BUG_ON(sizeof(raw_cpu_policy.basic) != - sizeof(raw_cpu_policy.basic.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.feat) != - sizeof(raw_cpu_policy.feat.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.xstate) != - sizeof(raw_cpu_policy.xstate.raw)); - BUILD_BUG_ON(sizeof(raw_cpu_policy.extd) != - sizeof(raw_cpu_policy.extd.raw)); -} - /* * Local variables: * mode: C diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index ddd001a6ad..bcfb2069b6 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -77,7 +77,6 @@ #include #include #include -#include #include diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 23d6009143..98815934b5 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 8f70d6cf96..63156eaf26 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -50,7 +50,6 @@ #include #include #include -#include #include #include #include @@ -1953,7 +1952,6 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( !tboot_protect_mem_regions() ) panic("Could not protect TXT memory regions\n"); - init_guest_cpuid(); init_guest_cpu_policies(); if ( xen_cpuidle ) diff --git a/xen/include/asm-x86/cpu-policy.h b/xen/include/asm-x86/cpu-policy.h index 13e2a1f86d..b361537a60 100644 --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -18,4 +18,10 @@ void init_guest_cpu_policies(void); /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); +/* Apply dom0-specific tweaks to the CPUID policy. */ +void init_dom0_cpuid_policy(struct domain *d); + +/* Clamp the CPUID policy to reality. */ +void recalculate_cpuid_policy(struct domain *d); + #endif /* X86_CPU_POLICY_H */ diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index 7f81b998ce..b32ba0bbfe 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -8,14 +8,10 @@ #include #include -#include - #include extern const uint32_t known_features[FSCAPINTS]; -void init_guest_cpuid(void); - /* * Expected levelling capabilities (given cpuid vendor/family information), * and levelling capabilities actually available (given MSR probing). @@ -49,13 +45,8 @@ extern struct cpuidmasks cpuidmask_defaults; /* Check that all previously present features are still available. */ bool recheck_cpu_features(unsigned int cpu); -/* Apply dom0-specific tweaks to the CPUID policy. */ -void init_dom0_cpuid_policy(struct domain *d); - -/* Clamp the CPUID policy to reality. */ -void recalculate_cpuid_policy(struct domain *d); - struct vcpu; +struct cpuid_leaf; void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581725.911010 (Exim 4.92) (envelope-from ) id 1qTtpx-000684-3f; Thu, 10 Aug 2023 00:47:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581725.911010; Thu, 10 Aug 2023 00:47:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtpx-00067x-1B; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GYrISTBnEI+u3nCM2TP72xlk3FyaNWd8fDjrNnSQWyA=; b=RYzZojGKVNV84KUhOu1pTO3nCB 5fTcoE9y5AkNf5pF6AzRc2gSIUQKQjtHjlkTY1HVke1s1TOt0pb7vyGzt71fkZrckqfUMYiEqExH+ pgU97V9PqRghwKWDwdj3SPPsXwwHy3QPAHzdccF6b74HNwbo/N3VG6sekowu0uQQsGtc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/emul: Switch x86_emulate_ctxt to cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:47:34 +0000 commit de3fd64b64a34f96bb1c9802743974712ab6c3a7 Author: Andrew Cooper AuthorDate: Mon Apr 3 20:03:57 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/emul: Switch x86_emulate_ctxt to cpu_policy As with struct domain, retain cpuid as a valid alias for local code clarity. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 441b1b2a50ea3656954d75e06d42c96d619ea0fc) --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 2 +- tools/tests/x86_emulator/test_x86_emulator.c | 2 +- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/hvm/emulate.c | 4 ++-- xen/arch/x86/mm/shadow/hvm.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 2 +- xen/arch/x86/pv/ro-page-fault.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.h | 7 +++++-- 8 files changed, 13 insertions(+), 10 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 28285aad24..a5453abc5a 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -896,7 +896,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpuid = &cp, + .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index cbb8f34f58..f9eaaf671c 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -907,7 +907,7 @@ int main(int argc, char **argv) ctxt.regs = ®s; ctxt.force_writeback = 0; - ctxt.cpuid = &cp; + ctxt.cpu_policy = &cp; ctxt.lma = sizeof(void *) == 8; ctxt.addr_size = 8 * sizeof(void *); ctxt.sp_size = 8 * sizeof(void *); diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index adb4f7aca4..3172f9e7ac 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -38,7 +38,7 @@ #define put_stub(stb) ((stb).addr = 0) uint32_t mxcsr_mask = 0x0000ffbf; -struct cpuid_policy cp; +struct cpu_policy cp; static char fpu_save_area[0x4000] __attribute__((__aligned__((64)))); static bool use_xsave; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 7da348b5d4..4f37ae700d 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2776,7 +2776,7 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla) void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, unsigned int errcode) { - struct hvm_emulate_ctxt ctx = {{ 0 }}; + struct hvm_emulate_ctxt ctx = {}; int rc; hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); @@ -2851,7 +2851,7 @@ void hvm_emulate_init_once( hvmemul_ctxt->validate = validate; hvmemul_ctxt->ctxt.regs = regs; - hvmemul_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; } diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index d68796c495..500e96f261 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -322,7 +322,7 @@ const struct x86_emulate_ops *shadow_init_emulation( memset(sh_ctxt, 0, sizeof(*sh_ctxt)); sh_ctxt->ctxt.regs = regs; - sh_ctxt->ctxt.cpuid = curr->domain->arch.cpuid; + sh_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; sh_ctxt->ctxt.lma = hvm_long_mode_active(curr); /* Segment cache initialisation. Primed with CS. */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 274a717979..70631940bc 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1327,7 +1327,7 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpuid = currd->arch.cpuid, + .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 335aa8dc5d..24b2791b4b 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -334,7 +334,7 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpuid = currd->arch.cpuid, + .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index ce8226bd4c..cb9a8c41f2 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -566,8 +566,11 @@ struct x86_emulate_ctxt * Input-only state: */ - /* CPUID Policy for the domain. */ - const struct cpuid_policy *cpuid; + /* CPU policy for the domain. Allow aliases for local code clarity. */ + union { + struct cpu_policy *cpu_policy; + struct cpu_policy *cpuid; + }; /* Set this if writes may have side effects. */ bool force_writeback; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581727.911015 (Exim 4.92) (envelope-from ) id 1qTtq7-0006Bt-5h; Thu, 10 Aug 2023 00:47:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581727.911015; Thu, 10 Aug 2023 00:47:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtq7-0006Bj-2f; Thu, 10 Aug 2023 00:47:47 +0000 Received: by outflank-mailman (input) for mailman id 581727; Thu, 10 Aug 2023 00:47:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtq5-0006BP-3R for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtq5-0001r3-2l for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtq5-0001BK-23 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:47:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BIrzz4gPDG9N8SMMk0FZ8y44OqrT6v7m2IB3FcDeC08=; b=ETiHLbaUzix7k2U+NCvS5P+mZ/ N1vwy88TXd/C8Fev7Rm6X78yXE12acEaULzStV5gXD3PybppbzOyZuty9PAYhc7Qydl8xShu2eGrj G3hTFTlOipkSjieC1G90DqpX/SgKmbh0X3qftGELzykgC3aEHY/440nJoD2I6a1QFh1c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] tools/fuzz: Rework afl-policy-fuzzer Message-Id: Date: Thu, 10 Aug 2023 00:47:45 +0000 commit 3d7662aa2fea84a837ba7c277379490d16bb752a Author: Andrew Cooper AuthorDate: Mon Apr 3 17:14:14 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 tools/fuzz: Rework afl-policy-fuzzer With cpuid_policy and msr_policy merged to form cpu_policy, merge the respective fuzzing logic. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit a16dcd48c2db3f6820a15ea482551d289bd9cdec) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 57 +++++++++++-------------------- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 316eb0efe0..585324e417 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -16,16 +16,19 @@ static bool debug; #define EMPTY_LEAF ((struct cpuid_leaf){}) -static void check_cpuid(struct cpuid_policy *cp) +static void check_policy(struct cpu_policy *cp) { - struct cpuid_policy new = {}; + struct cpu_policy new = {}; size_t data_end; xen_cpuid_leaf_t *leaves = malloc(CPUID_MAX_SERIALISED_LEAVES * sizeof(xen_cpuid_leaf_t)); - unsigned int nr = CPUID_MAX_SERIALISED_LEAVES; + xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * + sizeof(xen_cpuid_leaf_t)); + unsigned int nr_leaves = CPUID_MAX_SERIALISED_LEAVES; + unsigned int nr_msrs = MSR_MAX_SERIALISED_ENTRIES; int rc; - if ( !leaves ) + if ( !leaves || !msrs ) return; /* @@ -49,12 +52,19 @@ static void check_cpuid(struct cpuid_policy *cp) x86_cpuid_policy_recalc_synth(cp); /* Serialise... */ - rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr); + rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); + assert(rc == 0); + assert(nr_leaves <= CPUID_MAX_SERIALISED_LEAVES); + + rc = x86_msr_copy_to_buffer(cp, msrs, &nr_msrs); assert(rc == 0); - assert(nr <= CPUID_MAX_SERIALISED_LEAVES); + assert(nr_msrs <= MSR_MAX_SERIALISED_ENTRIES); /* ... and deserialise. */ - rc = x86_cpuid_copy_from_buffer(&new, leaves, nr, NULL, NULL); + rc = x86_cpuid_copy_from_buffer(&new, leaves, nr_leaves, NULL, NULL); + assert(rc == 0); + + rc = x86_msr_copy_from_buffer(&new, msrs, nr_msrs, NULL); assert(rc == 0); /* The result after serialisation/deserialisaion should be identical... */ @@ -76,28 +86,6 @@ static void check_cpuid(struct cpuid_policy *cp) free(leaves); } -static void check_msr(struct msr_policy *mp) -{ - struct msr_policy new = {}; - xen_msr_entry_t *msrs = malloc(MSR_MAX_SERIALISED_ENTRIES * - sizeof(xen_msr_entry_t)); - unsigned int nr = MSR_MAX_SERIALISED_ENTRIES; - int rc; - - if ( !msrs ) - return; - - rc = x86_msr_copy_to_buffer(mp, msrs, &nr); - assert(rc == 0); - assert(nr <= MSR_MAX_SERIALISED_ENTRIES); - - rc = x86_msr_copy_from_buffer(&new, msrs, nr, NULL); - assert(rc == 0); - assert(memcmp(mp, &new, sizeof(*mp)) == 0); - - free(msrs); -} - int main(int argc, char **argv) { FILE *fp = NULL; @@ -144,8 +132,7 @@ int main(int argc, char **argv) while ( __AFL_LOOP(1000) ) #endif { - struct cpuid_policy *cp = NULL; - struct msr_policy *mp = NULL; + struct cpu_policy *cp = NULL; if ( fp != stdin ) { @@ -160,22 +147,18 @@ int main(int argc, char **argv) } cp = calloc(1, sizeof(*cp)); - mp = calloc(1, sizeof(*mp)); - if ( !cp || !mp ) + if ( !cp ) goto skip; fread(cp, sizeof(*cp), 1, fp); - fread(mp, sizeof(*mp), 1, fp); if ( !feof(fp) ) goto skip; - check_cpuid(cp); - check_msr(mp); + check_policy(cp); skip: free(cp); - free(mp); if ( fp != stdin ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:47:57 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:47:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581728.911020 (Exim 4.92) (envelope-from ) id 1qTtqH-0006FT-7n; Thu, 10 Aug 2023 00:47:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581728.911020; Thu, 10 Aug 2023 00:47:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqH-0006FL-4B; Thu, 10 Aug 2023 00:47:57 +0000 Received: by outflank-mailman (input) for mailman id 581728; Thu, 10 Aug 2023 00:47:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqF-0006F1-6h for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libx86: Update library API for cpu_policy Message-Id: Date: Thu, 10 Aug 2023 00:47:55 +0000 commit c68a43c3a223c180295261826530a78920adc088 Author: Andrew Cooper AuthorDate: Mon Apr 3 14:18:43 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libx86: Update library API for cpu_policy Adjust the API and comments appropriately. x86_cpu_policy_fill_native() will eventually contain MSR reads, but leave a TODO in the short term. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 1b67fccf3b02825f6a036bad06cd17963d0972d2) tools/libs/guest: Fix build following libx86 changes I appear to have lost this hunk somewhere... Fixes: 1b67fccf3b02 ("libx86: Update library API for cpu_policy") Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné (cherry picked from commit 48d76e6da92f9ef76c8468e299349a2f698362fa) --- tools/fuzz/cpu-policy/afl-policy-fuzzer.c | 4 +-- tools/libs/guest/xg_cpuid_x86.c | 2 +- tools/tests/cpu-policy/test-cpu-policy.c | 4 +-- tools/tests/x86_emulator/x86-emulate.c | 2 +- xen/arch/x86/cpu-policy.c | 4 +-- xen/arch/x86/cpu/common.c | 2 +- xen/arch/x86/domctl.c | 2 +- xen/arch/x86/xstate.c | 4 +-- xen/include/xen/lib/x86/cpu-policy.h | 49 ++++++++++++++++++------------- xen/lib/x86/cpuid.c | 26 ++++++++-------- xen/lib/x86/msr.c | 4 +-- 11 files changed, 56 insertions(+), 47 deletions(-) diff --git a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c index 585324e417..11df2f7802 100644 --- a/tools/fuzz/cpu-policy/afl-policy-fuzzer.c +++ b/tools/fuzz/cpu-policy/afl-policy-fuzzer.c @@ -48,8 +48,8 @@ static void check_policy(struct cpu_policy *cp) * Fix up the data in the source policy which isn't expected to survive * serialisation. */ - x86_cpuid_policy_clear_out_of_range_leaves(cp); - x86_cpuid_policy_recalc_synth(cp); + x86_cpu_policy_clear_out_of_range_leaves(cp); + x86_cpu_policy_recalc_synth(cp); /* Serialise... */ rc = x86_cpuid_copy_to_buffer(cp, leaves, &nr_leaves); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 53922922b1..edfe2fe41f 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -558,7 +558,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *dfs; if ( !test_bit(b, disabled_features) || - !(dfs = x86_cpuid_lookup_deep_deps(b)) ) + !(dfs = x86_cpu_policy_lookup_deep_deps(b)) ) continue; for ( i = 0; i < ARRAY_SIZE(disabled_features); ++i ) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index a7c19be63f..88d35c6c8e 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -95,7 +95,7 @@ static void test_cpuid_current(void) printf("Testing CPUID on current CPU\n"); - x86_cpuid_policy_fill_native(&p); + x86_cpu_policy_fill_native(&p); rc = x86_cpuid_copy_to_buffer(&p, leaves, &nr); if ( rc != 0 ) @@ -537,7 +537,7 @@ static void test_cpuid_out_of_range_clearing(void) void *ptr; unsigned int nr_markers; - x86_cpuid_policy_clear_out_of_range_leaves(p); + x86_cpu_policy_clear_out_of_range_leaves(p); /* Count the number of 0xc2's still remaining. */ for ( ptr = p, nr_markers = 0; diff --git a/tools/tests/x86_emulator/x86-emulate.c b/tools/tests/x86_emulator/x86-emulate.c index 3172f9e7ac..babdb59d1b 100644 --- a/tools/tests/x86_emulator/x86-emulate.c +++ b/tools/tests/x86_emulator/x86-emulate.c @@ -85,7 +85,7 @@ bool emul_test_init(void) unsigned long sp; - x86_cpuid_policy_fill_native(&cp); + x86_cpu_policy_fill_native(&cp); /* * The emulator doesn't use these instructions, so can always emulate diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 73195ec7d9..b9cfc2a29f 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -176,7 +176,7 @@ static void sanitise_featureset(uint32_t *fs) for_each_set_bit(i, (void *)disabled_features, sizeof(disabled_features) * 8) { - const uint32_t *dfs = x86_cpuid_lookup_deep_deps(i); + const uint32_t *dfs = x86_cpu_policy_lookup_deep_deps(i); unsigned int j; ASSERT(dfs); /* deep_features[] should guarentee this. */ @@ -347,7 +347,7 @@ static void __init calculate_raw_policy(void) { struct cpu_policy *p = &raw_cpu_policy; - x86_cpuid_policy_fill_native(p); + x86_cpu_policy_fill_native(p); /* Nothing good will come from Xen and libx86 disagreeing on vendor. */ ASSERT(p->x86_vendor == boot_cpu_data.x86_vendor); diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 8b5e32c78b..41ad80756a 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -72,7 +72,7 @@ void __init setup_clear_cpu_cap(unsigned int cap) __builtin_return_address(0), cap); __clear_bit(cap, boot_cpu_data.x86_capability); - dfs = x86_cpuid_lookup_deep_deps(cap); + dfs = x86_cpu_policy_lookup_deep_deps(cap); if (!dfs) return; diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 0ace9cc7c2..f17fc24926 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -76,7 +76,7 @@ static int update_domain_cpu_policy(struct domain *d, goto out; /* Trim any newly-stale out-of-range leaves. */ - x86_cpuid_policy_clear_out_of_range_leaves(new); + x86_cpu_policy_clear_out_of_range_leaves(new); /* Audit the combined dataset. */ ret = x86_cpu_policies_are_compatible(sys, new, &err); diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 3bcc523f80..7d935354ae 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -677,7 +677,7 @@ static bool valid_xcr0(u64 xcr0) int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, const struct xsave_hdr *hdr) { - uint64_t xcr0_max = cpuid_policy_xcr0_max(d->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(d->arch.cpuid); unsigned int i; if ( (hdr->xstate_bv & ~xcr0_accum) || @@ -701,7 +701,7 @@ int validate_xstate(const struct domain *d, uint64_t xcr0, uint64_t xcr0_accum, int handle_xsetbv(u32 index, u64 new_bv) { struct vcpu *curr = current; - uint64_t xcr0_max = cpuid_policy_xcr0_max(curr->domain->arch.cpuid); + uint64_t xcr0_max = cpu_policy_xcr0_max(curr->domain->arch.cpuid); u64 mask; if ( index != XCR_XFEATURE_ENABLED_MASK ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index 57b4633c86..cf7de0f29c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -399,33 +399,38 @@ void x86_cpu_policy_to_featureset(const struct cpu_policy *p, void x86_cpu_featureset_to_policy(const uint32_t fs[FEATURESET_NR_ENTRIES], struct cpu_policy *p); -static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xcr0_max(const struct cpu_policy *p) { return ((uint64_t)p->xstate.xcr0_high << 32) | p->xstate.xcr0_low; } -static inline uint64_t cpuid_policy_xstates(const struct cpuid_policy *p) +static inline uint64_t cpu_policy_xstates(const struct cpu_policy *p) { uint64_t val = p->xstate.xcr0_high | p->xstate.xss_high; return (val << 32) | p->xstate.xcr0_low | p->xstate.xss_low; } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature); +/** + * For a specific feature, look up the dependent features. Returns NULL if + * this feature has no dependencies. Otherwise return a featureset of + * dependent features, which has been recursively flattened. + */ +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature); /** - * Recalculate the content in a CPUID policy which is derived from raw data. + * Recalculate the content in a CPU policy which is derived from raw data. */ -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p); +void x86_cpu_policy_recalc_synth(struct cpu_policy *p); /** - * Fill a CPUID policy using the native CPUID instruction. + * Fill CPU policy using the native CPUID/RDMSR instruction. * * No sanitisation is performed, but synthesised values are calculated. * Values may be influenced by a hypervisor or from masking/faulting * configuration. */ -void x86_cpuid_policy_fill_native(struct cpuid_policy *p); +void x86_cpu_policy_fill_native(struct cpu_policy *p); /** * Clear leaf data beyond the policies max leaf/subleaf settings. @@ -436,7 +441,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p); * with out-of-range leaves with stale content in them. This helper clears * them. */ -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p); +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p); #ifdef __XEN__ #include @@ -449,9 +454,10 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; #endif /** - * Serialise a cpuid_policy object into an array of cpuid leaves. + * Serialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to serialise. + * @param policy The cpu_policy to serialise. * @param leaves The array of leaves to serialise into. * @param nr_entries The number of entries in 'leaves'. * @returns -errno @@ -460,13 +466,14 @@ typedef xen_msr_entry_t msr_entry_buffer_t[]; * leaves array is too short. On success, nr_entries is updated with the * actual number of leaves written. */ -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *policy, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries); /** - * Unserialise a cpuid_policy object from an array of cpuid leaves. + * Unserialise the CPUID leaves of a cpu_policy object into an array of cpuid + * leaves. * - * @param policy The cpuid_policy to unserialise into. + * @param policy The cpu_policy to unserialise into. * @param leaves The array of leaves to unserialise from. * @param nr_entries The number of entries in 'leaves'. * @param err_leaf Optional hint for error diagnostics. @@ -474,21 +481,21 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *policy, * @returns -errno * * Reads at most CPUID_MAX_SERIALISED_LEAVES. May return -ERANGE if an - * incoming leaf is out of range of cpuid_policy, in which case the optional + * incoming leaf is out of range of cpu_policy, in which case the optional * err_* pointers will identify the out-of-range indicies. * * No content validation of in-range leaves is performed. Synthesised data is * recalculated. */ -int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, +int x86_cpuid_copy_from_buffer(struct cpu_policy *policy, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf); /** - * Serialise an msr_policy object into an array. + * Serialise the MSRs of a cpu_policy object into an array. * - * @param policy The msr_policy to serialise. + * @param policy The cpu_policy to serialise. * @param msrs The array of msrs to serialise into. * @param nr_entries The number of entries in 'msrs'. * @returns -errno @@ -497,13 +504,13 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *policy, * buffer array is too short. On success, nr_entries is updated with the * actual number of msrs written. */ -int x86_msr_copy_to_buffer(const struct msr_policy *policy, +int x86_msr_copy_to_buffer(const struct cpu_policy *policy, msr_entry_buffer_t msrs, uint32_t *nr_entries); /** - * Unserialise an msr_policy object from an array of msrs. + * Unserialise the MSRs of a cpu_policy object from an array of msrs. * - * @param policy The msr_policy object to unserialise into. + * @param policy The cpu_policy object to unserialise into. * @param msrs The array of msrs to unserialise from. * @param nr_entries The number of entries in 'msrs'. * @param err_msr Optional hint for error diagnostics. @@ -517,7 +524,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *policy, * * No content validation is performed on the data stored in the policy object. */ -int x86_msr_copy_from_buffer(struct msr_policy *policy, +int x86_msr_copy_from_buffer(struct cpu_policy *policy, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 734e90823a..68aafb4049 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -102,13 +102,13 @@ void x86_cpu_featureset_to_policy( p->feat._7d1 = fs[FEATURESET_7d1]; } -void x86_cpuid_policy_recalc_synth(struct cpuid_policy *p) +void x86_cpu_policy_recalc_synth(struct cpu_policy *p) { p->x86_vendor = x86_cpuid_lookup_vendor( p->basic.vendor_ebx, p->basic.vendor_ecx, p->basic.vendor_edx); } -void x86_cpuid_policy_fill_native(struct cpuid_policy *p) +void x86_cpu_policy_fill_native(struct cpu_policy *p) { unsigned int i; @@ -199,7 +199,7 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) cpuid_count_leaf(0xd, 0, &p->xstate.raw[0]); cpuid_count_leaf(0xd, 1, &p->xstate.raw[1]); - xstates = cpuid_policy_xstates(p); + xstates = cpu_policy_xstates(p); /* This logic will probably need adjusting when XCR0[63] gets used. */ BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); @@ -222,10 +222,12 @@ void x86_cpuid_policy_fill_native(struct cpuid_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - x86_cpuid_policy_recalc_synth(p); + /* TODO MSRs */ + + x86_cpu_policy_recalc_synth(p); } -void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) +void x86_cpu_policy_clear_out_of_range_leaves(struct cpu_policy *p) { unsigned int i; @@ -260,7 +262,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) zero_leaves(p->topo.raw, i, ARRAY_SIZE(p->topo.raw) - 1); } - if ( p->basic.max_leaf < 0xd || !cpuid_policy_xstates(p) ) + if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); else { @@ -268,7 +270,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) > 63); /* First two leaves always valid. Rest depend on xstates. */ - i = max(2, 64 - __builtin_clzll(cpuid_policy_xstates(p))); + i = max(2, 64 - __builtin_clzll(cpu_policy_xstates(p))); zero_leaves(p->xstate.raw, i, ARRAY_SIZE(p->xstate.raw) - 1); @@ -278,7 +280,7 @@ void x86_cpuid_policy_clear_out_of_range_leaves(struct cpuid_policy *p) ARRAY_SIZE(p->extd.raw) - 1); } -const uint32_t *x86_cpuid_lookup_deep_deps(uint32_t feature) +const uint32_t *x86_cpu_policy_lookup_deep_deps(uint32_t feature) { static const uint32_t deep_features[] = INIT_DEEP_FEATURES; static const struct { @@ -333,7 +335,7 @@ static int copy_leaf_to_buffer(uint32_t leaf, uint32_t subleaf, return 0; } -int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, +int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, cpuid_leaf_buffer_t leaves, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -383,7 +385,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, case 0xd: { - uint64_t xstates = cpuid_policy_xstates(p); + uint64_t xstates = cpu_policy_xstates(p); COPY_LEAF(leaf, 0, &p->xstate.raw[0]); COPY_LEAF(leaf, 1, &p->xstate.raw[1]); @@ -419,7 +421,7 @@ int x86_cpuid_copy_to_buffer(const struct cpuid_policy *p, return 0; } -int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, +int x86_cpuid_copy_from_buffer(struct cpu_policy *p, const cpuid_leaf_buffer_t leaves, uint32_t nr_entries, uint32_t *err_leaf, uint32_t *err_subleaf) @@ -522,7 +524,7 @@ int x86_cpuid_copy_from_buffer(struct cpuid_policy *p, } } - x86_cpuid_policy_recalc_synth(p); + x86_cpu_policy_recalc_synth(p); return 0; diff --git a/xen/lib/x86/msr.c b/xen/lib/x86/msr.c index c4d885e7b5..e04b9ca013 100644 --- a/xen/lib/x86/msr.c +++ b/xen/lib/x86/msr.c @@ -23,7 +23,7 @@ static int copy_msr_to_buffer(uint32_t idx, uint64_t val, return 0; } -int x86_msr_copy_to_buffer(const struct msr_policy *p, +int x86_msr_copy_to_buffer(const struct cpu_policy *p, msr_entry_buffer_t msrs, uint32_t *nr_entries_p) { const uint32_t nr_entries = *nr_entries_p; @@ -48,7 +48,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p, return 0; } -int x86_msr_copy_from_buffer(struct msr_policy *p, +int x86_msr_copy_from_buffer(struct cpu_policy *p, const msr_entry_buffer_t msrs, uint32_t nr_entries, uint32_t *err_msr) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581729.911023 (Exim 4.92) (envelope-from ) id 1qTtqQ-0006JG-AP; Thu, 10 Aug 2023 00:48:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581729.911023; Thu, 10 Aug 2023 00:48:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqQ-0006J9-7X; Thu, 10 Aug 2023 00:48:06 +0000 Received: by outflank-mailman (input) for mailman id 581729; Thu, 10 Aug 2023 00:48:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqP-0006J0-B2 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqP-0001rU-AI for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtqP-0001CH-9b for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ndrh+w5NrnQqBjNmXh90F3wuGVM04+lO1/tZecjYwCI=; b=F0p4BghirZut4wiH/xFWwm95oq VupEtfhBrjNjGK0xz9pdeveHKL/xgV/NpWP325B2h3Dzz78ImuCTWhZ6Zlv4B//CUdvuNaQvcx99t fXtAoJXUGSCCZB6c7g8XWOY/Hz7b7X3q1eS/sv0tstoGDKjCHNgC+U8525Joi6DF+n8c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86: Remove temporary {cpuid,msr}_policy defines Message-Id: Date: Thu, 10 Aug 2023 00:48:05 +0000 commit af9e2f87bc6fd67d23a328df8b04f2177bfa3151 Author: Andrew Cooper AuthorDate: Wed Mar 29 13:07:03 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86: Remove temporary {cpuid,msr}_policy defines With all code areas updated, drop the temporary defines and adjust all remaining users. No practical change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 994c1553a158ada9db5ab64c9178a0d23c0a42ce) --- xen/arch/x86/cpu/mcheck/mce_intel.c | 2 +- xen/arch/x86/cpuid.c | 2 +- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/arch/x86/hvm/vlapic.c | 2 +- xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/msr.c | 20 +++++++++----------- xen/arch/x86/pv/domain.c | 2 +- xen/arch/x86/pv/emul-priv-op.c | 4 ++-- xen/arch/x86/traps.c | 2 +- xen/arch/x86/x86_emulate/x86_emulate.c | 6 +++--- xen/include/asm-x86/msr.h | 2 +- xen/include/xen/lib/x86/cpu-policy.h | 4 ---- 14 files changed, 26 insertions(+), 32 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index d364e9bf5a..c72725d81a 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -1001,7 +1001,7 @@ int vmce_intel_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; unsigned int bank = msr - MSR_IA32_MC0_CTL2; switch ( msr ) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index aa1af2e1cc..42da518728 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -37,7 +37,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; *res = EMPTY_LEAF; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 5e40681863..711e52f75f 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -281,7 +281,7 @@ void update_guest_memory_policy(struct vcpu *v, void domain_cpu_policy_changed(struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; struct vcpu *v; if ( is_pv_domain(d) ) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index bcfb2069b6..2e5eaa2e71 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -936,7 +936,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, signed int cr0_pg) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; if ( value & ~EFER_KNOWN_MASK ) return "Unknown bits set"; @@ -973,7 +973,7 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value, /* These bits in CR4 can be set by the guest. */ unsigned long hvm_cr4_guest_valid_bits(const struct domain *d) { - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; bool mce, vmxe; /* Logic broken out simply to aid readability below. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 3f0df0b16a..1c5c086fb8 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -595,7 +595,7 @@ static void svm_cpuid_policy_changed(struct vcpu *v) { struct svm_vcpu *svm = &v->arch.hvm.svm; struct vmcb_struct *vmcb = svm->vmcb; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; u32 bitmap = vmcb_get_exception_intercepts(vmcb); if ( opt_hvm_fep || diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 5e21fb4937..54724e08f4 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1079,7 +1079,7 @@ static void set_x2apic_id(struct vlapic *vlapic) int guest_wrmsr_apic_base(struct vcpu *v, uint64_t value) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; struct vlapic *vlapic = vcpu_vlapic(v); if ( !has_vlapic(v->domain) ) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 775b36433e..889fadaa87 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -597,7 +597,7 @@ void vmx_update_exception_bitmap(struct vcpu *v) static void vmx_cpuid_policy_changed(struct vcpu *v) { - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; int rc = 0; if ( opt_hvm_fep || @@ -3432,7 +3432,7 @@ void vmx_vlapic_msr_changed(struct vcpu *v) static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) { struct vcpu *v = current; - const struct cpuid_policy *cp = v->domain->arch.cpuid; + const struct cpu_policy *cp = v->domain->arch.cpu_policy; HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content); diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 61d74374f8..9091ba4570 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -52,8 +52,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) { const struct vcpu *curr = current; const struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; const struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -137,13 +136,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) goto get_reg; case MSR_INTEL_PLATFORM_INFO: - *val = mp->platform_info.raw; + *val = cp->platform_info.raw; break; case MSR_ARCH_CAPABILITIES: if ( !cp->feat.arch_caps ) goto gp_fault; - *val = mp->arch_caps.raw; + *val = cp->arch_caps.raw; break; case MSR_INTEL_MISC_FEATURES_ENABLES: @@ -310,7 +309,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) * separate CPUID features for this functionality, but only set will be * active. */ -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp) +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp) { bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd; bool psfd = cp->feat.intel_psfd || cp->extd.psfd; @@ -329,8 +328,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) { const struct vcpu *curr = current; struct domain *d = v->domain; - const struct cpuid_policy *cp = d->arch.cpuid; - const struct msr_policy *mp = d->arch.msr; + const struct cpu_policy *cp = d->arch.cpu_policy; struct vcpu_msrs *msrs = v->arch.msrs; int ret = X86EMUL_OKAY; @@ -371,7 +369,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * for backwards compatiblity, the OS should write 0 to it before * trying to access the current microcode version. */ - if ( d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL || val != 0 ) + if ( cp->x86_vendor != X86_VENDOR_INTEL || val != 0 ) goto gp_fault; break; @@ -381,7 +379,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * to AMD CPUs as well (at least the architectural/CPUID part does). */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_AMD ) + cp->x86_vendor != X86_VENDOR_AMD ) goto gp_fault; break; @@ -393,7 +391,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * by any CPUID bit. */ if ( is_pv_domain(d) || - d->arch.cpuid->x86_vendor != X86_VENDOR_INTEL ) + cp->x86_vendor != X86_VENDOR_INTEL ) goto gp_fault; break; @@ -430,7 +428,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting; rsvd = ~0ull; - if ( mp->platform_info.cpuid_faulting ) + if ( cp->platform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; if ( val & rsvd ) diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 98815934b5..39a00c6ec2 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -146,7 +146,7 @@ static void release_compat_l4(struct vcpu *v) unsigned long pv_fixup_guest_cr4(const struct vcpu *v, unsigned long cr4) { - const struct cpuid_policy *p = v->domain->arch.cpuid; + const struct cpu_policy *p = v->domain->arch.cpu_policy; /* Discard attempts to set guest controllable bits outside of the policy. */ cr4 &= ~((p->basic.tsc ? 0 : X86_CR4_TSD) | diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 70631940bc..ed97b1d6fc 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -882,7 +882,7 @@ static int read_msr(unsigned int reg, uint64_t *val, { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false, warn = false; uint64_t tmp; int ret; @@ -1031,7 +1031,7 @@ static int write_msr(unsigned int reg, uint64_t val, { struct vcpu *curr = current; const struct domain *currd = curr->domain; - const struct cpuid_policy *cp = currd->arch.cpuid; + const struct cpu_policy *cp = currd->arch.cpu_policy; bool vpmu_msr = false; int ret; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 963989be95..a4f12ad3ee 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -968,7 +968,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res) { const struct domain *d = v->domain; - const struct cpuid_policy *p = d->arch.cpuid; + const struct cpu_policy *p = d->arch.cpu_policy; uint32_t base = is_viridian_domain(d) ? 0x40000100 : 0x40000000; uint32_t idx = leaf - base; unsigned int limit = is_viridian_domain(d) ? p->hv2_limit : p->hv_limit; diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 247c14dc4e..9cca33ee12 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1923,7 +1923,7 @@ in_protmode( } static bool -_amd_like(const struct cpuid_policy *cp) +_amd_like(const struct cpu_policy *cp) { return cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON); } @@ -1931,7 +1931,7 @@ _amd_like(const struct cpuid_policy *cp) static bool amd_like(const struct x86_emulate_ctxt *ctxt) { - return _amd_like(ctxt->cpuid); + return _amd_like(ctxt->cpu_policy); } #define vcpu_has_fpu() (ctxt->cpuid->basic.fpu) @@ -2077,7 +2077,7 @@ protmode_load_seg( struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - const struct cpuid_policy *cp = ctxt->cpuid; + const struct cpu_policy *cp = ctxt->cpu_policy; enum x86_segment sel_seg = (sel & 4) ? x86_seg_ldtr : x86_seg_gdtr; struct { uint32_t a, b; } desc, desc_hi = {}; uint8_t dpl, rpl; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 60627710f5..c37b9e771b 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -278,7 +278,7 @@ static inline void wrmsr_tsc_aux(uint32_t val) } } -uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); +uint64_t msr_spec_ctrl_valid_bits(const struct cpu_policy *cp); /* Container object for per-vCPU MSRs */ struct vcpu_msrs diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index cf7de0f29c..bfa4250604 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -375,10 +375,6 @@ struct cpu_policy uint8_t x86_vendor; }; -/* Temporary */ -#define cpuid_policy cpu_policy -#define msr_policy cpu_policy - struct cpu_policy_errors { uint32_t leaf, subleaf; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:16 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581730.911027 (Exim 4.92) (envelope-from ) id 1qTtqa-0006Ly-Bu; Thu, 10 Aug 2023 00:48:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581730.911027; Thu, 10 Aug 2023 00:48:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqa-0006Lq-9B; Thu, 10 Aug 2023 00:48:16 +0000 Received: by outflank-mailman (input) for mailman id 581730; Thu, 10 Aug 2023 00:48:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqZ-0006Lk-E0 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Rework dom0 feature configuration Message-Id: Date: Thu, 10 Aug 2023 00:48:15 +0000 commit d1043f381d290296f7e64a24464d6b8c2e13a951 Author: Andrew Cooper AuthorDate: Fri May 12 13:52:39 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Rework dom0 feature configuration Right now, dom0's feature configuration is split between between the common path and a dom0-specific one. This mostly is by accident, and causes some very subtle bugs. First, start by clearly defining init_dom0_cpuid_policy() to be the domain that Xen builds automatically. The late hwdom case is still constructed in a mostly normal way, with the control domain having full discretion over the CPU policy. Identifying this highlights a latent bug - the two halves of the MSR_ARCH_CAPS bodge are asymmetric with respect to the hardware domain. This means that shim, or a control-only dom0 sees the MSR_ARCH_CAPS CPUID bit but none of the MSR content. This in turn declares the hardware to be retpoline-safe by failing to advertise the {R,}RSBA bits appropriately. Restrict this logic to the hardware domain, although the special case will cease to exist shortly. For the CPUID Faulting adjustment, the comment in ctxt_switch_levelling() isn't actually relevant. Provide a better explanation. Move the recalculate_cpuid_policy() call outside of the dom0-cpuid= case. This is no change for now, but will become necessary shortly. Finally, place the second half of the MSR_ARCH_CAPS bodge after the recalculate_cpuid_policy() call. This is necessary to avoid transiently breaking the hardware domain's view while the handling is cleaned up. This special case will cease to exist shortly. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ef1987fcb0fdfaa7ee148024037cb5fa335a7b2d) --- xen/arch/x86/cpu-policy.c | 57 ++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index b9cfc2a29f..865c1e4ca4 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -651,29 +651,6 @@ int init_domain_cpu_policy(struct domain *d) if ( !p ) return -ENOMEM; - /* See comment in ctxt_switch_levelling() */ - if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) - p->platform_info.cpuid_faulting = false; - - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } - d->arch.cpu_policy = p; recalculate_cpuid_policy(d); @@ -809,11 +786,15 @@ void recalculate_cpuid_policy(struct domain *d) p->extd.raw[0x19] = EMPTY_LEAF; } +/* + * Adjust the CPU policy for dom0. Really, this is "the domain Xen builds + * automatically on boot", and might not have the domid 0 (e.g. pvshim). + */ void __init init_dom0_cpuid_policy(struct domain *d) { struct cpu_policy *p = d->arch.cpuid; - /* dom0 can't migrate. Give it ITSC if available. */ + /* Dom0 doesn't migrate relative to Xen. Give it ITSC if available. */ if ( cpu_has_itsc ) p->extd.itsc = true; @@ -822,7 +803,7 @@ void __init init_dom0_cpuid_policy(struct domain *d) * so dom0 can turn off workarounds as appropriate. Temporary, until the * domain policy logic gains a better understanding of MSRs. */ - if ( cpu_has_arch_caps ) + if ( is_hardware_domain(d) && cpu_has_arch_caps ) p->feat.arch_caps = true; /* Apply dom0-cpuid= command line settings, if provided. */ @@ -840,8 +821,32 @@ void __init init_dom0_cpuid_policy(struct domain *d) } x86_cpu_featureset_to_policy(fs, p); + } + + /* + * PV Control domains used to require unfiltered CPUID. This was fixed in + * Xen 4.13, but there is an cmdline knob to restore the prior behaviour. + * + * If the domain is getting unfiltered CPUID, don't let the guest kernel + * play with CPUID faulting either, as Xen's CPUID path won't cope. + */ + if ( !opt_dom0_cpuid_faulting && is_control_domain(d) && is_pv_domain(d) ) + p->platform_info.cpuid_faulting = false; - recalculate_cpuid_policy(d); + recalculate_cpuid_policy(d); + + if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { + uint64_t val; + + rdmsrl(MSR_ARCH_CAPABILITIES, val); + + p->arch_caps.raw = val & + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | + ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | + ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | + ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581731.911031 (Exim 4.92) (envelope-from ) id 1qTtqk-0006P9-DR; Thu, 10 Aug 2023 00:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581731.911031; Thu, 10 Aug 2023 00:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqk-0006P0-Ai; Thu, 10 Aug 2023 00:48:26 +0000 Received: by outflank-mailman (input) for mailman id 581731; Thu, 10 Aug 2023 00:48:25 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqj-0006Om-Gy for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:25 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqj-0001rl-GC for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:25 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtqj-0001DR-FZ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:25 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OTfzOtgeHLqn0m4zqLDKukGnqf7FC6vYHZzQspsyvxc=; b=m12+L6CiYZS0ZMSU7sH2P2iaCg Vh4/DMLgflbI/fi8tqHa1UMaY70JmlxUO/d3c46kNqyWpXTuJgYKW78kQQKDeNcAi87DTroY4AvT0 9Z8LO6ygeewztHPWuK9CZTgHoDhQtEhY0RYIrl96vHj8F0tsInsYWtPkOrU6ijPtQC/U=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy Message-Id: Date: Thu, 10 Aug 2023 00:48:25 +0000 commit 5b0464b0c92c89164527b40c083137e81c235903 Author: Andrew Cooper AuthorDate: Mon May 15 14:14:53 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Adjust MSR_ARCH_CAPS handling for the Host policy We are about to move MSR_ARCH_CAPS into featureset, but the order of operations (copy raw policy, then copy x86_capabilitiles[] in) will end up clobbering the ARCH_CAPS value. Some toolstacks use this information to handle TSX compatibility across the CPUs and microcode versions where support was removed. To avoid this transient breakage, read from raw_cpu_policy rather than modifying it in place. This logic will be removed entirely in due course. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 43912f8dbb1888ffd7f00adb10724c70e71927c4) --- xen/arch/x86/cpu-policy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 865c1e4ca4..ed56cbbd6c 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -411,7 +411,7 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw &= + p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581732.911036 (Exim 4.92) (envelope-from ) id 1qTtqu-0006Rs-Ff; Thu, 10 Aug 2023 00:48:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581732.911036; Thu, 10 Aug 2023 00:48:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqu-0006Rk-CC; Thu, 10 Aug 2023 00:48:36 +0000 Received: by outflank-mailman (input) for mailman id 581732; Thu, 10 Aug 2023 00:48:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqt-0006Rb-Ju for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:35 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtqt-0001rs-JD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:35 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtqt-0001E6-IW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:35 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GcqCi6Tkyx+SmncBudWvhZLdgR2TC4s6CBLdCFYQ2hw=; b=6tSmQUMOU++x32MdYQoacRulv7 1hs7HZT+bsDkkAFIEmYayhxaE9vtCsV7TRijudYBUuEbxCdkzxAX1tqjF1mRdhrzwFW0PvFIsxHKz 9tjXCg+UTODGRVIm/+IyeVtGoKYJSWmvxj8KUt5SB8V8TSqIBaDsB2AQuHW6FfhJ4VN8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Message-Id: Date: Thu, 10 Aug 2023 00:48:35 +0000 commit 6993afc387a81b0603beef80e3747705ae10b868 Author: Andrew Cooper AuthorDate: Fri May 12 17:55:21 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: Infrastructure for MSR_ARCH_CAPS Bits through 24 are already defined, meaning that we're not far off needing the second word. Put both in right away. As both halves are present now, the arch_caps field is full width. Adjust the unit test, which notices. The bool bitfield names in the arch_caps union are unused, and somewhat out of date. They'll shortly be automatically generated. Add CPUID and MSR prefixes to the ./xen-cpuid verbose output, now that there are a mix of the two. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit d9fe459ffad8a6eac2f695adb2331aff83c345d1) --- tools/misc/xen-cpuid.c | 44 +++++++++++++++---------- tools/tests/cpu-policy/test-cpu-policy.c | 5 --- xen/include/public/arch-x86/cpufeatureset.h | 4 +++ xen/include/xen/lib/x86/cpu-policy.h | 50 ++++++++++++++--------------- xen/lib/x86/cpuid.c | 4 +++ 5 files changed, 59 insertions(+), 48 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index bac32a127a..7da8d36b85 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -206,31 +206,41 @@ static const char *const str_7d2[32] = [ 0] = "intel-psfd", }; +static const char *const str_m10Al[32] = +{ +}; + +static const char *const str_m10Ah[32] = +{ +}; + static const struct { const char *name; const char *abbr; const char *const *strs; } decodes[] = { - { "0x00000001.edx", "1d", str_1d }, - { "0x00000001.ecx", "1c", str_1c }, - { "0x80000001.edx", "e1d", str_e1d }, - { "0x80000001.ecx", "e1c", str_e1c }, - { "0x0000000d:1.eax", "Da1", str_Da1 }, - { "0x00000007:0.ebx", "7b0", str_7b0 }, - { "0x00000007:0.ecx", "7c0", str_7c0 }, - { "0x80000007.edx", "e7d", str_e7d }, - { "0x80000008.ebx", "e8b", str_e8b }, - { "0x00000007:0.edx", "7d0", str_7d0 }, - { "0x00000007:1.eax", "7a1", str_7a1 }, - { "0x80000021.eax", "e21a", str_e21a }, - { "0x00000007:1.ebx", "7b1", str_7b1 }, - { "0x00000007:2.edx", "7d2", str_7d2 }, - { "0x00000007:1.ecx", "7c1", str_7c1 }, - { "0x00000007:1.edx", "7d1", str_7d1 }, + { "CPUID 0x00000001.edx", "1d", str_1d }, + { "CPUID 0x00000001.ecx", "1c", str_1c }, + { "CPUID 0x80000001.edx", "e1d", str_e1d }, + { "CPUID 0x80000001.ecx", "e1c", str_e1c }, + { "CPUID 0x0000000d:1.eax", "Da1", str_Da1 }, + { "CPUID 0x00000007:0.ebx", "7b0", str_7b0 }, + { "CPUID 0x00000007:0.ecx", "7c0", str_7c0 }, + { "CPUID 0x80000007.edx", "e7d", str_e7d }, + { "CPUID 0x80000008.ebx", "e8b", str_e8b }, + { "CPUID 0x00000007:0.edx", "7d0", str_7d0 }, + { "CPUID 0x00000007:1.eax", "7a1", str_7a1 }, + { "CPUID 0x80000021.eax", "e21a", str_e21a }, + { "CPUID 0x00000007:1.ebx", "7b1", str_7b1 }, + { "CPUID 0x00000007:2.edx", "7d2", str_7d2 }, + { "CPUID 0x00000007:1.ecx", "7c1", str_7c1 }, + { "CPUID 0x00000007:1.edx", "7d1", str_7d1 }, + { "MSR_ARCH_CAPS.lo", "m10Al", str_m10Al }, + { "MSR_ARCH_CAPS.hi", "m10Ah", str_m10Ah }, }; -#define COL_ALIGN "18" +#define COL_ALIGN "24" static const char *const fs_names[] = { [XEN_SYSCTL_cpu_featureset_raw] = "Raw", diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-policy/test-cpu-policy.c index 88d35c6c8e..093b980801 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -374,11 +374,6 @@ static void test_msr_deserialise_failure(void) .msr = { .idx = 0xce, .val = ~0ull }, .rc = -EOVERFLOW, }, - { - .name = "truncated val", - .msr = { .idx = 0x10a, .val = ~0ull }, - .rc = -EOVERFLOW, - }, }; printf("Testing MSR deserialise failure:\n"); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 34d5a0648e..d37f104780 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -302,6 +302,10 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ + +/* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h index bfa4250604..6d5e9edd26 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -4,22 +4,24 @@ #include -#define FEATURESET_1d 0 /* 0x00000001.edx */ -#define FEATURESET_1c 1 /* 0x00000001.ecx */ -#define FEATURESET_e1d 2 /* 0x80000001.edx */ -#define FEATURESET_e1c 3 /* 0x80000001.ecx */ -#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ -#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ -#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ -#define FEATURESET_e7d 7 /* 0x80000007.edx */ -#define FEATURESET_e8b 8 /* 0x80000008.ebx */ -#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ -#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ -#define FEATURESET_e21a 11 /* 0x80000021.eax */ -#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ -#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ -#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ -#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_1d 0 /* 0x00000001.edx */ +#define FEATURESET_1c 1 /* 0x00000001.ecx */ +#define FEATURESET_e1d 2 /* 0x80000001.edx */ +#define FEATURESET_e1c 3 /* 0x80000001.ecx */ +#define FEATURESET_Da1 4 /* 0x0000000d:1.eax */ +#define FEATURESET_7b0 5 /* 0x00000007:0.ebx */ +#define FEATURESET_7c0 6 /* 0x00000007:0.ecx */ +#define FEATURESET_e7d 7 /* 0x80000007.edx */ +#define FEATURESET_e8b 8 /* 0x80000008.ebx */ +#define FEATURESET_7d0 9 /* 0x00000007:0.edx */ +#define FEATURESET_7a1 10 /* 0x00000007:1.eax */ +#define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ +#define FEATURESET_7d2 13 /* 0x00000007:2.edx */ +#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */ +#define FEATURESET_7d1 15 /* 0x00000007:1.edx */ +#define FEATURESET_m10Al 16 /* 0x0000010a.eax */ +#define FEATURESET_m10Ah 17 /* 0x0000010a.edx */ struct cpuid_leaf { @@ -350,17 +352,13 @@ struct cpu_policy * fixed in hardware. */ union { - uint32_t raw; + uint64_t raw; + struct { + uint32_t lo, hi; + }; struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; + DECL_BITFIELD(m10Al); + DECL_BITFIELD(m10Ah); }; } arch_caps; diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 68aafb4049..e795ce3750 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -79,6 +79,8 @@ void x86_cpu_policy_to_featureset( fs[FEATURESET_7d2] = p->feat._7d2; fs[FEATURESET_7c1] = p->feat._7c1; fs[FEATURESET_7d1] = p->feat._7d1; + fs[FEATURESET_m10Al] = p->arch_caps.lo; + fs[FEATURESET_m10Ah] = p->arch_caps.hi; } void x86_cpu_featureset_to_policy( @@ -100,6 +102,8 @@ void x86_cpu_featureset_to_policy( p->feat._7d2 = fs[FEATURESET_7d2]; p->feat._7c1 = fs[FEATURESET_7c1]; p->feat._7d1 = fs[FEATURESET_7d1]; + p->arch_caps.lo = fs[FEATURESET_m10Al]; + p->arch_caps.hi = fs[FEATURESET_m10Ah]; } void x86_cpu_policy_recalc_synth(struct cpu_policy *p) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:46 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581733.911039 (Exim 4.92) (envelope-from ) id 1qTtr4-0006Uz-Hr; Thu, 10 Aug 2023 00:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581733.911039; Thu, 10 Aug 2023 00:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtr4-0006Us-FD; Thu, 10 Aug 2023 00:48:46 +0000 Received: by outflank-mailman (input) for mailman id 581733; Thu, 10 Aug 2023 00:48:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtr3-0006Ui-Mx for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtr3-0001sF-MC for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtr3-0001EW-LY for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=C1C4Cj+OvvPMgqJ4ONUVxe4yyIxOELjjy/QnH3ikO9o=; b=ZidTqJ8RB6Pdt5dFl/IJSfJb1v 7G4lhtaTKIPuFMOGiSKyEGXO9RG6f1QD3uWHbPaq5YSmR0t3Zq4Es4VuDfRD5jut3dGJKoYCyACjr MKNQ3sztZFbwJ7xl8H/0nfRC4UkncJIPN/MHjssoQg0CDarfYiMPT4v8Xvfjlj6dE9Ow=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: MSR_ARCH_CAPS feature names Message-Id: Date: Thu, 10 Aug 2023 00:48:45 +0000 commit 31e95de5594d29fff6ae687375de2483ab3cf71d Author: Andrew Cooper AuthorDate: Fri May 12 18:50:59 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: MSR_ARCH_CAPS feature names Seed the default visibility from the dom0 special case, which for the most part just exposes the *_NO bits. EIBRS is the one non-*_NO bit, which is "just" a status bit to the guest indicating a change in implemention of IBRS which is already fully supported. Insert a block dependency from the ARCH_CAPS CPUID bit to the entire content of the MSR. This is because MSRs have no structure information similar to CPUID, and used by x86_cpu_policy_clear_out_of_range_leaves(), in order to bulk-clear inaccessable words. The overall CPUID bit is still max-only, so all of MSR_ARCH_CAPS is hidden in the default policies. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit ce8c930851a5ca21c4e70f83be7e8b290ce1b519) --- tools/misc/xen-cpuid.c | 13 +++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 23 +++++++++++++++++++++++ xen/tools/gen-cpuid.py | 3 +++ 3 files changed, 39 insertions(+) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 7da8d36b85..0ef41e9be6 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -208,6 +208,19 @@ static const char *const str_7d2[32] = static const char *const str_m10Al[32] = { + [ 0] = "rdcl-no", [ 1] = "eibrs", + [ 2] = "rsba", [ 3] = "skip-l1dfl", + [ 4] = "intel-ssb-no", [ 5] = "mds-no", + [ 6] = "if-pschange-mc-no", [ 7] = "tsx-ctrl", + [ 8] = "taa-no", [ 9] = "mcu-ctrl", + [10] = "misc-pkg-ctrl", [11] = "energy-ctrl", + [12] = "doitm", [13] = "sbdr-ssdp-no", + [14] = "fbsdp-no", [15] = "psdp-no", + /* 16 */ [17] = "fb-clear", + [18] = "fb-clear-ctrl", [19] = "rrsba", + [20] = "bhi-no", [21] = "xapic-status", + /* 22 */ [23] = "ovrclk-status", + [24] = "pbrsb-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index d37f104780..bf1fcca522 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -303,6 +303,29 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ +XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ +XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ +XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ +XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ +XEN_CPUFEATURE(IF_PSCHANGE_MC_NO, 16*32+ 6) /*A No Instruction fetch #MC */ +XEN_CPUFEATURE(TSX_CTRL, 16*32+ 7) /* MSR_TSX_CTRL */ +XEN_CPUFEATURE(TAA_NO, 16*32+ 8) /*A No TSX Async Abort */ +XEN_CPUFEATURE(MCU_CTRL, 16*32+ 9) /* MSR_MCU_CTRL */ +XEN_CPUFEATURE(MISC_PKG_CTRL, 16*32+10) /* MSR_MISC_PKG_CTRL */ +XEN_CPUFEATURE(ENERGY_FILTERING, 16*32+11) /* MSR_MISC_PKG_CTRL.ENERGY_FILTERING */ +XEN_CPUFEATURE(DOITM, 16*32+12) /* Data Operand Invariant Timing Mode */ +XEN_CPUFEATURE(SBDR_SSDP_NO, 16*32+13) /*A No Shared Buffer Data Read or Sideband Stale Data Propagation */ +XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Propagation */ +XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ +XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ +XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ +XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ +XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ +XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 2fe409e75e..b090309d78 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -322,6 +322,9 @@ def crunch_numbers(state): # In principle the TSXLDTRK insns could also be considered independent. RTM: [TSXLDTRK], + + # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. + ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:48:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:48:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581737.911053 (Exim 4.92) (envelope-from ) id 1qTtrE-0006ns-S4; Thu, 10 Aug 2023 00:48:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581737.911053; Thu, 10 Aug 2023 00:48:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrE-0006nj-P7; Thu, 10 Aug 2023 00:48:56 +0000 Received: by outflank-mailman (input) for mailman id 581737; Thu, 10 Aug 2023 00:48:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrD-0006nC-Pk for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrD-0001tx-P6 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:55 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtrD-0001F5-OT for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:48:55 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I+u0RaVkerAjFDRbEVHf3EwZnO4egZLQkRWiXcd1SHI=; b=1/d2bX1MvLGQYZhveVtB3PbXWL JOYdZmBA/G6fy/pMVS8QT7DTgcRd7UonQp2i+Czowe0l0O/lEoxfR/OTRUtfTMogRRYeg6enF4XI0 LZ8WhJe6gqRTdkFrvFl4kMpMUgrzee/GqcVX/rSW4EL09SkVMRcNmEhS1j5H2xLmd3ZY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Message-Id: Date: Thu, 10 Aug 2023 00:48:55 +0000 commit 137800ea826bea809914b0e74ca5db7df3c5e4d3 Author: Andrew Cooper AuthorDate: Fri May 12 15:37:02 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Record MSR_ARCH_CAPS for the Raw and Host CPU policy Extend x86_cpu_policy_fill_native() with a read of ARCH_CAPS based on the CPUID information just read, removing the specially handling in calculate_raw_cpu_policy(). Right now, the only use of x86_cpu_policy_fill_native() outside of Xen is the unit tests. Getting MSR data in this context is left to whomever first encounters a genuine need to have it. Extend generic_identify() to read ARCH_CAPS into x86_capability[], which is fed into the Host Policy. This in turn means there's no need to special case arch_caps in calculate_host_policy(). No practical change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 70553000d6b44dd7c271a35932b0b3e1f22c5532) --- xen/arch/x86/cpu-policy.c | 12 ------------ xen/arch/x86/cpu/common.c | 5 +++++ xen/lib/x86/cpuid.c | 7 ++++++- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index ed56cbbd6c..e8681e135a 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -354,9 +354,6 @@ static void __init calculate_raw_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); } static void __init calculate_host_policy(void) @@ -409,15 +406,6 @@ static void __init calculate_host_policy(void) /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); } static void __init guest_common_default_feature_adjustments(uint32_t *fs) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 41ad80756a..2f1b494845 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -449,6 +449,11 @@ static void generic_identify(struct cpuinfo_x86 *c) cpuid_count(0xd, 1, &c->x86_capability[FEATURESET_Da1], &tmp, &tmp, &tmp); + + if (test_bit(X86_FEATURE_ARCH_CAPS, c->x86_capability)) + rdmsr(MSR_ARCH_CAPABILITIES, + c->x86_capability[FEATURESET_m10Al], + c->x86_capability[FEATURESET_m10Ah]); } /* diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index e795ce3750..07e5501914 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -226,7 +226,12 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) p->hv_limit = 0; p->hv2_limit = 0; - /* TODO MSRs */ +#ifdef __XEN__ + /* TODO MSR_PLATFORM_INFO */ + + if ( p->feat.arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +#endif x86_cpu_policy_recalc_synth(p); } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581738.911058 (Exim 4.92) (envelope-from ) id 1qTtrO-0006to-Tw; Thu, 10 Aug 2023 00:49:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581738.911058; Thu, 10 Aug 2023 00:49:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrO-0006tg-Qb; Thu, 10 Aug 2023 00:49:06 +0000 Received: by outflank-mailman (input) for mailman id 581738; Thu, 10 Aug 2023 00:49:06 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrO-0006tD-1J for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/boot: Expose MSR_ARCH_CAPS data in guest max policies Message-Id: Date: Thu, 10 Aug 2023 00:49:05 +0000 commit 541dfe378ac33309c3c4eaf426035235bdb54bf7 Author: Andrew Cooper AuthorDate: Fri May 12 15:53:35 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/boot: Expose MSR_ARCH_CAPS data in guest max policies We already have common and default feature adjustment helpers. Introduce one for max featuresets too. Offer MSR_ARCH_CAPS unconditionally in the max policy, and stop clobbering the data inherited from the Host policy. This will be necessary to level a VM safely for migration. Annotate the ARCH_CAPS CPUID bit as special. Note: ARCH_CAPS is still max-only for now, so will not be inhereted by the default policies. With this done, the special case for dom0 can be shrunk to just resampling the Host policy (as ARCH_CAPS isn't visible by default yet). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit bbb289f3d5bdd3358af748d7c567343532ac45b5) --- xen/arch/x86/cpu-policy.c | 42 ++++++++++++++++------------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 25 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e8681e135a..19d955a9ed 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -408,6 +408,25 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; } +static void __init guest_common_max_feature_adjustments(uint32_t *fs) +{ + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests + * unconditionally, although limit it to Intel systems as it is highly + * uarch-specific. + * + * In particular, the RSBA and RRSBA bits mean "you might migrate to a + * system where RSB underflow uses alternative predictors (a.k.a + * Retpoline not safe)", so these need to be visible to a guest in all + * cases, even when it's only some other server in the pool which + * suffers the identified behaviour. + */ + __set_bit(X86_FEATURE_ARCH_CAPS, fs); + } +} + static void __init guest_common_default_feature_adjustments(uint32_t *fs) { /* @@ -483,6 +502,7 @@ static void __init calculate_pv_max_policy(void) __clear_bit(X86_FEATURE_IBRS, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -490,8 +510,6 @@ static void __init calculate_pv_max_policy(void) recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_pv_def_policy(void) @@ -569,6 +587,7 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_XSAVES, fs); } + guest_common_max_feature_adjustments(fs); guest_common_feature_adjustments(fs); sanitise_featureset(fs); @@ -577,8 +596,6 @@ static void __init calculate_hvm_max_policy(void) /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_def_policy(void) @@ -792,7 +809,10 @@ void __init init_dom0_cpuid_policy(struct domain *d) * domain policy logic gains a better understanding of MSRs. */ if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { p->feat.arch_caps = true; + p->arch_caps.raw = host_cpu_policy.arch_caps.raw; + } /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) @@ -822,20 +842,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) p->platform_info.cpuid_faulting = false; recalculate_cpuid_policy(d); - - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } } static void __init __maybe_unused build_assertions(void) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index bf1fcca522..6b24a33a94 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -282,7 +282,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581740.911061 (Exim 4.92) (envelope-from ) id 1qTtrY-00072w-Um; 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Thu, 10 Aug 2023 00:49:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YMS7rGwQVOvX3yWYlcSb5JedLEKs2uJJP4j+l1m1GSo=; b=LjhDMq8nFsvIZ/8cRG+TlZuQdS C2xQv1IR9PaUbwIx8kCPlk32+6pxnlLYJ84pLIWl3w1Q/jSd+3H+Sbx1hixhqV+jR9Xm9noui08Si PCiwm5EPLaAvHXV0dVqrTwynlofWn/9YfivGhm7TDo3UAOyFaDLR8J/GxBGOqZv607wA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/vtx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:49:15 +0000 commit 290a645bfdddb4a83edcdc15f11f33f510d578b1 Author: Andrew Cooper AuthorDate: Mon May 15 16:59:25 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3) --- xen/arch/x86/hvm/vmx/vmx.c | 8 ++------ xen/include/asm-x86/cpufeature.h | 3 +++ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 889fadaa87..54023a9258 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2640,8 +2640,6 @@ static void __init ler_to_fixup_check(void); */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2649,10 +2647,8 @@ static bool __init has_if_pschange_mc(void) if ( cpu_has_hypervisor ) return false; - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 460d38356c..fd5b0b5f7c 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -146,6 +146,9 @@ #define cpu_has_avx_vnni boot_cpu_has(X86_FEATURE_AVX_VNNI) #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581743.911065 (Exim 4.92) (envelope-from ) id 1qTtri-00078t-W8; Thu, 10 Aug 2023 00:49:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581743.911065; Thu, 10 Aug 2023 00:49:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtri-00078m-TU; Thu, 10 Aug 2023 00:49:26 +0000 Received: by outflank-mailman (input) for mailman id 581743; Thu, 10 Aug 2023 00:49:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtri-00078c-2T for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtri-00024v-1k for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:26 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtri-0001Gl-0w for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:26 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=nIPP6bp/xZDPHaEM42/ucEq9se8an8cobDnCejfKaEk=; b=y9qHcgNq+gTZ5Fbk8rfGY78P4m EshZK6tT8FBY55OJ5gyU+rHud/FUpzOiVfTvBeCckVSiSEYGZ+DyZNL86gEE80r9j99Rvte/3bkMx 17Xvmx8+ECPvU7NHCJczM62zhS+uus5dozkwTMEEmxE+pT63GYWkghZRklx/u2rXR3mo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/tsx: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:49:26 +0000 commit 164d83f4e8ce292129a7e736d6fc73fdbecaf4b7 Author: Andrew Cooper AuthorDate: Mon May 15 19:05:01 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/tsx: Remove opencoded MSR_ARCH_CAPS check The current cpu_has_tsx_ctrl tristate is serving double pupose; to signal the first pass through tsx_init(), and the availability of MSR_TSX_CTRL. Drop the variable, replacing it with a once boolean, and altering cpu_has_tsx_ctrl to come out of the feature information. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 205a9f970378c31ae3e00b52d59103a2e881b9e0) --- xen/arch/x86/tsx.c | 13 ++++++++----- xen/include/asm-x86/cpufeature.h | 1 + xen/include/asm-x86/processor.h | 2 +- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/tsx.c b/xen/arch/x86/tsx.c index be89741a2f..287812ec2b 100644 --- a/xen/arch/x86/tsx.c +++ b/xen/arch/x86/tsx.c @@ -19,7 +19,6 @@ * controlling TSX behaviour, and where TSX isn't force-disabled by firmware. */ int8_t __read_mostly opt_tsx = -1; -int8_t __read_mostly cpu_has_tsx_ctrl = -1; bool __read_mostly rtm_disabled; static int __init parse_tsx(const char *s) @@ -37,24 +36,28 @@ custom_param("tsx", parse_tsx); void tsx_init(void) { + static bool __read_mostly once; + /* * This function is first called between microcode being loaded, and CPUID * being scanned generally. Read into boot_cpu_data.x86_capability[] for * the cpu_has_* bits we care about using here. */ - if ( unlikely(cpu_has_tsx_ctrl < 0) ) + if ( unlikely(!once) ) { - uint64_t caps = 0; bool has_rtm_always_abort; + once = true; + if ( boot_cpu_data.cpuid_level >= 7 ) boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_ARCH_CAPS)] = cpuid_count_edx(7, 0); if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); + rdmsr(MSR_ARCH_CAPABILITIES, + boot_cpu_data.x86_capability[FEATURESET_m10Al], + boot_cpu_data.x86_capability[FEATURESET_m10Ah]); - cpu_has_tsx_ctrl = !!(caps & ARCH_CAPS_TSX_CTRL); has_rtm_always_abort = cpu_has_rtm_always_abort; if ( cpu_has_tsx_ctrl && cpu_has_srbds_ctrl ) diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index fd5b0b5f7c..c980288d47 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -148,6 +148,7 @@ /* MSR_ARCH_CAPS */ #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) +#define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index 7b5ba41a40..92f5b5d294 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -628,7 +628,7 @@ static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model, return fam; } -extern int8_t opt_tsx, cpu_has_tsx_ctrl; +extern int8_t opt_tsx; extern bool rtm_disabled; void tsx_init(void); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581744.911069 (Exim 4.92) (envelope-from ) id 1qTtrt-0007Dh-3I; Thu, 10 Aug 2023 00:49:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581744.911069; Thu, 10 Aug 2023 00:49:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrt-0007DZ-0M; Thu, 10 Aug 2023 00:49:37 +0000 Received: by outflank-mailman (input) for mailman id 581744; Thu, 10 Aug 2023 00:49:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrs-0007DN-5h for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtrs-000254-4u for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:36 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtrs-0001HC-45 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:36 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7u1GnRdG7pIweVx/rPeciN899VzDtx77J7Jye/EE3tc=; b=Hr8CoTjELPcjfIGKtcP3LY8+Ho ZfUwPrVW52YIHf7kVU9cRmv1EOsvAHIv53r0BT6D4F4r2A9bS+29taNG3yk8n0JXkj/8m/zsLerb8 QDoWr0Ss2V49RR1OcHemycj0dJ/xjF6WGfzypYMUuSNuu/VbOoBwKtEITwio2mCbgEH8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check Message-Id: Date: Thu, 10 Aug 2023 00:49:36 +0000 commit ce01f8d153d8b5b74ddd2894412ed589e9f3c86c Author: Andrew Cooper AuthorDate: Mon May 15 19:15:48 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Replace opencoded checks with regular feature ones. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 511b9f286c3dadd041e0d90beeff7d47c9bf3b7a) --- xen/arch/x86/spec_ctrl.c | 56 +++++++++++++++++++--------------------- xen/include/asm-x86/cpufeature.h | 7 +++++ 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 5636853aae..de71301d3e 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -293,12 +293,10 @@ custom_param("spec-ctrl", parse_spec_ctrl); int8_t __read_mostly opt_xpti_hwdom = -1; int8_t __read_mostly opt_xpti_domu = -1; -static __init void xpti_init_default(uint64_t caps) +static __init void xpti_init_default(void) { - if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) - caps = ARCH_CAPS_RDCL_NO; - - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( (boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) || + cpu_has_rdcl_no ) { if ( opt_xpti_hwdom < 0 ) opt_xpti_hwdom = 0; @@ -401,9 +399,10 @@ static __init int parse_pv_l1tf(const char *s) } custom_param("pv-l1tf", parse_pv_l1tf); -static void __init print_details(enum ind_thunk thunk, uint64_t caps) +static void __init print_details(enum ind_thunk thunk) { unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ if ( boot_cpu_data.cpuid_level >= 7 ) @@ -412,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, caps); printk("Speculative mitigation facilities:\n"); @@ -585,7 +586,7 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(uint64_t caps) +static bool __init retpoline_safe(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -603,7 +604,7 @@ static bool __init retpoline_safe(uint64_t caps) * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( caps & (ARCH_CAPS_RSBA | ARCH_CAPS_IBRS_ALL) ) + if ( cpu_has_rsba || cpu_has_eibrs ) return false; switch ( boot_cpu_data.x86_model ) @@ -823,7 +824,7 @@ static void __init ibpb_calculations(void) } /* Calculate whether this CPU is vulnerable to L1TF. */ -static __init void l1tf_calculations(uint64_t caps) +static __init void l1tf_calculations(void) { bool hit_default = false; @@ -911,7 +912,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */ - if ( caps & ARCH_CAPS_RDCL_NO ) + if ( cpu_has_rdcl_no ) cpu_has_bug_l1tf = false; if ( cpu_has_bug_l1tf && hit_default ) @@ -970,7 +971,7 @@ static __init void l1tf_calculations(uint64_t caps) } /* Calculate whether this CPU is vulnerable to MDS. */ -static __init void mds_calculations(uint64_t caps) +static __init void mds_calculations(void) { /* MDS is only known to affect Intel Family 6 processors at this time. */ if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || @@ -978,7 +979,7 @@ static __init void mds_calculations(uint64_t caps) return; /* Any processor advertising MDS_NO should be not vulnerable to MDS. */ - if ( caps & ARCH_CAPS_MDS_NO ) + if ( cpu_has_mds_no ) return; switch ( boot_cpu_data.x86_model ) @@ -1091,10 +1092,6 @@ void __init init_speculation_mitigations(void) enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; bool cpu_has_bug_taa; - uint64_t caps = 0; - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); hw_smt_enabled = check_smt_enabled(); @@ -1141,7 +1138,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe(caps) ) + if ( retpoline_safe() ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; @@ -1322,13 +1319,13 @@ void __init init_speculation_mitigations(void) * threads. Activate this if SMT is enabled, and Xen is using a non-zero * MSR_SPEC_CTRL setting. */ - if ( boot_cpu_has(X86_FEATURE_IBRSB) && !(caps & ARCH_CAPS_IBRS_ALL) && + if ( boot_cpu_has(X86_FEATURE_IBRSB) && !cpu_has_eibrs && hw_smt_enabled && default_xen_spec_ctrl ) setup_force_cpu_cap(X86_FEATURE_SC_MSR_IDLE); - xpti_init_default(caps); + xpti_init_default(); - l1tf_calculations(caps); + l1tf_calculations(); /* * By default, enable PV domU L1TF mitigations on all L1TF-vulnerable @@ -1349,7 +1346,7 @@ void __init init_speculation_mitigations(void) if ( !boot_cpu_has(X86_FEATURE_L1D_FLUSH) ) opt_l1d_flush = 0; else if ( opt_l1d_flush == -1 ) - opt_l1d_flush = cpu_has_bug_l1tf && !(caps & ARCH_CAPS_SKIP_L1DFL); + opt_l1d_flush = cpu_has_bug_l1tf && !cpu_has_skip_l1dfl; if ( opt_branch_harden ) setup_force_cpu_cap(X86_FEATURE_SC_BRANCH_HARDEN); @@ -1371,7 +1368,7 @@ void __init init_speculation_mitigations(void) "enabled. Please assess your configuration and choose an\n" "explicit 'smt=' setting. See XSA-273.\n"); - mds_calculations(caps); + mds_calculations(); /* * Parts which enumerate FB_CLEAR are those which are post-MDS_NO and have @@ -1383,7 +1380,7 @@ void __init init_speculation_mitigations(void) * the return-to-guest path. */ if ( opt_unpriv_mmio ) - opt_fb_clear_mmio = caps & ARCH_CAPS_FB_CLEAR; + opt_fb_clear_mmio = cpu_has_fb_clear; /* * By default, enable PV and HVM mitigations on MDS-vulnerable hardware. @@ -1413,7 +1410,7 @@ void __init init_speculation_mitigations(void) */ if ( opt_md_clear_pv || opt_md_clear_hvm || opt_fb_clear_mmio ) setup_force_cpu_cap(X86_FEATURE_SC_VERW_IDLE); - opt_md_clear_hvm &= !(caps & ARCH_CAPS_SKIP_L1DFL) && !opt_l1d_flush; + opt_md_clear_hvm &= !cpu_has_skip_l1dfl && !opt_l1d_flush; /* * Warn the user if they are on MLPDS/MFBDS-vulnerable hardware with HT @@ -1444,8 +1441,7 @@ void __init init_speculation_mitigations(void) * we check both to spot TSX in a microcode/cmdline independent way. */ cpu_has_bug_taa = - (cpu_has_rtm || (caps & ARCH_CAPS_TSX_CTRL)) && - (caps & (ARCH_CAPS_MDS_NO | ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO; + (cpu_has_rtm || cpu_has_tsx_ctrl) && cpu_has_mds_no && !cpu_has_taa_no; /* * On TAA-affected hardware, disabling TSX is the preferred mitigation, vs @@ -1464,7 +1460,7 @@ void __init init_speculation_mitigations(void) * plausibly value TSX higher than Hyperthreading...), disable TSX to * mitigate TAA. */ - if ( opt_tsx == -1 && cpu_has_bug_taa && (caps & ARCH_CAPS_TSX_CTRL) && + if ( opt_tsx == -1 && cpu_has_bug_taa && cpu_has_tsx_ctrl && ((hw_smt_enabled && opt_smt) || !boot_cpu_has(X86_FEATURE_SC_VERW_IDLE)) ) { @@ -1489,15 +1485,15 @@ void __init init_speculation_mitigations(void) if ( cpu_has_srbds_ctrl ) { if ( opt_srb_lock == -1 && !opt_unpriv_mmio && - (caps & (ARCH_CAPS_MDS_NO|ARCH_CAPS_TAA_NO)) == ARCH_CAPS_MDS_NO && - (!cpu_has_hle || ((caps & ARCH_CAPS_TSX_CTRL) && rtm_disabled)) ) + cpu_has_mds_no && !cpu_has_taa_no && + (!cpu_has_hle || (cpu_has_tsx_ctrl && rtm_disabled)) ) opt_srb_lock = 0; set_in_mcu_opt_ctrl(MCU_OPT_CTRL_RNGDS_MITG_DIS, opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } - print_details(thunk, caps); + print_details(thunk); /* * If MSR_SPEC_CTRL is available, apply Xen's default setting and discard diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index c980288d47..70b56804df 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -147,8 +147,15 @@ #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) /* MSR_ARCH_CAPS */ +#define cpu_has_rdcl_no boot_cpu_has(X86_FEATURE_RDCL_NO) +#define cpu_has_eibrs boot_cpu_has(X86_FEATURE_EIBRS) +#define cpu_has_rsba boot_cpu_has(X86_FEATURE_RSBA) +#define cpu_has_skip_l1dfl boot_cpu_has(X86_FEATURE_SKIP_L1DFL) +#define cpu_has_mds_no boot_cpu_has(X86_FEATURE_MDS_NO) #define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) +#define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) +#define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581745.911073 (Exim 4.92) (envelope-from ) id 1qTts3-0007Gl-4o; Thu, 10 Aug 2023 00:49:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581745.911073; Thu, 10 Aug 2023 00:49:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTts3-0007Ge-1o; Thu, 10 Aug 2023 00:49:47 +0000 Received: by outflank-mailman (input) for mailman id 581745; Thu, 10 Aug 2023 00:49:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTts2-0007GO-8h for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTts2-00025V-7u for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:46 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTts2-0001Hb-7F for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=doySVJg6zufbE8FGHQ9UwzddRugAyLnHC/n+HsrEfhc=; b=SHSJj6XBgeocJ1yb/A8bDgYiaH nrldHpOch6RQT5XDUKMGyJo+mwNCLvaY9QBG4Bhh3XWNCoUDmf1EbdwXORZwI3PgLPb18iA6ApGj8 0G1QDYSm0sG93s6eRdeS2KMxcsgpLXzC98ksALy3WNANWqEPbMk0aSpEZhcy8yTh2CSI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Update hardware hints Message-Id: Date: Thu, 10 Aug 2023 00:49:46 +0000 commit daa4414aeb28321cd5c07f0eb40888bd86a851b7 Author: Andrew Cooper AuthorDate: Tue May 30 16:03:16 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Update hardware hints * Rename IBRS_ALL to EIBRS. EIBRS is the term that everyone knows, and this makes ARCH_CAPS_EIBRS match the X86_FEATURE_EIBRS form. * Print RRSBA too, which is also a hint about behaviour. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 94200e1bae07e725cc07238c11569c5cab7befb7) --- xen/arch/x86/spec_ctrl.c | 5 +++-- xen/include/asm-x86/msr-index.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index de71301d3e..08416a9db9 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,10 +420,11 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", - (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", + (caps & ARCH_CAPS_RRSBA) ? " RRSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL" : "", (e8b & cpufeat_mask(X86_FEATURE_SSB_NO)) || (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "", diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 5a830f76a8..1cb472ab3d 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -51,7 +51,7 @@ #define MSR_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_EIBRS (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:49:57 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:49:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581746.911077 (Exim 4.92) (envelope-from ) id 1qTtsD-0007Jh-69; Thu, 10 Aug 2023 00:49:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581746.911077; Thu, 10 Aug 2023 00:49:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsD-0007JZ-3N; Thu, 10 Aug 2023 00:49:57 +0000 Received: by outflank-mailman (input) for mailman id 581746; Thu, 10 Aug 2023 00:49:56 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsC-0007JL-Bi for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsC-00025d-At for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtsC-0001IH-AD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:49:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=xy1WZRuMcJSkca+aRs/OLkdFJg1h3rsHeGDmpOzWr/8=; b=MA4/sE3trFeZ8p1WZhXAg8CBF6 1ZNHmuPLTmH75BTQf/AbnJwvmG44qinFLW9yAViTxE5LTWSU7IbYUxKqAopR24JNwdPgHYXXj+dIm ZtbwjGEdkkmr4dImbH0OhXQQ4OLksENrXm/O5VuTj5w6UjFV+t2qTIrIhjCgqwyHwPgM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() Message-Id: Date: Thu, 10 Aug 2023 00:49:56 +0000 commit ecbb75a6f8fe3ebbf18dfe29a635b3684a1a5b89 Author: Andrew Cooper AuthorDate: Fri Mar 10 16:23:20 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: Rearrange guest_common_default_feature_adjustments() This is prep work, split out to simply the diff on the following change. * Split the INTEL check out of the IvyBridge RDRAND check, as the former will be reused. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 064f572f96f1558faae0a74cad616ba95ec8ff34) --- xen/arch/x86/cpu-policy.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 19d955a9ed..1e33e72fc3 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -429,21 +429,24 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) static void __init guest_common_default_feature_adjustments(uint32_t *fs) { - /* - * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS - * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to - * compensate. - * - * Mitigate by hiding RDRAND from guests by default, unless explicitly - * overridden on the Xen command line (cpuid=rdrand). Irrespective of the - * default setting, guests can use RDRAND if explicitly enabled - * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were - * previously using RDRAND can migrate in. - */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a && - cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) - __clear_bit(X86_FEATURE_RDRAND, fs); + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS + * (XSA-320 / CVE-2020-0543), and won't be receiving microcode to + * compensate. + * + * Mitigate by hiding RDRAND from guests by default, unless explicitly + * overridden on the Xen command line (cpuid=rdrand). Irrespective of the + * default setting, guests can use RDRAND if explicitly enabled + * (cpuid="host,rdrand=1") in the VM's config file, and VMs which were + * previously using RDRAND can migrate in. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && + cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) + __clear_bit(X86_FEATURE_RDRAND, fs); + } /* * On certain hardware, speculative or errata workarounds can result in -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581747.911080 (Exim 4.92) (envelope-from ) id 1qTtsN-0008C7-7U; Thu, 10 Aug 2023 00:50:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581747.911080; Thu, 10 Aug 2023 00:50:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsN-0008Bk-4o; Thu, 10 Aug 2023 00:50:07 +0000 Received: by outflank-mailman (input) for mailman id 581747; Thu, 10 Aug 2023 00:50:06 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsM-000885-F0 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:06 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsM-000267-EF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:06 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtsM-0001J2-DI for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:06 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NxTYd3R2ukSWbxtu0hnRnAOulhEE6ybT2rKfFCEkuPc=; b=5+xmYAS64sm3AalFsq/2LF/LCD aIyrl+96wzTgSzn39q8NSewcYQSz9ZwY2A90r2OnTmARUTDYWXWmEnEFGLOA8+yoDXCEyEiPNFgax WipJ+I7ohH/pvAMhVF3tJIChXL6kcMM1UQCEx+lzdxI0/fYbGU8zKaJLSnbGunXp1rwY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Fix the rendering of FB_CLEAR Message-Id: Date: Thu, 10 Aug 2023 00:50:06 +0000 commit 43f362f6afd19cb682c41ee6b636aa18c72ba3dc Author: Andrew Cooper AuthorDate: Mon Jun 12 20:24:00 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Fix the rendering of FB_CLEAR FB_CLEAR is a read-only status bit, not a read-write control. Move it from "Hardware features" into "Hardware hints". Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 921afcbae843bb3f575a8f4a270b8e6cf471f4ca) --- xen/arch/x86/spec_ctrl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 08416a9db9..3baad9d5a8 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -420,7 +420,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -433,6 +433,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "", (caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "", (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", + (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", @@ -442,7 +443,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -458,7 +459,6 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); /* Compiled-in support which pertains to mitigations. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:17 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581748.911084 (Exim 4.92) (envelope-from ) id 1qTtsX-0008HI-9Y; Thu, 10 Aug 2023 00:50:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581748.911084; Thu, 10 Aug 2023 00:50:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsX-0008HA-6L; Thu, 10 Aug 2023 00:50:17 +0000 Received: by outflank-mailman (input) for mailman id 581748; Thu, 10 Aug 2023 00:50:16 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsW-0008Gw-Hz for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:16 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsW-00026L-HM for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:16 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtsW-0001Ji-Gg for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:16 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XHsJ+pX4kGI2dueJXUYAoe4xDt1aQ4ucVp3o7YPBYXI=; b=oOJFsfWHFwjwDEwtWleImiBdNS rjF0U2LWIZsB5Q7J4Bm0Z7cfk3Lh4tIhLr1COLeiXkdmpSO+9JS3WuUGQLM5QtUy0k+x7cs1A2Pss ddUNUIZ3EBL4rS2zvVesw+iHcSGCO89I121upYaor8X9p9DIOLWFS3+aAi3+aTd6+Evo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Message-Id: Date: Thu, 10 Aug 2023 00:50:16 +0000 commit 3ac6887c3e3b89641b703f427b7c380393f2f7c7 Author: Andrew Cooper AuthorDate: Mon Jun 5 11:09:11 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL Reword the comment for 'S' to include an incompatible set of features on the same core. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 3f63f4510422c29fda7ba238b880cbb53eca34fe) Also minimal fragments from: c/s 0bf9efb9ee4c ("xen/arm: Sanitize cpuinfo ID registers fields") to introduce TAINT_CPU_OUT_OF_SPEC. --- xen/arch/x86/spec_ctrl.c | 3 +++ xen/common/kernel.c | 6 ++++-- xen/include/xen/lib.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 3baad9d5a8..0222348b5a 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1110,7 +1110,10 @@ void __init init_speculation_mitigations(void) if ( read_cr4() & X86_CR4_CET ) { if ( !has_spec_ctrl ) + { printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } else if ( opt_ibrs == -1 ) opt_ibrs = ibrs = true; diff --git a/xen/common/kernel.c b/xen/common/kernel.c index daf9652665..064798f452 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -339,6 +339,7 @@ unsigned int tainted; * 'H' - HVM forced emulation prefix is permitted. * 'M' - Machine had a machine check experience. * 'U' - Platform is unsecure (usually due to an errata on the platform). + * 'S' - Out of spec CPU (Incompatible features on one or more cores). * * The string is overwritten by the next call to print_taint(). */ @@ -346,12 +347,13 @@ char *print_tainted(char *str) { if ( tainted ) { - snprintf(str, TAINT_STRING_MAX_LEN, "Tainted: %c%c%c%c%c", + snprintf(str, TAINT_STRING_MAX_LEN, "Tainted: %c%c%c%c%c%c", tainted & TAINT_MACHINE_UNSECURE ? 'U' : ' ', tainted & TAINT_MACHINE_CHECK ? 'M' : ' ', tainted & TAINT_SYNC_CONSOLE ? 'C' : ' ', tainted & TAINT_ERROR_INJECT ? 'E' : ' ', - tainted & TAINT_HVM_FEP ? 'H' : ' '); + tainted & TAINT_HVM_FEP ? 'H' : ' ', + tainted & TAINT_CPU_OUT_OF_SPEC ? 'S' : ' '); } else { diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h index be74981351..2296044caf 100644 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -193,6 +193,7 @@ uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); #define TAINT_ERROR_INJECT (1u << 2) #define TAINT_HVM_FEP (1u << 3) #define TAINT_MACHINE_UNSECURE (1u << 4) +#define TAINT_CPU_OUT_OF_SPEC (1u << 5) extern unsigned int tainted; #define TAINT_STRING_MAX_LEN 20 extern char *print_tainted(char *str); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:27 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581750.911089 (Exim 4.92) (envelope-from ) id 1qTtsh-0008LL-Bv; Thu, 10 Aug 2023 00:50:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581750.911089; Thu, 10 Aug 2023 00:50:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsh-0008LD-9F; Thu, 10 Aug 2023 00:50:27 +0000 Received: by outflank-mailman (input) for mailman id 581750; Thu, 10 Aug 2023 00:50:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsg-0008L1-LA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsg-00026W-KS for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:26 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtsg-0001K9-Jj for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:26 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jp/+HlHfB208ds38YRbrLgbsgfl/quRtPPuXZANlnNI=; b=1HDg/zng9dXgijI48FKb2gyPU+ gOUAU7H4Iq6MVAGK1on/Vs4obM1jvc+QahHTF9yFjm60+JaflLn2w72x745lWURyjRvRwDV5DPmz3 5p1bBjIN0a+Kr4kY1gl0WxO04UPB9VIbKDz0rXV+iyrpCABghpzlEu1ZC0FPU1FtJ9No=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() Message-Id: Date: Thu, 10 Aug 2023 00:50:26 +0000 commit 78a4031ed96008ef18a4b2d123b4f1f8a767b864 Author: Andrew Cooper AuthorDate: Fri May 26 10:35:47 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() This is prep work, split out to simply the diff on the following change. * Rename to retpoline_calculations(), and call unconditionally. It is shortly going to synthesise missing enumerations required for guest safety. * For the model check switch statement, store the result in a variable and break rather than returning directly. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 724c0d94ff79b208312d30676392bfdd693403be) --- xen/arch/x86/spec_ctrl.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 0222348b5a..7e9c3fe4a0 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -587,9 +587,10 @@ static bool __init check_smt_enabled(void) } /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(void) +static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; + bool safe = false; if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; @@ -627,29 +628,31 @@ static bool __init retpoline_safe(void) case 0x3f: /* Haswell EX/EP */ case 0x45: /* Haswell D */ case 0x46: /* Haswell H */ - return true; + safe = true; + break; /* * Broadwell processors are retpoline-safe after specific microcode * versions. */ case 0x3d: /* Broadwell */ - return ucode_rev >= 0x2a; + safe = ucode_rev >= 0x2a; break; case 0x47: /* Broadwell H */ - return ucode_rev >= 0x1d; + safe = ucode_rev >= 0x1d; break; case 0x4f: /* Broadwell EP/EX */ - return ucode_rev >= 0xb000021; + safe = ucode_rev >= 0xb000021; break; case 0x56: /* Broadwell D */ switch ( boot_cpu_data.x86_mask ) { - case 2: return ucode_rev >= 0x15; - case 3: return ucode_rev >= 0x7000012; - case 4: return ucode_rev >= 0xf000011; - case 5: return ucode_rev >= 0xe000009; + case 2: safe = ucode_rev >= 0x15; break; + case 3: safe = ucode_rev >= 0x7000012; break; + case 4: safe = ucode_rev >= 0xf000011; break; + case 5: safe = ucode_rev >= 0xe000009; break; default: printk("Unrecognised CPU stepping %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_mask); - return false; + safe = false; + break; } break; @@ -663,7 +666,8 @@ static bool __init retpoline_safe(void) case 0x67: /* Cannonlake? */ case 0x8e: /* Kabylake M */ case 0x9e: /* Kabylake D */ - return false; + safe = false; + break; /* * Atom processors before Goldmont Plus/Gemini Lake are retpoline-safe. @@ -682,13 +686,17 @@ static bool __init retpoline_safe(void) case 0x5c: /* Goldmont */ case 0x5f: /* Denverton */ case 0x85: /* Knights Mill */ - return true; + safe = true; + break; default: printk("Unrecognised CPU model %#x - assuming not reptpoline safe\n", boot_cpu_data.x86_model); - return false; + safe = false; + break; } + + return safe; } /* Calculate whether this CPU speculates past #NM */ @@ -1092,7 +1100,7 @@ void __init init_speculation_mitigations(void) { enum ind_thunk thunk = THUNK_DEFAULT; bool has_spec_ctrl, ibrs = false, hw_smt_enabled; - bool cpu_has_bug_taa; + bool cpu_has_bug_taa, retpoline_safe; hw_smt_enabled = check_smt_enabled(); @@ -1121,6 +1129,9 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } + /* Determine if retpoline is safe on this CPU. */ + retpoline_safe = retpoline_calculations(); + /* * Has the user specified any custom BTI mitigations? If so, follow their * instructions exactly and disable all heuristics. @@ -1142,7 +1153,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe() ) + if ( retpoline_safe ) thunk = THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs = true; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:37 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581751.911093 (Exim 4.92) (envelope-from ) id 1qTtsr-0008OP-Dd; Thu, 10 Aug 2023 00:50:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581751.911093; Thu, 10 Aug 2023 00:50:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsr-0008OH-Ah; Thu, 10 Aug 2023 00:50:37 +0000 Received: by outflank-mailman (input) for mailman id 581751; Thu, 10 Aug 2023 00:50:36 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsq-0008O9-OX for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:36 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtsq-00026d-NR for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:36 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtsq-0001Kg-Mj for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:36 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XDZ4wTo8KYMr61HkvDP2SBh9T38I56zyX7oUNFdKiZ0=; b=VG+EAsftxXevUWcfHkZaGV7uZq sIE7pCxcBs8j2AGtu63JpW2ryN8ITvFLsD1tUYOcTZhZbUnfKY9eqgEXokyqAJpRanRIuWc469UGo Odm8idvxqVbCpP/NgQ1VI2cJ2iAdpp0+mXN3EU05fDxZAc9jRV2H8pVBVhbAWokKSsRg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate Message-Id: Date: Thu, 10 Aug 2023 00:50:36 +0000 commit 945db710235eef2607b631baa1d96669336c582b Author: Andrew Cooper AuthorDate: Thu May 25 20:31:22 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate In order to level a VM safely for migration, the toolstack needs to know the RSBA/RRSBA properties of the CPU, whether or not they happen to be enumerated. See the code comment for details. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 36525a964fb629d0bd26e5a1c42de467af7a42a7) --- xen/arch/x86/spec_ctrl.c | 100 +++++++++++++++++++++++++++++++++++++-- xen/include/asm-x86/cpufeature.h | 1 + 2 files changed, 96 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 7e9c3fe4a0..103a9f3312 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -586,7 +586,10 @@ static bool __init check_smt_enabled(void) return false; } -/* Calculate whether Retpoline is known-safe on this CPU. */ +/* + * Calculate whether Retpoline is known-safe on this CPU. Fix up the + * RSBA/RRSBA bits as necessary. + */ static bool __init retpoline_calculations(void) { unsigned int ucode_rev = this_cpu(cpu_sig).rev; @@ -600,15 +603,93 @@ static bool __init retpoline_calculations(void) return false; /* - * RSBA may be set by a hypervisor to indicate that we may move to a - * processor which isn't retpoline-safe. + * The meaning of the RSBA and RRSBA bits have evolved over time. The + * agreed upon meaning at the time of writing (May 2023) is thus: + * + * - RSBA (RSB Alternative) means that an RSB may fall back to an + * alternative predictor on underflow. Skylake uarch and later all have + * this property. Broadwell too, when running microcode versions prior + * to Jan 2018. + * + * - All eIBRS-capable processors suffer RSBA, but eIBRS also introduces + * tagging of predictions with the mode in which they were learned. So + * when eIBRS is active, RSBA becomes RRSBA (Restricted RSBA). + * + * - CPUs are not expected to enumerate both RSBA and RRSBA. + * + * Some parts (Broadwell) are not expected to ever enumerate this + * behaviour directly. Other parts have differing enumeration with + * microcode version. Fix up Xen's idea, so we can advertise them safely + * to guests, and so toolstacks can level a VM safety for migration. + * + * The following states exist: + * + * | | RSBA | EIBRS | RRSBA | Notes | Action (in principle) | + * |---+------+-------+-------+--------------------+-----------------------| + * | 1 | 0 | 0 | 0 | OK (older parts) | Maybe +RSBA | + * | 2 | 0 | 0 | 1 | Broken | (+RSBA, -RRSBA) | + * | 3 | 0 | 1 | 0 | OK (pre-Aug ucode) | +RRSBA | + * | 4 | 0 | 1 | 1 | OK | | + * | 5 | 1 | 0 | 0 | OK | | + * | 6 | 1 | 0 | 1 | Broken | (-RRSBA) | + * | 7 | 1 | 1 | 0 | Broken | (-RSBA, +RRSBA) | + * | 8 | 1 | 1 | 1 | Broken | (-RSBA) | + * + * However, we don't need perfect adherence to the spec. We only need + * RSBA || RRSBA to indicate "alternative predictors potentially in use". + * Rows 1 & 3 are fixed up by later logic, as they're known configurations + * which exist in the world. * + * Complain loudly at the broken cases. They're safe for Xen to use (so we + * don't attempt to correct), and may or may not exist in reality, but if + * we ever encounter them in practice, something is wrong and needs + * further investigation. + */ + if ( cpu_has_eibrs ? cpu_has_rsba /* Rows 7, 8 */ + : cpu_has_rrsba /* Rows 2, 6 */ ) + { + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: RSBA %u, EIBRS %u, RRSBA %u\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, ucode_rev, + cpu_has_rsba, cpu_has_eibrs, cpu_has_rrsba); + add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + /* * Processors offering Enhanced IBRS are not guarenteed to be * repoline-safe. */ - if ( cpu_has_rsba || cpu_has_eibrs ) + if ( cpu_has_eibrs ) + { + /* + * Prior to the August 2023 microcode, many eIBRS-capable parts did + * not enumerate RRSBA. + */ + if ( !cpu_has_rrsba ) + setup_force_cpu_cap(X86_FEATURE_RRSBA); + + return false; + } + + /* + * RSBA is explicitly enumerated in some cases, but may also be set by a + * hypervisor to indicate that we may move to a processor which isn't + * retpoline-safe. + */ + if ( cpu_has_rsba ) return false; + /* + * At this point, we've filtered all the legal RSBA || RRSBA cases (or the + * known non-ideal cases). If ARCH_CAPS is visible, trust the absence of + * RSBA || RRSBA. There's no known microcode which advertises ARCH_CAPS + * without RSBA or EIBRS, and if we're virtualised we can't rely the model + * check anyway. + */ + if ( cpu_has_arch_caps ) + return true; + switch ( boot_cpu_data.x86_model ) { case 0x17: /* Penryn */ @@ -696,6 +777,15 @@ static bool __init retpoline_calculations(void) break; } + if ( !safe ) + { + /* + * Note: the eIBRS-capable parts are filtered out earlier, so the + * remainder here are the ones which suffer RSBA behaviour. + */ + setup_force_cpu_cap(X86_FEATURE_RSBA); + } + return safe; } @@ -1129,7 +1219,7 @@ void __init init_speculation_mitigations(void) thunk = THUNK_JMP; } - /* Determine if retpoline is safe on this CPU. */ + /* Determine if retpoline is safe on this CPU. Fix up RSBA/RRSBA enumerations. */ retpoline_safe = retpoline_calculations(); /* diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 70b56804df..63d31f079a 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -156,6 +156,7 @@ #define cpu_has_tsx_ctrl boot_cpu_has(X86_FEATURE_TSX_CTRL) #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) +#define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:48 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581752.911096 (Exim 4.92) (envelope-from ) id 1qTtt2-0008RV-Er; Thu, 10 Aug 2023 00:50:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581752.911096; Thu, 10 Aug 2023 00:50:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtt2-0008RO-CD; Thu, 10 Aug 2023 00:50:48 +0000 Received: by outflank-mailman (input) for mailman id 581752; Thu, 10 Aug 2023 00:50:46 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtt0-0008R7-RF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:46 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtt0-000272-QR for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:46 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtt0-0001LB-Ph for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:46 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ETxCnIqClJVD8o2swY6azDdZNjN7J9oMKR+PSpF5nX4=; b=W89iOCb/WKqNuyghP9Zvc3V1Hq gYCjI3kCj+M1+1vNY24efcbziC2v4yXPZaHQkUC3UH1LVZkP+4DqZTLAy7qbQfxSsVl7Wffev2jNi STIyqxj1QHDN1wfLw657KvCxyABSeANPZbVuElHhSWC/9EYNOb33a8jAskUw89OcdDEc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: Derive RSBA/RRSBA for guest policies Message-Id: Date: Thu, 10 Aug 2023 00:50:46 +0000 commit 6a9028704542b6c7c6f40321382a5652cbf2191b Author: Andrew Cooper AuthorDate: Wed May 24 15:41:21 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: Derive RSBA/RRSBA for guest policies The RSBA bit, "RSB Alternative", means that the RSB may use alternative predictors when empty. From a practical point of view, this mean "Retpoline not safe". Enhanced IBRS (officially IBRS_ALL in Intel's docs, previously IBRS_ATT) is a statement that IBRS is implemented in hardware (as opposed to the form retrofitted to existing CPUs in microcode). The RRSBA bit, "Restricted-RSBA", is a combination of RSBA, and the eIBRS property that predictions are tagged with the mode in which they were learnt. Therefore, it means "when eIBRS is active, the RSB may fall back to alternative predictors but restricted to the current prediction mode". As such, it's stronger statement than RSBA, but still means "Retpoline not safe". CPUs are not expected to enumerate both RSBA and RRSBA. Add feature dependencies for EIBRS and RRSBA. While technically they're not linked, absolutely nothing good can come of letting the guest see RRSBA without EIBRS. Nor a guest seeing EIBRS without IBRSB. Furthermore, we use this dependency to simplify the max derivation logic. The max policies gets RSBA and RRSBA unconditionally set (with the EIBRS dependency maybe hiding RRSBA). We can run any VM, even if it has been told "somewhere you might run, Retpoline isn't safe". The default policies are more complicated. A guest shouldn't see both bits, but it needs to see one if the current host suffers from any form of RSBA, and which bit it needs to see depends on whether eIBRS is visible or not. Therefore, the calculation must be performed after sanitise_featureset(). Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit e0586a4ff514590eec50185e2440b97f9a31cb7f) --- xen/arch/x86/cpu-policy.c | 39 +++++++++++++++++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 4 +-- xen/tools/gen-cpuid.py | 5 +++- 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 1e33e72fc3..053daf5be9 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -422,8 +422,17 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) * Retpoline not safe)", so these need to be visible to a guest in all * cases, even when it's only some other server in the pool which * suffers the identified behaviour. + * + * We can always run any VM which has previously (or will + * subsequently) run on hardware where Retpoline is not safe. + * Note: + * - The dependency logic may hide RRSBA for other reasons. + * - The max policy does not constitute a sensible configuration to + * run a guest in. */ __set_bit(X86_FEATURE_ARCH_CAPS, fs); + __set_bit(X86_FEATURE_RSBA, fs); + __set_bit(X86_FEATURE_RRSBA, fs); } } @@ -531,6 +540,21 @@ static void __init calculate_pv_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } @@ -621,6 +645,21 @@ static void __init calculate_hvm_def_policy(void) guest_common_default_feature_adjustments(fs); sanitise_featureset(fs); + + /* + * If the host suffers from RSBA of any form, and the guest can see + * MSR_ARCH_CAPS, reflect the appropriate RSBA/RRSBA property to the guest + * depending on the visibility of eIBRS. + */ + if ( test_bit(X86_FEATURE_ARCH_CAPS, fs) && + (cpu_has_rsba || cpu_has_rrsba) ) + { + bool eibrs = test_bit(X86_FEATURE_EIBRS, fs); + + __set_bit(eibrs ? X86_FEATURE_RRSBA + : X86_FEATURE_RSBA, fs); + } + x86_cpu_featureset_to_policy(fs, p); recalculate_xstate(p); } diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 6b24a33a94..79270651e1 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -305,7 +305,7 @@ XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.eax, word 16 */ XEN_CPUFEATURE(RDCL_NO, 16*32+ 0) /*A No Rogue Data Cache Load (Meltdown) */ XEN_CPUFEATURE(EIBRS, 16*32+ 1) /*A Enhanced IBRS */ -XEN_CPUFEATURE(RSBA, 16*32+ 2) /*!A RSB Alternative (Retpoline not safe) */ +XEN_CPUFEATURE(RSBA, 16*32+ 2) /*! RSB Alternative (Retpoline not safe) */ XEN_CPUFEATURE(SKIP_L1DFL, 16*32+ 3) /* Don't need to flush L1D on VMEntry */ XEN_CPUFEATURE(INTEL_SSB_NO, 16*32+ 4) /*A No Speculative Store Bypass */ XEN_CPUFEATURE(MDS_NO, 16*32+ 5) /*A No Microarchitectural Data Sampling */ @@ -321,7 +321,7 @@ XEN_CPUFEATURE(FBSDP_NO, 16*32+14) /*A No Fill Buffer Stale Data Prop XEN_CPUFEATURE(PSDP_NO, 16*32+15) /*A No Primary Stale Data Propagation */ XEN_CPUFEATURE(FB_CLEAR, 16*32+17) /*A Fill Buffers cleared by VERW */ XEN_CPUFEATURE(FB_CLEAR_CTRL, 16*32+18) /* MSR_OPT_CPU_CTRL.FB_CLEAR_DIS */ -XEN_CPUFEATURE(RRSBA, 16*32+19) /*!A Restricted RSB Alternative */ +XEN_CPUFEATURE(RRSBA, 16*32+19) /*! Restricted RSB Alternative */ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection */ XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index b090309d78..766703932c 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -315,7 +315,7 @@ def crunch_numbers(state): # IBRSB/IBRS, and we pass this MSR directly to guests. Treating them # as dependent features simplifies Xen's logic, and prevents the guest # from seeing implausible configurations. - IBRSB: [STIBP, SSBD, INTEL_PSFD], + IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], AMD_STIBP: [STIBP_ALWAYS], @@ -325,6 +325,9 @@ def crunch_numbers(state): # The ARCH_CAPS CPUID bit enumerates the availability of the whole register. ARCH_CAPS: list(range(RDCL_NO, RDCL_NO + 64)), + + # The behaviour described by RRSBA depend on eIBRS being active. + EIBRS: [RRSBA], } deep_features = tuple(sorted(deps.keys())) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:50:58 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:50:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581753.911101 (Exim 4.92) (envelope-from ) id 1qTttC-0008UD-Gy; Thu, 10 Aug 2023 00:50:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581753.911101; Thu, 10 Aug 2023 00:50:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttC-0008U6-Dq; Thu, 10 Aug 2023 00:50:58 +0000 Received: by outflank-mailman (input) for mailman id 581753; Thu, 10 Aug 2023 00:50:56 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttA-0008Tr-Uc for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:56 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttA-00027A-Tp for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:56 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTttA-0001Lg-T2 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:50:56 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=B9s98tvkwtVIpGlQpoa4xsiAxNnTYYzNl/Pg6YULRQE=; b=YNYVWdfU6Nt8iQmndmJU+Q0tJ1 fL2xDRh/XKJ39Jxx8+MvgkDQT3U5Ul8YGwM8Qp51dKHTP4TI3UjVBzANkijFP9XXr3sUkdWN/jQ8+ cnwa8QvaSwSGLbxW2eBKnBeyEo5k6Xby+ZriNK7WdJj/kyGQsywsaIUfpC+OF6/2sFj0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: don't ignore the return value from xc_cpuid_apply_policy Message-Id: Date: Thu, 10 Aug 2023 00:50:56 +0000 commit 15107a80b209955a56d022a6d04774dc7b29876d Author: Roger Pau Monne AuthorDate: Thu Mar 18 11:11:22 2021 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: don't ignore the return value from xc_cpuid_apply_policy Also change libxl__cpuid_legacy to propagate the error from xc_cpuid_apply_policy into callers. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich Reviewed-by: Anthony PERARD (cherry picked from commit 34990446ca91d9e201ff17bd4e3f43bfe3ad308e) libs/light: Propagate libxl__arch_domain_create() return code Commit 34990446ca91 started to overwrite the `rc` value from libxl__arch_domain_create(), thus error aren't propagated anymore. Check `rc` value before doing the next thing. Fixes: 34990446ca91 ("libxl: don't ignore the return value from xc_cpuid_apply_policy") Reported-by: Andrew Cooper Signed-off-by: Anthony PERARD Reviewed-by: Jason Andryuk Release-acked-by: Henry Wang (cherry picked from commit 8cdfbf95b19c01fbb741c41d5ea5a94f8823964c) libxl: fix guest kexec - skip cpuid policy When a domain performs a kexec (soft reset), libxl__build_pre() is called with the existing domid. Calling libxl__cpuid_legacy() on the existing domain fails since the cpuid policy has already been set, and the guest isn't rebuilt and doesn't kexec. xc: error: Failed to set d1's policy (err leaf 0xffffffff, subleaf 0xffffffff, msr 0xffffffff) (17 = File exists): Internal error libxl: error: libxl_cpuid.c:494:libxl__cpuid_legacy: Domain 1:Failed to apply CPUID policy: File exists libxl: error: libxl_create.c:1641:domcreate_rebuild_done: Domain 1:cannot (re-)build domain: -3 libxl: error: libxl_xshelp.c:201:libxl__xs_read_mandatory: xenstore read failed: `/libxl/1/type': No such file or directory libxl: warning: libxl_dom.c:49:libxl__domain_type: unable to get domain type for domid=1, assuming HVM During a soft_reset, skip calling libxl__cpuid_legacy() to avoid the issue. Before commit 34990446ca91, the libxl__cpuid_legacy() failure would have been ignored, so kexec would continue. Fixes: 34990446ca91 ("libxl: don't ignore the return value from xc_cpuid_apply_policy") Signed-off-by: Jason Andryuk Reviewed-by: Anthony PERARD (cherry picked from commit 1e454c2b5b1172e0fc7457e411ebaba61db8fc87) --- tools/libs/light/libxl_cpuid.c | 15 +++++++++++---- tools/libs/light/libxl_create.c | 7 +++++-- tools/libs/light/libxl_dom.c | 6 ++++-- tools/libs/light/libxl_internal.h | 5 +++-- tools/libs/light/libxl_nocpuid.c | 5 +++-- 5 files changed, 26 insertions(+), 12 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 4cc2f211b8..93c93d2d22 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -435,11 +435,13 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 0; } -void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, - libxl_domain_build_info *info) +int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, + libxl_domain_build_info *info) { + GC_INIT(ctx); bool pae = true; bool itsc; + int r; /* * Gross hack. Using libxl_defbool_val() here causes libvirt to crash in @@ -478,8 +480,13 @@ void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, itsc = (libxl_defbool_val(info->disable_migrate) || info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); - xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid); + r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, + pae, itsc, nested_virt, info->cpuid); + if (r) + LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); + + GC_FREE; + return r ? ERROR_FAIL : 0; } static const char *input_names[2] = { "leaf", "subleaf" }; diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c index 2f171a190a..40b6aa462b 100644 --- a/tools/libs/light/libxl_create.c +++ b/tools/libs/light/libxl_create.c @@ -1443,6 +1443,7 @@ int libxl__srm_callout_callback_static_data_done(unsigned int missing, libxl_domain_config *d_config = dcs->guest_config; libxl_domain_build_info *info = &d_config->b_info; + int rc = 0; /* * CPUID/MSR information is not present in pre Xen-4.14 streams. @@ -1452,9 +1453,9 @@ int libxl__srm_callout_callback_static_data_done(unsigned int missing, * stream doesn't contain any CPUID data. */ if (missing & XGR_SDD_MISSING_CPUID) - libxl__cpuid_legacy(ctx, dcs->guest_domid, true, info); + rc = libxl__cpuid_legacy(ctx, dcs->guest_domid, true, info); - return 0; + return rc; } void libxl__srm_callout_callback_restore_results(xen_pfn_t store_mfn, @@ -2146,6 +2147,8 @@ static int do_domain_soft_reset(libxl_ctx *ctx, aop_console_how); cdcs->domid_out = &domid_out; + state->soft_reset = true; + dom_path = libxl__xs_get_dompath(gc, domid); if (!dom_path) { LOGD(ERROR, domid, "failed to read domain path"); diff --git a/tools/libs/light/libxl_dom.c b/tools/libs/light/libxl_dom.c index 842a51c86c..865b4623d8 100644 --- a/tools/libs/light/libxl_dom.c +++ b/tools/libs/light/libxl_dom.c @@ -379,13 +379,15 @@ int libxl__build_pre(libxl__gc *gc, uint32_t domid, state->console_port = xc_evtchn_alloc_unbound(ctx->xch, domid, state->console_domid); rc = libxl__arch_domain_create(gc, d_config, state, domid); + if (rc) goto out; /* Construct a CPUID policy, but only for brand new domains. Domains * being migrated-in/restored have CPUID handled during the * static_data_done() callback. */ - if (!state->restore) - libxl__cpuid_legacy(ctx, domid, false, info); + if (!state->restore && !state->soft_reset) + rc = libxl__cpuid_legacy(ctx, domid, false, info); +out: return rc; } diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index c114f6d399..ee6a251700 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -1407,6 +1407,7 @@ typedef struct { /* Whether this domain is being migrated/restored, or booting fresh. Only * applicable to the primary domain, not support domains (e.g. stub QEMU). */ bool restore; + bool soft_reset; } libxl__domain_build_state; _hidden void libxl__domain_build_state_init(libxl__domain_build_state *s); @@ -2060,8 +2061,8 @@ typedef yajl_gen_status (*libxl__gen_json_callback)(yajl_gen hand, void *); _hidden char *libxl__object_to_json(libxl_ctx *ctx, const char *type, libxl__gen_json_callback gen, void *p); -_hidden void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool retore, - libxl_domain_build_info *info); +_hidden int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool retore, + libxl_domain_build_info *info); /* Calls poll() again - useful to check whether a signaled condition * is still true. Cannot fail. Returns currently-true revents. */ diff --git a/tools/libs/light/libxl_nocpuid.c b/tools/libs/light/libxl_nocpuid.c index f47336565b..0630959e76 100644 --- a/tools/libs/light/libxl_nocpuid.c +++ b/tools/libs/light/libxl_nocpuid.c @@ -34,9 +34,10 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 0; } -void libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, - libxl_domain_build_info *info) +int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, + libxl_domain_build_info *info) { + return 0; } yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581754.911105 (Exim 4.92) (envelope-from ) id 1qTttM-00006E-Km; Thu, 10 Aug 2023 00:51:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581754.911105; Thu, 10 Aug 2023 00:51:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttM-000067-Hi; Thu, 10 Aug 2023 00:51:08 +0000 Received: by outflank-mailman (input) for mailman id 581754; Thu, 10 Aug 2023 00:51:07 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttL-00005s-1u for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:07 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttL-00027U-0w for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:07 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTttL-0001MU-02 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:07 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XPW3De9YqYTedM0nobGYdBJqTzGPzgRYXqKJscpCWNc=; b=HFB+ylNpImK3R2af+K+Hy3XCBZ rvT3YvjEgFmx2k2y2amCKM96NQhG0heo1UNb4IHODl6RSgNqHc4dURVkY3UdcWxbnRC3sVBTUflnG JL83xNgCTuK+nwYKFhvZX9DfAFIcgL99+ctyWKIRvSEberFpdtymgO4KvXWHuzJk998M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libs/guest: introduce support for setting guest MSRs Message-Id: Date: Thu, 10 Aug 2023 00:51:07 +0000 commit bec019cea64fadad0149ad16cb9472829ca1b5c6 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:53 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libs/guest: introduce support for setting guest MSRs Like it's done with CPUID, introduce support for passing MSR values to xc_cpuid_apply_policy(). The chosen format for expressing MSR policy data matches the current one used for CPUID. Note that existing callers of xc_cpuid_apply_policy() can pass NULL as the value for the newly introduced 'msr' parameter in order to preserve the same functionality, and in fact that's done in libxl on this patch. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit ed742cf1b65c822759833027ca5cbb087c506a41) --- tools/include/xenctrl.h | 21 ++++- tools/libs/guest/xg_cpuid_x86.c | 170 +++++++++++++++++++++++++++++++++++++++- tools/libs/light/libxl_cpuid.c | 2 +- 3 files changed, 189 insertions(+), 4 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 2013200b9e..273bce0f2d 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1890,6 +1890,21 @@ struct xc_xend_cpuid { char *policy[4]; }; +/* + * MSR policy data. + * + * The format of the policy string is the following: + * '1' -> force to 1 + * '0' -> force to 0 + * 'x' -> we don't care (use default) + * 'k' -> pass through host value + */ +struct xc_msr { + uint32_t index; + char policy[65]; +}; +#define XC_MSR_INPUT_UNUSED 0xffffffffu + /* * Make adjustments to the CPUID settings for a domain. * @@ -1901,13 +1916,15 @@ struct xc_xend_cpuid { * Either pass a full new @featureset (and @nr_features), or adjust individual * features (@pae, @itsc, @nested_virt). * - * Then (optionally) apply legacy XEND overrides (@xend) to the result. + * Then (optionally) apply legacy XEND CPUID overrides (@xend) or MSR (@msr) + * to the result. */ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, - bool nested_virt, const struct xc_xend_cpuid *xend); + bool nested_virt, const struct xc_xend_cpuid *xend, + const struct xc_msr *msr); int xc_mca_op(xc_interface *xch, struct xen_mc *mc); int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags, xc_cpumap_t cpumap, unsigned int nr_cpus); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index edfe2fe41f..579e747f25 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -425,10 +425,171 @@ static int xc_cpuid_xend_policy( return rc; } +static int compare_msr(const void *l, const void *r) +{ + const xen_msr_entry_t *lhs = l; + const xen_msr_entry_t *rhs = r; + + if ( lhs->idx == rhs->idx ) + return 0; + + return lhs->idx < rhs->idx ? -1 : 1; +} + +static xen_msr_entry_t *find_msr( + xen_msr_entry_t *msrs, unsigned int nr_msrs, + uint32_t index) +{ + const xen_msr_entry_t key = { .idx = index }; + + return bsearch(&key, msrs, nr_msrs, sizeof(*msrs), compare_msr); +} + + +static int xc_msr_policy(xc_interface *xch, domid_t domid, + const struct xc_msr *msr) +{ + int rc; + bool hvm; + xc_dominfo_t di; + unsigned int nr_leaves, nr_msrs; + uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; + /* + * Three full policies. The host, default for the domain type, + * and domain current. + */ + xen_msr_entry_t *host = NULL, *def = NULL, *cur = NULL; + unsigned int nr_host, nr_def, nr_cur; + + if ( xc_domain_getinfo(xch, domid, 1, &di) != 1 || + di.domid != domid ) + { + ERROR("Failed to obtain d%d info", domid); + rc = -ESRCH; + goto out; + } + hvm = di.hvm; + + rc = xc_get_cpu_policy_size(xch, &nr_leaves, &nr_msrs); + if ( rc ) + { + PERROR("Failed to obtain policy info size"); + rc = -errno; + goto out; + } + + if ( (host = calloc(nr_msrs, sizeof(*host))) == NULL || + (def = calloc(nr_msrs, sizeof(*def))) == NULL || + (cur = calloc(nr_msrs, sizeof(*cur))) == NULL ) + { + ERROR("Unable to allocate memory for %u CPUID leaves", nr_leaves); + rc = -ENOMEM; + goto out; + } + + /* Get the domain's current policy. */ + nr_leaves = 0; + nr_cur = nr_msrs; + rc = xc_get_domain_cpu_policy(xch, domid, &nr_leaves, NULL, &nr_cur, cur); + if ( rc ) + { + PERROR("Failed to obtain d%d current policy", domid); + rc = -errno; + goto out; + } + + /* Get the domain type's default policy. */ + nr_leaves = 0; + nr_def = nr_msrs; + rc = xc_get_system_cpu_policy(xch, hvm ? XEN_SYSCTL_cpu_policy_hvm_default + : XEN_SYSCTL_cpu_policy_pv_default, + &nr_leaves, NULL, &nr_def, def); + if ( rc ) + { + PERROR("Failed to obtain %s def policy", hvm ? "hvm" : "pv"); + rc = -errno; + goto out; + } + + /* Get the host policy. */ + nr_leaves = 0; + nr_host = nr_msrs; + rc = xc_get_system_cpu_policy(xch, XEN_SYSCTL_cpu_policy_host, + &nr_leaves, NULL, &nr_host, host); + if ( rc ) + { + PERROR("Failed to obtain host policy"); + rc = -errno; + goto out; + } + + for ( ; msr->index != XC_MSR_INPUT_UNUSED; ++msr ) + { + xen_msr_entry_t *cur_msr = find_msr(cur, nr_cur, msr->index); + const xen_msr_entry_t *def_msr = find_msr(def, nr_def, msr->index); + const xen_msr_entry_t *host_msr = find_msr(host, nr_host, msr->index); + unsigned int i; + + if ( cur_msr == NULL || def_msr == NULL || host_msr == NULL ) + { + ERROR("Missing MSR %#x", msr->index); + rc = -ENOENT; + goto out; + } + + for ( i = 0; i < ARRAY_SIZE(msr->policy) - 1; i++ ) + { + bool val; + + if ( msr->policy[i] == '1' ) + val = true; + else if ( msr->policy[i] == '0' ) + val = false; + else if ( msr->policy[i] == 'x' ) + val = test_bit(63 - i, &def_msr->val); + else if ( msr->policy[i] == 'k' ) + val = test_bit(63 - i, &host_msr->val); + else + { + ERROR("MSR index %#x: bad character '%c' in policy string '%s'", + msr->index, msr->policy[i], msr->policy); + rc = -EINVAL; + goto out; + } + + if ( val ) + set_bit(63 - i, &cur_msr->val); + else + clear_bit(63 - i, &cur_msr->val); + } + } + + /* Feed the transformed policy back up to Xen. */ + rc = xc_set_domain_cpu_policy(xch, domid, 0, NULL, nr_cur, cur, + &err_leaf, &err_subleaf, &err_msr); + if ( rc ) + { + PERROR("Failed to set d%d's policy (err leaf %#x, subleaf %#x, msr %#x)", + domid, err_leaf, err_subleaf, err_msr); + rc = -errno; + goto out; + } + + /* Success! */ + + out: + free(cur); + free(def); + free(host); + + return rc; +} + int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, bool nested_virt, - const struct xc_xend_cpuid *xend) + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr) { int rc; xc_dominfo_t di; @@ -667,6 +828,13 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, if ( xend && (rc = xc_cpuid_xend_policy(xch, domid, xend)) ) goto out; + if ( msr ) + { + rc = xc_msr_policy(xch, domid, msr); + if ( rc ) + goto out; + } + rc = 0; out: diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 93c93d2d22..a26dbc6cac 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -481,7 +481,7 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid); + pae, itsc, nested_virt, info->cpuid, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581755.911109 (Exim 4.92) (envelope-from ) id 1qTttW-00009H-MC; Thu, 10 Aug 2023 00:51:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581755.911109; Thu, 10 Aug 2023 00:51:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttW-00009A-JG; Thu, 10 Aug 2023 00:51:18 +0000 Received: by outflank-mailman (input) for mailman id 581755; Thu, 10 Aug 2023 00:51:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttV-00008z-59 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttV-00027b-4L for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:17 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTttV-0001NB-3V for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:17 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GG4qDysJGdzOmGUV/1/TtppmDpgCj09xiFfF1XQFOrw=; b=VbxMn6VPGAgMKrGrJcNibgQykT gihjgNJPSKumUbGGMxt1hTCEupTzywgbtszyAgEWjhGX8Fdb8wTO3s8h2o5j214AZj3VFbLKD4aya m+/A+z6eNu8YckXPLwo5XWk8IFHIbt9o1W9S38qMPjL93w5n+jUytzwnVmMKCPc3m0Y8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: change the type of libxl_cpuid_policy_list Message-Id: Date: Thu, 10 Aug 2023 00:51:17 +0000 commit 748cb881d8af26bdd2db62d4632a372bd61bb0a6 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:54 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: change the type of libxl_cpuid_policy_list Currently libxl_cpuid_policy_list is an opaque type to the users of libxl, and internally it's an array of xc_xend_cpuid objects. Change the type to instead be a structure that contains one array for CPUID policies, in preparation for it also holding another array for MSR policies. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 4825d19603580949144ac2ac5cb22df75c9da954) --- tools/include/libxl.h | 8 +--- tools/libs/light/libxl_cpuid.c | 87 +++++++++++++++++++++++++-------------- tools/libs/light/libxl_internal.h | 4 ++ 3 files changed, 63 insertions(+), 36 deletions(-) diff --git a/tools/include/libxl.h b/tools/include/libxl.h index ae7fe27c1f..7410d269f6 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -1374,12 +1374,8 @@ typedef struct { void libxl_bitmap_init(libxl_bitmap *map); void libxl_bitmap_dispose(libxl_bitmap *map); -/* - * libxl_cpuid_policy is opaque in the libxl ABI. Users of both libxl and - * libxc may not make assumptions about xc_xend_cpuid. - */ -typedef struct xc_xend_cpuid libxl_cpuid_policy; -typedef libxl_cpuid_policy * libxl_cpuid_policy_list; +struct libxl__cpu_policy; +typedef struct libxl__cpu_policy *libxl_cpuid_policy_list; void libxl_cpuid_dispose(libxl_cpuid_policy_list *cpuid_list); int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *l); void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index a26dbc6cac..e65bf6aeb0 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -19,22 +19,29 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) return !libxl_cpuid_policy_list_length(pl); } -void libxl_cpuid_dispose(libxl_cpuid_policy_list *p_cpuid_list) +void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) { - int i, j; - libxl_cpuid_policy_list cpuid_list = *p_cpuid_list; + libxl_cpuid_policy_list policy = *pl; - if (cpuid_list == NULL) + if (policy == NULL) return; - for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { - for (j = 0; j < 4; j++) - if (cpuid_list[i].policy[j] != NULL) { - free(cpuid_list[i].policy[j]); - cpuid_list[i].policy[j] = NULL; + + if (policy->cpuid) { + unsigned int i, j; + struct xc_xend_cpuid *cpuid_list = policy->cpuid; + + for (i = 0; cpuid_list[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { + for (j = 0; j < 4; j++) { + if (cpuid_list[i].policy[j] != NULL) { + free(cpuid_list[i].policy[j]); + } } + } + free(policy->cpuid); } - free(cpuid_list); - *p_cpuid_list = NULL; + + free(policy); + *pl = NULL; return; } @@ -62,11 +69,17 @@ struct cpuid_flags { /* go through the dynamic array finding the entry for a specified leaf. * if no entry exists, allocate one and return that. */ -static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, - uint32_t leaf, uint32_t subleaf) +static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, + uint32_t leaf, uint32_t subleaf) { + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid **list; int i = 0; + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + list = &policy->cpuid; if (*list != NULL) { for (i = 0; (*list)[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { if ((*list)[i].input[0] == leaf && (*list)[i].input[1] == subleaf) @@ -86,7 +99,7 @@ static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *list, * Will overwrite earlier entries and thus can be called multiple * times. */ -int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) +int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { #define NA XEN_CPUID_INPUT_UNUSED static const struct cpuid_flags cpuid_flags[] = { @@ -324,7 +337,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) if (flag->name == NULL) { return 2; } - entry = cpuid_find_match(cpuid, flag->leaf, flag->subleaf); + entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); resstr = entry->policy[flag->reg - 1]; num = strtoull(val, &endptr, 0); flags[flag->length] = 0; @@ -379,7 +392,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str) * the strings for each register were directly exposed to the user. * Used for maintaining compatibility with older config files */ -int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, +int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; @@ -406,7 +419,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, return 3; } str = endptr + 1; - entry = cpuid_find_match(cpuid, leaf, subleaf); + entry = cpuid_find_match(policy, leaf, subleaf); for (str = endptr + 1; *str != 0;) { if (str[0] != 'e' || str[2] != 'x') { return 4; @@ -481,7 +494,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, info->tsc_mode == LIBXL_TSC_MODE_ALWAYS_EMULATE); r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid, NULL); + pae, itsc, nested_virt, + info->cpuid ? info->cpuid->cpuid : NULL, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -506,16 +520,18 @@ static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, - libxl_cpuid_policy_list *pcpuid) + libxl_cpuid_policy_list *pl) { - libxl_cpuid_policy_list cpuid = *pcpuid; + libxl_cpuid_policy_list policy = *pl; + struct xc_xend_cpuid *cpuid; yajl_gen_status s; int i, j; s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; - if (cpuid == NULL) goto empty; + if (policy == NULL || policy->cpuid == NULL) goto empty; + cpuid = policy->cpuid; for (i = 0; cpuid[i].input[0] != XEN_CPUID_INPUT_UNUSED; i++) { s = yajl_gen_map_open(hand); @@ -554,7 +570,7 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl_cpuid_policy_list *p) { int i, size; - libxl_cpuid_policy_list l; + struct xc_xend_cpuid *l; flexarray_t *array; if (!libxl__json_object_is_array(o)) @@ -565,8 +581,10 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, return 0; size = array->count; + *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ - l = *p = libxl__calloc(NOGC, size + 1, sizeof(libxl_cpuid_policy)); + l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, + sizeof(struct xc_xend_cpuid)); l[size].input[0] = XEN_CPUID_INPUT_UNUSED; l[size].input[1] = XEN_CPUID_INPUT_UNUSED; @@ -609,8 +627,12 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) { int i = 0; - libxl_cpuid_policy_list l = *pl; + const struct xc_xend_cpuid *l; + + if (*pl == NULL) + return 0; + l = (*pl)->cpuid; if (l) { while (l[i].input[0] != XEN_CPUID_INPUT_UNUSED) i++; @@ -620,20 +642,25 @@ int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) } void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, - libxl_cpuid_policy_list *dst, - const libxl_cpuid_policy_list *src) + libxl_cpuid_policy_list *pdst, + const libxl_cpuid_policy_list *psrc) { + struct xc_xend_cpuid **dst; + struct xc_xend_cpuid *const *src; GC_INIT(ctx); int i, j, len; - if (*src == NULL) { - *dst = NULL; + if (*psrc == NULL) { + *pdst = NULL; goto out; } - len = libxl_cpuid_policy_list_length(src); + *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + dst = &(*pdst)->cpuid; + src = &(*psrc)->cpuid; + len = libxl_cpuid_policy_list_length(psrc); /* one extra slot for sentinel */ - *dst = libxl__calloc(NOGC, len + 1, sizeof(libxl_cpuid_policy)); + *dst = libxl__calloc(NOGC, len + 1, sizeof(struct xc_xend_cpuid)); (*dst)[len].input[0] = XEN_CPUID_INPUT_UNUSED; (*dst)[len].input[1] = XEN_CPUID_INPUT_UNUSED; diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index ee6a251700..8c67a0eeb3 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4859,6 +4859,10 @@ int libxl__is_domid_recent(libxl__gc *gc, uint32_t domid, bool *recent); /* os-specific implementation of setresuid() */ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t suid); +struct libxl__cpu_policy { + struct xc_xend_cpuid *cpuid; +}; + #endif /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:28 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581756.911112 (Exim 4.92) (envelope-from ) id 1qTttg-0000CT-No; Thu, 10 Aug 2023 00:51:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581756.911112; Thu, 10 Aug 2023 00:51:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttg-0000CL-Ku; Thu, 10 Aug 2023 00:51:28 +0000 Received: by outflank-mailman (input) for mailman id 581756; Thu, 10 Aug 2023 00:51:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTttf-0000CB-8W for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: introduce MSR data in libxl_cpuid_policy Message-Id: Date: Thu, 10 Aug 2023 00:51:27 +0000 commit aaa97b41281831c5a2e3a03677bfd5e4f5347f6d Author: Roger Pau Monne AuthorDate: Wed Jul 26 09:47:53 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: introduce MSR data in libxl_cpuid_policy Add a new array field to libxl_cpuid_policy in order to store the MSR policies. Adding the MSR data in the libxl_cpuid_policy_list type is done so that existing users can seamlessly pass MSR features as part of the CPUID data, without requiring the introduction of a separate domain_build_info field, and a new set of handlers functions. Note that support for parsing the old JSON format is kept, as that's required in order to restore domains or received migrations from previous tool versions. Differentiation between the old and the new formats is done based on whether the contents of the 'cpuid' field is an array or a map JSON object. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit 5b80cecb747b2176b9e85f6e7aa7be83416d77e1) --- tools/libs/light/libxl_cpuid.c | 160 ++++++++++++++++++++++++++++++++++---- tools/libs/light/libxl_internal.h | 1 + tools/libs/light/libxl_types.idl | 2 +- 3 files changed, 146 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index e65bf6aeb0..888144c334 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -16,7 +16,7 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { - return !libxl_cpuid_policy_list_length(pl); + return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); } void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) @@ -40,6 +40,8 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) free(policy->cpuid); } + free(policy->msr); + free(policy); *pl = NULL; return; @@ -495,7 +497,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, r = xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, itsc, nested_virt, - info->cpuid ? info->cpuid->cpuid : NULL, NULL); + info->cpuid ? info->cpuid->cpuid : NULL, + info->cpuid ? info->cpuid->msr : NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); @@ -507,16 +510,22 @@ static const char *input_names[2] = { "leaf", "subleaf" }; static const char *policy_names[4] = { "eax", "ebx", "ecx", "edx" }; /* * Aiming for: - * [ - * { 'leaf': 'val-eax', - * 'subleaf': 'val-ecx', - * 'eax': 'filter', - * 'ebx': 'filter', - * 'ecx': 'filter', - * 'edx': 'filter' }, - * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, - * ... etc ... - * ] + * { 'cpuid': [ + * { 'leaf': 'val-eax', + * 'subleaf': 'val-ecx', + * 'eax': 'filter', + * 'ebx': 'filter', + * 'ecx': 'filter', + * 'edx': 'filter' }, + * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, + * ... etc ... + * ], + * 'msr': [ + * { 'index': 'val-index', + * 'policy': 'filter', }, + * ... etc ... + * ], + * } */ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, @@ -524,9 +533,16 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, { libxl_cpuid_policy_list policy = *pl; struct xc_xend_cpuid *cpuid; + const struct xc_msr *msr; yajl_gen_status s; int i, j; + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "cpuid"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_array_open(hand); if (s != yajl_gen_status_ok) goto out; @@ -561,6 +577,39 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, empty: s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "msr"); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_array_open(hand); + if (s != yajl_gen_status_ok) goto out; + + if (!policy || !policy->msr) goto done; + msr = policy->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + s = yajl_gen_map_open(hand); + if (s != yajl_gen_status_ok) goto out; + + s = libxl__yajl_gen_asciiz(hand, "index"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_integer(hand, msr[i].index); + if (s != yajl_gen_status_ok) goto out; + s = libxl__yajl_gen_asciiz(hand, "policy"); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_string(hand, + (const unsigned char *)msr[i].policy, 64); + if (s != yajl_gen_status_ok) goto out; + + s = yajl_gen_map_close(hand); + if (s != yajl_gen_status_ok) goto out; + } + +done: + s = yajl_gen_array_close(hand); + if (s != yajl_gen_status_ok) goto out; + s = yajl_gen_map_close(hand); out: return s; } @@ -571,17 +620,40 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, { int i, size; struct xc_xend_cpuid *l; + struct xc_msr *msr; + const libxl__json_object *co; flexarray_t *array; + bool cpuid_only = false; + + /* + * Old JSON field was an array with just the CPUID data. With the addition + * of MSRs the object is now a map with two array fields. + * + * Use the object format to detect whether the passed data contains just + * CPUID leafs and thus is an array, or does also contain MSRs and is a + * map. + */ + if (libxl__json_object_is_array(o)) { + co = o; + cpuid_only = true; + goto parse_cpuid; + } - if (!libxl__json_object_is_array(o)) + if (!libxl__json_object_is_map(o)) return ERROR_FAIL; - array = libxl__json_object_get_array(o); + co = libxl__json_map_get("cpuid", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + +parse_cpuid: + *p = libxl__calloc(NOGC, 1, sizeof(**p)); + + array = libxl__json_object_get_array(co); if (!array->count) - return 0; + goto cpuid_empty; size = array->count; - *p = libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ l = (*p)->cpuid = libxl__calloc(NOGC, size + 1, sizeof(struct xc_xend_cpuid)); @@ -620,6 +692,42 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + if (cpuid_only) + return 0; + +cpuid_empty: + co = libxl__json_map_get("msr", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + + array = libxl__json_object_get_array(co); + if (!array->count) + return 0; + size = array->count; + /* need one extra slot as sentinel */ + msr = (*p)->msr = libxl__calloc(NOGC, size + 1, sizeof(struct xc_msr)); + + msr[size].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < size; i++) { + const libxl__json_object *t, *r; + + if (flexarray_get(array, i, (void**)&t) != 0) + return ERROR_FAIL; + + if (!libxl__json_object_is_map(t)) + return ERROR_FAIL; + + r = libxl__json_map_get("index", t, JSON_INTEGER); + if (!r) return ERROR_FAIL; + msr[i].index = libxl__json_object_get_integer(r); + r = libxl__json_map_get("policy", t, JSON_STRING); + if (!r) return ERROR_FAIL; + if (strlen(libxl__json_object_get_string(r)) != + ARRAY_SIZE(msr[i].policy) - 1) + return ERROR_FAIL; + strcpy(msr[i].policy, libxl__json_object_get_string(r)); + } return 0; } @@ -656,6 +764,10 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, } *pdst = libxl__calloc(NOGC, 1, sizeof(**pdst)); + + if (!(*psrc)->cpuid) + goto copy_msr; + dst = &(*pdst)->cpuid; src = &(*psrc)->cpuid; len = libxl_cpuid_policy_list_length(psrc); @@ -675,6 +787,22 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, (*dst)[i].policy[j] = NULL; } +copy_msr: + if ((*psrc)->msr) { + const struct xc_msr *msr = (*psrc)->msr; + + for (i = 0; msr[i].index != XC_MSR_INPUT_UNUSED; i++) + ; + len = i; + (*pdst)->msr = libxl__calloc(NOGC, len + 1, sizeof(struct xc_msr)); + (*pdst)->msr[len].index = XC_MSR_INPUT_UNUSED; + + for (i = 0; i < len; i++) { + (*pdst)->msr[i].index = msr[i].index; + strcpy((*pdst)->msr[i].policy, msr[i].policy); + } + } + out: GC_FREE; } diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h index 8c67a0eeb3..cc27c72ecf 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4861,6 +4861,7 @@ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t suid); struct libxl__cpu_policy { struct xc_xend_cpuid *cpuid; + struct xc_msr *msr; }; #endif diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index f45adddab0..1c7c7748aa 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -19,7 +19,7 @@ libxl_mac = Builtin("mac", json_parse_type="JSON_STRING", passby=PASS_BY_REFEREN libxl_bitmap = Builtin("bitmap", json_parse_type="JSON_ARRAY", dispose_fn="libxl_bitmap_dispose", passby=PASS_BY_REFERENCE, check_default_fn="libxl_bitmap_is_empty", copy_fn="libxl_bitmap_copy_alloc") libxl_cpuid_policy_list = Builtin("cpuid_policy_list", dispose_fn="libxl_cpuid_dispose", passby=PASS_BY_REFERENCE, - json_parse_type="JSON_ARRAY", check_default_fn="libxl__cpuid_policy_is_empty", + json_parse_type="JSON_ANY", check_default_fn="libxl__cpuid_policy_is_empty", copy_fn="libxl_cpuid_policy_list_copy") libxl_string_list = Builtin("string_list", dispose_fn="libxl_string_list_dispose", passby=PASS_BY_REFERENCE, -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:39 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581757.911116 (Exim 4.92) (envelope-from ) id 1qTttq-0000Ft-QP; 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Thu, 10 Aug 2023 00:51:37 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pZsClz5yDViRmpIJXsLIDvb8ijTEw+3zDbB++RJbAJA=; b=DfDFs3kHVLs5LbYqJNS110eYjJ G4Rxx10LaTn9MMzn9Q7t7LFOTwyVmca/LAk8gEyS7APci44aFLOqhgyJuEJLYqvGoGbUdTjwylka7 UP8IFYKa/JI/+j2EBWESzJVX7JUzP6dXGLMw5zNAo/KFEQSGHLET9TbZBKCCOmqcm13M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: split logic to parse user provided CPUID features Message-Id: Date: Thu, 10 Aug 2023 00:51:37 +0000 commit bfcf0def25835443f5942df4aab8932c0a625c02 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:56 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: split logic to parse user provided CPUID features Move the CPUID value parsers out of libxl_cpuid_parse_config() into a newly created cpuid_add() local helper. This is in preparation for also adding MSR feature parsing support. No functional change intended. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit e2b1da9b8fda0ed7d3dca7bd15829cfea496973a) --- tools/libs/light/libxl_cpuid.c | 120 +++++++++++++++++++++-------------------- 1 file changed, 63 insertions(+), 57 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 888144c334..62d9fe0123 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -96,6 +96,66 @@ static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, return *list + i; } +static int cpuid_add(libxl_cpuid_policy_list *policy, + const struct cpuid_flags *flag, const char *val) +{ + struct xc_xend_cpuid *entry = cpuid_find_match(policy, flag->leaf, + flag->subleaf); + unsigned long num; + char flags[33], *resstr, *endptr; + unsigned int i; + + resstr = entry->policy[flag->reg - 1]; + num = strtoul(val, &endptr, 0); + flags[flag->length] = 0; + if (endptr != val) { + /* if this was a valid number, write the binary form into the string */ + for (i = 0; i < flag->length; i++) { + flags[flag->length - 1 - i] = "01"[(num >> i) & 1]; + } + } else { + switch(val[0]) { + case 'x': case 'k': case 's': + memset(flags, val[0], flag->length); + break; + default: + return 3; + } + } + + if (resstr == NULL) { + resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + } + + /* the family and model entry is potentially split up across + * two fields in Fn0000_0001_EAX, so handle them here separately. + */ + if (!strcmp(flag->name, "family")) { + if (num < 16) { + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + memcpy(resstr + (32 - 8) - 20, "00000000", 8); + } else { + num -= 15; + memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); + for (i = 0; i < 7; i++) { + flags[7 - i] = "01"[num & 1]; + num >>= 1; + } + memcpy(resstr + (32 - 8) - 20, flags, 8); + } + } else if (!strcmp(flag->name, "model")) { + memcpy(resstr + (32 - 4) - 16, flags, 4); + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + } else { + memcpy(resstr + (32 - flag->length) - flag->bit, flags, + flag->length); + } + entry->policy[flag->reg - 1] = resstr; + + return 0; + +} + /* parse a single key=value pair and translate it into the libxc * used interface using 32-characters strings for each register. * Will overwrite earlier entries and thus can be called multiple @@ -319,12 +379,8 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; #undef NA - char *sep, *val, *endptr; - int i; + const char *sep, *val; const struct cpuid_flags *flag; - struct xc_xend_cpuid *entry; - unsigned long num; - char flags[33], *resstr; sep = strchr(str, '='); if (sep == NULL) { @@ -334,60 +390,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } for (flag = cpuid_flags; flag->name != NULL; flag++) { if(!strncmp(str, flag->name, sep - str) && flag->name[sep - str] == 0) - break; - } - if (flag->name == NULL) { - return 2; - } - entry = cpuid_find_match(policy, flag->leaf, flag->subleaf); - resstr = entry->policy[flag->reg - 1]; - num = strtoull(val, &endptr, 0); - flags[flag->length] = 0; - if (endptr != val) { - /* if this was a valid number, write the binary form into the string */ - for (i = 0; i < flag->length; i++) { - flags[flag->length - 1 - i] = "01"[!!(num & (1 << i))]; - } - } else { - switch(val[0]) { - case 'x': case 'k': case 's': - memset(flags, val[0], flag->length); - break; - default: - return 3; - } - } - - if (resstr == NULL) { - resstr = strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + return cpuid_add(policy, flag, val); } - /* the family and model entry is potentially split up across - * two fields in Fn0000_0001_EAX, so handle them here separately. - */ - if (!strncmp(str, "family", sep - str)) { - if (num < 16) { - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - memcpy(resstr + (32 - 8) - 20, "00000000", 8); - } else { - num -= 15; - memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); - for (i = 0; i < 7; i++) { - flags[7 - i] = "01"[num & 1]; - num >>= 1; - } - memcpy(resstr + (32 - 8) - 20, flags, 8); - } - } else if (!strncmp(str, "model", sep - str)) { - memcpy(resstr + (32 - 4) - 16, flags, 4); - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - } else { - memcpy(resstr + (32 - flag->length) - flag->bit, flags, - flag->length); - } - entry->policy[flag->reg - 1] = resstr; - - return 0; + return 2; } /* parse a single list item from the legacy Python xend syntax, where -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:48 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581758.911121 (Exim 4.92) (envelope-from ) id 1qTtu0-0000JX-SI; Thu, 10 Aug 2023 00:51:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581758.911121; Thu, 10 Aug 2023 00:51:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtu0-0000JP-PW; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=atPZSPSJgVaR2f1/Wc1b7RbKlxkB2tyhbzwLrR3XVTY=; b=jaLCx4dv59udxg6asqQeSBcJTN FExQWrBQOQGiATjBFN5EY0Ter0QkUI54K8+uVpdVIo8PrHt6sWt0UKRPT/uagC6cflMoLs8XiQi+U gYTzGltN9gxbIk7F1Ij7yGOFS40vxZhANqCO8kJngLxMVOaTeP8GjsUGV9Ynv/+pABkk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: use the cpuid feature names from cpufeatureset.h Message-Id: Date: Thu, 10 Aug 2023 00:51:47 +0000 commit fcd4f8387f8248b2a619abc5c065c365011ecf60 Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:57 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: use the cpuid feature names from cpufeatureset.h The current implementation in libxl_cpuid_parse_config() requires keeping a list of cpuid feature bits that should be mostly in sync with the contents of cpufeatureset.h. Avoid such duplication by using the automatically generated list of cpuid features in INIT_FEATURE_NAMES in order to map feature names to featureset bits, and then translate from featureset bits into cpuid leaf, subleaf, register tuple. Note that the full contents of the previous cpuid translation table can't be removed. That's because some feature names allowed by libxl are not described in the featuresets, or because naming has diverged and the previous nomenclature is preserved for compatibility reasons. Should result in no functional change observed by callers, albeit some new cpuid features will be available as a result of the change. While there constify cpuid_flags name field. Signed-off-by: Roger Pau Monné Reviewed-by: Anthony PERARD (cherry picked from commit d638fe233cb3a45105319df75df0edfed2fde5a5) --- docs/man/xl.cfg.5.pod.in | 24 ++-- tools/libs/light/libxl_cpuid.c | 246 ++++++++++++++++------------------------- tools/xl/xl_parse.c | 3 + 3 files changed, 107 insertions(+), 166 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index ef9505f913..12c0ae8479 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -1957,24 +1957,16 @@ proccount procpkg stepping =back -List of keys taking a character: +List of keys taking a character can be found in the public header file +L -=over 4 - -3dnow 3dnowext 3dnowprefetch abm acpi adx aes altmovcr8 apic arat avx avx2 -avx512-4fmaps avx512-4vnniw avx512bw avx512cd avx512dq avx512er avx512f -avx512ifma avx512pf avx512vbmi avx512vl bmi1 bmi2 clflushopt clfsh clwb cmov -cmplegacy cmpxchg16 cmpxchg8 cmt cntxid dca de ds dscpl dtes64 erms est extapic -f16c ffxsr fma fma4 fpu fsgsbase fxsr hle htt hypervisor ia64 ibs invpcid -invtsc lahfsahf lm lwp mca mce misalignsse mmx mmxext monitor movbe mpx msr -mtrr nodeid nx ospke osvw osxsave pae page1gb pat pbe pcid pclmulqdq pdcm -perfctr_core perfctr_nb pge pku popcnt pse pse36 psn rdrand rdseed rdtscp rtm -sha skinit smap smep smx ss sse sse2 sse3 sse4.1 sse4.2 sse4_1 sse4_2 sse4a -ssse3 svm svm_decode svm_lbrv svm_npt svm_nrips svm_pausefilt svm_tscrate -svm_vmcbclean syscall sysenter tbm tm tm2 topoext tsc tsc-deadline tsc_adjust -umip vme vmx wdt x2apic xop xsave xtpr +The feature names described in C should be specified in all +lowercase letters, and with underscores converted to hyphens. For example in +order to reference feature C the string C should be used. -=back +Note that C is described as an option that takes a value, and that +takes precedence over the C flag in C. The feature +flag must be referenced as C. =back diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 62d9fe0123..bbe5fa157b 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -14,6 +14,8 @@ #include "libxl_internal.h" +#include + int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); @@ -60,7 +62,7 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) * Used for the static structure describing all features. */ struct cpuid_flags { - char* name; + const char *name; uint32_t leaf; uint32_t subleaf; int reg; @@ -153,7 +155,19 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, entry->policy[flag->reg - 1] = resstr; return 0; +} + +struct feature_name { + const char *name; + unsigned int bit; +}; + +static int search_feature(const void *a, const void *b) +{ + const char *key = a; + const char *feat = ((const struct feature_name *)b)->name; + return strcmp(key, feat); } /* parse a single key=value pair and translate it into the libxc @@ -176,190 +190,42 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {"proccount", 0x00000001, NA, CPUID_REG_EBX, 16, 8}, {"localapicid", 0x00000001, NA, CPUID_REG_EBX, 24, 8}, - {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, - {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, - {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, - {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, - {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, - {"vmx", 0x00000001, NA, CPUID_REG_ECX, 5, 1}, - {"smx", 0x00000001, NA, CPUID_REG_ECX, 6, 1}, {"est", 0x00000001, NA, CPUID_REG_ECX, 7, 1}, - {"tm2", 0x00000001, NA, CPUID_REG_ECX, 8, 1}, - {"ssse3", 0x00000001, NA, CPUID_REG_ECX, 9, 1}, {"cntxid", 0x00000001, NA, CPUID_REG_ECX, 10, 1}, - {"fma", 0x00000001, NA, CPUID_REG_ECX, 12, 1}, {"cmpxchg16", 0x00000001, NA, CPUID_REG_ECX, 13, 1}, - {"xtpr", 0x00000001, NA, CPUID_REG_ECX, 14, 1}, - {"pdcm", 0x00000001, NA, CPUID_REG_ECX, 15, 1}, - {"pcid", 0x00000001, NA, CPUID_REG_ECX, 17, 1}, - {"dca", 0x00000001, NA, CPUID_REG_ECX, 18, 1}, /* Linux uses sse4_{1,2}. Keep sse4.{1,2} for compatibility */ {"sse4_1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4.1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4_2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, {"sse4.2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, - {"x2apic", 0x00000001, NA, CPUID_REG_ECX, 21, 1}, - {"movbe", 0x00000001, NA, CPUID_REG_ECX, 22, 1}, - {"popcnt", 0x00000001, NA, CPUID_REG_ECX, 23, 1}, - {"tsc-deadline", 0x00000001, NA, CPUID_REG_ECX, 24, 1}, {"aes", 0x00000001, NA, CPUID_REG_ECX, 25, 1}, - {"xsave", 0x00000001, NA, CPUID_REG_ECX, 26, 1}, - {"osxsave", 0x00000001, NA, CPUID_REG_ECX, 27, 1}, - {"avx", 0x00000001, NA, CPUID_REG_ECX, 28, 1}, - {"f16c", 0x00000001, NA, CPUID_REG_ECX, 29, 1}, - {"rdrand", 0x00000001, NA, CPUID_REG_ECX, 30, 1}, - {"hypervisor", 0x00000001, NA, CPUID_REG_ECX, 31, 1}, - - {"fpu", 0x00000001, NA, CPUID_REG_EDX, 0, 1}, - {"vme", 0x00000001, NA, CPUID_REG_EDX, 1, 1}, - {"de", 0x00000001, NA, CPUID_REG_EDX, 2, 1}, - {"pse", 0x00000001, NA, CPUID_REG_EDX, 3, 1}, - {"tsc", 0x00000001, NA, CPUID_REG_EDX, 4, 1}, - {"msr", 0x00000001, NA, CPUID_REG_EDX, 5, 1}, - {"pae", 0x00000001, NA, CPUID_REG_EDX, 6, 1}, - {"mce", 0x00000001, NA, CPUID_REG_EDX, 7, 1}, + {"cmpxchg8", 0x00000001, NA, CPUID_REG_EDX, 8, 1}, - {"apic", 0x00000001, NA, CPUID_REG_EDX, 9, 1}, {"sysenter", 0x00000001, NA, CPUID_REG_EDX, 11, 1}, - {"mtrr", 0x00000001, NA, CPUID_REG_EDX, 12, 1}, - {"pge", 0x00000001, NA, CPUID_REG_EDX, 13, 1}, - {"mca", 0x00000001, NA, CPUID_REG_EDX, 14, 1}, - {"cmov", 0x00000001, NA, CPUID_REG_EDX, 15, 1}, - {"pat", 0x00000001, NA, CPUID_REG_EDX, 16, 1}, - {"pse36", 0x00000001, NA, CPUID_REG_EDX, 17, 1}, {"psn", 0x00000001, NA, CPUID_REG_EDX, 18, 1}, {"clfsh", 0x00000001, NA, CPUID_REG_EDX, 19, 1}, - {"ds", 0x00000001, NA, CPUID_REG_EDX, 21, 1}, - {"acpi", 0x00000001, NA, CPUID_REG_EDX, 22, 1}, - {"mmx", 0x00000001, NA, CPUID_REG_EDX, 23, 1}, - {"fxsr", 0x00000001, NA, CPUID_REG_EDX, 24, 1}, - {"sse", 0x00000001, NA, CPUID_REG_EDX, 25, 1}, - {"sse2", 0x00000001, NA, CPUID_REG_EDX, 26, 1}, - {"ss", 0x00000001, NA, CPUID_REG_EDX, 27, 1}, - {"htt", 0x00000001, NA, CPUID_REG_EDX, 28, 1}, {"tm", 0x00000001, NA, CPUID_REG_EDX, 29, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, {"arat", 0x00000006, NA, CPUID_REG_EAX, 2, 1}, - {"fsgsbase", 0x00000007, 0, CPUID_REG_EBX, 0, 1}, {"tsc_adjust", 0x00000007, 0, CPUID_REG_EBX, 1, 1}, - {"bmi1", 0x00000007, 0, CPUID_REG_EBX, 3, 1}, - {"hle", 0x00000007, 0, CPUID_REG_EBX, 4, 1}, - {"avx2", 0x00000007, 0, CPUID_REG_EBX, 5, 1}, - {"smep", 0x00000007, 0, CPUID_REG_EBX, 7, 1}, - {"bmi2", 0x00000007, 0, CPUID_REG_EBX, 8, 1}, - {"erms", 0x00000007, 0, CPUID_REG_EBX, 9, 1}, - {"invpcid", 0x00000007, 0, CPUID_REG_EBX, 10, 1}, - {"rtm", 0x00000007, 0, CPUID_REG_EBX, 11, 1}, {"cmt", 0x00000007, 0, CPUID_REG_EBX, 12, 1}, - {"mpx", 0x00000007, 0, CPUID_REG_EBX, 14, 1}, - {"avx512f", 0x00000007, 0, CPUID_REG_EBX, 16, 1}, - {"avx512dq", 0x00000007, 0, CPUID_REG_EBX, 17, 1}, - {"rdseed", 0x00000007, 0, CPUID_REG_EBX, 18, 1}, - {"adx", 0x00000007, 0, CPUID_REG_EBX, 19, 1}, - {"smap", 0x00000007, 0, CPUID_REG_EBX, 20, 1}, - {"avx512-ifma", 0x00000007, 0, CPUID_REG_EBX, 21, 1}, - {"clflushopt", 0x00000007, 0, CPUID_REG_EBX, 23, 1}, - {"clwb", 0x00000007, 0, CPUID_REG_EBX, 24, 1}, - {"proc-trace", 0x00000007, 0, CPUID_REG_EBX, 25, 1}, - {"avx512pf", 0x00000007, 0, CPUID_REG_EBX, 26, 1}, - {"avx512er", 0x00000007, 0, CPUID_REG_EBX, 27, 1}, - {"avx512cd", 0x00000007, 0, CPUID_REG_EBX, 28, 1}, - {"sha", 0x00000007, 0, CPUID_REG_EBX, 29, 1}, - {"avx512bw", 0x00000007, 0, CPUID_REG_EBX, 30, 1}, - {"avx512vl", 0x00000007, 0, CPUID_REG_EBX, 31, 1}, - - {"prefetchwt1", 0x00000007, 0, CPUID_REG_ECX, 0, 1}, - {"avx512-vbmi", 0x00000007, 0, CPUID_REG_ECX, 1, 1}, - {"umip", 0x00000007, 0, CPUID_REG_ECX, 2, 1}, - {"pku", 0x00000007, 0, CPUID_REG_ECX, 3, 1}, - {"ospke", 0x00000007, 0, CPUID_REG_ECX, 4, 1}, - {"avx512-vbmi2", 0x00000007, 0, CPUID_REG_ECX, 6, 1}, - {"cet-ss", 0x00000007, 0, CPUID_REG_ECX, 7, 1}, - {"gfni", 0x00000007, 0, CPUID_REG_ECX, 8, 1}, - {"vaes", 0x00000007, 0, CPUID_REG_ECX, 9, 1}, - {"vpclmulqdq", 0x00000007, 0, CPUID_REG_ECX, 10, 1}, - {"avx512-vnni", 0x00000007, 0, CPUID_REG_ECX, 11, 1}, - {"avx512-bitalg",0x00000007, 0, CPUID_REG_ECX, 12, 1}, - {"avx512-vpopcntdq",0x00000007,0,CPUID_REG_ECX, 14, 1}, - {"rdpid", 0x00000007, 0, CPUID_REG_ECX, 22, 1}, - {"cldemote", 0x00000007, 0, CPUID_REG_ECX, 25, 1}, - - {"avx512-4vnniw",0x00000007, 0, CPUID_REG_EDX, 2, 1}, - {"avx512-4fmaps",0x00000007, 0, CPUID_REG_EDX, 3, 1}, - {"avx512-vp2intersect",0x00000007,0,CPUID_REG_EDX,8, 1}, - {"srbds-ctrl", 0x00000007, 0, CPUID_REG_EDX, 9, 1}, - {"md-clear", 0x00000007, 0, CPUID_REG_EDX, 10, 1}, - {"serialize", 0x00000007, 0, CPUID_REG_EDX, 14, 1}, - {"tsxldtrk", 0x00000007, 0, CPUID_REG_EDX, 16, 1}, - {"cet-ibt", 0x00000007, 0, CPUID_REG_EDX, 20, 1}, - {"ibrsb", 0x00000007, 0, CPUID_REG_EDX, 26, 1}, - {"stibp", 0x00000007, 0, CPUID_REG_EDX, 27, 1}, - {"l1d-flush", 0x00000007, 0, CPUID_REG_EDX, 28, 1}, - {"arch-caps", 0x00000007, 0, CPUID_REG_EDX, 29, 1}, - {"core-caps", 0x00000007, 0, CPUID_REG_EDX, 30, 1}, - {"ssbd", 0x00000007, 0, CPUID_REG_EDX, 31, 1}, - - {"avx-vnni", 0x00000007, 1, CPUID_REG_EAX, 4, 1}, - {"avx512-bf16", 0x00000007, 1, CPUID_REG_EAX, 5, 1}, - - {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, {"lahfsahf", 0x80000001, NA, CPUID_REG_ECX, 0, 1}, {"cmplegacy", 0x80000001, NA, CPUID_REG_ECX, 1, 1}, - {"svm", 0x80000001, NA, CPUID_REG_ECX, 2, 1}, - {"extapic", 0x80000001, NA, CPUID_REG_ECX, 3, 1}, {"altmovcr8", 0x80000001, NA, CPUID_REG_ECX, 4, 1}, - {"abm", 0x80000001, NA, CPUID_REG_ECX, 5, 1}, - {"sse4a", 0x80000001, NA, CPUID_REG_ECX, 6, 1}, - {"misalignsse", 0x80000001, NA, CPUID_REG_ECX, 7, 1}, - {"3dnowprefetch",0x80000001, NA, CPUID_REG_ECX, 8, 1}, - {"osvw", 0x80000001, NA, CPUID_REG_ECX, 9, 1}, - {"ibs", 0x80000001, NA, CPUID_REG_ECX, 10, 1}, - {"xop", 0x80000001, NA, CPUID_REG_ECX, 11, 1}, - {"skinit", 0x80000001, NA, CPUID_REG_ECX, 12, 1}, - {"wdt", 0x80000001, NA, CPUID_REG_ECX, 13, 1}, - {"lwp", 0x80000001, NA, CPUID_REG_ECX, 15, 1}, - {"fma4", 0x80000001, NA, CPUID_REG_ECX, 16, 1}, {"nodeid", 0x80000001, NA, CPUID_REG_ECX, 19, 1}, - {"tbm", 0x80000001, NA, CPUID_REG_ECX, 21, 1}, - {"topoext", 0x80000001, NA, CPUID_REG_ECX, 22, 1}, {"perfctr_core", 0x80000001, NA, CPUID_REG_ECX, 23, 1}, {"perfctr_nb", 0x80000001, NA, CPUID_REG_ECX, 24, 1}, - {"syscall", 0x80000001, NA, CPUID_REG_EDX, 11, 1}, - {"nx", 0x80000001, NA, CPUID_REG_EDX, 20, 1}, - {"mmxext", 0x80000001, NA, CPUID_REG_EDX, 22, 1}, - {"ffxsr", 0x80000001, NA, CPUID_REG_EDX, 25, 1}, - {"page1gb", 0x80000001, NA, CPUID_REG_EDX, 26, 1}, - {"rdtscp", 0x80000001, NA, CPUID_REG_EDX, 27, 1}, - {"lm", 0x80000001, NA, CPUID_REG_EDX, 29, 1}, - {"3dnowext", 0x80000001, NA, CPUID_REG_EDX, 30, 1}, - {"3dnow", 0x80000001, NA, CPUID_REG_EDX, 31, 1}, - {"procpkg", 0x00000004, 0, CPUID_REG_EAX, 26, 6}, {"invtsc", 0x80000007, NA, CPUID_REG_EDX, 8, 1}, - {"clzero", 0x80000008, NA, CPUID_REG_EBX, 0, 1}, - {"rstr-fp-err-ptrs", 0x80000008, NA, CPUID_REG_EBX, 2, 1}, - {"wbnoinvd", 0x80000008, NA, CPUID_REG_EBX, 9, 1}, - {"ibpb", 0x80000008, NA, CPUID_REG_EBX, 12, 1}, - {"ibrs", 0x80000008, NA, CPUID_REG_EBX, 14, 1}, - {"amd-stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1}, - {"ibrs-always", 0x80000008, NA, CPUID_REG_EBX, 16, 1}, - {"stibp-always", 0x80000008, NA, CPUID_REG_EBX, 17, 1}, - {"ibrs-fast", 0x80000008, NA, CPUID_REG_EBX, 18, 1}, - {"ibrs-same-mode", 0x80000008, NA, CPUID_REG_EBX, 19, 1}, {"ppin", 0x80000008, NA, CPUID_REG_EBX, 23, 1}, - {"amd-ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1}, - {"virt-ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1}, - {"ssb-no", 0x80000008, NA, CPUID_REG_EBX, 26, 1}, - {"psfd", 0x80000008, NA, CPUID_REG_EBX, 28, 1}, {"btc-no", 0x80000008, NA, CPUID_REG_EBX, 29, 1}, - {"ibpb-ret", 0x80000008, NA, CPUID_REG_EBX, 30, 1}, {"nc", 0x80000008, NA, CPUID_REG_ECX, 0, 8}, {"apicidsize", 0x80000008, NA, CPUID_REG_ECX, 12, 4}, @@ -378,9 +244,58 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; + static const struct feature_name features[] = INIT_FEATURE_NAMES; + /* + * NB: if we switch to using a cpu_policy derived object instead of a + * libxl_cpuid_policy_list we could get rid of the featureset -> cpuid leaf + * conversion table and use a featureset directly as we have conversions + * to/from featureset and cpu_policy. + */ + static const struct { + enum { FEAT_CPUID, FEAT_MSR } type; + union { + struct { + uint32_t leaf, subleaf; + unsigned int reg; + } cpuid; + struct { + uint32_t index; + unsigned int reg; + } msr; + }; + } feature_to_policy[] = { +#define CPUID_ENTRY(l, s, r) \ + { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } +#define MSR_ENTRY(i, r) \ + { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x0000000D, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_ECX), + CPUID_ENTRY(0x80000007, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000008, NA, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x80000021, NA, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 2, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_ECX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX), + MSR_ENTRY(0x10a, CPUID_REG_EAX), + MSR_ENTRY(0x10a, CPUID_REG_EDX), +#undef MSR_ENTRY +#undef CPUID_ENTRY + }; #undef NA const char *sep, *val; + char *name; const struct cpuid_flags *flag; + const struct feature_name *feat; + + BUILD_BUG_ON(ARRAY_SIZE(feature_to_policy) != FEATURESET_NR_ENTRIES); sep = strchr(str, '='); if (sep == NULL) { @@ -393,6 +308,37 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) return cpuid_add(policy, flag, val); } + /* Provide a NUL terminated feature name to the search helper. */ + name = strndup(str, sep - str); + if (name == NULL) + return ERROR_NOMEM; + + feat = bsearch(name, features, ARRAY_SIZE(features), sizeof(features[0]), + search_feature); + free(name); + + if (feat == NULL) + return 2; + + switch (feature_to_policy[feat->bit / 32].type) { + case FEAT_CPUID: + { + struct cpuid_flags f; + + f.name = feat->name; + f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.bit = feat->bit % 32; + f.length = 1; + + return cpuid_add(policy, &f, val); + } + + case FEAT_MSR: + return 2; + } + return 2; } diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index aba31ed4aa..20750f1802 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -2471,6 +2471,9 @@ skip_usbdev: case 3: errstr = "illegal CPUID value (must be: [0|1|x|k|s])"; break; + case ERROR_NOMEM: + errstr = "out of memory"; + break; default: errstr = "unknown error"; break; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:51:58 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:51:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581759.911125 (Exim 4.92) (envelope-from ) id 1qTtuA-0000MD-Ty; Thu, 10 Aug 2023 00:51:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581759.911125; Thu, 10 Aug 2023 00:51:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuA-0000M5-R8; Thu, 10 Aug 2023 00:51:58 +0000 Received: by outflank-mailman (input) for mailman id 581759; Thu, 10 Aug 2023 00:51:57 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtu9-0000Lw-JV for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:57 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtu9-00028Y-Ij for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:57 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtu9-0001RW-I7 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:51:57 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5Hlm1HiQhP9EUJ8dUScTPUOUl9K4h1GH+/GVfXLesY4=; b=m2eARRB54W7jpJUXVvX0m8JZc6 3ufHq66NdXiB8r2gsMxix9jwB3+rTvxlUuUX4P9Z9cvHRJw7mFKuYXISh5OatHhuog70sub5ju/fK tjulg+ffS7W5HUsMN58cwm5x6PGiqdX6kwMndPrFASsp2B+UkULtQ4uBWJrjSfsJOu8Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: add support for parsing MSR features Message-Id: Date: Thu, 10 Aug 2023 00:51:57 +0000 commit d7895a7bdec3cbeebe9f6629763acc4f776ef2ae Author: Roger Pau Monne AuthorDate: Tue Jul 25 15:05:58 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: add support for parsing MSR features Introduce support for handling MSR features in libxl_cpuid_parse_config(). The MSR policies are added to the libxl_cpuid_policy like the CPUID one, which gets passed to xc_cpuid_apply_policy(). This allows existing users of libxl to provide MSR related features as key=value pairs to libxl_cpuid_parse_config() without requiring the usage of a different API. Signed-off-by: Roger Pau Monné Acked-by: Anthony PERARD (cherry picked from commit 6d21cedbaa34b3a3856f964189e911112c732b21) --- tools/libs/light/libxl_cpuid.c | 64 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index bbe5fa157b..79144ac471 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,6 +157,60 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +{ + unsigned int i = 0; + libxl_cpuid_policy_list policy = *pl; + + if (policy == NULL) + policy = *pl = calloc(1, sizeof(*policy)); + + if (policy->msr != NULL) { + for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { + if (policy->msr[i].index == index) { + return &policy->msr[i]; + } + } + } + + policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); + policy->msr[i].index = index; + memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); + policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; + policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; + + return &policy->msr[i]; +} + +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, + const char *val) +{ + struct xc_msr *entry = msr_find_match(policy, index); + + /* Only allow options taking a character for MSRs, no values allowed. */ + if (strlen(val) != 1) + return 3; + + switch (val[0]) { + case '0': + case '1': + case 'x': + case 'k': + entry->policy[63 - bit] = val[0]; + break; + + case 's': + /* Translate s -> k as xc_msr doesn't support the deprecated 's'. */ + entry->policy[63 - bit] = 'k'; + break; + + default: + return 3; + } + + return 0; +} + struct feature_name { const char *name; unsigned int bit; @@ -336,7 +390,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) } case FEAT_MSR: - return 2; + { + unsigned int bit = feat->bit % 32; + + if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + bit += 32; + + return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + bit, val); + } } return 2; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:52:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581760.911128 (Exim 4.92) (envelope-from ) id 1qTtuL-0000PZ-0x; Thu, 10 Aug 2023 00:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581760.911128; Thu, 10 Aug 2023 00:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuK-0000PS-Uo; Thu, 10 Aug 2023 00:52:08 +0000 Received: by outflank-mailman (input) for mailman id 581760; Thu, 10 Aug 2023 00:52:07 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuJ-0000PG-MQ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:07 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuJ-00028s-Lh for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:07 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtuJ-0001SI-Kz for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:07 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FcsCbHrWPBKfKajUrRZBS6D2AvmG5kkPLT8Y6Svn9kY=; b=xDalagH+YO9sNauQC5dTdjGQWm sMP1MC9jLOXpFh1Pl8g2yBNlhMoN9B2YsKG/U1WlLQWKIT9OPYRxFOoLogrCV0jh83Tw/7PWF8Egj r57AVnOh45HCdJG0TAlJKs3xQ6m4P9FFLjLFLXATCXaTuzdEiLlHYk67Y6L5mhIkXMF0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: avoid shadowing of index() Message-Id: Date: Thu, 10 Aug 2023 00:52:07 +0000 commit a5c8d2b3a9b4d2ae56fcc3e705e380189a6e351e Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:26 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: avoid shadowing of index() Because of -Wshadow the build otherwise fails with old enough glibc. While there also obey line length limits for msr_add(). Fixes: 6d21cedbaa34 ("libxl: add support for parsing MSR features") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 4f6afde88be3e8960eb311d16ac41d44ab71ed10) --- tools/libs/light/libxl_cpuid.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 79144ac471..e3bc1b4edc 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,7 +157,7 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } -static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index) +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t idx) { unsigned int i = 0; libxl_cpuid_policy_list policy = *pl; @@ -167,14 +167,14 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index if (policy->msr != NULL) { for (i = 0; policy->msr[i].index != XC_MSR_INPUT_UNUSED; i++) { - if (policy->msr[i].index == index) { + if (policy->msr[i].index == idx) { return &policy->msr[i]; } } } policy->msr = realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); - policy->msr[i].index = index; + policy->msr[i].index = idx; memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) - 1); policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] = '\0'; policy->msr[i + 1].index = XC_MSR_INPUT_UNUSED; @@ -182,10 +182,10 @@ static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t index return &policy->msr[i]; } -static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsigned int bit, - const char *val) +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t idx, + unsigned int bit, const char *val) { - struct xc_msr *entry = msr_find_match(policy, index); + struct xc_msr *entry = msr_find_match(policy, idx); /* Only allow options taking a character for MSRs, no values allowed. */ if (strlen(val) != 1) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:52:19 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:52:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581761.911132 (Exim 4.92) (envelope-from ) id 1qTtuV-0000SG-2X; Thu, 10 Aug 2023 00:52:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581761.911132; Thu, 10 Aug 2023 00:52:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuV-0000S9-02; Thu, 10 Aug 2023 00:52:19 +0000 Received: by outflank-mailman (input) for mailman id 581761; Thu, 10 Aug 2023 00:52:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuT-0000Rz-Pe for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:17 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuT-000290-Ox for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:17 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtuT-0001ju-O2 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:17 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0LxoHePgs+U7z+eDWy3twXjSVZcAo5vxriZDjMHTsZ8=; b=Bo9te9H5gyxmMoMgCnZFfcMCYN n2IpnCh2CARzRTE/fo4dxHPN1N0pX5Vwvbpsna+67KV0bLJNWlFRzVBwzN7NWsi/L4pDmgoPzefk0 BT5fTEtnPCZuowAyanb9cpjQeIudRHb7j+oLpNa49RqOyaEeepVqOL6D6p08Bu4j2uJQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] libxl: allow building with old gcc again Message-Id: Date: Thu, 10 Aug 2023 00:52:17 +0000 commit 8550519accb29ca95ac87b5ccd30440882a54671 Author: Jan Beulich AuthorDate: Thu Aug 3 17:35:39 2023 +0200 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 libxl: allow building with old gcc again We can't use initializers of unnamed struct/union members just yet. Fixes: d638fe233cb3 ("libxl: use the cpuid feature names from cpufeatureset.h") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Andrew Cooper (cherry picked from commit 1aa5acbbec3f37bf38d78fa96d210053f8e8efd5) --- tools/libs/light/libxl_cpuid.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index e3bc1b4edc..7a26688970 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -316,12 +316,16 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) uint32_t index; unsigned int reg; } msr; - }; + } u; } feature_to_policy[] = { #define CPUID_ENTRY(l, s, r) \ - { .type = FEAT_CPUID, .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } + { .type = FEAT_CPUID, \ + .u = { .cpuid.leaf = l, .cpuid.subleaf = s, .cpuid.reg = r } \ + } #define MSR_ENTRY(i, r) \ - { .type = FEAT_MSR, .msr.index = i, .msr.reg = r } + { .type = FEAT_MSR, \ + .u = { .msr.index = i, .msr.reg = r } \ + } CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), @@ -380,9 +384,9 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) struct cpuid_flags f; f.name = feat->name; - f.leaf = feature_to_policy[feat->bit / 32].cpuid.leaf; - f.subleaf = feature_to_policy[feat->bit / 32].cpuid.subleaf; - f.reg = feature_to_policy[feat->bit / 32].cpuid.reg; + f.leaf = feature_to_policy[feat->bit / 32].u.cpuid.leaf; + f.subleaf = feature_to_policy[feat->bit / 32].u.cpuid.subleaf; + f.reg = feature_to_policy[feat->bit / 32].u.cpuid.reg; f.bit = feat->bit % 32; f.length = 1; @@ -393,10 +397,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str) { unsigned int bit = feat->bit % 32; - if (feature_to_policy[feat->bit / 32].msr.reg == CPUID_REG_EDX) + if (feature_to_policy[feat->bit / 32].u.msr.reg == CPUID_REG_EDX) bit += 32; - return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + return msr_add(policy, feature_to_policy[feat->bit / 32].u.msr.index, bit, val); } } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:52:29 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:52:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581762.911138 (Exim 4.92) (envelope-from ) id 1qTtuf-0000VI-58; Thu, 10 Aug 2023 00:52:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581762.911138; Thu, 10 Aug 2023 00:52:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuf-0000V9-1c; Thu, 10 Aug 2023 00:52:29 +0000 Received: by outflank-mailman (input) for mailman id 581762; Thu, 10 Aug 2023 00:52:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtud-0000Un-Se for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtud-000297-Rw for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:27 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtud-0001ki-RF for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:27 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ibgK3r/QpqFGrSRqDYQaTH5aC3m1HTRv5N1VFi1fW4M=; b=NKH+TJNfNf+a8OzPEfZZhTT+mK 5N45L+W9OqvLg93EFelpMqmdXDZh9c8gTIG76E8ZIKFuoXppOqAvVF0BuoYo4ra9v3vBl37iT3QII 7SO8Ti2dczEvSkUT+e1E5BEUqSXlXfPhahgJWVufEOANUZlt5IdbVe47TFVqokflGwVk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default Message-Id: Date: Thu, 10 Aug 2023 00:52:27 +0000 commit a91eebbd608b832f6852f016b16b703783b59532 Author: Andrew Cooper AuthorDate: Wed May 17 10:13:36 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: Advertise MSR_ARCH_CAPS to guests by default With xl/libxl now able to control the policy bits for MSR_ARCH_CAPS, it is safe to advertise to guests by default. In turn, we don't need the special case to expose details to dom0. This advertises MSR_ARCH_CAPS to guests on *all* Intel hardware, even if the register content ends up being empty. - Advertising ARCH_CAPS and not RSBA signals "retpoline is safe here and everywhere you might migrate to". This is important because it avoids the guest kernel needing to rely on model checks. - Alternatively, levelling for safety across the Broadwell/Skylake divide requires advertising ARCH_CAPS and RSBA, meaning "retpoline not safe on some hardware you might migrate to". On Cascade Lake and later hardware, guests can now see RDCL_NO (not vulnerable to Meltdown) amongst others. This causes substantial performance improvements, as guests are no longer applying software mitigations in cases where they don't need to. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 4b2cdbfe766e5666e6754198946df2dc16f6a642) --- xen/arch/x86/cpu-policy.c | 11 ----------- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 053daf5be9..85cee6ab6d 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -845,17 +845,6 @@ void __init init_dom0_cpuid_policy(struct domain *d) if ( cpu_has_itsc ) p->extd.itsc = true; - /* - * Expose the "hardware speculation behaviour" bits of ARCH_CAPS to dom0, - * so dom0 can turn off workarounds as appropriate. Temporary, until the - * domain policy logic gains a better understanding of MSRs. - */ - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - p->feat.arch_caps = true; - p->arch_caps.raw = host_cpu_policy.arch_caps.raw; - } - /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 79270651e1..c99861a506 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -282,7 +282,7 @@ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */ XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */ XEN_CPUFEATURE(L1D_FLUSH, 9*32+28) /*S MSR_FLUSH_CMD and L1D flush. */ -XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!a IA32_ARCH_CAPABILITIES MSR */ +XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /*!A IA32_ARCH_CAPABILITIES MSR */ XEN_CPUFEATURE(CORE_CAPS, 9*32+30) /* IA32_CORE_CAPABILITIES MSR */ XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:52:39 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:52:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581763.911141 (Exim 4.92) (envelope-from ) id 1qTtup-0000YQ-5j; Thu, 10 Aug 2023 00:52:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581763.911141; Thu, 10 Aug 2023 00:52:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtup-0000YJ-33; Thu, 10 Aug 2023 00:52:39 +0000 Received: by outflank-mailman (input) for mailman id 581763; Thu, 10 Aug 2023 00:52:38 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtun-0000Y3-VW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:37 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtun-00029W-Uj for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:37 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtun-0001lX-U6 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:37 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qpu+sR+AmyQepeS0HeWlQAtdnHIrytOwCrNFw/vgyW4=; b=xmhFM3vfVPL0ifsdj6uBV6DY17 9oOkOLQilQ0JdqnH99DQCHx3xQgWaAr1Vv9BZeb5ddozIkS82bYkRDik0CjLM6RBwMQp//Akmgjve uV8mTLvrAlTbtrO0GQtu0RYXd9piKqhjwBri49wRNWu5HHmcjgFHqJwumcB7Ky1wmrTI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Rework ibpb_calculations() Message-Id: Date: Thu, 10 Aug 2023 00:52:37 +0000 commit 42105f5435035cd76572cbaea8e94bed4c74dec1 Author: Andrew Cooper AuthorDate: Thu Jul 27 20:03:28 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Rework ibpb_calculations() ... in order to make the SRSO mitigations easier to integrate. * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB. In particular, Xen supports synthesising the IBPB bit to guests on Intel to allow IBPB while dissuading the use of (legacy) IBRS. * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for both opt_ibpb_entry_{pv,hvm}. No functional change. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 292f68fb77196a35ac92b296792770d0f3190d75) --- xen/arch/x86/spec_ctrl.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 103a9f3312..2e1a26e343 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -867,6 +867,8 @@ static bool __init should_use_eager_fpu(void) static void __init ibpb_calculations(void) { + bool def_ibpb_entry = false; + /* Check we have hardware IBPB support before using it... */ if ( !boot_cpu_has(X86_FEATURE_IBRSB) && !boot_cpu_has(X86_FEATURE_IBPB) ) { @@ -875,28 +877,28 @@ static void __init ibpb_calculations(void) return; } - /* - * AMD/Hygon CPUs to date (June 2022) don't flush the the RAS. Future - * CPUs are expected to enumerate IBPB_RET when this has been fixed. - * Until then, cover the difference with the software sequence. - */ - if ( boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_IBPB_RET) ) - setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + /* + * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future + * CPUs are expected to enumerate IBPB_RET when this has been fixed. + * Until then, cover the difference with the software sequence. + */ + if ( !boot_cpu_has(X86_FEATURE_IBPB_RET) ) + setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + + /* + * AMD/Hygon CPUs up to and including Zen2 suffer from Branch Type + * Confusion. Mitigate with IBPB-on-entry. + */ + if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) + def_ibpb_entry = true; + } - /* - * IBPB-on-entry mitigations for Branch Type Confusion. - * - * IBPB && !BTC_NO selects all AMD/Hygon hardware, not known to be safe, - * that we can provide some form of mitigation on. - */ if ( opt_ibpb_entry_pv == -1 ) - opt_ibpb_entry_pv = (IS_ENABLED(CONFIG_PV) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_pv = IS_ENABLED(CONFIG_PV) && def_ibpb_entry; if ( opt_ibpb_entry_hvm == -1 ) - opt_ibpb_entry_hvm = (IS_ENABLED(CONFIG_HVM) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_hvm = IS_ENABLED(CONFIG_HVM) && def_ibpb_entry; if ( opt_ibpb_entry_pv ) { -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:52:49 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581764.911145 (Exim 4.92) (envelope-from ) id 1qTtuz-0000bb-7P; Thu, 10 Aug 2023 00:52:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581764.911145; Thu, 10 Aug 2023 00:52:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuz-0000bT-4V; Thu, 10 Aug 2023 00:52:49 +0000 Received: by outflank-mailman (input) for mailman id 581764; Thu, 10 Aug 2023 00:52:48 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuy-0000bH-2G for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:48 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtuy-00029h-1W for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:48 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtuy-0001mA-0s for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:48 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lTX5crhcziVPi6jJFQ4mKe5GFeISiZ9O+9iSyZB3sGw=; b=Gj3voMJhBDR1YdfyF3uW/QeTFI DHBrUK5vwZKqAgsKq5SoH0lZt0XkLiSFBFrvfgekM1bxsjmdhoqQh3zGxEFViUwhWBS+YBhg5vwt+ 4yYyw9jpqC9b07YW9PX75L/MHtU/cWYHtOmDQMWXI/56tvfQ/X1uruDtnMpCXxp/XYsQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:52:48 +0000 commit 30de2397d2d93e0c01137e9a72a7a1f291004565 Author: Andrew Cooper AuthorDate: Wed Jun 14 09:13:28 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 2280b0ee2aed6e0fd4af3fa31bf99bc04d038bfe) --- tools/misc/xen-cpuid.c | 3 +++ xen/arch/x86/msr.c | 5 ++++- xen/arch/x86/spec_ctrl.c | 15 ++++++++++----- xen/include/asm-x86/msr-index.h | 1 + xen/include/public/arch-x86/cpufeatureset.h | 3 +++ xen/tools/gen-cpuid.py | 1 + 6 files changed, 22 insertions(+), 6 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 0ef41e9be6..b8c1a514a1 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -187,6 +187,9 @@ static const char *const str_7a1[32] = static const char *const str_e21a[32] = { [ 2] = "lfence+", + + /* 26 */ [27] = "sbpb", + [28] = "ibpb-brtype", [29] = "srso-no", }; static const char *const str_7b1[32] = diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 9091ba4570..22f86f2785 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -405,7 +405,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( !cp->feat.ibrsb && !cp->extd.ibpb ) goto gp_fault; /* MSR available? */ - if ( val & ~PRED_CMD_IBPB ) + rsvd = ~(PRED_CMD_IBPB | + (cp->extd.sbpb ? PRED_CMD_SBPB : 0)); + + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ if ( v == curr ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 2e1a26e343..b5b06a0556 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -401,7 +401,7 @@ custom_param("pv-l1tf", parse_pv_l1tf); static void __init print_details(enum ind_thunk thunk) { - unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, e21a = 0, max = 0, tmp; uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ @@ -411,6 +411,8 @@ static void __init print_details(enum ind_thunk thunk) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000021 ) + cpuid(0x80000021, &e21a, &tmp, &tmp, &tmp); if ( cpu_has_arch_caps ) rdmsrl(MSR_ARCH_CAPABILITIES, caps); @@ -420,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -440,10 +442,12 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "", (e8b & cpufeat_mask(X86_FEATURE_BTC_NO)) ? " BTC_NO" : "", - (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); + (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : "", + (e21a & cpufeat_mask(X86_FEATURE_IBPB_BRTYPE)) ? " IBPB_BRTYPE" : "", + (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -459,7 +463,8 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); + (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) ) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 1cb472ab3d..2de819efc9 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -40,6 +40,7 @@ #define MSR_PRED_CMD 0x00000049 #define PRED_CMD_IBPB (_AC(1, ULL) << 0) +#define PRED_CMD_SBPB (_AC(1, ULL) << 7) #define MSR_PPIN_CTL 0x0000004e #define PPIN_LOCKOUT (_AC(1, ULL) << 0) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index c99861a506..492ce3aa11 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -292,6 +292,9 @@ XEN_CPUFEATURE(AVX512_BF16, 10*32+ 5) /*A AVX512 BFloat16 Instructions */ /* AMD-defined CPU features, CPUID level 0x80000021.eax, word 11 */ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ +XEN_CPUFEATURE(SBPB, 11*32+27) /*A Selective Branch Predictor Barrier */ +XEN_CPUFEATURE(IBPB_BRTYPE, 11*32+28) /*A IBPB flushes Branch Type predictions too */ +XEN_CPUFEATURE(SRSO_NO, 11*32+29) /*A Hardware not vulenrable to Speculative Return Stack Overflow */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 766703932c..c255bf4305 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -318,6 +318,7 @@ def crunch_numbers(state): IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], + IBPB: [IBPB_RET, SBPB, IBPB_BRTYPE], AMD_STIBP: [STIBP_ALWAYS], # In principle the TSXLDTRK insns could also be considered independent. -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:53:00 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:53:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581765.911149 (Exim 4.92) (envelope-from ) id 1qTtvA-0000fT-A7; Thu, 10 Aug 2023 00:53:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581765.911149; Thu, 10 Aug 2023 00:53:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvA-0000fL-7L; Thu, 10 Aug 2023 00:53:00 +0000 Received: by outflank-mailman (input) for mailman id 581765; Thu, 10 Aug 2023 00:52:58 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtv8-0000f0-6q for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:58 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtv8-00029p-60 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:58 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtv8-0001n2-3s for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:52:58 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=uNCA0xRDruVbmq+4dlvSbVYWcm/LvaKfI34u9MSLC4A=; b=H9QaCwxHAgfalVs6uGyJ/l/waQ 5YnJZWTIsobR/ngeI/tKmA+Tjuwzl8DxOX9gOzKvH8deLAQIJg+M4QfKjMLPD6b0aauzIWlkTP2iK 9vxb8PE11XuUY7DPbt4aXq0u21wR7YHm0odFnKWXE9I0r0aRngNYD73GKu5P3+Tvk3O4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Mitigate Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 00:52:58 +0000 commit b066b60cf04fe979a6dfd830f5b25d1e3aece5c5 Author: Andrew Cooper AuthorDate: Thu Jun 15 13:46:29 2023 +0100 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Mitigate Speculative Return Stack Overflow On native, synthesise the SRSO bits by probing various hardware properties as given by AMD. Extend the IBPB-on-entry mitigations to Zen3/4 CPUs. There is a microcode prerequisite to make this an effective mitigation. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné (cherry picked from commit 220c06e6fefe2378f40e2a7391f5e265a2aa50f7) --- docs/misc/xen-command-line.pandoc | 7 ++-- xen/arch/x86/spec_ctrl.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 3 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 2eacef5afd..a123e24de9 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2235,9 +2235,10 @@ guests to use. preference to here.* * `ibpb-entry=` offers control over whether IBPB (Indirect Branch Prediction Barrier) is used on entry to Xen. This is used by default on hardware - vulnerable to Branch Type Confusion, but for performance reasons, dom0 is - unprotected by default. If it necessary to protect dom0 too, boot with - `spec-ctrl=ibpb-entry`. + vulnerable to Branch Type Confusion, and hardware vulnerable to Speculative + Return Stack Overflow if appropriate microcode has been loaded, but for + performance reasons dom0 is unprotected by default. If it is necessary to + protect dom0 too, boot with `spec-ctrl=ibpb-entry`. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index b5b06a0556..47ed952198 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -870,6 +870,63 @@ static bool __init should_use_eager_fpu(void) } } +static void __init srso_calculations(bool hw_smt_enabled) +{ + if ( !(boot_cpu_data.x86_vendor & + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + return; + + /* + * If virtualised, none of these heuristics are safe. Trust the + * hypervisor completely. + */ + if ( cpu_has_hypervisor ) + return; + + if ( boot_cpu_data.x86 == 0x19 ) + { + /* + * We could have a table of models/microcode revisions. ...or we + * could just look for the new feature added. + */ + if ( wrmsr_safe(MSR_PRED_CMD, PRED_CMD_SBPB) == 0 ) + { + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + setup_force_cpu_cap(X86_FEATURE_SBPB); + } + else + printk(XENLOG_WARNING + "Vulnerable to SRSO, without suitable microcode to mitigate\n"); + } + else if ( boot_cpu_data.x86 < 0x19 ) + { + /* + * Zen1/2 (which have the IBPB microcode) have IBPB_BRTYPE behaviour + * already. + * + * Older CPUs are unknown, but their IBPB likely does flush branch + * types too. As we're synthesising for the benefit of guests, go + * with the likely option - this avoids VMs running on e.g. a Zen3 + * thinking there's no SRSO mitigation available because it may + * migrate to e.g. a Bulldozer. + */ + if ( boot_cpu_has(X86_FEATURE_IBPB) ) + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + } + + /* + * In single-thread mode on Zen1/2, microarchitectural limits prevent SRSO + * attacks from being effective. Synthesise SRSO_NO if SMT is disabled in + * hardware. + * + * Booting with smt=0, or using xen-hptool should be effective too, but + * they can be altered at runtime so it's not safe to presume SRSO_NO. + */ + if ( !hw_smt_enabled && + (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) ) + setup_force_cpu_cap(X86_FEATURE_SRSO_NO); +} + static void __init ibpb_calculations(void) { bool def_ibpb_entry = false; @@ -898,6 +955,15 @@ static void __init ibpb_calculations(void) */ if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) def_ibpb_entry = true; + + /* + * Further to BTC, Zen3/4 CPUs suffer from Speculative Return Stack + * Overflow in most configurations. Mitigate with IBPB-on-entry if we + * have the microcode that makes this an effective option. + */ + if ( !boot_cpu_has(X86_FEATURE_SRSO_NO) && + boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ) + def_ibpb_entry = true; } if ( opt_ibpb_entry_pv == -1 ) @@ -1416,6 +1482,8 @@ void __init init_speculation_mitigations(void) default_spec_ctrl_flags |= SCF_ist_rsb; } + srso_calculations(hw_smt_enabled); + ibpb_calculations(); /* Check whether Eager FPU should be enabled by default. */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:53:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:53:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581766.911153 (Exim 4.92) (envelope-from ) id 1qTtvK-0000iL-Bl; Thu, 10 Aug 2023 00:53:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581766.911153; Thu, 10 Aug 2023 00:53:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvK-0000iD-8q; Thu, 10 Aug 2023 00:53:10 +0000 Received: by outflank-mailman (input) for mailman id 581766; Thu, 10 Aug 2023 00:53:08 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvI-0000hu-9s for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:08 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvI-0002A9-97 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:08 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtvI-0001nr-8L for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:08 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BW0Xcw2HOIhGTg4IPHffFxqt5si9Hze09L3yLdNyi3c=; b=pBgr5sMSiXNlRlmH9vZjTBGwef ALwdwxs/9wLybI40wYBkVrI3HyJ2pYiqnKmOiHxu5DUaYn1UkTU1S0qr/C4kAdSDbi9i7fyMMw0mr R9TqLw4xeKY+Pg4EiXUXC+9pAAoecV+hHabfbjwcZ6rw454dAZUxROpQmHDveBxF0lVI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX Message-Id: Date: Thu, 10 Aug 2023 00:53:08 +0000 commit dab61d18df2e120a2ff40e3b101eb2792b480f4a Author: Andrew Cooper AuthorDate: Mon Feb 27 15:36:49 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX The August 2023 microcode for GDS has an impact on the CLWB instruction. See code comments for full details. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 2dd06b4ea10891750af38e4a0e1efaeb0a9b3518) --- xen/arch/x86/cpu-policy.c | 25 +++++++++++++++++++++++++ xen/arch/x86/cpu/intel.c | 12 ++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 2 +- 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 85cee6ab6d..792724db6f 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -433,6 +433,18 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) __set_bit(X86_FEATURE_ARCH_CAPS, fs); __set_bit(X86_FEATURE_RSBA, fs); __set_bit(X86_FEATURE_RRSBA, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but VMs which + * have previously seen the CLWB feature can safely run on this CPU. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __set_bit(X86_FEATURE_CLWB, fs); } } @@ -455,6 +467,19 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs) boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ && cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but re-added + * it to the max policy to let VMs migrate in. Re-hide it in the + * default policy to disuade VMs from using it in the common case. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */ && + raw_cpu_policy.feat.clwb ) + __clear_bit(X86_FEATURE_CLWB, fs); } /* diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 21419e08c3..2bda64c93a 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -518,6 +518,18 @@ static void init_intel(struct cpuinfo_x86 *c) if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) intel_log_freq(c); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * On this model, CLWB has equivalent behaviour to CLFLUSHOPT but the + * latter is not impacted. Hide CLWB to cause Xen to fall back to + * using CLFLUSHOPT instead. + */ + if (c == &boot_cpu_data && + c->x86 == 6 && c->x86_model == 0x55 /* INTEL_FAM6_SKYLAKE_X */) + setup_clear_cpu_cap(X86_FEATURE_CLWB); } const struct cpu_dev intel_cpu_dev = { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 492ce3aa11..72a82783d8 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -216,7 +216,7 @@ XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ -XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(CLWB, 5*32+24) /*!A CLWB instruction */ XEN_CPUFEATURE(PROC_TRACE, 5*32+25) /* Processor Trace */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:53:19 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:53:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581767.911157 (Exim 4.92) (envelope-from ) id 1qTtvT-0000lA-DO; Thu, 10 Aug 2023 00:53:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581767.911157; Thu, 10 Aug 2023 00:53:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvT-0000l3-AT; Thu, 10 Aug 2023 00:53:19 +0000 Received: by outflank-mailman (input) for mailman id 581767; Thu, 10 Aug 2023 00:53:18 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvS-0000kt-Cv for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:18 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvS-0002AH-CE for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:18 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtvS-0001oY-Ba for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:18 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ac1E7fJq9wzhdWwizUqwlK54i/9tzrP1lFzKRfk/BbM=; b=2SyQk3S4I+vyQWEuL9xatFxhJg 7d97kvxvJIfPmv6GhiWvwilESpKz6IYFkgYkZ7lTHUcHuZFj2Kd5dJUR5DyKCjfNsBBP6QDAREHzd xJbsZFOVT+L4zBIsOY9N3JBzn2L4AlIgDl7ozsaHmZfso+jA7mQjvcHs8GS/bwVhv/Xo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Enumerations for Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:53:18 +0000 commit abdfd732864a913e8f060f0d8db4b8c0eaec9e1b Author: Andrew Cooper AuthorDate: Wed Jan 4 17:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Enumerations for Gather Data Sampling GDS_CTRL is introduced by the August 2023 microcode. GDS_NO is for current and future processors not susceptible to GDS. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 9f585f59d90c8d3a1b21369a852b7d7eee8a29b9) --- tools/misc/xen-cpuid.c | 3 ++- xen/arch/x86/spec_ctrl.c | 6 ++++-- xen/include/asm-x86/cpufeature.h | 2 ++ xen/include/asm-x86/msr-index.h | 4 ++++ xen/include/public/arch-x86/cpufeatureset.h | 2 ++ 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index b8c1a514a1..860ef07352 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -223,7 +223,8 @@ static const char *const str_m10Al[32] = [18] = "fb-clear-ctrl", [19] = "rrsba", [20] = "bhi-no", [21] = "xapic-status", /* 22 */ [23] = "ovrclk-status", - [24] = "pbrsb-no", + [24] = "pbrsb-no", [25] = "gds-ctrl", + [26] = "gds-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 47ed952198..19001532d3 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -422,7 +422,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -437,6 +437,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", + (caps & ARCH_CAPS_GDS_NO) ? " GDS_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", @@ -447,7 +448,7 @@ static void __init print_details(enum ind_thunk thunk) (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -464,6 +465,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (caps & ARCH_CAPS_GDS_CTRL) ? " GDS_CTRL" : "", (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 63d31f079a..ecdc7d9b71 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -157,6 +157,8 @@ #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) #define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) +#define cpu_has_gds_ctrl boot_cpu_has(X86_FEATURE_GDS_CTRL) +#define cpu_has_gds_no boot_cpu_has(X86_FEATURE_GDS_NO) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 2de819efc9..8b3ad575db 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -68,6 +68,8 @@ #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) +#define ARCH_CAPS_GDS_CTRL (_AC(1, ULL) << 25) +#define ARCH_CAPS_GDS_NO (_AC(1, ULL) << 26) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) @@ -86,6 +88,8 @@ #define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1) #define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2) #define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3) +#define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) +#define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) #define MSR_RTIT_OUTPUT_BASE 0x00000560 #define MSR_RTIT_OUTPUT_MASK 0x00000561 diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 72a82783d8..e434fc9bae 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -329,6 +329,8 @@ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection * XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ +XEN_CPUFEATURE(GDS_CTRL, 16*32+25) /* MCU_OPT_CTRL.GDS_MIT_{DIS,LOCK} */ +XEN_CPUFEATURE(GDS_NO, 16*32+26) /*A No Gather Data Sampling */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:53:29 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:53:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581768.911160 (Exim 4.92) (envelope-from ) id 1qTtvd-0000oe-Eb; Thu, 10 Aug 2023 00:53:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581768.911160; Thu, 10 Aug 2023 00:53:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvd-0000oX-C6; Thu, 10 Aug 2023 00:53:29 +0000 Received: by outflank-mailman (input) for mailman id 581768; Thu, 10 Aug 2023 00:53:28 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvc-0000oN-Ge for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:28 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qTtvc-0002AQ-Fu for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:28 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qTtvc-0001pR-Ee for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 00:53:28 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9PX4yz8RWSC6v9rDBmALoBzj7mxLxU54YNJLDY/qjmg=; b=2xoCEaQ+D5cyi7rhu9XyK0/lTS av2vFzJfwJu6sm55LQFszUM1WD8ZXcI61gyLYwBByAtk4b1BD+04KdG54d+fcSF3HSnxUj7SYr3/w z++KFad0YgltN//hlpclV7pgoD0G249iRP1D9amqySFCdNuInvnsG1O5ytIxaC/2Grbk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] x86/spec-ctrl: Mitigate Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 00:53:28 +0000 commit 1c5c12d3b3de6d62082c3e57825b5eeedd2b7dba Author: Andrew Cooper AuthorDate: Wed Jan 4 16:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Thu Aug 3 19:13:40 2023 +0100 x86/spec-ctrl: Mitigate Gather Data Sampling This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 56d690efd3ca3c68e1d222f259fb3d216206e8e5) --- docs/misc/xen-command-line.pandoc | 10 ++- xen/arch/x86/spec_ctrl.c | 158 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index a123e24de9..16a61ad858 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2189,7 +2189,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`). > {msr-sc,rsb,md-clear,ibpb-entry}=|{pv,hvm}=, > bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd, > eager-fpu,l1d-flush,branch-harden,srb-lock, -> unpriv-mmio}= ]` +> unpriv-mmio,gds-mit}= ]` Controls for speculative execution sidechannel mitigations. By default, Xen will pick the most appropriate mitigations based on compiled in support, @@ -2301,6 +2301,14 @@ and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode release to mitigate cross-domain leakage of data via the MMIO Stale Data vulnerabilities. +On all hardware, the `gds-mit=` option can be used to force or prevent Xen +from mitigating the GDS (Gather Data Sampling) vulnerability. By default, Xen +will mitigate GDS on hardware believed to be vulnerable. On hardware +supporting GDS_CTRL (requires the August 2023 microcode), and where firmware +has elected not to lock the configuration, Xen will use GDS_CTRL to mitigate +GDS with. Otherwise, Xen will mitigate by disabling AVX, which blocks the use +of the AVX2 Gather instructions. + ### sync_console > `= ` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 19001532d3..e9cc6b586a 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -77,6 +77,7 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. static int8_t __initdata opt_srb_lock = -1; static bool __initdata opt_unpriv_mmio; static bool __read_mostly opt_fb_clear_mmio; +static int8_t __initdata opt_gds_mit = -1; static int __init parse_spec_ctrl(const char *s) { @@ -130,6 +131,7 @@ static int __init parse_spec_ctrl(const char *s) opt_branch_harden = false; opt_srb_lock = 0; opt_unpriv_mmio = false; + opt_gds_mit = 0; } else if ( val > 0 ) rc = -EINVAL; @@ -280,6 +282,8 @@ static int __init parse_spec_ctrl(const char *s) opt_srb_lock = val; else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 ) opt_unpriv_mmio = val; + else if ( (val = parse_boolean("gds-mit", s, ss)) >= 0 ) + opt_gds_mit = val; else rc = -EINVAL; @@ -1245,6 +1249,158 @@ static __init void mds_calculations(void) } } +static bool __init cpu_has_gds(void) +{ + /* + * Any part advertising GDS_NO should be not vulnerable to GDS. This + * includes cases where the hypervisor is mitigating behind our backs, or + * has synthesized GDS_NO on older parts for levelling purposes. + */ + if ( cpu_has_gds_no ) + return false; + + /* + * On real hardware the GDS_CTRL control only exists on parts vulnerable + * to GDS and with up-to-date microcode. It might also be virtualised by + * an aware hypervisor, meaning "somewhere you might migrate to is + * vulnerable". + */ + if ( cpu_has_gds_ctrl ) + return true; + + /* + * An attacker requires the use of the AVX2 GATHER instructions to leak + * data with GDS. However, the only way to block those instructions is to + * prevent XCR0[2] from being set, which is original AVX. A hypervisor + * might do this as a stopgap mitigation. + */ + if ( !cpu_has_avx ) + return false; + + /* + * GDS affects the Core line from Skylake up to but not including Golden + * Cove (Alder Lake, Sapphire Rapids). Broadwell and older, and the Atom + * line, and all hybrid parts are unaffected. + */ + switch ( boot_cpu_data.x86_model ) + { + case 0x55: /* Skylake/Cascade Lake/Cooper Lake SP */ + case 0x6a: /* Ice Lake SP */ + case 0x6c: /* Ice Lake D */ + case 0x7e: /* Ice Lake U/Y */ + case 0x8c: /* Tiger Lake U */ + case 0x8d: /* Tiger Lake H */ + case 0x8e: /* Amber/Kaby/Coffee/Whiskey/Comet lake U/Y */ + case 0x9e: /* Kaby/Coffee lake H/S/Xeon */ + case 0xa5: /* Comet Lake H/S */ + case 0xa6: /* Comet Lake U */ + case 0xa7: /* Rocket Lake */ + return true; + + default: + /* + * If we've got here and are virtualised, we're most likely under a + * hypervisor unaware of GDS at which point we've lost. Err on the + * safe side. + */ + return cpu_has_hypervisor; + } +} + +static void __init gds_calculations(void) +{ + bool cpu_has_bug_gds, mitigated = false; + + /* GDS is only known to affect Intel Family 6 processors at this time. */ + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + cpu_has_bug_gds = cpu_has_gds(); + + /* + * If we've got GDS_CTRL, we're either native with up-to-date microcode on + * a GDS-vulnerable part, or virtualised under a GDS-aware hypervisor. + */ + if ( cpu_has_gds_ctrl ) + { + bool locked; + uint64_t opt_ctrl; + + if ( cpu_has_gds_no ) + { + /* + * We don't expect to ever see GDS_CTL and GDS_NO set together. + * Complain loudly, and forgo playing with other features. + */ + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: GDS_CTRL && GDS_NO\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, this_cpu(cpu_sig).rev); + return add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + rdmsrl(MSR_MCU_OPT_CTRL, opt_ctrl); + + mitigated = !(opt_ctrl & MCU_OPT_CTRL_GDS_MIT_DIS); + locked = opt_ctrl & MCU_OPT_CTRL_GDS_MIT_LOCK; + + /* + * Firmware will lock the GDS mitigation if e.g. SGX is active. + * Alternatively, a hypervisor might virtualise GDS_CTRL as locked. + * Warn if the mitigiation is locked and the user requested the + * opposite configuration. + */ + if ( locked ) + { + if ( opt_gds_mit >= 0 && opt_gds_mit != mitigated ) + printk(XENLOG_WARNING + "GDS_MIT locked by firwmare - ignoring spec-ctrl=gds-mit setting\n"); + opt_gds_mit = mitigated; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * Latch our choice of GDS_MIT for all CPUs to pick up. If LOCK is + * set, we latch the same value as it currently holds. + */ + set_in_mcu_opt_ctrl(MCU_OPT_CTRL_GDS_MIT_DIS, + opt_gds_mit ? 0 : MCU_OPT_CTRL_GDS_MIT_DIS); + mitigated = opt_gds_mit; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * If we think we're not on vulnerable hardware, or we've mitigated GDS, + * synthesize GDS_NO. This is mostly for the benefit of guests, to inform + * them not to panic. + */ + if ( !cpu_has_bug_gds || mitigated ) + return setup_force_cpu_cap(X86_FEATURE_GDS_NO); + + /* + * If all else has failed, mitigate by disabling AVX. This prevents + * guests from enabling %xcr0.ymm, thereby blocking the use of VGATHER + * instructions. + * + * There's at least one affected CPU not expected to recieve a microcode + * update, and this is the only remaining mitigation. + * + * If we're virtualised, this prevents our guests attacking each other, + * but it doesn't stop the outer hypervisor's guests attacking us. Leave + * a note to this effect. + */ + if ( cpu_has_avx && opt_gds_mit ) + { + setup_clear_cpu_cap(X86_FEATURE_AVX); + printk(XENLOG_WARNING "Mitigating GDS by disabling AVX%s\n", + cpu_has_hypervisor ? + " while virtualised - protections are best-effort" : ""); + } +} + void spec_ctrl_init_domain(struct domain *d) { bool pv = is_pv_domain(d); @@ -1675,6 +1831,8 @@ void __init init_speculation_mitigations(void) opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } + gds_calculations(); + print_details(thunk); /* -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 00:53:39 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 00:53:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.581769.911165 (Exim 4.92) (envelope-from ) id 1qTtvn-0000s1-Hh; Thu, 10 Aug 2023 00:53:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 581769.911165; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IngzykvtvvqMkDSoA0hSmCDLX0jLRvBVLGqrPVwwz1Q=; b=vqa35nkWKD2CRwJz5cBPT25cR6 goREamZVa7wPzOlXP/WLmJCS0YxBnh/qUGYbBCElIPSyWbicae3ppM5DUXLIVUL1PF2ziH6Oz6Op7 n9+GyWQaqn+m9TK+CPvQll1i7cS78izzPrfByk7PN6aRL8mSns5kSXIdEnHUXZwKoISE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.15] Update Xen to version 4.15.5 Message-Id: Date: Thu, 10 Aug 2023 00:53:38 +0000 commit da7f151a63108db5543ca53c1e902c34ae6ee825 Author: Andrew Cooper AuthorDate: Mon Aug 7 13:08:21 2023 +0100 Commit: Andrew Cooper CommitDate: Mon Aug 7 13:08:26 2023 +0100 Update Xen to version 4.15.5 Signed-off-by: Andrew Cooper --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index fc692c00da..3df09c361c 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -2,7 +2,7 @@ # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 15 -export XEN_EXTRAVERSION ?= .4$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .5$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.15 From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582055.911582 (Exim 4.92) (envelope-from ) id 1qU3ZG-0005iu-Cn; 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Thu, 10 Aug 2023 11:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RuGyWS90odPBdwK0X1p5nYC0pTstoDC9iQj7f2rquDI=; b=G43WkjQy61mEVugb5AyZCwdOvD Xq2D1q5N8N/Q2tn/h9g0AzlrgwbNdtwILICQ9ZXKUnkIcAqV6N2B6eeQjSOiEt13SIYBeV3M+ZZsZ 8ArzwgNjR382N8372O80o48iAWhH5ddk8MtezKMPejGC7LaK5C5pkKcAUMPcRk4IGdfM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/ppc: Add OPAL API definition header file Message-Id: Date: Thu, 10 Aug 2023 11:11:01 +0000 commit c99f57a783be85557790f21b0a972d58281a5d87 Author: Shawn Anastasio AuthorDate: Tue Aug 8 09:39:37 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 8 09:39:37 2023 +0200 xen/ppc: Add OPAL API definition header file OPAL (OpenPower Abstraction Layer) is the interface exposed by firmware on PowerNV (bare metal) systems. Import Linux's header definining the API and related information. From Linux commit 5321d1b1afb9a17302c6cec79f0cbf823eb0d3fc Signed-off-by: Shawn Anastasio Acked-by: Jan Beulich --- xen/arch/ppc/include/asm/opal-api.h | 1190 +++++++++++++++++++++++++++++++++++ 1 file changed, 1190 insertions(+) diff --git a/xen/arch/ppc/include/asm/opal-api.h b/xen/arch/ppc/include/asm/opal-api.h new file mode 100644 index 0000000000..8790246f48 --- /dev/null +++ b/xen/arch/ppc/include/asm/opal-api.h @@ -0,0 +1,1190 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * OPAL API definitions. + * + * Copyright 2011-2015 IBM Corp. + */ + +#ifndef __OPAL_API_H +#define __OPAL_API_H + +/****** OPAL APIs ******/ + +/* Return codes */ +#define OPAL_SUCCESS 0 +#define OPAL_PARAMETER -1 +#define OPAL_BUSY -2 +#define OPAL_PARTIAL -3 +#define OPAL_CONSTRAINED -4 +#define OPAL_CLOSED -5 +#define OPAL_HARDWARE -6 +#define OPAL_UNSUPPORTED -7 +#define OPAL_PERMISSION -8 +#define OPAL_NO_MEM -9 +#define OPAL_RESOURCE -10 +#define OPAL_INTERNAL_ERROR -11 +#define OPAL_BUSY_EVENT -12 +#define OPAL_HARDWARE_FROZEN -13 +#define OPAL_WRONG_STATE -14 +#define OPAL_ASYNC_COMPLETION -15 +#define OPAL_EMPTY -16 +#define OPAL_I2C_TIMEOUT -17 +#define OPAL_I2C_INVALID_CMD -18 +#define OPAL_I2C_LBUS_PARITY -19 +#define OPAL_I2C_BKEND_OVERRUN -20 +#define OPAL_I2C_BKEND_ACCESS -21 +#define OPAL_I2C_ARBT_LOST -22 +#define OPAL_I2C_NACK_RCVD -23 +#define OPAL_I2C_STOP_ERR -24 +#define OPAL_XIVE_PROVISIONING -31 +#define OPAL_XIVE_FREE_ACTIVE -32 +#define OPAL_TIMEOUT -33 + +/* API Tokens (in r0) */ +#define OPAL_INVALID_CALL -1 +#define OPAL_TEST 0 +#define OPAL_CONSOLE_WRITE 1 +#define OPAL_CONSOLE_READ 2 +#define OPAL_RTC_READ 3 +#define OPAL_RTC_WRITE 4 +#define OPAL_CEC_POWER_DOWN 5 +#define OPAL_CEC_REBOOT 6 +#define OPAL_READ_NVRAM 7 +#define OPAL_WRITE_NVRAM 8 +#define OPAL_HANDLE_INTERRUPT 9 +#define OPAL_POLL_EVENTS 10 +#define OPAL_PCI_SET_HUB_TCE_MEMORY 11 +#define OPAL_PCI_SET_PHB_TCE_MEMORY 12 +#define OPAL_PCI_CONFIG_READ_BYTE 13 +#define OPAL_PCI_CONFIG_READ_HALF_WORD 14 +#define OPAL_PCI_CONFIG_READ_WORD 15 +#define OPAL_PCI_CONFIG_WRITE_BYTE 16 +#define OPAL_PCI_CONFIG_WRITE_HALF_WORD 17 +#define OPAL_PCI_CONFIG_WRITE_WORD 18 +#define OPAL_SET_XIVE 19 +#define OPAL_GET_XIVE 20 +#define OPAL_GET_COMPLETION_TOKEN_STATUS 21 /* obsolete */ +#define OPAL_REGISTER_OPAL_EXCEPTION_HANDLER 22 +#define OPAL_PCI_EEH_FREEZE_STATUS 23 +#define OPAL_PCI_SHPC 24 +#define OPAL_CONSOLE_WRITE_BUFFER_SPACE 25 +#define OPAL_PCI_EEH_FREEZE_CLEAR 26 +#define OPAL_PCI_PHB_MMIO_ENABLE 27 +#define OPAL_PCI_SET_PHB_MEM_WINDOW 28 +#define OPAL_PCI_MAP_PE_MMIO_WINDOW 29 +#define OPAL_PCI_SET_PHB_TABLE_MEMORY 30 +#define OPAL_PCI_SET_PE 31 +#define OPAL_PCI_SET_PELTV 32 +#define OPAL_PCI_SET_MVE 33 +#define OPAL_PCI_SET_MVE_ENABLE 34 +#define OPAL_PCI_GET_XIVE_REISSUE 35 +#define OPAL_PCI_SET_XIVE_REISSUE 36 +#define OPAL_PCI_SET_XIVE_PE 37 +#define OPAL_GET_XIVE_SOURCE 38 +#define OPAL_GET_MSI_32 39 +#define OPAL_GET_MSI_64 40 +#define OPAL_START_CPU 41 +#define OPAL_QUERY_CPU_STATUS 42 +#define OPAL_WRITE_OPPANEL 43 /* unimplemented */ +#define OPAL_PCI_MAP_PE_DMA_WINDOW 44 +#define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45 +#define OPAL_PCI_RESET 49 +#define OPAL_PCI_GET_HUB_DIAG_DATA 50 +#define OPAL_PCI_GET_PHB_DIAG_DATA 51 +#define OPAL_PCI_FENCE_PHB 52 +#define OPAL_PCI_REINIT 53 +#define OPAL_PCI_MASK_PE_ERROR 54 +#define OPAL_SET_SLOT_LED_STATUS 55 +#define OPAL_GET_EPOW_STATUS 56 +#define OPAL_SET_SYSTEM_ATTENTION_LED 57 +#define OPAL_RESERVED1 58 +#define OPAL_RESERVED2 59 +#define OPAL_PCI_NEXT_ERROR 60 +#define OPAL_PCI_EEH_FREEZE_STATUS2 61 +#define OPAL_PCI_POLL 62 +#define OPAL_PCI_MSI_EOI 63 +#define OPAL_PCI_GET_PHB_DIAG_DATA2 64 +#define OPAL_XSCOM_READ 65 +#define OPAL_XSCOM_WRITE 66 +#define OPAL_LPC_READ 67 +#define OPAL_LPC_WRITE 68 +#define OPAL_RETURN_CPU 69 +#define OPAL_REINIT_CPUS 70 +#define OPAL_ELOG_READ 71 +#define OPAL_ELOG_WRITE 72 +#define OPAL_ELOG_ACK 73 +#define OPAL_ELOG_RESEND 74 +#define OPAL_ELOG_SIZE 75 +#define OPAL_FLASH_VALIDATE 76 +#define OPAL_FLASH_MANAGE 77 +#define OPAL_FLASH_UPDATE 78 +#define OPAL_RESYNC_TIMEBASE 79 +#define OPAL_CHECK_TOKEN 80 +#define OPAL_DUMP_INIT 81 +#define OPAL_DUMP_INFO 82 +#define OPAL_DUMP_READ 83 +#define OPAL_DUMP_ACK 84 +#define OPAL_GET_MSG 85 +#define OPAL_CHECK_ASYNC_COMPLETION 86 +#define OPAL_SYNC_HOST_REBOOT 87 +#define OPAL_SENSOR_READ 88 +#define OPAL_GET_PARAM 89 +#define OPAL_SET_PARAM 90 +#define OPAL_DUMP_RESEND 91 +#define OPAL_ELOG_SEND 92 /* Deprecated */ +#define OPAL_PCI_SET_PHB_CAPI_MODE 93 +#define OPAL_DUMP_INFO2 94 +#define OPAL_WRITE_OPPANEL_ASYNC 95 +#define OPAL_PCI_ERR_INJECT 96 +#define OPAL_PCI_EEH_FREEZE_SET 97 +#define OPAL_HANDLE_HMI 98 +#define OPAL_CONFIG_CPU_IDLE_STATE 99 +#define OPAL_SLW_SET_REG 100 +#define OPAL_REGISTER_DUMP_REGION 101 +#define OPAL_UNREGISTER_DUMP_REGION 102 +#define OPAL_WRITE_TPO 103 +#define OPAL_READ_TPO 104 +#define OPAL_GET_DPO_STATUS 105 +#define OPAL_OLD_I2C_REQUEST 106 /* Deprecated */ +#define OPAL_IPMI_SEND 107 +#define OPAL_IPMI_RECV 108 +#define OPAL_I2C_REQUEST 109 +#define OPAL_FLASH_READ 110 +#define OPAL_FLASH_WRITE 111 +#define OPAL_FLASH_ERASE 112 +#define OPAL_PRD_MSG 113 +#define OPAL_LEDS_GET_INDICATOR 114 +#define OPAL_LEDS_SET_INDICATOR 115 +#define OPAL_CEC_REBOOT2 116 +#define OPAL_CONSOLE_FLUSH 117 +#define OPAL_GET_DEVICE_TREE 118 +#define OPAL_PCI_GET_PRESENCE_STATE 119 +#define OPAL_PCI_GET_POWER_STATE 120 +#define OPAL_PCI_SET_POWER_STATE 121 +#define OPAL_INT_GET_XIRR 122 +#define OPAL_INT_SET_CPPR 123 +#define OPAL_INT_EOI 124 +#define OPAL_INT_SET_MFRR 125 +#define OPAL_PCI_TCE_KILL 126 +#define OPAL_NMMU_SET_PTCR 127 +#define OPAL_XIVE_RESET 128 +#define OPAL_XIVE_GET_IRQ_INFO 129 +#define OPAL_XIVE_GET_IRQ_CONFIG 130 +#define OPAL_XIVE_SET_IRQ_CONFIG 131 +#define OPAL_XIVE_GET_QUEUE_INFO 132 +#define OPAL_XIVE_SET_QUEUE_INFO 133 +#define OPAL_XIVE_DONATE_PAGE 134 +#define OPAL_XIVE_ALLOCATE_VP_BLOCK 135 +#define OPAL_XIVE_FREE_VP_BLOCK 136 +#define OPAL_XIVE_GET_VP_INFO 137 +#define OPAL_XIVE_SET_VP_INFO 138 +#define OPAL_XIVE_ALLOCATE_IRQ 139 +#define OPAL_XIVE_FREE_IRQ 140 +#define OPAL_XIVE_SYNC 141 +#define OPAL_XIVE_DUMP 142 +#define OPAL_XIVE_GET_QUEUE_STATE 143 +#define OPAL_XIVE_SET_QUEUE_STATE 144 +#define OPAL_SIGNAL_SYSTEM_RESET 145 +#define OPAL_NPU_INIT_CONTEXT 146 +#define OPAL_NPU_DESTROY_CONTEXT 147 +#define OPAL_NPU_MAP_LPAR 148 +#define OPAL_IMC_COUNTERS_INIT 149 +#define OPAL_IMC_COUNTERS_START 150 +#define OPAL_IMC_COUNTERS_STOP 151 +#define OPAL_GET_POWERCAP 152 +#define OPAL_SET_POWERCAP 153 +#define OPAL_GET_POWER_SHIFT_RATIO 154 +#define OPAL_SET_POWER_SHIFT_RATIO 155 +#define OPAL_SENSOR_GROUP_CLEAR 156 +#define OPAL_PCI_SET_P2P 157 +#define OPAL_QUIESCE 158 +#define OPAL_NPU_SPA_SETUP 159 +#define OPAL_NPU_SPA_CLEAR_CACHE 160 +#define OPAL_NPU_TL_SET 161 +#define OPAL_SENSOR_READ_U64 162 +#define OPAL_SENSOR_GROUP_ENABLE 163 +#define OPAL_PCI_GET_PBCQ_TUNNEL_BAR 164 +#define OPAL_PCI_SET_PBCQ_TUNNEL_BAR 165 +#define OPAL_HANDLE_HMI2 166 +#define OPAL_NX_COPROC_INIT 167 +#define OPAL_XIVE_GET_VP_STATE 170 +#define OPAL_MPIPL_UPDATE 173 +#define OPAL_MPIPL_REGISTER_TAG 174 +#define OPAL_MPIPL_QUERY_TAG 175 +#define OPAL_SECVAR_GET 176 +#define OPAL_SECVAR_GET_NEXT 177 +#define OPAL_SECVAR_ENQUEUE_UPDATE 178 +#define OPAL_LAST 178 + +#define QUIESCE_HOLD 1 /* Spin all calls at entry */ +#define QUIESCE_REJECT 2 /* Fail all calls with OPAL_BUSY */ +#define QUIESCE_LOCK_BREAK 3 /* Set to ignore locks. */ +#define QUIESCE_RESUME 4 /* Un-quiesce */ +#define QUIESCE_RESUME_FAST_REBOOT 5 /* Un-quiesce, fast reboot */ + +/* Device tree flags */ + +/* + * Flags set in power-mgmt nodes in device tree describing + * idle states that are supported in the platform. + */ + +#define OPAL_PM_TIMEBASE_STOP 0x00000002 +#define OPAL_PM_LOSE_HYP_CONTEXT 0x00002000 +#define OPAL_PM_LOSE_FULL_CONTEXT 0x00004000 +#define OPAL_PM_NAP_ENABLED 0x00010000 +#define OPAL_PM_SLEEP_ENABLED 0x00020000 +#define OPAL_PM_WINKLE_ENABLED 0x00040000 +#define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000 /* with workaround */ +#define OPAL_PM_STOP_INST_FAST 0x00100000 +#define OPAL_PM_STOP_INST_DEEP 0x00200000 + +/* + * OPAL_CONFIG_CPU_IDLE_STATE parameters + */ +#define OPAL_CONFIG_IDLE_FASTSLEEP 1 +#define OPAL_CONFIG_IDLE_UNDO 0 +#define OPAL_CONFIG_IDLE_APPLY 1 + +#ifndef __ASSEMBLY__ + +#include + +/* Other enums */ +enum OpalFreezeState { + OPAL_EEH_STOPPED_NOT_FROZEN = 0, + OPAL_EEH_STOPPED_MMIO_FREEZE = 1, + OPAL_EEH_STOPPED_DMA_FREEZE = 2, + OPAL_EEH_STOPPED_MMIO_DMA_FREEZE = 3, + OPAL_EEH_STOPPED_RESET = 4, + OPAL_EEH_STOPPED_TEMP_UNAVAIL = 5, + OPAL_EEH_STOPPED_PERM_UNAVAIL = 6 +}; + +enum OpalEehFreezeActionToken { + OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO = 1, + OPAL_EEH_ACTION_CLEAR_FREEZE_DMA = 2, + OPAL_EEH_ACTION_CLEAR_FREEZE_ALL = 3, + + OPAL_EEH_ACTION_SET_FREEZE_MMIO = 1, + OPAL_EEH_ACTION_SET_FREEZE_DMA = 2, + OPAL_EEH_ACTION_SET_FREEZE_ALL = 3 +}; + +enum OpalPciStatusToken { + OPAL_EEH_NO_ERROR = 0, + OPAL_EEH_IOC_ERROR = 1, + OPAL_EEH_PHB_ERROR = 2, + OPAL_EEH_PE_ERROR = 3, + OPAL_EEH_PE_MMIO_ERROR = 4, + OPAL_EEH_PE_DMA_ERROR = 5 +}; + +enum OpalPciErrorSeverity { + OPAL_EEH_SEV_NO_ERROR = 0, + OPAL_EEH_SEV_IOC_DEAD = 1, + OPAL_EEH_SEV_PHB_DEAD = 2, + OPAL_EEH_SEV_PHB_FENCED = 3, + OPAL_EEH_SEV_PE_ER = 4, + OPAL_EEH_SEV_INF = 5 +}; + +enum OpalErrinjectType { + OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR = 0, + OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64 = 1, +}; + +enum OpalErrinjectFunc { + /* IOA bus specific errors */ + OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR = 0, + OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_DATA = 1, + OPAL_ERR_INJECT_FUNC_IOA_LD_IO_ADDR = 2, + OPAL_ERR_INJECT_FUNC_IOA_LD_IO_DATA = 3, + OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_ADDR = 4, + OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_DATA = 5, + OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_ADDR = 6, + OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_DATA = 7, + OPAL_ERR_INJECT_FUNC_IOA_ST_IO_ADDR = 8, + OPAL_ERR_INJECT_FUNC_IOA_ST_IO_DATA = 9, + OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_ADDR = 10, + OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_DATA = 11, + OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_ADDR = 12, + OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_DATA = 13, + OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_MASTER = 14, + OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_TARGET = 15, + OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_ADDR = 16, + OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_DATA = 17, + OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_MASTER = 18, + OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_TARGET = 19, +}; + +enum OpalMmioWindowType { + OPAL_M32_WINDOW_TYPE = 1, + OPAL_M64_WINDOW_TYPE = 2, + OPAL_IO_WINDOW_TYPE = 3 +}; + +enum OpalExceptionHandler { + OPAL_MACHINE_CHECK_HANDLER = 1, + OPAL_HYPERVISOR_MAINTENANCE_HANDLER = 2, + OPAL_SOFTPATCH_HANDLER = 3 +}; + +enum OpalPendingState { + OPAL_EVENT_OPAL_INTERNAL = 0x1, + OPAL_EVENT_NVRAM = 0x2, + OPAL_EVENT_RTC = 0x4, + OPAL_EVENT_CONSOLE_OUTPUT = 0x8, + OPAL_EVENT_CONSOLE_INPUT = 0x10, + OPAL_EVENT_ERROR_LOG_AVAIL = 0x20, + OPAL_EVENT_ERROR_LOG = 0x40, + OPAL_EVENT_EPOW = 0x80, + OPAL_EVENT_LED_STATUS = 0x100, + OPAL_EVENT_PCI_ERROR = 0x200, + OPAL_EVENT_DUMP_AVAIL = 0x400, + OPAL_EVENT_MSG_PENDING = 0x800, +}; + +enum OpalThreadStatus { + OPAL_THREAD_INACTIVE = 0x0, + OPAL_THREAD_STARTED = 0x1, + OPAL_THREAD_UNAVAILABLE = 0x2 /* opal-v3 */ +}; + +enum OpalPciBusCompare { + OpalPciBusAny = 0, /* Any bus number match */ + OpalPciBus3Bits = 2, /* Match top 3 bits of bus number */ + OpalPciBus4Bits = 3, /* Match top 4 bits of bus number */ + OpalPciBus5Bits = 4, /* Match top 5 bits of bus number */ + OpalPciBus6Bits = 5, /* Match top 6 bits of bus number */ + OpalPciBus7Bits = 6, /* Match top 7 bits of bus number */ + OpalPciBusAll = 7, /* Match bus number exactly */ +}; + +enum OpalDeviceCompare { + OPAL_IGNORE_RID_DEVICE_NUMBER = 0, + OPAL_COMPARE_RID_DEVICE_NUMBER = 1 +}; + +enum OpalFuncCompare { + OPAL_IGNORE_RID_FUNCTION_NUMBER = 0, + OPAL_COMPARE_RID_FUNCTION_NUMBER = 1 +}; + +enum OpalPeAction { + OPAL_UNMAP_PE = 0, + OPAL_MAP_PE = 1 +}; + +enum OpalPeltvAction { + OPAL_REMOVE_PE_FROM_DOMAIN = 0, + OPAL_ADD_PE_TO_DOMAIN = 1 +}; + +enum OpalMveEnableAction { + OPAL_DISABLE_MVE = 0, + OPAL_ENABLE_MVE = 1 +}; + +enum OpalM64Action { + OPAL_DISABLE_M64 = 0, + OPAL_ENABLE_M64_SPLIT = 1, + OPAL_ENABLE_M64_NON_SPLIT = 2 +}; + +enum OpalPciResetScope { + OPAL_RESET_PHB_COMPLETE = 1, + OPAL_RESET_PCI_LINK = 2, + OPAL_RESET_PHB_ERROR = 3, + OPAL_RESET_PCI_HOT = 4, + OPAL_RESET_PCI_FUNDAMENTAL = 5, + OPAL_RESET_PCI_IODA_TABLE = 6 +}; + +enum OpalPciReinitScope { + /* + * Note: we chose values that do not overlap + * OpalPciResetScope as OPAL v2 used the same + * enum for both + */ + OPAL_REINIT_PCI_DEV = 1000 +}; + +enum OpalPciResetState { + OPAL_DEASSERT_RESET = 0, + OPAL_ASSERT_RESET = 1 +}; + +enum OpalPciSlotPresence { + OPAL_PCI_SLOT_EMPTY = 0, + OPAL_PCI_SLOT_PRESENT = 1 +}; + +enum OpalPciSlotPower { + OPAL_PCI_SLOT_POWER_OFF = 0, + OPAL_PCI_SLOT_POWER_ON = 1, + OPAL_PCI_SLOT_OFFLINE = 2, + OPAL_PCI_SLOT_ONLINE = 3 +}; + +enum OpalSlotLedType { + OPAL_SLOT_LED_TYPE_ID = 0, /* IDENTIFY LED */ + OPAL_SLOT_LED_TYPE_FAULT = 1, /* FAULT LED */ + OPAL_SLOT_LED_TYPE_ATTN = 2, /* System Attention LED */ + OPAL_SLOT_LED_TYPE_MAX = 3 +}; + +enum OpalSlotLedState { + OPAL_SLOT_LED_STATE_OFF = 0, /* LED is OFF */ + OPAL_SLOT_LED_STATE_ON = 1 /* LED is ON */ +}; + +/* + * Address cycle types for LPC accesses. These also correspond + * to the content of the first cell of the "reg" property for + * device nodes on the LPC bus + */ +enum OpalLPCAddressType { + OPAL_LPC_MEM = 0, + OPAL_LPC_IO = 1, + OPAL_LPC_FW = 2, +}; + +enum opal_msg_type { + OPAL_MSG_ASYNC_COMP = 0, /* params[0] = token, params[1] = rc, + * additional params function-specific + */ + OPAL_MSG_MEM_ERR = 1, + OPAL_MSG_EPOW = 2, + OPAL_MSG_SHUTDOWN = 3, /* params[0] = 1 reboot, 0 shutdown */ + OPAL_MSG_HMI_EVT = 4, + OPAL_MSG_DPO = 5, + OPAL_MSG_PRD = 6, + OPAL_MSG_OCC = 7, + OPAL_MSG_PRD2 = 8, + OPAL_MSG_TYPE_MAX, +}; + +struct opal_msg { + __be32 msg_type; + __be32 reserved; + __be64 params[8]; +}; + +/* System parameter permission */ +enum OpalSysparamPerm { + OPAL_SYSPARAM_READ = 0x1, + OPAL_SYSPARAM_WRITE = 0x2, + OPAL_SYSPARAM_RW = (OPAL_SYSPARAM_READ | OPAL_SYSPARAM_WRITE), +}; + +enum { + OPAL_IPMI_MSG_FORMAT_VERSION_1 = 1, +}; + +struct opal_ipmi_msg { + uint8_t version; + uint8_t netfn; + uint8_t cmd; + uint8_t data[]; +}; + +/* FSP memory errors handling */ +enum OpalMemErr_Version { + OpalMemErr_V1 = 1, +}; + +enum OpalMemErrType { + OPAL_MEM_ERR_TYPE_RESILIENCE = 0, + OPAL_MEM_ERR_TYPE_DYN_DALLOC, +}; + +/* Memory Reilience error type */ +enum OpalMemErr_ResilErrType { + OPAL_MEM_RESILIENCE_CE = 0, + OPAL_MEM_RESILIENCE_UE, + OPAL_MEM_RESILIENCE_UE_SCRUB, +}; + +/* Dynamic Memory Deallocation type */ +enum OpalMemErr_DynErrType { + OPAL_MEM_DYNAMIC_DEALLOC = 0, +}; + +struct OpalMemoryErrorData { + enum OpalMemErr_Version version:8; /* 0x00 */ + enum OpalMemErrType type:8; /* 0x01 */ + __be16 flags; /* 0x02 */ + uint8_t reserved_1[4]; /* 0x04 */ + + union { + /* Memory Resilience corrected/uncorrected error info */ + struct { + enum OpalMemErr_ResilErrType resil_err_type:8; + uint8_t reserved_1[7]; + __be64 physical_address_start; + __be64 physical_address_end; + } resilience; + /* Dynamic memory deallocation error info */ + struct { + enum OpalMemErr_DynErrType dyn_err_type:8; + uint8_t reserved_1[7]; + __be64 physical_address_start; + __be64 physical_address_end; + } dyn_dealloc; + } u; +}; + +/* HMI interrupt event */ +enum OpalHMI_Version { + OpalHMIEvt_V1 = 1, + OpalHMIEvt_V2 = 2, +}; + +enum OpalHMI_Severity { + OpalHMI_SEV_NO_ERROR = 0, + OpalHMI_SEV_WARNING = 1, + OpalHMI_SEV_ERROR_SYNC = 2, + OpalHMI_SEV_FATAL = 3, +}; + +enum OpalHMI_Disposition { + OpalHMI_DISPOSITION_RECOVERED = 0, + OpalHMI_DISPOSITION_NOT_RECOVERED = 1, +}; + +enum OpalHMI_ErrType { + OpalHMI_ERROR_MALFUNC_ALERT = 0, + OpalHMI_ERROR_PROC_RECOV_DONE, + OpalHMI_ERROR_PROC_RECOV_DONE_AGAIN, + OpalHMI_ERROR_PROC_RECOV_MASKED, + OpalHMI_ERROR_TFAC, + OpalHMI_ERROR_TFMR_PARITY, + OpalHMI_ERROR_HA_OVERFLOW_WARN, + OpalHMI_ERROR_XSCOM_FAIL, + OpalHMI_ERROR_XSCOM_DONE, + OpalHMI_ERROR_SCOM_FIR, + OpalHMI_ERROR_DEBUG_TRIG_FIR, + OpalHMI_ERROR_HYP_RESOURCE, + OpalHMI_ERROR_CAPP_RECOVERY, +}; + +enum OpalHMI_XstopType { + CHECKSTOP_TYPE_UNKNOWN = 0, + CHECKSTOP_TYPE_CORE = 1, + CHECKSTOP_TYPE_NX = 2, + CHECKSTOP_TYPE_NPU = 3 +}; + +enum OpalHMI_CoreXstopReason { + CORE_CHECKSTOP_IFU_REGFILE = 0x00000001, + CORE_CHECKSTOP_IFU_LOGIC = 0x00000002, + CORE_CHECKSTOP_PC_DURING_RECOV = 0x00000004, + CORE_CHECKSTOP_ISU_REGFILE = 0x00000008, + CORE_CHECKSTOP_ISU_LOGIC = 0x00000010, + CORE_CHECKSTOP_FXU_LOGIC = 0x00000020, + CORE_CHECKSTOP_VSU_LOGIC = 0x00000040, + CORE_CHECKSTOP_PC_RECOV_IN_MAINT_MODE = 0x00000080, + CORE_CHECKSTOP_LSU_REGFILE = 0x00000100, + CORE_CHECKSTOP_PC_FWD_PROGRESS = 0x00000200, + CORE_CHECKSTOP_LSU_LOGIC = 0x00000400, + CORE_CHECKSTOP_PC_LOGIC = 0x00000800, + CORE_CHECKSTOP_PC_HYP_RESOURCE = 0x00001000, + CORE_CHECKSTOP_PC_HANG_RECOV_FAILED = 0x00002000, + CORE_CHECKSTOP_PC_AMBI_HANG_DETECTED = 0x00004000, + CORE_CHECKSTOP_PC_DEBUG_TRIG_ERR_INJ = 0x00008000, + CORE_CHECKSTOP_PC_SPRD_HYP_ERR_INJ = 0x00010000, +}; + +enum OpalHMI_NestAccelXstopReason { + NX_CHECKSTOP_SHM_INVAL_STATE_ERR = 0x00000001, + NX_CHECKSTOP_DMA_INVAL_STATE_ERR_1 = 0x00000002, + NX_CHECKSTOP_DMA_INVAL_STATE_ERR_2 = 0x00000004, + NX_CHECKSTOP_DMA_CH0_INVAL_STATE_ERR = 0x00000008, + NX_CHECKSTOP_DMA_CH1_INVAL_STATE_ERR = 0x00000010, + NX_CHECKSTOP_DMA_CH2_INVAL_STATE_ERR = 0x00000020, + NX_CHECKSTOP_DMA_CH3_INVAL_STATE_ERR = 0x00000040, + NX_CHECKSTOP_DMA_CH4_INVAL_STATE_ERR = 0x00000080, + NX_CHECKSTOP_DMA_CH5_INVAL_STATE_ERR = 0x00000100, + NX_CHECKSTOP_DMA_CH6_INVAL_STATE_ERR = 0x00000200, + NX_CHECKSTOP_DMA_CH7_INVAL_STATE_ERR = 0x00000400, + NX_CHECKSTOP_DMA_CRB_UE = 0x00000800, + NX_CHECKSTOP_DMA_CRB_SUE = 0x00001000, + NX_CHECKSTOP_PBI_ISN_UE = 0x00002000, +}; + +struct OpalHMIEvent { + uint8_t version; /* 0x00 */ + uint8_t severity; /* 0x01 */ + uint8_t type; /* 0x02 */ + uint8_t disposition; /* 0x03 */ + uint8_t reserved_1[4]; /* 0x04 */ + + __be64 hmer; + /* TFMR register. Valid only for TFAC and TFMR_PARITY error type. */ + __be64 tfmr; + + /* version 2 and later */ + union { + /* + * checkstop info (Core/NX). + * Valid for OpalHMI_ERROR_MALFUNC_ALERT. + */ + struct { + uint8_t xstop_type; /* enum OpalHMI_XstopType */ + uint8_t reserved_1[3]; + __be32 xstop_reason; + union { + __be32 pir; /* for CHECKSTOP_TYPE_CORE */ + __be32 chip_id; /* for CHECKSTOP_TYPE_NX */ + } u; + } xstop_error; + } u; +}; + +/* OPAL_HANDLE_HMI2 out_flags */ +enum { + OPAL_HMI_FLAGS_TB_RESYNC = (1ull << 0), /* Timebase has been resynced */ + OPAL_HMI_FLAGS_DEC_LOST = (1ull << 1), /* DEC lost, needs to be reprogrammed */ + OPAL_HMI_FLAGS_HDEC_LOST = (1ull << 2), /* HDEC lost, needs to be reprogrammed */ + OPAL_HMI_FLAGS_TOD_TB_FAIL = (1ull << 3), /* TOD/TB recovery failed. */ + OPAL_HMI_FLAGS_NEW_EVENT = (1ull << 63), /* An event has been created */ +}; + +enum { + OPAL_P7IOC_DIAG_TYPE_NONE = 0, + OPAL_P7IOC_DIAG_TYPE_RGC = 1, + OPAL_P7IOC_DIAG_TYPE_BI = 2, + OPAL_P7IOC_DIAG_TYPE_CI = 3, + OPAL_P7IOC_DIAG_TYPE_MISC = 4, + OPAL_P7IOC_DIAG_TYPE_I2C = 5, + OPAL_P7IOC_DIAG_TYPE_LAST = 6 +}; + +struct OpalIoP7IOCErrorData { + __be16 type; + + /* GEM */ + __be64 gemXfir; + __be64 gemRfir; + __be64 gemRirqfir; + __be64 gemMask; + __be64 gemRwof; + + /* LEM */ + __be64 lemFir; + __be64 lemErrMask; + __be64 lemAction0; + __be64 lemAction1; + __be64 lemWof; + + union { + struct OpalIoP7IOCRgcErrorData { + __be64 rgcStatus; /* 3E1C10 */ + __be64 rgcLdcp; /* 3E1C18 */ + }rgc; + struct OpalIoP7IOCBiErrorData { + __be64 biLdcp0; /* 3C0100, 3C0118 */ + __be64 biLdcp1; /* 3C0108, 3C0120 */ + __be64 biLdcp2; /* 3C0110, 3C0128 */ + __be64 biFenceStatus; /* 3C0130, 3C0130 */ + + uint8_t biDownbound; /* BI Downbound or Upbound */ + }bi; + struct OpalIoP7IOCCiErrorData { + __be64 ciPortStatus; /* 3Dn008 */ + __be64 ciPortLdcp; /* 3Dn010 */ + + uint8_t ciPort; /* Index of CI port: 0/1 */ + }ci; + }; +}; + +/** + * This structure defines the overlay which will be used to store PHB error + * data upon request. + */ +enum { + OPAL_PHB_ERROR_DATA_VERSION_1 = 1, +}; + +enum { + OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1, + OPAL_PHB_ERROR_DATA_TYPE_PHB3 = 2, + OPAL_PHB_ERROR_DATA_TYPE_PHB4 = 3 +}; + +enum { + OPAL_P7IOC_NUM_PEST_REGS = 128, + OPAL_PHB3_NUM_PEST_REGS = 256, + OPAL_PHB4_NUM_PEST_REGS = 512 +}; + +struct OpalIoPhbErrorCommon { + __be32 version; + __be32 ioType; + __be32 len; +}; + +struct OpalIoP7IOCPhbErrorData { + struct OpalIoPhbErrorCommon common; + + __be32 brdgCtl; + + // P7IOC utl regs + __be32 portStatusReg; + __be32 rootCmplxStatus; + __be32 busAgentStatus; + + // P7IOC cfg regs + __be32 deviceStatus; + __be32 slotStatus; + __be32 linkStatus; + __be32 devCmdStatus; + __be32 devSecStatus; + + // cfg AER regs + __be32 rootErrorStatus; + __be32 uncorrErrorStatus; + __be32 corrErrorStatus; + __be32 tlpHdr1; + __be32 tlpHdr2; + __be32 tlpHdr3; + __be32 tlpHdr4; + __be32 sourceId; + + __be32 rsv3; + + // Record data about the call to allocate a buffer. + __be64 errorClass; + __be64 correlator; + + //P7IOC MMIO Error Regs + __be64 p7iocPlssr; // n120 + __be64 p7iocCsr; // n110 + __be64 lemFir; // nC00 + __be64 lemErrorMask; // nC18 + __be64 lemWOF; // nC40 + __be64 phbErrorStatus; // nC80 + __be64 phbFirstErrorStatus; // nC88 + __be64 phbErrorLog0; // nCC0 + __be64 phbErrorLog1; // nCC8 + __be64 mmioErrorStatus; // nD00 + __be64 mmioFirstErrorStatus; // nD08 + __be64 mmioErrorLog0; // nD40 + __be64 mmioErrorLog1; // nD48 + __be64 dma0ErrorStatus; // nD80 + __be64 dma0FirstErrorStatus; // nD88 + __be64 dma0ErrorLog0; // nDC0 + __be64 dma0ErrorLog1; // nDC8 + __be64 dma1ErrorStatus; // nE00 + __be64 dma1FirstErrorStatus; // nE08 + __be64 dma1ErrorLog0; // nE40 + __be64 dma1ErrorLog1; // nE48 + __be64 pestA[OPAL_P7IOC_NUM_PEST_REGS]; + __be64 pestB[OPAL_P7IOC_NUM_PEST_REGS]; +}; + +struct OpalIoPhb3ErrorData { + struct OpalIoPhbErrorCommon common; + + __be32 brdgCtl; + + /* PHB3 UTL regs */ + __be32 portStatusReg; + __be32 rootCmplxStatus; + __be32 busAgentStatus; + + /* PHB3 cfg regs */ + __be32 deviceStatus; + __be32 slotStatus; + __be32 linkStatus; + __be32 devCmdStatus; + __be32 devSecStatus; + + /* cfg AER regs */ + __be32 rootErrorStatus; + __be32 uncorrErrorStatus; + __be32 corrErrorStatus; + __be32 tlpHdr1; + __be32 tlpHdr2; + __be32 tlpHdr3; + __be32 tlpHdr4; + __be32 sourceId; + + __be32 rsv3; + + /* Record data about the call to allocate a buffer */ + __be64 errorClass; + __be64 correlator; + + /* PHB3 MMIO Error Regs */ + __be64 nFir; /* 000 */ + __be64 nFirMask; /* 003 */ + __be64 nFirWOF; /* 008 */ + __be64 phbPlssr; /* 120 */ + __be64 phbCsr; /* 110 */ + __be64 lemFir; /* C00 */ + __be64 lemErrorMask; /* C18 */ + __be64 lemWOF; /* C40 */ + __be64 phbErrorStatus; /* C80 */ + __be64 phbFirstErrorStatus; /* C88 */ + __be64 phbErrorLog0; /* CC0 */ + __be64 phbErrorLog1; /* CC8 */ + __be64 mmioErrorStatus; /* D00 */ + __be64 mmioFirstErrorStatus; /* D08 */ + __be64 mmioErrorLog0; /* D40 */ + __be64 mmioErrorLog1; /* D48 */ + __be64 dma0ErrorStatus; /* D80 */ + __be64 dma0FirstErrorStatus; /* D88 */ + __be64 dma0ErrorLog0; /* DC0 */ + __be64 dma0ErrorLog1; /* DC8 */ + __be64 dma1ErrorStatus; /* E00 */ + __be64 dma1FirstErrorStatus; /* E08 */ + __be64 dma1ErrorLog0; /* E40 */ + __be64 dma1ErrorLog1; /* E48 */ + __be64 pestA[OPAL_PHB3_NUM_PEST_REGS]; + __be64 pestB[OPAL_PHB3_NUM_PEST_REGS]; +}; + +struct OpalIoPhb4ErrorData { + struct OpalIoPhbErrorCommon common; + + __be32 brdgCtl; + + /* PHB4 cfg regs */ + __be32 deviceStatus; + __be32 slotStatus; + __be32 linkStatus; + __be32 devCmdStatus; + __be32 devSecStatus; + + /* cfg AER regs */ + __be32 rootErrorStatus; + __be32 uncorrErrorStatus; + __be32 corrErrorStatus; + __be32 tlpHdr1; + __be32 tlpHdr2; + __be32 tlpHdr3; + __be32 tlpHdr4; + __be32 sourceId; + + /* PHB4 ETU Error Regs */ + __be64 nFir; /* 000 */ + __be64 nFirMask; /* 003 */ + __be64 nFirWOF; /* 008 */ + __be64 phbPlssr; /* 120 */ + __be64 phbCsr; /* 110 */ + __be64 lemFir; /* C00 */ + __be64 lemErrorMask; /* C18 */ + __be64 lemWOF; /* C40 */ + __be64 phbErrorStatus; /* C80 */ + __be64 phbFirstErrorStatus; /* C88 */ + __be64 phbErrorLog0; /* CC0 */ + __be64 phbErrorLog1; /* CC8 */ + __be64 phbTxeErrorStatus; /* D00 */ + __be64 phbTxeFirstErrorStatus; /* D08 */ + __be64 phbTxeErrorLog0; /* D40 */ + __be64 phbTxeErrorLog1; /* D48 */ + __be64 phbRxeArbErrorStatus; /* D80 */ + __be64 phbRxeArbFirstErrorStatus; /* D88 */ + __be64 phbRxeArbErrorLog0; /* DC0 */ + __be64 phbRxeArbErrorLog1; /* DC8 */ + __be64 phbRxeMrgErrorStatus; /* E00 */ + __be64 phbRxeMrgFirstErrorStatus; /* E08 */ + __be64 phbRxeMrgErrorLog0; /* E40 */ + __be64 phbRxeMrgErrorLog1; /* E48 */ + __be64 phbRxeTceErrorStatus; /* E80 */ + __be64 phbRxeTceFirstErrorStatus; /* E88 */ + __be64 phbRxeTceErrorLog0; /* EC0 */ + __be64 phbRxeTceErrorLog1; /* EC8 */ + + /* PHB4 REGB Error Regs */ + __be64 phbPblErrorStatus; /* 1900 */ + __be64 phbPblFirstErrorStatus; /* 1908 */ + __be64 phbPblErrorLog0; /* 1940 */ + __be64 phbPblErrorLog1; /* 1948 */ + __be64 phbPcieDlpErrorLog1; /* 1AA0 */ + __be64 phbPcieDlpErrorLog2; /* 1AA8 */ + __be64 phbPcieDlpErrorStatus; /* 1AB0 */ + __be64 phbRegbErrorStatus; /* 1C00 */ + __be64 phbRegbFirstErrorStatus; /* 1C08 */ + __be64 phbRegbErrorLog0; /* 1C40 */ + __be64 phbRegbErrorLog1; /* 1C48 */ + + __be64 pestA[OPAL_PHB4_NUM_PEST_REGS]; + __be64 pestB[OPAL_PHB4_NUM_PEST_REGS]; +}; + +enum { + OPAL_REINIT_CPUS_HILE_BE = (1 << 0), + OPAL_REINIT_CPUS_HILE_LE = (1 << 1), + + /* These two define the base MMU mode of the host on P9 + * + * On P9 Nimbus DD2.0 and Cumlus (and later), KVM can still + * create hash guests in "radix" mode with care (full core + * switch only). + */ + OPAL_REINIT_CPUS_MMU_HASH = (1 << 2), + OPAL_REINIT_CPUS_MMU_RADIX = (1 << 3), + + OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED = (1 << 4), +}; + +typedef struct oppanel_line { + __be64 line; + __be64 line_len; +} oppanel_line_t; + +enum opal_prd_msg_type { + OPAL_PRD_MSG_TYPE_INIT = 0, /* HBRT --> OPAL */ + OPAL_PRD_MSG_TYPE_FINI, /* HBRT/kernel --> OPAL */ + OPAL_PRD_MSG_TYPE_ATTN, /* HBRT <-- OPAL */ + OPAL_PRD_MSG_TYPE_ATTN_ACK, /* HBRT --> OPAL */ + OPAL_PRD_MSG_TYPE_OCC_ERROR, /* HBRT <-- OPAL */ + OPAL_PRD_MSG_TYPE_OCC_RESET, /* HBRT <-- OPAL */ +}; + +struct opal_prd_msg_header { + uint8_t type; + uint8_t pad[1]; + __be16 size; +}; + +struct opal_prd_msg; + +#define OCC_RESET 0 +#define OCC_LOAD 1 +#define OCC_THROTTLE 2 +#define OCC_MAX_THROTTLE_STATUS 5 + +struct opal_occ_msg { + __be64 type; + __be64 chip; + __be64 throttle_status; +}; + +/* + * SG entries + * + * WARNING: The current implementation requires each entry + * to represent a block that is 4k aligned *and* each block + * size except the last one in the list to be as well. + */ +struct opal_sg_entry { + __be64 data; + __be64 length; +}; + +/* + * Candidate image SG list. + * + * length = VER | length + */ +struct opal_sg_list { + __be64 length; + __be64 next; + struct opal_sg_entry entry[]; +}; + +/* + * Dump region ID range usable by the OS + */ +#define OPAL_DUMP_REGION_HOST_START 0x80 +#define OPAL_DUMP_REGION_LOG_BUF 0x80 +#define OPAL_DUMP_REGION_HOST_END 0xFF + +/* CAPI modes for PHB */ +enum { + OPAL_PHB_CAPI_MODE_PCIE = 0, + OPAL_PHB_CAPI_MODE_CAPI = 1, + OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2, + OPAL_PHB_CAPI_MODE_SNOOP_ON = 3, + OPAL_PHB_CAPI_MODE_DMA = 4, + OPAL_PHB_CAPI_MODE_DMA_TVT1 = 5, +}; + +/* OPAL I2C request */ +struct opal_i2c_request { + uint8_t type; +#define OPAL_I2C_RAW_READ 0 +#define OPAL_I2C_RAW_WRITE 1 +#define OPAL_I2C_SM_READ 2 +#define OPAL_I2C_SM_WRITE 3 + uint8_t flags; +#define OPAL_I2C_ADDR_10 0x01 /* Not supported yet */ + uint8_t subaddr_sz; /* Max 4 */ + uint8_t reserved; + __be16 addr; /* 7 or 10 bit address */ + __be16 reserved2; + __be32 subaddr; /* Sub-address if any */ + __be32 size; /* Data size */ + __be64 buffer_ra; /* Buffer real address */ +}; + +/* + * EPOW status sharing (OPAL and the host) + * + * The host will pass on OPAL, a buffer of length OPAL_SYSEPOW_MAX + * with individual elements being 16 bits wide to fetch the system + * wide EPOW status. Each element in the buffer will contain the + * EPOW status in it's bit representation for a particular EPOW sub + * class as defined here. So multiple detailed EPOW status bits + * specific for any sub class can be represented in a single buffer + * element as it's bit representation. + */ + +/* System EPOW type */ +enum OpalSysEpow { + OPAL_SYSEPOW_POWER = 0, /* Power EPOW */ + OPAL_SYSEPOW_TEMP = 1, /* Temperature EPOW */ + OPAL_SYSEPOW_COOLING = 2, /* Cooling EPOW */ + OPAL_SYSEPOW_MAX = 3, /* Max EPOW categories */ +}; + +/* Power EPOW */ +enum OpalSysPower { + OPAL_SYSPOWER_UPS = 0x0001, /* System on UPS power */ + OPAL_SYSPOWER_CHNG = 0x0002, /* System power config change */ + OPAL_SYSPOWER_FAIL = 0x0004, /* System impending power failure */ + OPAL_SYSPOWER_INCL = 0x0008, /* System incomplete power */ +}; + +/* Temperature EPOW */ +enum OpalSysTemp { + OPAL_SYSTEMP_AMB = 0x0001, /* System over ambient temperature */ + OPAL_SYSTEMP_INT = 0x0002, /* System over internal temperature */ + OPAL_SYSTEMP_HMD = 0x0004, /* System over ambient humidity */ +}; + +/* Cooling EPOW */ +enum OpalSysCooling { + OPAL_SYSCOOL_INSF = 0x0001, /* System insufficient cooling */ +}; + +/* Argument to OPAL_CEC_REBOOT2() */ +enum { + OPAL_REBOOT_NORMAL = 0, + OPAL_REBOOT_PLATFORM_ERROR = 1, + OPAL_REBOOT_FULL_IPL = 2, + OPAL_REBOOT_MPIPL = 3, + OPAL_REBOOT_FAST = 4, +}; + +/* Argument to OPAL_PCI_TCE_KILL */ +enum { + OPAL_PCI_TCE_KILL_PAGES, + OPAL_PCI_TCE_KILL_PE, + OPAL_PCI_TCE_KILL_ALL, +}; + +/* The xive operation mode indicates the active "API" and + * corresponds to the "mode" parameter of the opal_xive_reset() + * call + */ +enum { + OPAL_XIVE_MODE_EMU = 0, + OPAL_XIVE_MODE_EXPL = 1, +}; + +/* Flags for OPAL_XIVE_GET_IRQ_INFO */ +enum { + OPAL_XIVE_IRQ_TRIGGER_PAGE = 0x00000001, + OPAL_XIVE_IRQ_STORE_EOI = 0x00000002, + OPAL_XIVE_IRQ_LSI = 0x00000004, + OPAL_XIVE_IRQ_SHIFT_BUG = 0x00000008, /* P9 DD1.0 workaround */ + OPAL_XIVE_IRQ_MASK_VIA_FW = 0x00000010, /* P9 DD1.0 workaround */ + OPAL_XIVE_IRQ_EOI_VIA_FW = 0x00000020, /* P9 DD1.0 workaround */ + OPAL_XIVE_IRQ_STORE_EOI2 = 0x00000040, +}; + +/* Flags for OPAL_XIVE_GET/SET_QUEUE_INFO */ +enum { + OPAL_XIVE_EQ_ENABLED = 0x00000001, + OPAL_XIVE_EQ_ALWAYS_NOTIFY = 0x00000002, + OPAL_XIVE_EQ_ESCALATE = 0x00000004, +}; + +/* Flags for OPAL_XIVE_GET/SET_VP_INFO */ +enum { + OPAL_XIVE_VP_ENABLED = 0x00000001, + OPAL_XIVE_VP_SINGLE_ESCALATION = 0x00000002, +}; + +/* "Any chip" replacement for chip ID for allocation functions */ +enum { + OPAL_XIVE_ANY_CHIP = 0xffffffff, +}; + +/* Xive sync options */ +enum { + /* This bits are cumulative, arg is a girq */ + XIVE_SYNC_EAS = 0x00000001, /* Sync irq source */ + XIVE_SYNC_QUEUE = 0x00000002, /* Sync irq target */ +}; + +/* Dump options */ +enum { + XIVE_DUMP_TM_HYP = 0, + XIVE_DUMP_TM_POOL = 1, + XIVE_DUMP_TM_OS = 2, + XIVE_DUMP_TM_USER = 3, + XIVE_DUMP_VP = 4, + XIVE_DUMP_EMU_STATE = 5, +}; + +/* "type" argument options for OPAL_IMC_COUNTERS_* calls */ +enum { + OPAL_IMC_COUNTERS_NEST = 1, + OPAL_IMC_COUNTERS_CORE = 2, + OPAL_IMC_COUNTERS_TRACE = 3, +}; + + +/* PCI p2p descriptor */ +#define OPAL_PCI_P2P_ENABLE 0x1 +#define OPAL_PCI_P2P_LOAD 0x2 +#define OPAL_PCI_P2P_STORE 0x4 + +/* MPIPL update operations */ +enum opal_mpipl_ops { + OPAL_MPIPL_ADD_RANGE = 0, + OPAL_MPIPL_REMOVE_RANGE = 1, + OPAL_MPIPL_REMOVE_ALL = 2, + OPAL_MPIPL_FREE_PRESERVED_MEMORY = 3, +}; + +/* Tag will point to various metadata area. Kernel will + * use tag to get metadata value. + */ +enum opal_mpipl_tags { + OPAL_MPIPL_TAG_CPU = 0, + OPAL_MPIPL_TAG_OPAL = 1, + OPAL_MPIPL_TAG_KERNEL = 2, + OPAL_MPIPL_TAG_BOOT_MEM = 3, +}; + +/* Preserved memory details */ +struct opal_mpipl_region { + __be64 src; + __be64 dest; + __be64 size; +}; + +/* Structure version */ +#define OPAL_MPIPL_VERSION 0x01 + +struct opal_mpipl_fadump { + uint8_t version; + uint8_t reserved[7]; + __be32 crashing_pir; /* OPAL crashing CPU PIR */ + __be32 cpu_data_version; + __be32 cpu_data_size; + __be32 region_cnt; + struct opal_mpipl_region region[]; +} __packed; + +#endif /* __ASSEMBLY__ */ + +#endif /* __OPAL_API_H */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582056.911584 (Exim 4.92) (envelope-from ) id 1qU3ZQ-0005lV-Ev; Thu, 10 Aug 2023 11:11:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582056.911584; Thu, 10 Aug 2023 11:11:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ZQ-0005lO-CO; Thu, 10 Aug 2023 11:11:12 +0000 Received: by outflank-mailman (input) for mailman id 582056; Thu, 10 Aug 2023 11:11:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ZP-0005lG-Lm for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ZP-0004IJ-Kx for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3ZP-0004wP-K7 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=eRrObFO7fRzRWGCX2IISZrl9FFO09H1SZeKhZajogg8=; b=55o/iVHuoZpS2XOVI/gtudwTj6 /jrPat/EQEIvjxYgLm5HNpUBTriIeqiOhB3caXFZqkoU4UAh5tcE+sbsRACZhYLzdF+g8qn1wWojw ipEtDdPE7gvyStd7L0N5QFZjDYXVu3+jMIqXnSfC85TqmW624bu2t4rAexNYyq/+EKi4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/ppc: Parse device tree for OPAL node on PowerNV Message-Id: Date: Thu, 10 Aug 2023 11:11:11 +0000 commit 6fc15ec32b2d07b1fbce1c3cc4ac5e3432c60c8f Author: Shawn Anastasio AuthorDate: Tue Aug 1 19:11:05 2023 -0500 Commit: Jan Beulich CommitDate: Tue Aug 8 09:41:03 2023 +0200 xen/ppc: Parse device tree for OPAL node on PowerNV Communication with firmware boot services on PowerNV requires parsing the fdt blob passed by the bootloader in order to obtain the firmware entrypoint. Use Xen's libfdt to do this and store the information required for firmware calls, to be implemented in a future patch. The full xen/common build doesn't yet work, but libfdt and its xen/lib dependency can be made to build by defining a few stub headers. Signed-off-by: Shawn Anastasio Acked-by: Jan Beulich --- xen/arch/ppc/Kconfig | 1 + xen/arch/ppc/Makefile | 1 + xen/arch/ppc/arch.mk | 3 +-- xen/arch/ppc/include/asm/boot.h | 16 +++++++++++- xen/arch/ppc/include/asm/bug.h | 18 ++++++++++++++ xen/arch/ppc/include/asm/cache.h | 6 +++++ xen/arch/ppc/include/asm/processor.h | 13 +++++++++- xen/arch/ppc/include/asm/string.h | 6 +++++ xen/arch/ppc/include/asm/system.h | 6 +++++ xen/arch/ppc/opal.c | 48 ++++++++++++++++++++++++++++++++++++ xen/arch/ppc/setup.c | 9 +++++-- 11 files changed, 121 insertions(+), 6 deletions(-) diff --git a/xen/arch/ppc/Kconfig b/xen/arch/ppc/Kconfig index a2ade2ecf4..b32dce39b8 100644 --- a/xen/arch/ppc/Kconfig +++ b/xen/arch/ppc/Kconfig @@ -1,5 +1,6 @@ config PPC def_bool y + select HAS_DEVICE_TREE config PPC64 def_bool y diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index 098a4dd0a9..0c0a7884a1 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_PPC64) += ppc64/ obj-y += boot-of.init.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.init.o +obj-y += opal.o obj-y += setup.o $(TARGET): $(TARGET)-syms diff --git a/xen/arch/ppc/arch.mk b/xen/arch/ppc/arch.mk index 0183b9ac6a..3bf79bac37 100644 --- a/xen/arch/ppc/arch.mk +++ b/xen/arch/ppc/arch.mk @@ -10,5 +10,4 @@ CFLAGS += -mstrict-align -mcmodel=medium -mabi=elfv2 -fPIC -mno-altivec -mno-vsx LDFLAGS += -m elf64lppc # TODO: Drop override when more of the build is working -override ALL_OBJS-y = arch/$(SRCARCH)/built_in.o -override ALL_LIBS-y = +override ALL_OBJS-y = arch/$(SRCARCH)/built_in.o common/libfdt/built_in.o lib/built_in.o diff --git a/xen/arch/ppc/include/asm/boot.h b/xen/arch/ppc/include/asm/boot.h index 9b8a7c43c2..296539cd9e 100644 --- a/xen/arch/ppc/include/asm/boot.h +++ b/xen/arch/ppc/include/asm/boot.h @@ -4,7 +4,10 @@ #include -/* a collection of interfaces used during boot. */ +/* + * OpenFirmware boot interfaces + */ + enum { OF_FAILURE = -1, OF_SUCCESS = 0, @@ -20,4 +23,15 @@ struct of_service { int enter_of(struct of_service *args, unsigned long entry); void boot_of_init(unsigned long vec); +/* + * OPAL boot interfaces + */ + +struct opal { + uint64_t base; + uint64_t entry; +}; + +void boot_opal_init(const void *fdt); + #endif /* _ASM_PPC_BOOT_H */ diff --git a/xen/arch/ppc/include/asm/bug.h b/xen/arch/ppc/include/asm/bug.h new file mode 100644 index 0000000000..e5e874b31c --- /dev/null +++ b/xen/arch/ppc/include/asm/bug.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_PPC_BUG_H +#define _ASM_PPC_BUG_H + +#include + +/* + * Power ISA guarantees that an instruction consisting of all zeroes is + * illegal. + */ +#define BUG_OPCODE 0x00000000 + +#define BUG_INSTR ".long " __stringify(BUG_OPCODE) + +#define BUG_FN_REG r0 + +#endif /* _ASM_PPC_BUG_H */ diff --git a/xen/arch/ppc/include/asm/cache.h b/xen/arch/ppc/include/asm/cache.h new file mode 100644 index 0000000000..8a0a6b7b17 --- /dev/null +++ b/xen/arch/ppc/include/asm/cache.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_PPC_CACHE_H +#define _ASM_PPC_CACHE_H + +#endif /* _ASM_PPC_CACHE_H */ diff --git a/xen/arch/ppc/include/asm/processor.h b/xen/arch/ppc/include/asm/processor.h index 838d279508..2300640787 100644 --- a/xen/arch/ppc/include/asm/processor.h +++ b/xen/arch/ppc/include/asm/processor.h @@ -133,6 +133,17 @@ struct cpu_user_regs uint32_t entry_vector; }; -#endif +/* + * panic() isn't available at the moment so an infinite loop will be + * used temporarily. + * TODO: change it to panic() + */ +static inline void noreturn die(void) +{ + for ( ; ; ) + HMT_very_low(); +} + +#endif /* __ASSEMBLY__ */ #endif /* _ASM_PPC_PROCESSOR_H */ diff --git a/xen/arch/ppc/include/asm/string.h b/xen/arch/ppc/include/asm/string.h new file mode 100644 index 0000000000..7a420e05e4 --- /dev/null +++ b/xen/arch/ppc/include/asm/string.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_PPC_STRING_H +#define _ASM_PPC_STRING_H + +#endif /* _ASM_PPC_STRING_H */ diff --git a/xen/arch/ppc/include/asm/system.h b/xen/arch/ppc/include/asm/system.h new file mode 100644 index 0000000000..94091df644 --- /dev/null +++ b/xen/arch/ppc/include/asm/system.h @@ -0,0 +1,6 @@ +#ifndef _ASM_SYSTEM_H_ +#define _ASM_SYSTEM_H_ + +#define smp_wmb() __asm__ __volatile__ ( "lwsync" : : : "memory" ) + +#endif /* _ASM_SYSTEM_H */ diff --git a/xen/arch/ppc/opal.c b/xen/arch/ppc/opal.c new file mode 100644 index 0000000000..251de8ac23 --- /dev/null +++ b/xen/arch/ppc/opal.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include +#include +#include +#include +#include +#include +#include + +/* Global OPAL struct containing entrypoint and base */ +struct opal opal; + +void __init boot_opal_init(const void *fdt) +{ + int opal_node; + const __be64 *opal_base; + const __be64 *opal_entry; + + if ( fdt_check_header(fdt) < 0 ) + { + /* + * NOTE: This won't actually print since the early serial + * console isn't set up yet. + */ + early_printk("Booted without valid FDT pointer in r3!\n"); + die(); + } + + opal_node = fdt_path_offset(fdt, "/ibm,opal"); + if ( opal_node < 0 ) + { + early_printk("Unable to find ibm,opal node!\n"); + die(); + } + + opal_base = fdt_getprop(fdt, opal_node, "opal-base-address", NULL); + opal_entry = fdt_getprop(fdt, opal_node, "opal-entry-address", NULL); + if ( !opal_base || !opal_entry ) + { + early_printk("Failed to get opal-base-address/opal-entry-address " + "property from DT!\n"); + die(); + } + + opal.base = be64_to_cpu(*opal_base); + opal.entry = be64_to_cpu(*opal_entry); +} diff --git a/xen/arch/ppc/setup.c b/xen/arch/ppc/setup.c index 7c623a49f5..8ab7bc19ee 100644 --- a/xen/arch/ppc/setup.c +++ b/xen/arch/ppc/setup.c @@ -18,8 +18,13 @@ void __init noreturn start_xen(unsigned long r3, unsigned long r4, } else { - /* kexec boot: Unimplemented */ - __builtin_trap(); + /* + * kexec boot protocol + * + * TODO: This currently assumes an OPAL/PowerNV system, but it's also + * possible to be kexec'd on an OF system. + */ + boot_opal_init((void *)r3); } early_printk("Hello, ppc64le!\n"); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582057.911588 (Exim 4.92) (envelope-from ) id 1qU3Za-0005oQ-GV; Thu, 10 Aug 2023 11:11:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582057.911588; Thu, 10 Aug 2023 11:11:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Za-0005oJ-E1; Thu, 10 Aug 2023 11:11:22 +0000 Received: by outflank-mailman (input) for mailman id 582057; Thu, 10 Aug 2023 11:11:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ZZ-0005oB-Qy for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ZZ-0004IS-Q9 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3ZZ-0004xG-N9 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=onsy++ejMOoWICHnvoQ7uyvuKMg89Buw3worYU2pMhI=; b=GLTRvSrCvvCoA0RA9P8lmjEqO5 ZzIRRCmVRRVI2TuLGW44CrpQG/OnFtap4EShqsLYM5JC5NR9LL38NmkkJ9xhJ9lBHa/0YS29gkMGB QpxrW2qm5ICz4s7eYUptR4ZyGDEg+wYbxWnN+YpeM8FehWz06UDzprYF5t2vq/Ot5114=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/ppc: Implement early serial console on PowerNV Message-Id: Date: Thu, 10 Aug 2023 11:11:21 +0000 commit 83ea97ecc02d4008bdc4ed584d8b934f47d52ad1 Author: Shawn Anastasio AuthorDate: Tue Aug 1 19:11:06 2023 -0500 Commit: Jan Beulich CommitDate: Tue Aug 8 09:44:46 2023 +0200 xen/ppc: Implement early serial console on PowerNV Implement the OPAL firmware calls required to write to the serial console on PowerNV systems. Unlike pseries/Open Firmware, the OPAL firmware interface can be used past early boot and as such the relevant functions are not marked as __init. Signed-off-by: Shawn Anastasio Acked-by: Jan Beulich --- xen/arch/ppc/include/asm/asm-defns.h | 14 +++++++ xen/arch/ppc/opal.c | 28 ++++++++++++- xen/arch/ppc/ppc64/Makefile | 1 + xen/arch/ppc/ppc64/asm-offsets.c | 4 ++ xen/arch/ppc/ppc64/opal-calls.S | 81 ++++++++++++++++++++++++++++++++++++ 5 files changed, 127 insertions(+), 1 deletion(-) diff --git a/xen/arch/ppc/include/asm/asm-defns.h b/xen/arch/ppc/include/asm/asm-defns.h index 62da88b32a..f1c49808bd 100644 --- a/xen/arch/ppc/include/asm/asm-defns.h +++ b/xen/arch/ppc/include/asm/asm-defns.h @@ -2,6 +2,8 @@ #ifndef _ASM_PPC_ASM_DEFNS_H #define _ASM_PPC_ASM_DEFNS_H +#include + /* * Load a 64-bit immediate value into the specified GPR. */ @@ -23,6 +25,18 @@ addis reg, %r2, name@toc@ha; \ addi reg, reg, name@toc@l +/* + * Declare a global assembly function with a proper TOC setup prologue + */ +#define _GLOBAL_TOC(name) \ + .balign 4; \ + .type name, @function; \ + .globl name; \ +name: \ +0: addis %r2, %r12, (.TOC.-0b)@ha; \ + addi %r2, %r2, (.TOC.-0b)@l; \ + .localentry name, .-name + /* * Depending on how we were booted, the CPU could be running in either * Little Endian or Big Endian mode. The following trampoline from Linux diff --git a/xen/arch/ppc/opal.c b/xen/arch/ppc/opal.c index 251de8ac23..1183b7d5ef 100644 --- a/xen/arch/ppc/opal.c +++ b/xen/arch/ppc/opal.c @@ -8,9 +8,29 @@ #include #include -/* Global OPAL struct containing entrypoint and base */ +/* Global OPAL struct containing entrypoint and base used by opal-calls.S */ struct opal opal; +int64_t opal_console_write(int64_t term_number, uint64_t *length, + const void *buffer); +int64_t opal_console_flush(int64_t term_number); +int64_t opal_reinit_cpus(uint64_t flags); + +static void opal_putchar(char c) +{ + uint64_t len; + + if ( c == '\n' ) + { + char buf = '\r'; + len = cpu_to_be64(1); + opal_console_write(0, &len, &buf); + } + len = cpu_to_be64(1); + opal_console_write(0, &len, &c); + opal_console_flush(0); +} + void __init boot_opal_init(const void *fdt) { int opal_node; @@ -45,4 +65,10 @@ void __init boot_opal_init(const void *fdt) opal.base = be64_to_cpu(*opal_base); opal.entry = be64_to_cpu(*opal_entry); + + early_printk_init(opal_putchar); + + /* Ask OPAL to set HID0 for Little Endian interrupts + Radix TLB support */ + opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_LE | OPAL_REINIT_CPUS_MMU_RADIX | + OPAL_REINIT_CPUS_MMU_HASH); } diff --git a/xen/arch/ppc/ppc64/Makefile b/xen/arch/ppc/ppc64/Makefile index f4956daaa9..b9a91dc15f 100644 --- a/xen/arch/ppc/ppc64/Makefile +++ b/xen/arch/ppc/ppc64/Makefile @@ -1,2 +1,3 @@ obj-y += head.o obj-y += of-call.o +obj-y += opal-calls.o diff --git a/xen/arch/ppc/ppc64/asm-offsets.c b/xen/arch/ppc/ppc64/asm-offsets.c index e1129cb0f4..c15c1bf136 100644 --- a/xen/arch/ppc/ppc64/asm-offsets.c +++ b/xen/arch/ppc/ppc64/asm-offsets.c @@ -6,6 +6,7 @@ #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ( "\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\"" \ @@ -46,6 +47,9 @@ void __dummy__(void) OFFSET(UREGS_cr, struct cpu_user_regs, cr); OFFSET(UREGS_fpscr, struct cpu_user_regs, fpscr); DEFINE(UREGS_sizeof, sizeof(struct cpu_user_regs)); + + OFFSET(OPAL_base, struct opal, base); + OFFSET(OPAL_entry, struct opal, entry); } /* diff --git a/xen/arch/ppc/ppc64/opal-calls.S b/xen/arch/ppc/ppc64/opal-calls.S new file mode 100644 index 0000000000..cc5de75c8a --- /dev/null +++ b/xen/arch/ppc/ppc64/opal-calls.S @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Adapted from Linux's arch/powerpc/boot/opal-calls.S + * + * Copyright (c) 2016 IBM Corporation. + * Copyright Raptor Engineering, LLC + */ + +#include +#include +#include + + .text + +#define OPAL_CALL(name, token) \ + .globl name; \ +name: \ + li %r0, token; \ + b opal_call + + _GLOBAL_TOC(opal_call) + /* Back up LR, CR, r2 in caller's stack frame */ + mflr %r11 + mfcr %r12 + std %r2, 24(%r1) + std %r11, 16(%r1) + stw %r12, 8(%r1) + + /* Use r14 (non-volatile) to store the virtual address of opal_return_mmu */ + std %r14, -8(%r1) + stdu %r1, -48(%r1) + LOAD_REG_ADDR(%r14, opal_return_mmu) + + /* + * Setup new MSR without LE or MMU. Original MSR will be preserved across + * opal call in r13 + */ + mfmsr %r13 + li %r11, MSR_LE | MSR_IR | MSR_DR + andc %r12, %r13, %r11 + mthsrr1 %r12 + + LOAD_REG_ADDR(%r11, opal_return_real) + mtlr %r11 + + /* Load the opal call entry point and base */ + LOAD_REG_ADDR(%r11, opal) + ld %r12, OPAL_entry(%r11) + ld %r2, OPAL_base(%r11) + mthsrr0 %r12 + hrfid + +opal_return_real: + /* + * OPAL will always return to us in Big Endian mode. Since we are going + * to restore the old MSR with the correct endianness and MMU status set, we + * can avoid an unnecessary FIXUP_ENDIAN trampoline by just encoding the + * required Big Endian instructions to restore the old MSR direclty. + */ + .long 0xa64bbb7d /* mthsrr1 %r13 (Old MSR) */ + .long 0xa64bda7d /* mthsrr0 %r14 (Virtual address of opal_return_mmu) */ + .long 0x2402004c /* hrfid */ + +opal_return_mmu: + /* + * We're back in the correct endianness and MMU mode, restore registers + * and return + */ + addi %r1, %r1, 48 + ld %r14, -8(%r1) + lwz %r11, 8(%r1) + ld %r12, 16(%r1) + ld %r2, 24(%r1) + mtcr %r11 + mtlr %r12 + + blr + +OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE) +OPAL_CALL(opal_console_flush, OPAL_CONSOLE_FLUSH) +OPAL_CALL(opal_reinit_cpus, OPAL_REINIT_CPUS) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:32 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582058.911593 (Exim 4.92) (envelope-from ) id 1qU3Zk-0005rN-IE; Thu, 10 Aug 2023 11:11:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582058.911593; Thu, 10 Aug 2023 11:11:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zk-0005rG-Fb; Thu, 10 Aug 2023 11:11:32 +0000 Received: by outflank-mailman (input) for mailman id 582058; Thu, 10 Aug 2023 11:11:31 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zj-0005rA-U8 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:31 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zj-0004IZ-TK for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:31 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3Zj-0004xu-SG for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:31 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=PmUd9KlqV+StE2+AEVHBZqG4EW1s0iruP2xHm4E5oBM=; b=TRckJtIFux3IWhv3H7bLxac4nz wITYW/2m0FMomBOJHt44Rf/VY2vuVxmJc+rrihTF4YcfIfU6L4+PWTSTvCB2ghQrbRKEwSQ1j3i+C P2lVikzfpjgHwU9fCD4PRgHCk9kG92suAdPw2XkgnV5mzTOlUTguavv3XjvYbPuUdefI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: Use XEN_LIB_DIR to store bootloader from pygrub Message-Id: Date: Thu, 10 Aug 2023 11:11:31 +0000 commit ad89640ad766d3cb6c92fc8b6406ca6bbab44136 Author: Anthony PERARD AuthorDate: Tue Aug 8 09:45:20 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 8 09:45:20 2023 +0200 libxl: Use XEN_LIB_DIR to store bootloader from pygrub In osstest, the jobs using pygrub on arm64 on the branch linux-linus started to fails with: [Errno 28] No space left on device Error writing temporary copy of ramdisk This is because /var/run is small when dom0 has only 512MB to work with, /var/run is only 40MB. The size of both kernel and ramdisk on this jobs is now about 42MB, so not enough space in /var/run. So, to avoid writing a big binary in ramfs, we will use /var/lib instead, like we already do when saving the device model state on migration. Reported-by: Jan Beulich Signed-off-by: Anthony PERARD Reviewed-by: Jason Andryuk --- tools/libs/light/libxl_bootloader.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_bootloader.c b/tools/libs/light/libxl_bootloader.c index 1bc6e51827..108329b4a5 100644 --- a/tools/libs/light/libxl_bootloader.c +++ b/tools/libs/light/libxl_bootloader.c @@ -245,8 +245,8 @@ static void bootloader_cleanup(libxl__egc *egc, libxl__bootloader_state *bl) static void bootloader_setpaths(libxl__gc *gc, libxl__bootloader_state *bl) { uint32_t domid = bl->domid; - bl->outputdir = GCSPRINTF(XEN_RUN_DIR "/bootloader.%"PRIu32".d", domid); - bl->outputpath = GCSPRINTF(XEN_RUN_DIR "/bootloader.%"PRIu32".out", domid); + bl->outputdir = GCSPRINTF(XEN_LIB_DIR "/bootloader.%"PRIu32".d", domid); + bl->outputpath = GCSPRINTF(XEN_LIB_DIR "/bootloader.%"PRIu32".out", domid); } /* Callbacks */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:42 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582060.911597 (Exim 4.92) (envelope-from ) id 1qU3Zu-0005uH-K4; Thu, 10 Aug 2023 11:11:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582060.911597; Thu, 10 Aug 2023 11:11:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zu-0005u9-H8; Thu, 10 Aug 2023 11:11:42 +0000 Received: by outflank-mailman (input) for mailman id 582060; Thu, 10 Aug 2023 11:11:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zu-0005tx-0v for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3Zu-0004Il-09 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3Zt-0004yJ-VR for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:41 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mwA3zk3v9fl4cZWydyOD41eYVdVCTOvn4+eZreuwCNM=; b=iwfHeY72JCIrAhEpOr+pLQIA29 2WGDVGNHWUFpXYOtTqqNKX7CWhtdpMcwuDsDEhqLv79so4hQ77nDjtRgpk/fQXe7gv26dSa0Q5k1j jCP8aTS0JjokEsCSZ6ZH11P42YJ4YVkSb61mrlyX/ZQbJuRCgBZi0hudVCMVNMuC6s/4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/cpu: Address a violation of MISRA C:2012 Rule 8.3 Message-Id: Date: Thu, 10 Aug 2023 11:11:41 +0000 commit cb827e7a19f67d03918cf96aedd461be32a59f36 Author: Federico Serafini AuthorDate: Tue Aug 8 09:45:46 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 8 09:45:46 2023 +0200 x86/cpu: Address a violation of MISRA C:2012 Rule 8.3 A missing change to the type in 'opt_arat' declaration introduced a new violation of MISRA C:2012 Rule 8.3 ("All declarations of an object or function shall use the same names and type qualifiers"). Change the type to restore the consistency between all declarations of the object and drop a further usage of 'bool_t'. Fixes: 202a341f ("x86: Address violations of MISRA C:2012 by replacing bool_t uses") Reported-by: Andrew Cooper Signed-off-by: Federico Serafini Acked-by: Jan Beulich --- xen/arch/x86/cpu/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h index 85a67771f7..e3d06278b3 100644 --- a/xen/arch/x86/cpu/cpu.h +++ b/xen/arch/x86/cpu/cpu.h @@ -7,7 +7,7 @@ struct cpu_dev { extern const struct cpu_dev intel_cpu_dev, amd_cpu_dev, centaur_cpu_dev, shanghai_cpu_dev, hygon_cpu_dev; -extern bool_t opt_arat; +extern bool opt_arat; extern unsigned int opt_cpuid_mask_ecx, opt_cpuid_mask_edx; extern unsigned int opt_cpuid_mask_xsave_eax; extern unsigned int opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:11:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:11:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582061.911601 (Exim 4.92) (envelope-from ) id 1qU3a5-0005x1-LV; Thu, 10 Aug 2023 11:11:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582061.911601; Thu, 10 Aug 2023 11:11:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3a5-0005wt-Il; Thu, 10 Aug 2023 11:11:53 +0000 Received: by outflank-mailman (input) for mailman id 582061; Thu, 10 Aug 2023 11:11:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3a4-0005wj-HA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3a4-0004JE-57 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3a4-00050J-2c for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:11:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=UzA98BTbUJqBstAjtgBuSlEE9pJzGy4+3seUTlILnLE=; b=2tea9vVsah3t1jMzJ72ll20gJ6 tmmuFlpnZ7TIsjUwEB7G3acSbrMZKrJnun7hIvgJq3nITqcdv5nmUnm7HqBlsNslikLkTvEbJ3tXz hUvdcgkgq0JiFR5Xx/gbDZVXeK8ggBVWFJq9rrrT3Ep5Qe6mni4oYUhoj3bp29R6CoJk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Add Cortex-A77 erratum 1508412 handling Message-Id: Date: Thu, 10 Aug 2023 11:11:52 +0000 commit bd3ddaf6ee7fa312bd077305819105f84a34008d Author: Luca Fancellu AuthorDate: Mon Jul 17 13:25:46 2023 +0100 Commit: Julien Grall CommitDate: Tue Aug 8 08:50:17 2023 +0100 xen/arm: Add Cortex-A77 erratum 1508412 handling Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence of a store-exclusive or read of PAR_EL1 and a load with device or non-cacheable memory attributes. A workaround is available, but it depends on a firmware counterpart. The proposed workaround from the errata document is to modify the software running at EL1 and above to include a DMB SY before and after accessing PAR_EL1. In conjunction to the above, the firmware needs to use a specific write sequence to several IMPLEMENTATION DEFINED registers to have the hardware insert a DMB SY after all load-exclusive and store-exclusive instructions. Apply the workaround to Xen where PAR_EL1 is read, implementing an helper function to do that. Since Xen can be interrupted by irqs in any moment, add a barrier on entry/exit when we are running on the affected cores. A guest without the workaround can deadlock the system, so warn the users of Xen with the above type of cores to use only trusted guests, by printing a message on Xen startup. This is XSA-436 / CVE-2023-34320. Signed-off-by: Luca Fancellu Reviewed-by: Bertrand Marquis Reviewed-by: Julien Grall --- SUPPORT.md | 2 ++ docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/Kconfig | 21 +++++++++++++++++++++ xen/arch/arm/arm64/entry.S | 19 +++++++++++++++++++ xen/arch/arm/cpuerrata.c | 16 ++++++++++++---- xen/arch/arm/domain.c | 2 +- xen/arch/arm/include/asm/arm64/page.h | 12 ++++++------ xen/arch/arm/include/asm/cpufeature.h | 3 ++- xen/arch/arm/include/asm/sysregs.h | 24 ++++++++++++++++++++++++ 9 files changed, 88 insertions(+), 12 deletions(-) diff --git a/SUPPORT.md b/SUPPORT.md index 35a6249e03..1c9f0b7d8c 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -39,8 +39,10 @@ supported in this document. Status: Supported Status, Cortex A57 r0p0-r1p1: Supported, not security supported + Status, Cortex A77 r0p0-r1p0: Supported, not security supported For the Cortex A57 r0p0 - r1p1, see Errata 832075. +For the Cortex A77 r0p0 - r1p0, see Errata 1508412. ## Host hardware support diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt index a7abcc1ba1..fffca09656 100644 --- a/docs/misc/arm/silicon-errata.txt +++ b/docs/misc/arm/silicon-errata.txt @@ -58,4 +58,5 @@ stable hypervisors. | ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 | | ARM | Neoverse-N1 | #1165522 | N/A | | ARM | Neoverse-N1 | #1286807 | ARM64_ERRATUM_1286807 | +| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | | ARM | MMU-500 | #842869 | N/A | diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index fd57a82dd2..57bd1d01d7 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -355,6 +355,27 @@ config ARM64_ERRATUM_1286807 If unsure, say Y. +config ARM64_ERRATUM_1508412 + bool "Cortex-A77: 1508412: possible deadlock on sequence of NC/Device load and store exclusive or PAR read" + default y + depends on ARM_64 + help + This option adds a workaround for Arm Cortex-A77 erratum 1508412. + + Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence + of a store-exclusive or read of PAR_EL1 and a load with device or + non-cacheable memory attributes. The workaround depends on a firmware + counterpart. + + Xen guests must also have the workaround implemented or they can + deadlock the system. + + Work around the issue by inserting DMB SY barriers around PAR_EL1 + register reads and warning Xen users. The DMB barrier is sufficient + to prevent a speculative PAR_EL1 read. + + If unsure, say Y. + endmenu config ARM64_HARDEN_BRANCH_PREDICTOR diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index 523c6d23d9..f963c923bb 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -134,6 +134,16 @@ * position on the stack before. */ .macro entry, hyp, compat, save_x0_x1=1 + + /* + * Ensure any PAR_EL1 reads complete, in case we were interrupted + * between the PAR_EL1 read and the memory barrier for the erratum + * 1508412 workaround. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + sub sp, sp, #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ .if \hyp == 0 /* Guest mode */ @@ -503,6 +513,15 @@ return_from_trap: ldr lr, [sp], #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */ + /* + * Ensure any device/NC reads complete, in case we were interrupted + * between the memory barrier for the erratum 1508412 workaround and + * any PAR_EL1 read. + */ + alternative_if ARM64_WORKAROUND_1508412 + dmb sy + alternative_else_nop_endif + eret sb diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index d0658aedb6..fcf32892a7 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -669,6 +669,14 @@ static const struct arm_cpu_capabilities arm_errata[] = { .capability = ARM64_WORKAROUND_AT_SPECULATE, MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), }, +#ifdef CONFIG_ARM64_ERRATUM_1508412 + { + /* Cortex-A77 r0p0 - r1p0 */ + .desc = "ARM erratum 1508412 (hypervisor portion)", + .capability = ARM64_WORKAROUND_1508412, + MIDR_RANGE(MIDR_CORTEX_A77, 0, 1), + }, +#endif { /* Cortex-A55 (All versions as erratum is open in SDEN v14) */ .desc = "ARM erratum 1530923", @@ -687,11 +695,11 @@ void __init enable_errata_workarounds(void) { enable_cpu_capabilities(arm_errata); -#ifdef CONFIG_ARM64_ERRATUM_832075 - if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) ) +#if defined(CONFIG_ARM64_ERRATUM_832075) || defined(CONFIG_ARM64_ERRATUM_1508412) + if ( cpus_have_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) || + cpus_have_cap(ARM64_WORKAROUND_1508412) ) { - printk_once("**** This CPU is affected by the errata 832075. ****\n" - "**** Guests without CPU erratum workarounds can deadlock the system! ****\n" + printk_once("**** Guests without CPU erratum workarounds can deadlock the system! ****\n" "**** Only trusted guests should be used. ****\n"); /* Taint the machine has being insecure */ diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 3ae86ca620..6113ca785c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -131,7 +131,7 @@ static void ctxt_switch_from(struct vcpu *p) p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1); if ( is_32bit_domain(p->domain) ) p->arch.dacr = READ_SYSREG(DACR32_EL2); - p->arch.par = READ_SYSREG64(PAR_EL1); + p->arch.par = read_sysreg_par(); #if defined(CONFIG_ARM_32) p->arch.mair0 = READ_CP32(MAIR0); p->arch.mair1 = READ_CP32(MAIR1); diff --git a/xen/arch/arm/include/asm/arm64/page.h b/xen/arch/arm/include/asm/arm64/page.h index 4f58c0382a..e944985ee0 100644 --- a/xen/arch/arm/include/asm/arm64/page.h +++ b/xen/arch/arm/include/asm/arm64/page.h @@ -37,11 +37,11 @@ static inline void invalidate_icache_local(void) /* Ask the MMU to translate a VA for us */ static inline uint64_t __va_to_par(vaddr_t va) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); asm volatile ("at s1e2r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } @@ -49,28 +49,28 @@ static inline uint64_t __va_to_par(vaddr_t va) /* Ask the MMU to translate a Guest VA for us */ static inline uint64_t gva_to_ma_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s12e1w, %0;" : : "r" (va)); else asm volatile ("at s12e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } static inline uint64_t gva_to_ipa_par(vaddr_t va, unsigned int flags) { - uint64_t par, tmp = READ_SYSREG64(PAR_EL1); + uint64_t par, tmp = read_sysreg_par(); if ( (flags & GV2M_WRITE) == GV2M_WRITE ) asm volatile ("at s1e1w, %0;" : : "r" (va)); else asm volatile ("at s1e1r, %0;" : : "r" (va)); isb(); - par = READ_SYSREG64(PAR_EL1); + par = read_sysreg_par(); WRITE_SYSREG64(tmp, PAR_EL1); return par; } diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 894f278a4a..8011076b8c 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -75,8 +75,9 @@ #define ARM_WORKAROUND_BHB_LOOP_32 14 #define ARM_WORKAROUND_BHB_SMCC_3 15 #define ARM_HAS_SB 16 +#define ARM64_WORKAROUND_1508412 17 -#define ARM_NCAPS 17 +#define ARM_NCAPS 18 #ifndef __ASSEMBLY__ diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h index 5c5c51bbcd..61e30c9e51 100644 --- a/xen/arch/arm/include/asm/sysregs.h +++ b/xen/arch/arm/include/asm/sysregs.h @@ -9,6 +9,30 @@ # error "unknown ARM variant" #endif +#ifndef __ASSEMBLY__ + +#include + +static inline register_t read_sysreg_par(void) +{ + register_t par_el1; + + /* + * On Cortex-A77 r0p0 and r1p0, read access to PAR_EL1 shall include a + * DMB SY before and after accessing it, as part of the workaround for the + * errata 1508412. + */ + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + par_el1 = READ_SYSREG64(PAR_EL1); + asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412, + CONFIG_ARM64_ERRATUM_1508412)); + + return par_el1; +} + +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_ARM_SYSREGS_H */ /* * Local variables: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582062.911605 (Exim 4.92) (envelope-from ) id 1qU3aF-00060J-Ou; Thu, 10 Aug 2023 11:12:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582062.911605; Thu, 10 Aug 2023 11:12:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aF-00060B-Ln; Thu, 10 Aug 2023 11:12:03 +0000 Received: by outflank-mailman (input) for mailman id 582062; Thu, 10 Aug 2023 11:12:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aE-0005zy-Ap for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aE-0004JY-8G for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3aE-00050t-7I for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=2UvI7gRcjwigKAbqJ8WCBgJoSB1ce9pkzDhBwuH3FO8=; b=2E7Tb485/DIX3kUVFXjvJRDKJs rQS79CmPafUi78DQtSaENgjBh149foQcu7+bNo7RVaWcHpRQ906UUzJbVhApyWG4+x2O/WyG2dINv 1mCa3z7Tis21YRcOPqlz03HOQJ+Tdu4QaQJxtPwWLP96Uox+qZ4ByYycfkJPk3aqRuxc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] subdom: Fix -Werror=address failure in tmp_emulator Message-Id: Date: Thu, 10 Aug 2023 11:12:02 +0000 commit 46c5ef609b09cf51d7535aebbc05816eafca4c8d Author: Andrew Cooper AuthorDate: Thu Aug 3 20:52:08 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 12:24:17 2023 +0100 subdom: Fix -Werror=address failure in tmp_emulator The opensuse-tumbleweed build jobs currently fail with: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c: In function 'rsa_private': /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:56:7: error: the comparison will always evaluate as 'true' for the address of 'p' will never be NULL [-Werror=address] 56 | if (!key->p || !key->q || !key->u) { | ^ In file included from /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:17: /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.h:28:12: note: 'p' declared here 28 | tpm_bn_t p; | ^ This is because all tpm_bn_t's are 1-element arrays (of either a GMP or OpenSSL BIGNUM flavour). Adjust it to compile. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jason Andryuk --- stubdom/Makefile | 1 + stubdom/vtpm-tpm_bn_t-addr.patch | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/stubdom/Makefile b/stubdom/Makefile index a21e1c3fa3..d5fb354e7e 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -243,6 +243,7 @@ tpm_emulator-$(XEN_TARGET_ARCH): tpm_emulator-$(TPMEMU_VERSION).tar.gz patch -d $@ -p1 < vtpm_extern.patch patch -d $@ -p1 < vtpm-microsecond-duration.patch patch -d $@ -p1 < vtpm-command-duration.patch + patch -d $@ -p1 < vtpm-tpm_bn_t-addr.patch mkdir $@/build cd $@/build; CC=${CC} $(CMAKE) .. -DCMAKE_C_FLAGS:STRING="-std=c99 -DTPM_NO_EXTERN $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) -Wno-declaration-after-statement" touch $@ diff --git a/stubdom/vtpm-tpm_bn_t-addr.patch b/stubdom/vtpm-tpm_bn_t-addr.patch new file mode 100644 index 0000000000..53172ae1c2 --- /dev/null +++ b/stubdom/vtpm-tpm_bn_t-addr.patch @@ -0,0 +1,18 @@ +All tpm_bn_t's are a 1-element array of one form or another, meaning the code +below is tautological and triggers -Werror=address. + +diff -ru tpm_emulator-x86_64.orig/crypto/rsa.c tpm_emulator-x86_64/crypto/rsa.c +--- tpm_emulator-x86_64.orig/crypto/rsa.c 2011-12-20 18:30:06.000000000 +0000 ++++ tpm_emulator-x86_64/crypto/rsa.c 2023-08-03 20:44:17.379166284 +0100 +@@ -53,10 +53,7 @@ + tpm_bn_init2(c, key->size); + tpm_bn_import(p, in_len, 1, in); + +- if (!key->p || !key->q || !key->u) { +- /* c = p ^ d mod n */ +- tpm_bn_powm(c, p, key->d, key->n); +- } else { ++ { + tpm_bn_init2(m1, key->size / 2); + tpm_bn_init2(m2, key->size / 2); + tpm_bn_init2(h, key->size); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582063.911609 (Exim 4.92) (envelope-from ) id 1qU3aP-00062w-Q7; Thu, 10 Aug 2023 11:12:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582063.911609; Thu, 10 Aug 2023 11:12:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aP-00062o-NM; Thu, 10 Aug 2023 11:12:13 +0000 Received: by outflank-mailman (input) for mailman id 582063; Thu, 10 Aug 2023 11:12:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aO-00062g-Bx for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aO-0004Jf-BH for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3aO-00051I-AT for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OunIQ2nJ6qCi4uJSX+RoLItv7+9UjUErJ0XpVj+FehY=; b=ze5TfoXYbqXObcw5LOt7dvA5Hk orjlGbyjcUpNjWYb9PLFuBdGFL48WjBB/gzIBhI2NNLtCTou8bEvDIqo0D5uG4/CWfSJ7brbbm81n J0te8UQzEaWpQowjOnfnzKw3O6n0165ZJkHW5yghd6QOFvyAvKJPbP3MR1hTKyTW1/eE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/spec-ctrl: Rework ibpb_calculations() Message-Id: Date: Thu, 10 Aug 2023 11:12:12 +0000 commit 292f68fb77196a35ac92b296792770d0f3190d75 Author: Andrew Cooper AuthorDate: Thu Jul 27 20:03:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/spec-ctrl: Rework ibpb_calculations() ... in order to make the SRSO mitigations easier to integrate. * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB. In particular, Xen supports synthesising the IBPB bit to guests on Intel to allow IBPB while dissuading the use of (legacy) IBRS. * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for both opt_ibpb_entry_{pv,hvm}. No functional change. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné --- xen/arch/x86/spec_ctrl.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index bc50173620..eb9b157692 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -889,6 +889,8 @@ static bool __init should_use_eager_fpu(void) static void __init ibpb_calculations(void) { + bool def_ibpb_entry = false; + /* Check we have hardware IBPB support before using it... */ if ( !boot_cpu_has(X86_FEATURE_IBRSB) && !boot_cpu_has(X86_FEATURE_IBPB) ) { @@ -897,28 +899,28 @@ static void __init ibpb_calculations(void) return; } - /* - * AMD/Hygon CPUs to date (June 2022) don't flush the the RAS. Future - * CPUs are expected to enumerate IBPB_RET when this has been fixed. - * Until then, cover the difference with the software sequence. - */ - if ( boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_IBPB_RET) ) - setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + /* + * AMD/Hygon CPUs to date (June 2022) don't flush the RAS. Future + * CPUs are expected to enumerate IBPB_RET when this has been fixed. + * Until then, cover the difference with the software sequence. + */ + if ( !boot_cpu_has(X86_FEATURE_IBPB_RET) ) + setup_force_cpu_cap(X86_BUG_IBPB_NO_RET); + + /* + * AMD/Hygon CPUs up to and including Zen2 suffer from Branch Type + * Confusion. Mitigate with IBPB-on-entry. + */ + if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) + def_ibpb_entry = true; + } - /* - * IBPB-on-entry mitigations for Branch Type Confusion. - * - * IBPB && !BTC_NO selects all AMD/Hygon hardware, not known to be safe, - * that we can provide some form of mitigation on. - */ if ( opt_ibpb_entry_pv == -1 ) - opt_ibpb_entry_pv = (IS_ENABLED(CONFIG_PV) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_pv = IS_ENABLED(CONFIG_PV) && def_ibpb_entry; if ( opt_ibpb_entry_hvm == -1 ) - opt_ibpb_entry_hvm = (IS_ENABLED(CONFIG_HVM) && - boot_cpu_has(X86_FEATURE_IBPB) && - !boot_cpu_has(X86_FEATURE_BTC_NO)); + opt_ibpb_entry_hvm = IS_ENABLED(CONFIG_HVM) && def_ibpb_entry; if ( opt_ibpb_entry_pv ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582064.911613 (Exim 4.92) (envelope-from ) id 1qU3aZ-00065H-Rj; Thu, 10 Aug 2023 11:12:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582064.911613; Thu, 10 Aug 2023 11:12:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aZ-00065A-Ot; Thu, 10 Aug 2023 11:12:23 +0000 Received: by outflank-mailman (input) for mailman id 582064; Thu, 10 Aug 2023 11:12:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aY-00064y-FH for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aY-0004Jm-EZ for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3aY-00051r-Di for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0CfdFgUtW4FYxya/JB4xpmCvJm4wwYsb+YIg4RjpzEQ=; b=e/G+yDUVQqqViPT2qbM6A7JAC7 P1S7Zm87Xb0G6qKxEqFhWgWaG7FhjBH4Hectw/pkfmsAJV5Dzw+k61pYiwrJiWihTiuZViIXuW5L+ LB0yDEUl8zikVpZzdt1UEQBQzA0zDLdkfO6ih72VgjEEUKXLeOXh5+26N5NSJdHO9uT8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 11:12:22 +0000 commit 2280b0ee2aed6e0fd4af3fa31bf99bc04d038bfe Author: Andrew Cooper AuthorDate: Wed Jun 14 09:13:28 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné --- tools/misc/xen-cpuid.c | 3 +++ xen/arch/x86/include/asm/msr-index.h | 1 + xen/arch/x86/msr.c | 5 ++++- xen/arch/x86/spec_ctrl.c | 15 ++++++++++----- xen/include/public/arch-x86/cpufeatureset.h | 3 +++ xen/tools/gen-cpuid.py | 1 + 6 files changed, 22 insertions(+), 6 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index c65d9e01bf..6b8bd624ec 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -202,6 +202,9 @@ static const char *const str_e21a[32] = [ 8] = "auto-ibrs", /* 16 */ [17] = "cpuid-user-dis", + + /* 26 */ [27] = "sbpb", + [28] = "ibpb-brtype", [29] = "srso-no", }; static const char *const str_7b1[32] = diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 4d41c171d2..4c59c7e2ae 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -46,6 +46,7 @@ #define MSR_PRED_CMD 0x00000049 #define PRED_CMD_IBPB (_AC(1, ULL) << 0) +#define PRED_CMD_SBPB (_AC(1, ULL) << 7) #define MSR_PPIN_CTL 0x0000004e #define PPIN_LOCKOUT (_AC(1, ULL) << 0) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ef55498c1a..3f0450259c 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -409,7 +409,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) if ( !cp->feat.ibrsb && !cp->extd.ibpb ) goto gp_fault; /* MSR available? */ - if ( val & ~PRED_CMD_IBPB ) + rsvd = ~(PRED_CMD_IBPB | + (cp->extd.sbpb ? PRED_CMD_SBPB : 0)); + + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ if ( v == curr ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index eb9b157692..9ad2ebc0f4 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -390,7 +390,7 @@ custom_param("pv-l1tf", parse_pv_l1tf); static void __init print_details(enum ind_thunk thunk) { - unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, max = 0, tmp; + unsigned int _7d0 = 0, _7d2 = 0, e8b = 0, e21a = 0, max = 0, tmp; uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ @@ -400,6 +400,8 @@ static void __init print_details(enum ind_thunk thunk) cpuid_count(7, 2, &tmp, &tmp, &tmp, &_7d2); if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); + if ( boot_cpu_data.extended_cpuid_level >= 0x80000021 ) + cpuid(0x80000021, &e21a, &tmp, &tmp, &tmp); if ( cpu_has_arch_caps ) rdmsrl(MSR_ARCH_CAPABILITIES, caps); @@ -409,7 +411,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -429,10 +431,12 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "", (e8b & cpufeat_mask(X86_FEATURE_BTC_NO)) ? " BTC_NO" : "", - (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : ""); + (e8b & cpufeat_mask(X86_FEATURE_IBPB_RET)) ? " IBPB_RET" : "", + (e21a & cpufeat_mask(X86_FEATURE_IBPB_BRTYPE)) ? " IBPB_BRTYPE" : "", + (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -448,7 +452,8 @@ static void __init print_details(enum ind_thunk thunk) (_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "", (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", - (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : ""); + (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) ) diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 6d20810cb9..3d13fdbe9a 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -289,6 +289,9 @@ XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and limit too) */ XEN_CPUFEATURE(AUTO_IBRS, 11*32+ 8) /*S Automatic IBRS */ XEN_CPUFEATURE(CPUID_USER_DIS, 11*32+17) /* CPUID disable for CPL > 0 software */ +XEN_CPUFEATURE(SBPB, 11*32+27) /*A Selective Branch Predictor Barrier */ +XEN_CPUFEATURE(IBPB_BRTYPE, 11*32+28) /*A IBPB flushes Branch Type predictions too */ +XEN_CPUFEATURE(SRSO_NO, 11*32+29) /*A Hardware not vulenrable to Speculative Return Stack Overflow */ /* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected Processor Inventory Number */ diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index 4a1ca58905..9aa59ffdb1 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -321,6 +321,7 @@ def crunch_numbers(state): IBRSB: [STIBP, SSBD, INTEL_PSFD, EIBRS], IBRS: [AMD_STIBP, AMD_SSBD, PSFD, AUTO_IBRS, IBRS_ALWAYS, IBRS_FAST, IBRS_SAME_MODE], + IBPB: [IBPB_RET, SBPB, IBPB_BRTYPE], AMD_STIBP: [STIBP_ALWAYS], # In principle the TSXLDTRK insns could also be considered independent. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582065.911617 (Exim 4.92) (envelope-from ) id 1qU3aj-00068K-TL; Thu, 10 Aug 2023 11:12:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582065.911617; Thu, 10 Aug 2023 11:12:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3aj-00068C-Qg; Thu, 10 Aug 2023 11:12:33 +0000 Received: by outflank-mailman (input) for mailman id 582065; Thu, 10 Aug 2023 11:12:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ai-000682-Iz for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3ai-0004Jt-IA for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3ai-00052k-Gv for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KdelxepE7ScLi4Wus3dmBSWynKScc8j7UMY1ooXHvh8=; b=qgKHBBCTAwv1U5OVxdgFnBdieD mxM9w4M9oHnW9W1u0Qgq4eL4EhTNOSuJCnVj5IWtxrEMAeO1CQHnsafMM0sONKaBBIQn5AjIhajpL A92K3gbdzTOTSTMC6UjWvUFFWOcx9yDp6RfRwZ3yOfK+BkxRDrEWqtnV52CCwMcXfQmA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/spec-ctrl: Mitigate Speculative Return Stack Overflow Message-Id: Date: Thu, 10 Aug 2023 11:12:32 +0000 commit 220c06e6fefe2378f40e2a7391f5e265a2aa50f7 Author: Andrew Cooper AuthorDate: Thu Jun 15 13:46:29 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/spec-ctrl: Mitigate Speculative Return Stack Overflow On native, synthesise the SRSO bits by probing various hardware properties as given by AMD. Extend the IBPB-on-entry mitigations to Zen3/4 CPUs. There is a microcode prerequisite to make this an effective mitigation. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Roger Pau Monné --- docs/misc/xen-command-line.pandoc | 7 ++-- xen/arch/x86/spec_ctrl.c | 68 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+), 3 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 9d66688bd1..ab30ce55c9 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2381,9 +2381,10 @@ guests to use. preference to here.* * `ibpb-entry=` offers control over whether IBPB (Indirect Branch Prediction Barrier) is used on entry to Xen. This is used by default on hardware - vulnerable to Branch Type Confusion, but for performance reasons, dom0 is - unprotected by default. If it necessary to protect dom0 too, boot with - `spec-ctrl=ibpb-entry`. + vulnerable to Branch Type Confusion, and hardware vulnerable to Speculative + Return Stack Overflow if appropriate microcode has been loaded, but for + performance reasons dom0 is unprotected by default. If it is necessary to + protect dom0 too, boot with `spec-ctrl=ibpb-entry`. If Xen was compiled with INDIRECT_THUNK support, `bti-thunk=` can be used to select which of the thunks gets patched into the `__x86_indirect_thunk_%reg` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 9ad2ebc0f4..e4fcd7cb1d 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -892,6 +892,63 @@ static bool __init should_use_eager_fpu(void) } } +static void __init srso_calculations(bool hw_smt_enabled) +{ + if ( !(boot_cpu_data.x86_vendor & + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + return; + + /* + * If virtualised, none of these heuristics are safe. Trust the + * hypervisor completely. + */ + if ( cpu_has_hypervisor ) + return; + + if ( boot_cpu_data.x86 == 0x19 ) + { + /* + * We could have a table of models/microcode revisions. ...or we + * could just look for the new feature added. + */ + if ( wrmsr_safe(MSR_PRED_CMD, PRED_CMD_SBPB) == 0 ) + { + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + setup_force_cpu_cap(X86_FEATURE_SBPB); + } + else + printk(XENLOG_WARNING + "Vulnerable to SRSO, without suitable microcode to mitigate\n"); + } + else if ( boot_cpu_data.x86 < 0x19 ) + { + /* + * Zen1/2 (which have the IBPB microcode) have IBPB_BRTYPE behaviour + * already. + * + * Older CPUs are unknown, but their IBPB likely does flush branch + * types too. As we're synthesising for the benefit of guests, go + * with the likely option - this avoids VMs running on e.g. a Zen3 + * thinking there's no SRSO mitigation available because it may + * migrate to e.g. a Bulldozer. + */ + if ( boot_cpu_has(X86_FEATURE_IBPB) ) + setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE); + } + + /* + * In single-thread mode on Zen1/2, microarchitectural limits prevent SRSO + * attacks from being effective. Synthesise SRSO_NO if SMT is disabled in + * hardware. + * + * Booting with smt=0, or using xen-hptool should be effective too, but + * they can be altered at runtime so it's not safe to presume SRSO_NO. + */ + if ( !hw_smt_enabled && + (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) ) + setup_force_cpu_cap(X86_FEATURE_SRSO_NO); +} + static void __init ibpb_calculations(void) { bool def_ibpb_entry = false; @@ -920,6 +977,15 @@ static void __init ibpb_calculations(void) */ if ( !boot_cpu_has(X86_FEATURE_BTC_NO) ) def_ibpb_entry = true; + + /* + * Further to BTC, Zen3/4 CPUs suffer from Speculative Return Stack + * Overflow in most configurations. Mitigate with IBPB-on-entry if we + * have the microcode that makes this an effective option. + */ + if ( !boot_cpu_has(X86_FEATURE_SRSO_NO) && + boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ) + def_ibpb_entry = true; } if ( opt_ibpb_entry_pv == -1 ) @@ -1486,6 +1552,8 @@ void __init init_speculation_mitigations(void) default_spec_ctrl_flags |= SCF_ist_rsb; } + srso_calculations(hw_smt_enabled); + ibpb_calculations(); /* Check whether Eager FPU should be enabled by default. */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582066.911621 (Exim 4.92) (envelope-from ) id 1qU3at-0006BS-VT; Thu, 10 Aug 2023 11:12:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582066.911621; Thu, 10 Aug 2023 11:12:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3at-0006BL-SD; Thu, 10 Aug 2023 11:12:43 +0000 Received: by outflank-mailman (input) for mailman id 582066; Thu, 10 Aug 2023 11:12:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3as-0006B9-Lq for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3as-0004K7-LB for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3as-00053H-KO for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ol55mxMFeeNt0kPsN3lRMC/g8UX6+gEXDMVwA7s4yTU=; b=OXMvE6+wsNNaTzVSYmCEwV0xc5 CBARl9maqkmbDbkTLv9yX8bTXs6Q9etSZwrcMv87NukFP8vNyvPZl4m81B5OWRSqF5NdocaIrRoYH Wn3HpnG/RqQWW8MGi5QTErIkpQJ4Wpo4GZy/Ol2ClP1PPKBL38j5HwjsJ1vAiIEtv8Z4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX Message-Id: Date: Thu, 10 Aug 2023 11:12:42 +0000 commit 2dd06b4ea10891750af38e4a0e1efaeb0a9b3518 Author: Andrew Cooper AuthorDate: Mon Feb 27 15:36:49 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX The August 2023 microcode for GDS has an impact on the CLWB instruction. See code comments for full details. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu-policy.c | 25 +++++++++++++++++++++++++ xen/arch/x86/cpu/intel.c | 14 ++++++++++++++ xen/include/public/arch-x86/cpufeatureset.h | 2 +- 3 files changed, 40 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 5fbb3602ae..81e574390f 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -434,6 +434,18 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs) __set_bit(X86_FEATURE_ARCH_CAPS, fs); __set_bit(X86_FEATURE_RSBA, fs); __set_bit(X86_FEATURE_RRSBA, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but VMs which + * have previously seen the CLWB feature can safely run on this CPU. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X && + raw_cpu_policy.feat.clwb ) + __set_bit(X86_FEATURE_CLWB, fs); } } @@ -456,6 +468,19 @@ static void __init guest_common_default_feature_adjustments(uint32_t *fs) boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE && cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) ) __clear_bit(X86_FEATURE_RDRAND, fs); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * We hid CLWB in the host policy to stop Xen using it, but re-added + * it to the max policy to let VMs migrate in. Re-hide it in the + * default policy to disuade VMs from using it in the common case. + */ + if ( boot_cpu_data.x86 == 6 && + boot_cpu_data.x86_model == INTEL_FAM6_SKYLAKE_X && + raw_cpu_policy.feat.clwb ) + __clear_bit(X86_FEATURE_CLWB, fs); } /* diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 36018aa8fe..a8ba3191e6 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -4,6 +4,8 @@ #include #include #include + +#include #include #include #include @@ -561,6 +563,18 @@ static void cf_check init_intel(struct cpuinfo_x86 *c) if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c == &boot_cpu_data ) intel_log_freq(c); + + /* + * The Gather Data Sampling microcode mitigation (August 2023) has an + * adverse performance impact on the CLWB instruction on SKX/CLX/CPX. + * + * On this model, CLWB has equivalent behaviour to CLFLUSHOPT but the + * latter is not impacted. Hide CLWB to cause Xen to fall back to + * using CLFLUSHOPT instead. + */ + if (c == &boot_cpu_data && + c->x86 == 6 && c->x86_model == INTEL_FAM6_SKYLAKE_X) + setup_clear_cpu_cap(X86_FEATURE_CLWB); } const struct cpu_dev intel_cpu_dev = { diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 3d13fdbe9a..6c8786181b 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -199,7 +199,7 @@ XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */ XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */ XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */ XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */ -XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */ +XEN_CPUFEATURE(CLWB, 5*32+24) /*!A CLWB instruction */ XEN_CPUFEATURE(PROC_TRACE, 5*32+25) /* Processor Trace */ XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */ XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:12:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:12:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582067.911626 (Exim 4.92) (envelope-from ) id 1qU3b4-0006Ek-3J; Thu, 10 Aug 2023 11:12:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582067.911626; Thu, 10 Aug 2023 11:12:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3b4-0006Ec-0F; Thu, 10 Aug 2023 11:12:54 +0000 Received: by outflank-mailman (input) for mailman id 582067; Thu, 10 Aug 2023 11:12:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3b2-0006EN-P5 for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3b2-0004KU-OD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3b2-00053l-NW for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:12:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RE0EDwJdNvgD1XSwQ42Zt7PCnXdN9PMwpdAT94iYFbY=; b=01whuoGUlZq566zBQQ3RbbSxP8 +nyatdVHj2Z7cbIyQn+a/MVHtwsSNl1/b2IyzAigNtHzN5gVplpYPFirWBytruQtdqXSl9BY9HPfh 1zSxwxDZwCCOVlXhdAxA6Mkw6e2DRRvlX/u5C1tdJMAQRlEEjhTwAeTTekJePZnCdSKQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/spec-ctrl: Enumerations for Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 11:12:52 +0000 commit 9f585f59d90c8d3a1b21369a852b7d7eee8a29b9 Author: Andrew Cooper AuthorDate: Wed Jan 4 17:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/spec-ctrl: Enumerations for Gather Data Sampling GDS_CTRL is introduced by the August 2023 microcode. GDS_NO is for current and future processors not susceptible to GDS. This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/misc/xen-cpuid.c | 3 ++- xen/arch/x86/include/asm/cpufeature.h | 2 ++ xen/arch/x86/include/asm/msr-index.h | 4 ++++ xen/arch/x86/spec_ctrl.c | 6 ++++-- xen/include/public/arch-x86/cpufeatureset.h | 2 ++ 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c index 6b8bd624ec..7370f1b56e 100644 --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -244,7 +244,8 @@ static const char *const str_m10Al[32] = [18] = "fb-clear-ctrl", [19] = "rrsba", [20] = "bhi-no", [21] = "xapic-status", /* 22 */ [23] = "ovrclk-status", - [24] = "pbrsb-no", + [24] = "pbrsb-no", [25] = "gds-ctrl", + [26] = "gds-no", }; static const char *const str_m10Ah[32] = diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 64e1dad225..4762db79f1 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -195,6 +195,8 @@ static inline bool boot_cpu_has(unsigned int feat) #define cpu_has_taa_no boot_cpu_has(X86_FEATURE_TAA_NO) #define cpu_has_fb_clear boot_cpu_has(X86_FEATURE_FB_CLEAR) #define cpu_has_rrsba boot_cpu_has(X86_FEATURE_RRSBA) +#define cpu_has_gds_ctrl boot_cpu_has(X86_FEATURE_GDS_CTRL) +#define cpu_has_gds_no boot_cpu_has(X86_FEATURE_GDS_NO) /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 4c59c7e2ae..8df52eda88 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -87,6 +87,8 @@ #define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19) #define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20) #define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24) +#define ARCH_CAPS_GDS_CTRL (_AC(1, ULL) << 25) +#define ARCH_CAPS_GDS_NO (_AC(1, ULL) << 26) #define MSR_FLUSH_CMD 0x0000010b #define FLUSH_CMD_L1D (_AC(1, ULL) << 0) @@ -105,6 +107,8 @@ #define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1) #define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2) #define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3) +#define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) +#define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) #define MSR_RTIT_OUTPUT_BASE 0x00000560 #define MSR_RTIT_OUTPUT_MASK 0x00000561 diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index e4fcd7cb1d..0925788d59 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -411,7 +411,7 @@ static void __init print_details(enum ind_thunk thunk) * Hardware read-only information, stating immunity to certain issues, or * suggestions of which mitigation to use. */ - printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_EIBRS) ? " EIBRS" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", @@ -426,6 +426,7 @@ static void __init print_details(enum ind_thunk thunk) (caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "", (caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "", (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO" : "", + (caps & ARCH_CAPS_GDS_NO) ? " GDS_NO" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "", @@ -436,7 +437,7 @@ static void __init print_details(enum ind_thunk thunk) (e21a & cpufeat_mask(X86_FEATURE_SRSO_NO)) ? " SRSO_NO" : ""); /* Hardware features which need driving to mitigate issues. */ - printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s%s\n", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) || (_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "", (e8b & cpufeat_mask(X86_FEATURE_IBRS)) || @@ -453,6 +454,7 @@ static void __init print_details(enum ind_thunk thunk) (e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "", (caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "", (caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "", + (caps & ARCH_CAPS_GDS_CTRL) ? " GDS_CTRL" : "", (e21a & cpufeat_mask(X86_FEATURE_SBPB)) ? " SBPB" : ""); /* Compiled-in support which pertains to mitigations. */ diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 6c8786181b..50fda581f2 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -335,6 +335,8 @@ XEN_CPUFEATURE(BHI_NO, 16*32+20) /*A No Branch History Injection * XEN_CPUFEATURE(XAPIC_STATUS, 16*32+21) /* MSR_XAPIC_DISABLE_STATUS */ XEN_CPUFEATURE(OVRCLK_STATUS, 16*32+23) /* MSR_OVERCLOCKING_STATUS */ XEN_CPUFEATURE(PBRSB_NO, 16*32+24) /*A No Post-Barrier RSB predictions */ +XEN_CPUFEATURE(GDS_CTRL, 16*32+25) /* MCU_OPT_CTRL.GDS_MIT_{DIS,LOCK} */ +XEN_CPUFEATURE(GDS_NO, 16*32+26) /*A No Gather Data Sampling */ /* Intel-defined CPU features, MSR_ARCH_CAPS 0x10a.edx, word 17 */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 10 11:13:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 10 Aug 2023 11:13:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582068.911628 (Exim 4.92) (envelope-from ) id 1qU3bE-0006HN-4V; Thu, 10 Aug 2023 11:13:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582068.911628; Thu, 10 Aug 2023 11:13:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3bE-0006HG-1l; Thu, 10 Aug 2023 11:13:04 +0000 Received: by outflank-mailman (input) for mailman id 582068; Thu, 10 Aug 2023 11:13:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3bC-0006Gx-Ry for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:13:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qU3bC-0004Kr-RD for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:13:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qU3bC-00054N-QU for xen-changelog@lists.xenproject.org; Thu, 10 Aug 2023 11:13:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ymY+OAI3rXlS36nUSk+Vj8f+GMA91EHcDHnIxHPBs0Y=; b=2nQCzcSHpVvTi1OsnSc3g8EDKC X8iApc+BAg1/g+1fwRWPKOv2GOh95zVIjA6BRgeAmNg/ahwKT69KJeSCF9uOZiMB+b1lyvJf6Dig7 zcu8LHRZRHcCcIxu1yQ+XHbV3APU54RhVGfNYA8AzVkllc+2Q7Q3b8aOMMvYSSlqWEBY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/spec-ctrl: Mitigate Gather Data Sampling Message-Id: Date: Thu, 10 Aug 2023 11:13:02 +0000 commit 56d690efd3ca3c68e1d222f259fb3d216206e8e5 Author: Andrew Cooper AuthorDate: Wed Jan 4 16:32:44 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 8 15:19:49 2023 +0100 x86/spec-ctrl: Mitigate Gather Data Sampling This is part of XSA-435 / CVE-2022-40982 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- docs/misc/xen-command-line.pandoc | 10 ++- xen/arch/x86/spec_ctrl.c | 158 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+), 1 deletion(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index ab30ce55c9..4872b9098e 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2335,7 +2335,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`). > {msr-sc,rsb,md-clear,ibpb-entry}=|{pv,hvm}=, > bti-thunk=retpoline|lfence|jmp, {ibrs,ibpb,ssbd,psfd, > eager-fpu,l1d-flush,branch-harden,srb-lock, -> unpriv-mmio}= ]` +> unpriv-mmio,gds-mit}= ]` Controls for speculative execution sidechannel mitigations. By default, Xen will pick the most appropriate mitigations based on compiled in support, @@ -2449,6 +2449,14 @@ and/or `SRBDS_CTRL` functionality available in the Intel May 2022 microcode release to mitigate cross-domain leakage of data via the MMIO Stale Data vulnerabilities. +On all hardware, the `gds-mit=` option can be used to force or prevent Xen +from mitigating the GDS (Gather Data Sampling) vulnerability. By default, Xen +will mitigate GDS on hardware believed to be vulnerable. On hardware +supporting GDS_CTRL (requires the August 2023 microcode), and where firmware +has elected not to lock the configuration, Xen will use GDS_CTRL to mitigate +GDS with. Otherwise, Xen will mitigate by disabling AVX, which blocks the use +of the AVX2 Gather instructions. + ### sync_console > `= ` diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 0925788d59..ebe56a96cd 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -66,6 +66,7 @@ static bool __initdata cpu_has_bug_mds; /* Any other M{LP,SB,FB}DS combination. static int8_t __initdata opt_srb_lock = -1; static bool __initdata opt_unpriv_mmio; static bool __ro_after_init opt_fb_clear_mmio; +static int8_t __initdata opt_gds_mit = -1; static int __init cf_check parse_spec_ctrl(const char *s) { @@ -119,6 +120,7 @@ static int __init cf_check parse_spec_ctrl(const char *s) opt_branch_harden = false; opt_srb_lock = 0; opt_unpriv_mmio = false; + opt_gds_mit = 0; } else if ( val > 0 ) rc = -EINVAL; @@ -269,6 +271,8 @@ static int __init cf_check parse_spec_ctrl(const char *s) opt_srb_lock = val; else if ( (val = parse_boolean("unpriv-mmio", s, ss)) >= 0 ) opt_unpriv_mmio = val; + else if ( (val = parse_boolean("gds-mit", s, ss)) >= 0 ) + opt_gds_mit = val; else rc = -EINVAL; @@ -1267,6 +1271,158 @@ static __init void mds_calculations(void) } } +static bool __init cpu_has_gds(void) +{ + /* + * Any part advertising GDS_NO should be not vulnerable to GDS. This + * includes cases where the hypervisor is mitigating behind our backs, or + * has synthesized GDS_NO on older parts for levelling purposes. + */ + if ( cpu_has_gds_no ) + return false; + + /* + * On real hardware the GDS_CTRL control only exists on parts vulnerable + * to GDS and with up-to-date microcode. It might also be virtualised by + * an aware hypervisor, meaning "somewhere you might migrate to is + * vulnerable". + */ + if ( cpu_has_gds_ctrl ) + return true; + + /* + * An attacker requires the use of the AVX2 GATHER instructions to leak + * data with GDS. However, the only way to block those instructions is to + * prevent XCR0[2] from being set, which is original AVX. A hypervisor + * might do this as a stopgap mitigation. + */ + if ( !cpu_has_avx ) + return false; + + /* + * GDS affects the Core line from Skylake up to but not including Golden + * Cove (Alder Lake, Sapphire Rapids). Broadwell and older, and the Atom + * line, and all hybrid parts are unaffected. + */ + switch ( boot_cpu_data.x86_model ) + { + case 0x55: /* Skylake/Cascade Lake/Cooper Lake SP */ + case 0x6a: /* Ice Lake SP */ + case 0x6c: /* Ice Lake D */ + case 0x7e: /* Ice Lake U/Y */ + case 0x8c: /* Tiger Lake U */ + case 0x8d: /* Tiger Lake H */ + case 0x8e: /* Amber/Kaby/Coffee/Whiskey/Comet lake U/Y */ + case 0x9e: /* Kaby/Coffee lake H/S/Xeon */ + case 0xa5: /* Comet Lake H/S */ + case 0xa6: /* Comet Lake U */ + case 0xa7: /* Rocket Lake */ + return true; + + default: + /* + * If we've got here and are virtualised, we're most likely under a + * hypervisor unaware of GDS at which point we've lost. Err on the + * safe side. + */ + return cpu_has_hypervisor; + } +} + +static void __init gds_calculations(void) +{ + bool cpu_has_bug_gds, mitigated = false; + + /* GDS is only known to affect Intel Family 6 processors at this time. */ + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + cpu_has_bug_gds = cpu_has_gds(); + + /* + * If we've got GDS_CTRL, we're either native with up-to-date microcode on + * a GDS-vulnerable part, or virtualised under a GDS-aware hypervisor. + */ + if ( cpu_has_gds_ctrl ) + { + bool locked; + uint64_t opt_ctrl; + + if ( cpu_has_gds_no ) + { + /* + * We don't expect to ever see GDS_CTL and GDS_NO set together. + * Complain loudly, and forgo playing with other features. + */ + printk(XENLOG_ERR + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: GDS_CTRL && GDS_NO\n", + boot_cpu_data.x86, boot_cpu_data.x86_model, + boot_cpu_data.x86_mask, this_cpu(cpu_sig).rev); + return add_taint(TAINT_CPU_OUT_OF_SPEC); + } + + rdmsrl(MSR_MCU_OPT_CTRL, opt_ctrl); + + mitigated = !(opt_ctrl & MCU_OPT_CTRL_GDS_MIT_DIS); + locked = opt_ctrl & MCU_OPT_CTRL_GDS_MIT_LOCK; + + /* + * Firmware will lock the GDS mitigation if e.g. SGX is active. + * Alternatively, a hypervisor might virtualise GDS_CTRL as locked. + * Warn if the mitigiation is locked and the user requested the + * opposite configuration. + */ + if ( locked ) + { + if ( opt_gds_mit >= 0 && opt_gds_mit != mitigated ) + printk(XENLOG_WARNING + "GDS_MIT locked by firwmare - ignoring spec-ctrl=gds-mit setting\n"); + opt_gds_mit = mitigated; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * Latch our choice of GDS_MIT for all CPUs to pick up. If LOCK is + * set, we latch the same value as it currently holds. + */ + set_in_mcu_opt_ctrl(MCU_OPT_CTRL_GDS_MIT_DIS, + opt_gds_mit ? 0 : MCU_OPT_CTRL_GDS_MIT_DIS); + mitigated = opt_gds_mit; + } + else if ( opt_gds_mit == -1 ) + opt_gds_mit = cpu_has_bug_gds; /* Mitigate GDS by default */ + + /* + * If we think we're not on vulnerable hardware, or we've mitigated GDS, + * synthesize GDS_NO. This is mostly for the benefit of guests, to inform + * them not to panic. + */ + if ( !cpu_has_bug_gds || mitigated ) + return setup_force_cpu_cap(X86_FEATURE_GDS_NO); + + /* + * If all else has failed, mitigate by disabling AVX. This prevents + * guests from enabling %xcr0.ymm, thereby blocking the use of VGATHER + * instructions. + * + * There's at least one affected CPU not expected to recieve a microcode + * update, and this is the only remaining mitigation. + * + * If we're virtualised, this prevents our guests attacking each other, + * but it doesn't stop the outer hypervisor's guests attacking us. Leave + * a note to this effect. + */ + if ( cpu_has_avx && opt_gds_mit ) + { + setup_clear_cpu_cap(X86_FEATURE_AVX); + printk(XENLOG_WARNING "Mitigating GDS by disabling AVX%s\n", + cpu_has_hypervisor ? + " while virtualised - protections are best-effort" : ""); + } +} + void spec_ctrl_init_domain(struct domain *d) { bool pv = is_pv_domain(d); @@ -1746,6 +1902,8 @@ void __init init_speculation_mitigations(void) opt_srb_lock ? 0 : MCU_OPT_CTRL_RNGDS_MITG_DIS); } + gds_calculations(); + print_details(thunk); /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582307.912022 (Exim 4.92) (envelope-from ) id 1qUMTC-0000ZO-Sm; Fri, 11 Aug 2023 07:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582307.912022; Fri, 11 Aug 2023 07:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTC-0000ZF-Px; Fri, 11 Aug 2023 07:22:02 +0000 Received: by outflank-mailman (input) for mailman id 582307; Fri, 11 Aug 2023 07:22:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTC-0000Z9-IU for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTC-0003H1-HV for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMTC-0002Tj-GX for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=sJrBpTH9V/xeVnmfdEjMnpZHicriq2ScI9c9vgp6UnY=; b=y+6S5R6ASsh/9jrvzwr+q7WYTi f+KP95GgPT9p49+CeOjNdL9dCEUe6QdbOb56GtLY14i6NVodD8mvdnGonDhJbBW1wI8STq735Sdt6 wdSoH7qKxf9djfft+tmMix6AGGoPRcNtWCXp2cm9omaG25wNvMKVfwUHi1pc520eFaG0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/include: address MISRA C:2012 Rule 5.3. Message-Id: Date: Fri, 11 Aug 2023 07:22:02 +0000 commit f53d0136aedfe99692e9179a9664acf364abdfd3 Author: Nicola Vetrini AuthorDate: Tue Aug 8 13:08:05 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 8 18:15:46 2023 -0700 x86/include: address MISRA C:2012 Rule 5.3. Variable 'mpc_default_type' in 'xen/arch/x86/include/asm/mpspec.h' has no uses and causes shadowing with function parameter names in 'mpparse.c'. Therefore, it is removed. No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/mpspec.h | 1 - 1 file changed, 1 deletion(-) diff --git a/xen/arch/x86/include/asm/mpspec.h b/xen/arch/x86/include/asm/mpspec.h index 1246eece0b..45e474dfd1 100644 --- a/xen/arch/x86/include/asm/mpspec.h +++ b/xen/arch/x86/include/asm/mpspec.h @@ -15,7 +15,6 @@ extern void get_smp_config (void); extern unsigned char apic_version [MAX_APICS]; extern int mp_irq_entries; extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES]; -extern int mpc_default_type; extern unsigned long mp_lapic_addr; extern bool pic_mode; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582308.912026 (Exim 4.92) (envelope-from ) id 1qUMTN-0000cQ-UB; Fri, 11 Aug 2023 07:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582308.912026; Fri, 11 Aug 2023 07:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTN-0000cI-Ra; Fri, 11 Aug 2023 07:22:13 +0000 Received: by outflank-mailman (input) for mailman id 582308; Fri, 11 Aug 2023 07:22:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTM-0000bw-LP for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTM-0003HB-Kc for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMTM-0002UC-Je for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=V/T82W2OJNDZ1WYTCXKcxGqOkZlEegqKEg2SKupnd64=; b=OOD+Nu6Wp6z0U7OOKyVUBktpxk sg3O5xGYnUko1A0VD3flrolll7hOllbnG52d1KLF1nqPyPjWKCeNkDnyjnmJF92tXO2L6z6CQGZPC w66kMubm2MhSuEfqX+7JxROTzic5JCKr9z3Y5/8mCdBy6bjaKQ5mWzO6AhOX7CmdtM08=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/xstate: address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 11 Aug 2023 07:22:12 +0000 commit 7ee95565188db16a1caa68f3ca1b36606e09b67e Author: Nicola Vetrini AuthorDate: Tue Aug 8 13:08:06 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 8 18:16:52 2023 -0700 x86/xstate: address MISRA C:2012 Rule 5.3 Rename the local variables s/xsave/xstate/ to avoid clashing with function 'xsave' declared in 'xen/arch/x86/include/asm/xstate.h'. No functional changes. Signed-off-by: Nicola Vetrini [stefano: defined/declared in commit message] Signed-off-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/xstate.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 770747d88f..f442610fc5 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -174,10 +174,10 @@ static void setup_xstate_comp(uint16_t *comp_offsets, */ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size) { - const struct xsave_struct *xsave = v->arch.xsave_area; + const struct xsave_struct *xstate = v->arch.xsave_area; const void *src; uint16_t comp_offsets[sizeof(xfeature_mask)*8]; - u64 xstate_bv = xsave->xsave_hdr.xstate_bv; + u64 xstate_bv = xstate->xsave_hdr.xstate_bv; u64 valid; /* Check there is state to serialise (i.e. at least an XSAVE_HDR) */ @@ -185,19 +185,19 @@ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size) /* Check there is the correct room to decompress into. */ BUG_ON(size != xstate_ctxt_size(v->arch.xcr0_accum)); - if ( !(xsave->xsave_hdr.xcomp_bv & XSTATE_COMPACTION_ENABLED) ) + if ( !(xstate->xsave_hdr.xcomp_bv & XSTATE_COMPACTION_ENABLED) ) { - memcpy(dest, xsave, size); + memcpy(dest, xstate, size); return; } - ASSERT(xsave_area_compressed(xsave)); - setup_xstate_comp(comp_offsets, xsave->xsave_hdr.xcomp_bv); + ASSERT(xsave_area_compressed(xstate)); + setup_xstate_comp(comp_offsets, xstate->xsave_hdr.xcomp_bv); /* * Copy legacy XSAVE area and XSAVE hdr area. */ - memcpy(dest, xsave, XSTATE_AREA_MIN_SIZE); + memcpy(dest, xstate, XSTATE_AREA_MIN_SIZE); memset(dest + XSTATE_AREA_MIN_SIZE, 0, size - XSTATE_AREA_MIN_SIZE); ((struct xsave_struct *)dest)->xsave_hdr.xcomp_bv = 0; @@ -206,7 +206,7 @@ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size) * Copy each region from the possibly compacted offset to the * non-compacted offset. */ - src = xsave; + src = xstate; valid = xstate_bv & ~XSTATE_FP_SSE; while ( valid ) { @@ -239,7 +239,7 @@ void expand_xsave_states(const struct vcpu *v, void *dest, unsigned int size) */ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size) { - struct xsave_struct *xsave = v->arch.xsave_area; + struct xsave_struct *xstate = v->arch.xsave_area; void *dest; uint16_t comp_offsets[sizeof(xfeature_mask)*8]; u64 xstate_bv, valid; @@ -252,7 +252,7 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size) if ( !(v->arch.xcr0_accum & XSTATE_XSAVES_ONLY) ) { - memcpy(xsave, src, size); + memcpy(xstate, src, size); return; } @@ -260,19 +260,19 @@ void compress_xsave_states(struct vcpu *v, const void *src, unsigned int size) * Copy legacy XSAVE area, to avoid complications with CPUID * leaves 0 and 1 in the loop below. */ - memcpy(xsave, src, FXSAVE_SIZE); + memcpy(xstate, src, FXSAVE_SIZE); /* Set XSTATE_BV and XCOMP_BV. */ - xsave->xsave_hdr.xstate_bv = xstate_bv; - xsave->xsave_hdr.xcomp_bv = v->arch.xcr0_accum | XSTATE_COMPACTION_ENABLED; + xstate->xsave_hdr.xstate_bv = xstate_bv; + xstate->xsave_hdr.xcomp_bv = v->arch.xcr0_accum | XSTATE_COMPACTION_ENABLED; - setup_xstate_comp(comp_offsets, xsave->xsave_hdr.xcomp_bv); + setup_xstate_comp(comp_offsets, xstate->xsave_hdr.xcomp_bv); /* * Copy each region from the non-compacted offset to the * possibly compacted offset. */ - dest = xsave; + dest = xstate; valid = xstate_bv & ~XSTATE_FP_SSE; while ( valid ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582309.912029 (Exim 4.92) (envelope-from ) id 1qUMTX-0000ga-Ve; Fri, 11 Aug 2023 07:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582309.912029; Fri, 11 Aug 2023 07:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTX-0000gU-T5; Fri, 11 Aug 2023 07:22:23 +0000 Received: by outflank-mailman (input) for mailman id 582309; Fri, 11 Aug 2023 07:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTW-0000g3-OM for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: refactor macros in 'xen-mca.h' Message-Id: Date: Fri, 11 Aug 2023 07:22:22 +0000 commit 752fd032bfbcc515850c6b4889a880a182baa5f9 Author: Nicola Vetrini AuthorDate: Tue Aug 8 13:08:07 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 8 18:17:19 2023 -0700 x86: refactor macros in 'xen-mca.h' The macros defined 'xen/include/public/arch-x86/xen-mca.h' are revised to address the following concerns: - needless underscore prefixes for parameter names; - the variable 'i' in function 'mce_action' that is shadowed by the local variable in the macro. Therefore, the refactoring aims to resolve present shadowing issues, which violate MISRA C:2012 Rule 5.3, and lessen the probability of future ones with some renames. No functional change. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Reviewed-by: Jan Beulich --- xen/include/public/arch-x86/xen-mca.h | 38 +++++++++++++++++------------------ 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/xen/include/public/arch-x86/xen-mca.h b/xen/include/public/arch-x86/xen-mca.h index b897536ec5..bb1b12f14f 100644 --- a/xen/include/public/arch-x86/xen-mca.h +++ b/xen/include/public/arch-x86/xen-mca.h @@ -280,39 +280,39 @@ DEFINE_XEN_GUEST_HANDLE(xen_mc_logical_cpu_t); /* Prototype: * uint32_t x86_mcinfo_nentries(struct mc_info *mi); */ -#define x86_mcinfo_nentries(_mi) \ - (_mi)->mi_nentries +#define x86_mcinfo_nentries(mi) \ + (mi)->mi_nentries /* Prototype: * struct mcinfo_common *x86_mcinfo_first(struct mc_info *mi); */ -#define x86_mcinfo_first(_mi) \ - ((struct mcinfo_common *)(_mi)->mi_data) +#define x86_mcinfo_first(mi) \ + ((struct mcinfo_common *)(mi)->mi_data) /* Prototype: * struct mcinfo_common *x86_mcinfo_next(struct mcinfo_common *mic); */ -#define x86_mcinfo_next(_mic) \ - ((struct mcinfo_common *)((uint8_t *)(_mic) + (_mic)->size)) +#define x86_mcinfo_next(mic) \ + ((struct mcinfo_common *)((uint8_t *)(mic) + (mic)->size)) /* Prototype: - * void x86_mcinfo_lookup(void *ret, struct mc_info *mi, uint16_t type); + * void x86_mcinfo_lookup(void *ret, struct mc_info *mi, uint16_t mc_type); */ -#define x86_mcinfo_lookup(_ret, _mi, _type) \ +#define x86_mcinfo_lookup(ret, mi, mc_type) \ do { \ - uint32_t found, i; \ - struct mcinfo_common *_mic; \ + uint32_t found_, i_; \ + struct mcinfo_common *mic_; \ \ - found = 0; \ - (_ret) = NULL; \ - if (_mi == NULL) break; \ - _mic = x86_mcinfo_first(_mi); \ - for (i = 0; i < x86_mcinfo_nentries(_mi); i++) { \ - if (_mic->type == (_type)) { \ - found = 1; \ + found_ = 0; \ + (ret) = NULL; \ + if ((mi) == NULL) break; \ + mic_ = x86_mcinfo_first(mi); \ + for (i_ = 0; i_ < x86_mcinfo_nentries(mi); i_++) { \ + if (mic_->type == (mc_type)) { \ + found_ = 1; \ break; \ } \ - _mic = x86_mcinfo_next(_mic); \ + mic_ = x86_mcinfo_next(mic_); \ } \ - (_ret) = found ? _mic : NULL; \ + (ret) = found_ ? mic_ : NULL; \ } while (0) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582313.912034 (Exim 4.92) (envelope-from ) id 1qUMTi-0000lT-13; Fri, 11 Aug 2023 07:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582313.912034; Fri, 11 Aug 2023 07:22:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTh-0000lH-Ub; Fri, 11 Aug 2023 07:22:33 +0000 Received: by outflank-mailman (input) for mailman id 582313; Fri, 11 Aug 2023 07:22:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTg-0000l4-Ry for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTg-0003HS-Qo for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMTg-0002VS-Pm for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LtnJFJkIJ/+Cp1gpFK5Cbft7nQ0QbADC/z7zcQHZK0U=; b=Nl5BJA1b0fAXPpgVQhuGO4t3FI yalTm7dM3CptY/REJmRJ/N29I8YV9GT15qJccTSbK1+w/5pNduJjvZWAyewI9gN0/AxPoCydLmP6I uaprXhpiy3/mw0YVrv4CqFhXCH2LaD3IYBvPK7kLxIT1IA19s9I8W48Y6BB4D9ReTJFI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/setup: address MISRA C:2012 Rule 5.3 and 8.3 Message-Id: Date: Fri, 11 Aug 2023 07:22:32 +0000 commit a9de4b62f43d63776aff4299fe043977c7c8402e Author: Nicola Vetrini AuthorDate: Tue Aug 8 14:22:51 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 8 18:17:51 2023 -0700 x86/setup: address MISRA C:2012 Rule 5.3 and 8.3 The parameters in the function declaration 'construct_dom0' violate Rule 8.3: "All declarations of an object or function shall use the same names and type qualifiers", but also cause shadowing inside the declaration scope with the variable "static struct file __initdata kernel;" in 'xen/common/efi/boot.c'. Renaming the parameters in the declaration resolves both issues The local variable 'mask' is removed because it shadows the homonymous variable defined in an outer scope. There's no change to the semantics since the last use of this variable is in the scope touched by this commit. No functional changes. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/setup.h | 2 +- xen/arch/x86/setup.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h index 51fce66607..b0e6a39e23 100644 --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -33,7 +33,7 @@ static inline void vesa_init(void) {}; int construct_dom0( struct domain *d, - const module_t *kernel, unsigned long kernel_headroom, + const module_t *image, unsigned long image_headroom, module_t *initrd, const char *cmdline); void setup_io_bitmap(struct domain *d); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 2dbe9857aa..80ae973d64 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1577,8 +1577,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) s = map_s; if ( s < map_e ) { - uint64_t mask = (1UL << L2_PAGETABLE_SHIFT) - 1; - + mask = (1UL << L2_PAGETABLE_SHIFT) - 1; map_s = (s + mask) & ~mask; map_e &= ~mask; init_boot_pages(map_s, map_e); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582317.912038 (Exim 4.92) (envelope-from ) id 1qUMTs-0000pb-2d; Fri, 11 Aug 2023 07:22:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582317.912038; Fri, 11 Aug 2023 07:22:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTr-0000pT-W2; Fri, 11 Aug 2023 07:22:43 +0000 Received: by outflank-mailman (input) for mailman id 582317; Fri, 11 Aug 2023 07:22:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTq-0000pL-Ug for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMTq-0003Hg-Tf for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMTq-0002WB-Ss for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fArrPU0lspGjcv6NMH5x02AwgpDJIT6GuKXdtrHxJs8=; b=m8j3IJSXi5FPJELTkqd3RFMHiD su2X1weoPdE7UB20ztm4vuOSAh2r2EnxVKtaOKxoZc5OUpdrOVoV7o6fJp8NKKloN4iaU6Pvm2ExH UAh+CzhPlKuH/jTDOP8mHbCrohTw6w4FT3gFsNeOYaEtvXXjxKKgKxF/HA0vExgAnzDg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: Fix missing smoke.serial in artifacts of qemu arm32 jobs Message-Id: Date: Fri, 11 Aug 2023 07:22:42 +0000 commit 76c243b1bc59660e3a643c17bff72fe674782564 Author: Michal Orzel AuthorDate: Tue Aug 8 10:50:59 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 8 18:18:23 2023 -0700 automation: Fix missing smoke.serial in artifacts of qemu arm32 jobs It was observed that smoke.serial file (used to store boot logs) is missing in artifacts of qemu based arm32 jobs. This is because the artifacts:paths listing smoke.serial specifies paths relative to the project directory but the qemu-smoke-dom0{less}-arm32.sh scripts create this file under binaries/. Fix it so that smoke.serial gets created in project directory just like for every other test job. Signed-off-by: Michal Orzel Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini --- automation/scripts/qemu-smoke-dom0-arm32.sh | 8 +++++--- automation/scripts/qemu-smoke-dom0less-arm32.sh | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh index 2c80df089f..e6f303064a 100755 --- a/automation/scripts/qemu-smoke-dom0-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0-arm32.sh @@ -2,6 +2,8 @@ set -ex +serial_log="$(pwd)/smoke.serial" + cd binaries mkdir rootfs @@ -74,7 +76,7 @@ rm -rf imagebuilder git clone https://gitlab.com/ViryaOS/imagebuilder bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config -rm -f smoke.serial +rm -f ${serial_log} set +e echo " virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"| \ timeout -k 1 720 \ @@ -89,8 +91,8 @@ timeout -k 1 720 \ -no-reboot \ -device virtio-net-pci,netdev=n0 \ -netdev user,id=n0,tftp=./ \ - -bios /usr/lib/u-boot/qemu_arm/u-boot.bin |& tee smoke.serial + -bios /usr/lib/u-boot/qemu_arm/u-boot.bin |& tee ${serial_log} set -e -(grep -q "Domain-0" smoke.serial && grep -q "^/ #" smoke.serial) || exit 1 +(grep -q "Domain-0" ${serial_log} && grep -q "^/ #" ${serial_log}) || exit 1 exit 0 diff --git a/automation/scripts/qemu-smoke-dom0less-arm32.sh b/automation/scripts/qemu-smoke-dom0less-arm32.sh index cc91238f42..fb8f044a51 100755 --- a/automation/scripts/qemu-smoke-dom0less-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0less-arm32.sh @@ -7,6 +7,8 @@ test_variant=$1 # Prompt to grep for to check if dom0 booted successfully dom0_prompt="^/ #" +serial_log="$(pwd)/smoke.serial" + cd binaries # Use the kernel from Debian curl --fail --silent --show-error --location --output vmlinuz https://deb.debian.org/debian/dists/bullseye/main/installer-armhf/current/images/netboot/vmlinuz @@ -120,7 +122,7 @@ git clone https://gitlab.com/ViryaOS/imagebuilder bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config # Run the test -rm -f smoke.serial +rm -f ${serial_log} set +e echo " virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"| \ timeout -k 1 240 \ @@ -135,8 +137,8 @@ timeout -k 1 240 \ -no-reboot \ -device virtio-net-pci,netdev=n0 \ -netdev user,id=n0,tftp=./ \ - -bios /usr/lib/u-boot/qemu_arm/u-boot.bin |& tee smoke.serial + -bios /usr/lib/u-boot/qemu_arm/u-boot.bin |& tee ${serial_log} set -e -(grep -q "${dom0_prompt}" smoke.serial && grep -q "${passed}" smoke.serial) || exit 1 +(grep -q "${dom0_prompt}" ${serial_log} && grep -q "${passed}" ${serial_log}) || exit 1 exit 0 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:22:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:22:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582320.912041 (Exim 4.92) (envelope-from ) id 1qUMU2-0000sQ-3f; Fri, 11 Aug 2023 07:22:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582320.912041; Fri, 11 Aug 2023 07:22:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMU2-0000sJ-1E; Fri, 11 Aug 2023 07:22:54 +0000 Received: by outflank-mailman (input) for mailman id 582320; Fri, 11 Aug 2023 07:22:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMU1-0000s8-24 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMU1-0003Hp-1G for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMU0-0002Wq-Vs for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:22:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HGn2ihcPjhm7RjzQRQmg0ndJ+JnNXSO//OorDTen+k4=; b=MgjZkGMqgTTxCIfICUIXMFtwg9 62akaUB1fI1VxVDelfLVEKL4+paCdbjp6GkExxpfbDuQ86rWD7RhiFVQ2dnwnnKFt5uqNqIBtJyzL InIA0MU/f9UwuzZ9vwErLTMaD3S7OtVl+nLxbX1eZb4z7tvyM/HRWzSrGrfffKmH036o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxenstat/Linux: pass nul-terminated string to strpbrk() Message-Id: Date: Fri, 11 Aug 2023 07:22:52 +0000 commit 82f7f7be462ddb435c60aef86960252240bf03c7 Author: Jan Beulich AuthorDate: Wed Aug 9 09:03:51 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 09:03:51 2023 +0200 libxenstat/Linux: pass nul-terminated string to strpbrk() While what "tmp" points to has been cleared at the end of the first iteration of parseNetDevLine()'s main loop, this is too late for the first iteration's invocation of strpbrk() (copying the interface name). Properly nul-terminate the string at population time instead, removing the late clearing. While there also eliminate a confusing (because of being wrong) comment: A regex parsing error would be handled one further scope outwards. Here we're dealing with field 1 vs any of the later fields. Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross Acked-by: Anthony PERARD --- tools/libs/stat/xenstat_linux.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/tools/libs/stat/xenstat_linux.c b/tools/libs/stat/xenstat_linux.c index 05d0b07553..cbba54aa83 100644 --- a/tools/libs/stat/xenstat_linux.c +++ b/tools/libs/stat/xenstat_linux.c @@ -169,6 +169,7 @@ static int parseNetDevLine(char *line, char *iface, unsigned long long *rxBytes, matches[i].rm_so + 1) * sizeof(char)); for (x = matches[i].rm_so; x < matches[i].rm_eo; x++) tmp[x - matches[i].rm_so] = line[x]; + tmp[x - matches[i].rm_so] = 0; /* We populate all the fields from /proc/net/dev line */ if (i > 1) { @@ -225,15 +226,11 @@ static int parseNetDevLine(char *line, char *iface, unsigned long long *rxBytes, break; } } - else - /* There were errors when parsing this directly in RE. strpbrk() helps */ - if (iface != NULL) { + else if (iface != NULL) { char *tmp2 = strpbrk(tmp, "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"); if (tmp2 != NULL) strcpy(iface, tmp2); } - - memset(tmp, 0, matches[i].rm_eo - matches[i].rm_so); } } } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582322.912046 (Exim 4.92) (envelope-from ) id 1qUMUC-0000vj-6d; Fri, 11 Aug 2023 07:23:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582322.912046; Fri, 11 Aug 2023 07:23:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUC-0000vb-3v; Fri, 11 Aug 2023 07:23:04 +0000 Received: by outflank-mailman (input) for mailman id 582322; Fri, 11 Aug 2023 07:23:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUB-0000vR-5C for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUB-0003IV-4T for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUB-0002XT-3X for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=B5YMzXizzq4dJXkvS82Rx+MXReXVCNyTBGcwTnoNORQ=; b=Lz30FP3Me3bJjLo2W2QOy7fONo GTmrEeRZqTucJfvJKUnawZAsW/xEuz5b5o9KhhCjzpafCQHZfrkGjllnP64xxY3ws/22vNUXFPr5d LRJN5PHiTIr6DKshNtvbc9TQwu788+iYnZnRWNQHpZAElPjYjZcI8eG4ykHy50VrGiHQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] ns16550: Guard accesses to `vuart` field by CONFIG_ARM Message-Id: Date: Fri, 11 Aug 2023 07:23:03 +0000 commit f974004ccb69d2d987815b431a5f58672e6e4686 Author: Shawn Anastasio AuthorDate: Wed Aug 9 09:04:24 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 09:04:24 2023 +0200 ns16550: Guard accesses to `vuart` field by CONFIG_ARM When CONFIG_ARM is defined, a `vuart` field is added to struct ns16550, but accesses to this field in ns16550_uart_dt_init weren't correctly guarded. Fix build on !ARM platforms that define CONFIG_HAS_DEVICE_TREE by correctly guarding access to the vuart field in this function. Signed-off-by: Shawn Anastasio Reviewed-by: Jan Beulich --- xen/drivers/char/ns16550.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index b75e7f8fa0..28ddedd50d 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -1797,11 +1797,13 @@ static int __init ns16550_uart_dt_init(struct dt_device_node *dev, uart->dw_usr_bsy = dt_device_is_compatible(dev, "snps,dw-apb-uart"); +#ifdef CONFIG_ARM uart->vuart.base_addr = uart->io_base; uart->vuart.size = uart->io_size; uart->vuart.data_off = UART_THR <reg_shift; uart->vuart.status_off = UART_LSR<reg_shift; uart->vuart.status = UART_LSR_THRE|UART_LSR_TEMT; +#endif /* Register with generic serial driver. */ serial_register_uart(uart - ns16550_com, &ns16550_driver, uart); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582323.912049 (Exim 4.92) (envelope-from ) id 1qUMUM-0000yg-80; Fri, 11 Aug 2023 07:23:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582323.912049; Fri, 11 Aug 2023 07:23:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUM-0000yY-5N; Fri, 11 Aug 2023 07:23:14 +0000 Received: by outflank-mailman (input) for mailman id 582323; Fri, 11 Aug 2023 07:23:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUL-0000yR-8k for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUL-0003If-81 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUL-0002Y7-75 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7SWU4luu+lXZNJP7svnOd0jdyya3ft3esHpdaO2eloQ=; b=uimZS/RMJXwbsZaPlOI+RY3/Wv Bh0NcdvWD2KW/wxF/gnA8iWorN4KgQGlZI/Xe2j+4A2x6m8FydlK7TbKnp+hVxH9Qbu22QwoIrNb3 Be3PsOyuKSKIE/8n4DiABPaPt7eoS2LUFU0S8iq5kiFBHkvMslwa5PLRgZcHVHUSc0dM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: add configure option for disabling pygrub Message-Id: Date: Fri, 11 Aug 2023 07:23:13 +0000 commit c9a899f7f497ce39aa7d5f35bf6f15feca94e260 Author: Juergen Gross AuthorDate: Wed Aug 9 09:05:23 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 09:05:23 2023 +0200 tools: add configure option for disabling pygrub Add a "--disable-pygrub" option for being able to disable the build and installation of pygrub. There are two main reasons to do so: - A main reason to use pygrub is to allow a PV guest to choose its bitness (32- or 64-bit). Pygrub allows that by looking into the boot image and to start the guest in the correct mode depending on the kernel selected. With 32-bit PV guests being deprecated and the possibility to even build a hypervisor without 32-bit PV support, this use case is gone for at least some configurations. - Pygrub is running in dom0 with root privileges. As it is operating on guest controlled data (the boot image) and taking decisions based on this data, there is a higher security risk. Not being possible to use pygrub is thus a step towards a reduction of attack surface. Default is still to build and install pygrub. Signed-off-by: Juergen Gross Acked-by: Anthony PERARD --- config/Tools.mk.in | 1 + tools/Makefile | 2 +- tools/config.h.in | 3 +++ tools/configure | 34 ++++++++++++++++++++++++++++++++++ tools/configure.ac | 5 +++++ 5 files changed, 44 insertions(+), 1 deletion(-) diff --git a/config/Tools.mk.in b/config/Tools.mk.in index b7cc2961d8..432d7496f1 100644 --- a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -48,6 +48,7 @@ CONFIG_QEMU_XEN := @qemu_xen@ CONFIG_QEMUU_EXTRA_ARGS:= @EXTRA_QEMUU_CONFIGURE_ARGS@ CONFIG_LIBNL := @libnl@ CONFIG_GOLANG := @golang@ +CONFIG_PYGRUB := @pygrub@ CONFIG_SYSTEMD := @systemd@ SYSTEMD_CFLAGS := @SYSTEMD_CFLAGS@ diff --git a/tools/Makefile b/tools/Makefile index 1ff90ddfa0..bbd75ebc1a 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -36,7 +36,7 @@ SUBDIRS-$(CONFIG_X86) += debugger SUBDIRS-$(CONFIG_TESTS) += tests SUBDIRS-y += python -SUBDIRS-y += pygrub +SUBDIRS-$(CONFIG_PYGRUB) += pygrub SUBDIRS-$(OCAML_TOOLS) += ocaml ifeq ($(CONFIG_RUMP),y) diff --git a/tools/config.h.in b/tools/config.h.in index 3071cb3998..eacf1438d8 100644 --- a/tools/config.h.in +++ b/tools/config.h.in @@ -45,6 +45,9 @@ /* ROMBIOS enabled */ #undef HAVE_ROMBIOS +/* pygrub enabled */ +#undef HAVE_PYGRUB + /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H diff --git a/tools/configure b/tools/configure index 52b4717d01..44ec7a6477 100755 --- a/tools/configure +++ b/tools/configure @@ -707,6 +707,7 @@ AS86 ipxe qemu_traditional LINUX_BACKEND_MODULES +pygrub golang seabios ovmf @@ -811,6 +812,7 @@ enable_xsmpolicy enable_ovmf enable_seabios enable_golang +enable_pygrub with_linux_backend_modules enable_qemu_traditional enable_ipxe @@ -1498,6 +1500,7 @@ Optional Features: --enable-ovmf Enable OVMF (default is DISABLED) --disable-seabios Disable SeaBIOS (default is ENABLED) --disable-golang Disable Go tools (default is ENABLED) + --disable-pygrub Disable pygrub (default is ENABLED) --enable-qemu-traditional Enable qemu traditional device model, (DEFAULT is off) @@ -4287,6 +4290,29 @@ golang=$ax_cv_golang +# Check whether --enable-pygrub was given. +if test "${enable_pygrub+set}" = set; then : + enableval=$enable_pygrub; +fi + + +if test "x$enable_pygrub" = "xno"; then : + + ax_cv_pygrub="n" + +elif test "x$enable_pygrub" = "xyes"; then : + + ax_cv_pygrub="y" + +elif test -z $ax_cv_pygrub; then : + + ax_cv_pygrub="y" + +fi +pygrub=$ax_cv_pygrub + + + # Check whether --with-linux-backend-modules was given. if test "${with_linux_backend_modules+set}" = set; then : @@ -4595,6 +4621,14 @@ else fi +if test "x$pygrub" = "xy"; then : + + +$as_echo "#define HAVE_PYGRUB 1" >>confdefs.h + + +fi + # Check whether --with-system-qemu was given. if test "${with_system_qemu+set}" = set; then : diff --git a/tools/configure.ac b/tools/configure.ac index 3cccf41960..0d1c8f9fa3 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -89,6 +89,7 @@ AX_ARG_DEFAULT_ENABLE([xsmpolicy], [Disable XSM policy compilation]) AX_ARG_DEFAULT_DISABLE([ovmf], [Enable OVMF]) AX_ARG_DEFAULT_ENABLE([seabios], [Disable SeaBIOS]) AX_ARG_DEFAULT_ENABLE([golang], [Disable Go tools]) +AX_ARG_DEFAULT_ENABLE([pygrub], [Disable pygrub]) AC_ARG_WITH([linux-backend-modules], AS_HELP_STRING([--with-linux-backend-modules="mod1 mod2"], @@ -184,6 +185,10 @@ AS_IF([test "x$enable_rombios" = "xyes"], [ ]) AC_SUBST(rombios) +AS_IF([test "x$pygrub" = "xy"], [ + AC_DEFINE([HAVE_PYGRUB], [1], [pygrub enabled]) +]) + AC_ARG_WITH([system-qemu], AS_HELP_STRING([--with-system-qemu@<:@=PATH@:>@], [Use system supplied qemu PATH or qemu (taken from $PATH) as qemu-xen -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582324.912053 (Exim 4.92) (envelope-from ) id 1qUMUW-00011O-9S; Fri, 11 Aug 2023 07:23:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582324.912053; Fri, 11 Aug 2023 07:23:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUW-00011G-6s; Fri, 11 Aug 2023 07:23:24 +0000 Received: by outflank-mailman (input) for mailman id 582324; Fri, 11 Aug 2023 07:23:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUV-000116-C7 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUV-0003Iu-BN for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUV-0002Yj-Ae for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=r4deMgAWmeq4+GucTD6rZKjwqM2FJ/5WwxcTU2go3tg=; b=RMECRi8bOft4zo3sgKrronDcSb dkhfg/bDx3A5Hr3PaJCTRHv3XeLHg4wxZVP8Qk/uH9lT4dV4YPE+6hJeNlTSkV4z5UzCmFdpaYdss kYEaA8HfNVm/ZOrnt2yZay/SnQhdbZj3fOGtgRP8ByN9Za+2H+PrpfuXKh5Ch91dV3ew=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: add configure option for libfsimage Message-Id: Date: Fri, 11 Aug 2023 07:23:23 +0000 commit df8852543d996bdcb9ec7f35ef6a77c00b35d55e Author: Juergen Gross AuthorDate: Wed Aug 9 09:05:40 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 09:05:40 2023 +0200 tools: add configure option for libfsimage The only in-tree user of libfsimage is pygrub. Now that it is possible to disable the build of pygrub, the same should be possible for libfsimage. Add an option for controlling the build of libfsimage. The default is on if pygrub is being built, and off if it isn't. Without pygrub the build of libfsimage can be enabled via --enable-libfsimage. Signed-off-by: Juergen Gross Reviewed-by: Anthony PERARD --- config/Tools.mk.in | 1 + tools/Makefile | 2 +- tools/configure | 40 ++++++++++++++++++++++++++++++++++++++++ tools/configure.ac | 21 +++++++++++++++++++++ 4 files changed, 63 insertions(+), 1 deletion(-) diff --git a/config/Tools.mk.in b/config/Tools.mk.in index 432d7496f1..b54ab21f96 100644 --- a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -49,6 +49,7 @@ CONFIG_QEMUU_EXTRA_ARGS:= @EXTRA_QEMUU_CONFIGURE_ARGS@ CONFIG_LIBNL := @libnl@ CONFIG_GOLANG := @golang@ CONFIG_PYGRUB := @pygrub@ +CONFIG_LIBFSIMAGE := @libfsimage@ CONFIG_SYSTEMD := @systemd@ SYSTEMD_CFLAGS := @SYSTEMD_CFLAGS@ diff --git a/tools/Makefile b/tools/Makefile index bbd75ebc1a..311a9098d7 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -18,7 +18,7 @@ SUBDIRS-$(CONFIG_X86) += firmware SUBDIRS-y += console SUBDIRS-y += xenmon SUBDIRS-$(XENSTAT_XENTOP) += xentop -SUBDIRS-y += libfsimage +SUBDIRS-$(CONFIG_LIBFSIMAGE) += libfsimage SUBDIRS-$(CONFIG_Linux) += vchan # do not recurse in to a dir we are about to delete diff --git a/tools/configure b/tools/configure index 44ec7a6477..ed4eb64568 100755 --- a/tools/configure +++ b/tools/configure @@ -700,6 +700,7 @@ EXTRA_QEMUU_CONFIGURE_ARGS qemu_xen_systemd qemu_xen_path qemu_xen +libfsimage rombios BCC LD86 @@ -818,6 +819,7 @@ enable_qemu_traditional enable_ipxe with_system_ipxe enable_rombios +enable_libfsimage with_system_qemu with_stubdom_qmp_proxy with_system_seabios @@ -1508,6 +1510,8 @@ Optional Features: --with-system-ipxe) --enable-rombios Enable ROMBIOS, (DEFAULT is on if qemu-traditional or ipxe is enabled, otherwise off) + --enable-libfsimage Enable libfsimage, (DEFAULT is on if pygrub is + enabled, otherwise off) --enable-systemd Enable systemd support (default is DISABLED) --enable-9pfs Explicitly enable 9pfs support in QEMU build (default is to defer to QEMU configure default) @@ -4629,6 +4633,42 @@ $as_echo "#define HAVE_PYGRUB 1" >>confdefs.h fi +# Check whether --enable-libfsimage was given. +if test "${enable_libfsimage+set}" = set; then : + enableval=$enable_libfsimage; +else + + if test "x$pygrub" = "xn"; then : + + enable_libfsimage="no" + +else + + enable_libfsimage="yes" + +fi + +fi + +if test "x$enable_libfsimage" = "xyes"; then : + + libfsimage=y + +else + + if test "x$pygrub" = "xy"; then : + + as_fn_error $? "pygrub needs libfsimage" "$LINENO" 5 + +else + + libfsimage=n + +fi + +fi + + # Check whether --with-system-qemu was given. if test "${with_system_qemu+set}" = set; then : diff --git a/tools/configure.ac b/tools/configure.ac index 0d1c8f9fa3..618ef8c63f 100644 --- a/tools/configure.ac +++ b/tools/configure.ac @@ -189,6 +189,27 @@ AS_IF([test "x$pygrub" = "xy"], [ AC_DEFINE([HAVE_PYGRUB], [1], [pygrub enabled]) ]) +AC_ARG_ENABLE([libfsimage], + AS_HELP_STRING([--enable-libfsimage], + [Enable libfsimage, (DEFAULT is on if pygrub is enabled, + otherwise off)]),,[ + AS_IF([test "x$pygrub" = "xn"], [ + enable_libfsimage="no" + ], [ + enable_libfsimage="yes" + ]) +]) +AS_IF([test "x$enable_libfsimage" = "xyes"], [ + libfsimage=y +], [ + AS_IF([test "x$pygrub" = "xy"], [ + AC_MSG_ERROR([pygrub needs libfsimage]) + ], [ + libfsimage=n + ]) +]) +AC_SUBST(libfsimage) + AC_ARG_WITH([system-qemu], AS_HELP_STRING([--with-system-qemu@<:@=PATH@:>@], [Use system supplied qemu PATH or qemu (taken from $PATH) as qemu-xen -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582326.912059 (Exim 4.92) (envelope-from ) id 1qUMUg-00013y-Bh; Fri, 11 Aug 2023 07:23:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582326.912059; Fri, 11 Aug 2023 07:23:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUg-00013q-8K; Fri, 11 Aug 2023 07:23:34 +0000 Received: by outflank-mailman (input) for mailman id 582326; Fri, 11 Aug 2023 07:23:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUf-00013i-FC for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUf-0003J4-EZ for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUf-0002ZO-Di for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pm0dSLv1dNPRVtuvCVD8ma6UvBCi0XkVP/Mc0dHDH6g=; b=N2x0Q9ivWHmnVxH3GCV273qBxr VQoZs0jcZmcqGW865D7kNCnUUkYLPqkr5IlNVnRYOiKN8hvN2tgRdJ9+qpH5oKaGGJXfRfr/HULqx UHskhsERnY9g7vpULbtIPNbYeZeW2tB0j93txUGBAWAcccdlC2AI09ClBbOp2Z65VarM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xl: reject bootloader=pygrub in case pygrub is disabled Message-Id: Date: Fri, 11 Aug 2023 07:23:33 +0000 commit a8a7c33e7dd684966d7df66058f2397995dbae31 Author: Juergen Gross AuthorDate: Wed Aug 9 09:05:55 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 09:05:55 2023 +0200 tools/xl: reject bootloader=pygrub in case pygrub is disabled In case Xen has been configured with "--disable-pygrub", don't accept the domain config option "bootloader=pygrub". Suggested-by: Andrew Cooper Signed-off-by: Juergen Gross Acked-by: Anthony PERARD --- tools/xl/xl_parse.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 1a5556d3bb..0e8c604bbf 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -1692,6 +1692,15 @@ void parse_config_data(const char *config_source, xlu_cfg_get_defbool(config, "acpi", &b_info->acpi, 0); xlu_cfg_replace_string (config, "bootloader", &b_info->bootloader, 0); +#ifndef HAVE_PYGRUB + if (b_info->bootloader && + (!strcmp(b_info->bootloader, "pygrub") || + !strcmp(b_info->bootloader, "/usr/bin/pygrub"))) { + fprintf(stderr, "ERROR: this instance of Xen has been built without support of \"pygrub\".\n"); + exit(-ERROR_FAIL); + } +#endif + switch (xlu_cfg_get_list_as_string_list(config, "bootloader_args", &b_info->bootloader_args, 1)) { case 0: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582327.912062 (Exim 4.92) (envelope-from ) id 1qUMUq-00016x-CW; Fri, 11 Aug 2023 07:23:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582327.912062; Fri, 11 Aug 2023 07:23:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUq-00016p-9r; Fri, 11 Aug 2023 07:23:44 +0000 Received: by outflank-mailman (input) for mailman id 582327; Fri, 11 Aug 2023 07:23:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUp-00016j-IZ for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUp-0003JF-Ho for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUp-0002Zs-Gy for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=td9JhV9EpGPASi1ChQkHXa4cLM28KlBM9JUjoMHLEcE=; b=oB4FfV7Dy+tXR4x6KFKWSavelQ +dDigpwqDBmcs1do4qUCI2BiExxORQxtBmdrFVpiXPMHblvtP8OzwsRWeoQrCEtbX3Ek5aNkjQUli rr+JUoqQdnxqP8KK+tcA8a7a+2Kh17C+JlASx26lhq2UBN3rI2Koj00yNKs1t9VtIDL8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: head: Introduce a helper to flush local TLBs Message-Id: Date: Fri, 11 Aug 2023 07:23:43 +0000 commit 15601eed05922c0df5b59d5fb3f9ec6d85e57a00 Author: Michal Orzel AuthorDate: Tue Aug 8 13:07:39 2023 +0200 Commit: Julien Grall CommitDate: Wed Aug 9 12:00:12 2023 +0100 xen/arm64: head: Introduce a helper to flush local TLBs Instead of repeating the same sequence of instructions to flush the TLBs in various places, introduce a macro flush_xen_tlb_local and make use of it. This is similar to what was done for arm32 by the commit: dea9dddeceec8a1d68da24b14d5b2396effe555f This is also making the flush sequence in enable_mmu more clear and consistent. Signed-off-by: Michal Orzel Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini Reviewed-by: Julien Grall --- xen/arch/arm/arm64/head.S | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 31cdb54d74..8bca9afa27 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -136,6 +136,18 @@ add \xb, \xb, x20 .endm +/* + * Flush local TLBs + * + * See asm/arm64/flushtlb.h for the explanation of the sequence. + */ +.macro flush_xen_tlb_local + dsb nshst + tlbi alle2 + dsb nsh + isb +.endm + .section .text.header, "ax", %progbits /*.aarch64*/ @@ -721,8 +733,7 @@ enable_mmu: * The state of the TLBs is unknown before turning on the MMU. * Flush them to avoid stale one. */ - tlbi alle2 /* Flush hypervisor TLBs */ - dsb nsh + flush_xen_tlb_local /* Write Xen's PT's paddr into TTBR0_EL2 */ msr TTBR0_EL2, x4 @@ -786,11 +797,7 @@ remove_identity_mapping: str xzr, [x0, x1, lsl #3] identity_mapping_removed: - /* See asm/arm64/flushtlb.h for the explanation of the sequence. */ - dsb nshst - tlbi alle2 - dsb nsh - isb + flush_xen_tlb_local ret ENDPROC(remove_identity_mapping) @@ -872,14 +879,8 @@ ENTRY(switch_ttbr_id) msr SCTLR_EL2, x1 isb - /* - * 3) Flush the TLBs. - * See asm/arm64/flushtlb.h for the explanation of the sequence. - */ - dsb nshst - tlbi alle2 - dsb nsh - isb + /* 3) Flush the TLBs */ + flush_xen_tlb_local /* 4) Update the TTBR */ msr TTBR0_EL2, x0 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:23:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:23:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582328.912066 (Exim 4.92) (envelope-from ) id 1qUMV0-00019k-E9; Fri, 11 Aug 2023 07:23:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582328.912066; Fri, 11 Aug 2023 07:23:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMV0-00019d-BF; Fri, 11 Aug 2023 07:23:54 +0000 Received: by outflank-mailman (input) for mailman id 582328; Fri, 11 Aug 2023 07:23:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUz-00019V-Ll for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMUz-0003Kz-L1 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMUz-0002aN-K6 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:23:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=HqUa3Zdx/fEZOqOxyLrVQ0Iw0Wr30Ih7GF8X+XXigqY=; b=P9H6WDJnMHErUp/z1sXdNAm5A0 /xh+AHBjicjbcRKpP3u3l/cpWFFzaGnclKbxzz0tcoocDcH0ZBCeeeKMdOCuiNjZ7nj4WoJfMpcpc LbgUhIMU3axCqqnn2It1nk84XwRSH8mg6MleA3j3lVZC+jIqcs4WNL4Sj2iXYag6wzJw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] common: move Linux-inherited fixed width type decls to common header Message-Id: Date: Fri, 11 Aug 2023 07:23:53 +0000 commit 75e84d477234796b7b1bb3a39b02e9b3c8b3f7d8 Author: Jan Beulich AuthorDate: Wed Aug 9 15:54:45 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 15:54:45 2023 +0200 common: move Linux-inherited fixed width type decls to common header Have these in one place, for all architectures to use. Also use the C99 types as the "original" ones, and derive the Linux compatible ones (which we're trying to phase out). For __s, seeing that no uses exist anymore, move them to a new Linux compatibility header (as an act of precaution - as said, we don't have any uses of these types right now). In some Flask sources inclusion of asm/byteorder.h needs moving later. No functional change intended. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Acked-by: Julien Grall --- xen/arch/arm/include/asm/types.h | 19 +++++-------------- xen/arch/ppc/include/asm/types.h | 11 ----------- xen/arch/riscv/include/asm/types.h | 13 ------------- xen/arch/x86/include/asm/types.h | 11 ----------- xen/include/xen/linux-compat.h | 19 +++++++++++++++++++ xen/include/xen/types.h | 19 ++++++++++--------- xen/xsm/flask/ss/conditional.c | 3 ++- xen/xsm/flask/ss/ebitmap.c | 4 +++- xen/xsm/flask/ss/policydb.c | 4 +++- 9 files changed, 42 insertions(+), 61 deletions(-) diff --git a/xen/arch/arm/include/asm/types.h b/xen/arch/arm/include/asm/types.h index 545a5e9d11..b0a34ea730 100644 --- a/xen/arch/arm/include/asm/types.h +++ b/xen/arch/arm/include/asm/types.h @@ -1,18 +1,8 @@ #ifndef __ARM_TYPES_H__ #define __ARM_TYPES_H__ -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - #if defined(CONFIG_ARM_32) -typedef signed long long s64; -typedef unsigned long long u64; + typedef u32 vaddr_t; #define PRIvaddr PRIx32 #if defined(CONFIG_PHYS_ADDR_T_32) @@ -34,9 +24,9 @@ typedef u64 paddr_t; #endif typedef u32 register_t; #define PRIregister "08x" -#elif defined (CONFIG_ARM_64) -typedef signed long s64; -typedef unsigned long u64; + +#elif defined(CONFIG_ARM_64) + typedef u64 vaddr_t; #define PRIvaddr PRIx64 typedef u64 paddr_t; @@ -44,6 +34,7 @@ typedef u64 paddr_t; #define PRIpaddr "016lx" typedef u64 register_t; #define PRIregister "016lx" + #endif #endif /* __ARM_TYPES_H__ */ diff --git a/xen/arch/ppc/include/asm/types.h b/xen/arch/ppc/include/asm/types.h index cee08e111a..b62ae0e7ae 100644 --- a/xen/arch/ppc/include/asm/types.h +++ b/xen/arch/ppc/include/asm/types.h @@ -3,17 +3,6 @@ #ifndef _ASM_PPC_TYPES_H #define _ASM_PPC_TYPES_H -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long s64; -typedef unsigned long u64; typedef unsigned long paddr_t; #define INVALID_PADDR (~0UL) #define PRIpaddr "016lx" diff --git a/xen/arch/riscv/include/asm/types.h b/xen/arch/riscv/include/asm/types.h index ab222de337..59358fd698 100644 --- a/xen/arch/riscv/include/asm/types.h +++ b/xen/arch/riscv/include/asm/types.h @@ -3,19 +3,8 @@ #ifndef __RISCV_TYPES_H__ #define __RISCV_TYPES_H__ -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - #if defined(CONFIG_RISCV_32) -typedef signed long long s64; -typedef unsigned long long u64; typedef u32 vaddr_t; #define PRIvaddr PRIx32 typedef u64 paddr_t; @@ -26,8 +15,6 @@ typedef u32 register_t; #elif defined (CONFIG_RISCV_64) -typedef signed long s64; -typedef unsigned long u64; typedef u64 vaddr_t; #define PRIvaddr PRIx64 typedef u64 paddr_t; diff --git a/xen/arch/x86/include/asm/types.h b/xen/arch/x86/include/asm/types.h index c9d2577165..4cbbc8eaa6 100644 --- a/xen/arch/x86/include/asm/types.h +++ b/xen/arch/x86/include/asm/types.h @@ -1,17 +1,6 @@ #ifndef __X86_TYPES_H__ #define __X86_TYPES_H__ -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long s64; -typedef unsigned long u64; typedef unsigned long paddr_t; #define INVALID_PADDR (~0UL) #define PRIpaddr "016lx" diff --git a/xen/include/xen/linux-compat.h b/xen/include/xen/linux-compat.h new file mode 100644 index 0000000000..2c7c046d4c --- /dev/null +++ b/xen/include/xen/linux-compat.h @@ -0,0 +1,19 @@ +/****************************************************************************** + * linux-compat.h + * + * Container for types and other definitions use in Linux (and hence in files + * we "steal" from there), but which shouldn't be used (anymore) in normal Xen + * files. + */ + +#ifndef __XEN_LINUX_COMPAT_H__ +#define __XEN_LINUX_COMPAT_H__ + +#include + +typedef int8_t __s8; +typedef int16_t __s16; +typedef int32_t __s32; +typedef int64_t __s64; + +#endif /* __XEN_LINUX_COMPAT_H__ */ diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h index c873c81ccf..e6fe35db99 100644 --- a/xen/include/xen/types.h +++ b/xen/include/xen/types.h @@ -4,6 +4,16 @@ #include #include +/* Linux inherited types which are being phased out */ +typedef int8_t s8; +typedef uint8_t u8, __u8; +typedef int16_t s16; +typedef uint16_t u16, __u16; +typedef int32_t s32; +typedef uint32_t u32, __u32; +typedef int64_t s64; +typedef uint64_t u64, __u64; + #include typedef __SIZE_TYPE__ size_t; @@ -40,15 +50,6 @@ typedef __PTRDIFF_TYPE__ ptrdiff_t; #define LONG_MIN (-LONG_MAX - 1) #define ULONG_MAX (~0UL) -typedef uint8_t __u8; -typedef int8_t __s8; -typedef uint16_t __u16; -typedef int16_t __s16; -typedef uint32_t __u32; -typedef int32_t __s32; -typedef uint64_t __u64; -typedef int64_t __s64; - typedef __u16 __le16; typedef __u16 __be16; typedef __u32 __le32; diff --git a/xen/xsm/flask/ss/conditional.c b/xen/xsm/flask/ss/conditional.c index e74fc01746..d314f772b4 100644 --- a/xen/xsm/flask/ss/conditional.c +++ b/xen/xsm/flask/ss/conditional.c @@ -9,7 +9,6 @@ /* Ported to Xen 3.0, George Coker, */ -#include #include #include #include @@ -17,6 +16,8 @@ #include #include +#include + #include "security.h" #include "conditional.h" diff --git a/xen/xsm/flask/ss/ebitmap.c b/xen/xsm/flask/ss/ebitmap.c index e1d0a586a7..1db69d9ad1 100644 --- a/xen/xsm/flask/ss/ebitmap.c +++ b/xen/xsm/flask/ss/ebitmap.c @@ -10,12 +10,14 @@ /* Ported to Xen 3.0, George Coker, */ -#include #include #include #include #include #include + +#include + #include "ebitmap.h" #include "policydb.h" diff --git a/xen/xsm/flask/ss/policydb.c b/xen/xsm/flask/ss/policydb.c index 7f232f92fa..5af45fdc27 100644 --- a/xen/xsm/flask/ss/policydb.c +++ b/xen/xsm/flask/ss/policydb.c @@ -22,12 +22,14 @@ /* Ported to Xen 3.0, George Coker, */ -#include #include #include #include #include #include + +#include + #include #include "security.h" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582329.912070 (Exim 4.92) (envelope-from ) id 1qUMVB-0001Ca-HP; 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Fri, 11 Aug 2023 07:24:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Ifcp0LNCyd9d+x3CsMbdVeOkD0UqS+aEe5dY7VSr1k0=; b=6eNuw/5+1TfkTR/EB0Rdqo32pV dLF7TAlsKv/75Oum/n29FmioSN9QGPxP7YipG8Z+5r/ljwQ/99iZQ4/AeAdcWuSq+nEloUkOC+e32 BxallLx5K5QvSLNj6CVf+m/ly0vXamqiK+GOj+u3Z6bHSQdX6dDmahr5FwFVfn/hao3s=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] common: __u8 is history Message-Id: Date: Fri, 11 Aug 2023 07:24:03 +0000 commit aea61dbb8eed4374bd35d5878b24b9e968ab19c1 Author: Jan Beulich AuthorDate: Wed Aug 9 15:56:44 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 15:56:44 2023 +0200 common: __u8 is history With the last uses gone, move the type to linux-compat.h. No functional change intended. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/include/xen/linux-compat.h | 1 + xen/include/xen/types.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/include/xen/linux-compat.h b/xen/include/xen/linux-compat.h index 2c7c046d4c..8d06bb6dc9 100644 --- a/xen/include/xen/linux-compat.h +++ b/xen/include/xen/linux-compat.h @@ -12,6 +12,7 @@ #include typedef int8_t __s8; +typedef uint8_t __u8; typedef int16_t __s16; typedef int32_t __s32; typedef int64_t __s64; diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h index e6fe35db99..aea259db1e 100644 --- a/xen/include/xen/types.h +++ b/xen/include/xen/types.h @@ -6,7 +6,7 @@ /* Linux inherited types which are being phased out */ typedef int8_t s8; -typedef uint8_t u8, __u8; +typedef uint8_t u8; typedef int16_t s16; typedef uint16_t u16, __u16; typedef int32_t s32; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582330.912074 (Exim 4.92) (envelope-from ) id 1qUMVL-0001FN-Ig; Fri, 11 Aug 2023 07:24:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582330.912074; Fri, 11 Aug 2023 07:24:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVL-0001FF-G5; Fri, 11 Aug 2023 07:24:15 +0000 Received: by outflank-mailman (input) for mailman id 582330; Fri, 11 Aug 2023 07:24:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVJ-0001F4-Uj for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVJ-0003Lz-U4 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMVJ-0002bt-TH for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pgwUA6uFlDZLSGs4URyq+ab2DA/9mtvpRSkV2okGV4w=; b=BqV/2F6TgaE/UeWcb3fHDKC/Qi 0Av7StybyLyhg6XduaD4q6yYOrcvDwp0iOHKOlYYSj1o6+8VqcaL80GPajyxGetLHUyN2q3dGSzfY FdeI29alRSSts+PKFP/omUzcf9KRGcncjGBqm7Cpm/y/qtBPga0thu6rCrybFZoA9ok8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] common: asm/desc.h is an x86-only header Message-Id: Date: Fri, 11 Aug 2023 07:24:13 +0000 commit e48acb2afe415fa9b4bcfbca97163556f37794fc Author: Jan Beulich AuthorDate: Wed Aug 9 15:57:28 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 15:57:28 2023 +0200 common: asm/desc.h is an x86-only header From briefly going over 9062553a0dc1 it looks like the #include in what was ac_timer.c was added there for no reason. It's unneeded now in any event, and it is the sole reason for Arm to have that dummy header. Purge that, thus avoiding PPC (and later RISC-V) to also gain one. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Acked-by: Julien Grall --- xen/arch/arm/include/asm/desc.h | 12 ------------ xen/common/timer.c | 1 - 2 files changed, 13 deletions(-) diff --git a/xen/arch/arm/include/asm/desc.h b/xen/arch/arm/include/asm/desc.h deleted file mode 100644 index a4d02d5eef..0000000000 --- a/xen/arch/arm/include/asm/desc.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ARCH_DESC_H -#define __ARCH_DESC_H - -#endif /* __ARCH_DESC_H */ -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/common/timer.c b/xen/common/timer.c index 9b5016d5ed..a2a18b2fb2 100644 --- a/xen/common/timer.c +++ b/xen/common/timer.c @@ -22,7 +22,6 @@ #include #include #include -#include #include /* We program the time hardware this far behind the closest deadline. */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582331.912080 (Exim 4.92) (envelope-from ) id 1qUMVV-0001I3-LD; Fri, 11 Aug 2023 07:24:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582331.912080; Fri, 11 Aug 2023 07:24:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVV-0001Hu-HY; Fri, 11 Aug 2023 07:24:25 +0000 Received: by outflank-mailman (input) for mailman id 582331; Fri, 11 Aug 2023 07:24:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVU-0001Hg-1z for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVU-0003MA-1B for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMVU-0002cO-0W for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e0bKl2s5pHlZE7esHCZ6b2iT4Ujdwzua44zjBieWbMw=; b=ZUomjWCr7czNaejTOjyWH4fO3n llR3pVUMswQtuZMSyGW9uOK08+uxiGo7yIDRnLbojfahzk1BHjcNBpQ/UDzwMbRx7LEDZM86YAphN 3HZwPeljXWAvyMVTc+zfCh7+BEiQQHAqhS91FJJ6w3+nLh3eAPPciMCUKInlUo4ICzfc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] move max_page and total_pages to common code Message-Id: Date: Fri, 11 Aug 2023 07:24:24 +0000 commit f70e11db83e94e4c10775785347307a2f1db6067 Author: Jan Beulich AuthorDate: Wed Aug 9 15:58:37 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 15:58:37 2023 +0200 move max_page and total_pages to common code Common code references both, so the variables shouldn't need declaring and defining by every arch. While moving the definitions, add __read_mostly (__ro_after_init would only be appropriate when !mem_hotplug). Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Acked-by: Julien Grall --- xen/arch/arm/include/asm/mm.h | 3 --- xen/arch/arm/mm.c | 3 --- xen/arch/x86/include/asm/mm.h | 2 -- xen/arch/x86/mm.c | 4 ---- xen/common/page_alloc.c | 2 ++ xen/include/xen/mm.h | 2 ++ 6 files changed, 4 insertions(+), 12 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 5b530f0f40..2db8535a4c 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -198,9 +198,6 @@ extern unsigned long directmap_base_pdx; /* PDX of the first page in the frame table. */ extern unsigned long frametable_base_pdx; -extern unsigned long max_page; -extern unsigned long total_pages; - #define PDX_GROUP_SHIFT SECOND_SHIFT /* Boot-time pagetable setup */ diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index c688227abd..d1e1bc72bd 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -134,9 +134,6 @@ unsigned long directmap_base_pdx __read_mostly; unsigned long frametable_base_pdx __read_mostly; unsigned long frametable_virt_end __read_mostly; -unsigned long max_page; -unsigned long total_pages; - extern char __init_begin[], __init_end[]; /* Checking VA memory layout alignment. */ diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index db29e3e205..8f6681429d 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -337,8 +337,6 @@ struct page_info #define maddr_get_owner(ma) (page_get_owner(maddr_to_page((ma)))) #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START) -extern unsigned long max_page; -extern unsigned long total_pages; void init_frametable(void); #define PDX_GROUP_SHIFT L2_PAGETABLE_SHIFT diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index ad0eafc900..057e17c10e 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -146,10 +146,6 @@ l1_pgentry_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) l1_pgentry_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) l1_fixmap_x[L1_PAGETABLE_ENTRIES]; -/* Frame table size in pages. */ -unsigned long max_page; -unsigned long total_pages; - bool __read_mostly machine_to_phys_mapping_valid; struct rangeset *__read_mostly mmio_ro_ranges; diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 03b63d0ee7..35d9a26fa6 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -162,6 +162,8 @@ #define PGT_TYPE_INFO_INITIALIZER 0 #endif +unsigned long __read_mostly max_page; +unsigned long __read_mostly total_pages; paddr_t __ro_after_init mem_hotplug; /* diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index 962ef216fd..8b9618609f 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -159,6 +159,8 @@ int assign_page( /* Dump info to serial console */ void arch_dump_shared_mem_info(void); +extern unsigned long max_page; +extern unsigned long total_pages; extern paddr_t mem_hotplug; /* -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582332.912081 (Exim 4.92) (envelope-from ) id 1qUMVf-0001Ku-LW; Fri, 11 Aug 2023 07:24:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582332.912081; Fri, 11 Aug 2023 07:24:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVf-0001Km-Iy; Fri, 11 Aug 2023 07:24:35 +0000 Received: by outflank-mailman (input) for mailman id 582332; Fri, 11 Aug 2023 07:24:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVe-0001Kb-4d for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVe-0003MN-3w for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMVe-0002dG-3F for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vZ48bWEDyLzrOsMDmtUCLWy9UMddZiaJ7T9TVUWQE0I=; b=vFvxFuTpQS65GJTcdJ7cG4I7Xw n+9TLnBwfoVvQbT/SF4rwz+BvkgGwIUqYlCH2B9+ugu8SgHh8l6BeQe/VmDhOEQGmoa8Dz19BfwD/ rbXqRZpZ3R5tPSZRZLWoNVVP8JQULRgSXJQISTyQoVxPXZ8sRbsWG9DV066E2j1Uf7tI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/delay: address MISRA C:2012 Rule 5.3 Message-Id: Date: Fri, 11 Aug 2023 07:24:34 +0000 commit 236fc9fdf97f4e7c64824ab793e8dca30dd54ffb Author: Nicola Vetrini AuthorDate: Wed Aug 9 15:59:40 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 9 15:59:40 2023 +0200 xen/delay: address MISRA C:2012 Rule 5.3 The variable 'msec' declared in the macro shadows the local variable in 'ehci_dbgp_bios_handoff', but to prevent any future clashes with other functions the macro is converted to a static inline function. No functional change. Signed-off-by: Nicola Vetrini Reviewed-by: Julien Grall --- xen/include/xen/delay.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/delay.h b/xen/include/xen/delay.h index 9d70ef035f..9150226271 100644 --- a/xen/include/xen/delay.h +++ b/xen/include/xen/delay.h @@ -4,7 +4,11 @@ /* Copyright (C) 1993 Linus Torvalds */ #include -#define mdelay(n) (\ - {unsigned long msec=(n); while (msec--) udelay(1000);}) + +static inline void mdelay(unsigned long msec) +{ + while ( msec-- ) + udelay(1000); +} #endif /* defined(_LINUX_DELAY_H) */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582333.912085 (Exim 4.92) (envelope-from ) id 1qUMVp-0001Nn-N3; Fri, 11 Aug 2023 07:24:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582333.912085; Fri, 11 Aug 2023 07:24:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVp-0001Nf-KP; Fri, 11 Aug 2023 07:24:45 +0000 Received: by outflank-mailman (input) for mailman id 582333; Fri, 11 Aug 2023 07:24:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVo-0001NS-87 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVo-0003MW-7N for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMVo-0002e0-62 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=b2eIeYka6Tf6jlScMJYt+0I3klcCNKRpGKrelZsOLUc=; b=UvRh8TM4lDHFxn4g4ovDS9psfT BDzKLZoMCXQ5/lc3rbjvlnhe0FOXOMZ8rlsXmPoDKcamdbVazjVE32PwpQvynVomXxMlUmrEvQ9jY C/iwge6kyRUYqyaEzaMG5bTpbeCcQAdEU03T2UkHzDQglKmA129vmNSa4FpVCqKQjOl8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: update clean guidelines Message-Id: Date: Fri, 11 Aug 2023 07:24:44 +0000 commit f3ab12d2169a759b962802c1a95f63ca188fb9db Author: Simone Ballarin AuthorDate: Wed Aug 9 10:07:59 2023 +0200 Commit: Stefano Stabellini CommitDate: Wed Aug 9 17:06:08 2023 -0700 automation/eclair: update clean guidelines This patch splits the former list in two separate selectors clean_guidelines_common and additional_clean_guidelines. clean_guidelines_common contains the guidelines that are clean in both the analyzed builds, instead additional_clean_guidelines is popolated depending on the current one. The following clean guidelines have been added: - MC3R1.R1.1; - MC3R1.R1.3; - MC3R1.R3.1; - MC3R1.R4.1; - MC3R1.R17.4; - MC3R1.R22.6; - MC3R1.D4.3 (just x86_64); - MC3R1.R5.3 (just arm64); - MC3R1.R7.2 (just arm64); - MC3R1.R8.6 (just arm64); - MC3R1.R9.3 (just arm64). Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/tagging.ecl | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl index ef2e56e186..3f589fd716 100644 --- a/automation/eclair_analysis/ECLAIR/tagging.ecl +++ b/automation/eclair_analysis/ECLAIR/tagging.ecl @@ -28,7 +28,20 @@ #################### -doc_begin="Clean guidelines: new violations for these guidelines are not accepted." --service_selector={clean_guidelines,"^(MC3R1\\.D1\\.1|MC3R1\\.D2\\.1|MC3R1\\.D4\\.11|MC3R1\\.D4\\.14|MC3R1\\.R1\\.4|MC3R1\\.R2\\.2|MC3R1\\.R3\\.2|MC3R1\\.R5\\.1|MC3R1\\.R5\\.2|MC3R1\\.R5\\.4|MC3R1\\.R6\\.1|MC3R1\\.R6\\.2|MC3R1\\.R7\\.1|MC3R1\\.R8\\.1|MC3R1\\.R8\\.5|MC3R1\\.R8\\.8|MC3R1\\.R8\\.10|MC3R1\\.R8\\.12|MC3R1\\.R8\\.14|MC3R1\\.R9\\.2|MC3R1\\.R9\\.4|MC3R1\\.R9\\.5|MC3R1\\.R12\\.5|MC3R1\\.R17\\.3|MC3R1\\.R17\\.6|MC3R1\\.R21\\.13|MC3R1\\.R21\\.19|MC3R1\\.R21\\.21|MC3R1\\.R22\\.2|MC3R1\\.R22\\.4|MC3R1\\.R22\\.5)$" + +-service_selector={clean_guidelines_common,"^(MC3R1\\.D1\\.1|MC3R1\\.D2\\.1|MC3R1\\.D4\\.11|MC3R1\\.D4\\.14|MC3R1\\.R1\\.1|MC3R1\\.R1\\.3|MC3R1\\.R1\\.4|MC3R1\\.R2\\.2|MC3R1\\.R3\\.1|MC3R1\\.R3\\.2|MC3R1\\.R4\\.1|MC3R1\\.R5\\.1|MC3R1\\.R5\\.2|MC3R1\\.R5\\.4|MC3R1\\.R6\\.1|MC3R1\\.R6\\.2|MC3R1\\.R7\\.1|MC3R1\\.R8\\.1|MC3R1\\.R8\\.5|MC3R1\\.R8\\.8|MC3R1\\.R8\\.10|MC3R1\\.R8\\.12|MC3R1\\.R8\\.14|MC3R1\\.R9\\.2|MC3R1\\.R9\\.4|MC3R1\\.R9\\.5|MC3R1\\.R12\\.5|MC3R1\\.R17\\.3|MC3R1\\.R17\\.4|MC3R1\\.R17\\.6|MC3R1\\.R21\\.13|MC3R1\\.R21\\.19|MC3R1\\.R21\\.21|MC3R1\\.R22\\.2|MC3R1\\.R22\\.4|MC3R1\\.R22\\.5|MC3R1\\.R22\\.6)$" } --reports+={clean:added,"service(clean_guidelines)"} + +-setq=target,getenv("XEN_TARGET_ARCH") + +if(string_equal(target,"x86_64"), + service_selector({"additional_clean_guidelines","^(MC3R1\\.D4\\.3)$"}) +) + +if(string_equal(target,"arm64"), + service_selector({"additional_clean_guidelines","^(MC3R1\\.R5\\.3|MC3R1\\.R7\\.2|MC3R1\\.R8\\.6|MC3R1\\.R9\\.3)$"}) +) + +-reports+={clean:added,"service(clean_guidelines_common||additional_clean_guidelines)"} + -doc_end -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:24:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:24:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582334.912090 (Exim 4.92) (envelope-from ) id 1qUMVz-0001Q9-Oz; Fri, 11 Aug 2023 07:24:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582334.912090; Fri, 11 Aug 2023 07:24:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVz-0001Q1-Lv; Fri, 11 Aug 2023 07:24:55 +0000 Received: by outflank-mailman (input) for mailman id 582334; Fri, 11 Aug 2023 07:24:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVy-0001Pn-Ai for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMVy-0003Mh-A4 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMVy-0002ej-9R for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:24:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e4/q8W/91J4BpU1hmO9+MbDRAIZ5v0I9qPNwMv19COE=; b=qeticGZfFfGM1x2wCbiKJdBp1Q GBBy5vKmbDrwWm11SmYX+ESO4fmfPpoJ1R5w+pXBWuTw0xPcWnzE7mEZ7TpHkaNkLJg2RpQRFFY0K g2BLzUHn2E+XVEvTNaY1FsaiXg3sR5t8BKpYZ62nsyz5vDFpOqz1A8BHmKPrfYQJK/wQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: add ECL deviations Message-Id: Date: Fri, 11 Aug 2023 07:24:54 +0000 commit 257a6e763af6fac74983016c64bc341a2751746c Author: Simone Ballarin AuthorDate: Wed Aug 9 10:08:00 2023 +0200 Commit: Stefano Stabellini CommitDate: Wed Aug 9 17:06:32 2023 -0700 automation/eclair: add ECL deviations This patch adds some deviations for the following guidelines: Rule 2.1, Rule 5.3 and Rule 8.2. Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/deviations.ecl | 34 +++++++++++------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl index e1a06daf2f..696618b59e 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -14,8 +14,13 @@ Constant expressions and unreachable branches of if and switch statements are ex -config=MC3R1.R2.1,+reports={deliberate,"first_area(^.*is never referenced$)"} -doc_end --doc_begin="Unreachability in the following macros are expected and safe." --config=MC3R1.R2.1,statements+={safe,"macro(name(BUG||assert_failed||ERROR_EXIT||ERROR_EXIT_DOM||PIN_FAIL))"} +-doc_begin="Unreachability caused by calls to the following functions or macros is deliberate and there is no risk of code being unexpectedly left out." +-config=MC3R1.R2.1,statements+={deliberate,"macro(name(BUG||assert_failed||ERROR_EXIT||ERROR_EXIT_DOM||PIN_FAIL))"} +-config=MC3R1.R2.1,statements+={deliberate, "call(decl(name(__builtin_unreachable||panic||do_unexpected_trap||machine_halt||machine_restart||maybe_reboot)))"} +-doc_end + +-doc_begin="Unreachability of an ASSERT_UNREACHABLE() and analogous macro calls is deliberate and safe." +-config=MC3R1.R2.1,reports+={deliberate, "any_area(any_loc(any_exp(macro(name(ASSERT_UNREACHABLE||PARSE_ERR_RET||PARSE_ERR||FAIL_MSR||FAIL_CPUID)))))"} -doc_end -doc_begin="Proving compliance with respect to Rule 2.2 is generally impossible: @@ -93,25 +98,11 @@ conform to the directive." -doc_begin="The project adopted the rule with an exception listed in 'docs/misra/rules.rst'" -config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^READ_SYSREG$))&&any_exp(macro(^WRITE_SYSREG$))))"} --config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^max_t$))&&any_exp(macro(^min_t$))))"} +-config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^max(_t)?$))&&any_exp(macro(^min(_t)?$))))"} -config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^read[bwlq]$))&&any_exp(macro(^read[bwlq]_relaxed$))))"} -config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^per_cpu$))&&any_exp(macro(^this_cpu$))))"} --doc_end - --doc_begin="The identifier 'fdt' is a widely-used name, for which no suitable -substitute can be found. It is understood in 'xen/arch/arm/efi-boot.h' that the -static variable 'fdt' cannot be confused with parameter names of the function -declarations that are present in the file." --file_tag+={efi_boot_h, "^xen/arch/arm/efi/efi-boot\\.h$"} --config=MC3R1.R5.3,reports+={deliberate, "any_area(decl(kind(var)&&static_storage()&&^fdt$)&&any_loc(file(efi_boot_h)))"} --doc_end - --doc_begin="The identifier 'start' is a widely-used name, for which no suitable -substitute can be found. It is understood in 'xen/include/xen/kernel.h' that the -extern variable 'start' cannot be confused with omonymous parameter names of the -function declarations where that variable is visible." --file_tag+={kernel_h, "^xen/include/xen/kernel\\.h$"} --config=MC3R1.R5.3,reports+={deliberate, "any_area(decl(kind(var)&&linkage(external)&&^start$)&&any_loc(file(kernel_h)))"} +-config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^__emulate_2op$))&&any_exp(macro(^__emulate_2op_nobyte$))))"} +-config=MC3R1.R5.3,reports+={safe, "any_area(any_loc(any_exp(macro(^read_debugreg$))&&any_exp(macro(^write_debugreg$))))"} -doc_end -doc_begin="Function-like macros cannot be confused with identifiers that are @@ -179,6 +170,11 @@ const-qualified." # Series 8. # +-doc_begin="The following file is imported from Linux: ignore for now." +-file_tag+={adopted_r8_2,"^xen/common/inflate\\.c$"} +-config=MC3R1.R8.2,reports+={deliberate,"any_area(any_loc(file(adopted_r8_2)))"} +-doc_end + -doc_begin="The following variables are compiled in multiple translation units belonging to different executables and therefore are safe." -config=MC3R1.R8.6,declarations+={safe, "name(current_stack_pointer||bsearch||sort)"} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 11 07:25:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 11 Aug 2023 07:25:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582335.912096 (Exim 4.92) (envelope-from ) id 1qUMW9-0001UV-Rf; Fri, 11 Aug 2023 07:25:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582335.912096; Fri, 11 Aug 2023 07:25:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMW9-0001UN-NS; Fri, 11 Aug 2023 07:25:05 +0000 Received: by outflank-mailman (input) for mailman id 582335; Fri, 11 Aug 2023 07:25:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMW8-0001UC-DX for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:25:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUMW8-0003NQ-Cu for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:25:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUMW8-0002fP-C8 for xen-changelog@lists.xenproject.org; Fri, 11 Aug 2023 07:25:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DL05qG7G/knuRNermCbCrQeplnfy5F9dQjB9PORZe98=; b=yYeImuz0T4gs/KQaYFha1KZ6Sl xr5EGmc8MqCuth8H2Iup9STxoOu+r9METo7YhCqKvY2YHVDoFC9v2qe1TWjoRH75TagTLP2jn+87P +t9nkKAoNYSc5bnMefKR6ZeIgkhzM3KhdsfjG4fGcNp+Wb5AxqVJ1hxBzX5TMEH5UTqM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: update analyzed builds Message-Id: Date: Fri, 11 Aug 2023 07:25:04 +0000 commit 79c18114c7d71f0227abbbb75e24d114483765f7 Author: Simone Ballarin AuthorDate: Wed Aug 9 10:08:01 2023 +0200 Commit: Stefano Stabellini CommitDate: Wed Aug 9 17:06:33 2023 -0700 automation/eclair: update analyzed builds The xen build for ARM64 now has new configuration options which require to be defined: this patch defines them. In both configuration files some no longer true comments have been removed. Signed-off-by: Simone Ballarin Acked-by: Stefano Stabellini --- automation/eclair_analysis/xen_arm_config | 14 ++++---------- automation/eclair_analysis/xen_x86_config | 9 --------- 2 files changed, 4 insertions(+), 19 deletions(-) diff --git a/automation/eclair_analysis/xen_arm_config b/automation/eclair_analysis/xen_arm_config index 26f5fcca41..ef140ceb73 100644 --- a/automation/eclair_analysis/xen_arm_config +++ b/automation/eclair_analysis/xen_arm_config @@ -1,12 +1,3 @@ -# File provided in -# Re: Xen MISRA C: Source files in scope and out of scope -# from: Stefano Stabellini -# date: 6 giu 2023, 02:53 - -# -# Automatically generated file; DO NOT EDIT. -# Xen/arm 4.18-unstable Configuration -# CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90400 CONFIG_CLANG_VERSION=0 @@ -34,7 +25,9 @@ CONFIG_HVM=y CONFIG_SBSA_VUART_CONSOLE=y CONFIG_ARM_SSBD=y CONFIG_HARDEN_BRANCH_PREDICTOR=y -# CONFIG_TEE is not set +CONFIG_TEE=n +CONFIG_OPTEE=n +CONFIG_FFA=n # CONFIG_STATIC_SHM is not set # end of Architecture Features @@ -47,6 +40,7 @@ CONFIG_ARM64_ERRATUM_819472=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_832075=y CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_1508412=y CONFIG_ARM_ERRATUM_858921=y CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_ARM64_ERRATUM_1286807=y diff --git a/automation/eclair_analysis/xen_x86_config b/automation/eclair_analysis/xen_x86_config index d497814e01..abc44d43e1 100644 --- a/automation/eclair_analysis/xen_x86_config +++ b/automation/eclair_analysis/xen_x86_config @@ -1,12 +1,3 @@ -# File provided in -# Re: Xen MISRA C: Source files in scope and out of scope -# from: Stefano Stabellini -# date: 6 giu 2023, 02:53 - -# -# Automatically generated file; DO NOT EDIT. -# Xen/x86 4.18-unstable Configuration -# CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90400 CONFIG_CLANG_VERSION=0 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:11 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582794.912718 (Exim 4.92) (envelope-from ) id 1qUfiR-00075z-As; Sat, 12 Aug 2023 03:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582794.912718; Sat, 12 Aug 2023 03:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiR-00075r-7z; Sat, 12 Aug 2023 03:55:03 +0000 Received: by outflank-mailman (input) for mailman id 582794; Sat, 12 Aug 2023 03:55:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiP-00075l-V8 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiP-0001hp-N8 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfiP-0000at-M2 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RZS9z/Hq94EW/Q1+C5SDw9NV3ejWl05NtsbjBKtZtyc=; b=p0ZKkK+jc2QP/+RTAfaT8PtHBF hY3Snm7FTZKA+bDdkkVM12zS2qU9RYPwzmBh4j+jbohYQTr6PcJvQVVq+AuFNQubq0msKpUcHRKaJ N6NKYiBQoKnKZ8XHrrAxLwM097NmswFQiKDDwvdLi7hhpR37PMB4y+ON3TIM+424BHO4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] move PAGE_ALIGN() to common header Message-Id: Date: Sat, 12 Aug 2023 03:55:01 +0000 commit 751235f6d12076963918af6e70310e20d4c23027 Author: Jan Beulich AuthorDate: Thu Aug 10 15:09:25 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:09:25 2023 +0200 move PAGE_ALIGN() to common header Much like we have PAGE_OFFSET() there already, there's also no reason for each arch to define identical PAGE_ALIGN(). While there re-pad PAGE_OFFSET() to match the other macros. Signed-off-by: Jan Beulich Reviewed-by: Julien Grall --- xen/arch/arm/include/asm/page.h | 2 -- xen/arch/x86/include/asm/page.h | 2 -- xen/include/xen/page-size.h | 3 ++- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h index ea96983ab9..657c4b33db 100644 --- a/xen/arch/arm/include/asm/page.h +++ b/xen/arch/arm/include/asm/page.h @@ -303,8 +303,6 @@ static inline int gva_to_ipa(vaddr_t va, paddr_t *paddr, unsigned int flags) #endif /* __ASSEMBLY__ */ -#define PAGE_ALIGN(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK) - #endif /* __ARM_PAGE_H__ */ /* diff --git a/xen/arch/x86/include/asm/page.h b/xen/arch/x86/include/asm/page.h index 3647bb1260..c9466172ba 100644 --- a/xen/arch/x86/include/asm/page.h +++ b/xen/arch/x86/include/asm/page.h @@ -404,8 +404,6 @@ static inline void invalidate_icache(void) #endif /* !__ASSEMBLY__ */ -#define PAGE_ALIGN(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK) - #endif /* __X86_PAGE_H__ */ /* diff --git a/xen/include/xen/page-size.h b/xen/include/xen/page-size.h index dc5ade107b..78ea57f324 100644 --- a/xen/include/xen/page-size.h +++ b/xen/include/xen/page-size.h @@ -10,7 +10,8 @@ */ #define PAGE_SIZE (_AC(1,L) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) -#define PAGE_OFFSET(ptr) ((unsigned long)(ptr) & ~PAGE_MASK) +#define PAGE_OFFSET(ptr) ((unsigned long)(ptr) & ~PAGE_MASK) +#define PAGE_ALIGN(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK) #define PADDR_MASK ((_AC(1,ULL) << PADDR_BITS) - 1) #define VADDR_MASK (~_AC(0,UL) >> (BITS_PER_LONG - VADDR_BITS)) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582795.912722 (Exim 4.92) (envelope-from ) id 1qUfia-00077T-CO; Sat, 12 Aug 2023 03:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582795.912722; Sat, 12 Aug 2023 03:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfia-00077L-9Y; Sat, 12 Aug 2023 03:55:12 +0000 Received: by outflank-mailman (input) for mailman id 582795; Sat, 12 Aug 2023 03:55:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiZ-00077F-Rk for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiZ-0001hw-Qv for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfiZ-0000bL-Pq for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=bJbyoo4xPdoiTrDxOxGLdZgre5wh2cptJeeEc0YIKzc=; b=eej6lUvPFVvXlkk66nfPhNmpre zLIvfN5dZKxhAYCsjPgX2bTlBElfkn6voFxjb4V/Tb0oQWZD8DdIuhgSMk/tcgOp2UAyfkd+9QJuY LgywVSWugc+2CNjtzF1nFZKBWecqKUugf0F5AoCrBkF4ZCkPScZdK61+IvnK1nuKm98g=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: implement cpuid() in terms of cpuid_count() Message-Id: Date: Sat, 12 Aug 2023 03:55:11 +0000 commit 4086857cc15942daa2de962cd2aeaaa5570e4f57 Author: Jan Beulich AuthorDate: Thu Aug 10 15:11:37 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:11:37 2023 +0200 x86: implement cpuid() in terms of cpuid_count() Since as a bug workaround (likely inapplicable to any 64-bit CPUs, but it probably doesn't hurt to keep this) we clear %ecx on input anyway, we can as well fall back to cpuid_count(). This allows getting rid of four risky casts and makes things type-safe. The latter aspect requires two type adjustments elsewhere. While adjusting init_intel_cacheinfo(), convert three other local variables there as well. For the struct cpuinfo_x86 change it is relevant to note that no 64-bit CPU comes without CPUID support, and hence cpuid_level is never set to -1; the comment there was simply stale. No functional change intended, yet of course generated code isn't identical. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/arch/x86/cpu/intel_cacheinfo.c | 3 +-- xen/arch/x86/include/asm/cpufeature.h | 2 +- xen/arch/x86/include/asm/processor.h | 9 ++------- 3 files changed, 4 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/cpu/intel_cacheinfo.c b/xen/arch/x86/cpu/intel_cacheinfo.c index 5624e8056d..1b5c4c553d 100644 --- a/xen/arch/x86/cpu/intel_cacheinfo.c +++ b/xen/arch/x86/cpu/intel_cacheinfo.c @@ -172,8 +172,7 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) c->x86_vendor != X86_VENDOR_SHANGHAI) { /* supports eax=2 call */ - int i, j, n; - int regs[4]; + unsigned int i, j, n, regs[4]; unsigned char *dp = (unsigned char *)regs; int only_trace = 0; diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 4762db79f1..835fcdb27c 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -23,7 +23,7 @@ struct cpuinfo_x86 { unsigned char x86_vendor; /* CPU vendor */ unsigned char x86_model; unsigned char x86_mask; - int cpuid_level; /* Maximum supported CPUID level, -1=no CPUID */ + unsigned int cpuid_level; /* Maximum supported CPUID level */ unsigned int extended_cpuid_level; /* Maximum supported CPUID extended level */ unsigned int x86_capability[NCAPINTS]; char x86_vendor_id[16]; diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index 8d1909f73d..b0d2a62c07 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -131,13 +131,8 @@ static inline int cpu_nr_siblings(unsigned int cpu) * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx * resulting in stale register contents being returned. */ -#define cpuid(_op,_eax,_ebx,_ecx,_edx) \ - asm volatile ( "cpuid" \ - : "=a" (*(int *)(_eax)), \ - "=b" (*(int *)(_ebx)), \ - "=c" (*(int *)(_ecx)), \ - "=d" (*(int *)(_edx)) \ - : "0" (_op), "2" (0) ) +#define cpuid(leaf, eax, ebx, ecx, edx) \ + cpuid_count(leaf, 0, eax, ebx, ecx, edx) /* Some CPUID calls want 'count' to be placed in ecx */ static inline void cpuid_count( -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582796.912726 (Exim 4.92) (envelope-from ) id 1qUfik-00079n-Ds; Sat, 12 Aug 2023 03:55:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582796.912726; Sat, 12 Aug 2023 03:55:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfik-00079f-BB; Sat, 12 Aug 2023 03:55:22 +0000 Received: by outflank-mailman (input) for mailman id 582796; Sat, 12 Aug 2023 03:55:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfik-00079V-0M for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfij-0001iP-Vk for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfij-0000bm-Sz for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=J/RbqyphT0Nhyyn3HaHfkpw/Eqae87DiPNBniaH4Oko=; b=fSFIXQ+GfprrVANeXGLwWtXR9b IrSIKeDW95c3MlP2qiwHF/G0VkUHP72e88+XKJdis/UdICPT1NYZZ37BfntTod3PlLVZ3bAOtqJvL LhBINCqMJP5nsTgNpdCUoRCu54wzq1Vsf4u4YGo1i9cEXG24l5isXs/coG2CRhHgvmOI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/memory: make 'ioreq_server_max_frames' static Message-Id: Date: Sat, 12 Aug 2023 03:55:21 +0000 commit dc8d86e03a61b237fd0bf6fdede8e783863d4872 Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:12:56 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:12:56 2023 +0200 xen/memory: make 'ioreq_server_max_frames' static The function 'ioreq_server_max_frames' can be defined static, as its only uses are within the same file. This in turn avoids violating MISRA C:2012 Rule 8.4 because no declaration is present. No functional change. Fixes: 9244528955de ("xen/memory: Fix acquire_resource size semantics”) Signed-off-by: Nicola Vetrini Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini --- xen/common/memory.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/memory.c b/xen/common/memory.c index c206fa4808..b1dcbaf551 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1120,7 +1120,7 @@ static long xatp_permission_check(struct domain *d, unsigned int space) return xsm_add_to_physmap(XSM_TARGET, current->domain, d); } -unsigned int ioreq_server_max_frames(const struct domain *d) +static unsigned int ioreq_server_max_frames(const struct domain *d) { unsigned int nr = 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582797.912731 (Exim 4.92) (envelope-from ) id 1qUfiv-0007CD-Fv; Sat, 12 Aug 2023 03:55:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582797.912731; Sat, 12 Aug 2023 03:55:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiv-0007C5-Ck; Sat, 12 Aug 2023 03:55:33 +0000 Received: by outflank-mailman (input) for mailman id 582797; Sat, 12 Aug 2023 03:55:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiu-0007Bs-3r for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfiu-0001iZ-2h for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfiu-0000cO-1e for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NNxCVIpr6nbGc7Ednjo/HiBV29OBAgrAevm/o5ZtmVM=; b=HaXgQpJCofPjtb6GhEEjpyWM9i D53tik35nTZbM/cGIqjDiynSi6d3HUpuYbansPYjMB4P14zd7hd4gHsbtgldKdNRUcKuUPUnU0UtU eTEG7INcvJXruR5nSfHZvuGsDMUeVtb9Lp0DdUwHIOEHcHIhwWWTUcHP1UJhHRhpZn1M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen: make 'saved_cmdline' static Message-Id: Date: Sat, 12 Aug 2023 03:55:32 +0000 commit 2a54704bde36f75d406a5c664dbb6ed0c127e49d Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:13:21 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:13:21 2023 +0200 xen: make 'saved_cmdline' static The variable 'saved_cmdline' can be defined static, as its only uses are within the same file. This in turn avoids violating MISRA C:2012 Rule 8.4 because no declaration is present. Fixes: e6ee01ad24b6 ("xen/version: Drop compat/kernel.c") Signed-off-by: Nicola Vetrini Reviewed-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- xen/common/kernel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/kernel.c b/xen/common/kernel.c index fb919f3d9c..52aa287627 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -28,7 +28,7 @@ CHECK_feature_info; enum system_state system_state = SYS_STATE_early_boot; -xen_commandline_t saved_cmdline; +static xen_commandline_t saved_cmdline; static const char __initconst opt_builtin_cmdline[] = CONFIG_CMDLINE; static int assign_integer_param(const struct kernel_param *param, uint64_t val) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582798.912735 (Exim 4.92) (envelope-from ) id 1qUfj5-0007FH-Ht; Sat, 12 Aug 2023 03:55:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582798.912735; Sat, 12 Aug 2023 03:55:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfj5-0007F7-Eb; Sat, 12 Aug 2023 03:55:43 +0000 Received: by outflank-mailman (input) for mailman id 582798; Sat, 12 Aug 2023 03:55:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfj4-0007Em-6s for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfj4-0001ii-6B for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfj4-0000d5-4u for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=e9clr3/svSmT1BJ9hYlG09J78n9uvq9W1x/wtGS871M=; b=jF0ULivP/YtP5Kc/R7fXzyqIXv 5nQxWYt9oG3CSJy+kr1OEYcI1QlCSXblQBcLwc9woGVMs7Anc5rvciX25jVj31pjfTLd/Vtk2meoc kLw4Iv4hoNfp2XBQC5WCqgls0Syb5lJdE2iyOMo0BcFgTeHqBHALxQALAgZ5BtNdrj50=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/include: make a declaration of 'get_sec' visible where needed Message-Id: Date: Sat, 12 Aug 2023 03:55:42 +0000 commit 7b799e8ab3d3da42ed504ff9234ebc021623ac27 Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:13:58 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:13:58 2023 +0200 xen/include: make a declaration of 'get_sec' visible where needed A declaration for 'get_sec' is added in 'xen/include/xen/time.h' to be available for every call site (in particular 'cper.h'). This also resolves a violation of MISRA C:2012 Rule 8.4. Fixes: c8cb30cfc87a ("mce: Provide ERST interface") Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/include/xen/cper.h | 3 +-- xen/include/xen/time.h | 1 + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/xen/cper.h b/xen/include/xen/cper.h index 7c6a4c45ce..de8f385bdd 100644 --- a/xen/include/xen/cper.h +++ b/xen/include/xen/cper.h @@ -23,8 +23,7 @@ #include #include - -extern unsigned long get_sec(void); +#include typedef struct { uint8_t b[16]; diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index 5aafdda4f3..67c586b736 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -36,6 +36,7 @@ s_time_t get_s_time_fixed(u64 at_tick); s_time_t get_s_time(void); unsigned long get_localtime(struct domain *d); uint64_t get_localtime_us(struct domain *d); +unsigned long get_sec(void); struct tm { int tm_sec; /* seconds */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:55:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:55:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582799.912737 (Exim 4.92) (envelope-from ) id 1qUfjF-0007IS-J5; Sat, 12 Aug 2023 03:55:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582799.912737; Sat, 12 Aug 2023 03:55:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjF-0007IL-GT; Sat, 12 Aug 2023 03:55:53 +0000 Received: by outflank-mailman (input) for mailman id 582799; Sat, 12 Aug 2023 03:55:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjE-0007IA-A0 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjE-0001iq-9C for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfjE-0000dU-8M for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:55:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=XoYWoKngR3xjYoqhRddgu5gcYhZ4DOcUeo00MaiuKMg=; b=5u3YOL809uXSFVztBfdLEhgE1R X8Y/cNnPmB7rFXX72Vm8+UMboHBwdNQJB3pi+lCv8WchOquFopb+lQMMDErJ5wUbKdkSTOt/3iwyc xMauwwo+ipIDn4w3cPM02DostnafEIpLdHJ0Xzj/IZGdQVLj1DuBNhSUmS7e9+gHW9Sc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: make declarations visible before function definitions Message-Id: Date: Sat, 12 Aug 2023 03:55:52 +0000 commit baad64ad38e5ab8319a2933ce5a6f5d0f73fe041 Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:14:39 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:14:39 2023 +0200 xen/arm: make declarations visible before function definitions 'xen/hypercall.h' is included in 'xen/arch/arm/setup.c' to allow the declaration of 'arch_get_xen_caps' to be visible when defining the function. The header 'xen/delay.h' is included in 'xen/arch/arm/time.c' to allow the declaration of 'udelay' to be visible. Fixes: 7cfc339cbc2f ("arm: Implement arch_get_xen_caps") Fixes: 335ba242c55c ("arm: implement udelay()") Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/arm/setup.c | 1 + xen/arch/arm/time.c | 1 + 2 files changed, 2 insertions(+) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index bbf72b69aa..44ccea03ca 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 0b482d7db3..3535bd8ac7 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582800.912742 (Exim 4.92) (envelope-from ) id 1qUfjP-0007LE-Ks; Sat, 12 Aug 2023 03:56:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582800.912742; Sat, 12 Aug 2023 03:56:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjP-0007L7-I6; Sat, 12 Aug 2023 03:56:03 +0000 Received: by outflank-mailman (input) for mailman id 582800; Sat, 12 Aug 2023 03:56:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjO-0007Kv-Dc for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjO-0001jA-CR for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfjO-0000eL-Ba for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QBksy9Lail5CNts2b30Vqh75EiY415oUU7r/AekXFAc=; b=rFJFdJAmO/YODm1sKui+dc1jMn l2gDFuLJjfDAFxSZfrHJF/GT+XC2F/sbIIAwJTjXAZvIiY07yMRb+0HnXtBJMFJCMHUPBn94qD2AZ QvuasrY3+m8UME/CHl3L+U4HelIAcLpzXN2ZTyjosXWM/5HUUpCNfD0oJHawVopaYbNk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: make some functions and variables static rather than extern Message-Id: Date: Sat, 12 Aug 2023 03:56:02 +0000 commit 859c868de4305b803216daed32dc0c4e8286a785 Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:15:12 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:15:12 2023 +0200 x86: make some functions and variables static rather than extern The functions and variables touched by this commit can be static, as they are only used within the same unit. This in turn addresses the absence of declarations that violates MISRA C:2012 Rule 8.4. Fixes: 741367e77d6c ("mce: Clean-up mcheck_init handler") Fixes: 45f57813f646 ("x86/MCE: implement recoverscan for AMD") Fixes: 155587481e39 ("x86/microcode: Scan the initramfs payload for microcode blob") Fixes: af50dd63cf8d ("Pull nmi/traps changes from Linux 2.6.14.") Fixes: fef244b179c0 ("x86/spec-ctrl: Knobs for STIBP and PSFD, and follow hardware STIBP hint") Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/mcheck/mce.c | 2 +- xen/arch/x86/cpu/mcheck/mce_amd.c | 2 +- xen/arch/x86/cpu/microcode/core.c | 2 +- xen/arch/x86/nmi.c | 2 +- xen/arch/x86/spec_ctrl.c | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 57e1eb221e..6141b7eb9c 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -599,7 +599,7 @@ unsigned int mce_firstbank(struct cpuinfo_x86 *c) c->x86_vendor == X86_VENDOR_INTEL && c->x86_model < 0x1a; } -int show_mca_info(int inited, struct cpuinfo_x86 *c) +static int show_mca_info(int inited, struct cpuinfo_x86 *c) { static enum mcheck_type g_type = mcheck_unset; diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c index adc36522cc..72f3feeaee 100644 --- a/xen/arch/x86/cpu/mcheck/mce_amd.c +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c @@ -87,7 +87,7 @@ enum mc_ec_type { MC_EC_BUS_TYPE = 0x0800, }; -enum mc_ec_type +static enum mc_ec_type mc_ec2type(uint16_t errorcode) { if ( errorcode & MC_EC_BUS_TYPE ) diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index bec8b55db2..9fcb9c1c3a 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -149,7 +149,7 @@ static int __init cf_check parse_ucode(const char *s) } custom_param("ucode", parse_ucode); -void __init microcode_scan_module( +static void __init microcode_scan_module( unsigned long *module_map, const multiboot_info_t *mbi) { diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index c5c28300b0..104e366bd3 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -108,7 +108,7 @@ static unsigned int lapic_nmi_owner; * be enabled * -1: the lapic NMI watchdog is disabled, but can be enabled */ -int nmi_active; +static int nmi_active; #define K7_EVNTSEL_ENABLE (1 << 22) #define K7_EVNTSEL_INT (1 << 20) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index ebe56a96cd..9b8fdb5303 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -43,9 +43,9 @@ static enum ind_thunk { } opt_thunk __initdata = THUNK_DEFAULT; static int8_t __initdata opt_ibrs = -1; -int8_t __initdata opt_stibp = -1; +static int8_t __initdata opt_stibp = -1; bool __ro_after_init opt_ssbd; -int8_t __initdata opt_psfd = -1; +static int8_t __initdata opt_psfd = -1; int8_t __ro_after_init opt_ibpb_ctxt_switch = -1; int8_t __read_mostly opt_eager_fpu = -1; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582801.912748 (Exim 4.92) (envelope-from ) id 1qUfjZ-0007Ny-NO; Sat, 12 Aug 2023 03:56:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582801.912748; Sat, 12 Aug 2023 03:56:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjZ-0007Nq-K2; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hXQRW6k3Kh8Xhkw2OXZe1W/ft+OC1vvNzFO2kxmpv4k=; b=N8oiycSoaRSXdPT598ulr6hiFZ quzQ/B3FKFipBkG5QDeOwAR8uxa/2tu+wAag64bbrM92nC3PqwigSl+DlJjz4J5k90YfghWWZNRvz ZZXcGWS7tB9yYaaaARbfRJk/d0lYpbwSq0O3Gd5Toav3J+IChFHogTTdj2ZtkOzbncHM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: mm: add missing extern variable declaration Message-Id: Date: Sat, 12 Aug 2023 03:56:12 +0000 commit 24908ef3345f55b45004671e0f24ada8810f9c97 Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:15:50 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:15:50 2023 +0200 xen/arm: mm: add missing extern variable declaration Add a declaration for the variable 'init_ttbr' to resolve the violation of MISRA C:2012 Rule 8.4 present the relative source file 'mm.c'. No functional changes. Fixes: 4557c2292854 ("xen: arm: rewrite start of day page table and cpu bring up") Signed-off-by: Nicola Vetrini Reviewed-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- xen/arch/arm/include/asm/mm.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 2db8535a4c..aaacba3f04 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -165,6 +165,9 @@ struct page_info #define _PGC_need_scrub _PGC_allocated #define PGC_need_scrub PGC_allocated +/* Non-boot CPUs use this to find the correct pagetables. */ +extern uint64_t init_ttbr; + extern mfn_t directmap_mfn_start, directmap_mfn_end; extern vaddr_t directmap_virt_end; #ifdef CONFIG_ARM_64 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582802.912750 (Exim 4.92) (envelope-from ) id 1qUfjj-0007R7-Ps; Sat, 12 Aug 2023 03:56:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582802.912750; Sat, 12 Aug 2023 03:56:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjj-0007Qz-My; Sat, 12 Aug 2023 03:56:23 +0000 Received: by outflank-mailman (input) for mailman id 582802; Sat, 12 Aug 2023 03:56:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfji-0007Qo-Jx for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfji-0001ji-JH for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfji-0000fe-IR for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LvolwiK5YmXNsZyFBmkZayqShL3gfT6eOG+gF4J07nU=; b=FSRplaKW/6+AxHEwpSHNKHGIo0 3tBetOk0Ic6xO2pqe2ZOXpEEIW28NNYaF96s7ePDLnGLHPY//wraWkzdO9IIFR2bM51R9Ypzj1DcE wLX9uiVD9SgRkYERh/GJE5q1LDuMyH6QtxEhulgoOE3Q83teRmE05H82JGQ8//s04bjM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/nmi: include missing header with declarations for 'watchdog_*' Message-Id: Date: Sat, 12 Aug 2023 03:56:22 +0000 commit b70ffd23865e6c320fe2e8931f0d0366d7e03cac Author: Nicola Vetrini AuthorDate: Thu Aug 10 15:16:20 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 10 15:16:20 2023 +0200 x86/nmi: include missing header with declarations for 'watchdog_*' Include an additional header to make the declarations for functions 'watchdog_*' visible prior to their definition in the file, thereby resolving the violations of MISRA C:2012 Rule 8.4. No functional change. Fixes: c8177e691f0f ("watchdog: Move watchdog from being x86 specific to common code") Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/nmi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index 104e366bd3..dc79c25e3f 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582803.912754 (Exim 4.92) (envelope-from ) id 1qUfjt-0007Ti-RD; Sat, 12 Aug 2023 03:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582803.912754; Sat, 12 Aug 2023 03:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjt-0007Ta-OR; Sat, 12 Aug 2023 03:56:33 +0000 Received: by outflank-mailman (input) for mailman id 582803; Sat, 12 Aug 2023 03:56:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjs-0007TS-Mv for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfjs-0001jq-MF for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfjs-0000g8-LQ for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=LwHSMTUSqwVLbbpSw5yUIC0JQqTxClEftrounctoHiI=; b=DIFPf6e4KVNviUEmgkuq9pIurG FGAXRPgoiqT1l26xscNnWxr84AS3cIra9bPvOJKDtH0vhtx+8h9aLW3AqskQzff+zrrJEb7HFB9DO Axw4x7Pfd6F9hwXVasgISHC93B7Ao1uhQ4ygICugzztGa7XifgpH2Nb+MUEo5q2st8eM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] arm/efi: address MISRA C:2012 Rule 8.4 Message-Id: Date: Sat, 12 Aug 2023 03:56:32 +0000 commit f652fdd94af380baace7fb8c04fec4952cc5658b Author: Nicola Vetrini AuthorDate: Wed Aug 9 13:02:34 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 10 19:24:54 2023 -0700 arm/efi: address MISRA C:2012 Rule 8.4 the function 'fdt_add_uefi_nodes' can be defined static, as its only callers are within the same file. This in turn avoids violating Rule 8.4 because no declaration is present. No functional change. Fixes: 6d70ea10d49f ("Add ARM EFI boot support”) Signed-off-by: Nicola Vetrini Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini --- xen/arch/arm/efi/efi-boot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h index f24df2abb9..1c3640bb65 100644 --- a/xen/arch/arm/efi/efi-boot.h +++ b/xen/arch/arm/efi/efi-boot.h @@ -227,7 +227,7 @@ static EFI_STATUS __init efi_process_memory_map_bootinfo(EFI_MEMORY_DESCRIPTOR * * of the System table address, the address of the final EFI memory map, * and memory map information. */ -EFI_STATUS __init fdt_add_uefi_nodes(EFI_SYSTEM_TABLE *sys_table, +static EFI_STATUS __init fdt_add_uefi_nodes(EFI_SYSTEM_TABLE *sys_table, void *fdt, EFI_MEMORY_DESCRIPTOR *memory_map, UINTN map_size, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582804.912758 (Exim 4.92) (envelope-from ) id 1qUfk3-0007W5-T7; Sat, 12 Aug 2023 03:56:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582804.912758; Sat, 12 Aug 2023 03:56:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfk3-0007Vy-QF; Sat, 12 Aug 2023 03:56:43 +0000 Received: by outflank-mailman (input) for mailman id 582804; Sat, 12 Aug 2023 03:56:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfk2-0007Vo-Px for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfk2-0001k2-PF for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfk2-0000hI-OL for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kowULVmo4bWTTDgS9IaHnTCZwyZ0QC9ukxUE3MO8H0g=; b=QEyO7HGKQvYaA5YbbPWG+IEUea HUuwcRgjXKRVl8zvfxOrPgxhHVDNVQq70KbnYC9CZ92OHCONTeL5WAqJvTjKr550wdhQauokFC51F qbaUqkNQ/zS19e17Yqj9aC/ftjrSJ5xBvV6PfBJVB3tpF9cc3M33/xGjbnDoKtUIu2a4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: upgrade Alpine build and test artifact containers to 3.18 Message-Id: Date: Sat, 12 Aug 2023 03:56:42 +0000 commit 1e7f896de29f300f2373b47d50edcfb1173017ac Author: Stefano Stabellini AuthorDate: Wed Aug 9 18:18:02 2023 -0700 Commit: Stefano Stabellini CommitDate: Thu Aug 10 19:28:18 2023 -0700 automation: upgrade Alpine build and test artifact containers to 3.18 Alpine 3.12 is EOL. Also update the containerize script. Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- automation/build/alpine/3.12-arm64v8.dockerfile | 48 ---------------- automation/build/alpine/3.12.dockerfile | 48 ---------------- automation/build/alpine/3.18-arm64v8.dockerfile | 48 ++++++++++++++++ automation/build/alpine/3.18.dockerfile | 48 ++++++++++++++++ automation/scripts/containerize | 4 +- .../tests-artifacts/alpine/3.12-arm64v8.dockerfile | 66 --------------------- automation/tests-artifacts/alpine/3.12.dockerfile | 67 ---------------------- .../tests-artifacts/alpine/3.18-arm64v8.dockerfile | 66 +++++++++++++++++++++ automation/tests-artifacts/alpine/3.18.dockerfile | 67 ++++++++++++++++++++++ 9 files changed, 231 insertions(+), 231 deletions(-) diff --git a/automation/build/alpine/3.12-arm64v8.dockerfile b/automation/build/alpine/3.12-arm64v8.dockerfile deleted file mode 100644 index 1be3bf7805..0000000000 --- a/automation/build/alpine/3.12-arm64v8.dockerfile +++ /dev/null @@ -1,48 +0,0 @@ -FROM arm64v8/alpine:3.12 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apk --no-cache add \ - \ - # xen build deps - argp-standalone \ - autoconf \ - bash \ - bison \ - curl \ - dev86 \ - dtc-dev \ - flex \ - gcc \ - git \ - iasl \ - libaio-dev \ - libfdt \ - linux-headers \ - make \ - musl-dev \ - ncurses-dev \ - ocaml \ - ocaml-findlib \ - patch \ - python3-dev \ - texinfo \ - util-linux-dev \ - xz-dev \ - yajl-dev \ - zlib-dev \ - \ - # qemu build deps - glib-dev \ - libattr \ - libcap-ng-dev \ - pixman-dev \ - # qubes test deps - openssh-client \ - fakeroot \ diff --git a/automation/build/alpine/3.12.dockerfile b/automation/build/alpine/3.12.dockerfile deleted file mode 100644 index 72ad3a07ad..0000000000 --- a/automation/build/alpine/3.12.dockerfile +++ /dev/null @@ -1,48 +0,0 @@ -FROM alpine:3.12 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apk --no-cache add \ - \ - # xen build deps - argp-standalone \ - autoconf \ - bash \ - bison \ - clang \ - curl \ - dev86 \ - flex \ - g++ \ - gcc \ - git \ - grep \ - iasl \ - libaio-dev \ - libc6-compat \ - linux-headers \ - make \ - musl-dev \ - ncurses-dev \ - ocaml \ - ocaml-findlib \ - patch \ - python3-dev \ - texinfo \ - util-linux-dev \ - xz-dev \ - yajl-dev \ - zlib-dev \ - \ - # qemu build deps - glib-dev \ - libattr \ - libcap-ng-dev \ - ninja \ - pixman-dev \ diff --git a/automation/build/alpine/3.18-arm64v8.dockerfile b/automation/build/alpine/3.18-arm64v8.dockerfile new file mode 100644 index 0000000000..ce198f7d04 --- /dev/null +++ b/automation/build/alpine/3.18-arm64v8.dockerfile @@ -0,0 +1,48 @@ +FROM arm64v8/alpine:3.18 +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV USER root + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apk --no-cache add \ + \ + # xen build deps + argp-standalone \ + autoconf \ + bash \ + bison \ + curl \ + dev86 \ + dtc-dev \ + flex \ + gcc \ + git \ + iasl \ + libaio-dev \ + libfdt \ + linux-headers \ + make \ + musl-dev \ + ncurses-dev \ + ocaml \ + ocaml-findlib \ + patch \ + python3-dev \ + texinfo \ + util-linux-dev \ + xz-dev \ + yajl-dev \ + zlib-dev \ + \ + # qemu build deps + glib-dev \ + libattr \ + libcap-ng-dev \ + pixman-dev \ + # qubes test deps + openssh-client \ + fakeroot \ diff --git a/automation/build/alpine/3.18.dockerfile b/automation/build/alpine/3.18.dockerfile new file mode 100644 index 0000000000..ca5756955e --- /dev/null +++ b/automation/build/alpine/3.18.dockerfile @@ -0,0 +1,48 @@ +FROM alpine:3.18 +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV USER root + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apk --no-cache add \ + \ + # xen build deps + argp-standalone \ + autoconf \ + bash \ + bison \ + clang \ + curl \ + dev86 \ + flex \ + g++ \ + gcc \ + git \ + grep \ + iasl \ + libaio-dev \ + libc6-compat \ + linux-headers \ + make \ + musl-dev \ + ncurses-dev \ + ocaml \ + ocaml-findlib \ + patch \ + python3-dev \ + texinfo \ + util-linux-dev \ + xz-dev \ + yajl-dev \ + zlib-dev \ + \ + # qemu build deps + glib-dev \ + libattr \ + libcap-ng-dev \ + ninja \ + pixman-dev \ diff --git a/automation/scripts/containerize b/automation/scripts/containerize index 6d46f63665..16d480ab75 100755 --- a/automation/scripts/containerize +++ b/automation/scripts/containerize @@ -24,8 +24,8 @@ die() { # BASE="registry.gitlab.com/xen-project/xen" case "_${CONTAINER}" in - _alpine) CONTAINER="${BASE}/alpine:3.12" ;; - _alpine-arm64v8) CONTAINER="${BASE}/alpine:3.12-arm64v8" ;; + _alpine) CONTAINER="${BASE}/alpine:3.18" ;; + _alpine-arm64v8) CONTAINER="${BASE}/alpine:3.18-arm64v8" ;; _archlinux|_arch) CONTAINER="${BASE}/archlinux:current" ;; _riscv64) CONTAINER="${BASE}/archlinux:current-riscv64" ;; _centos7) CONTAINER="${BASE}/centos:7" ;; diff --git a/automation/tests-artifacts/alpine/3.12-arm64v8.dockerfile b/automation/tests-artifacts/alpine/3.12-arm64v8.dockerfile deleted file mode 100644 index cb8e9e59bb..0000000000 --- a/automation/tests-artifacts/alpine/3.12-arm64v8.dockerfile +++ /dev/null @@ -1,66 +0,0 @@ -FROM arm64v8/alpine:3.12 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV USER root - -RUN mkdir /build -WORKDIR /build - -RUN \ - # apk - apk update && \ - \ - # xen runtime deps - apk add musl && \ - apk add openrc && \ - apk add busybox && \ - apk add sudo && \ - apk add dbus && \ - apk add bash && \ - apk add python2 && \ - apk add zlib && \ - apk add ncurses && \ - apk add texinfo && \ - apk add yajl && \ - apk add libaio && \ - apk add xz-dev && \ - apk add util-linux && \ - apk add argp-standalone && \ - apk add libfdt && \ - apk add glib && \ - apk add pixman && \ - apk add curl && \ - apk add udev && \ - \ - # Xen - cd / && \ - # Minimal ramdisk environment in case of cpio output - rc-update add udev && \ - rc-update add udev-trigger && \ - rc-update add udev-settle && \ - rc-update add networking sysinit && \ - rc-update add loopback sysinit && \ - rc-update add bootmisc boot && \ - rc-update add devfs sysinit && \ - rc-update add dmesg sysinit && \ - rc-update add hostname boot && \ - rc-update add hwclock boot && \ - rc-update add hwdrivers sysinit && \ - rc-update add killprocs shutdown && \ - rc-update add modloop sysinit && \ - rc-update add modules boot && \ - rc-update add mount-ro shutdown && \ - rc-update add savecache shutdown && \ - rc-update add sysctl boot && \ - rc-update add local default && \ - cp -a /sbin/init /init && \ - echo "ttyS0" >> /etc/securetty && \ - echo "hvc0" >> /etc/securetty && \ - echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \ - echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \ - passwd -d "root" root && \ - \ - # Create rootfs - cd / && \ - tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var diff --git a/automation/tests-artifacts/alpine/3.12.dockerfile b/automation/tests-artifacts/alpine/3.12.dockerfile deleted file mode 100644 index 073f16a0d7..0000000000 --- a/automation/tests-artifacts/alpine/3.12.dockerfile +++ /dev/null @@ -1,67 +0,0 @@ -FROM alpine:3.12 -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV USER root - -RUN mkdir /build -WORKDIR /build - -RUN \ - # apk - apk update && \ - \ - # xen runtime deps - apk add musl && \ - apk add libgcc && \ - apk add openrc && \ - apk add busybox && \ - apk add sudo && \ - apk add dbus && \ - apk add bash && \ - apk add python2 && \ - apk add zlib && \ - apk add ncurses && \ - apk add texinfo && \ - apk add yajl && \ - apk add libaio && \ - apk add xz-dev && \ - apk add util-linux && \ - apk add argp-standalone && \ - apk add libfdt && \ - apk add glib && \ - apk add pixman && \ - apk add curl && \ - apk add udev && \ - \ - # Xen - cd / && \ - # Minimal ramdisk environment in case of cpio output - rc-update add udev && \ - rc-update add udev-trigger && \ - rc-update add udev-settle && \ - rc-update add networking sysinit && \ - rc-update add loopback sysinit && \ - rc-update add bootmisc boot && \ - rc-update add devfs sysinit && \ - rc-update add dmesg sysinit && \ - rc-update add hostname boot && \ - rc-update add hwclock boot && \ - rc-update add hwdrivers sysinit && \ - rc-update add killprocs shutdown && \ - rc-update add modloop sysinit && \ - rc-update add modules boot && \ - rc-update add mount-ro shutdown && \ - rc-update add savecache shutdown && \ - rc-update add sysctl boot && \ - rc-update add local default && \ - cp -a /sbin/init /init && \ - echo "ttyS0" >> /etc/securetty && \ - echo "hvc0" >> /etc/securetty && \ - echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \ - echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \ - passwd -d "root" root && \ - \ - # Create rootfs - cd / && \ - tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var diff --git a/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile b/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile new file mode 100644 index 0000000000..cbd96d9bc6 --- /dev/null +++ b/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile @@ -0,0 +1,66 @@ +FROM arm64v8/alpine:3.18 +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV USER root + +RUN mkdir /build +WORKDIR /build + +RUN \ + # apk + apk update && \ + \ + # xen runtime deps + apk add musl && \ + apk add openrc && \ + apk add busybox && \ + apk add sudo && \ + apk add dbus && \ + apk add bash && \ + apk add python3 && \ + apk add zlib && \ + apk add ncurses && \ + apk add texinfo && \ + apk add yajl && \ + apk add libaio && \ + apk add xz-dev && \ + apk add util-linux && \ + apk add argp-standalone && \ + apk add libfdt && \ + apk add glib && \ + apk add pixman && \ + apk add curl && \ + apk add udev && \ + \ + # Xen + cd / && \ + # Minimal ramdisk environment in case of cpio output + rc-update add udev && \ + rc-update add udev-trigger && \ + rc-update add udev-settle && \ + rc-update add networking sysinit && \ + rc-update add loopback sysinit && \ + rc-update add bootmisc boot && \ + rc-update add devfs sysinit && \ + rc-update add dmesg sysinit && \ + rc-update add hostname boot && \ + rc-update add hwclock boot && \ + rc-update add hwdrivers sysinit && \ + rc-update add killprocs shutdown && \ + rc-update add modloop sysinit && \ + rc-update add modules boot && \ + rc-update add mount-ro shutdown && \ + rc-update add savecache shutdown && \ + rc-update add sysctl boot && \ + rc-update add local default && \ + cp -a /sbin/init /init && \ + echo "ttyS0" >> /etc/securetty && \ + echo "hvc0" >> /etc/securetty && \ + echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \ + echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \ + passwd -d "root" root && \ + \ + # Create rootfs + cd / && \ + tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var diff --git a/automation/tests-artifacts/alpine/3.18.dockerfile b/automation/tests-artifacts/alpine/3.18.dockerfile new file mode 100644 index 0000000000..32aa8e1778 --- /dev/null +++ b/automation/tests-artifacts/alpine/3.18.dockerfile @@ -0,0 +1,67 @@ +FROM alpine:3.18 +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV USER root + +RUN mkdir /build +WORKDIR /build + +RUN \ + # apk + apk update && \ + \ + # xen runtime deps + apk add musl && \ + apk add libgcc && \ + apk add openrc && \ + apk add busybox && \ + apk add sudo && \ + apk add dbus && \ + apk add bash && \ + apk add python3 && \ + apk add zlib && \ + apk add ncurses && \ + apk add texinfo && \ + apk add yajl && \ + apk add libaio && \ + apk add xz-dev && \ + apk add util-linux && \ + apk add argp-standalone && \ + apk add libfdt && \ + apk add glib && \ + apk add pixman && \ + apk add curl && \ + apk add udev && \ + \ + # Xen + cd / && \ + # Minimal ramdisk environment in case of cpio output + rc-update add udev && \ + rc-update add udev-trigger && \ + rc-update add udev-settle && \ + rc-update add networking sysinit && \ + rc-update add loopback sysinit && \ + rc-update add bootmisc boot && \ + rc-update add devfs sysinit && \ + rc-update add dmesg sysinit && \ + rc-update add hostname boot && \ + rc-update add hwclock boot && \ + rc-update add hwdrivers sysinit && \ + rc-update add killprocs shutdown && \ + rc-update add modloop sysinit && \ + rc-update add modules boot && \ + rc-update add mount-ro shutdown && \ + rc-update add savecache shutdown && \ + rc-update add sysctl boot && \ + rc-update add local default && \ + cp -a /sbin/init /init && \ + echo "ttyS0" >> /etc/securetty && \ + echo "hvc0" >> /etc/securetty && \ + echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \ + echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \ + passwd -d "root" root && \ + \ + # Create rootfs + cd / && \ + tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:56:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:56:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582805.912762 (Exim 4.92) (envelope-from ) id 1qUfkD-0007Yv-V8; Sat, 12 Aug 2023 03:56:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582805.912762; Sat, 12 Aug 2023 03:56:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkD-0007Yo-S9; Sat, 12 Aug 2023 03:56:53 +0000 Received: by outflank-mailman (input) for mailman id 582805; Sat, 12 Aug 2023 03:56:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkC-0007Yg-TD for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkC-0001kD-SQ for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfkC-0000iR-RO for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:56:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=5SnABAGuAFe5OTHW57N6WD0AR5T2TDhuh84e1p2m/7M=; b=2PDb/j0yZumHS/CPznqp5Zfi+o 1du023DmGplbvVsTxmyyzK+3S2umQf0AKq7Uw++OHV/Qu2460MLQCFKGNJJ46hipvpxYquEgO9y47 u6Ak3D4cXjjBHzrROGs/NSUGh2uoXIzKyF6YCLIcp6jpKN7OsxIJ16tNkR2lPMZgnjWw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: use Alpine 3.18 instead of 3.12 for all gitlab jobs Message-Id: Date: Sat, 12 Aug 2023 03:56:52 +0000 commit 6f9029cf8f5164ea9f375fe801cc62be1472ed74 Author: Stefano Stabellini AuthorDate: Wed Aug 9 18:18:03 2023 -0700 Commit: Stefano Stabellini CommitDate: Thu Aug 10 19:28:18 2023 -0700 automation: use Alpine 3.18 instead of 3.12 for all gitlab jobs Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- automation/gitlab-ci/build.yaml | 64 ++++++++++++++++++++--------------------- automation/gitlab-ci/test.yaml | 56 ++++++++++++++++++------------------ 2 files changed, 60 insertions(+), 60 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index af64a53ead..173613567c 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -273,9 +273,9 @@ # Arm test artifacts -alpine-3.12-arm64-rootfs-export: +alpine-3.18-arm64-rootfs-export: extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.12-arm64v8 + image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.18-arm64v8 script: - mkdir binaries && cp /initrd.tar.gz binaries/initrd.tar.gz artifacts: @@ -319,9 +319,9 @@ qemu-system-aarch64-6.0.0-arm32-export: # x86_64 test artifacts -alpine-3.12-rootfs-export: +alpine-3.18-rootfs-export: extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.12 + image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.18 script: - mkdir binaries && cp /initrd.tar.gz binaries/initrd.tar.gz artifacts: @@ -345,15 +345,15 @@ kernel-6.1.19-export: # Build jobs needed for tests -alpine-3.12-gcc: +alpine-3.18-gcc: extends: .gcc-x86-64-build variables: - CONTAINER: alpine:3.12 + CONTAINER: alpine:3.18 -alpine-3.12-gcc-debug: +alpine-3.18-gcc-debug: extends: .gcc-x86-64-build-debug variables: - CONTAINER: alpine:3.12 + CONTAINER: alpine:3.18 debian-stretch-gcc-debug: extends: .gcc-x86-64-build-debug @@ -437,78 +437,78 @@ debian-unstable-gcc-debug-arm64-randconfig: CONTAINER: debian:unstable-arm64v8 RANDCONFIG: y -alpine-3.12-gcc-arm64: +alpine-3.18-gcc-arm64: extends: .gcc-arm64-build variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 -alpine-3.12-gcc-debug-arm64: +alpine-3.18-gcc-debug-arm64: extends: .gcc-arm64-build-debug variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 -alpine-3.12-gcc-arm64-randconfig: +alpine-3.18-gcc-arm64-randconfig: extends: .gcc-arm64-build variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 RANDCONFIG: y -alpine-3.12-gcc-debug-arm64-randconfig: +alpine-3.18-gcc-debug-arm64-randconfig: extends: .gcc-arm64-build-debug variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 RANDCONFIG: y -alpine-3.12-gcc-arm64-staticmem: +alpine-3.18-gcc-arm64-staticmem: extends: .gcc-arm64-build variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_EXPERT=y CONFIG_UNSUPPORTED=y CONFIG_STATIC_MEMORY=y -alpine-3.12-gcc-debug-arm64-staticmem: +alpine-3.18-gcc-debug-arm64-staticmem: extends: .gcc-arm64-build-debug variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_EXPERT=y CONFIG_UNSUPPORTED=y CONFIG_STATIC_MEMORY=y -alpine-3.12-gcc-arm64-static-shared-mem: +alpine-3.18-gcc-arm64-static-shared-mem: extends: .gcc-arm64-build variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_UNSUPPORTED=y CONFIG_STATIC_MEMORY=y CONFIG_STATIC_SHM=y -alpine-3.12-gcc-debug-arm64-static-shared-mem: +alpine-3.18-gcc-debug-arm64-static-shared-mem: extends: .gcc-arm64-build-debug variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_UNSUPPORTED=y CONFIG_STATIC_MEMORY=y CONFIG_STATIC_SHM=y -alpine-3.12-gcc-arm64-boot-cpupools: +alpine-3.18-gcc-arm64-boot-cpupools: extends: .gcc-arm64-build variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_EXPERT=y CONFIG_UNSUPPORTED=y CONFIG_SCHED_NULL=y CONFIG_BOOT_TIME_CPUPOOLS=y -alpine-3.12-gcc-debug-arm64-boot-cpupools: +alpine-3.18-gcc-debug-arm64-boot-cpupools: extends: .gcc-arm64-build-debug variables: - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 EXTRA_XEN_CONFIG: | CONFIG_BOOT_TIME_CPUPOOLS=y @@ -622,15 +622,15 @@ debian-unstable-gcc-arm64-cppcheck: # Build jobs not needed for tests -alpine-3.12-clang: +alpine-3.18-clang: extends: .clang-x86-64-build variables: - CONTAINER: alpine:3.12 + CONTAINER: alpine:3.18 -alpine-3.12-clang-debug: +alpine-3.18-clang-debug: extends: .clang-x86-64-build-debug variables: - CONTAINER: alpine:3.12 + CONTAINER: alpine:3.18 archlinux-gcc: extends: .gcc-x86-64-build diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 45e8ddb7a3..8ccce1fe26 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -8,7 +8,7 @@ - /^stable-.*/ .arm64-test-needs: &arm64-test-needs - - alpine-3.12-arm64-rootfs-export + - alpine-3.18-arm64-rootfs-export - kernel-5.19-arm64-export - qemu-system-aarch64-6.0.0-arm64-export @@ -16,7 +16,7 @@ - qemu-system-aarch64-6.0.0-arm32-export .x86-64-test-needs: &x86-64-test-needs - - alpine-3.12-rootfs-export + - alpine-3.18-rootfs-export - kernel-6.1.19-export .qemu-arm64: @@ -105,7 +105,7 @@ extends: .test-jobs-common variables: # the test controller runs on RPi4 - CONTAINER: alpine:3.12-arm64v8 + CONTAINER: alpine:3.18-arm64v8 LOGFILE: smoke-test.log PCIDEV: "03:00.0" PCIDEV_INTR: "MSI-X" @@ -155,7 +155,7 @@ xilinx-smoke-dom0less-arm64-gcc: - ./automation/scripts/xilinx-smoke-dom0less-arm64.sh 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 xilinx-smoke-dom0less-arm64-gcc-gem-passthrough: extends: .xilinx-arm64 @@ -163,7 +163,7 @@ xilinx-smoke-dom0less-arm64-gcc-gem-passthrough: - ./automation/scripts/xilinx-smoke-dom0less-arm64.sh gem-passthrough 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 adl-smoke-x86-64-gcc-debug: extends: .adl-x86-64 @@ -171,7 +171,7 @@ adl-smoke-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug adl-smoke-x86-64-dom0pvh-gcc-debug: extends: .adl-x86-64 @@ -179,7 +179,7 @@ adl-smoke-x86-64-dom0pvh-gcc-debug: - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug adl-suspend-x86-64-gcc-debug: extends: .adl-x86-64 @@ -187,7 +187,7 @@ adl-suspend-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh s3 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug adl-pci-pv-x86-64-gcc-debug: extends: .adl-x86-64 @@ -195,7 +195,7 @@ adl-pci-pv-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh pci-pv 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug adl-pci-hvm-x86-64-gcc-debug: extends: .adl-x86-64 @@ -205,7 +205,7 @@ adl-pci-hvm-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug zen3p-smoke-x86-64-gcc-debug: extends: .zen3p-x86-64 @@ -213,7 +213,7 @@ zen3p-smoke-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug zen3p-smoke-x86-64-dom0pvh-gcc-debug: extends: .zen3p-x86-64 @@ -221,7 +221,7 @@ zen3p-smoke-x86-64-dom0pvh-gcc-debug: - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug zen3p-pci-hvm-x86-64-gcc-debug: extends: .zen3p-x86-64 @@ -229,7 +229,7 @@ zen3p-pci-hvm-x86-64-gcc-debug: - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc-debug + - alpine-3.18-gcc-debug qemu-smoke-dom0-arm64-gcc: extends: .qemu-arm64 @@ -237,7 +237,7 @@ qemu-smoke-dom0-arm64-gcc: - ./automation/scripts/qemu-smoke-dom0-arm64.sh 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 qemu-smoke-dom0-arm64-gcc-debug: extends: .qemu-arm64 @@ -245,7 +245,7 @@ qemu-smoke-dom0-arm64-gcc-debug: - ./automation/scripts/qemu-smoke-dom0-arm64.sh 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64 + - alpine-3.18-gcc-debug-arm64 qemu-smoke-dom0less-arm64-gcc: extends: .qemu-arm64 @@ -253,7 +253,7 @@ qemu-smoke-dom0less-arm64-gcc: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 qemu-smoke-dom0less-arm64-gcc-debug: extends: .qemu-arm64 @@ -261,7 +261,7 @@ qemu-smoke-dom0less-arm64-gcc-debug: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64 + - alpine-3.18-gcc-debug-arm64 qemu-smoke-dom0less-arm64-gcc-staticmem: extends: .qemu-arm64 @@ -269,7 +269,7 @@ qemu-smoke-dom0less-arm64-gcc-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64-staticmem + - alpine-3.18-gcc-arm64-staticmem qemu-smoke-dom0less-arm64-gcc-debug-staticmem: extends: .qemu-arm64 @@ -277,7 +277,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64-staticmem + - alpine-3.18-gcc-debug-arm64-staticmem qemu-smoke-dom0less-arm64-gcc-staticheap: extends: .qemu-arm64 @@ -285,7 +285,7 @@ qemu-smoke-dom0less-arm64-gcc-staticheap: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-heap 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 qemu-smoke-dom0less-arm64-gcc-debug-staticheap: extends: .qemu-arm64 @@ -293,7 +293,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-staticheap: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-heap 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64 + - alpine-3.18-gcc-debug-arm64 qemu-smoke-dom0less-arm64-gcc-static-shared-mem: extends: .qemu-arm64 @@ -301,7 +301,7 @@ qemu-smoke-dom0less-arm64-gcc-static-shared-mem: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-shared-mem 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64-static-shared-mem + - alpine-3.18-gcc-arm64-static-shared-mem qemu-smoke-dom0less-arm64-gcc-debug-static-shared-mem: extends: .qemu-arm64 @@ -309,7 +309,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-static-shared-mem: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh static-shared-mem 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64-static-shared-mem + - alpine-3.18-gcc-debug-arm64-static-shared-mem qemu-smoke-dom0less-arm64-gcc-boot-cpupools: extends: .qemu-arm64 @@ -317,7 +317,7 @@ qemu-smoke-dom0less-arm64-gcc-boot-cpupools: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh boot-cpupools 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-arm64-boot-cpupools + - alpine-3.18-gcc-arm64-boot-cpupools qemu-smoke-dom0less-arm64-gcc-debug-boot-cpupools: extends: .qemu-arm64 @@ -325,14 +325,14 @@ qemu-smoke-dom0less-arm64-gcc-debug-boot-cpupools: - ./automation/scripts/qemu-smoke-dom0less-arm64.sh boot-cpupools 2>&1 | tee ${LOGFILE} needs: - *arm64-test-needs - - alpine-3.12-gcc-debug-arm64-boot-cpupools + - alpine-3.18-gcc-debug-arm64-boot-cpupools qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: extends: .qemu-arm64 script: - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1 | tee ${LOGFILE} needs: - - alpine-3.12-gcc-arm64 + - alpine-3.18-gcc-arm64 - qemu-system-aarch64-6.0.0-arm64-export qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: @@ -340,7 +340,7 @@ qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: script: - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1 | tee ${LOGFILE} needs: - - alpine-3.12-gcc-debug-arm64 + - alpine-3.18-gcc-debug-arm64 - qemu-system-aarch64-6.0.0-arm64-export qemu-smoke-dom0-arm32-gcc: @@ -421,7 +421,7 @@ qemu-alpine-x86_64-gcc: - ./automation/scripts/qemu-alpine-x86_64.sh 2>&1 | tee ${LOGFILE} needs: - *x86-64-test-needs - - alpine-3.12-gcc + - alpine-3.18-gcc qemu-smoke-x86-64-gcc: extends: .qemu-x86-64 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:57:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:57:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582806.912766 (Exim 4.92) (envelope-from ) id 1qUfkO-0007ch-2E; Sat, 12 Aug 2023 03:57:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582806.912766; Sat, 12 Aug 2023 03:57:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkN-0007cZ-Vl; Sat, 12 Aug 2023 03:57:03 +0000 Received: by outflank-mailman (input) for mailman id 582806; Sat, 12 Aug 2023 03:57:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkN-0007cP-0C for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkM-0001kY-Ve for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfkM-0000iz-Un for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=fu7pGzw7rqWMQX49SLxUfzolCdhuhTdPGQPKkyIOEAE=; b=0l9rCZW8IzDEKnrc6MZfhrtN89 M2OChHigdhM9DtAuvYNwfDQIDc+gpWyt7stu8T40fpA55t5KXxqJvW5JE4h9mrB76Y0uMpt2Z7tX2 Wb7qcDmUUPAiEdhPxNs9rKrzkd9oMZkhqTNi2lAw5VrHU0tXMaBU60/cfvDXsL27hAqs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Fix initrd placeholders generation in make_chosen_node() Message-Id: Date: Sat, 12 Aug 2023 03:57:02 +0000 commit ac547f0bedca85525b7dccc7acfbd58916407ccf Author: Michal Orzel AuthorDate: Thu Aug 10 13:25:43 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 10 19:29:02 2023 -0700 xen/arm: Fix initrd placeholders generation in make_chosen_node() When booting a dom0less domU without initial ramdisk, it was observed that Xen still creates empty linux,initrd-{start,end} properties under /chosen node. This is because in make_chosen_node(), generation of initrd placeholders (later on filled with the real values) is protected with a check for presence of kernel bootmodule (always present) instead of initrd bootmodule. Fix it along with renaming the variable from "mod" to "initrd" to prevent similar mistakes in the future. Fixes: 48f4bf6bdeb4 ("arm/acpi: Create min DT stub for Dom0") Signed-off-by: Michal Orzel Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini --- xen/arch/arm/domain_build.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 39b4ee03a5..c6881de8bd 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2256,7 +2256,7 @@ int __init make_chosen_node(const struct kernel_info *kinfo) { int res; const char *bootargs = NULL; - const struct bootmodule *mod = kinfo->kernel_bootmodule; + const struct bootmodule *initrd = kinfo->initrd_bootmodule; void *fdt = kinfo->fdt; dt_dprintk("Create chosen node\n"); @@ -2276,7 +2276,7 @@ int __init make_chosen_node(const struct kernel_info *kinfo) * If the bootloader provides an initrd, we must create a placeholder * for the initrd properties. The values will be replaced later. */ - if ( mod && mod->size ) + if ( initrd && initrd->size ) { u64 a = 0; res = fdt_property(kinfo->fdt, "linux,initrd-start", &a, sizeof(a)); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 03:57:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 03:57:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582807.912769 (Exim 4.92) (envelope-from ) id 1qUfkY-0007fR-49; Sat, 12 Aug 2023 03:57:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582807.912769; Sat, 12 Aug 2023 03:57:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkY-0007fJ-1I; Sat, 12 Aug 2023 03:57:14 +0000 Received: by outflank-mailman (input) for mailman id 582807; Sat, 12 Aug 2023 03:57:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkX-0007f8-32 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUfkX-0001kg-2O for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUfkX-0000jQ-1e for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 03:57:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=wdmbJ9YxevNss+gHjEa1wG3Uo77Sk3Q0f5iJdcIqC58=; b=oXwWQ0yNv4XuuOh7D9by3zXaZV EgxHX3LiGDmyMWQ2ee6r0DnisRbGYI43bt++q5ri8wBAoDlLP4AbHdw6Ih4lM7Jh6RJB6xUF4KmuQ Kjqa2bVijAe2HVkoOIWgYRslVtftEVBgY8dZernGU27666WHvespH0i3aMo79yoadJKU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: Skip inclusion of domU nodes into hwdom dt /chosen node Message-Id: Date: Sat, 12 Aug 2023 03:57:13 +0000 commit c6bda36af0b992d5d2042efd6cc36592fb037a1d Author: Michal Orzel AuthorDate: Thu Aug 10 13:25:44 2023 +0200 Commit: Stefano Stabellini CommitDate: Thu Aug 10 19:29:02 2023 -0700 xen/arm: Skip inclusion of domU nodes into hwdom dt /chosen node Configuration for dom0less domUs is stored under /chosen/ nodes present in the host device tree provided to Xen. All the properties and sub nodes there are meant only for Xen. However, at the moment we still copy them (except for modules that we skip) into hardware domain /chosen node. Fix it by adding "xen,domain" compatible into the list of nodes to skip in handle_node(). Signed-off-by: Michal Orzel Reviewed-by: Luca Fancellu Acked-by: Stefano Stabellini --- xen/arch/arm/domain_build.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index c6881de8bd..54bf5623c8 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2592,6 +2592,7 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, { static const struct dt_device_match skip_matches[] __initconst = { + DT_MATCH_COMPATIBLE("xen,domain"), DT_MATCH_COMPATIBLE("xen,xen"), DT_MATCH_COMPATIBLE("xen,multiboot-module"), DT_MATCH_COMPATIBLE("multiboot,module"), -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 22:33:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 22:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582945.912946 (Exim 4.92) (envelope-from ) id 1qUxAO-0000EF-4f; Sat, 12 Aug 2023 22:33:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582945.912946; Sat, 12 Aug 2023 22:33:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAO-0000E7-1u; Sat, 12 Aug 2023 22:33:04 +0000 Received: by outflank-mailman (input) for mailman id 582945; Sat, 12 Aug 2023 22:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAM-0000Dy-7p for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAM-0002xM-73 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUxAM-0007l6-5t for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=asVbXAkSUJz6dFEqfRy01Wmpihlv8iIXbNc5FVvjTxg=; b=0Hq1241JA4nJmHVCj1myIehz+C tdRj4IUTUzKBODD1F5yj8wNeSQsDH1aYlnhW0riC1BmvZCWlNH/Aqex4VkAakgJYHK/qYPhBDr32Q WpKWgXiyvmR5zZKfEvm7d+1K2fk0axNHGipvBl6xiq9N5ThhpB7uwqoaugcLpPrts4nA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/vmsi: rename variables to address MISRA C:2012 Rule 5.3 Message-Id: Date: Sat, 12 Aug 2023 22:33:02 +0000 commit 166eb670e6f44b03b79e5751fcd0576553634150 Author: Nicola Vetrini AuthorDate: Fri Aug 11 09:58:42 2023 +0200 Commit: Jan Beulich CommitDate: Fri Aug 11 09:58:42 2023 +0200 x86/vmsi: rename variables to address MISRA C:2012 Rule 5.3 The local variables 'irq_desc' shadow the homonymous global variable, declared in 'xen/arch/x86/include/asm/irq.h', therefore they are renamed 'irqd'. Signed-off-by: Nicola Vetrini Reviewed-by: Jan Beulich --- xen/arch/x86/hvm/vmsi.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 3cd4923060..128f236362 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -462,7 +462,7 @@ static void del_msixtbl_entry(struct msixtbl_entry *entry) int msixtbl_pt_register(struct domain *d, struct pirq *pirq, uint64_t gtable) { - struct irq_desc *irq_desc; + struct irq_desc *irqd; struct msi_desc *msi_desc; struct pci_dev *pdev; struct msixtbl_entry *entry, *new_entry; @@ -482,14 +482,14 @@ int msixtbl_pt_register(struct domain *d, struct pirq *pirq, uint64_t gtable) if ( !new_entry ) return -ENOMEM; - irq_desc = pirq_spin_lock_irq_desc(pirq, NULL); - if ( !irq_desc ) + irqd = pirq_spin_lock_irq_desc(pirq, NULL); + if ( !irqd ) { xfree(new_entry); return r; } - msi_desc = irq_desc->msi_desc; + msi_desc = irqd->msi_desc; if ( !msi_desc ) goto out; @@ -508,7 +508,7 @@ found: r = 0; out: - spin_unlock_irq(&irq_desc->lock); + spin_unlock_irq(&irqd->lock); xfree(new_entry); if ( !r ) @@ -533,7 +533,7 @@ out: void msixtbl_pt_unregister(struct domain *d, struct pirq *pirq) { - struct irq_desc *irq_desc; + struct irq_desc *irqd; struct msi_desc *msi_desc; struct pci_dev *pdev; struct msixtbl_entry *entry; @@ -544,11 +544,11 @@ void msixtbl_pt_unregister(struct domain *d, struct pirq *pirq) if ( !msixtbl_initialised(d) ) return; - irq_desc = pirq_spin_lock_irq_desc(pirq, NULL); - if ( !irq_desc ) + irqd = pirq_spin_lock_irq_desc(pirq, NULL); + if ( !irqd ) return; - msi_desc = irq_desc->msi_desc; + msi_desc = irqd->msi_desc; if ( !msi_desc ) goto out; @@ -559,14 +559,14 @@ void msixtbl_pt_unregister(struct domain *d, struct pirq *pirq) goto found; out: - spin_unlock_irq(&irq_desc->lock); + spin_unlock_irq(&irqd->lock); return; found: if ( !atomic_dec_and_test(&entry->refcnt) ) del_msixtbl_entry(entry); - spin_unlock_irq(&irq_desc->lock); + spin_unlock_irq(&irqd->lock); } void msixtbl_init(struct domain *d) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 12 22:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 12 Aug 2023 22:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.582946.912950 (Exim 4.92) (envelope-from ) id 1qUxAX-0000GZ-6C; Sat, 12 Aug 2023 22:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 582946.912950; Sat, 12 Aug 2023 22:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAX-0000GS-3P; Sat, 12 Aug 2023 22:33:13 +0000 Received: by outflank-mailman (input) for mailman id 582946; Sat, 12 Aug 2023 22:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAW-0000GH-At for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qUxAW-0002xR-A8 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qUxAW-0007lb-99 for xen-changelog@lists.xenproject.org; Sat, 12 Aug 2023 22:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=9s7TN3mbYoKZhXokgqk9ojREaIUjmGmTdWV5VFdos+c=; b=FVihbhZuMDhkHonq1Hw7soToIE 8IjXUsx4WW1WtRH7uX11/lSb60huMGfu10g8GQKHvyJf+OHp6vsdLnowxAf8JOnIP39p2UnwOhqkx da+46z57lQQ68ZHKy+7Rlj5+swBJPsuu00Ya5sJsuBJhMVORcvAYxHz5ybOS4T+yDFXo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: adjust comparison for earlier signedness change Message-Id: Date: Sat, 12 Aug 2023 22:33:12 +0000 commit a9a3b432a87b27e4debd6f80f14e2cfc9f52218c Author: Jan Beulich AuthorDate: Fri Aug 11 09:59:49 2023 +0200 Commit: Jan Beulich CommitDate: Fri Aug 11 09:59:49 2023 +0200 x86: adjust comparison for earlier signedness change Interestingly only Clang warns about the now bogus less-than-zero comparison. Convert it to something that's more explicitly doing what the comment says. Fixes: 4086857cc159 ("x86: implement cpuid() in terms of cpuid_count()") Signed-off-by: Jan Beulich Reviewed-by: Juergen Gross --- xen/arch/x86/cpu/intel_cacheinfo.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/intel_cacheinfo.c b/xen/arch/x86/cpu/intel_cacheinfo.c index 1b5c4c553d..9cfb759be0 100644 --- a/xen/arch/x86/cpu/intel_cacheinfo.c +++ b/xen/arch/x86/cpu/intel_cacheinfo.c @@ -187,7 +187,8 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) /* If bit 31 is set, this is an unknown format */ for ( j = 0 ; j < 3 ; j++ ) { - if ( regs[j] < 0 ) regs[j] = 0; + if ( regs[j] >> 31 ) + regs[j] = 0; } /* Byte 0 is level count, not a descriptor */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584291.914810 (Exim 4.92) (envelope-from ) id 1qWDJr-0007Rb-QR; Wed, 16 Aug 2023 10:00:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584291.914810; Wed, 16 Aug 2023 10:00:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDJr-0007R9-NI; Wed, 16 Aug 2023 10:00:03 +0000 Received: by outflank-mailman (input) for mailman id 584291; Wed, 16 Aug 2023 10:00:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDJp-00071q-IR for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDJp-0003c8-HD for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDJp-0003CQ-GD for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=x+91v626tiTEuLtngT+6i1jB9fqPRWQKhe+1YgW4QT0=; b=mZwTAM6+O3VAjePMHPBEhCXen2 BlQjPupPZzrssmwEpDF2FXn5tUG39SaK09eYTOaE+3WFKthzoCuAKzdYji63LIob0GKx23XLPCC13 CSNN5+iS++7Uxbps8eYk+8tc2RpTXe2iYhizwA5C6183nbmVy+lOrEuxzNBH+gjkdYQ0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] build: correct gas --noexecstack check Message-Id: Date: Wed, 16 Aug 2023 10:00:01 +0000 commit d1f6a58dfdc508c43a51c1865c826d519bf16493 Author: Jan Beulich AuthorDate: Mon Aug 14 09:58:19 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 09:58:19 2023 +0200 build: correct gas --noexecstack check The check was missing an escape for the inner $, thus breaking things in the unlikely event that the underlying assembler doesn't support this option. Fixes: 62d22296a95d ("build: silence GNU ld warning about executable stacks") Signed-off-by: Jan Beulich Reviewed-by: Anthony PERARD --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index c1738dbbde..f57e5a596c 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -405,7 +405,7 @@ endif AFLAGS += -D__ASSEMBLY__ -$(call cc-option-add,AFLAGS,CC,-Wa$(comma)--noexecstack) +$(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584292.914813 (Exim 4.92) (envelope-from ) id 1qWDK0-0007yi-RF; Wed, 16 Aug 2023 10:00:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584292.914813; Wed, 16 Aug 2023 10:00:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDK0-0007yb-Oh; Wed, 16 Aug 2023 10:00:12 +0000 Received: by outflank-mailman (input) for mailman id 584292; Wed, 16 Aug 2023 10:00:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDJz-0007yQ-LL for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDJz-0003dU-KV for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDJz-0003Du-JY for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=i8btkLBjRSmhhP9hOXk832bNo2wLuAU4qtw3jvIHE8A=; b=ymEhmmkdtfH3WLSIZA862CQeNb 50l43HJ1SHCwXTQKaRPMyAeiEJlIaLa7/HoA0OgeMbSjzSrvrGAGdMfd3ncG/jh98CdvQm0kpHHy/ V8ZHuS6inO6SUUGLNO5G1gQGH+0z3f8v1IeM+Bel3hDoK1SbWXj7Aon2sNfXfPhAmiIs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/hpet: make variable 'per_cpu__cpu_bc_channel' static Message-Id: Date: Wed, 16 Aug 2023 10:00:11 +0000 commit 6bccbb1794eae796e211d2e9e3a7de4aae86de68 Author: Nicola Vetrini AuthorDate: Mon Aug 14 09:58:37 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 09:58:37 2023 +0200 x86/hpet: make variable 'per_cpu__cpu_bc_channel' static The variable is only ever used inside the file where it's defined, therefore it can have static storage. This also resolves a violation of MISRA C:2012 Rule 8.4 due to the absence of a declaration prior to the definition. Fixes: 3ba523ff957c ("CPUIDLE: enable MSI capable HPET for timer broadcast") Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/hpet.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c index a2df1c7df4..79c07f6a9e 100644 --- a/xen/arch/x86/hpet.c +++ b/xen/arch/x86/hpet.c @@ -49,7 +49,7 @@ static struct hpet_event_channel *__read_mostly hpet_events; /* msi hpet channels used for broadcast */ static unsigned int __read_mostly num_hpets_used; -DEFINE_PER_CPU(struct hpet_event_channel *, cpu_bc_channel); +static DEFINE_PER_CPU(struct hpet_event_channel *, cpu_bc_channel); unsigned long __initdata hpet_address; int8_t __initdata opt_hpet_legacy_replacement = -1; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584293.914817 (Exim 4.92) (envelope-from ) id 1qWDKA-00083q-Ss; Wed, 16 Aug 2023 10:00:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584293.914817; Wed, 16 Aug 2023 10:00:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKA-00083j-Q7; Wed, 16 Aug 2023 10:00:22 +0000 Received: by outflank-mailman (input) for mailman id 584293; Wed, 16 Aug 2023 10:00:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDK9-00083Z-Oe for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDK9-0003ds-Ns for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDK9-0003Ez-Mu for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=jjd5ru1MdNESJtZ9WZ/p404a5tKYS3xVJEg60Osx6ZU=; b=bLe/gYq89ILVoLpdSn9PN7abyR hUoemEtqYak+NzV9IbK+JqHIZk1EHXglmpmiwWKal8cgVw645Cdx+wmKjDKmfw1iCafW0djBu4QAJ Ddh1th+NqTE4ds3sM/phtoCuLNflempphZMtqA8OrQc/iCMv2bfi9k177uaKWKVdHOjw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/setup: add missing headers Message-Id: Date: Wed, 16 Aug 2023 10:00:21 +0000 commit 7a0eb50170f428b1dd8f255fb4a3dc5a281d0c03 Author: Nicola Vetrini AuthorDate: Mon Aug 14 09:59:30 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 09:59:30 2023 +0200 x86/setup: add missing headers The missing headers declare variables 'xen_cpuidle' and 'use_invpcid' that are then defined inside the file. This is undesirable and also violates MISRA C:2012 Rule 8.4. Adding suitable "#include"s resolves the issue. The type of the variable 'xen_cpuidle' also changes according to s/s8/int8_t/. Fixes: 3eab82196b02 ("x86: PIT broadcast to fix local APIC timer stop issue for Deep C state") Fixes: 63dc135aeaf9 ("x86: invpcid support") Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/arch/x86/setup.c | 4 +++- xen/include/xen/cpuidle.h | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 80ae973d64..2bfc1fd00f 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -47,10 +47,12 @@ #include /* for generic_apic_probe */ #include #include +#include #include #include #include #include +#include #include #include #include @@ -88,7 +90,7 @@ boolean_param("noapic", skip_ioapic_setup); /* **** Linux config option: propagated to domain0. */ /* xen_cpuidle: xen control cstate. */ -s8 __read_mostly xen_cpuidle = -1; +int8_t __read_mostly xen_cpuidle = -1; boolean_param("cpuidle", xen_cpuidle); #ifndef NDEBUG diff --git a/xen/include/xen/cpuidle.h b/xen/include/xen/cpuidle.h index 521a8deb04..705d0c1135 100644 --- a/xen/include/xen/cpuidle.h +++ b/xen/include/xen/cpuidle.h @@ -86,7 +86,7 @@ struct cpuidle_governor void (*reflect) (struct acpi_processor_power *dev); }; -extern s8 xen_cpuidle; +extern int8_t xen_cpuidle; extern struct cpuidle_governor *cpuidle_current_governor; bool cpuidle_using_deep_cstate(void); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584294.914822 (Exim 4.92) (envelope-from ) id 1qWDKK-00089B-Ux; Wed, 16 Aug 2023 10:00:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584294.914822; Wed, 16 Aug 2023 10:00:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKK-000891-S5; Wed, 16 Aug 2023 10:00:32 +0000 Received: by outflank-mailman (input) for mailman id 584294; Wed, 16 Aug 2023 10:00:31 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKJ-00088i-UJ for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:31 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKJ-0003dz-Rl for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:31 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDKJ-0003Ft-Q2 for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:31 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qYVWIFj4EWFoEBoSj11h2MPiAqhcdL304C2xHkEKdFo=; b=v+HUpPnflm244HrrSCkJCzUgVG o9a212vHvrPS/whKqylnsSMjCuS9ULV6Pgfcy+JSDteYbgQB0HXoSS7SclAIje9HKzana4N/E8dBg BUdeDwRAI5WroUWGspZFM438RKfPk0ewlB0rwlrVBiCPCHqbZcJDR39PusrCVUvLuP6A=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] cpufreq: add missing include of header 'pmstat.h' Message-Id: Date: Wed, 16 Aug 2023 10:00:31 +0000 commit 1f44323271d20493580ef7d5dde8da9d67f6521d Author: Nicola Vetrini AuthorDate: Mon Aug 14 10:00:12 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 10:00:12 2023 +0200 cpufreq: add missing include of header 'pmstat.h' The missing header included by this patch provides a declaration for 'set_px_pminfo' that is visible prior to the definition in this file. This also resolves a violation of MISRA C:2012 Rule 8.4. Fixes: 452119c09420 ("x86 and ia64: move cpufreq notify code to commone place") Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- xen/drivers/cpufreq/cpufreq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c index 2321c7dd07..4482bbe53a 100644 --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584295.914826 (Exim 4.92) (envelope-from ) id 1qWDKU-0008E4-WF; Wed, 16 Aug 2023 10:00:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584295.914826; Wed, 16 Aug 2023 10:00:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKU-0008Dx-Tc; Wed, 16 Aug 2023 10:00:42 +0000 Received: by outflank-mailman (input) for mailman id 584295; Wed, 16 Aug 2023 10:00:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKT-0008Di-Vr for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:41 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKT-0003e7-Uu for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:41 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDKT-0003Gw-Ts for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:00:41 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=RZOLpAmjY4ijqo8QSiGIQGlIK9cU27MuOr74EsYIqhE=; b=Xl6NbKYOdFi7TU4DXqiYDjoOhj Cxbp6sq/v8QsIGb0Z+XmGEUiltNte1CFoD5vCadaRhTp1jH2a9ADGd9LUME8NOWNif6bJdsXRI0fb 4Fyy71qxeiHYW76+QXIaDcvMqIA03om8YQcKy76MksbaImD36dEqeWkv+BVH/ywvbeqY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce temporary printk stuff Message-Id: Date: Wed, 16 Aug 2023 10:00:41 +0000 commit 603a24573a4eb23cbc7f0485199aa10a64a5c2aa Author: Oleksii Kurochko AuthorDate: Mon Aug 14 10:00:53 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 10:00:53 2023 +0200 xen/riscv: introduce temporary printk stuff The patch introdcuces printk related stuff which should be deleted after Xen common code will be available. Signed-off-by: Oleksii Kurochko Acked-by: Alistair Francis --- xen/arch/riscv/early_printk.c | 168 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/xen/arch/riscv/early_printk.c b/xen/arch/riscv/early_printk.c index 610c814f54..60742a042d 100644 --- a/xen/arch/riscv/early_printk.c +++ b/xen/arch/riscv/early_printk.c @@ -40,3 +40,171 @@ void early_printk(const char *str) str++; } } + +/* + * The following #if 1 ... #endif should be removed after printk + * and related stuff are ready. + */ +#if 1 + +#include +#include + +/** + * strlen - Find the length of a string + * @s: The string to be sized + */ +size_t (strlen)(const char * s) +{ + const char *sc; + + for (sc = s; *sc != '\0'; ++sc) + /* nothing */; + return sc - s; +} + +/** + * memcpy - Copy one area of memory to another + * @dest: Where to copy to + * @src: Where to copy from + * @count: The size of the area. + * + * You should not use this function to access IO space, use memcpy_toio() + * or memcpy_fromio() instead. + */ +void *(memcpy)(void *dest, const void *src, size_t count) +{ + char *tmp = (char *) dest, *s = (char *) src; + + while (count--) + *tmp++ = *s++; + + return dest; +} + +int vsnprintf(char* str, size_t size, const char* format, va_list args) +{ + size_t i = 0; /* Current position in the output string */ + size_t written = 0; /* Total number of characters written */ + char* dest = str; + + while ( format[i] != '\0' && written < size - 1 ) + { + if ( format[i] == '%' ) + { + i++; + + if ( format[i] == '\0' ) + break; + + if ( format[i] == '%' ) + { + if ( written < size - 1 ) + { + dest[written] = '%'; + written++; + } + i++; + continue; + } + + /* + * Handle format specifiers. + * For simplicity, only %s and %d are implemented here. + */ + + if ( format[i] == 's' ) + { + char* arg = va_arg(args, char*); + size_t arglen = strlen(arg); + + size_t remaining = size - written - 1; + + if ( arglen > remaining ) + arglen = remaining; + + memcpy(dest + written, arg, arglen); + + written += arglen; + i++; + } + else if ( format[i] == 'd' ) + { + int arg = va_arg(args, int); + + /* Convert the integer to string representation */ + char numstr[32]; /* Assumes a maximum of 32 digits */ + int numlen = 0; + int num = arg; + size_t remaining; + + if ( arg < 0 ) + { + if ( written < size - 1 ) + { + dest[written] = '-'; + written++; + } + + num = -arg; + } + + do + { + numstr[numlen] = '0' + num % 10; + num = num / 10; + numlen++; + } while ( num > 0 ); + + /* Reverse the string */ + for (int j = 0; j < numlen / 2; j++) + { + char tmp = numstr[j]; + numstr[j] = numstr[numlen - 1 - j]; + numstr[numlen - 1 - j] = tmp; + } + + remaining = size - written - 1; + + if ( numlen > remaining ) + numlen = remaining; + + memcpy(dest + written, numstr, numlen); + + written += numlen; + i++; + } + } + else + { + if ( written < size - 1 ) + { + dest[written] = format[i]; + written++; + } + i++; + } + } + + if ( size > 0 ) + dest[written] = '\0'; + + return written; +} + +void printk(const char *format, ...) +{ + static char buf[1024]; + + va_list args; + va_start(args, format); + + (void)vsnprintf(buf, sizeof(buf), format, args); + + early_printk(buf); + + va_end(args); +} + +#endif + -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:00:53 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:00:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584296.914831 (Exim 4.92) (envelope-from ) id 1qWDKf-0008Ix-2m; Wed, 16 Aug 2023 10:00:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584296.914831; Wed, 16 Aug 2023 10:00:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKe-0008Ip-VT; Wed, 16 Aug 2023 10:00:52 +0000 Received: by outflank-mailman (input) for mailman id 584296; Wed, 16 Aug 2023 10:00:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKe-0008Ih-4N for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce Message-Id: Date: Wed, 16 Aug 2023 10:00:52 +0000 commit 86bd2484f36eba5d99883b7945b26bbbd2db6abe Author: Oleksii Kurochko AuthorDate: Mon Aug 14 10:01:52 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 10:01:52 2023 +0200 xen/riscv: introduce Signed-off-by: Oleksii Kurochko Reviewed-by: Alistair Francis --- xen/arch/riscv/include/asm/bug.h | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h new file mode 100644 index 0000000000..f5ff96140f --- /dev/null +++ b/xen/arch/riscv/include/asm/bug.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2021-2023 Vates + * + */ +#ifndef _ASM_RISCV_BUG_H +#define _ASM_RISCV_BUG_H + +#ifndef __ASSEMBLY__ + +#define BUG_INSTR "ebreak" + +/* + * The base instruction set has a fixed length of 32-bit naturally aligned + * instructions. + * + * There are extensions of variable length ( where each instruction can be + * any number of 16-bit parcels in length ). + * + * Compressed ISA is used now where the instruction length is 16 bit and + * 'ebreak' instruction, in this case, can be either 16 or 32 bit ( + * depending on if compressed ISA is used or not ) + */ +#define INSN_LENGTH_MASK _UL(0x3) +#define INSN_LENGTH_32 _UL(0x3) + +#define BUG_INSN_32 _UL(0x00100073) /* ebreak */ +#define BUG_INSN_16 _UL(0x9002) /* c.ebreak */ +#define COMPRESSED_INSN_MASK _UL(0xffff) + +#define GET_INSN_LENGTH(insn) \ + (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ + +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_RISCV_BUG_H */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:01:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:01:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584297.914834 (Exim 4.92) (envelope-from ) id 1qWDKp-0008OK-3k; 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Wed, 16 Aug 2023 10:01:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=t1b88iSCMLxGwmaP6PgiNh1FRqs1I6anrz1MFoDtOi8=; b=tH7FBzsziBRW/0SJ5R1omprYO8 S0ukaMwK2Gdb4B5vbZkiEhiAbCvUcMHNiLBczyb0hZTyFLlbwFw0d6WfzvkRkGEnR7Q5TJtNNusY+ lPN8UTN84Up1VJfp+ULznD6Yp2+K1iPzmPaHs1Fmi5BGGTGPMInh0FL9FGrS90ffTTkI=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/riscv: introduce decode_cause() stuff Message-Id: Date: Wed, 16 Aug 2023 10:01:02 +0000 commit 22e71609ad49797b2da141394d07ab5b1c326d54 Author: Oleksii Kurochko AuthorDate: Mon Aug 14 10:02:15 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 10:02:15 2023 +0200 xen/riscv: introduce decode_cause() stuff The patch introduces stuff needed to decode a reason of an exception. Signed-off-by: Oleksii Kurochko Acked-by: Alistair Francis --- xen/arch/riscv/traps.c | 84 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ccd3593f5a..a2b63d579b 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -4,10 +4,92 @@ * * RISC-V Trap handlers */ + +#include + +#include +#include #include #include -void do_trap(struct cpu_user_regs *cpu_regs) +static const char *decode_trap_cause(unsigned long cause) +{ + static const char *const trap_causes[] = { + [CAUSE_MISALIGNED_FETCH] = "Instruction Address Misaligned", + [CAUSE_FETCH_ACCESS] = "Instruction Access Fault", + [CAUSE_ILLEGAL_INSTRUCTION] = "Illegal Instruction", + [CAUSE_BREAKPOINT] = "Breakpoint", + [CAUSE_MISALIGNED_LOAD] = "Load Address Misaligned", + [CAUSE_LOAD_ACCESS] = "Load Access Fault", + [CAUSE_MISALIGNED_STORE] = "Store/AMO Address Misaligned", + [CAUSE_STORE_ACCESS] = "Store/AMO Access Fault", + [CAUSE_USER_ECALL] = "Environment Call from U-Mode", + [CAUSE_SUPERVISOR_ECALL] = "Environment Call from S-Mode", + [CAUSE_MACHINE_ECALL] = "Environment Call from M-Mode", + [CAUSE_FETCH_PAGE_FAULT] = "Instruction Page Fault", + [CAUSE_LOAD_PAGE_FAULT] = "Load Page Fault", + [CAUSE_STORE_PAGE_FAULT] = "Store/AMO Page Fault", + [CAUSE_FETCH_GUEST_PAGE_FAULT] = "Instruction Guest Page Fault", + [CAUSE_LOAD_GUEST_PAGE_FAULT] = "Load Guest Page Fault", + [CAUSE_VIRTUAL_INST_FAULT] = "Virtualized Instruction Fault", + [CAUSE_STORE_GUEST_PAGE_FAULT] = "Guest Store/AMO Page Fault", + }; + + if ( cause < ARRAY_SIZE(trap_causes) && trap_causes[cause] ) + return trap_causes[cause]; + return "UNKNOWN"; +} + +static const char *decode_reserved_interrupt_cause(unsigned long irq_cause) +{ + switch ( irq_cause ) + { + case IRQ_M_SOFT: + return "M-mode Software Interrupt"; + case IRQ_M_TIMER: + return "M-mode Timer Interrupt"; + case IRQ_M_EXT: + return "M-mode External Interrupt"; + default: + return "UNKNOWN IRQ type"; + } +} + +static const char *decode_interrupt_cause(unsigned long cause) +{ + unsigned long irq_cause = cause & ~CAUSE_IRQ_FLAG; + + switch ( irq_cause ) + { + case IRQ_S_SOFT: + return "Supervisor Software Interrupt"; + case IRQ_S_TIMER: + return "Supervisor Timer Interrupt"; + case IRQ_S_EXT: + return "Supervisor External Interrupt"; + default: + return decode_reserved_interrupt_cause(irq_cause); + } +} + +static const char *decode_cause(unsigned long cause) +{ + if ( cause & CAUSE_IRQ_FLAG ) + return decode_interrupt_cause(cause); + + return decode_trap_cause(cause); +} + +static void do_unexpected_trap(const struct cpu_user_regs *regs) { + unsigned long cause = csr_read(CSR_SCAUSE); + + printk("Unhandled exception: %s\n", decode_cause(cause)); + die(); } + +void do_trap(struct cpu_user_regs *cpu_regs) +{ + do_unexpected_trap(cpu_regs); +} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:01:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:01:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584299.914848 (Exim 4.92) (envelope-from ) id 1qWDKz-0000Ie-Eb; Wed, 16 Aug 2023 10:01:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584299.914848; Wed, 16 Aug 2023 10:01:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKz-0000IW-BU; Wed, 16 Aug 2023 10:01:13 +0000 Received: by outflank-mailman (input) for mailman id 584299; Wed, 16 Aug 2023 10:01:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKy-0000Hv-Al for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDKy-0003em-A0 for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDKy-0003K0-8s for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=pAcCjnHJHJsU0DvzkuVKjxpE9N4wINygbOpHQqhxk6k=; b=3xBP43/ld6Xb+jpWr5miDG044I KXIsHyenlnoV5y971tgBHUDJWkvbsvGn6Z9fFfpdxxJ9fCk2EPva1HjG6h2gpxtwkSHOm2gf9IyV3 Q3pZFWE8iERCNdUGm5x1DnQ63ZP+O4f8cR48GztPbD1prxLaFUJBcuGUQ+GCuJ04jTeA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] Revert "xen/riscv: introduce decode_cause() stuff" Message-Id: Date: Wed, 16 Aug 2023 10:01:12 +0000 commit 290959692726bed9a9404fbb151767dba9928c5b Author: Jan Beulich AuthorDate: Mon Aug 14 12:27:43 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 14 12:27:43 2023 +0200 Revert "xen/riscv: introduce decode_cause() stuff" This reverts commit 22e71609ad49797b2da141394d07ab5b1c326d54, which breaks both release and randconfig builds. --- xen/arch/riscv/traps.c | 84 +------------------------------------------------- 1 file changed, 1 insertion(+), 83 deletions(-) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index a2b63d579b..ccd3593f5a 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -4,92 +4,10 @@ * * RISC-V Trap handlers */ - -#include - -#include -#include #include #include -static const char *decode_trap_cause(unsigned long cause) -{ - static const char *const trap_causes[] = { - [CAUSE_MISALIGNED_FETCH] = "Instruction Address Misaligned", - [CAUSE_FETCH_ACCESS] = "Instruction Access Fault", - [CAUSE_ILLEGAL_INSTRUCTION] = "Illegal Instruction", - [CAUSE_BREAKPOINT] = "Breakpoint", - [CAUSE_MISALIGNED_LOAD] = "Load Address Misaligned", - [CAUSE_LOAD_ACCESS] = "Load Access Fault", - [CAUSE_MISALIGNED_STORE] = "Store/AMO Address Misaligned", - [CAUSE_STORE_ACCESS] = "Store/AMO Access Fault", - [CAUSE_USER_ECALL] = "Environment Call from U-Mode", - [CAUSE_SUPERVISOR_ECALL] = "Environment Call from S-Mode", - [CAUSE_MACHINE_ECALL] = "Environment Call from M-Mode", - [CAUSE_FETCH_PAGE_FAULT] = "Instruction Page Fault", - [CAUSE_LOAD_PAGE_FAULT] = "Load Page Fault", - [CAUSE_STORE_PAGE_FAULT] = "Store/AMO Page Fault", - [CAUSE_FETCH_GUEST_PAGE_FAULT] = "Instruction Guest Page Fault", - [CAUSE_LOAD_GUEST_PAGE_FAULT] = "Load Guest Page Fault", - [CAUSE_VIRTUAL_INST_FAULT] = "Virtualized Instruction Fault", - [CAUSE_STORE_GUEST_PAGE_FAULT] = "Guest Store/AMO Page Fault", - }; - - if ( cause < ARRAY_SIZE(trap_causes) && trap_causes[cause] ) - return trap_causes[cause]; - return "UNKNOWN"; -} - -static const char *decode_reserved_interrupt_cause(unsigned long irq_cause) -{ - switch ( irq_cause ) - { - case IRQ_M_SOFT: - return "M-mode Software Interrupt"; - case IRQ_M_TIMER: - return "M-mode Timer Interrupt"; - case IRQ_M_EXT: - return "M-mode External Interrupt"; - default: - return "UNKNOWN IRQ type"; - } -} - -static const char *decode_interrupt_cause(unsigned long cause) -{ - unsigned long irq_cause = cause & ~CAUSE_IRQ_FLAG; - - switch ( irq_cause ) - { - case IRQ_S_SOFT: - return "Supervisor Software Interrupt"; - case IRQ_S_TIMER: - return "Supervisor Timer Interrupt"; - case IRQ_S_EXT: - return "Supervisor External Interrupt"; - default: - return decode_reserved_interrupt_cause(irq_cause); - } -} - -static const char *decode_cause(unsigned long cause) -{ - if ( cause & CAUSE_IRQ_FLAG ) - return decode_interrupt_cause(cause); - - return decode_trap_cause(cause); -} - -static void do_unexpected_trap(const struct cpu_user_regs *regs) -{ - unsigned long cause = csr_read(CSR_SCAUSE); - - printk("Unhandled exception: %s\n", decode_cause(cause)); - - die(); -} - void do_trap(struct cpu_user_regs *cpu_regs) { - do_unexpected_trap(cpu_regs); + die(); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:01:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:01:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584300.914853 (Exim 4.92) (envelope-from ) id 1qWDL9-0000OA-GP; Wed, 16 Aug 2023 10:01:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584300.914853; Wed, 16 Aug 2023 10:01:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDL9-0000O3-D3; Wed, 16 Aug 2023 10:01:23 +0000 Received: by outflank-mailman (input) for mailman id 584300; Wed, 16 Aug 2023 10:01:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDL8-0000NP-E8 for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDL8-0003fI-DL for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDL8-0003Kn-CD for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=A47x78vskCodv4ToOZgyNc6Lv7b5cEGh4gwR9+Na/SM=; b=yGfE8/8eFzvA3yeHe3yNSqlZN6 FuIOvk5rxPnITi3L/OAxfSiqJh5IwHGOkDWzNwLu9gMwKkrfkPsMb2A4HPq0UOYQ21rEvHLdkgrJ8 0wqJXs/CMzovur0AgwNwFyPD1AIAXPhLaDxxemaIgPIf6li6f74LUfAxZFpwyR8SqY90=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: switch from Debian unstable to bookworm Message-Id: Date: Wed, 16 Aug 2023 10:01:22 +0000 commit 8ab05119df02081f2b1c3ab471a33b9f931050ad Author: Stefano Stabellini AuthorDate: Fri Aug 11 19:06:49 2023 -0700 Commit: Stefano Stabellini CommitDate: Mon Aug 14 14:41:42 2023 -0700 automation: switch from Debian unstable to bookworm Debian unstable used in the Xen containers is actually bookworm. Switching to bookworm which is now stable means we are not basing our containers on a moving target anymore. Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- .../debian/bookworm-arm64v8-arm32-gcc.dockerfile | 23 +++++++++ .../build/debian/bookworm-arm64v8.dockerfile | 54 ++++++++++++++++++++++ .../build/debian/bookworm-cppcheck.dockerfile | 53 +++++++++++++++++++++ automation/build/debian/bookworm-i386.dockerfile | 50 ++++++++++++++++++++ automation/build/debian/bookworm.dockerfile | 51 ++++++++++++++++++++ .../debian/unstable-arm64v8-arm32-gcc.dockerfile | 23 --------- .../build/debian/unstable-arm64v8.dockerfile | 54 ---------------------- .../build/debian/unstable-cppcheck.dockerfile | 53 --------------------- automation/build/debian/unstable-i386.dockerfile | 50 -------------------- automation/build/debian/unstable.dockerfile | 51 -------------------- automation/scripts/containerize | 10 ++-- 11 files changed, 236 insertions(+), 236 deletions(-) diff --git a/automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile b/automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile new file mode 100644 index 0000000000..b3295c435e --- /dev/null +++ b/automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile @@ -0,0 +1,23 @@ +FROM arm64v8/debian:bookworm +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root +ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + flex \ + bison \ + git \ + gcc-arm-linux-gnueabihf \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/bookworm-arm64v8.dockerfile b/automation/build/debian/bookworm-arm64v8.dockerfile new file mode 100644 index 0000000000..a6d4246d96 --- /dev/null +++ b/automation/build/debian/bookworm-arm64v8.dockerfile @@ -0,0 +1,54 @@ +FROM arm64v8/debian:bookworm +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + zlib1g-dev \ + libncurses5-dev \ + libssl-dev \ + python3-dev \ + xorg-dev \ + uuid-dev \ + libyajl-dev \ + libaio-dev \ + libglib2.0-dev \ + clang \ + libpixman-1-dev \ + pkg-config \ + flex \ + bison \ + acpica-tools \ + libfdt-dev \ + bin86 \ + bcc \ + liblzma-dev \ + libnl-3-dev \ + ocaml-nox \ + libfindlib-ocaml-dev \ + markdown \ + transfig \ + pandoc \ + checkpolicy \ + wget \ + git \ + nasm \ + # for test phase, qemu-smoke-* jobs + u-boot-qemu \ + u-boot-tools \ + device-tree-compiler \ + curl \ + cpio \ + busybox-static \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/bookworm-cppcheck.dockerfile b/automation/build/debian/bookworm-cppcheck.dockerfile new file mode 100644 index 0000000000..d64fb7b18c --- /dev/null +++ b/automation/build/debian/bookworm-cppcheck.dockerfile @@ -0,0 +1,53 @@ +FROM arm64v8/debian:bookworm AS builder + +ENV DEBIAN_FRONTEND=noninteractive +ENV CPPCHECK_VERSION=2.7 +ENV USER root + +# dependencies for cppcheck build +RUN apt-get update && \ + apt-get --quiet --yes install \ + curl \ + build-essential \ + python-is-python3 \ + libpcre3-dev + +RUN mkdir /build +WORKDIR /build + +# cppcheck release build (see cppcheck readme.md) +RUN curl -fsSLO https://github.com/danmar/cppcheck/archive/"$CPPCHECK_VERSION".tar.gz && \ + tar xvzf "$CPPCHECK_VERSION".tar.gz && \ + cd cppcheck-"$CPPCHECK_VERSION" && \ + make install -j$(nproc) \ + MATCHCOMPILER=yes \ + FILESDIR=/usr/share/cppcheck \ + HAVE_RULES=yes CXXFLAGS="-O2 -DNDEBUG -Wall -Wno-sign-compare -Wno-unused-function" + +FROM arm64v8/debian:bookworm +COPY --from=builder /usr/bin/cppcheck /usr/bin/cppcheck +COPY --from=builder /usr/share/cppcheck /usr/share/cppcheck + +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root + +RUN mkdir /build +WORKDIR /build + +# dependencies for cppcheck analysis including Xen-only build/cross-build +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + python-is-python3 \ + libpcre3-dev \ + flex \ + bison \ + gcc-arm-linux-gnueabihf \ + gcc-x86-64-linux-gnu \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/bookworm-i386.dockerfile b/automation/build/debian/bookworm-i386.dockerfile new file mode 100644 index 0000000000..eb1c732f53 --- /dev/null +++ b/automation/build/debian/bookworm-i386.dockerfile @@ -0,0 +1,50 @@ +FROM i386/debian:bookworm +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root + +RUN mkdir /build +WORKDIR /build + +ENTRYPOINT ["linux32"] + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + zlib1g-dev \ + libncurses5-dev \ + libssl-dev \ + python3-dev \ + xorg-dev \ + uuid-dev \ + libyajl-dev \ + libaio-dev \ + libglib2.0-dev \ + clang \ + libpixman-1-dev \ + pkg-config \ + flex \ + bison \ + acpica-tools \ + bin86 \ + bcc \ + liblzma-dev \ + libc6-dev \ + libnl-3-dev \ + ocaml-nox \ + libfindlib-ocaml-dev \ + markdown \ + transfig \ + pandoc \ + checkpolicy \ + wget \ + git \ + nasm \ + apt-transport-https \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/bookworm.dockerfile b/automation/build/debian/bookworm.dockerfile new file mode 100644 index 0000000000..f8415425e6 --- /dev/null +++ b/automation/build/debian/bookworm.dockerfile @@ -0,0 +1,51 @@ +FROM debian:bookworm +LABEL maintainer.name="The Xen Project" \ + maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV USER root + +RUN mkdir /build +WORKDIR /build + +# build depends +RUN apt-get update && \ + apt-get --quiet --yes install \ + build-essential \ + zlib1g-dev \ + libncurses5-dev \ + libssl-dev \ + python3-dev \ + xorg-dev \ + uuid-dev \ + libyajl-dev \ + libaio-dev \ + libglib2.0-dev \ + clang \ + libpixman-1-dev \ + pkg-config \ + flex \ + bison \ + acpica-tools \ + bin86 \ + bcc \ + liblzma-dev \ + # libc6-dev-i386 for Xen < 4.15 + libc6-dev-i386 \ + libnl-3-dev \ + ocaml-nox \ + libfindlib-ocaml-dev \ + markdown \ + transfig \ + pandoc \ + checkpolicy \ + wget \ + git \ + nasm \ + gnupg \ + apt-transport-https \ + golang \ + && \ + apt-get autoremove -y && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile b/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile deleted file mode 100644 index 11860425a6..0000000000 --- a/automation/build/debian/unstable-arm64v8-arm32-gcc.dockerfile +++ /dev/null @@ -1,23 +0,0 @@ -FROM arm64v8/debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root -ENV CROSS_COMPILE /usr/bin/arm-linux-gnueabihf- - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - flex \ - bison \ - git \ - gcc-arm-linux-gnueabihf \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/unstable-arm64v8.dockerfile b/automation/build/debian/unstable-arm64v8.dockerfile deleted file mode 100644 index b9b1587f88..0000000000 --- a/automation/build/debian/unstable-arm64v8.dockerfile +++ /dev/null @@ -1,54 +0,0 @@ -FROM arm64v8/debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - zlib1g-dev \ - libncurses5-dev \ - libssl-dev \ - python3-dev \ - xorg-dev \ - uuid-dev \ - libyajl-dev \ - libaio-dev \ - libglib2.0-dev \ - clang \ - libpixman-1-dev \ - pkg-config \ - flex \ - bison \ - acpica-tools \ - libfdt-dev \ - bin86 \ - bcc \ - liblzma-dev \ - libnl-3-dev \ - ocaml-nox \ - libfindlib-ocaml-dev \ - markdown \ - transfig \ - pandoc \ - checkpolicy \ - wget \ - git \ - nasm \ - # for test phase, qemu-smoke-* jobs - u-boot-qemu \ - u-boot-tools \ - device-tree-compiler \ - curl \ - cpio \ - busybox-static \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/unstable-cppcheck.dockerfile b/automation/build/debian/unstable-cppcheck.dockerfile deleted file mode 100644 index adc192cea6..0000000000 --- a/automation/build/debian/unstable-cppcheck.dockerfile +++ /dev/null @@ -1,53 +0,0 @@ -FROM arm64v8/debian:unstable AS builder - -ENV DEBIAN_FRONTEND=noninteractive -ENV CPPCHECK_VERSION=2.7 -ENV USER root - -# dependencies for cppcheck build -RUN apt-get update && \ - apt-get --quiet --yes install \ - curl \ - build-essential \ - python-is-python3 \ - libpcre3-dev - -RUN mkdir /build -WORKDIR /build - -# cppcheck release build (see cppcheck readme.md) -RUN curl -fsSLO https://github.com/danmar/cppcheck/archive/"$CPPCHECK_VERSION".tar.gz && \ - tar xvzf "$CPPCHECK_VERSION".tar.gz && \ - cd cppcheck-"$CPPCHECK_VERSION" && \ - make install -j$(nproc) \ - MATCHCOMPILER=yes \ - FILESDIR=/usr/share/cppcheck \ - HAVE_RULES=yes CXXFLAGS="-O2 -DNDEBUG -Wall -Wno-sign-compare -Wno-unused-function" - -FROM arm64v8/debian:unstable -COPY --from=builder /usr/bin/cppcheck /usr/bin/cppcheck -COPY --from=builder /usr/share/cppcheck /usr/share/cppcheck - -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# dependencies for cppcheck analysis including Xen-only build/cross-build -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - python-is-python3 \ - libpcre3-dev \ - flex \ - bison \ - gcc-arm-linux-gnueabihf \ - gcc-x86-64-linux-gnu \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/unstable-i386.dockerfile b/automation/build/debian/unstable-i386.dockerfile deleted file mode 100644 index 1c4928b09e..0000000000 --- a/automation/build/debian/unstable-i386.dockerfile +++ /dev/null @@ -1,50 +0,0 @@ -FROM i386/debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root - -RUN mkdir /build -WORKDIR /build - -ENTRYPOINT ["linux32"] - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - zlib1g-dev \ - libncurses5-dev \ - libssl-dev \ - python3-dev \ - xorg-dev \ - uuid-dev \ - libyajl-dev \ - libaio-dev \ - libglib2.0-dev \ - clang \ - libpixman-1-dev \ - pkg-config \ - flex \ - bison \ - acpica-tools \ - bin86 \ - bcc \ - liblzma-dev \ - libc6-dev \ - libnl-3-dev \ - ocaml-nox \ - libfindlib-ocaml-dev \ - markdown \ - transfig \ - pandoc \ - checkpolicy \ - wget \ - git \ - nasm \ - apt-transport-https \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/build/debian/unstable.dockerfile b/automation/build/debian/unstable.dockerfile deleted file mode 100644 index 6ef2878200..0000000000 --- a/automation/build/debian/unstable.dockerfile +++ /dev/null @@ -1,51 +0,0 @@ -FROM debian:unstable -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - zlib1g-dev \ - libncurses5-dev \ - libssl-dev \ - python3-dev \ - xorg-dev \ - uuid-dev \ - libyajl-dev \ - libaio-dev \ - libglib2.0-dev \ - clang \ - libpixman-1-dev \ - pkg-config \ - flex \ - bison \ - acpica-tools \ - bin86 \ - bcc \ - liblzma-dev \ - # libc6-dev-i386 for Xen < 4.15 - libc6-dev-i386 \ - libnl-3-dev \ - ocaml-nox \ - libfindlib-ocaml-dev \ - markdown \ - transfig \ - pandoc \ - checkpolicy \ - wget \ - git \ - nasm \ - gnupg \ - apt-transport-https \ - golang \ - && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* diff --git a/automation/scripts/containerize b/automation/scripts/containerize index 16d480ab75..acdef1b548 100755 --- a/automation/scripts/containerize +++ b/automation/scripts/containerize @@ -37,11 +37,11 @@ case "_${CONTAINER}" in _stretch|_) CONTAINER="${BASE}/debian:stretch" ;; _stretch-i386) CONTAINER="${BASE}/debian:stretch-i386" ;; _buster-gcc-ibt) CONTAINER="${BASE}/debian:buster-gcc-ibt" ;; - _unstable|_) CONTAINER="${BASE}/debian:unstable" ;; - _unstable-i386) CONTAINER="${BASE}/debian:unstable-i386" ;; - _unstable-arm64v8-arm32-gcc) CONTAINER="${BASE}/debian:unstable-arm64v8-arm32-gcc" ;; - _unstable-arm64v8) CONTAINER="${BASE}/debian:unstable-arm64v8" ;; - _unstable-cppcheck) CONTAINER="${BASE}/debian:unstable-cppcheck" ;; + _bookworm|_) CONTAINER="${BASE}/debian:bookworm" ;; + _bookworm-i386) CONTAINER="${BASE}/debian:bookworm-i386" ;; + _bookworm-arm64v8-arm32-gcc) CONTAINER="${BASE}/debian:bookworm-arm64v8-arm32-gcc" ;; + _bookworm-arm64v8) CONTAINER="${BASE}/debian:bookworm-arm64v8" ;; + _bookworm-cppcheck) CONTAINER="${BASE}/debian:bookworm-cppcheck" ;; _bionic) CONTAINER="${BASE}/ubuntu:bionic" ;; _trusty) CONTAINER="${BASE}/ubuntu:trusty" ;; _xenial) CONTAINER="${BASE}/ubuntu:xenial" ;; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:01:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:01:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584301.914855 (Exim 4.92) (envelope-from ) id 1qWDLJ-0000Vc-HB; Wed, 16 Aug 2023 10:01:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584301.914855; Wed, 16 Aug 2023 10:01:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLJ-0000VV-Eh; Wed, 16 Aug 2023 10:01:33 +0000 Received: by outflank-mailman (input) for mailman id 584301; Wed, 16 Aug 2023 10:01:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLI-0000V3-HJ for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLI-0003fT-GV for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDLI-0003Lc-Fi for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SHWR8seaMJSKEMhJWMiaOGOzF4aMup3ZCX+UQytrXko=; b=ASQMVzrfG2cf9iznQZuSFNeNot GTvfwb8wgn0JjRIx+gnbvRVlnP1/NsLNOJiKVxnh+RQZUwYFWIpiUOSAHc+YwAwWyEBTyVT0xQPv3 tov1DnFm0tHC4oixZS5LRumfofMJx+QXvwzOtRsJTjb2Ns4k0rp+n4QyJmba64F0ClnE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: update test-artifacts to use Debian Bookworm instead of unstable Message-Id: Date: Wed, 16 Aug 2023 10:01:32 +0000 commit 33a1c443d9808c0cd1aae761bcf517854229b38b Author: Stefano Stabellini AuthorDate: Fri Aug 11 19:06:50 2023 -0700 Commit: Stefano Stabellini CommitDate: Mon Aug 14 14:42:03 2023 -0700 automation: update test-artifacts to use Debian Bookworm instead of unstable Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- automation/tests-artifacts/kernel/5.19-arm64v8.dockerfile | 2 +- automation/tests-artifacts/kernel/6.1.19.dockerfile | 2 +- automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/automation/tests-artifacts/kernel/5.19-arm64v8.dockerfile b/automation/tests-artifacts/kernel/5.19-arm64v8.dockerfile index e445c1f03a..a53a97d727 100644 --- a/automation/tests-artifacts/kernel/5.19-arm64v8.dockerfile +++ b/automation/tests-artifacts/kernel/5.19-arm64v8.dockerfile @@ -1,4 +1,4 @@ -FROM arm64v8/debian:unstable +FROM arm64v8/debian:bookworm LABEL maintainer.name="The Xen Project" \ maintainer.email="xen-devel@lists.xenproject.org" diff --git a/automation/tests-artifacts/kernel/6.1.19.dockerfile b/automation/tests-artifacts/kernel/6.1.19.dockerfile index c2171555a0..d5b787c1cb 100644 --- a/automation/tests-artifacts/kernel/6.1.19.dockerfile +++ b/automation/tests-artifacts/kernel/6.1.19.dockerfile @@ -1,4 +1,4 @@ -FROM debian:unstable +FROM debian:bookworm LABEL maintainer.name="The Xen Project" \ maintainer.email="xen-devel@lists.xenproject.org" diff --git a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile b/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile index 793432d40b..e277e13b60 100644 --- a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile +++ b/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile @@ -1,4 +1,4 @@ -FROM arm64v8/debian:unstable +FROM arm64v8/debian:bookworm LABEL maintainer.name="The Xen Project" \ maintainer.email="xen-devel@lists.xenproject.org" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 10:01:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 10:01:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584304.914862 (Exim 4.92) (envelope-from ) id 1qWDLT-0000bt-KB; Wed, 16 Aug 2023 10:01:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584304.914862; Wed, 16 Aug 2023 10:01:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLT-0000bl-GA; Wed, 16 Aug 2023 10:01:43 +0000 Received: by outflank-mailman (input) for mailman id 584304; Wed, 16 Aug 2023 10:01:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLS-0000bf-KJ for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWDLS-0003fd-JS for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWDLS-0003MR-Ib for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 10:01:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=EynkHZJHnEOE2KYdM8vdr8QFFivi6p5xLePkLwuAHLk=; b=2xF8MrRHVP5stJM4KJX0NQUbEK u+K9i69sgmlNp1GGhvfWpYJO35SrfkDjpZsinKVMeW5GO1oXqLfB8zZJnaHyEnKbl7GSgHIMh2Hi/ JvjAQfn+GxSLSJq098LH7p3Om0baLgZhvw0cXfL3hNaltzwv7s9Xq+QqU54kYM0AQdm0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation: update jobs to use Debian Bookworm instead of unstable Message-Id: Date: Wed, 16 Aug 2023 10:01:42 +0000 commit 2763c33c6e52583f4f599d0e195bf5b1b859df22 Author: Stefano Stabellini AuthorDate: Fri Aug 11 19:06:51 2023 -0700 Commit: Stefano Stabellini CommitDate: Mon Aug 14 14:42:16 2023 -0700 automation: update jobs to use Debian Bookworm instead of unstable Signed-off-by: Stefano Stabellini Reviewed-by: Michal Orzel --- automation/gitlab-ci/build.yaml | 84 ++++++++++++++++++++--------------------- automation/gitlab-ci/test.yaml | 24 ++++++------ 2 files changed, 54 insertions(+), 54 deletions(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 173613567c..1a4a5e490d 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -360,53 +360,53 @@ debian-stretch-gcc-debug: variables: CONTAINER: debian:stretch -debian-unstable-clang-debug: +debian-bookworm-clang-debug: extends: .clang-x86-64-build-debug variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm # Arm32 cross-build -debian-unstable-gcc-arm32: +debian-bookworm-gcc-arm32: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y -debian-unstable-gcc-arm32-debug: +debian-bookworm-gcc-arm32-debug: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y -debian-unstable-gcc-arm32-randconfig: +debian-bookworm-gcc-arm32-randconfig: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y RANDCONFIG: y -debian-unstable-gcc-arm32-debug-randconfig: +debian-bookworm-gcc-arm32-debug-randconfig: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y RANDCONFIG: y -debian-unstable-gcc-arm32-staticmem: +debian-bookworm-gcc-arm32-staticmem: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y EXTRA_XEN_CONFIG: | CONFIG_EXPERT=y CONFIG_UNSUPPORTED=y CONFIG_STATIC_MEMORY=y -debian-unstable-gcc-arm32-debug-staticmem: +debian-bookworm-gcc-arm32-debug-staticmem: extends: .gcc-arm32-cross-build-debug variables: - CONTAINER: debian:unstable-arm64v8-arm32-gcc + CONTAINER: debian:bookworm-arm64v8-arm32-gcc HYPERVISOR_ONLY: y EXTRA_XEN_CONFIG: | CONFIG_EXPERT=y @@ -415,26 +415,26 @@ debian-unstable-gcc-arm32-debug-staticmem: # Arm builds -debian-unstable-gcc-arm64: +debian-bookworm-gcc-arm64: extends: .gcc-arm64-build variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 -debian-unstable-gcc-debug-arm64: +debian-bookworm-gcc-debug-arm64: extends: .gcc-arm64-build-debug variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 -debian-unstable-gcc-arm64-randconfig: +debian-bookworm-gcc-arm64-randconfig: extends: .gcc-arm64-build variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 RANDCONFIG: y -debian-unstable-gcc-debug-arm64-randconfig: +debian-bookworm-gcc-debug-arm64-randconfig: extends: .gcc-arm64-build-debug variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 RANDCONFIG: y alpine-3.18-gcc-arm64: @@ -597,26 +597,26 @@ yocto-qemux86-64: # Cppcheck analysis jobs -debian-unstable-gcc-cppcheck: +debian-bookworm-gcc-cppcheck: extends: .gcc-x86-64-cross-build variables: - CONTAINER: debian:unstable-cppcheck + CONTAINER: debian:bookworm-cppcheck CROSS_COMPILE: /usr/bin/x86_64-linux-gnu- CPPCHECK: y HYPERVISOR_ONLY: y -debian-unstable-gcc-arm32-cppcheck: +debian-bookworm-gcc-arm32-cppcheck: extends: .gcc-arm32-cross-build variables: - CONTAINER: debian:unstable-cppcheck + CONTAINER: debian:bookworm-cppcheck CROSS_COMPILE: /usr/bin/arm-linux-gnueabihf- CPPCHECK: y HYPERVISOR_ONLY: y -debian-unstable-gcc-arm64-cppcheck: +debian-bookworm-gcc-arm64-cppcheck: extends: .gcc-arm64-build variables: - CONTAINER: debian:unstable-cppcheck + CONTAINER: debian:bookworm-cppcheck CPPCHECK: y HYPERVISOR_ONLY: y @@ -685,42 +685,42 @@ debian-buster-gcc-ibt: EXTRA_FIXED_RANDCONFIG: | CONFIG_XEN_IBT=y -debian-unstable-clang: +debian-bookworm-clang: extends: .clang-x86-64-build variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm -debian-unstable-gcc: +debian-bookworm-gcc: extends: .gcc-x86-64-build variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm -debian-unstable-gcc-debug: +debian-bookworm-gcc-debug: extends: .gcc-x86-64-build-debug variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm -debian-unstable-gcc-randconfig: +debian-bookworm-gcc-randconfig: extends: .gcc-x86-64-build variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm RANDCONFIG: y -debian-unstable-gcc-debug-randconfig: +debian-bookworm-gcc-debug-randconfig: extends: .gcc-x86-64-build-debug variables: - CONTAINER: debian:unstable + CONTAINER: debian:bookworm RANDCONFIG: y -debian-unstable-32-clang-debug: +debian-bookworm-32-clang-debug: extends: .clang-x86-32-build-debug variables: - CONTAINER: debian:unstable-i386 + CONTAINER: debian:bookworm-i386 -debian-unstable-32-gcc-debug: +debian-bookworm-32-gcc-debug: extends: .gcc-x86-32-build-debug variables: - CONTAINER: debian:unstable-i386 + CONTAINER: debian:bookworm-i386 fedora-gcc: extends: .gcc-x86-64-build diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8ccce1fe26..810631bc46 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -22,7 +22,7 @@ .qemu-arm64: extends: .test-jobs-common variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 LOGFILE: qemu-smoke-arm64.log artifacts: paths: @@ -35,7 +35,7 @@ .qemu-arm32: extends: .test-jobs-common variables: - CONTAINER: debian:unstable-arm64v8 + CONTAINER: debian:bookworm-arm64v8 LOGFILE: qemu-smoke-arm32.log artifacts: paths: @@ -357,7 +357,7 @@ qemu-smoke-dom0less-arm32-gcc: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32 + - debian-bookworm-gcc-arm32 qemu-smoke-dom0less-arm32-gcc-debug: extends: .qemu-arm32 @@ -365,7 +365,7 @@ qemu-smoke-dom0less-arm32-gcc-debug: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32-debug + - debian-bookworm-gcc-arm32-debug qemu-smoke-dom0less-arm32-gcc-staticmem: extends: .qemu-arm32 @@ -373,7 +373,7 @@ qemu-smoke-dom0less-arm32-gcc-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32-staticmem + - debian-bookworm-gcc-arm32-staticmem qemu-smoke-dom0less-arm32-gcc-debug-staticmem: extends: .qemu-arm32 @@ -381,7 +381,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32-debug-staticmem + - debian-bookworm-gcc-arm32-debug-staticmem qemu-smoke-dom0less-arm32-gcc-gzip: extends: .qemu-arm32 @@ -389,7 +389,7 @@ qemu-smoke-dom0less-arm32-gcc-gzip: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh gzip 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32 + - debian-bookworm-gcc-arm32 qemu-smoke-dom0less-arm32-gcc-debug-gzip: extends: .qemu-arm32 @@ -397,7 +397,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-gzip: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh gzip 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32-debug + - debian-bookworm-gcc-arm32-debug qemu-smoke-dom0less-arm32-gcc-without-dom0: extends: .qemu-arm32 @@ -405,7 +405,7 @@ qemu-smoke-dom0less-arm32-gcc-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32 + - debian-bookworm-gcc-arm32 qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: extends: .qemu-arm32 @@ -413,7 +413,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-unstable-gcc-arm32-debug + - debian-bookworm-gcc-arm32-debug qemu-alpine-x86_64-gcc: extends: .qemu-x86-64 @@ -435,7 +435,7 @@ qemu-smoke-x86-64-clang: script: - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE} needs: - - debian-unstable-clang-debug + - debian-bookworm-clang-debug qemu-smoke-x86-64-gcc-pvh: extends: .qemu-x86-64 @@ -449,7 +449,7 @@ qemu-smoke-x86-64-clang-pvh: script: - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE} needs: - - debian-unstable-clang-debug + - debian-bookworm-clang-debug qemu-smoke-riscv64-gcc: extends: .qemu-riscv64 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 22:22:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 22:22:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584949.915857 (Exim 4.92) (envelope-from ) id 1qWOtv-0001Lz-Fa; Wed, 16 Aug 2023 22:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584949.915857; Wed, 16 Aug 2023 22:22:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOtv-0001Ls-D6; Wed, 16 Aug 2023 22:22:03 +0000 Received: by outflank-mailman (input) for mailman id 584949; Wed, 16 Aug 2023 22:22:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOtt-0001Lm-Q5 for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOtt-00058T-Ok for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWOtt-00012s-Nd for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=YHTLaUkhk0n1wSzhmQIGrcfnlO5+hzQ85inMRDnv4jM=; b=nzMoXVvi+uERNB7k0j1/4YqMw0 qUtJOCJDL9RZN0Cyq5tjJH/V41lrk6ayN6Bfrv1pQwejtrS8LuZmRfec9TniYUAQyjBqsdcbSI/og fHcXNZg5vB9dDw0oK7vAItnFXGgn8YvhSDRJ2HjiLEnPUbZD42J17FLkUXHtZ4LeyBMU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: traps: remove unused function 'dump_guest_s1_walk' Message-Id: Date: Wed, 16 Aug 2023 22:22:01 +0000 commit 18b15f11d852cb9c5b80b1c4fe1626f3770ed72f Author: Nicola Vetrini AuthorDate: Mon Aug 14 10:53:06 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 15 09:41:47 2023 -0700 xen/arm: traps: remove unused function 'dump_guest_s1_walk' The function has no uses in the codebase, and can be removed. This also avoids the violation of MISRA C:2012 Rule 8.4 and Rule 2.1 because it has no declaration and the function's code is unreachable. Suggested-by: Julien Grall Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/arch/arm/traps.c | 57 ---------------------------------------------------- 1 file changed, 57 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 7baddfdc57..46c9a4031b 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1686,63 +1686,6 @@ void handle_ro_raz(struct cpu_user_regs *regs, handle_ro_read_val(regs, regidx, read, hsr, min_el, 0); } -void dump_guest_s1_walk(struct domain *d, vaddr_t addr) -{ - register_t ttbcr = READ_SYSREG(TCR_EL1); - uint64_t ttbr0 = READ_SYSREG64(TTBR0_EL1); - uint32_t offset; - uint32_t *first = NULL, *second = NULL; - mfn_t mfn; - - mfn = gfn_to_mfn(d, gaddr_to_gfn(ttbr0)); - - printk("dom%d VA 0x%08"PRIvaddr"\n", d->domain_id, addr); - printk(" TTBCR: 0x%"PRIregister"\n", ttbcr); - printk(" TTBR0: 0x%016"PRIx64" = 0x%"PRIpaddr"\n", - ttbr0, mfn_to_maddr(mfn)); - - if ( ttbcr & TTBCR_EAE ) - { - printk("Cannot handle LPAE guest PT walk\n"); - return; - } - if ( (ttbcr & TTBCR_N_MASK) != 0 ) - { - printk("Cannot handle TTBR1 guest walks\n"); - return; - } - - if ( mfn_eq(mfn, INVALID_MFN) ) - { - printk("Failed TTBR0 maddr lookup\n"); - goto done; - } - first = map_domain_page(mfn); - - offset = addr >> (12+8); - printk("1ST[0x%"PRIx32"] (0x%"PRIpaddr") = 0x%08"PRIx32"\n", - offset, mfn_to_maddr(mfn), first[offset]); - if ( !(first[offset] & 0x1) || - (first[offset] & 0x2) ) - goto done; - - mfn = gfn_to_mfn(d, gaddr_to_gfn(first[offset])); - - if ( mfn_eq(mfn, INVALID_MFN) ) - { - printk("Failed L1 entry maddr lookup\n"); - goto done; - } - second = map_domain_page(mfn); - offset = (addr >> 12) & 0x3FF; - printk("2ND[0x%"PRIx32"] (0x%"PRIpaddr") = 0x%08"PRIx32"\n", - offset, mfn_to_maddr(mfn), second[offset]); - -done: - if ( second ) unmap_domain_page(second); - if ( first ) unmap_domain_page(first); -} - /* * Return the value of the hypervisor fault address register. * -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Wed Aug 16 22:22:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 16 Aug 2023 22:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.584950.915861 (Exim 4.92) (envelope-from ) id 1qWOu5-0001Nw-HU; Wed, 16 Aug 2023 22:22:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 584950.915861; Wed, 16 Aug 2023 22:22:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOu5-0001Np-Ec; Wed, 16 Aug 2023 22:22:13 +0000 Received: by outflank-mailman (input) for mailman id 584950; Wed, 16 Aug 2023 22:22:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOu3-0001Nc-T3 for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWOu3-00058d-SE for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWOu3-00013N-RG for xen-changelog@lists.xenproject.org; Wed, 16 Aug 2023 22:22:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=J9vTsd39JY+wLn4XvFNROb4K3bSOmnJV5iKJ40Jdebg=; b=MDOKuGBGY891/7vMIAkcrqdFTH g66VZGk/UokBJ+3/IVRNOTrAXVeHGE7kw3qbfV19/295nrM3wlWzpRNOeohmpSF16s2v9R0lKlRr5 ryf/tBBU/hhKRppPcgzgH+JMdL7Kt03g9HgsD9vDK3qEumHzEOw1Nc06c/RGg1Iv8Ips=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86: address MISRA C:2012 Rule 5.3 Message-Id: Date: Wed, 16 Aug 2023 22:22:11 +0000 commit d0eabe3eaf0db5b78843095a2918d50961e99e96 Author: Nicola Vetrini AuthorDate: Mon Aug 14 11:05:30 2023 +0200 Commit: Stefano Stabellini CommitDate: Tue Aug 15 09:42:21 2023 -0700 x86: address MISRA C:2012 Rule 5.3 Address some occurrences of shadowing between the global variable 'e820' in 'xen/arch/x86/e820.c' and the function parameter name of 'e820_add_range'. Since the function is only ever called with the global variable as the actual parameter, so there is no need to have it as a parameter because both are defined in the same file (mentioned above). This in turn causes several other functions to lose their parameter 'e820' because they are involved in the call chain that leads to 'e820_add_range'. Similarly, 'kexec_reserve_area' is only ever called with the static variable 'boot_e820' as a parameter, which is defined in the same file as the function, thus it does not need that parameter, which is a cause of shadowing, as explained above. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/e820.c | 38 ++++++++++++++--------------- xen/arch/x86/guest/hyperv/hyperv.c | 4 +-- xen/arch/x86/guest/hypervisor.c | 4 +-- xen/arch/x86/guest/xen/xen.c | 4 +-- xen/arch/x86/include/asm/e820.h | 3 +-- xen/arch/x86/include/asm/guest/hypervisor.h | 6 ++--- xen/arch/x86/include/asm/pv/shim.h | 4 +-- xen/arch/x86/pv/shim.c | 10 ++++---- xen/arch/x86/setup.c | 8 +++--- xen/arch/x86/x86_64/mmconf-fam10h.c | 2 +- xen/drivers/passthrough/amd/iommu_acpi.c | 2 +- 11 files changed, 42 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c index 4911e64b8c..6a3ce7e0a0 100644 --- a/xen/arch/x86/e820.c +++ b/xen/arch/x86/e820.c @@ -543,27 +543,27 @@ static void __init machine_specific_memory_setup(struct e820map *raw) clip_to_limit(top_of_ram, "MTRRs do not cover all of memory."); } -/* This function relies on the passed in e820->map[] being sorted. */ -int __init e820_add_range( - struct e820map *e820, uint64_t s, uint64_t e, uint32_t type) +/* This function relies on the global e820->map[] being sorted. */ +int __init e820_add_range(uint64_t s, uint64_t e, uint32_t type) { unsigned int i; + struct e820entry *ei = e820.map; - for ( i = 0; i < e820->nr_map; ++i ) + for ( i = 0; i < e820.nr_map; ++i ) { - uint64_t rs = e820->map[i].addr; - uint64_t re = rs + e820->map[i].size; + uint64_t rs = ei[i].addr; + uint64_t re = rs + ei[i].size; - if ( rs == e && e820->map[i].type == type ) + if ( rs == e && ei[i].type == type ) { - e820->map[i].addr = s; + ei[i].addr = s; return 1; } - if ( re == s && e820->map[i].type == type && - (i + 1 == e820->nr_map || e820->map[i + 1].addr >= e) ) + if ( re == s && ei[i].type == type && + (i + 1 == e820.nr_map || ei[i + 1].addr >= e) ) { - e820->map[i].size += e - s; + ei[i].size += e - s; return 1; } @@ -574,20 +574,20 @@ int __init e820_add_range( return 0; } - if ( e820->nr_map >= ARRAY_SIZE(e820->map) ) + if ( e820.nr_map >= ARRAY_SIZE(e820.map) ) { printk(XENLOG_WARNING "E820: overflow while adding region" " %"PRIx64"-%"PRIx64"\n", s, e); return 0; } - memmove(e820->map + i + 1, e820->map + i, - (e820->nr_map - i) * sizeof(*e820->map)); + memmove(ei + i + 1, ei + i, + (e820.nr_map - i) * sizeof(*e820.map)); - e820->nr_map++; - e820->map[i].addr = s; - e820->map[i].size = e - s; - e820->map[i].type = type; + e820.nr_map++; + ei[i].addr = s; + ei[i].size = e - s; + ei[i].type = type; return 1; } @@ -694,7 +694,7 @@ unsigned long __init init_e820(const char *str, struct e820map *raw) machine_specific_memory_setup(raw); if ( cpu_has_hypervisor ) - hypervisor_e820_fixup(&e820); + hypervisor_e820_fixup(); printk("%s RAM map:\n", str); print_e820_memory_map(e820.map, e820.nr_map); diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c index aacc7a6167..912099564e 100644 --- a/xen/arch/x86/guest/hyperv/hyperv.c +++ b/xen/arch/x86/guest/hyperv/hyperv.c @@ -187,11 +187,11 @@ static int cf_check ap_setup(void) return setup_vp_assist(); } -static void __init cf_check e820_fixup(struct e820map *e820) +static void __init cf_check e820_fixup(void) { uint64_t s = HV_HCALL_MFN << PAGE_SHIFT; - if ( !e820_add_range(e820, s, s + PAGE_SIZE, E820_RESERVED) ) + if ( !e820_add_range(s, s + PAGE_SIZE, E820_RESERVED) ) panic("Unable to reserve Hyper-V hypercall range\n"); } diff --git a/xen/arch/x86/guest/hypervisor.c b/xen/arch/x86/guest/hypervisor.c index b8549a131a..e0b046cc6c 100644 --- a/xen/arch/x86/guest/hypervisor.c +++ b/xen/arch/x86/guest/hypervisor.c @@ -60,10 +60,10 @@ void hypervisor_resume(void) ops.resume(); } -void __init hypervisor_e820_fixup(struct e820map *e820) +void __init hypervisor_e820_fixup(void) { if ( ops.e820_fixup ) - ops.e820_fixup(e820); + ops.e820_fixup(); } int hypervisor_flush_tlb(const cpumask_t *mask, const void *va, diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index f93dfc89f7..2eed32fe46 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -306,10 +306,10 @@ static void cf_check resume(void) pv_console_init(); } -static void __init cf_check e820_fixup(struct e820map *e820) +static void __init cf_check e820_fixup(void) { if ( pv_shim ) - pv_shim_fixup_e820(e820); + pv_shim_fixup_e820(); } static int cf_check flush_tlb( diff --git a/xen/arch/x86/include/asm/e820.h b/xen/arch/x86/include/asm/e820.h index 213d5b5dd2..af90085d65 100644 --- a/xen/arch/x86/include/asm/e820.h +++ b/xen/arch/x86/include/asm/e820.h @@ -29,8 +29,7 @@ extern int reserve_e820_ram(struct e820map *e820, uint64_t s, uint64_t e); extern int e820_change_range_type( struct e820map *e820, uint64_t s, uint64_t e, uint32_t orig_type, uint32_t new_type); -extern int e820_add_range( - struct e820map *, uint64_t s, uint64_t e, uint32_t type); +extern int e820_add_range(uint64_t s, uint64_t e, uint32_t type); extern unsigned long init_e820(const char *str, struct e820map *raw); extern void print_e820_memory_map(const struct e820entry *map, unsigned int entries); diff --git a/xen/arch/x86/include/asm/guest/hypervisor.h b/xen/arch/x86/include/asm/guest/hypervisor.h index 4cffea3866..c8f18a035e 100644 --- a/xen/arch/x86/include/asm/guest/hypervisor.h +++ b/xen/arch/x86/include/asm/guest/hypervisor.h @@ -22,7 +22,7 @@ struct hypervisor_ops { /* Resume from suspension */ void (*resume)(void); /* Fix up e820 map */ - void (*e820_fixup)(struct e820map *e820); + void (*e820_fixup)(void); /* L0 assisted TLB flush */ int (*flush_tlb)(const cpumask_t *mask, const void *va, unsigned int flags); }; @@ -33,7 +33,7 @@ const char *hypervisor_probe(void); void hypervisor_setup(void); int hypervisor_ap_setup(void); void hypervisor_resume(void); -void hypervisor_e820_fixup(struct e820map *e820); +void hypervisor_e820_fixup(void); /* * L0 assisted TLB flush. * mask: cpumask of the dirty vCPUs that should be flushed. @@ -52,7 +52,7 @@ static inline const char *hypervisor_probe(void) { return NULL; } static inline void hypervisor_setup(void) { ASSERT_UNREACHABLE(); } static inline int hypervisor_ap_setup(void) { return 0; } static inline void hypervisor_resume(void) { ASSERT_UNREACHABLE(); } -static inline void hypervisor_e820_fixup(struct e820map *e820) {} +static inline void hypervisor_e820_fixup(void) {} static inline int hypervisor_flush_tlb(const cpumask_t *mask, const void *va, unsigned int flags) { diff --git a/xen/arch/x86/include/asm/pv/shim.h b/xen/arch/x86/include/asm/pv/shim.h index 5625b90b72..6153e27005 100644 --- a/xen/arch/x86/include/asm/pv/shim.h +++ b/xen/arch/x86/include/asm/pv/shim.h @@ -33,7 +33,7 @@ void pv_shim_online_memory(unsigned int nr, unsigned int order); void pv_shim_offline_memory(unsigned int nr, unsigned int order); domid_t get_initial_domain_id(void); uint64_t pv_shim_mem(uint64_t avail); -void pv_shim_fixup_e820(struct e820map *e820); +void pv_shim_fixup_e820(void); const struct platform_bad_page *pv_shim_reserved_pages(unsigned int *size); typeof(do_event_channel_op) pv_shim_event_channel_op; typeof(do_grant_table_op) pv_shim_grant_table_op; @@ -85,7 +85,7 @@ static inline uint64_t pv_shim_mem(uint64_t avail) ASSERT_UNREACHABLE(); return 0; } -static inline void pv_shim_fixup_e820(struct e820map *e820) +static inline void pv_shim_fixup_e820(void) { ASSERT_UNREACHABLE(); } diff --git a/xen/arch/x86/pv/shim.c b/xen/arch/x86/pv/shim.c index 4044087119..ca0e639db3 100644 --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -98,17 +98,17 @@ uint64_t pv_shim_mem(uint64_t avail) return shim_nrpages; } -static void __init mark_pfn_as_ram(struct e820map *e820, uint64_t pfn) +static void __init mark_pfn_as_ram(uint64_t pfn) { - if ( !e820_add_range(e820, pfn << PAGE_SHIFT, + if ( !e820_add_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE, E820_RAM) && - !e820_change_range_type(e820, pfn << PAGE_SHIFT, + !e820_change_range_type(&e820, pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE, E820_RESERVED, E820_RAM) ) panic("Unable to add/change memory type of pfn %#lx to RAM\n", pfn); } -void __init pv_shim_fixup_e820(struct e820map *e820) +void __init pv_shim_fixup_e820(void) { uint64_t pfn = 0; unsigned int i = 0; @@ -120,7 +120,7 @@ void __init pv_shim_fixup_e820(struct e820map *e820) rc = xen_hypercall_hvm_get_param(p, &pfn); \ if ( rc ) \ panic("Unable to get " #p "\n"); \ - mark_pfn_as_ram(e820, pfn); \ + mark_pfn_as_ram(pfn); \ ASSERT(i < ARRAY_SIZE(reserved_pages)); \ reserved_pages[i++].mfn = pfn; \ }) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 2bfc1fd00f..3358d9a0ff 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -688,7 +688,7 @@ static void __init parse_video_info(void) #endif } -static void __init kexec_reserve_area(struct e820map *e820) +static void __init kexec_reserve_area(void) { #ifdef CONFIG_KEXEC unsigned long kdump_start = kexec_crash_area.start; @@ -702,7 +702,7 @@ static void __init kexec_reserve_area(struct e820map *e820) is_reserved = true; - if ( !reserve_e820_ram(e820, kdump_start, kdump_start + kdump_size) ) + if ( !reserve_e820_ram(&boot_e820, kdump_start, kdump_start + kdump_size) ) { printk("Kdump: DISABLED (failed to reserve %luMB (%lukB) at %#lx)" "\n", kdump_size >> 20, kdump_size >> 10, kdump_start); @@ -1310,7 +1310,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) if ( e820.map[i].type == E820_RAM ) nr_pages += e820.map[i].size >> PAGE_SHIFT; set_kexec_crash_area_size((u64)nr_pages << PAGE_SHIFT); - kexec_reserve_area(&boot_e820); + kexec_reserve_area(); initial_images = mod; nr_initial_images = mbi->mods_count; @@ -1497,7 +1497,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) reserve_e820_ram(&boot_e820, __pa(_stext), __pa(__2M_rwdata_end)); /* Late kexec reservation (dynamic start address). */ - kexec_reserve_area(&boot_e820); + kexec_reserve_area(); setup_max_pdx(raw_max_page); if ( highmem_start ) diff --git a/xen/arch/x86/x86_64/mmconf-fam10h.c b/xen/arch/x86/x86_64/mmconf-fam10h.c index a834ab3149..36b32eb769 100644 --- a/xen/arch/x86/x86_64/mmconf-fam10h.c +++ b/xen/arch/x86/x86_64/mmconf-fam10h.c @@ -135,7 +135,7 @@ static void __init get_fam10h_pci_mmconf_base(void) return; out: - if (e820_add_range(&e820, start, start + SIZE, E820_RESERVED)) + if (e820_add_range(start, start + SIZE, E820_RESERVED)) fam10h_pci_mmconf_base = start; } diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c index 3b577c9b39..db993d6df2 100644 --- a/xen/drivers/passthrough/amd/iommu_acpi.c +++ b/xen/drivers/passthrough/amd/iommu_acpi.c @@ -418,7 +418,7 @@ static int __init parse_ivmd_block(const struct acpi_ivrs_memory *ivmd_block) if ( type == RAM_TYPE_UNKNOWN ) { - if ( e820_add_range(&e820, addr, addr + PAGE_SIZE, + if ( e820_add_range(addr, addr + PAGE_SIZE, E820_RESERVED) ) continue; AMD_IOMMU_ERROR("IVMD: page at %lx couldn't be reserved\n", -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 17 02:44:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 17 Aug 2023 02:44:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.585112.916115 (Exim 4.92) (envelope-from ) id 1qWSzW-0004kN-Mn; Thu, 17 Aug 2023 02:44:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 585112.916115; Thu, 17 Aug 2023 02:44:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWSzW-0004kF-JA; Thu, 17 Aug 2023 02:44:06 +0000 Received: by outflank-mailman (input) for mailman id 585112; Thu, 17 Aug 2023 02:44:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWSzV-0004k9-22 for xen-changelog@lists.xenproject.org; Thu, 17 Aug 2023 02:44:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWSzV-0005hc-06 for xen-changelog@lists.xenproject.org; Thu, 17 Aug 2023 02:44:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWSzU-0003lK-V0 for xen-changelog@lists.xenproject.org; Thu, 17 Aug 2023 02:44:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=v/xJNqXtFVjWI+EoHtmMwvOZG+QUlothXfdhPC/uivI=; b=X5mUZ66tujnF0GxIMRgz9OV1rM zvr1mql4i92qHScfrhm0nrg3/fmuXsaEP8VNHdT1rvZoOglFVCVOC7DHxMTarLgONOA3iXNWi1Xnl QOJQHzgF1yontSRvp/k0TZ0cw6tRwPRFeKgiIh6y9jT1aOH3wEtlSKTat0Sg2GLiKino=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [qemu-xen master] Merge tag 'v8.0.4' into 'staging' Message-Id: Date: Thu, 17 Aug 2023 02:44:04 +0000 === This changeset includes merge from high-traffic branch === Commits on that branch are not reported individually. commit 0df9387c8983e1b1e72d8c574356f572342c03e6 Merge: 83a9cdbd65ceb4a443630aed011a00ef217ed408 690346043db881debcace7d22249f3355527c5f9 Author: Anthony PERARD AuthorDate: Wed Aug 16 10:43:53 2023 +0100 Commit: Anthony PERARD CommitDate: Wed Aug 16 10:43:53 2023 +0100 Merge tag 'v8.0.4' into 'staging' .cirrus.yml | 109 - .git-blame-ignore-revs | 21 + .gitlab-ci.d/base.yml | 9 +- .gitlab-ci.d/buildtest-template.yml | 26 +- .gitlab-ci.d/buildtest.yml | 181 +- .gitlab-ci.d/cirrus.yml | 6 +- .gitlab-ci.d/cirrus/build.yml | 7 +- .gitlab-ci.d/cirrus/freebsd-12.vars | 2 +- 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docs/system/arm/aspeed.rst | 2 + docs/system/arm/cpu-features.rst | 76 +- docs/system/arm/cubieboard.rst | 1 + docs/system/arm/emulation.rst | 4 + docs/system/arm/nuvoton.rst | 2 +- docs/system/arm/orangepi.rst | 1 + docs/system/arm/stm32.rst | 1 + docs/system/arm/virt.rst | 18 + docs/system/device-emulation.rst | 1 + docs/system/devices/igb.rst | 71 + docs/system/i386/xen.rst | 92 + docs/system/index.rst | 4 +- docs/system/introduction.rst | 220 + docs/system/loongarch/loongson3.rst | 129 - docs/system/loongarch/virt.rst | 108 + docs/system/multi-process.rst | 2 + docs/system/ppc/ppce500.rst | 13 + docs/system/quickstart.rst | 21 - docs/system/s390x/pcidevices.rst | 41 + docs/system/target-i386.rst | 1 + docs/system/target-mips.rst | 14 - docs/system/target-s390x.rst | 1 + docs/tools/index.rst | 3 +- docs/tools/virtiofsd.rst | 403 - docs/user/index.rst | 2 + dump/dump-hmp-cmds.c | 2 +- dump/dump.c | 48 +- dump/meson.build | 6 +- dump/win_dump.c | 39 +- dump/win_dump.h | 5 +- ebpf/rss.bpf.skeleton.h | 1171 +- fsdev/p9array.h | 2 - gdb-xml/aarch64-pauth.xml | 15 + gdb-xml/microblaze-core.xml | 67 + gdb-xml/microblaze-stack-protect.xml | 12 + gdbstub/gdbstub.c | 1661 +- gdbstub/internals.h | 218 +- gdbstub/meson.build | 36 +- gdbstub/softmmu.c | 606 +- gdbstub/syscalls.c | 205 + gdbstub/trace-events | 4 +- gdbstub/user-target.c | 283 + gdbstub/user.c | 426 +- gitdm.config | 3 + hmp-commands-info.hx | 14 + hmp-commands.hx | 35 +- hw/9pfs/9p-local.c | 40 +- hw/9pfs/9p-synth.c | 22 +- hw/9pfs/9p-util.h | 29 +- hw/9pfs/9p.c | 2 - hw/9pfs/codir.c | 1 - hw/9pfs/cofile.c | 1 - hw/9pfs/cofs.c | 1 - hw/9pfs/coth.h | 2 +- hw/9pfs/coxattr.c | 1 - hw/9pfs/meson.build | 2 +- hw/9pfs/xen-9p-backend.c | 32 +- hw/Kconfig | 1 + hw/acpi/Kconfig | 13 +- hw/acpi/acpi-pci-hotplug-stub.c | 9 +- hw/acpi/acpi-qmp-cmds.c | 30 + hw/acpi/acpi-stub.c | 4 +- hw/acpi/acpi-x86-stub.c | 5 +- hw/acpi/acpi_interface.c | 10 + hw/acpi/aml-build.c | 2 +- hw/acpi/core.c | 14 +- hw/acpi/cpu.c | 4 +- hw/acpi/erst.c | 2 +- hw/acpi/ich9.c | 39 +- hw/acpi/ich9_tco.c | 275 + hw/acpi/memory_hotplug.c | 3 +- hw/acpi/meson.build | 7 +- hw/acpi/pci-bridge-stub.c | 20 + hw/acpi/pci-bridge.c | 37 + hw/acpi/pcihp.c | 148 +- hw/acpi/piix4.c | 35 +- hw/acpi/tco.c | 260 - hw/acpi/trace-events | 2 + hw/acpi/vmgenid.c | 18 - hw/alpha/alpha_sys.h | 1 - hw/alpha/dp264.c | 1 - hw/alpha/pci.c | 1 + hw/alpha/typhoon.c | 2 +- hw/arm/Kconfig | 14 +- hw/arm/allwinner-a10.c | 41 + hw/arm/allwinner-h3.c | 38 +- hw/arm/armsse.c | 3 +- hw/arm/aspeed.c | 276 +- hw/arm/aspeed_ast10x0.c | 83 +- hw/arm/aspeed_ast2600.c | 17 +- hw/arm/aspeed_eeprom.c | 127 + hw/arm/aspeed_eeprom.h | 25 + hw/arm/aspeed_soc.c | 18 +- hw/arm/bcm2836.c | 9 +- hw/arm/boot.c | 22 +- hw/arm/collie.c | 27 +- hw/arm/cubieboard.c | 12 + hw/arm/exynos4210.c | 4 +- hw/arm/fby35.c | 8 +- hw/arm/fsl-imx6ul.c | 2 +- hw/arm/fsl-imx7.c | 41 +- hw/arm/gumstix.c | 45 +- hw/arm/mainstone.c | 37 +- hw/arm/meson.build | 13 +- hw/arm/mps2-tz.c | 2 +- hw/arm/mps2.c | 41 +- hw/arm/msf2-som.c | 5 +- hw/arm/musicpal.c | 18 +- hw/arm/npcm7xx.c | 25 +- hw/arm/npcm7xx_boards.c | 22 +- hw/arm/nseries.c | 30 +- hw/arm/olimex-stm32-h405.c | 69 + hw/arm/omap1.c | 115 +- hw/arm/omap2.c | 40 +- hw/arm/omap_sx1.c | 57 +- hw/arm/orangepi.c | 1 + hw/arm/palm.c | 4 +- hw/arm/pxa2xx.c | 8 +- hw/arm/realview.c | 2 +- hw/arm/sbsa-ref.c | 6 +- hw/arm/smmu-common.c | 48 +- hw/arm/smmuv3-internal.h | 7 + hw/arm/smmuv3.c | 94 +- hw/arm/spitz.c | 6 +- hw/arm/stellaris.c | 84 +- hw/arm/stm32f405_soc.c | 8 + hw/arm/strongarm.c | 24 +- hw/arm/tosa.c | 2 +- hw/arm/versatilepb.c | 8 +- hw/arm/vexpress.c | 12 +- hw/arm/virt.c | 437 +- hw/arm/xlnx-versal.c | 1 - hw/arm/z2.c | 16 +- hw/audio/ac97.c | 47 +- hw/audio/ac97.h | 65 + hw/audio/cs4231a.c | 5 +- hw/audio/es1370.c | 12 +- hw/audio/gus.c | 5 +- hw/audio/hda-codec.c | 7 +- hw/audio/sb16.c | 7 +- hw/audio/trace-events | 6 + hw/audio/via-ac97.c | 455 +- hw/block/block.c | 36 +- hw/block/dataplane/meson.build | 2 +- hw/block/dataplane/virtio-blk.c | 17 +- hw/block/dataplane/xen-block.c | 12 +- hw/block/fdc-isa.c | 5 +- hw/block/fdc.c | 4 +- hw/block/m25p80.c | 7 +- hw/block/m25p80_sfdp.c | 40 + hw/block/m25p80_sfdp.h | 2 + hw/block/meson.build | 2 +- hw/block/nand.c | 222 +- hw/block/onenand.c | 128 +- hw/block/pflash_cfi01.c | 3 +- hw/block/tc58128.c | 136 +- hw/block/virtio-blk.c | 49 +- hw/block/xen-block.c | 23 +- hw/char/cadence_uart.c | 6 +- hw/char/digic-uart.c | 4 +- hw/char/etraxfs_ser.c | 4 +- hw/char/ibex_uart.c | 1 + hw/char/meson.build | 2 +- hw/char/omap_uart.c | 7 +- hw/char/parallel.c | 24 +- hw/char/pl011.c | 110 +- hw/char/riscv_htif.c | 172 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 68 +- hw/char/sifive_uart.c | 4 +- hw/char/xen_console.c | 50 +- hw/char/xilinx_uartlite.c | 4 +- hw/core/cpu-common.c | 10 +- hw/core/irq.c | 9 +- hw/core/loader.c | 147 +- hw/core/machine-hmp-cmds.c | 210 +- hw/core/machine-qmp-cmds.c | 175 +- hw/core/machine-smp.c | 4 + hw/core/machine.c | 24 +- hw/core/nmi.c | 3 +- hw/core/numa.c | 8 +- hw/core/or-irq.c | 18 +- hw/core/ptimer.c | 2 +- hw/core/qdev-clock.c | 2 +- hw/core/qdev-properties-system.c | 34 +- hw/core/qdev.c | 70 +- hw/core/sysbus.c | 4 +- hw/core/trace-events | 6 - hw/cpu/meson.build | 4 +- hw/cxl/cxl-cdat.c | 2 +- hw/cxl/cxl-component-utils.c | 20 +- hw/cxl/cxl-device-utils.c | 2 +- hw/cxl/cxl-host.c | 33 +- hw/cxl/cxl-mailbox-utils.c | 28 +- hw/display/Kconfig | 2 +- hw/display/ati_int.h | 2 +- hw/display/bochs-display.c | 2 +- hw/display/cirrus_vga.c | 6 +- hw/display/g364fb.c | 4 +- hw/display/meson.build | 24 +- hw/display/omap_dss.c | 15 +- hw/display/omap_lcdc.c | 9 +- hw/display/qxl-render.c | 4 +- hw/display/qxl.c | 28 +- hw/display/qxl.h | 5 +- hw/display/sm501.c | 562 +- hw/display/trace-events | 1 - hw/display/vga-pci.c | 2 +- hw/display/vga.c | 8 +- hw/display/vhost-user-gpu.c | 19 + hw/display/virtio-gpu-udmabuf.c | 2 +- hw/display/virtio-gpu-virgl.c | 1 + hw/display/virtio-vga.c | 15 +- hw/display/virtio-vga.h | 2 +- hw/display/vmware_vga.c | 6 +- hw/display/xenfb.c | 32 +- hw/dma/etraxfs_dma.c | 864 +- hw/dma/i82374.c | 2 +- hw/dma/omap_dma.c | 15 +- hw/dma/pl330.c | 14 +- hw/dma/xilinx_axidma.c | 4 +- hw/dma/xlnx_csu_dma.c | 4 +- hw/gpio/max7310.c | 27 +- hw/gpio/omap_gpio.c | 48 +- hw/hppa/machine.c | 3 +- hw/hyperv/syndbg.c | 6 +- hw/hyperv/vmbus.c | 14 +- hw/i2c/Kconfig | 6 +- hw/i2c/allwinner-i2c.c | 479 + hw/i2c/arm_sbcon_i2c.c | 107 + hw/i2c/aspeed_i2c.c | 2 + hw/i2c/bitbang_i2c.c | 82 +- hw/i2c/core.c | 37 +- hw/i2c/meson.build | 5 +- hw/i2c/mpc_i2c.c | 4 +- hw/i2c/pmbus_device.c | 8 +- hw/i2c/smbus_ich9.c | 44 +- hw/i2c/trace-events | 12 + hw/i2c/versatile_i2c.c | 112 - hw/i386/Kconfig | 10 +- hw/i386/acpi-build.c | 418 +- hw/i386/acpi-common.c | 7 +- hw/i386/acpi-microvm.c | 3 +- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 41 +- hw/i386/intel_iommu_internal.h | 9 + hw/i386/kvm/i8259.c | 4 +- hw/i386/kvm/ioapic.c | 7 +- hw/i386/kvm/meson.build | 14 + hw/i386/kvm/trace-events | 20 + hw/i386/kvm/trace.h | 1 + hw/i386/kvm/xen-stubs.c | 44 + hw/i386/kvm/xen_evtchn.c | 2357 +++ hw/i386/kvm/xen_evtchn.h | 88 + hw/i386/kvm/xen_gnttab.c | 547 + hw/i386/kvm/xen_gnttab.h | 26 + hw/i386/kvm/xen_overlay.c | 272 + hw/i386/kvm/xen_overlay.h | 26 + hw/i386/kvm/xen_xenstore.c | 1728 +++ hw/i386/kvm/xen_xenstore.h | 20 + hw/i386/kvm/xenstore_impl.c | 1927 +++ hw/i386/kvm/xenstore_impl.h | 63 + hw/i386/microvm.c | 30 +- hw/i386/multiboot.c | 8 +- hw/i386/pc.c | 129 +- hw/i386/pc_piix.c | 64 +- hw/i386/pc_q35.c | 81 +- hw/i386/sgx.c | 16 +- hw/i386/x86-iommu.c | 2 +- hw/i386/x86.c | 27 +- hw/i386/xen/meson.build | 5 +- hw/i386/xen/xen-hvm.c | 54 +- hw/i386/xen/xen-mapcache.c | 18 +- hw/i386/xen/xen_platform.c | 65 +- hw/i386/xen/xen_pvdevice.c | 2 +- hw/ide/ahci.c | 13 +- hw/ide/ahci_internal.h | 2 +- hw/ide/atapi.c | 13 +- hw/ide/cmd646.c | 32 +- hw/ide/core.c | 207 +- hw/ide/ich.c | 1 + hw/ide/ioport.c | 10 - hw/ide/isa.c | 22 +- hw/ide/macio.c | 15 +- hw/ide/microdrive.c | 369 +- hw/ide/mmio.c | 37 +- hw/ide/pci.c | 11 +- hw/ide/piix.c | 50 +- hw/ide/qdev.c | 34 +- hw/ide/sii3112.c | 4 +- hw/ide/trace-events | 3 +- hw/ide/via.c | 16 +- hw/input/adb.c | 2 +- hw/input/ads7846.c | 54 +- hw/input/ps2.c | 51 +- hw/input/tsc2005.c | 2 +- hw/input/tsc210x.c | 4 +- hw/intc/Kconfig | 3 + hw/intc/apic.c | 6 +- hw/intc/apic_common.c | 30 +- hw/intc/arm_gic_common.c | 7 +- hw/intc/arm_gic_kvm.c | 14 +- hw/intc/arm_gicv3_common.c | 7 +- hw/intc/arm_gicv3_cpuif.c | 18 +- hw/intc/arm_gicv3_dist.c | 12 +- hw/intc/arm_gicv3_its.c | 28 +- hw/intc/arm_gicv3_its_common.c | 7 +- hw/intc/arm_gicv3_its_kvm.c | 14 +- hw/intc/arm_gicv3_kvm.c | 14 +- hw/intc/arm_gicv3_redist.c | 8 +- hw/intc/armv7m_nvic.c | 64 +- hw/intc/exynos4210_combiner.c | 10 +- hw/intc/i8259.c | 25 +- hw/intc/i8259_common.c | 24 +- hw/intc/ioapic.c | 7 +- hw/intc/ioapic_common.c | 4 +- hw/intc/ioapic_internal.h | 118 + hw/intc/kvm_irqcount.c | 49 + hw/intc/loongarch_pch_msi.c | 29 +- hw/intc/loongarch_pch_pic.c | 35 +- hw/intc/meson.build | 18 +- hw/intc/mips_gic.c | 4 +- hw/intc/omap_intc.c | 38 +- hw/intc/pnv_xive.c | 1 + hw/intc/pnv_xive2.c | 1 + hw/intc/riscv_aclint.c | 16 +- hw/intc/riscv_aplic.c | 4 +- hw/intc/riscv_imsic.c | 6 +- hw/intc/sifive_plic.c | 66 +- hw/intc/trace-events | 9 +- hw/intc/xics.c | 11 +- hw/intc/xilinx_intc.c | 28 +- hw/ipack/tpci200.c | 2 +- hw/ipmi/pci_ipmi_bt.c | 2 +- hw/ipmi/pci_ipmi_kcs.c | 2 +- hw/isa/Kconfig | 4 +- hw/isa/i82378.c | 19 +- hw/isa/isa-bus.c | 42 +- hw/isa/lpc_ich9.c | 47 +- hw/isa/piix3.c | 22 +- hw/isa/piix4.c | 41 +- hw/isa/trace-events | 5 + hw/isa/vt82c686.c | 54 +- hw/loongarch/Kconfig | 1 + hw/loongarch/acpi-build.c | 23 +- hw/loongarch/virt.c | 105 +- hw/m68k/next-cube.c | 1 + hw/m68k/q800.c | 1 + hw/m68k/virt.c | 10 +- hw/mem/cxl_type3.c | 320 +- hw/mem/cxl_type3_stubs.c | 17 + hw/mem/memory-device.c | 1 + hw/mem/meson.build | 2 + hw/mem/pc-dimm.c | 1 - hw/mem/sparse-mem.c | 14 +- hw/microblaze/petalogix_s3adsp1800_mmu.c | 7 +- hw/mips/Kconfig | 2 + hw/mips/bootloader.c | 139 +- hw/mips/boston.c | 8 +- hw/mips/cps.c | 35 +- hw/mips/fuloong2e.c | 2 +- hw/mips/gt64xxx_pci.c | 1234 -- hw/mips/jazz.c | 2 +- hw/mips/malta.c | 405 +- hw/mips/meson.build | 2 +- hw/mips/mips_int.c | 11 +- hw/mips/trace-events | 9 +- hw/misc/Kconfig | 14 +- hw/misc/allwinner-a10-ccm.c | 224 + hw/misc/allwinner-a10-dramc.c | 179 + hw/misc/applesmc.c | 1 + hw/misc/aspeed_hace.c | 21 +- hw/misc/aspeed_sdmc.c | 1 - hw/misc/auxbus.c | 2 +- hw/misc/axp209.c | 238 + hw/misc/edu.c | 5 + hw/misc/i2c-echo.c | 156 + hw/misc/imx6_src.c | 2 +- hw/misc/imx6ul_ccm.c | 6 - hw/misc/imx7_ccm.c | 49 +- hw/misc/iotkit-sysctl.c | 1 - hw/misc/ivshmem.c | 6 +- hw/misc/mac_via.c | 26 +- hw/misc/macio/cuda.c | 17 +- hw/misc/macio/gpio.c | 1 + hw/misc/macio/mac_dbdma.c | 4 +- hw/misc/macio/macio.c | 167 +- hw/misc/macio/pmu.c | 18 +- hw/misc/mchp_pfsoc_ioscb.c | 78 +- hw/misc/mchp_pfsoc_sysreg.c | 18 +- hw/misc/meson.build | 17 +- hw/misc/mips_cmgcr.c | 2 +- hw/misc/mips_itu.c | 30 +- hw/misc/mos6522.c | 8 +- hw/misc/mst_fpga.c | 4 +- hw/misc/omap_gpmc.c | 12 +- hw/misc/omap_l4.c | 7 +- hw/misc/omap_sdrc.c | 7 +- hw/misc/omap_tap.c | 5 +- hw/misc/pci-testdev.c | 2 +- hw/misc/pvpanic-pci.c | 2 +- hw/misc/sbsa_ec.c | 12 +- hw/misc/sga.c | 71 - hw/misc/sifive_u_otp.c | 7 - hw/misc/trace-events | 5 + hw/misc/xlnx-zynqmp-apu-ctrl.c | 1 - hw/net/Kconfig | 7 +- hw/net/allwinner-sun8i-emac.c | 4 +- hw/net/allwinner_emac.c | 4 +- hw/net/cadence_gem.c | 2 +- hw/net/can/can_kvaser_pci.c | 2 +- hw/net/can/can_mioe3680_pci.c | 2 +- hw/net/can/can_pcm3680_pci.c | 2 +- hw/net/can/ctucan_pci.c | 2 +- hw/net/e1000.c | 263 +- hw/net/e1000_common.h | 102 + hw/net/e1000_regs.h | 958 +- hw/net/e1000e.c | 102 +- hw/net/e1000e_core.c | 765 +- hw/net/e1000e_core.h | 70 +- hw/net/e1000x_common.c | 65 +- hw/net/e1000x_common.h | 138 +- hw/net/e1000x_regs.h | 971 ++ hw/net/eepro100.c | 2 +- hw/net/fsl_etsec/etsec.c | 15 +- hw/net/fsl_etsec/etsec.h | 17 - hw/net/fsl_etsec/miim.c | 5 +- hw/net/fsl_etsec/rings.c | 4 +- hw/net/ftgmac100.c | 4 +- hw/net/igb.c | 635 + hw/net/igb_common.h | 146 + hw/net/igb_core.c | 4199 ++++++ hw/net/igb_core.h | 145 + hw/net/igb_regs.h | 659 + hw/net/igbvf.c | 327 + hw/net/imx_fec.c | 8 +- hw/net/lan9118.c | 17 +- hw/net/meson.build | 3 + hw/net/ne2000-pci.c | 2 +- hw/net/net_rx_pkt.c | 112 +- hw/net/net_rx_pkt.h | 41 +- hw/net/net_tx_pkt.c | 360 +- hw/net/net_tx_pkt.h | 30 +- hw/net/pcnet-pci.c | 2 +- hw/net/pcnet.c | 4 +- hw/net/rocker/qmp-norocker.c | 12 +- hw/net/rocker/rocker-hmp-cmds.c | 316 + hw/net/rocker/rocker.c | 28 +- hw/net/rocker/rocker_desc.c | 4 +- hw/net/rocker/rocker_of_dpa.c | 13 +- hw/net/rtl8139.c | 2 +- hw/net/sungem.c | 2 +- hw/net/sunhme.c | 2 +- hw/net/trace-events | 52 +- hw/net/tulip.c | 2 +- hw/net/vhost_net-stub.c | 14 + hw/net/vhost_net.c | 18 + hw/net/virtio-net.c | 177 +- hw/net/vmxnet3.c | 69 +- hw/net/vmxnet3_defs.h | 2 +- hw/net/xen_nic.c | 25 +- hw/net/xilinx_axienet.c | 5 +- hw/net/xilinx_ethlite.c | 6 +- hw/nubus/nubus-device.c | 1 + hw/nvme/ctrl.c | 1012 +- hw/nvme/ns.c | 148 + hw/nvme/nvme.h | 94 +- hw/nvme/subsys.c | 94 +- hw/nvme/trace-events | 9 +- hw/nvram/eeprom_at24c.c | 88 +- hw/nvram/fw_cfg.c | 2 +- hw/nvram/mac_nvram.c | 28 + hw/openrisc/boot.c | 1 + hw/pci-bridge/cxl_downstream.c | 3 +- hw/pci-bridge/cxl_root_port.c | 78 +- hw/pci-bridge/cxl_upstream.c | 1 - hw/pci-bridge/dec.c | 164 - hw/pci-bridge/dec.h | 9 - hw/pci-bridge/gen_pcie_root_port.c | 7 +- hw/pci-bridge/i82801b11.c | 5 +- hw/pci-bridge/meson.build | 2 - hw/pci-bridge/pci_bridge_dev.c | 2 - hw/pci-bridge/pci_expander_bridge.c | 47 +- hw/pci-bridge/pcie_pci_bridge.c | 1 - hw/pci-bridge/pcie_root_port.c | 9 +- hw/pci-bridge/simba.c | 1 - hw/pci-bridge/xio3130_downstream.c | 1 - hw/pci-bridge/xio3130_upstream.c | 1 - hw/pci-host/Kconfig | 6 + hw/pci-host/bonito.c | 53 +- hw/pci-host/designware.c | 1 - hw/pci-host/dino.c | 2 +- hw/pci-host/grackle.c | 4 +- hw/pci-host/gt64120.c | 1288 ++ hw/pci-host/i440fx.c | 3 +- hw/pci-host/meson.build | 1 + hw/pci-host/mv64361.c | 14 +- hw/pci-host/pnv_phb.c | 29 +- hw/pci-host/pnv_phb.h | 2 +- hw/pci-host/pnv_phb3.c | 1 + hw/pci-host/pnv_phb3_msi.c | 22 +- hw/pci-host/pnv_phb4.c | 2 +- hw/pci-host/pnv_phb4_pec.c | 62 +- hw/pci-host/ppce500.c | 6 +- hw/pci-host/q35.c | 3 +- hw/pci-host/raven.c | 13 +- hw/pci-host/sh_pci.c | 2 +- hw/pci-host/trace-events | 7 + hw/pci-host/uninorth.c | 44 +- hw/pci-host/versatile.c | 5 +- hw/pci-host/xilinx-pcie.c | 1 - hw/pci/meson.build | 2 + hw/pci/msi.c | 12 +- hw/pci/msix.c | 9 + hw/pci/pci-hmp-cmds.c | 239 + hw/pci/pci-internal.h | 24 + hw/pci/pci-qmp-cmds.c | 199 + hw/pci/pci-stub.c | 9 +- hw/pci/pci.c | 381 +- hw/pci/pci_bridge.c | 16 +- hw/pci/pci_host.c | 25 +- hw/pci/pcie.c | 36 +- hw/pci/pcie_aer.c | 130 +- hw/pci/pcie_host.c | 2 +- hw/pci/pcie_port.c | 49 +- hw/pci/pcie_sriov.c | 7 +- hw/pci/shpc.c | 114 +- hw/pci/slotid_cap.c | 2 +- hw/pci/trace-events | 1 + hw/ppc/Kconfig | 4 +- hw/ppc/e500.c | 77 +- hw/ppc/e500.h | 1 + hw/ppc/e500plat.c | 10 +- hw/ppc/mac_newworld.c | 3 +- hw/ppc/mac_oldworld.c | 11 +- hw/ppc/pegasos2.c | 43 +- hw/ppc/pnv.c | 73 +- hw/ppc/pnv_core.c | 1 + hw/ppc/pnv_homer.c | 1 + hw/ppc/pnv_lpc.c | 3 +- hw/ppc/pnv_psi.c | 1 + hw/ppc/pnv_xscom.c | 1 + hw/ppc/ppc.c | 43 +- hw/ppc/ppc405_uc.c | 2 - hw/ppc/ppc440_bamboo.c | 1 - hw/ppc/ppc440_pcix.c | 2 +- hw/ppc/ppc4xx_pci.c | 2 +- hw/ppc/ppc4xx_sdram.c | 18 +- hw/ppc/prep.c | 11 +- hw/ppc/sam460ex.c | 4 +- hw/ppc/spapr.c | 18 +- hw/ppc/spapr_drc.c | 4 +- hw/ppc/spapr_hcall.c | 1 + hw/ppc/spapr_pci.c | 15 +- hw/ppc/spapr_pci_vfio.c | 1 + hw/ppc/spapr_softmmu.c | 2 + hw/ppc/virtex_ml507.c | 2 +- hw/rdma/rdma_utils.c | 1 + hw/rdma/rdma_utils.h | 1 - hw/rdma/vmw/pvrdma.h | 2 +- hw/rdma/vmw/pvrdma_cmd.c | 66 +- hw/rdma/vmw/pvrdma_dev_ring.c | 1 - hw/rdma/vmw/pvrdma_qp_ops.c | 6 +- hw/remote/machine.c | 4 +- hw/remote/proxy-memory-listener.c | 1 - hw/remote/remote-obj.c | 1 - hw/remote/vfio-user-obj.c | 7 +- hw/riscv/Kconfig | 23 +- hw/riscv/boot.c | 234 +- hw/riscv/meson.build | 1 + hw/riscv/microchip_pfsoc.c | 148 +- hw/riscv/numa.c | 14 +- hw/riscv/opentitan.c | 98 +- hw/riscv/shakti_c.c | 1 + hw/riscv/sifive_e.c | 5 +- hw/riscv/sifive_u.c | 80 +- hw/riscv/spike.c | 114 +- hw/riscv/virt-acpi-build.c | 417 + hw/riscv/virt.c | 632 +- hw/rtc/exynos4210_rtc.c | 4 +- hw/rtc/m48t59-isa.c | 2 +- hw/rtc/m48t59.c | 150 +- hw/rtc/mc146818rtc.c | 149 +- hw/rtc/meson.build | 3 +- hw/rtc/twl92230.c | 160 +- hw/s390x/event-facility.c | 3 +- hw/s390x/pv.c | 74 + hw/s390x/s390-pci-bus.c | 28 + hw/s390x/s390-pci-inst.c | 56 +- hw/s390x/s390-pci-vfio.c | 13 + hw/s390x/s390-stattrib.c | 11 +- hw/s390x/s390-virtio-ccw.c | 21 +- hw/s390x/virtio-ccw-serial.c | 1 - hw/scsi/esp-pci.c | 2 +- hw/scsi/lsi53c895a.c | 2 +- hw/scsi/mptsas.h | 2 +- hw/scsi/scsi-bus.c | 4 +- hw/scsi/scsi-disk.c | 28 +- hw/scsi/scsi-generic.c | 11 +- hw/scsi/vhost-scsi-common.c | 1 + hw/scsi/viosrp.h | 3 +- hw/scsi/virtio-scsi.c | 170 +- hw/sd/omap_mmc.c | 9 +- hw/sd/sd.c | 184 +- hw/sd/sdhci-internal.h | 1 + hw/sd/sdhci.c | 32 +- hw/sensor/adm1272.c | 1 - hw/sensor/dps310.c | 1 - hw/sh4/r2d.c | 4 +- hw/sh4/sh7750.c | 4 +- hw/sh4/sh7750_regs.h | 3 +- hw/smbios/smbios-stub.c | 4 +- hw/smbios/smbios.c | 1 + hw/sparc64/niagara.c | 1 + hw/sparc64/sun4u.c | 13 +- hw/ssi/aspeed_smc.c | 5 +- hw/ssi/ibex_spi_host.c | 1 + hw/ssi/meson.build | 2 +- hw/ssi/npcm_pspi.c | 221 + hw/ssi/omap_spi.c | 7 +- hw/ssi/sifive_spi.c | 2 +- hw/ssi/trace-events | 5 + hw/ssi/xilinx_spi.c | 5 +- hw/ssi/xilinx_spips.c | 8 +- hw/timer/digic-timer.c | 4 +- hw/timer/etraxfs_timer.c | 3 +- hw/timer/exynos4210_mct.c | 2 +- hw/timer/exynos4210_pwm.c | 4 +- hw/timer/hpet.c | 1 + hw/timer/imx_epit.c | 370 +- hw/timer/imx_gpt.c | 25 + hw/timer/omap_gptimer.c | 22 +- hw/timer/omap_synctimer.c | 4 +- hw/timer/xilinx_timer.c | 27 +- hw/tpm/meson.build | 4 +- hw/usb/ccid-card-emulated.c | 2 +- hw/usb/dev-smartcard-reader.c | 7 +- hw/usb/dev-storage-bot.c | 1 - hw/usb/dev-storage-classic.c | 1 - hw/usb/dev-uas.c | 2 +- hw/usb/hcd-ehci.h | 3 +- hw/usb/hcd-ohci-pci.c | 2 +- hw/usb/hcd-ohci.c | 463 +- hw/usb/hcd-ohci.h | 11 +- hw/usb/hcd-uhci.c | 23 +- hw/usb/hcd-uhci.h | 8 +- hw/usb/hcd-xhci-nec.c | 8 +- hw/usb/hcd-xhci-pci.h | 1 + hw/usb/imx-usb-phy.c | 19 +- hw/usb/meson.build | 6 +- hw/usb/trace-events | 4 + hw/usb/u2f.h | 16 +- hw/usb/vt82c686-uhci-pci.c | 12 - hw/usb/xen-usb.c | 29 +- hw/vfio/ccw.c | 40 +- hw/vfio/common.c | 765 +- hw/vfio/display.c | 1 + hw/vfio/igd.c | 1 + hw/vfio/migration.c | 768 +- hw/vfio/pci.c | 12 +- hw/vfio/pci.h | 2 +- hw/vfio/trace-events | 35 +- hw/virtio/Kconfig | 5 + hw/virtio/meson.build | 45 +- hw/virtio/trace-events | 6 +- hw/virtio/vdpa-dev-pci.c | 102 + hw/virtio/vdpa-dev.c | 386 + hw/virtio/vhost-shadow-virtqueue.c | 52 +- hw/virtio/vhost-shadow-virtqueue.h | 5 +- hw/virtio/vhost-stub.c | 4 + hw/virtio/vhost-user-fs.c | 22 +- hw/virtio/vhost-user-gpio.c | 10 + hw/virtio/vhost-user.c | 45 +- hw/virtio/vhost-vdpa.c | 298 +- hw/virtio/vhost-vsock-common.c | 18 + hw/virtio/vhost.c | 199 +- hw/virtio/virtio-balloon.c | 20 +- hw/virtio/virtio-config-io.c | 204 + hw/virtio/virtio-crypto.c | 71 +- hw/virtio/virtio-hmp-cmds.c | 321 + hw/virtio/virtio-iommu.c | 10 +- hw/virtio/virtio-mem-pci.c | 4 +- hw/virtio/virtio-mem.c | 166 +- hw/virtio/virtio-mmio.c | 31 +- hw/virtio/virtio-pci.c | 425 +- hw/virtio/virtio-pmem-pci.c | 1 - hw/virtio/virtio-pmem.c | 1 + hw/virtio/virtio-qmp.c | 848 ++ hw/virtio/virtio-qmp.h | 30 + hw/virtio/virtio.c | 1024 +- hw/watchdog/trace-events | 4 + hw/watchdog/watchdog.c | 4 + hw/watchdog/wdt_aspeed.c | 24 +- hw/watchdog/wdt_i6300esb.c | 2 +- hw/watchdog/wdt_ib700.c | 2 +- hw/xen/Kconfig | 3 + hw/xen/meson.build | 6 +- hw/xen/trace-events | 2 +- hw/xen/xen-bus-helper.c | 62 +- hw/xen/xen-bus.c | 412 +- hw/xen/xen-legacy-backend.c | 308 +- hw/xen/xen-operations.c | 478 + hw/xen/xen_devconfig.c | 4 +- hw/xen/xen_pt.c | 6 +- hw/xen/xen_pt.h | 3 +- hw/xen/xen_pt_config_init.c | 2 +- hw/xen/xen_pt_graphics.c | 1 - hw/xen/xen_pt_msi.c | 4 +- hw/xen/xen_pvdev.c | 64 +- hw/xenpv/xen_machine_pv.c | 8 +- include/block/aio-wait.h | 2 +- include/block/aio.h | 26 +- include/block/aio_task.h | 2 - include/block/block-common.h | 52 +- include/block/block-copy.h | 9 +- include/block/block-global-state.h | 65 +- include/block/block-hmp-cmds.h | 2 + include/block/block-io.h | 235 +- include/block/block.h | 4 +- include/block/block_backup.h | 2 +- include/block/block_int-common.h | 256 +- include/block/block_int-global-state.h | 22 +- include/block/block_int-io.h | 66 +- include/block/block_int.h | 5 +- include/block/blockjob.h | 2 +- include/block/blockjob_int.h | 1 - include/block/dirty-bitmap.h | 11 +- include/block/graph-lock.h | 277 + include/block/nbd.h | 1 + include/block/nvme.h | 236 +- include/block/qapi.h | 16 +- include/block/raw-aio.h | 1 - include/block/thread-pool.h | 2 +- include/block/throttle-groups.h | 2 +- include/block/write-threshold.h | 2 - include/crypto/aes.h | 8 +- include/crypto/desrfb.h | 16 +- include/crypto/tlssession.h | 11 + include/disas/dis-asm.h | 76 +- include/elf.h | 1801 +-- include/exec/cpu-all.h | 17 +- include/exec/cpu-defs.h | 37 +- include/exec/cpu_ldst.h | 10 + include/exec/exec-all.h | 82 +- include/exec/gdbstub.h | 208 - include/exec/gen-icount.h | 15 +- include/exec/helper-head.h | 11 +- include/exec/helper-proto.h | 32 +- include/exec/hwaddr.h | 2 +- include/exec/memory-internal.h | 4 - include/exec/memory.h | 40 + include/exec/plugin-gen.h | 1 + include/exec/poison.h | 1 - include/exec/replay-core.h | 80 + include/exec/target_long.h | 42 + include/exec/tb-flush.h | 26 + include/exec/translate-all.h | 6 - include/exec/translator.h | 6 +- include/gdbstub/helpers.h | 103 + include/gdbstub/syscalls.h | 113 + include/gdbstub/user.h | 43 + include/hw/acpi/acpi.h | 4 +- include/hw/acpi/acpi_aml_interface.h | 3 + include/hw/acpi/acpi_dev_interface.h | 3 +- include/hw/acpi/erst.h | 3 + include/hw/acpi/ich9.h | 9 +- include/hw/acpi/ich9_tco.h | 82 + include/hw/acpi/pci.h | 4 + include/hw/acpi/pcihp.h | 11 +- include/hw/acpi/piix4.h | 4 +- include/hw/acpi/tco.h | 82 - include/hw/adc/npcm7xx_adc.h | 7 +- include/hw/arm/allwinner-a10.h | 29 +- include/hw/arm/allwinner-h3.h | 9 + include/hw/arm/armsse.h | 6 +- include/hw/arm/aspeed_soc.h | 19 + include/hw/arm/bcm2835_peripherals.h | 2 +- include/hw/arm/exynos4210.h | 4 +- include/hw/arm/fsl-imx6ul.h | 1 - include/hw/arm/fsl-imx7.h | 21 +- include/hw/arm/npcm7xx.h | 20 +- include/hw/arm/omap.h | 24 +- include/hw/arm/pxa.h | 11 +- include/hw/arm/raspi_platform.h | 3 +- include/hw/arm/smmu-common.h | 5 - include/hw/arm/smmuv3.h | 4 +- include/hw/arm/stm32f205_soc.h | 2 +- include/hw/arm/stm32f405_soc.h | 7 +- include/hw/arm/virt.h | 17 +- include/hw/arm/xlnx-versal.h | 6 +- include/hw/arm/xlnx-zynqmp.h | 2 +- include/hw/block/flash.h | 20 +- include/hw/block/swim.h | 1 + include/hw/boards.h | 7 +- include/hw/char/cmsdk-apb-uart.h | 33 - include/hw/char/goldfish_tty.h | 1 + include/hw/char/ibex_uart.h | 1 - include/hw/char/pl011.h | 41 +- include/hw/char/riscv_htif.h | 19 +- include/hw/char/xilinx_uartlite.h | 21 +- include/hw/core/cpu.h | 57 +- include/hw/core/tcg-cpu-ops.h | 43 + include/hw/cris/etraxfs.h | 1 + include/hw/cxl/cxl.h | 6 +- include/hw/cxl/cxl_cdat.h | 1 + include/hw/cxl/cxl_component.h | 30 +- include/hw/cxl/cxl_device.h | 15 +- include/hw/cxl/cxl_host.h | 1 - include/hw/cxl/cxl_pci.h | 4 - include/hw/display/macfb.h | 3 +- include/hw/dma/sifive_pdma.h | 2 + include/hw/elf_ops.h | 42 +- include/hw/hotplug.h | 2 + include/hw/i2c/allwinner-i2c.h | 61 + include/hw/i2c/arm_sbcon_i2c.h | 6 +- include/hw/i2c/bitbang_i2c.h | 2 + include/hw/i2c/i2c.h | 2 + include/hw/i2c/npcm7xx_smbus.h | 7 +- include/hw/i386/apic.h | 2 - include/hw/i386/apic_internal.h | 3 +- include/hw/i386/ich9.h | 256 - include/hw/i386/intel_iommu.h | 88 +- include/hw/i386/ioapic.h | 33 - include/hw/i386/ioapic_internal.h | 117 - include/hw/i386/pc.h | 14 +- include/hw/i386/sgx-epc.h | 1 + include/hw/i386/x86-iommu.h | 51 +- include/hw/i386/x86.h | 8 +- include/hw/ide.h | 12 - include/hw/ide/internal.h | 278 +- include/hw/ide/isa.h | 20 + include/hw/ide/mmio.h | 26 + include/hw/ide/pci.h | 9 +- include/hw/input/pl050.h | 1 - include/hw/input/ps2.h | 2 +- include/hw/input/tsc2xxx.h | 4 +- include/hw/intc/armv7m_nvic.h | 128 +- include/hw/intc/goldfish_pic.h | 2 + include/hw/intc/i8259.h | 16 +- include/hw/intc/ioapic.h | 33 + include/hw/intc/kvm_irqcount.h | 10 + include/hw/intc/loongarch_pch_msi.h | 11 +- include/hw/intc/loongarch_pch_pic.h | 8 +- include/hw/intc/mips_gic.h | 4 +- include/hw/intc/nios2_vic.h | 2 + include/hw/intc/sifive_plic.h | 1 - include/hw/isa/i8259_internal.h | 3 +- include/hw/isa/isa.h | 36 +- include/hw/isa/superio.h | 2 +- include/hw/isa/vt82c686.h | 26 +- include/hw/loader.h | 22 +- include/hw/loongarch/virt.h | 6 + include/hw/mips/bootloader.h | 10 +- include/hw/misc/allwinner-a10-ccm.h | 67 + include/hw/misc/allwinner-a10-dramc.h | 68 + include/hw/misc/aspeed_lpc.h | 2 - include/hw/misc/mac_via.h | 1 + include/hw/misc/macio/cuda.h | 1 + include/hw/misc/macio/macio.h | 2 +- include/hw/misc/macio/pmu.h | 1 + include/hw/misc/mchp_pfsoc_dmc.h | 2 + include/hw/misc/mchp_pfsoc_ioscb.h | 6 + include/hw/misc/mchp_pfsoc_sysreg.h | 3 + include/hw/misc/mips_cmgcr.h | 2 +- include/hw/misc/mips_itu.h | 9 +- include/hw/misc/mos6522.h | 5 +- include/hw/misc/npcm7xx_clk.h | 2 +- include/hw/misc/npcm7xx_gcr.h | 6 +- include/hw/misc/npcm7xx_mft.h | 7 +- include/hw/misc/npcm7xx_pwm.h | 3 +- include/hw/misc/npcm7xx_rng.h | 6 +- include/hw/misc/pvpanic.h | 1 + include/hw/misc/sifive_e_prci.h | 3 +- include/hw/misc/sifive_u_otp.h | 3 +- include/hw/misc/sifive_u_prci.h | 3 +- include/hw/misc/virt_ctrl.h | 2 + include/hw/misc/xlnx-versal-pmc-iou-slcr.h | 1 + include/hw/misc/xlnx-zynqmp-apu-ctrl.h | 2 +- include/hw/net/lasi_82596.h | 2 +- include/hw/net/mii.h | 14 +- include/hw/net/npcm7xx_emc.h | 5 +- include/hw/net/xlnx-zynqmp-can.h | 1 + include/hw/nvram/eeprom_at24c.h | 39 + include/hw/nvram/mac_nvram.h | 1 + include/hw/or-irq.h | 5 +- include/hw/pci-host/bonito.h | 18 + include/hw/pci-host/designware.h | 3 - include/hw/pci-host/gpex.h | 2 +- include/hw/pci-host/i440fx.h | 2 +- include/hw/pci-host/ls7a.h | 21 +- include/hw/pci-host/pnv_phb3.h | 3 - include/hw/pci-host/pnv_phb4.h | 16 +- include/hw/pci-host/q35.h | 2 +- include/hw/pci-host/sabre.h | 2 +- include/hw/pci-host/xilinx-pcie.h | 1 - include/hw/pci/msi.h | 3 +- include/hw/pci/pci.h | 359 +- include/hw/pci/pci_bridge.h | 15 +- include/hw/pci/pci_device.h | 350 + include/hw/pci/pci_ids.h | 1 - include/hw/pci/pcie.h | 9 - include/hw/pci/pcie_aer.h | 1 + include/hw/pci/pcie_doe.h | 1 - include/hw/pci/pcie_port.h | 8 +- include/hw/pci/pcie_regs.h | 17 +- include/hw/pci/pcie_sriov.h | 5 + include/hw/pci/shpc.h | 2 +- include/hw/pcmcia.h | 32 +- include/hw/ppc/pnv.h | 148 +- include/hw/ppc/pnv_chip.h | 147 + include/hw/ppc/pnv_core.h | 3 +- include/hw/ppc/pnv_homer.h | 2 +- include/hw/ppc/pnv_lpc.h | 11 +- include/hw/ppc/pnv_occ.h | 3 +- include/hw/ppc/pnv_pnor.h | 2 +- include/hw/ppc/pnv_psi.h | 2 +- include/hw/ppc/pnv_sbe.h | 3 +- include/hw/ppc/pnv_xive.h | 7 +- include/hw/ppc/pnv_xscom.h | 3 +- include/hw/ppc/spapr.h | 3 +- include/hw/ppc/vof.h | 2 +- include/hw/ppc/xics.h | 2 +- include/hw/ppc/xive2.h | 2 + include/hw/ppc/xive2_regs.h | 2 + include/hw/qdev-core.h | 50 +- include/hw/remote/iohub.h | 2 +- include/hw/remote/proxy.h | 2 +- include/hw/riscv/boot.h | 14 +- include/hw/riscv/boot_opensbi.h | 2 + include/hw/riscv/microchip_pfsoc.h | 10 +- include/hw/riscv/numa.h | 11 +- include/hw/riscv/opentitan.h | 16 +- include/hw/riscv/shakti_c.h | 2 +- include/hw/riscv/sifive_e.h | 9 +- include/hw/riscv/sifive_u.h | 6 +- include/hw/riscv/spike.h | 4 +- include/hw/riscv/virt.h | 16 +- include/hw/rtc/mc146818rtc.h | 15 +- include/hw/s390x/pv.h | 4 +- include/hw/s390x/s390-pci-bus.h | 6 + include/hw/scsi/scsi.h | 2 +- include/hw/sd/npcm7xx_sdhci.h | 4 +- include/hw/sd/sd.h | 8 +- include/hw/sd/sdhci.h | 3 +- include/hw/southbridge/ich9.h | 245 + include/hw/southbridge/piix.h | 3 +- include/hw/ssi/ibex_spi_host.h | 2 - include/hw/ssi/npcm_pspi.h | 53 + include/hw/ssi/sifive_spi.h | 3 + include/hw/timer/cmsdk-apb-timer.h | 1 - include/hw/timer/i8254.h | 3 +- include/hw/timer/i8254_internal.h | 2 +- include/hw/timer/imx_epit.h | 8 +- include/hw/timer/imx_gpt.h | 1 + include/hw/timer/sse-timer.h | 1 + include/hw/tricore/triboard.h | 1 - include/hw/tricore/tricore_testdevice.h | 1 - include/hw/usb/hcd-dwc3.h | 1 + include/hw/usb/hcd-musb.h | 2 + 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| 17 +- .../docker/dockerfiles/debian-xtensa-cross.docker | 5 + tests/docker/dockerfiles/fedora-cris-cross.docker | 5 + tests/docker/dockerfiles/fedora-i386-cross.docker | 6 + tests/docker/dockerfiles/fedora-win32-cross.docker | 16 +- tests/docker/dockerfiles/fedora-win64-cross.docker | 16 +- tests/docker/dockerfiles/fedora.docker | 15 +- tests/docker/dockerfiles/opensuse-leap.docker | 33 +- tests/docker/dockerfiles/python.docker | 6 +- tests/docker/dockerfiles/ubuntu2004.docker | 16 +- tests/docker/dockerfiles/ubuntu2204.docker | 153 + tests/docker/test-tsan | 2 +- tests/fp/berkeley-testfloat-3 | 2 +- tests/fp/fp-test.c | 19 +- tests/fp/meson.build | 3 +- tests/lcitool/libvirt-ci | 2 +- tests/lcitool/mappings.yml | 77 + tests/lcitool/projects/qemu.yml | 4 +- tests/lcitool/refresh | 32 +- tests/lcitool/targets/centos-stream-8.yml | 3 + tests/lcitool/targets/opensuse-leap-153.yml | 3 + tests/migration/guestperf/engine.py | 30 +- tests/migration/meson.build | 4 +- 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tests/qemu-iotests/tests/stream-under-throttle | 2 + tests/qtest/ahci-test.c | 3 + tests/qtest/arm-cpu-features.c | 23 +- tests/qtest/bios-tables-test.c | 250 +- tests/qtest/boot-sector.c | 6 +- tests/qtest/boot-serial-test.c | 2 +- tests/qtest/dbus-display-test.c | 5 +- tests/qtest/device-plug-test.c | 41 +- tests/qtest/display-vga-test.c | 65 +- tests/qtest/drive_del-test.c | 65 + tests/qtest/e1000e-test.c | 38 +- tests/qtest/erst-test.c | 7 +- tests/qtest/fuzz-lsi53c895a-test.c | 4 + tests/qtest/fuzz/fork_fuzz.c | 41 - tests/qtest/fuzz/fork_fuzz.h | 23 - tests/qtest/fuzz/fork_fuzz.ld | 56 - tests/qtest/fuzz/fuzz.c | 6 + tests/qtest/fuzz/fuzz.h | 2 +- tests/qtest/fuzz/generic_fuzz.c | 120 +- tests/qtest/fuzz/generic_fuzz_configs.h | 5 + tests/qtest/fuzz/i440fx_fuzz.c | 27 +- tests/qtest/fuzz/meson.build | 6 +- tests/qtest/fuzz/qos_fuzz.c | 3 +- tests/qtest/fuzz/virtio_blk_fuzz.c | 51 +- tests/qtest/fuzz/virtio_net_fuzz.c | 54 +- tests/qtest/fuzz/virtio_scsi_fuzz.c | 51 +- tests/qtest/hd-geo-test.c | 38 +- tests/qtest/hexloader-test.c | 6 +- tests/qtest/ide-test.c | 3 +- tests/qtest/igb-test.c | 256 + tests/qtest/ivshmem-test.c | 4 +- tests/qtest/libqmp.c | 2 +- tests/qtest/libqos/e1000e.c | 40 +- tests/qtest/libqos/e1000e.h | 18 +- tests/qtest/libqos/igb.c | 185 + tests/qtest/libqos/libqos-pc.h | 6 +- tests/qtest/libqos/libqos-spapr.h | 6 +- tests/qtest/libqos/libqos.h | 6 +- tests/qtest/libqos/meson.build | 1 + tests/qtest/libqos/virtio-9p.c | 1 + tests/qtest/libqtest.c | 186 +- tests/qtest/libqtest.h | 5 +- tests/qtest/meson.build | 46 +- tests/qtest/microbit-test.c | 2 +- tests/qtest/migration-helpers.h | 1 + tests/qtest/migration-test.c | 45 +- tests/qtest/netdev-socket.c | 549 + tests/qtest/npcm7xx_pwm-test.c | 27 +- tests/qtest/pvpanic-pci-test.c | 6 +- tests/qtest/pvpanic-test.c | 6 +- tests/qtest/pxe-test.c | 4 + tests/qtest/qmp-cmd-test.c | 3 +- tests/qtest/qom-test.c | 16 +- tests/qtest/readconfig-test.c | 42 +- tests/qtest/rtas-test.c | 2 +- tests/qtest/rtl8139-test.c | 18 +- tests/qtest/tco-test.c | 6 +- tests/qtest/test-filter-mirror.c | 6 +- tests/qtest/test-hmp.c | 2 +- tests/qtest/tpm-emu.c | 12 +- tests/qtest/usb-hcd-uhci-test.c | 4 +- tests/qtest/vhost-user-blk-test.c | 6 + tests/qtest/virtio-ccw-test.c | 6 +- tests/qtest/vnc-display-test.c | 15 +- tests/tcg/Makefile.target | 11 +- tests/tcg/aarch64/Makefile.softmmu-target | 7 + tests/tcg/aarch64/Makefile.target | 14 +- tests/tcg/aarch64/sme-outprod1.c | 83 + tests/tcg/aarch64/sysregs.c | 24 +- tests/tcg/aarch64/system/boot.S | 3 +- tests/tcg/aarch64/system/semiheap.c | 4 +- tests/tcg/hexagon/Makefile.target | 43 +- tests/tcg/hexagon/crt.S | 14 + tests/tcg/hexagon/fpstuff.c | 31 +- tests/tcg/hexagon/hvx_misc.c | 72 + tests/tcg/hexagon/mem_noshuf.c | 2 +- tests/tcg/hexagon/misc.c | 6 +- tests/tcg/hexagon/preg_alias.c | 10 +- tests/tcg/hexagon/reg_mut.c | 152 + tests/tcg/hexagon/scatter_gather.c | 513 +- tests/tcg/hexagon/signal_context.c | 84 + tests/tcg/hexagon/test_abs.S | 17 + tests/tcg/hexagon/test_bitcnt.S | 40 + tests/tcg/hexagon/test_bitsplit.S | 22 + tests/tcg/hexagon/test_call.S | 64 + tests/tcg/hexagon/test_clobber.S | 29 + tests/tcg/hexagon/test_cmp.S | 31 + tests/tcg/hexagon/test_dotnew.S | 38 + tests/tcg/hexagon/test_ext.S | 13 + tests/tcg/hexagon/test_fibonacci.S | 30 + tests/tcg/hexagon/test_hl.S | 16 + tests/tcg/hexagon/test_hwloops.S | 19 + tests/tcg/hexagon/test_jmp.S | 22 + tests/tcg/hexagon/test_lsr.S | 36 + tests/tcg/hexagon/test_mpyi.S | 17 + tests/tcg/hexagon/test_packet.S | 29 + tests/tcg/hexagon/test_reorder.S | 33 + tests/tcg/hexagon/test_round.S | 29 + tests/tcg/hexagon/test_vavgw.S | 31 + tests/tcg/hexagon/test_vcmpb.S | 30 + tests/tcg/hexagon/test_vcmpw.S | 30 + tests/tcg/hexagon/test_vlsrw.S | 20 + tests/tcg/hexagon/test_vmaxh.S | 35 + tests/tcg/hexagon/test_vminh.S | 35 + tests/tcg/hexagon/test_vpmpyh.S | 28 + tests/tcg/hexagon/test_vspliceb.S | 31 + tests/tcg/hexagon/usr.c | 34 +- tests/tcg/multiarch/Makefile.target | 17 + tests/tcg/multiarch/munmap-pthread.c | 16 +- tests/tcg/multiarch/nop_func.h | 25 + tests/tcg/multiarch/sha512.c | 9 +- tests/tcg/multiarch/system/Makefile.softmmu-target | 6 +- tests/tcg/multiarch/test-vma.c | 22 + tests/tcg/multiarch/vma-pthread.c | 207 + tests/tcg/s390x/Makefile.softmmu-target | 22 +- tests/tcg/s390x/Makefile.target | 24 +- tests/tcg/s390x/bal.S | 24 + tests/tcg/s390x/br-odd.S | 16 + tests/tcg/s390x/cdsg.c | 93 + tests/tcg/s390x/cgrl-unaligned.S | 16 + tests/tcg/s390x/chrl.c | 80 + tests/tcg/s390x/clrl-unaligned.S | 16 + tests/tcg/s390x/clst.c | 82 + tests/tcg/s390x/crl-unaligned.S | 16 + tests/tcg/s390x/div.c | 75 + tests/tcg/s390x/ex-branch.c | 158 + tests/tcg/s390x/ex-odd.S | 17 + tests/tcg/s390x/ex-relative-long.c | 156 + tests/tcg/s390x/exrl-ssm-early.S | 43 + tests/tcg/s390x/lgrl-unaligned.S | 16 + tests/tcg/s390x/llgfrl-unaligned.S | 16 + tests/tcg/s390x/long-double.c | 24 + tests/tcg/s390x/lpsw.S | 36 + tests/tcg/s390x/lpswe-early.S | 38 + tests/tcg/s390x/lpswe-unaligned.S | 18 + tests/tcg/s390x/lrl-unaligned.S | 16 + tests/tcg/s390x/mxdb.c | 30 + tests/tcg/s390x/pgm-specification-softmmu.S | 40 + tests/tcg/s390x/pgm-specification-user.c | 37 + tests/tcg/s390x/pgm-specification.mak | 15 + tests/tcg/s390x/rxsbg.c | 46 + tests/tcg/s390x/sam.S | 67 + tests/tcg/s390x/softmmu.ld | 20 + tests/tcg/s390x/ssm-early.S | 41 + tests/tcg/s390x/stgrl-unaligned.S | 16 + tests/tcg/s390x/stosm-early.S | 41 + tests/tcg/s390x/strl-unaligned.S | 16 + tests/tcg/tricore/Makefile.softmmu-target | 11 +- tests/tcg/tricore/macros.h | 76 +- tests/tcg/tricore/test_dextr.S | 75 + tests/tcg/tricore/test_imask.S | 10 + tests/tcg/tricore/test_insert.S | 9 + tests/tcg/tricore/test_ld_bu.S | 15 + tests/tcg/tricore/test_ld_h.S | 15 + tests/tcg/x86_64/Makefile.target | 3 + tests/tcg/x86_64/adox.c | 69 + tests/tcg/xtensa/Makefile.softmmu-target | 5 +- tests/tcg/xtensaeb/Makefile.softmmu-target | 5 + tests/unit/meson.build | 11 +- tests/unit/ptimer-test-stubs.c | 2 +- tests/unit/rcutorture.c | 3 +- tests/unit/socket-helpers.c | 2 +- tests/unit/test-aio.c | 2 +- tests/unit/test-bdrv-drain.c | 409 +- tests/unit/test-block-iothread.c | 7 +- tests/unit/test-blockjob.c | 9 +- tests/unit/test-char.c | 1 - tests/unit/test-coroutine.c | 2 - tests/unit/test-crypto-block.c | 6 - tests/unit/test-crypto-tlssession.c | 4 +- tests/unit/test-cutils.c | 9 +- tests/unit/test-error-report.c | 139 + tests/unit/test-interval-tree.c | 209 + tests/unit/test-io-channel-command.c | 22 +- tests/unit/test-io-channel-socket.c | 1 + tests/unit/test-io-channel-tls.c | 2 +- tests/unit/test-nested-aio-poll.c | 130 + tests/unit/test-qmp-cmds.c | 39 +- tests/unit/test-qmp-event.c | 4 +- tests/unit/test-qobject-input-visitor.c | 2 +- tests/unit/test-qobject-output-visitor.c | 2 - tests/unit/test-qtree.c | 333 + tests/unit/test-rcu-list.c | 5 +- tests/unit/test-seccomp.c | 1 - tests/unit/test-visitor-serialization.c | 3 +- tests/unit/test-vmstate.c | 6 +- tests/unit/test-xbzrle.c | 39 +- tests/unit/test-xs-node.c | 871 ++ tests/vhost-user-bridge.c | 4 +- tests/vm/basevm.py | 3 +- tests/vm/centos.aarch64 | 2 +- tests/vm/freebsd | 4 +- tests/vm/haiku.x86_64 | 7 +- tests/vm/netbsd | 3 +- tests/vm/openbsd | 30 +- tools/ebpf/Makefile.ebpf | 8 +- tools/ebpf/rss.bpf.c | 43 +- tools/meson.build | 13 - tools/virtiofsd/50-qemu-virtiofsd.json.in | 5 - tools/virtiofsd/buffer.c | 350 - tools/virtiofsd/fuse_common.h | 837 -- tools/virtiofsd/fuse_i.h | 107 - tools/virtiofsd/fuse_log.c | 39 - tools/virtiofsd/fuse_log.h | 73 - tools/virtiofsd/fuse_lowlevel.c | 2744 ---- tools/virtiofsd/fuse_lowlevel.h | 1988 --- tools/virtiofsd/fuse_misc.h | 59 - tools/virtiofsd/fuse_opt.c | 446 - tools/virtiofsd/fuse_opt.h | 272 - tools/virtiofsd/fuse_signals.c | 93 - tools/virtiofsd/fuse_virtio.c | 1081 -- tools/virtiofsd/fuse_virtio.h | 33 - tools/virtiofsd/helper.c | 409 - tools/virtiofsd/meson.build | 18 - tools/virtiofsd/passthrough_helpers.h | 51 - tools/virtiofsd/passthrough_ll.c | 4520 ------ tools/virtiofsd/passthrough_seccomp.c | 182 - tools/virtiofsd/passthrough_seccomp.h | 14 - trace-events | 4 - trace/meson.build | 5 +- trace/trace-hmp-cmds.c | 148 + ui/cocoa.m | 30 +- ui/console.c | 27 +- ui/cursor.c | 5 +- ui/dbus-clipboard.c | 19 +- ui/dbus-console.c | 14 +- ui/dbus-listener.c | 23 +- ui/dbus.c | 39 +- ui/egl-headless.c | 17 +- ui/egl-helpers.c | 78 +- ui/gtk.c | 5 +- ui/input.c | 36 +- ui/keycodemapdb | 2 +- ui/meson.build | 8 +- ui/sdl2.c | 36 +- ui/shader/texture-blit-flip.vert | 1 - ui/shader/texture-blit.frag | 1 - ui/shader/texture-blit.vert | 1 - ui/spice-app.c | 1 + ui/spice-core.c | 56 +- ui/spice-display.c | 19 +- ui/udmabuf.c | 2 +- ui/ui-hmp-cmds.c | 460 + ui/ui-qmp-cmds.c | 177 + ui/util.c | 3 +- ui/vdagent.c | 5 +- ui/vnc-clipboard.c | 10 +- ui/vnc.c | 18 +- ui/vnc.h | 1 - util/aio-posix.c | 38 +- util/aio-win32.c | 23 +- util/async-teardown.c | 29 +- util/async.c | 51 +- util/bitops.c | 8 +- util/bufferiszero.c | 44 +- util/cacheflush.c | 14 +- util/cutils.c | 14 +- util/envlist.c | 202 +- util/error-report.c | 1 + util/error.c | 21 +- util/guest-random.c | 2 +- util/hbitmap.c | 2 +- util/int128.c | 42 + util/interval-tree.c | 889 ++ util/log.c | 86 +- util/main-loop.c | 64 +- util/meson.build | 4 +- util/osdep.c | 4 +- util/oslib-posix.c | 76 - util/oslib-win32.c | 359 +- util/qemu-config.c | 230 +- util/qemu-coroutine-lock.c | 10 +- util/qemu-coroutine-sleep.c | 1 - util/qemu-coroutine.c | 1 - util/qemu-sockets.c | 48 +- util/qemu-thread-posix.c | 80 +- util/qemu-thread-win32.c | 82 +- util/qht.c | 97 +- util/qtree.c | 1390 ++ util/readline.c | 8 + util/thread-context.c | 10 +- util/trace-events | 1 + util/uri.c | 3 +- util/userfaultfd.c | 45 +- util/vfio-helpers.c | 14 +- util/vhost-user-server.c | 8 +- 2577 files changed, 190519 insertions(+), 143114 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml deleted file mode 100644 index 4895987da4..0000000000 --- a/.cirrus.yml +++ /dev/null @@ -1,109 +0,0 @@ -env: - CIRRUS_CLONE_DEPTH: 1 - -windows_msys2_task: - timeout_in: 90m - windows_container: - image: cirrusci/windowsservercore:2019 - os_version: 2019 - cpu: 8 - memory: 8G - env: - CIRRUS_SHELL: powershell - MSYS: winsymlinks:native - MSYSTEM: MINGW64 - MSYS2_URL: https://github.com/msys2/msys2-installer/releases/download/2022-06-03/msys2-base-x86_64-20220603.sfx.exe - MSYS2_FINGERPRINT: 0 - MSYS2_PACKAGES: " - diffutils git grep make pkg-config sed - mingw-w64-x86_64-python - mingw-w64-x86_64-python-sphinx - mingw-w64-x86_64-toolchain - mingw-w64-x86_64-SDL2 - mingw-w64-x86_64-SDL2_image - mingw-w64-x86_64-gtk3 - mingw-w64-x86_64-glib2 - mingw-w64-x86_64-ninja - mingw-w64-x86_64-jemalloc - mingw-w64-x86_64-lzo2 - mingw-w64-x86_64-zstd - mingw-w64-x86_64-libjpeg-turbo - mingw-w64-x86_64-pixman - mingw-w64-x86_64-libgcrypt - mingw-w64-x86_64-libpng - mingw-w64-x86_64-libssh - mingw-w64-x86_64-snappy - mingw-w64-x86_64-libusb - mingw-w64-x86_64-usbredir - mingw-w64-x86_64-libtasn1 - mingw-w64-x86_64-nettle - mingw-w64-x86_64-cyrus-sasl - mingw-w64-x86_64-curl - mingw-w64-x86_64-gnutls - mingw-w64-x86_64-libnfs - " - CHERE_INVOKING: 1 - msys2_cache: - folder: C:\tools\archive - reupload_on_changes: false - # These env variables are used to generate fingerprint to trigger the cache procedure - # If wanna to force re-populate msys2, increase MSYS2_FINGERPRINT - fingerprint_script: - - | - echo $env:CIRRUS_TASK_NAME - echo $env:MSYS2_URL - echo $env:MSYS2_FINGERPRINT - echo $env:MSYS2_PACKAGES - populate_script: - - | - md -Force C:\tools\archive\pkg - $start_time = Get-Date - bitsadmin /transfer msys_download /dynamic /download /priority FOREGROUND $env:MSYS2_URL C:\tools\archive\base.exe - Write-Output "Download time taken: $((Get-Date).Subtract($start_time))" - cd C:\tools - C:\tools\archive\base.exe -y - del -Force C:\tools\archive\base.exe - Write-Output "Base install time taken: $((Get-Date).Subtract($start_time))" - $start_time = Get-Date - - ((Get-Content -path C:\tools\msys64\etc\\post-install\\07-pacman-key.post -Raw) -replace '--refresh-keys', '--version') | Set-Content -Path C:\tools\msys64\etc\\post-install\\07-pacman-key.post - C:\tools\msys64\usr\bin\bash.exe -lc "sed -i 's/^CheckSpace/#CheckSpace/g' /etc/pacman.conf" - C:\tools\msys64\usr\bin\bash.exe -lc "export" - C:\tools\msys64\usr\bin\pacman.exe --noconfirm -Sy - echo Y | C:\tools\msys64\usr\bin\pacman.exe --noconfirm -Suu --overwrite=* - taskkill /F /FI "MODULES eq msys-2.0.dll" - tasklist - C:\tools\msys64\usr\bin\bash.exe -lc "mv -f /etc/pacman.conf.pacnew /etc/pacman.conf || true" - C:\tools\msys64\usr\bin\bash.exe -lc "pacman --noconfirm -Syuu --overwrite=*" - Write-Output "Core install time taken: $((Get-Date).Subtract($start_time))" - $start_time = Get-Date - - C:\tools\msys64\usr\bin\bash.exe -lc "pacman --noconfirm -S --needed $env:MSYS2_PACKAGES" - Write-Output "Package install time taken: $((Get-Date).Subtract($start_time))" - $start_time = Get-Date - - del -Force -ErrorAction SilentlyContinue C:\tools\msys64\etc\mtab - del -Force -ErrorAction SilentlyContinue C:\tools\msys64\dev\fd - del -Force -ErrorAction SilentlyContinue C:\tools\msys64\dev\stderr - del -Force -ErrorAction SilentlyContinue C:\tools\msys64\dev\stdin - del -Force -ErrorAction SilentlyContinue C:\tools\msys64\dev\stdout - del -Force -Recurse -ErrorAction SilentlyContinue C:\tools\msys64\var\cache\pacman\pkg - tar cf C:\tools\archive\msys64.tar -C C:\tools\ msys64 - - Write-Output "Package archive time taken: $((Get-Date).Subtract($start_time))" - del -Force -Recurse -ErrorAction SilentlyContinue c:\tools\msys64 - install_script: - - | - $start_time = Get-Date - cd C:\tools - ls C:\tools\archive\msys64.tar - tar xf C:\tools\archive\msys64.tar - Write-Output "Extract msys2 time taken: $((Get-Date).Subtract($start_time))" - script: - - C:\tools\msys64\usr\bin\bash.exe -lc "mkdir build" - - C:\tools\msys64\usr\bin\bash.exe -lc "cd build && ../configure --python=python3" - - C:\tools\msys64\usr\bin\bash.exe -lc "cd build && make -j8" - - exit $LastExitCode - test_script: - - C:\tools\msys64\usr\bin\bash.exe -lc "cd build && make V=1 check" - - exit $LastExitCode diff --git a/.git-blame-ignore-revs b/.git-blame-ignore-revs new file mode 100644 index 0000000000..93718ef425 --- /dev/null +++ b/.git-blame-ignore-revs @@ -0,0 +1,21 @@ +# +# List of code-formatting clean ups the git blame can ignore +# +# git blame --ignore-revs-file .git-blame-ignore-revs +# +# or +# +# git config blame.ignoreRevsFile .git-blame-ignore-revs +# + +# gdbstub: clean-up indents +ad9e4585b3c7425759d3eea697afbca71d2c2082 + +# e1000e: fix code style +0eadd56bf53ab196a16d492d7dd31c62e1c24c32 + +# target/riscv: coding style fixes +8c7feddddd9218b407792120bcfda0347ed16205 + +# replace TABs with spaces +48805df9c22a0700fba4b3b548fafaa21726ca68 diff --git a/.gitlab-ci.d/base.yml b/.gitlab-ci.d/base.yml index 69b36c148a..2fbb58d2a3 100644 --- a/.gitlab-ci.d/base.yml +++ b/.gitlab-ci.d/base.yml @@ -6,6 +6,13 @@ # most restrictive to least restrictive # .base_job_template: + variables: + # Each script line from will be in a collapsible section in the job output + # and show the duration of each line. + FF_SCRIPT_SECTIONS: 1 + + interruptible: true + rules: ############################################################# # Stage 1: exclude scenarios where we definitely don't @@ -68,5 +75,5 @@ - if: '$QEMU_CI != "2" && $CI_PROJECT_NAMESPACE != "qemu-project"' when: manual - # Jobs can run if any jobs they depend on were successfull + # Jobs can run if any jobs they depend on were successful - when: on_success diff --git a/.gitlab-ci.d/buildtest-template.yml b/.gitlab-ci.d/buildtest-template.yml index 73ecfabb8d..a6cfe9be97 100644 --- a/.gitlab-ci.d/buildtest-template.yml +++ b/.gitlab-ci.d/buildtest-template.yml @@ -11,12 +11,10 @@ fi - mkdir build - cd build - - if test -n "$TARGETS"; - then - ../configure --enable-werror --disable-docs ${LD_JOBS:+--meson=git} $CONFIGURE_ARGS --target-list="$TARGETS" ; - else - ../configure --enable-werror --disable-docs ${LD_JOBS:+--meson=git} $CONFIGURE_ARGS ; - fi || { cat config.log meson-logs/meson-log.txt && exit 1; } + - ../configure --enable-werror --disable-docs --enable-fdt=system + ${LD_JOBS:+--meson=git} ${TARGETS:+--target-list="$TARGETS"} + $CONFIGURE_ARGS || + { cat config.log meson-logs/meson-log.txt && exit 1; } - if test -n "$LD_JOBS"; then ../meson/meson.py configure . -Dbackend_max_links="$LD_JOBS" ; @@ -27,6 +25,22 @@ make -j"$JOBS" $MAKE_CHECK_ARGS ; fi +# We jump some hoops in common_test_job_template to avoid +# rebuilding all the object files we skip in the artifacts +.native_build_artifact_template: + artifacts: + expire_in: 2 days + paths: + - build + - .git-submodule-status + exclude: + - build/**/*.p + - build/**/*.a.p + - build/**/*.fa.p + - build/**/*.c.o + - build/**/*.c.o.d + - build/**/*.fa + .common_test_job_template: extends: .base_job_template stage: test diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index 10886bb414..bb3650a51c 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -2,20 +2,16 @@ include: - local: '/.gitlab-ci.d/buildtest-template.yml' build-system-alpine: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: - job: amd64-alpine-container variables: IMAGE: alpine - TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu - microblazeel-softmmu mips64el-softmmu + TARGETS: avr-softmmu loongarch64-softmmu mips64-softmmu mipsel-softmmu MAKE_CHECK_ARGS: check-build CONFIGURE_ARGS: --enable-docs --enable-trace-backends=log,simple,syslog - artifacts: - expire_in: 2 days - paths: - - .git-submodule-status - - build check-system-alpine: extends: .native_test_job_template @@ -36,19 +32,17 @@ avocado-system-alpine: MAKE_CHECK_ARGS: check-avocado build-system-ubuntu: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: - job: amd64-ubuntu2004-container + job: amd64-ubuntu2204-container variables: - IMAGE: ubuntu2004 - CONFIGURE_ARGS: --enable-docs --enable-fdt=system --enable-capstone - TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu + IMAGE: ubuntu2204 + CONFIGURE_ARGS: --enable-docs + TARGETS: alpha-softmmu cris-softmmu hppa-softmmu microblazeel-softmmu mips64el-softmmu MAKE_CHECK_ARGS: check-build - artifacts: - expire_in: 2 days - paths: - - build check-system-ubuntu: extends: .native_test_job_template @@ -56,7 +50,7 @@ check-system-ubuntu: - job: build-system-ubuntu artifacts: true variables: - IMAGE: ubuntu2004 + IMAGE: ubuntu2204 MAKE_CHECK_ARGS: check avocado-system-ubuntu: @@ -65,22 +59,21 @@ avocado-system-ubuntu: - job: build-system-ubuntu artifacts: true variables: - IMAGE: ubuntu2004 + IMAGE: ubuntu2204 MAKE_CHECK_ARGS: check-avocado build-system-debian: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: job: amd64-debian-container variables: IMAGE: debian-amd64 - TARGETS: arm-softmmu avr-softmmu i386-softmmu mipsel-softmmu - riscv64-softmmu sh4eb-softmmu sparc-softmmu xtensaeb-softmmu + CONFIGURE_ARGS: --with-coroutine=sigaltstack + TARGETS: arm-softmmu i386-softmmu riscv64-softmmu sh4eb-softmmu + sparc-softmmu xtensaeb-softmmu MAKE_CHECK_ARGS: check-build - artifacts: - expire_in: 2 days - paths: - - build check-system-debian: extends: .native_test_job_template @@ -113,20 +106,17 @@ crash-test-debian: - tests/venv/bin/python3 scripts/device-crash-test -q --tcg-only ./qemu-system-i386 build-system-fedora: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: job: amd64-fedora-container variables: IMAGE: fedora CONFIGURE_ARGS: --disable-gcrypt --enable-nettle --enable-docs - --enable-fdt=system --enable-slirp --enable-capstone TARGETS: tricore-softmmu microblaze-softmmu mips-softmmu xtensa-softmmu m68k-softmmu riscv32-softmmu ppc-softmmu sparc64-softmmu MAKE_CHECK_ARGS: check-build - artifacts: - expire_in: 2 days - paths: - - build check-system-fedora: extends: .native_test_job_template @@ -160,21 +150,18 @@ crash-test-fedora: - tests/venv/bin/python3 scripts/device-crash-test -q ./qemu-system-riscv32 build-system-centos: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: job: amd64-centos8-container variables: IMAGE: centos8 - CONFIGURE_ARGS: --disable-nettle --enable-gcrypt --enable-fdt=system + CONFIGURE_ARGS: --disable-nettle --enable-gcrypt --enable-vfio-user-server --enable-modules --enable-trace-backends=dtrace --enable-docs - --enable-vfio-user-server TARGETS: ppc64-softmmu or1k-softmmu s390x-softmmu x86_64-softmmu rx-softmmu sh4-softmmu nios2-softmmu MAKE_CHECK_ARGS: check-build - artifacts: - expire_in: 2 days - paths: - - build check-system-centos: extends: .native_test_job_template @@ -195,18 +182,15 @@ avocado-system-centos: MAKE_CHECK_ARGS: check-avocado build-system-opensuse: - extends: .native_build_job_template + extends: + - .native_build_job_template + - .native_build_artifact_template needs: job: amd64-opensuse-leap-container variables: IMAGE: opensuse-leap - CONFIGURE_ARGS: --enable-fdt=system TARGETS: s390x-softmmu x86_64-softmmu aarch64-softmmu MAKE_CHECK_ARGS: check-build - artifacts: - expire_in: 2 days - paths: - - build check-system-opensuse: extends: .native_test_job_template @@ -244,6 +228,7 @@ build-tcg-disabled: - mkdir build - cd build - ../configure --disable-tcg --audio-drv-list="" --with-coroutine=ucontext + --disable-docs --disable-sdl --disable-gtk --disable-vnc || { cat config.log meson-logs/meson-log.txt && exit 1; } - make -j"$JOBS" - make check-unit @@ -275,14 +260,10 @@ build-user-static: CONFIGURE_ARGS: --disable-tools --disable-system --static MAKE_CHECK_ARGS: check-tcg -# Because the hexagon cross-compiler takes so long to build we don't rely -# on the CI system to build it and hence this job has an optional dependency -# declared. The image is manually uploaded. build-user-hexagon: extends: .native_build_job_template needs: job: hexagon-cross-container - optional: true variables: IMAGE: debian-hexagon-cross TARGETS: hexagon-linux-user @@ -319,8 +300,7 @@ clang-system: IMAGE: fedora CONFIGURE_ARGS: --cc=clang --cxx=clang++ --extra-cflags=-fsanitize=undefined --extra-cflags=-fno-sanitize-recover=undefined From xen-changelog-bounces@lists.xenproject.org Fri Aug 18 05:11:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 18 Aug 2023 05:11:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.585774.916952 (Exim 4.92) (envelope-from ) id 1qWrlH-00077d-Mi; Fri, 18 Aug 2023 05:11:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 585774.916952; Fri, 18 Aug 2023 05:11:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlH-00077T-K4; Fri, 18 Aug 2023 05:11:03 +0000 Received: by outflank-mailman (input) for mailman id 585774; Fri, 18 Aug 2023 05:11:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlF-00074w-QI for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlF-0006sO-PR for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWrlF-00039t-LE for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GE0UDm8LlWlwyE6tEwziR+DxVXZ3dgmPBOjOQ1UsDe4=; b=BlycWUaTGU1wu4nanuHA6LmQsC t2lIowTI408xEZBqBj0heBWWDOmCDJUuuFCvRaNbGmMCIFWekNsmRkewd4vnGgVW6BCDsGKv5PluT djw1BGANN0yWZwFnjGTavrRzTYn7yf5JefYSpSH4UmoNA22MCzTeGlVPnrxtXguXjCoA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] libxl: slightly correct JSON generation of CPU policy Message-Id: Date: Fri, 18 Aug 2023 05:11:01 +0000 commit ebce4e3a146c39e57bb7a890e059e89c32b6d547 Author: Jan Beulich AuthorDate: Thu Aug 17 16:24:17 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 17 16:24:17 2023 +0200 libxl: slightly correct JSON generation of CPU policy The "cpuid_empty" label is also (in principle; maybe only for rubbish input) reachable in the "cpuid_only" case. Hence the label needs to live ahead of the check of the variable. Fixes: 5b80cecb747b ("libxl: introduce MSR data in libxl_cpuid_policy") Signed-off-by: Jan Beulich Reviewed-by: Anthony PERARD --- tools/libs/light/libxl_cpuid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 849722541c..5c66d094b2 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -710,10 +710,11 @@ parse_cpuid: libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + +cpuid_empty: if (cpuid_only) return 0; -cpuid_empty: co = libxl__json_map_get("msr", o, JSON_ARRAY); if (!libxl__json_object_is_array(co)) return ERROR_FAIL; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 18 05:11:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 18 Aug 2023 05:11:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.585776.916956 (Exim 4.92) (envelope-from ) id 1qWrlR-0007EV-Nx; Fri, 18 Aug 2023 05:11:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 585776.916956; Fri, 18 Aug 2023 05:11:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlR-0007EO-LY; Fri, 18 Aug 2023 05:11:13 +0000 Received: by outflank-mailman (input) for mailman id 585776; Fri, 18 Aug 2023 05:11:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlQ-0007Cw-0F for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlP-0006sr-SR for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWrlP-0003AM-RT for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cO5bamvkdfvzCYOwL4mtjyM+qkZfMILmNzbhTcaq6nw=; b=sxBZjIr3qPeCrjlZzCn0oezOCt L8Hf7VG8E3L04sLR1R6otUduwsLH9tiucreDRD4ood55pNAO2QZ+O/jC4513NQHI1OuoxzaD+y5bj VmqBHYZFx/JOHn2+bxgbyNCkppU02w9huuFpvGL//nqSYHxRpjkOBE5Q9Bze2vJ110UM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tboot: Disable CET at shutdown Message-Id: Date: Fri, 18 Aug 2023 05:11:11 +0000 commit 0801868f550539d417d46f82c49307480947ccaa Author: Jason Andryuk AuthorDate: Thu Aug 17 16:24:49 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 17 16:24:49 2023 +0200 tboot: Disable CET at shutdown tboot_shutdown() calls into tboot to perform the actual system shutdown. tboot isn't built with endbr annotations, and Xen has CET-IBT enabled on newer hardware. shutdown_entry isn't annotated with endbr and Xen faults: Panic on CPU 0: CONTROL-FLOW PROTECTION FAULT: #CP[0003] endbranch And Xen hangs at this point. Disabling CET-IBT let Xen and tboot power off, but reboot was perfoming a poweroff instead of a warm reboot. Disabling all of CET, i.e. shadow stacks as well, lets tboot reboot properly. Fixes: cdbe2b0a1aec ("x86: Enable CET Indirect Branch Tracking") Signed-off-by: Jason Andryuk Acked-by: Andrew Cooper Reviewed-by: Daniel P. Smith --- xen/arch/x86/tboot.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c index 90f6e805a9..86c4c22cac 100644 --- a/xen/arch/x86/tboot.c +++ b/xen/arch/x86/tboot.c @@ -353,6 +353,16 @@ void tboot_shutdown(uint32_t shutdown_type) tboot_gen_xenheap_integrity(g_tboot_shared->s3_key, &xenheap_mac); } + /* + * Disable CET - tboot may not be built with endbr, and it doesn't support + * shadow stacks. + */ + if ( read_cr4() & X86_CR4_CET ) + { + wrmsrl(MSR_S_CET, 0); + write_cr4(read_cr4() & ~X86_CR4_CET); + } + /* * During early boot, we can be called by panic before idle_vcpu[0] is * setup, but in that case we don't need to change page tables. -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Fri Aug 18 05:11:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 18 Aug 2023 05:11:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.585777.916961 (Exim 4.92) (envelope-from ) id 1qWrlb-0007IE-Ph; Fri, 18 Aug 2023 05:11:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 585777.916961; Fri, 18 Aug 2023 05:11:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlb-0007I6-N0; Fri, 18 Aug 2023 05:11:23 +0000 Received: by outflank-mailman (input) for mailman id 585777; Fri, 18 Aug 2023 05:11:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlZ-0007Hq-WF for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qWrlZ-0006tD-VL for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qWrlZ-0003Al-UZ for xen-changelog@lists.xenproject.org; Fri, 18 Aug 2023 05:11:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yMAtlTvk9jwZton7zMjuPVliCjScCnGEcbId6c2fbzk=; b=fvSWZpbsoNXC5wjay3j08fq+fQ +mfZTDGWPRhSDatx1gaZMFiTrfQWmASWQ3lEEf2ZeBrwqIdjL5Pzye0YZLsximCY5KQiehez27ZeN ddZ2ebLvIFCGVsba1xqGMwkyf1bycmK3/q7+KcnKg+zHVG4Ea6r1fEYEjX2Ba0WFc2FE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] IOMMU/x86: fix build with old gcc after IO-APIC RTE changes Message-Id: Date: Fri, 18 Aug 2023 05:11:21 +0000 commit 38ba0466a1e262edd031500d24919fbf4e48c794 Author: Jan Beulich AuthorDate: Thu Aug 17 16:25:51 2023 +0200 Commit: Jan Beulich CommitDate: Thu Aug 17 16:25:51 2023 +0200 IOMMU/x86: fix build with old gcc after IO-APIC RTE changes Old gcc (up to at least 4.3.4) won't cope with initializers involving unnamed struct/union fields. Fixes: 3e033172b025 ("x86/iommu: pass full IO-APIC RTE for remapping table update") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- xen/drivers/passthrough/amd/iommu_intr.c | 6 ++++-- xen/drivers/passthrough/vtd/intremap.c | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c index e83a2a932a..d9eefcd8e4 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -321,8 +321,7 @@ static int update_intremap_entry_from_ioapic( void cf_check amd_iommu_ioapic_update_ire( unsigned int apic, unsigned int pin, uint64_t rte) { - struct IO_APIC_route_entry old_rte; - struct IO_APIC_route_entry new_rte = { .raw = rte }; + struct IO_APIC_route_entry old_rte, new_rte; int seg, bdf, rc; struct amd_iommu *iommu; unsigned int idx; @@ -331,6 +330,9 @@ void cf_check amd_iommu_ioapic_update_ire( if ( idx == MAX_IO_APICS ) return; + /* Not the initializer, for old gcc to cope. */ + new_rte.raw = rte; + /* get device id of ioapic devices */ bdf = ioapic_sbdf[idx].bdf; seg = ioapic_sbdf[idx].seg; diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index 706abefacc..c504852eb8 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -432,8 +432,7 @@ unsigned int cf_check io_apic_read_remap_rte( void cf_check io_apic_write_remap_rte( unsigned int apic, unsigned int pin, uint64_t rte) { - struct IO_xAPIC_route_entry new_rte = { .raw = rte }; - struct IO_xAPIC_route_entry old_rte = { }; + struct IO_xAPIC_route_entry old_rte = {}, new_rte; struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic)); bool masked = true; int rc; @@ -453,6 +452,9 @@ void cf_check io_apic_write_remap_rte( } } + /* Not the initializer, for old gcc to cope. */ + new_rte.raw = rte; + rc = ioapic_rte_to_remap_entry(iommu, apic, pin, &old_rte, new_rte); if ( rc ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:10 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586926.918186 (Exim 4.92) (envelope-from ) id 1qXE4C-00072N-Ij; Sat, 19 Aug 2023 05:00:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586926.918186; Sat, 19 Aug 2023 05:00:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4C-00071s-FZ; Sat, 19 Aug 2023 05:00:04 +0000 Received: by outflank-mailman (input) for mailman id 586926; Sat, 19 Aug 2023 05:00:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4A-0006gu-N3 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4A-0002Hg-KV for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE4A-0003FS-Hc for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=7LuuBS73BGHyB+50ciLXfMTC9dCyByCR9b4HEAY0SSo=; b=zadrPgVqM9pcSyJaRvawPT+LVV pGMN+AwoiHFwrSSXy5bmwKFxIC27QCJH4mn+JlxeHnrW0zNjxKZOGmtkOFt5S/ZpFXuJ6a5AQRV27 5eD7qfGIDDCcQVYaIJuobhZewdIqL1RE8E+q6fC/qXrSiccwpmuq+bx32d4uQUjfSlEA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: add direct request support Message-Id: Date: Sat, 19 Aug 2023 05:00:02 +0000 commit c9a1d98295e5ef6fbd565b2b2ed1e573d98fae14 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:23 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:26:42 2023 +0100 xen/arm: ffa: add direct request support Adds support for sending a FF-A direct request. Checks that the SP also supports handling a 32-bit direct request. 64-bit direct requests are not used by the mediator itself so there is not need to check for that. Signed-off-by: Jens Wiklander Reviewed-by: Henry Wang Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 113 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index e157ed20ad..961a8c052f 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -181,6 +181,56 @@ static bool ffa_get_version(uint32_t *vers) return true; } +static int32_t get_ffa_ret_code(const struct arm_smccc_1_2_regs *resp) +{ + switch ( resp->a0 ) + { + case FFA_ERROR: + if ( resp->a2 ) + return resp->a2; + else + return FFA_RET_NOT_SUPPORTED; + case FFA_SUCCESS_32: + case FFA_SUCCESS_64: + return FFA_RET_OK; + default: + return FFA_RET_NOT_SUPPORTED; + } +} + +static int32_t ffa_simple_call(uint32_t fid, register_t a1, register_t a2, + register_t a3, register_t a4) +{ + const struct arm_smccc_1_2_regs arg = { + .a0 = fid, + .a1 = a1, + .a2 = a2, + .a3 = a3, + .a4 = a4, + }; + struct arm_smccc_1_2_regs resp; + + arm_smccc_1_2_smc(&arg, &resp); + + return get_ffa_ret_code(&resp); +} + +static int32_t ffa_features(uint32_t id) +{ + return ffa_simple_call(FFA_FEATURES, id, 0, 0, 0); +} + +static bool check_mandatory_feature(uint32_t id) +{ + int32_t ret = ffa_features(id); + + if ( ret ) + printk(XENLOG_ERR "ffa: mandatory feature id %#x missing: error %d\n", + id, ret); + + return !ret; +} + static uint16_t get_vm_id(const struct domain *d) { /* +1 since 0 is reserved for the hypervisor in FF-A */ @@ -222,6 +272,57 @@ static void handle_version(struct cpu_user_regs *regs) set_regs(regs, vers, 0, 0, 0, 0, 0, 0, 0); } +static void handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) +{ + struct arm_smccc_1_2_regs arg = { .a0 = fid, }; + struct arm_smccc_1_2_regs resp = { }; + struct domain *d = current->domain; + uint32_t src_dst; + uint64_t mask; + + if ( smccc_is_conv_64(fid) ) + mask = GENMASK_ULL(63, 0); + else + mask = GENMASK_ULL(31, 0); + + src_dst = get_user_reg(regs, 1); + if ( (src_dst >> 16) != get_vm_id(d) ) + { + resp.a0 = FFA_ERROR; + resp.a2 = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + arg.a1 = src_dst; + arg.a2 = get_user_reg(regs, 2) & mask; + arg.a3 = get_user_reg(regs, 3) & mask; + arg.a4 = get_user_reg(regs, 4) & mask; + arg.a5 = get_user_reg(regs, 5) & mask; + arg.a6 = get_user_reg(regs, 6) & mask; + arg.a7 = get_user_reg(regs, 7) & mask; + + arm_smccc_1_2_smc(&arg, &resp); + switch ( resp.a0 ) + { + case FFA_ERROR: + case FFA_SUCCESS_32: + case FFA_SUCCESS_64: + case FFA_MSG_SEND_DIRECT_RESP_32: + case FFA_MSG_SEND_DIRECT_RESP_64: + break; + default: + /* Bad fid, report back to the caller. */ + memset(&resp, 0, sizeof(resp)); + resp.a0 = FFA_ERROR; + resp.a1 = src_dst; + resp.a2 = FFA_RET_ABORTED; + } + +out: + set_regs(regs, resp.a0, resp.a1 & mask, resp.a2 & mask, resp.a3 & mask, + resp.a4 & mask, resp.a5 & mask, resp.a6 & mask, resp.a7 & mask); +} + static bool ffa_handle_call(struct cpu_user_regs *regs) { uint32_t fid = get_user_reg(regs, 0); @@ -239,6 +340,10 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) case FFA_ID_GET: set_regs_success(regs, get_vm_id(d), 0); return true; + case FFA_MSG_SEND_DIRECT_REQ_32: + case FFA_MSG_SEND_DIRECT_REQ_64: + handle_msg_send_direct_req(regs, fid); + return true; default: gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); @@ -331,6 +436,14 @@ static bool ffa_probe(void) printk(XENLOG_INFO "ARM FF-A Firmware version %u.%u\n", major_vers, minor_vers); + /* + * At the moment domains must support the same features used by Xen. + * TODO: Rework the code to allow domain to use a subset of the + * features supported. + */ + if ( !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) + return false; + ffa_version = vers; return true; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586927.918191 (Exim 4.92) (envelope-from ) id 1qXE4M-0007Ux-KS; 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Sat, 19 Aug 2023 05:00:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=d1miEe5jN2b3l9F8lXdpBrVJoG6D3IdjmD673HVAmXU=; b=BxWXmrUc6Ywlgy+WL/cvclyHMp FdjJ6xzDxnX07tdQ1sBS7ySagl7NOUYZncxzAVpyCcEtWD0NmTq2MsM6EaEojarRn/1KO/6CSVz0w TNVKELsmZ5OBsU0N9gM3rHASC7/lINi63cQAfrvN8CSyXzgL//JxO+PGTCFiM0RlwhIw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: map SPMC rx/tx buffers Message-Id: Date: Sat, 19 Aug 2023 05:00:12 +0000 commit a33f28872ce05fba457d57b72c1f088d9ebce81f Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:24 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:26:42 2023 +0100 xen/arm: ffa: map SPMC rx/tx buffers When initializing the FF-A mediator map the RX and TX buffers shared with the SPMC. These buffer are later used to to transmit data that cannot be passed in registers only. Adds a check that the SP supports the needed FF-A features FFA_RXTX_MAP_64 and FFA_RXTX_UNMAP. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 961a8c052f..072198a132 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -67,6 +68,12 @@ */ #define FFA_PAGE_SIZE SZ_4K +/* + * The number of pages used for each of the RX and TX buffers shared with + * the SPMC. + */ +#define FFA_RXTX_PAGE_COUNT 1 + /* * Flags and field values used for the MSG_SEND_DIRECT_REQ/RESP: * BIT(31): Framework or partition message @@ -161,6 +168,13 @@ struct ffa_ctx { /* Negotiated FF-A version to use with the SPMC */ static uint32_t __ro_after_init ffa_version; +/* + * Our rx/tx buffers shared with the SPMC. FFA_RXTX_PAGE_COUNT is the + * number of pages used in each of these buffers. + */ +static void *ffa_rx __read_mostly; +static void *ffa_tx __read_mostly; + static bool ffa_get_version(uint32_t *vers) { const struct arm_smccc_1_2_regs arg = { @@ -231,6 +245,12 @@ static bool check_mandatory_feature(uint32_t id) return !ret; } +static int32_t ffa_rxtx_map(paddr_t tx_addr, paddr_t rx_addr, + uint32_t page_count) +{ + return ffa_simple_call(FFA_RXTX_MAP_64, tx_addr, rx_addr, page_count, 0); +} + static uint16_t get_vm_id(const struct domain *d) { /* +1 since 0 is reserved for the hypervisor in FF-A */ @@ -394,6 +414,7 @@ static int ffa_relinquish_resources(struct domain *d) static bool ffa_probe(void) { uint32_t vers; + int e; unsigned int major_vers; unsigned int minor_vers; @@ -441,12 +462,39 @@ static bool ffa_probe(void) * TODO: Rework the code to allow domain to use a subset of the * features supported. */ - if ( !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) + if ( + !check_mandatory_feature(FFA_RXTX_MAP_64) || + !check_mandatory_feature(FFA_RXTX_UNMAP) || + !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) + return false; + + ffa_rx = alloc_xenheap_pages(get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0); + if ( !ffa_rx ) return false; + ffa_tx = alloc_xenheap_pages(get_order_from_pages(FFA_RXTX_PAGE_COUNT), 0); + if ( !ffa_tx ) + goto err_free_ffa_rx; + + e = ffa_rxtx_map(__pa(ffa_tx), __pa(ffa_rx), FFA_RXTX_PAGE_COUNT); + if ( e ) + { + printk(XENLOG_ERR "ffa: Failed to map rxtx: error %d\n", e); + goto err_free_ffa_tx; + } ffa_version = vers; return true; + +err_free_ffa_tx: + free_xenheap_pages(ffa_tx, 0); + ffa_tx = NULL; +err_free_ffa_rx: + free_xenheap_pages(ffa_rx, 0); + ffa_rx = NULL; + ffa_version = 0; + + return false; } static const struct tee_mediator_ops ffa_ops = -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586928.918194 (Exim 4.92) (envelope-from ) id 1qXE4W-0007Yj-Ls; Sat, 19 Aug 2023 05:00:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586928.918194; Sat, 19 Aug 2023 05:00:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4W-0007Yc-JO; Sat, 19 Aug 2023 05:00:24 +0000 Received: by outflank-mailman (input) for mailman id 586928; Sat, 19 Aug 2023 05:00:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4U-0007YI-Tf for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4U-0002II-Sq for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE4U-0003H0-Py for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=3uLOfGQKwmbtEI03icdvn8wCiet7GfRsueHYY7LtMLE=; b=boE5p7nS9He7F1UekKTzxTlP7H vcMpett78TOeWUx5au6BvMQcO9wvREPEWWsgm3qEUkNxxjfs8iW6/R7kHepgRnI1DzQteCqDCmZhc F85V+QpPW8ABNcKw8+BtXmVXhihN0plneHxQZi2CTEmCWCLgA1oYZWX8g0SIzHcRAUqU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: send guest events to Secure Partitions Message-Id: Date: Sat, 19 Aug 2023 05:00:22 +0000 commit 4c4887bb7af91e525927eaf48511b0fbc61f506d Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:25 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:21 2023 +0100 xen/arm: ffa: send guest events to Secure Partitions The FF-A specification defines framework messages sent as direct requests when certain events occurs. For instance when a VM (guest) is created or destroyed. Only SPs which have subscribed to these events will receive them. An SP can subscribe to these messages in its partition properties. Adds a check that the SP supports the needed FF-A features FFA_PARTITION_INFO_GET and FFA_RX_RELEASE. The partition properties of each SP is retrieved with FFA_PARTITION_INFO_GET which returns the information in our RX buffer. Using FFA_PARTITION_INFO_GET changes the owner of the RX buffer to the caller (us), so once we're done with the buffer it must be released using FFA_RX_RELEASE before another call can be made. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 233 ++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 232 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 072198a132..b45a88cea9 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -160,14 +160,33 @@ #define FFA_MSG_SEND 0x8400006EU #define FFA_MSG_POLL 0x8400006AU +/* Partition information descriptor */ +struct ffa_partition_info_1_1 { + uint16_t id; + uint16_t execution_context; + uint32_t partition_properties; + uint8_t uuid[16]; +}; + struct ffa_ctx { /* FF-A version used by the guest */ uint32_t guest_vers; + /* + * Number of SPs that we have sent a VM created signal to, used in + * ffa_domain_teardown() to know which SPs need to be signalled. + */ + uint16_t create_signal_count; }; /* Negotiated FF-A version to use with the SPMC */ static uint32_t __ro_after_init ffa_version; +/* SPs subscribing to VM_CREATE and VM_DESTROYED events */ +static uint16_t *subscr_vm_created __read_mostly; +static uint16_t subscr_vm_created_count __read_mostly; +static uint16_t *subscr_vm_destroyed __read_mostly; +static uint16_t subscr_vm_destroyed_count __read_mostly; + /* * Our rx/tx buffers shared with the SPMC. FFA_RXTX_PAGE_COUNT is the * number of pages used in each of these buffers. @@ -251,6 +270,87 @@ static int32_t ffa_rxtx_map(paddr_t tx_addr, paddr_t rx_addr, return ffa_simple_call(FFA_RXTX_MAP_64, tx_addr, rx_addr, page_count, 0); } +static int32_t ffa_partition_info_get(uint32_t w1, uint32_t w2, uint32_t w3, + uint32_t w4, uint32_t w5, + uint32_t *count) +{ + const struct arm_smccc_1_2_regs arg = { + .a0 = FFA_PARTITION_INFO_GET, + .a1 = w1, + .a2 = w2, + .a3 = w3, + .a4 = w4, + .a5 = w5, + }; + struct arm_smccc_1_2_regs resp; + uint32_t ret; + + arm_smccc_1_2_smc(&arg, &resp); + + ret = get_ffa_ret_code(&resp); + if ( !ret ) + *count = resp.a2; + + return ret; +} + +static int32_t ffa_rx_release(void) +{ + return ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); +} + +static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, + uint8_t msg) +{ + uint32_t exp_resp = FFA_MSG_FLAG_FRAMEWORK; + unsigned int retry_count = 0; + int32_t res; + + if ( msg == FFA_MSG_SEND_VM_CREATED ) + exp_resp |= FFA_MSG_RESP_VM_CREATED; + else if ( msg == FFA_MSG_SEND_VM_DESTROYED ) + exp_resp |= FFA_MSG_RESP_VM_DESTROYED; + else + return FFA_RET_INVALID_PARAMETERS; + + do { + const struct arm_smccc_1_2_regs arg = { + .a0 = FFA_MSG_SEND_DIRECT_REQ_32, + .a1 = sp_id, + .a2 = FFA_MSG_FLAG_FRAMEWORK | msg, + .a5 = vm_id, + }; + struct arm_smccc_1_2_regs resp; + + arm_smccc_1_2_smc(&arg, &resp); + if ( resp.a0 != FFA_MSG_SEND_DIRECT_RESP_32 || resp.a2 != exp_resp ) + { + /* + * This is an invalid response, likely due to some error in the + * implementation of the ABI. + */ + return FFA_RET_INVALID_PARAMETERS; + } + res = resp.a3; + if ( ++retry_count > 10 ) + { + /* + * TODO + * FFA_RET_INTERRUPTED means that the SPMC has a pending + * non-secure interrupt, we need a way of delivering that + * non-secure interrupt. + * FFA_RET_RETRY is the SP telling us that it's temporarily + * blocked from handling the direct request, we need a generic + * way to deal with this. + * For now in both cases, give up after a few retries. + */ + return res; + } + } while ( res == FFA_RET_INTERRUPTED || res == FFA_RET_RETRY ); + + return res; +} + static uint16_t get_vm_id(const struct domain *d) { /* +1 since 0 is reserved for the hypervisor in FF-A */ @@ -374,6 +474,8 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) static int ffa_domain_init(struct domain *d) { struct ffa_ctx *ctx; + unsigned int n; + int32_t res; if ( !ffa_version ) return -ENODEV; @@ -390,17 +492,67 @@ static int ffa_domain_init(struct domain *d) d->arch.tee = ctx; + for ( n = 0; n < subscr_vm_created_count; n++ ) + { + res = ffa_direct_req_send_vm(subscr_vm_created[n], get_vm_id(d), + FFA_MSG_SEND_VM_CREATED); + if ( res ) + { + printk(XENLOG_ERR "ffa: Failed to report creation of vm_id %u to %u: res %d\n", + get_vm_id(d), subscr_vm_created[n], res); + ctx->create_signal_count = n; + return -EIO; + } + } + ctx->create_signal_count = subscr_vm_created_count; + return 0; } +static bool is_in_subscr_list(const uint16_t *subscr, uint16_t start, + uint16_t end, uint16_t sp_id) +{ + unsigned int n; + + for ( n = start; n < end; n++ ) + { + if ( subscr[n] == sp_id ) + return true; + } + + return false; +} + /* This function is supposed to undo what ffa_domain_init() has done */ static int ffa_domain_teardown(struct domain *d) { struct ffa_ctx *ctx = d->arch.tee; + unsigned int n; + int32_t res; if ( !ctx ) return 0; + for ( n = 0; n < subscr_vm_destroyed_count; n++ ) + { + /* + * Skip SPs subscribed to the VM created event that never was + * notified of the VM creation due to an error during + * ffa_domain_init(). + */ + if ( is_in_subscr_list(subscr_vm_created, ctx->create_signal_count, + subscr_vm_created_count, + subscr_vm_destroyed[n]) ) + continue; + + res = ffa_direct_req_send_vm(subscr_vm_destroyed[n], get_vm_id(d), + FFA_MSG_SEND_VM_DESTROYED); + + if ( res ) + printk(XENLOG_ERR "ffa: Failed to report destruction of vm_id %u to %u: res %d\n", + get_vm_id(d), subscr_vm_destroyed[n], res); + } + XFREE(d->arch.tee); return 0; @@ -411,6 +563,81 @@ static int ffa_relinquish_resources(struct domain *d) return 0; } +static void uninit_subscribers(void) +{ + subscr_vm_created_count = 0; + subscr_vm_destroyed_count = 0; + XFREE(subscr_vm_created); + XFREE(subscr_vm_destroyed); +} + +static bool init_subscribers(struct ffa_partition_info_1_1 *fpi, uint16_t count) +{ + uint16_t n; + uint16_t c_pos; + uint16_t d_pos; + + subscr_vm_created_count = 0; + subscr_vm_destroyed_count = 0; + for ( n = 0; n < count; n++ ) + { + if ( fpi[n].partition_properties & FFA_PART_PROP_NOTIF_CREATED ) + subscr_vm_created_count++; + if ( fpi[n].partition_properties & FFA_PART_PROP_NOTIF_DESTROYED ) + subscr_vm_destroyed_count++; + } + + if ( subscr_vm_created_count ) + subscr_vm_created = xzalloc_array(uint16_t, subscr_vm_created_count); + if ( subscr_vm_destroyed_count ) + subscr_vm_destroyed = xzalloc_array(uint16_t, + subscr_vm_destroyed_count); + if ( (subscr_vm_created_count && !subscr_vm_created) || + (subscr_vm_destroyed_count && !subscr_vm_destroyed) ) + { + printk(XENLOG_ERR "ffa: Failed to allocate subscription lists\n"); + uninit_subscribers(); + return false; + } + + for ( c_pos = 0, d_pos = 0, n = 0; n < count; n++ ) + { + if ( fpi[n].partition_properties & FFA_PART_PROP_NOTIF_CREATED ) + subscr_vm_created[c_pos++] = fpi[n].id; + if ( fpi[n].partition_properties & FFA_PART_PROP_NOTIF_DESTROYED ) + subscr_vm_destroyed[d_pos++] = fpi[n].id; + } + + return true; +} + +static bool init_sps(void) +{ + bool ret = false; + uint32_t count; + int e; + + e = ffa_partition_info_get(0, 0, 0, 0, 0, &count); + if ( e ) + { + printk(XENLOG_ERR "ffa: Failed to get list of SPs: %d\n", e); + goto out; + } + + if ( count >= UINT16_MAX ) + { + printk(XENLOG_ERR "ffa: Impossible number of SPs: %u\n", count); + goto out; + } + + ret = init_subscribers(ffa_rx, count); + +out: + ffa_rx_release(); + + return ret; +} + static bool ffa_probe(void) { uint32_t vers; @@ -462,7 +689,8 @@ static bool ffa_probe(void) * TODO: Rework the code to allow domain to use a subset of the * features supported. */ - if ( + if ( !check_mandatory_feature(FFA_PARTITION_INFO_GET) || + !check_mandatory_feature(FFA_RX_RELEASE) || !check_mandatory_feature(FFA_RXTX_MAP_64) || !check_mandatory_feature(FFA_RXTX_UNMAP) || !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) @@ -484,6 +712,9 @@ static bool ffa_probe(void) } ffa_version = vers; + if ( !init_sps() ) + goto err_free_ffa_tx; + return true; err_free_ffa_tx: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586929.918199 (Exim 4.92) (envelope-from ) id 1qXE4g-0007bE-O8; Sat, 19 Aug 2023 05:00:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586929.918199; Sat, 19 Aug 2023 05:00:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4g-0007b7-L8; Sat, 19 Aug 2023 05:00:34 +0000 Received: by outflank-mailman (input) for mailman id 586929; Sat, 19 Aug 2023 05:00:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4f-0007ar-16 for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: support mapping guest RX/TX buffers Message-Id: Date: Sat, 19 Aug 2023 05:00:32 +0000 commit 38d81e7ccb11cf1c3adbe84a079e12805a0723c8 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:26 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: support mapping guest RX/TX buffers Adds support in the mediator to map and unmap the RX and TX buffers provided by the guest using the two FF-A functions FFA_RXTX_MAP and FFA_RXTX_UNMAP. These buffer are later used to transmit data that cannot be passed in registers only. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 140 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index b45a88cea9..46020ebefc 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -74,6 +74,12 @@ */ #define FFA_RXTX_PAGE_COUNT 1 +/* + * Limit the number of pages RX/TX buffers guests can map. + * TODO support a larger number. + */ +#define FFA_MAX_RXTX_PAGE_COUNT 1 + /* * Flags and field values used for the MSG_SEND_DIRECT_REQ/RESP: * BIT(31): Framework or partition message @@ -169,6 +175,12 @@ struct ffa_partition_info_1_1 { }; struct ffa_ctx { + void *rx; + const void *tx; + struct page_info *rx_pg; + struct page_info *tx_pg; + /* Number of 4kB pages in each of rx/rx_pg and tx/tx_pg */ + unsigned int page_count; /* FF-A version used by the guest */ uint32_t guest_vers; /* @@ -176,6 +188,7 @@ struct ffa_ctx { * ffa_domain_teardown() to know which SPs need to be signalled. */ uint16_t create_signal_count; + bool rx_is_free; }; /* Negotiated FF-A version to use with the SPMC */ @@ -371,6 +384,11 @@ static void set_regs(struct cpu_user_regs *regs, register_t v0, register_t v1, set_user_reg(regs, 7, v7); } +static void set_regs_error(struct cpu_user_regs *regs, uint32_t error_code) +{ + set_regs(regs, FFA_ERROR, 0, error_code, 0, 0, 0, 0, 0); +} + static void set_regs_success(struct cpu_user_regs *regs, uint32_t w2, uint32_t w3) { @@ -392,6 +410,108 @@ static void handle_version(struct cpu_user_regs *regs) set_regs(regs, vers, 0, 0, 0, 0, 0, 0, 0); } +static uint32_t handle_rxtx_map(uint32_t fid, register_t tx_addr, + register_t rx_addr, uint32_t page_count) +{ + uint32_t ret = FFA_RET_INVALID_PARAMETERS; + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + struct page_info *tx_pg; + struct page_info *rx_pg; + p2m_type_t t; + void *rx; + void *tx; + + if ( !smccc_is_conv_64(fid) ) + { + /* + * Calls using the 32-bit calling convention must ignore the upper + * 32 bits in the argument registers. + */ + tx_addr &= UINT32_MAX; + rx_addr &= UINT32_MAX; + } + + if ( page_count > FFA_MAX_RXTX_PAGE_COUNT ) + { + printk(XENLOG_ERR "ffa: RXTX_MAP: error: %u pages requested (limit %u)\n", + page_count, FFA_MAX_RXTX_PAGE_COUNT); + return FFA_RET_NOT_SUPPORTED; + } + + /* Already mapped */ + if ( ctx->rx ) + return FFA_RET_DENIED; + + tx_pg = get_page_from_gfn(d, gfn_x(gaddr_to_gfn(tx_addr)), &t, P2M_ALLOC); + if ( !tx_pg ) + return FFA_RET_INVALID_PARAMETERS; + + /* Only normal RW RAM for now */ + if ( t != p2m_ram_rw ) + goto err_put_tx_pg; + + rx_pg = get_page_from_gfn(d, gfn_x(gaddr_to_gfn(rx_addr)), &t, P2M_ALLOC); + if ( !tx_pg ) + goto err_put_tx_pg; + + /* Only normal RW RAM for now */ + if ( t != p2m_ram_rw ) + goto err_put_rx_pg; + + tx = __map_domain_page_global(tx_pg); + if ( !tx ) + goto err_put_rx_pg; + + rx = __map_domain_page_global(rx_pg); + if ( !rx ) + goto err_unmap_tx; + + ctx->rx = rx; + ctx->tx = tx; + ctx->rx_pg = rx_pg; + ctx->tx_pg = tx_pg; + ctx->page_count = page_count; + ctx->rx_is_free = true; + return FFA_RET_OK; + +err_unmap_tx: + unmap_domain_page_global(tx); +err_put_rx_pg: + put_page(rx_pg); +err_put_tx_pg: + put_page(tx_pg); + + return ret; +} + +static void rxtx_unmap(struct ffa_ctx *ctx) +{ + unmap_domain_page_global(ctx->rx); + unmap_domain_page_global(ctx->tx); + put_page(ctx->rx_pg); + put_page(ctx->tx_pg); + ctx->rx = NULL; + ctx->tx = NULL; + ctx->rx_pg = NULL; + ctx->tx_pg = NULL; + ctx->page_count = 0; + ctx->rx_is_free = false; +} + +static uint32_t handle_rxtx_unmap(void) +{ + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + + if ( !ctx->rx ) + return FFA_RET_INVALID_PARAMETERS; + + rxtx_unmap(ctx); + + return FFA_RET_OK; +} + static void handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) { struct arm_smccc_1_2_regs arg = { .a0 = fid, }; @@ -448,6 +568,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) uint32_t fid = get_user_reg(regs, 0); struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; + int e; if ( !ctx ) return false; @@ -460,6 +581,22 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) case FFA_ID_GET: set_regs_success(regs, get_vm_id(d), 0); return true; + case FFA_RXTX_MAP_32: + case FFA_RXTX_MAP_64: + e = handle_rxtx_map(fid, get_user_reg(regs, 1), get_user_reg(regs, 2), + get_user_reg(regs, 3)); + if ( e ) + set_regs_error(regs, e); + else + set_regs_success(regs, 0, 0); + return true; + case FFA_RXTX_UNMAP: + e = handle_rxtx_unmap(); + if ( e ) + set_regs_error(regs, e); + else + set_regs_success(regs, 0, 0); + return true; case FFA_MSG_SEND_DIRECT_REQ_32: case FFA_MSG_SEND_DIRECT_REQ_64: handle_msg_send_direct_req(regs, fid); @@ -553,6 +690,9 @@ static int ffa_domain_teardown(struct domain *d) get_vm_id(d), subscr_vm_destroyed[n], res); } + if ( ctx->rx ) + rxtx_unmap(ctx); + XFREE(d->arch.tee); return 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586930.918202 (Exim 4.92) (envelope-from ) id 1qXE4q-0007eP-RL; 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Sat, 19 Aug 2023 05:00:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=kU5s+xX4YnhNGNMOCLknb0/ciULrxb5EEIL2ZY75dP0=; b=icdHNS0ViQBVVUuwRalPaw98sw wTTYiWZq1/2PiTAu5bauVnYuiGiVZ1Rw7Iq2R4dXzLDfdjDyZhzxgbCvyyOWqPzq9jpsd4kvIZJAl lR5xfHgF2OoJBu9Oc5Pv//AiRidoOfqGSgmMHkwyL259I5/ga6M5QLOiJTbHwRcDcKsk=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: support guest FFA_PARTITION_INFO_GET Message-Id: Date: Sat, 19 Aug 2023 05:00:43 +0000 commit caf6491e95a954d37f59d4204b235bc775f9549b Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:27 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: support guest FFA_PARTITION_INFO_GET Adds support in the mediator to handle FFA_PARTITION_INFO_GET requests from a guest. The requests are forwarded to the SPMC and the response is translated according to the FF-A version in use by the guest. Using FFA_PARTITION_INFO_GET changes the owner of the RX buffer to the caller (the guest in this case), so once it is done with the buffer it must be released using FFA_RX_RELEASE before another call can be made. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 134 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 134 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 46020ebefc..d8305f6d21 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -166,7 +166,18 @@ #define FFA_MSG_SEND 0x8400006EU #define FFA_MSG_POLL 0x8400006AU +/* + * Structs below ending with _1_0 are defined in FF-A-1.0-REL and + * structs ending with _1_1 are defined in FF-A-1.1-REL0. + */ + /* Partition information descriptor */ +struct ffa_partition_info_1_0 { + uint16_t id; + uint16_t execution_context; + uint32_t partition_properties; +}; + struct ffa_partition_info_1_1 { uint16_t id; uint16_t execution_context; @@ -189,6 +200,7 @@ struct ffa_ctx { */ uint16_t create_signal_count; bool rx_is_free; + spinlock_t lock; }; /* Negotiated FF-A version to use with the SPMC */ @@ -203,9 +215,15 @@ static uint16_t subscr_vm_destroyed_count __read_mostly; /* * Our rx/tx buffers shared with the SPMC. FFA_RXTX_PAGE_COUNT is the * number of pages used in each of these buffers. + * + * The RX buffer is protected from concurrent usage with ffa_rx_buffer_lock. + * Note that the SPMC is also tracking the ownership of our RX buffer so + * for calls which uses our RX buffer to deliver a result we must call + * ffa_rx_release() to let the SPMC know that we're done with the buffer. */ static void *ffa_rx __read_mostly; static void *ffa_tx __read_mostly; +static DEFINE_SPINLOCK(ffa_rx_buffer_lock); static bool ffa_get_version(uint32_t *vers) { @@ -512,6 +530,103 @@ static uint32_t handle_rxtx_unmap(void) return FFA_RET_OK; } +static int32_t handle_partition_info_get(uint32_t w1, uint32_t w2, uint32_t w3, + uint32_t w4, uint32_t w5, + uint32_t *count) +{ + int32_t ret = FFA_RET_DENIED; + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + + /* + * FF-A v1.0 has w5 MBZ while v1.1 allows + * FFA_PARTITION_INFO_GET_COUNT_FLAG to be non-zero. + * + * FFA_PARTITION_INFO_GET_COUNT is only using registers and not the + * rxtx buffer so do the partition_info_get directly. + */ + if ( w5 == FFA_PARTITION_INFO_GET_COUNT_FLAG && + ctx->guest_vers == FFA_VERSION_1_1 ) + return ffa_partition_info_get(w1, w2, w3, w4, w5, count); + if ( w5 ) + return FFA_RET_INVALID_PARAMETERS; + + if ( !ffa_rx ) + return FFA_RET_DENIED; + + spin_lock(&ctx->lock); + if ( !ctx->page_count || !ctx->rx_is_free ) + goto out; + spin_lock(&ffa_rx_buffer_lock); + ret = ffa_partition_info_get(w1, w2, w3, w4, w5, count); + if ( ret ) + goto out_rx_buf_unlock; + /* + * ffa_partition_info_get() succeeded so we now own the RX buffer we + * share with the SPMC. We must give it back using ffa_rx_release() + * once we've copied the content. + */ + + if ( ctx->guest_vers == FFA_VERSION_1_0 ) + { + size_t n; + struct ffa_partition_info_1_1 *src = ffa_rx; + struct ffa_partition_info_1_0 *dst = ctx->rx; + + if ( ctx->page_count * FFA_PAGE_SIZE < *count * sizeof(*dst) ) + { + ret = FFA_RET_NO_MEMORY; + goto out_rx_release; + } + + for ( n = 0; n < *count; n++ ) + { + dst[n].id = src[n].id; + dst[n].execution_context = src[n].execution_context; + dst[n].partition_properties = src[n].partition_properties; + } + } + else + { + size_t sz = *count * sizeof(struct ffa_partition_info_1_1); + + if ( ctx->page_count * FFA_PAGE_SIZE < sz ) + { + ret = FFA_RET_NO_MEMORY; + goto out_rx_release; + } + + + memcpy(ctx->rx, ffa_rx, sz); + } + ctx->rx_is_free = false; +out_rx_release: + ffa_rx_release(); +out_rx_buf_unlock: + spin_unlock(&ffa_rx_buffer_lock); +out: + spin_unlock(&ctx->lock); + + return ret; +} + +static int32_t handle_rx_release(void) +{ + int32_t ret = FFA_RET_DENIED; + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + + spin_lock(&ctx->lock); + if ( !ctx->page_count || ctx->rx_is_free ) + goto out; + ret = FFA_RET_OK; + ctx->rx_is_free = true; +out: + spin_unlock(&ctx->lock); + + return ret; +} + static void handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid) { struct arm_smccc_1_2_regs arg = { .a0 = fid, }; @@ -568,6 +683,7 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) uint32_t fid = get_user_reg(regs, 0); struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; + uint32_t count; int e; if ( !ctx ) @@ -597,6 +713,24 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) else set_regs_success(regs, 0, 0); return true; + case FFA_PARTITION_INFO_GET: + e = handle_partition_info_get(get_user_reg(regs, 1), + get_user_reg(regs, 2), + get_user_reg(regs, 3), + get_user_reg(regs, 4), + get_user_reg(regs, 5), &count); + if ( e ) + set_regs_error(regs, e); + else + set_regs_success(regs, count, 0); + return true; + case FFA_RX_RELEASE: + e = handle_rx_release(); + if ( e ) + set_regs_error(regs, e); + else + set_regs_success(regs, 0, 0); + return true; case FFA_MSG_SEND_DIRECT_REQ_32: case FFA_MSG_SEND_DIRECT_REQ_64: handle_msg_send_direct_req(regs, fid); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:00:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:00:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586931.918206 (Exim 4.92) (envelope-from ) id 1qXE50-0007gn-T5; Sat, 19 Aug 2023 05:00:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586931.918206; Sat, 19 Aug 2023 05:00:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE50-0007gf-QX; Sat, 19 Aug 2023 05:00:54 +0000 Received: by outflank-mailman (input) for mailman id 586931; Sat, 19 Aug 2023 05:00:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4z-0007gK-7S for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE4z-0002Ie-6g for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE4z-0003Li-5b for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:00:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZcIMgxN8nYRrsonvkSATcSBrY5orX7Y73ySwDp6eDqM=; b=gS1HY732pIaPRJ8/vwBCIGtDUy rFEc/lcENtzUBUA6wq6y7hXLPJZC97AsaEIqVtwD6HqY3//x1ucnIH0Eb3wJdSG0+7Qak1H09EqZj PDVRatEN3BXY64XofCOt/GejwerVASE3ctFWM/nXHPP1VnRL/chPJwUlnX4Zo+tV2OEw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: move regpair_to_uint64() and uint64_to_regpair() to regs.h Message-Id: Date: Sat, 19 Aug 2023 05:00:53 +0000 commit 88d750b880dc893becd552ed5844a00f7fab0f63 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:28 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: move regpair_to_uint64() and uint64_to_regpair() to regs.h Moves the two helper functions regpair_to_uint64() and uint64_to_regpair() from xen/arch/arm/tee/optee.c to the common arm specific regs.h. This enables reuse of these functions in the FF-A mediator in a subsequent patch. Signed-off-by: Jens Wiklander Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis Reviewed-by: Henry Wang --- xen/arch/arm/include/asm/regs.h | 12 ++++++++++++ xen/arch/arm/tee/optee.c | 11 ----------- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/include/asm/regs.h b/xen/arch/arm/include/asm/regs.h index ef34b38aa1..8a0db95415 100644 --- a/xen/arch/arm/include/asm/regs.h +++ b/xen/arch/arm/include/asm/regs.h @@ -60,6 +60,18 @@ static inline bool guest_mode(const struct cpu_user_regs *r) register_t get_user_reg(struct cpu_user_regs *regs, int reg); void set_user_reg(struct cpu_user_regs *regs, int reg, register_t value); +static inline uint64_t regpair_to_uint64(register_t reg0, register_t reg1) +{ + return ((uint64_t)reg0 << 32) | (uint32_t)reg1; +} + +static inline void uint64_to_regpair(register_t *reg0, register_t *reg1, + uint64_t val) +{ + *reg0 = val >> 32; + *reg1 = (uint32_t)val; +} + #endif #endif /* __ARM_REGS_H__ */ diff --git a/xen/arch/arm/tee/optee.c b/xen/arch/arm/tee/optee.c index c91bd7d5ac..5151bd90ed 100644 --- a/xen/arch/arm/tee/optee.c +++ b/xen/arch/arm/tee/optee.c @@ -273,17 +273,6 @@ static int optee_domain_teardown(struct domain *d) return 0; } -static uint64_t regpair_to_uint64(register_t reg0, register_t reg1) -{ - return ((uint64_t)reg0 << 32) | (uint32_t)reg1; -} - -static void uint64_to_regpair(register_t *reg0, register_t *reg1, uint64_t val) -{ - *reg0 = val >> 32; - *reg1 = (uint32_t)val; -} - static struct page_info *get_domain_ram_page(gfn_t gfn) { struct page_info *page; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:04 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586932.918211 (Exim 4.92) (envelope-from ) id 1qXE5A-0007ju-VA; Sat, 19 Aug 2023 05:01:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586932.918211; Sat, 19 Aug 2023 05:01:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5A-0007jm-S3; Sat, 19 Aug 2023 05:01:04 +0000 Received: by outflank-mailman (input) for mailman id 586932; Sat, 19 Aug 2023 05:01:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE59-0007jX-Ab for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE59-0002J1-9s for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE59-0003NF-8o for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=igDync/8tTKjve5Fo1au9kW3jDIssNR7bWYxTmBmfBo=; b=6EI5fZcAwjxSevZg9ya3McLDi4 u1UJ0iu8aDU3z2UGLaEdG5uCaRMZI8bz6/Svo9dyR1yxpuFd2vCDF2YITKQwO65wbHre08dipragG dxUWPpmHsjQsbM12N8OOo8Zj1mewJntOYVDb52s2Kz6sJySRCUttJfX8w1IpjaLnKRDQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: add defines for sharing memory Message-Id: Date: Sat, 19 Aug 2023 05:01:03 +0000 commit 8a36b557a5cb13cdfa24374278a4e8a67f48a5bf Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:29 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: add defines for sharing memory According to DEN0077A version 1.1 REL0 - Section 10.9.2 Memory region handle, page 167 - Table 10.18 at page 175 - Table 10.15 at page 168 - Section 10.11.4 Flags usage, page 184-187 add defines needed for sharing using the function FFA_MEM_SHARE and friends. Also add limits for how many shared buffers that a guest can have at once and how large a shared buffer can be at most. Signed-off-by: Jens Wiklander Reviewed-by: Henry Wang Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index d8305f6d21..2a7b512189 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -5,6 +5,14 @@ * Arm Firmware Framework for ARMv8-A (FF-A) mediator * * Copyright (C) 2023 Linaro Limited + * + * References: + * FF-A-1.0-REL: FF-A specification version 1.0 available at + * https://developer.arm.com/documentation/den0077/a + * FF-A-1.1-REL0: FF-A specification version 1.1 available at + * https://developer.arm.com/documentation/den0077/e + * TEEC-1.0C: TEE Client API Specification version 1.0c available at + * https://globalplatform.org/specs-library/tee-client-api-specification/ */ #include @@ -80,6 +88,56 @@ */ #define FFA_MAX_RXTX_PAGE_COUNT 1 +/* + * Limit for shared buffer size. Please note that this define limits + * number of pages. + * + * FF-A doesn't have any direct requirements on GlobalPlatform or vice + * versa, but an implementation can very well use FF-A in order to provide + * a GlobalPlatform interface on top. + * + * Global Platform specification for TEE requires that any TEE + * implementation should allow to share buffers with size of at least + * 512KB, defined in TEEC-1.0C page 24, Table 4-1, + * TEEC_CONFIG_SHAREDMEM_MAX_SIZE. + * Due to overhead which can be hard to predict exactly, double this number + * to give a safe margin. + */ +#define FFA_MAX_SHM_PAGE_COUNT (2 * SZ_512K / FFA_PAGE_SIZE) + +/* + * Limits the number of shared buffers that guest can have at once. This + * is to prevent case, when guests trick XEN into exhausting its own + * memory by allocating many small buffers. This value has been chosen + * arbitrarily. + */ +#define FFA_MAX_SHM_COUNT 32 + +/* FF-A-1.1-REL0 section 10.9.2 Memory region handle, page 167 */ +#define FFA_HANDLE_HYP_FLAG BIT(63, ULL) +#define FFA_HANDLE_INVALID 0xffffffffffffffffULL + +/* + * Memory attributes: Normal memory, Write-Back cacheable, Inner shareable + * Defined in FF-A-1.1-REL0 Table 10.18 at page 175. + */ +#define FFA_NORMAL_MEM_REG_ATTR 0x2fU +/* + * Memory access permissions: Read-write + * Defined in FF-A-1.1-REL0 Table 10.15 at page 168. + */ +#define FFA_MEM_ACC_RW 0x2U + +/* FF-A-1.1-REL0 section 10.11.4 Flags usage, page 184-187 */ +/* Clear memory before mapping in receiver */ +#define FFA_MEMORY_REGION_FLAG_CLEAR BIT(0, U) +/* Relayer may time slice this operation */ +#define FFA_MEMORY_REGION_FLAG_TIME_SLICE BIT(1, U) +/* Clear memory after receiver relinquishes it */ +#define FFA_MEMORY_REGION_FLAG_CLEAR_RELINQUISH BIT(2, U) +/* Share memory transaction */ +#define FFA_MEMORY_REGION_TRANSACTION_TYPE_SHARE (1U << 3) + /* * Flags and field values used for the MSG_SEND_DIRECT_REQ/RESP: * BIT(31): Framework or partition message -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:14 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586933.918215 (Exim 4.92) (envelope-from ) id 1qXE5K-0007ma-0S; Sat, 19 Aug 2023 05:01:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586933.918215; Sat, 19 Aug 2023 05:01:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5J-0007mT-To; Sat, 19 Aug 2023 05:01:13 +0000 Received: by outflank-mailman (input) for mailman id 586933; Sat, 19 Aug 2023 05:01:13 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5J-0007mL-Fe for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:13 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5J-0002JT-D2 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE5J-0003OS-C7 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=OhQ7YunWB4WSca9jF9NbpWzPLxhUPOJWY5NG48jwNeU=; b=v5jobvBk6Tc66M4PFD1GfXwsUW kp1+h73D8Bc75Vh4b+LA0lp/W6dUGzhl9fzY6XVFkIYh18eNfgNatNpJhhUn2s82LTup7+VTTZq+n Iy6Pg5oc9eG9IQyGKYw9f1bz7RMSif18yE9U3TlwWk3wQ41sEngcX/2gfprfdonHfzyw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: add ABI structs for sharing memory Message-Id: Date: Sat, 19 Aug 2023 05:01:13 +0000 commit 8fe046e9888d5f661beb664c69d02c4dde06e7f6 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:30 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: add ABI structs for sharing memory Adds the ABI structs used by function FFA_MEM_SHARE and friends for sharing memory. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 2a7b512189..ea0bbd6258 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -243,6 +243,75 @@ struct ffa_partition_info_1_1 { uint8_t uuid[16]; }; +/* Constituent memory region descriptor */ +struct ffa_address_range { + uint64_t address; + uint32_t page_count; + uint32_t reserved; +}; + +/* Composite memory region descriptor */ +struct ffa_mem_region { + uint32_t total_page_count; + uint32_t address_range_count; + uint64_t reserved; + struct ffa_address_range address_range_array[]; +}; + +/* Memory access permissions descriptor */ +struct ffa_mem_access_perm { + uint16_t endpoint_id; + uint8_t perm; + uint8_t flags; +}; + +/* Endpoint memory access descriptor */ +struct ffa_mem_access { + struct ffa_mem_access_perm access_perm; + uint32_t region_offs; + uint64_t reserved; +}; + +/* Lend, donate or share memory transaction descriptor */ +struct ffa_mem_transaction_1_0 { + uint16_t sender_id; + uint8_t mem_reg_attr; + uint8_t reserved0; + uint32_t flags; + uint64_t handle; + uint64_t tag; + uint32_t reserved1; + uint32_t mem_access_count; + struct ffa_mem_access mem_access_array[]; +}; + +struct ffa_mem_transaction_1_1 { + uint16_t sender_id; + uint16_t mem_reg_attr; + uint32_t flags; + uint64_t handle; + uint64_t tag; + uint32_t mem_access_size; + uint32_t mem_access_count; + uint32_t mem_access_offs; + uint8_t reserved[12]; +}; + +/* Endpoint RX/TX descriptor */ +struct ffa_endpoint_rxtx_descriptor_1_0 { + uint16_t sender_id; + uint16_t reserved; + uint32_t rx_range_count; + uint32_t tx_range_count; +}; + +struct ffa_endpoint_rxtx_descriptor_1_1 { + uint16_t sender_id; + uint16_t reserved; + uint32_t rx_region_offs; + uint32_t tx_region_offs; +}; + struct ffa_ctx { void *rx; const void *tx; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:24 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586934.918219 (Exim 4.92) (envelope-from ) id 1qXE5U-0007py-2Z; Sat, 19 Aug 2023 05:01:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586934.918219; Sat, 19 Aug 2023 05:01:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5T-0007pr-VJ; Sat, 19 Aug 2023 05:01:23 +0000 Received: by outflank-mailman (input) for mailman id 586934; Sat, 19 Aug 2023 05:01:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5T-0007ph-H6 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5T-0002Jd-GC for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:23 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE5T-0003Pd-FK for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:23 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=GrXn7RfcoMET5Gq19hTIQEsXWdI67rdNTr3IPbhYJcE=; b=UMzUONIjbsU6suJqmvRonClZVP Z4lZfaxRADsqmIL2xfsknOOip8Ki2HopcUqK9ZrazUlz6w0PBT2k0TW8mV8A5ctXRh7T1T3MCVBr4 9vquNt8NuniP8Cx8/2RW7C4q2a6bXY7z5xTCgdvvOqK5SCVZY1Fh9MEFOtjDRaaWbf/M=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: support sharing memory Message-Id: Date: Sat, 19 Aug 2023 05:01:23 +0000 commit 7fc2a2993d8bd71999d15b1a649b63adab3882de Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:31 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: support sharing memory Adds support for a guest to share memory with an SP using FFA_MEM_SHARE. Only memory regions small enough to be shared with a single call to FFA_MEM_SHARE are supported. With this commit we have a FF-A version 1.1 [1] mediator able to communicate with a Secure Partition in secure world using shared memory. The secure world must use FF-A version 1.1, but the guest is free to use version 1.0 or version 1.1. Adds a check that the SP supports the needed FF-A features FFA_MEM_SHARE_64 or FFA_MEM_SHARE_32. [1] https://developer.arm.com/documentation/den0077/latest Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 486 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 486 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index ea0bbd6258..2bf9b648ae 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -297,6 +297,38 @@ struct ffa_mem_transaction_1_1 { uint8_t reserved[12]; }; +/* Calculate offset of struct ffa_mem_access from start of buffer */ +#define MEM_ACCESS_OFFSET(access_idx) \ + ( sizeof(struct ffa_mem_transaction_1_1) + \ + ( access_idx ) * sizeof(struct ffa_mem_access) ) + +/* Calculate offset of struct ffa_mem_region from start of buffer */ +#define REGION_OFFSET(access_count, region_idx) \ + ( MEM_ACCESS_OFFSET(access_count) + \ + ( region_idx ) * sizeof(struct ffa_mem_region) ) + +/* Calculate offset of struct ffa_address_range from start of buffer */ +#define ADDR_RANGE_OFFSET(access_count, region_count, range_idx) \ + ( REGION_OFFSET(access_count, region_count) + \ + ( range_idx ) * sizeof(struct ffa_address_range) ) + +/* + * The parts needed from struct ffa_mem_transaction_1_0 or struct + * ffa_mem_transaction_1_1, used to provide an abstraction of difference in + * data structures between version 1.0 and 1.1. This is just an internal + * interface and can be changed without changing any ABI. + */ +struct ffa_mem_transaction_int { + uint16_t sender_id; + uint8_t mem_reg_attr; + uint8_t flags; + uint8_t mem_access_size; + uint8_t mem_access_count; + uint16_t mem_access_offs; + uint64_t handle; + uint64_t tag; +}; + /* Endpoint RX/TX descriptor */ struct ffa_endpoint_rxtx_descriptor_1_0 { uint16_t sender_id; @@ -327,9 +359,22 @@ struct ffa_ctx { */ uint16_t create_signal_count; bool rx_is_free; + /* Used shared memory objects, struct ffa_shm_mem */ + struct list_head shm_list; + /* Number of allocated shared memory object */ + unsigned int shm_count; spinlock_t lock; }; +struct ffa_shm_mem { + struct list_head list; + uint16_t sender_id; + uint16_t ep_id; /* endpoint, the one lending */ + uint64_t handle; /* FFA_HANDLE_INVALID if not set yet */ + unsigned int page_count; + struct page_info *pages[]; +}; + /* Negotiated FF-A version to use with the SPMC */ static uint32_t __ro_after_init ffa_version; @@ -351,6 +396,7 @@ static uint16_t subscr_vm_destroyed_count __read_mostly; static void *ffa_rx __read_mostly; static void *ffa_tx __read_mostly; static DEFINE_SPINLOCK(ffa_rx_buffer_lock); +static DEFINE_SPINLOCK(ffa_tx_buffer_lock); static bool ffa_get_version(uint32_t *vers) { @@ -457,6 +503,41 @@ static int32_t ffa_rx_release(void) return ffa_simple_call(FFA_RX_RELEASE, 0, 0, 0, 0); } +static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, + register_t addr, uint32_t pg_count, + uint64_t *handle) +{ + struct arm_smccc_1_2_regs arg = { + .a0 = FFA_MEM_SHARE_64, + .a1 = tot_len, + .a2 = frag_len, + .a3 = addr, + .a4 = pg_count, + }; + struct arm_smccc_1_2_regs resp; + + arm_smccc_1_2_smc(&arg, &resp); + + switch ( resp.a0 ) + { + case FFA_ERROR: + if ( resp.a2 ) + return resp.a2; + else + return FFA_RET_NOT_SUPPORTED; + case FFA_SUCCESS_32: + *handle = regpair_to_uint64(resp.a3, resp.a2); + return FFA_RET_OK; + case FFA_MEM_FRAG_RX: + *handle = regpair_to_uint64(resp.a2, resp.a1); + if ( resp.a3 > INT32_MAX ) /* Impossible value */ + return FFA_RET_ABORTED; + return resp.a3 & INT32_MAX; + default: + return FFA_RET_NOT_SUPPORTED; + } +} + static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, uint8_t msg) { @@ -805,6 +886,403 @@ out: resp.a4 & mask, resp.a5 & mask, resp.a6 & mask, resp.a7 & mask); } +/* + * Gets all page and assigns them to the supplied shared memory object. If + * this function fails then the caller is still expected to call + * put_shm_pages() as a cleanup. + */ +static int get_shm_pages(struct domain *d, struct ffa_shm_mem *shm, + const struct ffa_address_range *range, + uint32_t range_count, unsigned int start_page_idx, + unsigned int *last_page_idx) +{ + unsigned int pg_idx = start_page_idx; + gfn_t gfn; + unsigned int n; + unsigned int m; + p2m_type_t t; + uint64_t addr; + uint64_t page_count; + + for ( n = 0; n < range_count; n++ ) + { + page_count = read_atomic(&range[n].page_count); + addr = read_atomic(&range[n].address); + for ( m = 0; m < page_count; m++ ) + { + if ( pg_idx >= shm->page_count ) + return FFA_RET_INVALID_PARAMETERS; + + gfn = gaddr_to_gfn(addr + m * FFA_PAGE_SIZE); + shm->pages[pg_idx] = get_page_from_gfn(d, gfn_x(gfn), &t, + P2M_ALLOC); + if ( !shm->pages[pg_idx] ) + return FFA_RET_DENIED; + /* Only normal RW RAM for now */ + if ( t != p2m_ram_rw ) + return FFA_RET_DENIED; + pg_idx++; + } + } + + *last_page_idx = pg_idx; + + return FFA_RET_OK; +} + +static void put_shm_pages(struct ffa_shm_mem *shm) +{ + unsigned int n; + + for ( n = 0; n < shm->page_count && shm->pages[n]; n++ ) + { + put_page(shm->pages[n]); + shm->pages[n] = NULL; + } +} + +static struct ffa_shm_mem *alloc_ffa_shm_mem(struct ffa_ctx *ctx, + unsigned int page_count) +{ + struct ffa_shm_mem *shm; + + if ( page_count >= FFA_MAX_SHM_PAGE_COUNT || + ctx->shm_count >= FFA_MAX_SHM_COUNT ) + return NULL; + + shm = xzalloc_flex_struct(struct ffa_shm_mem, pages, page_count); + if ( shm ) + { + ctx->shm_count++; + shm->page_count = page_count; + } + + return shm; +} + +static void free_ffa_shm_mem(struct ffa_ctx *ctx, struct ffa_shm_mem *shm) +{ + if ( !shm ) + return; + + ASSERT(ctx->shm_count > 0); + ctx->shm_count--; + put_shm_pages(shm); + xfree(shm); +} + +static void init_range(struct ffa_address_range *addr_range, + paddr_t pa) +{ + memset(addr_range, 0, sizeof(*addr_range)); + addr_range->address = pa; + addr_range->page_count = 1; +} + +/* + * This function uses the ffa_tx buffer to transmit the memory transaction + * descriptor. The function depends ffa_tx_buffer_lock to be used to guard + * the buffer from concurrent use. + */ +static int share_shm(struct ffa_shm_mem *shm) +{ + const uint32_t max_frag_len = FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE; + struct ffa_mem_access *mem_access_array; + struct ffa_mem_transaction_1_1 *descr; + struct ffa_address_range *addr_range; + struct ffa_mem_region *region_descr; + const unsigned int region_count = 1; + void *buf = ffa_tx; + uint32_t frag_len; + uint32_t tot_len; + paddr_t last_pa; + unsigned int n; + paddr_t pa; + + ASSERT(spin_is_locked(&ffa_tx_buffer_lock)); + ASSERT(shm->page_count); + + descr = buf; + memset(descr, 0, sizeof(*descr)); + descr->sender_id = shm->sender_id; + descr->handle = shm->handle; + descr->mem_reg_attr = FFA_NORMAL_MEM_REG_ATTR; + descr->mem_access_count = 1; + descr->mem_access_size = sizeof(*mem_access_array); + descr->mem_access_offs = MEM_ACCESS_OFFSET(0); + + mem_access_array = buf + descr->mem_access_offs; + memset(mem_access_array, 0, sizeof(*mem_access_array)); + mem_access_array[0].access_perm.endpoint_id = shm->ep_id; + mem_access_array[0].access_perm.perm = FFA_MEM_ACC_RW; + mem_access_array[0].region_offs = REGION_OFFSET(descr->mem_access_count, 0); + + region_descr = buf + mem_access_array[0].region_offs; + memset(region_descr, 0, sizeof(*region_descr)); + region_descr->total_page_count = shm->page_count; + + region_descr->address_range_count = 1; + last_pa = page_to_maddr(shm->pages[0]); + for ( n = 1; n < shm->page_count; last_pa = pa, n++ ) + { + pa = page_to_maddr(shm->pages[n]); + if ( last_pa + FFA_PAGE_SIZE == pa ) + continue; + region_descr->address_range_count++; + } + + tot_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, + region_descr->address_range_count); + if ( tot_len > max_frag_len ) + return FFA_RET_NOT_SUPPORTED; + + addr_range = region_descr->address_range_array; + frag_len = ADDR_RANGE_OFFSET(descr->mem_access_count, region_count, 1); + last_pa = page_to_maddr(shm->pages[0]); + init_range(addr_range, last_pa); + for ( n = 1; n < shm->page_count; last_pa = pa, n++ ) + { + pa = page_to_maddr(shm->pages[n]); + if ( last_pa + FFA_PAGE_SIZE == pa ) + { + addr_range->page_count++; + continue; + } + + frag_len += sizeof(*addr_range); + addr_range++; + init_range(addr_range, pa); + } + + return ffa_mem_share(tot_len, frag_len, 0, 0, &shm->handle); +} + +static int read_mem_transaction(uint32_t ffa_vers, const void *buf, size_t blen, + struct ffa_mem_transaction_int *trans) +{ + uint16_t mem_reg_attr; + uint32_t flags; + uint32_t count; + uint32_t offs; + uint32_t size; + + if ( ffa_vers >= FFA_VERSION_1_1 ) + { + const struct ffa_mem_transaction_1_1 *descr; + + if ( blen < sizeof(*descr) ) + return FFA_RET_INVALID_PARAMETERS; + + descr = buf; + trans->sender_id = descr->sender_id; + mem_reg_attr = descr->mem_reg_attr; + flags = descr->flags; + trans->handle = descr->handle; + trans->tag = descr->tag; + + count = descr->mem_access_count; + size = descr->mem_access_size; + offs = descr->mem_access_offs; + } + else + { + const struct ffa_mem_transaction_1_0 *descr; + + if ( blen < sizeof(*descr) ) + return FFA_RET_INVALID_PARAMETERS; + + descr = buf; + trans->sender_id = descr->sender_id; + mem_reg_attr = descr->mem_reg_attr; + flags = descr->flags; + trans->handle = descr->handle; + trans->tag = descr->tag; + + count = descr->mem_access_count; + size = sizeof(struct ffa_mem_access); + offs = offsetof(struct ffa_mem_transaction_1_0, mem_access_array); + } + /* + * Make sure that "descr" which is shared with the guest isn't accessed + * again after this point. + */ + barrier(); + + /* + * We're doing a rough check to see that no information is lost when + * tranfering the values into a struct ffa_mem_transaction_int below. + * The fields in struct ffa_mem_transaction_int are wide enough to hold + * any valid value so being out of range means that something is wrong. + */ + if ( mem_reg_attr > UINT8_MAX || flags > UINT8_MAX || size > UINT8_MAX || + count > UINT8_MAX || offs > UINT16_MAX ) + return FFA_RET_INVALID_PARAMETERS; + + /* Check that the endpoint memory access descriptor array fits */ + if ( size * count + offs > blen ) + return FFA_RET_INVALID_PARAMETERS; + + trans->mem_reg_attr = mem_reg_attr; + trans->flags = flags; + trans->mem_access_size = size; + trans->mem_access_count = count; + trans->mem_access_offs = offs; + + return 0; +} + +static void handle_mem_share(struct cpu_user_regs *regs) +{ + uint32_t tot_len = get_user_reg(regs, 1); + uint32_t frag_len = get_user_reg(regs, 2); + uint64_t addr = get_user_reg(regs, 3); + uint32_t page_count = get_user_reg(regs, 4); + const struct ffa_mem_region *region_descr; + const struct ffa_mem_access *mem_access; + struct ffa_mem_transaction_int trans; + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + struct ffa_shm_mem *shm = NULL; + unsigned int last_page_idx = 0; + register_t handle_hi = 0; + register_t handle_lo = 0; + int ret = FFA_RET_DENIED; + uint32_t range_count; + uint32_t region_offs; + + /* + * We're only accepting memory transaction descriptors via the rx/tx + * buffer. + */ + if ( addr ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_set_ret; + } + + /* Check that fragment length doesn't exceed total length */ + if ( frag_len > tot_len ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_set_ret; + } + + /* We currently only support a single fragment */ + if ( frag_len != tot_len ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_set_ret; + } + + spin_lock(&ctx->lock); + + if ( frag_len > ctx->page_count * FFA_PAGE_SIZE ) + goto out_unlock; + + ret = read_mem_transaction(ctx->guest_vers, ctx->tx, frag_len, &trans); + if ( ret ) + goto out_unlock; + + if ( trans.mem_reg_attr != FFA_NORMAL_MEM_REG_ATTR ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_unlock; + } + + /* Only supports sharing it with one SP for now */ + if ( trans.mem_access_count != 1 ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_unlock; + } + + if ( trans.sender_id != get_vm_id(d) ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + + /* Check that it fits in the supplied data */ + if ( trans.mem_access_offs + trans.mem_access_size > frag_len ) + goto out_unlock; + + mem_access = ctx->tx + trans.mem_access_offs; + if ( read_atomic(&mem_access->access_perm.perm) != FFA_MEM_ACC_RW ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_unlock; + } + + region_offs = read_atomic(&mem_access->region_offs); + if ( sizeof(*region_descr) + region_offs > frag_len ) + { + ret = FFA_RET_NOT_SUPPORTED; + goto out_unlock; + } + + region_descr = ctx->tx + region_offs; + range_count = read_atomic(®ion_descr->address_range_count); + page_count = read_atomic(®ion_descr->total_page_count); + + if ( !page_count ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out_unlock; + } + + shm = alloc_ffa_shm_mem(ctx, page_count); + if ( !shm ) + { + ret = FFA_RET_NO_MEMORY; + goto out_unlock; + } + shm->sender_id = trans.sender_id; + shm->ep_id = read_atomic(&mem_access->access_perm.endpoint_id); + + /* + * Check that the Composite memory region descriptor fits. + */ + if ( sizeof(*region_descr) + region_offs + + range_count * sizeof(struct ffa_address_range) > frag_len ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + ret = get_shm_pages(d, shm, region_descr->address_range_array, range_count, + 0, &last_page_idx); + if ( ret ) + goto out; + if ( last_page_idx != shm->page_count ) + { + ret = FFA_RET_INVALID_PARAMETERS; + goto out; + } + + /* Note that share_shm() uses our tx buffer */ + spin_lock(&ffa_tx_buffer_lock); + ret = share_shm(shm); + spin_unlock(&ffa_tx_buffer_lock); + if ( ret ) + goto out; + + list_add_tail(&shm->list, &ctx->shm_list); + + uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); + +out: + if ( ret ) + free_ffa_shm_mem(ctx, shm); +out_unlock: + spin_unlock(&ctx->lock); + +out_set_ret: + if ( ret == 0) + set_regs_success(regs, handle_lo, handle_hi); + else + set_regs_error(regs, ret); +} + static bool ffa_handle_call(struct cpu_user_regs *regs) { uint32_t fid = get_user_reg(regs, 0); @@ -862,6 +1340,10 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) case FFA_MSG_SEND_DIRECT_REQ_64: handle_msg_send_direct_req(regs, fid); return true; + case FFA_MEM_SHARE_32: + case FFA_MEM_SHARE_64: + handle_mem_share(regs); + return true; default: gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); @@ -904,6 +1386,8 @@ static int ffa_domain_init(struct domain *d) } ctx->create_signal_count = subscr_vm_created_count; + INIT_LIST_HEAD(&ctx->shm_list); + return 0; } @@ -1093,7 +1577,9 @@ static bool ffa_probe(void) if ( !check_mandatory_feature(FFA_PARTITION_INFO_GET) || !check_mandatory_feature(FFA_RX_RELEASE) || !check_mandatory_feature(FFA_RXTX_MAP_64) || + !check_mandatory_feature(FFA_MEM_SHARE_64) || !check_mandatory_feature(FFA_RXTX_UNMAP) || + !check_mandatory_feature(FFA_MEM_SHARE_32) || !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) return false; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:34 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586935.918222 (Exim 4.92) (envelope-from ) id 1qXE5e-0007so-5T; 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Sat, 19 Aug 2023 05:01:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=hAvw1pPMQnih0x97msI+2eGi/K4jYoOWuLqKMGL0w4A=; b=KUhkqbNJQFjLsz7F0GsqECkz9e IPOQVb5/XrJ+CH453Ersn7RT9O3ignmjB7Q3WtsHdAkxdOfXPd1cQr6z0FcCQKhEGIbDJ6zwfvMJD 8HeEkhE+8d3y/pinw8qWMhlQSfXI3BuupA69NpG9VG9FT3fBvYrBMOmWqoyFq+HH6loY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: add support to reclaim shared memory Message-Id: Date: Sat, 19 Aug 2023 05:01:33 +0000 commit 195b2adf7111a4ba171b8001b2ce1388a9ba2f0b Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:32 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: add support to reclaim shared memory Adds support to reclaim memory previously shared with FFA_MEM_SHARE. A memory region that doesn't need to be shared any longer can be reclaimed with FFA_MEM_RECLAIM once the SP doesn't use it any longer. This is checked by the SPMC and not in control of the mediator. Adds a check that the SP supports the needed FF-A feature FFA_MEM_RECLAIM. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index 2bf9b648ae..f0e2d98cbf 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -538,6 +538,12 @@ static int32_t ffa_mem_share(uint32_t tot_len, uint32_t frag_len, } } +static int32_t ffa_mem_reclaim(uint32_t handle_lo, uint32_t handle_hi, + uint32_t flags) +{ + return ffa_simple_call(FFA_MEM_RECLAIM, handle_lo, handle_hi, flags, 0); +} + static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id, uint8_t msg) { @@ -1283,6 +1289,43 @@ out_set_ret: set_regs_error(regs, ret); } +static int handle_mem_reclaim(uint64_t handle, uint32_t flags) +{ + struct domain *d = current->domain; + struct ffa_ctx *ctx = d->arch.tee; + struct ffa_shm_mem *shm; + register_t handle_hi; + register_t handle_lo; + int ret; + + spin_lock(&ctx->lock); + list_for_each_entry(shm, &ctx->shm_list, list) + { + if ( shm->handle == handle ) + goto found_it; + } + shm = NULL; + ret = FFA_RET_INVALID_PARAMETERS; + goto out; +found_it: + + uint64_to_regpair(&handle_hi, &handle_lo, handle); + ret = ffa_mem_reclaim(handle_lo, handle_hi, flags); + if ( ret ) + { + shm = NULL; + goto out; + } + + list_del(&shm->list); + +out: + free_ffa_shm_mem(ctx, shm); + spin_unlock(&ctx->lock); + + return ret; +} + static bool ffa_handle_call(struct cpu_user_regs *regs) { uint32_t fid = get_user_reg(regs, 0); @@ -1344,6 +1387,15 @@ static bool ffa_handle_call(struct cpu_user_regs *regs) case FFA_MEM_SHARE_64: handle_mem_share(regs); return true; + case FFA_MEM_RECLAIM: + e = handle_mem_reclaim(regpair_to_uint64(get_user_reg(regs, 2), + get_user_reg(regs, 1)), + get_user_reg(regs, 3)); + if ( e ) + set_regs_error(regs, e); + else + set_regs_success(regs, 0, 0); + return true; default: gprintk(XENLOG_ERR, "ffa: unhandled fid 0x%x\n", fid); @@ -1580,6 +1632,7 @@ static bool ffa_probe(void) !check_mandatory_feature(FFA_MEM_SHARE_64) || !check_mandatory_feature(FFA_RXTX_UNMAP) || !check_mandatory_feature(FFA_MEM_SHARE_32) || + !check_mandatory_feature(FFA_MEM_RECLAIM) || !check_mandatory_feature(FFA_MSG_SEND_DIRECT_REQ_32) ) return false; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586936.918226 (Exim 4.92) (envelope-from ) id 1qXE5o-0007vS-75; Sat, 19 Aug 2023 05:01:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586936.918226; Sat, 19 Aug 2023 05:01:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5o-0007vL-4Z; Sat, 19 Aug 2023 05:01:44 +0000 Received: by outflank-mailman (input) for mailman id 586936; Sat, 19 Aug 2023 05:01:43 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5n-0007vD-NM for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:43 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5n-0002Jx-MP for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:43 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE5n-0003RJ-Lc for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:43 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SEIKNl3XNhY5hbCmUeMSWsNMj+OvM1Zc/uzAqAq0iYA=; b=nqs7p+UlVBIIyPcWpr0RSUi1OO jr6YC+vBTG2CKTTmlURyBfEUc9vfmwmEedtEko5klUdE0pfKeAulNv8Er9Kps6rRfYJBpfqZuax2J Wi8jheqks8idbm8z+2lWtDZeBQ/flCq26m35sCdVowyIHv5dRHQqeUg8NmZj137L2hU8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: improve lock granularity Message-Id: Date: Sat, 19 Aug 2023 05:01:43 +0000 commit cd3d2a9d9726f08891d9178cfccd05268ace2cbe Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:33 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: improve lock granularity The single lock in struct ffa_ctx is complemented with rx_lock and tx_lock. The old lock is used for small critical sections, like increasing shm_count or adding another shm to shm_list. rx_lock and tx_lock are only acquired using spin_trylock() which for well-behaving guests should always succeed. Guests using the RX and TX buffers are expected to serialize accesses before doing the FF-A request. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 107 +++++++++++++++++++++++++++++++++++-------------- 1 file changed, 77 insertions(+), 30 deletions(-) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index f0e2d98cbf..b465c7f1b7 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -363,6 +363,13 @@ struct ffa_ctx { struct list_head shm_list; /* Number of allocated shared memory object */ unsigned int shm_count; + /* + * tx_lock is used to serialize access to tx + * rx_lock is used to serialize access to rx + * lock is used for the rest in this struct + */ + spinlock_t tx_lock; + spinlock_t rx_lock; spinlock_t lock; }; @@ -768,7 +775,9 @@ static int32_t handle_partition_info_get(uint32_t w1, uint32_t w2, uint32_t w3, if ( !ffa_rx ) return FFA_RET_DENIED; - spin_lock(&ctx->lock); + if ( !spin_trylock(&ctx->rx_lock) ) + return FFA_RET_BUSY; + if ( !ctx->page_count || !ctx->rx_is_free ) goto out; spin_lock(&ffa_rx_buffer_lock); @@ -819,7 +828,7 @@ out_rx_release: out_rx_buf_unlock: spin_unlock(&ffa_rx_buffer_lock); out: - spin_unlock(&ctx->lock); + spin_unlock(&ctx->rx_lock); return ret; } @@ -830,13 +839,15 @@ static int32_t handle_rx_release(void) struct domain *d = current->domain; struct ffa_ctx *ctx = d->arch.tee; - spin_lock(&ctx->lock); + if ( !spin_trylock(&ctx->rx_lock) ) + return FFA_RET_BUSY; + if ( !ctx->page_count || ctx->rx_is_free ) goto out; ret = FFA_RET_OK; ctx->rx_is_free = true; out: - spin_unlock(&ctx->lock); + spin_unlock(&ctx->rx_lock); return ret; } @@ -947,21 +958,43 @@ static void put_shm_pages(struct ffa_shm_mem *shm) } } +static bool inc_ctx_shm_count(struct ffa_ctx *ctx) +{ + bool ret = true; + + spin_lock(&ctx->lock); + if (ctx->shm_count >= FFA_MAX_SHM_COUNT) + ret = false; + else + ctx->shm_count++; + spin_unlock(&ctx->lock); + + return ret; +} + +static void dec_ctx_shm_count(struct ffa_ctx *ctx) +{ + spin_lock(&ctx->lock); + ASSERT(ctx->shm_count > 0); + ctx->shm_count--; + spin_unlock(&ctx->lock); +} + static struct ffa_shm_mem *alloc_ffa_shm_mem(struct ffa_ctx *ctx, unsigned int page_count) { struct ffa_shm_mem *shm; - if ( page_count >= FFA_MAX_SHM_PAGE_COUNT || - ctx->shm_count >= FFA_MAX_SHM_COUNT ) + if ( page_count >= FFA_MAX_SHM_PAGE_COUNT ) + return NULL; + if ( !inc_ctx_shm_count(ctx) ) return NULL; shm = xzalloc_flex_struct(struct ffa_shm_mem, pages, page_count); if ( shm ) - { - ctx->shm_count++; shm->page_count = page_count; - } + else + dec_ctx_shm_count(ctx); return shm; } @@ -971,8 +1004,7 @@ static void free_ffa_shm_mem(struct ffa_ctx *ctx, struct ffa_shm_mem *shm) if ( !shm ) return; - ASSERT(ctx->shm_count > 0); - ctx->shm_count--; + dec_ctx_shm_count(ctx); put_shm_pages(shm); xfree(shm); } @@ -1180,7 +1212,11 @@ static void handle_mem_share(struct cpu_user_regs *regs) goto out_set_ret; } - spin_lock(&ctx->lock); + if ( !spin_trylock(&ctx->tx_lock) ) + { + ret = FFA_RET_BUSY; + goto out_set_ret; + } if ( frag_len > ctx->page_count * FFA_PAGE_SIZE ) goto out_unlock; @@ -1272,7 +1308,9 @@ static void handle_mem_share(struct cpu_user_regs *regs) if ( ret ) goto out; + spin_lock(&ctx->lock); list_add_tail(&shm->list, &ctx->shm_list); + spin_unlock(&ctx->lock); uint64_to_regpair(&handle_hi, &handle_lo, shm->handle); @@ -1280,7 +1318,7 @@ out: if ( ret ) free_ffa_shm_mem(ctx, shm); out_unlock: - spin_unlock(&ctx->lock); + spin_unlock(&ctx->tx_lock); out_set_ret: if ( ret == 0) @@ -1289,6 +1327,18 @@ out_set_ret: set_regs_error(regs, ret); } +/* Must only be called with ctx->lock held */ +static struct ffa_shm_mem *find_shm_mem(struct ffa_ctx *ctx, uint64_t handle) +{ + struct ffa_shm_mem *shm; + + list_for_each_entry(shm, &ctx->shm_list, list) + if ( shm->handle == handle ) + return shm; + + return NULL; +} + static int handle_mem_reclaim(uint64_t handle, uint32_t flags) { struct domain *d = current->domain; @@ -1299,29 +1349,26 @@ static int handle_mem_reclaim(uint64_t handle, uint32_t flags) int ret; spin_lock(&ctx->lock); - list_for_each_entry(shm, &ctx->shm_list, list) - { - if ( shm->handle == handle ) - goto found_it; - } - shm = NULL; - ret = FFA_RET_INVALID_PARAMETERS; - goto out; -found_it: + shm = find_shm_mem(ctx, handle); + if ( shm ) + list_del(&shm->list); + spin_unlock(&ctx->lock); + if ( !shm ) + return FFA_RET_INVALID_PARAMETERS; uint64_to_regpair(&handle_hi, &handle_lo, handle); ret = ffa_mem_reclaim(handle_lo, handle_hi, flags); + if ( ret ) { - shm = NULL; - goto out; + spin_lock(&ctx->lock); + list_add_tail(&shm->list, &ctx->shm_list); + spin_unlock(&ctx->lock); + } + else + { + free_ffa_shm_mem(ctx, shm); } - - list_del(&shm->list); - -out: - free_ffa_shm_mem(ctx, shm); - spin_unlock(&ctx->lock); return ret; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:01:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:01:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586937.918231 (Exim 4.92) (envelope-from ) id 1qXE5y-0007y1-99; Sat, 19 Aug 2023 05:01:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586937.918231; Sat, 19 Aug 2023 05:01:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5y-0007xt-6D; Sat, 19 Aug 2023 05:01:54 +0000 Received: by outflank-mailman (input) for mailman id 586937; Sat, 19 Aug 2023 05:01:53 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5x-0007xh-QF for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:53 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE5x-0002K5-PS for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:53 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE5x-0003S8-OW for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:01:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=dKgyBsvg5hp7zYUVqYob6cq7du2jzK0gH/Xdty5Xlp0=; b=ADPbhofj/BuCYYgXSQxCIJkBI9 7J8RdsnPa6CBEe1BGljZwFOKn87+cj5t04BUsULmJTuU3qIwfvwxQ4CaccdduV4MbhBewW/TIIbty Sm71X3g9JhtVjTqhykTjDP5K7xZ5QnbBz6D21Iu0GsfIO8pOmJpm4Wqukni8FZVn1Tqw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: ffa: list current limitations Message-Id: Date: Sat, 19 Aug 2023 05:01:53 +0000 commit 51a39203632f81d1b85ae7f3a160a80b4052be02 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:34 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 xen/arm: ffa: list current limitations Adds comments with a list of unsupported FF-A interfaces and limitations in the implemented FF-A interfaces. Signed-off-by: Jens Wiklander Reviewed-by: Henry Wang Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c index b465c7f1b7..802b2dbb1d 100644 --- a/xen/arch/arm/tee/ffa.c +++ b/xen/arch/arm/tee/ffa.c @@ -13,6 +13,37 @@ * https://developer.arm.com/documentation/den0077/e * TEEC-1.0C: TEE Client API Specification version 1.0c available at * https://globalplatform.org/specs-library/tee-client-api-specification/ + * + * Notes on the the current implementation. + * + * Unsupported FF-A interfaces: + * o FFA_MSG_POLL and FFA_MSG_SEND - deprecated in FF-A-1.1-REL0 + * o FFA_MEM_RETRIEVE_* - Used when sharing memory from an SP to a VM + * o FFA_MEM_DONATE_* and FFA_MEM_LEND_* - Used when tranferring ownership + * or access of a memory region + * o FFA_MSG_SEND2 and FFA_MSG_WAIT - Used for indirect messaging + * o FFA_MSG_YIELD + * o FFA_INTERRUPT - Used to report preemption + * o FFA_RUN + * + * Limitations in the implemented FF-A interfaces: + * o FFA_RXTX_MAP_*: + * - Maps only one 4k page as RX and TX buffers + * - Doesn't support forwarding this call on behalf of an endpoint + * o FFA_MEM_SHARE_*: only supports sharing + * - from a VM to an SP + * - with one borrower + * - with the memory transaction descriptor in the RX/TX buffer + * - normal memory + * - at most 512 kB large memory regions + * - at most 32 shared memory regions per guest + * o FFA_MSG_SEND_DIRECT_REQ: + * - only supported from a VM to an SP + * + * There are some large locked sections with ffa_tx_buffer_lock and + * ffa_rx_buffer_lock. Especially the ffa_tx_buffer_lock spinlock used + * around share_shm() is a very large locked section which can let one VM + * affect another VM. */ #include -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586938.918234 (Exim 4.92) (envelope-from ) id 1qXE69-00080p-AQ; Sat, 19 Aug 2023 05:02:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586938.918234; Sat, 19 Aug 2023 05:02:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE69-00080i-7r; Sat, 19 Aug 2023 05:02:05 +0000 Received: by outflank-mailman (input) for mailman id 586938; Sat, 19 Aug 2023 05:02:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE67-00080U-TS for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE67-0002KP-Sl for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:03 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE67-0003T7-Rw for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:03 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cUkNTF6f9cfYKlGaZyQBt1M6Jn6RCIM+HKWSQmaKzuc=; b=ORPIf2uv2saWh3EK2FhzuVUpYM oXMvbMu9Lnzuto+JFYjOAXSomfWaY/dohSubSv7of4c3flR17xjbotWbWduBEepTN8m1TOk5+sW/1 lcpLCWV/6qXhOFX/291GXe9Y2jvbLeZZw9QZEmIc0TyMgpiB0BzXXW91hKfHTKADAf6k=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools: add Arm FF-A mediator Message-Id: Date: Sat, 19 Aug 2023 05:02:03 +0000 commit 8abdd8d52862c7b9365f99b492ad90fcd5d6fc8f Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:35 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 tools: add Arm FF-A mediator Adds a new "ffa" value to the Enumeration "tee_type" to indicate if a guest is trusted to use FF-A. Signed-off-by: Jens Wiklander Reviewed-by: Bertrand Marquis Reviewed-by: Henry Wang Acked-by: Anthony PERARD --- tools/include/libxl.h | 5 +++++ tools/libs/light/libxl_arm.c | 3 +++ tools/libs/light/libxl_types.idl | 3 ++- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tools/include/libxl.h b/tools/include/libxl.h index aa5b1c98d4..82b764ff57 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -292,6 +292,11 @@ */ #define LIBXL_HAVE_BUILDINFO_ARCH_ARM_TEE 1 +/* + * arch_arm.tee field in libxl_domain_build_info has ffa value. + */ +#define LIBXL_HAVE_BUILDINFO_ARCH_ARM_TEE_FFA 1 + /* * libxl_domain_build_info has the arch_arm.sve_vl field. */ diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index f98e1affa2..1539191774 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -207,6 +207,9 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, case LIBXL_TEE_TYPE_OPTEE: config->arch.tee_type = XEN_DOMCTL_CONFIG_TEE_OPTEE; break; + case LIBXL_TEE_TYPE_FFA: + config->arch.tee_type = XEN_DOMCTL_CONFIG_TEE_FFA; + break; default: LOG(ERROR, "Unknown TEE type %d", d_config->b_info.tee); diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index b524d1578b..3bd66291af 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -520,7 +520,8 @@ libxl_gic_version = Enumeration("gic_version", [ libxl_tee_type = Enumeration("tee_type", [ (0, "none"), - (1, "optee") + (1, "optee"), + (2, "ffa"), ], init_val = "LIBXL_TEE_TYPE_NONE") libxl_sve_type = Enumeration("sve_type", [ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586939.918238 (Exim 4.92) (envelope-from ) id 1qXE6J-00083I-C4; Sat, 19 Aug 2023 05:02:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586939.918238; Sat, 19 Aug 2023 05:02:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6J-000839-9S; Sat, 19 Aug 2023 05:02:15 +0000 Received: by outflank-mailman (input) for mailman id 586939; Sat, 19 Aug 2023 05:02:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6I-000831-0N for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6H-0002Ks-Vx for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:13 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE6H-0003Tq-VG for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:13 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZKCKNSKJLeDnkluczpkv6buiyycIQ5Q2MoPH4Kt1xHQ=; b=Iqa2mSLdqP5otsC/cTRTGjLInl Nh9L/XmMpRWEtpoVbQ1HMfqRhILBTUP11PFVcRITV8FNwNYyX1XXqHLdXxxiO2prdeevqo8HYFbrF rDV6EPHJuYiw0aJbj8f5La7u8yKRViOfps82woVNIbfrqXaTVjn8GyQNpY93C0x1nK60=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] docs: add Arm FF-A mediator Message-Id: Date: Sat, 19 Aug 2023 05:02:13 +0000 commit e6cb27f2f20d09dd2ba135fbc341a4dc98656e10 Author: Jens Wiklander AuthorDate: Mon Jul 31 14:15:36 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 09:29:23 2023 +0100 docs: add Arm FF-A mediator Describes a FF-A version 1.1 [1] mediator to communicate with a Secure Partition in secure world. [1] https://developer.arm.com/documentation/den0077/latest Signed-off-by: Jens Wiklander Reviewed-by: Henry Wang Reviewed-by: Bertrand Marquis Reviewed-by: Anthony PERARD --- CHANGELOG.md | 2 ++ SUPPORT.md | 9 +++++++++ docs/man/xl.cfg.5.pod.in | 15 +++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7e5efcabda..2a967f9f0e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -24,6 +24,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) - xl/libxl can customize SMBIOS strings for HVM guests. - Add support for AVX512-FP16 on x86. - On Arm, Xen supports guests running SVE/SVE2 instructions. (Tech Preview) + - On Arm, add suport for Firmware Framework for Arm A-profile (FF-A) Mediator + (Tech Preview) ### Removed - On x86, the "pku" command line option has been removed. It has never diff --git a/SUPPORT.md b/SUPPORT.md index 1c9f0b7d8c..6ce0ec29b0 100644 --- a/SUPPORT.md +++ b/SUPPORT.md @@ -842,6 +842,15 @@ that covers the DMA of the device to be passed through. No support for QEMU backends in a 16K or 64K domain. +### ARM: Firmware Framework for Arm A-profile (FF-A) Mediator + + Status, Arm64: Tech Preview + +There are still some code paths where a vCPU may hog a pCPU longer than +necessary. The FF-A mediator is not yet implemented for Arm32. Part of the +FF-A specification is not supported, see the top comment in +xen/arch/arm/tee/ffa.c for limitations. + ### ARM: Guest Device Tree support Status: Supported diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index a2bccd5b48..ec4864958e 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -1656,6 +1656,21 @@ in OP-TEE. This feature is a B. +=item B + +B Allow a guest to communicate via FF-A with Secure Partitions +(SP), default false. + +Currently only a small subset of the FF-A specification is supported. Just +enough to communicate with OP-TEE. In general only direct messaging and +sharing memory with one SP. More advanced use cases where memory might be +shared or donated to multiple SPs are not supported. + +See L for more +information about FF-A. + +This feature is a B. + =back =back -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:25 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586940.918243 (Exim 4.92) (envelope-from ) id 1qXE6T-00086G-El; Sat, 19 Aug 2023 05:02:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586940.918243; Sat, 19 Aug 2023 05:02:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6T-000868-BO; Sat, 19 Aug 2023 05:02:25 +0000 Received: by outflank-mailman (input) for mailman id 586940; Sat, 19 Aug 2023 05:02:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6S-00085w-3F for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6S-0002L7-2V for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE6S-0003UL-1q for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=E13Dvhjaxz++011D3e4IaZZBVdu8dGGn/+uKZ769/lU=; b=wvAMenLC45/UaSEv8e7Vz4enoE XTP0JuEXpKVYrjjnW9yUGfDzjGvwNF6XCJkjHmSt/Ie6seQaEjD2vhx4WnwtNx2ooEGzo1hnqnNip rdPIsMFD3r0yGcbOAhlS9ZiHNrxm2zoICZQu3LQcrIn4Sa3fAJzryJtbzHW4l/FGUSMg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: make hashtable key parameter const Message-Id: Date: Sat, 19 Aug 2023 05:02:24 +0000 commit a687272aad0cf53ce43283b8ab58091dad473d9a Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:49 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: make hashtable key parameter const The key is never modified by hashtable code, so it should be marked as const. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/hashtable.c | 5 +++-- tools/xenstore/hashtable.h | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/tools/xenstore/hashtable.c b/tools/xenstore/hashtable.c index 11f6bf8f15..9daddd9782 100644 --- a/tools/xenstore/hashtable.c +++ b/tools/xenstore/hashtable.c @@ -11,7 +11,8 @@ struct entry { - void *k, *v; + const void *k; + void *v; unsigned int h; struct entry *next; }; @@ -140,7 +141,7 @@ static int hashtable_expand(struct hashtable *h) return 0; } -int hashtable_add(struct hashtable *h, void *k, void *v) +int hashtable_add(struct hashtable *h, const void *k, void *v) { /* This method allows duplicate keys - but they shouldn't be used */ unsigned int index; diff --git a/tools/xenstore/hashtable.h b/tools/xenstore/hashtable.h index 5a2cc4a4be..792f6cda7b 100644 --- a/tools/xenstore/hashtable.h +++ b/tools/xenstore/hashtable.h @@ -48,8 +48,8 @@ create_hashtable(const void *ctx, const char *name, * If in doubt, remove before insert. */ -int -hashtable_add(struct hashtable *h, void *k, void *v); +int +hashtable_add(struct hashtable *h, const void *k, void *v); /***************************************************************************** * hashtable_search -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:35 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586941.918247 (Exim 4.92) (envelope-from ) id 1qXE6d-00089V-JK; Sat, 19 Aug 2023 05:02:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586941.918247; Sat, 19 Aug 2023 05:02:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6d-00089N-G2; Sat, 19 Aug 2023 05:02:35 +0000 Received: by outflank-mailman (input) for mailman id 586941; Sat, 19 Aug 2023 05:02:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6c-000899-6B for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6c-0002LI-5U for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE6c-0003Um-4g for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=0gBoLJD3lqnOnX68VP50fVoccVic14DVtj2N8iRojrs=; b=XCgy7iC+o9KJQZc4VZolsv5CV5 Kb41qwmz3T/czTixszc8rAHSEGiXgeMpibrcYV03EsOcuqhNji6TFQJrJ2Xb0ODfFjlpT7KvSdT45 XFw4XqumyeBoLbjy61WRxxNyHOrNuRNhv24pCdbXIyH0zREpnRhFLL7SCz1Bp9/rRIw0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: let hashtable_add() fail in case of existing entry Message-Id: Date: Sat, 19 Aug 2023 05:02:34 +0000 commit 901a740b3215284d0a8cd7c30c872012f10c4428 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:50 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: let hashtable_add() fail in case of existing entry Silently adding another entry with the same key to a hashtable is a perfect receipt for later failure with hard to diagnose symptoms. Let hashtable_add() fail in case another entry with the same key is already existing. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/hashtable.c | 40 ++++++++++++++++++++++++++++------------ tools/xenstore/hashtable.h | 6 ------ 2 files changed, 28 insertions(+), 18 deletions(-) diff --git a/tools/xenstore/hashtable.c b/tools/xenstore/hashtable.c index 9daddd9782..88e14c4c57 100644 --- a/tools/xenstore/hashtable.c +++ b/tools/xenstore/hashtable.c @@ -141,11 +141,34 @@ static int hashtable_expand(struct hashtable *h) return 0; } +static struct entry *hashtable_search_entry(const struct hashtable *h, + const void *k) +{ + struct entry *e; + unsigned int hashvalue, index; + + hashvalue = hash(h, k); + index = indexFor(h->tablelength, hashvalue); + e = h->table[index]; + + for (e = h->table[index]; e; e = e->next) + { + /* Check hash value to short circuit heavier comparison */ + if ((hashvalue == e->h) && (h->eqfn(k, e->k))) + return e; + } + + return NULL; +} + int hashtable_add(struct hashtable *h, const void *k, void *v) { - /* This method allows duplicate keys - but they shouldn't be used */ unsigned int index; struct entry *e; + + if (hashtable_search_entry(h, k)) + return EEXIST; + if (++(h->entrycount) > h->loadlimit) { /* Ignore the return value. If expand fails, we should @@ -176,17 +199,10 @@ int hashtable_add(struct hashtable *h, const void *k, void *v) void *hashtable_search(const struct hashtable *h, const void *k) { struct entry *e; - unsigned int hashvalue, index; - hashvalue = hash(h,k); - index = indexFor(h->tablelength,hashvalue); - e = h->table[index]; - while (NULL != e) - { - /* Check hash value to short circuit heavier comparison */ - if ((hashvalue == e->h) && (h->eqfn(k, e->k))) return e->v; - e = e->next; - } - return NULL; + + e = hashtable_search_entry(h, k); + + return e ? e->v : NULL; } void diff --git a/tools/xenstore/hashtable.h b/tools/xenstore/hashtable.h index 792f6cda7b..e208d439a2 100644 --- a/tools/xenstore/hashtable.h +++ b/tools/xenstore/hashtable.h @@ -40,12 +40,6 @@ create_hashtable(const void *ctx, const char *name, * * This function will cause the table to expand if the insertion would take * the ratio of entries to table size over the maximum load factor. - * - * This function does not check for repeated insertions with a duplicate key. - * The value returned when using a duplicate key is undefined -- when - * the hashtable changes size, the order of retrieval of duplicate key - * entries is reversed. - * If in doubt, remove before insert. */ int -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586942.918250 (Exim 4.92) (envelope-from ) id 1qXE6n-0008Bz-Kd; Sat, 19 Aug 2023 05:02:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586942.918250; Sat, 19 Aug 2023 05:02:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6n-0008Br-Hb; Sat, 19 Aug 2023 05:02:45 +0000 Received: by outflank-mailman (input) for mailman id 586942; Sat, 19 Aug 2023 05:02:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6m-0008Ba-95 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6m-0002LQ-8P for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE6m-0003Vh-7j for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DZNRPlYlndb7cb6erF793aXMLJ28mM/KdItbw1rXGJU=; b=h1pw/OBPVw/nFagcQDfA4URuhW Wp5j9hm+Doc9v0dpd9gfr7QI8acHXwDLt24wSyMDDYP7ObQQgZ7BvC2qNmkcU3V366mmXCXn5g4P/ OEMup58DAmP3i87UuAzV/XnI4fQy0adAymqaKOhLlyKO4ceiIroo+enqjE+CYjZnUzt0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: add hashtable_replace() function Message-Id: Date: Sat, 19 Aug 2023 05:02:44 +0000 commit a9d11f0adc2c123cf37e3ff5d91f1414a9377d3a Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:51 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: add hashtable_replace() function For an effective way to replace a hashtable entry add a new function hashtable_replace(). This is in preparation to replace TDB with a more simple data storage. Signed-off-by: Juergen Gross Acked-by: Julien Grall --- tools/xenstore/hashtable.c | 19 +++++++++++++++++++ tools/xenstore/hashtable.h | 16 ++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/tools/xenstore/hashtable.c b/tools/xenstore/hashtable.c index 88e14c4c57..0c26a09567 100644 --- a/tools/xenstore/hashtable.c +++ b/tools/xenstore/hashtable.c @@ -205,6 +205,25 @@ void *hashtable_search(const struct hashtable *h, const void *k) return e ? e->v : NULL; } +int hashtable_replace(struct hashtable *h, const void *k, void *v) +{ + struct entry *e; + + e = hashtable_search_entry(h, k); + if (!e) + return ENOENT; + + if (h->flags & HASHTABLE_FREE_VALUE) + { + talloc_free(e->v); + talloc_steal(e, v); + } + + e->v = v; + + return 0; +} + void hashtable_remove(struct hashtable *h, const void *k) { diff --git a/tools/xenstore/hashtable.h b/tools/xenstore/hashtable.h index e208d439a2..336540413b 100644 --- a/tools/xenstore/hashtable.h +++ b/tools/xenstore/hashtable.h @@ -45,6 +45,22 @@ create_hashtable(const void *ctx, const char *name, int hashtable_add(struct hashtable *h, const void *k, void *v); +/***************************************************************************** + * hashtable_replace + + * @name hashtable_nsert + * @param h the hashtable to insert into + * @param k the key - hashtable claims ownership and will free on removal + * @param v the value - does not claim ownership + * @return zero for successful insertion + * + * This function does check for an entry being present before replacing it + * with a new value. + */ + +int +hashtable_replace(struct hashtable *h, const void *k, void *v); + /***************************************************************************** * hashtable_search -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:02:55 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:02:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586943.918255 (Exim 4.92) (envelope-from ) id 1qXE6x-0008Eu-MF; Sat, 19 Aug 2023 05:02:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586943.918255; Sat, 19 Aug 2023 05:02:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6x-0008Em-JK; Sat, 19 Aug 2023 05:02:55 +0000 Received: by outflank-mailman (input) for mailman id 586943; Sat, 19 Aug 2023 05:02:54 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6w-0008Ec-CM for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE6w-0002LY-Bb for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE6w-0003W6-Aj for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:02:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=4/WWXM2oosZVrYuGYQNV2KFX6jK63yL6ZeGxXdzPMlk=; b=GayKT/axz+SimF84aNSXTi3Ww7 yvQNvYKp4+Z2GiLEMHaa0I1zGHvyODiKcl5RpRW1li2wt+Cglo9Cfjq9EhDWWbg/cbsyrnMsz1qeQ c4YMMZC252QJs9kIHhD9TVXZ/6oR9Y41rnpujZw9S5Ws3PPO9Fh7jUk3KN2C3+ZBPeKM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: drop use of tdb Message-Id: Date: Sat, 19 Aug 2023 05:02:54 +0000 commit 8bf435cdf257c0fe59e292c54c1b8af67073f821 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:52 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: drop use of tdb Today all Xenstore nodes are stored in a TDB data base. This data base has several disadvantages: - It is using a fixed sized hash table, resulting in high memory overhead for small installations with only very few VMs, and a rather large performance hit for systems with lots of VMs due to many collisions. The hash table size today is 7919 entries. This means that e.g. in case of a simple desktop use case with 2 or 3 VMs probably far less than 10% of the entries will be used (assuming roughly 100 nodes per VM). OTOH a setup on a large server with 500 VMs would result in heavy conflicts in the hash list with 5-10 nodes per hash table entry. - TDB is using a single large memory area for storing the nodes. It only ever increases this area and will never shrink it afterwards. This will result in more memory usage than necessary after a peak of Xenstore usage. - Xenstore is only single-threaded, while TDB is designed to be fit for multi-threaded use cases, resulting in much higher code complexity than needed. - Special use cases of Xenstore are not possible to implement with TDB in an effective way, while an implementation of a data base tailored for Xenstore could simplify some handling (e.g. transactions) a lot. So drop using TDB and store the nodes directly in memory making them easily accessible. Use a hash-based lookup mechanism for fast lookup of nodes by their full path. For now only replace TDB keeping the current access functions. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 156 +++++++++++++-------------------- tools/xenstore/xenstored_core.h | 5 +- tools/xenstore/xenstored_transaction.c | 1 - 3 files changed, 62 insertions(+), 100 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index a12ede147c..2b94392fd4 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -53,7 +53,6 @@ #include "xenstored_domain.h" #include "xenstored_control.h" #include "xenstored_lu.h" -#include "tdb.h" #ifndef NO_SOCKETS #if defined(HAVE_SYSTEMD) @@ -85,7 +84,7 @@ bool keep_orphans = false; static int reopen_log_pipe[2]; static int reopen_log_pipe0_pollfd_idx = -1; char *tracefile = NULL; -static TDB_CONTEXT *tdb_ctx = NULL; +static struct hashtable *nodes; unsigned int trace_flags = TRACE_OBJ | TRACE_IO; static const char *sockmsg_string(enum xsd_sockmsg_type type); @@ -556,32 +555,30 @@ static void initialize_fds(int *p_sock_pollfd_idx, int *ptimeout) } } -static void set_tdb_key(const char *name, TDB_DATA *key) -{ - /* - * Dropping const is fine here, as the key will never be modified - * by TDB. - */ - key->dptr = (char *)name; - key->dsize = strlen(name); -} - struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) { - TDB_DATA key, data; + const struct xs_tdb_record_hdr *hdr; + struct xs_tdb_record_hdr *p; - set_tdb_key(db_name, &key); - data = tdb_fetch(tdb_ctx, key); - if (!data.dptr) { - errno = (tdb_error(tdb_ctx) == TDB_ERR_NOEXIST) ? ENOENT : EIO; - *size = 0; - } else { - *size = data.dsize; - trace_tdb("read %s size %zu\n", db_name, - *size + strlen(db_name)); + hdr = hashtable_search(nodes, db_name); + if (!hdr) { + errno = ENOENT; + return NULL; } - return (struct xs_tdb_record_hdr *)data.dptr; + *size = sizeof(*hdr) + hdr->num_perms * sizeof(hdr->perms[0]) + + hdr->datalen + hdr->childlen; + + /* Return a copy, avoiding a potential modification in the DB. */ + p = talloc_memdup(NULL, hdr, *size); + if (!p) { + errno = ENOMEM; + return NULL; + } + + trace_tdb("read %s size %zu\n", db_name, *size + strlen(db_name)); + + return p; } static void get_acc_data(const char *name, struct node_account_data *acc) @@ -621,12 +618,10 @@ int db_write(struct connection *conn, const char *db_name, void *data, struct xs_tdb_record_hdr *hdr = data; struct node_account_data old_acc = {}; unsigned int old_domid, new_domid; + size_t name_len = strlen(db_name); + const char *name; int ret; - TDB_DATA key, dat; - set_tdb_key(db_name, &key); - dat.dptr = data; - dat.dsize = size; if (!acc) old_acc.memory = -1; else @@ -642,29 +637,36 @@ int db_write(struct connection *conn, const char *db_name, void *data, */ if (old_acc.memory) domain_memory_add_nochk(conn, old_domid, - -old_acc.memory - key.dsize); - ret = domain_memory_add(conn, new_domid, size + key.dsize, + -old_acc.memory - name_len); + ret = domain_memory_add(conn, new_domid, size + name_len, no_quota_check); if (ret) { /* Error path, so no quota check. */ if (old_acc.memory) domain_memory_add_nochk(conn, old_domid, - old_acc.memory + key.dsize); + old_acc.memory + name_len); return ret; } - /* TDB should set errno, but doesn't even set ecode AFAICT. */ - if (tdb_store(tdb_ctx, key, dat, - (mode == NODE_CREATE) ? TDB_INSERT : TDB_MODIFY) != 0) { - domain_memory_add_nochk(conn, new_domid, -size - key.dsize); + if (mode == NODE_CREATE) { + /* db_name could be modified later, so allocate a copy. */ + name = talloc_strdup(data, db_name); + ret = name ? hashtable_add(nodes, name, data) : ENOMEM; + } else + ret = hashtable_replace(nodes, db_name, data); + + if (ret) { + /* Free data, as it isn't owned by hashtable now. */ + talloc_free(data); + domain_memory_add_nochk(conn, new_domid, -size - name_len); /* Error path, so no quota check. */ if (old_acc.memory) domain_memory_add_nochk(conn, old_domid, - old_acc.memory + key.dsize); - errno = EIO; + old_acc.memory + name_len); + errno = ret; return errno; } - trace_tdb("store %s size %zu\n", db_name, size + key.dsize); + trace_tdb("store %s size %zu\n", db_name, size + name_len); if (acc) { /* Don't use new_domid, as it might be a transaction node. */ @@ -680,9 +682,6 @@ int db_delete(struct connection *conn, const char *name, { struct node_account_data tmp_acc; unsigned int domid; - TDB_DATA key; - - set_tdb_key(name, &key); if (!acc) { acc = &tmp_acc; @@ -691,15 +690,13 @@ int db_delete(struct connection *conn, const char *name, get_acc_data(name, acc); - if (tdb_delete(tdb_ctx, key)) { - errno = EIO; - return errno; - } + hashtable_remove(nodes, name); trace_tdb("delete %s\n", name); if (acc->memory) { domid = get_acc_domid(conn, name, acc->domid); - domain_memory_add_nochk(conn, domid, -acc->memory - key.dsize); + domain_memory_add_nochk(conn, domid, + -acc->memory - strlen(name)); } return 0; @@ -2354,43 +2351,29 @@ static void manual_node(const char *name, const char *child) talloc_free(node); } -static void tdb_logger(TDB_CONTEXT *tdb, int level, const char * fmt, ...) +static unsigned int hash_from_key_fn(const void *k) { - va_list ap; - char *s; - int saved_errno = errno; + const char *str = k; + unsigned int hash = 5381; + char c; - va_start(ap, fmt); - s = talloc_vasprintf(NULL, fmt, ap); - va_end(ap); + while ((c = *str++)) + hash = ((hash << 5) + hash) + (unsigned int)c; - if (s) { - trace("TDB: %s\n", s); - syslog(LOG_ERR, "TDB: %s", s); - if (verbose) - xprintf("TDB: %s", s); - talloc_free(s); - } else { - trace("talloc failure during logging\n"); - syslog(LOG_ERR, "talloc failure during logging\n"); - } + return hash; +} - errno = saved_errno; +static int keys_equal_fn(const void *key1, const void *key2) +{ + return 0 == strcmp(key1, key2); } void setup_structure(bool live_update) { - char *tdbname; - - tdbname = talloc_strdup(talloc_autofree_context(), "/dev/mem"); - if (!tdbname) - barf_perror("Could not create tdbname"); - - tdb_ctx = tdb_open_ex(tdbname, 7919, TDB_INTERNAL | TDB_NOLOCK, - O_RDWR | O_CREAT | O_EXCL | O_CLOEXEC, - 0640, &tdb_logger, NULL); - if (!tdb_ctx) - barf_perror("Could not create tdb file %s", tdbname); + nodes = create_hashtable(NULL, "nodes", hash_from_key_fn, keys_equal_fn, + HASHTABLE_FREE_KEY | HASHTABLE_FREE_VALUE); + if (!nodes) + barf_perror("Could not create nodes hashtable"); if (live_update) manual_node("/", NULL); @@ -2404,24 +2387,6 @@ void setup_structure(bool live_update) } } -static unsigned int hash_from_key_fn(const void *k) -{ - const char *str = k; - unsigned int hash = 5381; - char c; - - while ((c = *str++)) - hash = ((hash << 5) + hash) + (unsigned int)c; - - return hash; -} - - -static int keys_equal_fn(const void *key1, const void *key2) -{ - return 0 == strcmp(key1, key2); -} - int remember_string(struct hashtable *hash, const char *str) { char *k = talloc_strdup(NULL, str); @@ -2481,12 +2446,11 @@ static int check_store_enoent(const void *ctx, struct connection *conn, /** * Helper to clean_store below. */ -static int clean_store_(TDB_CONTEXT *tdb, TDB_DATA key, TDB_DATA val, - void *private) +static int clean_store_(const void *key, void *val, void *private) { struct hashtable *reachable = private; char *slash; - char * name = talloc_strndup(NULL, key.dptr, key.dsize); + char *name = talloc_strdup(NULL, key); if (!name) { log("clean_store: ENOMEM"); @@ -2516,7 +2480,7 @@ static int clean_store_(TDB_CONTEXT *tdb, TDB_DATA key, TDB_DATA val, */ static void clean_store(struct check_store_data *data) { - tdb_traverse(tdb_ctx, &clean_store_, data->reachable); + hashtable_iterate(nodes, clean_store_, data->reachable); domain_check_acc(data->domains); } diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index f5aa8d51a0..ce40c61f44 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -33,7 +33,6 @@ #include "xenstore_lib.h" #include "xenstore_state.h" #include "list.h" -#include "tdb.h" #include "hashtable.h" #ifndef O_CLOEXEC @@ -237,7 +236,7 @@ static inline unsigned int get_node_owner(const struct node *node) return node->perms.p[0].id; } -/* Write a node to the tdb data base. */ +/* Write a node to the data base. */ enum write_node_mode { NODE_CREATE, NODE_MODIFY @@ -247,7 +246,7 @@ int write_node_raw(struct connection *conn, const char *db_name, struct node *node, enum write_node_mode mode, bool no_quota_check); -/* Get a node from the tdb data base. */ +/* Get a node from the data base. */ struct node *read_node(struct connection *conn, const void *ctx, const char *name); diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index 1981d1d55d..378fe79763 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -397,7 +397,6 @@ static int finalize_transaction(struct connection *conn, ? NODE_CREATE : NODE_MODIFY; *is_corrupt |= db_write(conn, i->node, hdr, size, NULL, mode, true); - talloc_free(hdr); if (db_delete(conn, i->trans_name, NULL)) *is_corrupt = true; } else { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:05 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586944.918259 (Exim 4.92) (envelope-from ) id 1qXE77-0008Hi-Of; Sat, 19 Aug 2023 05:03:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586944.918259; Sat, 19 Aug 2023 05:03:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE77-0008Hb-LD; Sat, 19 Aug 2023 05:03:05 +0000 Received: by outflank-mailman (input) for mailman id 586944; Sat, 19 Aug 2023 05:03:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE76-0008HS-Fg for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE76-0002M0-En for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:04 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE76-0003Wk-Do for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:04 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=i/kmA4J5fItWZghWYojVY+CiISmHUi9mDzmrs82x1/Y=; b=hLrelMZtc7IRNgBeu+1ynktvT4 hG0VBZ6kp/RS1lxUlWIXoiOoHhzahnSwLon+DPbfz4uN+ZugwutvtfvtsFFKOtY74pj9Nleextpj4 1I73wAZ5IiqF7dyEPQYJYifLy8cDtKYJuXg5d3pUFn3GMPvjipKHuI7hI5An4/Ounyf0=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: remove tdb code Message-Id: Date: Sat, 19 Aug 2023 05:03:04 +0000 commit 6bc3a1cbdceedd069ae2ab443de9e2010e06e21e Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:53 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: remove tdb code Now that TDB isn't used anymore, remove it. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/Makefile.common | 2 +- tools/xenstore/tdb.c | 1748 ---------------------------------------- tools/xenstore/tdb.h | 132 --- 3 files changed, 1 insertion(+), 1881 deletions(-) diff --git a/tools/xenstore/Makefile.common b/tools/xenstore/Makefile.common index 657a16849e..3259ab51e6 100644 --- a/tools/xenstore/Makefile.common +++ b/tools/xenstore/Makefile.common @@ -2,7 +2,7 @@ XENSTORED_OBJS-y := xenstored_core.o xenstored_watch.o xenstored_domain.o XENSTORED_OBJS-y += xenstored_transaction.o xenstored_control.o xenstored_lu.o -XENSTORED_OBJS-y += talloc.o utils.o tdb.o hashtable.o +XENSTORED_OBJS-y += talloc.o utils.o hashtable.o XENSTORED_OBJS-$(CONFIG_Linux) += xenstored_posix.o xenstored_lu_daemon.o XENSTORED_OBJS-$(CONFIG_NetBSD) += xenstored_posix.o xenstored_lu_daemon.o diff --git a/tools/xenstore/tdb.c b/tools/xenstore/tdb.c deleted file mode 100644 index 29593b76c3..0000000000 --- a/tools/xenstore/tdb.c +++ /dev/null @@ -1,1748 +0,0 @@ - /* - Unix SMB/CIFS implementation. - - trivial database library - - Copyright (C) Andrew Tridgell 1999-2004 - Copyright (C) Paul `Rusty' Russell 2000 - Copyright (C) Jeremy Allison 2000-2003 - - ** NOTE! The following LGPL license applies to the tdb - ** library. This does NOT imply that all of Samba is released - ** under the LGPL - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; If not, see . -*/ - - -#ifndef _SAMBA_BUILD_ -#ifdef HAVE_CONFIG_H -#include -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "tdb.h" -#include -#include "talloc.h" -#undef HAVE_MMAP -#else -#include "includes.h" -#include "lib/tdb/include/tdb.h" -#include "system/time.h" -#include "system/shmem.h" -#include "system/filesys.h" -#endif - -#define TDB_MAGIC_FOOD "TDB file\n" -#define TDB_VERSION (0x26011967 + 7) -#define TDB_MAGIC (0x26011999U) -#define TDB_FREE_MAGIC (~TDB_MAGIC) -#define TDB_DEAD_MAGIC (0xFEE1DEAD) -#define TDB_ALIGNMENT 4 -#define MIN_REC_SIZE (2*sizeof(struct list_struct) + TDB_ALIGNMENT) -#define DEFAULT_HASH_SIZE 131 -#define TDB_PAGE_SIZE 0x2000 -#define FREELIST_TOP (sizeof(struct tdb_header)) -#define TDB_ALIGN(x,a) (((x) + (a)-1) & ~((a)-1)) -#define TDB_BYTEREV(x) (((((x)&0xff)<<24)|((x)&0xFF00)<<8)|(((x)>>8)&0xFF00)|((x)>>24)) -#define TDB_DEAD(r) ((r)->magic == TDB_DEAD_MAGIC) -#define TDB_BAD_MAGIC(r) ((r)->magic != TDB_MAGIC && !TDB_DEAD(r)) -#define TDB_HASH_TOP(hash) (FREELIST_TOP + (BUCKET(hash)+1)*sizeof(tdb_off)) -#define TDB_DATA_START(hash_size) (TDB_HASH_TOP(hash_size-1)) - - -/* NB assumes there is a local variable called "tdb" that is the - * current context, also takes doubly-parenthesized print-style - * argument. */ -#define TDB_LOG(x) tdb->log_fn x - -/* lock offsets */ -#define GLOBAL_LOCK 0 -#define ACTIVE_LOCK 4 - -#ifndef MAP_FILE -#define MAP_FILE 0 -#endif - -#ifndef MAP_FAILED -#define MAP_FAILED ((void *)-1) -#endif - -#ifndef discard_const_p -# if defined(__intptr_t_defined) || defined(HAVE_INTPTR_T) -# define discard_const(ptr) ((void *)((intptr_t)(ptr))) -# else -# define discard_const(ptr) ((void *)(ptr)) -# endif -# define discard_const_p(type, ptr) ((type *)discard_const(ptr)) -#endif - -/* free memory if the pointer is valid and zero the pointer */ -#ifndef SAFE_FREE -#define SAFE_FREE(x) do { if ((x) != NULL) {talloc_free(discard_const_p(void *, (x))); (x)=NULL;} } while(0) -#endif - -#define BUCKET(hash) ((hash) % tdb->header.hash_size) -static TDB_DATA tdb_null; - -/* all contexts, to ensure no double-opens (fcntl locks don't nest!) */ -static TDB_CONTEXT *tdbs = NULL; - -static int tdb_munmap(TDB_CONTEXT *tdb) -{ - if (tdb->flags & TDB_INTERNAL) - return 0; - -#ifdef HAVE_MMAP - if (tdb->map_ptr) { - int ret = munmap(tdb->map_ptr, tdb->map_size); - if (ret != 0) - return ret; - } -#endif - tdb->map_ptr = NULL; - return 0; -} - -static void tdb_mmap(TDB_CONTEXT *tdb) -{ - if (tdb->flags & TDB_INTERNAL) - return; - -#ifdef HAVE_MMAP - if (!(tdb->flags & TDB_NOMMAP)) { - tdb->map_ptr = mmap(NULL, tdb->map_size, - PROT_READ|(tdb->read_only? 0:PROT_WRITE), - MAP_SHARED|MAP_FILE, tdb->fd, 0); - - /* - * NB. When mmap fails it returns MAP_FAILED *NOT* NULL !!!! - */ - - if (tdb->map_ptr == MAP_FAILED) { - tdb->map_ptr = NULL; - TDB_LOG((tdb, 2, "tdb_mmap failed for size %d (%s)\n", - tdb->map_size, strerror(errno))); - } - } else { - tdb->map_ptr = NULL; - } -#else - tdb->map_ptr = NULL; -#endif -} - -/* Endian conversion: we only ever deal with 4 byte quantities */ -static void *convert(void *buf, uint32_t size) -{ - uint32_t i, *p = buf; - for (i = 0; i < size / 4; i++) - p[i] = TDB_BYTEREV(p[i]); - return buf; -} -#define DOCONV() (tdb->flags & TDB_CONVERT) -#define CONVERT(x) (DOCONV() ? convert(&x, sizeof(x)) : &x) - -/* the body of the database is made of one list_struct for the free space - plus a separate data list for each hash value */ -struct list_struct { - tdb_off next; /* offset of the next record in the list */ - tdb_len rec_len; /* total byte length of record */ - tdb_len key_len; /* byte length of key */ - tdb_len data_len; /* byte length of data */ - uint32_t full_hash; /* the full 32 bit hash of the key */ - uint32_t magic; /* try to catch errors */ - /* the following union is implied: - union { - char record[rec_len]; - struct { - char key[key_len]; - char data[data_len]; - } - uint32_t totalsize; (tailer) - } - */ -}; - -/* a byte range locking function - return 0 on success - this functions locks/unlocks 1 byte at the specified offset. - - On error, errno is also set so that errors are passed back properly - through tdb_open(). */ -static int tdb_brlock(TDB_CONTEXT *tdb, tdb_off offset, - int rw_type, int lck_type, int probe) -{ - struct flock fl; - int ret; - - if (tdb->flags & TDB_NOLOCK) - return 0; - if ((rw_type == F_WRLCK) && (tdb->read_only)) { - errno = EACCES; - return -1; - } - - fl.l_type = rw_type; - fl.l_whence = SEEK_SET; - fl.l_start = offset; - fl.l_len = 1; - fl.l_pid = 0; - - do { - ret = fcntl(tdb->fd,lck_type,&fl); - } while (ret == -1 && errno == EINTR); - - if (ret == -1) { - if (!probe && lck_type != F_SETLK) { - /* Ensure error code is set for log fun to examine. */ - tdb->ecode = TDB_ERR_LOCK; - TDB_LOG((tdb, 5,"tdb_brlock failed (fd=%d) at offset %d rw_type=%d lck_type=%d\n", - tdb->fd, offset, rw_type, lck_type)); - } - /* Generic lock error. errno set by fcntl. - * EAGAIN is an expected return from non-blocking - * locks. */ - if (errno != EAGAIN) { - TDB_LOG((tdb, 5, "tdb_brlock failed (fd=%d) at offset %d rw_type=%d lck_type=%d: %s\n", - tdb->fd, offset, rw_type, lck_type, - strerror(errno))); - } - return TDB_ERRCODE(TDB_ERR_LOCK, -1); - } - return 0; -} - -/* lock a list in the database. list -1 is the alloc list */ -static int tdb_lock(TDB_CONTEXT *tdb, int list, int ltype) -{ - if (list < -1 || list >= (int)tdb->header.hash_size) { - TDB_LOG((tdb, 0,"tdb_lock: invalid list %d for ltype=%d\n", - list, ltype)); - return -1; - } - if (tdb->flags & TDB_NOLOCK) - return 0; - - /* Since fcntl locks don't nest, we do a lock for the first one, - and simply bump the count for future ones */ - if (tdb->locked[list+1].count == 0) { - if (tdb_brlock(tdb,FREELIST_TOP+4*list,ltype,F_SETLKW, 0)) { - TDB_LOG((tdb, 0,"tdb_lock failed on list %d ltype=%d (%s)\n", - list, ltype, strerror(errno))); - return -1; - } - tdb->locked[list+1].ltype = ltype; - } - tdb->locked[list+1].count++; - return 0; -} - -/* unlock the database: returns void because it's too late for errors. */ - /* changed to return int it may be interesting to know there - has been an error --simo */ -static int tdb_unlock(TDB_CONTEXT *tdb, int list, - int ltype __attribute__((unused))) -{ - int ret = -1; - - if (tdb->flags & TDB_NOLOCK) - return 0; - - /* Sanity checks */ - if (list < -1 || list >= (int)tdb->header.hash_size) { - TDB_LOG((tdb, 0, "tdb_unlock: list %d invalid (%d)\n", list, tdb->header.hash_size)); - return ret; - } - - if (tdb->locked[list+1].count==0) { - TDB_LOG((tdb, 0, "tdb_unlock: count is 0\n")); - return ret; - } - - if (tdb->locked[list+1].count == 1) { - /* Down to last nested lock: unlock underneath */ - ret = tdb_brlock(tdb, FREELIST_TOP+4*list, F_UNLCK, F_SETLKW, 0); - } else { - ret = 0; - } - tdb->locked[list+1].count--; - - if (ret) - TDB_LOG((tdb, 0,"tdb_unlock: An error occurred unlocking!\n")); - return ret; -} - -/* This is based on the hash algorithm from gdbm */ -static uint32_t default_tdb_hash(TDB_DATA *key) -{ - uint32_t value; /* Used to compute the hash value. */ - uint32_t i; /* Used to cycle through random values. */ - - /* Set the initial value from the key size. */ - for (value = 0x238F13AF * key->dsize, i=0; i < key->dsize; i++) - value = (value + (key->dptr[i] << (i*5 % 24))); - - return (1103515243 * value + 12345); -} - -/* check for an out of bounds access - if it is out of bounds then - see if the database has been expanded by someone else and expand - if necessary - note that "len" is the minimum length needed for the db -*/ -static int tdb_oob(TDB_CONTEXT *tdb, tdb_off len, int probe) -{ - struct stat st; - if (len <= tdb->map_size) - return 0; - if (tdb->flags & TDB_INTERNAL) { - if (!probe) { - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_IO; - TDB_LOG((tdb, 0,"tdb_oob len %d beyond internal malloc size %d\n", - (int)len, (int)tdb->map_size)); - } - return TDB_ERRCODE(TDB_ERR_IO, -1); - } - - if (fstat(tdb->fd, &st) == -1) - return TDB_ERRCODE(TDB_ERR_IO, -1); - - if (st.st_size < (off_t)len) { - if (!probe) { - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_IO; - TDB_LOG((tdb, 0,"tdb_oob len %d beyond eof at %d\n", - (int)len, (int)st.st_size)); - } - return TDB_ERRCODE(TDB_ERR_IO, -1); - } - - /* Unmap, update size, remap */ - if (tdb_munmap(tdb) == -1) - return TDB_ERRCODE(TDB_ERR_IO, -1); - tdb->map_size = st.st_size; - tdb_mmap(tdb); - return 0; -} - -/* write a lump of data at a specified offset */ -static int tdb_write(TDB_CONTEXT *tdb, tdb_off off, void *buf, tdb_len len) -{ - if (tdb_oob(tdb, off + len, 0) != 0) - return -1; - - if (tdb->map_ptr) - memcpy(off + (char *)tdb->map_ptr, buf, len); -#ifdef HAVE_PWRITE - else if (pwrite(tdb->fd, buf, len, off) != (ssize_t)len) { -#else - else if (lseek(tdb->fd, off, SEEK_SET) != (off_t)off - || write(tdb->fd, buf, len) != (off_t)len) { -#endif - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_IO; - TDB_LOG((tdb, 0,"tdb_write failed at %d len=%d (%s)\n", - off, len, strerror(errno))); - return TDB_ERRCODE(TDB_ERR_IO, -1); - } - return 0; -} - -/* read a lump of data at a specified offset, maybe convert */ -static int tdb_read(TDB_CONTEXT *tdb,tdb_off off,void *buf,tdb_len len,int cv) -{ - if (tdb_oob(tdb, off + len, 0) != 0) - return -1; - - if (tdb->map_ptr) - memcpy(buf, off + (char *)tdb->map_ptr, len); -#ifdef HAVE_PREAD - else if (pread(tdb->fd, buf, len, off) != (off_t)len) { -#else - else if (lseek(tdb->fd, off, SEEK_SET) != (off_t)off - || read(tdb->fd, buf, len) != (off_t)len) { -#endif - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_IO; - TDB_LOG((tdb, 0,"tdb_read failed at %d len=%d (%s)\n", - off, len, strerror(errno))); - return TDB_ERRCODE(TDB_ERR_IO, -1); - } - if (cv) - convert(buf, len); - return 0; -} - -/* don't allocate memory: used in tdb_delete path. */ -static int tdb_key_eq(TDB_CONTEXT *tdb, tdb_off off, TDB_DATA key) -{ - char buf[64]; - uint32_t len; - - if (tdb_oob(tdb, off + key.dsize, 0) != 0) - return -1; - - if (tdb->map_ptr) - return !memcmp(off + (char*)tdb->map_ptr, key.dptr, key.dsize); - - while (key.dsize) { - len = key.dsize; - if (len > sizeof(buf)) - len = sizeof(buf); - if (tdb_read(tdb, off, buf, len, 0) != 0) - return -1; - if (memcmp(buf, key.dptr, len) != 0) - return 0; - key.dptr += len; - key.dsize -= len; - off += len; - } - return 1; -} - -/* read a lump of data, allocating the space for it */ -static char *tdb_alloc_read(TDB_CONTEXT *tdb, tdb_off offset, tdb_len len) -{ - char *buf; - - if (!(buf = talloc_size(tdb, len))) { - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_OOM; - TDB_LOG((tdb, 0,"tdb_alloc_read malloc failed len=%d (%s)\n", - len, strerror(errno))); - return TDB_ERRCODE(TDB_ERR_OOM, buf); - } - if (tdb_read(tdb, offset, buf, len, 0) == -1) { - SAFE_FREE(buf); - return NULL; - } - return buf; -} - -/* read/write a tdb_off */ -static int ofs_read(TDB_CONTEXT *tdb, tdb_off offset, tdb_off *d) -{ - return tdb_read(tdb, offset, (char*)d, sizeof(*d), DOCONV()); -} -static int ofs_write(TDB_CONTEXT *tdb, tdb_off offset, tdb_off *d) -{ - tdb_off off = *d; - return tdb_write(tdb, offset, CONVERT(off), sizeof(*d)); -} - -/* read/write a record */ -static int rec_read(TDB_CONTEXT *tdb, tdb_off offset, struct list_struct *rec) -{ - if (tdb_read(tdb, offset, rec, sizeof(*rec),DOCONV()) == -1) - return -1; - if (TDB_BAD_MAGIC(rec)) { - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_CORRUPT; - TDB_LOG((tdb, 0,"rec_read bad magic 0x%x at offset=%d\n", rec->magic, offset)); - return TDB_ERRCODE(TDB_ERR_CORRUPT, -1); - } - return tdb_oob(tdb, rec->next+sizeof(*rec), 0); -} -static int rec_write(TDB_CONTEXT *tdb, tdb_off offset, struct list_struct *rec) -{ - struct list_struct r = *rec; - return tdb_write(tdb, offset, CONVERT(r), sizeof(r)); -} - -/* read a freelist record and check for simple errors */ -static int rec_free_read(TDB_CONTEXT *tdb, tdb_off off, struct list_struct *rec) -{ - if (tdb_read(tdb, off, rec, sizeof(*rec),DOCONV()) == -1) - return -1; - - if (rec->magic == TDB_MAGIC) { - /* this happens when a app is showdown while deleting a record - we should - not completely fail when this happens */ - TDB_LOG((tdb, 0,"rec_free_read non-free magic 0x%x at offset=%d - fixing\n", - rec->magic, off)); - rec->magic = TDB_FREE_MAGIC; - if (tdb_write(tdb, off, rec, sizeof(*rec)) == -1) - return -1; - } - - if (rec->magic != TDB_FREE_MAGIC) { - /* Ensure ecode is set for log fn. */ - tdb->ecode = TDB_ERR_CORRUPT; - TDB_LOG((tdb, 0,"rec_free_read bad magic 0x%x at offset=%d\n", - rec->magic, off)); - return TDB_ERRCODE(TDB_ERR_CORRUPT, -1); - } - if (tdb_oob(tdb, rec->next+sizeof(*rec), 0) != 0) - return -1; - return 0; -} - -/* update a record tailer (must hold allocation lock) */ -static int update_tailer(TDB_CONTEXT *tdb, tdb_off offset, - const struct list_struct *rec) -{ - tdb_off totalsize; - - /* Offset of tailer from record header */ - totalsize = sizeof(*rec) + rec->rec_len; - return ofs_write(tdb, offset + totalsize - sizeof(tdb_off), - &totalsize); -} - -/* Remove an element from the freelist. Must have alloc lock. */ -static int remove_from_freelist(TDB_CONTEXT *tdb, tdb_off off, tdb_off next) -{ - tdb_off last_ptr, i; - - /* read in the freelist top */ - last_ptr = FREELIST_TOP; - while (ofs_read(tdb, last_ptr, &i) != -1 && i != 0) { - if (i == off) { - /* We've found it! */ - return ofs_write(tdb, last_ptr, &next); - } - /* Follow chain (next offset is at start of record) */ - last_ptr = i; - } - TDB_LOG((tdb, 0,"remove_from_freelist: not on list at off=%d\n", off)); - return TDB_ERRCODE(TDB_ERR_CORRUPT, -1); -} - -/* Add an element into the freelist. Merge adjacent records if - neccessary. */ -static int tdb_free(TDB_CONTEXT *tdb, tdb_off offset, struct list_struct *rec) -{ - tdb_off right, left; - - /* Allocation and tailer lock */ - if (tdb_lock(tdb, -1, F_WRLCK) != 0) - return -1; - - /* set an initial tailer, so if we fail we don't leave a bogus record */ - if (update_tailer(tdb, offset, rec) != 0) { - TDB_LOG((tdb, 0, "tdb_free: upfate_tailer failed!\n")); - goto fail; - } - - /* Look right first (I'm an Australian, dammit) */ - right = offset + sizeof(*rec) + rec->rec_len; - if (right + sizeof(*rec) <= tdb->map_size) { - struct list_struct r; - - if (tdb_read(tdb, right, &r, sizeof(r), DOCONV()) == -1) { - TDB_LOG((tdb, 0, "tdb_free: right read failed at %u\n", right)); - goto left; - } - - /* If it's free, expand to include it. */ - if (r.magic == TDB_FREE_MAGIC) { - if (remove_from_freelist(tdb, right, r.next) == -1) { - TDB_LOG((tdb, 0, "tdb_free: right free failed at %u\n", right)); - goto left; - } - rec->rec_len += sizeof(r) + r.rec_len; - } - } - -left: - /* Look left */ - left = offset - sizeof(tdb_off); - if (left > TDB_DATA_START(tdb->header.hash_size)) { - struct list_struct l; - tdb_off leftsize; - - /* Read in tailer and jump back to header */ - if (ofs_read(tdb, left, &leftsize) == -1) { - TDB_LOG((tdb, 0, "tdb_free: left offset read failed at %u\n", left)); - goto update; - } - left = offset - leftsize; - - /* Now read in record */ - if (tdb_read(tdb, left, &l, sizeof(l), DOCONV()) == -1) { - TDB_LOG((tdb, 0, "tdb_free: left read failed at %u (%u)\n", left, leftsize)); - goto update; - } - - /* If it's free, expand to include it. */ - if (l.magic == TDB_FREE_MAGIC) { - if (remove_from_freelist(tdb, left, l.next) == -1) { - TDB_LOG((tdb, 0, "tdb_free: left free failed at %u\n", left)); - goto update; - } else { - offset = left; - rec->rec_len += leftsize; - } - } - } - -update: - if (update_tailer(tdb, offset, rec) == -1) { - TDB_LOG((tdb, 0, "tdb_free: update_tailer failed at %u\n", offset)); - goto fail; - } - - /* Now, prepend to free list */ - rec->magic = TDB_FREE_MAGIC; - - if (ofs_read(tdb, FREELIST_TOP, &rec->next) == -1 || - rec_write(tdb, offset, rec) == -1 || - ofs_write(tdb, FREELIST_TOP, &offset) == -1) { - TDB_LOG((tdb, 0, "tdb_free record write failed at offset=%d\n", offset)); - goto fail; - } - - /* And we're done. */ - tdb_unlock(tdb, -1, F_WRLCK); - return 0; - - fail: - tdb_unlock(tdb, -1, F_WRLCK); - return -1; -} - - -/* expand a file. we prefer to use ftruncate, as that is what posix - says to use for mmap expansion */ -static int expand_file(TDB_CONTEXT *tdb, tdb_off size, tdb_off addition) -{ - char buf[1024]; -#ifdef HAVE_FTRUNCATE_EXTEND - if (ftruncate(tdb->fd, size+addition) != 0) { - TDB_LOG((tdb, 0, "expand_file ftruncate to %d failed (%s)\n", - size+addition, strerror(errno))); - return -1; - } -#else - char b = 0; - -#ifdef HAVE_PWRITE - if (pwrite(tdb->fd, &b, 1, (size+addition) - 1) != 1) { -#else - if (lseek(tdb->fd, (size+addition) - 1, SEEK_SET) != (off_t)(size+addition) - 1 || - write(tdb->fd, &b, 1) != 1) { -#endif - TDB_LOG((tdb, 0, "expand_file to %d failed (%s)\n", - size+addition, strerror(errno))); - return -1; - } -#endif - - /* now fill the file with something. This ensures that the file isn't sparse, which would be - very bad if we ran out of disk. This must be done with write, not via mmap */ - memset(buf, 0x42, sizeof(buf)); - while (addition) { - int n = addition>sizeof(buf)?sizeof(buf):addition; -#ifdef HAVE_PWRITE - int ret = pwrite(tdb->fd, buf, n, size); -#else - int ret; - if (lseek(tdb->fd, size, SEEK_SET) != (off_t)size) - return -1; - ret = write(tdb->fd, buf, n); -#endif - if (ret != n) { - TDB_LOG((tdb, 0, "expand_file write of %d failed (%s)\n", - n, strerror(errno))); - return -1; - } - addition -= n; - size += n; - } - return 0; -} - - -/* expand the database at least size bytes by expanding the underlying - file and doing the mmap again if necessary */ -static int tdb_expand(TDB_CONTEXT *tdb, tdb_off size) -{ - struct list_struct rec; - tdb_off offset; - - if (tdb_lock(tdb, -1, F_WRLCK) == -1) { - TDB_LOG((tdb, 0, "lock failed in tdb_expand\n")); - return -1; - } - - /* must know about any previous expansions by another process */ - tdb_oob(tdb, tdb->map_size + 1, 1); - - /* always make room for at least 10 more records, and round - the database up to a multiple of TDB_PAGE_SIZE */ - size = TDB_ALIGN(tdb->map_size + size*10, TDB_PAGE_SIZE) - tdb->map_size; - - if (!(tdb->flags & TDB_INTERNAL)) - tdb_munmap(tdb); - - /* - * We must ensure the file is unmapped before doing this - * to ensure consistency with systems like OpenBSD where - * writes and mmaps are not consistent. - */ - - /* expand the file itself */ - if (!(tdb->flags & TDB_INTERNAL)) { - if (expand_file(tdb, tdb->map_size, size) != 0) - goto fail; - } - - tdb->map_size += size; - - if (tdb->flags & TDB_INTERNAL) { - char *new_map_ptr = talloc_realloc_size(tdb, tdb->map_ptr, - tdb->map_size); - if (!new_map_ptr) { - tdb->map_size -= size; - goto fail; - } - tdb->map_ptr = new_map_ptr; - } else { - /* - * We must ensure the file is remapped before adding the space - * to ensure consistency with systems like OpenBSD where - * writes and mmaps are not consistent. - */ - - /* We're ok if the mmap fails as we'll fallback to read/write */ - tdb_mmap(tdb); - } - - /* form a new freelist record */ - memset(&rec,'\0',sizeof(rec)); - rec.rec_len = size - sizeof(rec); - - /* link it into the free list */ - offset = tdb->map_size - size; - if (tdb_free(tdb, offset, &rec) == -1) - goto fail; - - tdb_unlock(tdb, -1, F_WRLCK); - return 0; - fail: - tdb_unlock(tdb, -1, F_WRLCK); - return -1; -} - - -/* - the core of tdb_allocate - called when we have decided which - free list entry to use - */ -static tdb_off tdb_allocate_ofs(TDB_CONTEXT *tdb, tdb_len length, tdb_off rec_ptr, - struct list_struct *rec, tdb_off last_ptr) -{ - struct list_struct newrec; - tdb_off newrec_ptr; - - memset(&newrec, '\0', sizeof(newrec)); - - /* found it - now possibly split it up */ - if (rec->rec_len > length + MIN_REC_SIZE) { - /* Length of left piece */ - length = TDB_ALIGN(length, TDB_ALIGNMENT); - - /* Right piece to go on free list */ - newrec.rec_len = rec->rec_len - (sizeof(*rec) + length); - newrec_ptr = rec_ptr + sizeof(*rec) + length; - - /* And left record is shortened */ - rec->rec_len = length; - } else { - newrec_ptr = 0; - } - - /* Remove allocated record from the free list */ - if (ofs_write(tdb, last_ptr, &rec->next) == -1) { - return 0; - } - - /* Update header: do this before we drop alloc - lock, otherwise tdb_free() might try to - merge with us, thinking we're free. - (Thanks Jeremy Allison). */ - rec->magic = TDB_MAGIC; - if (rec_write(tdb, rec_ptr, rec) == -1) { - return 0; - } - - /* Did we create new block? */ - if (newrec_ptr) { - /* Update allocated record tailer (we - shortened it). */ - if (update_tailer(tdb, rec_ptr, rec) == -1) { - return 0; - } - - /* Free new record */ - if (tdb_free(tdb, newrec_ptr, &newrec) == -1) { - return 0; - } - } - - /* all done - return the new record offset */ - return rec_ptr; -} - -/* allocate some space from the free list. The offset returned points - to a unconnected list_struct within the database with room for at - least length bytes of total data - - 0 is returned if the space could not be allocated - */ -static tdb_off tdb_allocate(TDB_CONTEXT *tdb, tdb_len length, - struct list_struct *rec) -{ - tdb_off rec_ptr, last_ptr, newrec_ptr; - struct { - tdb_off rec_ptr, last_ptr; - tdb_len rec_len; - } bestfit = { 0, 0, 0 }; - - if (tdb_lock(tdb, -1, F_WRLCK) == -1) - return 0; - - /* Extra bytes required for tailer */ - length += sizeof(tdb_off); - - again: - last_ptr = FREELIST_TOP; - - /* read in the freelist top */ - if (ofs_read(tdb, FREELIST_TOP, &rec_ptr) == -1) - goto fail; - - bestfit.rec_ptr = 0; - - /* - this is a best fit allocation strategy. Originally we used - a first fit strategy, but it suffered from massive fragmentation - issues when faced with a slowly increasing record size. - */ - while (rec_ptr) { - if (rec_free_read(tdb, rec_ptr, rec) == -1) { - goto fail; - } - - if (rec->rec_len >= length) { - if (bestfit.rec_ptr == 0 || - rec->rec_len < bestfit.rec_len) { - bestfit.rec_len = rec->rec_len; - bestfit.rec_ptr = rec_ptr; - bestfit.last_ptr = last_ptr; - /* consider a fit to be good enough if we aren't wasting more than half the space */ - if (bestfit.rec_len < 2*length) { - break; - } - } - } - - /* move to the next record */ - last_ptr = rec_ptr; - rec_ptr = rec->next; - } - - if (bestfit.rec_ptr != 0) { - if (rec_free_read(tdb, bestfit.rec_ptr, rec) == -1) { - goto fail; - } - - newrec_ptr = tdb_allocate_ofs(tdb, length, bestfit.rec_ptr, rec, bestfit.last_ptr); - tdb_unlock(tdb, -1, F_WRLCK); - return newrec_ptr; - } - - /* we didn't find enough space. See if we can expand the - database and if we can then try again */ - if (tdb_expand(tdb, length + sizeof(*rec)) == 0) - goto again; - fail: - tdb_unlock(tdb, -1, F_WRLCK); - return 0; -} - -/* initialise a new database with a specified hash size */ -static int tdb_new_database(TDB_CONTEXT *tdb, int hash_size) -{ - struct tdb_header *newdb; - int size, ret = -1; - - /* We make it up in memory, then write it out if not internal */ - size = sizeof(struct tdb_header) + (hash_size+1)*sizeof(tdb_off); - if (!(newdb = talloc_zero_size(tdb, size))) - return TDB_ERRCODE(TDB_ERR_OOM, -1); - - /* Fill in the header */ - newdb->version = TDB_VERSION; - newdb->hash_size = hash_size; - if (tdb->flags & TDB_INTERNAL) { - tdb->map_size = size; - tdb->map_ptr = (char *)newdb; - memcpy(&tdb->header, newdb, sizeof(tdb->header)); - /* Convert the `ondisk' version if asked. */ - CONVERT(*newdb); - return 0; - } - if (lseek(tdb->fd, 0, SEEK_SET) == -1) - goto fail; - - if (ftruncate(tdb->fd, 0) == -1) - goto fail; - - /* This creates an endian-converted header, as if read from disk */ - CONVERT(*newdb); - memcpy(&tdb->header, newdb, sizeof(tdb->header)); - /* Don't endian-convert the magic food! */ - memcpy(newdb->magic_food, TDB_MAGIC_FOOD, strlen(TDB_MAGIC_FOOD)+1); - if (write(tdb->fd, newdb, size) != size) - ret = -1; - else - ret = 0; - - fail: - SAFE_FREE(newdb); - return ret; -} - -/* Returns 0 on fail. On success, return offset of record, and fills - in rec */ -static tdb_off tdb_find(TDB_CONTEXT *tdb, TDB_DATA key, uint32_t hash, - struct list_struct *r) -{ - tdb_off rec_ptr; - - /* read in the hash top */ - if (ofs_read(tdb, TDB_HASH_TOP(hash), &rec_ptr) == -1) - return 0; - - /* keep looking until we find the right record */ - while (rec_ptr) { - if (rec_read(tdb, rec_ptr, r) == -1) - return 0; - - if (!TDB_DEAD(r) && hash==r->full_hash && key.dsize==r->key_len) { - /* a very likely hit - read the key */ - int cmp = tdb_key_eq(tdb, rec_ptr + sizeof(*r), key); - if (cmp < 0) - return 0; - else if (cmp > 0) - return rec_ptr; - } - rec_ptr = r->next; - } - return TDB_ERRCODE(TDB_ERR_NOEXIST, 0); -} - -/* As tdb_find, but if you succeed, keep the lock */ -static tdb_off tdb_find_lock_hash(TDB_CONTEXT *tdb, TDB_DATA key, uint32_t hash, int locktype, - struct list_struct *rec) -{ - uint32_t rec_ptr; - - if (tdb_lock(tdb, BUCKET(hash), locktype) == -1) - return 0; - if (!(rec_ptr = tdb_find(tdb, key, hash, rec))) - tdb_unlock(tdb, BUCKET(hash), locktype); - return rec_ptr; -} - -enum TDB_ERROR tdb_error(TDB_CONTEXT *tdb) -{ - return tdb->ecode; -} - -static struct tdb_errname { - enum TDB_ERROR ecode; const char *estring; -} emap[] = { {TDB_SUCCESS, "Success"}, - {TDB_ERR_CORRUPT, "Corrupt database"}, - {TDB_ERR_IO, "IO Error"}, - {TDB_ERR_LOCK, "Locking error"}, - {TDB_ERR_OOM, "Out of memory"}, - {TDB_ERR_EXISTS, "Record exists"}, - {TDB_ERR_NOLOCK, "Lock exists on other keys"}, - {TDB_ERR_NOEXIST, "Record does not exist"} }; - -/* Error string for the last tdb error */ -const char *tdb_errorstr(TDB_CONTEXT *tdb) -{ - uint32_t i; - for (i = 0; i < sizeof(emap) / sizeof(struct tdb_errname); i++) - if (tdb->ecode == emap[i].ecode) - return emap[i].estring; - return "Invalid error code"; -} - -/* update an entry in place - this only works if the new data size - is <= the old data size and the key exists. - on failure return -1. -*/ - -static int tdb_update_hash(TDB_CONTEXT *tdb, TDB_DATA key, uint32_t hash, TDB_DATA dbuf) -{ - struct list_struct rec; - tdb_off rec_ptr; - - /* find entry */ - if (!(rec_ptr = tdb_find(tdb, key, hash, &rec))) - return -1; - - /* must be long enough key, data and tailer */ - if (rec.rec_len < key.dsize + dbuf.dsize + sizeof(tdb_off)) { - tdb->ecode = TDB_SUCCESS; /* Not really an error */ - return -1; - } - - if (tdb_write(tdb, rec_ptr + sizeof(rec) + rec.key_len, - dbuf.dptr, dbuf.dsize) == -1) - return -1; - - if (dbuf.dsize != rec.data_len) { - /* update size */ - rec.data_len = dbuf.dsize; - return rec_write(tdb, rec_ptr, &rec); - } - - return 0; -} - -/* find an entry in the database given a key */ -/* If an entry doesn't exist tdb_err will be set to - * TDB_ERR_NOEXIST. If a key has no data attached - * then the TDB_DATA will have zero length but - * a non-zero pointer - */ - -TDB_DATA tdb_fetch(TDB_CONTEXT *tdb, TDB_DATA key) -{ - tdb_off rec_ptr; - struct list_struct rec; - TDB_DATA ret; - uint32_t hash; - - /* find which hash bucket it is in */ - hash = tdb->hash_fn(&key); - if (!(rec_ptr = tdb_find_lock_hash(tdb,key,hash,F_RDLCK,&rec))) - return tdb_null; - - ret.dptr = tdb_alloc_read(tdb, rec_ptr + sizeof(rec) + rec.key_len, - rec.data_len); - ret.dsize = rec.data_len; - tdb_unlock(tdb, BUCKET(rec.full_hash), F_RDLCK); - return ret; -} - -/* check if an entry in the database exists - - note that 1 is returned if the key is found and 0 is returned if not found - this doesn't match the conventions in the rest of this module, but is - compatible with gdbm -*/ -static int tdb_exists_hash(TDB_CONTEXT *tdb, TDB_DATA key, uint32_t hash) -{ - struct list_struct rec; - - if (tdb_find_lock_hash(tdb, key, hash, F_RDLCK, &rec) == 0) - return 0; - tdb_unlock(tdb, BUCKET(rec.full_hash), F_RDLCK); - return 1; -} - -/* record lock stops delete underneath */ -static int lock_record(TDB_CONTEXT *tdb, tdb_off off) -{ - return off ? tdb_brlock(tdb, off, F_RDLCK, F_SETLKW, 0) : 0; -} -/* - Write locks override our own fcntl readlocks, so check it here. - Note this is meant to be F_SETLK, *not* F_SETLKW, as it's not - an error to fail to get the lock here. -*/ - -static int write_lock_record(TDB_CONTEXT *tdb, tdb_off off) -{ - struct tdb_traverse_lock *i; - for (i = &tdb->travlocks; i; i = i->next) - if (i->off == off) - return -1; - return tdb_brlock(tdb, off, F_WRLCK, F_SETLK, 1); -} - -/* - Note this is meant to be F_SETLK, *not* F_SETLKW, as it's not - an error to fail to get the lock here. -*/ - -static int write_unlock_record(TDB_CONTEXT *tdb, tdb_off off) -{ - return tdb_brlock(tdb, off, F_UNLCK, F_SETLK, 0); -} -/* fcntl locks don't stack: avoid unlocking someone else's */ -static int unlock_record(TDB_CONTEXT *tdb, tdb_off off) -{ - struct tdb_traverse_lock *i; - uint32_t count = 0; - - if (off == 0) - return 0; - for (i = &tdb->travlocks; i; i = i->next) - if (i->off == off) - count++; - return (count == 1 ? tdb_brlock(tdb, off, F_UNLCK, F_SETLKW, 0) : 0); -} - -/* actually delete an entry in the database given the offset */ -static int do_delete(TDB_CONTEXT *tdb, tdb_off rec_ptr, struct list_struct*rec) -{ - tdb_off last_ptr, i; - struct list_struct lastrec; - - if (tdb->read_only) return -1; - - if (write_lock_record(tdb, rec_ptr) == -1) { - /* Someone traversing here: mark it as dead */ - rec->magic = TDB_DEAD_MAGIC; - return rec_write(tdb, rec_ptr, rec); - } - if (write_unlock_record(tdb, rec_ptr) != 0) - return -1; - - /* find previous record in hash chain */ - if (ofs_read(tdb, TDB_HASH_TOP(rec->full_hash), &i) == -1) - return -1; - for (last_ptr = 0; i != rec_ptr; last_ptr = i, i = lastrec.next) - if (rec_read(tdb, i, &lastrec) == -1) - return -1; - - /* unlink it: next ptr is at start of record. */ - if (last_ptr == 0) - last_ptr = TDB_HASH_TOP(rec->full_hash); - if (ofs_write(tdb, last_ptr, &rec->next) == -1) - return -1; - - /* recover the space */ - if (tdb_free(tdb, rec_ptr, rec) == -1) - return -1; - return 0; -} - -/* Uses traverse lock: 0 = finish, -1 = error, other = record offset */ -static int tdb_next_lock(TDB_CONTEXT *tdb, struct tdb_traverse_lock *tlock, - struct list_struct *rec) -{ - int want_next = (tlock->off != 0); - - /* Lock each chain from the start one. */ - for (; tlock->hash < tdb->header.hash_size; tlock->hash++) { - - /* this is an optimisation for the common case where - the hash chain is empty, which is particularly - common for the use of tdb with ldb, where large - hashes are used. In that case we spend most of our - time in tdb_brlock(), locking empty hash chains. - - To avoid this, we do an unlocked pre-check to see - if the hash chain is empty before starting to look - inside it. If it is empty then we can avoid that - hash chain. If it isn't empty then we can't believe - the value we get back, as we read it without a - lock, so instead we get the lock and re-fetch the - value below. - - Notice that not doing this optimisation on the - first hash chain is critical. We must guarantee - that we have done at least one fcntl lock at the - start of a search to guarantee that memory is - coherent on SMP systems. If records are added by - others during the search then thats OK, and we - could possibly miss those with this trick, but we - could miss them anyway without this trick, so the - semantics don't change. - - With a non-indexed ldb search this trick gains us a - factor of around 80 in speed on a linux 2.6.x - system (testing using ldbtest). - */ - if (!tlock->off && tlock->hash != 0) { - uint32_t off; - if (tdb->map_ptr) { - for (;tlock->hash < tdb->header.hash_size;tlock->hash++) { - if (0 != *(uint32_t *)(TDB_HASH_TOP(tlock->hash) + (unsigned char *)tdb->map_ptr)) { - break; - } - } - if (tlock->hash == tdb->header.hash_size) { - continue; - } - } else { - if (ofs_read(tdb, TDB_HASH_TOP(tlock->hash), &off) == 0 && - off == 0) { - continue; - } - } - } - - if (tdb_lock(tdb, tlock->hash, F_WRLCK) == -1) - return -1; - - /* No previous record? Start at top of chain. */ - if (!tlock->off) { - if (ofs_read(tdb, TDB_HASH_TOP(tlock->hash), - &tlock->off) == -1) - goto fail; - } else { - /* Otherwise unlock the previous record. */ - if (unlock_record(tdb, tlock->off) != 0) - goto fail; - } - - if (want_next) { - /* We have offset of old record: grab next */ - if (rec_read(tdb, tlock->off, rec) == -1) - goto fail; - tlock->off = rec->next; - } - - /* Iterate through chain */ - while( tlock->off) { - tdb_off current; - if (rec_read(tdb, tlock->off, rec) == -1) - goto fail; - - /* Detect infinite loops. From "Shlomi Yaakobovich" . */ - if (tlock->off == rec->next) { - TDB_LOG((tdb, 0, "tdb_next_lock: loop detected.\n")); - goto fail; - } - - if (!TDB_DEAD(rec)) { - /* Woohoo: we found one! */ - if (lock_record(tdb, tlock->off) != 0) - goto fail; - return tlock->off; - } - - /* Try to clean dead ones from old traverses */ - current = tlock->off; - tlock->off = rec->next; - if (!tdb->read_only && - do_delete(tdb, current, rec) != 0) - goto fail; - } - tdb_unlock(tdb, tlock->hash, F_WRLCK); - want_next = 0; - } - /* We finished iteration without finding anything */ - return TDB_ERRCODE(TDB_SUCCESS, 0); - - fail: - tlock->off = 0; - if (tdb_unlock(tdb, tlock->hash, F_WRLCK) != 0) - TDB_LOG((tdb, 0, "tdb_next_lock: On error unlock failed!\n")); - return -1; -} - -/* traverse the entire database - calling fn(tdb, key, data) on each element. - return -1 on error or the record count traversed - if fn is NULL then it is not called - a non-zero return value from fn() indicates that the traversal should stop - */ -int tdb_traverse(TDB_CONTEXT *tdb, tdb_traverse_func fn, void *private) -{ - TDB_DATA key, dbuf; - struct list_struct rec; - struct tdb_traverse_lock tl = { NULL, 0, 0 }; - int ret, count = 0; - - /* This was in the initializaton, above, but the IRIX compiler - * did not like it. crh - */ - tl.next = tdb->travlocks.next; - - /* fcntl locks don't stack: beware traverse inside traverse */ - tdb->travlocks.next = &tl; - - /* tdb_next_lock places locks on the record returned, and its chain */ - while ((ret = tdb_next_lock(tdb, &tl, &rec)) > 0) { - count++; - /* now read the full record */ - key.dptr = tdb_alloc_read(tdb, tl.off + sizeof(rec), - rec.key_len + rec.data_len); - if (!key.dptr) { - ret = -1; - if (tdb_unlock(tdb, tl.hash, F_WRLCK) != 0) - goto out; - if (unlock_record(tdb, tl.off) != 0) - TDB_LOG((tdb, 0, "tdb_traverse: key.dptr == NULL and unlock_record failed!\n")); - goto out; - } - key.dsize = rec.key_len; - dbuf.dptr = key.dptr + rec.key_len; - dbuf.dsize = rec.data_len; - - /* Drop chain lock, call out */ - if (tdb_unlock(tdb, tl.hash, F_WRLCK) != 0) { - ret = -1; - goto out; - } - if (fn && fn(tdb, key, dbuf, private)) { - /* They want us to terminate traversal */ - ret = count; - if (unlock_record(tdb, tl.off) != 0) { - TDB_LOG((tdb, 0, "tdb_traverse: unlock_record failed!\n")); - ret = -1; - } - tdb->travlocks.next = tl.next; - SAFE_FREE(key.dptr); - return count; - } - SAFE_FREE(key.dptr); - } -out: - tdb->travlocks.next = tl.next; - if (ret < 0) - return -1; - else - return count; -} - -/* find the first entry in the database and return its key */ -TDB_DATA tdb_firstkey(TDB_CONTEXT *tdb) -{ - TDB_DATA key; - struct list_struct rec; - - /* release any old lock */ - if (unlock_record(tdb, tdb->travlocks.off) != 0) - return tdb_null; - tdb->travlocks.off = tdb->travlocks.hash = 0; - - if (tdb_next_lock(tdb, &tdb->travlocks, &rec) <= 0) - return tdb_null; - /* now read the key */ - key.dsize = rec.key_len; - key.dptr =tdb_alloc_read(tdb,tdb->travlocks.off+sizeof(rec),key.dsize); - if (tdb_unlock(tdb, BUCKET(tdb->travlocks.hash), F_WRLCK) != 0) - TDB_LOG((tdb, 0, "tdb_firstkey: error occurred while tdb_unlocking!\n")); - return key; -} - -/* find the next entry in the database, returning its key */ -TDB_DATA tdb_nextkey(TDB_CONTEXT *tdb, TDB_DATA oldkey) -{ - uint32_t oldhash; - TDB_DATA key = tdb_null; - struct list_struct rec; - char *k = NULL; - - /* Is locked key the old key? If so, traverse will be reliable. */ - if (tdb->travlocks.off) { - if (tdb_lock(tdb,tdb->travlocks.hash,F_WRLCK)) - return tdb_null; - if (rec_read(tdb, tdb->travlocks.off, &rec) == -1 - || !(k = tdb_alloc_read(tdb,tdb->travlocks.off+sizeof(rec), - rec.key_len)) - || memcmp(k, oldkey.dptr, oldkey.dsize) != 0) { - /* No, it wasn't: unlock it and start from scratch */ - if (unlock_record(tdb, tdb->travlocks.off) != 0) - return tdb_null; - if (tdb_unlock(tdb, tdb->travlocks.hash, F_WRLCK) != 0) - return tdb_null; - tdb->travlocks.off = 0; - } - - SAFE_FREE(k); - } - - if (!tdb->travlocks.off) { - /* No previous element: do normal find, and lock record */ - tdb->travlocks.off = tdb_find_lock_hash(tdb, oldkey, tdb->hash_fn(&oldkey), F_WRLCK, &rec); - if (!tdb->travlocks.off) - return tdb_null; - tdb->travlocks.hash = BUCKET(rec.full_hash); - if (lock_record(tdb, tdb->travlocks.off) != 0) { - TDB_LOG((tdb, 0, "tdb_nextkey: lock_record failed (%s)!\n", strerror(errno))); - return tdb_null; - } - } - oldhash = tdb->travlocks.hash; - - /* Grab next record: locks chain and returned record, - unlocks old record */ - if (tdb_next_lock(tdb, &tdb->travlocks, &rec) > 0) { - key.dsize = rec.key_len; - key.dptr = tdb_alloc_read(tdb, tdb->travlocks.off+sizeof(rec), - key.dsize); - /* Unlock the chain of this new record */ - if (tdb_unlock(tdb, tdb->travlocks.hash, F_WRLCK) != 0) - TDB_LOG((tdb, 0, "tdb_nextkey: WARNING tdb_unlock failed!\n")); - } - /* Unlock the chain of old record */ - if (tdb_unlock(tdb, BUCKET(oldhash), F_WRLCK) != 0) - TDB_LOG((tdb, 0, "tdb_nextkey: WARNING tdb_unlock failed!\n")); - return key; -} - -/* delete an entry in the database given a key */ -static int tdb_delete_hash(TDB_CONTEXT *tdb, TDB_DATA key, uint32_t hash) -{ - tdb_off rec_ptr; - struct list_struct rec; - int ret; - - if (!(rec_ptr = tdb_find_lock_hash(tdb, key, hash, F_WRLCK, &rec))) - return -1; - ret = do_delete(tdb, rec_ptr, &rec); - if (tdb_unlock(tdb, BUCKET(rec.full_hash), F_WRLCK) != 0) - TDB_LOG((tdb, 0, "tdb_delete: WARNING tdb_unlock failed!\n")); - return ret; -} - -int tdb_delete(TDB_CONTEXT *tdb, TDB_DATA key) -{ - uint32_t hash = tdb->hash_fn(&key); - return tdb_delete_hash(tdb, key, hash); -} - -/* store an element in the database, replacing any existing element - with the same key - - return 0 on success, -1 on failure -*/ -int tdb_store(TDB_CONTEXT *tdb, TDB_DATA key, TDB_DATA dbuf, int flag) -{ - struct list_struct rec; - uint32_t hash; - tdb_off rec_ptr; - char *p = NULL; - int ret = 0; - - /* find which hash bucket it is in */ - hash = tdb->hash_fn(&key); - if (tdb_lock(tdb, BUCKET(hash), F_WRLCK) == -1) - return -1; - - /* check for it existing, on insert. */ - if (flag == TDB_INSERT) { - if (tdb_exists_hash(tdb, key, hash)) { - tdb->ecode = TDB_ERR_EXISTS; - goto fail; - } - } else { - /* first try in-place update, on modify or replace. */ - if (tdb_update_hash(tdb, key, hash, dbuf) == 0) - goto out; - if (tdb->ecode == TDB_ERR_NOEXIST && - flag == TDB_MODIFY) { - /* if the record doesn't exist and we are in TDB_MODIFY mode then - we should fail the store */ - goto fail; - } - } - /* reset the error code potentially set by the tdb_update() */ - tdb->ecode = TDB_SUCCESS; - - /* delete any existing record - if it doesn't exist we don't - care. Doing this first reduces fragmentation, and avoids - coalescing with `allocated' block before it's updated. */ - if (flag != TDB_INSERT) - tdb_delete_hash(tdb, key, hash); - - /* Copy key+value *before* allocating free space in case malloc - fails and we are left with a dead spot in the tdb. */ - - if (!(p = (char *)talloc_size(tdb, key.dsize + dbuf.dsize))) { - tdb->ecode = TDB_ERR_OOM; - goto fail; - } - - memcpy(p, key.dptr, key.dsize); - if (dbuf.dsize) - memcpy(p+key.dsize, dbuf.dptr, dbuf.dsize); - - /* we have to allocate some space */ - if (!(rec_ptr = tdb_allocate(tdb, key.dsize + dbuf.dsize, &rec))) - goto fail; - - /* Read hash top into next ptr */ - if (ofs_read(tdb, TDB_HASH_TOP(hash), &rec.next) == -1) - goto fail; - - rec.key_len = key.dsize; - rec.data_len = dbuf.dsize; - rec.full_hash = hash; - rec.magic = TDB_MAGIC; - - /* write out and point the top of the hash chain at it */ - if (rec_write(tdb, rec_ptr, &rec) == -1 - || tdb_write(tdb, rec_ptr+sizeof(rec), p, key.dsize+dbuf.dsize)==-1 - || ofs_write(tdb, TDB_HASH_TOP(hash), &rec_ptr) == -1) { - /* Need to tdb_unallocate() here */ - goto fail; - } - out: - SAFE_FREE(p); - tdb_unlock(tdb, BUCKET(hash), F_WRLCK); - return ret; -fail: - ret = -1; - goto out; -} - -static int tdb_already_open(dev_t device, - ino_t ino) -{ - TDB_CONTEXT *i; - - for (i = tdbs; i; i = i->next) { - if (i->device == device && i->inode == ino) { - return 1; - } - } - - return 0; -} - -/* a default logging function */ -static void null_log_fn(TDB_CONTEXT *tdb __attribute__((unused)), - int level __attribute__((unused)), - const char *fmt __attribute__((unused)), ...) -{ -} - - -TDB_CONTEXT *tdb_open_ex(const char *name, int hash_size, int tdb_flags, - int open_flags, mode_t mode, - tdb_log_func log_fn, - tdb_hash_func hash_fn) -{ - TDB_CONTEXT *tdb; - struct stat st; - int rev = 0, locked = 0; - uint8_t *vp; - uint32_t vertest; - - if (!(tdb = talloc_zero(name, TDB_CONTEXT))) { - /* Can't log this */ - errno = ENOMEM; - goto fail; - } - tdb->fd = -1; - tdb->name = NULL; - tdb->map_ptr = NULL; - tdb->flags = tdb_flags; - tdb->open_flags = open_flags; - tdb->log_fn = log_fn?log_fn:null_log_fn; - tdb->hash_fn = hash_fn ? hash_fn : default_tdb_hash; - - if ((open_flags & O_ACCMODE) == O_WRONLY) { - TDB_LOG((tdb, 0, "tdb_open_ex: can't open tdb %s write-only\n", - name)); - errno = EINVAL; - goto fail; - } - - if (hash_size == 0) - hash_size = DEFAULT_HASH_SIZE; - if ((open_flags & O_ACCMODE) == O_RDONLY) { - tdb->read_only = 1; - /* read only databases don't do locking or clear if first */ - tdb->flags |= TDB_NOLOCK; - tdb->flags &= ~TDB_CLEAR_IF_FIRST; - } - - /* internal databases don't mmap or lock, and start off cleared */ - if (tdb->flags & TDB_INTERNAL) { - tdb->flags |= (TDB_NOLOCK | TDB_NOMMAP); - tdb->flags &= ~TDB_CLEAR_IF_FIRST; - if (tdb_new_database(tdb, hash_size) != 0) { - TDB_LOG((tdb, 0, "tdb_open_ex: tdb_new_database failed!")); - goto fail; - } - goto internal; - } - - if ((tdb->fd = open(name, open_flags, mode)) == -1) { - TDB_LOG((tdb, 5, "tdb_open_ex: could not open file %s: %s\n", - name, strerror(errno))); - goto fail; /* errno set by open(2) */ - } - - /* ensure there is only one process initialising at once */ - if (tdb_brlock(tdb, GLOBAL_LOCK, F_WRLCK, F_SETLKW, 0) == -1) { - TDB_LOG((tdb, 0, "tdb_open_ex: failed to get global lock on %s: %s\n", - name, strerror(errno))); - goto fail; /* errno set by tdb_brlock */ - } - - /* we need to zero database if we are the only one with it open */ - if ((tdb_flags & TDB_CLEAR_IF_FIRST) && - (locked = (tdb_brlock(tdb, ACTIVE_LOCK, F_WRLCK, F_SETLK, 0) == 0))) { - open_flags |= O_CREAT; - if (ftruncate(tdb->fd, 0) == -1) { - TDB_LOG((tdb, 0, "tdb_open_ex: " - "failed to truncate %s: %s\n", - name, strerror(errno))); - goto fail; /* errno set by ftruncate */ - } - } - - if (read(tdb->fd, &tdb->header, sizeof(tdb->header)) != sizeof(tdb->header) - || strcmp(tdb->header.magic_food, TDB_MAGIC_FOOD) != 0 - || (tdb->header.version != TDB_VERSION - && !(rev = (tdb->header.version==TDB_BYTEREV(TDB_VERSION))))) { - /* its not a valid database - possibly initialise it */ - if (!(open_flags & O_CREAT) || tdb_new_database(tdb, hash_size) == -1) { - errno = EIO; /* ie bad format or something */ - goto fail; - } - rev = (tdb->flags & TDB_CONVERT); - } - vp = (uint8_t *)&tdb->header.version; - vertest = (((uint32_t)vp[0]) << 24) | (((uint32_t)vp[1]) << 16) | - (((uint32_t)vp[2]) << 8) | (uint32_t)vp[3]; - tdb->flags |= (vertest==TDB_VERSION) ? TDB_BIGENDIAN : 0; - if (!rev) - tdb->flags &= ~TDB_CONVERT; - else { - tdb->flags |= TDB_CONVERT; - convert(&tdb->header, sizeof(tdb->header)); - } - if (fstat(tdb->fd, &st) == -1) - goto fail; - - /* Is it already in the open list? If so, fail. */ - if (tdb_already_open(st.st_dev, st.st_ino)) { - TDB_LOG((tdb, 2, "tdb_open_ex: " - "%s (%d,%d) is already open in this process\n", - name, (int)st.st_dev, (int)st.st_ino)); - errno = EBUSY; - goto fail; - } - - if (!(tdb->name = (char *)talloc_strdup(tdb, name))) { - errno = ENOMEM; - goto fail; - } - - tdb->map_size = st.st_size; - tdb->device = st.st_dev; - tdb->inode = st.st_ino; - tdb->locked = talloc_zero_array(tdb, struct tdb_lock_type, - tdb->header.hash_size+1); - if (!tdb->locked) { - TDB_LOG((tdb, 2, "tdb_open_ex: " - "failed to allocate lock structure for %s\n", - name)); - errno = ENOMEM; - goto fail; - } - tdb_mmap(tdb); - if (locked) { - if (tdb_brlock(tdb, ACTIVE_LOCK, F_UNLCK, F_SETLK, 0) == -1) { - TDB_LOG((tdb, 0, "tdb_open_ex: " - "failed to take ACTIVE_LOCK on %s: %s\n", - name, strerror(errno))); - goto fail; - } - - } - - /* We always need to do this if the CLEAR_IF_FIRST flag is set, even if - we didn't get the initial exclusive lock as we need to let all other - users know we're using it. */ - - if (tdb_flags & TDB_CLEAR_IF_FIRST) { - /* leave this lock in place to indicate it's in use */ - if (tdb_brlock(tdb, ACTIVE_LOCK, F_RDLCK, F_SETLKW, 0) == -1) - goto fail; - } - - - internal: - /* Internal (memory-only) databases skip all the code above to - * do with disk files, and resume here by releasing their - * global lock and hooking into the active list. */ - if (tdb_brlock(tdb, GLOBAL_LOCK, F_UNLCK, F_SETLKW, 0) == -1) - goto fail; - tdb->next = tdbs; - tdbs = tdb; - return tdb; - - fail: - { int save_errno = errno; - - if (!tdb) - return NULL; - - if (tdb->map_ptr) { - if (tdb->flags & TDB_INTERNAL) - SAFE_FREE(tdb->map_ptr); - else - tdb_munmap(tdb); - } - SAFE_FREE(tdb->name); - if (tdb->fd != -1) - if (close(tdb->fd) != 0) - TDB_LOG((tdb, 5, "tdb_open_ex: failed to close tdb->fd on error!\n")); - SAFE_FREE(tdb->locked); - SAFE_FREE(tdb); - errno = save_errno; - return NULL; - } -} - -/** - * Close a database. - * - * @returns -1 for error; 0 for success. - **/ -int tdb_close(TDB_CONTEXT *tdb) -{ - TDB_CONTEXT **i; - int ret = 0; - - if (tdb->map_ptr) { - if (tdb->flags & TDB_INTERNAL) - SAFE_FREE(tdb->map_ptr); - else - tdb_munmap(tdb); - } - SAFE_FREE(tdb->name); - if (tdb->fd != -1) - ret = close(tdb->fd); - SAFE_FREE(tdb->locked); - - /* Remove from contexts list */ - for (i = &tdbs; *i; i = &(*i)->next) { - if (*i == tdb) { - *i = tdb->next; - break; - } - } - - memset(tdb, 0, sizeof(*tdb)); - SAFE_FREE(tdb); - - return ret; -} diff --git a/tools/xenstore/tdb.h b/tools/xenstore/tdb.h deleted file mode 100644 index ce3c7339f8..0000000000 --- a/tools/xenstore/tdb.h +++ /dev/null @@ -1,132 +0,0 @@ -#ifndef __TDB_H__ -#define __TDB_H__ - -#include "utils.h" - -/* - Unix SMB/CIFS implementation. - - trivial database library - - Copyright (C) Andrew Tridgell 1999-2004 - - ** NOTE! The following LGPL license applies to the tdb - ** library. This does NOT imply that all of Samba is released - ** under the LGPL - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; If not, see . -*/ - -#ifdef __cplusplus -extern "C" { -#endif - - -/* flags to tdb_store() */ -#define TDB_REPLACE 1 -#define TDB_INSERT 2 -#define TDB_MODIFY 3 - -/* flags for tdb_open() */ -#define TDB_DEFAULT 0 /* just a readability place holder */ -#define TDB_CLEAR_IF_FIRST 1 -#define TDB_INTERNAL 2 /* don't store on disk */ -#define TDB_NOLOCK 4 /* don't do any locking */ -#define TDB_NOMMAP 8 /* don't use mmap */ -#define TDB_CONVERT 16 /* convert endian (internal use) */ -#define TDB_BIGENDIAN 32 /* header is big-endian (internal use) */ - -#define TDB_ERRCODE(code, ret) ((tdb->ecode = (code)), ret) - -/* error codes */ -enum TDB_ERROR {TDB_SUCCESS=0, TDB_ERR_CORRUPT, TDB_ERR_IO, TDB_ERR_LOCK, - TDB_ERR_OOM, TDB_ERR_EXISTS, TDB_ERR_NOLOCK, TDB_ERR_LOCK_TIMEOUT, - TDB_ERR_NOEXIST}; - -#ifndef uint32_t -#define uint32_t unsigned -#endif - -typedef struct TDB_DATA { - char *dptr; - size_t dsize; -} TDB_DATA; - -typedef uint32_t tdb_len; -typedef uint32_t tdb_off; - -/* this is stored at the front of every database */ -struct tdb_header { - char magic_food[32]; /* for /etc/magic */ - uint32_t version; /* version of the code */ - uint32_t hash_size; /* number of hash entries */ - tdb_off rwlocks; - tdb_off reserved[31]; -}; - -struct tdb_lock_type { - uint32_t count; - uint32_t ltype; -}; - -struct tdb_traverse_lock { - struct tdb_traverse_lock *next; - uint32_t off; - uint32_t hash; -}; - -/* this is the context structure that is returned from a db open */ -typedef struct tdb_context { - char *name; /* the name of the database */ - void *map_ptr; /* where it is currently mapped */ - int fd; /* open file descriptor for the database */ - tdb_len map_size; /* how much space has been mapped */ - int read_only; /* opened read-only */ - struct tdb_lock_type *locked; /* array of chain locks */ - enum TDB_ERROR ecode; /* error code for last tdb error */ - struct tdb_header header; /* a cached copy of the header */ - uint32_t flags; /* the flags passed to tdb_open */ - struct tdb_traverse_lock travlocks; /* current traversal locks */ - struct tdb_context *next; /* all tdbs to avoid multiple opens */ - dev_t device; /* uniquely identifies this tdb */ - ino_t inode; /* uniquely identifies this tdb */ - void (*log_fn)(struct tdb_context *tdb, int level, const char *, ...) PRINTF_ATTRIBUTE(3,4); /* logging function */ - uint32_t (*hash_fn)(TDB_DATA *key); - int open_flags; /* flags used in the open - needed by reopen */ -} TDB_CONTEXT; - -typedef int (*tdb_traverse_func)(TDB_CONTEXT *, TDB_DATA, TDB_DATA, void *); -typedef void (*tdb_log_func)(TDB_CONTEXT *, int , const char *, ...); -typedef uint32_t (*tdb_hash_func)(TDB_DATA *key); - -TDB_CONTEXT *tdb_open_ex(const char *name, int hash_size, int tdb_flags, - int open_flags, mode_t mode, - tdb_log_func log_fn, - tdb_hash_func hash_fn); - -enum TDB_ERROR tdb_error(TDB_CONTEXT *tdb); -const char *tdb_errorstr(TDB_CONTEXT *tdb); -TDB_DATA tdb_fetch(TDB_CONTEXT *tdb, TDB_DATA key); -int tdb_delete(TDB_CONTEXT *tdb, TDB_DATA key); -int tdb_store(TDB_CONTEXT *tdb, TDB_DATA key, TDB_DATA dbuf, int flag); -int tdb_close(TDB_CONTEXT *tdb); -TDB_DATA tdb_firstkey(TDB_CONTEXT *tdb); -TDB_DATA tdb_nextkey(TDB_CONTEXT *tdb, TDB_DATA key); -int tdb_traverse(TDB_CONTEXT *tdb, tdb_traverse_func fn, void *); - -#ifdef __cplusplus -} -#endif - -#endif /* tdb.h */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:15 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586945.918263 (Exim 4.92) (envelope-from ) id 1qXE7H-0008KL-SF; Sat, 19 Aug 2023 05:03:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586945.918263; Sat, 19 Aug 2023 05:03:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7H-0008KD-PM; Sat, 19 Aug 2023 05:03:15 +0000 Received: by outflank-mailman (input) for mailman id 586945; Sat, 19 Aug 2023 05:03:14 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7G-0008K3-J0 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:14 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7G-0002MN-IG for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:14 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE7G-0003XF-HT for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:14 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=07HjIzzCp4lzXW5okVCPStePyLdYsVp5iiWi3kPUE7M=; b=rTslD6qzgZ+IMKNGKNAeKVaMhg MVceTn/FEGTG+xoS/T1gipG5EUZGFHAzOiVNZSTfLRqSm1x27gPMIJiC9l9NvNs3+2KiPdAzeQ/P1 qohQp33b8VcpwMvWAUdBI++k0tnGpqPnxOpp9g3qRj9cPsAsllRFJFxnjwN995gymiCw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: let db_delete() return void Message-Id: Date: Sat, 19 Aug 2023 05:03:14 +0000 commit f39c39ba2585df9cc0a8a9a963fa2dd07dc31c86 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:54 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: let db_delete() return void db_delete() only ever is returning 0. Switch it to return void and remove all the error handling dealing wit a non-zero return value. Suggested-by: Julien Grall Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 11 ++++------- tools/xenstore/xenstored_core.h | 4 ++-- tools/xenstore/xenstored_transaction.c | 14 +++++--------- 3 files changed, 11 insertions(+), 18 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 2b94392fd4..a08962c3ea 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -677,8 +677,8 @@ int db_write(struct connection *conn, const char *db_name, void *data, return 0; } -int db_delete(struct connection *conn, const char *name, - struct node_account_data *acc) +void db_delete(struct connection *conn, const char *name, + struct node_account_data *acc) { struct node_account_data tmp_acc; unsigned int domid; @@ -698,8 +698,6 @@ int db_delete(struct connection *conn, const char *name, domain_memory_add_nochk(conn, domid, -acc->memory - strlen(name)); } - - return 0; } /* @@ -1670,9 +1668,8 @@ static int delnode_sub(const void *ctx, struct connection *conn, if (domain_nbentry_dec(conn, get_node_owner(node))) return WALK_TREE_ERROR_STOP; - /* In case of error stop the walk. */ - if (!ret && db_delete(conn, db_name, &node->acc)) - return WALK_TREE_ERROR_STOP; + if (!ret) + db_delete(conn, db_name, &node->acc); /* * Fire the watches now, when we can still see the node permissions. diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index ce40c61f44..e1aeb4aecd 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -366,8 +366,8 @@ struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size); int db_write(struct connection *conn, const char *db_name, void *data, size_t size, struct node_account_data *acc, enum write_node_mode mode, bool no_quota_check); -int db_delete(struct connection *conn, const char *name, - struct node_account_data *acc); +void db_delete(struct connection *conn, const char *name, + struct node_account_data *acc); void conn_free_buffered_data(struct connection *conn); diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index 378fe79763..fbcea3663e 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -377,10 +377,8 @@ static int finalize_transaction(struct connection *conn, /* Entries for unmodified nodes can be removed early. */ if (!i->modified) { - if (i->ta_node) { - if (db_delete(conn, i->trans_name, NULL)) - return EIO; - } + if (i->ta_node) + db_delete(conn, i->trans_name, NULL); list_del(&i->list); talloc_free(i); } @@ -397,8 +395,7 @@ static int finalize_transaction(struct connection *conn, ? NODE_CREATE : NODE_MODIFY; *is_corrupt |= db_write(conn, i->node, hdr, size, NULL, mode, true); - if (db_delete(conn, i->trans_name, NULL)) - *is_corrupt = true; + db_delete(conn, i->trans_name, NULL); } else { *is_corrupt = true; } @@ -408,9 +405,8 @@ static int finalize_transaction(struct connection *conn, * in this transaction will have no generation * information stored. */ - *is_corrupt |= (i->generation == NO_GENERATION) - ? false - : db_delete(conn, i->node, NULL); + if (i->generation != NO_GENERATION) + db_delete(conn, i->node, NULL); } if (i->fire_watch) fire_watches(conn, trans, i->node, NULL, i->watch_exact, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586946.918267 (Exim 4.92) (envelope-from ) id 1qXE7R-0008NZ-Tz; Sat, 19 Aug 2023 05:03:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586946.918267; Sat, 19 Aug 2023 05:03:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7R-0008NS-R5; Sat, 19 Aug 2023 05:03:25 +0000 Received: by outflank-mailman (input) for mailman id 586946; Sat, 19 Aug 2023 05:03:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7Q-0008NE-M4 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7Q-0002MU-LP for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:24 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE7Q-0003Xs-KZ for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:24 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=seq93Oa8iO2xbDjUKsV21EFUwxifgkd0c2UuMZvWj+U=; b=yfK4RfcEWfAi20LK6DIZxnxDp9 Qb9dZsqthx5HrLuT07fUQ8kk0DZ5cOYEwORIow7UI+FJNXM4ZULsqsRl/gL3KXyoqM3CgWDRwW1/A Zk7pvqnjsMHuxffNs+hvVb3Z+ZeLWuISQ5+TqsI77AjYqNgsuTeV+CiViYkZIxhMQOxw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: change talloc_free() to take a const pointer Message-Id: Date: Sat, 19 Aug 2023 05:03:24 +0000 commit 9eb0d66cae295d09f763127b7f808c4094d8d22c Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:55 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: change talloc_free() to take a const pointer With talloc_free() and related functions not taking a pointer to const it is tedious to use the const attribute for talloc()-ed memory in many cases. Change the related prototypes to use "const void *" instead of "void *". Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/talloc.c | 10 ++++++---- tools/xenstore/talloc.h | 4 ++-- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/tools/xenstore/talloc.c b/tools/xenstore/talloc.c index 23c3a23b19..e42c7d4471 100644 --- a/tools/xenstore/talloc.c +++ b/tools/xenstore/talloc.c @@ -319,7 +319,7 @@ static int talloc_unreference(const void *context, const void *ptr) remove a specific parent context from a pointer. This is a more controlled varient of talloc_free() */ -int talloc_unlink(const void *context, void *ptr) +int talloc_unlink(const void *context, const void *ptr) { struct talloc_chunk *tc_p, *new_p; void *new_parent; @@ -499,7 +499,7 @@ void *talloc_init(const char *fmt, ...) should probably not be used in new code. It's in here to keep the talloc code consistent across Samba 3 and 4. */ -static void talloc_free_children(void *ptr) +static void talloc_free_children(const void *ptr) { struct talloc_chunk *tc; @@ -539,7 +539,7 @@ static void talloc_free_children(void *ptr) will not be freed if the ref_count is > 1 or the destructor (if any) returns non-zero */ -int talloc_free(void *ptr) +int talloc_free(const void *ptr) { int saved_errno = errno; struct talloc_chunk *tc; @@ -571,7 +571,9 @@ int talloc_free(void *ptr) goto err; } tc->destructor = (talloc_destructor_t)-1; - if (d(ptr) == -1) { + + /* The destructor needs to be able to change the object! */ + if (d((void *)ptr) == -1) { tc->destructor = d; goto err; } diff --git a/tools/xenstore/talloc.h b/tools/xenstore/talloc.h index 518fcac151..32cee63d4d 100644 --- a/tools/xenstore/talloc.h +++ b/tools/xenstore/talloc.h @@ -92,7 +92,7 @@ void *_talloc(const void *context, size_t size); void talloc_set_destructor(const void *ptr, int (*destructor)(void *)); void talloc_increase_ref_count(const void *ptr); void *talloc_reference(const void *context, const void *ptr); -int talloc_unlink(const void *context, void *ptr); +int talloc_unlink(const void *context, const void *ptr); void talloc_set_name(const void *ptr, const char *fmt, ...) PRINTF_ATTRIBUTE(2,3); void talloc_set_name_const(const void *ptr, const char *name); void *talloc_named(const void *context, size_t size, @@ -103,7 +103,7 @@ void *talloc_check_name(const void *ptr, const char *name); void talloc_report_depth(const void *ptr, FILE *f, int depth); void *talloc_parent(const void *ptr); void *talloc_init(const char *fmt, ...) PRINTF_ATTRIBUTE(1,2); -int talloc_free(void *ptr); +int talloc_free(const void *ptr); void *_talloc_realloc(const void *context, void *ptr, size_t size, const char *name); void *talloc_steal(const void *new_ctx, const void *ptr); off_t talloc_total_size(const void *ptr); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586947.918271 (Exim 4.92) (envelope-from ) id 1qXE7b-0008QQ-VY; Sat, 19 Aug 2023 05:03:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586947.918271; Sat, 19 Aug 2023 05:03:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7b-0008QJ-Sf; Sat, 19 Aug 2023 05:03:35 +0000 Received: by outflank-mailman (input) for mailman id 586947; Sat, 19 Aug 2023 05:03:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7a-0008QB-PC for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7a-0002Mb-OS for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:34 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE7a-0003YJ-Nk for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:34 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=38V+nAVBBJJo4RFqmBjo70IIB9A7KOWLlD9/06uGGlw=; b=32KkoOv4DqAAikzMHnvKBXdaAY W/dtVefENIN5sOCM+xtdrRw7kn1FwEVA7EZFJbfnx7XrjTqY5Qa6HokewKFshXEiMlIbg5yadg4cr qOYMx0YPJnoFdNLYgOWQNpnuNWN/uF6LMfzRJwVShqNg6RlLV3JmcYs9WSmtnzeymqiU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: move copying of node data out of db_fetch() Message-Id: Date: Sat, 19 Aug 2023 05:03:34 +0000 commit e95c661889229a51bac0180c2cd9f0cbbb22ae38 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:56 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: move copying of node data out of db_fetch() Today the node data is copied in db_fetch() on each data base read in order to avoid accidental data base modifications when working on a node. read_node() is the only caller of db_fetch() which isn't freeing the returned data area immediately after using it. The other callers don't modify the returned data, so they don't need the data to be copied. Move copying of the data into read_node(), resulting in a speedup of the other callers due to no memory allocation and no copying being needed anymore. This allows to let db_fetch() return a pointer to const data. As db_fetch() can't return any error other than ENOENT now, error handling for the callers can be simplified. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 43 ++++++++++++++-------------------- tools/xenstore/xenstored_core.h | 2 +- tools/xenstore/xenstored_transaction.c | 23 ++++++++++++------ 3 files changed, 34 insertions(+), 34 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index a08962c3ea..53e29aeb9a 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -555,10 +555,9 @@ static void initialize_fds(int *p_sock_pollfd_idx, int *ptimeout) } } -struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) +const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) { const struct xs_tdb_record_hdr *hdr; - struct xs_tdb_record_hdr *p; hdr = hashtable_search(nodes, db_name); if (!hdr) { @@ -569,22 +568,15 @@ struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) *size = sizeof(*hdr) + hdr->num_perms * sizeof(hdr->perms[0]) + hdr->datalen + hdr->childlen; - /* Return a copy, avoiding a potential modification in the DB. */ - p = talloc_memdup(NULL, hdr, *size); - if (!p) { - errno = ENOMEM; - return NULL; - } - trace_tdb("read %s size %zu\n", db_name, *size + strlen(db_name)); - return p; + return hdr; } static void get_acc_data(const char *name, struct node_account_data *acc) { size_t size; - struct xs_tdb_record_hdr *hdr; + const struct xs_tdb_record_hdr *hdr; if (acc->memory < 0) { hdr = db_fetch(name, &size); @@ -595,7 +587,6 @@ static void get_acc_data(const char *name, struct node_account_data *acc) acc->memory = size; acc->domid = hdr->perms[0].id; } - talloc_free(hdr); } } @@ -708,7 +699,7 @@ struct node *read_node(struct connection *conn, const void *ctx, const char *name) { size_t size; - struct xs_tdb_record_hdr *hdr; + const struct xs_tdb_record_hdr *hdr; struct node *node; const char *db_name; int err; @@ -729,30 +720,30 @@ struct node *read_node(struct connection *conn, const void *ctx, hdr = db_fetch(db_name, &size); if (hdr == NULL) { - if (errno == ENOENT) { - node->generation = NO_GENERATION; - err = access_node(conn, node, NODE_ACCESS_READ, NULL); - errno = err ? : ENOENT; - } else { - log("DB error on read: %s", strerror(errno)); - errno = EIO; - } + node->generation = NO_GENERATION; + err = access_node(conn, node, NODE_ACCESS_READ, NULL); + errno = err ? : ENOENT; goto error; } node->parent = NULL; - talloc_steal(node, hdr); /* Datalen, childlen, number of permissions */ node->generation = hdr->generation; node->perms.num = hdr->num_perms; node->datalen = hdr->datalen; node->childlen = hdr->childlen; - - /* Permissions are struct xs_permissions. */ - node->perms.p = hdr->perms; - node->acc.domid = get_node_owner(node); + node->acc.domid = hdr->perms[0].id; node->acc.memory = size; + + /* Copy node data to new memory area, starting with permissions. */ + size -= sizeof(*hdr); + node->perms.p = talloc_memdup(node, hdr->perms, size); + if (node->perms.p == NULL) { + errno = ENOMEM; + goto error; + } + if (domain_adjust_node_perms(node)) goto error; diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index e1aeb4aecd..4a370f766f 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -362,7 +362,7 @@ extern xengnttab_handle **xgt_handle; int remember_string(struct hashtable *hash, const char *str); /* Data base access functions. */ -struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size); +const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size); int db_write(struct connection *conn, const char *db_name, void *data, size_t size, struct node_account_data *acc, enum write_node_mode mode, bool no_quota_check); diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index fbcea3663e..a90283dcc5 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -357,20 +357,17 @@ static int finalize_transaction(struct connection *conn, { struct accessed_node *i, *n; size_t size; - struct xs_tdb_record_hdr *hdr; + const struct xs_tdb_record_hdr *hdr; uint64_t gen; list_for_each_entry_safe(i, n, &trans->accessed, list) { if (i->check_gen) { hdr = db_fetch(i->node, &size); if (!hdr) { - if (errno != ENOENT) - return errno; gen = NO_GENERATION; } else { gen = hdr->generation; } - talloc_free(hdr); if (i->generation != gen) return EAGAIN; } @@ -388,14 +385,26 @@ static int finalize_transaction(struct connection *conn, if (i->ta_node) { hdr = db_fetch(i->trans_name, &size); if (hdr) { + /* + * Delete transaction entry and write it as + * no-TA entry. As we only hold a reference + * to the data, increment its ref count, then + * delete it from the DB. Now we own it and can + * drop the const attribute for changing the + * generation count. + */ enum write_node_mode mode; + struct xs_tdb_record_hdr *own; - hdr->generation = ++generation; + talloc_increase_ref_count(hdr); + db_delete(conn, i->trans_name, NULL); + + own = (struct xs_tdb_record_hdr *)hdr; + own->generation = ++generation; mode = (i->generation == NO_GENERATION) ? NODE_CREATE : NODE_MODIFY; - *is_corrupt |= db_write(conn, i->node, hdr, + *is_corrupt |= db_write(conn, i->node, own, size, NULL, mode, true); - db_delete(conn, i->trans_name, NULL); } else { *is_corrupt = true; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:46 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586948.918275 (Exim 4.92) (envelope-from ) id 1qXE7m-0008St-2C; Sat, 19 Aug 2023 05:03:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586948.918275; Sat, 19 Aug 2023 05:03:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7l-0008Sm-UU; Sat, 19 Aug 2023 05:03:45 +0000 Received: by outflank-mailman (input) for mailman id 586948; Sat, 19 Aug 2023 05:03:44 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7k-0008Sd-SB for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:44 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7k-0002Mi-RS for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:44 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE7k-0003aH-Qi for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:44 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=80n5Uo5uUrBh+HDNxpvI0AFZudebK2PLcMCmQenIwf0=; b=sDCFqN234FUqu0uqnMGOSH1Iez Vtm+rAs3BXZIuOJzCDvNReOQpqlavjeiW+nwAY4D39A0+mL4sf4caKVhaEwqg4d1ZO9YPjmqjUynw L8GakGMjApBtnbPJiZUGmUu/xTYgqt3KiYBzkbun62mhtyz8Giw3fo5lWH2JVozyuFpc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: rework struct xs_tdb_record_hdr Message-Id: Date: Sat, 19 Aug 2023 05:03:44 +0000 commit 45ce0cb38f7ae0f2d0a2694af85a253524d97f87 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:57 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: rework struct xs_tdb_record_hdr Struct xs_tdb_record_hdr is used for nodes stored in the data base. When working on a node, struct node is being used, which is including the same information as struct xs_tdb_record_hdr, but in a different format. Rework struct xs_tdb_record_hdr in order to prepare including it in struct node. Do the following modifications: - move its definition to xenstored_core.h, as the reason to put it into utils.h are no longer existing - rename it to struct node_hdr, as the "tdb" in its name has only historical reasons - replace the empty permission array at the end with a comment about the layout of data in the data base (concatenation of header, permissions, node contents, and children list) - use narrower types for num_perms and datalen, as those are naturally limited to XENSTORE_PAYLOAD_MAX (childlen is different here, as it is in theory basically unlimited) Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/utils.h | 9 ------- tools/xenstore/xenstored_core.c | 46 +++++++++++++++++++++++----------- tools/xenstore/xenstored_core.h | 20 ++++++++++++++- tools/xenstore/xenstored_transaction.c | 6 ++--- 4 files changed, 53 insertions(+), 28 deletions(-) diff --git a/tools/xenstore/utils.h b/tools/xenstore/utils.h index 028ecb9d7a..405d662ea2 100644 --- a/tools/xenstore/utils.h +++ b/tools/xenstore/utils.h @@ -9,15 +9,6 @@ #include "xenstore_lib.h" -/* Header of the node record in tdb. */ -struct xs_tdb_record_hdr { - uint64_t generation; - uint32_t num_perms; - uint32_t datalen; - uint32_t childlen; - struct xs_permissions perms[0]; -}; - /* Is A == B ? */ #define streq(a,b) (strcmp((a),(b)) == 0) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 53e29aeb9a..9fc17a9efc 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -555,9 +555,9 @@ static void initialize_fds(int *p_sock_pollfd_idx, int *ptimeout) } } -const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) +const struct node_hdr *db_fetch(const char *db_name, size_t *size) { - const struct xs_tdb_record_hdr *hdr; + const struct node_hdr *hdr; hdr = hashtable_search(nodes, db_name); if (!hdr) { @@ -565,7 +565,7 @@ const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) return NULL; } - *size = sizeof(*hdr) + hdr->num_perms * sizeof(hdr->perms[0]) + + *size = sizeof(*hdr) + hdr->num_perms * sizeof(struct xs_permissions) + hdr->datalen + hdr->childlen; trace_tdb("read %s size %zu\n", db_name, *size + strlen(db_name)); @@ -573,10 +573,16 @@ const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size) return hdr; } +static const struct xs_permissions *perms_from_node_hdr( + const struct node_hdr *hdr) +{ + return (const struct xs_permissions *)(hdr + 1); +} + static void get_acc_data(const char *name, struct node_account_data *acc) { size_t size; - const struct xs_tdb_record_hdr *hdr; + const struct node_hdr *hdr; if (acc->memory < 0) { hdr = db_fetch(name, &size); @@ -585,7 +591,7 @@ static void get_acc_data(const char *name, struct node_account_data *acc) acc->memory = 0; } else { acc->memory = size; - acc->domid = hdr->perms[0].id; + acc->domid = perms_from_node_hdr(hdr)->id; } } } @@ -606,7 +612,7 @@ int db_write(struct connection *conn, const char *db_name, void *data, size_t size, struct node_account_data *acc, enum write_node_mode mode, bool no_quota_check) { - struct xs_tdb_record_hdr *hdr = data; + const struct node_hdr *hdr = data; struct node_account_data old_acc = {}; unsigned int old_domid, new_domid; size_t name_len = strlen(db_name); @@ -620,7 +626,7 @@ int db_write(struct connection *conn, const char *db_name, void *data, get_acc_data(db_name, &old_acc); old_domid = get_acc_domid(conn, db_name, old_acc.domid); - new_domid = get_acc_domid(conn, db_name, hdr->perms[0].id); + new_domid = get_acc_domid(conn, db_name, perms_from_node_hdr(hdr)->id); /* * Don't check for ENOENT, as we want to be able to switch orphaned @@ -661,7 +667,7 @@ int db_write(struct connection *conn, const char *db_name, void *data, if (acc) { /* Don't use new_domid, as it might be a transaction node. */ - acc->domid = hdr->perms[0].id; + acc->domid = perms_from_node_hdr(hdr)->id; acc->memory = size; } @@ -699,7 +705,7 @@ struct node *read_node(struct connection *conn, const void *ctx, const char *name) { size_t size; - const struct xs_tdb_record_hdr *hdr; + const struct node_hdr *hdr; struct node *node; const char *db_name; int err; @@ -733,12 +739,12 @@ struct node *read_node(struct connection *conn, const void *ctx, node->perms.num = hdr->num_perms; node->datalen = hdr->datalen; node->childlen = hdr->childlen; - node->acc.domid = hdr->perms[0].id; + node->acc.domid = perms_from_node_hdr(hdr)->id; node->acc.memory = size; /* Copy node data to new memory area, starting with permissions. */ size -= sizeof(*hdr); - node->perms.p = talloc_memdup(node, hdr->perms, size); + node->perms.p = talloc_memdup(node, perms_from_node_hdr(hdr), size); if (node->perms.p == NULL) { errno = ENOMEM; goto error; @@ -785,7 +791,7 @@ int write_node_raw(struct connection *conn, const char *db_name, void *data; size_t size; void *p; - struct xs_tdb_record_hdr *hdr; + struct node_hdr *hdr; if (domain_adjust_node_perms(node)) return errno; @@ -806,15 +812,18 @@ int write_node_raw(struct connection *conn, const char *db_name, return errno; } + BUILD_BUG_ON(XENSTORE_PAYLOAD_MAX >= (typeof(hdr->datalen))(-1)); + hdr = data; hdr->generation = node->generation; hdr->num_perms = node->perms.num; hdr->datalen = node->datalen; hdr->childlen = node->childlen; - memcpy(hdr->perms, node->perms.p, - node->perms.num * sizeof(*node->perms.p)); - p = hdr->perms + node->perms.num; + /* Open code perms_from_node_hdr() for the non-const case. */ + p = hdr + 1; + memcpy(p, node->perms.p, node->perms.num * sizeof(*node->perms.p)); + p += node->perms.num * sizeof(*node->perms.p); memcpy(p, node->data, node->datalen); p += node->datalen; memcpy(p, node->children, node->childlen); @@ -2144,6 +2153,13 @@ static void handle_input(struct connection *conn) if (in->used != sizeof(in->hdr)) return; + /* + * The payload size is not only currently restricted by + * the protocol but also the internal implementation + * (see various BUILD_BUG_ON()). + * Any potential change of the maximum payload size + * needs to be negotiated between the involved parties. + */ if (in->hdr.msg.len > XENSTORE_PAYLOAD_MAX) { syslog(LOG_ERR, "Client tried to feed us %i", in->hdr.msg.len); diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index 4a370f766f..1a933892e3 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -168,6 +168,24 @@ struct connection }; extern struct list_head connections; +/* + * Header of the node record in the data base. + * In the data base the memory of the node is a single memory chunk with the + * following format: + * struct { + * node_hdr hdr; + * struct xs_permissions perms[hdr.num_perms]; + * char data[hdr.datalen]; + * char children[hdr.childlen]; + * }; + */ +struct node_hdr { + uint64_t generation; + uint16_t num_perms; + uint16_t datalen; + uint32_t childlen; +}; + struct node_perms { unsigned int num; struct xs_permissions *p; @@ -362,7 +380,7 @@ extern xengnttab_handle **xgt_handle; int remember_string(struct hashtable *hash, const char *str); /* Data base access functions. */ -const struct xs_tdb_record_hdr *db_fetch(const char *db_name, size_t *size); +const struct node_hdr *db_fetch(const char *db_name, size_t *size); int db_write(struct connection *conn, const char *db_name, void *data, size_t size, struct node_account_data *acc, enum write_node_mode mode, bool no_quota_check); diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index a90283dcc5..9ca73b9874 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -357,7 +357,7 @@ static int finalize_transaction(struct connection *conn, { struct accessed_node *i, *n; size_t size; - const struct xs_tdb_record_hdr *hdr; + const struct node_hdr *hdr; uint64_t gen; list_for_each_entry_safe(i, n, &trans->accessed, list) { @@ -394,12 +394,12 @@ static int finalize_transaction(struct connection *conn, * generation count. */ enum write_node_mode mode; - struct xs_tdb_record_hdr *own; + struct node_hdr *own; talloc_increase_ref_count(hdr); db_delete(conn, i->trans_name, NULL); - own = (struct xs_tdb_record_hdr *)hdr; + own = (struct node_hdr *)hdr; own->generation = ++generation; mode = (i->generation == NO_GENERATION) ? NODE_CREATE : NODE_MODIFY; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:03:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:03:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586952.918289 (Exim 4.92) (envelope-from ) id 1qXE7w-0000Lo-H6; Sat, 19 Aug 2023 05:03:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586952.918289; Sat, 19 Aug 2023 05:03:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7w-0000Lh-Dl; Sat, 19 Aug 2023 05:03:56 +0000 Received: by outflank-mailman (input) for mailman id 586952; Sat, 19 Aug 2023 05:03:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7u-0000JK-VI for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:54 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE7u-0002Mu-UX for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:54 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE7u-0003ao-Ts for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:03:54 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=gYEQ2RfYSwCHVTSVSzdI/uKFKP0ybZhJfRupbGZukOU=; b=tuJ0/qD4D7dF57O8926U0VPOXV MhfVqDncP3gsTaBeLQBY+FPkyedAaOcWbMP2OOwqPWJeE8CIWnwkG3UA9cRE8MqjSY0dU6F0GllMO jCC35xUQsg3lHfNOPqkXKzZZMxg2Lt766ty3qM1NZSolpKrQziVNPWvxcRArceYoGFQM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: don't use struct node_perms in struct node Message-Id: Date: Sat, 19 Aug 2023 05:03:54 +0000 commit 8cea54cfdcc9a2c8bf53a9be7df2bc809f88c93e Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:58 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: don't use struct node_perms in struct node Open code struct node_perms in struct node in order to prepare using struct node_hdr in struct node. Add two helpers to transfer permissions between struct node and struct node_perms and a helper to directly get connection base permissions from a node. Let perms_to_strings() take a struct node as parameter and rename it to node_perms_to_strings(). Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 86 +++++++++++++++++----------------- tools/xenstore/xenstored_core.h | 31 +++++++++++- tools/xenstore/xenstored_domain.c | 13 +++-- tools/xenstore/xenstored_transaction.c | 8 ++-- tools/xenstore/xenstored_watch.c | 4 +- 5 files changed, 83 insertions(+), 59 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 9fc17a9efc..d7a4f0f1cb 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -736,7 +736,7 @@ struct node *read_node(struct connection *conn, const void *ctx, /* Datalen, childlen, number of permissions */ node->generation = hdr->generation; - node->perms.num = hdr->num_perms; + node->num_perms = hdr->num_perms; node->datalen = hdr->datalen; node->childlen = hdr->childlen; node->acc.domid = perms_from_node_hdr(hdr)->id; @@ -744,8 +744,8 @@ struct node *read_node(struct connection *conn, const void *ctx, /* Copy node data to new memory area, starting with permissions. */ size -= sizeof(*hdr); - node->perms.p = talloc_memdup(node, perms_from_node_hdr(hdr), size); - if (node->perms.p == NULL) { + node->perms = talloc_memdup(node, perms_from_node_hdr(hdr), size); + if (node->perms == NULL) { errno = ENOMEM; goto error; } @@ -758,7 +758,7 @@ struct node *read_node(struct connection *conn, const void *ctx, node->acc.memory = 0; /* Data is binary blob (usually ascii, no nul). */ - node->data = node->perms.p + hdr->num_perms; + node->data = node->perms + hdr->num_perms; /* Children is strings, nul separated. */ node->children = node->data + node->datalen; @@ -797,7 +797,7 @@ int write_node_raw(struct connection *conn, const char *db_name, return errno; size = sizeof(*hdr) - + node->perms.num * sizeof(node->perms.p[0]) + + node->num_perms * sizeof(node->perms[0]) + node->datalen + node->childlen; /* Call domain_max_chk() in any case in order to record max values. */ @@ -816,14 +816,14 @@ int write_node_raw(struct connection *conn, const char *db_name, hdr = data; hdr->generation = node->generation; - hdr->num_perms = node->perms.num; + hdr->num_perms = node->num_perms; hdr->datalen = node->datalen; hdr->childlen = node->childlen; /* Open code perms_from_node_hdr() for the non-const case. */ p = hdr + 1; - memcpy(p, node->perms.p, node->perms.num * sizeof(*node->perms.p)); - p += node->perms.num * sizeof(*node->perms.p); + memcpy(p, node->perms, node->num_perms * sizeof(*node->perms)); + p += node->num_perms * sizeof(*node->perms); memcpy(p, node->data, node->datalen); p += node->datalen; memcpy(p, node->children, node->childlen); @@ -923,7 +923,8 @@ static int ask_parents(struct connection *conn, const void *ctx, return 0; } - *perm = perm_for_conn(conn, &node->perms); + *perm = perm_for_conn_from_node(conn, node); + return 0; } @@ -963,11 +964,9 @@ static struct node *get_node(struct connection *conn, node = read_node(conn, ctx, name); /* If we don't have permission, we don't have node. */ - if (node) { - if ((perm_for_conn(conn, &node->perms) & perm) != perm) { - errno = EACCES; - node = NULL; - } + if (node && (perm_for_conn_from_node(conn, node) & perm) != perm) { + errno = EACCES; + node = NULL; } /* Clean up errno if they weren't supposed to know. */ if (!node && !read_node_can_propagate_errno()) @@ -1211,19 +1210,18 @@ const char *onearg(struct buffered_data *in) return in->buffer; } -static char *perms_to_strings(const void *ctx, const struct node_perms *perms, - unsigned int *len) +static char *node_perms_to_strings(const struct node *node, unsigned int *len) { unsigned int i; char *strings = NULL; char buffer[MAX_STRLEN(unsigned int) + 1]; - for (*len = 0, i = 0; i < perms->num; i++) { - if (!xenstore_perm_to_string(&perms->p[i], buffer, + for (*len = 0, i = 0; i < node->num_perms; i++) { + if (!xenstore_perm_to_string(&node->perms[i], buffer, sizeof(buffer))) return NULL; - strings = talloc_realloc(ctx, strings, char, + strings = talloc_realloc(node, strings, char, *len + strlen(buffer) + 1); if (!strings) return NULL; @@ -1438,14 +1436,14 @@ static struct node *construct_node(struct connection *conn, const void *ctx, node->name = talloc_steal(node, names[levels - 1]); /* Inherit permissions, unpriv domains own what they create. */ - node->perms.num = parent->perms.num; - node->perms.p = talloc_memdup(node, parent->perms.p, - node->perms.num * - sizeof(*node->perms.p)); - if (!node->perms.p) + node->num_perms = parent->num_perms; + node->perms = talloc_memdup(node, parent->perms, + node->num_perms * + sizeof(*node->perms)); + if (!node->perms) goto nomem; if (domain_is_unprivileged(conn)) - node->perms.p[0].id = conn->id; + node->perms[0].id = conn->id; /* No children, no data */ node->children = node->data = NULL; @@ -1773,7 +1771,7 @@ static int do_get_perms(const void *ctx, struct connection *conn, if (!node) return errno; - strings = perms_to_strings(node, &node->perms, &len); + strings = node_perms_to_strings(node, &len); if (!strings) return errno; @@ -1822,10 +1820,10 @@ static int do_set_perms(const void *ctx, struct connection *conn, perms.p[0].id != get_node_owner(node)) return EPERM; - old_perms = node->perms; + node_to_node_perms(node, &old_perms); if (domain_nbentry_dec(conn, get_node_owner(node))) return ENOMEM; - node->perms = perms; + node_perms_to_node(&perms, node); if (domain_nbentry_inc(conn, get_node_owner(node))) return ENOMEM; @@ -2344,8 +2342,8 @@ static void manual_node(const char *name, const char *child) barf_perror("Could not allocate initial node %s", name); node->name = name; - node->perms.p = &perms; - node->perms.num = 1; + node->perms = &perms; + node->num_perms = 1; node->children = (char *)child; if (child) node->childlen = strlen(child) + 1; @@ -3216,10 +3214,10 @@ static int dump_state_node(const void *ctx, struct connection *conn, sn.conn_id = 0; sn.ta_id = 0; sn.ta_access = 0; - sn.perm_n = node->perms.num; + sn.perm_n = node->num_perms; sn.path_len = pathlen; sn.data_len = node->datalen; - head.length += node->perms.num * sizeof(*sn.perms); + head.length += node->num_perms * sizeof(*sn.perms); head.length += pathlen; head.length += node->datalen; head.length = ROUNDUP(head.length, 3); @@ -3229,7 +3227,7 @@ static int dump_state_node(const void *ctx, struct connection *conn, if (fwrite(&sn, sizeof(sn), 1, fp) != 1) return dump_state_node_err(data, "Dump node state error"); - ret = dump_state_node_perms(fp, node->perms.p, node->perms.num); + ret = dump_state_node_perms(fp, node->perms, node->num_perms); if (ret) return dump_state_node_err(data, ret); @@ -3426,29 +3424,29 @@ void read_state_node(const void *ctx, const void *state) node->data = name + sn->path_len; node->childlen = 0; node->children = NULL; - node->perms.num = sn->perm_n; - node->perms.p = talloc_array(node, struct xs_permissions, - node->perms.num); - if (!node->perms.p) + node->num_perms = sn->perm_n; + node->perms = talloc_array(node, struct xs_permissions, + node->num_perms); + if (!node->perms) barf("allocation error restoring node"); - for (i = 0; i < node->perms.num; i++) { + for (i = 0; i < node->num_perms; i++) { switch (sn->perms[i].access) { case 'r': - node->perms.p[i].perms = XS_PERM_READ; + node->perms[i].perms = XS_PERM_READ; break; case 'w': - node->perms.p[i].perms = XS_PERM_WRITE; + node->perms[i].perms = XS_PERM_WRITE; break; case 'b': - node->perms.p[i].perms = XS_PERM_READ | XS_PERM_WRITE; + node->perms[i].perms = XS_PERM_READ | XS_PERM_WRITE; break; default: - node->perms.p[i].perms = XS_PERM_NONE; + node->perms[i].perms = XS_PERM_NONE; break; } if (sn->perms[i].flags & XS_STATE_NODE_PERM_IGNORE) - node->perms.p[i].perms |= XS_PERM_IGNORE; - node->perms.p[i].id = sn->perms[i].domid; + node->perms[i].perms |= XS_PERM_IGNORE; + node->perms[i].id = sn->perms[i].domid; } if (!strstarts(name, "@")) { diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index 1a933892e3..4bed462dda 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -209,7 +209,8 @@ struct node { #define NO_GENERATION ~((uint64_t)0) /* Permissions. */ - struct node_perms perms; + unsigned int num_perms; + struct xs_permissions *perms; /* Contents. */ unsigned int datalen; @@ -251,7 +252,33 @@ unsigned int perm_for_conn(struct connection *conn, /* Get owner of a node. */ static inline unsigned int get_node_owner(const struct node *node) { - return node->perms.p[0].id; + return node->perms[0].id; +} + +/* Transfer permissions from node to struct node_perms. */ +static inline void node_to_node_perms(const struct node *node, + struct node_perms *perms) +{ + perms->num = node->num_perms; + perms->p = node->perms; +} + +static inline unsigned int perm_for_conn_from_node(struct connection *conn, + const struct node *node) +{ + struct node_perms perms; + + node_to_node_perms(node, &perms); + + return perm_for_conn(conn, &perms); +} + +/* Transfer permissions from struct node_perms to node. */ +static inline void node_perms_to_node(const struct node_perms *perms, + struct node *node) +{ + node->num_perms = perms->num; + node->perms = perms->p; } /* Write a node to the data base. */ diff --git a/tools/xenstore/xenstored_domain.c b/tools/xenstore/xenstored_domain.c index 10d2280f84..1ba73d9db2 100644 --- a/tools/xenstore/xenstored_domain.c +++ b/tools/xenstore/xenstored_domain.c @@ -513,12 +513,12 @@ static int domain_tree_remove_sub(const void *ctx, struct connection *conn, struct domain *domain = arg; int ret = WALK_TREE_OK; - if (node->perms.p[0].id != domain->domid) + if (node->perms[0].id != domain->domid) return WALK_TREE_OK; if (keep_orphans) { domain_nbentry_dec(NULL, domain->domid); - node->perms.p[0].id = priv_domid; + node->perms[0].id = priv_domid; node->acc.memory = 0; domain_nbentry_inc(NULL, priv_domid); if (write_node_raw(NULL, node->name, node, NODE_MODIFY, true)) { @@ -1335,12 +1335,11 @@ int domain_adjust_node_perms(struct node *node) { unsigned int i; - for (i = 1; i < node->perms.num; i++) { - if (node->perms.p[i].perms & XS_PERM_IGNORE) + for (i = 1; i < node->num_perms; i++) { + if (node->perms[i].perms & XS_PERM_IGNORE) continue; - if (!chk_domain_generation(node->perms.p[i].id, - node->generation)) - node->perms.p[i].perms |= XS_PERM_IGNORE; + if (!chk_domain_generation(node->perms[i].id, node->generation)) + node->perms[i].perms |= XS_PERM_IGNORE; } return 0; diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index 9ca73b9874..213a2c436c 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -259,13 +259,13 @@ int access_node(struct connection *conn, struct node *node, if (!i->trans_name) goto nomem; i->node = strchr(i->trans_name, '/') + 1; - if (node->generation != NO_GENERATION && node->perms.num) { + if (node->generation != NO_GENERATION && node->num_perms) { i->perms.p = talloc_array(i, struct xs_permissions, - node->perms.num); + node->num_perms); if (!i->perms.p) goto nomem; - i->perms.num = node->perms.num; - memcpy(i->perms.p, node->perms.p, + i->perms.num = node->num_perms; + memcpy(i->perms.p, node->perms, i->perms.num * sizeof(*i->perms.p)); } diff --git a/tools/xenstore/xenstored_watch.c b/tools/xenstore/xenstored_watch.c index fefbf56ab2..5767675e04 100644 --- a/tools/xenstore/xenstored_watch.c +++ b/tools/xenstore/xenstored_watch.c @@ -92,7 +92,7 @@ static bool watch_permitted(struct connection *conn, const void *ctx, return false; } - perm = perm_for_conn(conn, &node->perms); + perm = perm_for_conn_from_node(conn, node); if (perm & XS_PERM_READ) return true; @@ -106,7 +106,7 @@ static bool watch_permitted(struct connection *conn, const void *ctx, return false; } - perm = perm_for_conn(conn, &parent->perms); + perm = perm_for_conn_from_node(conn, parent); return perm & XS_PERM_READ; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586953.918294 (Exim 4.92) (envelope-from ) id 1qXE86-0000RH-Jc; Sat, 19 Aug 2023 05:04:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586953.918294; Sat, 19 Aug 2023 05:04:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE86-0000RA-Fo; Sat, 19 Aug 2023 05:04:06 +0000 Received: by outflank-mailman (input) for mailman id 586953; Sat, 19 Aug 2023 05:04:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE85-0000Qe-2R for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: use struct node_hdr in struct node Message-Id: Date: Sat, 19 Aug 2023 05:04:05 +0000 commit 1a4b7008e94ec4b938deda96ee8ee316f1f35554 Author: Juergen Gross AuthorDate: Mon Aug 14 09:46:59 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: use struct node_hdr in struct node Replace some individual fields in struct node with struct node_hdr. This allows to add a helper for calculating the accounted memory size of a node. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 110 ++++++++++++++++----------------- tools/xenstore/xenstored_core.h | 16 +++-- tools/xenstore/xenstored_domain.c | 5 +- tools/xenstore/xenstored_transaction.c | 13 ++-- 4 files changed, 72 insertions(+), 72 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index d7a4f0f1cb..ab4714263d 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -555,6 +555,12 @@ static void initialize_fds(int *p_sock_pollfd_idx, int *ptimeout) } } +static size_t calc_node_acc_size(const struct node_hdr *hdr) +{ + return sizeof(*hdr) + hdr->num_perms * sizeof(struct xs_permissions) + + hdr->datalen + hdr->childlen; +} + const struct node_hdr *db_fetch(const char *db_name, size_t *size) { const struct node_hdr *hdr; @@ -565,8 +571,7 @@ const struct node_hdr *db_fetch(const char *db_name, size_t *size) return NULL; } - *size = sizeof(*hdr) + hdr->num_perms * sizeof(struct xs_permissions) + - hdr->datalen + hdr->childlen; + *size = calc_node_acc_size(hdr); trace_tdb("read %s size %zu\n", db_name, *size + strlen(db_name)); @@ -726,7 +731,7 @@ struct node *read_node(struct connection *conn, const void *ctx, hdr = db_fetch(db_name, &size); if (hdr == NULL) { - node->generation = NO_GENERATION; + node->hdr.generation = NO_GENERATION; err = access_node(conn, node, NODE_ACCESS_READ, NULL); errno = err ? : ENOENT; goto error; @@ -735,10 +740,7 @@ struct node *read_node(struct connection *conn, const void *ctx, node->parent = NULL; /* Datalen, childlen, number of permissions */ - node->generation = hdr->generation; - node->num_perms = hdr->num_perms; - node->datalen = hdr->datalen; - node->childlen = hdr->childlen; + node->hdr = *hdr; node->acc.domid = perms_from_node_hdr(hdr)->id; node->acc.memory = size; @@ -760,7 +762,7 @@ struct node *read_node(struct connection *conn, const void *ctx, /* Data is binary blob (usually ascii, no nul). */ node->data = node->perms + hdr->num_perms; /* Children is strings, nul separated. */ - node->children = node->data + node->datalen; + node->children = node->data + node->hdr.datalen; if (access_node(conn, node, NODE_ACCESS_READ, NULL)) goto error; @@ -796,9 +798,7 @@ int write_node_raw(struct connection *conn, const char *db_name, if (domain_adjust_node_perms(node)) return errno; - size = sizeof(*hdr) - + node->num_perms * sizeof(node->perms[0]) - + node->datalen + node->childlen; + size = calc_node_acc_size(&node->hdr); /* Call domain_max_chk() in any case in order to record max values. */ if (domain_max_chk(conn, ACC_NODESZ, size) && !no_quota_check) { @@ -815,18 +815,15 @@ int write_node_raw(struct connection *conn, const char *db_name, BUILD_BUG_ON(XENSTORE_PAYLOAD_MAX >= (typeof(hdr->datalen))(-1)); hdr = data; - hdr->generation = node->generation; - hdr->num_perms = node->num_perms; - hdr->datalen = node->datalen; - hdr->childlen = node->childlen; + *hdr = node->hdr; /* Open code perms_from_node_hdr() for the non-const case. */ p = hdr + 1; - memcpy(p, node->perms, node->num_perms * sizeof(*node->perms)); - p += node->num_perms * sizeof(*node->perms); - memcpy(p, node->data, node->datalen); - p += node->datalen; - memcpy(p, node->children, node->childlen); + memcpy(p, node->perms, node->hdr.num_perms * sizeof(*node->perms)); + p += node->hdr.num_perms * sizeof(*node->perms); + memcpy(p, node->data, node->hdr.datalen); + p += node->hdr.datalen; + memcpy(p, node->children, node->hdr.childlen); if (db_write(conn, db_name, data, size, &node->acc, mode, no_quota_check)) @@ -1216,7 +1213,7 @@ static char *node_perms_to_strings(const struct node *node, unsigned int *len) char *strings = NULL; char buffer[MAX_STRLEN(unsigned int) + 1]; - for (*len = 0, i = 0; i < node->num_perms; i++) { + for (*len = 0, i = 0; i < node->hdr.num_perms; i++) { if (!xenstore_perm_to_string(&node->perms[i], buffer, sizeof(buffer))) return NULL; @@ -1287,7 +1284,7 @@ static int send_directory(const void *ctx, struct connection *conn, if (!node) return errno; - send_reply(conn, XS_DIRECTORY, node->children, node->childlen); + send_reply(conn, XS_DIRECTORY, node->children, node->hdr.childlen); return 0; } @@ -1312,10 +1309,11 @@ static int send_directory_part(const void *ctx, struct connection *conn, /* Second arg is childlist offset. */ off = atoi(in->buffer + strlen(in->buffer) + 1); - genlen = snprintf(gen, sizeof(gen), "%"PRIu64, node->generation) + 1; + genlen = snprintf(gen, sizeof(gen), "%"PRIu64, node->hdr.generation) + + 1; /* Offset behind list: just return a list with an empty string. */ - if (off >= node->childlen) { + if (off >= node->hdr.childlen) { gen[genlen] = 0; send_reply(conn, XS_DIRECTORY_PART, gen, genlen + 1); return 0; @@ -1328,7 +1326,7 @@ static int send_directory_part(const void *ctx, struct connection *conn, while (len + strlen(child) < maxlen) { len += strlen(child) + 1; child += strlen(child) + 1; - if (off + len == node->childlen) + if (off + len == node->hdr.childlen) break; } @@ -1338,7 +1336,7 @@ static int send_directory_part(const void *ctx, struct connection *conn, memcpy(data, gen, genlen); memcpy(data + genlen, node->children + off, len); - if (off + len == node->childlen) { + if (off + len == node->hdr.childlen) { data[genlen + len] = 0; len++; } @@ -1358,7 +1356,7 @@ static int do_read(const void *ctx, struct connection *conn, if (!node) return errno; - send_reply(conn, XS_READ, node->data, node->datalen); + send_reply(conn, XS_READ, node->data, node->hdr.datalen); return 0; } @@ -1377,13 +1375,13 @@ static int add_child(const void *ctx, struct node *parent, const char *name) base = basename(name); baselen = strlen(base) + 1; - children = talloc_array(ctx, char, parent->childlen + baselen); + children = talloc_array(ctx, char, parent->hdr.childlen + baselen); if (!children) return ENOMEM; - memcpy(children, parent->children, parent->childlen); - memcpy(children + parent->childlen, base, baselen); + memcpy(children, parent->children, parent->hdr.childlen); + memcpy(children + parent->hdr.childlen, base, baselen); parent->children = children; - parent->childlen += baselen; + parent->hdr.childlen += baselen; return 0; } @@ -1436,9 +1434,9 @@ static struct node *construct_node(struct connection *conn, const void *ctx, node->name = talloc_steal(node, names[levels - 1]); /* Inherit permissions, unpriv domains own what they create. */ - node->num_perms = parent->num_perms; + node->hdr.num_perms = parent->hdr.num_perms; node->perms = talloc_memdup(node, parent->perms, - node->num_perms * + node->hdr.num_perms * sizeof(*node->perms)); if (!node->perms) goto nomem; @@ -1447,7 +1445,7 @@ static struct node *construct_node(struct connection *conn, const void *ctx, /* No children, no data */ node->children = node->data = NULL; - node->childlen = node->datalen = 0; + node->hdr.childlen = node->hdr.datalen = 0; node->acc.memory = 0; node->parent = parent; @@ -1499,7 +1497,7 @@ static struct node *create_node(struct connection *conn, const void *ctx, ta_node_created(conn->transaction); node->data = data; - node->datalen = datalen; + node->hdr.datalen = datalen; /* * We write out the nodes bottom up. @@ -1579,7 +1577,7 @@ static int do_write(const void *ctx, struct connection *conn, return errno; } else { node->data = in->buffer + offset; - node->datalen = datalen; + node->hdr.datalen = datalen; if (write_node(conn, node, NODE_MODIFY, false)) return errno; } @@ -1627,8 +1625,8 @@ static int remove_child_entry(struct connection *conn, struct node *node, { size_t childlen = strlen(node->children + offset); - memdel(node->children, offset, childlen + 1, node->childlen); - node->childlen -= childlen + 1; + memdel(node->children, offset, childlen + 1, node->hdr.childlen); + node->hdr.childlen -= childlen + 1; return write_node(conn, node, NODE_MODIFY, true); } @@ -1638,8 +1636,9 @@ static int delete_child(struct connection *conn, { unsigned int i; - for (i = 0; i < node->childlen; i += strlen(node->children+i) + 1) { - if (streq(node->children+i, childname)) { + for (i = 0; i < node->hdr.childlen; + i += strlen(node->children + i) + 1) { + if (streq(node->children + i, childname)) { errno = remove_child_entry(conn, node, i) ? EIO : 0; return errno; } @@ -1906,7 +1905,7 @@ int walk_node_tree(const void *ctx, struct connection *conn, const char *root, /* node == NULL possible only for the initial loop iteration. */ if (node) { /* Go one step up if ret or if last child finished. */ - if (ret || node->childoff >= node->childlen) { + if (ret || node->childoff >= node->hdr.childlen) { parent = node->parent; /* Call function AFTER processing a node. */ ret = walk_call_func(ctx, conn, node, parent, @@ -2343,10 +2342,10 @@ static void manual_node(const char *name, const char *child) node->name = name; node->perms = &perms; - node->num_perms = 1; + node->hdr.num_perms = 1; node->children = (char *)child; if (child) - node->childlen = strlen(child) + 1; + node->hdr.childlen = strlen(child) + 1; if (write_node(NULL, node, NODE_CREATE, false)) barf_perror("Could not create initial node %s", name); @@ -3214,12 +3213,12 @@ static int dump_state_node(const void *ctx, struct connection *conn, sn.conn_id = 0; sn.ta_id = 0; sn.ta_access = 0; - sn.perm_n = node->num_perms; + sn.perm_n = node->hdr.num_perms; sn.path_len = pathlen; - sn.data_len = node->datalen; - head.length += node->num_perms * sizeof(*sn.perms); + sn.data_len = node->hdr.datalen; + head.length += node->hdr.num_perms * sizeof(*sn.perms); head.length += pathlen; - head.length += node->datalen; + head.length += node->hdr.datalen; head.length = ROUNDUP(head.length, 3); if (fwrite(&head, sizeof(head), 1, fp) != 1) @@ -3227,14 +3226,15 @@ static int dump_state_node(const void *ctx, struct connection *conn, if (fwrite(&sn, sizeof(sn), 1, fp) != 1) return dump_state_node_err(data, "Dump node state error"); - ret = dump_state_node_perms(fp, node->perms, node->num_perms); + ret = dump_state_node_perms(fp, node->perms, node->hdr.num_perms); if (ret) return dump_state_node_err(data, ret); if (fwrite(node->name, pathlen, 1, fp) != 1) return dump_state_node_err(data, "Dump node path error"); - if (node->datalen && fwrite(node->data, node->datalen, 1, fp) != 1) + if (node->hdr.datalen && + fwrite(node->data, node->hdr.datalen, 1, fp) != 1) return dump_state_node_err(data, "Dump node data error"); ret = dump_state_align(fp); @@ -3419,17 +3419,17 @@ void read_state_node(const void *ctx, const void *state) node->acc.memory = 0; node->name = name; - node->generation = ++generation; - node->datalen = sn->data_len; + node->hdr.generation = ++generation; + node->hdr.datalen = sn->data_len; node->data = name + sn->path_len; - node->childlen = 0; + node->hdr.childlen = 0; node->children = NULL; - node->num_perms = sn->perm_n; + node->hdr.num_perms = sn->perm_n; node->perms = talloc_array(node, struct xs_permissions, - node->num_perms); + node->hdr.num_perms); if (!node->perms) barf("allocation error restoring node"); - for (i = 0; i < node->num_perms; i++) { + for (i = 0; i < node->hdr.num_perms; i++) { switch (sn->perms[i].access) { case 'r': node->perms[i].perms = XS_PERM_READ; diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index 4bed462dda..cbed412a86 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -181,6 +181,7 @@ extern struct list_head connections; */ struct node_hdr { uint64_t generation; +#define NO_GENERATION ~((uint64_t)0) uint16_t num_perms; uint16_t datalen; uint32_t childlen; @@ -197,6 +198,10 @@ struct node_account_data { }; struct node { + /* Copied to/from data base. */ + struct node_hdr hdr; + + /* Xenstore path. */ const char *name; /* Name used to access data base. */ const char *db_name; @@ -204,20 +209,13 @@ struct node { /* Parent (optional) */ struct node *parent; - /* Generation count. */ - uint64_t generation; -#define NO_GENERATION ~((uint64_t)0) - /* Permissions. */ - unsigned int num_perms; struct xs_permissions *perms; /* Contents. */ - unsigned int datalen; void *data; /* Children, each nul-terminated. */ - unsigned int childlen; unsigned int childoff; /* Used by walk_node_tree() internally. */ char *children; @@ -259,7 +257,7 @@ static inline unsigned int get_node_owner(const struct node *node) static inline void node_to_node_perms(const struct node *node, struct node_perms *perms) { - perms->num = node->num_perms; + perms->num = node->hdr.num_perms; perms->p = node->perms; } @@ -277,7 +275,7 @@ static inline unsigned int perm_for_conn_from_node(struct connection *conn, static inline void node_perms_to_node(const struct node_perms *perms, struct node *node) { - node->num_perms = perms->num; + node->hdr.num_perms = perms->num; node->perms = perms->p; } diff --git a/tools/xenstore/xenstored_domain.c b/tools/xenstore/xenstored_domain.c index 1ba73d9db2..fdf1095acb 100644 --- a/tools/xenstore/xenstored_domain.c +++ b/tools/xenstore/xenstored_domain.c @@ -1335,10 +1335,11 @@ int domain_adjust_node_perms(struct node *node) { unsigned int i; - for (i = 1; i < node->num_perms; i++) { + for (i = 1; i < node->hdr.num_perms; i++) { if (node->perms[i].perms & XS_PERM_IGNORE) continue; - if (!chk_domain_generation(node->perms[i].id, node->generation)) + if (!chk_domain_generation(node->perms[i].id, + node->hdr.generation)) node->perms[i].perms |= XS_PERM_IGNORE; } diff --git a/tools/xenstore/xenstored_transaction.c b/tools/xenstore/xenstored_transaction.c index 213a2c436c..1f892b002d 100644 --- a/tools/xenstore/xenstored_transaction.c +++ b/tools/xenstore/xenstored_transaction.c @@ -232,7 +232,7 @@ int access_node(struct connection *conn, struct node *node, bool introduce = false; if (type != NODE_ACCESS_READ) { - node->generation = ++generation; + node->hdr.generation = ++generation; if (conn && !conn->transaction) wrl_apply_debit_direct(conn); } @@ -259,12 +259,13 @@ int access_node(struct connection *conn, struct node *node, if (!i->trans_name) goto nomem; i->node = strchr(i->trans_name, '/') + 1; - if (node->generation != NO_GENERATION && node->num_perms) { + if (node->hdr.generation != NO_GENERATION && + node->hdr.num_perms) { i->perms.p = talloc_array(i, struct xs_permissions, - node->num_perms); + node->hdr.num_perms); if (!i->perms.p) goto nomem; - i->perms.num = node->num_perms; + i->perms.num = node->hdr.num_perms; memcpy(i->perms.p, node->perms, i->perms.num * sizeof(*i->perms.p)); } @@ -282,9 +283,9 @@ int access_node(struct connection *conn, struct node *node, * from the write types. */ if (type == NODE_ACCESS_READ) { - i->generation = node->generation; + i->generation = node->hdr.generation; i->check_gen = true; - if (node->generation != NO_GENERATION) { + if (node->hdr.generation != NO_GENERATION) { ret = write_node_raw(conn, i->trans_name, node, NODE_CREATE, true); if (ret) -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:16 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586955.918299 (Exim 4.92) (envelope-from ) id 1qXE8G-0000c6-Np; Sat, 19 Aug 2023 05:04:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586955.918299; Sat, 19 Aug 2023 05:04:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8G-0000by-K4; Sat, 19 Aug 2023 05:04:16 +0000 Received: by outflank-mailman (input) for mailman id 586955; Sat, 19 Aug 2023 05:04:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8F-0000aQ-5R for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: alloc new memory in domain_adjust_node_perms() Message-Id: Date: Sat, 19 Aug 2023 05:04:15 +0000 commit 9e70cc33d304baa5b8735d0da3aee06bf5755e2a Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:00 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: alloc new memory in domain_adjust_node_perms() In order to avoid modifying the node data in the data base in case a domain is gone, let domain_adjust_node_perms() allocate new memory for the permissions in case they need to be modified. As this should happen only in very rare cases, it is fine to do this even when having copied the node data already. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 10 +++++----- tools/xenstore/xenstored_domain.c | 24 ++++++++++++++++++++---- tools/xenstore/xenstored_domain.h | 8 +++++++- 3 files changed, 32 insertions(+), 10 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index ab4714263d..c8c8c4b8f4 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -752,6 +752,11 @@ struct node *read_node(struct connection *conn, const void *ctx, goto error; } + /* Data is binary blob (usually ascii, no nul). */ + node->data = node->perms + hdr->num_perms; + /* Children is strings, nul separated. */ + node->children = node->data + node->hdr.datalen; + if (domain_adjust_node_perms(node)) goto error; @@ -759,11 +764,6 @@ struct node *read_node(struct connection *conn, const void *ctx, if (node->acc.domid != get_node_owner(node)) node->acc.memory = 0; - /* Data is binary blob (usually ascii, no nul). */ - node->data = node->perms + hdr->num_perms; - /* Children is strings, nul separated. */ - node->children = node->data + node->hdr.datalen; - if (access_node(conn, node, NODE_ACCESS_READ, NULL)) goto error; diff --git a/tools/xenstore/xenstored_domain.c b/tools/xenstore/xenstored_domain.c index fdf1095acb..c00ea397cf 100644 --- a/tools/xenstore/xenstored_domain.c +++ b/tools/xenstore/xenstored_domain.c @@ -1334,13 +1334,29 @@ int domain_alloc_permrefs(struct node_perms *perms) int domain_adjust_node_perms(struct node *node) { unsigned int i; + struct xs_permissions *perms = node->perms; + bool copied = false; for (i = 1; i < node->hdr.num_perms; i++) { - if (node->perms[i].perms & XS_PERM_IGNORE) + if ((perms[i].perms & XS_PERM_IGNORE) || + chk_domain_generation(perms[i].id, node->hdr.generation)) continue; - if (!chk_domain_generation(node->perms[i].id, - node->hdr.generation)) - node->perms[i].perms |= XS_PERM_IGNORE; + + /* + * Don't do a in-place modification, as the node might + * reference data directly in the data base, which we don't + * want to modify. + */ + if (!copied) { + perms = talloc_memdup(node, node->perms, + node->hdr.num_perms * sizeof(*perms)); + if (!perms) + return ENOMEM; + node->perms = perms; + copied = true; + } + + perms[i].perms |= XS_PERM_IGNORE; } return 0; diff --git a/tools/xenstore/xenstored_domain.h b/tools/xenstore/xenstored_domain.h index 4950b00aee..7625dca8cd 100644 --- a/tools/xenstore/xenstored_domain.h +++ b/tools/xenstore/xenstored_domain.h @@ -90,8 +90,14 @@ void ignore_connection(struct connection *conn, unsigned int err); /* Returns the implicit path of a connection (only domains have this) */ const char *get_implicit_path(const struct connection *conn); -/* Remove node permissions for no longer existing domains. */ +/* + * Remove node permissions for no longer existing domains. + * In case of a change of permissions the related array is reallocated in + * order to avoid a data base change when operating on a node directly + * referencing the data base contents. + */ int domain_adjust_node_perms(struct node *node); + int domain_alloc_permrefs(struct node_perms *perms); /* Quota manipulation */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:26 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586959.918300 (Exim 4.92) (envelope-from ) id 1qXE8Q-0000hd-OD; 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Sat, 19 Aug 2023 05:04:25 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=tB5TJ+Ec73jlBkvOgUVxL23tbb6HBKvHos/vDbqWlDo=; b=aEJooIqOjDAfeY/bCUJACt0xG0 12fBT7kqbz4nlM7SkoAhzzW1s/8A2xHls/krlBCe99S6Xg7dllSoVferzKYXlZbgBAkIzRMwdM4tW DqFDZ4/LXP90xSoUqUv2EZrORAMlZCb2wEO6mlhUrNiZDwZLlV7j75cnfdA8YFleG8tY=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: introduce read_node_const() Message-Id: Date: Sat, 19 Aug 2023 05:04:25 +0000 commit 8a6bc0b8c632b9292b1ead9f248b04d2c12155b3 Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:01 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: introduce read_node_const() Introduce a read_node() variant returning a pointer to const struct node, which doesn't do a copy of the node data after retrieval from the data base. Call this variant where appropriate. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 105 ++++++++++++++++++++++++++++---------- tools/xenstore/xenstored_core.h | 2 + tools/xenstore/xenstored_domain.c | 4 +- tools/xenstore/xenstored_watch.c | 10 ++-- tools/xenstore/xenstored_watch.h | 3 +- 5 files changed, 90 insertions(+), 34 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index c8c8c4b8f4..f8e5e7b697 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -706,11 +706,11 @@ void db_delete(struct connection *conn, const char *name, * If it fails, returns NULL and sets errno. * Temporary memory allocations will be done with ctx. */ -struct node *read_node(struct connection *conn, const void *ctx, - const char *name) +static struct node *read_node_alloc(struct connection *conn, const void *ctx, + const char *name, + const struct node_hdr **hdr) { size_t size; - const struct node_hdr *hdr; struct node *node; const char *db_name; int err; @@ -720,17 +720,16 @@ struct node *read_node(struct connection *conn, const void *ctx, errno = ENOMEM; return NULL; } + node->name = talloc_strdup(node, name); if (!node->name) { - talloc_free(node); errno = ENOMEM; - return NULL; + goto error; } db_name = transaction_prepend(conn, name); - hdr = db_fetch(db_name, &size); - - if (hdr == NULL) { + *hdr = db_fetch(db_name, &size); + if (*hdr == NULL) { node->hdr.generation = NO_GENERATION; err = access_node(conn, node, NODE_ACCESS_READ, NULL); errno = err ? : ENOENT; @@ -740,31 +739,80 @@ struct node *read_node(struct connection *conn, const void *ctx, node->parent = NULL; /* Datalen, childlen, number of permissions */ - node->hdr = *hdr; - node->acc.domid = perms_from_node_hdr(hdr)->id; + node->hdr = **hdr; + node->acc.domid = perms_from_node_hdr(*hdr)->id; node->acc.memory = size; - /* Copy node data to new memory area, starting with permissions. */ - size -= sizeof(*hdr); - node->perms = talloc_memdup(node, perms_from_node_hdr(hdr), size); - if (node->perms == NULL) { - errno = ENOMEM; - goto error; - } + return node; + + error: + talloc_free(node); + return NULL; +} +static bool read_node_helper(struct connection *conn, struct node *node) +{ /* Data is binary blob (usually ascii, no nul). */ - node->data = node->perms + hdr->num_perms; + node->data = node->perms + node->hdr.num_perms; /* Children is strings, nul separated. */ node->children = node->data + node->hdr.datalen; if (domain_adjust_node_perms(node)) - goto error; + return false; /* If owner is gone reset currently accounted memory size. */ if (node->acc.domid != get_node_owner(node)) node->acc.memory = 0; if (access_node(conn, node, NODE_ACCESS_READ, NULL)) + return false; + + return true; +} + +struct node *read_node(struct connection *conn, const void *ctx, + const char *name) +{ + size_t size; + const struct node_hdr *hdr; + struct node *node; + + node = read_node_alloc(conn, ctx, name, &hdr); + if (!node) + return NULL; + + /* Copy node data to new memory area, starting with permissions. */ + size = node->acc.memory - sizeof(*hdr); + node->perms = talloc_memdup(node, perms_from_node_hdr(hdr), size); + if (node->perms == NULL) { + errno = ENOMEM; + goto error; + } + + if (!read_node_helper(conn, node)) + goto error; + + return node; + + error: + talloc_free(node); + return NULL; +} + +const struct node *read_node_const(struct connection *conn, const void *ctx, + const char *name) +{ + const struct node_hdr *hdr; + struct node *node; + + node = read_node_alloc(conn, ctx, name, &hdr); + if (!node) + return NULL; + + /* Unfortunately node->perms isn't const. */ + node->perms = (void *)perms_from_node_hdr(hdr); + + if (!read_node_helper(conn, node)) goto error; return node; @@ -900,13 +948,13 @@ char *get_parent(const void *ctx, const char *node) static int ask_parents(struct connection *conn, const void *ctx, const char *name, unsigned int *perm) { - struct node *node; + const struct node *node; do { name = get_parent(ctx, name); if (!name) return errno; - node = read_node(conn, ctx, name); + node = read_node_const(conn, ctx, name); if (node) break; if (read_node_can_propagate_errno()) @@ -3197,9 +3245,8 @@ static int dump_state_node_err(struct dump_node_data *data, const char *err) } static int dump_state_node(const void *ctx, struct connection *conn, - struct node *node, void *arg) + const struct node *node, struct dump_node_data *data) { - struct dump_node_data *data = arg; FILE *fp = data->fp; unsigned int pathlen; struct xs_state_record_header head; @@ -3244,14 +3291,20 @@ static int dump_state_node(const void *ctx, struct connection *conn, return WALK_TREE_OK; } +static int dump_state_node_enter(const void *ctx, struct connection *conn, + struct node *node, void *arg) +{ + return dump_state_node(ctx, conn, node, arg); +} + static int dump_state_special_node(FILE *fp, const void *ctx, struct dump_node_data *data, const char *name) { - struct node *node; + const struct node *node; int ret; - node = read_node(NULL, ctx, name); + node = read_node_const(NULL, ctx, name); if (!node) return dump_state_node_err(data, "Dump node read node error"); @@ -3267,7 +3320,7 @@ const char *dump_state_nodes(FILE *fp, const void *ctx) .fp = fp, .err = "Dump node walk error" }; - struct walk_funcs walkfuncs = { .enter = dump_state_node }; + struct walk_funcs walkfuncs = { .enter = dump_state_node_enter }; if (walk_node_tree(ctx, NULL, "/", &walkfuncs, &data)) return data.err; diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index cbed412a86..07c59c07b7 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -292,6 +292,8 @@ int write_node_raw(struct connection *conn, const char *db_name, /* Get a node from the data base. */ struct node *read_node(struct connection *conn, const void *ctx, const char *name); +const struct node *read_node_const(struct connection *conn, const void *ctx, + const char *name); /* Remove a node and its children. */ int rm_node(struct connection *conn, const void *ctx, const char *name); diff --git a/tools/xenstore/xenstored_domain.c b/tools/xenstore/xenstored_domain.c index c00ea397cf..1bf138c8b1 100644 --- a/tools/xenstore/xenstored_domain.c +++ b/tools/xenstore/xenstored_domain.c @@ -563,12 +563,12 @@ static void domain_tree_remove(struct domain *domain) static void fire_special_watches(const char *name) { void *ctx = talloc_new(NULL); - struct node *node; + const struct node *node; if (!ctx) return; - node = read_node(NULL, ctx, name); + node = read_node_const(NULL, ctx, name); if (node) fire_watches(NULL, ctx, name, node, true, NULL); diff --git a/tools/xenstore/xenstored_watch.c b/tools/xenstore/xenstored_watch.c index 5767675e04..d6e5a4be1e 100644 --- a/tools/xenstore/xenstored_watch.c +++ b/tools/xenstore/xenstored_watch.c @@ -73,11 +73,11 @@ static const char *get_watch_path(const struct watch *watch, const char *name) * changed permissions we need to take the old permissions into account, too. */ static bool watch_permitted(struct connection *conn, const void *ctx, - const char *name, struct node *node, + const char *name, const struct node *node, struct node_perms *perms) { unsigned int perm; - struct node *parent; + const struct node *parent; char *parent_name; if (perms) { @@ -87,7 +87,7 @@ static bool watch_permitted(struct connection *conn, const void *ctx, } if (!node) { - node = read_node(conn, ctx, name); + node = read_node_const(conn, ctx, name); if (!node) return false; } @@ -101,7 +101,7 @@ static bool watch_permitted(struct connection *conn, const void *ctx, parent_name = get_parent(ctx, node->name); if (!parent_name) return false; - parent = read_node(conn, ctx, parent_name); + parent = read_node_const(conn, ctx, parent_name); if (!parent) return false; } @@ -119,7 +119,7 @@ static bool watch_permitted(struct connection *conn, const void *ctx, * watch event, too. */ void fire_watches(struct connection *conn, const void *ctx, const char *name, - struct node *node, bool exact, struct node_perms *perms) + const struct node *node, bool exact, struct node_perms *perms) { struct connection *i; struct buffered_data *req; diff --git a/tools/xenstore/xenstored_watch.h b/tools/xenstore/xenstored_watch.h index 091890edca..ea247997ad 100644 --- a/tools/xenstore/xenstored_watch.h +++ b/tools/xenstore/xenstored_watch.h @@ -28,7 +28,8 @@ int do_unwatch(const void *ctx, struct connection *conn, /* Fire all watches: !exact means all the children are affected (ie. rm). */ void fire_watches(struct connection *conn, const void *tmp, const char *name, - struct node *node, bool exact, struct node_perms *perms); + const struct node *node, bool exact, + struct node_perms *perms); void conn_delete_all_watches(struct connection *conn); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:36 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586960.918305 (Exim 4.92) (envelope-from ) id 1qXE8a-0000p7-Q7; Sat, 19 Aug 2023 05:04:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586960.918305; Sat, 19 Aug 2023 05:04:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8a-0000oz-NO; Sat, 19 Aug 2023 05:04:36 +0000 Received: by outflank-mailman (input) for mailman id 586960; Sat, 19 Aug 2023 05:04:35 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8Z-0000oj-Bc for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: merge get_spec_node() into get_node_canonicalized() Message-Id: Date: Sat, 19 Aug 2023 05:04:35 +0000 commit 154054ea10310e6185de0dd2f7981dae170dc037 Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:02 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:44:48 2023 +0100 tools/xenstore: merge get_spec_node() into get_node_canonicalized() Add a "allow_special" parameter to get_node_canonicalized() allowing to merge get_spec_node() into get_node_canonicalized(). Add the same parameter to is_valid_nodename(), as this will simplify check_watch_path(). This is done in preparation to introducing a get_node() variant returning a pointer to const struct node. Note that this will change how special node names are going to be validated, as now the normal restrictions for node names will be applied: - they can't end with "/" - they can't contain "//" - they can't contain characters other than the ones allowed for normal nodes - the length of the node name is restricted by the max path length quota For defined special node names this isn't any real restriction, though. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 45 ++++++++++++++++------------------------ tools/xenstore/xenstored_core.h | 3 ++- tools/xenstore/xenstored_watch.c | 19 ++++++----------- 3 files changed, 26 insertions(+), 41 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index f8e5e7b697..0ebe4bb7d2 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1219,13 +1219,14 @@ static bool valid_chars(const char *node) "0123456789-/_@") == strlen(node)); } -bool is_valid_nodename(const struct connection *conn, const char *node) +bool is_valid_nodename(const struct connection *conn, const char *node, + bool allow_special) { int local_off = 0; unsigned int domid; - /* Must start in /. */ - if (!strstarts(node, "/")) + /* Must start in / or - if special nodes are allowed - in @. */ + if (!strstarts(node, "/") && (!allow_special || !strstarts(node, "@"))) return false; /* Cannot end in / (unless it's just "/"). */ @@ -1293,7 +1294,8 @@ static struct node *get_node_canonicalized(struct connection *conn, const void *ctx, const char *name, const char **canonical_name, - unsigned int perm) + unsigned int perm, + bool allow_special) { const char *tmp_name; @@ -1302,33 +1304,20 @@ static struct node *get_node_canonicalized(struct connection *conn, *canonical_name = canonicalize(conn, ctx, name); if (!*canonical_name) return NULL; - if (!is_valid_nodename(conn, *canonical_name)) { + if (!is_valid_nodename(conn, *canonical_name, allow_special)) { errno = EINVAL; return NULL; } return get_node(conn, ctx, *canonical_name, perm); } -static struct node *get_spec_node(struct connection *conn, const void *ctx, - const char *name, const char **canonical_name, - unsigned int perm) -{ - if (name[0] == '@') { - if (canonical_name) - *canonical_name = name; - return get_node(conn, ctx, name, perm); - } - - return get_node_canonicalized(conn, ctx, name, canonical_name, perm); -} - static int send_directory(const void *ctx, struct connection *conn, struct buffered_data *in) { struct node *node; node = get_node_canonicalized(conn, ctx, onearg(in), NULL, - XS_PERM_READ); + XS_PERM_READ, false); if (!node) return errno; @@ -1350,7 +1339,7 @@ static int send_directory_part(const void *ctx, struct connection *conn, /* First arg is node name. */ node = get_node_canonicalized(conn, ctx, in->buffer, NULL, - XS_PERM_READ); + XS_PERM_READ, false); if (!node) return errno; @@ -1400,7 +1389,7 @@ static int do_read(const void *ctx, struct connection *conn, struct node *node; node = get_node_canonicalized(conn, ctx, onearg(in), NULL, - XS_PERM_READ); + XS_PERM_READ, false); if (!node) return errno; @@ -1614,7 +1603,8 @@ static int do_write(const void *ctx, struct connection *conn, offset = strlen(vec[0]) + 1; datalen = in->used - offset; - node = get_node_canonicalized(conn, ctx, vec[0], &name, XS_PERM_WRITE); + node = get_node_canonicalized(conn, ctx, vec[0], &name, XS_PERM_WRITE, + false); if (!node) { /* No permissions, invalid input? */ if (errno != ENOENT) @@ -1643,7 +1633,7 @@ static int do_mkdir(const void *ctx, struct connection *conn, const char *name; node = get_node_canonicalized(conn, ctx, onearg(in), &name, - XS_PERM_WRITE); + XS_PERM_WRITE, false); /* If it already exists, fine. */ if (!node) { @@ -1773,7 +1763,7 @@ static int do_rm(const void *ctx, struct connection *conn, char *parentname; node = get_node_canonicalized(conn, ctx, onearg(in), &name, - XS_PERM_WRITE); + XS_PERM_WRITE, false); if (!node) { /* Didn't exist already? Fine, if parent exists. */ if (errno == ENOENT) { @@ -1814,7 +1804,8 @@ static int do_get_perms(const void *ctx, struct connection *conn, char *strings; unsigned int len; - node = get_spec_node(conn, ctx, onearg(in), NULL, XS_PERM_READ); + node = get_node_canonicalized(conn, ctx, onearg(in), NULL, XS_PERM_READ, + true); if (!node) return errno; @@ -1857,8 +1848,8 @@ static int do_set_perms(const void *ctx, struct connection *conn, return ENOENT; /* We must own node to do this (tools can do this too). */ - node = get_spec_node(conn, ctx, in->buffer, &name, - XS_PERM_WRITE | XS_PERM_OWNER); + node = get_node_canonicalized(conn, ctx, in->buffer, &name, + XS_PERM_WRITE | XS_PERM_OWNER, true); if (!node) return errno; diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index 07c59c07b7..5575cc0689 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -305,7 +305,8 @@ void check_store(void); void corrupt(struct connection *conn, const char *fmt, ...); /* Is this a valid node name? */ -bool is_valid_nodename(const struct connection *conn, const char *node); +bool is_valid_nodename(const struct connection *conn, const char *node, + bool allow_special); /* Get name of parent node. */ char *get_parent(const void *ctx, const char *node); diff --git a/tools/xenstore/xenstored_watch.c b/tools/xenstore/xenstored_watch.c index d6e5a4be1e..e695762c64 100644 --- a/tools/xenstore/xenstored_watch.c +++ b/tools/xenstore/xenstored_watch.c @@ -163,19 +163,12 @@ static int destroy_watch(void *_watch) static int check_watch_path(struct connection *conn, const void *ctx, const char **path, bool *relative) { - /* Check if valid event. */ - if (strstarts(*path, "@")) { - *relative = false; - if (strlen(*path) > XENSTORE_REL_PATH_MAX) - goto inval; - } else { - *relative = !strstarts(*path, "/"); - *path = canonicalize(conn, ctx, *path); - if (!*path) - return errno; - if (!is_valid_nodename(conn, *path)) - goto inval; - } + *relative = !strstarts(*path, "/") && !strstarts(*path, "@"); + *path = canonicalize(conn, ctx, *path); + if (!*path) + return errno; + if (!is_valid_nodename(conn, *path, true)) + goto inval; return 0; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:47 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586962.918308 (Exim 4.92) (envelope-from ) id 1qXE8k-0000sc-Rb; Sat, 19 Aug 2023 05:04:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586962.918308; Sat, 19 Aug 2023 05:04:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8k-0000sT-Ov; Sat, 19 Aug 2023 05:04:46 +0000 Received: by outflank-mailman (input) for mailman id 586962; Sat, 19 Aug 2023 05:04:45 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8j-0000sA-EZ for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:45 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8j-0002Pk-Du for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:45 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE8j-0003fG-DC for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:45 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=1baSGxBsXUu2sOuei6RTMsF8ICZXFndDxwYJ8hB1ZCQ=; b=dnuH6Oen+BusCXYoKxeatMOJ7k MCEuLE28RtbWOwcQOAyi63c/Eey7WUWVoWJr+3+jgiItEGyFjc1Nxf85N5j5SEb24XUHijsXb7Cte HzpvY/gkwlmPTvwE54NhVvvHgPxjR0oDX6HmE/zA96Szo2BulSj1O+ePYCB4A3GP3Ujg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: merge is_valid_nodename() into canonicalize() Message-Id: Date: Sat, 19 Aug 2023 05:04:45 +0000 commit f174147e63593af75ee00f4994acad84ac937540 Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:03 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:49:38 2023 +0100 tools/xenstore: merge is_valid_nodename() into canonicalize() Today is_valid_nodename() is always called directly after calling canonicalize(), with the exception of do_unwatch(), where the call is missing (which is not correct, but results just in a wrong error reason being returned). Merge is_valid_nodename() into canonicalize(). Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 85 +++++++++++++++++++++------------------- tools/xenstore/xenstored_core.h | 6 +-- tools/xenstore/xenstored_watch.c | 16 ++------ 3 files changed, 50 insertions(+), 57 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 0ebe4bb7d2..69e147df2c 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1219,33 +1219,6 @@ static bool valid_chars(const char *node) "0123456789-/_@") == strlen(node)); } -bool is_valid_nodename(const struct connection *conn, const char *node, - bool allow_special) -{ - int local_off = 0; - unsigned int domid; - - /* Must start in / or - if special nodes are allowed - in @. */ - if (!strstarts(node, "/") && (!allow_special || !strstarts(node, "@"))) - return false; - - /* Cannot end in / (unless it's just "/"). */ - if (strends(node, "/") && !streq(node, "/")) - return false; - - /* No double //. */ - if (strstr(node, "//")) - return false; - - if (sscanf(node, "/local/domain/%5u/%n", &domid, &local_off) != 1) - local_off = 0; - - if (domain_max_chk(conn, ACC_PATHLEN, strlen(node) - local_off)) - return false; - - return valid_chars(node); -} - /* We expect one arg in the input: return NULL otherwise. * The payload must contain exactly one nul, at the end. */ @@ -1278,16 +1251,51 @@ static char *node_perms_to_strings(const struct node *node, unsigned int *len) } const char *canonicalize(struct connection *conn, const void *ctx, - const char *node) + const char *node, bool allow_special) { - const char *prefix; + const char *name; + int local_off = 0; + unsigned int domid; - if (!node || (node[0] == '/') || (node[0] == '@')) - return node; - prefix = get_implicit_path(conn); - if (prefix) - return talloc_asprintf(ctx, "%s/%s", prefix, node); - return node; + /* + * Invalid if any of: + * - no node at all + * - illegal character in node + * - starts with '@' but no special node allowed + */ + errno = EINVAL; + if (!node || + !valid_chars(node) || + (node[0] == '@' && !allow_special)) + return NULL; + + if (node[0] != '/' && node[0] != '@') { + name = talloc_asprintf(ctx, "%s/%s", get_implicit_path(conn), + node); + if (!name) + return NULL; + } else + name = node; + + if (sscanf(name, "/local/domain/%5u/%n", &domid, &local_off) != 1) + local_off = 0; + + /* + * Only valid if: + * - doesn't end in / (unless it's just "/") + * - no double // + * - not violating max allowed path length + */ + if (!(strends(name, "/") && !streq(name, "/")) && + !strstr(name, "//") && + !domain_max_chk(conn, ACC_PATHLEN, strlen(name) - local_off)) + return name; + + /* Release the memory if 'name' was allocated by us. */ + if (name != node) + talloc_free(name); + + return NULL; } static struct node *get_node_canonicalized(struct connection *conn, @@ -1301,13 +1309,10 @@ static struct node *get_node_canonicalized(struct connection *conn, if (!canonical_name) canonical_name = &tmp_name; - *canonical_name = canonicalize(conn, ctx, name); + *canonical_name = canonicalize(conn, ctx, name, allow_special); if (!*canonical_name) return NULL; - if (!is_valid_nodename(conn, *canonical_name, allow_special)) { - errno = EINVAL; - return NULL; - } + return get_node(conn, ctx, *canonical_name, perm); } diff --git a/tools/xenstore/xenstored_core.h b/tools/xenstore/xenstored_core.h index 5575cc0689..ad87199042 100644 --- a/tools/xenstore/xenstored_core.h +++ b/tools/xenstore/xenstored_core.h @@ -241,7 +241,7 @@ void send_ack(struct connection *conn, enum xsd_sockmsg_type type); /* Canonicalize this path if possible. */ const char *canonicalize(struct connection *conn, const void *ctx, - const char *node); + const char *node, bool allow_special); /* Get access permissions. */ unsigned int perm_for_conn(struct connection *conn, @@ -304,10 +304,6 @@ struct connection *get_connection_by_id(unsigned int conn_id); void check_store(void); void corrupt(struct connection *conn, const char *fmt, ...); -/* Is this a valid node name? */ -bool is_valid_nodename(const struct connection *conn, const char *node, - bool allow_special); - /* Get name of parent node. */ char *get_parent(const void *ctx, const char *node); diff --git a/tools/xenstore/xenstored_watch.c b/tools/xenstore/xenstored_watch.c index e695762c64..7d4d097cf9 100644 --- a/tools/xenstore/xenstored_watch.c +++ b/tools/xenstore/xenstored_watch.c @@ -164,17 +164,9 @@ static int check_watch_path(struct connection *conn, const void *ctx, const char **path, bool *relative) { *relative = !strstarts(*path, "/") && !strstarts(*path, "@"); - *path = canonicalize(conn, ctx, *path); - if (!*path) - return errno; - if (!is_valid_nodename(conn, *path, true)) - goto inval; - - return 0; + *path = canonicalize(conn, ctx, *path, true); - inval: - errno = EINVAL; - return errno; + return *path ? 0 : errno; } static struct watch *add_watch(struct connection *conn, const char *path, @@ -258,9 +250,9 @@ int do_unwatch(const void *ctx, struct connection *conn, if (get_strings(in, vec, ARRAY_SIZE(vec)) != ARRAY_SIZE(vec)) return EINVAL; - node = canonicalize(conn, ctx, vec[0]); + node = canonicalize(conn, ctx, vec[0], true); if (!node) - return ENOMEM; + return errno; list_for_each_entry(watch, &conn->watches, list) { if (streq(watch->node, node) && streq(watch->token, vec[1])) { list_del(&watch->list); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:04:56 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:04:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586963.918313 (Exim 4.92) (envelope-from ) id 1qXE8t-0000xM-W6; Sat, 19 Aug 2023 05:04:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586963.918313; Sat, 19 Aug 2023 05:04:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8t-0000xE-TN; Sat, 19 Aug 2023 05:04:55 +0000 Received: by outflank-mailman (input) for mailman id 586963; Sat, 19 Aug 2023 05:04:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8t-0000x8-HV for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE8t-0002Pr-Gm for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:55 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE8t-0003fy-G6 for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:04:55 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mgBRQJNPeNzW4rs/NUsCL2cwsDydJryAlP/omw/P+6M=; b=KjEMexgVi84axyBT8J4Win4iRs iBXW699WcH4RMrSCTYd9p7DP96sbLST7lu12cMoi/rV1OjTUfF2snoyFTHE5XvwZ6+41+OLBEtHfM pHC452NXz4Xve/osSzfB8higuEndRsrT1inG2A4AqVWPa6ViShVfHuWApjFQ28AeNm1w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: rework get_node() Message-Id: Date: Sat, 19 Aug 2023 05:04:55 +0000 commit 0becb6ca5ad74ed99dbeed70e3e8d0d7d859164c Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:04 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:49:50 2023 +0100 tools/xenstore: rework get_node() Today get_node_canonicalized() is the only caller of get_node(). In order to prepare introducing a get_node() variant returning a pointer to const struct node, do the following restructuring: - move the call of read_node() from get_node() into get_node_canonicalized() - rename get_node() to get_node_chk_perm() - rename get_node_canonicalized() to get_node() Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 57 ++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 32 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 69e147df2c..9098b7eee2 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1000,23 +1000,22 @@ static int errno_from_parents(struct connection *conn, const void *ctx, * If it fails, returns NULL and sets errno. * Temporary memory allocations are done with ctx. */ -static struct node *get_node(struct connection *conn, - const void *ctx, - const char *name, - unsigned int perm) +static bool get_node_chk_perm(struct connection *conn, const void *ctx, + const struct node *node, const char *name, + unsigned int perm) { - struct node *node; + bool success = node; - node = read_node(conn, ctx, name); /* If we don't have permission, we don't have node. */ if (node && (perm_for_conn_from_node(conn, node) & perm) != perm) { errno = EACCES; - node = NULL; + success = false; } /* Clean up errno if they weren't supposed to know. */ - if (!node && !read_node_can_propagate_errno()) + if (!success && !read_node_can_propagate_errno()) errno = errno_from_parents(conn, ctx, name, errno, perm); - return node; + + return success; } static struct buffered_data *new_buffer(void *ctx) @@ -1298,14 +1297,12 @@ const char *canonicalize(struct connection *conn, const void *ctx, return NULL; } -static struct node *get_node_canonicalized(struct connection *conn, - const void *ctx, - const char *name, - const char **canonical_name, - unsigned int perm, - bool allow_special) +static struct node *get_node(struct connection *conn, const void *ctx, + const char *name, const char **canonical_name, + unsigned int perm, bool allow_special) { const char *tmp_name; + struct node *node; if (!canonical_name) canonical_name = &tmp_name; @@ -1313,7 +1310,10 @@ static struct node *get_node_canonicalized(struct connection *conn, if (!*canonical_name) return NULL; - return get_node(conn, ctx, *canonical_name, perm); + node = read_node(conn, ctx, *canonical_name); + + return get_node_chk_perm(conn, ctx, node, *canonical_name, perm) + ? node : NULL; } static int send_directory(const void *ctx, struct connection *conn, @@ -1321,8 +1321,7 @@ static int send_directory(const void *ctx, struct connection *conn, { struct node *node; - node = get_node_canonicalized(conn, ctx, onearg(in), NULL, - XS_PERM_READ, false); + node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, false); if (!node) return errno; @@ -1343,8 +1342,7 @@ static int send_directory_part(const void *ctx, struct connection *conn, return EINVAL; /* First arg is node name. */ - node = get_node_canonicalized(conn, ctx, in->buffer, NULL, - XS_PERM_READ, false); + node = get_node(conn, ctx, in->buffer, NULL, XS_PERM_READ, false); if (!node) return errno; @@ -1393,8 +1391,7 @@ static int do_read(const void *ctx, struct connection *conn, { struct node *node; - node = get_node_canonicalized(conn, ctx, onearg(in), NULL, - XS_PERM_READ, false); + node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, false); if (!node) return errno; @@ -1608,8 +1605,7 @@ static int do_write(const void *ctx, struct connection *conn, offset = strlen(vec[0]) + 1; datalen = in->used - offset; - node = get_node_canonicalized(conn, ctx, vec[0], &name, XS_PERM_WRITE, - false); + node = get_node(conn, ctx, vec[0], &name, XS_PERM_WRITE, false); if (!node) { /* No permissions, invalid input? */ if (errno != ENOENT) @@ -1637,8 +1633,7 @@ static int do_mkdir(const void *ctx, struct connection *conn, struct node *node; const char *name; - node = get_node_canonicalized(conn, ctx, onearg(in), &name, - XS_PERM_WRITE, false); + node = get_node(conn, ctx, onearg(in), &name, XS_PERM_WRITE, false); /* If it already exists, fine. */ if (!node) { @@ -1767,8 +1762,7 @@ static int do_rm(const void *ctx, struct connection *conn, const char *name; char *parentname; - node = get_node_canonicalized(conn, ctx, onearg(in), &name, - XS_PERM_WRITE, false); + node = get_node(conn, ctx, onearg(in), &name, XS_PERM_WRITE, false); if (!node) { /* Didn't exist already? Fine, if parent exists. */ if (errno == ENOENT) { @@ -1809,8 +1803,7 @@ static int do_get_perms(const void *ctx, struct connection *conn, char *strings; unsigned int len; - node = get_node_canonicalized(conn, ctx, onearg(in), NULL, XS_PERM_READ, - true); + node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, true); if (!node) return errno; @@ -1853,8 +1846,8 @@ static int do_set_perms(const void *ctx, struct connection *conn, return ENOENT; /* We must own node to do this (tools can do this too). */ - node = get_node_canonicalized(conn, ctx, in->buffer, &name, - XS_PERM_WRITE | XS_PERM_OWNER, true); + node = get_node(conn, ctx, in->buffer, &name, + XS_PERM_WRITE | XS_PERM_OWNER, true); if (!node) return errno; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:05:06 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:05:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586964.918317 (Exim 4.92) (envelope-from ) id 1qXE94-00010S-1R; Sat, 19 Aug 2023 05:05:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586964.918317; Sat, 19 Aug 2023 05:05:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE93-00010K-Up; Sat, 19 Aug 2023 05:05:05 +0000 Received: by outflank-mailman (input) for mailman id 586964; Sat, 19 Aug 2023 05:05:05 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE93-000106-Ku for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:05 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE93-0002QT-Jy for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:05 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE93-0003gm-JB for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:05 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=X6MJKUMKa6Oyh19huSU1r8IMHCxbsZQraKXhpdqfMjY=; b=j+bb2l2ZndZUnVoi44CL8ZtfGi B+ky4TeK4xua0kchxpdTXPuzjWbY9pi4UzrZfsz7MCWnm6qz1/AagJpZ8T923tsPSzXhOKBY1T92/ V1x71U88xB7PbsJH+NCKrzG3kqCKGM1Z+IpMVYiZl+m0wnRCuH5DkrekeOOeUPzMdqc8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/xenstore: introduce get_node_const() Message-Id: Date: Sat, 19 Aug 2023 05:05:05 +0000 commit dc45c3e8de1dd23e31e99c3752f293232316da86 Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:05 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:49:50 2023 +0100 tools/xenstore: introduce get_node_const() Add a variant of get_node() returning a const struct node pointer. Note that all callers of this new variant don't supply a pointer where to store the canonical node name, while all callers needing a non-const node do supply this pointer. This results in an asymmetric simplification of the two variants. Signed-off-by: Juergen Gross Reviewed-by: Julien Grall --- tools/xenstore/xenstored_core.c | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/tools/xenstore/xenstored_core.c b/tools/xenstore/xenstored_core.c index 9098b7eee2..7de4df2f28 100644 --- a/tools/xenstore/xenstored_core.c +++ b/tools/xenstore/xenstored_core.c @@ -1301,11 +1301,8 @@ static struct node *get_node(struct connection *conn, const void *ctx, const char *name, const char **canonical_name, unsigned int perm, bool allow_special) { - const char *tmp_name; struct node *node; - if (!canonical_name) - canonical_name = &tmp_name; *canonical_name = canonicalize(conn, ctx, name, allow_special); if (!*canonical_name) return NULL; @@ -1316,12 +1313,28 @@ static struct node *get_node(struct connection *conn, const void *ctx, ? node : NULL; } +static const struct node *get_node_const(struct connection *conn, + const void *ctx, const char *name, + unsigned int perm, bool allow_special) +{ + const char *tmp_name; + const struct node *node; + + tmp_name = canonicalize(conn, ctx, name, allow_special); + if (!tmp_name) + return NULL; + + node = read_node_const(conn, ctx, tmp_name); + + return get_node_chk_perm(conn, ctx, node, tmp_name, perm) ? node : NULL; +} + static int send_directory(const void *ctx, struct connection *conn, struct buffered_data *in) { - struct node *node; + const struct node *node; - node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, false); + node = get_node_const(conn, ctx, onearg(in), XS_PERM_READ, false); if (!node) return errno; @@ -1335,14 +1348,14 @@ static int send_directory_part(const void *ctx, struct connection *conn, { unsigned int off, len, maxlen, genlen; char *child, *data; - struct node *node; + const struct node *node; char gen[24]; if (xenstore_count_strings(in->buffer, in->used) != 2) return EINVAL; /* First arg is node name. */ - node = get_node(conn, ctx, in->buffer, NULL, XS_PERM_READ, false); + node = get_node_const(conn, ctx, in->buffer, XS_PERM_READ, false); if (!node) return errno; @@ -1389,9 +1402,9 @@ static int send_directory_part(const void *ctx, struct connection *conn, static int do_read(const void *ctx, struct connection *conn, struct buffered_data *in) { - struct node *node; + const struct node *node; - node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, false); + node = get_node_const(conn, ctx, onearg(in), XS_PERM_READ, false); if (!node) return errno; @@ -1799,11 +1812,11 @@ static int do_rm(const void *ctx, struct connection *conn, static int do_get_perms(const void *ctx, struct connection *conn, struct buffered_data *in) { - struct node *node; + const struct node *node; char *strings; unsigned int len; - node = get_node(conn, ctx, onearg(in), NULL, XS_PERM_READ, true); + node = get_node_const(conn, ctx, onearg(in), XS_PERM_READ, true); if (!node) return errno; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 05:05:18 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 05:05:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.586965.918322 (Exim 4.92) (envelope-from ) id 1qXE9E-00013v-3J; Sat, 19 Aug 2023 05:05:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 586965.918322; Sat, 19 Aug 2023 05:05:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE9E-00013n-02; Sat, 19 Aug 2023 05:05:16 +0000 Received: by outflank-mailman (input) for mailman id 586965; Sat, 19 Aug 2023 05:05:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE9D-00013f-OQ for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXE9D-0002Qp-Nf for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:15 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXE9D-0003nk-Mh for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 05:05:15 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=SRsMClfvdSWX/+mL/OMKzToc2CcXibV8YupmDb3FTM8=; b=QZoEfocf53qKB+KGeQFRTQ1bnv ARPbZAl+isfSfYrz4yui01/hRD2sMKZXBfKuU+CrwCMQShq0o8J9mqepLBlsGo88NvRqxNLfMej3H RniF2IXQok0wGmWF2fa11duw5b8RCJxTrQ29CEe3cD8+Ow2k4pyujnchU6YkomkmA6qE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] tools/config: add XEN_RUN_STORED to config.h Message-Id: Date: Sat, 19 Aug 2023 05:05:15 +0000 commit 5cd6585177e99947a5f62345edbe657663ad9fcc Author: Juergen Gross AuthorDate: Mon Aug 14 09:47:06 2023 +0200 Commit: Julien Grall CommitDate: Fri Aug 18 13:49:50 2023 +0100 tools/config: add XEN_RUN_STORED to config.h Instead of adding the definition of XEN_RUN_STORED to CFLAGS in multiple Makefiles, let configure add it to tools/config.h instead. Signed-off-by: Juergen Gross Reviewed-by: Anthony PERARD --- config/Paths.mk.in | 1 - configure | 5 +++++ m4/paths.m4 | 1 + tools/config.h.in | 3 +++ tools/configure | 5 +++++ tools/libs/store/Makefile | 1 - tools/xenstore/Makefile.common | 1 - 7 files changed, 14 insertions(+), 3 deletions(-) diff --git a/config/Paths.mk.in b/config/Paths.mk.in index 44bab1d748..38b1bb6b1f 100644 --- a/config/Paths.mk.in +++ b/config/Paths.mk.in @@ -41,7 +41,6 @@ MAN8DIR := $(mandir)/man8 XEN_RUN_DIR := @XEN_RUN_DIR@ XEN_LOG_DIR := @XEN_LOG_DIR@ XEN_LIB_DIR := @XEN_LIB_DIR@ -XEN_RUN_STORED := @XEN_RUN_STORED@ CONFIG_DIR := @CONFIG_DIR@ INITD_DIR := @INITD_DIR@ diff --git a/configure b/configure index 99f8434cbf..dd05f314f6 100755 --- a/configure +++ b/configure @@ -2079,6 +2079,11 @@ _ACEOF XEN_RUN_STORED=$rundir_path/xenstored +cat >>confdefs.h <<_ACEOF +#define XEN_RUN_STORED "$XEN_RUN_STORED" +_ACEOF + + XEN_LIB_DIR=$localstatedir/lib/xen diff --git a/m4/paths.m4 b/m4/paths.m4 index e4104bcce0..3f94c62efb 100644 --- a/m4/paths.m4 +++ b/m4/paths.m4 @@ -138,6 +138,7 @@ AC_DEFINE_UNQUOTED([XEN_LOG_DIR], ["$XEN_LOG_DIR"], [Xen's log dir]) XEN_RUN_STORED=$rundir_path/xenstored AC_SUBST(XEN_RUN_STORED) +AC_DEFINE_UNQUOTED([XEN_RUN_STORED], ["$XEN_RUN_STORED"], [Xenstore's runstate path]) XEN_LIB_DIR=$localstatedir/lib/xen AC_SUBST(XEN_LIB_DIR) diff --git a/tools/config.h.in b/tools/config.h.in index eacf1438d8..3ed31a3edc 100644 --- a/tools/config.h.in +++ b/tools/config.h.in @@ -156,6 +156,9 @@ /* Xen's script dir */ #undef XEN_SCRIPT_DIR +/* Xenstore's runstate path */ +#undef XEN_RUN_STORED + /* Enable large inode numbers on Mac OS X 10.5. */ #ifndef _DARWIN_USE_64_BIT_INODE # define _DARWIN_USE_64_BIT_INODE 1 diff --git a/tools/configure b/tools/configure index ed4eb64568..96218cadc4 100755 --- a/tools/configure +++ b/tools/configure @@ -4067,6 +4067,11 @@ _ACEOF XEN_RUN_STORED=$rundir_path/xenstored +cat >>confdefs.h <<_ACEOF +#define XEN_RUN_STORED "$XEN_RUN_STORED" +_ACEOF + + XEN_LIB_DIR=$localstatedir/lib/xen diff --git a/tools/libs/store/Makefile b/tools/libs/store/Makefile index c1a1508713..0649cf8307 100644 --- a/tools/libs/store/Makefile +++ b/tools/libs/store/Makefile @@ -18,7 +18,6 @@ include ../libs.mk # Include configure output (config.h) CFLAGS += -include $(XEN_ROOT)/tools/config.h CFLAGS += $(CFLAGS_libxentoolcore) -CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\"" xs.opic: CFLAGS += -DUSE_PTHREAD ifeq ($(CONFIG_Linux),y) diff --git a/tools/xenstore/Makefile.common b/tools/xenstore/Makefile.common index 3259ab51e6..41973a8a5e 100644 --- a/tools/xenstore/Makefile.common +++ b/tools/xenstore/Makefile.common @@ -16,7 +16,6 @@ CFLAGS += $(CFLAGS_libxenevtchn) CFLAGS += $(CFLAGS_libxenctrl) CFLAGS += $(CFLAGS_libxenguest) CFLAGS += $(CFLAGS_libxentoolcore) -CFLAGS += -DXEN_RUN_STORED="\"$(XEN_RUN_STORED)\"" ifdef CONFIG_STUBDOM CFLAGS += -DNO_SOCKETS=1 -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587047.918371 (Exim 4.92) (envelope-from ) id 1qXNBL-00049S-HP; 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Sat, 19 Aug 2023 14:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=j5THHOsdiW5u5sc4NswOkmPZywZPa9ucnxviVSXRInk=; b=OxB37JAmBOnt3GPvnkdlLYuwtn SfJNioeHdbNXKH5GktuBtsuu2HD+tA2/vfrDza0cka0dBTP6QK3iXP6l+jqrUdNEC3Yg5HIYNlQnZ GSJn/CvoxGKHASh9YhRM6ZhHLcEw9kupkRuKRfJcscgHrJKKc7DrORQkiSV+gB8cwH1Q=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86emul: rework wrapping of libc functions in test and fuzzing harnesses Message-Id: Date: Sat, 19 Aug 2023 14:44:02 +0000 commit 6fba45ca3be1c5d46cddb1eaf371d9e69550b244 Author: Jan Beulich AuthorDate: Fri Aug 18 15:04:28 2023 +0200 Commit: Jan Beulich CommitDate: Fri Aug 18 15:04:28 2023 +0200 x86emul: rework wrapping of libc functions in test and fuzzing harnesses Our present approach is working fully behind the compiler's back. This was found to not work with LTO. Employ ld's --wrap= option instead. Note that while this makes the build work at least with new enough gcc (it doesn't with gcc7, for example, due to tool chain side issues afaict), according to my testing things still won't work when building the fuzzing harness with afl-cc: While with the gcc7 tool chain I see afl-as getting invoked, this does not happen with gcc13. Yet without using that assembler wrapper the resulting binary will look uninstrumented to afl-fuzz. While checking the resulting binaries I noticed that we've gained uses of snprintf() and strstr(), which only just so happen to not cause any problems. Add a wrappers for them as well. Since we don't have any actual uses of v{,sn}printf(), no definitions of their wrappers appear (just yet). But I think we want __wrap_{,sn}printf() to properly use __real_v{,sn}printf() right away, which means we need delarations of the latter. Reported-by: Andrew Cooper Suggested-by: Andrew Cooper Signed-off-by: Jan Beulich Tested-by: Andrew Cooper Acked-by: Andrew Cooper --- tools/fuzz/x86_instruction_emulator/Makefile | 6 ++- tools/tests/x86_emulator/Makefile | 4 +- tools/tests/x86_emulator/wrappers.c | 55 ++++++++++++++++++++-------- tools/tests/x86_emulator/x86-emulate.h | 14 +++---- 4 files changed, 53 insertions(+), 26 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 0100cfc8ac..1e4c6b37f5 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -35,6 +35,8 @@ OBJS := fuzz-emul.o x86-emulate.o OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o OBJS += x86_emulate/decode.o x86_emulate/fpu.o +WRAPPED = $(shell sed -n 's,^ *WRAP(\([[:alnum:]_]*\));,\1,p' x86-emulate.h) + private.h := x86-emulate.h x86_emulate/x86_emulate.h x86_emulate/private.h x86-emulate.h: x86_emulate/x86_emulate.h @@ -51,10 +53,10 @@ x86-insn-fuzzer.a: $(OBJS) cpuid.o $(AR) rc $@ $^ afl-harness: afl-harness.o $(OBJS) cpuid.o wrappers.o - $(CC) $(CFLAGS) $^ -o $@ + $(CC) $(CFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@ afl-harness-cov: afl-harness-cov.o $(patsubst %.o,%-cov.o,$(OBJS)) cpuid.o wrappers.o - $(CC) $(CFLAGS) $(GCOV_FLAGS) $^ -o $@ + $(CC) $(CFLAGS) $(GCOV_FLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@ # Common targets .PHONY: all diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 4079412d2e..affabc0277 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -259,8 +259,10 @@ OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrap OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o x86_emulate/util.o +WRAPPED := $(shell sed -n 's,^ *WRAP(\([[:alnum:]_]*\));,\1,p' x86-emulate.h) + $(TARGET): $(OBJS) - $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ + $(HOSTCC) $(HOSTCFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) -o $@ $^ .PHONY: clean clean: diff --git a/tools/tests/x86_emulator/wrappers.c b/tools/tests/x86_emulator/wrappers.c index eba7cc93c5..3829a6f416 100644 --- a/tools/tests/x86_emulator/wrappers.c +++ b/tools/tests/x86_emulator/wrappers.c @@ -1,78 +1,103 @@ #include -#define WRAP(x) typeof(x) emul_##x +#define WRAP(x) typeof(x) __wrap_ ## x, __real_ ## x #include "x86-emulate.h" -size_t emul_fwrite(const void *src, size_t sz, size_t n, FILE *f) +size_t __wrap_fwrite(const void *src, size_t sz, size_t n, FILE *f) { emul_save_fpu_state(); - sz = fwrite(src, sz, n, f); + sz = __real_fwrite(src, sz, n, f); emul_restore_fpu_state(); return sz; } -int emul_memcmp(const void *p1, const void *p2, size_t sz) +int __wrap_memcmp(const void *p1, const void *p2, size_t sz) { int rc; emul_save_fpu_state(); - rc = memcmp(p1, p2, sz); + rc = __real_memcmp(p1, p2, sz); emul_restore_fpu_state(); return rc; } -void *emul_memcpy(void *dst, const void *src, size_t sz) +void *__wrap_memcpy(void *dst, const void *src, size_t sz) { emul_save_fpu_state(); - memcpy(dst, src, sz); + __real_memcpy(dst, src, sz); emul_restore_fpu_state(); return dst; } -void *emul_memset(void *dst, int c, size_t sz) +void *__wrap_memset(void *dst, int c, size_t sz) { emul_save_fpu_state(); - memset(dst, c, sz); + __real_memset(dst, c, sz); emul_restore_fpu_state(); return dst; } -int emul_printf(const char *fmt, ...) +int __wrap_printf(const char *fmt, ...) { va_list varg; int rc; emul_save_fpu_state(); va_start(varg, fmt); - rc = vprintf(fmt, varg); + rc = __real_vprintf(fmt, varg); va_end(varg); emul_restore_fpu_state(); return rc; } -int emul_putchar(int c) +int __wrap_putchar(int c) { int rc; emul_save_fpu_state(); - rc = putchar(c); + rc = __real_putchar(c); emul_restore_fpu_state(); return rc; } -int emul_puts(const char *str) +int __wrap_puts(const char *str) { int rc; emul_save_fpu_state(); - rc = puts(str); + rc = __real_puts(str); emul_restore_fpu_state(); return rc; } + +int __wrap_snprintf(char *buf, size_t n, const char *fmt, ...) +{ + va_list varg; + int rc; + + emul_save_fpu_state(); + va_start(varg, fmt); + rc = __real_vsnprintf(buf, n, fmt, varg); + va_end(varg); + emul_restore_fpu_state(); + + return rc; +} + +char *__wrap_strstr(const char *s1, const char *s2) +{ + char *s; + + emul_save_fpu_state(); + s = __real_strstr(s1, s2); + emul_restore_fpu_state(); + + return s; +} diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 350d1a0abf..34f0855114 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -32,9 +32,7 @@ #ifdef EOF # error "Must not include before x86-emulate.h" #endif -#ifdef WRAP -# include -#endif +#include #include @@ -88,11 +86,7 @@ struct x86_fxsr *get_fpu_save_area(void); * around the actual function. */ #ifndef WRAP -# if 0 /* This only works for explicit calls, not for compiler generated ones. */ -# define WRAP(x) typeof(x) x asm("emul_" #x) -# else -# define WRAP(x) asm(".equ " #x ", emul_" #x) -# endif +# define WRAP(x) typeof(x) __wrap_ ## x #endif WRAP(fwrite); @@ -102,6 +96,10 @@ WRAP(memset); WRAP(printf); WRAP(putchar); WRAP(puts); +WRAP(snprintf); +WRAP(strstr); +WRAP(vprintf); +WRAP(vsnprintf); #undef WRAP -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587048.918376 (Exim 4.92) (envelope-from ) id 1qXNBV-0004B1-It; Sat, 19 Aug 2023 14:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587048.918376; Sat, 19 Aug 2023 14:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBV-0004Ar-GK; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=M1u4VqIGk2Wm1cUMJ9et7HBVNky7V3Iza6a154GARSA=; b=hOB020c0fSpFbccJPsYbTEgg4n unhbD/b1CM+Wdwpxx1iUQAI+TNKmvU78FRzkdVwHpW5LI8srtqKm9wa3EAFre00jnbTvZAkmzJQBH PXvWcrhs6Wyd/vhiBQ7yuFeF6mWWBEVhPyGJqPRyD6B0F3uL7e48cgwgb0feQM6mGiz4=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] rombios: Work around GCC issue 99578 Message-Id: Date: Sat, 19 Aug 2023 14:44:12 +0000 commit e35138a2ffbe1fe71edaaaaae71063dc545a8416 Author: Andrew Cooper AuthorDate: Thu Aug 17 21:32:53 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Aug 18 14:25:55 2023 +0100 rombios: Work around GCC issue 99578 GCC 12 objects to pointers derived from a constant: util.c: In function 'find_rsdp': util.c:429:16: error: array subscript 0 is outside array bounds of 'uint16_t[0]' {aka 'short unsigned int[]'} [-Werror=array-bounds] 429 | ebda_seg = *(uint16_t *)ADDR_FROM_SEG_OFF(0x40, 0xe); cc1: all warnings being treated as errors This is a GCC bug, but work around it rather than turning array-bounds checking off generally. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/firmware/rombios/32bit/util.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/firmware/rombios/32bit/util.c b/tools/firmware/rombios/32bit/util.c index 6c1c480514..a47e000a26 100644 --- a/tools/firmware/rombios/32bit/util.c +++ b/tools/firmware/rombios/32bit/util.c @@ -424,10 +424,10 @@ static struct acpi_20_rsdp *__find_rsdp(const void *start, unsigned int len) struct acpi_20_rsdp *find_rsdp(void) { struct acpi_20_rsdp *rsdp; - uint16_t ebda_seg; + uint16_t *volatile /* GCC issue 99578 */ ebda_seg = + ADDR_FROM_SEG_OFF(0x40, 0xe); - ebda_seg = *(uint16_t *)ADDR_FROM_SEG_OFF(0x40, 0xe); - rsdp = __find_rsdp((void *)(ebda_seg << 16), 1024); + rsdp = __find_rsdp((void *)(*ebda_seg << 16), 1024); if (!rsdp) rsdp = __find_rsdp((void *)0xE0000, 0x20000); -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587049.918379 (Exim 4.92) (envelope-from ) id 1qXNBf-0004Do-KC; Sat, 19 Aug 2023 14:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587049.918379; Sat, 19 Aug 2023 14:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBf-0004Dh-Hk; Sat, 19 Aug 2023 14:44:23 +0000 Received: by outflank-mailman (input) for mailman id 587049; Sat, 19 Aug 2023 14:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBe-0004DX-Im for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBe-00087I-Ht for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXNBe-0001s4-Gx for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yHEATcDzyBd5QTNWpoD1J9Hw6rXzcQXGfrGrocR+2x4=; b=cJ84MXTWHfm/aBt4wxWYivx0Ou /YDnBqCs4CfXi51aoJIoLRHhou4cGgNvxoJsqKqM4El5Txp4NUyL6We3ATo14onosqmhgSVNDIPHR 5gFgcV063IgIRU1iIyfL7CPBi8rmmkJ+QFuj38pMujrFop6n5MoXoEc8AeBv9BEqfH/w=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] rombios: Avoid using K&R function syntax Message-Id: Date: Sat, 19 Aug 2023 14:44:22 +0000 commit a562afa5679d4a7ceb9cb9222fec1fea9a61f738 Author: Andrew Cooper AuthorDate: Fri Aug 18 10:47:46 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Aug 18 14:25:55 2023 +0100 rombios: Avoid using K&R function syntax Clang-15 complains: tcgbios.c:598:25: error: a function declaration without a prototype is deprecated in all versions of C [-Werror,-Wstrict-prototypes] void tcpa_calling_int19h() ^ void C2x formally removes K&R syntax. The declarations for these functions in 32bitprotos.h are already ANSI compatible. Update the definitions to match. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/firmware/rombios/32bit/tcgbios/tcgbios.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tools/firmware/rombios/32bit/tcgbios/tcgbios.c b/tools/firmware/rombios/32bit/tcgbios/tcgbios.c index fa22c4460a..ad0eac0d20 100644 --- a/tools/firmware/rombios/32bit/tcgbios/tcgbios.c +++ b/tools/firmware/rombios/32bit/tcgbios/tcgbios.c @@ -595,7 +595,7 @@ static void tcpa_add_measurement(uint32_t pcrIndex, /* * Add measurement to log about call of int 19h */ -void tcpa_calling_int19h() +void tcpa_calling_int19h(void) { tcpa_add_measurement(4, EV_ACTION, 0); } @@ -603,7 +603,7 @@ void tcpa_calling_int19h() /* * Add measurement to log about retuning from int 19h */ -void tcpa_returned_int19h() +void tcpa_returned_int19h(void) { tcpa_add_measurement(4, EV_ACTION, 1); } @@ -611,7 +611,7 @@ void tcpa_returned_int19h() /* * Add event separators for PCRs 0 to 7; specs 8.2.3 */ -void tcpa_add_event_separators() +void tcpa_add_event_separators(void) { uint32_t pcrIndex = 0; while (pcrIndex <= 7) { @@ -624,7 +624,7 @@ void tcpa_add_event_separators() /* * Add a wake event to the log */ -void tcpa_wake_event() +void tcpa_wake_event(void) { tcpa_add_measurement_to_log(6, EV_ACTION, @@ -659,7 +659,7 @@ void tcpa_add_bootdevice(uint32_t bootcd, uint32_t bootdrv) * Add measurement to the log about option rom scan * 10.4.3 : action 14 */ -void tcpa_start_option_rom_scan() +void tcpa_start_option_rom_scan(void) { tcpa_add_measurement(2, EV_ACTION, 14); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587050.918384 (Exim 4.92) (envelope-from ) id 1qXNBp-0004GP-Lz; Sat, 19 Aug 2023 14:44:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587050.918384; Sat, 19 Aug 2023 14:44:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBp-0004GI-JB; Sat, 19 Aug 2023 14:44:33 +0000 Received: by outflank-mailman (input) for mailman id 587050; Sat, 19 Aug 2023 14:44:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBo-0004G2-Lc for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBo-00087P-Kk for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXNBo-0001sa-Jt for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=36Z2tTkhdXBtZ39HadJMnDuy7TMky7hVwoKtDoDP5Wk=; b=GhR2c0/R0AsCtY4T+T86oFzbWJ MtxeWEZjlZnz7YrxP63F/RFSmW2Ai/S0wlexeI7tXHVK/mscI1EyWYs6D2sETMAfY+Z0R0P1SFYVI PCKRRGP9ZUUgEbKcafRxPOBXTfqMKPjvLEr9MNYKb+cgxfLuYrJpI8lOd2KDmiDpbwVo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] rombios: Remove the use of egrep Message-Id: Date: Sat, 19 Aug 2023 14:44:32 +0000 commit 5ddac3c2852ecc120acab86fc403153a2097c5dc Author: Andrew Cooper AuthorDate: Fri Aug 18 11:05:00 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Aug 18 14:25:55 2023 +0100 rombios: Remove the use of egrep As the Alpine 3.18 container notes: egrep: warning: egrep is obsolescent; using grep -E Adjust it. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- tools/firmware/rombios/32bit/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/firmware/rombios/32bit/Makefile b/tools/firmware/rombios/32bit/Makefile index c058c71551..50d45647c2 100644 --- a/tools/firmware/rombios/32bit/Makefile +++ b/tools/firmware/rombios/32bit/Makefile @@ -26,7 +26,7 @@ $(TARGET): 32bitbios_all.o 32bitbios_all.o: 32bitbios.o tcgbios/tcgbiosext.o util.o pmm.o $(LD) $(LDFLAGS_DIRECT) -s -r $^ -o 32bitbios_all.o @nm 32bitbios_all.o | \ - egrep '^ +U ' >/dev/null && { \ + grep -E '^ +U ' >/dev/null && { \ echo "There are undefined symbols in the BIOS:"; \ nm -u 32bitbios_all.o; \ exit 11; \ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:43 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587051.918388 (Exim 4.92) (envelope-from ) id 1qXNBz-0004Is-NR; Sat, 19 Aug 2023 14:44:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587051.918388; Sat, 19 Aug 2023 14:44:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBz-0004Il-Kl; Sat, 19 Aug 2023 14:44:43 +0000 Received: by outflank-mailman (input) for mailman id 587051; Sat, 19 Aug 2023 14:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBy-0004Ic-Om for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNBy-00087a-Ny for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qXNBy-0001sz-Mu for xen-changelog@lists.xenproject.org; Sat, 19 Aug 2023 14:44:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QnUCjirz/9tTT5MjsrDvqB0Wp90OVyxYZsvc5T1JFPM=; b=1nLr7VJQrmHzuPHcUYWA9FRHFZ NUsYuT5qjKZDyqruw6XEFCll0oefl69tQNnMtmTazhOAtnsqUff+s8cBL4NCc9pgkOIctjWuUvU84 /75zZNdILdDbiOxq4UJh+7MQCX0wk54scKHpIYXdwcyddvapHmzkOig01XRgHFZN8OWg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] docs/coverage: Drop warning about 2M limit for ARM Message-Id: Date: Sat, 19 Aug 2023 14:44:42 +0000 commit cd36188b2762a05c322a5f56bcfce59c2d9cac2e Author: Andrew Cooper AuthorDate: Tue Aug 15 17:10:56 2023 +0100 Commit: Andrew Cooper CommitDate: Fri Aug 18 14:25:55 2023 +0100 docs/coverage: Drop warning about 2M limit for ARM This issue has been addressed in c/s abb1522832bb ("xen/arm: Allow the user to build Xen with UBSAN") Signed-off-by: Andrew Cooper Reviewed-by: Henry Wang Acked-by: Julien Grall --- docs/hypervisor-guide/code-coverage.rst | 5 ----- 1 file changed, 5 deletions(-) diff --git a/docs/hypervisor-guide/code-coverage.rst b/docs/hypervisor-guide/code-coverage.rst index 49c4a8ad3b..a0b787b379 100644 --- a/docs/hypervisor-guide/code-coverage.rst +++ b/docs/hypervisor-guide/code-coverage.rst @@ -8,11 +8,6 @@ the coverage of its own basic blocks. Being a piece of system software rather than a userspace, it can't automatically write coverage out to the filesystem, so some extra steps are required to collect and process the data. -.. warning:: - - ARM doesn't currently boot when the final binary exceeds 2MB in size, - and the coverage build tends to exceed this limit. - Compiling Xen ------------- -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sat Aug 19 14:44:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 19 Aug 2023 14:44:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587052.918391 (Exim 4.92) (envelope-from ) id 1qXNCA-0004N1-Ou; Sat, 19 Aug 2023 14:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587052.918391; Sat, 19 Aug 2023 14:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXNCA-0004Mt-MK; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vYzGrL7rJQMYpVdoxEWbGW7HGZMSNkKuk0EnioYy9zg=; b=oRfZdISjLAdRrgY8+HdnKCngu0 /CWE8yvCLr6GISaX+lZXJ75PYueNJ9OtYo27IXUwutfkb0wcSqrJNZfQRWqK6MkdlXS2+Zv+XIra6 YkFV9zD1bvgLoKzP49qPh+WxoHA41DQcseVMPdqIw+ST0ZSdfFjLV9l0BA5MQ6bdxnRg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/svm: Fix valid condition in svm_get_pending_event() Message-Id: Date: Sat, 19 Aug 2023 14:44:52 +0000 commit b2865c2b6f164d2c379177cdd1cb200e4eaba549 Author: Jinoh Kang AuthorDate: Sat Aug 19 01:03:35 2023 +0900 Commit: Andrew Cooper CommitDate: Fri Aug 18 20:21:44 2023 +0100 x86/svm: Fix valid condition in svm_get_pending_event() Fixes: 9864841914c2 ("x86/vm_event: add support for VM_EVENT_REASON_INTERRUPT") Signed-off-by: Jinoh Kang --- xen/arch/x86/hvm/svm/svm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 01dd592d9b..beb076ea8d 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2415,7 +2415,7 @@ static bool cf_check svm_get_pending_event( { const struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - if ( vmcb->event_inj.v ) + if ( !vmcb->event_inj.v ) return false; info->vector = vmcb->event_inj.vector; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 20 20:33:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 20 Aug 2023 20:33:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587167.918482 (Exim 4.92) (envelope-from ) id 1qXp6d-0002sX-1a; Sun, 20 Aug 2023 20:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587167.918482; Sun, 20 Aug 2023 20:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXp6c-0002sP-VC; Sun, 20 Aug 2023 20:33:02 +0000 Received: by outflank-mailman (input) for mailman id 587167; Sun, 20 Aug 2023 20:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qXp6c-0002sJ-CP for xen-changelog@lists.xenproject.org; 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From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] automation/eclair: update configuration Message-Id: Date: Sun, 20 Aug 2023 20:33:02 +0000 commit 6775d81325f7e3ac91c565582d9d7940dc2d1cfb Author: Federico Serafini AuthorDate: Thu Aug 17 11:42:55 2023 +0200 Commit: Stefano Stabellini CommitDate: Fri Aug 18 18:38:22 2023 -0700 automation/eclair: update configuration Mark more files as "adopted" and configure Rule 8.3 in order to: - exclude violations involving the type ret_t; - exclude violations involving both an internal and an external file, thus avoiding touching adopted code. Signed-off-by: Federico Serafini Acked-by: Stefano Stabellini --- automation/eclair_analysis/ECLAIR/deviations.ecl | 29 ++++++++++++++++++++++ automation/eclair_analysis/ECLAIR/out_of_scope.ecl | 3 +++ 2 files changed, 32 insertions(+) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl index 696618b59e..d8170106b4 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -175,6 +175,35 @@ const-qualified." -config=MC3R1.R8.2,reports+={deliberate,"any_area(any_loc(file(adopted_r8_2)))"} -doc_end +-doc_begin="The type ret_t is deliberately used and defined as int or long depending on the architecture." +-config=MC3R1.R8.3,reports+={deliberate,"any_area(any_loc(text(^.*ret_t.*$)))"} +-doc_end + +-doc_begin="The following files are imported from Linux and decompress.h defines a unique and documented interface towards all the (adopted) decompress functions." +-file_tag+={adopted_decompress_r8_3,"^xen/common/bunzip2\\.c$"} +-file_tag+={adopted_decompress_r8_3,"^xen/common/unlz4\\.c$"} +-file_tag+={adopted_decompress_r8_3,"^xen/common/unlzma\\.c$"} +-file_tag+={adopted_decompress_r8_3,"^xen/common/unlzo\\.c$"} +-file_tag+={adopted_decompress_r8_3,"^xen/common/unxz\\.c$"} +-file_tag+={adopted_decompress_r8_3,"^xen/common/unzstd\\.c$"} +-config=MC3R1.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_decompress_r8_3)))&&any_area(any_loc(file(^xen/include/xen/decompress\\.h$)))"} +-doc_end + +-doc_begin="The following file is imported from Linux: ignore for now." +-file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} +-config=MC3R1.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_time_r8_3)))&&(any_area(any_loc(file(^xen/include/xen/time\\.h$)))||any_area(any_loc(file(^xen/arch/x86/include/asm/setup\\.h$))))"} +-doc_end + +-doc_begin="The following file is imported from Linux: ignore for now." +-file_tag+={adopted_cpu_idle_r8_3,"^xen/arch/x86/acpi/cpu_idle\\.c$"} +-config=MC3R1.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_cpu_idle_r8_3)))&&any_area(any_loc(file(^xen/include/xen/pmstat\\.h$)))"} +-doc_end + +-doc_begin="The following file is imported from Linux: ignore for now." +-file_tag+={adopted_mpparse_r8_3,"^xen/arch/x86/mpparse\\.c$"} +-config=MC3R1.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_mpparse_r8_3)))&&any_area(any_loc(file(^xen/arch/x86/include/asm/mpspec\\.h$)))"} +-doc_end + -doc_begin="The following variables are compiled in multiple translation units belonging to different executables and therefore are safe." -config=MC3R1.R8.6,declarations+={safe, "name(current_stack_pointer||bsearch||sort)"} diff --git a/automation/eclair_analysis/ECLAIR/out_of_scope.ecl b/automation/eclair_analysis/ECLAIR/out_of_scope.ecl index 44db6997b5..e1ec4a607c 100644 --- a/automation/eclair_analysis/ECLAIR/out_of_scope.ecl +++ b/automation/eclair_analysis/ECLAIR/out_of_scope.ecl @@ -22,6 +22,9 @@ -file_tag+={adopted,"^xen/drivers/acpi/numa\\.c$"} -file_tag+={adopted,"^xen/drivers/acpi/osl\\.c$"} -file_tag+={adopted,"^xen/drivers/acpi/tables\\.c$"} +-file_tag+={adopted,"^xen/include/xen/acpi\\.h$"} +-file_tag+={adopted,"^xen/include/acpi/acpiosxf\\.h$"} +-file_tag+={adopted,"^xen/include/acpi/acpixf\\.h$"} -file_tag+={adopted,"^xen/lib/list-sort\\.c$"} -file_tag+={adopted,"^xen/lib/rbtree\\.c$"} -file_tag+={adopted,"^xen/lib/xxhash.*\\.c$"} -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Sun Aug 20 20:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 20 Aug 2023 20:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587168.918486 (Exim 4.92) (envelope-from ) id 1qXp6n-0002u2-2o; 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Sun, 20 Aug 2023 20:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FchMeN/xj94aT29gYTJtky77omaeFqF1vroqU4Ll+lw=; b=IjThqYXCVD1yvdmJfLmY0KnmIO 2eRfVmmCbXq3fhu5Cb0V9uhpUMXmJfJLTx1RnSRgnaptkG1XgHxYt0p/J0LM3gi/socsrhX3rAHR0 vWMpMRY43yFW7YOc/qfQFRj5BRdIygeZ8zddod/TXjEuvB9VvuB0M9HUavC9btav3t2c=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] misra: add more entires to exclude-list.json Message-Id: Date: Sun, 20 Aug 2023 20:33:12 +0000 commit bf0bd6cf590a0a1b29845289159f0a17d5e4064f Author: Federico Serafini AuthorDate: Thu Aug 17 11:55:42 2023 +0200 Commit: Stefano Stabellini CommitDate: Fri Aug 18 18:38:54 2023 -0700 misra: add more entires to exclude-list.json Add entries to the exclude-list.json for those files that need to be excluded from the analysis scan. Signed-off-by: Federico Serafini Acked-by: Stefano Stabellini --- docs/misra/exclude-list.json | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/docs/misra/exclude-list.json b/docs/misra/exclude-list.json index ca1e2dd678..575ed22a7f 100644 --- a/docs/misra/exclude-list.json +++ b/docs/misra/exclude-list.json @@ -181,6 +181,18 @@ "rel_path": "drivers/video/font_*", "comment": "Imported from Linux, ignore for now" }, + { + "rel_path": "include/acpi/acpiosxf.h", + "comment": "Imported from Linux, ignore for now" + }, + { + "rel_path": "include/acpi/acpixf.h", + "comment": "Imported from Linux, ignore for now" + }, + { + "rel_path": "include/xen/acpi.h", + "comment": "Imported from Linux, ignore for now" + }, { "rel_path": "lib/list-sort.c", "comment": "Imported from Linux, ignore for now" -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 01:22:07 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 01:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587983.919385 (Exim 4.92) (envelope-from ) id 1qYG5r-0008Do-Bl; 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Tue, 22 Aug 2023 01:22:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=E/zcAT2hXfELgXL+2ofiWmPNFjCaDIWCh+cfPD3a7lk=; b=4TdEDXIT7jS5LxCJZjWroUmXkW ODEDWvU3k4N6cQbLzPEOBXnBVKaGDbQHUwOeZwmeFTSrQ35JKezoqkaP3zqDDfqWHZHeFz9RLuaWz lUwEsUYxKT3fZRWoWnrdRzknQuJBkaBy1JLWdfRmXPHGS5aU4rCGM6x+/tbUqs58UGBU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] update Xen version to 4.17.3-pre Message-Id: Date: Tue, 22 Aug 2023 01:22:01 +0000 commit 2f337a04bfc2dda794ae0fc108577ec72932f83b Author: Jan Beulich AuthorDate: Mon Aug 21 15:52:13 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 21 15:52:13 2023 +0200 update Xen version to 4.17.3-pre --- xen/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/Makefile b/xen/Makefile index fbada570b8..f6005bd536 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -6,7 +6,7 @@ this-makefile := $(call lastword,$(MAKEFILE_LIST)) # All other places this is stored (eg. compile.h) should be autogenerated. export XEN_VERSION = 4 export XEN_SUBVERSION = 17 -export XEN_EXTRAVERSION ?= .2$(XEN_VENDORVERSION) +export XEN_EXTRAVERSION ?= .3-pre$(XEN_VENDORVERSION) export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 01:22:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 01:22:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587984.919389 (Exim 4.92) (envelope-from ) id 1qYG61-0008Fy-DS; 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Tue, 22 Aug 2023 01:22:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=QgZbtabSMEds4PEYTrA95XCVu9Rq+EEAwM8IddL6X00=; b=s2Hll/PHNKzBTX4nGEnPnAp8Pv l8vJ/KyX2HGCZ5g1DOWtAAN8yGczgnNmDQOCBfhCR5WtV16o5xJ11fwGXhohlsmUDkbkIXiHdwe4i nzo+Y1gvgTkvicClHu9kff5FTOeFUrlh51SLly1NiJL9FXRxblOa76L+H+mIUwPgXD10=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86: fix build with old gcc after CPU policy changes Message-Id: Date: Tue, 22 Aug 2023 01:22:11 +0000 commit 7d8897984927a51495e9a1b827aa4bce1d779b87 Author: Jan Beulich AuthorDate: Mon Aug 21 15:53:17 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 21 15:53:17 2023 +0200 x86: fix build with old gcc after CPU policy changes Old gcc won't cope with initializers involving unnamed struct/union fields. Fixes: 441b1b2a50ea ("x86/emul: Switch x86_emulate_ctxt to cpu_policy") Signed-off-by: Jan Beulich Acked-by: Andrew Cooper master commit: 768846690d64bc730c1a1123e8de3af731bb2eb3 master date: 2023-04-19 11:02:47 +0200 --- tools/fuzz/x86_instruction_emulator/fuzz-emul.c | 4 +++- xen/arch/x86/pv/emul-priv-op.c | 4 +++- xen/arch/x86/pv/ro-page-fault.c | 4 +++- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c index 4885a68210..eeeb6931f4 100644 --- a/tools/fuzz/x86_instruction_emulator/fuzz-emul.c +++ b/tools/fuzz/x86_instruction_emulator/fuzz-emul.c @@ -893,12 +893,14 @@ int LLVMFuzzerTestOneInput(const uint8_t *data_p, size_t size) struct x86_emulate_ctxt ctxt = { .data = &state, .regs = &input.regs, - .cpu_policy = &cp, .addr_size = 8 * sizeof(void *), .sp_size = 8 * sizeof(void *), }; int rc; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.cpu_policy = &cp; + /* Reset all global state variables */ memset(&input, 0, sizeof(input)); diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 04416f1979..2c94beb10e 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1327,12 +1327,14 @@ int pv_emulate_privileged_op(struct cpu_user_regs *regs) struct domain *currd = curr->domain; struct priv_op_ctxt ctxt = { .ctxt.regs = regs, - .ctxt.cpu_policy = currd->arch.cpu_policy, .ctxt.lma = !is_pv_32bit_domain(currd), }; int rc; unsigned int eflags, ar; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.ctxt.cpu_policy = currd->arch.cpu_policy; + if ( !pv_emul_read_descriptor(regs->cs, curr, &ctxt.cs.base, &ctxt.cs.limit, &ar, 1) || !(ar & _SEGMENT_S) || diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c index 0d02c7d2ab..f23ad5d184 100644 --- a/xen/arch/x86/pv/ro-page-fault.c +++ b/xen/arch/x86/pv/ro-page-fault.c @@ -356,7 +356,6 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) unsigned int addr_size = is_pv_32bit_domain(currd) ? 32 : BITS_PER_LONG; struct x86_emulate_ctxt ctxt = { .regs = regs, - .cpu_policy = currd->arch.cpu_policy, .addr_size = addr_size, .sp_size = addr_size, .lma = addr_size > 32, @@ -364,6 +363,9 @@ int pv_ro_page_fault(unsigned long addr, struct cpu_user_regs *regs) int rc; bool mmio_ro; + /* Not part of the initializer, for old gcc to cope. */ + ctxt.cpu_policy = currd->arch.cpu_policy; + /* Attempt to read the PTE that maps the VA being accessed. */ pte = guest_get_eff_kern_l1e(addr); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 01:22:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 01:22:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.587985.919393 (Exim 4.92) (envelope-from ) id 1qYG6B-0008Im-Eb; Tue, 22 Aug 2023 01:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 587985.919393; Tue, 22 Aug 2023 01:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYG6B-0008Ie-Bs; Tue, 22 Aug 2023 01:22:23 +0000 Received: by outflank-mailman (input) for mailman id 587985; Tue, 22 Aug 2023 01:22:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYG6A-0008IN-1M for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 01:22:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYG69-00020w-Pr for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 01:22:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYG69-0008JJ-Os for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 01:22:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=erMRLopfcNTKUGJ/URPDH39L7bQDLLSrx2lTuQQn7lU=; b=cpdcjRW+qVvX4ORN7gjJt6Lvu2 tDnmZ5e3kggrMpDaR2KfR1i+QVyETXAWBI6FLPMviOxEg/yhwj1OrvNyDGGJa0aU90fesATsK49h+ MrKUM3m3KFt8qv4IIAWT7bAArdgg/chkt34cgq9ZlXkOJMkEmZ0Qz/lVPLRSyGnUctIo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] libxl: Use XEN_LIB_DIR to store bootloader from pygrub Message-Id: Date: Tue, 22 Aug 2023 01:22:21 +0000 commit 8d84be5b557b27e9cc53e48285aebad28a48468c Author: Anthony PERARD AuthorDate: Mon Aug 21 15:53:47 2023 +0200 Commit: Jan Beulich CommitDate: Mon Aug 21 15:53:47 2023 +0200 libxl: Use XEN_LIB_DIR to store bootloader from pygrub In osstest, the jobs using pygrub on arm64 on the branch linux-linus started to fails with: [Errno 28] No space left on device Error writing temporary copy of ramdisk This is because /var/run is small when dom0 has only 512MB to work with, /var/run is only 40MB. The size of both kernel and ramdisk on this jobs is now about 42MB, so not enough space in /var/run. So, to avoid writing a big binary in ramfs, we will use /var/lib instead, like we already do when saving the device model state on migration. Reported-by: Jan Beulich Signed-off-by: Anthony PERARD Reviewed-by: Jason Andryuk master commit: ad89640ad766d3cb6c92fc8b6406ca6bbab44136 master date: 2023-08-08 09:45:20 +0200 --- tools/libs/light/libxl_bootloader.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_bootloader.c b/tools/libs/light/libxl_bootloader.c index 1bc6e51827..108329b4a5 100644 --- a/tools/libs/light/libxl_bootloader.c +++ b/tools/libs/light/libxl_bootloader.c @@ -245,8 +245,8 @@ static void bootloader_cleanup(libxl__egc *egc, libxl__bootloader_state *bl) static void bootloader_setpaths(libxl__gc *gc, libxl__bootloader_state *bl) { uint32_t domid = bl->domid; - bl->outputdir = GCSPRINTF(XEN_RUN_DIR "/bootloader.%"PRIu32".d", domid); - bl->outputpath = GCSPRINTF(XEN_RUN_DIR "/bootloader.%"PRIu32".out", domid); + bl->outputdir = GCSPRINTF(XEN_LIB_DIR "/bootloader.%"PRIu32".d", domid); + bl->outputpath = GCSPRINTF(XEN_LIB_DIR "/bootloader.%"PRIu32".out", domid); } /* Callbacks */ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 08:44:09 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 08:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.588258.919758 (Exim 4.92) (envelope-from ) id 1qYMzb-0002Bv-Kx; Tue, 22 Aug 2023 08:44:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 588258.919758; Tue, 22 Aug 2023 08:44:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzb-0002Bl-HP; Tue, 22 Aug 2023 08:44:03 +0000 Received: by outflank-mailman (input) for mailman id 588258; Tue, 22 Aug 2023 08:44:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMza-0002Bd-Dx for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMza-0005eh-BO for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYMza-00038P-6q for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=P4chybinzsTa7Ckd4rZeEpVBeQayn/Hq+QHp3WGSbsI=; b=5/I23kWmv0h0pdr02Fk6IXL78X JtmaKJqcS3zWPKbv/sDFPS15dF0uFsX5SyviDx4R+afyAwWR5sr2LNfQ+Uqy5B6Cig3LLJDEP1gHu J2YjRqqe69Z8aRLGbsIFE1U0XdcbYZ5Dls9q59fq+OI5Cr3PURJ3OBn4q9bR5tbeNy8Y=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: vmmio: The number of entries cannot be negative Message-Id: Date: Tue, 22 Aug 2023 08:44:02 +0000 commit 7c15584bdbd88b82ec8e09081e68d29590ce19f1 Author: Julien Grall AuthorDate: Mon Aug 21 17:57:07 2023 +0100 Commit: Julien Grall CommitDate: Mon Aug 21 18:03:27 2023 +0100 xen/arm: vmmio: The number of entries cannot be negative The number of virtual MMIO regions cannot be negative. So switch the field 'num_entries' and 'max_num_entries' to 'unsigned int'. The new type is then propagated to the caller and the vGIC code. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini Reviewed-by: Henry Wang Tested-by: Henry Wang --- xen/arch/arm/domain.c | 3 ++- xen/arch/arm/include/asm/mmio.h | 6 +++--- xen/arch/arm/include/asm/vgic.h | 6 +++--- xen/arch/arm/io.c | 2 +- xen/arch/arm/vgic-v2.c | 2 +- xen/arch/arm/vgic-v3.c | 2 +- xen/arch/arm/vgic.c | 2 +- xen/arch/arm/vgic/vgic-init.c | 2 +- 8 files changed, 13 insertions(+), 12 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 6113ca785c..28e3aaa5e4 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -694,7 +694,8 @@ int arch_domain_create(struct domain *d, struct xen_domctl_createdomain *config, unsigned int flags) { - int rc, count = 0; + unsigned int count = 0; + int rc; BUILD_BUG_ON(GUEST_MAX_VCPUS < MAX_VIRT_CPUS); diff --git a/xen/arch/arm/include/asm/mmio.h b/xen/arch/arm/include/asm/mmio.h index 79e64d9af8..b22cfdac5b 100644 --- a/xen/arch/arm/include/asm/mmio.h +++ b/xen/arch/arm/include/asm/mmio.h @@ -75,8 +75,8 @@ struct mmio_handler { }; struct vmmio { - int num_entries; - int max_num_entries; + unsigned int num_entries; + unsigned int max_num_entries; rwlock_t lock; struct mmio_handler *handlers; }; @@ -86,7 +86,7 @@ enum io_state try_handle_mmio(struct cpu_user_regs *regs, void register_mmio_handler(struct domain *d, const struct mmio_handler_ops *ops, paddr_t addr, paddr_t size, void *priv); -int domain_io_init(struct domain *d, int max_count); +int domain_io_init(struct domain *d, unsigned int max_count); void domain_io_free(struct domain *d); void try_decode_instruction(const struct cpu_user_regs *regs, diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h index aa9f49409e..6901a05c06 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -304,8 +304,8 @@ extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n); extern void vgic_set_irqs_pending(struct vcpu *v, uint32_t r, unsigned int rank); extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops); -int vgic_v2_init(struct domain *d, int *mmio_count); -int vgic_v3_init(struct domain *d, int *mmio_count); +int vgic_v2_init(struct domain *d, unsigned int *mmio_count); +int vgic_v3_init(struct domain *d, unsigned int *mmio_count); extern bool vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int virq, @@ -352,7 +352,7 @@ int vgic_connect_hw_irq(struct domain *d, struct vcpu *v, unsigned int virq, bool vgic_evtchn_irq_pending(struct vcpu *v); -int domain_vgic_register(struct domain *d, int *mmio_count); +int domain_vgic_register(struct domain *d, unsigned int *mmio_count); int domain_vgic_init(struct domain *d, unsigned int nr_spis); void domain_vgic_free(struct domain *d); int vcpu_vgic_init(struct vcpu *v); diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c index 172583df04..96c740d563 100644 --- a/xen/arch/arm/io.c +++ b/xen/arch/arm/io.c @@ -224,7 +224,7 @@ void register_mmio_handler(struct domain *d, write_unlock(&vmmio->lock); } -int domain_io_init(struct domain *d, int max_count) +int domain_io_init(struct domain *d, unsigned int max_count) { rwlock_init(&d->arch.vmmio.lock); d->arch.vmmio.num_entries = 0; diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 35363fee09..2a2eda2e6f 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -731,7 +731,7 @@ static const struct vgic_ops vgic_v2_ops = { .lpi_get_priority = vgic_v2_lpi_get_priority, }; -int vgic_v2_init(struct domain *d, int *mmio_count) +int vgic_v2_init(struct domain *d, unsigned int *mmio_count) { if ( !vgic_v2_hw.enabled ) { diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 1b7173da1e..05a009409a 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1812,7 +1812,7 @@ static const struct vgic_ops v3_ops = { .lpi_get_priority = vgic_v3_lpi_get_priority, }; -int vgic_v3_init(struct domain *d, int *mmio_count) +int vgic_v3_init(struct domain *d, unsigned int *mmio_count) { if ( !vgic_v3_hw.enabled ) { diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 97d6f61066..afcac791fe 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -85,7 +85,7 @@ static void vgic_rank_init(struct vgic_irq_rank *rank, uint8_t index, write_atomic(&rank->vcpu[i], vcpu); } -int domain_vgic_register(struct domain *d, int *mmio_count) +int domain_vgic_register(struct domain *d, unsigned int *mmio_count) { switch ( d->arch.vgic.version ) { diff --git a/xen/arch/arm/vgic/vgic-init.c b/xen/arch/arm/vgic/vgic-init.c index 76b85ea823..f8d7d3a226 100644 --- a/xen/arch/arm/vgic/vgic-init.c +++ b/xen/arch/arm/vgic/vgic-init.c @@ -101,7 +101,7 @@ static void vgic_vcpu_early_init(struct vcpu *vcpu) * * was: kvm_vgic_create */ -int domain_vgic_register(struct domain *d, int *mmio_count) +int domain_vgic_register(struct domain *d, unsigned int *mmio_count) { switch ( d->arch.vgic.version ) { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 08:44:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 08:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.588259.919760 (Exim 4.92) (envelope-from ) id 1qYMzl-0002EM-Li; Tue, 22 Aug 2023 08:44:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 588259.919760; Tue, 22 Aug 2023 08:44:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzl-0002EE-Ir; Tue, 22 Aug 2023 08:44:13 +0000 Received: by outflank-mailman (input) for mailman id 588259; Tue, 22 Aug 2023 08:44:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzk-0002E4-Fg for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzk-0005gM-EN for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYMzk-00039K-DV for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Z/0a0hUqvGoay7dwH72kGk4LcUoJndeh5MPwd98Zw5o=; b=hZEN59ETn0ZviCJiwFq5Er7vYE 1caJ+v8pSn7XnJZbB0ZrRjuYj9VOCOhwPKHbRv77MZm9bLzBO8q+MASMoRnvriTjNE8PYjdDNxC+G 5gbzHUZY71O+B2LlckfgMpUGgd3gJJGnYMkZ9WkMlQDX2YYK8P5AqbSCn5PRuFgt9Vn8=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm: vgic: Use 'unsigned int' rather than 'int' whenever it is possible Message-Id: Date: Tue, 22 Aug 2023 08:44:12 +0000 commit 9fd20ec0bd7734dac6cc3b694ee322ebe020b3c5 Author: Julien Grall AuthorDate: Mon Aug 21 18:01:09 2023 +0100 Commit: Julien Grall CommitDate: Mon Aug 21 18:03:27 2023 +0100 xen/arm: vgic: Use 'unsigned int' rather than 'int' whenever it is possible Switch to unsigned int for the return/parameters of the following functions: * REG_RANK_NR(): 'b' (number of bits) and the return is always positive. 'n' doesn't need to be size specific. * vgic_rank_offset(): 'b' (number of bits), 'n' (register index), 's' (size of the access) are always positive. * vgic_{enable, disable}_irqs(): 'n' (rank index) is always positive * vgic_get_virq_type(): 'n' (rank index) and 'index' (register index) are always positive. * vgic_get_rank(): 'rank' is an index and therefore always positive. Take the opportunity to propogate the unsignedness to the local variable used for the arguments. This will remove some of the warning reported by GCC 12.2.1 when passing the flags -Wsign-conversion/-Wconversion. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini Reviewed-by: Henry Wang Tested-by: Henry Wang Reviewed-by: Michal Orzel --- xen/arch/arm/include/asm/vgic.h | 11 +++++++---- xen/arch/arm/vgic-v2.c | 12 ++++++++++-- xen/arch/arm/vgic.c | 23 +++++++++++++---------- 3 files changed, 30 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h index 6901a05c06..922779ce14 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -252,7 +252,7 @@ struct vgic_ops { * Rank containing GICD_ for GICD_ with * -bits-per-interrupt */ -static inline int REG_RANK_NR(int b, uint32_t n) +static inline unsigned int REG_RANK_NR(unsigned int b, unsigned int n) { switch ( b ) { @@ -297,10 +297,13 @@ extern void gic_remove_from_lr_pending(struct vcpu *v, struct pending_irq *p); extern void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq); extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq); extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int irq); -extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, int s); +extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, + unsigned int b, + unsigned int n, + unsigned int s); extern struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq); -extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n); -extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n); +extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, unsigned int n); +extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, unsigned int n); extern void vgic_set_irqs_pending(struct vcpu *v, uint32_t r, unsigned int rank); extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops); diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 2a2eda2e6f..0aa10fff0f 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -161,7 +161,11 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info, { struct hsr_dabt dabt = info->dabt; struct vgic_irq_rank *rank; - int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase); + /* + * gpa/dbase are paddr_t which size may be higher than 32-bit. Yet + * the difference will always be smaller than 32-bit. + */ + unsigned int gicd_reg = info->gpa - v->domain->arch.vgic.dbase; unsigned long flags; perfc_incr(vgicd_reads); @@ -403,7 +407,11 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info, { struct hsr_dabt dabt = info->dabt; struct vgic_irq_rank *rank; - int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase); + /* + * gpa/dbase are paddr_t which size may be higher than 32-bit. Yet + * the difference will always be smaller than 32-bit. + */ + unsigned int gicd_reg = info->gpa - v->domain->arch.vgic.dbase; uint32_t tr; unsigned long flags; diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index afcac791fe..f6b49766f9 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -24,7 +24,8 @@ #include #include -static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v, int rank) +static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v, + unsigned int rank) { if ( rank == 0 ) return v->arch.vgic.private_irqs; @@ -38,17 +39,17 @@ static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v, int rank) * Returns rank corresponding to a GICD_ register for * GICD_ with -bits-per-interrupt. */ -struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, - int s) +struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, unsigned int b, + unsigned int n, unsigned int s) { - int rank = REG_RANK_NR(b, (n >> s)); + unsigned int rank = REG_RANK_NR(b, (n >> s)); return vgic_get_rank(v, rank); } struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq) { - int rank = irq/32; + unsigned int rank = irq / 32; return vgic_get_rank(v, rank); } @@ -324,14 +325,14 @@ void arch_move_irqs(struct vcpu *v) } } -void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n) +void vgic_disable_irqs(struct vcpu *v, uint32_t r, unsigned int n) { const unsigned long mask = r; struct pending_irq *p; struct irq_desc *desc; unsigned int irq; unsigned long flags; - int i = 0; + unsigned int i = 0; struct vcpu *v_target; /* LPIs will never be disabled via this function. */ @@ -361,7 +362,9 @@ void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n) #define VGIC_ICFG_MASK(intr) (1U << ((2 * ((intr) % 16)) + 1)) /* The function should be called with the rank lock taken */ -static inline unsigned int vgic_get_virq_type(struct vcpu *v, int n, int index) +static inline unsigned int vgic_get_virq_type(struct vcpu *v, + unsigned int n, + unsigned int index) { struct vgic_irq_rank *r = vgic_get_rank(v, n); uint32_t tr = r->icfg[index >> 4]; @@ -374,13 +377,13 @@ static inline unsigned int vgic_get_virq_type(struct vcpu *v, int n, int index) return IRQ_TYPE_LEVEL_HIGH; } -void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) +void vgic_enable_irqs(struct vcpu *v, uint32_t r, unsigned int n) { const unsigned long mask = r; struct pending_irq *p; unsigned int irq; unsigned long flags; - int i = 0; + unsigned int i = 0; struct vcpu *v_target; struct domain *d = v->domain; -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 08:44:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 08:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.588260.919764 (Exim 4.92) (envelope-from ) id 1qYMzv-0002HO-Nc; Tue, 22 Aug 2023 08:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 588260.919764; Tue, 22 Aug 2023 08:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzv-0002HH-KP; Tue, 22 Aug 2023 08:44:23 +0000 Received: by outflank-mailman (input) for mailman id 588260; Tue, 22 Aug 2023 08:44:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzu-0002H4-I8 for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYMzu-0005gV-HN for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYMzu-00039j-GQ for xen-changelog@lists.xenproject.org; Tue, 22 Aug 2023 08:44:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=38hkWS4yGcTlHbMfCoheOikjFcbjIuyJN8mV+jeHk+I=; b=cKnsSO4e5ejIa5uxbcUeX22qkz QDceEfp8RmTyZu+qdV0W0ci6TrGiPV84vLQchhheLWDguWYNvnHqcMk+fH4WH6AP0pO+pR2ixELuL /YvQbgIRP5c6j+rZTnbGWu+VHATznEPM02SBHJi1fxC35hTowsjVByeXi1VsYBORlGHc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/public: arch-arm: All PSR_* defines should be unsigned Message-Id: Date: Tue, 22 Aug 2023 08:44:22 +0000 commit bf852717864f050872c9d71433c2bd83ef0e3915 Author: Julien Grall AuthorDate: Mon Aug 21 18:02:05 2023 +0100 Commit: Julien Grall CommitDate: Mon Aug 21 18:03:27 2023 +0100 xen/public: arch-arm: All PSR_* defines should be unsigned The defines PSR_* are field in registers and always unsigned. So add 'U' to clarify. This should help with MISRA Rule 7.2. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini Reviewed-by: Henry Wang Tested-by: Henry Wang --- xen/include/public/arch-arm.h | 52 +++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index c6449893e4..492819ad22 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -339,36 +339,36 @@ typedef uint64_t xen_callback_t; /* PSR bits (CPSR, SPSR) */ -#define PSR_THUMB (1<<5) /* Thumb Mode enable */ -#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ -#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ -#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ -#define PSR_BIG_ENDIAN (1<<9) /* arm32: Big Endian Mode */ -#define PSR_DBG_MASK (1<<9) /* arm64: Debug Exception mask */ -#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */ -#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ -#define PSR_Z (1<<30) /* Zero condition flag */ +#define PSR_THUMB (1U <<5) /* Thumb Mode enable */ +#define PSR_FIQ_MASK (1U <<6) /* Fast Interrupt mask */ +#define PSR_IRQ_MASK (1U <<7) /* Interrupt mask */ +#define PSR_ABT_MASK (1U <<8) /* Asynchronous Abort mask */ +#define PSR_BIG_ENDIAN (1U << 9) /* arm32: Big Endian Mode */ +#define PSR_DBG_MASK (1U << 9) /* arm64: Debug Exception mask */ +#define PSR_IT_MASK (0x0600fc00U) /* Thumb If-Then Mask */ +#define PSR_JAZELLE (1U << 24) /* Jazelle Mode */ +#define PSR_Z (1U << 30) /* Zero condition flag */ /* 32 bit modes */ -#define PSR_MODE_USR 0x10 -#define PSR_MODE_FIQ 0x11 -#define PSR_MODE_IRQ 0x12 -#define PSR_MODE_SVC 0x13 -#define PSR_MODE_MON 0x16 -#define PSR_MODE_ABT 0x17 -#define PSR_MODE_HYP 0x1a -#define PSR_MODE_UND 0x1b -#define PSR_MODE_SYS 0x1f +#define PSR_MODE_USR 0x10U +#define PSR_MODE_FIQ 0x11U +#define PSR_MODE_IRQ 0x12U +#define PSR_MODE_SVC 0x13U +#define PSR_MODE_MON 0x16U +#define PSR_MODE_ABT 0x17U +#define PSR_MODE_HYP 0x1aU +#define PSR_MODE_UND 0x1bU +#define PSR_MODE_SYS 0x1fU /* 64 bit modes */ -#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */ -#define PSR_MODE_EL3h 0x0d -#define PSR_MODE_EL3t 0x0c -#define PSR_MODE_EL2h 0x09 -#define PSR_MODE_EL2t 0x08 -#define PSR_MODE_EL1h 0x05 -#define PSR_MODE_EL1t 0x04 -#define PSR_MODE_EL0t 0x00 +#define PSR_MODE_BIT 0x10U /* Set iff AArch32 */ +#define PSR_MODE_EL3h 0x0dU +#define PSR_MODE_EL3t 0x0cU +#define PSR_MODE_EL2h 0x09U +#define PSR_MODE_EL2t 0x08U +#define PSR_MODE_EL1h 0x05U +#define PSR_MODE_EL1t 0x04U +#define PSR_MODE_EL0t 0x00U /* * We set PSR_Z to be able to boot Linux kernel versions with an invalid -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Tue Aug 22 08:44:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 22 Aug 2023 08:44:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.588261.919769 (Exim 4.92) (envelope-from ) id 1qYN05-0002Kk-Q2; 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Tue, 22 Aug 2023 08:44:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=mUsRqzbKrjcRDu5B56Q59EfaVSBinUVz642FzeIb7sw=; b=EBNzOSCMwNNnz91x2aeoavZQF+ Lk+mRWldUOE9/57R6fsJlPyRNNXClCx6klh4Yfy8Hu/l3Ep66iXDxkDVdgfeM7Pevn9F+RqEl/6F5 Jk9zUxFn4K9M/eEEdjfPuZsBYWHjxWV8UL+KEiL+OD4dkn2vHYSnnPEPHj/9ub0Op8Oc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/arm64: prepare for moving MMU related code from head.S Message-Id: Date: Tue, 22 Aug 2023 08:44:32 +0000 commit 3fae7c56b313a12288a05e0a8c14c47bfd4dc40e Author: Wei Chen AuthorDate: Mon Aug 14 12:25:26 2023 +0800 Commit: Julien Grall CommitDate: Mon Aug 21 18:03:27 2023 +0100 xen/arm64: prepare for moving MMU related code from head.S We want to reuse head.S for MPU systems, but there are some code are implemented for MMU systems only. We will move such code to another MMU specific file. But before that we will do some indentations fix in this patch to make them be easier for reviewing: 1. Fix the indentations and incorrect style of code comments. 2. Fix the indentations for .text.header section. 3. Rename puts() to asm_puts() for global export Signed-off-by: Wei Chen Signed-off-by: Penny Zheng Signed-off-by: Henry Wang Reviewed-by: Ayan Kumar Halder Reviewed-by: Julien Grall --- xen/arch/arm/arm64/head.S | 46 ++++++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 8bca9afa27..5029013a14 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -94,7 +94,7 @@ #define PRINT(_s) \ mov x3, lr ; \ adr_l x0, 98f ; \ - bl puts ; \ + bl asm_puts ; \ mov lr, x3 ; \ RODATA_STR(98, _s) @@ -148,21 +148,21 @@ isb .endm - .section .text.header, "ax", %progbits - /*.aarch64*/ +.section .text.header, "ax", %progbits +/*.aarch64*/ - /* - * Kernel startup entry point. - * --------------------------- - * - * The requirements are: - * MMU = off, D-cache = off, I-cache = on or off, - * x0 = physical address to the FDT blob. - * - * This must be the very first address in the loaded image. - * It should be linked at XEN_VIRT_START, and loaded at any - * 4K-aligned address. - */ +/* + * Kernel startup entry point. + * --------------------------- + * + * The requirements are: + * MMU = off, D-cache = off, I-cache = on or off, + * x0 = physical address to the FDT blob. + * + * This must be the very first address in the loaded image. + * It should be linked at XEN_VIRT_START, and loaded at any + * 4K-aligned address. + */ GLOBAL(start) /* @@ -560,7 +560,7 @@ ENDPROC(cpu_init) * Macro to create a mapping entry in \tbl to \phys. Only mapping in 3rd * level table (i.e page granularity) is supported. * - * ptbl: table symbol where the entry will be created + * ptbl: table symbol where the entry will be created * virt: virtual address * phys: physical address (should be page aligned) * tmp1: scratch register @@ -920,19 +920,22 @@ init_uart: ret ENDPROC(init_uart) -/* Print early debug messages. +/* + * Print early debug messages. + * Note: This function must be called from assembly. * x0: Nul-terminated string to print. * x23: Early UART base address - * Clobbers x0-x1 */ -puts: + * Clobbers x0-x1 + */ +ENTRY(asm_puts) early_uart_ready x23, 1 ldrb w1, [x0], #1 /* Load next char */ cbz w1, 1f /* Exit on nul */ early_uart_transmit x23, w1 - b puts + b asm_puts 1: ret -ENDPROC(puts) +ENDPROC(asm_puts) /* * Print a 64-bit number in hex. @@ -962,7 +965,6 @@ hex: .ascii "0123456789abcdef" ENTRY(early_puts) init_uart: -puts: putn: ret #endif /* !CONFIG_EARLY_PRINTK */ -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589703.921689 (Exim 4.92) (envelope-from ) id 1qYySA-00051L-Km; Thu, 24 Aug 2023 00:44:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589703.921689; Thu, 24 Aug 2023 00:44:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySA-00051E-I2; Thu, 24 Aug 2023 00:44:02 +0000 Received: by outflank-mailman (input) for mailman id 589703; Thu, 24 Aug 2023 00:44:01 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyS9-000518-Kp for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:01 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyS9-00012k-Gy for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:01 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyS9-0001O6-EQ for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:01 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I5XbMh248//34mlJYnWltxhSegSARsBaw//r2n4IRBE=; b=LyTVE/kFwVIh0d61SupGBgRczh 6V/NiGoNL0BdSeTOaeK7+wdWxgVBB4cjQR+nHWfZBbRwT6m0wRlScKjdzmz7osgdIL0U+RjI+jI2S W02BFtWDQWxbrtCSCfx/NFtkdpz7vC5Nf44WUReQEXguhlR032iXDUgIfg25986CmN1o=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] build: define ARCH and SRCARCH later Message-Id: Date: Thu, 24 Aug 2023 00:44:01 +0000 commit 1c3927f8f6743538a35aa45a91a2d4adbde9f277 Author: Anthony PERARD AuthorDate: Wed Jul 5 08:25:03 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 build: define ARCH and SRCARCH later Defining ARCH and SRCARCH later in xen/Makefile allows to switch to immediate evaluation variable type. ARCH and SRCARCH depend on value defined in Config.mk and aren't used for e.g. TARGET_SUBARCH or TARGET_ARCH, and not before they're needed in a sub-make or a rule. This will help reduce the number of times the shell rune is been run. With GNU make 4.4, the number of execution of the command present in these $(shell ) increased greatly. This is probably because as of make 4.4, exported variable are also added to the environment of $(shell ) construct. Also, `make -d` shows a lot of these: Makefile:39: not recursively expanding SRCARCH to export to shell function Makefile:38: not recursively expanding ARCH to export to shell function Reported-by: Jason Andryuk Signed-off-by: Anthony PERARD Tested-by: Jason Andryuk Reviewed-by: Jan Beulich (cherry picked from commit 58e0a3f3b2c430f8640ef9df67ac857b0008ebc8) --- xen/Makefile | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index f6005bd536..7ecfa6e8e9 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -35,12 +35,6 @@ MAKEFLAGS += -rR EFI_MOUNTPOINT ?= $(BOOT_DIR)/efi -ARCH=$(XEN_TARGET_ARCH) -SRCARCH=$(shell echo $(ARCH) | \ - sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \ - -e s'/riscv.*/riscv/g') -export ARCH SRCARCH - # Allow someone to change their config file export KCONFIG_CONFIG ?= .config @@ -241,6 +235,13 @@ include scripts/Kbuild.include include $(XEN_ROOT)/Config.mk # Set ARCH/SUBARCH appropriately. + +ARCH := $(XEN_TARGET_ARCH) +SRCARCH := $(shell echo $(ARCH) | \ + sed -e 's/x86.*/x86/' -e 's/arm\(32\|64\)/arm/g' \ + -e 's/riscv.*/riscv/g') +export ARCH SRCARCH + export TARGET_SUBARCH := $(XEN_TARGET_ARCH) export TARGET_ARCH := $(shell echo $(XEN_TARGET_ARCH) | \ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:12 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589704.921693 (Exim 4.92) (envelope-from ) id 1qYySK-00052w-Mc; Thu, 24 Aug 2023 00:44:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589704.921693; Thu, 24 Aug 2023 00:44:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySK-00052p-Jm; Thu, 24 Aug 2023 00:44:12 +0000 Received: by outflank-mailman (input) for mailman id 589704; Thu, 24 Aug 2023 00:44:11 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySJ-00052f-LT for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:11 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySJ-00014O-KZ for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:11 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYySJ-0001OV-J9 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:11 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=FtgPhAUWIqD2TC9M63gu2o7DMoBizz4MB/hL7Clngic=; b=P8tn9cHSG8pwZGwn69WJfUgnEY H1Zkikp6SQmF5/toAepH+q+AIKkHI+7J5RqeSRaXkihIkMQWyo6rpBA2ZSAfzx+StuRX3J0J8LNCQ L33B+JojCSpHYiCrv/StfofYNNn91SWRwSwBIRShGZHxuC0MdDJlG87RrJVAIeL25BuU=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] build: remove TARGET_SUBARCH, a duplicate of ARCH Message-Id: Date: Thu, 24 Aug 2023 00:44:11 +0000 commit 56076ef445073458c39c481f9b70c3b4ff848839 Author: Anthony PERARD AuthorDate: Wed Jul 5 08:27:51 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 build: remove TARGET_SUBARCH, a duplicate of ARCH Signed-off-by: Anthony PERARD Reviewed-by: Jan Beulich (cherry picked from commit a6ab7dd061338c33faef629cbe52ed1608571d84) --- xen/Makefile | 3 +-- xen/build.mk | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index 7ecfa6e8e9..6e89bcf348 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -234,7 +234,7 @@ include scripts/Kbuild.include # we need XEN_TARGET_ARCH to generate the proper config include $(XEN_ROOT)/Config.mk -# Set ARCH/SUBARCH appropriately. +# Set ARCH/SRCARCH appropriately. ARCH := $(XEN_TARGET_ARCH) SRCARCH := $(shell echo $(ARCH) | \ @@ -242,7 +242,6 @@ SRCARCH := $(shell echo $(ARCH) | \ -e 's/riscv.*/riscv/g') export ARCH SRCARCH -export TARGET_SUBARCH := $(XEN_TARGET_ARCH) export TARGET_ARCH := $(shell echo $(XEN_TARGET_ARCH) | \ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \ -e s'/riscv.*/riscv/g') diff --git a/xen/build.mk b/xen/build.mk index 758590c68e..d049d3a53a 100644 --- a/xen/build.mk +++ b/xen/build.mk @@ -41,7 +41,7 @@ include/xen/compile.h: include/xen/compile.h.in .banner FORCE targets += include/xen/compile.h -include $(wildcard .asm-offsets.s.d) -asm-offsets.s: arch/$(TARGET_ARCH)/$(TARGET_SUBARCH)/asm-offsets.c +asm-offsets.s: arch/$(TARGET_ARCH)/$(ARCH)/asm-offsets.c $(CC) $(call cpp_flags,$(c_flags)) -S -g0 -o $@.new -MQ $@ $< $(call move-if-changed,$@.new,$@) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:22 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589705.921697 (Exim 4.92) (envelope-from ) id 1qYySU-00055V-OI; Thu, 24 Aug 2023 00:44:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589705.921697; Thu, 24 Aug 2023 00:44:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySU-00055N-LJ; Thu, 24 Aug 2023 00:44:22 +0000 Received: by outflank-mailman (input) for mailman id 589705; Thu, 24 Aug 2023 00:44:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyST-00055B-OU for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyST-00014Y-Ne for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:21 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyST-0001Ow-Mf for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:21 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=IjGhvdt/ns/+/1e4NQap8UeoK7Ds839Tdc/Qryeaib8=; b=gDXpxlCg5183dCPeiYKrUca0Mq IQwg39PA7oydTIS+kKuLY86ru2/2ro/YRsArY/aUf/rHfzyq7plBa7gBFbQnzYD/Bl0p5TVAaPSAn FwnZENrK7vo6DMcjfKU58lzq+b1lrgq1uZntT+OwOoV1rEXRCT6ru+PKfu+LVlu+2ETA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] build: remove TARGET_ARCH, a duplicate of SRCARCH Message-Id: Date: Thu, 24 Aug 2023 00:44:21 +0000 commit 36e84ea02e1e8dce8f3a4e9351ab1c72dec3c11e Author: Anthony PERARD AuthorDate: Wed Jul 5 08:29:49 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 build: remove TARGET_ARCH, a duplicate of SRCARCH The same command is used to generate the value of both $(TARGET_ARCH) and $(SRCARCH), as $(ARCH) is an alias for $(XEN_TARGET_ARCH). Signed-off-by: Anthony PERARD Reviewed-by: Jan Beulich (cherry picked from commit ac27b3beb9b7b423d5563768de890c7594c21b4e) --- xen/Makefile | 20 ++++++++------------ xen/Rules.mk | 2 +- xen/build.mk | 6 +++--- 3 files changed, 12 insertions(+), 16 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index 6e89bcf348..1a3b9a081f 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -242,10 +242,6 @@ SRCARCH := $(shell echo $(ARCH) | \ -e 's/riscv.*/riscv/g') export ARCH SRCARCH -export TARGET_ARCH := $(shell echo $(XEN_TARGET_ARCH) | \ - sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \ - -e s'/riscv.*/riscv/g') - export CONFIG_SHELL := $(SHELL) export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE export YACC = $(if $(BISON),$(BISON),bison) @@ -262,7 +258,7 @@ export XEN_TREEWIDE_CFLAGS := $(CFLAGS) ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),) CLANG_FLAGS := -ifeq ($(TARGET_ARCH),x86) +ifeq ($(SRCARCH),x86) # The tests to select whether the integrated assembler is usable need to happen # before testing any assembler features, or else the result of the tests would # be stale if the integrated assembler is not used. @@ -430,22 +426,22 @@ endif ifdef building_out_of_srctree CFLAGS += -I$(objtree)/include - CFLAGS += -I$(objtree)/arch/$(TARGET_ARCH)/include + CFLAGS += -I$(objtree)/arch/$(SRCARCH)/include endif CFLAGS += -I$(srctree)/include -CFLAGS += -I$(srctree)/arch/$(TARGET_ARCH)/include +CFLAGS += -I$(srctree)/arch/$(SRCARCH)/include # Note that link order matters! ALL_OBJS-y := common/built_in.o ALL_OBJS-y += drivers/built_in.o ALL_OBJS-y += lib/built_in.o ALL_OBJS-y += xsm/built_in.o -ALL_OBJS-y += arch/$(TARGET_ARCH)/built_in.o +ALL_OBJS-y += arch/$(SRCARCH)/built_in.o ALL_OBJS-$(CONFIG_CRYPTO) += crypto/built_in.o ALL_LIBS-y := lib/lib.a -include $(srctree)/arch/$(TARGET_ARCH)/arch.mk +include $(srctree)/arch/$(SRCARCH)/arch.mk # define new variables to avoid the ones defined in Config.mk export XEN_CFLAGS := $(CFLAGS) @@ -587,11 +583,11 @@ $(TARGET): outputmakefile FORCE $(Q)$(MAKE) $(build)=tools $(Q)$(MAKE) $(build)=. include/xen/compile.h $(Q)$(MAKE) $(build)=include all - $(Q)$(MAKE) $(build)=arch/$(TARGET_ARCH) include - $(Q)$(MAKE) $(build)=. arch/$(TARGET_ARCH)/include/asm/asm-offsets.h + $(Q)$(MAKE) $(build)=arch/$(SRCARCH) include + $(Q)$(MAKE) $(build)=. arch/$(SRCARCH)/include/asm/asm-offsets.h $(Q)$(MAKE) $(build)=. MKRELOC=$(MKRELOC) 'ALL_OBJS=$(ALL_OBJS-y)' 'ALL_LIBS=$(ALL_LIBS-y)' $@ -SUBDIRS = xsm arch/$(TARGET_ARCH) common drivers lib test +SUBDIRS = xsm arch/$(SRCARCH) common drivers lib test define all_sources ( find include -type f -name '*.h' -print; \ find $(SUBDIRS) -type f -name '*.[chS]' -print ) diff --git a/xen/Rules.mk b/xen/Rules.mk index 59072ae8df..8af3dd7277 100644 --- a/xen/Rules.mk +++ b/xen/Rules.mk @@ -180,7 +180,7 @@ cpp_flags = $(filter-out -Wa$(comma)% -flto,$(1)) c_flags = -MMD -MP -MF $(depfile) $(XEN_CFLAGS) a_flags = -MMD -MP -MF $(depfile) $(XEN_AFLAGS) -include $(srctree)/arch/$(TARGET_ARCH)/Rules.mk +include $(srctree)/arch/$(SRCARCH)/Rules.mk c_flags += $(_c_flags) a_flags += $(_c_flags) diff --git a/xen/build.mk b/xen/build.mk index d049d3a53a..9ecb104f1e 100644 --- a/xen/build.mk +++ b/xen/build.mk @@ -41,11 +41,11 @@ include/xen/compile.h: include/xen/compile.h.in .banner FORCE targets += include/xen/compile.h -include $(wildcard .asm-offsets.s.d) -asm-offsets.s: arch/$(TARGET_ARCH)/$(ARCH)/asm-offsets.c +asm-offsets.s: arch/$(SRCARCH)/$(ARCH)/asm-offsets.c $(CC) $(call cpp_flags,$(c_flags)) -S -g0 -o $@.new -MQ $@ $< $(call move-if-changed,$@.new,$@) -arch/$(TARGET_ARCH)/include/asm/asm-offsets.h: asm-offsets.s +arch/$(SRCARCH)/include/asm/asm-offsets.h: asm-offsets.s @(set -e; \ echo "/*"; \ echo " * DO NOT MODIFY."; \ @@ -87,4 +87,4 @@ endif targets += prelink.o $(TARGET): prelink.o FORCE - $(Q)$(MAKE) $(build)=arch/$(TARGET_ARCH) $@ + $(Q)$(MAKE) $(build)=arch/$(SRCARCH) $@ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:32 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589706.921701 (Exim 4.92) (envelope-from ) id 1qYySe-00058G-PL; Thu, 24 Aug 2023 00:44:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589706.921701; Thu, 24 Aug 2023 00:44:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySe-000589-Mj; Thu, 24 Aug 2023 00:44:32 +0000 Received: by outflank-mailman (input) for mailman id 589706; Thu, 24 Aug 2023 00:44:31 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySd-00057x-RR for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:31 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySd-00014v-Qi for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:31 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYySd-0001Pa-Pq for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:31 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=I8p+RlvTR0n/Rx3injn2MLWIptF3RIWrbOz1fIRRwXY=; b=SAquTqLBVq81LXBD7sjrWTAqfJ z8ecnLC7nT9w02Idka4RBP1Hovzolba5BBbm4syR8MNCLaExQt2N9ay6W5LFlVR1NmprzM17DbSQG 2zbvbQUGReePoRdaZgTBN80qOdyqEIB+TqJxVov0z6m01fyY71f0/Z2DwlohWud6mTDA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] build: evaluate XEN_BUILD_* and XEN_DOMAIN immediately Message-Id: Date: Thu, 24 Aug 2023 00:44:31 +0000 commit a1f68fb56710c507f9c1ec8e8d784f5b1e4088f1 Author: Anthony PERARD AuthorDate: Mon Jul 31 15:02:18 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 build: evaluate XEN_BUILD_* and XEN_DOMAIN immediately With GNU make 4.4, the number of execution of the command present in these $(shell ) increased greatly. This is probably because as of make 4.4, exported variable are also added to the environment of $(shell ) construct. Also, `make -d` shows a lot of these: Makefile:15: not recursively expanding XEN_BUILD_DATE to export to shell function Makefile:16: not recursively expanding XEN_BUILD_TIME to export to shell function Makefile:17: not recursively expanding XEN_BUILD_HOST to export to shell function Makefile:14: not recursively expanding XEN_DOMAIN to export to shell function So to avoid having these command been run more than necessary, we will replace ?= by an equivalent but with immediate expansion. Reported-by: Jason Andryuk Signed-off-by: Anthony PERARD Tested-by: Jason Andryuk Reviewed-by: Jan Beulich (cherry picked from commit 0c594c1b57ee2ecec5f70826c53a2cf02a9c2acb) --- xen/Makefile | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/xen/Makefile b/xen/Makefile index 1a3b9a081f..7bb9de7bdc 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -11,10 +11,18 @@ export XEN_FULLVERSION = $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) -include xen-version export XEN_WHOAMI ?= $(USER) -export XEN_DOMAIN ?= $(shell ([ -x /bin/dnsdomainname ] && /bin/dnsdomainname) || ([ -x /bin/domainname ] && /bin/domainname || echo [unknown])) -export XEN_BUILD_DATE ?= $(shell LC_ALL=C date) -export XEN_BUILD_TIME ?= $(shell LC_ALL=C date +%T) -export XEN_BUILD_HOST ?= $(shell hostname) +ifeq ($(origin XEN_DOMAIN), undefined) +export XEN_DOMAIN := $(shell ([ -x /bin/dnsdomainname ] && /bin/dnsdomainname) || ([ -x /bin/domainname ] && /bin/domainname || echo [unknown])) +endif +ifeq ($(origin XEN_BUILD_DATE), undefined) +export XEN_BUILD_DATE := $(shell LC_ALL=C date) +endif +ifeq ($(origin XEN_BUILD_TIME), undefined) +export XEN_BUILD_TIME := $(shell LC_ALL=C date +%T) +endif +ifeq ($(origin XEN_BUILD_HOST), undefined) +export XEN_BUILD_HOST := $(shell hostname) +endif # Best effort attempt to find a python interpreter, defaulting to Python 3 if # available. Fall back to just `python` if `which` is nowhere to be found. -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:42 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589707.921704 (Exim 4.92) (envelope-from ) id 1qYySo-0005Bt-Qk; Thu, 24 Aug 2023 00:44:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589707.921704; Thu, 24 Aug 2023 00:44:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySo-0005Bm-OC; Thu, 24 Aug 2023 00:44:42 +0000 Received: by outflank-mailman (input) for mailman id 589707; Thu, 24 Aug 2023 00:44:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySn-0005Bb-Uy for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:41 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySn-000156-UD for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:41 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYySn-0001Q1-Si for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:41 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=DjimiibPQLb7Q6z0oxoX+EpPYsH+LA5a6RRSjLWzdfc=; b=sE6WCBaI+vZGvYzqdBNOZQOTur VJX6Cnj+DiKePlcHxhtpQfRbFA0mL4aYmV1WOZqsWzfLF5mTgAoSc0bbQpWVd3oOuv8G9a6tvC5FD bsD+WAGuUu4EXFsPs6ez6Ne7OOF/mVxGHikw95+U+vFT5ImSvUIc6r3ZuMxZ5j08s2FQ=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] Config.mk: evaluate XEN_COMPILE_ARCH and XEN_OS immediately Message-Id: Date: Thu, 24 Aug 2023 00:44:41 +0000 commit 476d2624ec3cf3e60709580ff1df208bb8f616e2 Author: Anthony PERARD AuthorDate: Mon Jul 31 15:02:34 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 Config.mk: evaluate XEN_COMPILE_ARCH and XEN_OS immediately With GNU make 4.4, the number of execution of the command present in these $(shell ) increased greatly. This is probably because as of make 4.4, exported variable are also added to the environment of $(shell ) construct. So to avoid having these command been run more than necessary, we will replace ?= by an equivalent but with immediate expansion. Reported-by: Jason Andryuk Signed-off-by: Anthony PERARD Tested-by: Jason Andryuk Reviewed-by: Jan Beulich (cherry picked from commit a07414d989cf52e5e84192b78023bee1589bbda4) --- Config.mk | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Config.mk b/Config.mk index 8bc2bcd5f6..4864033c73 100644 --- a/Config.mk +++ b/Config.mk @@ -19,13 +19,17 @@ or = $(if $(strip $(1)),$(1),$(if $(strip $(2)),$(2),$(if $(strip $(3)),$( -include $(XEN_ROOT)/.config -XEN_COMPILE_ARCH ?= $(shell uname -m | sed -e s/i.86/x86_32/ \ +ifeq ($(origin XEN_COMPILE_ARCH), undefined) +XEN_COMPILE_ARCH := $(shell uname -m | sed -e s/i.86/x86_32/ \ -e s/i86pc/x86_32/ -e s/amd64/x86_64/ \ -e s/armv7.*/arm32/ -e s/armv8.*/arm64/ \ -e s/aarch64/arm64/) +endif XEN_TARGET_ARCH ?= $(XEN_COMPILE_ARCH) -XEN_OS ?= $(shell uname -s) +ifeq ($(origin XEN_OS), undefined) +XEN_OS := $(shell uname -s) +endif CONFIG_$(XEN_OS) := y -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:44:52 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:44:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589708.921710 (Exim 4.92) (envelope-from ) id 1qYySy-0005Eu-Tg; Thu, 24 Aug 2023 00:44:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589708.921710; Thu, 24 Aug 2023 00:44:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySy-0005En-Pi; Thu, 24 Aug 2023 00:44:52 +0000 Received: by outflank-mailman (input) for mailman id 589708; Thu, 24 Aug 2023 00:44:52 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySy-0005E6-1w for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:52 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYySy-00015G-17 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:52 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYySy-0001QQ-0E for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:44:52 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=ZYuxp7cnF3Rkm7wurTK+vuPNNqH/ho1T5LV+6fQPDek=; b=gfyiAqiwusNW5kp4Itqzexorv5 TZ1dFK0fKUD9ZVL63meLzWHJZ+5Rv3xwADbulfB44VtxVFw8i0jKo8NWXYfjXmDleMS8aYrtKZYL9 zjE5k4UTIY3P5eLdgxVdVC1uiE9qaFdpSYa4PoxOxxy2WSP8PMZpcM63eq8UI8mP7Vto=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] x86emul: rework wrapping of libc functions in test and fuzzing harnesses Message-Id: Date: Thu, 24 Aug 2023 00:44:52 +0000 commit 37f1d68fa34220600f1e4ec82af5da70127757e5 Author: Jan Beulich AuthorDate: Fri Aug 18 15:04:28 2023 +0200 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 x86emul: rework wrapping of libc functions in test and fuzzing harnesses Our present approach is working fully behind the compiler's back. This was found to not work with LTO. Employ ld's --wrap= option instead. Note that while this makes the build work at least with new enough gcc (it doesn't with gcc7, for example, due to tool chain side issues afaict), according to my testing things still won't work when building the fuzzing harness with afl-cc: While with the gcc7 tool chain I see afl-as getting invoked, this does not happen with gcc13. Yet without using that assembler wrapper the resulting binary will look uninstrumented to afl-fuzz. While checking the resulting binaries I noticed that we've gained uses of snprintf() and strstr(), which only just so happen to not cause any problems. Add a wrappers for them as well. Since we don't have any actual uses of v{,sn}printf(), no definitions of their wrappers appear (just yet). But I think we want __wrap_{,sn}printf() to properly use __real_v{,sn}printf() right away, which means we need delarations of the latter. Reported-by: Andrew Cooper Suggested-by: Andrew Cooper Signed-off-by: Jan Beulich Tested-by: Andrew Cooper Acked-by: Andrew Cooper (cherry picked from commit 6fba45ca3be1c5d46cddb1eaf371d9e69550b244) --- tools/fuzz/x86_instruction_emulator/Makefile | 6 ++- tools/tests/x86_emulator/Makefile | 4 +- tools/tests/x86_emulator/wrappers.c | 55 ++++++++++++++++++++-------- tools/tests/x86_emulator/x86-emulate.h | 14 +++---- 4 files changed, 53 insertions(+), 26 deletions(-) diff --git a/tools/fuzz/x86_instruction_emulator/Makefile b/tools/fuzz/x86_instruction_emulator/Makefile index 13aa238503..c83959c847 100644 --- a/tools/fuzz/x86_instruction_emulator/Makefile +++ b/tools/fuzz/x86_instruction_emulator/Makefile @@ -29,6 +29,8 @@ GCOV_FLAGS := --coverage %-cov.o: %.c $(CC) -c $(CFLAGS) $(GCOV_FLAGS) $< -o $@ +WRAPPED = $(shell sed -n 's,^ *WRAP(\([[:alnum:]_]*\));,\1,p' x86-emulate.h) + x86-emulate.h: x86_emulate/x86_emulate.h x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c fuzz-emul.o fuzz-emul-cov.o wrappers.o: x86-emulate.h @@ -37,10 +39,10 @@ x86-insn-fuzzer.a: fuzz-emul.o x86-emulate.o cpuid.o $(AR) rc $@ $^ afl-harness: afl-harness.o fuzz-emul.o x86-emulate.o cpuid.o wrappers.o - $(CC) $(CFLAGS) $^ -o $@ + $(CC) $(CFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@ afl-harness-cov: afl-harness-cov.o fuzz-emul-cov.o x86-emulate-cov.o cpuid.o wrappers.o - $(CC) $(CFLAGS) $(GCOV_FLAGS) $^ -o $@ + $(CC) $(CFLAGS) $(GCOV_FLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) $^ -o $@ # Common targets .PHONY: all diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index bd82598f97..a2fd6607c6 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -250,8 +250,10 @@ xop.h avx512f.h: simd-fma.c endif # 32-bit override +WRAPPED := $(shell sed -n 's,^ *WRAP(\([[:alnum:]_]*\));,\1,p' x86-emulate.h) + $(TARGET): x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o - $(HOSTCC) $(HOSTCFLAGS) -o $@ $^ + $(HOSTCC) $(HOSTCFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) -o $@ $^ .PHONY: clean clean: diff --git a/tools/tests/x86_emulator/wrappers.c b/tools/tests/x86_emulator/wrappers.c index eba7cc93c5..3829a6f416 100644 --- a/tools/tests/x86_emulator/wrappers.c +++ b/tools/tests/x86_emulator/wrappers.c @@ -1,78 +1,103 @@ #include -#define WRAP(x) typeof(x) emul_##x +#define WRAP(x) typeof(x) __wrap_ ## x, __real_ ## x #include "x86-emulate.h" -size_t emul_fwrite(const void *src, size_t sz, size_t n, FILE *f) +size_t __wrap_fwrite(const void *src, size_t sz, size_t n, FILE *f) { emul_save_fpu_state(); - sz = fwrite(src, sz, n, f); + sz = __real_fwrite(src, sz, n, f); emul_restore_fpu_state(); return sz; } -int emul_memcmp(const void *p1, const void *p2, size_t sz) +int __wrap_memcmp(const void *p1, const void *p2, size_t sz) { int rc; emul_save_fpu_state(); - rc = memcmp(p1, p2, sz); + rc = __real_memcmp(p1, p2, sz); emul_restore_fpu_state(); return rc; } -void *emul_memcpy(void *dst, const void *src, size_t sz) +void *__wrap_memcpy(void *dst, const void *src, size_t sz) { emul_save_fpu_state(); - memcpy(dst, src, sz); + __real_memcpy(dst, src, sz); emul_restore_fpu_state(); return dst; } -void *emul_memset(void *dst, int c, size_t sz) +void *__wrap_memset(void *dst, int c, size_t sz) { emul_save_fpu_state(); - memset(dst, c, sz); + __real_memset(dst, c, sz); emul_restore_fpu_state(); return dst; } -int emul_printf(const char *fmt, ...) +int __wrap_printf(const char *fmt, ...) { va_list varg; int rc; emul_save_fpu_state(); va_start(varg, fmt); - rc = vprintf(fmt, varg); + rc = __real_vprintf(fmt, varg); va_end(varg); emul_restore_fpu_state(); return rc; } -int emul_putchar(int c) +int __wrap_putchar(int c) { int rc; emul_save_fpu_state(); - rc = putchar(c); + rc = __real_putchar(c); emul_restore_fpu_state(); return rc; } -int emul_puts(const char *str) +int __wrap_puts(const char *str) { int rc; emul_save_fpu_state(); - rc = puts(str); + rc = __real_puts(str); emul_restore_fpu_state(); return rc; } + +int __wrap_snprintf(char *buf, size_t n, const char *fmt, ...) +{ + va_list varg; + int rc; + + emul_save_fpu_state(); + va_start(varg, fmt); + rc = __real_vsnprintf(buf, n, fmt, varg); + va_end(varg); + emul_restore_fpu_state(); + + return rc; +} + +char *__wrap_strstr(const char *s1, const char *s2) +{ + char *s; + + emul_save_fpu_state(); + s = __real_strstr(s1, s2); + emul_restore_fpu_state(); + + return s; +} diff --git a/tools/tests/x86_emulator/x86-emulate.h b/tools/tests/x86_emulator/x86-emulate.h index 19bea9c38d..58760f096d 100644 --- a/tools/tests/x86_emulator/x86-emulate.h +++ b/tools/tests/x86_emulator/x86-emulate.h @@ -29,9 +29,7 @@ #ifdef EOF # error "Must not include before x86-emulate.h" #endif -#ifdef WRAP -# include -#endif +#include #include @@ -85,11 +83,7 @@ void emul_restore_fpu_state(void); * around the actual function. */ #ifndef WRAP -# if 0 /* This only works for explicit calls, not for compiler generated ones. */ -# define WRAP(x) typeof(x) x asm("emul_" #x) -# else -# define WRAP(x) asm(".equ " #x ", emul_" #x) -# endif +# define WRAP(x) typeof(x) __wrap_ ## x #endif WRAP(fwrite); @@ -99,6 +93,10 @@ WRAP(memset); WRAP(printf); WRAP(putchar); WRAP(puts); +WRAP(snprintf); +WRAP(strstr); +WRAP(vprintf); +WRAP(vsnprintf); #undef WRAP -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:45:03 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:45:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589709.921713 (Exim 4.92) (envelope-from ) id 1qYyT8-0005Ib-VS; Thu, 24 Aug 2023 00:45:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589709.921713; Thu, 24 Aug 2023 00:45:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyT8-0005IT-Ss; Thu, 24 Aug 2023 00:45:02 +0000 Received: by outflank-mailman (input) for mailman id 589709; Thu, 24 Aug 2023 00:45:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyT8-0005IL-5R for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyT8-00015n-4c for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyT8-0001Ri-3J for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=qdSKknmD7CsFMy8tveifxu2VvYQ/zhaheey4WwgQn8w=; b=d+vMOKw8JKqBdF12/n6kXesTOO ZTCJ1TVcK6eVtknKL1Pvzcr/b4LHGCewMBy26omMs5OLopeWaeGpvtuF5s1tiKAzwcJC5JcFZhj16 yX9Dag8QRxtXyXn3JI88PAVuiZb5KGPMHbHt/uaBKWV82pTtj2SE0OnKCisY8aapTvYs=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] rombios: Work around GCC issue 99578 Message-Id: Date: Thu, 24 Aug 2023 00:45:02 +0000 commit ae1045c42954772e48862162d0e95fbc9393c91e Author: Andrew Cooper AuthorDate: Thu Aug 17 21:32:53 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 rombios: Work around GCC issue 99578 GCC 12 objects to pointers derived from a constant: util.c: In function 'find_rsdp': util.c:429:16: error: array subscript 0 is outside array bounds of 'uint16_t[0]' {aka 'short unsigned int[]'} [-Werror=array-bounds] 429 | ebda_seg = *(uint16_t *)ADDR_FROM_SEG_OFF(0x40, 0xe); cc1: all warnings being treated as errors This is a GCC bug, but work around it rather than turning array-bounds checking off generally. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit e35138a2ffbe1fe71edaaaaae71063dc545a8416) --- tools/firmware/rombios/32bit/util.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/firmware/rombios/32bit/util.c b/tools/firmware/rombios/32bit/util.c index 6c1c480514..a47e000a26 100644 --- a/tools/firmware/rombios/32bit/util.c +++ b/tools/firmware/rombios/32bit/util.c @@ -424,10 +424,10 @@ static struct acpi_20_rsdp *__find_rsdp(const void *start, unsigned int len) struct acpi_20_rsdp *find_rsdp(void) { struct acpi_20_rsdp *rsdp; - uint16_t ebda_seg; + uint16_t *volatile /* GCC issue 99578 */ ebda_seg = + ADDR_FROM_SEG_OFF(0x40, 0xe); - ebda_seg = *(uint16_t *)ADDR_FROM_SEG_OFF(0x40, 0xe); - rsdp = __find_rsdp((void *)(ebda_seg << 16), 1024); + rsdp = __find_rsdp((void *)(*ebda_seg << 16), 1024); if (!rsdp) rsdp = __find_rsdp((void *)0xE0000, 0x20000); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:45:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:45:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589710.921717 (Exim 4.92) (envelope-from ) id 1qYyTJ-0005MF-0o; Thu, 24 Aug 2023 00:45:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589710.921717; Thu, 24 Aug 2023 00:45:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTI-0005M7-UL; Thu, 24 Aug 2023 00:45:12 +0000 Received: by outflank-mailman (input) for mailman id 589710; Thu, 24 Aug 2023 00:45:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTI-0005Lx-8f for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTI-00015z-7q for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyTI-0001T0-6s for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=cD6HwQUD0+rCBwXaWgtWEEl8HiFaEG0AC16KQE2HCaw=; b=3/6A7hsFIYWRJkUcIDSVDwU+0x t9lDiGNQX2DNcRiiko6pT10inPcJKskrCwKm3NKqFRqVIu6q/1z96UZzifguz1wznwA5bxBWnrz2U eFsAOHeqyyt/cl1RmelN8mYD2VUvZGOmDP3WUKGt9lDLyjLuXljBUXxmDcAAM4LtpIUo=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] rombios: Avoid using K&R function syntax Message-Id: Date: Thu, 24 Aug 2023 00:45:12 +0000 commit 24487fec3bbebbc1fd3f00d16bca7fb0f56a5f30 Author: Andrew Cooper AuthorDate: Fri Aug 18 10:47:46 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 rombios: Avoid using K&R function syntax Clang-15 complains: tcgbios.c:598:25: error: a function declaration without a prototype is deprecated in all versions of C [-Werror,-Wstrict-prototypes] void tcpa_calling_int19h() ^ void C2x formally removes K&R syntax. The declarations for these functions in 32bitprotos.h are already ANSI compatible. Update the definitions to match. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit a562afa5679d4a7ceb9cb9222fec1fea9a61f738) --- tools/firmware/rombios/32bit/tcgbios/tcgbios.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tools/firmware/rombios/32bit/tcgbios/tcgbios.c b/tools/firmware/rombios/32bit/tcgbios/tcgbios.c index fa22c4460a..ad0eac0d20 100644 --- a/tools/firmware/rombios/32bit/tcgbios/tcgbios.c +++ b/tools/firmware/rombios/32bit/tcgbios/tcgbios.c @@ -595,7 +595,7 @@ static void tcpa_add_measurement(uint32_t pcrIndex, /* * Add measurement to log about call of int 19h */ -void tcpa_calling_int19h() +void tcpa_calling_int19h(void) { tcpa_add_measurement(4, EV_ACTION, 0); } @@ -603,7 +603,7 @@ void tcpa_calling_int19h() /* * Add measurement to log about retuning from int 19h */ -void tcpa_returned_int19h() +void tcpa_returned_int19h(void) { tcpa_add_measurement(4, EV_ACTION, 1); } @@ -611,7 +611,7 @@ void tcpa_returned_int19h() /* * Add event separators for PCRs 0 to 7; specs 8.2.3 */ -void tcpa_add_event_separators() +void tcpa_add_event_separators(void) { uint32_t pcrIndex = 0; while (pcrIndex <= 7) { @@ -624,7 +624,7 @@ void tcpa_add_event_separators() /* * Add a wake event to the log */ -void tcpa_wake_event() +void tcpa_wake_event(void) { tcpa_add_measurement_to_log(6, EV_ACTION, @@ -659,7 +659,7 @@ void tcpa_add_bootdevice(uint32_t bootcd, uint32_t bootdrv) * Add measurement to the log about option rom scan * 10.4.3 : action 14 */ -void tcpa_start_option_rom_scan() +void tcpa_start_option_rom_scan(void) { tcpa_add_measurement(2, EV_ACTION, 14); } -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:45:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:45:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589711.921722 (Exim 4.92) (envelope-from ) id 1qYyTT-0005PB-2t; Thu, 24 Aug 2023 00:45:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589711.921722; Thu, 24 Aug 2023 00:45:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTS-0005P3-WE; Thu, 24 Aug 2023 00:45:23 +0000 Received: by outflank-mailman (input) for mailman id 589711; Thu, 24 Aug 2023 00:45:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTS-0005Ot-DA for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTS-000166-CU for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyTS-0001TR-9z for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=yNtYCnBVf/zG/b0hIWTvmdGv0MgsN4JWidapoQ0tmxM=; b=nnO29lmGSmQcPvbA4eiIJ+dOjK jjRLwth1bwbnHbQ6lO0An3M7WpY7WxrQ98Dz3j4V4VmEDaIZbbO+e4XBsd+Lm2K3byxM3Y8zn5j2n cc7kYSHmWDzaNckljqphq5osHkBPrLA14k6mbzLaV2JjPH63db4GdOlzK40XAg2056ts=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] rombios: Remove the use of egrep Message-Id: Date: Thu, 24 Aug 2023 00:45:22 +0000 commit e418a77295e6b512d212b57123c11e4d4fb23e8c Author: Andrew Cooper AuthorDate: Fri Aug 18 11:05:00 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 22 13:43:05 2023 +0100 rombios: Remove the use of egrep As the Alpine 3.18 container notes: egrep: warning: egrep is obsolescent; using grep -E Adjust it. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich (cherry picked from commit 5ddac3c2852ecc120acab86fc403153a2097c5dc) --- tools/firmware/rombios/32bit/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/firmware/rombios/32bit/Makefile b/tools/firmware/rombios/32bit/Makefile index c058c71551..50d45647c2 100644 --- a/tools/firmware/rombios/32bit/Makefile +++ b/tools/firmware/rombios/32bit/Makefile @@ -26,7 +26,7 @@ $(TARGET): 32bitbios_all.o 32bitbios_all.o: 32bitbios.o tcgbios/tcgbiosext.o util.o pmm.o $(LD) $(LDFLAGS_DIRECT) -s -r $^ -o 32bitbios_all.o @nm 32bitbios_all.o | \ - egrep '^ +U ' >/dev/null && { \ + grep -E '^ +U ' >/dev/null && { \ echo "There are undefined symbols in the BIOS:"; \ nm -u 32bitbios_all.o; \ exit 11; \ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:45:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:45:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589712.921725 (Exim 4.92) (envelope-from ) id 1qYyTd-0005RW-4A; Thu, 24 Aug 2023 00:45:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589712.921725; Thu, 24 Aug 2023 00:45:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTd-0005RO-1O; Thu, 24 Aug 2023 00:45:33 +0000 Received: by outflank-mailman (input) for mailman id 589712; Thu, 24 Aug 2023 00:45:32 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTc-0005RE-GB for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:32 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTc-00016W-FQ for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:32 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyTc-0001Tx-EV for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:32 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=KxDHDUmuOQ/UAugzy9PpGZqWi6N2PF9g0sDm1vR247g=; b=jSZIanSQ+7Hy1VZAfo96AiRS7P 84Fl7BSiP+GMBamu/TjRrehrtnjJA0oY0s0Zoa7LOghhZ85+3IPvjbxZUanZ3mMsjfs2PZV9SnAzL rHP9Cq5NQCjaaJ4sV3zIWLeFyVq6ve5t5E7crivsZrxvW1fGS4XO0l4IS0yoDMngKPdM=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] CI: Resync FreeBSD config with staging Message-Id: Date: Thu, 24 Aug 2023 00:45:32 +0000 commit f00d56309533427981f09ef2614f1bae4bcab62e Author: Andrew Cooper AuthorDate: Fri Feb 17 11:16:32 2023 +0000 Commit: Andrew Cooper CommitDate: Tue Aug 22 14:36:53 2023 +0100 CI: Resync FreeBSD config with staging CI: Update FreeBSD to 13.1 Also print the compiler version before starting. It's not easy to find otherwise, and does change from time to time. Signed-off-by: Andrew Cooper Reviewed-by: Anthony PERARD (cherry picked from commit 5e7667ea2dd33e0e5e0f3a96db37fdb4ecd98fba) CI: Update FreeBSD to 13.2 Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini (cherry picked from commit f872a624cbf92de9944483eea7674ef80ced1380) CI: Update FreeBSD to 12.4 Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné (cherry picked from commit a73560896ce3c513460f26bd1c205060d6ec4f8a) --- .cirrus.yml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index c38333e736..7e0beb200d 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -10,19 +10,20 @@ freebsd_template: &FREEBSD_TEMPLATE libxml2 glib git build_script: + - cc --version - ./configure --with-system-seabios=/usr/local/share/seabios/bios.bin - gmake -j`sysctl -n hw.ncpu` clang=y task: name: 'FreeBSD 12' freebsd_instance: - image_family: freebsd-12-3 + image_family: freebsd-12-4 << : *FREEBSD_TEMPLATE task: name: 'FreeBSD 13' freebsd_instance: - image_family: freebsd-13-0 + image_family: freebsd-13-2 << : *FREEBSD_TEMPLATE task: -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 00:45:44 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 00:45:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.589713.921729 (Exim 4.92) (envelope-from ) id 1qYyTo-0005Us-7D; Thu, 24 Aug 2023 00:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 589713.921729; Thu, 24 Aug 2023 00:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTo-0005Uk-3F; Thu, 24 Aug 2023 00:45:44 +0000 Received: by outflank-mailman (input) for mailman id 589713; Thu, 24 Aug 2023 00:45:42 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTm-0005UN-Ix for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:42 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qYyTm-00016g-IG for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:42 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qYyTm-0001UN-Ha for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 00:45:42 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=b95xxkxg8cEMgcvGPmhGuUtruywufnRlLGFokId7nw4=; b=0Sn2Xc1NpO/itRxntYk6pE/8c9 cUK4dhOwYYWkSBd/Qx+UPfL6RVAHuAGwJmBK2McBddpgOn1TKGvAPoniPKcWQJjKRbHER/1cHddvW mIVwgvAzBspsK6bc1hl5UQ4ool7uSkBL9VVPJnW0TYjNut/HOzHBx2vR7x46P6GQkKxw=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen stable-4.17] tools/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Message-Id: Date: Thu, 24 Aug 2023 00:45:42 +0000 commit 052a8d24bc670ab6503e21dfd2fb8bccfc22aa73 Author: Andrew Cooper AuthorDate: Tue Aug 8 14:53:42 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 22 14:36:53 2023 +0100 tools/vchan: Fix -Wsingle-bit-bitfield-constant-conversion Gitlab reports: node.c:158:17: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] ctrl->blocking = 1; ^ ~ 1 error generated. make[4]: *** [/builds/xen-project/people/andyhhp/xen/tools/vchan/../../tools/Rules.mk:188: node.o] Error 1 In Xen 4.18, this was fixed with c/s 99ab02f63ea8 ("tools: convert bitfields to unsigned type") but this is an ABI change which can't be backported. Swich 1 for -1 to provide a minimally invasive way to fix the build. No functional change. Signed-off-by: Andrew Cooper --- tools/vchan/node.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/vchan/node.c b/tools/vchan/node.c index f1638f013d..a28293b720 100644 --- a/tools/vchan/node.c +++ b/tools/vchan/node.c @@ -155,7 +155,7 @@ int main(int argc, char **argv) perror("libxenvchan_*_init"); exit(1); } - ctrl->blocking = 1; + ctrl->blocking = -1; srand(seed); fprintf(stderr, "seed=%d\n", seed); -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17 From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:08 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590279.922429 (Exim 4.92) (envelope-from ) id 1qZH0p-0004Vo-KQ; Thu, 24 Aug 2023 20:33:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 590279.922429; Thu, 24 Aug 2023 20:33:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0p-0004Vh-Ha; Thu, 24 Aug 2023 20:33:03 +0000 Received: by outflank-mailman (input) for mailman id 590279; Thu, 24 Aug 2023 20:33:02 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0o-0004VZ-NM for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:02 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0o-00011R-MU for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:02 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qZH0o-0007hi-JN for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:02 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=NnU2cohxpwMC4kV+H5WcUJcJVxUr2pDggji17h++q/s=; b=3ZBqQ4HgjFRzIAjNTza4avLkVp JhQnXjL31BM2eNboFkuokcTWlDBptIgaolsnUru5S+2U+HbzJALBiiQqo4Rb/k1xpEeH4y/33x13T MbGSqxsZB8nZ/EWkCSi1tuHO9PYRh+xz+E8I5QvXWz8NSPoxln2k+nfmXejYY4AauLHA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] x86/hpet: Disable legacy replacement mode after IRQ test Message-Id: Date: Thu, 24 Aug 2023 20:33:02 +0000 commit 5eb8c15171f72f155a5cba8400eb940b44187867 Author: Simon Gaiser AuthorDate: Tue Aug 22 08:51:38 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 22 08:51:38 2023 +0200 x86/hpet: Disable legacy replacement mode after IRQ test As far as I understand the HPET legacy mode is not required after the timer IRQ test. For previous discussion see [1] and [2]. Keeping it enabled prevents reaching deeper C-states on some systems and thereby also S0ix residency. So disable it after the timer IRQ test worked. Note that this code path is only reached when opt_hpet_legacy_replacement < 0, so explicit user choice is still honored. Link: https://lore.kernel.org/xen-devel/cb408368-077d-edb5-b4ad-f80086db48c1@invisiblethingslab.com/ # [1] Link: https://lore.kernel.org/xen-devel/20230718122603.2002-1-simon@invisiblethingslab.com/ # [2] Signed-off-by: Simon Gaiser Reviewed-by: Jan Beulich --- xen/arch/x86/io_apic.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index b3afef8933..0ef61fb2f1 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -1964,6 +1964,9 @@ static void __init check_timer(void) if ( timer_irq_works() ) { + printk(XENLOG_DEBUG + "IRQ test with HPET Legacy Replacement Mode worked - disabling it again\n"); + hpet_disable_legacy_replacement_mode(); local_irq_restore(flags); return; } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:13 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590281.922433 (Exim 4.92) (envelope-from ) id 1qZH0z-0004YK-MM; Thu, 24 Aug 2023 20:33:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 590281.922433; Thu, 24 Aug 2023 20:33:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0z-0004YC-JA; Thu, 24 Aug 2023 20:33:13 +0000 Received: by outflank-mailman (input) for mailman id 590281; Thu, 24 Aug 2023 20:33:12 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0y-0004Y0-TW for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:12 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH0y-00011c-Qr for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:12 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qZH0y-0007iS-P3 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:12 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=BJsZH07T+d2u40X1OoQFQ/Ao0J/gyQ8F+FvhxlZ9nQg=; b=i/KXSW1FzTAwZgwnyvSI4WrsLN 2gx/mYPMGxpUBatu3IoNDWso2pIjdeBONIzQCCCrN50+oOuXV0I92KvIXt0ds5fsRkOKh9mA63eHo EbW8CLRWLjYVciP4pwucW2uxXklgf2fVa3XAFpqdGhme2IIgaTgj/YJRwXqkslQUJVhg=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] mem-sharing: move (x86) / drop (Arm) arch_dump_shared_mem_info() Message-Id: Date: Thu, 24 Aug 2023 20:33:12 +0000 commit db75dfdb11dc4e837585bf61cc25dc0c8f048288 Author: Jan Beulich AuthorDate: Tue Aug 22 08:52:49 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 22 08:52:49 2023 +0200 mem-sharing: move (x86) / drop (Arm) arch_dump_shared_mem_info() When !MEM_SHARING no useful output is produced. Move the function into mm/mem_sharing.c while conditionalizing the call to it, thus allowing to drop it altogether from Arm (and eliminating the need to introduce stubs on PPC and RISC-V). Signed-off-by: Jan Beulich Reviewed-by: Luca Fancellu #arm Acked-by: Stefano Stabellini Acked-by: Tamas K Lengyel --- xen/arch/arm/mm.c | 4 ---- xen/arch/x86/mm.c | 7 ------- xen/arch/x86/mm/mem_sharing.c | 7 +++++++ xen/common/keyhandler.c | 2 ++ 4 files changed, 9 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index d1e1bc72bd..c34cc94c90 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -1294,10 +1294,6 @@ void free_init_memory(void) printk("Freed %ldkB init memory.\n", (long)(__init_end-__init_begin)>>10); } -void arch_dump_shared_mem_info(void) -{ -} - int steal_page( struct domain *d, struct page_info *page, unsigned int memflags) { diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 057e17c10e..28fdf820ef 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -6261,13 +6261,6 @@ void memguard_unguard_stack(void *p) map_pages_to_xen((unsigned long)p, virt_to_mfn(p), 1, PAGE_HYPERVISOR_RW); } -void arch_dump_shared_mem_info(void) -{ - printk("Shared frames %u -- Saved frames %u\n", - mem_sharing_get_nr_shared_mfns(), - mem_sharing_get_nr_saved_mfns()); -} - const struct platform_bad_page *__init get_platform_badpages(unsigned int *array_size) { u32 igd_id; diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 8edbd9600f..ae5366d447 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -2329,3 +2329,10 @@ int mem_sharing_domctl(struct domain *d, struct xen_domctl_mem_sharing_op *mec) return rc; } + +void arch_dump_shared_mem_info(void) +{ + printk("Shared frames %u -- Saved frames %u\n", + mem_sharing_get_nr_shared_mfns(), + mem_sharing_get_nr_saved_mfns()); +} diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c index 68d8166968..f4752859cc 100644 --- a/xen/common/keyhandler.c +++ b/xen/common/keyhandler.c @@ -365,7 +365,9 @@ static void cf_check dump_domains(unsigned char key) } } +#ifdef CONFIG_MEM_SHARING arch_dump_shared_mem_info(); +#endif rcu_read_unlock(&domlist_read_lock); } -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:23 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590282.922437 (Exim 4.92) (envelope-from ) id 1qZH19-0004ak-NZ; Thu, 24 Aug 2023 20:33:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 590282.922437; Thu, 24 Aug 2023 20:33:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH19-0004ad-L3; Thu, 24 Aug 2023 20:33:23 +0000 Received: by outflank-mailman (input) for mailman id 590282; Thu, 24 Aug 2023 20:33:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH18-0004aT-Uz for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH18-00011o-U6 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:22 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qZH18-0007iy-T2 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:22 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=t1W2GblAjJ0YUtKtr2Rd2ur6nEEDf+7zTXHK+lu3dB8=; b=rIX85eglnUT8DwJEUTTIEy9GdB VNGuOaaGaY0xBdoPrHcU1mKSMtXtMCmMQvMD7bRoBrWVuk52SKIqeA25OUnFvE3LUcH8Ia0vbv3yk SIIk7E0AwTkuAgHxZ8SMXSSzX3cPi2DmPicMQHpS1jYSpm7zxYoASCHpJVMRaH1wpqsA=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] vm_event: rework inclusions to use arch-indipendent header Message-Id: Date: Thu, 24 Aug 2023 20:33:22 +0000 commit b3bb51f718bd513264129a407fc1836682b689a7 Author: Nicola Vetrini AuthorDate: Tue Aug 22 08:53:24 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 22 08:53:24 2023 +0200 vm_event: rework inclusions to use arch-indipendent header The arch-specific header should be included by the common header , so that the latter can be included in the source files. This also resolves violations of MISRA C:2012 Rule 8.4 that were caused by declarations for 'vm_event_{fill_regs,set_registers,monitor_next_interrupt}' in not being visible when defining functions in 'xen/arch/x86/vm_event.c' Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Tamas K Lengyel --- xen/arch/arm/include/asm/vm_event.h | 1 - xen/arch/arm/vm_event.c | 2 +- xen/arch/x86/vm_event.c | 2 +- xen/include/xen/vm_event.h | 1 + 4 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/vm_event.h b/xen/arch/arm/include/asm/vm_event.h index abe7db1970..4d861373b3 100644 --- a/xen/arch/arm/include/asm/vm_event.h +++ b/xen/arch/arm/include/asm/vm_event.h @@ -20,7 +20,6 @@ #define __ASM_ARM_VM_EVENT_H__ #include -#include #include static inline int vm_event_init_domain(struct domain *d) diff --git a/xen/arch/arm/vm_event.c b/xen/arch/arm/vm_event.c index ba99f56eb2..ccfd25bbbc 100644 --- a/xen/arch/arm/vm_event.c +++ b/xen/arch/arm/vm_event.c @@ -8,7 +8,7 @@ */ #include -#include +#include void vm_event_fill_regs(vm_event_request_t *req) { diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c index 7027c08a92..e6c7ad5337 100644 --- a/xen/arch/x86/vm_event.c +++ b/xen/arch/x86/vm_event.c @@ -20,7 +20,7 @@ #include #include -#include +#include /* Implicitly serialized by the domctl lock. */ int vm_event_init_domain(struct domain *d) diff --git a/xen/include/xen/vm_event.h b/xen/include/xen/vm_event.h index 92811d9110..9a86358b42 100644 --- a/xen/include/xen/vm_event.h +++ b/xen/include/xen/vm_event.h @@ -25,6 +25,7 @@ #include #include +#include struct vm_event_domain { -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:33 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590283.922441 (Exim 4.92) (envelope-from ) id 1qZH1J-0004ds-P4; Thu, 24 Aug 2023 20:33:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 590283.922441; Thu, 24 Aug 2023 20:33:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH1J-0004dl-MS; Thu, 24 Aug 2023 20:33:33 +0000 Received: by outflank-mailman (input) for mailman id 590283; Thu, 24 Aug 2023 20:33:33 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH1J-0004dX-1p for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:33 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH1J-00011x-13 for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:33 +0000 Received: from xen by xenbits.xenproject.org with local (Exim 4.92) (envelope-from ) id 1qZH1I-0007jN-WD for xen-changelog@lists.xenproject.org; Thu, 24 Aug 2023 20:33:33 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=vaqw8jTxzbpzmNJx7LREf6/tL+7Pn89w6FOtD/5i0xQ=; b=XF8WLyXegk5suk2kB2ScbpfxFf C9rPkb2vK1kz4c8wXHiMTdS8t5i/1H3hdMeELmnK97s8P8KStLs4V+GZpvT5XeBGM/AH6qUzaQch+ 1NdRHh5kP30hBEuTsPC0WHAIO2DaEp6Kwu/M9U5HdATxyO0pF95mkHwUmobAK8rnJAcE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] xen/pci: address a violation of MISRA C:2012 Rule 8.3 Message-Id: Date: Thu, 24 Aug 2023 20:33:32 +0000 commit a7d04b0e7935620e9f8b9e693d818bf043a5ecd6 Author: Stewart Hildebrand AuthorDate: Tue Aug 22 08:53:56 2023 +0200 Commit: Jan Beulich CommitDate: Tue Aug 22 08:53:56 2023 +0200 xen/pci: address a violation of MISRA C:2012 Rule 8.3 Make the paramater names of the prototype match the definition. No functional change. Signed-off-by: Stewart Hildebrand Reviewed-by: Jan Beulich --- xen/drivers/pci/pci.c | 2 +- xen/include/xen/pci.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c index e411876a15..c73a8c4124 100644 --- a/xen/drivers/pci/pci.c +++ b/xen/drivers/pci/pci.c @@ -80,7 +80,7 @@ int pci_find_ext_capability(int seg, int bus, int devfn, int cap) /** * pci_find_next_ext_capability - Find another extended capability * @seg/@bus/@devfn: PCI device to query - * @pos: starting position + * @start: starting position * @cap: capability code * * Returns the address of the requested extended capability structure diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 5975ca2f30..a8c8c4ff11 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -196,7 +196,8 @@ int pci_mmcfg_write(unsigned int seg, unsigned int bus, int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func, u8 cap); int pci_find_next_cap(u16 seg, u8 bus, unsigned int devfn, u8 pos, int cap); int pci_find_ext_capability(int seg, int bus, int devfn, int cap); -int pci_find_next_ext_capability(int seg, int bus, int devfn, int pos, int cap); +int pci_find_next_ext_capability(int seg, int bus, int devfn, int start, + int cap); const char *parse_pci(const char *, unsigned int *seg, unsigned int *bus, unsigned int *dev, unsigned int *func); const char *parse_pci_seg(const char *, unsigned int *seg, unsigned int *bus, -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:45 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590284.922444 (Exim 4.92) (envelope-from ) id 1qZH1U-0004gh-QX; Thu, 24 Aug 2023 20:33:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 590284.922444; Thu, 24 Aug 2023 20:33:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qZH1U-0004gZ-Nz; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=Mgr8hNhdNgDp2lVx7Uwvmmi8umWCyYVojFQlbyAxVkE=; b=QN+iBBTju12ir5At2XkPwioAWb /BCshzX9RNRFtUkcY59VpqwdiRpoT/tH8YiXE9p5rzXuC8uJrabSsZYN2csofUX8LmxLlQ8QpioQf jsOmUzVHxv5rj59M+yw4MRJIMjXuIu7Hvcrl5eqq+7KRAB/wWxqs9ojH9DuFOu43DkQE=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] CI: Update FreeBSD to 12.4 Message-Id: Date: Thu, 24 Aug 2023 20:33:43 +0000 commit a73560896ce3c513460f26bd1c205060d6ec4f8a Author: Andrew Cooper AuthorDate: Tue Aug 22 13:56:17 2023 +0100 Commit: Andrew Cooper CommitDate: Tue Aug 22 14:10:14 2023 +0100 CI: Update FreeBSD to 12.4 Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monné --- .cirrus.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.cirrus.yml b/.cirrus.yml index 9bb6cce4ea..7e0beb200d 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -17,7 +17,7 @@ freebsd_template: &FREEBSD_TEMPLATE task: name: 'FreeBSD 12' freebsd_instance: - image_family: freebsd-12-3 + image_family: freebsd-12-4 << : *FREEBSD_TEMPLATE task: -- generated by git-patchbot for /home/xen/git/xen.git#master From xen-changelog-bounces@lists.xenproject.org Thu Aug 24 20:33:54 2023 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 24 Aug 2023 20:33:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.590285.922449 (Exim 4.92) (envelope-from ) id 1qZH1e-0004jf-Ru; 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Thu, 24 Aug 2023 20:33:53 +0000 X-BeenThere: xen-changelog@lists.xenproject.org List-Id: "Change log for Mercurial \(receive only\)" List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-changelog-bounces@lists.xenproject.org Precedence: list Sender: "Xen-changelog" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Date:Message-Id:Subject:Reply-To:To:From; bh=lJa9cnvdpQVz+x6JweQyPG1egLURnXW8IncgIhIuljM=; b=S24DvRYxUUsXWJOAxuCkm9EdLA EBOuIrD3j6aVg2/X1vzPIfB/sqi8Z4i+pVVM/s05LjNaBQPWmlO7SKlXsBquw2ASBkqdTLKO4/zlb Cq0b9n5tCuyEYi3sVusCmKv3fASGjY75x8Vq8BjRf7jZrCsHKuxdYPbwQ96HBHjGYqTc=; From: patchbot@xen.org To: xen-changelog@lists.xenproject.org Reply-To: xen-devel@lists.xenproject.org Subject: [xen master] build: make cc-option properly deal with unrecognized sub-options Message-Id: Date: Thu, 24 Aug 2023 20:33:53 +0000 commit 824b5a40dd3de0bd58fa306f4be8d6e13e1c327d Author: Jan Beulich AuthorDate: Wed Aug 23 09:25:52 2023 +0200 Commit: Jan Beulich CommitDate: Wed Aug 23 09:25:52 2023 +0200 build: make cc-option properly deal with unrecognized sub-options In options like -march=, it may be only the sub-option which is unrecognized by the compiler. In such an event the error message often splits option and argument, typically saying something like "bad value '' for '